├── .gitignore ├── LICENSE ├── README.md ├── docs ├── Model_mcu.drawio ├── Model_mcu.drawio.png ├── banner.png ├── explorationplot.py ├── firstlayer.png ├── nnexploration.png ├── samplescompared.png └── sizeexploration.txt ├── include ├── auto_sysclock.h ├── delay.h ├── easy-pdk │ ├── README.md │ ├── calibrate.h │ └── serial_num.h └── pdk │ ├── README.md │ ├── delay.h │ ├── device.h │ ├── device │ ├── periph │ │ ├── accumulator.h │ │ ├── adc.h │ │ ├── bandgap.h │ │ ├── clock.h │ │ ├── comparator.h │ │ ├── external_oscillator.h │ │ ├── interrupt.h │ │ ├── misc.h │ │ ├── misc2.h │ │ ├── misclvr.h │ │ ├── misclvr_basic.h │ │ ├── multiplier.h │ │ ├── port_a.h │ │ ├── port_b.h │ │ ├── port_c.h │ │ ├── pwmg_0.h │ │ ├── pwmg_1.h │ │ ├── pwmg_2.h │ │ ├── pwmg_basic.h │ │ ├── rfc.h │ │ ├── rop.h │ │ ├── stack.h │ │ ├── timer_16.h │ │ ├── timer_2.h │ │ └── timer_3.h │ ├── pfs154.h │ ├── pfs172.h │ ├── pfs173.h │ ├── pms131.h │ ├── pms150c.h │ ├── pms152.h │ ├── pms154b.h │ ├── pms154c.h │ └── pms171b.h │ ├── factory_calibration.h │ ├── fuse.h │ ├── sysclock.h │ └── util.h └── src ├── BitNetMCU_model.h ├── Makefile ├── PDK_softuart.c ├── main.c └── softuart.h /.gitignore: -------------------------------------------------------------------------------- 1 | 2 | /src/.build/* 3 | /src/.objects/* 4 | /src/.output/* 5 | 6 | 7 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | 2 | # MNIST inference on the "3 cent" Microcontroller. 3 | 4 | This project attempts to push [BitNetMCU](https://github.com/cpldcpu/BitNetMCU) to the absolute limit: Is it possible to implement reasonably accurate inference of MNIST, the handwritten numbers dataset, on a "3 cent" Microcontroller with only 64 bytes of RAM and 1K of instruction memory? 5 | 6 | ![banner](docs/banner.png) 7 | 8 | Only weeks ago, my resounding answer would have been: "NO". But after the surprisingly good performance of BitNetMCU, I decided to give it a try. 9 | 10 | This code achieves 90.1% test accuracy on test images scaled to 8x8 pixels while consuming 59 of 64 bytes of RAM and 972 of 1024 words of program memory. [See blog](https://cpldcpu.wordpress.com/2024/05/02/machine-learning-mnist-inference-on-the-3-cent-microcontroller/) for a few more details. The training code can be found in [this branch](https://github.com/cpldcpu/BitNetMCU/tree/pdk) of BitNetMCU 11 | 12 | ## Project structure 13 | 14 | ```plaintext 15 | ├── include/ # Contains the free-pdk header files 16 | └── src/ 17 | ├── BitNetMCU_model.h # MNIST model definition 18 | ├── main.c # Main source file 19 | ├── Makefile 20 | ├── PDK_softuart.c # Software UART implementation 21 | └── softuart.h # Software UART header file 22 | ``` 23 | 24 | ## Building Instructions 25 | 26 | !!! **Use SDCC 4.1.0 to build. Later versions create broken code** !!! 27 | 28 | This is a hack, don't expect it to be useful for anything. 29 | 30 | If you still want to build the project, you need to have the [FreePDK toolchain](https://free-pdk.github.io/) installed. The default target is the PFS154, but you can change it to the PMS150C by editing the makefile. Currently, monitoring output is only supported with PFS154 as a target and the UART functions will not be included if PMS150C is selected. 31 | 32 | 1. Navigate to the `src/` directory. 33 | 2. Run `make flash` to build and flash the project 34 | 3. `make start` to start the monitor 35 | -------------------------------------------------------------------------------- /docs/Model_mcu.drawio: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | 76 | 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99 | 100 | 101 | 102 | 103 | 104 | 105 | 106 | 107 | 108 | 109 | 110 | 111 | 112 | 113 | 114 | 115 | -------------------------------------------------------------------------------- /docs/Model_mcu.drawio.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/BitNetPDK/26633f464390a3a94148a43726f66fd7ba793922/docs/Model_mcu.drawio.png -------------------------------------------------------------------------------- /docs/banner.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/BitNetPDK/26633f464390a3a94148a43726f66fd7ba793922/docs/banner.png -------------------------------------------------------------------------------- /docs/explorationplot.py: -------------------------------------------------------------------------------- 1 | #%% 2 | import pandas as pd 3 | import matplotlib.pyplot as plt 4 | import seaborn as sns 5 | 6 | # Load the data 7 | data_path = '../plots/sizeexploration.txt' 8 | df = pd.read_csv(data_path, sep="\t") 9 | 10 | #%% 11 | sns.set_theme(style="darkgrid") 12 | # Create the plot with specified figure size 13 | plt.figure(figsize=(6, 4)) 14 | 15 | # Plotting scatter with different colors and markers for each 'Input' 16 | ax = sns.scatterplot(data=df, x='total kbyte', y='test/accuracy', hue='Input', style='Input', s=100) 17 | 18 | # Add interpolated trend line for each 'Input' group, sorted by 'total kbyte' for smooth interpolation 19 | for input_size in df['Input'].unique(): 20 | subset = df[df['Input'] == input_size] 21 | subset = subset.sort_values('total kbyte') # Sort by 'total kbyte' 22 | plt.plot(subset['total kbyte'], subset['test/accuracy'], linestyle='--', linewidth=1, label=f'Trend ({input_size})') 23 | 24 | # Setting plot title and axis labels 25 | plt.title('Test Accuracy vs Weight Memory Footprint') 26 | plt.xlabel('Total memory footprint of weights (kbyte)') 27 | plt.ylabel('Accuracy (%)') 28 | 29 | # Setting the x-axis limits and ticks 30 | ax.set_xlim(left=0, right=13) # Set x-axis limit to 0 to 13 31 | plt.xticks(range(0, 14, 1)) # Set x-axis ticks from 0 to 13 in steps of 1 32 | 33 | # Display the legend and show the plot 34 | plt.legend(title='Input Size') 35 | plt.tight_layout() 36 | plt.savefig('nnexploration.png', dpi=300) 37 | 38 | plt.show() 39 | 40 | # %% 41 | -------------------------------------------------------------------------------- /docs/firstlayer.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/BitNetPDK/26633f464390a3a94148a43726f66fd7ba793922/docs/firstlayer.png -------------------------------------------------------------------------------- /docs/nnexploration.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/BitNetPDK/26633f464390a3a94148a43726f66fd7ba793922/docs/nnexploration.png -------------------------------------------------------------------------------- /docs/samplescompared.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/BitNetPDK/26633f464390a3a94148a43726f66fd7ba793922/docs/samplescompared.png -------------------------------------------------------------------------------- /docs/sizeexploration.txt: -------------------------------------------------------------------------------- 1 | Input bits total kbyte Layers test/accuracy 2 | 16x16 4 12.3125 3 99.01 3 | 16x16 4 10.3125 2 98.79 4 | 16x16 4 10.40625 3 98.51 5 | 16x16 4 10.3359375 3 98.73 6 | 16x16 4 12.203125 2 98.98 7 | 16x16 4 16.640625 3 99.04 8 | 16x16 4 16.96875 2 98.98 9 | 16x16 4 7.359375 2 98.52 10 | 16x16 4 8.484375 3 98.72 11 | 16x16 4 11.5625 2 98.85 12 | 16x16 4 11.8828125 2 98.94 13 | 16x16 4 11.46875 2 98.96 14 | 16x16 4 12.625 2 99.03 15 | 16x16 4 10.6015625 2 98.76 16 | 16x16 4 10.609375 2 98.87 17 | 16x16 4 10.53125 2 98.79 18 | 16x16 4 9.625 2 98.7 19 | 16x16 4 6.5625 2 98.29 20 | 16x16 8 11.953125 2 98.6 21 | 16x16 4 5.976563 2 98.13 22 | 16x16 5 7.460703 2 98.44 23 | 16x16 2 2.988281 2 96.79 24 | 16x16 2 1.101563 2 94.22 25 | 8x8 4 2.16 3 96.96 26 | 8x8 4 3.98 3 97.91 27 | 8x8 4 12.47 3 98.39 28 | 8x8 4 4.3125 2 98.04 29 | 8x8 4 1.65625 2 96.6 30 | 8x8 4 6.015625 2 98.13 31 | 8x8 4 9.140625 3 98.47 32 | 8x8 1 0.414063 2 91.38 33 | 8x8 1 0.53906 3 92.16 34 | 8x8 2 1.078124 3 95.64 35 | 8x8 2 0.714 3 94.541 36 | 8x8 4 0.82812 2 94.92 37 | 8x8 2 0.4140625 3 91.7 38 | 8x8 2 0.5566406 3 93.4 39 | -------------------------------------------------------------------------------- /include/auto_sysclock.h: -------------------------------------------------------------------------------- 1 | #ifndef __AUTO_SYSCLOCK_H__ 2 | #define __AUTO_SYSCLOCK_H__ 3 | 4 | #include 5 | 6 | #if !defined(F_CPU) 7 | #error "F_CPU is not defined!" 8 | #endif 9 | 10 | // AUTO_INIT_SYSCLOCK() 11 | #if (F_CPU > 12000000) 12 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_16MHZ) 13 | #elif (F_CPU > 6000000) 14 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_8MHZ) 15 | #elif (F_CPU > 3000000) 16 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_4MHZ) 17 | #elif (F_CPU > 1500000) 18 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_2MHZ) 19 | #elif (F_CPU > 750000) 20 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_1MHZ) 21 | #elif (F_CPU > 375000) 22 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_500KHZ) 23 | #elif (F_CPU > 150000) 24 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_250KHZ) 25 | #elif (F_CPU > ILRC_FREQ/2) 26 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_ILRC) 27 | #elif (F_CPU > ILRC_FREQ/8) 28 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_ILRC_DIV4) 29 | #else 30 | #define AUTO_INIT_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_ILRC_DIV16) 31 | #endif 32 | 33 | // AUTO_CALIBRATE_SYSCLOCK(vdd_mv) 34 | #if (F_CPU > 150000) 35 | #define AUTO_CALIBRATE_SYSCLOCK(vdd_mv) EASY_PDK_CALIBRATE_IHRC(F_CPU,vdd_mv) 36 | #else 37 | #define AUTO_CALIBRATE_SYSCLOCK(vdd_mv) EASY_PDK_CALIBRATE_ILRC(F_CPU,vdd_mv) 38 | #endif 39 | 40 | #endif //__AUTO_SYSCLOCK_H__ 41 | -------------------------------------------------------------------------------- /include/delay.h: -------------------------------------------------------------------------------- 1 | #ifndef __DELAY_H__ 2 | #define __DELAY_H__ 3 | 4 | #if !defined(F_CPU) 5 | #error "F_CPU is not defined!" 6 | #endif 7 | 8 | #include 9 | 10 | #if !defined(MAX) 11 | #define MAX(a,b) ((a)>(b)?(a):(b)) 12 | #endif 13 | 14 | #define NS_TO_CYCLES(ns) ((ns)/(1000000000L/F_CPU)) 15 | #define US_TO_CYCLES(us) (NS_TO_CYCLES(us*1000L)) 16 | #define MS_TO_CYCLES(ms) (NS_TO_CYCLES(ms*1000000L)) 17 | 18 | #define LOOP_CTR(cycles,ovh,lp) (MAX(0,(cycles-ovh-lp)/lp)+1) 19 | #define LOOP_CTR_8(cycles) LOOP_CTR(cycles,7,3) 20 | #define LOOP_CTR_16(cycles) LOOP_CTR(cycles,9,8) 21 | #define LOOP_CTR_32(cycles) LOOP_CTR(cycles,13,12) 22 | 23 | #define _delay_us(us) \ 24 | (LOOP_CTR_8(US_TO_CYCLES(us)) < 256L) ? \ 25 | _delay_loop_8((uint8_t)LOOP_CTR_8(US_TO_CYCLES(us))) : \ 26 | _delay_loop_16((uint16_t)LOOP_CTR_16(US_TO_CYCLES(us))) 27 | 28 | #define _delay_ms(ms) \ 29 | (LOOP_CTR_16(MS_TO_CYCLES(ms)) < 65536L) ? \ 30 | _delay_loop_16((uint16_t)LOOP_CTR_16(MS_TO_CYCLES(ms))) : \ 31 | _delay_loop_32((uint32_t)LOOP_CTR_32(MS_TO_CYCLES(ms))) 32 | 33 | // 3 cycles per loop, 7 cycles overhead 34 | void _delay_loop_8(uint8_t loop_ctr) { 35 | loop_ctr; // Ignore unreferenced function argument warning 36 | __asm 37 | // mov a, #(loop_ctr) ; 1 cycle 38 | // mov __delay_loop_8_PARM_1, a ; 1 cycle 39 | // call __delay_loop_8 ; 2 cycles 40 | 00001$: ; 4 cycles per loop 41 | dzsn __delay_loop_8_PARM_1 ; 1 cycle + 1 cycle for final skip 42 | goto 00001$ ; 2 cycles 43 | // ret ; 2 cycles 44 | __endasm; 45 | } 46 | 47 | // 8 cycles per loop, 9 cycles overhead 48 | void _delay_loop_16(uint16_t loop_ctr) { 49 | loop_ctr; // Ignore unreferenced function argument warning 50 | __asm 51 | // mov a, #(loop_ctr) ; 1 cycle 52 | // mov __delay_loop_16_PARM_1+0, a ; 1 cycle 53 | // mov a, #(loop_ctr<<8) ; 1 cycle 54 | // mov __delay_loop_16_PARM_1+1, a ; 1 cycle 55 | // call __delay_loop_16 ; 2 cycles 56 | 00001$: ; 8 cycles per loop 57 | nop ; 1 cycle 58 | dec __delay_loop_16_PARM_1+0 ; 1 cycle 59 | subc __delay_loop_16_PARM_1+1 ; 1 cycle 60 | mov a, __delay_loop_16_PARM_1+0 ; 1 cycle 61 | or a, __delay_loop_16_PARM_1+1 ; 1 cycle 62 | t1sn f, z ; 1 cycle + 1 cycle for final skip 63 | goto 00001$ ; 2 cycles 64 | // ret ; 2 cycles 65 | __endasm; 66 | } 67 | 68 | // 12 cycles per loop, 13 cycles overhead 69 | void _delay_loop_32(uint32_t loop_ctr) { 70 | loop_ctr; // Ignore unreferenced function argument warning 71 | __asm 72 | // mov a, #(loop_ctr) ; 1 cycle 73 | // mov __delay_loop_32_PARM_1+0, a ; 1 cycle 74 | // mov a, #(loop_ctr<<8) ; 1 cycle 75 | // mov __delay_loop_32_PARM_1+1, a ; 1 cycle 76 | // mov a, #(loop_ctr<<16) ; 1 cycle 77 | // mov __delay_loop_32_PARM_1+1, a ; 1 cycle 78 | // mov a, #(loop_ctr<<24) ; 1 cycle 79 | // mov __delay_loop_32_PARM_1+1, a ; 1 cycle 80 | // call __delay_loop_32 ; 2 cycles 81 | 00001$: ; 12 cycles per loop 82 | nop ; 1 cycle 83 | dec __delay_loop_32_PARM_1+0 ; 1 cycle 84 | subc __delay_loop_32_PARM_1+1 ; 1 cycle 85 | subc __delay_loop_32_PARM_1+2 ; 1 cycle 86 | subc __delay_loop_32_PARM_1+3 ; 1 cycle 87 | mov a, __delay_loop_32_PARM_1+0 ; 1 cycle 88 | or a, __delay_loop_32_PARM_1+1 ; 1 cycle 89 | or a, __delay_loop_32_PARM_1+2 ; 1 cycle 90 | or a, __delay_loop_32_PARM_1+3 ; 1 cycle 91 | t1sn f, z ; 1 cycle + 1 cycle for final skip 92 | goto 00001$ ; 2 cycles 93 | // ret ; 2 cycles 94 | __endasm; 95 | } 96 | 97 | #endif //__DELAY_H__ 98 | -------------------------------------------------------------------------------- /include/easy-pdk/README.md: -------------------------------------------------------------------------------- 1 | This contains a local copy of the 'easy-pdk-includes' repository: 2 | https://github.com/free-pdk/easy-pdk-includes 3 | -------------------------------------------------------------------------------- /include/easy-pdk/calibrate.h: -------------------------------------------------------------------------------- 1 | /* 2 | calibrate.h: Macros to allow Easy PDK Programmer to calibrate internal oscillators (IHRC & ILRC), and bandgap (BG). 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __EASY_PDK_CALIBRATE_H__ 28 | #define __EASY_PDK_CALIBRATE_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" " 32 | #endif 33 | 34 | #define EASY_PDK_CALTYPE_IHRC 1 35 | #define EASY_PDK_CALTYPE_ILRC 2 36 | 37 | // Placeholders for Easy PDK calibration of IHRC, ILRC, and BG executed/replaced by easypdkprog 38 | 39 | #define EASY_PDK_CALIBRATE_IHRC(frequency,millivolt) \ 40 | EASY_PDK_CALIBRATE_RC_M(EASY_PDK_CALTYPE_IHRC, IHRCR_ADDR, frequency, millivolt) 41 | 42 | #if defined(ILRCR_ADDR) 43 | #define EASY_PDK_CALIBRATE_ILRC(frequency,millivolt) \ 44 | EASY_PDK_CALIBRATE_RC_M(EASY_PDK_CALTYPE_ILRC, ILRCR_ADDR, frequency, millivolt) 45 | #endif 46 | 47 | #define EASY_PDK_CALIBRATE_BG() \ 48 | EASY_PDK_CALIBRATE_BG_M(BGTR_ADDR, GPCC_ADDR, GPCS_ADDR) 49 | 50 | #define EASY_PDK_CALIBRATE_RC_M(type,reg,frequency,millivolt) \ 51 | __asm__( \ 52 | "and a, #'R' \n"\ 53 | "and a, #'C' \n"\ 54 | "and a, #("_STR(type)") \n"\ 55 | "and a, #(("_STR(frequency)")) \n"\ 56 | "and a, #(("_STR(frequency)")>>8) \n"\ 57 | "and a, #(("_STR(frequency)")>>16) \n"\ 58 | "and a, #(("_STR(frequency)")>>24) \n"\ 59 | "and a, #(("_STR(millivolt)")) \n"\ 60 | "and a, #(("_STR(millivolt)")>>8) \n"\ 61 | "and a, #("_STR(reg)") \n"\ 62 | ) 63 | 64 | #define EASY_PDK_CALIBRATE_BG_M(bgtr,gpcc,gpcs) \ 65 | __asm__( \ 66 | "and a, #'B' \n"\ 67 | "and a, #'G' \n"\ 68 | "and a, #(3) \n"\ 69 | "and a, #(3950) \n"\ 70 | "and a, #(3950>>8) \n"\ 71 | "and a, #("_STR(bgtr)") \n"\ 72 | "and a, #("_STR(gpcc)") \n"\ 73 | "and a, #("_STR(gpcs)") \n"\ 74 | "and a, #0 \n"\ 75 | "and a, #0 \n"\ 76 | "and a, #0 \n"\ 77 | "and a, #0 \n"\ 78 | "and a, #0 \n"\ 79 | "and a, #0 \n"\ 80 | ) 81 | 82 | #endif //__EASY_PDK_CALIBRATE_H__ 83 | -------------------------------------------------------------------------------- /include/easy-pdk/serial_num.h: -------------------------------------------------------------------------------- 1 | /* 2 | serial_num.h: Macros to allow Easy PDK Programmer to insert serial numbers without re-compilation. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __EASY_PDK_SERIAL_NUM_H__ 28 | #define __EASY_PDK_SERIAL_NUM_H__ 29 | 30 | // Placeholder for serial number inserted by easypdkprog 31 | #define EASY_PDK_SERIAL_NUM(sname) static const uint8_t sname[8] = {'F','P','S','E','R','I','A','L'} 32 | 33 | #endif //__EASY_PDK_SERIAL_NUM_H__ 34 | -------------------------------------------------------------------------------- /include/pdk/README.md: -------------------------------------------------------------------------------- 1 | This contains a local copy of the 'pdk-includes' repository: 2 | https://github.com/free-pdk/pdk-includes 3 | -------------------------------------------------------------------------------- /include/pdk/delay.h: -------------------------------------------------------------------------------- 1 | #ifndef __DELAY_H__ 2 | #define __DELAY_H__ 3 | 4 | #if !defined(F_CPU) 5 | #error "F_CPU is not defined!" 6 | #endif 7 | 8 | #include 9 | 10 | #if !defined(MAX) 11 | #define MAX(a,b) ((a)>(b)?(a):(b)) 12 | #endif 13 | 14 | #define NS_TO_CYCLES(ns) ((ns)/(1000000000L/F_CPU)) 15 | #define US_TO_CYCLES(us) (NS_TO_CYCLES(us*1000L)) 16 | #define MS_TO_CYCLES(ms) (NS_TO_CYCLES(ms*1000000L)) 17 | 18 | #define LOOP_CTR(cycles,ovh,lp) (MAX(0,(cycles-ovh-lp)/lp)+1) 19 | #define LOOP_CTR_8(cycles) LOOP_CTR(cycles,7,3) 20 | #define LOOP_CTR_16(cycles) LOOP_CTR(cycles,9,8) 21 | #define LOOP_CTR_32(cycles) LOOP_CTR(cycles,13,12) 22 | 23 | #define _delay_us(us) \ 24 | (LOOP_CTR_8(US_TO_CYCLES(us)) < 256L) ? \ 25 | _delay_loop_8((uint8_t)LOOP_CTR_8(US_TO_CYCLES(us))) : \ 26 | _delay_loop_16((uint16_t)LOOP_CTR_16(US_TO_CYCLES(us))) 27 | 28 | #define _delay_ms(ms) \ 29 | (LOOP_CTR_16(MS_TO_CYCLES(ms)) < 65536L) ? \ 30 | _delay_loop_16((uint16_t)LOOP_CTR_16(MS_TO_CYCLES(ms))) : \ 31 | _delay_loop_32((uint32_t)LOOP_CTR_32(MS_TO_CYCLES(ms))) 32 | 33 | // 3 cycles per loop, 7 cycles overhead 34 | void _delay_loop_8(uint8_t loop_ctr) { 35 | loop_ctr; // Ignore unreferenced function argument warning 36 | __asm 37 | // mov a, #(loop_ctr) ; 1 cycle 38 | // mov __delay_loop_8_PARM_1, a ; 1 cycle 39 | // call __delay_loop_8 ; 2 cycles 40 | 00001$: ; 4 cycles per loop 41 | dzsn __delay_loop_8_PARM_1 ; 1 cycle + 1 cycle for final skip 42 | goto 00001$ ; 2 cycles 43 | // ret ; 2 cycles 44 | __endasm; 45 | } 46 | 47 | // 8 cycles per loop, 9 cycles overhead 48 | void _delay_loop_16(uint16_t loop_ctr) { 49 | loop_ctr; // Ignore unreferenced function argument warning 50 | __asm 51 | // mov a, #(loop_ctr) ; 1 cycle 52 | // mov __delay_loop_16_PARM_1+0, a ; 1 cycle 53 | // mov a, #(loop_ctr<<8) ; 1 cycle 54 | // mov __delay_loop_16_PARM_1+1, a ; 1 cycle 55 | // call __delay_loop_16 ; 2 cycles 56 | 00001$: ; 8 cycles per loop 57 | nop ; 1 cycle 58 | dec __delay_loop_16_PARM_1+0 ; 1 cycle 59 | subc __delay_loop_16_PARM_1+1 ; 1 cycle 60 | mov a, __delay_loop_16_PARM_1+0 ; 1 cycle 61 | or a, __delay_loop_16_PARM_1+1 ; 1 cycle 62 | t1sn f, z ; 1 cycle + 1 cycle for final skip 63 | goto 00001$ ; 2 cycles 64 | // ret ; 2 cycles 65 | __endasm; 66 | } 67 | 68 | // 12 cycles per loop, 13 cycles overhead 69 | void _delay_loop_32(uint32_t loop_ctr) { 70 | loop_ctr; // Ignore unreferenced function argument warning 71 | __asm 72 | // mov a, #(loop_ctr) ; 1 cycle 73 | // mov __delay_loop_32_PARM_1+0, a ; 1 cycle 74 | // mov a, #(loop_ctr<<8) ; 1 cycle 75 | // mov __delay_loop_32_PARM_1+1, a ; 1 cycle 76 | // mov a, #(loop_ctr<<16) ; 1 cycle 77 | // mov __delay_loop_32_PARM_1+1, a ; 1 cycle 78 | // mov a, #(loop_ctr<<24) ; 1 cycle 79 | // mov __delay_loop_32_PARM_1+1, a ; 1 cycle 80 | // call __delay_loop_32 ; 2 cycles 81 | 00001$: ; 12 cycles per loop 82 | nop ; 1 cycle 83 | dec __delay_loop_32_PARM_1+0 ; 1 cycle 84 | subc __delay_loop_32_PARM_1+1 ; 1 cycle 85 | subc __delay_loop_32_PARM_1+2 ; 1 cycle 86 | subc __delay_loop_32_PARM_1+3 ; 1 cycle 87 | mov a, __delay_loop_32_PARM_1+0 ; 1 cycle 88 | or a, __delay_loop_32_PARM_1+1 ; 1 cycle 89 | or a, __delay_loop_32_PARM_1+2 ; 1 cycle 90 | or a, __delay_loop_32_PARM_1+3 ; 1 cycle 91 | t1sn f, z ; 1 cycle + 1 cycle for final skip 92 | goto 00001$ ; 2 cycles 93 | // ret ; 2 cycles 94 | __endasm; 95 | } 96 | 97 | #endif //__DELAY_H__ 98 | -------------------------------------------------------------------------------- /include/pdk/device.h: -------------------------------------------------------------------------------- 1 | /* 2 | device.h: Factory to pull in appropriate device/xxx.h (and other common) include files. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_H__ 28 | #define __PDK_DEVICE_H__ 29 | 30 | #if defined(PFS154) 31 | #include "device/pfs154.h" 32 | #elif defined(PFS172) 33 | #include "device/pfs172.h" 34 | #elif defined(PFS173) 35 | #include "device/pfs173.h" 36 | #elif defined(PMS131) 37 | #include "device/pms131.h" 38 | #elif defined(PMS150C) 39 | #include "device/pms150c.h" 40 | #elif defined(PMS15A) 41 | #include "device/pms150c.h" 42 | #elif defined(PMS152) 43 | #include "device/pms152.h" 44 | #elif defined(PMS154B) 45 | #include "device/pms154b.h" 46 | #elif defined(PMS154C) 47 | #include "device/pms154c.h" 48 | #elif defined(PMS171B) 49 | #include "device/pms171b.h" 50 | #else 51 | #error "Unknown device. Please define device!" 52 | #endif 53 | 54 | #include "util.h" 55 | #include "fuse.h" 56 | #include "factory_calibration.h" 57 | #include "sysclock.h" 58 | 59 | #endif //__PDK_DEVICE_H__ 60 | -------------------------------------------------------------------------------- /include/pdk/device/periph/accumulator.h: -------------------------------------------------------------------------------- 1 | /* 2 | accumulator.h: Definitions for the Accumulator related register (FLAG) used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_ACCUMULATOR_H__ 28 | #define __PDK_DEVICE_PERIPH_ACCUMULATOR_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/accumulator.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(FLAG_ADDR) _flag; 36 | 37 | #define FLAG _flag 38 | 39 | // FLAG (ACC Status Flag) register definitions 40 | #define FLAG_Z_BIT 0 41 | #define FLAG_C_BIT 1 42 | #define FLAG_AC_BIT 2 43 | #define FLAG_OV_BIT 3 44 | 45 | #define FLAG_Z (1 << FLAG_Z_BIT) 46 | #define FLAG_C (1 << FLAG_C_BIT) 47 | #define FLAG_AC (1 << FLAG_AC_BIT) 48 | #define FLAG_OV (1 << FLAG_OV_BIT) 49 | 50 | #endif //__PDK_DEVICE_PERIPH_ACCUMULATOR_H__ 51 | -------------------------------------------------------------------------------- /include/pdk/device/periph/adc.h: -------------------------------------------------------------------------------- 1 | /* 2 | adc.h: Definitions for the ADC related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_ADC_H__ 28 | #define __PDK_DEVICE_PERIPH_ADC_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/adc.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(ADCC_ADDR) _adcc; 36 | __sfr __at(ADCM_ADDR) _adcm; 37 | 38 | #define ADCC _adcc 39 | #define ADCM _adcm 40 | 41 | #if defined(__PDK_HAS_ADC_12BIT) 42 | __sfr __at(ADCRH_ADDR) _adcrh; 43 | __sfr __at(ADCRL_ADDR) _adcrl; 44 | #define ADCRH _adcrh 45 | #define ADCRL _adcrl 46 | #else 47 | __sfr __at(ADCR_ADDR) _adcr; 48 | #define ADCR _adcr 49 | #endif 50 | 51 | #if defined(ADCRGC_ADDR) 52 | __sfr __at(ADCRGC_ADDR) _adcrgc; 53 | #define ADCRGC _adcrgc 54 | #endif 55 | 56 | // ADCC (ADC Control) register definitions 57 | #define ADCC_CHANNEL_SEL_BIT0 2 58 | #define ADCC_PROCESS_CONTROL_BIT 6 59 | #define ADCC_ENABLE_BIT 7 60 | 61 | #define ADCC_CH_AD0_PB0 0x00 62 | #define ADCC_CH_AD1_PB1 (1 << ADCC_CHANNEL_SEL_BIT0) 63 | #define ADCC_CH_AD2_PB2 (2 << ADCC_CHANNEL_SEL_BIT0) 64 | #define ADCC_CH_AD3_PB3 (3 << ADCC_CHANNEL_SEL_BIT0) 65 | #define ADCC_CH_AD4_PB4 (4 << ADCC_CHANNEL_SEL_BIT0) 66 | #define ADCC_CH_AD5_PB5 (5 << ADCC_CHANNEL_SEL_BIT0) 67 | #define ADCC_CH_AD6_PB6 (6 << ADCC_CHANNEL_SEL_BIT0) 68 | #define ADCC_CH_AD7_PB7 (7 << ADCC_CHANNEL_SEL_BIT0) 69 | #define ADCC_CH_AD8_PA3 (8 << ADCC_CHANNEL_SEL_BIT0) 70 | #define ADCC_CH_AD9_PA4 (9 << ADCC_CHANNEL_SEL_BIT0) 71 | #define ADCC_CH_AD10_PA0 (10 << ADCC_CHANNEL_SEL_BIT0) 72 | #if defined(__PDK_HAS_PORTC) 73 | #define ADCC_CH_AD11_PC1 (11 << ADCC_CHANNEL_SEL_BIT0) 74 | #define ADCC_CH_AD12_PC2 (12 << ADCC_CHANNEL_SEL_BIT0) 75 | #endif 76 | #define ADCC_CH_AD16_BANDGAP (15 << ADCC_CHANNEL_SEL_BIT0) 77 | 78 | #define ADCC_START_ADC_CONV (1 << ADCC_PROCESS_CONTROL_BIT) 79 | #define ADCC_IS_ADC_CONV_READY (1 << ADCC_PROCESS_CONTROL_BIT) 80 | 81 | #define ADCC_ADC_ENABLE (1 << ADCC_ENABLE_BIT) 82 | 83 | 84 | // ADCM (ADC Mode) register definitions 85 | #define ADCM_CLK_SRC_BIT0 1 86 | 87 | #define ADCM_CLK_SYSCLK 0x00 88 | #define ADCM_CLK_SYSCLK_DIV2 (1 << ADCM_CLK_SRC_BIT0) 89 | #define ADCM_CLK_SYSCLK_DIV4 (2 << ADCM_CLK_SRC_BIT0) 90 | #define ADCM_CLK_SYSCLK_DIV8 (3 << ADCM_CLK_SRC_BIT0) 91 | #define ADCM_CLK_SYSCLK_DIV16 (4 << ADCM_CLK_SRC_BIT0) 92 | #define ADCM_CLK_SYSCLK_DIV32 (5 << ADCM_CLK_SRC_BIT0) 93 | #define ADCM_CLK_SYSCLK_DIV64 (6 << ADCM_CLK_SRC_BIT0) 94 | #define ADCM_CLK_SYSCLK_DIV128 (7 << ADCM_CLK_SRC_BIT0) 95 | 96 | #if defined(__PDK_HAS_ADC_12BIT) 97 | #define ADCM_BIT_RES_BIT0 5 98 | #define ADCM_8BIT_RES 0x00 99 | #define ADCM_9BIT_RES (1 << ADCM_BIT_RES_BIT0) 100 | #define ADCM_10BIT_RES (2 << ADCM_BIT_RES_BIT0) 101 | #define ADCM_11BIT_RES (3 << ADCM_BIT_RES_BIT0) 102 | #define ADCM_12BIT_RES (4 << ADCM_BIT_RES_BIT0) 103 | #endif 104 | 105 | // ADCRGC (ADC Regulator Control) register definitions 106 | #if defined(ADCRGC_ADDR) 107 | // Might need to change the definition this one uses depending on similarity/difference to other devices 108 | #if defined(__PDK_HAS_ADC_12BIT) 109 | #define ADCRGC_AD16_SEL_BIT 4 110 | #define ADCRGC_ADC_REF_BIT0 5 111 | 112 | #define ADCRGC_AD16_BANDGAP 0x00 113 | #define ADCRGC_AD16_QTR_VDD (1 << ADCRGC_AD16_SEL_BIT) 114 | 115 | #define ADCRGC_ADC_REF_VDD 0x00 116 | #define ADCRGC_ADC_REF_2V (1 << ADCRGC_ADC_REF_BIT0) 117 | #define ADCRGC_ADC_REF_3V (2 << ADCRGC_ADC_REF_BIT0) 118 | #define ADCRGC_ADC_REF_4V (3 << ADCRGC_ADC_REF_BIT0) 119 | #define ADCRGC_ADC_REF_PB1 (4 << ADCRGC_ADC_REF_BIT0) 120 | #define ADCRGC_ADC_REF_BG (5 << ADCRGC_ADC_REF_BIT0) 121 | #else 122 | #define ADCRGC_ADC_REF_BIT 7 123 | 124 | #define ADCRGC_ADC_REF_VDD 0x00 125 | #define ADCRGC_ADC_REF_PB1 (1 << ADCRGC_ADC_REF_BIT) 126 | #endif 127 | #endif 128 | 129 | #endif //__PDK_DEVICE_PERIPH_ADC_H__ 130 | -------------------------------------------------------------------------------- /include/pdk/device/periph/bandgap.h: -------------------------------------------------------------------------------- 1 | /* 2 | bandgap.h: Definitions for the Bandgap register (BGTR) used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_BANDGAP_H__ 28 | #define __PDK_DEVICE_PERIPH_BANDGAP_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/bandgap.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(BGTR_ADDR) _bgtr; 36 | 37 | #define BGTR _bgtr 38 | 39 | #endif //__PDK_DEVICE_PERIPH_BANDGAP_H__ 40 | -------------------------------------------------------------------------------- /include/pdk/device/periph/clock.h: -------------------------------------------------------------------------------- 1 | /* 2 | clock.h: Definitions for the System Clock register (CLKMD) used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_CLOCK_H__ 28 | #define __PDK_DEVICE_PERIPH_CLOCK_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/clock.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(CLKMD_ADDR) _clkmd; 36 | __sfr __at(IHRCR_ADDR) _ihrcr; 37 | 38 | #define CLKMD _clkmd 39 | #define IHRCR _ihrcr 40 | 41 | // PMS131 doesn't seem to have ILRCR for some reason 42 | #if defined(ILRCR_ADDR) 43 | __sfr __at(ILRCR_ADDR) _ilrcr; 44 | #define ILRCR _ilrcr 45 | #endif 46 | 47 | // CLKMD (Clock Mode) register definitions 48 | #define CLKMD_PA5_PRSTB_BIT 0 49 | #define CLKMD_WATCHDOG_ENABLE_BIT 1 50 | #define CLKMD_ILRC_ENABLE_BIT 2 51 | #define CLKMD_CLOCKTYPE_BIT 3 52 | #define CLKMD_IHRC_ENABLE_BIT 4 53 | #define CLKMD_SYSCLK_BIT0 5 54 | 55 | #define CLKMD_ENABLE_PRSTB (1 << CLKMD_PA5_PRSTB_BIT) 56 | #define CLKMD_ENABLE_WATCHDOG (1 << CLKMD_WATCHDOG_ENABLE_BIT) 57 | #define CLKMD_ENABLE_ILRC (1 << CLKMD_ILRC_ENABLE_BIT) 58 | #define CLKMD_ENABLE_IHRC (1 << CLKMD_IHRC_ENABLE_BIT) 59 | 60 | #define CLKMD_MODE0(s) (s << CLKMD_SYSCLK_BIT0) 61 | #define CLKMD_IHRC_DIV4 CLKMD_MODE0(0) 62 | #define CLKMD_IHRC_DIV2 CLKMD_MODE0(1) 63 | #define CLKMD_IHRC CLKMD_MODE0(2) 64 | #if defined(__PDK_HAS_EOSC) 65 | #define CLKMD_EOSC_DIV4 CLKMD_MODE0(3) 66 | #define CLKMD_EOSC_DIV2 CLKMD_MODE0(4) 67 | #define CLKMD_EOSC CLKMD_MODE0(5) 68 | #endif 69 | #define CLKMD_ILRC_DIV4 CLKMD_MODE0(6) 70 | #define CLKMD_ILRC CLKMD_MODE0(7) 71 | 72 | #define CLKMD_MODE1(s) ((s << CLKMD_SYSCLK_BIT0) | (1 << CLKMD_CLOCKTYPE_BIT)) 73 | #define CLKMD_IHRC_DIV16 CLKMD_MODE1(0) 74 | #define CLKMD_IHRC_DIV8 CLKMD_MODE1(1) 75 | #define CLKMD_ILRC_DIV16 CLKMD_MODE1(2) 76 | #define CLKMD_IHRC_DIV32 CLKMD_MODE1(3) 77 | #define CLKMD_IHRC_DIV64 CLKMD_MODE1(4) 78 | #if defined(__PDK_HAS_EOSC) 79 | #define CLKMD_EOSC_DIV8 CLKMD_MODE1(5) 80 | #endif 81 | //0x06 reserved 82 | //0x07 reserved 83 | 84 | #endif //__PDK_DEVICE_PERIPH_CLOCK_H__ 85 | -------------------------------------------------------------------------------- /include/pdk/device/periph/comparator.h: -------------------------------------------------------------------------------- 1 | /* 2 | comparator.h: Definitions for the Comparator related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_COMPARATOR_H__ 28 | #define __PDK_DEVICE_PERIPH_COMPARATOR_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/comparator.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(GPCC_ADDR) _gpcc; 36 | __sfr __at(GPCS_ADDR) _gpcs; 37 | 38 | #define GPCC _gpcc 39 | #define GPCS _gpcs 40 | 41 | // GPCC (Comparator Control) register definitions 42 | #define GPCC_COMP_PLUS_BIT 0 43 | #define GPCC_COMP_MINUS_BIT0 1 44 | #define GPCC_COMP_INVERT_OUT_BIT 4 45 | #define GPCC_COMP_OUT_TO_TM2CLK_BIT 5 46 | #define GPCC_COMP_RESULT_BIT 6 47 | #define GPCC_COMP_ENABLE_BIT 7 48 | 49 | #define GPCC_COMP_PLUS_VINT_R 0x00 50 | #define GPCC_COMP_PLUS_PA4 (1 << GPCC_COMP_PLUS_BIT) 51 | 52 | #define GPCC_COMP_MINUS_PA3 0x00 53 | #define GPCC_COMP_MINUS_PA4 (1 << GPCC_COMP_MINUS_BIT0) 54 | #define GPCC_COMP_MINUS_BANDGAP_1V2 (2 << GPCC_COMP_MINUS_BIT0) 55 | #define GPCC_COMP_MINUS_VINT_R (3 << GPCC_COMP_MINUS_BIT0) 56 | #if defined(__PDK_HAS_PORTB) 57 | #define GPCC_COMP_MINUS_PB6 (4 << GPCC_COMP_MINUS_BIT0) 58 | #define GPCC_COMP_MINUS_PB7 (5 << GPCC_COMP_MINUS_BIT0) 59 | #else 60 | #define GPCC_COMP_MINUS_PA6 (4 << GPCC_COMP_MINUS_BIT0) 61 | #define GPCC_COMP_MINUS_PA7 (5 << GPCC_COMP_MINUS_BIT0) 62 | #endif 63 | 64 | #define GPCC_COMP_OUT_INVERT (1 << GPCC_COMP_INVERT_OUT_BIT) 65 | #define GPCC_COMP_OUT_TO_TM2CLK (1 << GPCC_COMP_OUT_TO_TM2CLK_BIT) 66 | 67 | #define GPCC_COMP_RESULT_NEGATIVE 0x00 68 | #define GPCC_COMP_RESULT_POSITIVE (1 << GPCC_COMP_RESULT_BIT) 69 | 70 | #define GPCC_COMP_ENABLE (1 << GPCC_COMP_ENABLE_BIT) 71 | 72 | // GPCS (Comparator Selection) register definitions 73 | #define GPCS_COMP_VOLTAGE_LVL_BIT0 0 74 | #define GPCS_COMP_RANGE_SEL_BIT0 4 75 | #define GPCS_COMP_OUT_PA0_BIT 7 76 | 77 | #define GPCS_COMP_RANGE1 0x00 78 | #define GPCS_COMP_RANGE2 (1 << GPCS_COMP_RANGE_SEL_BIT0) 79 | #define GPCS_COMP_RANGE3 (2 << GPCS_COMP_RANGE_SEL_BIT0) 80 | #define GPCS_COMP_RANGE4 (3 << GPCS_COMP_RANGE_SEL_BIT0) 81 | 82 | #define GPCS_COMP_OUTPUT_PA0 (1 << GPCS_COMP_OUT_PA0_BIT) 83 | 84 | #if defined(__PDK_HAS_COMP_WAKEUP) 85 | #define GPCS_COMP_WAKEUP_ENABLE_BIT 6 86 | #define GPCS_COMP_WAKEUP_ENABLE (1 << GPCS_COMP_WAKEUP_ENABLE_BIT) 87 | #endif 88 | 89 | #endif //__PDK_DEVICE_PERIPH_COMPARATOR_H__ 90 | -------------------------------------------------------------------------------- /include/pdk/device/periph/external_oscillator.h: -------------------------------------------------------------------------------- 1 | /* 2 | external_oscillator.h: Definitions for the External Oscillator related register used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_EXTERNAL_OSCILLATOR_H__ 28 | #define __PDK_DEVICE_PERIPH_EXTERNAL_OSCILLATOR_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/exernal_oscillator.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(EOSCR_ADDR) _eoscr; 36 | #define EOSCR _eoscr 37 | 38 | // EOSC (External Oscillator Setting) register definitions 39 | #define EOSC_BG_LVR_SHUTDOWN_BIT 0 40 | #if defined(__PDK_HAS_EOSC) 41 | #define EOSC_CRYSTAL_SEL_BIT0 5 42 | #define EOSC_ENABLE_BIT 7 43 | #endif 44 | 45 | #define EOSC_BG_LVR_SHUTDOWN (1 << EOSC_BG_LVR_SHUTDOWN_BIT) 46 | #if defined(__PDK_HAS_EOSC) 47 | #define EOSC_32KHZ_CRYSTAL (1 << EOSC_CRYSTAL_SEL_BIT0) 48 | #define EOSC_1MHZ_CRYSTAL (2 << EOSC_CRYSTAL_SEL_BIT0) 49 | #define EOSC_4MHZ_CRYSTAL (3 << EOSC_CRYSTAL_SEL_BIT0) 50 | #define EOSC_ENABLE (1 << EOSC_BG_LVR_SHUTDOWN_BIT) 51 | #endif 52 | 53 | #endif //__PDK_DEVICE_PERIPH_EXTERNAL_OSCILLATOR_H__ 54 | -------------------------------------------------------------------------------- /include/pdk/device/periph/interrupt.h: -------------------------------------------------------------------------------- 1 | /* 2 | interrupt.h: Definitions for the Interrupt related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_INTERRUPT_H__ 28 | #define __PDK_DEVICE_PERIPH_INTERRUPT_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/deviceo.h" instead of "pdk/device/periph/interrupt.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(INTEN_ADDR) _inten; 36 | __sfr __at(INTRQ_ADDR) _intrq; 37 | __sfr __at(INTEGS_ADDR) _integs; 38 | 39 | #define INTEN _inten 40 | #define INTRQ _intrq 41 | #define INTEGS _integs 42 | 43 | 44 | // INTEN (Interrupt Enable) register definitions 45 | #define INTEN_PA0_ENABLE_BIT 0 46 | #define INTEN_T16_ENABLE_BIT 2 47 | #define INTEN_TM2_ENABLE_BIT 6 48 | 49 | #define INTEN_PA0 (1 << INTEN_PA0_ENABLE_BIT) 50 | #define INTEN_T16 (1 << INTEN_T16_ENABLE_BIT) 51 | #define INTEN_TM2 (1 << INTEN_TM2_ENABLE_BIT) 52 | 53 | #if defined(__PDK_HAS_PORTB) 54 | #define INTEN_PB0_ENABLE_BIT 1 55 | #define INTEN_PB0 (1 << INTEN_PB0_ENABLE_BIT) 56 | #endif 57 | #if defined(__PDK_HAS_PB5_PA4_INT) 58 | #define INTEN_PB5_ENABLE_BIT 0 59 | #define INTEN_PA4_ENABLE_BIT 1 60 | 61 | #define INTEN_PB5 (1 << INTEN_PB5_ENABLE_BIT) 62 | #define INTEN_PA4 (1 << INTEN_PA4_ENABLE_BIT) 63 | #endif 64 | #if defined(__PDK_HAS_ADC) 65 | #define INTEN_ADC_ENABLE_BIT 3 66 | #define INTEN_ADC (1 << INTEN_ADC_ENABLE_BIT) 67 | #endif 68 | #if defined(__PDK_HAS_COMP) 69 | #define INTEN_COMP_ENABLE_BIT 4 70 | #define INTEN_COMP (1 << INTEN_COMP_ENABLE_BIT) 71 | #endif 72 | #if defined(__PDK_HAS_PWMG) 73 | #define INTEN_PWMG_ENABLE_BIT 5 74 | #define INTEN_PWMG (1 << INTEN_PWMG_ENABLE_BIT) 75 | #endif 76 | #if defined(__PDK_HAS_TM3) 77 | #define INTEN_TM3_ENABLE_BIT 7 78 | #define INTEN_TM3 (1 << INTEN_TM3_ENABLE_BIT) 79 | #endif 80 | 81 | // INTRQ (Interrupt Request) register definitions 82 | #define INTRQ_PA0_BIT 0 83 | #define INTRQ_T16_BIT 2 84 | #define INTRQ_TM2_BIT 6 85 | 86 | #define INTRQ_PA0 (1 << INTRQ_PA0_BIT) 87 | #define INTRQ_T16 (1 << INTRQ_T16_BIT) 88 | #define INTRQ_TM2 (1 << INTRQ_TM2_BIT) 89 | 90 | #if defined(__PDK_HAS_PORTB) 91 | #define INTRQ_PB0_BIT 1 92 | #define INTRQ_PB0 (1 << INTRQ_PB0_BIT) 93 | #endif 94 | #if defined(__PDK_HAS_PB5_PA4_INT) 95 | #define INTRQ_PB5_BIT 0 96 | #define INTRQ_PA4_BIT 1 97 | 98 | #define INTRQ_PB5 (1 << INTRQ_PB5_BIT) 99 | #define INTRQ_PA4 (1 << INTRQ_PA4_BIT) 100 | #endif 101 | #if defined(__PDK_HAS_ADC) 102 | #define INTRQ_ADC_BIT 3 103 | #define INTRQ_ADC (1 << INTRQ_ADC_BIT) 104 | #endif 105 | #if defined(__PDK_HAS_COMP) 106 | #define INTRQ_COMP_BIT 4 107 | #define INTRQ_COMP (1 << INTRQ_COMP_BIT) 108 | #endif 109 | #if defined(__PDK_HAS_PWMG) 110 | #define INTRQ_PWMG_BIT 5 111 | #define INTRQ_PWMG (1 << INTRQ_PWMG_BIT) 112 | #endif 113 | #if defined(__PDK_HAS_TM3) 114 | #define INTRQ_TM3_BIT 7 115 | #define INTRQ_TM3 (1 << INTRQ_TM3_BIT) 116 | #endif 117 | 118 | // INTEGS (Interrupt Edge Select) register definitions 119 | #define INTEGS_PA0_EDGE_SEL_BIT0 0 120 | #define INTEGS_T16_EDGE_SEL_BIT 4 121 | 122 | #define INTEGS_PA0_BOTH 0x00 123 | #define INTEGS_PA0_RISING (1 << INTEGS_PA0_EDGE_SEL_BIT0) 124 | #define INTEGS_PA0_FALLING (2 << INTEGS_PA0_EDGE_SEL_BIT0) 125 | 126 | #define INTEGS_T16_RISING 0x00 127 | #define INTEGS_T16_FALLING (1 << INTEGS_T16_EDGE_SEL_BIT) 128 | 129 | #if defined(__PDK_HAS_PORTB) 130 | #define INTEGS_PB0_EDGE_SEL_BIT0 2 131 | #define INTEGS_PB0_BOTH 0x00 132 | #define INTEGS_PB0_RISING (1 << INTEGS_PB0_EDGE_SEL_BIT0) 133 | #define INTEGS_PB0_FALLING (2 << INTEGS_PB0_EDGE_SEL_BIT0) 134 | #endif 135 | #if defined(__PDK_HAS_PB5_PA4_INT) 136 | #define INTEGS_PB5_EDGE_SEL_BIT0 0 137 | #define INTEGS_PA4_EDGE_SEL_BIT0 2 138 | 139 | #define INTEGS_PB5_BOTH 0x00 140 | #define INTEGS_PB5_RISING (1 << INTEGS_PB5_EDGE_SEL_BIT0) 141 | #define INTEGS_PB5_FALLING (2 << INTEGS_PB5_EDGE_SEL_BIT0) 142 | #define INTEGS_PA4_BOTH 0x00 143 | #define INTEGS_PA4_RISING (1 << INTEGS_PA4_EDGE_SEL_BIT0) 144 | #define INTEGS_PA4_FALLING (2 << INTEGS_PA4_EDGE_SEL_BIT0) 145 | #endif 146 | #if defined(__PDK_HAS_COMP_INT_EDGE) 147 | #define INTEGS_COMP_EDGE_SEL_BIT0 6 148 | #define INTEGS_COMP_BOTH 0x00 149 | #define INTEGS_COMP_RISING (1 << INTEGS_COMP_EDGE_SEL_BIT0) 150 | #define INTEGS_COMP_FALLING (2 << INTEGS_COMP_EDGE_SEL_BIT0) 151 | #endif 152 | 153 | #endif //__PDK_DEVICE_PERIPH_INTERRUPT_H__ 154 | -------------------------------------------------------------------------------- /include/pdk/device/periph/misc.h: -------------------------------------------------------------------------------- 1 | /* 2 | misc.h: Definitions for the MISC register used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_MISC_H__ 28 | #define __PDK_DEVICE_PERIPH_MISC_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/misc.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(MISC_ADDR) _misc; 36 | 37 | #define MISC _misc 38 | 39 | // MISC register definitions 40 | #define MISC_WATCHDOG_BIT0 0 41 | #define MISC_LVR_DISABLE_BIT 2 42 | #define MISC_FAST_WAKEUP_ENABLE_BIT 5 43 | 44 | #define MISC_WATCHDOG_8K_ILRC 0x00 45 | #define MISC_WATCHDOG_16K_ILRC (1 << MISC_WATCHDOG_BIT0) 46 | #define MISC_WATCHDOG_64K_ILRC (2 << MISC_WATCHDOG_BIT0) 47 | #define MISC_WATCHDOG_256K_ILRC (3 << MISC_WATCHDOG_BIT0) 48 | 49 | #define MISC_LVR_ENABLE 0x00 50 | #define MISC_LVR_DISABLE (1 << MISC_LVR_DISABLE_BIT) 51 | 52 | #define MISC_FAST_WAKEUP_DISABLE 0x00 53 | #define MISC_FAST_WAKEUP_ENABLE (1 << MISC_FAST_WAKEUP_ENABLE_BIT) 54 | 55 | #if defined(__PDK_HAS_LCD) 56 | #define MISC_LCD_ENABLE_BIT 4 57 | #define MISC_LCD_DISABLE 0x00 58 | #define MISC_LCD_ENABLE (1 << MISC_LCD_ENABLE_BIT) 59 | #endif 60 | 61 | #endif //__PDK_DEVICE_PERIPH_MISC_H__ 62 | -------------------------------------------------------------------------------- /include/pdk/device/periph/misc2.h: -------------------------------------------------------------------------------- 1 | /* 2 | misc2.h: Definitions for the MISC2 register used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_MISC2_H__ 28 | #define __PDK_DEVICE_PERIPH_MISC2_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/misc2.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(MISC2_ADDR) _misc2; 36 | 37 | #define MISC2 _misc2 38 | 39 | // MISC2 register definitions 40 | #define MISC2_COMP_EDGE_SEL_BIT0 5 41 | 42 | #define MISC2_COMP_EDGE_INT_BOTH 0x00 43 | #define MISC2_COMP_EDGE_INT_RISE (1 << MISC2_COMP_EDGE_SEL_BIT0) 44 | #define MISC2_COMP_EDGE_INT_FALL (2 << MISC2_COMP_EDGE_SEL_BIT0) 45 | 46 | #endif //__PDK_DEVICE_PERIPH_MISC2_H__ 47 | -------------------------------------------------------------------------------- /include/pdk/device/periph/misclvr.h: -------------------------------------------------------------------------------- 1 | /* 2 | misclvr.h: Definitions for the MISCLVR register used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_MISCLVR_H__ 28 | #define __PDK_DEVICE_PERIPH_MISCLVR_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/misclvr.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(MISCLVR_ADDR) _misclvr; 36 | 37 | #define MISCLVR _misclvr 38 | 39 | // MISCLVR register definitions 40 | #define MISCLVR_BANDGAP_DIV_BIT0 0 41 | #define MISCLVR_LVR_BIT0 4 42 | 43 | #define MISCLVR_BANDGAP_ON 0x00 44 | #define MISCLVR_BANDGAP_DIV4 (1 << MISCLVR_BANDGAP_DIV_BIT0) 45 | #define MISCLVR_BANDGAP_DIV32 (2 << MISCLVR_BANDGAP_DIV_BIT0) 46 | #define MISCLVR_BANDGAP_AUTO (3 << MISCLVR_BANDGAP_DIV_BIT0) 47 | 48 | #define MISCLVR_1V8 0x00 49 | #define MISCLVR_1V9 (1 << MISCLVR_LVR_BIT0) 50 | #define MISCLVR_2V (2 << MISCLVR_LVR_BIT0) 51 | #define MISCLVR_2V1 (3 << MISCLVR_LVR_BIT0) 52 | #define MISCLVR_2V2 (4 << MISCLVR_LVR_BIT0) 53 | #define MISCLVR_2V3 (5 << MISCLVR_LVR_BIT0) 54 | #define MISCLVR_2V4 (6 << MISCLVR_LVR_BIT0) 55 | #define MISCLVR_2V5 (7 << MISCLVR_LVR_BIT0) 56 | #define MISCLVR_2V7 (8 << MISCLVR_LVR_BIT0) 57 | #define MISCLVR_3V (9 << MISCLVR_LVR_BIT0) 58 | #define MISCLVR_3V15 (10 << MISCLVR_LVR_BIT0) 59 | #define MISCLVR_3V3 (11 << MISCLVR_LVR_BIT0) 60 | #define MISCLVR_3V5 (12 << MISCLVR_LVR_BIT0) 61 | #define MISCLVR_3V75 (13 << MISCLVR_LVR_BIT0) 62 | #define MISCLVR_4V (14 << MISCLVR_LVR_BIT0) 63 | #define MISCLVR_4V5 (15 << MISCLVR_LVR_BIT0) 64 | 65 | #endif //__PDK_DEVICE_PERIPH_MISCLVR_H__ 66 | -------------------------------------------------------------------------------- /include/pdk/device/periph/misclvr_basic.h: -------------------------------------------------------------------------------- 1 | /* 2 | misclvr_basic.h: Definitions for the (basic) MISCLVR register used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_MISCLVR_BASIC_H__ 28 | #define __PDK_DEVICE_PERIPH_MISCLVR_BASIC_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/misclvr_basic.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(MISCLVR_ADDR) _misclvr; 36 | 37 | #define MISCLVR _misclvr 38 | 39 | // MISCLVR register definitions 40 | #define MISCLVR_LVR_BIT0 5 41 | 42 | #define MISCLVR_4V 0x00 43 | #define MISCLVR_3V5 (1 << MISCLVR_LVR_BIT0) 44 | #define MISCLVR_3V (2 << MISCLVR_LVR_BIT0) 45 | #define MISCLVR_2V75 (3 << MISCLVR_LVR_BIT0) 46 | #define MISCLVR_2V5 (4 << MISCLVR_LVR_BIT0) 47 | #define MISCLVR_1V8 (5 << MISCLVR_LVR_BIT0) 48 | #define MISCLVR_2V2 (6 << MISCLVR_LVR_BIT0) 49 | #define MISCLVR_2V (7 << MISCLVR_LVR_BIT0) 50 | 51 | #endif //__PDK_DEVICE_PERIPH_MISCLVR_BASIC_H__ 52 | -------------------------------------------------------------------------------- /include/pdk/device/periph/multiplier.h: -------------------------------------------------------------------------------- 1 | /* 2 | multiplier.h: Definitions for the Multiplier related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_MULTIPLIER_H__ 28 | #define __PDK_DEVICE_PERIPH_MULTIPLIER_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/multiplier.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(MULOP_ADDR) _mulop; 36 | __sfr __at(MULRH_ADDR) _mulrh; 37 | 38 | #define MULOP _mulop 39 | #define MULRH _mulrh 40 | 41 | #endif //__PDK_DEVICE_PERIPH_MULTIPLIER_H__ 42 | -------------------------------------------------------------------------------- /include/pdk/device/periph/port_a.h: -------------------------------------------------------------------------------- 1 | /* 2 | port_a.h: Definitions for the Port A related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PORT_A_H__ 28 | #define __PDK_DEVICE_PERIPH_PORT_A_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/port_a.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PADIER_ADDR) _padier; 36 | __sfr __at(PA_ADDR) _pa; 37 | __sfr __at(PAC_ADDR) _pac; 38 | __sfr __at(PAPH_ADDR) _paph; 39 | 40 | #define PADIER _padier 41 | #define PA _pa 42 | #define PAC _pac 43 | #define PAPH _paph 44 | 45 | #endif //__PDK_DEVICE_PERIPH_PORT_A_H__ 46 | -------------------------------------------------------------------------------- /include/pdk/device/periph/port_b.h: -------------------------------------------------------------------------------- 1 | /* 2 | port_b.h: Definitions for the Port B related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PORT_B_H__ 28 | #define __PDK_DEVICE_PERIPH_PORT_B_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/port_b.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PBDIER_ADDR) _pbdier; 36 | __sfr __at(PB_ADDR) _pb; 37 | __sfr __at(PBC_ADDR) _pbc; 38 | __sfr __at(PBPH_ADDR) _pbph; 39 | 40 | #define PBDIER _pbdier 41 | #define PB _pb 42 | #define PBC _pbc 43 | #define PBPH _pbph 44 | 45 | #if defined(PBPL_ADDR) 46 | __sfr __at(PBPL_ADDR) _pbpl; 47 | #define PBPL _pbpl 48 | #endif 49 | 50 | #endif //__PDK_DEVICE_PERIPH_PORT_B_H__ 51 | -------------------------------------------------------------------------------- /include/pdk/device/periph/port_c.h: -------------------------------------------------------------------------------- 1 | /* 2 | port_c.h: Definitions for the Port C related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PORT_C_H__ 28 | #define __PDK_DEVICE_PERIPH_PORT_C_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/port_c.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PCDIER_ADDR) _pcdier; 36 | __sfr __at(PC_ADDR) _pc; 37 | __sfr __at(PCC_ADDR) _pcc; 38 | __sfr __at(PCPH_ADDR) _pcph; 39 | 40 | #define PCDIER _pcdier 41 | #define PC _pc 42 | #define PCC _pcc 43 | #define PCPH _pcph 44 | 45 | #if defined(PCPL_ADDR) 46 | __sfr __at(PCPL_ADDR) _pcpl; 47 | #define PCPL _pcpl 48 | #endif 49 | 50 | #endif //__PDK_DEVICE_PERIPH_PORT_C_H__ 51 | -------------------------------------------------------------------------------- /include/pdk/device/periph/pwmg_0.h: -------------------------------------------------------------------------------- 1 | /* 2 | pwmg_0.h: Definitions for the PWMG0 related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PWMG_0_H__ 28 | #define __PDK_DEVICE_PERIPH_PWMG_0_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/pwmg_0.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PWMG0C_ADDR) _pwmg0c; 36 | __sfr __at(PWMG0S_ADDR) _pwmg0s; 37 | __sfr __at(PWMG0DTH_ADDR) _pwmg0dth; 38 | __sfr __at(PWMG0DTL_ADDR) _pwmg0dtl; 39 | __sfr __at(PWMG0CUBH_ADDR) _pwmg0cubh; 40 | __sfr __at(PWMG0CUBL_ADDR) _pwmg0cubl; 41 | 42 | #define PWMG0C _pwmg0c 43 | #define PWMG0S _pwmg0s 44 | #define PWMG0DTH _pwmg0dth 45 | #define PWMG0DTL _pwmg0dtl 46 | #define PWMG0CUBH _pwmg0cubh 47 | #define PWMG0CUBL _pwmg0cubl 48 | 49 | // PWMG0C (PWMG0 Control) register definitions 50 | #define PWMG0C_CLK_SRC_BIT 0 51 | #define PWMG0C_OUT_PIN_SEL_BIT0 1 52 | #define PWMG0C_CTR_RST_BIT 4 53 | #define PWMG0C_INVERT_OUT_BIT 5 54 | #define PWMG0C_STATUS_OUT_BIT 6 55 | #define PWMG0C_ENABLE_BIT 7 56 | 57 | #define PWMG0C_CLK_SYSCLK 0x00 58 | #define PWMG0C_CLK_IHRC (1 << PWMG0C_CLK_SRC_BIT) 59 | 60 | #define PWMG0C_OUT_NONE 0x00 61 | #define PWMG0C_OUT_PB5 (1 << PWMG0C_OUT_PIN_SEL_BIT0) 62 | #define PWMG0C_OUT_PA0 (2 << PWMG0C_OUT_PIN_SEL_BIT0) 63 | #define PWMG0C_OUT_PB4 (3 << PWMG0C_OUT_PIN_SEL_BIT0) 64 | 65 | #define PWMG0C_RESET_COUNTER (1 << PWMG0C_CTR_RST_BIT) 66 | #define PWMG0C_INVERT_OUT (1 << PWMG0C_INVERT_OUT_BIT) 67 | #define PWMG0C_STATUS_OUT (1 << PWMG0C_STATUS_OUT_BIT) 68 | #define PWMG0C_ENABLE (1 << PWMG0C_ENABLE_BIT) 69 | 70 | // PWMG0S (PWMG0 Scalar) register definitions 71 | #define PWMG0S_SCALE_BIT0 0 72 | #define PWMG0S_PRESCALE_BIT0 5 73 | #define PWMG0S_INT_MODE_BIT 7 74 | 75 | #define PWMG0S_SCALE_NONE 0x00 76 | #define PWMG0S_SCALE_DIV2 (1 << PWMG0S_SCALE_BIT0) 77 | #define PWMG0S_SCALE_DIV3 (2 << PWMG0S_SCALE_BIT0) 78 | #define PWMG0S_SCALE_DIV4 (3 << PWMG0S_SCALE_BIT0) 79 | #define PWMG0S_SCALE_DIV5 (4 << PWMG0S_SCALE_BIT0) 80 | #define PWMG0S_SCALE_DIV6 (5 << PWMG0S_SCALE_BIT0) 81 | #define PWMG0S_SCALE_DIV7 (6 << PWMG0S_SCALE_BIT0) 82 | #define PWMG0S_SCALE_DIV8 (7 << PWMG0S_SCALE_BIT0) 83 | #define PWMG0S_SCALE_DIV9 (8 << PWMG0S_SCALE_BIT0) 84 | #define PWMG0S_SCALE_DIV10 (9 << PWMG0S_SCALE_BIT0) 85 | #define PWMG0S_SCALE_DIV11 (10 << PWMG0S_SCALE_BIT0) 86 | #define PWMG0S_SCALE_DIV12 (11 << PWMG0S_SCALE_BIT0) 87 | #define PWMG0S_SCALE_DIV13 (12 << PWMG0S_SCALE_BIT0) 88 | #define PWMG0S_SCALE_DIV14 (13 << PWMG0S_SCALE_BIT0) 89 | #define PWMG0S_SCALE_DIV15 (14 << PWMG0S_SCALE_BIT0) 90 | #define PWMG0S_SCALE_DIV16 (15 << PWMG0S_SCALE_BIT0) 91 | #define PWMG0S_SCALE_DIV17 (16 << PWMG0S_SCALE_BIT0) 92 | #define PWMG0S_SCALE_DIV18 (17 << PWMG0S_SCALE_BIT0) 93 | #define PWMG0S_SCALE_DIV19 (18 << PWMG0S_SCALE_BIT0) 94 | #define PWMG0S_SCALE_DIV20 (19 << PWMG0S_SCALE_BIT0) 95 | #define PWMG0S_SCALE_DIV21 (20 << PWMG0S_SCALE_BIT0) 96 | #define PWMG0S_SCALE_DIV22 (21 << PWMG0S_SCALE_BIT0) 97 | #define PWMG0S_SCALE_DIV23 (22 << PWMG0S_SCALE_BIT0) 98 | #define PWMG0S_SCALE_DIV24 (23 << PWMG0S_SCALE_BIT0) 99 | #define PWMG0S_SCALE_DIV25 (24 << PWMG0S_SCALE_BIT0) 100 | #define PWMG0S_SCALE_DIV26 (25 << PWMG0S_SCALE_BIT0) 101 | #define PWMG0S_SCALE_DIV27 (26 << PWMG0S_SCALE_BIT0) 102 | #define PWMG0S_SCALE_DIV28 (27 << PWMG0S_SCALE_BIT0) 103 | #define PWMG0S_SCALE_DIV29 (28 << PWMG0S_SCALE_BIT0) 104 | #define PWMG0S_SCALE_DIV30 (29 << PWMG0S_SCALE_BIT0) 105 | #define PWMG0S_SCALE_DIV31 (30 << PWMG0S_SCALE_BIT0) 106 | #define PWMG0S_SCALE_DIV32 (31 << PWMG0S_SCALE_BIT0) 107 | 108 | #define PWMG0S_PRESCALE_NONE 0x00 109 | #define PWMG0S_PRESCALE_DIV4 (1 << PWMG0S_PRESCALE_BIT0) 110 | #define PWMG0S_PRESCALE_DIV16 (2 << PWMG0S_PRESCALE_BIT0) 111 | #define PWMG0S_PRESCALE_DIV64 (3 << PWMG0S_PRESCALE_BIT0) 112 | 113 | #define PWMG0_INT_AT_DUTY 0x00 114 | #define PWMG0_INT_AT_0 (1 << PWMG0S_INT_MODE_BIT) 115 | 116 | #endif //__PDK_DEVICE_PERIPH_PWMG_0_H__ 117 | -------------------------------------------------------------------------------- /include/pdk/device/periph/pwmg_1.h: -------------------------------------------------------------------------------- 1 | /* 2 | pwmg_1.h: Definitions for the PWMG1 related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PWMG_1_H__ 28 | #define __PDK_DEVICE_PERIPH_PWMG_1_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/pwmg_1.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PWMG1C_ADDR) _pwmg1c; 36 | __sfr __at(PWMG1S_ADDR) _pwmg1s; 37 | __sfr __at(PWMG1DTH_ADDR) _pwmg1dth; 38 | __sfr __at(PWMG1DTL_ADDR) _pwmg1dtl; 39 | __sfr __at(PWMG1CUBH_ADDR) _pwmg1cubh; 40 | __sfr __at(PWMG1CUBL_ADDR) _pwmg1cubl; 41 | 42 | #define PWMG1C _pwmg1c 43 | #define PWMG1S _pwmg1s 44 | #define PWMG1DTH _pwmg1dth 45 | #define PWMG1DTL _pwmg1dtl 46 | #define PWMG1CUBH _pwmg1cubh 47 | #define PWMG1CUBL _pwmg1cubl 48 | 49 | // PWMG1C (PWMG1 Control) register definitions 50 | #define PWMG1C_CLK_SRC_BIT 0 51 | #define PWMG1C_OUT_PIN_SEL_BIT0 1 52 | #define PWMG1C_CTR_RST_BIT 4 53 | #define PWMG1C_INVERT_OUT_BIT 5 54 | #define PWMG1C_STATUS_OUT_BIT 6 55 | #define PWMG1C_ENABLE_BIT 7 56 | 57 | #define PWMG1C_CLK_SYSCLK 0x00 58 | #define PWMG1C_CLK_IHRC (1 << PWMG1C_CLK_SRC_BIT) 59 | 60 | #define PWMG1C_OUT_NONE 0x00 61 | #define PWMG1C_OUT_PB6 (1 << PWMG1C_OUT_PIN_SEL_BIT0) 62 | #define PWMG1C_OUT_PA4 (2 << PWMG1C_OUT_PIN_SEL_BIT0) 63 | #define PWMG1C_OUT_PB7 (3 << PWMG1C_OUT_PIN_SEL_BIT0) 64 | 65 | #define PWMG1C_RESET_COUNTER (1 << PWMG1C_CTR_RST_BIT) 66 | #define PWMG1C_INVERT_OUT (1 << PWMG1C_INVERT_OUT_BIT) 67 | #define PWMG1C_STATUS_OUT (1 << PWMG1C_STATUS_OUT_BIT) 68 | #define PWMG1C_ENABLE (1 << PWMG1C_ENABLE_BIT) 69 | 70 | // PWMG1S (PWMG1 Scalar) register definitions 71 | #define PWMG1S_SCALE_BIT0 0 72 | #define PWMG1S_PRESCALE_BIT0 5 73 | #define PWMG1S_INT_MODE_BIT 7 74 | 75 | #define PWMG1S_SCALE_NONE 0x00 76 | #define PWMG1S_SCALE_DIV2 (1 << PWMG1S_SCALE_BIT0) 77 | #define PWMG1S_SCALE_DIV3 (2 << PWMG1S_SCALE_BIT0) 78 | #define PWMG1S_SCALE_DIV4 (3 << PWMG1S_SCALE_BIT0) 79 | #define PWMG1S_SCALE_DIV5 (4 << PWMG1S_SCALE_BIT0) 80 | #define PWMG1S_SCALE_DIV6 (5 << PWMG1S_SCALE_BIT0) 81 | #define PWMG1S_SCALE_DIV7 (6 << PWMG1S_SCALE_BIT0) 82 | #define PWMG1S_SCALE_DIV8 (7 << PWMG1S_SCALE_BIT0) 83 | #define PWMG1S_SCALE_DIV9 (8 << PWMG1S_SCALE_BIT0) 84 | #define PWMG1S_SCALE_DIV10 (9 << PWMG1S_SCALE_BIT0) 85 | #define PWMG1S_SCALE_DIV11 (10 << PWMG1S_SCALE_BIT0) 86 | #define PWMG1S_SCALE_DIV12 (11 << PWMG1S_SCALE_BIT0) 87 | #define PWMG1S_SCALE_DIV13 (12 << PWMG1S_SCALE_BIT0) 88 | #define PWMG1S_SCALE_DIV14 (13 << PWMG1S_SCALE_BIT0) 89 | #define PWMG1S_SCALE_DIV15 (14 << PWMG1S_SCALE_BIT0) 90 | #define PWMG1S_SCALE_DIV16 (15 << PWMG1S_SCALE_BIT0) 91 | #define PWMG1S_SCALE_DIV17 (16 << PWMG1S_SCALE_BIT0) 92 | #define PWMG1S_SCALE_DIV18 (17 << PWMG1S_SCALE_BIT0) 93 | #define PWMG1S_SCALE_DIV19 (18 << PWMG1S_SCALE_BIT0) 94 | #define PWMG1S_SCALE_DIV20 (19 << PWMG1S_SCALE_BIT0) 95 | #define PWMG1S_SCALE_DIV21 (20 << PWMG1S_SCALE_BIT0) 96 | #define PWMG1S_SCALE_DIV22 (21 << PWMG1S_SCALE_BIT0) 97 | #define PWMG1S_SCALE_DIV23 (22 << PWMG1S_SCALE_BIT0) 98 | #define PWMG1S_SCALE_DIV24 (23 << PWMG1S_SCALE_BIT0) 99 | #define PWMG1S_SCALE_DIV25 (24 << PWMG1S_SCALE_BIT0) 100 | #define PWMG1S_SCALE_DIV26 (25 << PWMG1S_SCALE_BIT0) 101 | #define PWMG1S_SCALE_DIV27 (26 << PWMG1S_SCALE_BIT0) 102 | #define PWMG1S_SCALE_DIV28 (27 << PWMG1S_SCALE_BIT0) 103 | #define PWMG1S_SCALE_DIV29 (28 << PWMG1S_SCALE_BIT0) 104 | #define PWMG1S_SCALE_DIV30 (29 << PWMG1S_SCALE_BIT0) 105 | #define PWMG1S_SCALE_DIV31 (30 << PWMG1S_SCALE_BIT0) 106 | #define PWMG1S_SCALE_DIV32 (31 << PWMG1S_SCALE_BIT0) 107 | 108 | #define PWMG1S_PRESCALE_NONE 0x00 109 | #define PWMG1S_PRESCALE_DIV4 (1 << PWMG1S_PRESCALE_BIT0) 110 | #define PWMG1S_PRESCALE_DIV16 (2 << PWMG1S_PRESCALE_BIT0) 111 | #define PWMG1S_PRESCALE_DIV64 (3 << PWMG1S_PRESCALE_BIT0) 112 | 113 | #define PWMG1_INT_AT_DUTY 0x00 114 | #define PWMG1_INT_AT_0 (1 << PWMG1S_INT_MODE_BIT) 115 | 116 | #endif //__PDK_DEVICE_PERIPH_PWMG_1_H__ 117 | -------------------------------------------------------------------------------- /include/pdk/device/periph/pwmg_2.h: -------------------------------------------------------------------------------- 1 | /* 2 | pwmg_2.h: Definitions for the PWMG2 related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PWMG_2_H__ 28 | #define __PDK_DEVICE_PERIPH_PWMG_2_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/pwmg_2.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PWMG2C_ADDR) _pwmg2c; 36 | __sfr __at(PWMG2S_ADDR) _pwmg2s; 37 | __sfr __at(PWMG2DTH_ADDR) _pwmg2dth; 38 | __sfr __at(PWMG2DTL_ADDR) _pwmg2dtl; 39 | __sfr __at(PWMG2CUBH_ADDR) _pwmg2cubh; 40 | __sfr __at(PWMG2CUBL_ADDR) _pwmg2cubl; 41 | 42 | #define PWMG2C _pwmg2c 43 | #define PWMG2S _pwmg2s 44 | #define PWMG2DTH _pwmg2dth 45 | #define PWMG2DTL _pwmg2dtl 46 | #define PWMG2CUBH _pwmg2cubh 47 | #define PWMG2CUBL _pwmg2cubl 48 | 49 | // PWMG2C (PWMG2 Control) register definitions 50 | #define PWMG2C_CLK_SRC_BIT 0 51 | #define PWMG2C_OUT_PIN_SEL_BIT0 1 52 | #define PWMG2C_CTR_RST_BIT 4 53 | #define PWMG2C_INVERT_OUT_BIT 5 54 | #define PWMG2C_STATUS_OUT_BIT 6 55 | #define PWMG2C_ENABLE_BIT 7 56 | 57 | #define PWMG2C_CLK_SYSCLK 0x00 58 | #define PWMG2C_CLK_IHRC (1 << PWMG2C_CLK_SRC_BIT) 59 | 60 | #define PWMG2C_OUT_NONE 0x00 61 | #define PWMG2C_OUT_PB3 (1 << PWMG2C_OUT_PIN_SEL_BIT0) 62 | #define PWMG2C_OUT_PA3 (3 << PWMG2C_OUT_PIN_SEL_BIT0) 63 | #define PWMG2C_OUT_PB2 (4 << PWMG2C_OUT_PIN_SEL_BIT0) 64 | #define PWMG2C_OUT_PA5 (5 << PWMG2C_OUT_PIN_SEL_BIT0) 65 | 66 | #define PWMG2C_RESET_COUNTER (1 << PWMG2C_CTR_RST_BIT) 67 | #define PWMG2C_INVERT_OUT (1 << PWMG2C_INVERT_OUT_BIT) 68 | #define PWMG2C_STATUS_OUT (1 << PWMG2C_STATUS_OUT_BIT) 69 | #define PWMG2C_ENABLE (1 << PWMG2C_ENABLE_BIT) 70 | 71 | // PWMG2S (PWMG2 Scalar) register definitions 72 | #define PWMG2S_SCALE_BIT0 0 73 | #define PWMG2S_PRESCALE_BIT0 5 74 | #define PWMG2S_INT_MODE_BIT 7 75 | 76 | #define PWMG2S_SCALE_NONE 0x00 77 | #define PWMG2S_SCALE_DIV2 (1 << PWMG2S_SCALE_BIT0) 78 | #define PWMG2S_SCALE_DIV3 (2 << PWMG2S_SCALE_BIT0) 79 | #define PWMG2S_SCALE_DIV4 (3 << PWMG2S_SCALE_BIT0) 80 | #define PWMG2S_SCALE_DIV5 (4 << PWMG2S_SCALE_BIT0) 81 | #define PWMG2S_SCALE_DIV6 (5 << PWMG2S_SCALE_BIT0) 82 | #define PWMG2S_SCALE_DIV7 (6 << PWMG2S_SCALE_BIT0) 83 | #define PWMG2S_SCALE_DIV8 (7 << PWMG2S_SCALE_BIT0) 84 | #define PWMG2S_SCALE_DIV9 (8 << PWMG2S_SCALE_BIT0) 85 | #define PWMG2S_SCALE_DIV10 (9 << PWMG2S_SCALE_BIT0) 86 | #define PWMG2S_SCALE_DIV11 (10 << PWMG2S_SCALE_BIT0) 87 | #define PWMG2S_SCALE_DIV12 (11 << PWMG2S_SCALE_BIT0) 88 | #define PWMG2S_SCALE_DIV13 (12 << PWMG2S_SCALE_BIT0) 89 | #define PWMG2S_SCALE_DIV14 (13 << PWMG2S_SCALE_BIT0) 90 | #define PWMG2S_SCALE_DIV15 (14 << PWMG2S_SCALE_BIT0) 91 | #define PWMG2S_SCALE_DIV16 (15 << PWMG2S_SCALE_BIT0) 92 | #define PWMG2S_SCALE_DIV17 (16 << PWMG2S_SCALE_BIT0) 93 | #define PWMG2S_SCALE_DIV18 (17 << PWMG2S_SCALE_BIT0) 94 | #define PWMG2S_SCALE_DIV19 (18 << PWMG2S_SCALE_BIT0) 95 | #define PWMG2S_SCALE_DIV20 (19 << PWMG2S_SCALE_BIT0) 96 | #define PWMG2S_SCALE_DIV21 (20 << PWMG2S_SCALE_BIT0) 97 | #define PWMG2S_SCALE_DIV22 (21 << PWMG2S_SCALE_BIT0) 98 | #define PWMG2S_SCALE_DIV23 (22 << PWMG2S_SCALE_BIT0) 99 | #define PWMG2S_SCALE_DIV24 (23 << PWMG2S_SCALE_BIT0) 100 | #define PWMG2S_SCALE_DIV25 (24 << PWMG2S_SCALE_BIT0) 101 | #define PWMG2S_SCALE_DIV26 (25 << PWMG2S_SCALE_BIT0) 102 | #define PWMG2S_SCALE_DIV27 (26 << PWMG2S_SCALE_BIT0) 103 | #define PWMG2S_SCALE_DIV28 (27 << PWMG2S_SCALE_BIT0) 104 | #define PWMG2S_SCALE_DIV29 (28 << PWMG2S_SCALE_BIT0) 105 | #define PWMG2S_SCALE_DIV30 (29 << PWMG2S_SCALE_BIT0) 106 | #define PWMG2S_SCALE_DIV31 (30 << PWMG2S_SCALE_BIT0) 107 | #define PWMG2S_SCALE_DIV32 (31 << PWMG2S_SCALE_BIT0) 108 | 109 | #define PWMG2S_PRESCALE_NONE 0x00 110 | #define PWMG2S_PRESCALE_DIV4 (1 << PWMG2S_PRESCALE_BIT0) 111 | #define PWMG2S_PRESCALE_DIV16 (2 << PWMG2S_PRESCALE_BIT0) 112 | #define PWMG2S_PRESCALE_DIV64 (3 << PWMG2S_PRESCALE_BIT0) 113 | 114 | #define PWMG2_INT_AT_DUTY 0x00 115 | #define PWMG2_INT_AT_0 (1 << PWMG2S_INT_MODE_BIT) 116 | 117 | #endif //__PDK_DEVICE_PERIPH_PWMG_2_H__ 118 | -------------------------------------------------------------------------------- /include/pdk/device/periph/pwmg_basic.h: -------------------------------------------------------------------------------- 1 | /* 2 | pwmg_basic.h: Definitions for the (basic) PWMG related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_PWMG_BASIC_H__ 28 | #define __PDK_DEVICE_PERIPH_PWMG_BASIC_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/pwmg_basic.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(PWMGCLK_ADDR) _pwmgclk; 36 | __sfr __at(PWMGCUBH_ADDR) _pwmgcubh; 37 | __sfr __at(PWMGCUBL_ADDR) _pwmgcubl; 38 | 39 | __sfr __at(PWMG0C_ADDR) _pwmg0c; 40 | __sfr __at(PWMG0DTH_ADDR) _pwmg0dth; 41 | __sfr __at(PWMG0DTL_ADDR) _pwmg0dtl; 42 | 43 | __sfr __at(PWMG1C_ADDR) _pwmg1c; 44 | __sfr __at(PWMG1DTH_ADDR) _pwmg1dth; 45 | __sfr __at(PWMG1DTL_ADDR) _pwmg1dtl; 46 | 47 | __sfr __at(PWMG2C_ADDR) _pwmg2c; 48 | __sfr __at(PWMG2DTH_ADDR) _pwmg2dth; 49 | __sfr __at(PWMG2DTL_ADDR) _pwmg2dtl; 50 | 51 | #define PWMGCLK _pwmgclk 52 | #define PWMGCUBH _pwmgcubh 53 | #define PWMGCUBL _pwmgcubl 54 | 55 | #define PWMG0C _pwmg0c 56 | #define PWMG0DTH _pwmg0dth 57 | #define PWMG0DTL _pwmg0dtl 58 | 59 | #define PWMG1C _pwmg1c 60 | #define PWMG1DTH _pwmg1dth 61 | #define PWMG1DTL _pwmg1dtl 62 | 63 | #define PWMG2C _pwmg2c 64 | #define PWMG2DTH _pwmg2dth 65 | #define PWMG2DTL _pwmg2dtl 66 | 67 | // PWMGCLK (PWMG Clock) register definitions 68 | #define PWMGCLK_CLK_SRC_BIT 0 69 | #define PWMGCLK_PRESCALE_BIT0 4 70 | #define PWMGCLK_ENABLE_BIT 7 71 | 72 | #define PWMGCLK_CLK_SYSCLK 0x00 73 | #define PWMGCLK_CLK_IHRC (1 << PWMGCLK_CLK_SRC_BIT) 74 | 75 | #define PWMGCLK_PRESCALE_NONE 0x00 76 | #define PWMGCLK_PRESCALE_DIV2 (1 << PWMGCLK_PRESCALE_BIT0) 77 | #define PWMGCLK_PRESCALE_DIV4 (2 << PWMGCLK_PRESCALE_BIT0) 78 | #define PWMGCLK_PRESCALE_DIV8 (3 << PWMGCLK_PRESCALE_BIT0) 79 | #define PWMGCLK_PRESCALE_DIV16 (4 << PWMGCLK_PRESCALE_BIT0) 80 | #define PWMGCLK_PRESCALE_DIV32 (5 << PWMGCLK_PRESCALE_BIT0) 81 | #define PWMGCLK_PRESCALE_DIV64 (6 << PWMGCLK_PRESCALE_BIT0) 82 | #define PWMGCLK_PRESCALE_DIV128 (7 << PWMGCLK_PRESCALE_BIT0) 83 | 84 | #define PWMGCLK_PWMG_ENABLE (1 << PWMGCLK_ENABLE_BIT) 85 | 86 | // PWMG0C (PWMG0 Control) register definitions 87 | #define PWMG0C_X_OR_BIT 0 88 | #define PWMG0C_OUT_PIN_SEL_BIT0 1 89 | #define PWMG0C_X_OR_ENABLE_BIT 4 90 | #define PWMG0C_INVERT_OUT_BIT 5 91 | #define PWMG0C_STATUS_OUT_BIT 6 92 | 93 | #define PWMG0C_GEN_XOR 0x00 94 | #define PWMG0C_GEN_OR (1 << PWMG0C_X_OR_BIT) 95 | 96 | #define PWMG0C_OUT_NONE 0x00 97 | #define PWMG0C_OUT_PB5 (1 << PWMG0C_OUT_PIN_SEL_BIT0) 98 | #if defined(__PDK_HAS_PORTC) 99 | #define PWMG0C_OUT_PC2 (2 << PWMG0C_OUT_PIN_SEL_BIT0) 100 | #endif 101 | #define PWMG0C_OUT_PA0 (3 << PWMG0C_OUT_PIN_SEL_BIT0) 102 | #define PWMG0C_OUT_PB4 (4 << PWMG0C_OUT_PIN_SEL_BIT0) 103 | #define PWMG0C_OUT_PB6 (5 << PWMG0C_OUT_PIN_SEL_BIT0) 104 | //0x06 reserved 105 | //0x07 reserved 106 | 107 | #define PWMG0C_OUT_PWMG0 0x00 108 | #define PWMG0C_OUT_PWMG0_X_OR_PWMG1 (1 << PWMG0C_X_OR_ENABLE_BIT) 109 | 110 | #define PWMG0C_INVERT_OUT (1 << PWMG0C_INVERT_OUT_BIT) 111 | #define PWMG0C_STATUS_OUT (1 << PWMG0C_STATUS_OUT_BIT) 112 | 113 | // PWMG1C (PWMG1 Control) register definitions 114 | #define PWMG1C_OUT_PIN_SEL_BIT0 1 115 | #define PWMG1C_PWMG1_2_SEL_BIT 4 116 | #define PWMG1C_INVERT_OUT_BIT 5 117 | #define PWMG1C_STATUS_OUT_BIT 6 118 | 119 | #define PWMG1C_OUT_NONE 0x00 120 | #define PWMG1C_OUT_PB6 (1 << PWMG1C_OUT_PIN_SEL_BIT0) 121 | #if defined(__PDK_HAS_PORTC) 122 | #define PWMG1C_OUT_PC3 (2 << PWMG1C_OUT_PIN_SEL_BIT0) 123 | #endif 124 | #define PWMG1C_OUT_PA4 (3 << PWMG1C_OUT_PIN_SEL_BIT0) 125 | #define PWMG1C_OUT_PB7 (4 << PWMG1C_OUT_PIN_SEL_BIT0) 126 | //0x05 reserved 127 | //0x06 reserved 128 | //0x07 reserved 129 | 130 | #define PWMG1C_OUT_PWMG1 0x00 131 | #define PWMG1C_OUT_PWMG2 (1 << PWMG1C_PWMG1_2_SEL_BIT) 132 | 133 | #define PWMG1C_INVERT_OUT (1 << PWMG1C_INVERT_OUT_BIT) 134 | #define PWMG1C_STATUS_OUT (1 << PWMG1C_STATUS_OUT_BIT) 135 | 136 | // PWMG2C (PWMG2 Control) register definitions 137 | #define PWMG2C_OUT_PIN_SEL_BIT0 1 138 | #define PWMG2C_PWMG2_DIV2_SEL_BIT 4 139 | #define PWMG2C_INVERT_OUT_BIT 5 140 | #define PWMG2C_STATUS_OUT_BIT 6 141 | 142 | #define PWMG2C_GEN_XOR 0x00 143 | #define PWMG2C_GEN_OR (1 << PWMG2C_X_OR_BIT) 144 | 145 | #define PWMG2C_OUT_NONE 0x00 146 | #define PWMG2C_OUT_PB3 (1 << PWMG2C_OUT_PIN_SEL_BIT0) 147 | #if defined(__PDK_HAS_PORTC) 148 | #define PWMG2C_OUT_PC0 (2 << PWMG2C_OUT_PIN_SEL_BIT0) 149 | #endif 150 | #define PWMG2C_OUT_PA3 (3 << PWMG2C_OUT_PIN_SEL_BIT0) 151 | #define PWMG2C_OUT_PB2 (4 << PWMG2C_OUT_PIN_SEL_BIT0) 152 | #define PWMG2C_OUT_PA5 (5 << PWMG2C_OUT_PIN_SEL_BIT0) 153 | #define PWMG2C_OUT_PB5 (6 << PWMG2C_OUT_PIN_SEL_BIT0) 154 | //0x07 reserved 155 | 156 | #define PWMG2C_OUT_PWMG2 0x00 157 | #define PWMG2C_OUT_PWMG2_DIV2 (1 << PWMG2C_PWMG2_DIV2_SEL_BIT) 158 | 159 | #define PWMG2C_INVERT_OUT (1 << PWMG2C_INVERT_OUT_BIT) 160 | #define PWMG2C_STATUS_OUT (1 << PWMG2C_STATUS_OUT_BIT) 161 | 162 | #endif //__PDK_DEVICE_PERIPH_PWMG_BASIC_H__ 163 | -------------------------------------------------------------------------------- /include/pdk/device/periph/rfc.h: -------------------------------------------------------------------------------- 1 | /* 2 | rfc.h: Definitions for the RFC related registers. 3 | 4 | Copyright (C) 2020 freepdk https://free-pdk.github.io 5 | 6 | This library is free software; you can redistribute it and/or modify it 7 | under the terms of the GNU General Public License as published by the 8 | Free Software Foundation; either version 2, or (at your option) any later version. 9 | 10 | This library is distributed in the hope that it will be useful, 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 | GNU General Public License for more details. 14 | 15 | You should have received a copy of the GNU General Public License 16 | along with this library. If not, see . 17 | 18 | As a special exception, if you link this library with other files, 19 | some of which are compiled with SDCC, to produce an executable, 20 | this library does not by itself cause the resulting executable to 21 | be covered by the GNU General Public License. This exception does 22 | not however invalidate any other reasons why the executable file 23 | might be covered by the GNU General Public License. 24 | */ 25 | 26 | #ifndef __PDK_DEVICE_PERIPH_RFC_H__ 27 | #define __PDK_DEVICE_PERIPH_RFC_H__ 28 | 29 | #if !defined(__PDK_DEVICE_H__) 30 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/adc.h" by itself." 31 | #endif 32 | 33 | // __sfr definitions 34 | __sfr __at(RFCC_ADDR) _rfcc; 35 | __sfr __at(RFCCRH_ADDR) _rfccrh; 36 | __sfr __at(RFCCRL_ADDR) _rfccrl; 37 | 38 | #define RFCC _rfcc 39 | #define RFCCRH _rfccrh 40 | #define RFCCRL _rfccrl 41 | 42 | #define RFCC_OUTPUT_ENABLE (1 << 1) 43 | #define RFCC_OVERFLOW (1 << 2) 44 | #define RFCC_R_TYPE 0 45 | #define RFCC_C_TYPE (1 << 3) 46 | #define RFCC_START (1 << 4) 47 | 48 | #define RFCC_CH_RFC0_PA4 ((0 << 5) | 0 ) 49 | #define RFCC_CH_RFC1_PA0 ((1 << 5) | 0 ) 50 | #define RFCC_CH_RFC2_PA3 ((4 << 5) | 0 ) 51 | #define RFCC_CH_RFC3_PB7 ((5 << 5) | 0 ) 52 | #define RFCC_CH_RFC4_PB6 ((6 << 5) | 0 ) 53 | #define RFCC_CH_DISABLE ((7 << 5) | 0 ) 54 | #define RFCC_CH_RFC5_PB4 ((0 << 5) | 1 ) 55 | #define RFCC_CH_RFC6_PB3 ((1 << 5) | 1 ) 56 | #define RFCC_CH_RFC7_PB2 ((2 << 5) | 1 ) 57 | #define RFCC_CH_RFC8_PB1 ((3 << 5) | 1 ) 58 | #define RFCC_CH_RFC9_PB0 ((4 << 5) | 1 ) 59 | 60 | 61 | #endif //__PDK_DEVICE_PERIPH_RFC_H__ 62 | -------------------------------------------------------------------------------- /include/pdk/device/periph/rop.h: -------------------------------------------------------------------------------- 1 | /* 2 | rop.h: Definitions for the ROP register used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_ROP_H__ 28 | #define __PDK_DEVICE_PERIPH_ROP_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/rop.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(ROP_ADDR) _rop; 36 | 37 | #define ROP _rop 38 | 39 | // ROP register definitions 40 | 41 | #if defined(ROP_PB0_PA4_SEL_BIT) 42 | #define ROP_INT_SRC_PB0 0x00 43 | #define ROP_INT_SRC_PA4 (1 << ROP_PB0_PA4_SEL_BIT) 44 | #endif 45 | 46 | #if defined(ROP_PA0_PB5_SEL_BIT) 47 | #define ROP_INT_SRC_PA0 0x00 48 | #define ROP_INT_SRC_PB5 (1 << ROP_PA0_PB5_SEL_BIT) 49 | #endif 50 | 51 | #if defined(ROP_TMX_BIT_SEL_BIT) 52 | #define ROP_TMX_6BIT 0x00 53 | #define ROP_TMX_7BIT (1 << ROP_TMX_BIT_SEL_BIT) 54 | #endif 55 | 56 | #if defined(ROP_TMX_FREQ_SEL_BIT) 57 | #define ROP_TMX_16MHZ 0x00 58 | #define ROP_TMX_32MHZ (1 << ROP_TMX_FREQ_SEL_BIT) 59 | #endif 60 | 61 | #if defined(ROP_PWM_SEL_BIT) 62 | #define ROP_PURE_PWM 0x00 63 | #define ROP_GPC_PWM (1 << ROP_PWM_SEL_BIT) 64 | #endif 65 | 66 | #if defined(ROP_PWM_FREQ_SEL_BIT) 67 | #define ROP_PWM_16MHZ 0x00 68 | #define ROP_PWM_32MHZ (1 << ROP_PWM_FREQ_SEL_BIT) 69 | #endif 70 | 71 | #if defined(ROP_TM2_PB2_PB0_SEL_BIT) 72 | #define ROP_TM2_PB2 0x00 73 | #define ROP_TM2_PB0 (1 << ROP_TM2_PB2_PB0_SEL_BIT) 74 | #endif 75 | 76 | #endif //__PDK_DEVICE_PERIPH_ROP_H__ 77 | -------------------------------------------------------------------------------- /include/pdk/device/periph/stack.h: -------------------------------------------------------------------------------- 1 | /* 2 | stack.h: Definitions for the Stack related register (SP) used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_STACK_H__ 28 | #define __PDK_DEVICE_PERIPH_STACK_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/stack.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(SP_ADDR) _sp; 36 | 37 | #define SP _sp 38 | 39 | #endif //__PDK_DEVICE_PERIPH_STACK_H__ 40 | -------------------------------------------------------------------------------- /include/pdk/device/periph/timer_16.h: -------------------------------------------------------------------------------- 1 | /* 2 | timer_16.h: Definitions for the Timer 16 related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_TIMER_16_H__ 28 | #define __PDK_DEVICE_PERIPH_TIMER_16_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/timer_16.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(T16M_ADDR) _t16m; 36 | __sfr16 _t16c; 37 | 38 | #define T16M _t16m 39 | #define T16C _t16c 40 | 41 | // T16M (Timer16 Mode) register definitions 42 | #define T16M_INT_SRC_BIT0 0 43 | #define T16M_CLK_DIV_BIT0 3 44 | #define T16M_CLK_SRC_BIT0 5 45 | 46 | // Interrupt source 47 | #define T16M_INTSRC_8BIT 0x00 48 | #define T16M_INTSRC_9BIT (1 << T16M_INT_SRC_BIT0) 49 | #define T16M_INTSRC_10BIT (2 << T16M_INT_SRC_BIT0) 50 | #define T16M_INTSRC_11BIT (3 << T16M_INT_SRC_BIT0) 51 | #define T16M_INTSRC_12BIT (4 << T16M_INT_SRC_BIT0) 52 | #define T16M_INTSRC_13BIT (5 << T16M_INT_SRC_BIT0) 53 | #define T16M_INTSRC_14BIT (6 << T16M_INT_SRC_BIT0) 54 | #define T16M_INTSRC_15BIT (7 << T16M_INT_SRC_BIT0) 55 | 56 | // Clock divider 57 | #define T16M_CLK_DIV1 0x00 58 | #define T16M_CLK_DIV4 (1 << T16M_CLK_DIV_BIT0) 59 | #define T16M_CLK_DIV16 (2 << T16M_CLK_DIV_BIT0) 60 | #define T16M_CLK_DIV64 (3 << T16M_CLK_DIV_BIT0) 61 | 62 | // Clock source 63 | #define T16M_CLK_DISABLE 0x00 64 | #define T16M_CLK_SYSCLK (1 << T16M_CLK_SRC_BIT0) 65 | //0x02 reserved 66 | #define T16M_CLK_PA4_FALL (3 << T16M_CLK_SRC_BIT0) 67 | #define T16M_CLK_IHRC (4 << T16M_CLK_SRC_BIT0) 68 | #if defined(__PDK_HAS_EOSC) 69 | #define T16M_CLK_EOSC (5 << T16M_CLK_SRC_BIT0) 70 | #endif 71 | #define T16M_CLK_ILRC (6 << T16M_CLK_SRC_BIT0) 72 | #define T16M_CLK_PA0_FALL (7 << T16M_CLK_SRC_BIT0) 73 | 74 | #endif //__PDK_DEVICE_PERIPH_TIMER_16_H__ 75 | -------------------------------------------------------------------------------- /include/pdk/device/periph/timer_2.h: -------------------------------------------------------------------------------- 1 | /* 2 | timer_2.h: Definitions for the Timer 2 related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_TIMER_2_H__ 28 | #define __PDK_DEVICE_PERIPH_TIMER_2_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/timer_2.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(TM2C_ADDR) _tm2c; 36 | __sfr __at(TM2CT_ADDR) _tm2ct; 37 | __sfr __at(TM2S_ADDR) _tm2s; 38 | __sfr __at(TM2B_ADDR) _tm2b; 39 | 40 | #define TM2C _tm2c 41 | #define TM2CT _tm2ct 42 | #define TM2S _tm2s 43 | #define TM2B _tm2b 44 | 45 | // TM2C (Timer2 Control) register definitions 46 | #define TM2C_INVERT_OUT_BIT 0 47 | #define TM2C_MODE_SEL_BIT 1 48 | #define TM2C_OUTPUT_SEL_BIT0 2 49 | #define TM2C_CLK_SRC_BIT0 4 50 | 51 | #define TM2C_INVERT_OUT (1 << TM2C_INVERT_OUT_BIT) 52 | 53 | #define TM2C_MODE_PERIOD 0x00 54 | #define TM2C_MODE_PWM (1 << TM2C_MODE_SEL_BIT) 55 | 56 | #define TM2C_OUT_DISABLE 0x00 57 | #if defined(__PDK_HAS_PORTB) 58 | #define TM2C_OUT_PB2 (1 << TM2C_OUTPUT_SEL_BIT0) 59 | #endif 60 | #define TM2C_OUT_PA3 (2 << TM2C_OUTPUT_SEL_BIT0) 61 | #if defined(__PDK_HAS_PORTB) 62 | #define TM2C_OUT_PB4 (3 << TM2C_OUTPUT_SEL_BIT0) 63 | #else 64 | #define TM2C_OUT_PA4 (3 << TM2C_OUTPUT_SEL_BIT0) 65 | #endif 66 | 67 | #define TM2C_CLK_DISABLE 0x00 68 | #define TM2C_CLK_SYSCLK (1 << TM2C_CLK_SRC_BIT0) 69 | #define TM2C_CLK_IHRC (2 << TM2C_CLK_SRC_BIT0) 70 | #if defined(__PDK_HAS_EOSC) 71 | #define TM2C_CLK_EOSC (3 << TM2C_CLK_SRC_BIT0) 72 | #endif 73 | #define TM2C_CLK_ILRC (4 << TM2C_CLK_SRC_BIT0) 74 | #if defined(__PDK_HAS_COMP) 75 | #define TM2C_CLK_COMPOUT (5 << TM2C_CLK_SRC_BIT0) 76 | #endif 77 | //0x06 reserved 78 | //0x07 reserved 79 | #define TM2C_CLK_PA0_RISE (8 << TM2C_CLK_SRC_BIT0) 80 | #define TM2C_CLK_PA0_FALL (9 << TM2C_CLK_SRC_BIT0) 81 | #if defined(__PDK_HAS_PORTB) 82 | #define TM2C_CLK_PB0_RISE (10 << TM2C_CLK_SRC_BIT0) 83 | #define TM2C_CLK_PB0_FALL (11 << TM2C_CLK_SRC_BIT0) 84 | #endif 85 | #define TM2C_CLK_PA4_RISE (12 << TM2C_CLK_SRC_BIT0) 86 | #define TM2C_CLK_PA4_FALL (13 << TM2C_CLK_SRC_BIT0) 87 | 88 | // TM2S (Timer2 Scalar) register definitions 89 | #define TM2S_SCALE_BIT0 0 90 | #define TM2S_PRESCALE_BIT0 5 91 | #define TM2S_PWM_RES_SEL_BIT 7 92 | 93 | #define TM2S_SCALE_NONE 0x00 94 | #define TM2S_SCALE_DIV2 (1 << TM2S_SCALE_BIT0) 95 | #define TM2S_SCALE_DIV3 (2 << TM2S_SCALE_BIT0) 96 | #define TM2S_SCALE_DIV4 (3 << TM2S_SCALE_BIT0) 97 | #define TM2S_SCALE_DIV5 (4 << TM2S_SCALE_BIT0) 98 | #define TM2S_SCALE_DIV6 (5 << TM2S_SCALE_BIT0) 99 | #define TM2S_SCALE_DIV7 (6 << TM2S_SCALE_BIT0) 100 | #define TM2S_SCALE_DIV8 (7 << TM2S_SCALE_BIT0) 101 | #define TM2S_SCALE_DIV9 (8 << TM2S_SCALE_BIT0) 102 | #define TM2S_SCALE_DIV10 (9 << TM2S_SCALE_BIT0) 103 | #define TM2S_SCALE_DIV11 (10 << TM2S_SCALE_BIT0) 104 | #define TM2S_SCALE_DIV12 (11 << TM2S_SCALE_BIT0) 105 | #define TM2S_SCALE_DIV13 (12 << TM2S_SCALE_BIT0) 106 | #define TM2S_SCALE_DIV14 (13 << TM2S_SCALE_BIT0) 107 | #define TM2S_SCALE_DIV15 (14 << TM2S_SCALE_BIT0) 108 | #define TM2S_SCALE_DIV16 (15 << TM2S_SCALE_BIT0) 109 | #define TM2S_SCALE_DIV17 (16 << TM2S_SCALE_BIT0) 110 | #define TM2S_SCALE_DIV18 (17 << TM2S_SCALE_BIT0) 111 | #define TM2S_SCALE_DIV19 (18 << TM2S_SCALE_BIT0) 112 | #define TM2S_SCALE_DIV20 (19 << TM2S_SCALE_BIT0) 113 | #define TM2S_SCALE_DIV21 (20 << TM2S_SCALE_BIT0) 114 | #define TM2S_SCALE_DIV22 (21 << TM2S_SCALE_BIT0) 115 | #define TM2S_SCALE_DIV23 (22 << TM2S_SCALE_BIT0) 116 | #define TM2S_SCALE_DIV24 (23 << TM2S_SCALE_BIT0) 117 | #define TM2S_SCALE_DIV25 (24 << TM2S_SCALE_BIT0) 118 | #define TM2S_SCALE_DIV26 (25 << TM2S_SCALE_BIT0) 119 | #define TM2S_SCALE_DIV27 (26 << TM2S_SCALE_BIT0) 120 | #define TM2S_SCALE_DIV28 (27 << TM2S_SCALE_BIT0) 121 | #define TM2S_SCALE_DIV29 (28 << TM2S_SCALE_BIT0) 122 | #define TM2S_SCALE_DIV30 (29 << TM2S_SCALE_BIT0) 123 | #define TM2S_SCALE_DIV31 (30 << TM2S_SCALE_BIT0) 124 | #define TM2S_SCALE_DIV32 (31 << TM2S_SCALE_BIT0) 125 | 126 | #define TM2S_PRESCALE_NONE 0x00 127 | #define TM2S_PRESCALE_DIV4 (1 << TM2S_PRESCALE_BIT0) 128 | #define TM2S_PRESCALE_DIV16 (2 << TM2S_PRESCALE_BIT0) 129 | #define TM2S_PRESCALE_DIV64 (3 << TM2S_PRESCALE_BIT0) 130 | 131 | #define TM2S_PWM_RES_8BIT 0x00 132 | #define TM2S_PWM_RES_6BIT (1 << TM2S_PWM_RES_SEL_BIT) 133 | 134 | #endif //__PDK_DEVICE_PERIPH_TIMER_2_H__ 135 | -------------------------------------------------------------------------------- /include/pdk/device/periph/timer_3.h: -------------------------------------------------------------------------------- 1 | /* 2 | timer_3.h: Definitions for the Timer 3 related registers used by Padauk microcontrollers. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PERIPH_TIMER_3_H__ 28 | #define __PDK_DEVICE_PERIPH_TIMER_3_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/device/periph/timer_3.h" by itself." 32 | #endif 33 | 34 | // __sfr definitions 35 | __sfr __at(TM3C_ADDR) _tm3c; 36 | __sfr __at(TM3CT_ADDR) _tm3ct; 37 | __sfr __at(TM3S_ADDR) _tm3s; 38 | __sfr __at(TM3B_ADDR) _tm3b; 39 | 40 | #define TM3C _tm3c 41 | #define TM3CT _tm3ct 42 | #define TM3S _tm3s 43 | #define TM3B _tm3b 44 | 45 | // TM3C (Timer3 Control) register definitions 46 | #define TM3C_INVERT_OUT_BIT 0 47 | #define TM3C_MODE_SEL_BIT 1 48 | #define TM3C_OUTPUT_SEL_BIT0 2 49 | #define TM3C_CLK_SRC_BIT0 4 50 | 51 | #define TM3C_INVERT_OUT (1 << TM3C_INVERT_OUT_BIT) 52 | 53 | #define TM3C_MODE_PERIOD 0x00 54 | #define TM3C_MODE_PWM (1 << TM3C_MODE_SEL_BIT) 55 | 56 | #define TM3C_OUT_DISABLE 0x00 57 | #if defined(__PDK_HAS_PORTB) 58 | #define TM3C_OUT_PB5 (1 << TM3C_OUTPUT_SEL_BIT0) 59 | #define TM3C_OUT_PB6 (2 << TM3C_OUTPUT_SEL_BIT0) 60 | #define TM3C_OUT_PB7 (3 << TM3C_OUTPUT_SEL_BIT0) 61 | #endif 62 | 63 | #define TM3C_CLK_DISABLE 0x00 64 | #define TM3C_CLK_SYSCLK (1 << TM3C_CLK_SRC_BIT0) 65 | #define TM3C_CLK_IHRC (2 << TM3C_CLK_SRC_BIT0) 66 | #if defined(__PDK_HAS_EOSC) 67 | #define TM3C_CLK_EOSC (3 << TM3C_CLK_SRC_BIT0) 68 | #endif 69 | #define TM3C_CLK_ILRC (4 << TM3C_CLK_SRC_BIT0) 70 | #if defined(__PDK_HAS_COMP) 71 | #define TM3C_CLK_COMPOUT (5 << TM3C_CLK_SRC_BIT0) 72 | #endif 73 | //0x06 reserved 74 | //0x07 reserved 75 | #define TM3C_CLK_PA0_RISE (8 << TM3C_CLK_SRC_BIT0) 76 | #define TM3C_CLK_PA0_FALL (9 << TM3C_CLK_SRC_BIT0) 77 | #if defined(__PDK_HAS_PORTB) 78 | #define TM3C_CLK_PB0_RISE (10 << TM3C_CLK_SRC_BIT0) 79 | #define TM3C_CLK_PB0_FALL (11 << TM3C_CLK_SRC_BIT0) 80 | #endif 81 | #define TM3C_CLK_PA4_RISE (12 << TM3C_CLK_SRC_BIT0) 82 | #define TM3C_CLK_PA4_FALL (13 << TM3C_CLK_SRC_BIT0) 83 | 84 | // TM3S (Timer3 Scalar) register definitions 85 | #define TM3S_SCALE_BIT0 0 86 | #define TM3S_PRESCALE_BIT0 5 87 | #define TM3S_PWM_RES_SEL_BIT 7 88 | 89 | #define TM3S_SCALE_NONE 0x00 90 | #define TM3S_SCALE_DIV2 (1 << TM3S_SCALE_BIT0) 91 | #define TM3S_SCALE_DIV3 (2 << TM3S_SCALE_BIT0) 92 | #define TM3S_SCALE_DIV4 (3 << TM3S_SCALE_BIT0) 93 | #define TM3S_SCALE_DIV5 (4 << TM3S_SCALE_BIT0) 94 | #define TM3S_SCALE_DIV6 (5 << TM3S_SCALE_BIT0) 95 | #define TM3S_SCALE_DIV7 (6 << TM3S_SCALE_BIT0) 96 | #define TM3S_SCALE_DIV8 (7 << TM3S_SCALE_BIT0) 97 | #define TM3S_SCALE_DIV9 (8 << TM3S_SCALE_BIT0) 98 | #define TM3S_SCALE_DIV10 (9 << TM3S_SCALE_BIT0) 99 | #define TM3S_SCALE_DIV11 (10 << TM3S_SCALE_BIT0) 100 | #define TM3S_SCALE_DIV12 (11 << TM3S_SCALE_BIT0) 101 | #define TM3S_SCALE_DIV13 (12 << TM3S_SCALE_BIT0) 102 | #define TM3S_SCALE_DIV14 (13 << TM3S_SCALE_BIT0) 103 | #define TM3S_SCALE_DIV15 (14 << TM3S_SCALE_BIT0) 104 | #define TM3S_SCALE_DIV16 (15 << TM3S_SCALE_BIT0) 105 | #define TM3S_SCALE_DIV17 (16 << TM3S_SCALE_BIT0) 106 | #define TM3S_SCALE_DIV18 (17 << TM3S_SCALE_BIT0) 107 | #define TM3S_SCALE_DIV19 (18 << TM3S_SCALE_BIT0) 108 | #define TM3S_SCALE_DIV20 (19 << TM3S_SCALE_BIT0) 109 | #define TM3S_SCALE_DIV21 (20 << TM3S_SCALE_BIT0) 110 | #define TM3S_SCALE_DIV22 (21 << TM3S_SCALE_BIT0) 111 | #define TM3S_SCALE_DIV23 (22 << TM3S_SCALE_BIT0) 112 | #define TM3S_SCALE_DIV24 (23 << TM3S_SCALE_BIT0) 113 | #define TM3S_SCALE_DIV25 (24 << TM3S_SCALE_BIT0) 114 | #define TM3S_SCALE_DIV26 (25 << TM3S_SCALE_BIT0) 115 | #define TM3S_SCALE_DIV27 (26 << TM3S_SCALE_BIT0) 116 | #define TM3S_SCALE_DIV28 (27 << TM3S_SCALE_BIT0) 117 | #define TM3S_SCALE_DIV29 (28 << TM3S_SCALE_BIT0) 118 | #define TM3S_SCALE_DIV30 (29 << TM3S_SCALE_BIT0) 119 | #define TM3S_SCALE_DIV31 (30 << TM3S_SCALE_BIT0) 120 | #define TM3S_SCALE_DIV32 (31 << TM3S_SCALE_BIT0) 121 | 122 | #define TM3S_PRESCALE_NONE 0x00 123 | #define TM3S_PRESCALE_DIV4 (1 << TM3S_PRESCALE_BIT0) 124 | #define TM3S_PRESCALE_DIV16 (2 << TM3S_PRESCALE_BIT0) 125 | #define TM3S_PRESCALE_DIV64 (3 << TM3S_PRESCALE_BIT0) 126 | 127 | #define TM3S_PWM_RES_8BIT 0x00 128 | #define TM3S_PWM_RES_6BIT (1 << TM3S_PWM_RES_SEL_BIT) 129 | 130 | #endif //__PDK_DEVICE_PERIPH_TIMER_3_H__ 131 | -------------------------------------------------------------------------------- /include/pdk/device/pfs154.h: -------------------------------------------------------------------------------- 1 | /* 2 | pfs154.h: FUSE and Register Definitions for the Padauk PFS154 device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PFS154_H__ 28 | #define __PDK_DEVICE_PFS154_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pfs154.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PFS154 needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 55000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_IHRCR_ADDR 0x07ed 44 | #define FACTORY_BGTR_ADDR 0x07ee 45 | 46 | 47 | // FUSE definitions 48 | #define FUSE_WORD_ADDR 0x07ff 49 | #define FUSE_RES_BITS_HIGH 0x30FC // - - 1 1 B B 0 D 1 1 1 1 1 1 0 S 50 | // Blank IC Values 0x3FFD // - - 1 1 1 1 1 1 1 1 1 1 1 1 1 1 (Security Off, Normal IO Drive, Fast Boot-up) 51 | #define FUSE_SECURITY_ON 0x0000 //(S) 52 | #define FUSE_SECURITY_OFF (1 << 0) 53 | #define FUSE_IO_DRV_LOW 0x0000 //(D) 54 | #define FUSE_IO_DRV_NORMAL (1 << 8) 55 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 56 | #define FUSE_BOOTUP_FAST (3 << 10) 57 | 58 | 59 | // Register address definitions 60 | #define FLAG_ADDR 0x00 61 | //0x01 62 | #define SP_ADDR 0x02 63 | #define CLKMD_ADDR 0x03 64 | #define INTEN_ADDR 0x04 65 | #define INTRQ_ADDR 0x05 66 | #define T16M_ADDR 0x06 67 | //0x07 68 | #define MISC_ADDR 0x08 69 | #define TM2B_ADDR 0x09 70 | #define EOSCR_ADDR 0x0a 71 | #define IHRCR_ADDR 0x0b 72 | #define INTEGS_ADDR 0x0c 73 | #define PADIER_ADDR 0x0d 74 | #define PBDIER_ADDR 0x0e 75 | #define MISC2_ADDR 0x0f 76 | #define PA_ADDR 0x10 77 | #define PAC_ADDR 0x11 78 | #define PAPH_ADDR 0x12 79 | //0x13 80 | #define PB_ADDR 0x14 81 | #define PBC_ADDR 0x15 82 | #define PBPH_ADDR 0x16 83 | #define TM2S_ADDR 0x17 84 | #define GPCC_ADDR 0x18 85 | #define GPCS_ADDR 0x19 86 | #define BGTR_ADDR 0x1a 87 | #define MISCLVR_ADDR 0x1b 88 | #define TM2C_ADDR 0x1c 89 | #define TM2CT_ADDR 0x1d 90 | //0x1e 91 | //0x1f 92 | #define PWMG0C_ADDR 0x20 93 | #define PWMG0S_ADDR 0x21 94 | #define PWMG0DTH_ADDR 0x22 95 | #define PWMG0DTL_ADDR 0x23 96 | #define PWMG0CUBH_ADDR 0x24 97 | #define PWMG0CUBL_ADDR 0x25 98 | #define PWMG1C_ADDR 0x26 99 | #define PWMG1S_ADDR 0x27 100 | #define PWMG1DTH_ADDR 0x28 101 | #define PWMG1DTL_ADDR 0x29 102 | #define PWMG1CUBH_ADDR 0x2a 103 | #define PWMG1CUBL_ADDR 0x2b 104 | #define PWMG2C_ADDR 0x2c 105 | #define PWMG2S_ADDR 0x2d 106 | #define PWMG2DTH_ADDR 0x2e 107 | #define PWMG2DTL_ADDR 0x2f 108 | #define PWMG2CUBH_ADDR 0x30 109 | #define PWMG2CUBL_ADDR 0x31 110 | #define TM3C_ADDR 0x32 111 | #define TM3CT_ADDR 0x33 112 | #define TM3S_ADDR 0x34 113 | #define TM3B_ADDR 0x35 114 | #define RFCC_ADDR 0x36 // Undocumented RFC peripheral 115 | #define RFCCRH_ADDR 0x37 116 | #define RFCCRL_ADDR 0x38 117 | #define ILRCR_ADDR 0x39 118 | //0x3a 119 | //... 120 | //0x3f 121 | 122 | 123 | // Peripheral definitions 124 | #define __PDK_HAS_COMP 125 | #define __PDK_HAS_EOSC 126 | #define __PDK_HAS_PORTB 127 | #define __PDK_HAS_TM3 128 | #define __PDK_HAS_PWMG 129 | #define __PDK_HAS_LCD 130 | 131 | #include "periph/accumulator.h" 132 | #include "periph/stack.h" 133 | #include "periph/clock.h" 134 | #include "periph/external_oscillator.h" 135 | #include "periph/interrupt.h" 136 | #include "periph/port_a.h" 137 | #include "periph/port_b.h" 138 | #include "periph/timer_16.h" 139 | #include "periph/timer_2.h" 140 | #include "periph/timer_3.h" 141 | #include "periph/bandgap.h" 142 | #include "periph/comparator.h" 143 | #include "periph/pwmg_0.h" 144 | #include "periph/pwmg_1.h" 145 | #include "periph/pwmg_2.h" 146 | #include "periph/misc.h" 147 | #include "periph/misc2.h" 148 | #include "periph/misclvr_basic.h" 149 | #include "periph/rfc.h" 150 | 151 | // Additional MISC2 register definitions 152 | #define MISC2_COMP_PWMG1_BIT0 3 153 | #define MISC2_TM3_PWMG2_BIT0 4 154 | 155 | #endif //__PDK_DEVICE_PFS154_H__ 156 | -------------------------------------------------------------------------------- /include/pdk/device/pfs172.h: -------------------------------------------------------------------------------- 1 | /* 2 | pfs172.h: FUSE and Register Definitions for the Padauk PFS172 device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PFS172_H__ 28 | #define __PDK_DEVICE_PFS172_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pfs172.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PFS172 needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 55000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_IHRCR_ADDR 0x07ed 44 | #define FACTORY_BGTR_ADDR 0x07ee 45 | 46 | 47 | // FUSE definitions 48 | #define FUSE_WORD_ADDR 0x07ff 49 | #define FUSE_RES_BITS_HIGH 0x017C // - - B B 0 0 0 1 D 1 1 1 1 1 0 S => 0x017C 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_PB4_PB7_NORMAL 0x0000 //(D) 53 | #define FUSE_PB4_PB7_STRONG (1 << 7) 54 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 55 | #define FUSE_BOOTUP_FAST (3 << 12) 56 | 57 | 58 | // Register address definitions 59 | #define FLAG_ADDR 0x00 60 | //0x01 61 | #define SP_ADDR 0x02 62 | #define CLKMD_ADDR 0x03 63 | #define INTEN_ADDR 0x04 64 | #define INTRQ_ADDR 0x05 65 | #define T16M_ADDR 0x06 66 | //0x07 67 | //0x08 68 | //0x09 69 | #define EOSCR_ADDR 0x0a 70 | #define IHRCR_ADDR 0x0b 71 | #define INTEGS_ADDR 0x0c 72 | #define PADIER_ADDR 0x0d 73 | #define PBDIER_ADDR 0x0e 74 | //0x0f 75 | #define PA_ADDR 0x10 76 | #define PAC_ADDR 0x11 77 | #define PAPH_ADDR 0x12 78 | #define PAPL_ADDR 0x13 79 | //0x14 80 | #define PB_ADDR 0x15 81 | #define PBC_ADDR 0x16 82 | #define PBPH_ADDR 0x17 83 | #define PBPL_ADDR 0x18 84 | //0x19 85 | //... 86 | //0x1f 87 | #define ADCC_ADDR 0x20 88 | #define ADCM_ADDR 0x21 89 | #define ADCR_ADDR 0x22 90 | //0x23 91 | //0x24 92 | //0x25 93 | #define MISC_ADDR 0x26 94 | #define MISC2_ADDR 0x27 95 | #define MISCLVR_ADDR 0x28 96 | //0x2a 97 | #define GPCC_ADDR 0x2b 98 | #define GPCS_ADDR 0x2c 99 | //0x2d 100 | //0x2e 101 | //0x2f 102 | #define TM2C_ADDR 0x30 103 | #define TM2CT_ADDR 0x31 104 | #define TM2S_ADDR 0x32 105 | #define TM2B_ADDR 0x33 106 | #define TM3C_ADDR 0x34 107 | #define TM3CT_ADDR 0x35 108 | #define TM3S_ADDR 0x36 109 | #define TM3B_ADDR 0x37 110 | //0x38 111 | //0x3a 112 | #define ILRCR_ADDR 0x3b 113 | #define BGTR_ADDR 0x3c 114 | #define ROP_ADDR 0x3d 115 | //0x3e 116 | //0x3f 117 | 118 | 119 | // ROP register BIT definitions 120 | #define ROP_PB0_PA4_SEL_BIT 0 121 | #define ROP_PA0_PB5_SEL_BIT 1 122 | #define ROP_TMX_BIT_SEL_BIT 4 123 | #define ROP_TMX_FREQ_SEL_BIT 5 124 | #define ROP_PWM_SEL_BIT 6 125 | 126 | 127 | // Peripheral definitions 128 | #define __PDK_HAS_COMP 129 | #define __PDK_HAS_EOSC 130 | #define __PDK_HAS_PORTB 131 | #define __PDK_HAS_PB5_PA4_INT 132 | #define __PDK_HAS_TM3 133 | #define __PDK_HAS_ADC 134 | 135 | #include "periph/accumulator.h" 136 | #include "periph/stack.h" 137 | #include "periph/clock.h" 138 | #include "periph/external_oscillator.h" 139 | #include "periph/interrupt.h" 140 | #include "periph/port_a.h" 141 | #include "periph/port_b.h" 142 | #include "periph/timer_16.h" 143 | #include "periph/timer_2.h" 144 | #include "periph/timer_3.h" 145 | #include "periph/bandgap.h" 146 | #include "periph/comparator.h" 147 | #include "periph/adc.h" 148 | #include "periph/misc.h" 149 | #include "periph/misc2.h" 150 | #include "periph/misclvr.h" 151 | #include "periph/rop.h" 152 | 153 | // Additional MISC register definitions 154 | // TODO: verify these... they are in the PFS172.INC file but not the datasheet 155 | #define MISC_EC_DRIVE_BIT 6 156 | 157 | #define MISC_EC_DRIVE_HIGH 0x00 158 | #define MISC_EC_DRIVE_LOW (1 << MISC_EC_DRIVE_BIT) 159 | 160 | // Additional MISC2 register definitions 161 | #define MISC2_PA6_TO_PA7_BIT 1 162 | #define MISC2_PB3_TO_PB4_BIT 2 163 | 164 | #define MISC2_PA6_TO_PA7 (1 << MISC2_PA6_TO_PA7_BIT) 165 | #define MISC2_PB3_TO_PB4 (1 << MISC2_PB3_TO_PB4_BIT) 166 | 167 | #endif //__PDK_DEVICE_PFS172_H__ 168 | -------------------------------------------------------------------------------- /include/pdk/device/pfs173.h: -------------------------------------------------------------------------------- 1 | /* 2 | pfs173.h: FUSE and Register Definitions for the Padauk PFS173 device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PFS173_H__ 28 | #define __PDK_DEVICE_PFS173_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pfs173.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk15) 37 | #error "PFS173 needs the PDK15 backend. You must compile with the -mpdk15 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 93000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_IHRCR_ADDR 0x0bed 44 | #define FACTORY_BGTR_ADDR 0x0bee 45 | 46 | 47 | // FUSE definitions 48 | #define FUSE_WORD_ADDR 0x0bff 49 | #define FUSE_RES_BITS_HIGH 0x62FC // - 1 1 B B 0 1 D 1 1 1 1 1 1 0 S 50 | // Blank IC Values 0x7FFF // - 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 (Security Off, PB4/PB5 Strong IO Drive, Fast Boot-up) 51 | #define FUSE_SECURITY_ON 0x0000 //(S) 52 | #define FUSE_SECURITY_OFF (1 << 0) 53 | #define FUSE_PB4_PB5_NORMAL 0x0000 //(D) 54 | #define FUSE_PB4_PB5_STRONG (1 << 8) 55 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 56 | #define FUSE_BOOTUP_FAST (3 << 11) 57 | 58 | 59 | // Register address definitions 60 | #define FLAG_ADDR 0x00 61 | //0x01 62 | #define SP_ADDR 0x02 63 | #define CLKMD_ADDR 0x03 64 | #define INTEN_ADDR 0x04 65 | #define INTRQ_ADDR 0x05 66 | #define T16M_ADDR 0x06 67 | //0x07 68 | //0x08 69 | //0x09 70 | #define EOSCR_ADDR 0x0a 71 | #define IHRCR_ADDR 0x0b 72 | #define INTEGS_ADDR 0x0c 73 | #define PADIER_ADDR 0x0d 74 | #define PBDIER_ADDR 0x0e 75 | #define PCDIER_ADDR 0x0f 76 | #define PA_ADDR 0x10 77 | #define PAC_ADDR 0x11 78 | #define PAPH_ADDR 0x12 79 | #define PB_ADDR 0x13 80 | #define PBC_ADDR 0x14 81 | #define PBPH_ADDR 0x15 82 | #define PC_ADDR 0x16 83 | #define PCC_ADDR 0x17 84 | #define PCPH_ADDR 0x18 85 | #define PBPL_ADDR 0x19 86 | #define PCPL_ADDR 0x1a 87 | //0x1b 88 | //... 89 | //0x1f 90 | #define ADCC_ADDR 0x20 91 | #define ADCM_ADDR 0x21 92 | #define ADCR_ADDR 0x22 93 | #define ADCRL_ADDR 0x23 // Undocumented ADC low bit results 94 | #define ADCRGC_ADDR 0x24 95 | //0x25 96 | #define MISC_ADDR 0x26 97 | #define MISC2_ADDR 0x27 98 | #define MISCLVR_ADDR 0x28 99 | //0x2a 100 | #define GPCC_ADDR 0x2b 101 | #define GPCS_ADDR 0x2c 102 | #define RFCC_ADDR 0x2d // Undocumented RFC peripheral 103 | #define RFCCRH_ADDR 0x2e 104 | #define RFCCRL_ADDR 0x2f 105 | #define TM2C_ADDR 0x30 106 | #define TM2CT_ADDR 0x31 107 | #define TM2S_ADDR 0x32 108 | #define TM2B_ADDR 0x33 109 | #define TM3C_ADDR 0x34 110 | #define TM3CT_ADDR 0x35 111 | #define TM3S_ADDR 0x36 112 | #define TM3B_ADDR 0x37 113 | //0x38 114 | //... 115 | //0x3f 116 | #define PWMG0C_ADDR 0x40 117 | #define PWMGCLK_ADDR 0x41 118 | #define PWMG0DTH_ADDR 0x42 119 | #define PWMG0DTL_ADDR 0x43 120 | #define PWMGCUBH_ADDR 0x44 121 | #define PWMGCUBL_ADDR 0x45 122 | #define PWMG1C_ADDR 0x46 123 | //0x47 124 | #define PWMG1DTH_ADDR 0x48 125 | #define PWMG1DTL_ADDR 0x49 126 | //0x4a 127 | //0x4b 128 | #define PWMG2C_ADDR 0x4c 129 | //0x4d 130 | #define PWMG2DTH_ADDR 0x4e 131 | #define PWMG2DTL_ADDR 0x4f 132 | //0x50 133 | //... 134 | //0x61 135 | #define ILRCR_ADDR 0x60 136 | #define BGTR_ADDR 0x63 137 | //0x64 138 | //0x65 139 | //0x66 140 | #define ROP_ADDR 0x67 141 | 142 | 143 | // ROP register BIT definitions 144 | #define ROP_PB0_PA4_SEL_BIT 0 145 | #define ROP_PA0_PB5_SEL_BIT 1 146 | #define ROP_TMX_BIT_SEL_BIT 4 147 | #define ROP_TMX_FREQ_SEL_BIT 5 148 | #define ROP_PWM_SEL_BIT 6 149 | #define ROP_PWM_FREQ_SEL_BIT 7 150 | 151 | 152 | // Peripheral definitions 153 | #define __PDK_HAS_COMP 154 | #define __PDK_HAS_EOSC 155 | #define __PDK_HAS_PORTB 156 | #define __PDK_HAS_PORTC 157 | #define __PDK_HAS_PB5_PA4_INT 158 | #define __PDK_HAS_TM3 159 | #define __PDK_HAS_PWMG 160 | #define __PDK_HAS_ADC 161 | #define __PDK_HAS_LCD 162 | 163 | #include "periph/accumulator.h" 164 | #include "periph/stack.h" 165 | #include "periph/clock.h" 166 | #include "periph/external_oscillator.h" 167 | #include "periph/interrupt.h" 168 | #include "periph/port_a.h" 169 | #include "periph/port_b.h" 170 | #include "periph/port_c.h" 171 | #include "periph/timer_16.h" 172 | #include "periph/timer_2.h" 173 | #include "periph/timer_3.h" 174 | #include "periph/bandgap.h" 175 | #include "periph/comparator.h" 176 | #include "periph/adc.h" 177 | #include "periph/pwmg_basic.h" 178 | #include "periph/misc.h" 179 | #include "periph/misc2.h" 180 | #include "periph/misclvr.h" 181 | #include "periph/rfc.h" 182 | #include "periph/rop.h" 183 | 184 | #endif //__PDK_DEVICE_PFS173_H__ 185 | -------------------------------------------------------------------------------- /include/pdk/device/pms131.h: -------------------------------------------------------------------------------- 1 | /* 2 | pms131.h: FUSE and Register Definitions for the Padauk PMS131 device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PMS131_H__ 28 | #define __PDK_DEVICE_PMS131_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pms131.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PMS131 needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 37000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_BGTR_ADDR 0x05f6 44 | 45 | 46 | // FUSE definitions 47 | #define FUSE_WORD_ADDR 0x05ff 48 | #define FUSE_RES_BITS_HIGH 0x3C1C // - - 1 1 1 1 0 0 L L L 1 1 1 0 S 49 | // Blank IC Values ??? 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_LVR_4V1 0x0000 //(L) 53 | #define FUSE_LVR_3V6 (1 << 5) 54 | #define FUSE_LVR_3V1 (2 << 5) 55 | #define FUSE_LVR_2V8 (3 << 5) 56 | #define FUSE_LVR_2V5 (4 << 5) 57 | #define FUSE_LVR_1V8 (5 << 5) 58 | #define FUSE_LVR_2V2 (6 << 5) 59 | #define FUSE_LVR_2V (7 << 5) 60 | 61 | 62 | // Register address definitions 63 | #define FLAG_ADDR 0x00 64 | //0x01 65 | #define SP_ADDR 0x02 66 | #define CLKMD_ADDR 0x03 67 | #define INTEN_ADDR 0x04 68 | #define INTRQ_ADDR 0x05 69 | #define T16M_ADDR 0x06 70 | //0x07 71 | #define MULOP_ADDR 0x08 72 | #define MULRH_ADDR 0x09 73 | #define TM2B_ADDR 0x09 74 | #define EOSCR_ADDR 0x0a 75 | #define IHRCR_ADDR 0x0b 76 | #define INTEGS_ADDR 0x0c 77 | #define PADIER_ADDR 0x0d 78 | #define PBDIER_ADDR 0x0e 79 | //0x0f 80 | #define PA_ADDR 0x10 81 | #define PAC_ADDR 0x11 82 | #define PAPH_ADDR 0x12 83 | //0x13 84 | #define PB_ADDR 0x14 85 | #define PBC_ADDR 0x15 86 | #define PBPH_ADDR 0x16 87 | //0x17 88 | //... 89 | //0x1a 90 | #define MISC_ADDR 0x1b 91 | #define ADCRGC_ADDR 0x1c 92 | //0x1d 93 | //0x1e 94 | //0x1f 95 | #define ADCC_ADDR 0x20 96 | #define ADCM_ADDR 0x21 97 | #define ADCRH_ADDR 0x22 98 | #define ADCRL_ADDR 0x23 99 | #define TM3B_ADDR 0x23 100 | //0x24 101 | #define RESET_ADDR 0x26 102 | //0x26 103 | //... 104 | //0x2d 105 | #define TM3C_ADDR 0x2e 106 | #define TM3CT_ADDR 0x2f 107 | //0x30 108 | //... 109 | //0x35 110 | #define BGTR_ADDR 0x36 111 | #define TM2S_ADDR 0x37 112 | //0x38 113 | #define TM3S_ADDR 0x39 114 | #define ROP_ADDR 0x3a 115 | //0x3b 116 | #define TM2C_ADDR 0x3c 117 | #define TM2CT_ADDR 0x3d 118 | //0x3e 119 | //0x3f 120 | 121 | 122 | // ROP register BIT definitions 123 | #define ROP_PB0_PA4_SEL_BIT 0 124 | #define ROP_PA0_PB5_SEL_BIT 1 125 | 126 | 127 | // Peripheral definitions 128 | #define __PDK_HAS_EOSC 129 | #define __PDK_HAS_PORTB 130 | #define __PDK_HAS_PB5_PA4_INT 131 | #define __PDK_HAS_TM3 132 | #define __PDK_HAS_ADC 133 | #define __PDK_HAS_ADC_12BIT 134 | 135 | #include "periph/accumulator.h" 136 | #include "periph/multiplier.h" 137 | #include "periph/stack.h" 138 | #include "periph/clock.h" 139 | #include "periph/external_oscillator.h" 140 | #include "periph/interrupt.h" 141 | #include "periph/port_a.h" 142 | #include "periph/port_b.h" 143 | #include "periph/timer_16.h" 144 | #include "periph/timer_2.h" 145 | #include "periph/timer_3.h" 146 | #include "periph/bandgap.h" 147 | #include "periph/adc.h" 148 | #include "periph/misc.h" 149 | #include "periph/rop.h" 150 | 151 | // Override some defaults 152 | // (not sure why these wouldn't be supported but they are not defined either in the .INC file or the datasheet) 153 | #undef CLKMD_ILRC_DIV16 154 | #undef TM2C_CLK_EOSC 155 | #undef TM3C_CLK_EOSC 156 | 157 | // Additional MISC register definitions 158 | #define MISC_LVR_FAST_RECOVER_BIT 3 159 | #define MISC_EC_DRIVE_BIT 6 160 | 161 | #define MISC_LVR_NORMAL_RECOVER 0x00 162 | #define MISC_LVR_FAST_RECOVER (1 << MISC_LVR_RECOVER_BIT) 163 | 164 | #define MISC_EC_DRIVE_HIGH 0x00 165 | #define MISC_EC_DRIVE_LOW (1 << MISC_EC_DRIVE_BIT) 166 | 167 | #endif //__PDK_DEVICE_PMS152_H__ 168 | -------------------------------------------------------------------------------- /include/pdk/device/pms150c.h: -------------------------------------------------------------------------------- 1 | /* 2 | pms150c.h: FUSE and Register Definitions for the Padauk PMS150C device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PMS150C_H__ 28 | #define __PDK_DEVICE_PMS150C_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pms150c.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk13) 37 | #error "PMS150C/PMS15A needs the PDK13 backend. You must compile with the -mpdk13 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 59000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_BGTR_ADDR 0x03f6 44 | 45 | 46 | // FUSE definitions 47 | #define FUSE_WORD_ADDR 0x03ff 48 | #define FUSE_RES_BITS_HIGH 0x0260 // - - - 0 B B 1 0 D 1 1 L L L 0 S 49 | // Blank IC Values 0x0FFD // - - - 0 1 1 1 1 1 1 1 1 1 1 0 1 (Security Off, 2.0V LVR, Normal IO Drive, Fast Boot-up) 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_LVR_4V 0x0000 //(L) 53 | #define FUSE_LVR_3V5 (1 << 2) 54 | #define FUSE_LVR_3V (2 << 2) 55 | #define FUSE_LVR_2V75 (3 << 2) 56 | #define FUSE_LVR_2V5 (4 << 2) 57 | #define FUSE_LVR_1V8 (5 << 2) 58 | #define FUSE_LVR_2V2 (6 << 2) 59 | #define FUSE_LVR_2V (7 << 2) 60 | #define FUSE_IO_DRV_LOW 0x0000 //(D) 61 | #define FUSE_IO_DRV_NORMAL (1 << 7) 62 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 63 | #define FUSE_BOOTUP_FAST (3 << 10) 64 | 65 | 66 | // Register address definitions 67 | #define FLAG_ADDR 0x00 68 | //0x01 69 | #define SP_ADDR 0x02 70 | #define CLKMD_ADDR 0x03 71 | #define INTEN_ADDR 0x04 72 | #define INTRQ_ADDR 0x05 73 | #define T16M_ADDR 0x06 74 | //0x07 75 | //0x08 76 | #define TM2B_ADDR 0x09 77 | #define EOSCR_ADDR 0x0a 78 | #define IHRCR_ADDR 0x0b 79 | #define INTEGS_ADDR 0x0c 80 | #define PADIER_ADDR 0x0d 81 | //0x0e 82 | //0x0f 83 | #define PA_ADDR 0x10 84 | #define PAC_ADDR 0x11 85 | #define PAPH_ADDR 0x12 86 | //0x13 87 | //... 88 | //0x16 89 | #define TM2S_ADDR 0x17 90 | //0x18 91 | #define BGTR_ADDR 0x19 92 | #define GPCC_ADDR 0x1a 93 | #define MISC_ADDR 0x1b 94 | #define TM2C_ADDR 0x1c 95 | #define TM2CT_ADDR 0x1d 96 | #define GPCS_ADDR 0x1e 97 | #define ILRCR_ADDR 0x1f 98 | 99 | 100 | // Peripheral definitions 101 | #define __PDK_HAS_COMP 102 | #define __PDK_HAS_COMP_WAKEUP 103 | #define __PDK_HAS_COMP_INT_EDGE 104 | 105 | #include "periph/accumulator.h" 106 | #include "periph/stack.h" 107 | #include "periph/clock.h" 108 | #include "periph/external_oscillator.h" 109 | #include "periph/interrupt.h" 110 | #include "periph/port_a.h" 111 | #include "periph/timer_16.h" 112 | #include "periph/timer_2.h" 113 | #include "periph/bandgap.h" 114 | #include "periph/comparator.h" 115 | #include "periph/misc.h" 116 | 117 | #endif //__PDK_DEVICE_PMS150C_H__ 118 | -------------------------------------------------------------------------------- /include/pdk/device/pms152.h: -------------------------------------------------------------------------------- 1 | /* 2 | pms152.h: FUSE and Register Definitions for the Padauk PMS152 device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PMS152_H__ 28 | #define __PDK_DEVICE_PMS152_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pms152.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PMS152 needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 55000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_BGTR_ADDR 0x04f6 44 | 45 | 46 | // FUSE definitions 47 | #define FUSE_WORD_ADDR 0x04ff 48 | #define FUSE_RES_BITS_HIGH 0x11FC // - - 0 1 B B 0 1 1 1 1 1 1 1 0 S 49 | // Blank IC Values 0x1FFD // - - 0 1 1 1 1 1 1 1 1 1 1 1 0 1 (Security Off, Fast Boot-up) 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 53 | #define FUSE_BOOTUP_FAST (3 << 10) 54 | 55 | 56 | // Register address definitions 57 | #define FLAG_ADDR 0x00 58 | //0x01 59 | #define SP_ADDR 0x02 60 | #define CLKMD_ADDR 0x03 61 | #define INTEN_ADDR 0x04 62 | #define INTRQ_ADDR 0x05 63 | #define T16M_ADDR 0x06 64 | //0x07 65 | #define MISC_ADDR 0x08 66 | #define TM2B_ADDR 0x09 67 | #define EOSCR_ADDR 0x0a 68 | #define IHRCR_ADDR 0x0b 69 | #define INTEGS_ADDR 0x0c 70 | #define PADIER_ADDR 0x0d 71 | #define PBDIER_ADDR 0x0e 72 | #define MISC2_ADDR 0x0f 73 | #define PA_ADDR 0x10 74 | #define PAC_ADDR 0x11 75 | #define PAPH_ADDR 0x12 76 | //0x13 77 | #define PB_ADDR 0x14 78 | #define PBC_ADDR 0x15 79 | #define PBPH_ADDR 0x16 80 | #define TM2S_ADDR 0x17 81 | #define GPCC_ADDR 0x18 82 | #define GPCS_ADDR 0x19 83 | #define BGTR_ADDR 0x1a 84 | #define MISCLVR_ADDR 0x1b 85 | #define TM2C_ADDR 0x1c 86 | #define TM2CT_ADDR 0x1d 87 | //0x1e 88 | //0x1f 89 | #define PWMG0C_ADDR 0x20 90 | #define PWMGCLK_ADDR 0x21 91 | #define PWMG0DTH_ADDR 0x22 92 | #define PWMG0DTL_ADDR 0x23 93 | #define PWMGCUBH_ADDR 0x24 94 | #define PWMGCUBL_ADDR 0x25 95 | #define PWMG1C_ADDR 0x26 96 | //0x47 97 | #define PWMG1DTH_ADDR 0x28 98 | #define PWMG1DTL_ADDR 0x29 99 | //0x4a 100 | //0x4b 101 | #define PWMG2C_ADDR 0x2c 102 | //0x4d 103 | #define PWMG2DTH_ADDR 0x2e 104 | #define PWMG2DTL_ADDR 0x2f 105 | //0x30 106 | //... 107 | //0x38 108 | #define ILRCR_ADDR 0x39 109 | #define ROP_ADDR 0x3a 110 | //0x3b 111 | //... 112 | //0x3f 113 | 114 | 115 | // ROP register BIT definitions 116 | #define ROP_PB0_PA4_SEL_BIT 0 117 | #define ROP_PA0_PB5_SEL_BIT 1 118 | #define ROP_TMX_BIT_SEL_BIT 4 119 | #define ROP_TMX_FREQ_SEL_BIT 5 120 | #define ROP_PWM_SEL_BIT 6 121 | #define ROP_PWM_FREQ_SEL_BIT 7 122 | 123 | 124 | // Peripheral definitions 125 | #define __PDK_HAS_COMP 126 | #define __PDK_HAS_EOSC 127 | #define __PDK_HAS_PORTB 128 | #define __PDK_HAS_PB5_PA4_INT 129 | #define __PDK_HAS_PWMG 130 | 131 | #include "periph/accumulator.h" 132 | #include "periph/stack.h" 133 | #include "periph/clock.h" 134 | #include "periph/external_oscillator.h" 135 | #include "periph/interrupt.h" 136 | #include "periph/port_a.h" 137 | #include "periph/port_b.h" 138 | #include "periph/timer_16.h" 139 | #include "periph/timer_2.h" 140 | #include "periph/bandgap.h" 141 | #include "periph/comparator.h" 142 | #include "periph/pwmg_basic.h" 143 | #include "periph/misc.h" 144 | #include "periph/misc2.h" 145 | #include "periph/misclvr.h" 146 | #include "periph/rop.h" 147 | 148 | #endif //__PDK_DEVICE_PMS152_H__ 149 | -------------------------------------------------------------------------------- /include/pdk/device/pms154b.h: -------------------------------------------------------------------------------- 1 | /* 2 | pms154b.h: FUSE and Register Definitions for the Padauk PMS154B device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PMS154B_H__ 28 | #define __PDK_DEVICE_PMS154B_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pms154b.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PMS154B needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 70000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_BGTR_ADDR 0x07f6 44 | 45 | 46 | // FUSE definitions 47 | #define FUSE_WORD_ADDR 0x07ff 48 | #define FUSE_RES_BITS_HIGH 0x1040 // - - 0 1 B B 0 D 0 1 0 L L L 0 S 49 | // Blank IC Values ??? 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_LVR_4V 0x0000 //(L) 53 | #define FUSE_LVR_3V5 (1 << 2) 54 | #define FUSE_LVR_3V (2 << 2) 55 | #define FUSE_LVR_2V75 (3 << 2) 56 | #define FUSE_LVR_2V5 (4 << 2) 57 | #define FUSE_LVR_1V8 (5 << 2) 58 | #define FUSE_LVR_2V2 (6 << 2) 59 | #define FUSE_LVR_2V (7 << 2) 60 | #define FUSE_IO_DRV_LOW 0x0000 //(D) 61 | #define FUSE_IO_DRV_NORMAL (1 << 8) 62 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 63 | #define FUSE_BOOTUP_FAST (3 << 10) 64 | 65 | 66 | // Register address definitions 67 | #define FLAG_ADDR 0x00 68 | //0x01 69 | #define SP_ADDR 0x02 70 | #define CLKMD_ADDR 0x03 71 | #define INTEN_ADDR 0x04 72 | #define INTRQ_ADDR 0x05 73 | #define T16M_ADDR 0x06 74 | //0x07 75 | #define MISC_ADDR 0x08 76 | #define TM2B_ADDR 0x09 77 | #define EOSCR_ADDR 0x0a 78 | #define IHRCR_ADDR 0x0b 79 | #define INTEGS_ADDR 0x0c 80 | #define PADIER_ADDR 0x0d 81 | #define PBDIER_ADDR 0x0e 82 | //0x0f 83 | #define PA_ADDR 0x10 84 | #define PAC_ADDR 0x11 85 | #define PAPH_ADDR 0x12 86 | //0x13 87 | #define PB_ADDR 0x14 88 | #define PBC_ADDR 0x15 89 | #define PBPH_ADDR 0x16 90 | #define TM2S_ADDR 0x17 91 | #define GPCC_ADDR 0x18 92 | #define GPCS_ADDR 0x19 93 | #define BGTR_ADDR 0x1a 94 | //0x1b 95 | #define TM2C_ADDR 0x1c 96 | #define TM2CT_ADDR 0x1d 97 | //0x1e 98 | //0x1f 99 | #define PWMG0C_ADDR 0x20 100 | #define PWMG0S_ADDR 0x21 101 | #define PWMG0DTH_ADDR 0x22 102 | #define PWMG0DTL_ADDR 0x23 103 | #define PWMG0CUBH_ADDR 0x24 104 | #define PWMG0CUBL_ADDR 0x25 105 | //0x26 106 | //... 107 | //0x31 108 | #define TM3C_ADDR 0x32 109 | #define TM3CT_ADDR 0x33 110 | #define TM3S_ADDR 0x34 111 | #define TM3B_ADDR 0x35 112 | //0x36 113 | //0x37 114 | //0x38 115 | #define ILRCR_ADDR 0x39 116 | //0x3a 117 | //... 118 | //0x3f 119 | 120 | 121 | // Peripheral definitions 122 | #define __PDK_HAS_COMP 123 | #define __PDK_HAS_EOSC 124 | #define __PDK_HAS_PORTB 125 | #define __PDK_HAS_TM3 126 | #define __PDK_HAS_PWMG 127 | #define __PDK_HAS_LCD 128 | 129 | #include "periph/accumulator.h" 130 | #include "periph/stack.h" 131 | #include "periph/clock.h" 132 | #include "periph/external_oscillator.h" 133 | #include "periph/interrupt.h" 134 | #include "periph/port_a.h" 135 | #include "periph/port_b.h" 136 | #include "periph/timer_16.h" 137 | #include "periph/timer_2.h" 138 | #include "periph/timer_3.h" 139 | #include "periph/bandgap.h" 140 | #include "periph/comparator.h" 141 | #include "periph/pwmg_0.h" 142 | #include "periph/misc.h" 143 | 144 | #endif //__PDK_DEVICE_PMS154B_H__ 145 | -------------------------------------------------------------------------------- /include/pdk/device/pms154c.h: -------------------------------------------------------------------------------- 1 | /* 2 | pms154c.h: FUSE and Register Definitions for the Padauk PMS154C device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PMS154C_H__ 28 | #define __PDK_DEVICE_PMS154C_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pms154c.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PMS154C needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 70000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_BGTR_ADDR 0x07f6 44 | 45 | 46 | // FUSE definitions 47 | #define FUSE_WORD_ADDR 0x07ff 48 | #define FUSE_RES_BITS_HIGH 0x1040 // - - 0 1 B B 0 D 0 1 0 L L L 0 S 49 | // Blank IC Values ??? 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_LVR_4V 0x0000 //(L) 53 | #define FUSE_LVR_3V5 (1 << 2) 54 | #define FUSE_LVR_3V (2 << 2) 55 | #define FUSE_LVR_2V75 (3 << 2) 56 | #define FUSE_LVR_2V5 (4 << 2) 57 | #define FUSE_LVR_1V8 (5 << 2) 58 | #define FUSE_LVR_2V2 (6 << 2) 59 | #define FUSE_LVR_2V (7 << 2) 60 | #define FUSE_IO_DRV_LOW 0x0000 //(D) 61 | #define FUSE_IO_DRV_NORMAL (1 << 8) 62 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 63 | #define FUSE_BOOTUP_FAST (3 << 10) 64 | 65 | 66 | // Register address definitions 67 | #define FLAG_ADDR 0x00 68 | //0x01 69 | #define SP_ADDR 0x02 70 | #define CLKMD_ADDR 0x03 71 | #define INTEN_ADDR 0x04 72 | #define INTRQ_ADDR 0x05 73 | #define T16M_ADDR 0x06 74 | //0x07 75 | #define MISC_ADDR 0x08 76 | #define TM2B_ADDR 0x09 77 | #define EOSCR_ADDR 0x0a 78 | #define IHRCR_ADDR 0x0b 79 | #define INTEGS_ADDR 0x0c 80 | #define PADIER_ADDR 0x0d 81 | #define PBDIER_ADDR 0x0e 82 | #define MISC2_ADDR 0x0f 83 | #define PA_ADDR 0x10 84 | #define PAC_ADDR 0x11 85 | #define PAPH_ADDR 0x12 86 | //0x13 87 | #define PB_ADDR 0x14 88 | #define PBC_ADDR 0x15 89 | #define PBPH_ADDR 0x16 90 | #define TM2S_ADDR 0x17 91 | #define GPCC_ADDR 0x18 92 | #define GPCS_ADDR 0x19 93 | #define BGTR_ADDR 0x1a 94 | //0x1b 95 | #define TM2C_ADDR 0x1c 96 | #define TM2CT_ADDR 0x1d 97 | //0x1e 98 | //0x1f 99 | #define PWMG0C_ADDR 0x20 100 | #define PWMG0S_ADDR 0x21 101 | #define PWMG0DTH_ADDR 0x22 102 | #define PWMG0DTL_ADDR 0x23 103 | #define PWMG0CUBH_ADDR 0x24 104 | #define PWMG0CUBL_ADDR 0x25 105 | #define PWMG1C_ADDR 0x26 106 | #define PWMG1S_ADDR 0x27 107 | #define PWMG1DTH_ADDR 0x28 108 | #define PWMG1DTL_ADDR 0x29 109 | #define PWMG1CUBH_ADDR 0x2a 110 | #define PWMG1CUBL_ADDR 0x2b 111 | #define PWMG2C_ADDR 0x2c 112 | #define PWMG2S_ADDR 0x2d 113 | #define PWMG2DTH_ADDR 0x2e 114 | #define PWMG2DTL_ADDR 0x2f 115 | #define PWMG2CUBH_ADDR 0x30 116 | #define PWMG2CUBL_ADDR 0x31 117 | #define TM3C_ADDR 0x32 118 | #define TM3CT_ADDR 0x33 119 | #define TM3S_ADDR 0x34 120 | #define TM3B_ADDR 0x35 121 | //0x36 122 | //0x37 123 | //0x38 124 | #define ILRCR_ADDR 0x39 125 | //0x3a 126 | //... 127 | //0x3f 128 | 129 | 130 | // Peripheral definitions 131 | #define __PDK_HAS_COMP 132 | #define __PDK_HAS_EOSC 133 | #define __PDK_HAS_PORTB 134 | #define __PDK_HAS_TM3 135 | #define __PDK_HAS_PWMG 136 | #define __PDK_HAS_LCD 137 | 138 | #include "periph/accumulator.h" 139 | #include "periph/stack.h" 140 | #include "periph/clock.h" 141 | #include "periph/external_oscillator.h" 142 | #include "periph/interrupt.h" 143 | #include "periph/port_a.h" 144 | #include "periph/port_b.h" 145 | #include "periph/timer_16.h" 146 | #include "periph/timer_2.h" 147 | #include "periph/timer_3.h" 148 | #include "periph/bandgap.h" 149 | #include "periph/comparator.h" 150 | #include "periph/pwmg_0.h" 151 | #include "periph/pwmg_1.h" 152 | #include "periph/pwmg_2.h" 153 | #include "periph/misc.h" 154 | #include "periph/misc2.h" 155 | 156 | // Additional MISC2 register definitions 157 | #define MISC2_COMP_PWMG1_BIT0 3 158 | #define MISC2_TM3_PWMG2_BIT0 4 159 | 160 | #endif //__PDK_DEVICE_PMS154C_H__ 161 | -------------------------------------------------------------------------------- /include/pdk/device/pms171b.h: -------------------------------------------------------------------------------- 1 | /* 2 | pms171b.h: FUSE and Register Definitions for the Padauk PMS171B device. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_DEVICE_PMS171B_H__ 28 | #define __PDK_DEVICE_PMS171B_H__ 29 | 30 | #if !defined(__PDK_DEVICE_XXX_H__) 31 | #define __PDK_DEVICE_XXX_H__ "pms171b.h" 32 | #else 33 | #error "Attempt to include more than one "pdk/device/XXX.h" file." 34 | #endif 35 | 36 | #if !defined(__SDCC_pdk14) 37 | #error "PMS171B needs the PDK14 backend. You must compile with the -mpdk14 option." 38 | #endif 39 | 40 | #define ILRC_FREQ 50000 41 | 42 | // Factory Calibration address locations 43 | #define FACTORY_BGTR_ADDR 0x05f6 44 | 45 | 46 | // FUSE definitions 47 | #define FUSE_WORD_ADDR 0x05ff 48 | #define FUSE_RES_BITS_HIGH 0x10FC // - - 0 1 B B 0 D 1 1 1 1 1 1 0 S 49 | // Blank IC Values 0x1FFD // - - 0 1 1 1 1 1 1 1 1 1 1 1 0 1 (Security off, High PB4/PB5 Drive, Fast Boot-up) 50 | #define FUSE_SECURITY_ON 0x0000 //(S) 51 | #define FUSE_SECURITY_OFF (1 << 0) 52 | #define FUSE_PB4_PB5_NORMAL 0x0000 //(D) 53 | #define FUSE_PB4_PB5_STRONG (1 << 8) 54 | #define FUSE_BOOTUP_SLOW 0x0000 //(B) 55 | #define FUSE_BOOTUP_FAST (3 << 10) 56 | 57 | 58 | // Register address definitions 59 | #define FLAG_ADDR 0x00 60 | //0x01 61 | #define SP_ADDR 0x02 62 | #define CLKMD_ADDR 0x03 63 | #define INTEN_ADDR 0x04 64 | #define INTRQ_ADDR 0x05 65 | #define T16M_ADDR 0x06 66 | //0x07 67 | //0x08 68 | #define TM2B_ADDR 0x09 69 | #define EOSCR_ADDR 0x0a 70 | #define IHRCR_ADDR 0x0b 71 | #define INTEGS_ADDR 0x0c 72 | #define PADIER_ADDR 0x0d 73 | #define PBDIER_ADDR 0x0e 74 | #define MISC2_ADDR 0x0f 75 | #define PA_ADDR 0x10 76 | #define PAC_ADDR 0x11 77 | #define PAPH_ADDR 0x12 78 | //0x13 79 | #define PB_ADDR 0x14 80 | #define PBC_ADDR 0x15 81 | #define PBPH_ADDR 0x16 82 | #define MISC_ADDR 0x17 83 | #define GPCC_ADDR 0x18 84 | #define GPCS_ADDR 0x19 85 | #define BGTR_ADDR 0x1a 86 | //0x1b 87 | #define TM2C_ADDR 0x1c 88 | #define TM2CT_ADDR 0x1d 89 | #define TM2S_ADDR 0x1e 90 | //0x1f 91 | //... 92 | //0x31 93 | #define TM3C_ADDR 0x32 94 | #define TM3CT_ADDR 0x33 95 | #define TM3S_ADDR 0x34 96 | #define MISCLVR_ADDR 0x35 97 | //0x36 98 | //0x37 99 | #define PBPL_ADDR 0x38 100 | #define ILRCR_ADDR 0x39 101 | #define ROP_ADDR 0x3a 102 | #define ADCC_ADDR 0x3b 103 | #define ADCM_ADDR 0x3c 104 | #define ADCRGC_ADDR 0x3d 105 | #define ADCR_ADDR 0x3e 106 | #define TM3B_ADDR 0x3f 107 | 108 | 109 | // ROP register BIT definitions 110 | #define ROP_PB0_PA4_SEL_BIT 0 111 | #define ROP_PA0_PB5_SEL_BIT 1 112 | #define ROP_TM2_PB2_PB0_SEL_BIT 4 113 | #define ROP_TMX_FREQ_SEL_BIT 5 114 | #define ROP_PWM_SEL_BIT 6 115 | #define ROP_TMX_BIT_SEL_BIT 7 116 | 117 | 118 | // Peripheral definitions 119 | #define __PDK_HAS_COMP 120 | #define __PDK_HAS_COMP_WAKEUP 121 | #define __PDK_HAS_EOSC 122 | #define __PDK_HAS_PORTB 123 | #define __PDK_HAS_PB5_PA4_INT 124 | #define __PDK_HAS_TM3 125 | #define __PDK_HAS_ADC 126 | 127 | #include "periph/accumulator.h" 128 | #include "periph/stack.h" 129 | #include "periph/clock.h" 130 | #include "periph/external_oscillator.h" 131 | #include "periph/interrupt.h" 132 | #include "periph/port_a.h" 133 | #include "periph/port_b.h" 134 | #include "periph/timer_16.h" 135 | #include "periph/timer_2.h" 136 | #include "periph/timer_3.h" 137 | #include "periph/bandgap.h" 138 | #include "periph/comparator.h" 139 | #include "periph/adc.h" 140 | #include "periph/misc.h" 141 | #include "periph/misc2.h" 142 | #include "periph/misclvr.h" 143 | #include "periph/rop.h" 144 | 145 | // Additional MISC register definitions 146 | // TODO: verify these... they are in the PMS171B.INC file but not the datasheet 147 | #define MISC_EC_DRIVE_HIGH 0x00 148 | #define MISC_EC_DRIVE_LOW 0x40 149 | 150 | #endif //__PDK_DEVICE_PMS171B_H__ 151 | -------------------------------------------------------------------------------- /include/pdk/factory_calibration.h: -------------------------------------------------------------------------------- 1 | /* 2 | factory_calibration.h: Macros to allow using factory calibration values for internal oscillator (IHCR), and bandgap (BG). 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_FACTORY_CALIBRATION_H__ 28 | #define __PDK_FACTORY_CALIBRATION_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/factory_calibration.h" by itself." 32 | #endif 33 | 34 | typedef unsigned char (*getfactorycalibration_funcptr)(void); 35 | 36 | // Factory Calibration macros 37 | #if defined(FACTORY_IHRCR_ADDR) 38 | #define GET_FACTORY_IHRCR ((getfactorycalibration_funcptr)FACTORY_IHRCR_ADDR) 39 | #define PDK_USE_FACTORY_IHRCR_16MHZ() \ 40 | IHRCR = GET_FACTORY_IHRCR() 41 | #endif 42 | 43 | #if defined(FACTORY_BGTR_ADDR) 44 | #define GET_FACTORY_BGTR ((getfactorycalibration_funcptr)FACTORY_BGTR_ADDR) 45 | #define PDK_USE_FACTORY_BGTR() \ 46 | BGTR = GET_FACTORY_BGTR() 47 | #endif 48 | 49 | #endif //__PDK_FACTORY_CALIBRATION_H__ 50 | -------------------------------------------------------------------------------- /include/pdk/fuse.h: -------------------------------------------------------------------------------- 1 | /* 2 | fuse.h: Macros to allow setting the FUSE word at the appropriate location in the output file. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_FUSE_H__ 28 | #define __PDK_FUSE_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/fuse.h" by itself." 32 | #endif 33 | 34 | // FUSE macros 35 | #if defined(FUSE_WORD_ADDR) && defined(FUSE_RES_BITS_HIGH) 36 | #define PDK_SET_FUSE(f) \ 37 | __asm__( \ 38 | ".area FUSE (ABS) \n" \ 39 | ".org ("_STR(FUSE_WORD_ADDR)"*2) \n" \ 40 | ".word ("_STR(FUSE_RES_BITS_HIGH)"|"_STR(f)") \n" \ 41 | ".area CODE \n" \ 42 | ) 43 | #endif 44 | 45 | #endif //__PDK_FUSE_H__ 46 | -------------------------------------------------------------------------------- /include/pdk/sysclock.h: -------------------------------------------------------------------------------- 1 | /* 2 | sysclock.h: Macros to allow setting the system clock (CLKMD) to IHRC, ILRC, or EOSC with the specified clock divider. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_SYSCLOCK_H__ 28 | #define __PDK_SYSCLOCK_H__ 29 | 30 | #if !defined(__PDK_DEVICE_H__) 31 | #error "You must #include "pdk/device.h" instead of "pdk/sysclock.h" by itself." 32 | #endif 33 | 34 | // System Clock definitions 35 | #define SYSCLOCK_IHRC_16MHZ CLKMD_IHRC 36 | #define SYSCLOCK_IHRC_8MHZ CLKMD_IHRC_DIV2 37 | #define SYSCLOCK_IHRC_4MHZ CLKMD_IHRC_DIV4 38 | #define SYSCLOCK_IHRC_2MHZ CLKMD_IHRC_DIV8 39 | #define SYSCLOCK_IHRC_1MHZ CLKMD_IHRC_DIV16 40 | #define SYSCLOCK_IHRC_500KHZ CLKMD_IHRC_DIV32 41 | #define SYSCLOCK_IHRC_250KHZ CLKMD_IHRC_DIV64 42 | 43 | #define SYSCLOCK_ILRC CLKMD_ILRC 44 | #define SYSCLOCK_ILRC_DIV4 CLKMD_ILRC_DIV4 45 | #define SYSCLOCK_ILRC_DIV16 CLKMD_ILRC_DIV16 46 | 47 | #define SYSCLOCK_EOSC CLKMD_EOSC 48 | #define SYSCLOCK_EOSC_DIV2 CLKMD_EOSC_DIV2 49 | #define SYSCLOCK_EOSC_DIV4 CLKMD_EOSC_DIV4 50 | #define SYSCLOCK_EOSC_DIV8 CLKMD_EOSC_DIV8 51 | 52 | // System Clock macros 53 | #define PDK_SET_SYSCLOCK(f) CLKMD = (uint8_t)(CLKMD_ENABLE_ILRC | CLKMD_ENABLE_IHRC | f) 54 | 55 | #define PDK_DISABLE_IHRC() CLKMD &= ~CLKMD_ENABLE_IHRC 56 | #define PDK_DISABLE_ILRC() CLKMD &= ~CLKMD_ENABLE_ILRC 57 | #define PDK_DISABLE_INTERNAL_RCS() CLKMD &= ~(CLKMD_ENABLE_IHRC | CLKMD_ENABLE_ILRC) 58 | 59 | #define PDK_USE_16MHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_16MHZ) 60 | #define PDK_USE_8MHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_8MHZ) 61 | #define PDK_USE_4MHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_4MHZ) 62 | #define PDK_USE_2MHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_2MHZ) 63 | #define PDK_USE_1MHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_1MHZ) 64 | #define PDK_USE_500KHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_500KHZ) 65 | #define PDK_USE_250KHZ_IHRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_IHRC_250KHZ) 66 | 67 | #define PDK_USE_ILRC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_ILRC) 68 | #define PDK_USE_ILRC_DIV4_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_ILRC_DIV4) 69 | #define PDK_USE_ILRC_DIV16_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_ILRC_DIV16) 70 | 71 | // NOTES: 72 | // - EOSC must be enabled first 73 | // - IHRC and ILRC need to stay running until EOSC is stable 74 | #define PDK_USE_EOSC_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_EOSC) 75 | #define PDK_USE_EOSC_DIV2_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_EOSC_DIV2) 76 | #define PDK_USE_EOSC_DIV4_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_EOSC_DIV4) 77 | #define PDK_USE_EOSC_DIV8_SYSCLOCK() PDK_SET_SYSCLOCK(SYSCLOCK_EOSC_DIV8) 78 | 79 | #endif //__PDK_SYSCLOCK_H__ 80 | -------------------------------------------------------------------------------- /include/pdk/util.h: -------------------------------------------------------------------------------- 1 | /* 2 | util.h: Macros to allow using defines in assembler strings, and definitions for built-in opcodes. 3 | 4 | Copyright (C) 2020 serisman 5 | Copyright (C) 2019-2020 freepdk https://free-pdk.github.io 6 | 7 | This library is free software; you can redistribute it and/or modify it 8 | under the terms of the GNU General Public License as published by the 9 | Free Software Foundation; either version 2, or (at your option) any later version. 10 | 11 | This library is distributed in the hope that it will be useful, 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 | GNU General Public License for more details. 15 | 16 | You should have received a copy of the GNU General Public License 17 | along with this library. If not, see . 18 | 19 | As a special exception, if you link this library with other files, 20 | some of which are compiled with SDCC, to produce an executable, 21 | this library does not by itself cause the resulting executable to 22 | be covered by the GNU General Public License. This exception does 23 | not however invalidate any other reasons why the executable file 24 | might be covered by the GNU General Public License. 25 | */ 26 | 27 | #ifndef __PDK_UTIL_H__ 28 | #define __PDK_UTIL_H__ 29 | 30 | //macros so we can use defines in assembler strings 31 | #define _STRINGIFY(x) #x 32 | #define _STR(x) _STRINGIFY(x) 33 | #define _STR_VAR(x) "_"_STRINGIFY(x) 34 | #define _VAR(x) _ ## x 35 | 36 | //definitions for built in opcodes 37 | #define __nop() __asm__("nop\n") 38 | #define __engint() __asm__("engint\n") 39 | #define __disgint() __asm__("disgint\n") 40 | #define __stopsys() __asm__("stopsys\n") 41 | #define __stopexe() __asm__("stopexe\nnop\n") 42 | #define __reset() __asm__("reset\n") 43 | #define __wdreset() __asm__("wdreset\n") 44 | #define __set0(var,bit) __asm__("set0 "_STR_VAR(var)", #"_STR(bit)"\n") 45 | #define __set1(var,bit) __asm__("set1 "_STR_VAR(var)", #"_STR(bit)"\n") 46 | 47 | // BIT definitions 48 | #define BIT0 (1<<0) 49 | #define BIT1 (1<<1) 50 | #define BIT2 (1<<2) 51 | #define BIT3 (1<<3) 52 | #define BIT4 (1<<4) 53 | #define BIT5 (1<<5) 54 | #define BIT6 (1<<6) 55 | #define BIT7 (1<<7) 56 | 57 | #endif //__PDK_UTIL_H__ 58 | -------------------------------------------------------------------------------- /src/BitNetMCU_model.h: -------------------------------------------------------------------------------- 1 | // Automatically generated header file 2 | // Date: 2024-04-23 02:01:22.062916 3 | // Quantized model exported from pdk_Cosine_lr0.001_BitMnist_PerTensor_2bitsym_RMS_width16_16_16_bs128_epochs60.pth 4 | // Generated by exportquant.py 5 | 6 | #include 7 | 8 | #ifndef BITNETMCU_MODEL_H 9 | #define BITNETMCU_MODEL_H 10 | 11 | // Number of layers 12 | #define NUM_LAYERS 4 13 | 14 | // Maximum number of activations per layer 15 | #define MAX_N_ACTIVATIONS 16 16 | 17 | // Layer: L1 18 | // QuantType: 2bitsym 19 | #define L1_active 20 | #define L1_bitperweight 2 21 | #define L1_incoming_weights 64 22 | #define L1_outgoing_weights 16 23 | const uint8_t L1_weights[] = {0xaa, 0xef, 0x7a, 0xae, 0x96, 0xaa, 0xe6, 0x6a, 0xaa, 0xa6, 0x6e, 0x7e, 0x6a, 0xb9, 0xda, 0xa5, 0x65, 0xa5, 0xd6, 0xaa, 0x5f, 0x7a, 0xf6, 0xba, 0x7a, 0xe6, 0xae, 0x6a, 0xaa, 0x7a, 0xdb, 0xae, 0xea, 0xab, 0xda, 0xfd, 0x6e, 0xaa, 0xf5, 0xd5, 0xea, 0x5a, 0xe6, 0xae, 0x7f, 0xfe, 0x7a, 0xaf, 0x5e, 0xbf, 0x5e, 0xf5, 0x76, 0xbb, 0x49, 0x6a, 0x9b, 0xa6, 0xeb, 0xea, 0xee, 0xad, 0xea, 0xa9, 0x57, 0xff, 0xfa, 0xff, 0x59, 0x9f, 0xea, 0xf9, 0xee, 0xbe, 0xda, 0xba, 0x66, 0xb9, 0x5d, 0x7d, 0x77, 0xad, 0x7a, 0xfa, 0x7f, 0xa7, 0x6a, 0x9a, 0xea, 0xb5, 0xa9, 0x9b, 0xde, 0x6d, 0xd5, 0xa6, 0x56, 0xf9, 0xda, 0xad, 0xba, 0xaa, 0xba, 0xae, 0x6b, 0xeb, 0x65, 0xa9, 0xd9, 0xed, 0x7a, 0xd5, 0x5e, 0xbd, 0xe9, 0xe9, 0x99, 0xa9, 0xbe, 0xaa, 0xde, 0xea, 0x6b, 0x96, 0x77, 0x6d, 0xae, 0xb7, 0xdf, 0xf7, 0xe9, 0x6a, 0xaa, 0xaa, 0xea, 0xea, 0xee, 0x6b, 0xfa, 0xf5, 0xb6, 0xa9, 0xea, 0x57, 0xfd, 0xa5, 0xfa, 0xaa, 0xfa, 0xaa, 0x5a, 0xa9, 0x59, 0x66, 0x66, 0xa9, 0x5f, 0x67, 0x5a, 0xa5, 0xfb, 0xff, 0xe7, 0xb7, 0x6a, 0x95, 0xeb, 0xab, 0xfb, 0xb9, 0xea, 0xe9, 0xe6, 0x97, 0x9a, 0x9f, 0x5f, 0xed, 0x7d, 0xb9, 0x6a, 0x6a, 0x59, 0xa9, 0x6a, 0xab, 0xba, 0x97, 0x67, 0x59, 0xf5, 0x9d, 0xff, 0xd6, 0x9e, 0x9a, 0x56, 0xa5, 0x5a, 0x6a, 0x56, 0x95, 0xe9, 0xea, 0xdf, 0xeb, 0x57, 0x67, 0x5e, 0xaf, 0x76, 0xaa, 0x7a, 0xa6, 0x6a, 0x97, 0x6a, 0xba, 0xa5, 0x9d, 0x66, 0xea, 0xfa, 0x7f, 0x7f, 0xdd, 0x56, 0xad, 0x6a, 0x9a, 0xae, 0xf9, 0x6a, 0xe9, 0xea, 0xaa, 0x7e, 0x79, 0xe6, 0xad, 0xd6, 0xad, 0x57, 0x55, 0xad, 0x6a, 0xeb, 0xbb, 0xea, 0x9a, 0xea, 0xdf, 0x6a, 0xdb, 0xda, 0xab}; 24 | //first channel is topmost bit 25 | 26 | // Layer: L2 27 | // QuantType: 2bitsym 28 | #define L2_active 29 | #define L2_bitperweight 2 30 | #define L2_incoming_weights 16 31 | #define L2_outgoing_weights 16 32 | const uint8_t L2_weights[] = {0xa9, 0xbf, 0x5d, 0xeb, 0xb6, 0xae, 0xae, 0xae, 0xbb, 0xfa, 0xa9, 0xe7, 0x6b, 0x6a, 0x6b, 0xaa, 0xbe, 0x9e, 0xb6, 0xf5, 0x6f, 0xe6, 0xaa, 0xe9, 0xea, 0xaa, 0xab, 0xba, 0xae, 0x79, 0x66, 0xba, 0xba, 0xa6, 0xf9, 0xab, 0x9b, 0xa6, 0x7a, 0xaa, 0x95, 0xa9, 0xb9, 0xab, 0xaa, 0x6f, 0xab, 0xea, 0x99, 0xae, 0xff, 0xa6, 0xaa, 0xda, 0xba, 0xfe, 0x6d, 0xaa, 0xa9, 0x9b, 0xb6, 0x99, 0xea, 0xa6}; 33 | //first channel is topmost bit 34 | 35 | // Layer: L3 36 | // QuantType: 2bitsym 37 | #define L3_active 38 | #define L3_bitperweight 2 39 | #define L3_incoming_weights 16 40 | #define L3_outgoing_weights 16 41 | const uint8_t L3_weights[] = {0xea, 0x6b, 0xed, 0xaa, 0xeb, 0xa6, 0xef, 0xb9, 0x6a, 0xea, 0x79, 0xaf, 0xde, 0xee, 0xb6, 0xba, 0xa9, 0xa6, 0x9b, 0x6f, 0x9a, 0x69, 0xda, 0xaf, 0xa9, 0xaf, 0xae, 0x6b, 0xfe, 0x6b, 0xea, 0xae, 0xa9, 0x6a, 0xe9, 0xba, 0x99, 0x9f, 0xda, 0x79, 0x99, 0xba, 0x69, 0xba, 0xa6, 0x65, 0x6e, 0xe9, 0x6d, 0xab, 0xa7, 0xaa, 0x5f, 0xe6, 0x6e, 0x6b, 0xb5, 0xba, 0xaa, 0xb6, 0xab, 0xa6, 0xa6, 0x9a}; 42 | //first channel is topmost bit 43 | 44 | // Layer: L4 45 | // QuantType: 2bitsym 46 | #define L4_active 47 | #define L4_bitperweight 2 48 | #define L4_incoming_weights 16 49 | #define L4_outgoing_weights 10 50 | const uint8_t L4_weights[] = {0xae, 0xb6, 0xba, 0xae, 0x6b, 0xa9, 0xaa, 0xaa, 0xba, 0xfb, 0xba, 0xaf, 0xfa, 0xaa, 0x9d, 0x7b, 0xaa, 0xb6, 0xd6, 0xaa, 0xab, 0xab, 0x9a, 0xaf, 0x6b, 0xaa, 0xaa, 0xaa, 0xab, 0xea, 0xaa, 0x96, 0xee, 0xd7, 0xbf, 0x5a, 0x6a, 0xda, 0xfa, 0xaa}; 51 | //first channel is topmost bit 52 | 53 | #endif 54 | -------------------------------------------------------------------------------- /src/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # Sep 6th, 2020/cpldcpu Adopted for new include structure 19 | # ---------------------------------------------------------------- 20 | 21 | # Define your processor settings here 22 | 23 | # DEVICE = PMS150C 24 | # ARCH = pdk13 25 | # SOURCES = main.c 26 | 27 | DEVICE = PFS154 28 | ARCH = pdk14 29 | SOURCES = main.c PDK_softuart.c 30 | 31 | F_CPU = 8000000 32 | TARGET = main.ihx 33 | TARGET_VDD_MV = 5000 34 | 35 | # Toolchain settings. Usually does not need to be changed 36 | 37 | INCLUDE = ../include 38 | SDCC = sdcc 39 | SDLD = sdld 40 | SDAS = sdaspdk14 41 | OBJCOPY = sdobjcopy 42 | PROGRAMMER = easypdkprog 43 | BUILD_DIR = .build 44 | OUTPUT_DIR = .objects 45 | 46 | # Compiler flags 47 | 48 | ASFLAGS = -lo 49 | LDFLAGS = -m$(ARCH) --out-fmt-ihx 50 | CFLAGS = -m$(ARCH) -D$(DEVICE) -DF_CPU=$(F_CPU) --std-sdcc11 --opt-code-size 51 | CFLAGS += -DTARGET_VDD_MV=$(TARGET_VDD_MV) 52 | CFLAGS += -I. -I$(INCLUDE) 53 | 54 | # SOURCES := $(wildcard *.c) # $(LIBRARY)/*.c) 55 | # ASRC := $(wildcard *.s) # $(LIBRARY)/*.s) 56 | 57 | #OBJS = $(SRCS:.c=.rel) 58 | #OBJS += $(ASRCS:.s=.rel) 59 | 60 | OBJECTS = $(patsubst %.c,$(BUILD_DIR)/%.rel,$(SOURCES)) 61 | OBJECTS += $(patsubst %.s,$(BUILD_DIR)/%.rel,$(ASCR)) 62 | 63 | all: $(OUTPUT_DIR)/$(TARGET) size 64 | 65 | $(OUTPUT_DIR)/$(TARGET): $(OBJECTS) 66 | @mkdir -p $(dir $(OUTPUT_DIR)/$(TARGET)) 67 | $(SDCC) $(LDFLAGS) $(OBJECTS) -o $@ 68 | 69 | $(BUILD_DIR)/%.rel: %.s 70 | @mkdir -p $(dir $@) 71 | $(SDAS) $(ASFLAGS) $< 72 | 73 | $(BUILD_DIR)/%.rel: %.c 74 | @mkdir -p $(dir $@) 75 | $(SDCC) $(CFLAGS) -c $< -o $@ 76 | 77 | flash: all 78 | $(PROGRAMMER) -n $(DEVICE) write $(OUTPUT_DIR)/$(TARGET) --allowsecfuse 79 | 80 | start: 81 | $(PROGRAMMER) -n $(DEVICE) start 82 | 83 | compileandrun: all flash start 84 | 85 | size: 86 | $(OBJCOPY) -I ihex -O binary $(OUTPUT_DIR)/$(TARGET) $(OUTPUT_DIR)/$(TARGET).bin 87 | @echo =============== 88 | @echo Size of binary: 89 | @stat -L -c %s $(OUTPUT_DIR)/$(TARGET).bin 90 | @echo bytes 91 | @echo =============== 92 | 93 | clean: 94 | rm -r -f $(BUILD_DIR) $(OUTPUT_DIR) 95 | 96 | .PHONY: all clean flash 97 | -------------------------------------------------------------------------------- /src/PDK_softuart.c: -------------------------------------------------------------------------------- 1 | /* 2 | PDK software uart 3 | Size optimized soft UART functions to support printf style debuggin on Padauk MCUS. 4 | 5 | void PDK_autobaud(void); // autobaud for the easypdkprogrammer. This needs to be called before sending anything on the UART 6 | void PDK_sendchar(uint8_t); // Send a single char on the serial port. So far, no receving is possible. 7 | void PDK_sendstring(char *); // Sends a zero terminated string that can reside in RAM or ROM 8 | void PDK_senduint16(uint16_t); // Prints a decimal representation of a 16 bit unsigned value on the UART. 9 | 10 | September 20, 2019 cpldcpu - first version 11 | */ 12 | 13 | #include 14 | #include 15 | #include "softuart.h" 16 | 17 | volatile uint8_t uart_cntr; 18 | volatile uint8_t loopctr1,loopctr2; 19 | volatile uint8_t print_tmp[12]; 20 | 21 | void PDK_sendchar(uint8_t out) { 22 | out; 23 | __asm 24 | _transmitchar: 25 | set0 s(TXPORT), #TXPIN 26 | set1 s(TXPORTC), #TXPIN 27 | 28 | call uartdelay 29 | 30 | mov a, #0x08 31 | mov _uart_cntr, a 32 | sendloop: 33 | sr _PDK_sendchar_PARM_1 34 | 35 | #if defined __SDCC_pdk15 36 | .word (0x0710|0x5c00|(TXPIN<<7)) // work around bug in SDCC 37 | #else 38 | swapc s(TXPORT),#7 39 | #endif 40 | call uartdelay 41 | 42 | dzsn _uart_cntr 43 | goto sendloop 44 | 45 | set1 s(TXPORT), #TXPIN 46 | 47 | // calling overhead is 5 cycles 48 | // sendloop overhead is 5 cycles 49 | // = total of 10 cycle overhead 50 | uartdelay: 51 | mov a,#(((F_CPU/4)/BAUDRATE)-2) 52 | 0$: 53 | sub a,#1 // 4 cycles per loop 54 | t1sn f,z 55 | goto 0$ 56 | // ret 57 | __endasm; 58 | 59 | } 60 | 61 | void PDK_autobaud(void) { 62 | 63 | __asm 64 | mov a,#0x55 65 | mov _PDK_sendchar_PARM_1,a 66 | call _PDK_sendchar 67 | call uartdelay 68 | call uartdelay 69 | call uartdelay 70 | call uartdelay 71 | __endasm; 72 | } 73 | 74 | void PDK_sendstring(char *in) 75 | { 76 | in; 77 | __asm 78 | 1$: 79 | mov a, _PDK_sendstring_PARM_1+0 80 | mov p, a 81 | mov a, _PDK_sendstring_PARM_1+1 82 | call __gptrget 83 | cneqsn a, #0x00 84 | goto 2$ 85 | mov _PDK_sendchar_PARM_1+0, a 86 | inc _PDK_sendstring_PARM_1+0 87 | addc _PDK_sendstring_PARM_1+1 88 | call _PDK_sendchar 89 | goto 1$ 90 | 2$: 91 | __endasm; 92 | } 93 | // while (*in) PDK_sendchar(*in++); 94 | 95 | // ------------------------------------------------------- 96 | // print_hex8 97 | // 98 | // Accepts an uint9 value as parameter and outputs its 99 | // hexadecimal representation on the UART using "putchar". 100 | // ------------------------------------------------------- 101 | 102 | void PDK_sendhex8(uint8_t in) { 103 | uint8_t nib; 104 | nib=in>>4; 105 | PDK_sendchar(nib>9?nib+'A'-10:nib+'0'); 106 | 107 | nib=in&0x0f; 108 | PDK_sendchar(nib>9?nib+'A'-10:nib+'0'); 109 | } 110 | 111 | // ------------------------------------------------------- 112 | // print_uint16 113 | // 114 | // Accepts an uint16 value as parameter and outputs its 115 | // decimal representation on the UART using "putchar". 116 | // Optimized for size. See C code below for algorithm. 117 | // ------------------------------------------------------- 118 | 119 | void PDK_senduint16(uint16_t in) { 120 | PDK_senduint32((uint32_t) in); 121 | } 122 | 123 | void PDK_senduint32(uint32_t in) { 124 | 125 | in; 126 | 127 | __asm 128 | clear _print_tmp+11 ;store value >10 here to display leading zeroes 129 | 130 | mov a,#32 131 | mov _loopctr1,a 132 | ; mov _print_tmp+5,a 133 | print_uint16_loop$: 134 | sl _PDK_senduint32_PARM_1+0 135 | slc _PDK_senduint32_PARM_1+1 136 | slc _PDK_senduint32_PARM_1+2 137 | slc _PDK_senduint32_PARM_1+3 138 | pushaf ; save carry flag 139 | 140 | mov a, #(_print_tmp) 141 | mov p, a 142 | clear p+1 143 | 144 | mov a, #10 145 | mov _loopctr2,a 146 | 147 | print_uint16_innerloop$: 148 | popaf 149 | idxm a, p 150 | slc a 151 | idxm p,a 152 | add a, #-10 153 | t0sn f,c 154 | idxm p,a 155 | pushaf ; save carry flag 156 | 157 | inc p 158 | dzsn _loopctr2 159 | goto print_uint16_innerloop$ 160 | 161 | popaf 162 | 163 | dzsn _loopctr1 164 | goto print_uint16_loop$ 165 | 166 | mov a,#10 ; Iterate also though last element, which is used as a flag. p points to last element 167 | mov _loopctr1,a 168 | 169 | print_uint16_outloop$: 170 | idxm a, p 171 | ceqsn a, _print_tmp+11 ; skip leading zeros. Also skip last element in array 172 | call digitout 173 | 174 | dec p 175 | 176 | dzsn _loopctr1 177 | goto print_uint16_outloop$ 178 | 179 | idxm a, p ; rightmost digit is always printed 180 | 181 | digitout: 182 | add a, #0x30 183 | mov _PDK_sendchar_PARM_1+0, a 184 | mov _print_tmp+11,a ; Dont skip further zeros 185 | call _transmitchar ; Uses ret from transmitchar 186 | idxm p, a ; delete printed digits to erase buffer. Nonprinted digits are already zero. 187 | __endasm; 188 | } 189 | 190 | // ------------------------------------------------------ 191 | // C-Version, for reference. 192 | // Uses two step approach: 193 | // 1) Convert binary to BCD, one digit per byte 194 | // 2) Print array as ASCII. 195 | // ------------------------------------------------------ 196 | // void printnum(uint16_t num) { 197 | // char outbuf[5]={0,0,0,0,0}; 198 | // uint8_t i,k; 199 | // for (i=0; i<16; i++) { 200 | // uint8_t carry=0; 201 | // if (num&0x8000) carry=1; 202 | // num<<=1; 203 | // for (k=0; k<5; k++) { 204 | // outbuf[k]<<=1; 205 | // outbuf[k]|=carry; 206 | // carry=0; 207 | // if (outbuf[k]>=10) {outbuf[k]-=10; carry=1;} 208 | // } 209 | // } 210 | // k=4; 211 | // do { 212 | // putchar(outbuf[k]+'0'); 213 | // } while (k-->0); 214 | // } -------------------------------------------------------------------------------- /src/main.c: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------- 2 | * BitNetMCU - Low bit Neural Network Inference on Padauk MCU 3 | ---------------------------------------------------- */ 4 | 5 | #include 6 | #include 7 | #include 8 | #include "BitNetMCU_model.h" 9 | 10 | #include "softuart.h" 11 | #include 12 | 13 | #ifdef __SDCC_pdk14 14 | #define UART_OUTPUT 15 | #endif 16 | 17 | void fc_innerloop(uint8_t); 18 | void fc_innerloop_mem(uint8_t); 19 | uint8_t processalllayers( int8_t *activations); 20 | 21 | unsigned char _sdcc_external_startup(void) 22 | { 23 | 24 | CLKMD = CLKMD_IHRC_DIV2 | CLKMD_ENABLE_IHRC; // 16/2=8 Mhz main clock 25 | #ifdef __SDCC_pdk14 26 | PDK_USE_FACTORY_IHRCR_16MHZ(); 27 | #endif 28 | 29 | return 0; 30 | } 31 | 32 | const int8_t input_data_0[64] = {-6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -5.0, 7.0, -5.0, -6.0, -6.0, -6.0, -6.0, 4.0, 1.0, 17.0, -4.0, -6.0, -6.0, -6.0, -5.0, 18.0, 6.0, 19.0, 3.0, -6.0, -6.0, -6.0, -6.0, 10.0, 19.0, 31.0, 10.0, -6.0, -6.0, -6.0, -6.0, -5.0, 8.0, 23.0, -4.0, -6.0, -6.0, -6.0, -6.0, -6.0, -0.0, 18.0, -5.0, -6.0, -6.0, -6.0, -6.0, -6.0, -6.0, -2.0, -6.0, -6.0, -6.0}; 33 | const uint8_t label_0 = 4; 34 | const int8_t input_data_1[64] = {-7.0, -7.0, -7.0, -7.0, -7.0, -7.0, -7.0, -7.0, -7.0, -7.0, -7.0, -5.0, -3.0, -1.0, -5.0, -7.0, -7.0, -5.0, 12.0, 21.0, 17.0, 31.0, 4.0, -7.0, -7.0, -6.0, 2.0, 1.0, 8.0, 23.0, -4.0, -7.0, -7.0, -7.0, -7.0, -1.0, 23.0, 1.0, -7.0, -7.0, -7.0, -7.0, -6.0, 15.0, 9.0, -7.0, -7.0, -7.0, -7.0, -7.0, 8.0, 24.0, -5.0, -7.0, -7.0, -7.0, -7.0, -6.0, 15.0, 9.0, -7.0, -7.0, -7.0, -7.0}; 35 | const uint8_t label_1 = 7; 36 | const int8_t input_data_2[64] = {-5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -5.0, -3.0, -1.0, -3.0, -5.0, -5.0, -5.0, 3.0, 17.0, 23.0, 22.0, 5.0, -5.0, -5.0, -4.0, 21.0, 31.0, 10.0, -1.0, -5.0, -5.0, -5.0, -5.0, 4.0, 9.0, 15.0, -4.0, -5.0, -5.0, -5.0, -5.0, -5.0, -3.0, 14.0, -4.0, -5.0, -5.0, -5.0, -5.0, -3.0, 11.0, 15.0, -4.0, -5.0, -5.0, -5.0, -5.0, -4.0, 12.0, 8.0, -5.0, -5.0, -5.0}; 37 | const uint8_t label_2 = 5; 38 | const int8_t input_data_3[64] = {-7.0, -7.0, -7.0, -7.0, -6.0, -5.0, -7.0, -7.0, -7.0, -7.0, -7.0, 1.0, 24.0, 26.0, -2.0, -7.0, -7.0, -7.0, -0.0, 28.0, 22.0, 30.0, 6.0, -7.0, -7.0, -4.0, 25.0, 20.0, -5.0, 20.0, 13.0, -7.0, -7.0, 8.0, 29.0, -2.0, -6.0, 21.0, 11.0, -7.0, -7.0, 11.0, 31.0, 6.0, 10.0, 28.0, -0.0, -7.0, -7.0, -3.0, 21.0, 30.0, 22.0, 3.0, -7.0, -7.0, -7.0, -7.0, -6.0, -4.0, -6.0, -7.0, -7.0, -7.0}; 39 | const uint8_t label_3 = 0; 40 | 41 | uint8_t weightChunk; 42 | const uint8_t *weightidx; 43 | uint8_t layer_in1[MAX_N_ACTIVATIONS]; 44 | uint8_t layer_in2[MAX_N_ACTIVATIONS]; 45 | volatile int16_t sum; 46 | int8_t *activations_idx; 47 | int8_t *output; 48 | int8_t max_val; 49 | int8_t max_pos; 50 | 51 | uint8_t processalllayers( int8_t *activations) 52 | { 53 | weightidx = (const uint8_t*)L1_weights; 54 | output = layer_in1; 55 | for (uint8_t i = 0; i < L1_outgoing_weights; i++) { 56 | activations_idx = activations; 57 | fc_innerloop(L1_incoming_weights/4); 58 | } 59 | 60 | weightidx = (const uint8_t*)L2_weights; 61 | output = layer_in2; 62 | for (uint8_t i = 0; i < L2_outgoing_weights; i++) { 63 | activations_idx = layer_in1; 64 | fc_innerloop_mem(L2_incoming_weights/4); 65 | } 66 | 67 | weightidx = (const uint8_t*)L3_weights; 68 | output = layer_in1; 69 | for (uint8_t i = 0; i < L3_outgoing_weights; i++) { 70 | activations_idx = layer_in2; 71 | fc_innerloop_mem(L3_incoming_weights/4); 72 | } 73 | 74 | weightidx = (const uint8_t*)L4_weights; 75 | output = layer_in2; 76 | max_val = -INT8_MAX; 77 | max_pos = 127; 78 | 79 | for (uint8_t i = 0; i < L4_outgoing_weights; i++) { 80 | activations_idx = layer_in1; 81 | fc_innerloop_mem(L4_incoming_weights/4); 82 | 83 | int8_t sum8 = sum; 84 | 85 | if (sum8 > max_val) { 86 | max_val = sum8; 87 | max_pos = i; 88 | } 89 | } 90 | 91 | #ifdef UART_OUTPUT 92 | output = layer_in2; 93 | PDK_sendchar('\n'); 94 | PDK_sendchar('>'); 95 | for (uint8_t i = 0; i < 10; i++) { 96 | PDK_sendhex8(*output++); 97 | PDK_sendchar(' '); 98 | } 99 | #endif 100 | return max_pos; 101 | } 102 | 103 | void fc_innerloop(uint8_t loops) { 104 | 105 | sum = 0; 106 | do { 107 | weightChunk = *weightidx++; 108 | __asm 109 | 110 | mov a, _activations_idx+0 111 | mov p, a 112 | mov a, _activations_idx+1 113 | call __gptrget ; in is in a now 114 | inc _activations_idx+0 115 | addc _activations_idx+1 116 | 117 | t0sn _weightChunk, #6 118 | sl a ; if (weightChunk & 0x40) in = in+in; 119 | t0sn _weightChunk, #7 120 | neg a ; if (weightChunk & 0x80) in =-in; 121 | 122 | add _sum+0,a 123 | addc _sum+1 124 | sl a 125 | subc _sum+1 126 | 127 | mov a, _activations_idx+0 128 | mov p, a 129 | mov a, _activations_idx+1 130 | call __gptrget ; in is in a now 131 | inc _activations_idx+0 132 | addc _activations_idx+1 133 | 134 | t0sn _weightChunk, #4 135 | sl a ; if (weightChunk & 0x40) in = in+in; 136 | t0sn _weightChunk, #5 137 | neg a ; if (weightChunk & 0x80) in =-in; 138 | 139 | add _sum+0,a 140 | addc _sum+1 141 | sl a 142 | subc _sum+1 143 | 144 | mov a, _activations_idx+0 145 | mov p, a 146 | mov a, _activations_idx+1 147 | call __gptrget ; in is in a now 148 | inc _activations_idx+0 149 | addc _activations_idx+1 150 | 151 | t0sn _weightChunk, #2 152 | sl a ; if (weightChunk & 0x40) in = in+in; 153 | t0sn _weightChunk, #3 154 | neg a ; if (weightChunk & 0x80) in =-in; 155 | 156 | add _sum+0,a 157 | addc _sum+1 158 | sl a 159 | subc _sum+1 160 | 161 | mov a, _activations_idx+0 162 | mov p, a 163 | mov a, _activations_idx+1 164 | call __gptrget ; in is in a now 165 | inc _activations_idx+0 166 | addc _activations_idx+1 167 | 168 | t0sn _weightChunk, #0 169 | sl a ; if (weightChunk & 0x40) in = in+in; 170 | t0sn _weightChunk, #1 171 | neg a ; if (weightChunk & 0x80) in =-in; 172 | 173 | add _sum+0,a 174 | addc _sum+1 175 | sl a 176 | subc _sum+1 177 | __endasm; 178 | } while (--loops); 179 | 180 | int8_t sum8 = ((uint16_t)sum)>>3; 181 | sum8 = sum8 < 0 ? 0 : sum8; 182 | *output++ = sum8; 183 | } 184 | 185 | void fc_innerloop_mem(uint8_t loops) { 186 | 187 | sum = 0; 188 | do { 189 | weightChunk = *weightidx++; 190 | __asm 191 | idxm a, _activations_idx 192 | inc _activations_idx+0 193 | 194 | t0sn _weightChunk, #6 195 | sl a ; if (weightChunk & 0x40) in = in+in; 196 | t0sn _weightChunk, #7 197 | neg a ; if (weightChunk & 0x80) in =-in; 198 | 199 | add _sum+0,a 200 | addc _sum+1 201 | sl a 202 | subc _sum+1 203 | 204 | idxm a, _activations_idx 205 | inc _activations_idx+0 206 | 207 | t0sn _weightChunk, #4 208 | sl a ; if (weightChunk & 0x40) in = in+in; 209 | t0sn _weightChunk, #5 210 | neg a ; if (weightChunk & 0x80) in =-in; 211 | 212 | add _sum+0,a 213 | addc _sum+1 214 | sl a 215 | subc _sum+1 216 | 217 | idxm a, _activations_idx 218 | inc _activations_idx+0 219 | 220 | t0sn _weightChunk, #2 221 | sl a ; if (weightChunk & 0x40) in = in+in; 222 | t0sn _weightChunk, #3 223 | neg a ; if (weightChunk & 0x80) in =-in; 224 | 225 | add _sum+0,a 226 | addc _sum+1 227 | sl a 228 | subc _sum+1 229 | 230 | idxm a, _activations_idx 231 | inc _activations_idx+0 232 | 233 | t0sn _weightChunk, #0 234 | sl a ; if (weightChunk & 0x40) in = in+in; 235 | t0sn _weightChunk, #1 236 | neg a ; if (weightChunk & 0x80) in =-in; 237 | 238 | add _sum+0,a 239 | addc _sum+1 240 | sl a 241 | subc _sum+1 242 | __endasm; 243 | } while (--loops); 244 | 245 | int8_t sum8 = ((uint16_t)sum)>>3; 246 | sum8 = sum8 < 0 ? 0 : sum8; 247 | *output++ = sum8; 248 | } 249 | 250 | 251 | void main(void) 252 | { 253 | 254 | #ifdef UART_OUTPUT 255 | PDK_autobaud(); // Adjust baudrate on easypdkprogrammer 256 | #endif 257 | 258 | for (;;) { 259 | #ifdef UART_OUTPUT 260 | PDK_sendstring("\nInference..."); 261 | _delay_ms(500); 262 | #endif 263 | uint8_t prediction; 264 | 265 | prediction=processalllayers(input_data_0); 266 | #ifdef UART_OUTPUT 267 | PDK_sendstring("\n#1 Predicted: "); 268 | PDK_sendhex8(prediction); 269 | PDK_sendstring("\tlabel: "); 270 | PDK_sendhex8(label_0); 271 | #endif 272 | prediction=processalllayers(input_data_1); 273 | #ifdef UART_OUTPUT 274 | PDK_sendstring("\n#2 Predicted: "); 275 | PDK_sendhex8(prediction); 276 | PDK_sendstring("\tlabel: "); 277 | PDK_sendhex8(label_1); 278 | #endif 279 | prediction=processalllayers(input_data_2); 280 | #ifdef UART_OUTPUT 281 | PDK_sendstring("\n#3 Predicted: "); 282 | PDK_sendhex8(prediction); 283 | PDK_sendstring("\tlabel: "); 284 | PDK_sendhex8(label_2); 285 | #endif 286 | prediction=processalllayers(input_data_3); 287 | #ifdef UART_OUTPUT 288 | PDK_sendstring("\n#4 Predicted: "); 289 | PDK_sendhex8(prediction); 290 | PDK_sendstring("\tlabel: "); 291 | PDK_sendhex8(label_3); 292 | #endif 293 | } 294 | } 295 | -------------------------------------------------------------------------------- /src/softuart.h: -------------------------------------------------------------------------------- 1 | #ifndef __SOFTUART_H 2 | #define __SOFTUART_H 3 | 4 | #include 5 | 6 | void PDK_autobaud(void); // autobaud for the easypdkprogrammer. This needs to be called before sending anything on the UART 7 | void PDK_sendchar(uint8_t); // Send a single char on the serial port. So far, no receving is possible. 8 | void PDK_sendhex8(uint8_t); // Prints a hexadecimal representation of a 8 bit unsigned value on the UART. 9 | void PDK_sendstring(char *); // Sends a zero terminated string that can reside in RAM or ROM 10 | void PDK_senduint16(uint16_t); // Prints a decimal representation of a 16 bit unsigned value on the UART. 11 | void PDK_senduint32(uint32_t); // Prints a decimal representation of a 32 bit unsigned value on the UART. 12 | 13 | // UART configuration 14 | #define TXPORT PA 15 | #define TXPORTC PAC 16 | #define TXPIN 7 17 | #define BAUDRATE 115200 18 | 19 | #define sl(x) _ ## x 20 | #define s(y) sl(y) 21 | 22 | #endif --------------------------------------------------------------------------------