├── .gitattributes ├── .gitignore ├── Firmware ├── .vs │ └── SIMPAD_v1 │ │ └── v14 │ │ └── .atsuo ├── Readme.md ├── SIMPAD │ ├── .atmelstart │ │ ├── AtmelStart.env_conf │ │ ├── AtmelStart.gpdsc │ │ └── atmel_start_config.atstart │ ├── Config │ │ ├── RTE_Components.h │ │ └── clock_config.h │ ├── Debug │ │ ├── Makefile │ │ └── makedep.mk │ ├── Default.xml │ ├── SIMPAD.componentinfo.xml │ ├── SIMPAD.cproj │ ├── atmel_start.c │ ├── atmel_start.h │ ├── doxygen │ │ ├── adc.dox │ │ ├── adc_basic.dox │ │ ├── generator │ │ │ ├── DoxygenLayout.xml │ │ │ └── doxyfile.doxygen │ │ ├── mainpage.dox │ │ ├── pwm.dox │ │ ├── pwm_basic.dox │ │ ├── system.dox │ │ ├── timer.dox │ │ ├── usart.dox │ │ └── usart_basic.dox │ ├── driver_isr.c │ ├── examples │ │ ├── include │ │ │ ├── adc_basic_example.h │ │ │ ├── pwm_basic_example.h │ │ │ └── usart_basic_example.h │ │ └── src │ │ │ ├── adc_basic_example.c │ │ │ ├── pwm_basic_example.c │ │ │ └── usart_basic_example.c │ ├── include │ │ ├── adc_basic.h │ │ ├── atmel_start_pins.h │ │ ├── driver_init.h │ │ ├── port.h │ │ ├── protected_io.h │ │ ├── pwm_basic.h │ │ ├── sysctrl.h │ │ ├── system.h │ │ └── usart_basic.h │ ├── main.c │ ├── src │ │ ├── adc_basic.c │ │ ├── driver_init.c │ │ ├── protected_io.S │ │ ├── pwm_basic.c │ │ └── usart_basic.c │ └── utils │ │ ├── assembler.h │ │ ├── assembler │ │ ├── gas.h │ │ └── iar.h │ │ ├── atomic.h │ │ ├── compiler.h │ │ ├── interrupt_avr8.h │ │ ├── setbaud.h │ │ ├── utils.h │ │ └── utils_assert.h └── SIMPAD_v1.atsln ├── Hardware ├── Readme.md ├── SimpleBoost_V4_simple.asc ├── booster circuit.gif └── booster_transient.gif ├── LICENSE ├── Protocol ├── PDK programming sequence v0.5.pdf └── Readme.md ├── README.md ├── Toolchain ├── examples │ ├── ADC_PFS173 │ │ ├── Makefile │ │ └── adc.c │ ├── WS2812_blinky │ │ ├── Makefile │ │ ├── WS2812_blinky.c │ │ └── readme.md │ ├── blinky │ │ ├── Makefile │ │ └── blinky.c │ ├── brainfuck │ │ ├── Makefile │ │ ├── brainfuck.c │ │ ├── readme.md │ │ └── softuart.s │ ├── candleflicker │ │ ├── Makefile │ │ └── candleflicker.c │ ├── chainable_display │ │ ├── Makefile │ │ ├── display.c │ │ └── readme.md │ ├── lightsensor │ │ ├── Makefile │ │ └── lightsensor.c │ └── uartsend │ │ ├── Makefile │ │ ├── readme.md │ │ └── uartsend.c ├── library │ ├── PDK_WS2812.c │ ├── PDK_softuart.c │ ├── delay.c │ └── pdk │ │ ├── WS2812.h │ │ ├── delay.h │ │ ├── io.h │ │ ├── io_common.h │ │ ├── io_pfs154.h │ │ ├── io_pfs173.h │ │ ├── io_pms150c.h │ │ └── softuart.h ├── readme.md └── util │ ├── PDK_register_map.csv │ ├── genioincludes.py │ ├── output │ ├── io_pfs154.h │ ├── io_pfs172.h │ ├── io_pfs173.h │ ├── io_pmc153.h │ ├── io_pmc251.h │ ├── io_pms130.h │ ├── io_pms131.h │ ├── io_pms132b.h │ ├── io_pms133.h │ ├── io_pms134.h │ ├── io_pms150c.h │ ├── io_pms152.h │ ├── io_pms156.h │ ├── io_pms15a.h │ ├── io_pms164.h │ ├── io_pms165c.h │ ├── io_pms232.h │ ├── io_pms234.h │ └── io_pms271.h │ └── readme.md └── hardware.jpg /.gitattributes: -------------------------------------------------------------------------------- 1 | # Auto detect text files and perform LF normalization 2 | * text=auto 3 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Prerequisites 2 | *.d 3 | 4 | # Object files 5 | *.o 6 | *.ko 7 | *.obj 8 | *.elf 9 | 10 | #vscode 11 | .vscode 12 | 13 | # SDCC output 14 | *.lst 15 | *.asm 16 | *.ihx 17 | *.sym 18 | *.rst 19 | *.lk 20 | *.rel 21 | *.cdb 22 | *.bin 23 | 24 | 25 | 26 | # Linker output 27 | *.ilk 28 | *.map 29 | *.exp 30 | 31 | # Precompiled Headers 32 | *.gch 33 | *.pch 34 | 35 | # Libraries 36 | *.lib 37 | *.a 38 | *.la 39 | *.lo 40 | 41 | # Shared objects (inc. Windows DLLs) 42 | *.dll 43 | *.so 44 | *.so.* 45 | *.dylib 46 | 47 | # Executables 48 | *.exe 49 | *.out 50 | *.app 51 | *.i*86 52 | *.x86_64 53 | *.hex 54 | 55 | # Debug files 56 | *.dSYM/ 57 | *.su 58 | *.idb 59 | *.pdb 60 | 61 | # Kernel Module Compile Results 62 | *.mod* 63 | *.cmd 64 | .tmp_versions/ 65 | modules.order 66 | Module.symvers 67 | Mkfile.old 68 | dkms.conf 69 | 70 | # AtmelStudio files 71 | *.eep 72 | *.lss 73 | *.srec -------------------------------------------------------------------------------- /Firmware/.vs/SIMPAD_v1/v14/.atsuo: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/SimPad/22191102d1bc6d280b5c20b2e4b45a70a983abee/Firmware/.vs/SIMPAD_v1/v14/.atsuo -------------------------------------------------------------------------------- /Firmware/Readme.md: -------------------------------------------------------------------------------- 1 | # Simple Padauk Programmer 2 | 3 | Compiles with AtmelStudio. This project uses AtmelStart for peripheral configuration. -------------------------------------------------------------------------------- /Firmware/SIMPAD/.atmelstart/AtmelStart.env_conf: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/Config/RTE_Components.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Autogenerated API include file for the Atmel Configuration Management Engine (ACME) 5 | * 6 | * Copyright (c) 2012 Atmel Corporation. All rights reserved. 7 | * 8 | * \acme_license_start 9 | * 10 | * \page License 11 | * 12 | * Redistribution and use in source and binary forms, with or without 13 | * modification, are permitted provided that the following conditions are met: 14 | * 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 22 | * 3. The name of Atmel may not be used to endorse or promote products derived 23 | * from this software without specific prior written permission. 24 | * 25 | * 4. This software may only be redistributed and used in connection with an 26 | * Atmel microcontroller product. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * 40 | * \acme_license_stop 41 | * 42 | * Project: SIMPAD 43 | * Target: ATmega168PA 44 | * 45 | **/ 46 | 47 | 48 | #ifndef RTE_COMPONENTS_H 49 | #define RTE_COMPONENTS_H 50 | 51 | 52 | #define ATMEL_START 53 | 54 | #endif /* RTE_COMPONENTS_H */ 55 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/Config/clock_config.h: -------------------------------------------------------------------------------- 1 | /* Auto-generated config file clock_config.h */ 2 | #ifndef CLOCK_CONFIG_H 3 | #define CLOCK_CONFIG_H 4 | 5 | // <<< Use Configuration Wizard in Context Menu >>> 6 | 7 | #ifndef F_CPU 8 | #define F_CPU 16000000 9 | #endif 10 | // ADC Clock Settings 11 | // ADC Clock source 12 | // CLKadc 13 | // This defines the clock source for the ADC module 14 | // adc_clock_source 15 | #define CONF_ADC_SRC CLKadc 16 | 17 | // 18 | 19 | // TC0 Clock Settings 20 | // TC0 Clock source 21 | // CLKio 22 | // This defines the clock source for the TC0 module 23 | // tc8_clock_source 24 | #define CONF_TC0_SRC CLKio 25 | 26 | // 27 | 28 | // USART Clock Settings 29 | // USART Clock source 30 | // CLKio 31 | // This defines the clock source for the USART module 32 | // usart_clock_source 33 | #define CONF_USART_SRC CLKio 34 | 35 | // 36 | 37 | // <<< end of configuration section >>> 38 | 39 | #endif // CLOCK_CONFIG_H 40 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/Debug/makedep.mk: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | # Automatically-generated file. Do not edit or delete the file 3 | ################################################################################ 4 | 5 | atmel_start.c 6 | 7 | driver_isr.c 8 | 9 | examples\src\adc_basic_example.c 10 | 11 | examples\src\pwm_basic_example.c 12 | 13 | examples\src\usart_basic_example.c 14 | 15 | main.c 16 | 17 | src\adc_basic.c 18 | 19 | src\driver_init.c 20 | 21 | src\protected_io.S 22 | 23 | src\pwm_basic.c 24 | 25 | src\usart_basic.c 26 | 27 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/SIMPAD.componentinfo.xml: -------------------------------------------------------------------------------- 1 |  2 | 3 | 4 | 5 | 6 | 7 | Device 8 | Startup 9 | 10 | 11 | Atmel 12 | 1.3.0 13 | C:/Program Files (x86)\Atmel\Studio\7.0\Packs 14 | 15 | 16 | 17 | 18 | C:/Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\1.3.300\include 19 | 20 | include 21 | C 22 | 23 | 24 | include 25 | 26 | 27 | 28 | 29 | C:/Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\1.3.300\include\avr\iom168pa.h 30 | 31 | header 32 | C 33 | DGkTIn/CsXAhkrGSfeT7kA== 34 | 35 | include/avr/iom168pa.h 36 | 37 | 38 | 39 | 40 | C:/Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\1.3.300\templates\main.c 41 | template 42 | source 43 | C Exe 44 | GD1k8YYhulqRs6FD1B2Hog== 45 | 46 | templates/main.c 47 | Main file (.c) 48 | 49 | 50 | 51 | C:/Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\1.3.300\templates\main.cpp 52 | template 53 | source 54 | C Exe 55 | YXFphlh0CtZJU+ebktABgQ== 56 | 57 | templates/main.cpp 58 | Main file (.cpp) 59 | 60 | 61 | 62 | C:/Program Files (x86)\Atmel\Studio\7.0\Packs\Atmel\ATmega_DFP\1.3.300\gcc\dev\atmega168pa 63 | 64 | libraryPrefix 65 | GCC 66 | 67 | 68 | gcc/dev/atmega168pa 69 | 70 | 71 | 72 | 73 | ATmega_DFP 74 | C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/1.3.300/Atmel.ATmega_DFP.pdsc 75 | 1.3.300 76 | true 77 | ATmega168PA 78 | 79 | 80 | 81 | Resolved 82 | Fixed 83 | true 84 | 85 | 86 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/atmel_start.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | /** 4 | * Initializes MCU, drivers and middleware in the project 5 | **/ 6 | void atmel_start_init(void) 7 | { 8 | system_init(); 9 | } 10 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/atmel_start.h: -------------------------------------------------------------------------------- 1 | #ifndef ATMEL_START_H_INCLUDED 2 | #define ATMEL_START_H_INCLUDED 3 | 4 | #ifdef __cplusplus 5 | extern "C" { 6 | #endif 7 | 8 | #include "include/driver_init.h" 9 | #include "include/atmel_start_pins.h" 10 | 11 | /** 12 | * Initializes MCU, drivers and middleware in the project 13 | **/ 14 | void atmel_start_init(void); 15 | 16 | #ifdef __cplusplus 17 | } 18 | #endif 19 | #endif 20 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/doxygen/adc.dox: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ /** 2 | \defgroup doc_driver_adc ADC Drivers 3 | 4 | The ADC (Analog to Digital Converter) is a peripheral that converts an 5 | analog voltage to digital value. 6 | 7 | 8 | The following driver variants are available: 9 | 10 | - \ref doc_driver_adc_init : Init driver initializing the ADC hardware as 11 | specified by the user in START. 12 | 13 | - \ref doc_driver_adc_basic : Provides basic functionality like: 14 | - Initializing the ADC as specified by the user in START 15 | - Starting a conversion on a specified channel 16 | - Polling whether a conversion is done 17 | - Getting the conversion result 18 | - Polled or interrupt-driven interfaces, selectable from START 19 | 20 | - \ref doc_driver_adc_window : Provides advanced functionality like: 21 | - Initializing the ADC as specified by the user in START 22 | - Starting auto-triggered conversions on a specified channel 23 | - Let conversions be triggered by the event system 24 | - Getting interrupts if the conversion is inside/outside a specified window range 25 | - Getting the conversion result 26 | 27 | 28 | \section doc_driver_adc_basic_and_practice ADC Basics and Best Practice 29 | 30 | An ADC (Analog-to-Digital Converter) converts analog signals to digital values. 31 | A reference signal with a known voltage level is quantified into equally 32 | sized chunks, each representing a digital value from 0 to the highest number 33 | possible with the bit resolution supported by the ADC. The input voltage 34 | measured by the ADC is compared against these chunks and the chunk with the 35 | closest voltage level defines the digital value that can be used to represent 36 | the analog input voltage level. 37 | 38 | Usually an ADC can operate in either differential or single-ended mode. 39 | In differential mode two signals (V+ and V-) are compared against each other 40 | and the resulting digital value represents the relative voltage level between 41 | V+ and V-. This means that if the input voltage level on V+ is lower than on 42 | V- the digital value is negative, which also means that in differential 43 | mode one bit is lost to the sign. In single-ended mode only V+ is compared 44 | against the reference voltage, and the resulting digital value only can be 45 | positive, but the full bit-range of the ADC can be used. 46 | 47 | Usually multiple resolutions are supported by the ADC, lower resolution can 48 | reduce the conversion time, but lose accuracy. 49 | 50 | Some ADCs have a gain stage on the input lines which can be used to increase 51 | the dynamic range. The default gain value is usually x1, which means that the 52 | conversion range is from 0V to the reference voltage. 53 | Applications can change the gain stage, to increase or reduce the conversion 54 | range. 55 | 56 | Usually multiple reference voltages are supported by the ADC, both internal and 57 | external with difference voltage levels. The reference voltage have an impact 58 | on the accuracy, and should be selected to cover the full range of the analog 59 | input signal and never less than the expected maximum input voltage. 60 | 61 | Some ADCs have a window mode allowing the conversion result to be automatically 62 | compared to a set of predefined threshold values. Applications can use callback 63 | function to monitor if the conversion result exceeds predefined threshold value. 64 | 65 | ADCs typically provide two conversion modes: Single shot and 66 | free running. In single shot mode the ADC only performs a conversion when 67 | triggered by the application. In free running mode it continues to make 68 | conversions from it is triggered until it is stopped by the application. When 69 | in window monitoring mode, the ADC should be set to free running mode. 70 | 71 | */ 72 | 73 | 74 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/doxygen/adc_basic.dox: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ /** 2 | \addtogroup doc_driver_adc_basic ADC Basic Driver 3 | 4 | \brief Driver for basic ADC functionality. 5 | 6 | The ADC Basic driver provides basic functionality for using the ADC. 7 | The driver has the following features: 8 | - The driver provides only single shot, non-windowed operation of the ADC. 9 | - If the ADC hardware supports using multiple resolutions, 10 | the conversion is done using the resolution specified by the user in START. 11 | 12 | The ADC Basic driver has two modes of operation: 13 | - Polled mode 14 | - Interrupt mode 15 | 16 | 17 | \section doc_driver_adc_basic_polled Polled mode 18 | 19 | In the Polled Mode, the application code explicitly starts a conversion 20 | on a specified channel, waits for the conversion to complete, and 21 | reads back the result. 22 | 23 | 24 | \section doc_driver_adc_basic_interrupt Interrupt mode 25 | 26 | In the Interrupt Mode, the application code explicitly starts a conversion 27 | on a specified channel. When the conversion is done, the ADC ISR is executed. 28 | The user can hookup a callback to this ISR, specifying any actions to be 29 | performed by the ISR, such as reading the result, performing arithmetic on it, 30 | and storing it to a buffer. To generate code for including a callback handler, 31 | tick the "Include harness for IRQ on conversion complete"- box in START. 32 | 33 | 34 | \section doc_driver_adc_basic_functional Functional Description 35 | 36 | An ADC conversion is started by calling 37 | _start_conversion(adc_channel_t channel). 38 | A conversion will then be started in the ADC, and the result will be ready 39 | after a number of clock cycles. The function 40 | _is_conversion_done() is used 41 | to poll if the result is ready. When the result is ready, it can be read 42 | using _get_conversion_result(). The function 43 | _get_conversion(adc_channel_t channel) combines all these 44 | operations into a single function: Start conversion, wait, and read result. 45 | 46 | ADC conversion results are returned as datatype adc_result_t, which 47 | has 16 bits. The data is right-adjusted, and the number of bits used 48 | is dependent on the resolution of the ADC, or the chosen resolution if 49 | the ADC supports multiple resolutions. The function 50 | _get_resolution() returns the number of bits in the 51 | result, and can be used to adjust or scale the result if needed. 52 | 53 | 54 | \section doc_driver_adc_basic_hardware Hardware Dependencies 55 | 56 | The ADC Basic driver needs ADC hardware to perform conversions. 57 | When the user has selected a device and added an ADC component, 58 | the Driver field in the Component Settings pane in START will 59 | let the user select which timer driver to use, select *Drivers:ADC:Basic* 60 | to use the ADC Basic driver. 61 | 62 | The Configuration Pane in START will display options that are 63 | dependent on the hardware used to implement the ADC driver. 64 | For example, an option may allow changing the number of result bits 65 | or clock prescaling used to drive the underlying ADC hardware. 66 | 67 | 68 | \section doc_driver_adc_basic_software Software Dependencies 69 | 70 | The ADC Basic may be configured to use use the interrupt functionality 71 | of the underlying ADC. Make sure that global interrupts 72 | are enabled (using sei()) and that the Interrupt Controller, if 73 | present, is configured so that the ADC interrupt is serviced 74 | correctly. 75 | 76 | 77 | \section doc_driver_adc_basic_code Code example 78 | 79 | \code 80 | #include 81 | 82 | volatile bool isr_executed = false; 83 | volatile adc_result_t measurement; 84 | volatile uint8_t measurement_normalized; 85 | 86 | void adc_handler_cb(void){ 87 | measurement = ADC_0_get_conversion_result(); 88 | measurement_normalized = measurement>>(ADC_0_get_resolution()-8); 89 | isr_executed = true; 90 | } 91 | 92 | 93 | int main(void) 94 | { 95 | /* Initializes MCU, drivers and middleware */ 96 | atmel_start_init(); 97 | 98 | // Test polled mode 99 | 100 | // Get conversion from ADC CH0 101 | measurement = ADC_0_get_conversion(0); 102 | 103 | // Get 8 MSB of conversion result 104 | measurement_normalized = measurement>>(ADC_0_get_resolution()-8); 105 | 106 | // Test IRQ mode 107 | 108 | sei(); 109 | 110 | ADC_0_register_callback(adc_handler_cb); 111 | 112 | // Start conversion from ADC CH0 113 | ADC_0_start_conversion(0); 114 | 115 | // Wait for ISR to be execued 116 | while (!isr_executed); 117 | 118 | while (1); 119 | } 120 | \endcode 121 | 122 | 123 | */ 124 | 125 | 126 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/doxygen/pwm.dox: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ /** 2 | \defgroup doc_driver_pwm PWM Drivers 3 | 4 | Pulse-width modulation (PWM) is used to create an analog behavior 5 | digitally by controlling the amount of power transferred to the 6 | connected peripheral. 7 | 8 | The following driver variants are available: 9 | 10 | - \ref doc_driver_pwm_basic : Provides basic functionality like: 11 | - Initializing the hardware implementing the PWM as specified by the user in START 12 | - Enable and disable output of PWM channels on I/O pins 13 | - Setting duty cycle for each of the PWM channels 14 | - Load TOP value for the PWM, to specify resolution 15 | - Register ISR callback routine to be called on counter overflow 16 | The driver allows optional hookup of a callback handler from 17 | the overflow ISR, allowing the user to specify any actions to be taken in 18 | the ISR. 19 | 20 | \section doc_driver_pwm_basic_and_practice PWM Basics and Best Practice 21 | 22 | Pulse-width modulation (PWM) is used to create an analog behavior 23 | digitally by controlling the amount of power transferred to the 24 | connected peripheral. This is achieved by controlling the high period 25 | (duty-cycle) of a periodic signal. 26 | 27 | The application can change the period or duty cycle when the PWM is running. 28 | Functions are provided to configure these two parameters. 29 | Note these are raw register values and the parameter duty_cycle means 30 | the period of first half during one cycle, which should not be larger than 31 | total period value. 32 | 33 | */ 34 | 35 | 36 | 37 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/doxygen/system.dox: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ /** 2 | \defgroup doc_driver_system System drivers 3 | 4 | 5 | 6 | \section doc_driver_system_init_basic_and_practice System Drivers 7 | 8 | The system drivers controls various peripherals and systems such as 9 | - BOD 10 | - Interrupt Controller 11 | - Clock Controller 12 | - Configuration Change Protection Controller 13 | - Reset Controller 14 | - Sleep Controller 15 | 16 | */ 17 | 18 | 19 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/doxygen/timer.dox: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ /** 2 | \defgroup doc_driver_timer Timer Drivers 3 | 4 | 5 | \section doc_driver_timer_basic_and_practice Timer Basics and Best Practice 6 | 7 | The Timer drivers provides means functionality related to time, typically 8 | using a hardware timer to measure time, generate waveforms that are a 9 | function of time, or timestamp events. 10 | 11 | Timers can be either: 12 | - Synchronous (being clocked by the peripheral clock or a prescaled version of it) 13 | - Asynchronous (being clocked by a clock generated outside the device, and input on an IO pin) 14 | 15 | 16 | */ 17 | 18 | 19 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/doxygen/usart.dox: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ /** 2 | \defgroup doc_driver_usart USART Drivers 3 | 4 | 5 | 6 | \section doc_driver_usart_basic_and_practice USART Basics and Best Practice 7 | 8 | The universal synchronous and asynchronous receiver and transmitter 9 | (USART) is usually used to transfer data from one device to the other. 10 | A USART is able to transmit a byte stream on an I/O pin (the TX pin), 11 | and receive a byte stream on another I/O pin (the RX pin). The rate 12 | at which bits are shifted out on the I/O pins is called the baud rate. 13 | The baud rate can be selected by the user, and configured in START. 14 | 15 | In general, the USART can operate in: 16 | 17 | - Asynchronous mode (UART). The receiver uses the baud rate setting 18 | to recover the individual bits. 19 | 20 | - Synchronous mode (USART). The transmitter uses an additional I/O 21 | pin, the XCK pin, to transmit a bit clock. The receiver uses the 22 | XCK info to sample the incoming bits. 23 | 24 | The USARTs are able to generate interrupts when a byte has been 25 | transmitter or received. A USART driver can therefore either be: 26 | 27 | - Polled: The driver must poll the USARTs status register to 28 | detect when a byte has been received or transmitted. Based 29 | on the result of the polling, the driver will write the next 30 | byte to be transmitted (TX data) or read the received byte 31 | (RX data) from the USART. 32 | 33 | - Interrupt-driven: The USART issues an interrupt when a byte 34 | has been received or transmitted. The driver's Interrupt 35 | Service Routine (ISR) will write TX the next data or read RX 36 | data from the USART. The RX and TX data are typically placed 37 | in circular buffers (ringbuffers). 38 | 39 | Some devices may have DMA controllers. In such devices, the 40 | USART may also have a DMA-driven driver. 41 | 42 | */ 43 | 44 | 45 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/driver_isr.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Driver ISR. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | /* 29 | * Code generated by START. 30 | * 31 | * This file will be overwritten when reconfiguring your START project. 32 | * Please copy examples or other code you want to keep to a separate file 33 | * to avoid losing it when reconfiguring. 34 | */ 35 | 36 | #include 37 | #include 38 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/examples/include/adc_basic_example.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief ADC basic driver example. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef ADC_BASIC_EXAMPLE_H 29 | #define ADC_BASIC_EXAMPLE_H 30 | 31 | uint8_t ADC_0_test_adc_basic(void); 32 | 33 | #endif /* ADC_BASIC_EXAMPLE_H */ 34 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/examples/include/pwm_basic_example.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief PWM basic driver example. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef PWM_BASIC_EXAMPLE_H 29 | #define PWM_BASIC_EXAMPLE_H 30 | 31 | uint8_t PWM_0_test_pwm_basic(void); 32 | 33 | #endif /* PWM_BASIC_EXAMPLE_H */ 34 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/examples/include/usart_basic_example.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief USART basic driver example. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef USART_BASIC_EXAMPLE_H 29 | #define USART_BASIC_EXAMPLE_H 30 | 31 | uint8_t USART_0_test_usart_basic(void); 32 | 33 | #endif /* USART_BASIC_EXAMPLE_H */ 34 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/examples/src/adc_basic_example.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief ADC Basic driver example. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | volatile adc_result_t ADC_0_measurement; 34 | volatile uint8_t ADC_0_measurement_normalized; 35 | 36 | uint8_t ADC_0_test_adc_basic(void) 37 | { 38 | 39 | // Test driver functions, assume that an AIN channel is enabled and that 40 | // the Result Ready IRQ is enabled. 41 | 42 | // Test polled mode 43 | 44 | // Get conversion from specified ADC channel 45 | ADC_0_measurement = ADC_0_get_conversion(0); 46 | 47 | // Get 8 MSB of conversion result 48 | ADC_0_measurement_normalized = ADC_0_measurement >> (ADC_0_get_resolution() - 8); 49 | 50 | return 1; 51 | } 52 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/examples/src/pwm_basic_example.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief PWM Basic driver example. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | volatile uint16_t PWM_0_isr_executed_counter = 0; 34 | volatile PWM_0_register_t PWM_0_duty; 35 | 36 | void PWM_0_pwm_handler_cb(void) 37 | { 38 | PWM_0_duty++; 39 | // Output duty cycle on PWM CH0 40 | PWM_0_load_duty_cycle_ch0(PWM_0_duty); 41 | PWM_0_isr_executed_counter++; 42 | } 43 | 44 | uint8_t PWM_0_test_pwm_basic(void) 45 | { 46 | 47 | // Enable pin output 48 | PWM_0_enable_output_ch0(); 49 | 50 | // Set channel 0 duty cycle value register value to specified value 51 | PWM_0_load_duty_cycle_ch0(0x3f); 52 | 53 | // Set counter register value 54 | PWM_0_load_counter(0); 55 | 56 | // Test IRQ mode 57 | 58 | ENABLE_INTERRUPTS(); 59 | 60 | PWM_0_register_callback(PWM_0_pwm_handler_cb); 61 | 62 | // Wait for ISR to be executed 65000 times 63 | while (PWM_0_isr_executed_counter < 65000) 64 | ; 65 | 66 | return 1; 67 | } 68 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/examples/src/usart_basic_example.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief USART basic driver example. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #include 29 | #include 30 | #include 31 | #include 32 | #include 33 | #include 34 | 35 | static uint8_t rx[16]; 36 | 37 | uint8_t USART_0_test_usart_basic(void) 38 | { 39 | uint8_t i; 40 | 41 | // If USART Basic driver is in IRQ-mode, enable global interrupts. 42 | ENABLE_INTERRUPTS(); 43 | 44 | // Test driver functions, assumes that the USART RX and 45 | // TX pins have been loopbacked, or that USART hardware 46 | // is configured in loopback mode 47 | 48 | // Test printf() support 49 | printf("hello"); 50 | 51 | // Check that "hello" was received on loopback RX. 52 | // Initialize rx buffer so strncmp() check will work 53 | memset(rx, 0, sizeof(rx)); 54 | for (i = 0; i < strlen("hello"); i++) { 55 | rx[i] = USART_0_read(); // Blocks until character is available 56 | } 57 | 58 | // Compare received and expected data 59 | if (strncmp("hello", (char *)rx, strlen("hello")) != 0) 60 | return 0; // Error: Mismatch 61 | 62 | // If we get here, everything was OK 63 | printf("ok"); 64 | 65 | return 1; 66 | } 67 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/adc_basic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief ADC Basic driver declarations. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef ADC_BASIC_H_INCLUDED 29 | #define ADC_BASIC_H_INCLUDED 30 | 31 | #include 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | typedef void (*adc_irq_cb_t)(void); 38 | 39 | /** Datatype for the result of the ADC conversion */ 40 | typedef uint16_t adc_result_t; 41 | 42 | //* Analog channel selection */ 43 | typedef uint8_t adc_0_channel_t; 44 | 45 | int8_t ADC_0_init(); 46 | 47 | void ADC_0_enable(); 48 | 49 | void ADC_0_disable(); 50 | 51 | void ADC_0_start_conversion(adc_0_channel_t channel); 52 | 53 | bool ADC_0_is_conversion_done(); 54 | 55 | adc_result_t ADC_0_get_conversion_result(void); 56 | 57 | adc_result_t ADC_0_get_conversion(adc_0_channel_t channel); 58 | 59 | uint8_t ADC_0_get_resolution(); 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | #endif /* ADC_BASIC_H_INCLUDED */ 66 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/driver_init.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Driver initialization. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | /* 29 | * Code generated by START. 30 | * 31 | * This file will be overwritten when reconfiguring your START project. 32 | * Please copy examples or other code you want to keep to a separate file 33 | * to avoid losing it when reconfiguring. 34 | */ 35 | 36 | #ifndef DRIVER_INIT_H_INCLUDED 37 | #define DRIVER_INIT_H_INCLUDED 38 | 39 | #include 40 | #include 41 | #include 42 | #include 43 | 44 | #include 45 | 46 | #include 47 | 48 | #include 49 | #include 50 | 51 | #include 52 | 53 | #ifdef __cplusplus 54 | extern "C" { 55 | #endif 56 | 57 | void system_init(void); 58 | 59 | #ifdef __cplusplus 60 | } 61 | #endif 62 | 63 | #endif /* DRIVER_INIT_H_INCLUDED */ 64 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/protected_io.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Configuration Change Protection write functions 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef PROTECTED_IO_H 29 | #define PROTECTED_IO_H 30 | 31 | #ifdef __cplusplus 32 | extern "C" { 33 | #endif 34 | 35 | #if defined(__DOXYGEN__) 36 | //! \name IAR Memory Model defines. 37 | //@{ 38 | 39 | /** 40 | * \def CONFIG_MEMORY_MODEL_TINY 41 | * \brief Configuration symbol to enable 8 bit pointers. 42 | * 43 | */ 44 | #define CONFIG_MEMORY_MODEL_TINY 45 | 46 | /** 47 | * \def CONFIG_MEMORY_MODEL_SMALL 48 | * \brief Configuration symbol to enable 16 bit pointers. 49 | * \note If no memory model is defined, SMALL is default. 50 | * 51 | */ 52 | #define CONFIG_MEMORY_MODEL_SMALL 53 | 54 | /** 55 | * \def CONFIG_MEMORY_MODEL_LARGE 56 | * \brief Configuration symbol to enable 24 bit pointers. 57 | * 58 | */ 59 | #define CONFIG_MEMORY_MODEL_LARGE 60 | 61 | //@} 62 | #endif 63 | 64 | /** 65 | * \brief Write to am 8-bit I/O register protected by CCP or a protection bit 66 | * 67 | * \param addr Address of the I/O register 68 | * \param magic CCP magic value or Mask for protection bit 69 | * \param value Value to be written 70 | * 71 | * \note Using IAR Embedded workbench, the choice of memory model has an impact 72 | * on calling convention. The memory model is not visible to the 73 | * preprocessor, so it must be defined in the Assembler preprocessor directives. 74 | */ 75 | extern void protected_write_io(void *addr, uint8_t magic, uint8_t value); 76 | 77 | /** @} */ 78 | 79 | #endif /* PROTECTED_IO_H */ 80 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/pwm_basic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief PWM Normal mode (i.e. non-split) declaration. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef PWM_BASIC_H_INCLUDED 29 | #define PWM_BASIC_H_INCLUDED 30 | 31 | #include 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | typedef void (*pwm_irq_cb_t)(void); 38 | 39 | #define PWM_0_INTERRUPT_CB_RATE 0 40 | 41 | /** The datatype matching the bitwidth of the PWM hardware */ 42 | typedef uint8_t PWM_0_register_t; 43 | 44 | int8_t PWM_0_init(void); 45 | 46 | void PWM_0_enable(); 47 | 48 | void PWM_0_disable(); 49 | 50 | void PWM_0_enable_output_ch0(); 51 | 52 | void PWM_0_disable_output_ch0(); 53 | 54 | void PWM_0_enable_output_ch1(); 55 | 56 | void PWM_0_disable_output_ch1(); 57 | 58 | void PWM_0_load_counter(PWM_0_register_t counter_value); 59 | 60 | void PWM_0_load_duty_cycle_ch0(PWM_0_register_t duty_value); 61 | 62 | void PWM_0_load_duty_cycle_ch1(PWM_0_register_t duty_value); 63 | 64 | void PWM_0_register_callback(pwm_irq_cb_t f); 65 | 66 | #ifdef __cplusplus 67 | } 68 | #endif 69 | 70 | #endif /* PWM_BASIC_H_INCLUDED */ 71 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/sysctrl.h: -------------------------------------------------------------------------------- 1 | 2 | 3 | /** 4 | * \file 5 | * 6 | * \brief Sysctrl covers power management (PM), system clock (SYSCLK) and system reset functionality 7 | * 8 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 9 | 10 | Subject to your compliance with these terms,you may use this software and 11 | any derivatives exclusively with Microchip products.It is your responsibility 12 | to comply with third party license terms applicable to your use of third party 13 | software (including open source software) that may accompany Microchip software. 14 | 15 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 16 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 17 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 18 | PARTICULAR PURPOSE. 19 | 20 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 21 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 22 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 23 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 24 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 25 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 26 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 27 | */ 28 | 29 | /** 30 | * \defgroup doc_driver_system_sysctrl System Control (PM, SYSCLK, SYSRST) 31 | * \ingroup doc_driver_system 32 | * 33 | * \section doc_driver_sysctrl_rev Revision History 34 | * - v0.0.0.1 Initial Commit 35 | * 36 | *@{ 37 | */ 38 | 39 | #ifndef SYSCTRL_H_INCLUDED 40 | #define SYSCTRL_H_INCLUDED 41 | 42 | #include 43 | #include 44 | #include 45 | #ifdef __cplusplus 46 | extern "C" { 47 | #endif 48 | 49 | #if defined(__ICCAVR__) || defined(__DOXYGEN__) 50 | #include 51 | //! Macro for issuing the sleep instruction. 52 | #define sleep_enter() __sleep() 53 | 54 | /** 55 | * \brief Enable sleep 56 | */ 57 | static inline void sleep_enable(void) 58 | { 59 | SMCR |= (1 << SE); 60 | } 61 | 62 | /** 63 | * \brief Disable sleep 64 | */ 65 | static inline void sleep_disable(void) 66 | { 67 | SMCR &= ~(1 << SE); 68 | } 69 | 70 | #elif defined(__GNUC__) 71 | #include 72 | #define sleep_enter() sleep_cpu() 73 | 74 | #else 75 | #error Unsupported compiler. 76 | #endif 77 | 78 | /** 79 | * \brief Set sleep mode to use when entering sleep state 80 | * 81 | * \param mode Sleep mode 82 | */ 83 | static inline void sleep_set_mode(uint8_t mode) 84 | { 85 | SMCR = mode | (SMCR & ~((1 << SM0) | (1 << SM1) | (1 << SM2))); 86 | } 87 | 88 | /* 89 | * \brief Initialize sysctrl interface 90 | * 91 | * \param[in] hw The pointer to hardware instance 92 | * 93 | * \return Initialization status. 94 | */ 95 | static inline int8_t sysctrl_init() 96 | { 97 | /* Set up system clock prescaler according to configuration */ 98 | protected_write_io((void *)&CLKPR, 1 << CLKPCE, (0 << CLKPS3) | (0 << CLKPS2) | (0 << CLKPS1) | (0 << CLKPS0)); 99 | 100 | SMCR = (0 << SM2) | (0 << SM1) | (0 << SM0) | // Idle 101 | (0 << SE); 102 | 103 | MCUCR = (0 << PUD); 104 | 105 | return 0; 106 | } 107 | 108 | #endif /* SYSCTRL_H_INCLUDED */ 109 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/system.h: -------------------------------------------------------------------------------- 1 | 2 | 3 | /** 4 | * \file 5 | * 6 | * \brief Tinymega System related support 7 | * 8 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 9 | 10 | Subject to your compliance with these terms,you may use this software and 11 | any derivatives exclusively with Microchip products.It is your responsibility 12 | to comply with third party license terms applicable to your use of third party 13 | software (including open source software) that may accompany Microchip software. 14 | 15 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 16 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 17 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 18 | PARTICULAR PURPOSE. 19 | 20 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 21 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 22 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 23 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 24 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 25 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 26 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 27 | */ 28 | 29 | /** 30 | * \addtogroup doc_driver_system 31 | * 32 | * \section doc_driver_system_rev Revision History 33 | * - v0.0.0.1 Initial Commit 34 | * 35 | *@{ 36 | */ 37 | 38 | #ifndef SYSTEM_INCLUDED 39 | #define SYSTEM_INCLUDED 40 | 41 | #include "port.h" 42 | #include 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | #define MCU_RESET_CAUSE_POR (1 << PORF) 48 | #define MCU_RESET_CAUSE_EXT (1 << EXTRF) 49 | #define MCU_RESET_CAUSE_BOR (1 << BORF) 50 | #define MCU_RESET_CAUSE_WDT (1 << WDRF) 51 | 52 | static inline void mcu_init(void) 53 | { 54 | /* On AVR devices all peripherals are enabled from power on reset, this 55 | * disables all peripherals to save power. Driver shall enable 56 | * peripheral if used */ 57 | 58 | PRR = (1 << PRSPI) | (1 << PRTIM2) | (1 << PRTIM0) | (1 << PRTIM1) | (1 << PRTWI) | (1 << PRUSART0) | (1 << PRADC); 59 | 60 | /* Set all pins to low power mode */ 61 | PORTB_set_port_dir(0xff, PORT_DIR_OFF); 62 | PORTC_set_port_dir(0x7f, PORT_DIR_OFF); 63 | PORTD_set_port_dir(0xff, PORT_DIR_OFF); 64 | } 65 | 66 | #ifdef __cplusplus 67 | } 68 | #endif 69 | 70 | #endif /* SYSTEM_INCLUDED */ 71 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/include/usart_basic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief USART basic driver. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | #ifndef USART_BASIC_H_INCLUDED 29 | #define USART_BASIC_H_INCLUDED 30 | 31 | #include 32 | #include 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | int8_t USART_0_init(); 39 | 40 | void USART_0_enable(); 41 | 42 | void USART_0_enable_rx(); 43 | 44 | void USART_0_enable_tx(); 45 | 46 | void USART_0_disable(); 47 | 48 | uint8_t USART_0_get_data(); 49 | 50 | bool USART_0_is_tx_ready(); 51 | 52 | bool USART_0_is_rx_ready(); 53 | 54 | bool USART_0_is_tx_busy(); 55 | 56 | uint8_t USART_0_read(void); 57 | 58 | void USART_0_write(const uint8_t data); 59 | 60 | #ifdef __cplusplus 61 | } 62 | #endif 63 | 64 | #endif /* USART_BASIC_H_INCLUDED */ 65 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/src/adc_basic.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief ADC Basic driver implementation. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | /** 29 | * \defgroup doc_driver_adc_basic ADC Basic Driver 30 | * \ingroup doc_driver_adc 31 | * 32 | * \section doc_driver_adc_rev Revision History 33 | * - v0.0.0.1 Initial Commit 34 | * 35 | *@{ 36 | */ 37 | #include 38 | 39 | /** 40 | * \brief Initialize ADC interface 41 | * If module is configured to disabled state, the clock to the ADC is disabled 42 | * if this is supported by the device's clock system. 43 | * 44 | * \return Initialization status. 45 | * \retval 0 the ADC init was successful 46 | * \retval 1 the ADC init was not successful 47 | */ 48 | int8_t ADC_0_init() 49 | { 50 | 51 | /* Enable clock to write ADC registers */ 52 | PRR &= ~(1 << PRADC); 53 | 54 | ADMUX = (0x01 << REFS0) /* AVCC with external capacitor at AREF pin */ 55 | | (0 << ADLAR) /* Left Adjust Result: disabled */ 56 | | (0x06 << MUX0); /* ADC Single Ended Input pin 6 */ 57 | 58 | ADCSRA = (1 << ADEN) /* ADC: enabled */ 59 | | (0 << ADATE) /* Auto Trigger: disabled */ 60 | | (0 << ADIE) /* ADC Interrupt: disabled */ 61 | | (0x04 << ADPS0); /* 16 */ 62 | ADCSRB = (0x00 << ADTS0) /* Free Running mode */ 63 | | (0 << ACME) /* Analog Comparator Multiplexer: disabled */ 64 | ; 65 | 66 | return 0; 67 | } 68 | 69 | /** 70 | * \brief Enable ADC_0 71 | * 1. If supported by the clock system, enables the clock to the ADC 72 | * 2. Enables the ADC module by setting the enable-bit in the ADC control register 73 | * 74 | * \return Nothing 75 | */ 76 | void ADC_0_enable() 77 | { 78 | ADCSRA |= (1 << ADEN); 79 | } 80 | /** 81 | * \brief Disable ADC_0 82 | * 1. Disables the ADC module by clearing the enable-bit in the ADC control register 83 | * 2. If supported by the clock system, disables the clock to the ADC 84 | * 85 | * \return Nothing 86 | */ 87 | void ADC_0_disable() 88 | { 89 | ADCSRA &= ~(1 << ADEN); 90 | } 91 | 92 | /** 93 | * \brief Start a conversion on ADC_0 94 | * 95 | * \param[in] channel The ADC channel to start conversion on 96 | * 97 | * \return Nothing 98 | */ 99 | void ADC_0_start_conversion(adc_0_channel_t channel) 100 | { 101 | ADMUX &= ~0x0f; 102 | ADMUX |= channel; 103 | ADCSRA |= (1 << ADSC); 104 | } 105 | 106 | /** 107 | * \brief Check if the ADC conversion is done 108 | * 109 | * \return The status of ADC converison done check 110 | * \retval true The ADC conversion is done 111 | * \retval false The ADC converison is not done 112 | */ 113 | bool ADC_0_is_conversion_done() 114 | { 115 | return ((ADCSRA & (1 << ADIF))); 116 | } 117 | 118 | /** 119 | * \brief Read a conversion result from ADC_0 120 | * 121 | * \return Conversion result read from the ADC_0 ADC module 122 | */ 123 | adc_result_t ADC_0_get_conversion_result(void) 124 | { 125 | return (ADCL | ADCH << 8); 126 | } 127 | 128 | /** 129 | * \brief Start a conversion, wait until ready, and return the conversion result 130 | * 131 | * \return Conversion result read from the ADC_0 ADC module 132 | */ 133 | adc_result_t ADC_0_get_conversion(adc_0_channel_t channel) 134 | { 135 | adc_result_t res; 136 | 137 | ADC_0_start_conversion(channel); 138 | while (!ADC_0_is_conversion_done()) 139 | ; 140 | res = ADC_0_get_conversion_result(); 141 | ADCSRA |= (1 << ADIF); 142 | return res; 143 | } 144 | 145 | /** 146 | * \brief Return the number of bits in the ADC conversion result 147 | * 148 | * \return The number of bits in the ADC conversion result 149 | */ 150 | uint8_t ADC_0_get_resolution() 151 | { 152 | return 10; 153 | } 154 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/src/driver_init.c: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Driver initialization. 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | /* 29 | * Code generated by START. 30 | * 31 | * This file will be overwritten when reconfiguring your START project. 32 | * Please copy examples or other code you want to keep to a separate file 33 | * to avoid losing it when reconfiguring. 34 | */ 35 | 36 | #include "driver_init.h" 37 | #include 38 | 39 | /* Configure pins and initialize registers */ 40 | void ADC_0_initialization(void) 41 | { 42 | 43 | ADC_0_init(); 44 | } 45 | 46 | void PWM_0_initialization(void) 47 | { 48 | 49 | // Set pin direction to output 50 | PD6_set_dir(PORT_DIR_OUT); 51 | 52 | PD6_set_level( 53 | // Initial level 54 | // pad_initial_level 55 | // Low 56 | // High 57 | false); 58 | 59 | PWM_0_init(); 60 | } 61 | 62 | /* configure pins and initialize registers */ 63 | void USART_0_initialization(void) 64 | { 65 | 66 | // Set pin direction to input 67 | PD0_set_dir(PORT_DIR_IN); 68 | 69 | PD0_set_pull_mode( 70 | // Pull configuration 71 | // pad_pull_config 72 | // Off 73 | // Pull-up 74 | PORT_PULL_OFF); 75 | 76 | // Set pin direction to output 77 | PD1_set_dir(PORT_DIR_OUT); 78 | 79 | PD1_set_level( 80 | // Initial level 81 | // pad_initial_level 82 | // Low 83 | // High 84 | false); 85 | 86 | USART_0_init(); 87 | } 88 | 89 | /** 90 | * \brief System initialization 91 | */ 92 | void system_init() 93 | { 94 | mcu_init(); 95 | 96 | sysctrl_init(); 97 | 98 | ADC_0_initialization(); 99 | 100 | PWM_0_initialization(); 101 | 102 | USART_0_initialization(); 103 | } 104 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/src/protected_io.S: -------------------------------------------------------------------------------- 1 | /** 2 | * \file 3 | * 4 | * \brief Configuration Change Protection 5 | * 6 | (c) 2018 Microchip Technology Inc. and its subsidiaries. 7 | 8 | Subject to your compliance with these terms,you may use this software and 9 | any derivatives exclusively with Microchip products.It is your responsibility 10 | to comply with third party license terms applicable to your use of third party 11 | software (including open source software) that may accompany Microchip software. 12 | 13 | THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER 14 | EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY IMPLIED 15 | WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A 16 | PARTICULAR PURPOSE. 17 | 18 | IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, 19 | INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND 20 | WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS 21 | BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE 22 | FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN 23 | ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, 24 | THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. 25 | * 26 | */ 27 | 28 | 29 | /** 30 | * \defgroup doc_driver_system_protected_io Protected IO 31 | * \ingroup doc_driver_system 32 | * 33 | * \section doc_driver_protected_io_rev Revision History 34 | * - v0.0.0.1 Initial Commit 35 | * 36 | *@{ 37 | */ 38 | 39 | #include 40 | 41 | /* 42 | * GNU and IAR use different calling conventions. Since this is 43 | * a very small and simple function to begin with, it's easier 44 | * to implement it twice than to deal with the differences 45 | * within a single implementation. 46 | */ 47 | 48 | PUBLIC_FUNCTION(protected_write_io) 49 | 50 | #if defined(__GNUC__) 51 | /* 52 | * We need to disable interrupts globally before the protected 53 | * sequence. In order to do that we must save SREG first. 54 | */ 55 | in r18, _SFR_IO_ADDR(SREG) 56 | cli 57 | 58 | #ifdef RAMPZ 59 | out _SFR_IO_ADDR(RAMPZ), r1 // Clear bits 23:16 of Z 60 | #endif 61 | movw r30, r24 // Load addr into Z 62 | st Z, r22 // Write protection bit to I/O register 63 | st Z, r20 // Write value to I/O register 64 | out _SFR_IO_ADDR(SREG), r18 65 | 66 | ret // Return to caller 67 | 68 | #elif defined(__IAR_SYSTEMS_ASM__) 69 | 70 | # if !defined(CONFIG_MEMORY_MODEL_TINY) && !defined(CONFIG_MEMORY_MODEL_SMALL) \ 71 | && !defined(CONFIG_MEMORY_MODEL_LARGE) 72 | # define CONFIG_MEMORY_MODEL_SMALL 73 | # endif 74 | /* 75 | * We need to disable interrupts globally before the protected 76 | * sequence. In order to do that we must save SREG first. 77 | */ 78 | in r21, SREG 79 | cli 80 | # if defined(CONFIG_MEMORY_MODEL_LARGE) 81 | ldi r20, 0 82 | out RAMPZ, r20 // Reset bits 23:16 of Z 83 | movw r30, r16 // Load addr into Z 84 | # elif defined(CONFIG_MEMORY_MODEL_TINY) 85 | ldi r31, 0 // Reset bits 8:15 of Z 86 | mov r30, r16 // Load addr into Z 87 | # else 88 | movw r30, r16 // Load addr into Z 89 | # endif 90 | # if defined(CONFIG_MEMORY_MODEL_TINY) 91 | st Z, r17 // Write protection bit to I/O register 92 | st Z, r18 // Write value to I/O register 93 | # elif defined(CONFIG_MEMORY_MODEL_SMALL) 94 | st Z, r18 // Write protection bit to I/O register 95 | st Z, r19 // Write value to I/O register 96 | # elif defined(CONFIG_MEMORY_MODEL_LARGE) 97 | st Z, r19 // Write protection bit to I/O register 98 | st Z, r20 // Write value to I/O register 99 | # else 100 | # error Unknown memory model in use, no idea how registers should be accessed 101 | # endif 102 | out SREG, r21 103 | 104 | ret 105 | #else 106 | # error Unknown assembler 107 | #endif 108 | 109 | END_FUNC(protected_write_io) 110 | END_FILE() 111 | 112 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/assembler.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file assembler.h 3 | * 4 | * \brief Assembler abstraction layer and utilities 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | 46 | #ifndef ASSEMBLER_H_INCLUDED 47 | #define ASSEMBLER_H_INCLUDED 48 | 49 | #if !defined(__ASSEMBLER__) && !defined(__IAR_SYSTEMS_ASM__) && !defined(__DOXYGEN__) 50 | #error This file may only be included from assembly files 51 | #endif 52 | 53 | #if defined(__ASSEMBLER__) 54 | #include "assembler/gas.h" 55 | #include 56 | #elif defined(__IAR_SYSTEMS_ASM__) 57 | #include "assembler/iar.h" 58 | #include 59 | #endif 60 | 61 | #endif /* ASSEMBLER_H_INCLUDED */ 62 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/assembler/gas.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file gas.h 3 | * 4 | * \brief Assembler abstraction layer: GNU Assembler specifics 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | #ifndef ASSEMBLER_GAS_H_INCLUDED 46 | #define ASSEMBLER_GAS_H_INCLUDED 47 | 48 | #ifndef __DOXYGEN__ 49 | 50 | /* clang-format off */ 51 | 52 | /* IAR doesn't accept dots in macro names */ 53 | .macro ld_addr, reg, sym 54 | lda.w \reg, \sym 55 | .endm 56 | 57 | /* Define a function \a name that is either globally visible or only 58 | * file-local. 59 | */ 60 | .macro gas_begin_func name, is_public 61 | .if \is_public 62 | .global \name 63 | .endif 64 | .section .text.\name, "ax", @progbits 65 | .type \name, @function 66 | \name : 67 | .endm 68 | 69 | /* Define a function \a name that is either globally visible or only 70 | * file-local in a given segment. 71 | */ 72 | .macro gas_begin_func_segm name, is_public, segment 73 | .if \is_public 74 | .global \name 75 | .endif 76 | .section .\segment, "ax", @progbits 77 | .type \name, @function 78 | \name : 79 | .endm 80 | 81 | /* Define \a name as a weak alias for the function \a strong_name */ 82 | .macro gas_weak_function_alias name, strong_name 83 | .global \name 84 | .weak \name 85 | .type \name, @function 86 | .set \name, \strong_name 87 | .endm 88 | 89 | /* Define a weak function called \a name */ 90 | .macro gas_weak_function name 91 | .weak \name 92 | gas_begin_func \name 1 93 | .endm 94 | 95 | #define REPEAT(count) .rept count 96 | #define END_REPEAT() .endr 97 | #define FILL_BYTES(count) .fill count 98 | #define SET_LOC(offset) .org offset 99 | #define L(name) .L##name 100 | #define EXTERN_SYMBOL(name) 101 | 102 | #define TEXT_SECTION(name) \ 103 | .section name, "ax", @progbits 104 | #define RODATA_SECTION(name) \ 105 | .section name, "a", @progbits 106 | #define DATA_SECTION(name) \ 107 | .section name, "aw", @progbits 108 | #define BSS_SECTION(name) \ 109 | .section name, "aw", @nobits 110 | 111 | #define FUNCTION(name) gas_begin_func name 0 112 | #define PUBLIC_FUNCTION(name) gas_begin_func name 1 113 | #define PUBLIC_FUNCTION_SEGMENT(name, segment) \ 114 | gas_begin_func_segm name 1 segment 115 | #define WEAK_FUNCTION(name) gas_weak_function name 116 | #define WEAK_FUNCTION_ALIAS(name, strong_name) \ 117 | gas_weak_function_alias name strong_name 118 | #define END_FUNC(name) \ 119 | .size name, . - name 120 | 121 | #define END_FILE() 122 | 123 | /* clang-format on */ 124 | 125 | #endif /* __DOXYGEN__ */ 126 | 127 | #endif /* ASSEMBLER_GAS_H_INCLUDED */ 128 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/assembler/iar.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file iar.h 3 | * 4 | * \brief Assembler abstraction layer: IAR Assembler specifics 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | 46 | #ifndef ASSEMBLER_IAR_H_INCLUDED 47 | #define ASSEMBLER_IAR_H_INCLUDED 48 | 49 | /* clang-format off */ 50 | 51 | ld_addr MACRO reg, sym 52 | mov reg, LWRD sym 53 | orh reg, HWRD sym 54 | ENDM 55 | 56 | call MACRO sym 57 | rcall sym 58 | ENDM 59 | 60 | iar_begin_func MACRO name, sect, is_public, is_weak 61 | MODULE name 62 | RSEG CODE:CODE:NOROOT(1) 63 | IF is_weak == 1 64 | PUBWEAK name 65 | ELSEIF is_public 66 | PUBLIC name 67 | ENDIF 68 | name: 69 | ENDM 70 | 71 | iar_begin_func_segm MACRO name, sect, is_public, is_weak, segment 72 | MODULE name 73 | RSEG segment:CODE:NOROOT(1) 74 | IF is_weak == 1 75 | PUBWEAK name 76 | ELSEIF is_public 77 | PUBLIC name 78 | ENDIF 79 | name: 80 | ENDM 81 | 82 | iar_weak_alias MACRO name, strong_name 83 | PUBWEAK name 84 | name: 85 | rjmp strong_name 86 | ENDM 87 | 88 | #define lo(x) LWRD x 89 | #define hi(x) HWRD x 90 | 91 | #define REPEAT(count) REPT count 92 | #define END_REPEAT() ENDR 93 | #define SET_LOC(offset) ORG offset 94 | #define END_FILE() END 95 | 96 | #define FILL_BYTES(count) DS8 count 97 | 98 | #define L(name) name 99 | #define EXTERN_SYMBOL(name) EXTERN name 100 | #define FUNCTION(name) iar_begin_func name, text_##name, 0, 0 101 | #define PUBLIC_FUNCTION(name) iar_begin_func name, text_##name, 1, 0 102 | #define PUBLIC_FUNCTION_SEGMENT(name, segment) \ 103 | iar_begin_func_segm name, text_##name, 1, 0, segment 104 | #define WEAK_FUNCTION(name) iar_begin_func name, text_##name, 1, 1 105 | #define WEAK_FUNCTION_ALIAS(name, strong_name) \ 106 | iar_weak_alias name, strong_name 107 | #define END_FUNC(name) ENDMOD 108 | 109 | #define TEXT_SECTION(name) RSEG name:CODE:NOROOT 110 | #define RODATA_SECTION(name) RSEG name:CONST:NOROOT 111 | #define DATA_SECTION(name) RSEG name:DATA:NOROOT 112 | #define BSS_SECTION(name) RSEG name:DATA:NOROOT 113 | 114 | /* clang-format on */ 115 | 116 | #endif /* ASSEMBLER_IAR_H_INCLUDED */ 117 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/atomic.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file atomic.h 3 | * 4 | * \brief Macros used for atomic memory access. 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | 46 | #ifndef ATOMIC_H 47 | #define ATOMIC_H 48 | 49 | /** 50 | * \defgroup doc_driver_utils_atomic Atomic memory access and critical sections 51 | * \ingroup doc_driver_utils 52 | * 53 | * Atomic memory access and critical sections 54 | * 55 | * \{ 56 | */ 57 | 58 | /* clang-format off */ 59 | 60 | #if defined(__GNUC__) || defined (__DOXYGEN__) 61 | 62 | /** 63 | * \brief Enter a critical region 64 | * 65 | * Saves the contents of the status register, including the Global 66 | * Interrupt Enable bit, so that it can be restored upon leaving the 67 | * critical region. Thereafter, clears the Global Interrupt Enable Bit. 68 | * This macro takes a parameter P that is unused for the GCC compiler, 69 | * but necessary for code compatibility with the IAR compiler. The IAR 70 | * compiler declares a variable with the name of the parameter for 71 | * holding the SREG value. Since a variable is declared in the macro, 72 | * this variable must have a name that is unique within the scope 73 | * that the critical region is declared within, otherwise compilation 74 | * will fail. 75 | * 76 | * \param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG 77 | * 78 | */ 79 | 80 | #define ENTER_CRITICAL(UNUSED) __asm__ __volatile__ ( \ 81 | "in __tmp_reg__, __SREG__" "\n\t" \ 82 | "cli" "\n\t" \ 83 | "push __tmp_reg__" "\n\t" \ 84 | ::: "memory" \ 85 | ) 86 | 87 | /** 88 | * \brief Exit a critical region 89 | * 90 | * Restores the contents of the status register, including the Global 91 | * Interrupt Enable bit, as it was when entering the critical region. 92 | * This macro takes a parameter P that is unused for the GCC compiler, 93 | * but necessary for code compatibility with the IAR compiler. The IAR 94 | * compiler uses this parameter as the name of a variable that holds 95 | * the SREG value. The parameter must be identical to the parameter 96 | * used in the corresponding ENTER_CRITICAL(). 97 | * 98 | * \param[in] UNUSED(GCC)/P(IAR) Name of variable storing SREG 99 | * 100 | */ 101 | 102 | #define EXIT_CRITICAL(UNUSED) __asm__ __volatile__ ( \ 103 | "pop __tmp_reg__" "\n\t" \ 104 | "out __SREG__, __tmp_reg__" "\n\t" \ 105 | ::: "memory" \ 106 | ) 107 | 108 | #define DISABLE_INTERRUPTS() __asm__ __volatile__ ( "cli" ::: "memory") 109 | #define ENABLE_INTERRUPTS() __asm__ __volatile__ ( "sei" ::: "memory") 110 | 111 | #elif defined(__ICCAVR__) 112 | 113 | #define ENTER_CRITICAL(P) unsigned char P = __save_interrupt();__disable_interrupt(); 114 | #define EXIT_CRITICAL(P) __restore_interrupt(P); 115 | 116 | #define DISABLE_INTERRUPTS() __disable_interrupt(); 117 | #define ENABLE_INTERRUPTS() __enable_interrupt(); 118 | 119 | #else 120 | # error Unsupported compiler. 121 | #endif 122 | 123 | /* clang-format on */ 124 | 125 | #endif /* ATOMIC_H */ 126 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/compiler.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file compiler.h 3 | * 4 | * \brief Commonly used includes, types and macros. 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | 46 | #ifndef UTILS_COMPILER_H 47 | #define UTILS_COMPILER_H 48 | 49 | /** 50 | * \defgroup doc_driver_utils_compiler Compiler abstraction 51 | * \ingroup doc_driver_utils 52 | * 53 | * Compiler abstraction layer and code utilities for 8-bit AVR. 54 | * This module provides various abstraction layers and utilities 55 | * to make code compatible between different compilers. 56 | * 57 | * \{ 58 | */ 59 | 60 | #if defined(__GNUC__) 61 | #include 62 | #include 63 | #elif defined(__ICCAVR__) 64 | #define ENABLE_BIT_DEFINITIONS 1 65 | #include 66 | #include 67 | 68 | #else 69 | #error Unsupported compiler. 70 | #endif 71 | 72 | #include 73 | #include 74 | #include 75 | #include 76 | 77 | #include 78 | 79 | /** 80 | * \def UNUSED 81 | * \brief Marking \a v as a unused parameter or value. 82 | */ 83 | #define UNUSED(v) (void)(v) 84 | 85 | #endif /* UTILS_COMPILER_H */ 86 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/interrupt_avr8.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file interrupt_avr8.h 3 | * 4 | * \brief Global interrupt management for 8-bit AVR 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | */ 44 | 45 | /** 46 | * \defgroup doc_driver_utils_interrupts ISR abstraction 47 | * \ingroup doc_driver_utils 48 | * 49 | * Interrupt-related functionality. 50 | * 51 | * \{ 52 | */ 53 | 54 | #ifndef UTILS_INTERRUPT_AVR8_H 55 | #define UTILS_INTERRUPT_AVR8_H 56 | 57 | /** 58 | * \weakgroup interrupt_group 59 | * 60 | * @{ 61 | */ 62 | 63 | #ifdef ISR_CUSTOM_H 64 | #include ISR_CUSTOM_H 65 | #else 66 | 67 | /** 68 | * \def ISR 69 | * \brief Define service routine for specified interrupt vector 70 | * 71 | * Usage: 72 | * \code 73 | ISR(FOO_vect) 74 | { 75 | ... 76 | } 77 | \endcode 78 | * 79 | * \param vect Interrupt vector name as found in the device header files. 80 | */ 81 | #if defined(__DOXYGEN__) 82 | #define ISR(vect) 83 | #elif defined(__GNUC__) 84 | #include 85 | #elif defined(__ICCAVR__) 86 | #define __ISR(x) _Pragma(#x) 87 | #define ISR(vect) __ISR(vector = vect) __interrupt void handler_##vect(void) 88 | #endif 89 | #endif // ISR_CUSTOM_H 90 | 91 | #ifdef __GNUC__ 92 | #define cpu_irq_enable() sei() 93 | #define cpu_irq_disable() cli() 94 | #else 95 | #define cpu_irq_enable() __enable_interrupt() 96 | #define cpu_irq_disable() __disable_interrupt() 97 | #endif 98 | 99 | //! @} 100 | 101 | /** 102 | * \weakgroup interrupt_deprecated_group 103 | * @{ 104 | */ 105 | // Deprecated definitions. 106 | #define Enable_global_interrupt() cpu_irq_enable() 107 | #define Disable_global_interrupt() cpu_irq_disable() 108 | #define Is_global_interrupt_enabled() cpu_irq_is_enabled() 109 | //! @} 110 | 111 | #endif /* UTILS_INTERRUPT_AVR8_H */ 112 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/utils.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file utils.h 3 | * 4 | * \brief Different macros. 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | 46 | /** 47 | * \defgroup doc_driver_utils AVR Code utility functions 48 | * 49 | * Compiler abstraction layer and code utilities for AVR. 50 | * This module provides various abstraction layers and utilities 51 | * to make code compatible between different compilers. 52 | * 53 | * \{ 54 | */ 55 | 56 | #ifndef UTILS_H_INCLUDED 57 | #define UTILS_H_INCLUDED 58 | 59 | #ifdef __cplusplus 60 | extern "C" { 61 | #endif 62 | 63 | /** 64 | * \brief Retrieve array size 65 | */ 66 | #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) 67 | 68 | /** @} */ 69 | 70 | #ifdef __cplusplus 71 | } 72 | #endif 73 | #endif /* UTILS_H_INCLUDED */ 74 | -------------------------------------------------------------------------------- /Firmware/SIMPAD/utils/utils_assert.h: -------------------------------------------------------------------------------- 1 | /** 2 | * \file utils_assert.h 3 | * 4 | * \brief Asserts related functionality. 5 | * 6 | * 7 | * Copyright (C) 2016 Atmel Corporation. All rights reserved. 8 | * 9 | * \asf_license_start 10 | * 11 | * \page License 12 | * 13 | * Redistribution and use in source and binary forms, with or without 14 | * modification, are permitted provided that the following conditions are met: 15 | * 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 23 | * 3. The name of Atmel may not be used to endorse or promote products derived 24 | * from this software without specific prior written permission. 25 | * 26 | * 4. This software may only be redistributed and used in connection with an 27 | * Atmel microcontroller product. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 30 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 32 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 33 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 39 | * POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | * \asf_license_stop 42 | * 43 | * 44 | */ 45 | 46 | /** 47 | * \defgroup doc_driver_utils_assert Functionality for assert. 48 | * \ingroup doc_driver_utils 49 | * 50 | * \{ 51 | */ 52 | 53 | #ifndef _ASSERT_H_INCLUDED 54 | #define _ASSERT_H_INCLUDED 55 | 56 | #ifdef __cplusplus 57 | extern "C" { 58 | #endif 59 | 60 | #include 61 | 62 | /** 63 | * \brief Assert macro 64 | * 65 | * This macro is used to throw asserts. It can be mapped to different function 66 | * based on debug level. 67 | * 68 | * \param[in] condition A condition to be checked; 69 | * assert is thrown if the given condition is false 70 | */ 71 | 72 | #ifdef DEBUG 73 | #define ASSERT(condition) \ 74 | if (!(condition)) \ 75 | while (true) \ 76 | ; 77 | #else 78 | #define ASSERT(condition) ((void)0) 79 | #endif 80 | 81 | #ifdef __cplusplus 82 | } 83 | #endif 84 | #endif /* _ASSERT_H_INCLUDED */ 85 | -------------------------------------------------------------------------------- /Firmware/SIMPAD_v1.atsln: -------------------------------------------------------------------------------- 1 |  2 | Microsoft Visual Studio Solution File, Format Version 12.00 3 | # Atmel Studio Solution File, Format Version 11.00 4 | VisualStudioVersion = 14.0.23107.0 5 | MinimumVisualStudioVersion = 10.0.40219.1 6 | Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "SIMPAD", "SIMPAD\SIMPAD.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}" 7 | EndProject 8 | Global 9 | GlobalSection(SolutionConfigurationPlatforms) = preSolution 10 | Debug|AVR = Debug|AVR 11 | Release|AVR = Release|AVR 12 | EndGlobalSection 13 | GlobalSection(ProjectConfigurationPlatforms) = postSolution 14 | {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.ActiveCfg = Debug|AVR 15 | {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|AVR.Build.0 = Debug|AVR 16 | {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.ActiveCfg = Release|AVR 17 | {DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|AVR.Build.0 = Release|AVR 18 | EndGlobalSection 19 | GlobalSection(SolutionProperties) = preSolution 20 | HideSolutionNode = FALSE 21 | EndGlobalSection 22 | EndGlobal 23 | -------------------------------------------------------------------------------- /Hardware/Readme.md: -------------------------------------------------------------------------------- 1 | # Hardware 2 | 3 | Experimental programmer hardware based on an Arduino Nano with a ATMega168PA. 4 | 5 | The programming interface of the MCU is directly connected to GPIO of the ATMega as shown below. Also VDD is controlled by a GPIO. Maximum load on VDD is 20mA according to the PMS150C datasheet, which can be easily sourced from the ATMega. Vpp is generated with a simple boost converter. 6 | 7 | 6-wire 5-wire 8 | PWM = VPP = ICVPP 9 | PB0 = VDD = VDD 10 | PB1 = MISO = ICPDA (data output of MCU or bidirectional) 11 | PB2 = MOSI = Not used (data input of MCU) 12 | PB3 = SCLK = ICPCK 13 | 14 | PA6 = ADC6 = voltage monitor input (5k1/10k divider) 15 | 16 | This is a minimal hardware implementation and is not representative of a production worthy programmer. See below for open issues. 17 | 18 | ## Boost converter to control Vpp 19 | 20 | The programming voltage Vpp is generated with a simple boost converter that is controlled directly by the periphery of the ATMega. The circuit and a LTspice simulation is shown in the images below. This concept was previously used in the Openprog PIC programmer and is also used in the official PICkit by Microchip. See [here](http://openprog.altervista.org/OP_eng.html#Regulator) for more details. 21 | 22 | Timer TC0 is used in fast PWM mode to generate a 62.5 kHz square wave on the input of the switching transistor. The duty cycle of the PWM signal is varied to modify swithing. The voltage across the load is divided with R1 and R3 and fed back into the ADC of the ATMega. Right now the voltage in the programmer is not controlled in a closed loop, therefore changes of the load lead to a deviation of Vpp. To reduce the impact of varying load, a constant loading resistor was added. This may be merged with the voltage divider. 23 | A 1N4148 PN junction diode with ~0.7 Vf drop is used intentionally to reduce the standby voltage of the switching converter to below 5.0 V. 24 | 25 | ## Open issues 26 | 27 | - To properly implement the programming sequence, including corner case verification, it is also necessary to control the voltage of VDD from 2 V to 6.5 V. This requires additional hardware. 28 | - Control of VPP is somewhat instable and has a slow step response. This could be improved with a closed loop converter or a dedicated boost converter IC. 29 | 30 | ### Circuit 31 | ![Circuit](booster%20circuit.gif) 32 | ### Simulation 33 | ![Simulation](booster_transient.gif) 34 | ### Breadboard 35 | ![Breadboard](../hardware.jpg) 36 | -------------------------------------------------------------------------------- /Hardware/SimpleBoost_V4_simple.asc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/SimPad/22191102d1bc6d280b5c20b2e4b45a70a983abee/Hardware/SimpleBoost_V4_simple.asc -------------------------------------------------------------------------------- /Hardware/booster circuit.gif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/SimPad/22191102d1bc6d280b5c20b2e4b45a70a983abee/Hardware/booster circuit.gif -------------------------------------------------------------------------------- /Hardware/booster_transient.gif: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/SimPad/22191102d1bc6d280b5c20b2e4b45a70a983abee/Hardware/booster_transient.gif -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2019 Tim 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. -------------------------------------------------------------------------------- /Protocol/PDK programming sequence v0.5.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/SimPad/22191102d1bc6d280b5c20b2e4b45a70a983abee/Protocol/PDK programming sequence v0.5.pdf -------------------------------------------------------------------------------- /Protocol/Readme.md: -------------------------------------------------------------------------------- 1 | # Analysis of programming sequence 2 | 3 | The pdf file in this folder contains an analysis of datalogs of the programming sequence of a PMS150C and PFS154. The data was recorded by [Frank Buss](http://www.frank-buss.de) on a [fast analog sampler](http://www.eevblog.com/forum/blog/eevblog-1144-padauk-programmer-reverse-engineering/msg2017267/#msg2017267) he built for that purpose. The original data can be found [here](http://www.eevblog.com/forum/blog/eevblog-1144-padauk-programmer-reverse-engineering/msg2096917/#msg2096917 ) and [here](http://www.eevblog.com/forum/blog/eevblog-1144-padauk-programmer-reverse-engineering/msg2113471/#msg2113471 4 | ). 5 | 6 | The purpose of this analysis is to allow a [clean-room implemention](https://en.wikipedia.org/wiki/Clean_room_design) of the Padauk programming protocol based on behavioral analysis, without having to revert to software reverse engineering. 7 | 8 | Another, prior, analysis of the PFS154 protocol by js_12345678_55aa, socram and others can be found [here](http://www.eevblog.com/forum/blog/eevblog-1144-padauk-programmer-reverse-engineering/msg2047933/#msg2047933) and following. 9 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # SimPad 2 | Various hacks for Padauk MCU, the infamous "0.03USD" microcontroller. This is work in progress, don't expect anything to be functional or useful. 3 | 4 | ## Folders 5 | 6 | ### [Hardware](Hardware/) 7 | 8 | Experimental programmer for Padauk MCU based on Arduino Nano, currently living on a breadbord. Not ready for production use, but can maybe serve es a reference. See folder for a description of shortcomings. 9 | 10 | If you are in need of a programmer for the Padauk MCU, please check out the [EasyPDKProg](https://github.com/free-pdk/easy-pdk-programmer-hardware). 11 | 12 | ### [Firmware](Firmware/) 13 | 14 | Firmware, very incomplete work in progress. Is currently able to program PMS150C, PFS154, PMS154C. Right now, no host communication is implemented and the binary needs to be pasted into the source. Debug output is sent to serial output at 115200 baud. Will program a "blinky" into PFS154C in the current configuration. 15 | 16 | ### [Protocol](Protocol/) 17 | 18 | Information on programming protocol 19 | 20 | ### [Toolchain](Toolchain/) 21 | 22 | Toolchain based on EASYPDKPROG and SDCC. Includes a few examples. 23 | 24 | ![Image of breadboard](hardware.jpg) 25 | -------------------------------------------------------------------------------- /Toolchain/examples/ADC_PFS173/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs173 23 | ARCH = pdk15 24 | F_CPU = 8000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk15 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) # size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/ADC_PFS173/adc.c: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------------------- 2 | adc.c 3 | 4 | Example using the ADC in the PFS173. 5 | Analog input is on PB2 6 | 7 | Oct 04, 2019 cpldcpu - first release 8 | ------------------------------------------------------------------ */ 9 | 10 | #include 11 | #include 12 | #include 13 | #include 14 | 15 | // UART configuration 16 | #define TXPORT pa 17 | #define TXPORTC pac 18 | #define TXPIN 7 19 | #define BAUDRATE 115200 20 | 21 | #include "delay.c" // include delay implementation. 22 | #include "PDK_softuart.c" // include softuart implementation 23 | 24 | #define LEDPIN PA0 25 | 26 | unsigned char _sdcc_external_startup(void) 27 | { 28 | CLKMD = CLKMD_IHRC_DIV2|CLKMD_ENABLE_IHRC; // 8 Mhz main clock 29 | PDK_USE_FACTORY_TRIMMING(); 30 | return 0; 31 | } 32 | 33 | void main(void) 34 | { 35 | uint16_t cnt=0; 36 | 37 | PDK_autobaud(); // Adjust baudrate on easypdkprogrammer 38 | 39 | // PAC |= _BV(LEDPIN); // Enable LED output 40 | 41 | PBC&=~_BV(PB2); // Disable PGIO on analog input pin 42 | PBPH&=~_BV(PB2); 43 | PBDIER&=~_BV(PB2); 44 | 45 | ADCM=ADCM_CLK_SYSCLK_DIV16; // 500 kHz ADC clock 46 | ADCC=ADCC_ADC_ENABLE | ADCC_CH_AD2_PB2; // Enable ADC 47 | ADCRGC=ADCRG_ADC_REF_VDD; 48 | 49 | for (;;) { 50 | ADCC|=_BV(6); // Start conversion 51 | 52 | do {} while ((ADCC&_BV(6))==0); 53 | 54 | uint8_t adcout=ADCR; 55 | 56 | PDK_sendchar('\n'); 57 | PDK_senduint16(adcout); 58 | delay_ms(200); 59 | 60 | } 61 | } -------------------------------------------------------------------------------- /Toolchain/examples/WS2812_blinky/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs154 23 | ARCH = pdk14 24 | F_CPU = 8000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk14 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/WS2812_blinky/WS2812_blinky.c: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------------------- 2 | WS2812_blinky.c 3 | 4 | Example showing how to use the PDK_WS2812 functions to write to 5 | WS2812 RGB LEDs. Will cycle the first two LEDs in a string in RGB and 6 | complementary colours. 7 | 8 | Sep 22, 2019 cpldcpu - first release 9 | ------------------------------------------------------------------ */ 10 | 11 | #include 12 | #include 13 | #include 14 | #include 15 | 16 | #define WS2812_PIN PB2 17 | #define WS2812_PORT PB 18 | #define WS2812_PORTC PBC 19 | 20 | #include "delay.c" // include delay implementation. 21 | #include "PDK_WS2812.c" // include WS2812 implementation. 22 | 23 | unsigned char _sdcc_external_startup(void) 24 | { 25 | CLKMD = CLKMD_IHRC_DIV2|CLKMD_ENABLE_IHRC; // 8 Mhz main clock 26 | PDK_USE_FACTORY_TRIMMING(); 27 | return 0; 28 | } 29 | 30 | void main(void) 31 | { 32 | for (;;) { 33 | 34 | PDK_WS2812_writeRGB(0x10,0x00,0x00); // write RGB triple 35 | PDK_WS2812_writeRGB(0x00,0x20,0x20); 36 | delay_ms(200); // Data written to WS2812 string is automatically activated after the bus was idle for >50µs 37 | 38 | PDK_WS2812_writebyte(0x00); // write RGB bytes separately 39 | PDK_WS2812_writebyte(0x10); 40 | PDK_WS2812_writebyte(0x00); 41 | PDK_WS2812_writeRGB(0x20,0x00,0x20); 42 | delay_ms(200); 43 | 44 | PDK_WS2812_writeRGB(0x00,0x00,0x10); 45 | PDK_WS2812_writeRGB(0x20,0x20,0x00); 46 | delay_ms(200); 47 | } 48 | } -------------------------------------------------------------------------------- /Toolchain/examples/WS2812_blinky/readme.md: -------------------------------------------------------------------------------- 1 | # Example using the PDK_WS2812 support for RGB LEDs. 2 | 3 | A small bitbanging routine to support writing to WS2812 and similar RGB-LEDS with integrated controller. Only 4 MHz and 8 MHz CPU clock is allowed. 4 | 5 | The following calls are supported: 6 | 7 | - ```void PDK_WS2812_writebyte(uint8_t)``` Sends one byte to the WS2812 string. Each LED needs 3 (RGB) or 4 (RGBW) bytes. 8 | - ```void PDK_WS_writeRGB(r,g,b)``` Send a RGB triple to the WS2812 string. 9 | - ```void PDK_WS_writeRGBW(r,g,b,w)``` Send a RGBW quadruple to the WS2812 string. 10 | 11 | Please note that the WS2812 will automatically update their RGB value after the bus has been idle for >50µs. Make sure that a wait time is included after writing all date to the string to ensure proper updating. 12 | 13 | The implementation can be found [here](../../library/PDK_WS2812.c). 14 | 15 | In cases of issues, please take a look at the readme of the WS2812_light library [here](https://github.com/cpldcpu/light_ws2812). 16 | 17 | **Note**: This example does not work on PFS173 (PDK15) right now due to a bug in SDCC/SDAS that does not assemble SWAPC correctly. PFS154 (PDK14) works fine, though. -------------------------------------------------------------------------------- /Toolchain/examples/blinky/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs154 23 | ARCH = pdk14 24 | F_CPU = 8000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/blinky/blinky.c: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------- 2 | Blinky on PA4 for PFS154 3 | 4 | Sep 1 , 2019 cpldcpu - First version 5 | Sep 21, 2019 cpldcpu - Updated sfr to upper case 6 | ---------------------------------------------------- */ 7 | 8 | #include 9 | #include 10 | #include 11 | 12 | #include "delay.c" // include delay implementation. Needs to be cleaned up later. 13 | 14 | #define LEDPIN PA4 15 | 16 | unsigned char _sdcc_external_startup(void) 17 | { 18 | CLKMD = CLKMD_IHRC_DIV2|CLKMD_ENABLE_IHRC; // 16/2=8 Mhz main clock 19 | 20 | // Uncomment this line to use the automatic IHRC trimming function included in the EASYPDKPROG software. 21 | // Trimming will only be activated when the program is started for the first time and the resulting 22 | // values will be written to flash. This call is required on MCUS without factory calibration, for example the PMS150C. 23 | // In addition, it is possible to trim the IHRC to value different from 16MHz. Also when the operating voltage deviates 24 | // significantly from 5V it may be sensible to use additional trimming. 25 | 26 | // EASY_PDK_CALIBRATE_IHRC(F_CPU, 5000); // tune SYSCLK to 8.0MHz @ 5.00V 27 | 28 | // Uncomment this line to use the preprogrammed trimming values for IHR and Bandgap provided in 29 | // the flash of PFS154/PFS174. This does not require additional trimming after programming and improves turnaround times. 30 | // The accuracy should be sufficient if you want to use IHRC=16 MHz default at 5.00V 31 | 32 | PDK_USE_FACTORY_TRIMMING(); 33 | 34 | return 0; // perform normal initialization 35 | } 36 | 37 | 38 | void main(void) 39 | { 40 | PAC |= _BV(LEDPIN); // This syntex will infer set0/set1 41 | 42 | for (;;) { 43 | PA ^= _BV(LEDPIN); // Toggle LED 44 | delay_ms(500); 45 | } 46 | } 47 | 48 | -------------------------------------------------------------------------------- /Toolchain/examples/brainfuck/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # Sep 20, 2019/cpldcpu Removed library from source path 19 | # ---------------------------------------------------------------- 20 | 21 | # Define your processor settings here 22 | 23 | MCU = pfs154 24 | ARCH = pdk14 25 | F_CPU = 8000000 26 | TARGET = main.ihx 27 | 28 | # Toolchain settings. Usually does not need to be changed 29 | 30 | LIBRARY = ../../library 31 | SDCC = sdcc 32 | SDLD = sdld 33 | SDAS = sdaspdk14 34 | OBJCOPY = sdobjcopy 35 | PROGRAMMER = easypdkprog 36 | 37 | # Compiler flags 38 | 39 | ASFLAGS = -lo 40 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 41 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 42 | CFLAGS += -I. -I$(LIBRARY) 43 | 44 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 45 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 46 | 47 | OBJS = $(SRCS:.c=.rel) 48 | OBJS += $(ASRCS:.s=.rel) 49 | 50 | all: $(TARGET) size 51 | 52 | $(TARGET): $(OBJS) 53 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 54 | 55 | %.rel: %.s 56 | $(SDAS) $(ASFLAGS) $< 57 | 58 | %.rel: %.c 59 | $(SDCC) $(CFLAGS) -c $< -o $@ 60 | 61 | flash: 62 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 63 | 64 | start: 65 | $(PROGRAMMER) -n $(MCU) start 66 | 67 | compileandrun: all flash start 68 | 69 | size: 70 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 71 | @echo =============== 72 | @echo Size of binary: 73 | @stat -L -c %s $(TARGET).bin 74 | @echo bytes 75 | @echo =============== 76 | 77 | disasm: 78 | python3 simpad_disasm.py 79 | 80 | clean: 81 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 82 | 83 | .PHONY: all clean flash 84 | -------------------------------------------------------------------------------- /Toolchain/examples/brainfuck/brainfuck.c: -------------------------------------------------------------------------------- 1 | // simple brainfuck interpreter for Paudak PFS154 2 | // 3 | // Sep 12th, 2019 cdldcpu - initial 4 | // Sep 20th, 2019 cdldcpu - adjusted to new library structure 5 | // 6 | // 7 | // Based on sbi.c by Daniel B. Cristofani 8 | // http://www.brainfuck.org/ 9 | 10 | #include 11 | #include 12 | #include 13 | #include 14 | 15 | // UART configuration 16 | #define TXPORT pa 17 | #define TXPORTC pac 18 | #define TXPIN 7 19 | #define BAUDRATE 38400 20 | 21 | #include "delay.c" // include delay implementation. 22 | #include "PDK_softuart.c" // include softuart implementation 23 | 24 | #define ARRAYSIZE 64 25 | #define MAXCODESIZE 512 26 | 27 | // ---------------------------------------------------------------------------- 28 | // Brainfuck code is defined directly in code array. Uncomment examples below 29 | // ---------------------------------------------------------------------------- 30 | 31 | // print square numbers 32 | const char code[]="++++[>+++++<-]>[<+++++>-]+<+[>[>+>+<<-]++>>[<<+>>-]>>>[-]++>[-]+>>>+[[-]++++++>>>]<<<[[<++++++++<++>>-]+<.<[>----<-]<]<<[>>>>>[>>>[-]+++++++++<[>-<-]+++++++++>[-[<->-]+[<<<]]<[>+<-]>]<<-]<<-]"; 33 | 34 | //tree - does require input 35 | // const char code[]=">>>--------<,[<[>++++++++++<-]>>[<------>>-<+],]++>>++<--[<++[+>]>+<<+++<]<<[>>+[[>>+<<-]<<]>>>>[[<<+>.>-]>>]<.<<<+<<-]>>[<.>--]>.>>."; 36 | 37 | // fibonacci - terminates in gibberish 38 | // const char code[]=">++++++++++>+>+[[+++++[>++++++++<-]>.<++++++[>--------<-]+<<<]>.>>[[-]<[>+<-]>>[<<+>+>-]<[>+<-[>+<-[>+<-[>+<-[>+<-[>+<-[>+<-[>+<-[>+<-[>[-]>+>+<<<-[>+<-]]]]]]]]]]]+>>>]<<<]"; 39 | 40 | // print "brainfuck" 41 | // const char code[]=">++++[>++++++<-]>-[[<+++++>>+<-]>-]<<[<]>>>>--.<<<-.>>>-.<.<.>---.<<+++.>>>++.<<---.[>]<<."; 42 | 43 | // print "hello world" 44 | // const char code[]="++++++++[>++++[>++>+++>+++>+<<<<-]>+>->+>>+[<]<-]>>.>>---.+++++++..+++.>.<<-.>.+++.------.--------.>+.>++."; 45 | 46 | // output powers of two 47 | // const char code[]=">++++++++++>>+<+[[+++++[>++++++++<-]>.<++++++[>--------<-]+<<]>.>[->[<++>-[<++>-[<++>-[<++>-[<-------->>[-]++<-[<++>-]]]]]]<[>+<-]+>>]<<] "; 48 | 49 | // -------------------------------------------------------------------- 50 | 51 | uint16_t findloopbegin(uint16_t); 52 | uint16_t findloopend(uint16_t); 53 | volatile uint8_t array[ARRAYSIZE]; // memory array 54 | 55 | unsigned char _sdcc_external_startup(void) 56 | { 57 | CLKMD = CLKMD_IHRC_DIV2|CLKMD_ENABLE_IHRC; // 8 Mhz main clock 58 | PDK_USE_FACTORY_TRIMMING(); 59 | 60 | PDK_autobaud(); // send synchronisation character for autobaud 61 | 62 | return 0; 63 | } 64 | 65 | uint16_t findloopend(uint16_t codep) { 66 | uint16_t depth=0; 67 | for (int16_t i=(int16_t)codep+1; i=0 ; i--) { 80 | switch (code[i]) { 81 | case '[': if (!depth--) return i; break; 82 | case ']': depth++; break; 83 | } 84 | } 85 | PDK_sendstring("Umatched ]\n"); 86 | return 0; 87 | } 88 | 89 | void main(void){ 90 | uint8_t memp; 91 | uint16_t codep, codelength; 92 | 93 | codelength=sizeof(code); 94 | memp=0; 95 | for(codep=0;codep': memp++; memp&=(ARRAYSIZE-1);break; 101 | case ',': PDK_sendstring("Entry command ',' not supported\n");break; 102 | case '.': PDK_sendchar(array[memp]==10?'\n':array[memp]); break; 103 | case '[': if(!array[memp]) codep=findloopend(codep); break; 104 | case ']': if(array[memp]) codep=findloopbegin(codep); break; 105 | } 106 | } 107 | } 108 | -------------------------------------------------------------------------------- /Toolchain/examples/brainfuck/readme.md: -------------------------------------------------------------------------------- 1 | # Simple brainfuck interpreter for Paudak PFS154 2 | 3 | Based on sbi.c by Daniel B. Cristofani (http://www.brainfuck.org/) 4 | 5 | Supports all instructions except of ',' (input). The array consists of 8 bit cells and is limited to 64 cells in the PFS154. More cells are possible in devices with larger memory. 6 | 7 | Brainfuck programs are defined directly within the source. Please see source for examples. 8 | 9 | -------------------------------------------------------------------------------- /Toolchain/examples/brainfuck/softuart.s: -------------------------------------------------------------------------------- 1 | 2 | .module SOFTUART 3 | .globl _putchar 4 | .globl _putchar_PARM_1 5 | 6 | _pa= 0x10 7 | _pac= 0x11 8 | 9 | TXPIN= 7 10 | 11 | BAUDRATE = 38400 12 | F_CPU = 8000000 13 | 14 | .area DATA 15 | 16 | _uart_cntr: 17 | .ds 1 18 | _putchar_PARM_1: 19 | .ds 1 20 | .area CODE 21 | 22 | _putchar: 23 | set0 _pa, #TXPIN 24 | set1 _pac, #TXPIN 25 | 26 | call uartdelay 27 | 28 | mov a, #0x08 29 | mov _uart_cntr, a 30 | sendloop: 31 | sr _putchar_PARM_1 32 | swapc _pa,#TXPIN 33 | call uartdelay 34 | 35 | dzsn _uart_cntr 36 | goto sendloop 37 | 38 | set1 _pa, #TXPIN 39 | 40 | uartdelay: 41 | mov a,#(F_CPU/4)/BAUDRATE 42 | 0$: 43 | sub a,#1 44 | t1sn f,z 45 | goto 0$ 46 | ret 47 | 48 | -------------------------------------------------------------------------------- /Toolchain/examples/candleflicker/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs154 23 | ARCH = pdk14 24 | F_CPU = 1000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk14 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/candleflicker/candleflicker.c: -------------------------------------------------------------------------------- 1 | //-------------------------------------------------------- 2 | // Electronic candle for Padauk PFS154C and SDASPDK (SDCC toolchain) 3 | // LED is connected to PA4, PWM0 is used to drive LED 4 | // Implements algorithm from: 5 | // https://github.com/cpldcpu/CandleLEDhack/blob/master/Emulator/CandeflickerLED.c 6 | // 7 | // cpldcpu - Feb 7 2019 8 | // Sep 21, 2019 cpldcpu - update to newer toolchain 9 | //-------------------------------------------------------- 10 | 11 | #include 12 | #include 13 | 14 | // #define candledebug 15 | 16 | #ifdef candledebug 17 | // UART configuration 18 | #define TXPORT pa 19 | #define TXPORTC pac 20 | #define TXPIN 7 21 | #define BAUDRATE 38400 22 | 23 | #include "PDK_softuart.c" // include softuart implementation 24 | 25 | #endif 26 | 27 | #define LEDPIN PA4 28 | 29 | volatile uint16_t rnd_lfsr; 30 | volatile uint16_t lowpass; 31 | 32 | unsigned char _sdcc_external_startup(void) 33 | { 34 | CLKMD = CLKMD_IHRC_DIV16 | CLKMD_ENABLE_IHRC; // 1 Mhz main clock 35 | PDK_USE_FACTORY_TRIMMING(); 36 | #ifdef candledebug 37 | PDK_autobaud(); 38 | #endif 39 | return 0; 40 | } 41 | 42 | void lfsr_step() 43 | { 44 | if (rnd_lfsr & 1) 45 | { 46 | rnd_lfsr = (rnd_lfsr >> 1) ^ 0x822B; 47 | } 48 | else 49 | { 50 | rnd_lfsr = (rnd_lfsr >> 1); 51 | } 52 | } 53 | 54 | void candle_init() 55 | { 56 | PWMG1C = 0x87; // Enable PWMG1, set to PA4, src=IHR 57 | PWMG1S = 0x20; // prescaler=4, divider=1, no interrupt 58 | 59 | PWMG1CUBL = 0xff; // set PWM counter upper bound to 0xffff 60 | PWMG1CUBH = 0xff; 61 | 62 | rnd_lfsr = 0x55ce; 63 | lowpass = 0; 64 | } 65 | 66 | void candle_do() 67 | { 68 | uint16_t newval; 69 | if (rnd_lfsr & 0x100) 70 | { 71 | newval = 255; 72 | } 73 | else 74 | { 75 | newval = (uint8_t)(rnd_lfsr & 255); 76 | } 77 | 78 | // lowpass = newval<<8; // no filter 79 | lowpass = lowpass - (lowpass>>1) + (newval<<7); // IIR filter with lag 2 (recommended) 80 | // lowpass = lowpass - (lowpass>>2) + (newval<<6); // IIR filter with lag 4 (less flicker) 81 | // lowpass = lowpass - (lowpass>>3) + (newval<<5); // IIR filter with lag 8 (even less flicker) 82 | 83 | #ifdef candledebug 84 | PDK_sendchar('\n'); 85 | PDK_senduint16(lowpass); 86 | #endif 87 | 88 | PWMG1DTL = lowpass&255; 89 | PWMG1DTH = lowpass>>8; 90 | 91 | for (char i = 0; i < 3; i++) 92 | { 93 | lfsr_step(); 94 | if ((rnd_lfsr & 0xff) > 128) 95 | return; 96 | } 97 | } 98 | 99 | void main(void) 100 | { 101 | candle_init(); 102 | 103 | T16M = T16_CLK_DIV16 | T16_CLK_SYSCLK | T16_INTSRC_11BIT; // 1 MHZ / 16 / (2^11) = 30 Hz 104 | INTEN |= INTEN_T16; 105 | INTRQ = 0; 106 | 107 | __asm__("engint"); // enable interrupts 108 | 109 | for (;;) 110 | { 111 | } 112 | } 113 | 114 | void handler(void) __interrupt(0) 115 | { 116 | if (INTRQ & INTRQ_T16) 117 | { 118 | candle_do(); 119 | intrq &= ~INTRQ_T16; 120 | } 121 | } 122 | -------------------------------------------------------------------------------- /Toolchain/examples/chainable_display/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs154 23 | ARCH = pdk14 24 | F_CPU = 8000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk14 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/chainable_display/readme.md: -------------------------------------------------------------------------------- 1 | This is the firmware for a chainable 7-segment displays. See [here](https://cpldcpu.wordpress.com/2020/04/05/addressable-7-segment-display/) for details. 2 | -------------------------------------------------------------------------------- /Toolchain/examples/lightsensor/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs154 23 | ARCH = pdk14 24 | F_CPU = 8000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk14 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/lightsensor/lightsensor.c: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------------------- 2 | ligthsensor.c 3 | 4 | LED is connected to PA0 (anode) and PA4 (cathode). 5 | 6 | Sep 21, 2019 cpldcpu - first release 7 | Sep 29, 2019 cpldcpu - last iteration after many tries. It appears the PFS154 8 | is too noisy for this to work. 9 | ------------------------------------------------------------------ */ 10 | 11 | #include 12 | #include 13 | #include 14 | #include 15 | 16 | // UART configuration 17 | #define TXPORT pa 18 | #define TXPORTC pac 19 | #define TXPIN 7 20 | #define BAUDRATE 38400 21 | 22 | #include "delay.c" // include delay implementation. 23 | #include "PDK_softuart.c" // include softuart implementation 24 | 25 | uint16_t senselight_delay(void); 26 | 27 | volatile uint32_t brightness; 28 | volatile uint16_t counter; 29 | volatile uint8_t vref=8; 30 | 31 | unsigned char _sdcc_external_startup(void) 32 | { 33 | CLKMD = CLKMD_IHRC_DIV2|CLKMD_ENABLE_IHRC; // 8 Mhz main clock 34 | PDK_USE_FACTORY_TRIMMING(); 35 | PDK_autobaud(); // Adjust baudrate on easypdkprogrammer 36 | return 0; 37 | } 38 | 39 | void main(void) 40 | { 41 | uint32_t cnt=0; 42 | 43 | PDK_sendchar('\n'); 44 | 45 | for (;;) { 46 | cnt=senselight_delay(); 47 | PDK_senduint16(cnt); 48 | PDK_sendchar('\n'); 49 | } 50 | } 51 | 52 | // Thesis on LED as light sensor https://digi.lib.ttu.ee/i/file.php?DLID=9345&t=1 53 | 54 | uint16_t senselight_delay(void) { 55 | 56 | __asm 57 | set1 _pac,#0 ; PA.0=output 58 | set0 _padier,#0 ; PA.0=Disable input 59 | set0 _pa,#0 ; PA.0=GND 60 | 61 | set1 _pa,#4 ; PA.4=VDD 62 | set1 _pac,#4 ; PA.4=output - Discharge LED 63 | set0 _padier,#4 ; PA.4 Disable input 64 | set0 _paph,#4 ; PA.4 pull up off. 65 | 66 | mov a,#(GPCC_COMP_MINUS_VINT_R | GPCC_COMP_PLUS_PA4 | GPCC_COMP_INVERSE | GPCC_COMP_ENABLE ) 67 | mov _gpcc,a 68 | 69 | mov a, s(vref) 70 | // or a, #GPCS_COMP_OUTPUT_PA0 // enable comparator output on PA0 71 | mov _gpcs,a ; 72 | 73 | clear _brightness+0 74 | mov a,#130 // max output value of timer expires 75 | mov _brightness+1,a 76 | 77 | mov a, #INTEN_T16 78 | mov s(INTEN),a 79 | mov a, #(T16_CLK_DIV16 | T16_CLK_IHRC | T16_INTSRC_15BIT) 80 | mov s(T16M),a ; enable timer at 1 MHz, interrupt after 32768 cycles => 32.7ms 81 | mov a, #0 82 | mov s(INTRQ),a 83 | 84 | clear _t16c+0 85 | clear _t16c+1 86 | 87 | stt16 _t16c ; initialize timer with 0 88 | set0 _pac,#4 ; PA.4=input 89 | 90 | .senseloop4$: 91 | t0sn s(INTRQ), #2 ; check for timer interrupt 92 | goto senseloopout4 93 | t1sn s(GPCC),#6 94 | goto .senseloop4$ 95 | 96 | ldt16 _t16c ; load timer value 97 | 98 | mov a, _t16c+0 99 | mov _brightness+0,a 100 | mov a, _t16c+1 101 | mov _brightness+1,a 102 | 103 | senseloopout4: 104 | t1sn s(INTRQ), #2 ; check for timer interrupt 105 | goto senseloopout4 106 | __endasm; 107 | 108 | return brightness; 109 | } 110 | 111 | -------------------------------------------------------------------------------- /Toolchain/examples/uartsend/Makefile: -------------------------------------------------------------------------------- 1 | # ---------------------------------------------------------------- 2 | # Generic makefile for the Padauk open source toolchain 3 | # 4 | # Usage: 5 | # 6 | # make - build project 7 | # make flash - flash binary to microcontroller 8 | # make start - start program on microcontroller 9 | # make clean - clean 10 | # make compileandrun - compile, flash and start 11 | # 12 | # Requires the SDCC compiler and the easypdkprog programmer 13 | # 14 | # ---------------------------------------------------------------- 15 | # History: 16 | # 17 | # Sep 1th, 2019/cpldcpu First version 18 | # ---------------------------------------------------------------- 19 | 20 | # Define your processor settings here 21 | 22 | MCU = pfs154 23 | ARCH = pdk14 24 | F_CPU = 8000000 25 | TARGET = main.ihx 26 | 27 | # Toolchain settings. Usually does not need to be changed 28 | 29 | LIBRARY = ../../library 30 | SDCC = sdcc 31 | SDLD = sdld 32 | SDAS = sdaspdk14 33 | OBJCOPY = sdobjcopy 34 | PROGRAMMER = easypdkprog 35 | 36 | # Compiler flags 37 | 38 | ASFLAGS = -lo 39 | LDFLAGS = -m$(ARCH) -l$(ARCH) --out-fmt-ihx 40 | CFLAGS = -m$(ARCH) -p$(MCU) -DF_CPU=$(F_CPU) 41 | CFLAGS += -I. -I$(LIBRARY) 42 | 43 | SRCS := $(wildcard *.c) # $(LIBRARY)/*.c) 44 | ASRCS := $(wildcard *.s) # $(LIBRARY)/*.s) 45 | 46 | OBJS = $(SRCS:.c=.rel) 47 | OBJS += $(ASRCS:.s=.rel) 48 | 49 | all: $(TARGET) size 50 | 51 | $(TARGET): $(OBJS) 52 | $(SDCC) $(LDFLAGS) $(OBJS) -o $@ 53 | 54 | %.rel: %.s 55 | $(SDAS) $(ASFLAGS) $< 56 | 57 | %.rel: %.c 58 | $(SDCC) $(CFLAGS) -c $< -o $@ 59 | 60 | flash: 61 | $(PROGRAMMER) -n $(MCU) write $(TARGET) 62 | 63 | start: 64 | $(PROGRAMMER) -n $(MCU) start 65 | 66 | compileandrun: all flash start 67 | 68 | size: 69 | $(OBJCOPY) -I ihex -O binary $(TARGET) $(TARGET).bin 70 | @echo =============== 71 | @echo Size of binary: 72 | @stat -L -c %s $(TARGET).bin 73 | @echo bytes 74 | @echo =============== 75 | 76 | disasm: 77 | python3 simpad_disasm.py 78 | 79 | clean: 80 | rm -f $(OBJECTS) *.map *.asm *.rel *.ihx *.sym *.lk *.lst *.rst *.cdb *.bin 81 | 82 | .PHONY: all clean flash 83 | -------------------------------------------------------------------------------- /Toolchain/examples/uartsend/readme.md: -------------------------------------------------------------------------------- 1 | # Example using the PDK_softuart serial monitor 2 | 3 | The soft UART TX and print functions founds in ```"library/PDK_softuart.c"``` provide a simple monitor function that can be used for debugging. All functions are programmed in size optimized Assembler and occupy less than 100 instructions. No hardware ressources (IRQ) are used which allows retargeting to any GPIO. Default is PA7, which is also the default pin used by EASYPDKPROG. 4 | 5 | Right now the following calls are supported 6 | 7 | - ```void PDK_autobaud(void) ``` Autobaud for the easypdkprogrammer. This needs to be called before sending anything on the UART 8 | - ```void PDK_sendchar(uint8_t) ``` Send a single char on the serial port. So far, no receving is possible. 9 | - ```void PDK_sendstring(char *) ``` Sends a zero terminated string that can reside in RAM or ROM 10 | - ```void PDK_senduint16(uint16_t)``` Prints a decimal representation of a 16 bit unsigned value on the UART. 11 | 12 | No serial receive functionality is provided as of now. 13 | 14 | The implementation of the softuart can be found [here](../../library/PDK_softuart.c). 15 | -------------------------------------------------------------------------------- /Toolchain/examples/uartsend/uartsend.c: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------------------- 2 | uartsend.c 3 | 4 | Example showing how to use the PDK_softuart routines for printf 5 | style debugging 6 | 7 | Sep 21, 2019 cpldcpu - first release 8 | ------------------------------------------------------------------ */ 9 | 10 | #include 11 | #include 12 | #include 13 | #include 14 | 15 | // UART configuration 16 | #define TXPORT pa 17 | #define TXPORTC pac 18 | #define TXPIN 7 19 | #define BAUDRATE 38400 20 | 21 | #include "delay.c" // include delay implementation. 22 | #include "PDK_softuart.c" // include softuart implementation 23 | 24 | #define LEDPIN PA4 25 | 26 | unsigned char _sdcc_external_startup(void) 27 | { 28 | CLKMD = CLKMD_IHRC_DIV2|CLKMD_ENABLE_IHRC; // 8 Mhz main clock 29 | PDK_USE_FACTORY_TRIMMING(); 30 | return 0; 31 | } 32 | 33 | void main(void) 34 | { 35 | uint16_t cnt=0; 36 | 37 | PDK_autobaud(); // Adjust baudrate on easypdkprogrammer 38 | 39 | PAC |= _BV(LEDPIN); // Enable LED output 40 | 41 | for (;;) { 42 | PA ^= _BV(LEDPIN); // Toggle LED 43 | PDK_senduint16(cnt++); 44 | PDK_sendstring(" counts\n"); 45 | delay_ms(200); 46 | } 47 | } -------------------------------------------------------------------------------- /Toolchain/library/PDK_WS2812.c: -------------------------------------------------------------------------------- 1 | 2 | /* --------------------------------------------------------------- 3 | PDK_WS2812.c 4 | 5 | Support for WS2812 RGB LEDs. Requires either 4 MHz or 8 MHz F_CPU 6 | clock. Please set F_CPU accordingly. 7 | 8 | The follow #defines need to be present before this source is included: 9 | 10 | WS2812_PORT - Port register (pa,pb,pc) 11 | WS2812_PORTC - Port controler register (pac,pbc,pcc) 12 | WS2812_PIN - Pin on port (0-7) 13 | 14 | Sep 22, 2019 cpldcpu - first release 15 | ------------------------------------------------------------------ */ 16 | 17 | /* 18 | Cycle timing: 19 | 20 | t0 t1 t2 t3 21 | 8 Mhz timing: 0 3 7 10 22 | 4 Mhz timing: 1 2 3 6 23 | 24 | See here for details: 25 | https://cpldcpu.wordpress.com/2014/01/14/light_ws2812-library-v2-0-part-i-understanding-the-ws2812/ 26 | 27 | */ 28 | 29 | #include 30 | 31 | void PDK_WS2812_writebyte(uint8_t in) { 32 | 33 | in; 34 | #if (F_CPU==8000000) 35 | __asm 36 | set1 s(WS2812_PORTC),#(WS2812_PIN) 37 | mov a,#8 38 | 10$: 39 | set1 s(WS2812_PORT),#(WS2812_PIN) ;0 40 | sl _PDK_WS2812_writebyte_PARM_1+0 ;1 41 | nop ;2 42 | swapc s(WS2812_PORT),#(WS2812_PIN) ;3 43 | nop ;4 44 | nop ;5 45 | nop ;6 46 | set0 s(WS2812_PORT),#(WS2812_PIN) ;7 47 | dzsn a ;8 48 | goto 10$ ;10 49 | __endasm; 50 | #elif (F_CPU==4000000) 51 | __asm 52 | set1 s(WS2812_PORTC),#(WS2812_PIN) 53 | mov a,#8 54 | 10$: 55 | sl _PDK_WS2812_writebyte_PARM_1+0 ;0 56 | set1 s(WS2812_PORT),#(WS2812_PIN) ;1 57 | swapc s(WS2812_PORT),#(WS2812_PIN) ;2 58 | set0 s(WS2812_PORT),#(WS2812_PIN) ;3 59 | dzsn a ;4 60 | goto 10$ ;6 61 | __endasm; 62 | #else 63 | #error "Please set F_CPU to 8MHz or 4MHz for the WS2812 functions" 64 | #endif 65 | } 66 | -------------------------------------------------------------------------------- /Toolchain/library/PDK_softuart.c: -------------------------------------------------------------------------------- 1 | /* 2 | PDK software uart 3 | Size optimized soft UART functions to support printf style debuggin on Padauk MCUS. 4 | 5 | void PDK_autobaud(void); // autobaud for the easypdkprogrammer. This needs to be called before sending anything on the UART 6 | void PDK_sendchar(uint8_t); // Send a single char on the serial port. So far, no receving is possible. 7 | void PDK_sendstring(char *); // Sends a zero terminated string that can reside in RAM or ROM 8 | void PDK_senduint16(uint16_t); // Prints a decimal representation of a 16 bit unsigned value on the UART. 9 | 10 | September 20, 2019 cpldcpu - first version 11 | */ 12 | 13 | #include 14 | #include 15 | 16 | volatile uint8_t uart_cntr; 17 | volatile uint8_t loopctr1,loopctr2; 18 | volatile uint8_t print_tmp[12]; 19 | 20 | void PDK_sendchar(uint8_t out) { 21 | out; 22 | __asm 23 | _transmitchar: 24 | set0 s(TXPORT), #TXPIN 25 | set1 s(TXPORTC), #TXPIN 26 | 27 | call uartdelay 28 | 29 | mov a, #0x08 30 | mov _uart_cntr, a 31 | sendloop: 32 | sr _PDK_sendchar_PARM_1 33 | 34 | #if defined __SDCC_pdk15 35 | .word (0x0710|0x5c00|(TXPIN<<7)) // work around bug in SDCC 36 | #else 37 | swapc s(TXPORT),#7 38 | #endif 39 | call uartdelay 40 | 41 | dzsn _uart_cntr 42 | goto sendloop 43 | 44 | set1 s(TXPORT), #TXPIN 45 | 46 | uartdelay: 47 | mov a,#((F_CPU/4)/BAUDRATE) 48 | 0$: 49 | sub a,#1 50 | t1sn f,z 51 | goto 0$ 52 | // ret 53 | __endasm; 54 | 55 | } 56 | 57 | void PDK_autobaud(void) { 58 | 59 | __asm 60 | mov a,#0x55 61 | mov _PDK_sendchar_PARM_1,a 62 | call _PDK_sendchar 63 | call uartdelay 64 | call uartdelay 65 | call uartdelay 66 | call uartdelay 67 | __endasm; 68 | } 69 | 70 | void PDK_sendstring(char *in) 71 | { 72 | in; 73 | __asm 74 | 1$: 75 | mov a, _PDK_sendstring_PARM_1+0 76 | mov p, a 77 | mov a, _PDK_sendstring_PARM_1+1 78 | call __gptrget 79 | cneqsn a, #0x00 80 | goto 2$ 81 | mov _PDK_sendchar_PARM_1+0, a 82 | inc _PDK_sendstring_PARM_1+0 83 | addc _PDK_sendstring_PARM_1+1 84 | call _PDK_sendchar 85 | goto 1$ 86 | 2$: 87 | __endasm; 88 | } 89 | // while (*in) PDK_sendchar(*in++); 90 | 91 | // ------------------------------------------------------- 92 | // print_uint16 93 | // 94 | // Accepts an uint16 value as parameter and outputs its 95 | // decimal representation on the UART using "putchar". 96 | // Optimized for size. See C code below for algorithm. 97 | // ------------------------------------------------------- 98 | 99 | void PDK_senduint16(uint16_t in) { 100 | PDK_senduint32((uint32_t) in); 101 | } 102 | 103 | void PDK_senduint32(uint32_t in) { 104 | 105 | in; 106 | 107 | __asm 108 | clear _print_tmp+11 ;store value >10 here to display leading zeroes 109 | 110 | mov a,#32 111 | mov _loopctr1,a 112 | ; mov _print_tmp+5,a 113 | print_uint16_loop$: 114 | sl _PDK_senduint32_PARM_1+0 115 | slc _PDK_senduint32_PARM_1+1 116 | slc _PDK_senduint32_PARM_1+2 117 | slc _PDK_senduint32_PARM_1+3 118 | pushaf ; save carry flag 119 | 120 | mov a, #(_print_tmp) 121 | mov p, a 122 | clear p+1 123 | 124 | mov a, #10 125 | mov _loopctr2,a 126 | 127 | print_uint16_innerloop$: 128 | popaf 129 | idxm a, p 130 | slc a 131 | idxm p,a 132 | add a, #-10 133 | t0sn f,c 134 | idxm p,a 135 | pushaf ; save carry flag 136 | 137 | inc p 138 | dzsn _loopctr2 139 | goto print_uint16_innerloop$ 140 | 141 | popaf 142 | 143 | dzsn _loopctr1 144 | goto print_uint16_loop$ 145 | 146 | mov a,#10 ; Iterate also though last element, which is used as a flag. p points to last element 147 | mov _loopctr1,a 148 | 149 | print_uint16_outloop$: 150 | idxm a, p 151 | ceqsn a, _print_tmp+11 ; skip leading zeros. Also skip last element in array 152 | call digitout 153 | 154 | dec p 155 | 156 | dzsn _loopctr1 157 | goto print_uint16_outloop$ 158 | 159 | idxm a, p ; rightmost digit is always printed 160 | 161 | digitout: 162 | add a, #0x30 163 | mov _PDK_sendchar_PARM_1+0, a 164 | mov _print_tmp+11,a ; Dont skip further zeros 165 | call _transmitchar ; Uses ret from transmitchar 166 | idxm p, a ; delete printed digits to erase buffer. Nonprinted digits are already zero. 167 | __endasm; 168 | } 169 | 170 | // ------------------------------------------------------ 171 | // C-Version, for reference. 172 | // Uses two step approach: 173 | // 1) Convert binary to BCD, one digit per byte 174 | // 2) Print array as ASCII. 175 | // ------------------------------------------------------ 176 | // void printnum(uint16_t num) { 177 | // char outbuf[5]={0,0,0,0,0}; 178 | // uint8_t i,k; 179 | // for (i=0; i<16; i++) { 180 | // uint8_t carry=0; 181 | // if (num&0x8000) carry=1; 182 | // num<<=1; 183 | // for (k=0; k<5; k++) { 184 | // outbuf[k]<<=1; 185 | // outbuf[k]|=carry; 186 | // carry=0; 187 | // if (outbuf[k]>=10) {outbuf[k]-=10; carry=1;} 188 | // } 189 | // } 190 | // k=4; 191 | // do { 192 | // putchar(outbuf[k]+'0'); 193 | // } while (k-->0); 194 | // } -------------------------------------------------------------------------------- /Toolchain/library/delay.c: -------------------------------------------------------------------------------- 1 | // delay_c for easy pdk toolchain 2 | 3 | #include 4 | #include 5 | 6 | void delay_ms(uint16_t ms) { 7 | while (ms--) { 8 | for (uint8_t i=0; i<(F_CPU/1000/200); i++) __asm__("mov a,#50\n0$: sub a,#1\nt1sn f,z\ngoto 0$\n"); // each loop is 50*4=200 cycles. 9 | } 10 | } 11 | 12 | -------------------------------------------------------------------------------- /Toolchain/library/pdk/WS2812.h: -------------------------------------------------------------------------------- 1 | /* --------------------------------------------------------------- 2 | WS2812_.h 3 | 4 | Sep 22, 2019 cpldcpu - first release 5 | ------------------------------------------------------------------ */ 6 | 7 | #ifndef __WS2812_h 8 | #define __WS2812_h 9 | 10 | // Write RGB to WS2812 string 11 | #define PDK_WS2812_writeRGB(r,g,b) PDK_WS2812_writebyte(r);PDK_WS2812_writebyte(g);PDK_WS2812_writebyte(b); 12 | 13 | // Write RGBW to WS2812 string 14 | #define PDK_WS2812_writeRGBW(r,g,b,w) PDK_WS2812_writebyte(r);PDK_WS2812_writebyte(g);PDK_WS2812_writebyte(b);PDK_WS2812_writebyte(w); 15 | 16 | 17 | // Write single byte to RGB string 18 | void PDK_WS2812_writebyte(uint8_t); 19 | 20 | #endif -------------------------------------------------------------------------------- /Toolchain/library/pdk/delay.h: -------------------------------------------------------------------------------- 1 | 2 | // delay_h for padauk toolchain 3 | 4 | #include 5 | 6 | #ifndef F_CPU 7 | # warning "F_CPU not defined, using 8MHz by default" 8 | # define F_CPU 8000000 9 | #endif 10 | 11 | extern void delay_ms(uint16_t delay); 12 | 13 | #define delay_cycles(CYCLES) __asm__("mov a,#("#CYCLES"/4)\n0$: sub a,#1\nt1sn f,z\ngoto 0$\n"); // each loop is 4 cycles. 14 | 15 | 16 | -------------------------------------------------------------------------------- /Toolchain/library/pdk/io.h: -------------------------------------------------------------------------------- 1 | /* 2 | Free-PDK main io include 3 | */ 4 | 5 | #ifndef __PDK_IO_H 6 | #define __PDK_IO_H 7 | 8 | #include 9 | 10 | #if defined(__SDCC_pdk14) 11 | #include "io_pfs154.h" 12 | #elif defined(__SDCC_pdk15) 13 | #include "io_pfs173.h" 14 | #else 15 | #error "Could not identify processor type. Please make sure to set it with -pxxx" 16 | #endif 17 | 18 | #endif 19 | -------------------------------------------------------------------------------- /Toolchain/library/pdk/io_pfs154.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PFS154 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.814272 4 | 5 | #ifndef __PDK_IO_PFS154_H 6 | #define __PDK_IO_PFS154_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 127 11 | #define __PDK_IOEND 63 12 | #define __PDK_FLASHEND 2047 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {__asm__ (".word (0x3fed)\nmov _ihrcr,a\n.word (0x3fee)\nmov _bgtr,a\n");} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define SP sp // __sfr __at(0x02) SP 21 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 22 | #define INTEN inten // __sfr __at(0x04) INTEN 23 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 24 | #define T16M t16m // __sfr __at(0x06) T16M 25 | #define MISC misc // __sfr __at(0x08) MISC 26 | #define TM2B tm2b // __sfr __at(0x09) TM2B 27 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 28 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 29 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 30 | #define PADIER padier // __sfr __at(0x0d) PADIER 31 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 32 | #define MISC2 misc2 // __sfr __at(0x0f) MISC2 33 | #define PA pa // __sfr __at(0x10) PA 34 | #define PAC pac // __sfr __at(0x11) PAC 35 | #define PAPH paph // __sfr __at(0x12) PAPH 36 | #define PB pb // __sfr __at(0x14) PB 37 | #define PBC pbc // __sfr __at(0x15) PBC 38 | #define PBPH pbph // __sfr __at(0x16) PBPH 39 | #define TM2S tm2s // __sfr __at(0x17) TM2S 40 | #define GPCC gpcc // __sfr __at(0x18) GPCC 41 | #define GPCS gpcs // __sfr __at(0x19) GPCS 42 | #define BGTR bgtr // __sfr __at(0x1a) BGTR 43 | #define MISC_LVR misc_lvr // __sfr __at(0x1b) MISC_LVR 44 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 45 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 46 | #define PWMG0C pwmg0c // __sfr __at(0x20) PWMG0C 47 | #define PWMG0S pwmg0s // __sfr __at(0x21) PWMG0S 48 | #define PWMG0DTH pwmg0dth // __sfr __at(0x22) PWMG0DTH 49 | #define PWMG0DTL pwmg0dtl // __sfr __at(0x23) PWMG0DTL 50 | #define PWMG0CUBH pwmg0cubh // __sfr __at(0x24) PWMG0CUBH 51 | #define PWMG0CUBL pwmg0cubl // __sfr __at(0x25) PWMG0CUBL 52 | #define PWMG1C pwmg1c // __sfr __at(0x26) PWMG1C 53 | #define PWMG1S pwmg1s // __sfr __at(0x27) PWMG1S 54 | #define PWMG1DTH pwmg1dth // __sfr __at(0x28) PWMG1DTH 55 | #define PWMG1DTL pwmg1dtl // __sfr __at(0x29) PWMG1DTL 56 | #define PWMG1CUBH pwmg1cubh // __sfr __at(0x2a) PWMG1CUBH 57 | #define PWMG1CUBL pwmg1cubl // __sfr __at(0x2b) PWMG1CUBL 58 | #define PWMG2C pwmg2c // __sfr __at(0x2c) PWMG2C 59 | #define PWMG2S pwmg2s // __sfr __at(0x2d) PWMG2S 60 | #define PWMG2DTH pwmg2dth // __sfr __at(0x2e) PWMG2DTH 61 | #define PWMG2DTL pwmg2dtl // __sfr __at(0x2f) PWMG2DTL 62 | #define PWMG2CUBH pwmg2cubh // __sfr __at(0x30) PWMG2CUBH 63 | #define PWMG2CUBL pwmg2cubl // __sfr __at(0x31) PWMG2CUBL 64 | #define ILRCR ilrcr // __sfr __at(0x39) ILRCR 65 | 66 | __sfr __at(0x00) flag; 67 | __sfr __at(0x02) sp; 68 | __sfr __at(0x03) clkmd; 69 | __sfr __at(0x04) inten; 70 | __sfr __at(0x05) intrq; 71 | __sfr __at(0x06) t16m; 72 | 73 | __sfr __at(0x08) misc; 74 | __sfr __at(0x09) tm2b; 75 | __sfr __at(0x0a) eoscr; 76 | __sfr __at(0x0b) ihrcr; 77 | __sfr __at(0x0c) integs; 78 | __sfr __at(0x0d) padier; 79 | __sfr __at(0x0e) pbdier; 80 | __sfr __at(0x0f) misc2; 81 | 82 | __sfr __at(0x10) pa; 83 | __sfr __at(0x11) pac; 84 | __sfr __at(0x12) paph; 85 | __sfr __at(0x14) pb; 86 | __sfr __at(0x15) pbc; 87 | __sfr __at(0x16) pbph; 88 | __sfr __at(0x17) tm2s; 89 | 90 | __sfr __at(0x18) gpcc; 91 | __sfr __at(0x19) gpcs; 92 | __sfr __at(0x1a) bgtr; 93 | __sfr __at(0x1b) misc_lvr; 94 | __sfr __at(0x1c) tm2c; 95 | __sfr __at(0x1d) tm2ct; 96 | 97 | __sfr __at(0x20) pwmg0c; 98 | __sfr __at(0x21) pwmg0s; 99 | __sfr __at(0x22) pwmg0dth; 100 | __sfr __at(0x23) pwmg0dtl; 101 | __sfr __at(0x24) pwmg0cubh; 102 | __sfr __at(0x25) pwmg0cubl; 103 | __sfr __at(0x26) pwmg1c; 104 | __sfr __at(0x27) pwmg1s; 105 | 106 | __sfr __at(0x28) pwmg1dth; 107 | __sfr __at(0x29) pwmg1dtl; 108 | __sfr __at(0x2a) pwmg1cubh; 109 | __sfr __at(0x2b) pwmg1cubl; 110 | __sfr __at(0x2c) pwmg2c; 111 | __sfr __at(0x2d) pwmg2s; 112 | __sfr __at(0x2e) pwmg2dth; 113 | __sfr __at(0x2f) pwmg2dtl; 114 | 115 | __sfr __at(0x30) pwmg2cubh; 116 | __sfr __at(0x31) pwmg2cubl; 117 | 118 | __sfr __at(0x39) ilrcr; 119 | 120 | #endif 121 | -------------------------------------------------------------------------------- /Toolchain/library/pdk/io_pfs173.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PFS173 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.829285 4 | 5 | #ifndef __PDK_IO_PFS173_H 6 | #define __PDK_IO_PFS173_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 255 11 | #define __PDK_IOEND 127 12 | #define __PDK_FLASHEND 3071 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {__asm__ (".word (0x7bed)\nmov _ihrcr,a\n.word (0x7bee)\nmov _bgtr,a\n");} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define SP sp // __sfr __at(0x02) SP 21 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 22 | #define INTEN inten // __sfr __at(0x04) INTEN 23 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 24 | #define T16M t16m // __sfr __at(0x06) T16M 25 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 26 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 27 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 28 | #define PADIER padier // __sfr __at(0x0d) PADIER 29 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 30 | #define PA pa // __sfr __at(0x10) PA 31 | #define PAC pac // __sfr __at(0x11) PAC 32 | #define PAPH paph // __sfr __at(0x12) PAPH 33 | #define PB pb // __sfr __at(0x13) PB 34 | #define PBC pbc // __sfr __at(0x14) PBC 35 | #define PBPH pbph // __sfr __at(0x15) PBPH 36 | #define PC pc // __sfr __at(0x16) PC 37 | #define PCC pcc // __sfr __at(0x17) PCC 38 | #define PCPH pcph // __sfr __at(0x18) PCPH 39 | #define PBPL pbpl // __sfr __at(0x19) PBPL 40 | #define PCPL pcpl // __sfr __at(0x1a) PCPL 41 | #define ADCC adcc // __sfr __at(0x20) ADCC 42 | #define ADCM adcm // __sfr __at(0x21) ADCM 43 | #define ADCR adcr // __sfr __at(0x22) ADCR 44 | #define ADCRGC adcrgc // __sfr __at(0x24) ADCRGC 45 | #define MISC misc // __sfr __at(0x26) MISC 46 | #define MISC2 misc2 // __sfr __at(0x27) MISC2 47 | #define MISC_LVR misc_lvr // __sfr __at(0x28) MISC_LVR 48 | #define GPCC gpcc // __sfr __at(0x2b) GPCC 49 | #define GPCS gpcs // __sfr __at(0x2c) GPCS 50 | #define TM2C tm2c // __sfr __at(0x30) TM2C 51 | #define TM2CT tm2ct // __sfr __at(0x31) TM2CT 52 | #define TM2S tm2s // __sfr __at(0x32) TM2S 53 | #define TM2B tm2b // __sfr __at(0x33) TM2B 54 | #define TM3C tm3c // __sfr __at(0x34) TM3C 55 | #define TM3S tm3s // __sfr __at(0x35) TM3S 56 | #define TM3CT tm3ct // __sfr __at(0x36) TM3CT 57 | #define TM3B tm3b // __sfr __at(0x37) TM3B 58 | #define PWMG0C pwmg0c // __sfr __at(0x40) PWMG0C 59 | #define PWMGCLK pwmgclk // __sfr __at(0x41) PWMGCLK 60 | #define PWMG0DTH pwmg0dth // __sfr __at(0x42) PWMG0DTH 61 | #define PWMG0DTL pwmg0dtl // __sfr __at(0x43) PWMG0DTL 62 | #define PWMG0CUBH pwmg0cubh // __sfr __at(0x44) PWMG0CUBH 63 | #define PWMG0CUBL pwmg0cubl // __sfr __at(0x45) PWMG0CUBL 64 | #define PWMG1C pwmg1c // __sfr __at(0x46) PWMG1C 65 | #define PWMG1DTH pwmg1dth // __sfr __at(0x48) PWMG1DTH 66 | #define PWMG1DTL pwmg1dtl // __sfr __at(0x49) PWMG1DTL 67 | #define PWMG2C pwmg2c // __sfr __at(0x4c) PWMG2C 68 | #define PWMG2DTH pwmg2dth // __sfr __at(0x4e) PWMG2DTH 69 | #define PWMG2DTL pwmg2dtl // __sfr __at(0x4f) PWMG2DTL 70 | #define ILRCR ilrcr // __sfr __at(0x62) ILRCR 71 | #define BGTR bgtr // __sfr __at(0x63) BGTR 72 | #define ROP rop // __sfr __at(0x67) ROP 73 | 74 | __sfr __at(0x00) flag; 75 | __sfr __at(0x02) sp; 76 | __sfr __at(0x03) clkmd; 77 | __sfr __at(0x04) inten; 78 | __sfr __at(0x05) intrq; 79 | __sfr __at(0x06) t16m; 80 | 81 | __sfr __at(0x0a) eoscr; 82 | __sfr __at(0x0b) ihrcr; 83 | __sfr __at(0x0c) integs; 84 | __sfr __at(0x0d) padier; 85 | __sfr __at(0x0e) pbdier; 86 | 87 | __sfr __at(0x10) pa; 88 | __sfr __at(0x11) pac; 89 | __sfr __at(0x12) paph; 90 | __sfr __at(0x13) pb; 91 | __sfr __at(0x14) pbc; 92 | __sfr __at(0x15) pbph; 93 | __sfr __at(0x16) pc; 94 | __sfr __at(0x17) pcc; 95 | 96 | __sfr __at(0x18) pcph; 97 | __sfr __at(0x19) pbpl; 98 | __sfr __at(0x1a) pcpl; 99 | 100 | __sfr __at(0x20) adcc; 101 | __sfr __at(0x21) adcm; 102 | __sfr __at(0x22) adcr; 103 | __sfr __at(0x24) adcrgc; 104 | __sfr __at(0x26) misc; 105 | __sfr __at(0x27) misc2; 106 | 107 | __sfr __at(0x28) misc_lvr; 108 | __sfr __at(0x2b) gpcc; 109 | __sfr __at(0x2c) gpcs; 110 | 111 | __sfr __at(0x30) tm2c; 112 | __sfr __at(0x31) tm2ct; 113 | __sfr __at(0x32) tm2s; 114 | __sfr __at(0x33) tm2b; 115 | __sfr __at(0x34) tm3c; 116 | __sfr __at(0x35) tm3s; 117 | __sfr __at(0x36) tm3ct; 118 | __sfr __at(0x37) tm3b; 119 | 120 | 121 | __sfr __at(0x40) pwmg0c; 122 | __sfr __at(0x41) pwmgclk; 123 | __sfr __at(0x42) pwmg0dth; 124 | __sfr __at(0x43) pwmg0dtl; 125 | __sfr __at(0x44) pwmg0cubh; 126 | __sfr __at(0x45) pwmg0cubl; 127 | __sfr __at(0x46) pwmg1c; 128 | 129 | __sfr __at(0x48) pwmg1dth; 130 | __sfr __at(0x49) pwmg1dtl; 131 | __sfr __at(0x4c) pwmg2c; 132 | __sfr __at(0x4e) pwmg2dth; 133 | __sfr __at(0x4f) pwmg2dtl; 134 | 135 | 136 | 137 | __sfr __at(0x62) ilrcr; 138 | __sfr __at(0x63) bgtr; 139 | __sfr __at(0x67) rop; 140 | 141 | 142 | 143 | 144 | #endif 145 | -------------------------------------------------------------------------------- /Toolchain/library/pdk/io_pms150c.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS150C 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.796255 4 | 5 | #ifndef __PDK_IO_PMS150C_H 6 | #define __PDK_IO_PMS150C_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 63 11 | #define __PDK_IOEND 31 12 | #define __PDK_FLASHEND 1023 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define SP sp // __sfr __at(0x02) SP 21 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 22 | #define INTEN inten // __sfr __at(0x04) INTEN 23 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 24 | #define T16M t16m // __sfr __at(0x06) T16M 25 | #define TM2B tm2b // __sfr __at(0x09) TM2B 26 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 27 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 28 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 29 | #define PADIER padier // __sfr __at(0x0d) PADIER 30 | #define PA pa // __sfr __at(0x10) PA 31 | #define PAC pac // __sfr __at(0x11) PAC 32 | #define PAPH paph // __sfr __at(0x12) PAPH 33 | #define TM2S tm2s // __sfr __at(0x17) TM2S 34 | #define BGTR bgtr // __sfr __at(0x19) BGTR 35 | #define GPCC gpcc // __sfr __at(0x1a) GPCC 36 | #define MISC misc // __sfr __at(0x1b) MISC 37 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 38 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 39 | #define GPCS gpcs // __sfr __at(0x1e) GPCS 40 | #define ILRCR ilrcr // __sfr __at(0x1f) ILRCR 41 | 42 | __sfr __at(0x00) flag; 43 | __sfr __at(0x02) sp; 44 | __sfr __at(0x03) clkmd; 45 | __sfr __at(0x04) inten; 46 | __sfr __at(0x05) intrq; 47 | __sfr __at(0x06) t16m; 48 | 49 | __sfr __at(0x09) tm2b; 50 | __sfr __at(0x0a) eoscr; 51 | __sfr __at(0x0b) ihrcr; 52 | __sfr __at(0x0c) integs; 53 | __sfr __at(0x0d) padier; 54 | 55 | __sfr __at(0x10) pa; 56 | __sfr __at(0x11) pac; 57 | __sfr __at(0x12) paph; 58 | __sfr __at(0x17) tm2s; 59 | 60 | __sfr __at(0x19) bgtr; 61 | __sfr __at(0x1a) gpcc; 62 | __sfr __at(0x1b) misc; 63 | __sfr __at(0x1c) tm2c; 64 | __sfr __at(0x1d) tm2ct; 65 | __sfr __at(0x1e) gpcs; 66 | __sfr __at(0x1f) ilrcr; 67 | 68 | #endif 69 | -------------------------------------------------------------------------------- /Toolchain/library/pdk/softuart.h: -------------------------------------------------------------------------------- 1 | #ifndef __SOFTUART_H 2 | #define __SOFTUART_H 3 | 4 | #include 5 | 6 | void PDK_autobaud(void); // autobaud for the easypdkprogrammer. This needs to be called before sending anything on the UART 7 | void PDK_sendchar(uint8_t); // Send a single char on the serial port. So far, no receving is possible. 8 | void PDK_sendstring(char *); // Sends a zero terminated string that can reside in RAM or ROM 9 | void PDK_senduint16(uint16_t); // Prints a decimal representation of a 16 bit unsigned value on the UART. 10 | void PDK_senduint32(uint32_t); // Prints a decimal representation of a 32 bit unsigned value on the UART. 11 | 12 | #endif -------------------------------------------------------------------------------- /Toolchain/readme.md: -------------------------------------------------------------------------------- 1 | ## Padauk toolchain setup for SDCC and EASYPDKPROG ## 2 | 3 | This is work in progress of setting up an open source toolchain for development on Padauk MCUs. 4 | 5 | ### Tools needed ### 6 | 7 | * SDCC version >3.9.0 [link](https://sourceforge.net/projects/sdcc/) 8 | * Make tools (e.g. MSYS under windows) 9 | * EASYPDKPROG [link](https://github.com/free-pdk/easy-pdk-programmer-hardware) 10 | 11 | 12 | ### Folders ### 13 | 14 | * examples/ 15 | * include/ - include files and some system functions 16 | * util/ - tool for automatic generation of header files 17 | 18 | This work borrows heavily from the excellent [stm8-bare-min](https://github.com/lujji/stm8-bare-min) and many posts on the [EEVblog forum](https://www.eevblog.com/forum/blog/eevblog-1144-padauk-programmer-reverse-engineering/) 19 | 20 | 21 | 22 | -------------------------------------------------------------------------------- /Toolchain/util/genioincludes.py: -------------------------------------------------------------------------------- 1 | # include generator for PDK OSS toolchain 2 | # cpldcpu Sep 1, 2019 3 | 4 | # import pandas as pd 5 | import numpy as np 6 | import csv 7 | import datetime 8 | 9 | with open('PDK_register_map.csv','r') as infile: 10 | csviterator = csv.reader(infile) 11 | headings=next(csviterator)[1:] 12 | 13 | datadict={} 14 | for row in csviterator: 15 | try: 16 | key=int(row[0],0) 17 | except ValueError: 18 | key=row[0].lower() 19 | datadict[key]=row[1:] 20 | 21 | print("Generating include files...") 22 | for idx, mcu in enumerate(headings): 23 | ioend=ramend=flashend=ihrccal=bgtrcal=0 24 | version="unknown" 25 | sfr16="" 26 | try: 27 | version=datadict['version'][idx] 28 | ioend=int(datadict['ioend'][idx],0) 29 | ramend=int(datadict['ramend'][idx],0) 30 | flashend=int(datadict['flashend'][idx],0) 31 | ihrccal=int(datadict['ihrccal'][idx],0) 32 | bgtrcal=int(datadict['bgtrcal'][idx],0) 33 | sfr16=datadict['sfr16'][idx] 34 | except KeyError: 35 | print("One of the keys: 'ioend/ramend/flashend/ihrccal' not found. Omitting defines.") 36 | except ValueError: 37 | pass 38 | 39 | with open("output/io_{0}.h".format(mcu.lower()),'w+') as outfile: 40 | outfile.write("// I/O include file for Padauk {0}\n".format(mcu)) 41 | outfile.write("// Version: {0}\n".format(version)) 42 | outfile.write("// Automatically generated on {0}\n\n".format(datetime.datetime.now())) 43 | outfile.write("#ifndef __PDK_IO_{0}_H\n".format(mcu)) 44 | outfile.write("#define __PDK_IO_{0}_H\n\n".format(mcu)) 45 | 46 | outfile.write("#include \n\n") 47 | 48 | if ramend>0: 49 | outfile.write("#define __PDK_RAMEND {0}\n".format(ramend)) 50 | if ioend>0: 51 | outfile.write("#define __PDK_IOEND {0}\n".format(ioend)) 52 | if flashend>0: 53 | outfile.write("#define __PDK_FLASHEND {0}\n".format(flashend)) 54 | 55 | if (ihrccal>0 or bgtrcal>0): 56 | flashbits=int(np.log2(flashend))+4 57 | print(flashbits) 58 | rcall=7<<(flashbits-3) # encode rcall for all machine types 59 | outfile.write("\n") 60 | outfile.write("#define PDK_USE_FACTORY_TRIMMING() {__asm__ (\"") 61 | if ihrccal>0: 62 | outfile.write(".word (0x{0:04x})\\nmov _ihrcr,a\\n".format(ihrccal|rcall)) 63 | if bgtrcal>0: 64 | outfile.write(".word (0x{0:04x})\\nmov _bgtr,a\\n".format(bgtrcal|rcall)) 65 | outfile.write("\");}\n\n") 66 | else: 67 | outfile.write("\n") 68 | outfile.write("#define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'}\n\n") 69 | 70 | if sfr16: 71 | outfile.write("#define {1:8}\t{2} // __sfr16 __at(0x{0:02x}) {1}\n".format(0,sfr16.upper(),sfr16.lower())) 72 | outfile.write("__sfr16\t{0};\n".format(sfr16)) 73 | 74 | outfile.write("\n") 75 | 76 | for reg in range(0,ioend+1): 77 | # if reg%8 == 0: 78 | # outfile.write("\n") 79 | try: 80 | val=datadict[reg][idx] 81 | except KeyError: 82 | val='' 83 | if len(val)>0: 84 | outfile.write("#define {1:8}\t{2} // __sfr __at(0x{0:02x}) {1}\n".format(reg,val.upper(),val.lower())) 85 | 86 | for reg in range(0,ioend+1): 87 | if reg%8 == 0: 88 | outfile.write("\n") 89 | try: 90 | val=datadict[reg][idx] 91 | except KeyError: 92 | val='' 93 | if len(val)>0: 94 | outfile.write("__sfr __at(0x{0:02x})\t{1};\n".format(reg,val.lower())) 95 | 96 | outfile.write("\n#endif\n") 97 | 98 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pfs154.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PFS154 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.814272 4 | 5 | #ifndef __PDK_IO_PFS154_H 6 | #define __PDK_IO_PFS154_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 127 11 | #define __PDK_IOEND 63 12 | #define __PDK_FLASHEND 2047 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {__asm__ (".word (0x3fed)\nmov _ihrcr,a\n.word (0x3fee)\nmov _bgtr,a\n");} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define SP sp // __sfr __at(0x02) SP 21 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 22 | #define INTEN inten // __sfr __at(0x04) INTEN 23 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 24 | #define T16M t16m // __sfr __at(0x06) T16M 25 | #define MISC misc // __sfr __at(0x08) MISC 26 | #define TM2B tm2b // __sfr __at(0x09) TM2B 27 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 28 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 29 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 30 | #define PADIER padier // __sfr __at(0x0d) PADIER 31 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 32 | #define MISC2 misc2 // __sfr __at(0x0f) MISC2 33 | #define PA pa // __sfr __at(0x10) PA 34 | #define PAC pac // __sfr __at(0x11) PAC 35 | #define PAPH paph // __sfr __at(0x12) PAPH 36 | #define PB pb // __sfr __at(0x14) PB 37 | #define PBC pbc // __sfr __at(0x15) PBC 38 | #define PBPH pbph // __sfr __at(0x16) PBPH 39 | #define TM2S tm2s // __sfr __at(0x17) TM2S 40 | #define GPCC gpcc // __sfr __at(0x18) GPCC 41 | #define GPCS gpcs // __sfr __at(0x19) GPCS 42 | #define BGTR bgtr // __sfr __at(0x1a) BGTR 43 | #define MISC_LVR misc_lvr // __sfr __at(0x1b) MISC_LVR 44 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 45 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 46 | #define PWMG0C pwmg0c // __sfr __at(0x20) PWMG0C 47 | #define PWMG0S pwmg0s // __sfr __at(0x21) PWMG0S 48 | #define PWMG0DTH pwmg0dth // __sfr __at(0x22) PWMG0DTH 49 | #define PWMG0DTL pwmg0dtl // __sfr __at(0x23) PWMG0DTL 50 | #define PWMG0CUBH pwmg0cubh // __sfr __at(0x24) PWMG0CUBH 51 | #define PWMG0CUBL pwmg0cubl // __sfr __at(0x25) PWMG0CUBL 52 | #define PWMG1C pwmg1c // __sfr __at(0x26) PWMG1C 53 | #define PWMG1S pwmg1s // __sfr __at(0x27) PWMG1S 54 | #define PWMG1DTH pwmg1dth // __sfr __at(0x28) PWMG1DTH 55 | #define PWMG1DTL pwmg1dtl // __sfr __at(0x29) PWMG1DTL 56 | #define PWMG1CUBH pwmg1cubh // __sfr __at(0x2a) PWMG1CUBH 57 | #define PWMG1CUBL pwmg1cubl // __sfr __at(0x2b) PWMG1CUBL 58 | #define PWMG2C pwmg2c // __sfr __at(0x2c) PWMG2C 59 | #define PWMG2S pwmg2s // __sfr __at(0x2d) PWMG2S 60 | #define PWMG2DTH pwmg2dth // __sfr __at(0x2e) PWMG2DTH 61 | #define PWMG2DTL pwmg2dtl // __sfr __at(0x2f) PWMG2DTL 62 | #define PWMG2CUBH pwmg2cubh // __sfr __at(0x30) PWMG2CUBH 63 | #define PWMG2CUBL pwmg2cubl // __sfr __at(0x31) PWMG2CUBL 64 | #define ILRCR ilrcr // __sfr __at(0x39) ILRCR 65 | 66 | __sfr __at(0x00) flag; 67 | __sfr __at(0x02) sp; 68 | __sfr __at(0x03) clkmd; 69 | __sfr __at(0x04) inten; 70 | __sfr __at(0x05) intrq; 71 | __sfr __at(0x06) t16m; 72 | 73 | __sfr __at(0x08) misc; 74 | __sfr __at(0x09) tm2b; 75 | __sfr __at(0x0a) eoscr; 76 | __sfr __at(0x0b) ihrcr; 77 | __sfr __at(0x0c) integs; 78 | __sfr __at(0x0d) padier; 79 | __sfr __at(0x0e) pbdier; 80 | __sfr __at(0x0f) misc2; 81 | 82 | __sfr __at(0x10) pa; 83 | __sfr __at(0x11) pac; 84 | __sfr __at(0x12) paph; 85 | __sfr __at(0x14) pb; 86 | __sfr __at(0x15) pbc; 87 | __sfr __at(0x16) pbph; 88 | __sfr __at(0x17) tm2s; 89 | 90 | __sfr __at(0x18) gpcc; 91 | __sfr __at(0x19) gpcs; 92 | __sfr __at(0x1a) bgtr; 93 | __sfr __at(0x1b) misc_lvr; 94 | __sfr __at(0x1c) tm2c; 95 | __sfr __at(0x1d) tm2ct; 96 | 97 | __sfr __at(0x20) pwmg0c; 98 | __sfr __at(0x21) pwmg0s; 99 | __sfr __at(0x22) pwmg0dth; 100 | __sfr __at(0x23) pwmg0dtl; 101 | __sfr __at(0x24) pwmg0cubh; 102 | __sfr __at(0x25) pwmg0cubl; 103 | __sfr __at(0x26) pwmg1c; 104 | __sfr __at(0x27) pwmg1s; 105 | 106 | __sfr __at(0x28) pwmg1dth; 107 | __sfr __at(0x29) pwmg1dtl; 108 | __sfr __at(0x2a) pwmg1cubh; 109 | __sfr __at(0x2b) pwmg1cubl; 110 | __sfr __at(0x2c) pwmg2c; 111 | __sfr __at(0x2d) pwmg2s; 112 | __sfr __at(0x2e) pwmg2dth; 113 | __sfr __at(0x2f) pwmg2dtl; 114 | 115 | __sfr __at(0x30) pwmg2cubh; 116 | __sfr __at(0x31) pwmg2cubl; 117 | 118 | __sfr __at(0x39) ilrcr; 119 | 120 | #endif 121 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pfs172.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PFS172 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.826283 4 | 5 | #ifndef __PDK_IO_PFS172_H 6 | #define __PDK_IO_PFS172_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 63 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 21 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 22 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 23 | #define PADIER padier // __sfr __at(0x0d) PADIER 24 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 25 | #define PA pa // __sfr __at(0x10) PA 26 | #define PAC pac // __sfr __at(0x11) PAC 27 | #define PAPH paph // __sfr __at(0x12) PAPH 28 | #define PAPL papl // __sfr __at(0x13) PAPL 29 | #define PB pb // __sfr __at(0x15) PB 30 | #define PBC pbc // __sfr __at(0x16) PBC 31 | #define PBPH pbph // __sfr __at(0x17) PBPH 32 | #define PBPL pbpl // __sfr __at(0x18) PBPL 33 | #define ADCC adcc // __sfr __at(0x20) ADCC 34 | #define ADCM adcm // __sfr __at(0x21) ADCM 35 | #define ADCR adcr // __sfr __at(0x22) ADCR 36 | #define MISC misc // __sfr __at(0x26) MISC 37 | #define MISC2 misc2 // __sfr __at(0x27) MISC2 38 | #define MISC_LVR misc_lvr // __sfr __at(0x28) MISC_LVR 39 | #define GPCC gpcc // __sfr __at(0x2b) GPCC 40 | #define GPCS gpcs // __sfr __at(0x2c) GPCS 41 | #define TM2C tm2c // __sfr __at(0x30) TM2C 42 | #define TM2CT tm2ct // __sfr __at(0x31) TM2CT 43 | #define TM2S tm2s // __sfr __at(0x32) TM2S 44 | #define TM2B tm2b // __sfr __at(0x33) TM2B 45 | #define TM3C tm3c // __sfr __at(0x34) TM3C 46 | #define TM3S tm3s // __sfr __at(0x35) TM3S 47 | #define TM3CT tm3ct // __sfr __at(0x36) TM3CT 48 | #define TM3B tm3b // __sfr __at(0x37) TM3B 49 | #define ILRCR ilrcr // __sfr __at(0x3b) ILRCR 50 | #define BGTR bgtr // __sfr __at(0x3c) BGTR 51 | #define ROP rop // __sfr __at(0x3d) ROP 52 | 53 | __sfr __at(0x00) flag; 54 | __sfr __at(0x02) sp; 55 | __sfr __at(0x03) clkmd; 56 | __sfr __at(0x04) inten; 57 | __sfr __at(0x05) intrq; 58 | __sfr __at(0x06) t16m; 59 | 60 | __sfr __at(0x0a) eoscr; 61 | __sfr __at(0x0b) ihrcr; 62 | __sfr __at(0x0c) integs; 63 | __sfr __at(0x0d) padier; 64 | __sfr __at(0x0e) pbdier; 65 | 66 | __sfr __at(0x10) pa; 67 | __sfr __at(0x11) pac; 68 | __sfr __at(0x12) paph; 69 | __sfr __at(0x13) papl; 70 | __sfr __at(0x15) pb; 71 | __sfr __at(0x16) pbc; 72 | __sfr __at(0x17) pbph; 73 | 74 | __sfr __at(0x18) pbpl; 75 | 76 | __sfr __at(0x20) adcc; 77 | __sfr __at(0x21) adcm; 78 | __sfr __at(0x22) adcr; 79 | __sfr __at(0x26) misc; 80 | __sfr __at(0x27) misc2; 81 | 82 | __sfr __at(0x28) misc_lvr; 83 | __sfr __at(0x2b) gpcc; 84 | __sfr __at(0x2c) gpcs; 85 | 86 | __sfr __at(0x30) tm2c; 87 | __sfr __at(0x31) tm2ct; 88 | __sfr __at(0x32) tm2s; 89 | __sfr __at(0x33) tm2b; 90 | __sfr __at(0x34) tm3c; 91 | __sfr __at(0x35) tm3s; 92 | __sfr __at(0x36) tm3ct; 93 | __sfr __at(0x37) tm3b; 94 | 95 | __sfr __at(0x3b) ilrcr; 96 | __sfr __at(0x3c) bgtr; 97 | __sfr __at(0x3d) rop; 98 | 99 | #endif 100 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pfs173.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PFS173 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.829285 4 | 5 | #ifndef __PDK_IO_PFS173_H 6 | #define __PDK_IO_PFS173_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 255 11 | #define __PDK_IOEND 127 12 | #define __PDK_FLASHEND 3071 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {__asm__ (".word (0x7bed)\nmov _ihrcr,a\n.word (0x7bee)\nmov _bgtr,a\n");} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define SP sp // __sfr __at(0x02) SP 21 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 22 | #define INTEN inten // __sfr __at(0x04) INTEN 23 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 24 | #define T16M t16m // __sfr __at(0x06) T16M 25 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 26 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 27 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 28 | #define PADIER padier // __sfr __at(0x0d) PADIER 29 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 30 | #define PA pa // __sfr __at(0x10) PA 31 | #define PAC pac // __sfr __at(0x11) PAC 32 | #define PAPH paph // __sfr __at(0x12) PAPH 33 | #define PB pb // __sfr __at(0x13) PB 34 | #define PBC pbc // __sfr __at(0x14) PBC 35 | #define PBPH pbph // __sfr __at(0x15) PBPH 36 | #define PC pc // __sfr __at(0x16) PC 37 | #define PCC pcc // __sfr __at(0x17) PCC 38 | #define PCPH pcph // __sfr __at(0x18) PCPH 39 | #define PBPL pbpl // __sfr __at(0x19) PBPL 40 | #define PCPL pcpl // __sfr __at(0x1a) PCPL 41 | #define ADCC adcc // __sfr __at(0x20) ADCC 42 | #define ADCM adcm // __sfr __at(0x21) ADCM 43 | #define ADCR adcr // __sfr __at(0x22) ADCR 44 | #define ADCRGC adcrgc // __sfr __at(0x24) ADCRGC 45 | #define MISC misc // __sfr __at(0x26) MISC 46 | #define MISC2 misc2 // __sfr __at(0x27) MISC2 47 | #define MISC_LVR misc_lvr // __sfr __at(0x28) MISC_LVR 48 | #define GPCC gpcc // __sfr __at(0x2b) GPCC 49 | #define GPCS gpcs // __sfr __at(0x2c) GPCS 50 | #define TM2C tm2c // __sfr __at(0x30) TM2C 51 | #define TM2CT tm2ct // __sfr __at(0x31) TM2CT 52 | #define TM2S tm2s // __sfr __at(0x32) TM2S 53 | #define TM2B tm2b // __sfr __at(0x33) TM2B 54 | #define TM3C tm3c // __sfr __at(0x34) TM3C 55 | #define TM3S tm3s // __sfr __at(0x35) TM3S 56 | #define TM3CT tm3ct // __sfr __at(0x36) TM3CT 57 | #define TM3B tm3b // __sfr __at(0x37) TM3B 58 | #define PWMG0C pwmg0c // __sfr __at(0x40) PWMG0C 59 | #define PWMGCLK pwmgclk // __sfr __at(0x41) PWMGCLK 60 | #define PWMG0DTH pwmg0dth // __sfr __at(0x42) PWMG0DTH 61 | #define PWMG0DTL pwmg0dtl // __sfr __at(0x43) PWMG0DTL 62 | #define PWMG0CUBH pwmg0cubh // __sfr __at(0x44) PWMG0CUBH 63 | #define PWMG0CUBL pwmg0cubl // __sfr __at(0x45) PWMG0CUBL 64 | #define PWMG1C pwmg1c // __sfr __at(0x46) PWMG1C 65 | #define PWMG1DTH pwmg1dth // __sfr __at(0x48) PWMG1DTH 66 | #define PWMG1DTL pwmg1dtl // __sfr __at(0x49) PWMG1DTL 67 | #define PWMG2C pwmg2c // __sfr __at(0x4c) PWMG2C 68 | #define PWMG2DTH pwmg2dth // __sfr __at(0x4e) PWMG2DTH 69 | #define PWMG2DTL pwmg2dtl // __sfr __at(0x4f) PWMG2DTL 70 | #define ILRCR ilrcr // __sfr __at(0x62) ILRCR 71 | #define BGTR bgtr // __sfr __at(0x63) BGTR 72 | #define ROP rop // __sfr __at(0x67) ROP 73 | 74 | __sfr __at(0x00) flag; 75 | __sfr __at(0x02) sp; 76 | __sfr __at(0x03) clkmd; 77 | __sfr __at(0x04) inten; 78 | __sfr __at(0x05) intrq; 79 | __sfr __at(0x06) t16m; 80 | 81 | __sfr __at(0x0a) eoscr; 82 | __sfr __at(0x0b) ihrcr; 83 | __sfr __at(0x0c) integs; 84 | __sfr __at(0x0d) padier; 85 | __sfr __at(0x0e) pbdier; 86 | 87 | __sfr __at(0x10) pa; 88 | __sfr __at(0x11) pac; 89 | __sfr __at(0x12) paph; 90 | __sfr __at(0x13) pb; 91 | __sfr __at(0x14) pbc; 92 | __sfr __at(0x15) pbph; 93 | __sfr __at(0x16) pc; 94 | __sfr __at(0x17) pcc; 95 | 96 | __sfr __at(0x18) pcph; 97 | __sfr __at(0x19) pbpl; 98 | __sfr __at(0x1a) pcpl; 99 | 100 | __sfr __at(0x20) adcc; 101 | __sfr __at(0x21) adcm; 102 | __sfr __at(0x22) adcr; 103 | __sfr __at(0x24) adcrgc; 104 | __sfr __at(0x26) misc; 105 | __sfr __at(0x27) misc2; 106 | 107 | __sfr __at(0x28) misc_lvr; 108 | __sfr __at(0x2b) gpcc; 109 | __sfr __at(0x2c) gpcs; 110 | 111 | __sfr __at(0x30) tm2c; 112 | __sfr __at(0x31) tm2ct; 113 | __sfr __at(0x32) tm2s; 114 | __sfr __at(0x33) tm2b; 115 | __sfr __at(0x34) tm3c; 116 | __sfr __at(0x35) tm3s; 117 | __sfr __at(0x36) tm3ct; 118 | __sfr __at(0x37) tm3b; 119 | 120 | 121 | __sfr __at(0x40) pwmg0c; 122 | __sfr __at(0x41) pwmgclk; 123 | __sfr __at(0x42) pwmg0dth; 124 | __sfr __at(0x43) pwmg0dtl; 125 | __sfr __at(0x44) pwmg0cubh; 126 | __sfr __at(0x45) pwmg0cubl; 127 | __sfr __at(0x46) pwmg1c; 128 | 129 | __sfr __at(0x48) pwmg1dth; 130 | __sfr __at(0x49) pwmg1dtl; 131 | __sfr __at(0x4c) pwmg2c; 132 | __sfr __at(0x4e) pwmg2dth; 133 | __sfr __at(0x4f) pwmg2dtl; 134 | 135 | 136 | 137 | __sfr __at(0x62) ilrcr; 138 | __sfr __at(0x63) bgtr; 139 | __sfr __at(0x67) rop; 140 | 141 | 142 | 143 | 144 | #endif 145 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pmc153.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMC153 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.801260 4 | 5 | #ifndef __PDK_IO_PMC153_H 6 | #define __PDK_IO_PMC153_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 31 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define - - // __sfr __at(0x0a) - 21 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 22 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 23 | #define PADIER padier // __sfr __at(0x0d) PADIER 24 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 25 | #define PA pa // __sfr __at(0x10) PA 26 | #define PAC pac // __sfr __at(0x11) PAC 27 | #define PAPH paph // __sfr __at(0x12) PAPH 28 | #define PB pb // __sfr __at(0x14) PB 29 | #define PBC pbc // __sfr __at(0x15) PBC 30 | #define PBPH pbph // __sfr __at(0x16) PBPH 31 | #define MISC misc // __sfr __at(0x1b) MISC 32 | 33 | __sfr __at(0x00) flag; 34 | __sfr __at(0x02) sp; 35 | __sfr __at(0x03) clkmd; 36 | __sfr __at(0x04) inten; 37 | __sfr __at(0x05) intrq; 38 | __sfr __at(0x06) t16m; 39 | 40 | __sfr __at(0x0a) -; 41 | __sfr __at(0x0b) ihrcr; 42 | __sfr __at(0x0c) integs; 43 | __sfr __at(0x0d) padier; 44 | __sfr __at(0x0e) pbdier; 45 | 46 | __sfr __at(0x10) pa; 47 | __sfr __at(0x11) pac; 48 | __sfr __at(0x12) paph; 49 | __sfr __at(0x14) pb; 50 | __sfr __at(0x15) pbc; 51 | __sfr __at(0x16) pbph; 52 | 53 | __sfr __at(0x1b) misc; 54 | 55 | #endif 56 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pmc251.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMC251 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.841296 4 | 5 | #ifndef __PDK_IO_PMC251_H 6 | #define __PDK_IO_PMC251_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 95 11 | #define __PDK_IOEND 127 12 | #define __PDK_FLASHEND 1023 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define FPPEN fppen // __sfr __at(0x01) FPPEN 21 | #define SP sp // __sfr __at(0x02) SP 22 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 23 | #define INTEN inten // __sfr __at(0x04) INTEN 24 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 25 | #define T16M t16m // __sfr __at(0x06) T16M 26 | #define GDIO gdio // __sfr __at(0x07) GDIO 27 | #define TM2B tm2b // __sfr __at(0x09) TM2B 28 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 29 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 30 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 31 | #define PADIER padier // __sfr __at(0x0d) PADIER 32 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 33 | #define PA pa // __sfr __at(0x10) PA 34 | #define PAC pac // __sfr __at(0x11) PAC 35 | #define PAPH paph // __sfr __at(0x12) PAPH 36 | #define PB pb // __sfr __at(0x14) PB 37 | #define PBC pbc // __sfr __at(0x15) PBC 38 | #define PBPH pbph // __sfr __at(0x16) PBPH 39 | #define ADCC adcc // __sfr __at(0x20) ADCC 40 | #define ADCM adcm // __sfr __at(0x21) ADCM 41 | #define ADCRH adcrh // __sfr __at(0x22) ADCRH 42 | #define ADCRL adcrl // __sfr __at(0x23) ADCRL 43 | #define RSTST rstst // __sfr __at(0x25) RSTST 44 | #define A_IHRC a_ihrc // __sfr __at(0x38) A_IHRC 45 | #define (BGTR) (bgtr) // __sfr __at(0x39) (BGTR) 46 | #define MISC misc // __sfr __at(0x3b) MISC 47 | 48 | __sfr __at(0x00) flag; 49 | __sfr __at(0x01) fppen; 50 | __sfr __at(0x02) sp; 51 | __sfr __at(0x03) clkmd; 52 | __sfr __at(0x04) inten; 53 | __sfr __at(0x05) intrq; 54 | __sfr __at(0x06) t16m; 55 | __sfr __at(0x07) gdio; 56 | 57 | __sfr __at(0x09) tm2b; 58 | __sfr __at(0x0a) eoscr; 59 | __sfr __at(0x0b) ihrcr; 60 | __sfr __at(0x0c) integs; 61 | __sfr __at(0x0d) padier; 62 | __sfr __at(0x0e) pbdier; 63 | 64 | __sfr __at(0x10) pa; 65 | __sfr __at(0x11) pac; 66 | __sfr __at(0x12) paph; 67 | __sfr __at(0x14) pb; 68 | __sfr __at(0x15) pbc; 69 | __sfr __at(0x16) pbph; 70 | 71 | 72 | __sfr __at(0x20) adcc; 73 | __sfr __at(0x21) adcm; 74 | __sfr __at(0x22) adcrh; 75 | __sfr __at(0x23) adcrl; 76 | __sfr __at(0x25) rstst; 77 | 78 | 79 | 80 | __sfr __at(0x38) a_ihrc; 81 | __sfr __at(0x39) (bgtr); 82 | __sfr __at(0x3b) misc; 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | #endif 93 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms130.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS130 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.805264 4 | 5 | #ifndef __PDK_IO_PMS130_H 6 | #define __PDK_IO_PMS130_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 63 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define MULOP mulop // __sfr __at(0x08) MULOP 21 | #define TM2B tm2b // __sfr __at(0x09) TM2B 22 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 23 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 24 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 25 | #define PADIER padier // __sfr __at(0x0d) PADIER 26 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 27 | #define PA pa // __sfr __at(0x10) PA 28 | #define PAC pac // __sfr __at(0x11) PAC 29 | #define PAPH paph // __sfr __at(0x12) PAPH 30 | #define PB pb // __sfr __at(0x14) PB 31 | #define PBC pbc // __sfr __at(0x15) PBC 32 | #define PBPH pbph // __sfr __at(0x16) PBPH 33 | #define MISC misc // __sfr __at(0x1b) MISC 34 | #define ADCRGC adcrgc // __sfr __at(0x1c) ADCRGC 35 | #define ADCC adcc // __sfr __at(0x20) ADCC 36 | #define ADCM adcm // __sfr __at(0x21) ADCM 37 | #define ADCRH adcrh // __sfr __at(0x22) ADCRH 38 | #define ADCRL adcrl // __sfr __at(0x23) ADCRL 39 | #define RSTST rstst // __sfr __at(0x25) RSTST 40 | #define TM3C tm3c // __sfr __at(0x2e) TM3C 41 | #define TM3CT tm3ct // __sfr __at(0x2f) TM3CT 42 | #define BGTR bgtr // __sfr __at(0x36) BGTR 43 | #define TM3S tm3s // __sfr __at(0x39) TM3S 44 | #define ROP rop // __sfr __at(0x3a) ROP 45 | #define TM2C tm2c // __sfr __at(0x3c) TM2C 46 | #define TM2CT tm2ct // __sfr __at(0x3d) TM2CT 47 | 48 | __sfr __at(0x00) flag; 49 | __sfr __at(0x02) sp; 50 | __sfr __at(0x03) clkmd; 51 | __sfr __at(0x04) inten; 52 | __sfr __at(0x05) intrq; 53 | __sfr __at(0x06) t16m; 54 | 55 | __sfr __at(0x08) mulop; 56 | __sfr __at(0x09) tm2b; 57 | __sfr __at(0x0a) eoscr; 58 | __sfr __at(0x0b) ihrcr; 59 | __sfr __at(0x0c) integs; 60 | __sfr __at(0x0d) padier; 61 | __sfr __at(0x0e) pbdier; 62 | 63 | __sfr __at(0x10) pa; 64 | __sfr __at(0x11) pac; 65 | __sfr __at(0x12) paph; 66 | __sfr __at(0x14) pb; 67 | __sfr __at(0x15) pbc; 68 | __sfr __at(0x16) pbph; 69 | 70 | __sfr __at(0x1b) misc; 71 | __sfr __at(0x1c) adcrgc; 72 | 73 | __sfr __at(0x20) adcc; 74 | __sfr __at(0x21) adcm; 75 | __sfr __at(0x22) adcrh; 76 | __sfr __at(0x23) adcrl; 77 | __sfr __at(0x25) rstst; 78 | 79 | __sfr __at(0x2e) tm3c; 80 | __sfr __at(0x2f) tm3ct; 81 | 82 | __sfr __at(0x36) bgtr; 83 | 84 | __sfr __at(0x39) tm3s; 85 | __sfr __at(0x3a) rop; 86 | __sfr __at(0x3c) tm2c; 87 | __sfr __at(0x3d) tm2ct; 88 | 89 | #endif 90 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms131.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS131 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.808266 4 | 5 | #ifndef __PDK_IO_PMS131_H 6 | #define __PDK_IO_PMS131_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 63 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define MULOP mulop // __sfr __at(0x08) MULOP 21 | #define TM2B tm2b // __sfr __at(0x09) TM2B 22 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 23 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 24 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 25 | #define PADIER padier // __sfr __at(0x0d) PADIER 26 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 27 | #define PA pa // __sfr __at(0x10) PA 28 | #define PAC pac // __sfr __at(0x11) PAC 29 | #define PAPH paph // __sfr __at(0x12) PAPH 30 | #define PB pb // __sfr __at(0x14) PB 31 | #define PBC pbc // __sfr __at(0x15) PBC 32 | #define PBPH pbph // __sfr __at(0x16) PBPH 33 | #define MISC misc // __sfr __at(0x1b) MISC 34 | #define ADCRGC adcrgc // __sfr __at(0x1c) ADCRGC 35 | #define ADCC adcc // __sfr __at(0x20) ADCC 36 | #define ADCM adcm // __sfr __at(0x21) ADCM 37 | #define ADCRH adcrh // __sfr __at(0x22) ADCRH 38 | #define ADCRL adcrl // __sfr __at(0x23) ADCRL 39 | #define RSTST rstst // __sfr __at(0x25) RSTST 40 | #define TM3C tm3c // __sfr __at(0x2e) TM3C 41 | #define TM3S tm3s // __sfr __at(0x2f) TM3S 42 | #define TM3CT tm3ct // __sfr __at(0x30) TM3CT 43 | #define TM3B tm3b // __sfr __at(0x31) TM3B 44 | #define BGTR bgtr // __sfr __at(0x36) BGTR 45 | #define TM2S tm2s // __sfr __at(0x37) TM2S 46 | #define ROP rop // __sfr __at(0x3a) ROP 47 | #define TM2C tm2c // __sfr __at(0x3c) TM2C 48 | #define TM2CT tm2ct // __sfr __at(0x3d) TM2CT 49 | 50 | __sfr __at(0x00) flag; 51 | __sfr __at(0x02) sp; 52 | __sfr __at(0x03) clkmd; 53 | __sfr __at(0x04) inten; 54 | __sfr __at(0x05) intrq; 55 | __sfr __at(0x06) t16m; 56 | 57 | __sfr __at(0x08) mulop; 58 | __sfr __at(0x09) tm2b; 59 | __sfr __at(0x0a) eoscr; 60 | __sfr __at(0x0b) ihrcr; 61 | __sfr __at(0x0c) integs; 62 | __sfr __at(0x0d) padier; 63 | __sfr __at(0x0e) pbdier; 64 | 65 | __sfr __at(0x10) pa; 66 | __sfr __at(0x11) pac; 67 | __sfr __at(0x12) paph; 68 | __sfr __at(0x14) pb; 69 | __sfr __at(0x15) pbc; 70 | __sfr __at(0x16) pbph; 71 | 72 | __sfr __at(0x1b) misc; 73 | __sfr __at(0x1c) adcrgc; 74 | 75 | __sfr __at(0x20) adcc; 76 | __sfr __at(0x21) adcm; 77 | __sfr __at(0x22) adcrh; 78 | __sfr __at(0x23) adcrl; 79 | __sfr __at(0x25) rstst; 80 | 81 | __sfr __at(0x2e) tm3c; 82 | __sfr __at(0x2f) tm3s; 83 | 84 | __sfr __at(0x30) tm3ct; 85 | __sfr __at(0x31) tm3b; 86 | __sfr __at(0x36) bgtr; 87 | __sfr __at(0x37) tm2s; 88 | 89 | __sfr __at(0x3a) rop; 90 | __sfr __at(0x3c) tm2c; 91 | __sfr __at(0x3d) tm2ct; 92 | 93 | #endif 94 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms150c.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS150C 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.796255 4 | 5 | #ifndef __PDK_IO_PMS150C_H 6 | #define __PDK_IO_PMS150C_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 63 11 | #define __PDK_IOEND 31 12 | #define __PDK_FLASHEND 1023 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define SP sp // __sfr __at(0x02) SP 21 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 22 | #define INTEN inten // __sfr __at(0x04) INTEN 23 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 24 | #define T16M t16m // __sfr __at(0x06) T16M 25 | #define TM2B tm2b // __sfr __at(0x09) TM2B 26 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 27 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 28 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 29 | #define PADIER padier // __sfr __at(0x0d) PADIER 30 | #define PA pa // __sfr __at(0x10) PA 31 | #define PAC pac // __sfr __at(0x11) PAC 32 | #define PAPH paph // __sfr __at(0x12) PAPH 33 | #define TM2S tm2s // __sfr __at(0x17) TM2S 34 | #define BGTR bgtr // __sfr __at(0x19) BGTR 35 | #define GPCC gpcc // __sfr __at(0x1a) GPCC 36 | #define MISC misc // __sfr __at(0x1b) MISC 37 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 38 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 39 | #define GPCS gpcs // __sfr __at(0x1e) GPCS 40 | #define ILRCR ilrcr // __sfr __at(0x1f) ILRCR 41 | 42 | __sfr __at(0x00) flag; 43 | __sfr __at(0x02) sp; 44 | __sfr __at(0x03) clkmd; 45 | __sfr __at(0x04) inten; 46 | __sfr __at(0x05) intrq; 47 | __sfr __at(0x06) t16m; 48 | 49 | __sfr __at(0x09) tm2b; 50 | __sfr __at(0x0a) eoscr; 51 | __sfr __at(0x0b) ihrcr; 52 | __sfr __at(0x0c) integs; 53 | __sfr __at(0x0d) padier; 54 | 55 | __sfr __at(0x10) pa; 56 | __sfr __at(0x11) pac; 57 | __sfr __at(0x12) paph; 58 | __sfr __at(0x17) tm2s; 59 | 60 | __sfr __at(0x19) bgtr; 61 | __sfr __at(0x1a) gpcc; 62 | __sfr __at(0x1b) misc; 63 | __sfr __at(0x1c) tm2c; 64 | __sfr __at(0x1d) tm2ct; 65 | __sfr __at(0x1e) gpcs; 66 | __sfr __at(0x1f) ilrcr; 67 | 68 | #endif 69 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms152.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS152 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.812270 4 | 5 | #ifndef __PDK_IO_PMS152_H 6 | #define __PDK_IO_PMS152_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 63 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define MISC misc // __sfr __at(0x08) MISC 21 | #define TM2B tm2b // __sfr __at(0x09) TM2B 22 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 23 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 24 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 25 | #define PADIER padier // __sfr __at(0x0d) PADIER 26 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 27 | #define MISC2 misc2 // __sfr __at(0x0f) MISC2 28 | #define PA pa // __sfr __at(0x10) PA 29 | #define PAC pac // __sfr __at(0x11) PAC 30 | #define PAPH paph // __sfr __at(0x12) PAPH 31 | #define PB pb // __sfr __at(0x14) PB 32 | #define PBC pbc // __sfr __at(0x15) PBC 33 | #define PBPH pbph // __sfr __at(0x16) PBPH 34 | #define TM2S tm2s // __sfr __at(0x17) TM2S 35 | #define GPCC gpcc // __sfr __at(0x18) GPCC 36 | #define GPCS gpcs // __sfr __at(0x19) GPCS 37 | #define BGTR bgtr // __sfr __at(0x1a) BGTR 38 | #define MISC_LVR misc_lvr // __sfr __at(0x1b) MISC_LVR 39 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 40 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 41 | #define PWMG0C pwmg0c // __sfr __at(0x20) PWMG0C 42 | #define PWMGCLK pwmgclk // __sfr __at(0x21) PWMGCLK 43 | #define PWMG0DTH pwmg0dth // __sfr __at(0x22) PWMG0DTH 44 | #define PWMG0DTL pwmg0dtl // __sfr __at(0x23) PWMG0DTL 45 | #define PWMG0CUBH pwmg0cubh // __sfr __at(0x24) PWMG0CUBH 46 | #define PWMG0CUBL pwmg0cubl // __sfr __at(0x25) PWMG0CUBL 47 | #define PWMG1C pwmg1c // __sfr __at(0x26) PWMG1C 48 | #define PWMG1DTH pwmg1dth // __sfr __at(0x28) PWMG1DTH 49 | #define PWMG1DTL pwmg1dtl // __sfr __at(0x29) PWMG1DTL 50 | #define PWMG2C pwmg2c // __sfr __at(0x2c) PWMG2C 51 | #define PWMG2DTH pwmg2dth // __sfr __at(0x2e) PWMG2DTH 52 | #define PWMG2DTL pwmg2dtl // __sfr __at(0x2f) PWMG2DTL 53 | #define ILRCR ilrcr // __sfr __at(0x39) ILRCR 54 | #define ROP rop // __sfr __at(0x3a) ROP 55 | 56 | __sfr __at(0x00) flag; 57 | __sfr __at(0x02) sp; 58 | __sfr __at(0x03) clkmd; 59 | __sfr __at(0x04) inten; 60 | __sfr __at(0x05) intrq; 61 | __sfr __at(0x06) t16m; 62 | 63 | __sfr __at(0x08) misc; 64 | __sfr __at(0x09) tm2b; 65 | __sfr __at(0x0a) eoscr; 66 | __sfr __at(0x0b) ihrcr; 67 | __sfr __at(0x0c) integs; 68 | __sfr __at(0x0d) padier; 69 | __sfr __at(0x0e) pbdier; 70 | __sfr __at(0x0f) misc2; 71 | 72 | __sfr __at(0x10) pa; 73 | __sfr __at(0x11) pac; 74 | __sfr __at(0x12) paph; 75 | __sfr __at(0x14) pb; 76 | __sfr __at(0x15) pbc; 77 | __sfr __at(0x16) pbph; 78 | __sfr __at(0x17) tm2s; 79 | 80 | __sfr __at(0x18) gpcc; 81 | __sfr __at(0x19) gpcs; 82 | __sfr __at(0x1a) bgtr; 83 | __sfr __at(0x1b) misc_lvr; 84 | __sfr __at(0x1c) tm2c; 85 | __sfr __at(0x1d) tm2ct; 86 | 87 | __sfr __at(0x20) pwmg0c; 88 | __sfr __at(0x21) pwmgclk; 89 | __sfr __at(0x22) pwmg0dth; 90 | __sfr __at(0x23) pwmg0dtl; 91 | __sfr __at(0x24) pwmg0cubh; 92 | __sfr __at(0x25) pwmg0cubl; 93 | __sfr __at(0x26) pwmg1c; 94 | 95 | __sfr __at(0x28) pwmg1dth; 96 | __sfr __at(0x29) pwmg1dtl; 97 | __sfr __at(0x2c) pwmg2c; 98 | __sfr __at(0x2e) pwmg2dth; 99 | __sfr __at(0x2f) pwmg2dtl; 100 | 101 | 102 | __sfr __at(0x39) ilrcr; 103 | __sfr __at(0x3a) rop; 104 | 105 | #endif 106 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms156.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS156 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.803262 4 | 5 | #ifndef __PDK_IO_PMS156_H 6 | #define __PDK_IO_PMS156_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 31 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 21 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 22 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 23 | #define PADIER padier // __sfr __at(0x0d) PADIER 24 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 25 | #define PA pa // __sfr __at(0x10) PA 26 | #define PAC pac // __sfr __at(0x11) PAC 27 | #define PAPH paph // __sfr __at(0x12) PAPH 28 | #define PB pb // __sfr __at(0x14) PB 29 | #define PBC pbc // __sfr __at(0x15) PBC 30 | #define PBPH pbph // __sfr __at(0x16) PBPH 31 | #define MISC misc // __sfr __at(0x1b) MISC 32 | 33 | __sfr __at(0x00) flag; 34 | __sfr __at(0x02) sp; 35 | __sfr __at(0x03) clkmd; 36 | __sfr __at(0x04) inten; 37 | __sfr __at(0x05) intrq; 38 | __sfr __at(0x06) t16m; 39 | 40 | __sfr __at(0x0a) eoscr; 41 | __sfr __at(0x0b) ihrcr; 42 | __sfr __at(0x0c) integs; 43 | __sfr __at(0x0d) padier; 44 | __sfr __at(0x0e) pbdier; 45 | 46 | __sfr __at(0x10) pa; 47 | __sfr __at(0x11) pac; 48 | __sfr __at(0x12) paph; 49 | __sfr __at(0x14) pb; 50 | __sfr __at(0x15) pbc; 51 | __sfr __at(0x16) pbph; 52 | 53 | __sfr __at(0x1b) misc; 54 | 55 | #endif 56 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms15a.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS15A 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.799258 4 | 5 | #ifndef __PDK_IO_PMS15A_H 6 | #define __PDK_IO_PMS15A_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 31 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define TM2B tm2b // __sfr __at(0x09) TM2B 21 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 22 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 23 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 24 | #define PADIER padier // __sfr __at(0x0d) PADIER 25 | #define PA pa // __sfr __at(0x10) PA 26 | #define PAC pac // __sfr __at(0x11) PAC 27 | #define PAPH paph // __sfr __at(0x12) PAPH 28 | #define TM2S tm2s // __sfr __at(0x17) TM2S 29 | #define BGTR bgtr // __sfr __at(0x19) BGTR 30 | #define GPCC gpcc // __sfr __at(0x1a) GPCC 31 | #define MISC misc // __sfr __at(0x1b) MISC 32 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 33 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 34 | #define GPCS gpcs // __sfr __at(0x1e) GPCS 35 | #define ILRCR ilrcr // __sfr __at(0x1f) ILRCR 36 | 37 | __sfr __at(0x00) flag; 38 | __sfr __at(0x02) sp; 39 | __sfr __at(0x03) clkmd; 40 | __sfr __at(0x04) inten; 41 | __sfr __at(0x05) intrq; 42 | __sfr __at(0x06) t16m; 43 | 44 | __sfr __at(0x09) tm2b; 45 | __sfr __at(0x0a) eoscr; 46 | __sfr __at(0x0b) ihrcr; 47 | __sfr __at(0x0c) integs; 48 | __sfr __at(0x0d) padier; 49 | 50 | __sfr __at(0x10) pa; 51 | __sfr __at(0x11) pac; 52 | __sfr __at(0x12) paph; 53 | __sfr __at(0x17) tm2s; 54 | 55 | __sfr __at(0x19) bgtr; 56 | __sfr __at(0x1a) gpcc; 57 | __sfr __at(0x1b) misc; 58 | __sfr __at(0x1c) tm2c; 59 | __sfr __at(0x1d) tm2ct; 60 | __sfr __at(0x1e) gpcs; 61 | __sfr __at(0x1f) ilrcr; 62 | 63 | #endif 64 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms164.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS164 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.817275 4 | 5 | #ifndef __PDK_IO_PMS164_H 6 | #define __PDK_IO_PMS164_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 63 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define MISC misc // __sfr __at(0x08) MISC 21 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 22 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 23 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 24 | #define PADIER padier // __sfr __at(0x0d) PADIER 25 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 26 | #define MISC2 misc2 // __sfr __at(0x0f) MISC2 27 | #define PA pa // __sfr __at(0x10) PA 28 | #define PAC pac // __sfr __at(0x11) PAC 29 | #define PAPH paph // __sfr __at(0x12) PAPH 30 | #define PB pb // __sfr __at(0x14) PB 31 | #define PBC pbc // __sfr __at(0x15) PBC 32 | #define PBPH pbph // __sfr __at(0x16) PBPH 33 | #define TM2S tm2s // __sfr __at(0x17) TM2S 34 | #define GPCC gpcc // __sfr __at(0x18) GPCC 35 | #define GPCS gpcs // __sfr __at(0x19) GPCS 36 | #define BGTR bgtr // __sfr __at(0x1a) BGTR 37 | #define RSTST rstst // __sfr __at(0x1b) RSTST 38 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 39 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 40 | #define MISC3 misc3 // __sfr __at(0x1e) MISC3 41 | #define MISC_LVR misc_lvr // __sfr __at(0x2d) MISC_LVR 42 | #define TM3C tm3c // __sfr __at(0x32) TM3C 43 | #define TM3CT tm3ct // __sfr __at(0x33) TM3CT 44 | #define TM3S tm3s // __sfr __at(0x34) TM3S 45 | #define TM3B tm3b // __sfr __at(0x35) TM3B 46 | #define ILRCR ilrcr // __sfr __at(0x39) ILRCR 47 | #define ROP rop // __sfr __at(0x3a) ROP 48 | 49 | __sfr __at(0x00) flag; 50 | __sfr __at(0x02) sp; 51 | __sfr __at(0x03) clkmd; 52 | __sfr __at(0x04) inten; 53 | __sfr __at(0x05) intrq; 54 | __sfr __at(0x06) t16m; 55 | 56 | __sfr __at(0x08) misc; 57 | __sfr __at(0x0a) eoscr; 58 | __sfr __at(0x0b) ihrcr; 59 | __sfr __at(0x0c) integs; 60 | __sfr __at(0x0d) padier; 61 | __sfr __at(0x0e) pbdier; 62 | __sfr __at(0x0f) misc2; 63 | 64 | __sfr __at(0x10) pa; 65 | __sfr __at(0x11) pac; 66 | __sfr __at(0x12) paph; 67 | __sfr __at(0x14) pb; 68 | __sfr __at(0x15) pbc; 69 | __sfr __at(0x16) pbph; 70 | __sfr __at(0x17) tm2s; 71 | 72 | __sfr __at(0x18) gpcc; 73 | __sfr __at(0x19) gpcs; 74 | __sfr __at(0x1a) bgtr; 75 | __sfr __at(0x1b) rstst; 76 | __sfr __at(0x1c) tm2c; 77 | __sfr __at(0x1d) tm2ct; 78 | __sfr __at(0x1e) misc3; 79 | 80 | 81 | __sfr __at(0x2d) misc_lvr; 82 | 83 | __sfr __at(0x32) tm3c; 84 | __sfr __at(0x33) tm3ct; 85 | __sfr __at(0x34) tm3s; 86 | __sfr __at(0x35) tm3b; 87 | 88 | __sfr __at(0x39) ilrcr; 89 | __sfr __at(0x3a) rop; 90 | 91 | #endif 92 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms165c.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS165C 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.821278 4 | 5 | #ifndef __PDK_IO_PMS165C_H 6 | #define __PDK_IO_PMS165C_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 63 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define SP sp // __sfr __at(0x02) SP 16 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 17 | #define INTEN inten // __sfr __at(0x04) INTEN 18 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 19 | #define T16M t16m // __sfr __at(0x06) T16M 20 | #define MISC misc // __sfr __at(0x08) MISC 21 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 22 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 23 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 24 | #define PADIER padier // __sfr __at(0x0d) PADIER 25 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 26 | #define MISC2 misc2 // __sfr __at(0x0f) MISC2 27 | #define PA pa // __sfr __at(0x10) PA 28 | #define PAC pac // __sfr __at(0x11) PAC 29 | #define PAPH paph // __sfr __at(0x12) PAPH 30 | #define PB pb // __sfr __at(0x14) PB 31 | #define PBC pbc // __sfr __at(0x15) PBC 32 | #define PBPH pbph // __sfr __at(0x16) PBPH 33 | #define TM2S tm2s // __sfr __at(0x17) TM2S 34 | #define GPCC gpcc // __sfr __at(0x18) GPCC 35 | #define GPCS gpcs // __sfr __at(0x19) GPCS 36 | #define BGTR bgtr // __sfr __at(0x1a) BGTR 37 | #define TM2C tm2c // __sfr __at(0x1c) TM2C 38 | #define TM2CT tm2ct // __sfr __at(0x1d) TM2CT 39 | #define PWMG0C pwmg0c // __sfr __at(0x20) PWMG0C 40 | #define PWMG0S pwmg0s // __sfr __at(0x21) PWMG0S 41 | #define PWMG0DTH pwmg0dth // __sfr __at(0x22) PWMG0DTH 42 | #define PWMG0DTL pwmg0dtl // __sfr __at(0x23) PWMG0DTL 43 | #define PWMG0CUBH pwmg0cubh // __sfr __at(0x24) PWMG0CUBH 44 | #define PWMG0CUBL pwmg0cubl // __sfr __at(0x25) PWMG0CUBL 45 | #define PWMG1C pwmg1c // __sfr __at(0x26) PWMG1C 46 | #define PWMG1S pwmg1s // __sfr __at(0x27) PWMG1S 47 | #define PWMG1DTH pwmg1dth // __sfr __at(0x28) PWMG1DTH 48 | #define PWMG1DTL pwmg1dtl // __sfr __at(0x29) PWMG1DTL 49 | #define PWMG1CUBH pwmg1cubh // __sfr __at(0x2a) PWMG1CUBH 50 | #define PWMG1CUBL pwmg1cubl // __sfr __at(0x2b) PWMG1CUBL 51 | #define PWMG2C pwmg2c // __sfr __at(0x2c) PWMG2C 52 | #define PWMG2S pwmg2s // __sfr __at(0x2d) PWMG2S 53 | #define PWMG2DTH pwmg2dth // __sfr __at(0x2e) PWMG2DTH 54 | #define PWMG2DTL pwmg2dtl // __sfr __at(0x2f) PWMG2DTL 55 | #define PWMG2CUBH pwmg2cubh // __sfr __at(0x30) PWMG2CUBH 56 | #define PWMG2CUBL pwmg2cubl // __sfr __at(0x31) PWMG2CUBL 57 | #define TM3C tm3c // __sfr __at(0x32) TM3C 58 | #define TM3CT tm3ct // __sfr __at(0x33) TM3CT 59 | #define TM3S tm3s // __sfr __at(0x34) TM3S 60 | #define TM3B tm3b // __sfr __at(0x35) TM3B 61 | #define RFCC rfcc // __sfr __at(0x36) RFCC 62 | #define RFCCRH rfccrh // __sfr __at(0x37) RFCCRH 63 | #define RFCCRL rfccrl // __sfr __at(0x38) RFCCRL 64 | #define ILRCR ilrcr // __sfr __at(0x39) ILRCR 65 | 66 | __sfr __at(0x00) flag; 67 | __sfr __at(0x02) sp; 68 | __sfr __at(0x03) clkmd; 69 | __sfr __at(0x04) inten; 70 | __sfr __at(0x05) intrq; 71 | __sfr __at(0x06) t16m; 72 | 73 | __sfr __at(0x08) misc; 74 | __sfr __at(0x0a) eoscr; 75 | __sfr __at(0x0b) ihrcr; 76 | __sfr __at(0x0c) integs; 77 | __sfr __at(0x0d) padier; 78 | __sfr __at(0x0e) pbdier; 79 | __sfr __at(0x0f) misc2; 80 | 81 | __sfr __at(0x10) pa; 82 | __sfr __at(0x11) pac; 83 | __sfr __at(0x12) paph; 84 | __sfr __at(0x14) pb; 85 | __sfr __at(0x15) pbc; 86 | __sfr __at(0x16) pbph; 87 | __sfr __at(0x17) tm2s; 88 | 89 | __sfr __at(0x18) gpcc; 90 | __sfr __at(0x19) gpcs; 91 | __sfr __at(0x1a) bgtr; 92 | __sfr __at(0x1c) tm2c; 93 | __sfr __at(0x1d) tm2ct; 94 | 95 | __sfr __at(0x20) pwmg0c; 96 | __sfr __at(0x21) pwmg0s; 97 | __sfr __at(0x22) pwmg0dth; 98 | __sfr __at(0x23) pwmg0dtl; 99 | __sfr __at(0x24) pwmg0cubh; 100 | __sfr __at(0x25) pwmg0cubl; 101 | __sfr __at(0x26) pwmg1c; 102 | __sfr __at(0x27) pwmg1s; 103 | 104 | __sfr __at(0x28) pwmg1dth; 105 | __sfr __at(0x29) pwmg1dtl; 106 | __sfr __at(0x2a) pwmg1cubh; 107 | __sfr __at(0x2b) pwmg1cubl; 108 | __sfr __at(0x2c) pwmg2c; 109 | __sfr __at(0x2d) pwmg2s; 110 | __sfr __at(0x2e) pwmg2dth; 111 | __sfr __at(0x2f) pwmg2dtl; 112 | 113 | __sfr __at(0x30) pwmg2cubh; 114 | __sfr __at(0x31) pwmg2cubl; 115 | __sfr __at(0x32) tm3c; 116 | __sfr __at(0x33) tm3ct; 117 | __sfr __at(0x34) tm3s; 118 | __sfr __at(0x35) tm3b; 119 | __sfr __at(0x36) rfcc; 120 | __sfr __at(0x37) rfccrh; 121 | 122 | __sfr __at(0x38) rfccrl; 123 | __sfr __at(0x39) ilrcr; 124 | 125 | #endif 126 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms232.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS232 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.836291 4 | 5 | #ifndef __PDK_IO_PMS232_H 6 | #define __PDK_IO_PMS232_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 127 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define FPPEN fppen // __sfr __at(0x01) FPPEN 16 | #define SP sp // __sfr __at(0x02) SP 17 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 18 | #define INTEN inten // __sfr __at(0x04) INTEN 19 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 20 | #define T16M t16m // __sfr __at(0x06) T16M 21 | #define GDIO gdio // __sfr __at(0x07) GDIO 22 | #define TM2B tm2b // __sfr __at(0x09) TM2B 23 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 24 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 25 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 26 | #define PADIER padier // __sfr __at(0x0d) PADIER 27 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 28 | #define (PCDIER) (pcdier) // __sfr __at(0x0f) (PCDIER) 29 | #define PA pa // __sfr __at(0x10) PA 30 | #define PAC pac // __sfr __at(0x11) PAC 31 | #define PAPH paph // __sfr __at(0x12) PAPH 32 | #define PB pb // __sfr __at(0x14) PB 33 | #define PBC pbc // __sfr __at(0x15) PBC 34 | #define PBPH pbph // __sfr __at(0x16) PBPH 35 | #define PC pc // __sfr __at(0x17) PC 36 | #define PCC pcc // __sfr __at(0x18) PCC 37 | #define PCPH pcph // __sfr __at(0x19) PCPH 38 | #define RSTST rstst // __sfr __at(0x25) RSTST 39 | #define TM2S tm2s // __sfr __at(0x37) TM2S 40 | #define A_IHRC a_ihrc // __sfr __at(0x38) A_IHRC 41 | #define BGTR bgtr // __sfr __at(0x39) BGTR 42 | #define MISC misc // __sfr __at(0x3b) MISC 43 | #define TM2C tm2c // __sfr __at(0x3c) TM2C 44 | #define TM2CT tm2ct // __sfr __at(0x3d) TM2CT 45 | 46 | __sfr __at(0x00) flag; 47 | __sfr __at(0x01) fppen; 48 | __sfr __at(0x02) sp; 49 | __sfr __at(0x03) clkmd; 50 | __sfr __at(0x04) inten; 51 | __sfr __at(0x05) intrq; 52 | __sfr __at(0x06) t16m; 53 | __sfr __at(0x07) gdio; 54 | 55 | __sfr __at(0x09) tm2b; 56 | __sfr __at(0x0a) eoscr; 57 | __sfr __at(0x0b) ihrcr; 58 | __sfr __at(0x0c) integs; 59 | __sfr __at(0x0d) padier; 60 | __sfr __at(0x0e) pbdier; 61 | __sfr __at(0x0f) (pcdier); 62 | 63 | __sfr __at(0x10) pa; 64 | __sfr __at(0x11) pac; 65 | __sfr __at(0x12) paph; 66 | __sfr __at(0x14) pb; 67 | __sfr __at(0x15) pbc; 68 | __sfr __at(0x16) pbph; 69 | __sfr __at(0x17) pc; 70 | 71 | __sfr __at(0x18) pcc; 72 | __sfr __at(0x19) pcph; 73 | 74 | __sfr __at(0x25) rstst; 75 | 76 | 77 | __sfr __at(0x37) tm2s; 78 | 79 | __sfr __at(0x38) a_ihrc; 80 | __sfr __at(0x39) bgtr; 81 | __sfr __at(0x3b) misc; 82 | __sfr __at(0x3c) tm2c; 83 | __sfr __at(0x3d) tm2ct; 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | #endif 94 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms234.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS234 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.839294 4 | 5 | #ifndef __PDK_IO_PMS234_H 6 | #define __PDK_IO_PMS234_H 7 | 8 | #include 9 | 10 | #define __PDK_IOEND 127 11 | 12 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 13 | 14 | #define FLAG flag // __sfr __at(0x00) FLAG 15 | #define FPPEN fppen // __sfr __at(0x01) FPPEN 16 | #define SP sp // __sfr __at(0x02) SP 17 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 18 | #define INTEN inten // __sfr __at(0x04) INTEN 19 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 20 | #define T16M t16m // __sfr __at(0x06) T16M 21 | #define GDIO gdio // __sfr __at(0x07) GDIO 22 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 23 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 24 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 25 | #define PADIER padier // __sfr __at(0x0d) PADIER 26 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 27 | #define (PCDIER) (pcdier) // __sfr __at(0x0f) (PCDIER) 28 | #define PA pa // __sfr __at(0x10) PA 29 | #define PAC pac // __sfr __at(0x11) PAC 30 | #define PAPH paph // __sfr __at(0x12) PAPH 31 | #define PB pb // __sfr __at(0x14) PB 32 | #define PBC pbc // __sfr __at(0x15) PBC 33 | #define PBPH pbph // __sfr __at(0x16) PBPH 34 | #define PC pc // __sfr __at(0x17) PC 35 | #define PCC pcc // __sfr __at(0x18) PCC 36 | #define PCPH pcph // __sfr __at(0x19) PCPH 37 | #define PD pd // __sfr __at(0x1a) PD 38 | #define PDC pdc // __sfr __at(0x1b) PDC 39 | #define PDPH pdph // __sfr __at(0x1c) PDPH 40 | #define ADCC adcc // __sfr __at(0x20) ADCC 41 | #define ADCM adcm // __sfr __at(0x21) ADCM 42 | #define ADCRH adcrh // __sfr __at(0x22) ADCRH 43 | #define ADCRL adcrl // __sfr __at(0x23) ADCRL 44 | #define RSTST rstst // __sfr __at(0x25) RSTST 45 | #define TM2S tm2s // __sfr __at(0x37) TM2S 46 | #define A_IHRC a_ihrc // __sfr __at(0x38) A_IHRC 47 | #define BGTR bgtr // __sfr __at(0x39) BGTR 48 | #define MISC misc // __sfr __at(0x3b) MISC 49 | #define TM2C tm2c // __sfr __at(0x3c) TM2C 50 | #define TM2CT tm2ct // __sfr __at(0x3d) TM2CT 51 | #define GPCC gpcc // __sfr __at(0x3e) GPCC 52 | 53 | __sfr __at(0x00) flag; 54 | __sfr __at(0x01) fppen; 55 | __sfr __at(0x02) sp; 56 | __sfr __at(0x03) clkmd; 57 | __sfr __at(0x04) inten; 58 | __sfr __at(0x05) intrq; 59 | __sfr __at(0x06) t16m; 60 | __sfr __at(0x07) gdio; 61 | 62 | __sfr __at(0x0a) eoscr; 63 | __sfr __at(0x0b) ihrcr; 64 | __sfr __at(0x0c) integs; 65 | __sfr __at(0x0d) padier; 66 | __sfr __at(0x0e) pbdier; 67 | __sfr __at(0x0f) (pcdier); 68 | 69 | __sfr __at(0x10) pa; 70 | __sfr __at(0x11) pac; 71 | __sfr __at(0x12) paph; 72 | __sfr __at(0x14) pb; 73 | __sfr __at(0x15) pbc; 74 | __sfr __at(0x16) pbph; 75 | __sfr __at(0x17) pc; 76 | 77 | __sfr __at(0x18) pcc; 78 | __sfr __at(0x19) pcph; 79 | __sfr __at(0x1a) pd; 80 | __sfr __at(0x1b) pdc; 81 | __sfr __at(0x1c) pdph; 82 | 83 | __sfr __at(0x20) adcc; 84 | __sfr __at(0x21) adcm; 85 | __sfr __at(0x22) adcrh ; 86 | __sfr __at(0x23) adcrl; 87 | __sfr __at(0x25) rstst; 88 | 89 | 90 | __sfr __at(0x37) tm2s; 91 | 92 | __sfr __at(0x38) a_ihrc; 93 | __sfr __at(0x39) bgtr; 94 | __sfr __at(0x3b) misc; 95 | __sfr __at(0x3c) tm2c; 96 | __sfr __at(0x3d) tm2ct; 97 | __sfr __at(0x3e) gpcc; 98 | 99 | 100 | 101 | 102 | 103 | 104 | 105 | 106 | 107 | #endif 108 | -------------------------------------------------------------------------------- /Toolchain/util/output/io_pms271.h: -------------------------------------------------------------------------------- 1 | // I/O include file for Padauk PMS271 2 | // Version: 0.11a 3 | // Automatically generated on 2019-09-29 16:10:55.843298 4 | 5 | #ifndef __PDK_IO_PMS271_H 6 | #define __PDK_IO_PMS271_H 7 | 8 | #include 9 | 10 | #define __PDK_RAMEND 63 11 | #define __PDK_IOEND 127 12 | #define __PDK_FLASHEND 1023 13 | 14 | #define PDK_USE_FACTORY_TRIMMING() {#error 'this device does not support factory trimming'} 15 | 16 | #define T16C t16c // __sfr16 __at(0x00) T16C 17 | __sfr16 t16c; 18 | 19 | #define FLAG flag // __sfr __at(0x00) FLAG 20 | #define FPPEN fppen // __sfr __at(0x01) FPPEN 21 | #define SP sp // __sfr __at(0x02) SP 22 | #define CLKMD clkmd // __sfr __at(0x03) CLKMD 23 | #define INTEN inten // __sfr __at(0x04) INTEN 24 | #define INTRQ intrq // __sfr __at(0x05) INTRQ 25 | #define T16M t16m // __sfr __at(0x06) T16M 26 | #define GDIO gdio // __sfr __at(0x07) GDIO 27 | #define EOSCR eoscr // __sfr __at(0x0a) EOSCR 28 | #define IHRCR ihrcr // __sfr __at(0x0b) IHRCR 29 | #define INTEGS integs // __sfr __at(0x0c) INTEGS 30 | #define PADIER padier // __sfr __at(0x0d) PADIER 31 | #define PBDIER pbdier // __sfr __at(0x0e) PBDIER 32 | #define PA pa // __sfr __at(0x10) PA 33 | #define PAC pac // __sfr __at(0x11) PAC 34 | #define PAPH paph // __sfr __at(0x12) PAPH 35 | #define PB pb // __sfr __at(0x14) PB 36 | #define PBC pbc // __sfr __at(0x15) PBC 37 | #define PBPH pbph // __sfr __at(0x16) PBPH 38 | #define ADCRHC adcrhc // __sfr __at(0x1c) ADCRHC 39 | #define ADCC adcc // __sfr __at(0x20) ADCC 40 | #define ADCM adcm // __sfr __at(0x21) ADCM 41 | #define ADCR adcr // __sfr __at(0x22) ADCR 42 | #define RSTST rstst // __sfr __at(0x25) RSTST 43 | #define A_IHRC a_ihrc // __sfr __at(0x38) A_IHRC 44 | #define BGTR bgtr // __sfr __at(0x39) BGTR 45 | #define MISC misc // __sfr __at(0x3b) MISC 46 | 47 | __sfr __at(0x00) flag; 48 | __sfr __at(0x01) fppen; 49 | __sfr __at(0x02) sp; 50 | __sfr __at(0x03) clkmd; 51 | __sfr __at(0x04) inten; 52 | __sfr __at(0x05) intrq; 53 | __sfr __at(0x06) t16m; 54 | __sfr __at(0x07) gdio; 55 | 56 | __sfr __at(0x0a) eoscr; 57 | __sfr __at(0x0b) ihrcr; 58 | __sfr __at(0x0c) integs; 59 | __sfr __at(0x0d) padier; 60 | __sfr __at(0x0e) pbdier; 61 | 62 | __sfr __at(0x10) pa; 63 | __sfr __at(0x11) pac; 64 | __sfr __at(0x12) paph; 65 | __sfr __at(0x14) pb; 66 | __sfr __at(0x15) pbc; 67 | __sfr __at(0x16) pbph; 68 | 69 | __sfr __at(0x1c) adcrhc; 70 | 71 | __sfr __at(0x20) adcc; 72 | __sfr __at(0x21) adcm; 73 | __sfr __at(0x22) adcr; 74 | __sfr __at(0x25) rstst; 75 | 76 | 77 | 78 | __sfr __at(0x38) a_ihrc; 79 | __sfr __at(0x39) bgtr; 80 | __sfr __at(0x3b) misc; 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | #endif 91 | -------------------------------------------------------------------------------- /Toolchain/util/readme.md: -------------------------------------------------------------------------------- 1 | ## PDK include generator 2 | 3 | This folder includes a small python script that takes a csv file with register descriptions and generates header files with register mapping for SDCC. 4 | 5 | - **genioincludes** - the script 6 | - **output/** - contains output data 7 | - **PDK_register_map.csv** - the input file 8 | 9 | The csv input file is a slightly modifed version of the file compiled and posted by JS [here](https://www.eevblog.com/forum/blog/eevblog-1144-padauk-programmer-reverse-engineering/msg2518545/#msg2518545). 10 | 11 | -------------------------------------------------------------------------------- /hardware.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/cpldcpu/SimPad/22191102d1bc6d280b5c20b2e4b45a70a983abee/hardware.jpg --------------------------------------------------------------------------------