├── .gitignore ├── LICENSE ├── README.md ├── audio-clockworkpi-a06 └── PKGBUILD ├── fan-daemon-clockworkpi ├── PKGBUILD └── fan-daemon-clockwork-a06.install ├── gearbox-clockworkpi-a06 └── PKGBUILD ├── linux-clockworkpi-a06 ├── 0001-arm64-dts-clockworkpi-a06-dts.patch ├── 0001-net-smsc95xx-Allow-mac-address-to-be-set-as-a-parame.patch ├── 0002-mfd-axp20x-add-clockworkpi-a06-power-support.patch ├── 0004-gpu-drm-panel-add-cwd686-driver.patch ├── 0004-power-supply-Add-Support-for-RK817-Charger.patch ├── 0005-video-backlight-add-ocp8178-driver.patch ├── 0006-fix-rockchip-mipi-dsi-display-init-timeouts.patch ├── 0023-drm-rockchip-support-gamma-control-on-RK3399.patch ├── 0024-Bluetooth-btsdio-Do-not-bind-to-non-removable-BCM4345-and-BCM43455.patch ├── 60-linux.hook ├── 90-linux.hook ├── PKGBUILD ├── config ├── linux-clockworkpi-a06.install └── linux.preset ├── networking-clockworkpi-a06 └── PKGBUILD ├── uboot-clockworkpi-a06 ├── 0001-uboot-clockworkpi-a06.patch ├── PKGBUILD └── uboot-clockworkpi-a06.install └── wiringpi-clockworkpi └── PKGBUILD /.gitignore: -------------------------------------------------------------------------------- 1 | .idea 2 | pkgs -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU LESSER GENERAL PUBLIC LICENSE 2 | Version 2.1, February 1999 3 | 4 | Copyright (C) 1991, 1999 Free Software Foundation, Inc. 5 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | [This is the first released version of the Lesser GPL. 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This will include patching our 13 | bootloader and kernel with the patches provided by ClockworkPi. Technically, the DevTerm A06's architecture is based on 14 | the rk3399. 15 | 16 | ## Quickstart 17 | 18 | Pre-built root filesystem(s) are provided in the **Releases** tab. Skip to the **Prepare the SD Card** section if using 19 | a pre-built image. Replace `arch-linux-clockworkpi-a06-root-fs.tar.xz` with your downloaded file name in the guide 20 | steps. 21 | 22 | **NOTE:** Please note the following defaults for the release filesystem: 23 | 24 | * Root password: `root` 25 | * Timezone: `US/Eastern` 26 | * Locale: `en_US UTF8` 27 | * Hostname: `devterm` 28 | 29 | # Setup 30 | 31 | This guide **assumes you are already using Arch Linux**. Some package names or procedures may differ depending on your 32 | distribution. 33 | 34 | In order to build the root filesystem, we will set up the following: 35 | 36 | 1. `aarch64` chroot environment + necessary configuration 37 | 2. `arm-none-eabi-gcc` build tools from ARM 38 | 3. Linux kernel 39 | 4. U-Boot bootloader 40 | 5. Additional packages for the A06 41 | 42 | ## Setting up Chroot Environment 43 | 44 | We will start by creating an ARM chroot environment to build our root filesystem using 45 | [this guide](https://nerdstuff.org/posts/2020/2020-003_simplest_way_to_create_an_arm_chroot/). 46 | 47 | 1. Install the required packages 48 | 49 | ``` 50 | $ yay -S base-devel binfmt-qemu-static qemu-user-static arch-install-scripts 51 | 52 | # systemctl restart systemd-binfmt.service 53 | ``` 54 | 55 | 2. Verify that an `aarch64` executable exists in 56 | 57 | ``` 58 | $ ls /proc/sys/fs/binfmt_misc 59 | ``` 60 | 61 | 3. Download the base root FS to use. We will use the `aarch64` tarball from Arch Linux ARM 62 | 63 | ``` 64 | $ wget http://os.archlinuxarm.org/os/ArchLinuxARM-aarch64-latest.tar.gz 65 | ``` 66 | 67 | 4. Create the mount point and extract the files as root (not via sudo) 68 | 69 | ``` 70 | $ sudo su 71 | # mkdir root 72 | 73 | # bsdtar -xpf ArchLinuxARM-aarch64-latest.tar.gz -C root 74 | # mount --bind root root 75 | ``` 76 | 77 | **NOTE**: It's very important that this `root` folder is owned by **root**. Otherwise, you will 78 | get `unsafe path transition` 79 | errors in the final build. 80 | 81 | 5. Chroot into the newly created environment 82 | 83 | ``` 84 | # arch-chroot root 85 | ``` 86 | 87 | 6. Inside the chroot, populate and init the pacman keyring 88 | 89 | ``` 90 | # pacman-key --init 91 | # pacman-key --populate archlinuxarm 92 | ``` 93 | 94 | 7. Finally, update the packages 95 | 96 | ``` 97 | # pacman -Syu 98 | ``` 99 | 100 | ## Configuring The Root Filesystem 101 | 102 | We will start with lightly configuring our system before compiling the packages. 103 | 104 | For this section, **all commands will be run inside the chroot**. 105 | 106 | 1. Install some useful tools 107 | 108 | ``` 109 | # pacman -S base-devel git vim wget ranger sudo man networkmanager 110 | ``` 111 | 112 | 2. Enable `networkmanager` and `dhcpcd` for networking on first boot 113 | 114 | ``` 115 | # systemctl enable NetworkManager dhcpcd 116 | ``` 117 | 118 | 3. Set the Locale by editing `/etc/locale.gen` and uncommenting your required locales. 119 | 4. Run 120 | 121 | ``` 122 | # locale-gen 123 | ``` 124 | 125 | 5. Set `fstab` 126 | 127 | ``` 128 | # echo 'LABEL=ROOT_ARCH / ext4 defaults 0 0' >> /etc/fstab 129 | ``` 130 | 131 | 6. Set the time using `timedatectl`. To list supported timezones: `timedatectl list-timezones` 132 | 133 | ``` 134 | # timedatectl set-timezone "US/Eastern" 135 | # timedatectl set-ntp true 136 | ``` 137 | 138 | **NOTE**: This may affect the timezone of your system outside the chroot, if so, you may reset 139 | your host system timezone after finishing the root tarball. 140 | 141 | 142 | 7. Set the system clock 143 | 144 | ``` 145 | # hwclock --systohc 146 | ``` 147 | 148 | 8. Set the hostname to whatever you like 149 | 150 | ``` 151 | # echo 'devterm' > /etc/hostname 152 | ``` 153 | 154 | 9. Add the following to `/etc/X11/xorg.conf.d/10-monitor.conf` 155 | 156 | ``` 157 | Section "Monitor" 158 | Identifier "DSI-1" 159 | Option "Rotate" "right" 160 | EndSection 161 | ``` 162 | 163 | 10. Assign the root password 164 | 165 | ``` 166 | # passwd 167 | ``` 168 | 169 | ### Switch to the `alarm` user 170 | 171 | 1. We can avoid working with the root account by granting `alarm`, the default Arch Linux ARM user, `sudo` privileges. 172 | 173 | ``` 174 | # EDITOR=/usr/bin/vim visudo 175 | ``` 176 | 177 | 2. And add the corresponding line for `alarm` after the one for `root` 178 | 179 | ``` 180 | alarm ALL=(ALL) ALL 181 | ``` 182 | 183 | 3. Switch to the `alarm` user 184 | 185 | ``` 186 | # su alarm 187 | 188 | $ cd 189 | ``` 190 | 191 | **NOTE**: The default password for the **alarm** user is **alarm** 192 | 193 | ## Acquiring GCC Build Tools 194 | 195 | U-Boot depends on the `arm-none-eabi-gcc` executable to be built, and since this program is not available in the Arch 196 | Linux ARM repositories, we will download it directly from 197 | [ARM's website](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads) 198 | . 199 | 200 | 1. Download the binaries 201 | 202 | ``` 203 | $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-aarch64-arm-none-eabi.tar.xz 204 | ``` 205 | 206 | 2. Extract the binaries to another directory 207 | 208 | ``` 209 | $ mkdir gcc 210 | $ tar -xJf gcc-arm-10.3-2021.07-aarch64-arm-none-eabi.tar.xz -C gcc 211 | ``` 212 | 213 | 3. Add the toolchain to your `PATH` 214 | 215 | ``` 216 | $ cd gcc/gcc-arm-10.3-2021.07-aarch64-arm-none-eabi/bin 217 | $ export PATH=$PATH:$(pwd) 218 | $ cd 219 | ``` 220 | 221 | ## Compiling The Packages 222 | 223 | This repository contains pre-configured and patched Arch Linux packages for the DevTerm A06. The Linux kernel and U-Boot 224 | are based off the **rock64** variants, already available in Arch Linux ARM, with patches provided by ClockWorkPi. 225 | 226 | You can find these patches from 227 | ClockworkPi [here](https://github.com/clockworkpi/DevTerm/tree/main/Code/patch/armbian_build_a06/patch). 228 | 229 | ### Download This Repository 230 | 231 | 1. Inside the `alarm` home folder of your `aarch64` chroot environment, clone this repository 232 | 233 | ``` 234 | $ git clone https://github.com/css459/arch-linux-arm-clockworkpi-a06.git 235 | $ cd arch-linux-arm-clockworkpi-a06 236 | ``` 237 | 238 | ### Compiling The Linux Kernel 239 | 240 | 1. Build the package. **This can take a long time!!** Especially since we are emulating an `aarch64` 241 | architecture. The package build tool `makepkg`, supports a flag called `MAKEFLAGS`. Below, we will append 242 | `MAKEFLAGS="-j$(nproc)"` to the `makepkg` command to instruct the compiler to use one worker for each core. 243 | 244 | ``` 245 | $ cd linux-clockworkpi-a06 246 | $ MAKEFLAGS="-j$(nproc)" makepkg -si 247 | $ cd .. 248 | ``` 249 | 250 | ### Compiling U-Boot 251 | 252 | 1. Build the package, similar to above. 253 | 254 | ``` 255 | $ cd uboot-clockworkpi-a06 256 | $ MAKEFLAGS="-j$(nproc)" makepkg -si 257 | $ cd .. 258 | ``` 259 | 260 | **NOTE: DO NOT INSTALL THE BOOTLOADER TO THE DISK WHEN ASKED AFTER THIS STEP.** We will do this ourselves when we 261 | prepare the SD card. 262 | 263 | ### Compiling Additional Packages 264 | 265 | For each additional package directory in this repository 266 | 267 | ``` 268 | $ cd 269 | $ MAKEFLAGS="-j$(nproc)" makepkg -si 270 | $ cd .. 271 | ``` 272 | 273 | ### Exit the chroot 274 | 275 | 1. Exit `alarm` 276 | 277 | ``` 278 | $ exit 279 | ``` 280 | 281 | 2. Exit `root` 282 | 283 | ``` 284 | # exit 285 | ``` 286 | 287 | ### Unmount The Root Filesystem 288 | 289 | ``` 290 | # umonut root 291 | ``` 292 | 293 | # Tar The Root Filesystem 294 | 295 | We are now ready to package up the root filesystem into a compressed tarball. 296 | 297 | ``` 298 | # cd root 299 | # tar cpJf ../arch-linux-clockworkpi-a06-root-fs.tar.xz . 300 | # cd .. 301 | ``` 302 | 303 | Change ownership of the tarball and exit the `root` account 304 | 305 | ``` 306 | # chown : arch-linux-clockworkpi-a06-root-fs.tar.xz 307 | # exit 308 | ``` 309 | 310 | **You now have a root filesystem tarball to bootstrap the SD card!** 311 | 312 | ## Prepare the SD Card 313 | 314 | We will now put our prepared filesystem onto the SD card. We will follow 315 | [Arch Linux ARM's guide for the rock64](https://archlinuxarm.org/platforms/armv8/rockchip/rock64), but use our tarball 316 | in place of theirs. 317 | 318 | 1. Zero the beginning of the SD card 319 | 320 | ``` 321 | # dd if=/dev/zero of=/dev/sdX bs=1M count=32 322 | ``` 323 | 324 | 2. Start fdisk to partition the SD card 325 | 326 | ``` 327 | # fdisk /dev/sdX 328 | ``` 329 | 330 | 3. Inside fdisk, 331 | 332 | 1. Type **o**. This will clear out any partitions on the drive 333 | 2. Type **p** to list partitions. There should be no partitions left 334 | 3. Type **n**, then **p** for primary, **1** for the first partition on the drive, **32768** for the first sector 335 | 4. Press ENTER to accept the default last sector 336 | 5. Write the partition table and exit by typing **w** 337 | 338 | 4. Create the **ext4** filesystem **without a Journal** 339 | 340 | ``` 341 | # mkfs.ext4 -L ROOT_ARCH -O ^has_journal /dev/sdX1 342 | ``` 343 | 344 | **NOTE:** Disabling the journal is helpful for simple flash devices 345 | like SD Cards to reduce successive writes. In rare cases, your filesystem 346 | may become corrupted, which may arise as a **boot loop**. Running 347 | `fsck -y /dev/sdX1` on an external system can fix this issue. 348 | 349 | 5. Mount the filesystem 350 | 351 | ``` 352 | # mount /dev/sdX1 /mnt 353 | ``` 354 | 355 | 6. Install the root filesystem (as root not via sudo) 356 | 357 | ``` 358 | # sudo su 359 | # bsdtar -xpf arch-linux-clockworkpi-a06-root-fs.tar.xz -C /mnt 360 | # exit 361 | ``` 362 | 363 | 7. Install the bootloader to the SD card 364 | 365 | ``` 366 | # cd /mnt/boot 367 | # dd if=idbloader.img of=/dev/sdX seek=64 conv=notrunc,fsync 368 | # dd if=u-boot.itb of=/dev/sdX seek=16384 conv=notrunc,fsync 369 | ``` 370 | 371 | 8. Unmount and eject the SD card 372 | 373 | ``` 374 | # cd 375 | # umount /mnt 376 | # eject /dev/sdX 377 | ``` 378 | 379 | ## Done! 380 | 381 | The SD card is now ready to be booted by the DevTerm! Good luck! 382 | 383 | ## Next Steps 384 | 385 | You will want to set up Wi-Fi on first boot. You can do so by 386 | using [NetworkManager](https://wiki.archlinux.org/title/NetworkManager). 387 | 388 | Check out the [post-install suggestions](https://wiki.archlinux.org/title/General_recommendations) from Arch Linux for 389 | further configuration. 390 | 391 | ## Troubleshooting 392 | 393 | If you run into issues where you see no screen output or the DevTerm will not boot, please check the debugging output 394 | via UART: 395 | 396 | 1. Connect a micro-USB cable to the UART port on the *inside* of your DevTerm, near where the printer ribbon cable is 397 | connected 398 | 2. Connect the other end to your Linux system, you should now see a new device: `/dev/ttyUSB0` 399 | 3. Monitor the connection with `sudo stty -F /dev/ttyUSB0 1500000 && sudo cat /dev/ttyUSB0` 400 | 4. Power on your DevTerm and monitor for errors 401 | 402 | # Acknowledgements 403 | 404 | Very special thanks to **Max Fierke (@maxfierke)** from the CPI Discord, and the Manjaro team for their help in 405 | debugging and kernel patching. The Linux kernel and u-boot ports in this repository uses their carefully designed 406 | patches, and modified PKGBUILDs. This Arch Linux port would not be possible without their hard work, and I make no 407 | claims or credit to it. 408 | 409 | [Manjaro DevTerm A06 Linux Kernel](https://gitlab.manjaro.org/manjaro-arm/packages/core/linux-clockworkpi-a06) 410 | 411 | [Manjaro DevTerm A06 U-Boot](https://gitlab.manjaro.org/manjaro-arm/packages/core/uboot-clockworkpi-a06) 412 | 413 | -------------------------------------------------------------------------------- /audio-clockworkpi-a06/PKGBUILD: -------------------------------------------------------------------------------- 1 | # Maintainer: lonewsk 2 | 3 | pkgname=audio-clockworkpi-a06 4 | pkgver=1.0 5 | pkgrel=1 6 | pkgdesc="ClockworkPi DevTerm A06 Gearbox" 7 | arch=('aarch64') 8 | license=('LGPLv2') 9 | depends=('alsa-lib') 10 | groups=('clockworkpi-a06') 11 | source=("git://gitlab.manjaro.org/manjaro-arm/packages/community/clockworkpi-a06-post-install.git") 12 | md5sums=('SKIP') 13 | 14 | 15 | package() { 16 | # Install alsa-ucm-conf profile for DevTerm A06 17 | mkdir -p "${pkgdir}/usr/share/alsa/ucm2/Rockchip/es8388" 18 | install -Dm644 "${srcdir}/clockworkpi-a06-post-install/es8388.conf" "${pkgdir}/usr/share/alsa/ucm2/Rockchip/es8388/es8388.conf" 19 | install -Dm644 "${srcdir}/clockworkpi-a06-post-install/HiFi.conf" "${pkgdir}/usr/share/alsa/ucm2/Rockchip/es8388/HiFi.conf" 20 | 21 | mkdir -p "${pkgdir}"/usr/share/alsa/ucm2/conf.d/simple-card 22 | ln -sfv /usr/share/alsa/ucm2/Rockchip/es8388/es8388.conf \ 23 | "${pkgdir}"/usr/share/alsa/ucm2/conf.d/simple-card/rockchip,es8388-codec.conf 24 | } 25 | -------------------------------------------------------------------------------- /fan-daemon-clockworkpi/PKGBUILD: -------------------------------------------------------------------------------- 1 | # ClockworkPi DevTerm Fan Daemon 2 | # Maintainer: Cole Smith 3 | 4 | pkgname=fan-daemon-clockworkpi-a06 5 | pkgver=1.0 6 | pkgrel=1 7 | pkgdesc="ClockworkPi DevTerm A06 Fan Daemon" 8 | arch=('any') 9 | url="https://github.com/clockworkpi/DevTerm/tree/main/Code/devterm_fan_daemon_cpi_a06" 10 | license=('LGPLv2') 11 | depends=('python>=3', 'wiringpi-clockworkpi') 12 | install='fan-daemon-clockwork-a06.install' 13 | groups=('clockworkpi-a06') 14 | source=("https://raw.githubusercontent.com/clockworkpi/DevTerm/main/Code/devterm_fan_daemon_cpi_a06/temp_fan_daemon_a06.py" 15 | "https://raw.githubusercontent.com/clockworkpi/DevTerm/main/Code/devterm_fan_daemon_cpi_a06/etc/systemd/system/devterm-fan-temp-daemon-a06.service") 16 | md5sums=('a6ce80633b2a1f20e1941ec45bd57185' 17 | '7e9fde90a0809aa67976279f1b110546') 18 | 19 | package() { 20 | install -Dm755 "temp_fan_daemon_a06.py" "$pkgdir/usr/local/bin/temp_fan_daemon_a06.py" 21 | install -Dm644 "devterm-fan-temp-daemon-a06.service" "$pkgdir/etc/systemd/system/devterm-fan-temp-daemon-a06.service" 22 | } 23 | -------------------------------------------------------------------------------- /fan-daemon-clockworkpi/fan-daemon-clockwork-a06.install: -------------------------------------------------------------------------------- 1 | post_install() { 2 | echo 'Enabling and Starting Fan Daemon...' 3 | systemctl enable devterm-fan-temp-daemon-a06 4 | systemctl start devterm-fan-temp-daemon-a06 5 | } 6 | -------------------------------------------------------------------------------- /gearbox-clockworkpi-a06/PKGBUILD: -------------------------------------------------------------------------------- 1 | # ClockworkPi DevTerm A06 Gearbox 2 | # Maintainer: Cole Smith 3 | 4 | pkgname=gearbox-clockworkpi-a06 5 | pkgver=1.0 6 | pkgrel=1 7 | pkgdesc="ClockworkPi DevTerm A06 Gearbox" 8 | arch=('any') 9 | url="https://github.com/clockworkpi/DevTerm/blob/main/Code/A06/devterm-a06-gearbox" 10 | license=('LGPLv2') 11 | depends=('python>=3') 12 | groups=('clockworkpi-a06') 13 | source=("https://raw.githubusercontent.com/clockworkpi/DevTerm/main/Code/A06/devterm-a06-gearbox") 14 | md5sums=('775bb3e84708de6bacdf7d35f5c133bf') 15 | 16 | package() { 17 | install -Dm755 "devterm-a06-gearbox" "$pkgdir/usr/bin/$pkgname" 18 | } 19 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0001-arm64-dts-clockworkpi-a06-dts.patch: -------------------------------------------------------------------------------- 1 | diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile 2 | index 67e09e88f..5212a625f 100644 3 | --- a/arch/arm64/boot/dts/rockchip/Makefile 4 | +++ b/arch/arm64/boot/dts/rockchip/Makefile 5 | @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-lion-haikou.dtb 6 | dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb 7 | dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb 8 | dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb 9 | +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-clockworkpi-a06.dtb 10 | dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb 11 | dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb 12 | dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb 13 | diff --git a/arch/arm64/boot/dts/rockchip/rk3399-clockworkpi-a06.dts b/arch/arm64/boot/dts/rockchip/rk3399-clockworkpi-a06.dts 14 | new file mode 100644 15 | index 000000000..1c8fb451a 16 | --- /dev/null 17 | +++ b/arch/arm64/boot/dts/rockchip/rk3399-clockworkpi-a06.dts 2021-12-05 20:46:08.851233995 -0600 18 | @@ -0,0 +1,989 @@ 19 | +/* 20 | + * SPDX-License-Identifier: (GPL-2.0+ or MIT) 21 | + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 22 | + * Copyright (c) 2018 Akash Gajjar 23 | + * Copyright (c) 2020 Armbian (chwe17, piter75) 24 | + * Copyright (c) 2021 Clockwork Tech LLC 25 | + * Copyright (c) 2021 Max Fierke 26 | + * 27 | + */ 28 | + 29 | +/dts-v1/; 30 | +#include 31 | +#include 32 | +#include 33 | +#include "rk3399.dtsi" 34 | +#include "rk3399-opp.dtsi" 35 | + 36 | +/ { 37 | + model = "Clockworkpi A06"; 38 | + compatible = "clockwork,devterm-a06", "rockchip,rk3399"; 39 | + 40 | + chosen { 41 | + stdout-path = "serial2:1500000n8"; 42 | + }; 43 | + 44 | + aliases { 45 | + spi1 = &spi1; 46 | + }; 47 | + 48 | + usb_vbus: usb-vbus { 49 | + compatible = "regulator-fixed"; 50 | + regulator-name = "usb_vbus"; 51 | + regulator-always-on; 52 | + regulator-boot-on; 53 | + regulator-min-microvolt = <5000000>; 54 | + regulator-max-microvolt = <5000000>; 55 | + vin-supply = <&vcc5v0_sys>; 56 | + 57 | + regulator-state-mem { 58 | + regulator-on-in-suspend; 59 | + }; 60 | + }; 61 | + 62 | + usb3_vbus: usb3-vbus { 63 | + compatible = "regulator-fixed"; 64 | + regulator-name = "usb3_vbus"; 65 | + regulator-always-on; 66 | + regulator-boot-on; 67 | + regulator-min-microvolt = <5000000>; 68 | + regulator-max-microvolt = <5000000>; 69 | + vin-supply = <&vcc5v0_sys>; 70 | + 71 | + regulator-state-mem { 72 | + regulator-on-in-suspend; 73 | + }; 74 | + }; 75 | + 76 | + vcc3v0_sd: vcc3v0-sd { 77 | + compatible = "regulator-fixed"; 78 | + enable-active-high; 79 | + gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 80 | + pinctrl-names = "default"; 81 | + pinctrl-0 = <&sdmmc0_pwr_h>; 82 | + regulator-name = "vcc3v0_sd"; 83 | + regulator-always-on; 84 | + regulator-min-microvolt = <3000000>; 85 | + regulator-max-microvolt = <3000000>; 86 | + vin-supply = <&vcc3v3_sys>; 87 | + 88 | + regulator-state-mem { 89 | + regulator-off-in-suspend; 90 | + }; 91 | + }; 92 | + 93 | + vcc3v3_sys: vcc3v3-sys { 94 | + compatible = "regulator-fixed"; 95 | + regulator-name = "vcc3v3_sys"; 96 | + regulator-always-on; 97 | + regulator-boot-on; 98 | + regulator-min-microvolt = <3300000>; 99 | + regulator-max-microvolt = <3300000>; 100 | + vin-supply = <&vcc_sys>; 101 | + 102 | + regulator-state-mem { 103 | + regulator-on-in-suspend; 104 | + }; 105 | + }; 106 | + 107 | + vcc5v0_sys: vcc5v0-sys { 108 | + compatible = "regulator-fixed"; 109 | + regulator-name = "vcc5v0_sys"; 110 | + regulator-always-on; 111 | + regulator-boot-on; 112 | + regulator-min-microvolt = <5000000>; 113 | + regulator-max-microvolt = <5000000>; 114 | + vin-supply = <&vcc_sys>; 115 | + 116 | + regulator-state-mem { 117 | + regulator-on-in-suspend; 118 | + }; 119 | + }; 120 | + 121 | + vcc_sys: vcc-sys { 122 | + compatible = "regulator-fixed"; 123 | + regulator-name = "vcc_sys"; 124 | + regulator-always-on; 125 | + regulator-boot-on; 126 | + }; 127 | + 128 | + vdd_log: vdd-log { 129 | + compatible = "pwm-regulator"; 130 | + pwms = <&pwm2 0 25000 1>; 131 | + regulator-name = "vdd_log"; 132 | + regulator-min-microvolt = <800000>; 133 | + regulator-max-microvolt = <1400000>; 134 | + regulator-always-on; 135 | + regulator-boot-on; 136 | + vin-supply = <&vcc3v3_sys>; 137 | + }; 138 | + 139 | + dw_hdmi_audio: dw-hdmi-audio { 140 | + status = "disable"; 141 | + compatible = "rockchip,dw-hdmi-audio"; 142 | + #sound-dai-cells = <0>; 143 | + }; 144 | + 145 | + hdmi_sound: hdmi-sound { 146 | + status = "okay"; 147 | + }; 148 | + 149 | + sdio_pwrseq: sdio-pwrseq { 150 | + compatible = "mmc-pwrseq-simple"; 151 | + clocks = <&rk808 1>; 152 | + clock-names = "ext_clock"; 153 | + pinctrl-names = "default"; 154 | + pinctrl-0 = <&wifi_enable_h>; 155 | + 156 | + /* 157 | + * On the module itself this is one of these (depending 158 | + * on the actual card populated): 159 | + * - SDIO_RESET_L_WL_REG_ON 160 | + * - PDN (power down when low) 161 | + */ 162 | + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 163 | + }; 164 | + 165 | + es8388-sound { 166 | + status = "okay"; 167 | + compatible = "simple-audio-card"; 168 | + pinctrl-names = "default"; 169 | + pinctrl-0 = <&hp_det>; 170 | + simple-audio-card,format = "i2s"; 171 | + simple-audio-card,name = "rockchip,es8388-codec"; 172 | + simple-audio-card,mclk-fs = <256>; 173 | + simple-audio-card,widgets = 174 | + "Headphone Mic", "Mic Jack", 175 | + "Headphone", "Headphones", 176 | + "Speaker", "Speaker"; 177 | + simple-audio-card,routing = 178 | + "LINPUT2", "Mic Jack", 179 | + "RINPUT2", "Mic Jack", 180 | + "Mic Jack", "Mic Bias", 181 | + "Headphones", "LOUT2", 182 | + "Headphones", "ROUT2", 183 | + "Speaker Amplifier INL", "LOUT2", 184 | + "Speaker Amplifier INR", "ROUT2", 185 | + "Speaker", "Speaker Amplifier OUTL", 186 | + "Speaker", "Speaker Amplifier OUTR"; 187 | + 188 | + simple-audio-card,hp-det-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; 189 | + simple-audio-card,aux-devs = <&speaker_amp>; 190 | + simple-audio-card,pin-switches = "Speaker"; 191 | + 192 | + simple-audio-card,cpu { 193 | + sound-dai = <&i2s0>; 194 | + system-clock-frequency = <11289600>; 195 | + }; 196 | + simple-audio-card,codec { 197 | + sound-dai = <&es8388>; 198 | + system-clock-frequency = <11289600>; 199 | + }; 200 | + }; 201 | + 202 | + speaker_amp: speaker-amplifier { 203 | + compatible = "simple-audio-amplifier"; 204 | + pinctrl-names = "default"; 205 | + pinctrl-0 = <&pa_en>; 206 | + enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 207 | + sound-name-prefix = "Speaker Amplifier"; 208 | + VCC-supply = <&vcc5v0_sys>; 209 | + }; 210 | + 211 | + battery: battery@0 { 212 | + compatible = "simple-battery"; 213 | + constant-charge-current-max-microamp = <2100000>; 214 | + voltage-min-design-microvolt = <3300000>; 215 | + }; 216 | + 217 | + ocp8178_backlight: backlight@0 { 218 | + compatible = "ocp8178-backlight"; 219 | + backlight-control-gpios = <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; 220 | + default-brightness = <5>; 221 | + pinctrl-names = "default"; 222 | + pinctrl-0 = <&backlight_control>; 223 | + }; 224 | + 225 | +}; 226 | + 227 | +&cpu_l0 { 228 | + cpu-supply = <&vdd_cpu_l>; 229 | +}; 230 | + 231 | +&cpu_l1 { 232 | + cpu-supply = <&vdd_cpu_l>; 233 | +}; 234 | + 235 | +&cpu_l2 { 236 | + cpu-supply = <&vdd_cpu_l>; 237 | +}; 238 | + 239 | +&cpu_l3 { 240 | + cpu-supply = <&vdd_cpu_l>; 241 | +}; 242 | + 243 | +&cpu_b0 { 244 | + cpu-supply = <&vdd_cpu_b>; 245 | +}; 246 | + 247 | +&cpu_b1 { 248 | + cpu-supply = <&vdd_cpu_b>; 249 | +}; 250 | + 251 | +&vopb { 252 | + status = "okay"; 253 | +}; 254 | + 255 | +&vopb_mmu { 256 | + status = "okay"; 257 | +}; 258 | + 259 | +&vopl { 260 | + status = "okay"; 261 | +}; 262 | + 263 | +&vopl_mmu { 264 | + status = "okay"; 265 | +}; 266 | + 267 | +&vpu { 268 | + status = "okay"; 269 | + /* 0 means ion, 1 means drm */ 270 | + //allocator = <0>; 271 | +}; 272 | + 273 | +&gpu { 274 | + status = "okay"; 275 | + mali-supply = <&vdd_gpu>; 276 | +}; 277 | + 278 | +&rga { 279 | + status = "disabled"; 280 | +}; 281 | + 282 | +&hdmi_in_vopb { 283 | + status = "okay"; 284 | +}; 285 | + 286 | +&hdmi_in_vopl { 287 | + status = "disable"; 288 | +}; 289 | + 290 | +&mipi_in_vopb { 291 | + status = "disable"; 292 | +}; 293 | + 294 | +&mipi_in_vopl { 295 | + status = "okay"; 296 | +}; 297 | + 298 | +&hdmi { 299 | + /* remove the hdmi_i2c_xfer */ 300 | + pinctrl-0 = <&hdmi_cec>; 301 | + #address-cells = <1>; 302 | + #size-cells = <0>; 303 | + #sound-dai-cells = <0>; 304 | + status = "okay"; 305 | + ddc-i2c-bus = <&i2c3>; 306 | + rockchip,defaultmode = <16>; /* CEA 1920x1080@60Hz */ 307 | +}; 308 | + 309 | +&mipi_dsi { 310 | + status = "okay"; 311 | + 312 | + ports { 313 | + mipi_out: port@1 { 314 | + reg = <1>; 315 | + #address-cells = <1>; 316 | + #size-cells = <0>; 317 | + mipi_dsi_out: endpoint { 318 | + remote-endpoint = <&panel_in>; 319 | + }; 320 | + }; 321 | + }; 322 | + 323 | + dsi_panel: panel { 324 | + compatible = "cw,cwd686"; 325 | + reg = <0>; 326 | + backlight = <&ocp8178_backlight>; 327 | + reset-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; 328 | + rotation = <90>; 329 | + dsi,lanes = <4>; 330 | + pinctrl-names = "default"; 331 | + pinctrl-0 = <&panel_reset>; 332 | + status = "okay"; 333 | + 334 | + port { 335 | + panel_in: endpoint { 336 | + remote-endpoint = <&mipi_dsi_out>; 337 | + }; 338 | + }; 339 | + }; 340 | + 341 | +}; 342 | + 343 | +&uart0 { 344 | + pinctrl-names = "default"; 345 | + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 346 | + status = "okay"; 347 | + 348 | + bluetooth { 349 | + compatible = "brcm,bcm4345c5"; 350 | + clocks = <&rk808 1>; 351 | + clock-names = "lpo"; 352 | + device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 353 | + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 354 | + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 355 | + max-speed = <1500000>; 356 | + pinctrl-names = "default"; 357 | + pinctrl-0 = <&bt_host_wake &bt_wake &bt_reset>; 358 | + }; 359 | + 360 | +}; 361 | + 362 | +/* 363 | +&uart2 { 364 | + status = "okay"; 365 | +}; 366 | +*/ 367 | + 368 | +&i2c0 { 369 | + clock-frequency = <400000>; 370 | + i2c-scl-rising-time-ns = <168>; 371 | + i2c-scl-falling-time-ns = <4>; 372 | + status = "okay"; 373 | + 374 | + rk808: pmic@1b { 375 | + compatible = "rockchip,rk808"; 376 | + reg = <0x1b>; 377 | + interrupt-parent = <&gpio1>; 378 | + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 379 | + #clock-cells = <1>; 380 | + clock-output-names = "xin32k", "rk808-clkout2"; 381 | + pinctrl-names = "default"; 382 | + pinctrl-0 = <&pmic_int_l>; 383 | + wakeup-source; 384 | + 385 | + vcc1-supply = <&vcc3v3_sys>; 386 | + vcc2-supply = <&vcc3v3_sys>; 387 | + vcc3-supply = <&vcc3v3_sys>; 388 | + vcc4-supply = <&vcc3v3_sys>; 389 | + vcc6-supply = <&vcc3v3_sys>; 390 | + vcc7-supply = <&vcc3v3_sys>; 391 | + vcc8-supply = <&vcc3v3_sys>; 392 | + vcc9-supply = <&vcc3v3_sys>; 393 | + vcc10-supply = <&vcc3v3_sys>; 394 | + vcc11-supply = <&vcc3v3_sys>; 395 | + vcc12-supply = <&vcc3v3_sys>; 396 | + vcc13-supply = <&vcc3v3_sys>; 397 | + vcc14-supply = <&vcc3v3_sys>; 398 | + vddio-supply = <&vcc_3v0>; 399 | + 400 | + regulators { 401 | + vdd_center: DCDC_REG1 { 402 | + regulator-name = "vdd_center"; 403 | + regulator-always-on; 404 | + regulator-boot-on; 405 | + regulator-min-microvolt = <750000>; 406 | + regulator-max-microvolt = <1350000>; 407 | + regulator-ramp-delay = <6001>; 408 | + regulator-state-mem { 409 | + regulator-off-in-suspend; 410 | + }; 411 | + }; 412 | + 413 | + vdd_cpu_l: DCDC_REG2 { 414 | + regulator-name = "vdd_cpu_l"; 415 | + regulator-always-on; 416 | + regulator-boot-on; 417 | + regulator-min-microvolt = <750000>; 418 | + regulator-max-microvolt = <1350000>; 419 | + regulator-ramp-delay = <6001>; 420 | + regulator-state-mem { 421 | + regulator-off-in-suspend; 422 | + }; 423 | + }; 424 | + 425 | + vcc_ddr: DCDC_REG3 { 426 | + regulator-name = "vcc_ddr"; 427 | + regulator-always-on; 428 | + regulator-boot-on; 429 | + regulator-state-mem { 430 | + regulator-on-in-suspend; 431 | + }; 432 | + }; 433 | + 434 | + vcc1v8: vcc1v8_s3: vcca1v8_s3: DCDC_REG4 { 435 | + regulator-name = "vcc1v8"; 436 | + regulator-always-on; 437 | + regulator-boot-on; 438 | + regulator-min-microvolt = <1800000>; 439 | + regulator-max-microvolt = <1800000>; 440 | + regulator-state-mem { 441 | + regulator-on-in-suspend; 442 | + regulator-suspend-microvolt = <1800000>; 443 | + }; 444 | + }; 445 | + 446 | + vcc1v8_dvp: LDO_REG1 { 447 | + regulator-name = "vcc1v8_dvp"; 448 | + regulator-always-on; 449 | + regulator-boot-on; 450 | + regulator-min-microvolt = <1800000>; 451 | + regulator-max-microvolt = <1800000>; 452 | + regulator-state-mem { 453 | + regulator-off-in-suspend; 454 | + }; 455 | + }; 456 | + 457 | + vcc3v0_touch: LDO_REG2 { 458 | + regulator-name = "vcc3v0_touch"; 459 | + regulator-always-on; 460 | + regulator-boot-on; 461 | + regulator-min-microvolt = <3000000>; 462 | + regulator-max-microvolt = <3000000>; 463 | + regulator-state-mem { 464 | + regulator-off-in-suspend; 465 | + }; 466 | + }; 467 | + 468 | + vcc1v8_pmu: LDO_REG3 { 469 | + regulator-name = "vcc1v8_pmu"; 470 | + regulator-always-on; 471 | + regulator-boot-on; 472 | + regulator-min-microvolt = <1800000>; 473 | + regulator-max-microvolt = <1800000>; 474 | + regulator-state-mem { 475 | + regulator-on-in-suspend; 476 | + regulator-suspend-microvolt = <1800000>; 477 | + }; 478 | + }; 479 | + 480 | + vcc_sdio: LDO_REG4 { 481 | + regulator-name = "vcc_sdio"; 482 | + regulator-always-on; 483 | + regulator-boot-on; 484 | + regulator-min-microvolt = <1800000>; 485 | + regulator-max-microvolt = <3000000>; 486 | + regulator-init-microvolt = <3000000>; 487 | + regulator-state-mem { 488 | + regulator-on-in-suspend; 489 | + regulator-suspend-microvolt = <3000000>; 490 | + }; 491 | + }; 492 | + 493 | + vcca3v0_codec: LDO_REG5 { 494 | + regulator-name = "vcca3v0_codec"; 495 | + regulator-always-on; 496 | + regulator-boot-on; 497 | + regulator-min-microvolt = <3000000>; 498 | + regulator-max-microvolt = <3000000>; 499 | + regulator-state-mem { 500 | + regulator-off-in-suspend; 501 | + }; 502 | + }; 503 | + 504 | + vcc_1v5: LDO_REG6 { 505 | + regulator-name = "vcc_1v5"; 506 | + regulator-always-on; 507 | + regulator-boot-on; 508 | + regulator-min-microvolt = <1500000>; 509 | + regulator-max-microvolt = <1500000>; 510 | + regulator-state-mem { 511 | + regulator-on-in-suspend; 512 | + regulator-suspend-microvolt = <1500000>; 513 | + }; 514 | + }; 515 | + 516 | + vcca1v8_codec: LDO_REG7 { 517 | + regulator-name = "vcca1v8_codec"; 518 | + regulator-always-on; 519 | + regulator-boot-on; 520 | + regulator-min-microvolt = <1800000>; 521 | + regulator-max-microvolt = <1800000>; 522 | + regulator-state-mem { 523 | + regulator-off-in-suspend; 524 | + }; 525 | + }; 526 | + 527 | + vcc_3v0: LDO_REG8 { 528 | + regulator-name = "vcc_3v0"; 529 | + regulator-always-on; 530 | + regulator-boot-on; 531 | + regulator-min-microvolt = <3000000>; 532 | + regulator-max-microvolt = <3000000>; 533 | + regulator-state-mem { 534 | + regulator-on-in-suspend; 535 | + regulator-suspend-microvolt = <3000000>; 536 | + }; 537 | + }; 538 | + 539 | + vcc3v3_s3: vcc_lan: SWITCH_REG1 { 540 | + regulator-name = "vcc3v3_s3"; 541 | + regulator-always-on; 542 | + regulator-boot-on; 543 | + regulator-state-mem { 544 | + regulator-off-in-suspend; 545 | + }; 546 | + }; 547 | + 548 | + vcc3v3_s0: SWITCH_REG2 { 549 | + regulator-name = "vcc3v3_s0"; 550 | + regulator-always-on; 551 | + regulator-boot-on; 552 | + regulator-state-mem { 553 | + regulator-off-in-suspend; 554 | + }; 555 | + }; 556 | + }; 557 | + }; 558 | + 559 | + vdd_cpu_b: regulator@40 { 560 | + compatible = "silergy,syr827"; 561 | + reg = <0x40>; 562 | + fcs,suspend-voltage-selector = <1>; 563 | + pinctrl-names = "default"; 564 | + pinctrl-0 = <&vsel1_gpio>; 565 | + vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 566 | + regulator-compatible = "fan53555-reg"; 567 | + regulator-name = "vdd_cpu_b"; 568 | + regulator-min-microvolt = <712500>; 569 | + regulator-max-microvolt = <1500000>; 570 | + regulator-ramp-delay = <1000>; 571 | + regulator-always-on; 572 | + regulator-boot-on; 573 | + vin-supply = <&vcc3v3_sys>; 574 | + 575 | + regulator-state-mem { 576 | + regulator-off-in-suspend; 577 | + }; 578 | + }; 579 | + 580 | + vdd_gpu: regulator@41 { 581 | + compatible = "silergy,syr828"; 582 | + reg = <0x41>; 583 | + fcs,suspend-voltage-selector = <1>; 584 | + pinctrl-names = "default"; 585 | + pinctrl-0 = <&vsel2_gpio>; 586 | + vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 587 | + regulator-compatible = "fan53555-reg"; 588 | + regulator-name = "vdd_gpu"; 589 | + regulator-min-microvolt = <712500>; 590 | + regulator-max-microvolt = <1500000>; 591 | + regulator-ramp-delay = <1000>; 592 | + regulator-always-on; 593 | + regulator-boot-on; 594 | + vin-supply = <&vcc3v3_sys>; 595 | + 596 | + regulator-state-mem { 597 | + regulator-off-in-suspend; 598 | + }; 599 | + }; 600 | +}; 601 | + 602 | +&i2c1 { 603 | + status = "okay"; 604 | + i2c-scl-rising-time-ns = <300>; 605 | + i2c-scl-falling-time-ns = <15>; 606 | + 607 | + es8388: es8388@11 { 608 | + compatible = "everest,es8388", "everest,es8328"; 609 | + status = "okay"; 610 | + reg = <0x11>; 611 | + pinctrl-names = "default"; 612 | + pinctrl-0 = <&audio_switch>; 613 | + DVDD-supply = <&vcca1v8_codec>; 614 | + AVDD-supply = <&vcca3v0_codec>; 615 | + HPVDD-supply = <&vcca3v0_codec>; 616 | + PVDD-supply = <&vcca1v8_codec>; 617 | + clock-names = "mclk"; 618 | + clocks = <&cru SCLK_I2S_8CH_OUT>; 619 | + #sound-dai-cells = <0>; 620 | + }; 621 | +}; 622 | + 623 | +&i2c2 { 624 | + status = "okay"; 625 | +}; 626 | + 627 | +&i2c3 { 628 | + status = "okay"; 629 | +}; 630 | + 631 | +&i2c5 { 632 | + status = "okay"; 633 | + i2c-scl-rising-time-ns = <300>; 634 | + i2c-scl-falling-time-ns = <15>; 635 | + 636 | + axp22x: pmic@34 { 637 | + interrupt-controller; 638 | + #interrupt-cells = <1>; 639 | + compatible = "x-powers,axp221"; 640 | + reg = <0x34>; 641 | + interrupt-parent = <&gpio3>; 642 | + interrupts = <8 8>; 643 | + irq-gpios = <&gpio3 8 0>; 644 | + 645 | + regulators { 646 | + 647 | + x-powers,dcdc-freq = <3000>; 648 | + 649 | + reg_aldo1: aldo1 { 650 | + regulator-always-on; 651 | + regulator-min-microvolt = <3300000>; 652 | + regulator-max-microvolt = <3300000>; 653 | + regulator-name = "audio-vdd"; 654 | + }; 655 | + 656 | + reg_aldo2: aldo2 { 657 | + regulator-always-on; 658 | + regulator-min-microvolt = <3300000>; 659 | + regulator-max-microvolt = <3300000>; 660 | + regulator-name = "display-vcc"; 661 | + }; 662 | + 663 | + reg_aldo3: aldo3 { 664 | + regulator-always-on; 665 | + regulator-min-microvolt = <1800000>; 666 | + regulator-max-microvolt = <1800000>; 667 | + regulator-name = "wifi-vdd"; 668 | + }; 669 | + 670 | + reg_dldo1: dldo1 { 671 | + regulator-always-on; 672 | + regulator-min-microvolt = <3300000>; 673 | + regulator-max-microvolt = <3300000>; 674 | + regulator-name = "wifi-vcc1"; 675 | + }; 676 | + 677 | + reg_dldo2: dldo2 { 678 | + regulator-always-on; 679 | + regulator-min-microvolt = <3300000>; 680 | + regulator-max-microvolt = <3300000>; 681 | + regulator-name = "dldo2"; 682 | + }; 683 | + 684 | + reg_dldo3: dldo3 { 685 | + regulator-always-on; 686 | + regulator-min-microvolt = <3300000>; 687 | + regulator-max-microvolt = <3300000>; 688 | + regulator-name = "dldo3"; 689 | + }; 690 | + 691 | + reg_dldo4: dldo4 { 692 | + regulator-always-on; 693 | + regulator-min-microvolt = <3300000>; 694 | + regulator-max-microvolt = <3300000>; 695 | + regulator-name = "dldo4"; 696 | + }; 697 | + 698 | + reg_eldo1: eldo1 { 699 | + regulator-always-on; 700 | + regulator-min-microvolt = <3300000>; 701 | + regulator-max-microvolt = <3300000>; 702 | + regulator-name = "wifi-vcc2"; 703 | + }; 704 | + 705 | + reg_eldo2: eldo2 { 706 | + regulator-always-on; 707 | + regulator-min-microvolt = <3300000>; 708 | + regulator-max-microvolt = <3300000>; 709 | + regulator-name = "wifi-vcc3"; 710 | + }; 711 | + 712 | + reg_eldo3: eldo3 { 713 | + regulator-always-on; 714 | + regulator-min-microvolt = <3300000>; 715 | + regulator-max-microvolt = <3300000>; 716 | + regulator-name = "wifi-vcc4"; 717 | + }; 718 | + 719 | + }; 720 | + 721 | + battery_power_supply: battery-power-supply { 722 | + compatible = "x-powers,axp221-battery-power-supply"; 723 | + monitored-battery = <&battery>; 724 | + }; 725 | + 726 | + ac_power_supply: ac_power_supply { 727 | + compatible = "x-powers,axp221-ac-power-supply"; 728 | + }; 729 | + 730 | + }; 731 | +}; 732 | + 733 | +&spi4 { 734 | + status = "okay"; 735 | + pinctrl-names = "default"; 736 | + pinctrl-0 = <&spi4_clk &spi4_tx>; 737 | + 738 | + spidev0: spidev@0 { 739 | + compatible = "rockchip,spidev"; 740 | + reg = <0>; 741 | + spi-max-frequency = <10000000>; 742 | + status = "okay"; 743 | + }; 744 | +}; 745 | + 746 | +/* <4 RK_PA0 &pcfg_pull_none> is used as i2s_8ch_mclk_pin */ 747 | +&i2s0_8ch_bus { 748 | + rockchip,pins = 749 | + <3 RK_PD0 1 &pcfg_pull_none>, 750 | + <3 RK_PD1 1 &pcfg_pull_none>, 751 | + <3 RK_PD2 1 &pcfg_pull_none>, 752 | + <3 RK_PD3 1 &pcfg_pull_none>, 753 | + <3 RK_PD4 1 &pcfg_pull_none>, 754 | + <3 RK_PD5 1 &pcfg_pull_none>, 755 | + <3 RK_PD6 1 &pcfg_pull_none>, 756 | + <3 RK_PD7 1 &pcfg_pull_none>; 757 | +}; 758 | + 759 | +&i2s0 { 760 | + rockchip,i2s-broken-burst-len; 761 | + rockchip,playback-channels = <8>; 762 | + rockchip,capture-channels = <8>; 763 | + pinctrl-0 = <&i2s0_2ch_bus>; 764 | + status = "okay"; 765 | +}; 766 | + 767 | +&i2s1 { 768 | + pinctrl-names = "default"; 769 | + pinctrl-0 = <&i2s_8ch_mclk_pin>, <&i2s1_2ch_bus>; 770 | + rockchip,playback-channels = <2>; 771 | + rockchip,capture-channels = <2>; 772 | + #sound-dai-cells = <0>; 773 | + status = "okay"; 774 | +}; 775 | + 776 | +&i2s2 { 777 | + #sound-dai-cells = <0>; 778 | + status = "okay"; 779 | +}; 780 | + 781 | +&io_domains { 782 | + status = "okay"; 783 | + 784 | + bt656-supply = <&vcc1v8_dvp>; /* bt656_gpio2ab_ms */ 785 | + audio-supply = <&vcca1v8_codec>; /* audio_gpio3d4a_ms */ 786 | + sdmmc-supply = <&vcc_sdio>; /* sdmmc_gpio4b_ms */ 787 | + gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 788 | +}; 789 | + 790 | +&pmu_io_domains { 791 | + status = "okay"; 792 | + pmu1830-supply = <&vcc_3v0>; 793 | +}; 794 | + 795 | +&sdio0 { 796 | + clock-frequency = <50000000>; 797 | + clock-freq-min-max = <200000 50000000>; 798 | + supports-sdio; 799 | + bus-width = <4>; 800 | + disable-wp; 801 | + cap-sd-highspeed; 802 | + cap-sdio-irq; 803 | + keep-power-in-suspend; 804 | + mmc-pwrseq = <&sdio_pwrseq>; 805 | + non-removable; 806 | + num-slots = <1>; 807 | + pinctrl-names = "default"; 808 | + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 809 | + sd-uhs-sdr104; 810 | + status = "okay"; 811 | +}; 812 | + 813 | +&sdmmc { 814 | + bus-width = <4>; 815 | + cap-sd-highspeed; 816 | + cap-mmc-highspeed; 817 | + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 818 | + disable-wp; 819 | + max-frequency = <150000000>; 820 | + pinctrl-names = "default"; 821 | + pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; 822 | +// sd-uhs-sdr104; 823 | + vmmc-supply = <&vcc3v0_sd>; 824 | + vqmmc-supply = <&vcc_sdio>; 825 | + status = "okay"; 826 | +}; 827 | + 828 | +&tsadc { 829 | + /* tshut mode 0:CRU 1:GPIO */ 830 | + rockchip,hw-tshut-mode = <1>; 831 | + /* tshut polarity 0:LOW 1:HIGH */ 832 | + rockchip,hw-tshut-polarity = <1>; 833 | + status = "okay"; 834 | +}; 835 | + 836 | +&tcphy0 { 837 | + status = "okay"; 838 | +}; 839 | + 840 | +&tcphy1 { 841 | + status = "okay"; 842 | +}; 843 | + 844 | +&u2phy0 { 845 | + status = "okay"; 846 | + 847 | + u2phy0_otg: otg-port { 848 | + status = "okay"; 849 | + }; 850 | + 851 | + u2phy0_host: host-port { 852 | + phy-supply = <&usb3_vbus>; 853 | + status = "okay"; 854 | + }; 855 | +}; 856 | + 857 | +&u2phy1 { 858 | + status = "okay"; 859 | + 860 | + u2phy1_otg: otg-port { 861 | + status = "okay"; 862 | + }; 863 | + 864 | + u2phy1_host: host-port { 865 | + phy-supply = <&usb_vbus>; 866 | + status = "okay"; 867 | + }; 868 | +}; 869 | + 870 | +&usbdrd3_0 { 871 | + status = "okay"; 872 | +}; 873 | + 874 | +&usbdrd3_1 { 875 | + status = "okay"; 876 | +}; 877 | + 878 | +&usbdrd_dwc3_0 { 879 | + status = "okay"; 880 | +}; 881 | + 882 | +&usbdrd_dwc3_1 { 883 | + status = "okay"; 884 | + dr_mode = "host"; 885 | +}; 886 | + 887 | +&usb_host0_ehci { 888 | + status = "okay"; 889 | +}; 890 | + 891 | +&usb_host0_ohci { 892 | + status = "okay"; 893 | +}; 894 | + 895 | +&usb_host1_ehci { 896 | + status = "okay"; 897 | +}; 898 | + 899 | +&usb_host1_ohci { 900 | + status = "okay"; 901 | +}; 902 | + 903 | +&pinctrl { 904 | + 905 | + hdmi { 906 | + /delete-node/ hdmi-i2c-xfer; 907 | + }; 908 | + 909 | + i2s1 { 910 | + i2s_8ch_mclk_pin: i2s-8ch-mclk-pin { 911 | + rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; 912 | + }; 913 | + }; 914 | + 915 | + pmic { 916 | + pmic_int_l: pmic-int-l { 917 | + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 918 | + }; 919 | + 920 | + vsel1_gpio: vsel1-gpio { 921 | + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 922 | + }; 923 | + 924 | + vsel2_gpio: vsel2-gpio { 925 | + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 926 | + }; 927 | + }; 928 | + 929 | + sdmmc { 930 | + sdmmc0_det_l: sdmmc0-det-l { 931 | + rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 932 | + }; 933 | + 934 | + sdmmc0_pwr_h: sdmmc0-pwr-h { 935 | + rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 936 | + }; 937 | + }; 938 | + 939 | + sdio-pwrseq { 940 | + wifi_enable_h: wifi-enable-h { 941 | + rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>; 942 | + }; 943 | + }; 944 | + 945 | + wireless-bluetooth { 946 | + uart0_gpios: uart0-gpios { 947 | + rockchip,pins = <2 19 RK_FUNC_GPIO &pcfg_pull_none>; 948 | + }; 949 | + }; 950 | + 951 | + rockchip-key { 952 | + power_key: power-key { 953 | + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; 954 | + }; 955 | + }; 956 | + 957 | + spi1 { 958 | + spi1_gpio: spi1-gpio { 959 | + rockchip,pins = 960 | + <1 7 RK_FUNC_GPIO &pcfg_output_low>, 961 | + <1 8 RK_FUNC_GPIO &pcfg_output_low>, 962 | + <1 9 RK_FUNC_GPIO &pcfg_output_low>, 963 | + <1 10 RK_FUNC_GPIO &pcfg_output_low>; 964 | + }; 965 | + }; 966 | + 967 | + bt { 968 | + bt_host_wake: bt-host-wake { 969 | + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 970 | + }; 971 | + 972 | + bt_reset: bt-reset { 973 | + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 974 | + }; 975 | + 976 | + bt_wake: bt-wake { 977 | + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 978 | + }; 979 | + }; 980 | + 981 | + panel { 982 | + panel_reset: panel-reset { 983 | + rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_output_low>; 984 | + }; 985 | + }; 986 | + 987 | + backlight { 988 | + backlight_control: backlight-control { 989 | + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_output_low>; 990 | + }; 991 | + }; 992 | + 993 | + audio { 994 | + audio_switch: audio-switch { 995 | + rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_output_high>; 996 | + }; 997 | + 998 | + hp_det: hp-det { 999 | + rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 1000 | + }; 1001 | + 1002 | + pa_en: pa-en { 1003 | + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1004 | + }; 1005 | + }; 1006 | +}; 1007 | + 1008 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0001-net-smsc95xx-Allow-mac-address-to-be-set-as-a-parame.patch: -------------------------------------------------------------------------------- 1 | From 28566a4f48ae06702e0c7145ed583484a26b9712 Mon Sep 17 00:00:00 2001 2 | From: Dan Johansen 3 | Date: Mon, 26 Oct 2020 08:01:01 +0100 4 | Subject: [PATCH] net/smsc95xx: Allow mac address to be set as a parameter 5 | 6 | --- 7 | drivers/net/usb/smsc95xx.c | 57 ++++++++++++++++++++++++++++++++++++++ 8 | 1 file changed, 57 insertions(+) 9 | 10 | diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c 11 | index ea0d5f04dc3a..3ded903589be 100644 12 | --- a/drivers/net/usb/smsc95xx.c 13 | +++ b/drivers/net/usb/smsc95xx.c 14 | @@ -50,6 +50,7 @@ 15 | #define SUSPEND_SUSPEND3 (0x08) 16 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ 17 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) 18 | +#define MAC_ADDR_LEN (6) 19 | 20 | struct smsc95xx_priv { 21 | u32 mac_cr; 22 | @@ -67,6 +68,10 @@ static bool turbo_mode = true; 23 | module_param(turbo_mode, bool, 0644); 24 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 25 | 26 | +static char *macaddr = ":"; 27 | +module_param(macaddr, charp, 0); 28 | +MODULE_PARM_DESC(macaddr, "MAC address"); 29 | + 30 | static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, 31 | u32 *data, int in_pm) 32 | { 33 | @@ -753,8 +758,59 @@ static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 34 | return phy_mii_ioctl(netdev->phydev, rq, cmd); 35 | } 36 | 37 | +/* Check the macaddr module parameter for a MAC address */ 38 | +static int smsc95xx_is_macaddr_param(struct usbnet *dev, u8 *dev_mac) 39 | +{ 40 | + int i, j, got_num, num; 41 | + u8 mtbl[MAC_ADDR_LEN]; 42 | + 43 | + if (macaddr[0] == ':') 44 | + return 0; 45 | + 46 | + i = 0; 47 | + j = 0; 48 | + num = 0; 49 | + got_num = 0; 50 | + while (j < MAC_ADDR_LEN) { 51 | + if (macaddr[i] && macaddr[i] != ':') { 52 | + got_num++; 53 | + if ('0' <= macaddr[i] && macaddr[i] <= '9') 54 | + num = num * 16 + macaddr[i] - '0'; 55 | + else if ('A' <= macaddr[i] && macaddr[i] <= 'F') 56 | + num = num * 16 + 10 + macaddr[i] - 'A'; 57 | + else if ('a' <= macaddr[i] && macaddr[i] <= 'f') 58 | + num = num * 16 + 10 + macaddr[i] - 'a'; 59 | + else 60 | + break; 61 | + i++; 62 | + } else if (got_num == 2) { 63 | + mtbl[j++] = (u8) num; 64 | + num = 0; 65 | + got_num = 0; 66 | + i++; 67 | + } else { 68 | + break; 69 | + } 70 | + } 71 | + 72 | + if (j == MAC_ADDR_LEN) { 73 | + netif_dbg(dev, ifup, dev->net, "Overriding MAC address with: " 74 | + "%02x:%02x:%02x:%02x:%02x:%02x\n", mtbl[0], mtbl[1], mtbl[2], 75 | + mtbl[3], mtbl[4], mtbl[5]); 76 | + for (i = 0; i < MAC_ADDR_LEN; i++) 77 | + dev_mac[i] = mtbl[i]; 78 | + return 1; 79 | + } else { 80 | + return 0; 81 | + } 82 | +} 83 | + 84 | static void smsc95xx_init_mac_address(struct usbnet *dev) 85 | { 86 | + /* Check module parameters */ 87 | + if (smsc95xx_is_macaddr_param(dev, dev->net->dev_addr)) 88 | + return; 89 | + 90 | /* maybe the boot loader passed the MAC address in devicetree */ 91 | if (!eth_platform_get_mac_address(&dev->udev->dev, 92 | dev->net->dev_addr)) { 93 | @@ -780,6 +836,7 @@ static void smsc95xx_init_mac_address(struct usbnet *dev) 94 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); 95 | } 96 | 97 | + 98 | static int smsc95xx_set_mac_address(struct usbnet *dev) 99 | { 100 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 101 | -- 102 | 2.28.0 103 | 104 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0002-mfd-axp20x-add-clockworkpi-a06-power-support.patch: -------------------------------------------------------------------------------- 1 | diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c 2 | index aa59496e4..45b09ce38 100644 3 | --- a/drivers/mfd/axp20x.c 4 | +++ b/drivers/mfd/axp20x.c 5 | @@ -976,6 +976,7 @@ int axp20x_device_probe(struct axp20x_dev *axp20x) 6 | return ret; 7 | } 8 | 9 | + pm_power_off = 0; 10 | if (!pm_power_off) { 11 | axp20x_pm_power_off = axp20x; 12 | pm_power_off = axp20x_power_off; 13 | diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c 14 | index d90c45cd5..c2707fd00 100644 15 | --- a/drivers/mfd/rk808.c 16 | +++ b/drivers/mfd/rk808.c 17 | @@ -475,6 +475,12 @@ static void rk808_pm_power_off(void) 18 | dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n"); 19 | } 20 | 21 | +static void rk808_pm_power_off_prepare(void) 22 | +{ 23 | + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); 24 | + regmap_update_bits(rk808->regmap, RK808_LDO_EN_REG, 0x08, 0x00); 25 | +} 26 | + 27 | static void rk8xx_shutdown(struct i2c_client *client) 28 | { 29 | struct rk808 *rk808 = i2c_get_clientdata(client); 30 | @@ -641,9 +647,10 @@ static int rk808_probe(struct i2c_client *client, 31 | } 32 | 33 | if (of_property_read_bool(np, "rockchip,system-power-controller")) { 34 | - rk808_i2c_client = client; 35 | pm_power_off = rk808_pm_power_off; 36 | } 37 | + rk808_i2c_client = client; 38 | + pm_power_off_prepare = rk808_pm_power_off_prepare; 39 | 40 | return 0; 41 | 42 | diff --git a/drivers/power/supply/axp20x_ac_power.c b/drivers/power/supply/axp20x_ac_power.c 43 | index ac360016b..c11024f3c 100644 44 | --- a/drivers/power/supply/axp20x_ac_power.c 45 | +++ b/drivers/power/supply/axp20x_ac_power.c 46 | @@ -53,6 +53,9 @@ static irqreturn_t axp20x_ac_power_irq(int irq, void *devid) 47 | { 48 | struct axp20x_ac_power *power = devid; 49 | 50 | + regmap_update_bits(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x00); 51 | + regmap_update_bits(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x03); 52 | + 53 | power_supply_changed(power->supply); 54 | 55 | return IRQ_HANDLED; 56 | diff --git a/drivers/power/supply/axp20x_battery.c b/drivers/power/supply/axp20x_battery.c 57 | index e84b6e4da..b62c361e2 100644 58 | --- a/drivers/power/supply/axp20x_battery.c 59 | +++ b/drivers/power/supply/axp20x_battery.c 60 | @@ -326,6 +326,42 @@ static int axp20x_battery_get_prop(struct power_supply *psy, 61 | val->intval *= 1000; 62 | break; 63 | 64 | + case POWER_SUPPLY_PROP_ENERGY_FULL: 65 | + case POWER_SUPPLY_PROP_ENERGY_NOW: 66 | + /* When no battery is present, return 0 */ 67 | + ret = regmap_read(axp20x_batt->regmap, AXP20X_PWR_OP_MODE, 68 | + ®); 69 | + if (ret) 70 | + return ret; 71 | + 72 | + if (!(reg & AXP20X_PWR_OP_BATT_PRESENT)) { 73 | + val->intval = 0; 74 | + return 0; 75 | + } 76 | + 77 | + if(psp == POWER_SUPPLY_PROP_ENERGY_FULL) { 78 | + val->intval = 8000000; 79 | + return 0; 80 | + } 81 | + 82 | + ret = regmap_read(axp20x_batt->regmap, AXP20X_FG_RES, ®); 83 | + if (ret) 84 | + return ret; 85 | + 86 | + if (axp20x_batt->data->has_fg_valid && !(reg & AXP22X_FG_VALID)) 87 | + return -EINVAL; 88 | + 89 | + val1 = reg & AXP209_FG_PERCENT; 90 | + if (val1 > 90) 91 | + val1= 80; 92 | + else if (val1 < 10) 93 | + val1 = 0; 94 | + else 95 | + val1 -= 10; 96 | + 97 | + val->intval = val1 * 100000; 98 | + break; 99 | + 100 | default: 101 | return -EINVAL; 102 | } 103 | @@ -486,6 +522,8 @@ static enum power_supply_property axp20x_battery_props[] = { 104 | POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, 105 | POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, 106 | POWER_SUPPLY_PROP_CAPACITY, 107 | + POWER_SUPPLY_PROP_ENERGY_FULL, 108 | + POWER_SUPPLY_PROP_ENERGY_NOW, 109 | }; 110 | 111 | static int axp20x_battery_prop_writeable(struct power_supply *psy, 112 | @@ -630,6 +668,12 @@ static int axp20x_power_probe(struct platform_device *pdev) 113 | axp20x_get_constant_charge_current(axp20x_batt, 114 | &axp20x_batt->max_ccc); 115 | 116 | + regmap_update_bits(axp20x_batt->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x03); 117 | + regmap_update_bits(axp20x_batt->regmap, AXP20X_OFF_CTRL, 0x08, 0x08); 118 | + regmap_update_bits(axp20x_batt->regmap, AXP20X_CHRG_CTRL2, 0x30, 0x20); 119 | + regmap_update_bits(axp20x_batt->regmap, AXP20X_PEK_KEY, 0x0f, 0x0b); 120 | + regmap_update_bits(axp20x_batt->regmap, AXP20X_GPIO0_CTRL, 0x07, 0x00); 121 | + 122 | return 0; 123 | } 124 | 125 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0004-gpu-drm-panel-add-cwd686-driver.patch: -------------------------------------------------------------------------------- 1 | diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig 2 | index b9dbedf8f..9a18418d8 100644 3 | --- a/drivers/gpu/drm/panel/Kconfig 4 | +++ b/drivers/gpu/drm/panel/Kconfig 5 | @@ -499,4 +499,17 @@ config DRM_PANEL_XINPENG_XPP055C272 6 | Say Y here if you want to enable support for the Xinpeng 7 | XPP055C272 controller for 720x1280 LCD panels with MIPI/RGB/SPI 8 | system interfaces. 9 | + 10 | +config DRM_PANEL_CWD686 11 | + tristate "CWD686 panel" 12 | + depends on OF 13 | + depends on DRM_MIPI_DSI 14 | + depends on BACKLIGHT_CLASS_DEVICE 15 | + help 16 | + Say Y here if you want to enable support for CWD686 panel. 17 | + The panel has a 480x1280 resolution and uses 24 bit RGB per pixel. 18 | + 19 | + To compile this driver as a module, choose M here: the module 20 | + will be called panel-cwd686. 21 | + 22 | endmenu 23 | diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile 24 | index 2ba560bca..80d40a803 100644 25 | --- a/drivers/gpu/drm/panel/Makefile 26 | +++ b/drivers/gpu/drm/panel/Makefile 27 | @@ -53,3 +53,5 @@ obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o 28 | obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o 29 | obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o 30 | obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o 31 | +obj-$(CONFIG_DRM_PANEL_CWD686) += panel-cwd686.o 32 | + 33 | diff --git a/drivers/gpu/drm/panel/panel-cwd686.c b/drivers/gpu/drm/panel/panel-cwd686.c 34 | new file mode 100644 35 | index 000000000..6a0eabf92 36 | --- /dev/null 37 | +++ b/drivers/gpu/drm/panel/panel-cwd686.c 38 | @@ -0,0 +1,301 @@ 39 | +/* 40 | + * SPDX-License-Identifier: GPL-2.0+ 41 | + * Copyright (c) 2021 Clockwork Tech LLC 42 | + * Copyright (c) 2021 Max Fierke 43 | + * 44 | + */ 45 | + 46 | +#include 47 | +#include 48 | +#include 49 | +#include 50 | +#include 51 | +#include 52 | +#include 53 | +#include 54 | +#include 55 | + 56 | +struct cwd686 { 57 | + struct device *dev; 58 | + struct drm_panel panel; 59 | + struct regulator *supply; 60 | + struct gpio_desc *enable_gpio; 61 | + struct gpio_desc *reset_gpio; 62 | + struct backlight_device *backlight; 63 | + bool prepared; 64 | + bool enabled; 65 | + enum drm_panel_orientation orientation; 66 | +}; 67 | + 68 | +static const struct drm_display_mode default_mode = { 69 | + .clock = 54465, 70 | + .hdisplay = 480, 71 | + .hsync_start = 480 + 150, 72 | + .hsync_end = 480 + 150 + 24, 73 | + .htotal = 480 + 150 + 24 + 40, 74 | + .vdisplay = 1280, 75 | + .vsync_start = 1280 + 12, 76 | + .vsync_end = 1280 + 12 + 6, 77 | + .vtotal = 1280 + 12 + 6 + 10, 78 | +}; 79 | + 80 | +static inline struct cwd686 *panel_to_cwd686(struct drm_panel *panel) 81 | +{ 82 | + return container_of(panel, struct cwd686, panel); 83 | +} 84 | + 85 | +#define dcs_write_seq(seq...) \ 86 | +({ \ 87 | + static const u8 d[] = { seq }; \ 88 | + mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ 89 | +}) 90 | + 91 | +static void cwd686_init_sequence(struct cwd686 *ctx) 92 | +{ 93 | + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); 94 | + 95 | + dcs_write_seq(0xF0,0x5A,0x5A); // Password1 (Enable Level 2 registers) 96 | + dcs_write_seq(0xF1,0xA5,0xA5); // Password2 (Enable Level 2 registers) 97 | + dcs_write_seq(0xB6,0x0D,0x0D); // PWRCON_VCOM (-0.495V ?, -0.495V ?) 98 | + dcs_write_seq(0xB4,0x0A,0x08,0x12,0x10,0x0E,0x0C,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x06); // CGOUTR (set ASG Output signals) 99 | + dcs_write_seq(0xB3,0x0B,0x09,0x13,0x11,0x0F,0x0D,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x05,0x07); // CGOUTL (set ASG Output signals) 100 | + dcs_write_seq(0xB0,0x54,0x32,0x23,0x45,0x44,0x44,0x44,0x44,0x90,0x01,0x90,0x01); // ??? 101 | + dcs_write_seq(0xB1,0x32,0x84,0x02,0x83,0x30,0x01,0x6B,0x01); // ??? 102 | + dcs_write_seq(0xB2,0x73); // ??? 103 | + dcs_write_seq(0xBD,0x4E,0x0E,0x50,0x50,0x26,0x1D,0x00,0x14,0x42,0x03); // PWRCON_REG 104 | + dcs_write_seq(0xB7,0x01,0x01,0x09,0x11,0x0D,0x55,0x19,0x19,0x21,0x1D,0x00,0x00,0x00,0x00,0x02,0xFF,0x3C); // PWRCON_SEQ 105 | + dcs_write_seq(0xB8,0x23,0x01,0x30,0x34,0x63); // PWRCON_CLK 106 | + dcs_write_seq(0xB9,0xA0,0x22,0x00,0x44); // PWRCON_BAT (Disable abnormal power-off?) 107 | + dcs_write_seq(0xBA,0x12,0x63); // PWRCON_MODE 108 | + dcs_write_seq(0xC1,0x0C,0x16,0x04,0x0C,0x10,0x04); // TCON (Set VBP, VFP, VSW, HBP, HFP, HSW) 109 | + dcs_write_seq(0xC2,0x11,0x41); // TCON2 (Set resolution) 110 | + dcs_write_seq(0xC3,0x22,0x31,0x04); // TCON3 (Set frame blanking) 111 | + dcs_write_seq(0xC7,0x05,0x23,0x6B,0x49,0x00); // SRCCON 112 | + dcs_write_seq(0xC5,0x00); // ??? 113 | + dcs_write_seq(0xD0,0x37,0xFF,0xFF); // ABNO_CTR (Set MIPI abnormal state) 114 | + dcs_write_seq(0xD2,0x63,0x0B,0x08,0x88); // ??? 115 | + dcs_write_seq(0xD3,0x01,0x00,0x00,0x01,0x01,0x37,0x25,0x38,0x31,0x06,0x07); // ??? 116 | + dcs_write_seq(0xC8,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06); // GAMMA2.2 117 | + dcs_write_seq(0xC6,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,0x00); // SRC_TIM (Set source timing) 118 | + dcs_write_seq(0xF4,0x08,0x77); // ??? 119 | + dcs_write_seq(0x36,0x14); // MADCTL (Set display direction) 120 | + dcs_write_seq(0x35,0x00); // TEON (Disable tearing effect ?) 121 | + dcs_write_seq(0xF1,0x5A,0x5A); // Password1 (Enable Level 2 registers), again for some reason ?? 122 | + dcs_write_seq(0xF0,0xA5,0xA5); // Password2 (Enable Level 2 registers), again for some reason ?? 123 | +} 124 | + 125 | +static int cwd686_disable(struct drm_panel *panel) 126 | +{ 127 | + struct cwd686 *ctx = panel_to_cwd686(panel); 128 | + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); 129 | + int ret; 130 | + 131 | + if (!ctx->enabled) 132 | + return 0; 133 | + 134 | + backlight_disable(ctx->backlight); 135 | + 136 | + ctx->enabled = false; 137 | + 138 | + return 0; 139 | +} 140 | + 141 | +static int cwd686_unprepare(struct drm_panel *panel) 142 | +{ 143 | + struct cwd686 *ctx = panel_to_cwd686(panel); 144 | + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); 145 | + int ret; 146 | + 147 | + if (!ctx->prepared) 148 | + return 0; 149 | + 150 | + ret = mipi_dsi_dcs_set_display_off(dsi); 151 | + if (ret) { 152 | + dev_err(ctx->dev, "failed to turn display off (%d)\n", ret); 153 | + return ret; 154 | + } 155 | + 156 | + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); 157 | + if (ret) { 158 | + dev_err(ctx->dev, "failed to enter sleep mode (%d)\n", ret); 159 | + return ret; 160 | + } 161 | + msleep(120); 162 | + 163 | + gpiod_set_value_cansleep(ctx->reset_gpio, 0); 164 | + msleep(5); 165 | + 166 | + ctx->prepared = false; 167 | + 168 | + return 0; 169 | +} 170 | + 171 | +static int cwd686_prepare(struct drm_panel *panel) 172 | +{ 173 | + struct cwd686 *ctx = panel_to_cwd686(panel); 174 | + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); 175 | + int ret; 176 | + 177 | + if (ctx->prepared) 178 | + return 0; 179 | + 180 | + gpiod_set_value_cansleep(ctx->reset_gpio, 0); 181 | + msleep(10); 182 | + gpiod_set_value_cansleep(ctx->reset_gpio, 1); 183 | + msleep(120); 184 | + 185 | + /* Enabe tearing mode: send TE (tearing effect) at VBLANK */ 186 | + ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); 187 | + if (ret) { 188 | + dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", ret); 189 | + return ret; 190 | + } 191 | + /* Exit sleep mode and power on */ 192 | + 193 | + cwd686_init_sequence(ctx); 194 | + 195 | + ret = mipi_dsi_dcs_exit_sleep_mode(dsi); 196 | + if (ret) { 197 | + dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", ret); 198 | + return ret; 199 | + } 200 | + msleep(120); 201 | + 202 | + ret = mipi_dsi_dcs_set_display_on(dsi); 203 | + if (ret) { 204 | + dev_err(ctx->dev, "failed to turn display on (%d)\n", ret); 205 | + return ret; 206 | + } 207 | + msleep(20); 208 | + 209 | + ctx->prepared = true; 210 | + 211 | + return 0; 212 | +} 213 | + 214 | +static int cwd686_enable(struct drm_panel *panel) 215 | +{ 216 | + struct cwd686 *ctx = panel_to_cwd686(panel); 217 | + struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); 218 | + int ret; 219 | + 220 | + if (ctx->enabled) 221 | + return 0; 222 | + 223 | + backlight_enable(ctx->backlight); 224 | + 225 | + ctx->enabled = true; 226 | + 227 | + return 0; 228 | +} 229 | + 230 | +static int cwd686_get_modes(struct drm_panel *panel, struct drm_connector *connector) 231 | +{ 232 | + struct cwd686 *ctx = panel_to_cwd686(panel); 233 | + struct drm_display_mode *mode; 234 | + 235 | + mode = drm_mode_duplicate(connector->dev, &default_mode); 236 | + if (!mode) { 237 | + dev_err(panel->dev, "bad mode or failed to add mode\n"); 238 | + return -EINVAL; 239 | + } 240 | + drm_mode_set_name(mode); 241 | + mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 242 | + 243 | + connector->display_info.width_mm = mode->width_mm; 244 | + connector->display_info.height_mm = mode->height_mm; 245 | + 246 | + /* set up connector's "panel orientation" property */ 247 | + drm_connector_set_panel_orientation(connector, ctx->orientation); 248 | + 249 | + drm_mode_probed_add(connector, mode); 250 | + 251 | + return 1; /* Number of modes */ 252 | +} 253 | + 254 | +static const struct drm_panel_funcs cwd686_drm_funcs = { 255 | + .disable = cwd686_disable, 256 | + .unprepare = cwd686_unprepare, 257 | + .prepare = cwd686_prepare, 258 | + .enable = cwd686_enable, 259 | + .get_modes = cwd686_get_modes, 260 | +}; 261 | + 262 | +static int cwd686_probe(struct mipi_dsi_device *dsi) 263 | +{ 264 | + struct device *dev = &dsi->dev; 265 | + struct cwd686 *ctx; 266 | + int ret; 267 | + 268 | + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); 269 | + if (!ctx) 270 | + return -ENOMEM; 271 | + 272 | + mipi_dsi_set_drvdata(dsi, ctx); 273 | + ctx->dev = dev; 274 | + 275 | + dsi->lanes = 4; 276 | + dsi->format = MIPI_DSI_FMT_RGB888; 277 | + dsi->mode_flags = MIPI_DSI_MODE_VIDEO |MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE; 278 | + 279 | + ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); 280 | + if (IS_ERR(ctx->reset_gpio)) { 281 | + ret = PTR_ERR(ctx->reset_gpio); 282 | + if (ret != -EPROBE_DEFER) 283 | + dev_err(dev, "failed to request GPIO (%d)\n", ret); 284 | + return ret; 285 | + } 286 | + 287 | + ctx->backlight = devm_of_find_backlight(dev); 288 | + if (IS_ERR(ctx->backlight)) { 289 | + return PTR_ERR(ctx->backlight); 290 | + } 291 | + 292 | + ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation); 293 | + if (ret) { 294 | + dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret); 295 | + return ret; 296 | + } 297 | + 298 | + drm_panel_init(&ctx->panel, dev, &cwd686_drm_funcs, DRM_MODE_CONNECTOR_DSI); 299 | + 300 | + drm_panel_add(&ctx->panel); 301 | + 302 | + ret = mipi_dsi_attach(dsi); 303 | + if (ret < 0) { 304 | + dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret); 305 | + drm_panel_remove(&ctx->panel); 306 | + return ret; 307 | + } 308 | + 309 | + return 0; 310 | +} 311 | + 312 | +static int cwd686_remove(struct mipi_dsi_device *dsi) 313 | +{ 314 | + struct cwd686 *ctx = mipi_dsi_get_drvdata(dsi); 315 | + 316 | + mipi_dsi_detach(dsi); 317 | + drm_panel_remove(&ctx->panel); 318 | + 319 | + return 0; 320 | +} 321 | + 322 | +static const struct of_device_id cwd686_of_match[] = { 323 | + { .compatible = "cw,cwd686" }, 324 | + { } 325 | +}; 326 | +MODULE_DEVICE_TABLE(of, cwd686_of_match); 327 | + 328 | +static struct mipi_dsi_driver cwd686_driver = { 329 | + .probe = cwd686_probe, 330 | + .remove = cwd686_remove, 331 | + .driver = { 332 | + .name = "panel-cwd686", 333 | + .of_match_table = cwd686_of_match, 334 | + }, 335 | +}; 336 | +module_mipi_dsi_driver(cwd686_driver); 337 | + 338 | +MODULE_DESCRIPTION("DRM Driver for cwd686 MIPI DSI panel"); 339 | +MODULE_LICENSE("GPL v2"); 340 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0005-video-backlight-add-ocp8178-driver.patch: -------------------------------------------------------------------------------- 1 | diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig 2 | index d83c87b90..2f1b6105e 100644 3 | --- a/drivers/video/backlight/Kconfig 4 | +++ b/drivers/video/backlight/Kconfig 5 | @@ -456,6 +456,12 @@ config BACKLIGHT_LED 6 | If you have a LCD backlight adjustable by LED class driver, say Y 7 | to enable this driver. 8 | 9 | +config BACKLIGHT_OCP8178 10 | + tristate "OCP8178 Backlight Driver" 11 | + depends on GPIOLIB 12 | + help 13 | + If you have an OCP8178, say Y to enable the backlight driver. 14 | + 15 | endif # BACKLIGHT_CLASS_DEVICE 16 | 17 | endmenu 18 | diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile 19 | index 685f3f1ca..f1160d626 100644 20 | --- a/drivers/video/backlight/Makefile 21 | +++ b/drivers/video/backlight/Makefile 22 | @@ -57,3 +57,4 @@ obj-$(CONFIG_BACKLIGHT_WM831X) += wm831x_bl.o 23 | obj-$(CONFIG_BACKLIGHT_ARCXCNN) += arcxcnn_bl.o 24 | obj-$(CONFIG_BACKLIGHT_RAVE_SP) += rave-sp-backlight.o 25 | obj-$(CONFIG_BACKLIGHT_LED) += led_bl.o 26 | +obj-$(CONFIG_BACKLIGHT_OCP8178) += ocp8178_bl.o 27 | diff --git a/drivers/video/backlight/ocp8178_bl.c b/drivers/video/backlight/ocp8178_bl.c 28 | new file mode 100644 29 | index 000000000..db8db1771 30 | --- /dev/null 31 | +++ b/drivers/video/backlight/ocp8178_bl.c 32 | @@ -0,0 +1,277 @@ 33 | +/* 34 | + * ocp8178_bl.c - ocp8178 backlight driver 35 | + * 36 | + * This program is free software; you can redistribute it and/or modify 37 | + * it under the terms of the GNU General Public License version 2 as 38 | + * published by the Free Software Foundation. 39 | + */ 40 | + 41 | +#include 42 | +#include 43 | +#include 44 | +#include /* Only for legacy support */ 45 | +#include 46 | +#include 47 | +#include 48 | +#include 49 | +#include 50 | +#include 51 | +#include 52 | +#include 53 | +#include 54 | +#include 55 | +#include 56 | +#include 57 | +#include 58 | +#include 59 | +#include 60 | +#include 61 | +#include 62 | +#include 63 | +#include 64 | + 65 | +struct ocp8178_backlight { 66 | + struct device *dev; 67 | + struct device *fbdev; 68 | + 69 | + struct gpio_desc *gpiod; 70 | + int def_value; 71 | + int current_value; 72 | +}; 73 | + 74 | +#define DETECT_DELAY 200 75 | +#define DETECT_TIME 500 76 | +#define DETECT_WINDOW_TIME 1000 77 | +#define START_TIME 10 78 | +#define END_TIME 10 79 | +#define SHUTDOWN_TIME 3000 80 | +#define LOW_BIT_HIGH_TIME 10 81 | +#define LOW_BIT_LOW_TIME 50 82 | +#define HIGH_BIT_HIGH_TIME 50 83 | +#define HIGH_BIT_LOW_TIME 10 84 | +#define MAX_BRIGHTNESS_VALUE 9 85 | + 86 | +static void entry_1wire_mode(struct ocp8178_backlight *gbl) 87 | +{ 88 | + unsigned long flags = 0; 89 | + local_irq_save(flags); 90 | + gpiod_set_value(gbl->gpiod, 0); 91 | + mdelay(SHUTDOWN_TIME/1000); 92 | + gpiod_set_value(gbl->gpiod, 1); 93 | + udelay(DETECT_DELAY); 94 | + gpiod_set_value(gbl->gpiod, 0); 95 | + udelay(DETECT_TIME); 96 | + gpiod_set_value(gbl->gpiod, 1); 97 | + udelay(DETECT_WINDOW_TIME); 98 | + local_irq_restore(flags); 99 | +} 100 | + 101 | +static inline void write_bit(struct ocp8178_backlight *gbl, int bit) 102 | +{ 103 | + if (bit) { 104 | + gpiod_set_value(gbl->gpiod, 0); 105 | + udelay(HIGH_BIT_LOW_TIME); 106 | + gpiod_set_value(gbl->gpiod, 1); 107 | + udelay(HIGH_BIT_HIGH_TIME); 108 | + } else { 109 | + gpiod_set_value(gbl->gpiod, 0); 110 | + udelay(LOW_BIT_LOW_TIME); 111 | + gpiod_set_value(gbl->gpiod, 1); 112 | + udelay(LOW_BIT_HIGH_TIME); 113 | + } 114 | +} 115 | + 116 | +static void write_byte(struct ocp8178_backlight *gbl, int byte) 117 | +{ 118 | + unsigned long flags = 0; 119 | + unsigned char data = 0x72; 120 | + int i; 121 | + 122 | + local_irq_save(flags); 123 | + 124 | + gpiod_set_value(gbl->gpiod, 1); 125 | + udelay(START_TIME); 126 | + for(i = 0; i < 8; i++) { 127 | + if(data & 0x80) { 128 | + write_bit(gbl, 1); 129 | + } else { 130 | + write_bit(gbl, 0); 131 | + } 132 | + data <<= 1; 133 | + } 134 | + gpiod_set_value(gbl->gpiod, 0); 135 | + udelay(END_TIME); 136 | + 137 | + data = byte & 0x1f; 138 | + 139 | + gpiod_set_value(gbl->gpiod, 1); 140 | + udelay(START_TIME); 141 | + for(i = 0; i < 8; i++) { 142 | + if(data & 0x80) { 143 | + write_bit(gbl, 1); 144 | + } else { 145 | + write_bit(gbl, 0); 146 | + } 147 | + data <<= 1; 148 | + } 149 | + gpiod_set_value(gbl->gpiod, 0); 150 | + udelay(END_TIME); 151 | + gpiod_set_value(gbl->gpiod, 1); 152 | + 153 | + local_irq_restore(flags); 154 | +} 155 | + 156 | +unsigned char ocp8178_bl_table[MAX_BRIGHTNESS_VALUE+1] = {0, 1, 4, 8, 12, 16, 20, 24, 28, 31}; 157 | + 158 | +static int ocp8178_update_status(struct backlight_device *bl) 159 | +{ 160 | + struct ocp8178_backlight *gbl = bl_get_data(bl); 161 | + int brightness = bl->props.brightness, i; 162 | + 163 | + if (bl->props.power != FB_BLANK_UNBLANK || 164 | + bl->props.fb_blank != FB_BLANK_UNBLANK || 165 | + bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK)) 166 | + brightness = 0; 167 | + 168 | + if(brightness > MAX_BRIGHTNESS_VALUE) 169 | + brightness = MAX_BRIGHTNESS_VALUE; 170 | + 171 | + for(i = 0; i < 2; i++) { 172 | + entry_1wire_mode(gbl); 173 | + write_byte(gbl, ocp8178_bl_table[brightness]); 174 | + } 175 | + gbl->current_value = brightness; 176 | + 177 | + return 0; 178 | +} 179 | + 180 | +static int ocp8178_get_brightness(struct backlight_device *bl) 181 | +{ 182 | + struct ocp8178_backlight *gbl = bl_get_data(bl); 183 | + return gbl->current_value; 184 | +} 185 | + 186 | +static int ocp8178_check_fb(struct backlight_device *bl, 187 | + struct fb_info *info) 188 | +{ 189 | + struct ocp8178_backlight *gbl = bl_get_data(bl); 190 | + return gbl->fbdev == NULL || gbl->fbdev == info->dev; 191 | +} 192 | + 193 | +static const struct backlight_ops ocp8178_backlight_ops = { 194 | + .options = BL_CORE_SUSPENDRESUME, 195 | + .update_status = ocp8178_update_status, 196 | + .get_brightness = ocp8178_get_brightness, 197 | + .check_fb = ocp8178_check_fb, 198 | +}; 199 | + 200 | +static int ocp8178_probe_dt(struct platform_device *pdev, 201 | + struct ocp8178_backlight *gbl) 202 | +{ 203 | + struct device *dev = &pdev->dev; 204 | + struct device_node *np = dev->of_node; 205 | + enum gpiod_flags flags; 206 | + int ret = 0; 207 | + u32 value32; 208 | + 209 | + of_property_read_u32(np, "default-brightness", &value32); 210 | + if(value32 > MAX_BRIGHTNESS_VALUE) 211 | + gbl->def_value = MAX_BRIGHTNESS_VALUE; 212 | + else 213 | + gbl->def_value = value32; 214 | + flags = gbl->def_value ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; 215 | + 216 | + gbl->gpiod = devm_gpiod_get(dev, "backlight-control", flags); 217 | + if (IS_ERR(gbl->gpiod)) { 218 | + ret = PTR_ERR(gbl->gpiod); 219 | + 220 | + if (ret != -EPROBE_DEFER) { 221 | + dev_err(dev, 222 | + "Error: The gpios parameter is missing or invalid.\n"); 223 | + } 224 | + } 225 | + 226 | + return ret; 227 | +} 228 | + 229 | +static struct backlight_device *backlight; 230 | + 231 | +static int ocp8178_probe(struct platform_device *pdev) 232 | +{ 233 | + struct backlight_properties props; 234 | + struct backlight_device *bl; 235 | + struct ocp8178_backlight *gbl; 236 | + struct device_node *np = pdev->dev.of_node; 237 | + int ret; 238 | + 239 | + if ( !np) { 240 | + dev_err(&pdev->dev, 241 | + "failed to find platform data or device tree node.\n"); 242 | + return -ENODEV; 243 | + } 244 | + 245 | + gbl = devm_kzalloc(&pdev->dev, sizeof(*gbl), GFP_KERNEL); 246 | + if (gbl == NULL) 247 | + return -ENOMEM; 248 | + 249 | + gbl->dev = &pdev->dev; 250 | + 251 | + ret = ocp8178_probe_dt(pdev, gbl); 252 | + if (ret) 253 | + return ret; 254 | + 255 | + gbl->current_value = gbl->def_value; 256 | + 257 | + memset(&props, 0, sizeof(props)); 258 | + props.type = BACKLIGHT_RAW; 259 | + props.max_brightness = MAX_BRIGHTNESS_VALUE; 260 | + bl = devm_backlight_device_register(&pdev->dev, dev_name(&pdev->dev), 261 | + &pdev->dev, gbl, &ocp8178_backlight_ops, 262 | + &props); 263 | + if (IS_ERR(bl)) { 264 | + dev_err(&pdev->dev, "failed to register backlight\n"); 265 | + return PTR_ERR(bl); 266 | + } 267 | + 268 | +// entry_1wire_mode(gbl); 269 | + 270 | + bl->props.brightness = gbl->def_value; 271 | + backlight_update_status(bl); 272 | + 273 | + platform_set_drvdata(pdev, bl); 274 | + 275 | + backlight = bl; 276 | + return 0; 277 | +} 278 | + 279 | +static int ocp8178_suspend(struct platform_device *pdev, pm_message_t state) 280 | +{ 281 | + return 0; 282 | +} 283 | + 284 | +static int ocp8178_resume(struct platform_device *pdev) 285 | +{ 286 | + return 0; 287 | +} 288 | + 289 | +static struct of_device_id ocp8178_of_match[] = { 290 | + { .compatible = "ocp8178-backlight" }, 291 | + { /* sentinel */ } 292 | +}; 293 | + 294 | +MODULE_DEVICE_TABLE(of, ocp8178_of_match); 295 | + 296 | +static struct platform_driver ocp8178_driver = { 297 | + .driver = { 298 | + .name = "ocp8178-backlight", 299 | + .of_match_table = of_match_ptr(ocp8178_of_match), 300 | + }, 301 | + .probe = ocp8178_probe, 302 | + .suspend = ocp8178_suspend, 303 | + .resume = ocp8178_resume, 304 | +}; 305 | + 306 | +module_platform_driver(ocp8178_driver); 307 | + 308 | +MODULE_DESCRIPTION("OCP8178 Driver"); 309 | +MODULE_LICENSE("GPL"); 310 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0006-fix-rockchip-mipi-dsi-display-init-timeouts.patch: -------------------------------------------------------------------------------- 1 | From patchwork Tue Sep 28 21:35:49 2021 2 | Content-Type: text/plain; charset="utf-8" 3 | MIME-Version: 1.0 4 | Content-Transfer-Encoding: 8bit 5 | X-Patchwork-Submitter: Brian Norris 6 | X-Patchwork-Id: 12523867 7 | Return-Path: 8 | 9 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 10 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 11 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 12 | by smtp.lore.kernel.org (Postfix) with ESMTP id 0AD32C433FE 13 | for ; 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74 | Tue, 28 Sep 2021 14:36:06 -0700 (PDT) 75 | Received: from localhost ([2620:15c:202:201:d7ca:580:94ab:8af8]) 76 | by smtp.gmail.com with UTF8SMTPSA id q19sm105131pgn.81.2021.09.28.14.36.05 77 | (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); 78 | Tue, 28 Sep 2021 14:36:05 -0700 (PDT) 79 | From: Brian Norris 80 | To: =?utf-8?q?Heiko_St=C3=BCbner?= 81 | Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, 82 | linux-rockchip@lists.infradead.org, Sandy Huang , 83 | Chen-Yu Tsai , Thomas Hebb , 84 | Brian Norris , aleksandr.o.makarov@gmail.com, 85 | stable@vger.kernel.org, 86 | =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prado?= 87 | Subject: [PATCH v3 1/4] drm/rockchip: dsi: Hold pm-runtime across bind/unbind 88 | Date: Tue, 28 Sep 2021 14:35:49 -0700 89 | Message-Id: 90 | <20210928143413.v3.1.Ic2904d37f30013a7f3d8476203ad3733c186827e@changeid> 91 | X-Mailer: git-send-email 2.33.0.685.g46640cef36-goog 92 | In-Reply-To: <20210928213552.1001939-1-briannorris@chromium.org> 93 | References: <20210928213552.1001939-1-briannorris@chromium.org> 94 | MIME-Version: 1.0 95 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 96 | X-CRM114-CacheID: sfid-20210928_143610_128449_7B8E0C43 97 | X-CRM114-Status: GOOD ( 20.47 ) 98 | X-BeenThere: linux-rockchip@lists.infradead.org 99 | X-Mailman-Version: 2.1.34 100 | Precedence: list 101 | List-Id: Upstream kernel work for Rockchip platforms 102 | 103 | List-Unsubscribe: , 104 | 105 | List-Archive: 106 | List-Post: 107 | List-Help: 108 | List-Subscribe: , 109 | 110 | Sender: "Linux-rockchip" 111 | Errors-To: 112 | linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org 113 | 114 | In commit 43c2de1002d2, we moved most HW configuration to bind(), but we 115 | didn't move the runtime PM management. Therefore, depending on initial 116 | boot state, runtime-PM workqueue delays, and other timing factors, we 117 | may disable our power domain in between the hardware configuration 118 | (bind()) and when we enable the display. This can cause us to lose 119 | hardware state and fail to configure our display. For example: 120 | 121 | dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO 122 | panel-innolux-p079zca ff960000.mipi.0: failed to write command 0 123 | 124 | or: 125 | 126 | dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO 127 | panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110 128 | 129 | We should match the runtime PM to the lifetime of the bind()/unbind() 130 | cycle. 131 | 132 | Tested on Acer Chrometab 10 (RK3399 Gru-Scarlet), with panel drivers 133 | built either as modules or built-in. 134 | 135 | Side notes: it seems one is more likely to see this problem when the 136 | panel driver is built into the kernel. I've also seen this problem 137 | bisect down to commits that simply changed Kconfig dependencies, because 138 | it changed the order in which driver init functions were compiled into 139 | the kernel, and therefore the ordering and timing of built-in device 140 | probe. 141 | 142 | Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()") 143 | Link: https://lore.kernel.org/linux-rockchip/9aedfb528600ecf871885f7293ca4207c84d16c1.camel@gmail.com/ 144 | Reported-by: 145 | Cc: 146 | Signed-off-by: Brian Norris 147 | Tested-by: Nícolas F. R. A. Prado 148 | Reviewed-by: Chen-Yu Tsai 149 | --- 150 | 151 | (no changes since v2) 152 | 153 | Changes in v2: 154 | - Clean up pm-runtime state in error cases. 155 | - Correct git hash for Fixes. 156 | 157 | .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 37 ++++++++++--------- 158 | 1 file changed, 19 insertions(+), 18 deletions(-) 159 | 160 | diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 161 | index a2262bee5aa4..45676b23c019 100644 162 | --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 163 | +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 164 | @@ -773,10 +773,6 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) 165 | if (mux < 0) 166 | return; 167 | 168 | - pm_runtime_get_sync(dsi->dev); 169 | - if (dsi->slave) 170 | - pm_runtime_get_sync(dsi->slave->dev); 171 | - 172 | /* 173 | * For the RK3399, the clk of grf must be enabled before writing grf 174 | * register. And for RK3288 or other soc, this grf_clk must be NULL, 175 | @@ -795,20 +791,10 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder) 176 | clk_disable_unprepare(dsi->grf_clk); 177 | } 178 | 179 | -static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder) 180 | -{ 181 | - struct dw_mipi_dsi_rockchip *dsi = to_dsi(encoder); 182 | - 183 | - if (dsi->slave) 184 | - pm_runtime_put(dsi->slave->dev); 185 | - pm_runtime_put(dsi->dev); 186 | -} 187 | - 188 | static const struct drm_encoder_helper_funcs 189 | dw_mipi_dsi_encoder_helper_funcs = { 190 | .atomic_check = dw_mipi_dsi_encoder_atomic_check, 191 | .enable = dw_mipi_dsi_encoder_enable, 192 | - .disable = dw_mipi_dsi_encoder_disable, 193 | }; 194 | 195 | static int rockchip_dsi_drm_create_encoder(struct dw_mipi_dsi_rockchip *dsi, 196 | @@ -938,10 +924,14 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, 197 | put_device(second); 198 | } 199 | 200 | + pm_runtime_get_sync(dsi->dev); 201 | + if (dsi->slave) 202 | + pm_runtime_get_sync(dsi->slave->dev); 203 | + 204 | ret = clk_prepare_enable(dsi->pllref_clk); 205 | if (ret) { 206 | DRM_DEV_ERROR(dev, "Failed to enable pllref_clk: %d\n", ret); 207 | - return ret; 208 | + goto out_pm_runtime; 209 | } 210 | 211 | /* 212 | @@ -953,7 +943,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, 213 | ret = clk_prepare_enable(dsi->grf_clk); 214 | if (ret) { 215 | DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); 216 | - return ret; 217 | + goto out_pm_runtime; 218 | } 219 | 220 | dw_mipi_dsi_rockchip_config(dsi); 221 | @@ -965,16 +955,23 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, 222 | ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); 223 | if (ret) { 224 | DRM_DEV_ERROR(dev, "Failed to create drm encoder\n"); 225 | - return ret; 226 | + goto out_pm_runtime; 227 | } 228 | 229 | ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder); 230 | if (ret) { 231 | DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret); 232 | - return ret; 233 | + goto out_pm_runtime; 234 | } 235 | 236 | return 0; 237 | + 238 | +out_pm_runtime: 239 | + pm_runtime_put(dsi->dev); 240 | + if (dsi->slave) 241 | + pm_runtime_put(dsi->slave->dev); 242 | + 243 | + return ret; 244 | } 245 | 246 | static void dw_mipi_dsi_rockchip_unbind(struct device *dev, 247 | @@ -989,6 +986,10 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev, 248 | dw_mipi_dsi_unbind(dsi->dmd); 249 | 250 | clk_disable_unprepare(dsi->pllref_clk); 251 | + 252 | + pm_runtime_put(dsi->dev); 253 | + if (dsi->slave) 254 | + pm_runtime_put(dsi->slave->dev); 255 | } 256 | 257 | static const struct component_ops dw_mipi_dsi_rockchip_ops = { 258 | 259 | From patchwork Tue Sep 28 21:35:50 2021 260 | Content-Type: text/plain; charset="utf-8" 261 | MIME-Version: 1.0 262 | Content-Transfer-Encoding: 8bit 263 | X-Patchwork-Submitter: Brian Norris 264 | X-Patchwork-Id: 12523869 265 | Return-Path: 266 | 267 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 268 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 269 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 270 | by smtp.lore.kernel.org (Postfix) with ESMTP id B7801C433F5 271 | for ; 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332 | Tue, 28 Sep 2021 14:36:08 -0700 (PDT) 333 | Received: from localhost ([2620:15c:202:201:d7ca:580:94ab:8af8]) 334 | by smtp.gmail.com with UTF8SMTPSA id mn22sm2796646pjb.11.2021.09.28.14.36.07 335 | (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); 336 | Tue, 28 Sep 2021 14:36:07 -0700 (PDT) 337 | From: Brian Norris 338 | To: =?utf-8?q?Heiko_St=C3=BCbner?= 339 | Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, 340 | linux-rockchip@lists.infradead.org, Sandy Huang , 341 | Chen-Yu Tsai , Thomas Hebb , 342 | Brian Norris , stable@vger.kernel.org 343 | Subject: [PATCH v3 2/4] drm/rockchip: dsi: Reconfigure hardware on resume() 344 | Date: Tue, 28 Sep 2021 14:35:50 -0700 345 | Message-Id: 346 | <20210928143413.v3.2.I4e9d93aadb00b1ffc7d506e3186a25492bf0b732@changeid> 347 | X-Mailer: git-send-email 2.33.0.685.g46640cef36-goog 348 | In-Reply-To: <20210928213552.1001939-1-briannorris@chromium.org> 349 | References: <20210928213552.1001939-1-briannorris@chromium.org> 350 | MIME-Version: 1.0 351 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 352 | X-CRM114-CacheID: sfid-20210928_143611_925456_59143C36 353 | X-CRM114-Status: GOOD ( 19.88 ) 354 | X-BeenThere: linux-rockchip@lists.infradead.org 355 | X-Mailman-Version: 2.1.34 356 | Precedence: list 357 | List-Id: Upstream kernel work for Rockchip platforms 358 | 359 | List-Unsubscribe: , 360 | 361 | List-Archive: 362 | List-Post: 363 | List-Help: 364 | List-Subscribe: , 365 | 366 | Sender: "Linux-rockchip" 367 | Errors-To: 368 | linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org 369 | 370 | Since commit 43c2de1002d2, we perform most HW configuration in the 371 | bind() function. This configuration may be lost on suspend/resume, so we 372 | need to call it again. That may lead to errors like this after system 373 | suspend/resume: 374 | 375 | dw-mipi-dsi-rockchip ff968000.mipi: failed to write command FIFO 376 | panel-kingdisplay-kd097d04 ff960000.mipi.0: failed write init cmds: -110 377 | 378 | Tested on Acer Chromebook Tab 10 (RK3399 Gru-Scarlet). 379 | 380 | Note that early mailing list versions of this driver borrowed Rockchip's 381 | downstream/BSP solution, to do HW configuration in mode_set() (which 382 | *is* called at the appropriate pre-enable() times), but that was 383 | discarded along the way. I've avoided that still, because mode_set() 384 | documentation doesn't suggest this kind of purpose as far as I can tell. 385 | 386 | Fixes: 43c2de1002d2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()") 387 | Cc: 388 | Signed-off-by: Brian Norris 389 | Reviewed-by: Chen-Yu Tsai 390 | Tested-by: Nícolas F. R. A. Prado 391 | --- 392 | 393 | Changes in v3: 394 | - New patch, to fix related PM issue discovered after patch 1 395 | 396 | .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 37 +++++++++++++++++++ 397 | 1 file changed, 37 insertions(+) 398 | 399 | diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 400 | index 45676b23c019..21c67343cc6c 100644 401 | --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 402 | +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 403 | @@ -268,6 +268,8 @@ struct dw_mipi_dsi_rockchip { 404 | struct dw_mipi_dsi *dmd; 405 | const struct rockchip_dw_dsi_chip_data *cdata; 406 | struct dw_mipi_dsi_plat_data pdata; 407 | + 408 | + bool dsi_bound; 409 | }; 410 | 411 | struct dphy_pll_parameter_map { 412 | @@ -964,6 +966,8 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, 413 | goto out_pm_runtime; 414 | } 415 | 416 | + dsi->dsi_bound = true; 417 | + 418 | return 0; 419 | 420 | out_pm_runtime: 421 | @@ -983,6 +987,8 @@ static void dw_mipi_dsi_rockchip_unbind(struct device *dev, 422 | if (dsi->is_slave) 423 | return; 424 | 425 | + dsi->dsi_bound = false; 426 | + 427 | dw_mipi_dsi_unbind(dsi->dmd); 428 | 429 | clk_disable_unprepare(dsi->pllref_clk); 430 | @@ -1277,6 +1283,36 @@ static const struct phy_ops dw_mipi_dsi_dphy_ops = { 431 | .exit = dw_mipi_dsi_dphy_exit, 432 | }; 433 | 434 | +static int __maybe_unused dw_mipi_dsi_rockchip_resume(struct device *dev) 435 | +{ 436 | + struct dw_mipi_dsi_rockchip *dsi = dev_get_drvdata(dev); 437 | + int ret; 438 | + 439 | + /* 440 | + * Re-configure DSI state, if we were previously initialized. We need 441 | + * to do this before rockchip_drm_drv tries to re-enable() any panels. 442 | + */ 443 | + if (dsi->dsi_bound) { 444 | + ret = clk_prepare_enable(dsi->grf_clk); 445 | + if (ret) { 446 | + DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); 447 | + return ret; 448 | + } 449 | + 450 | + dw_mipi_dsi_rockchip_config(dsi); 451 | + if (dsi->slave) 452 | + dw_mipi_dsi_rockchip_config(dsi->slave); 453 | + 454 | + clk_disable_unprepare(dsi->grf_clk); 455 | + } 456 | + 457 | + return 0; 458 | +} 459 | + 460 | +static const struct dev_pm_ops dw_mipi_dsi_rockchip_pm_ops = { 461 | + SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, dw_mipi_dsi_rockchip_resume) 462 | +}; 463 | + 464 | static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev) 465 | { 466 | struct device *dev = &pdev->dev; 467 | @@ -1594,6 +1630,7 @@ struct platform_driver dw_mipi_dsi_rockchip_driver = { 468 | .remove = dw_mipi_dsi_rockchip_remove, 469 | .driver = { 470 | .of_match_table = dw_mipi_dsi_rockchip_dt_ids, 471 | + .pm = &dw_mipi_dsi_rockchip_pm_ops, 472 | .name = "dw-mipi-dsi-rockchip", 473 | }, 474 | }; 475 | 476 | From patchwork Tue Sep 28 21:35:51 2021 477 | Content-Type: text/plain; charset="utf-8" 478 | MIME-Version: 1.0 479 | Content-Transfer-Encoding: 8bit 480 | X-Patchwork-Submitter: Brian Norris 481 | X-Patchwork-Id: 12523871 482 | Return-Path: 483 | 484 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 485 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 486 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 487 | by smtp.lore.kernel.org (Postfix) with ESMTP id DB752C433EF 488 | for ; 489 | Tue, 28 Sep 2021 21:36:24 +0000 (UTC) 490 | Received: from bombadil.infradead.org (bombadil.infradead.org 491 | [198.137.202.133]) 492 | (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) 493 | (No client certificate requested) 494 | by mail.kernel.org (Postfix) with ESMTPS id AF5E961378 495 | for ; 496 | Tue, 28 Sep 2021 21:36:24 +0000 (UTC) 497 | DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org AF5E961378 498 | Authentication-Results: mail.kernel.org; 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549 | Tue, 28 Sep 2021 14:36:10 -0700 (PDT) 550 | Received: from localhost ([2620:15c:202:201:d7ca:580:94ab:8af8]) 551 | by smtp.gmail.com with UTF8SMTPSA id n18sm105073pfa.42.2021.09.28.14.36.09 552 | (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); 553 | Tue, 28 Sep 2021 14:36:09 -0700 (PDT) 554 | From: Brian Norris 555 | To: =?utf-8?q?Heiko_St=C3=BCbner?= 556 | Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, 557 | linux-rockchip@lists.infradead.org, Sandy Huang , 558 | Chen-Yu Tsai , Thomas Hebb , 559 | Brian Norris 560 | Subject: [PATCH v3 3/4] drm/rockchip: dsi: Fix unbalanced clock on probe error 561 | Date: Tue, 28 Sep 2021 14:35:51 -0700 562 | Message-Id: 563 | <20210928143413.v3.3.Ie8ceefb51ab6065a1151869b6fcda41a467d4d2c@changeid> 564 | X-Mailer: git-send-email 2.33.0.685.g46640cef36-goog 565 | In-Reply-To: <20210928213552.1001939-1-briannorris@chromium.org> 566 | References: <20210928213552.1001939-1-briannorris@chromium.org> 567 | MIME-Version: 1.0 568 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 569 | X-CRM114-CacheID: sfid-20210928_143613_263397_5AFA14DE 570 | X-CRM114-Status: GOOD ( 11.89 ) 571 | X-BeenThere: linux-rockchip@lists.infradead.org 572 | X-Mailman-Version: 2.1.34 573 | Precedence: list 574 | List-Id: Upstream kernel work for Rockchip platforms 575 | 576 | List-Unsubscribe: , 577 | 578 | List-Archive: 579 | List-Post: 580 | List-Help: 581 | List-Subscribe: , 582 | 583 | Sender: "Linux-rockchip" 584 | Errors-To: 585 | linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org 586 | 587 | Our probe() function never enabled this clock, so we shouldn't disable 588 | it if we fail to probe the bridge. 589 | 590 | Noted by inspection. 591 | 592 | Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver") 593 | Signed-off-by: Brian Norris 594 | Reviewed-by: Chen-Yu Tsai 595 | Tested-by: Nícolas F. R. A. Prado 596 | --- 597 | 598 | (no changes since v1) 599 | 600 | drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 6 +----- 601 | 1 file changed, 1 insertion(+), 5 deletions(-) 602 | 603 | diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 604 | index 21c67343cc6c..8ea852880d1c 100644 605 | --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 606 | +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 607 | @@ -1434,14 +1434,10 @@ static int dw_mipi_dsi_rockchip_probe(struct platform_device *pdev) 608 | if (ret != -EPROBE_DEFER) 609 | DRM_DEV_ERROR(dev, 610 | "Failed to probe dw_mipi_dsi: %d\n", ret); 611 | - goto err_clkdisable; 612 | + return ret; 613 | } 614 | 615 | return 0; 616 | - 617 | -err_clkdisable: 618 | - clk_disable_unprepare(dsi->pllref_clk); 619 | - return ret; 620 | } 621 | 622 | static int dw_mipi_dsi_rockchip_remove(struct platform_device *pdev) 623 | 624 | From patchwork Tue Sep 28 21:35:52 2021 625 | Content-Type: text/plain; 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702 | Tue, 28 Sep 2021 14:36:11 -0700 (PDT) 703 | From: Brian Norris 704 | To: =?utf-8?q?Heiko_St=C3=BCbner?= 705 | Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, 706 | linux-rockchip@lists.infradead.org, Sandy Huang , 707 | Chen-Yu Tsai , Thomas Hebb , 708 | Brian Norris 709 | Subject: [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error 710 | Date: Tue, 28 Sep 2021 14:35:52 -0700 711 | Message-Id: 712 | <20210928143413.v3.4.I8bb7a91ecc411d56bc155763faa15f289d7fc074@changeid> 713 | X-Mailer: git-send-email 2.33.0.685.g46640cef36-goog 714 | In-Reply-To: <20210928213552.1001939-1-briannorris@chromium.org> 715 | References: <20210928213552.1001939-1-briannorris@chromium.org> 716 | MIME-Version: 1.0 717 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 718 | X-CRM114-CacheID: sfid-20210928_143613_752461_605C694C 719 | X-CRM114-Status: GOOD ( 11.45 ) 720 | X-BeenThere: linux-rockchip@lists.infradead.org 721 | X-Mailman-Version: 2.1.34 722 | Precedence: list 723 | List-Id: Upstream kernel work for Rockchip platforms 724 | 725 | List-Unsubscribe: , 726 | 727 | List-Archive: 728 | List-Post: 729 | List-Help: 730 | List-Subscribe: , 731 | 732 | Sender: "Linux-rockchip" 733 | Errors-To: 734 | linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org 735 | 736 | Fix some error handling here noticed in review of other changes. 737 | 738 | Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver") 739 | Signed-off-by: Brian Norris 740 | Reported-by: Chen-Yu Tsai 741 | Reviewed-by: Chen-Yu Tsai 742 | Tested-by: Nícolas F. R. A. Prado 743 | --- 744 | 745 | Changes in v3: 746 | - Add Fixes, Reviewed-by 747 | 748 | Changes in v2: 749 | - New 750 | 751 | drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 8 +++++--- 752 | 1 file changed, 5 insertions(+), 3 deletions(-) 753 | 754 | diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 755 | index 8ea852880d1c..59c3d8ef6bf9 100644 756 | --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 757 | +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c 758 | @@ -945,7 +945,7 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, 759 | ret = clk_prepare_enable(dsi->grf_clk); 760 | if (ret) { 761 | DRM_DEV_ERROR(dsi->dev, "Failed to enable grf_clk: %d\n", ret); 762 | - goto out_pm_runtime; 763 | + goto out_pll_clk; 764 | } 765 | 766 | dw_mipi_dsi_rockchip_config(dsi); 767 | @@ -957,19 +957,21 @@ static int dw_mipi_dsi_rockchip_bind(struct device *dev, 768 | ret = rockchip_dsi_drm_create_encoder(dsi, drm_dev); 769 | if (ret) { 770 | DRM_DEV_ERROR(dev, "Failed to create drm encoder\n"); 771 | - goto out_pm_runtime; 772 | + goto out_pll_clk; 773 | } 774 | 775 | ret = dw_mipi_dsi_bind(dsi->dmd, &dsi->encoder); 776 | if (ret) { 777 | DRM_DEV_ERROR(dev, "Failed to bind: %d\n", ret); 778 | - goto out_pm_runtime; 779 | + goto out_pll_clk; 780 | } 781 | 782 | dsi->dsi_bound = true; 783 | 784 | return 0; 785 | 786 | +out_pll_clk: 787 | + clk_disable_unprepare(dsi->pllref_clk); 788 | out_pm_runtime: 789 | pm_runtime_put(dsi->dev); 790 | if (dsi->slave) 791 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0023-drm-rockchip-support-gamma-control-on-RK3399.patch: -------------------------------------------------------------------------------- 1 | From patchwork Tue Oct 19 21:58:41 2021 2 | Content-Type: text/plain; charset="utf-8" 3 | MIME-Version: 1.0 4 | Content-Transfer-Encoding: 7bit 5 | X-Patchwork-Submitter: Hugh Cole-Baker 6 | X-Patchwork-Id: 12571183 7 | Return-Path: 8 | 9 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 10 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 11 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 12 | by smtp.lore.kernel.org (Postfix) with ESMTP id E7AA4C433F5 13 | for ; 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[82.69.107.165]) 77 | by smtp.gmail.com with ESMTPSA id s3sm178540wrm.40.2021.10.19.14.58.52 78 | (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); 79 | Tue, 19 Oct 2021 14:58:52 -0700 (PDT) 80 | From: Hugh Cole-Baker 81 | To: heiko@sntech.de, 82 | hjc@rock-chips.com 83 | Cc: dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, 84 | linux-arm-kernel@lists.infradead.org, ezequiel@collabora.com, 85 | Hugh Cole-Baker 86 | Subject: [PATCH v2 1/3] drm/rockchip: define gamma registers for RK3399 87 | Date: Tue, 19 Oct 2021 22:58:41 +0100 88 | Message-Id: <20211019215843.42718-2-sigmaris@gmail.com> 89 | X-Mailer: git-send-email 2.24.3 (Apple Git-128) 90 | In-Reply-To: <20211019215843.42718-1-sigmaris@gmail.com> 91 | References: <20211019215843.42718-1-sigmaris@gmail.com> 92 | MIME-Version: 1.0 93 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 94 | X-CRM114-CacheID: sfid-20211019_145855_763472_DAE885F2 95 | X-CRM114-Status: GOOD ( 15.39 ) 96 | X-BeenThere: linux-arm-kernel@lists.infradead.org 97 | X-Mailman-Version: 2.1.34 98 | Precedence: list 99 | List-Id: 100 | List-Unsubscribe: 101 | , 102 | 103 | List-Archive: 104 | List-Post: 105 | List-Help: 106 | List-Subscribe: 107 | , 108 | 109 | Sender: "linux-arm-kernel" 110 | Errors-To: 111 | linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 112 | 113 | The VOP on RK3399 has a different approach from previous versions for 114 | setting a gamma lookup table, using an update_gamma_lut register. As 115 | this differs from RK3288, give RK3399 its own set of "common" register 116 | definitions. 117 | 118 | Signed-off-by: Hugh Cole-Baker 119 | --- 120 | 121 | Changes from v1: no changes in this patch 122 | 123 | drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 ++ 124 | drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 24 +++++++++++++++++++-- 125 | drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 1 + 126 | 3 files changed, 25 insertions(+), 2 deletions(-) 127 | 128 | diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 129 | index 857d97cdc67c..14179e89bd21 100644 130 | --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 131 | +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 132 | @@ -99,6 +99,8 @@ struct vop_common { 133 | struct vop_reg dither_down_en; 134 | struct vop_reg dither_up; 135 | struct vop_reg dsp_lut_en; 136 | + struct vop_reg update_gamma_lut; 137 | + struct vop_reg lut_buffer_index; 138 | struct vop_reg gate_en; 139 | struct vop_reg mmu_en; 140 | struct vop_reg out_mode; 141 | diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 142 | index ca7cc82125cb..bfb7e130f09b 100644 143 | --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 144 | +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 145 | @@ -865,6 +865,24 @@ static const struct vop_output rk3399_output = { 146 | .mipi_dual_channel_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 3), 147 | }; 148 | 149 | +static const struct vop_common rk3399_common = { 150 | + .standby = VOP_REG_SYNC(RK3399_SYS_CTRL, 0x1, 22), 151 | + .gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23), 152 | + .mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20), 153 | + .dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4), 154 | + .dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3), 155 | + .dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2), 156 | + .pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1), 157 | + .dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6), 158 | + .dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0), 159 | + .update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7), 160 | + .lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1), 161 | + .data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19), 162 | + .dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18), 163 | + .out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0), 164 | + .cfg_done = VOP_REG_SYNC(RK3399_REG_CFG_DONE, 0x1, 0), 165 | +}; 166 | + 167 | static const struct vop_yuv2yuv_phy rk3399_yuv2yuv_win01_data = { 168 | .y2r_coefficients = { 169 | VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0), 170 | @@ -944,7 +962,7 @@ static const struct vop_data rk3399_vop_big = { 171 | .version = VOP_VERSION(3, 5), 172 | .feature = VOP_FEATURE_OUTPUT_RGB10, 173 | .intr = &rk3366_vop_intr, 174 | - .common = &rk3288_common, 175 | + .common = &rk3399_common, 176 | .modeset = &rk3288_modeset, 177 | .output = &rk3399_output, 178 | .afbc = &rk3399_vop_afbc, 179 | @@ -952,6 +970,7 @@ static const struct vop_data rk3399_vop_big = { 180 | .win = rk3399_vop_win_data, 181 | .win_size = ARRAY_SIZE(rk3399_vop_win_data), 182 | .win_yuv2yuv = rk3399_vop_big_win_yuv2yuv_data, 183 | + .lut_size = 1024, 184 | }; 185 | 186 | static const struct vop_win_data rk3399_vop_lit_win_data[] = { 187 | @@ -970,13 +989,14 @@ static const struct vop_win_yuv2yuv_data rk3399_vop_lit_win_yuv2yuv_data[] = { 188 | static const struct vop_data rk3399_vop_lit = { 189 | .version = VOP_VERSION(3, 6), 190 | .intr = &rk3366_vop_intr, 191 | - .common = &rk3288_common, 192 | + .common = &rk3399_common, 193 | .modeset = &rk3288_modeset, 194 | .output = &rk3399_output, 195 | .misc = &rk3368_misc, 196 | .win = rk3399_vop_lit_win_data, 197 | .win_size = ARRAY_SIZE(rk3399_vop_lit_win_data), 198 | .win_yuv2yuv = rk3399_vop_lit_win_yuv2yuv_data, 199 | + .lut_size = 256, 200 | }; 201 | 202 | static const struct vop_win_data rk3228_vop_win_data[] = { 203 | diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h 204 | index 0b3cd65ba5c1..406e981c75bd 100644 205 | --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h 206 | +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h 207 | @@ -628,6 +628,7 @@ 208 | #define RK3399_YUV2YUV_WIN 0x02c0 209 | #define RK3399_YUV2YUV_POST 0x02c4 210 | #define RK3399_AUTO_GATING_EN 0x02cc 211 | +#define RK3399_DBG_POST_REG1 0x036c 212 | #define RK3399_WIN0_CSC_COE 0x03a0 213 | #define RK3399_WIN1_CSC_COE 0x03c0 214 | #define RK3399_WIN2_CSC_COE 0x03e0 215 | 216 | From patchwork Tue Oct 19 21:58:42 2021 217 | Content-Type: text/plain; charset="utf-8" 218 | MIME-Version: 1.0 219 | Content-Transfer-Encoding: 7bit 220 | X-Patchwork-Submitter: Hugh Cole-Baker 221 | X-Patchwork-Id: 12571187 222 | Return-Path: 223 | 224 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 225 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 226 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 227 | by smtp.lore.kernel.org (Postfix) with ESMTP id 134C1C433F5 228 | for ; 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[82.69.107.165]) 292 | by smtp.gmail.com with ESMTPSA id s3sm178540wrm.40.2021.10.19.14.58.57 293 | (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); 294 | Tue, 19 Oct 2021 14:58:57 -0700 (PDT) 295 | From: Hugh Cole-Baker 296 | To: heiko@sntech.de, 297 | hjc@rock-chips.com 298 | Cc: dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, 299 | linux-arm-kernel@lists.infradead.org, ezequiel@collabora.com, 300 | Hugh Cole-Baker 301 | Subject: [PATCH v2 2/3] drm/rockchip: support gamma control on RK3399 302 | Date: Tue, 19 Oct 2021 22:58:42 +0100 303 | Message-Id: <20211019215843.42718-3-sigmaris@gmail.com> 304 | X-Mailer: git-send-email 2.24.3 (Apple Git-128) 305 | In-Reply-To: <20211019215843.42718-1-sigmaris@gmail.com> 306 | References: <20211019215843.42718-1-sigmaris@gmail.com> 307 | MIME-Version: 1.0 308 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 309 | X-CRM114-CacheID: sfid-20211019_145901_258532_1013C062 310 | X-CRM114-Status: GOOD ( 23.54 ) 311 | X-BeenThere: linux-arm-kernel@lists.infradead.org 312 | X-Mailman-Version: 2.1.34 313 | Precedence: list 314 | List-Id: 315 | List-Unsubscribe: 316 | , 317 | 318 | List-Archive: 319 | List-Post: 320 | List-Help: 321 | List-Subscribe: 322 | , 323 | 324 | Sender: "linux-arm-kernel" 325 | Errors-To: 326 | linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 327 | 328 | The RK3399 has a 1024-entry gamma LUT with 10 bits per component on its 329 | "big" VOP and a 256-entry, 8 bit per component LUT on the "little" VOP. 330 | Compared to the RK3288, it no longer requires disabling gamma while 331 | updating the LUT. On the RK3399, the LUT can be updated at any time as 332 | the hardware has two LUT buffers, one can be written while the other is 333 | in use. A swap of the buffers is triggered by writing 1 to the 334 | update_gamma_lut register. 335 | 336 | Signed-off-by: Hugh Cole-Baker 337 | --- 338 | 339 | Changes from v1: Moved the vop_crtc_gamma_set call to the end of 340 | vop_crtc_atomic_enable after the clocks and CRTC are enabled. 341 | 342 | drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 105 +++++++++++++------- 343 | 1 file changed, 71 insertions(+), 34 deletions(-) 344 | 345 | diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 346 | index ba9e14da41b4..e2c97f1b26da 100644 347 | --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 348 | +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 349 | @@ -9,6 +9,7 @@ 350 | #include 351 | #include 352 | #include 353 | +#include 354 | #include 355 | #include 356 | #include 357 | @@ -66,6 +67,9 @@ 358 | #define VOP_REG_SET(vop, group, name, v) \ 359 | vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name) 360 | 361 | +#define VOP_HAS_REG(vop, group, name) \ 362 | + (!!(vop->data->group->name.mask)) 363 | + 364 | #define VOP_INTR_SET_TYPE(vop, name, type, v) \ 365 | do { \ 366 | int i, reg = 0, mask = 0; \ 367 | @@ -1204,17 +1208,22 @@ static bool vop_dsp_lut_is_enabled(struct vop *vop) 368 | return vop_read_reg(vop, 0, &vop->data->common->dsp_lut_en); 369 | } 370 | 371 | +static u32 vop_lut_buffer_index(struct vop *vop) 372 | +{ 373 | + return vop_read_reg(vop, 0, &vop->data->common->lut_buffer_index); 374 | +} 375 | + 376 | static void vop_crtc_write_gamma_lut(struct vop *vop, struct drm_crtc *crtc) 377 | { 378 | struct drm_color_lut *lut = crtc->state->gamma_lut->data; 379 | - unsigned int i; 380 | + unsigned int i, bpc = ilog2(vop->data->lut_size); 381 | 382 | for (i = 0; i < crtc->gamma_size; i++) { 383 | u32 word; 384 | 385 | - word = (drm_color_lut_extract(lut[i].red, 10) << 20) | 386 | - (drm_color_lut_extract(lut[i].green, 10) << 10) | 387 | - drm_color_lut_extract(lut[i].blue, 10); 388 | + word = (drm_color_lut_extract(lut[i].red, bpc) << (2 * bpc)) | 389 | + (drm_color_lut_extract(lut[i].green, bpc) << bpc) | 390 | + drm_color_lut_extract(lut[i].blue, bpc); 391 | writel(word, vop->lut_regs + i * 4); 392 | } 393 | } 394 | @@ -1224,38 +1233,66 @@ static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc, 395 | { 396 | struct drm_crtc_state *state = crtc->state; 397 | unsigned int idle; 398 | + u32 lut_idx, old_idx; 399 | int ret; 400 | 401 | if (!vop->lut_regs) 402 | return; 403 | - /* 404 | - * To disable gamma (gamma_lut is null) or to write 405 | - * an update to the LUT, clear dsp_lut_en. 406 | - */ 407 | - spin_lock(&vop->reg_lock); 408 | - VOP_REG_SET(vop, common, dsp_lut_en, 0); 409 | - vop_cfg_done(vop); 410 | - spin_unlock(&vop->reg_lock); 411 | 412 | - /* 413 | - * In order to write the LUT to the internal memory, 414 | - * we need to first make sure the dsp_lut_en bit is cleared. 415 | - */ 416 | - ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop, 417 | - idle, !idle, 5, 30 * 1000); 418 | - if (ret) { 419 | - DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n"); 420 | - return; 421 | - } 422 | + if (!state->gamma_lut || !VOP_HAS_REG(vop, common, update_gamma_lut)) { 423 | + /* 424 | + * To disable gamma (gamma_lut is null) or to write 425 | + * an update to the LUT, clear dsp_lut_en. 426 | + */ 427 | + spin_lock(&vop->reg_lock); 428 | + VOP_REG_SET(vop, common, dsp_lut_en, 0); 429 | + vop_cfg_done(vop); 430 | + spin_unlock(&vop->reg_lock); 431 | 432 | - if (!state->gamma_lut) 433 | - return; 434 | + /* 435 | + * In order to write the LUT to the internal memory, 436 | + * we need to first make sure the dsp_lut_en bit is cleared. 437 | + */ 438 | + ret = readx_poll_timeout(vop_dsp_lut_is_enabled, vop, 439 | + idle, !idle, 5, 30 * 1000); 440 | + if (ret) { 441 | + DRM_DEV_ERROR(vop->dev, "display LUT RAM enable timeout!\n"); 442 | + return; 443 | + } 444 | + 445 | + if (!state->gamma_lut) 446 | + return; 447 | + } else { 448 | + /* 449 | + * On RK3399 the gamma LUT can updated without clearing dsp_lut_en, 450 | + * by setting update_gamma_lut then waiting for lut_buffer_index change 451 | + */ 452 | + old_idx = vop_lut_buffer_index(vop); 453 | + } 454 | 455 | spin_lock(&vop->reg_lock); 456 | vop_crtc_write_gamma_lut(vop, crtc); 457 | VOP_REG_SET(vop, common, dsp_lut_en, 1); 458 | + VOP_REG_SET(vop, common, update_gamma_lut, 1); 459 | vop_cfg_done(vop); 460 | spin_unlock(&vop->reg_lock); 461 | + 462 | + if (VOP_HAS_REG(vop, common, update_gamma_lut)) { 463 | + ret = readx_poll_timeout(vop_lut_buffer_index, vop, 464 | + lut_idx, lut_idx != old_idx, 5, 30 * 1000); 465 | + if (ret) { 466 | + DRM_DEV_ERROR(vop->dev, "gamma LUT update timeout!\n"); 467 | + return; 468 | + } 469 | + 470 | + /* 471 | + * update_gamma_lut is auto cleared by HW, but write 0 to clear the bit 472 | + * in our backup of the regs. 473 | + */ 474 | + spin_lock(&vop->reg_lock); 475 | + VOP_REG_SET(vop, common, update_gamma_lut, 0); 476 | + spin_unlock(&vop->reg_lock); 477 | + } 478 | } 479 | 480 | static void vop_crtc_atomic_begin(struct drm_crtc *crtc, 481 | @@ -1305,14 +1342,6 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, 482 | return; 483 | } 484 | 485 | - /* 486 | - * If we have a GAMMA LUT in the state, then let's make sure 487 | - * it's updated. We might be coming out of suspend, 488 | - * which means the LUT internal memory needs to be re-written. 489 | - */ 490 | - if (crtc->state->gamma_lut) 491 | - vop_crtc_gamma_set(vop, crtc, old_state); 492 | - 493 | mutex_lock(&vop->vop_lock); 494 | 495 | WARN_ON(vop->event); 496 | @@ -1403,6 +1432,14 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc, 497 | 498 | VOP_REG_SET(vop, common, standby, 0); 499 | mutex_unlock(&vop->vop_lock); 500 | + 501 | + /* 502 | + * If we have a GAMMA LUT in the state, then let's make sure 503 | + * it's updated. We might be coming out of suspend, 504 | + * which means the LUT internal memory needs to be re-written. 505 | + */ 506 | + if (crtc->state->gamma_lut) 507 | + vop_crtc_gamma_set(vop, crtc, old_state); 508 | } 509 | 510 | static bool vop_fs_irq_is_pending(struct vop *vop) 511 | @@ -2125,8 +2162,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data) 512 | 513 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 514 | if (res) { 515 | - if (!vop_data->lut_size) { 516 | - DRM_DEV_ERROR(dev, "no gamma LUT size defined\n"); 517 | + if (vop_data->lut_size != 1024 && vop_data->lut_size != 256) { 518 | + DRM_DEV_ERROR(dev, "unsupported gamma LUT size %d\n", vop_data->lut_size); 519 | return -EINVAL; 520 | } 521 | vop->lut_regs = devm_ioremap_resource(dev, res); 522 | 523 | From patchwork Tue Oct 19 21:58:43 2021 524 | Content-Type: text/plain; charset="utf-8" 525 | MIME-Version: 1.0 526 | Content-Transfer-Encoding: 7bit 527 | X-Patchwork-Submitter: Hugh Cole-Baker 528 | X-Patchwork-Id: 12571191 529 | Return-Path: 530 | 531 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 532 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 533 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 534 | by smtp.lore.kernel.org (Postfix) with ESMTP id 5D004C433EF 535 | for ; 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[82.69.107.165]) 599 | by smtp.gmail.com with ESMTPSA id s3sm178540wrm.40.2021.10.19.14.58.59 600 | (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); 601 | Tue, 19 Oct 2021 14:58:59 -0700 (PDT) 602 | From: Hugh Cole-Baker 603 | To: heiko@sntech.de, 604 | hjc@rock-chips.com 605 | Cc: dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, 606 | linux-arm-kernel@lists.infradead.org, ezequiel@collabora.com, 607 | Hugh Cole-Baker 608 | Subject: [PATCH v2 3/3] arm64: dts: rockchip: enable gamma control on RK3399 609 | Date: Tue, 19 Oct 2021 22:58:43 +0100 610 | Message-Id: <20211019215843.42718-4-sigmaris@gmail.com> 611 | X-Mailer: git-send-email 2.24.3 (Apple Git-128) 612 | In-Reply-To: <20211019215843.42718-1-sigmaris@gmail.com> 613 | References: <20211019215843.42718-1-sigmaris@gmail.com> 614 | MIME-Version: 1.0 615 | X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 616 | X-CRM114-CacheID: sfid-20211019_145901_757551_331C36C9 617 | X-CRM114-Status: GOOD ( 11.48 ) 618 | X-BeenThere: linux-arm-kernel@lists.infradead.org 619 | X-Mailman-Version: 2.1.34 620 | Precedence: list 621 | List-Id: 622 | List-Unsubscribe: 623 | , 624 | 625 | List-Archive: 626 | List-Post: 627 | List-Help: 628 | List-Subscribe: 629 | , 630 | 631 | Sender: "linux-arm-kernel" 632 | Errors-To: 633 | linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 634 | 635 | Define the memory region on RK3399 VOPs containing the gamma LUT at 636 | base+0x2000. 637 | 638 | Signed-off-by: Hugh Cole-Baker 639 | --- 640 | 641 | Changes from v1: no changes in this patch 642 | 643 | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- 644 | 1 file changed, 2 insertions(+), 2 deletions(-) 645 | 646 | diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi 647 | index 3871c7fd83b0..9cbf6ccdd256 100644 648 | --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 649 | +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi 650 | @@ -1619,7 +1619,7 @@ i2s2: i2s@ff8a0000 { 651 | 652 | vopl: vop@ff8f0000 { 653 | compatible = "rockchip,rk3399-vop-lit"; 654 | - reg = <0x0 0xff8f0000 0x0 0x3efc>; 655 | + reg = <0x0 0xff8f0000 0x0 0x2000>, <0x0 0xff8f2000 0x0 0x400>; 656 | interrupts = ; 657 | assigned-clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; 658 | assigned-clock-rates = <400000000>, <100000000>; 659 | @@ -1676,7 +1676,7 @@ vopl_mmu: iommu@ff8f3f00 { 660 | 661 | vopb: vop@ff900000 { 662 | compatible = "rockchip,rk3399-vop-big"; 663 | - reg = <0x0 0xff900000 0x0 0x3efc>; 664 | + reg = <0x0 0xff900000 0x0 0x2000>, <0x0 0xff902000 0x0 0x1000>; 665 | interrupts = ; 666 | assigned-clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; 667 | assigned-clock-rates = <400000000>, <100000000>; 668 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/0024-Bluetooth-btsdio-Do-not-bind-to-non-removable-BCM4345-and-BCM43455.patch: -------------------------------------------------------------------------------- 1 | From patchwork Wed Oct 20 13:00:22 2021 2 | Content-Type: text/plain; charset="utf-8" 3 | MIME-Version: 1.0 4 | Content-Transfer-Encoding: 7bit 5 | X-Patchwork-Submitter: Kyle Copperfield 6 | X-Patchwork-Id: 12572363 7 | Return-Path: 8 | X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on 9 | aws-us-west-2-korg-lkml-1.web.codeaurora.org 10 | Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) 11 | by smtp.lore.kernel.org (Postfix) with ESMTP id 84AE3C433F5 12 | for ; 13 | Wed, 20 Oct 2021 13:07:59 +0000 (UTC) 14 | Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) 15 | by mail.kernel.org (Postfix) with ESMTP id 66565601FF 16 | for ; 17 | Wed, 20 Oct 2021 13:07:59 +0000 (UTC) 18 | Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand 19 | id S230186AbhJTNKM (ORCPT 20 | ); 21 | Wed, 20 Oct 2021 09:10:12 -0400 22 | Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60884 "EHLO 23 | lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org 24 | with ESMTP id S229911AbhJTNKL (ORCPT 25 | ); 26 | Wed, 20 Oct 2021 09:10:11 -0400 27 | X-Greylist: delayed 384 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; 28 | Wed, 20 Oct 2021 06:07:56 PDT 29 | Received: from danwin1210.me (danwin1210.me [IPv6:2a01:4f8:c010:d56::1]) 30 | by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C46DC06161C; 31 | Wed, 20 Oct 2021 06:07:56 -0700 (PDT) 32 | Received: from danwin1210.me (unknown [10.9.0.3]) 33 | (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) 34 | key-exchange X448 server-signature ECDSA (P-384) server-digest SHA384 35 | client-signature ED448) 36 | (Client CN "danwin1210.me", Issuer "danwin1210.me" (verified OK)) 37 | by mail.danwin1210.me (Postfix) with ESMTPS id 22FFF1F43B; 38 | Wed, 20 Oct 2021 13:01:27 +0000 (UTC) 39 | Received: from prine.. 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a=ed25519-sha256; c=relaxed/relaxed; d=danwin1210.me; 63 | s=ed25519; t=1634734856; 64 | h=from:from:reply-to:subject:subject:date:date:message-id:message-id: 65 | to:to:cc:cc:mime-version:mime-version: 66 | content-transfer-encoding:content-transfer-encoding; 67 | bh=wvlKkaYQfmgd1AQPtmZAcpJC7xRHMNlCP4y6n6AzJL0=; 68 | b=O8J1B6BfYwKsfAF4l9yz6jR1z2rbSQ8qXrTbVJw0cc8NpkzyNa91JHvhmHKe6iNcEB7bvT 69 | bfcyMKJYcXIiS4AQ== 70 | From: Kyle Copperfield 71 | To: Marcel Holtmann , 72 | Johan Hedberg , 73 | Luiz Augusto von Dentz 74 | Cc: Kyle Copperfield , 75 | Dragan Simic , 76 | linux-bluetooth@vger.kernel.org, linux-kernel@vger.kernel.org 77 | Subject: [PATCH] Bluetooth: btsdio: Do not bind to non-removable BCM4345 and 78 | BCM43455 79 | Date: Wed, 20 Oct 2021 13:00:22 +0000 80 | Message-Id: <20211020130023.196651-1-kmcopper@danwin1210.me> 81 | MIME-Version: 1.0 82 | Precedence: bulk 83 | List-ID: 84 | X-Mailing-List: linux-bluetooth@vger.kernel.org 85 | 86 | BCM4345 and BCM43455 devices soldered onto the PCB (non-removable), 87 | use an UART connection for Bluetooth, such as in the Pinebook Pro, 88 | and the advertised btsdio support as an SDIO function is ignored. 89 | 90 | Reviewed-by: Dragan Simic 91 | Signed-off-by: Kyle Copperfield 92 | --- 93 | drivers/bluetooth/btsdio.c | 2 ++ 94 | 1 file changed, 2 insertions(+) 95 | 96 | diff --git a/drivers/bluetooth/btsdio.c b/drivers/bluetooth/btsdio.c 97 | index 199e8f7d426d..795be33f2892 100644 98 | --- a/drivers/bluetooth/btsdio.c 99 | +++ b/drivers/bluetooth/btsdio.c 100 | @@ -295,6 +295,8 @@ static int btsdio_probe(struct sdio_func *func, 101 | switch (func->device) { 102 | case SDIO_DEVICE_ID_BROADCOM_43341: 103 | case SDIO_DEVICE_ID_BROADCOM_43430: 104 | + case SDIO_DEVICE_ID_BROADCOM_4345: 105 | + case SDIO_DEVICE_ID_BROADCOM_43455: 106 | case SDIO_DEVICE_ID_BROADCOM_4356: 107 | return -ENODEV; 108 | } 109 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/60-linux.hook: -------------------------------------------------------------------------------- 1 | [Trigger] 2 | Type = File 3 | Operation = Install 4 | Operation = Upgrade 5 | Operation = Remove 6 | Target = usr/lib/modules/%KERNVER%/* 7 | Target = usr/lib/modules/%EXTRAMODULES%/* 8 | 9 | [Action] 10 | Description = Updating %PKGBASE% module dependencies... 11 | When = PostTransaction 12 | Exec = /usr/bin/depmod %KERNVER% 13 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/90-linux.hook: -------------------------------------------------------------------------------- 1 | [Trigger] 2 | Type = File 3 | Operation = Install 4 | Operation = Upgrade 5 | Target = boot/Image 6 | Target = usr/lib/initcpio/* 7 | 8 | [Action] 9 | Description = Updating %PKGBASE% initcpios... 10 | When = PostTransaction 11 | Exec = /usr/bin/mkinitcpio -p %PKGBASE% 12 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/PKGBUILD: -------------------------------------------------------------------------------- 1 | # ClockworkPI A06 (based on linux) 2 | # Maintainer: Dan Johansen 3 | # Contributor: Max Fierke 4 | # Contributor: Kevin Mihelich 5 | 6 | pkgbase=linux-clockworkpi-a06 7 | _srcname=linux-5.16 8 | _kernelname=${pkgbase#linux} 9 | _desc="Kernel for ClockworkPI A06" 10 | pkgver=5.16.2 11 | pkgrel=3 12 | arch=('aarch64') 13 | url="http://www.kernel.org/" 14 | license=('GPL2') 15 | makedepends=('xmlto' 'docbook-xsl' 'kmod' 'inetutils' 'bc' 'git' 'dtc') 16 | options=('!strip') 17 | groups=('clockworkpi-a06') 18 | source=("http://www.kernel.org/pub/linux/kernel/v5.x/${_srcname}.tar.xz" 19 | "http://www.kernel.org/pub/linux/kernel/v5.x/patch-${pkgver}.xz" 20 | '0001-net-smsc95xx-Allow-mac-address-to-be-set-as-a-parame.patch' 21 | '0023-drm-rockchip-support-gamma-control-on-RK3399.patch' # From list: https://patchwork.kernel.org/project/linux-arm-kernel/cover/20211019215843.42718-1-sigmaris@gmail.com/ 22 | '0024-Bluetooth-btsdio-Do-not-bind-to-non-removable-BCM4345-and-BCM43455.patch' # Applied in linux-next 23 | '0001-arm64-dts-clockworkpi-a06-dts.patch' # Potentially upstreamable, needs cleanup 24 | '0002-mfd-axp20x-add-clockworkpi-a06-power-support.patch' # Looks potentially incorrect. Probably not upstreamable 25 | '0004-gpu-drm-panel-add-cwd686-driver.patch' # Potentially upstreamable, needs cleanup 26 | '0005-video-backlight-add-ocp8178-driver.patch' # Potentially upstreamable, needs cleanup 27 | '0006-fix-rockchip-mipi-dsi-display-init-timeouts.patch' # Applied in linux-next 28 | 'config' 29 | 'linux.preset' 30 | '60-linux.hook' 31 | '90-linux.hook') 32 | md5sums=('e6680ce7c989a3efe58b51e3f3f0bf93' 33 | '3ce3933c25c9a589fb072b81894a8f7b' 34 | '9e6b7f44db105fef525d715213dce7cf' 35 | 'e2f08e3bc6d1b36e7000233abab1bfc7' 36 | 'a897b51be2d05ddb5b7b1a7a7f5a5205' 37 | 'eea25fcfce96e8d40c058883764903ce' 38 | 'fc826c917102f2f2d16690fe9322464f' 39 | 'f2577b39b1eda4a18b9111775843f83b' 40 | '3203d018422505068fc22b909df871aa' 41 | '873658be357da087e5bc4f8d3a1e9c8c' 42 | '2da3c5bf2816e598b547faa8b11ec498' 43 | '86d4a35722b5410e3b29fc92dae15d4b' 44 | 'ce6c81ad1ad1f8b333fd6077d47abdaf' 45 | '3dc88030a8f2f5a5f97266d99b149f77') 46 | 47 | prepare() { 48 | cd ${_srcname} 49 | 50 | # add upstream patch 51 | patch -Np1 -i "${srcdir}/patch-${pkgver}" 52 | 53 | # ALARM patches 54 | #patch -Np1 -i "${srcdir}/0001-net-smsc95xx-Allow-mac-address-to-be-set-as-a-parame.patch" #All 55 | 56 | # Manjaro ARM Patches 57 | patch -Np1 -i "${srcdir}/0023-drm-rockchip-support-gamma-control-on-RK3399.patch" #RK3399 58 | patch -Np1 -i "${srcdir}/0024-Bluetooth-btsdio-Do-not-bind-to-non-removable-BCM4345-and-BCM43455.patch" #Bluetooth 59 | 60 | # ClockworkPI DevTerm A06 patches 61 | patch -Np1 -i "${srcdir}/0001-arm64-dts-clockworkpi-a06-dts.patch" # DTS 62 | patch -Np1 -i "${srcdir}/0002-mfd-axp20x-add-clockworkpi-a06-power-support.patch" # Battery/Charger 63 | patch -Np1 -i "${srcdir}/0004-gpu-drm-panel-add-cwd686-driver.patch" # LCD 64 | patch -Np1 -i "${srcdir}/0005-video-backlight-add-ocp8178-driver.patch" # Backlight 65 | patch -Np1 -i "${srcdir}/0006-fix-rockchip-mipi-dsi-display-init-timeouts.patch" # Fix display suspend/resume 66 | 67 | cat "${srcdir}/config" > ./.config 68 | 69 | # add pkgrel to extraversion 70 | sed -ri "s|^(EXTRAVERSION =)(.*)|\1 \2-${pkgrel}|" Makefile 71 | 72 | # don't run depmod on 'make install'. We'll do this ourselves in packaging 73 | sed -i '2iexit 0' scripts/depmod.sh 74 | } 75 | 76 | build() { 77 | cd ${_srcname} 78 | 79 | # get kernel version 80 | make prepare 81 | 82 | # load configuration 83 | # Configure the kernel. Replace the line below with one of your choice. 84 | #make menuconfig # CLI menu for configuration 85 | #make nconfig # new CLI menu for configuration 86 | #make xconfig # X-based configuration 87 | #make oldconfig # using old config from previous kernel version 88 | # ... or manually edit .config 89 | make oldconfig 90 | 91 | # Copy back our configuration (use with new kernel version) 92 | #cp ./.config /var/tmp/${pkgbase}.config 93 | 94 | #################### 95 | # stop here 96 | # this is useful to configure the kernel 97 | #msg "Stopping build" 98 | #return 1 99 | #################### 100 | 101 | #yes "" | make config 102 | 103 | # build! 104 | unset LDFLAGS 105 | make ${MAKEFLAGS} Image modules 106 | # Generate device tree blobs with symbols to support applying device tree overlays in U-Boot 107 | make ${MAKEFLAGS} DTC_FLAGS="-@" dtbs 108 | } 109 | 110 | _package() { 111 | pkgdesc="The Linux Kernel and modules - ${_desc}" 112 | depends=('coreutils' 'linux-firmware' 'kmod' 'initramfs') 113 | optdepends=('crda: to set the correct wireless channels of your country') 114 | provides=('kernel26' "linux=${pkgver}") 115 | conflicts=('kernel26' 'linux', 'linux-armv8' 'linux-aarch64') 116 | replaces=() 117 | backup=("etc/mkinitcpio.d/${pkgbase}.preset") 118 | install=${pkgname}.install 119 | 120 | cd ${_srcname} 121 | 122 | KARCH=arm64 123 | 124 | # get kernel version 125 | _kernver="$(make kernelrelease)" 126 | _basekernel=${_kernver%%-*} 127 | _basekernel=${_basekernel%.*} 128 | 129 | mkdir -p "${pkgdir}"/{boot,usr/lib/modules} 130 | make INSTALL_MOD_PATH="${pkgdir}/usr" modules_install 131 | make INSTALL_DTBS_PATH="${pkgdir}/boot/dtbs" dtbs_install 132 | cp arch/$KARCH/boot/Image "${pkgdir}/boot" 133 | 134 | # make room for external modules 135 | local _extramodules="extramodules-${_basekernel}${_kernelname}" 136 | ln -s "../${_extramodules}" "${pkgdir}/usr/lib/modules/${_kernver}/extramodules" 137 | 138 | # add real version for building modules and running depmod from hook 139 | echo "${_kernver}" | 140 | install -Dm644 /dev/stdin "${pkgdir}/usr/lib/modules/${_extramodules}/version" 141 | 142 | # remove build and source links 143 | rm "${pkgdir}"/usr/lib/modules/${_kernver}/{source,build} 144 | 145 | # now we call depmod... 146 | depmod -b "${pkgdir}/usr" -F System.map "${_kernver}" 147 | 148 | 149 | # sed expression for following substitutions 150 | local _subst=" 151 | s|%PKGBASE%|${pkgbase}|g 152 | s|%KERNVER%|${_kernver}|g 153 | s|%EXTRAMODULES%|${_extramodules}|g 154 | " 155 | 156 | # install mkinitcpio preset file 157 | sed "${_subst}" ../linux.preset | 158 | install -Dm644 /dev/stdin "${pkgdir}/etc/mkinitcpio.d/${pkgbase}.preset" 159 | 160 | # install pacman hooks 161 | sed "${_subst}" ../60-linux.hook | 162 | install -Dm644 /dev/stdin "${pkgdir}/usr/share/libalpm/hooks/60-${pkgbase}.hook" 163 | sed "${_subst}" ../90-linux.hook | 164 | install -Dm644 /dev/stdin "${pkgdir}/usr/share/libalpm/hooks/90-${pkgbase}.hook" 165 | } 166 | 167 | _package-headers() { 168 | pkgdesc="Header files and scripts for building modules for linux kernel - ${_desc}" 169 | provides=("linux-headers=${pkgver}") 170 | conflicts=('linux-headers', 'linux-aarch64-headers') 171 | replaces=() 172 | 173 | cd ${_srcname} 174 | local _builddir="${pkgdir}/usr/lib/modules/${_kernver}/build" 175 | 176 | install -Dt "${_builddir}" -m644 Makefile .config Module.symvers 177 | install -Dt "${_builddir}/kernel" -m644 kernel/Makefile 178 | 179 | mkdir "${_builddir}/.tmp_versions" 180 | 181 | cp -t "${_builddir}" -a include scripts 182 | 183 | install -Dt "${_builddir}/arch/${KARCH}" -m644 arch/${KARCH}/Makefile 184 | install -Dt "${_builddir}/arch/${KARCH}/kernel" -m644 arch/${KARCH}/kernel/asm-offsets.s 185 | install -Dt "${_builddir}" -m644 vmlinux 186 | 187 | cp -t "${_builddir}/arch/${KARCH}" -a arch/${KARCH}/include 188 | mkdir -p "${_builddir}/arch/arm" 189 | cp -t "${_builddir}/arch/arm" -a arch/arm/include 190 | 191 | install -Dt "${_builddir}/drivers/md" -m644 drivers/md/*.h 192 | install -Dt "${_builddir}/net/mac80211" -m644 net/mac80211/*.h 193 | 194 | # http://bugs.archlinux.org/task/13146 195 | install -Dt "${_builddir}/drivers/media/i2c" -m644 drivers/media/i2c/msp3400-driver.h 196 | 197 | # http://bugs.archlinux.org/task/20402 198 | install -Dt "${_builddir}/drivers/media/usb/dvb-usb" -m644 drivers/media/usb/dvb-usb/*.h 199 | install -Dt "${_builddir}/drivers/media/dvb-frontends" -m644 drivers/media/dvb-frontends/*.h 200 | install -Dt "${_builddir}/drivers/media/tuners" -m644 drivers/media/tuners/*.h 201 | 202 | # add xfs and shmem for aufs building 203 | mkdir -p "${_builddir}"/{fs/xfs,mm} 204 | 205 | # copy in Kconfig files 206 | find . -name Kconfig\* -exec install -Dm644 {} "${_builddir}/{}" \; 207 | 208 | # remove unneeded architectures 209 | local _arch 210 | for _arch in "${_builddir}"/arch/*/; do 211 | [[ ${_arch} == */${KARCH}/ || ${_arch} == */arm/ ]] && continue 212 | rm -r "${_arch}" 213 | done 214 | 215 | # remove documentation files 216 | rm -r "${_builddir}/Documentation" 217 | 218 | # remove now broken symlinks 219 | find -L "${_builddir}" -type l -printf 'Removing %P\n' -delete 220 | 221 | # strip scripts directory 222 | local file 223 | while read -rd '' file; do 224 | case "$(file -bi "$file")" in 225 | application/x-sharedlib\;*) # Libraries (.so) 226 | strip $STRIP_SHARED "$file" ;; 227 | application/x-archive\;*) # Libraries (.a) 228 | strip $STRIP_STATIC "$file" ;; 229 | application/x-executable\;*) # Binaries 230 | strip $STRIP_BINARIES "$file" ;; 231 | application/x-pie-executable\;*) # Relocatable binaries 232 | strip $STRIP_SHARED "$file" ;; 233 | esac 234 | done < <(find "${_builddir}" -type f -perm -u+x ! -name vmlinux -print0 2>/dev/null) 235 | strip $STRIP_STATIC "${_builddir}/vmlinux" 236 | 237 | # remove unwanted files 238 | find ${_builddir} -name '*.orig' -delete 239 | } 240 | 241 | pkgname=("${pkgbase}" "${pkgbase}-headers") 242 | for _p in ${pkgname[@]}; do 243 | eval "package_${_p}() { 244 | _package${_p#${pkgbase}} 245 | }" 246 | done 247 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/linux-clockworkpi-a06.install: -------------------------------------------------------------------------------- 1 | post_install() { 2 | # Add modules to mkinitcpio 3 | if grep -Fxq "MODULES=()" "/etc/mkinitcpio.conf"; then 4 | echo 'Updating mkinitcpio.conf with required modules' 5 | sed -i 's/MODULES=()/MODULES=(rtc_rk808 rockchipdrm panel_cwd686 ocp8178_bl)/g' /etc/mkinitcpio.conf 6 | mkinitcpio -p linux-clockworkpi-a06 7 | else 8 | echo 'Could not automatically update /etc/mkinitcpio.conf with required modules' 9 | echo 'Please add the following modules to MODULES:' 10 | echo ' rtc_rk808 rockchipdrm panel_cwd686 ocp8178_bl' 11 | echo 'Then run:' 12 | echo ' mkinitcpio -p linux-clockworkpi-a06' 13 | echo 'You will need to change these back manually if you uninstall this kernel' 14 | fi 15 | } 16 | 17 | post_upgrade() { 18 | if findmnt --fstab -uno SOURCE /boot &>/dev/null && ! mountpoint -q /boot; then 19 | echo "WARNING: /boot appears to be a separate partition but is not mounted." 20 | fi 21 | } 22 | 23 | post_remove() { 24 | rm -f boot/initramfs-linux.img 25 | rm -f boot/initramfs-linux-fallback.img 26 | 27 | # Change back mkinitcpio 28 | echo 'Undoing mkinitcpio module changes' 29 | sed -i 's/MODULES=(rtc_rk808 rockchipdrm panel_cwd686 ocp8178_bl)/MODULES=()/g' /etc/mkinitcpio.conf 30 | } 31 | -------------------------------------------------------------------------------- /linux-clockworkpi-a06/linux.preset: -------------------------------------------------------------------------------- 1 | # mkinitcpio preset file for the '%PKGBASE%' package 2 | 3 | ALL_config="/etc/mkinitcpio.conf" 4 | ALL_kver="%KERNVER%" 5 | 6 | PRESETS=('default') 7 | 8 | #default_config="/etc/mkinitcpio.conf" 9 | default_image="/boot/initramfs-linux.img" 10 | #default_options="" 11 | -------------------------------------------------------------------------------- /networking-clockworkpi-a06/PKGBUILD: -------------------------------------------------------------------------------- 1 | # ClockworkPi DevTerm A06 Networking Fix for BRCM43456 2 | # Maintainer: Cole Smith 3 | 4 | pkgname=networking-clockworkpi-a06 5 | pkgver=1.0 6 | pkgrel=1 7 | pkgdesc="ClockworkPi DevTerm A06 Networking" 8 | arch=('any') 9 | url="https://github.com/armbian/firmware" 10 | license=('LGPLv2') 11 | depends=() 12 | groups=('clockworkpi-a06') 13 | source=("https://github.com/armbian/firmware/raw/master/brcm/brcmfmac43456-sdio.txt" 14 | "https://github.com/armbian/firmware/raw/master/brcm/brcmfmac43456-sdio.bin" 15 | "https://github.com/armbian/firmware/raw/master/brcm/BCM4345C5.hcd") 16 | md5sums=('046a0d584bab0d2f774ba9f722a175f9' 17 | 'f77e38b143174bae5f91be2bd27a7d3f' 18 | 'fc394331d03baa5847e2b5de94ffbc9b') 19 | 20 | package() { 21 | install -Dm755 "brcmfmac43456-sdio.txt" "$pkgdir/usr/lib/firmware/brcm/brcmfmac43456-sdio.txt" 22 | install -Dm755 "brcmfmac43456-sdio.bin" "$pkgdir/usr/lib/firmware/brcm/brcmfmac43456-sdio.bin" 23 | 24 | install -Dm755 "brcmfmac43456-sdio.bin" "$pkgdir/usr/lib/firmware/brcm/brcmfmac43456-sdio.clockwork,devterm-a06.bin" 25 | install -Dm755 "brcmfmac43456-sdio.txt" "$pkgdir/usr/lib/firmware/brcm/brcmfmac43456-sdio.clockwork,devterm-a06.txt" 26 | 27 | install -Dm755 "BCM4345C5.hcd" "$pkgdir/usr/lib/firmware/brcm/BCM4345C5.hcd" 28 | } 29 | -------------------------------------------------------------------------------- /uboot-clockworkpi-a06/0001-uboot-clockworkpi-a06.patch: -------------------------------------------------------------------------------- 1 | diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile 2 | index fc16a57e..8729c8e2 100644 3 | --- a/arch/arm/dts/Makefile 4 | +++ b/arch/arm/dts/Makefile 5 | @@ -121,6 +121,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \ 6 | rk3368-px5-evb.dtb \ 7 | 8 | dtb-$(CONFIG_ROCKCHIP_RK3399) += \ 9 | + rk3399-clockworkpi-a06.dtb \ 10 | rk3399-evb.dtb \ 11 | rk3399-ficus.dtb \ 12 | rk3399-firefly.dtb \ 13 | diff --git a/arch/arm/dts/rk3399-clockworkpi-a06-u-boot.dtsi b/arch/arm/dts/rk3399-clockworkpi-a06-u-boot.dtsi 14 | new file mode 100644 15 | index 00000000..495573e0 16 | --- /dev/null 17 | +++ b/arch/arm/dts/rk3399-clockworkpi-a06-u-boot.dtsi 18 | @@ -0,0 +1,24 @@ 19 | +// SPDX-License-Identifier: GPL-2.0+ 20 | + 21 | +#include "rk3399-u-boot.dtsi" 22 | +#include "rk3399-sdram-lpddr4-100.dtsi" 23 | + 24 | +/ { 25 | + chosen { 26 | + stdout-path = "serial2:1500000n8"; 27 | + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; 28 | + }; 29 | +}; 30 | + 31 | +&i2c0 { 32 | + u-boot,dm-pre-reloc; 33 | +}; 34 | + 35 | +&rk808 { 36 | + u-boot,dm-pre-reloc; 37 | +}; 38 | + 39 | +&sdmmc { 40 | + u-boot,dm-pre-reloc; 41 | +}; 42 | + 43 | diff --git a/arch/arm/dts/rk3399-clockworkpi-a06.dts b/arch/arm/dts/rk3399-clockworkpi-a06.dts 44 | new file mode 100644 45 | index 00000000..8357d05f 46 | --- /dev/null 47 | +++ b/arch/arm/dts/rk3399-clockworkpi-a06.dts 48 | @@ -0,0 +1,163 @@ 49 | +/* 50 | + * (C) Copyright 2016 Rockchip Electronics Co., Ltd 51 | + * 52 | + * SPDX-License-Identifier: GPL-2.0+ 53 | + */ 54 | + 55 | +/dts-v1/; 56 | +#include 57 | +#include 58 | +#include "rk3399.dtsi" 59 | +#include "rk3399-opp.dtsi" 60 | + 61 | +/ { 62 | + model = "Clockworkpi A06"; 63 | + compatible = "clockwork,devterm-a06", "rockchip,rk3399"; 64 | + 65 | + chosen { 66 | + stdout-path = "serial2:1500000n8"; 67 | + }; 68 | + 69 | + vdd_center: vdd-center { 70 | + compatible = "pwm-regulator"; 71 | + pwms = <&pwm3 0 25000 1>; 72 | + regulator-name = "vdd_center"; 73 | + regulator-min-microvolt = <800000>; 74 | + regulator-max-microvolt = <1400000>; 75 | + regulator-init-microvolt = <950000>; 76 | + regulator-always-on; 77 | + regulator-boot-on; 78 | + status = "okay"; 79 | + }; 80 | + 81 | + vccsys: vccsys { 82 | + compatible = "regulator-fixed"; 83 | + regulator-name = "vccsys"; 84 | + regulator-boot-on; 85 | + regulator-always-on; 86 | + }; 87 | + 88 | + vcc3v3_sys: vcc3v3-sys { 89 | + compatible = "regulator-fixed"; 90 | + regulator-name = "vcc3v3_sys"; 91 | + regulator-always-on; 92 | + regulator-boot-on; 93 | + regulator-min-microvolt = <3300000>; 94 | + regulator-max-microvolt = <3300000>; 95 | + }; 96 | + 97 | + vcc_phy: vcc-phy-regulator { 98 | + compatible = "regulator-fixed"; 99 | + regulator-name = "vcc_phy"; 100 | + regulator-always-on; 101 | + regulator-boot-on; 102 | + }; 103 | + 104 | + vcc5v0_host: vcc5v0-host-en { 105 | + compatible = "regulator-fixed"; 106 | + regulator-name = "vcc5v0_host"; 107 | + gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 108 | + }; 109 | + 110 | + vcc5v0_typec0: vcc5v0-typec0-en { 111 | + compatible = "regulator-fixed"; 112 | + regulator-name = "vcc5v0_typec0"; 113 | + gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; 114 | + }; 115 | + 116 | + vcc5v0_typec1: vcc5v0-typec1-en { 117 | + compatible = "regulator-fixed"; 118 | + regulator-name = "vcc5v0_typec1"; 119 | + gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; 120 | + }; 121 | + 122 | + clkin_gmac: external-gmac-clock { 123 | + compatible = "fixed-clock"; 124 | + clock-frequency = <125000000>; 125 | + clock-output-names = "clkin_gmac"; 126 | + #clock-cells = <0>; 127 | + }; 128 | + 129 | +}; 130 | + 131 | +&saradc { 132 | + status = "okay"; 133 | +}; 134 | + 135 | +&sdmmc { 136 | + bus-width = <4>; 137 | + status = "okay"; 138 | +}; 139 | + 140 | +&sdhci { 141 | + bus-width = <8>; 142 | + mmc-hs400-1_8v; 143 | + mmc-hs400-enhanced-strobe; 144 | + non-removable; 145 | + status = "okay"; 146 | +}; 147 | + 148 | +&uart2 { 149 | + status = "okay"; 150 | +}; 151 | + 152 | +&usb_host0_ehci { 153 | + status = "okay"; 154 | +}; 155 | + 156 | +&usb_host0_ohci { 157 | + status = "okay"; 158 | +}; 159 | + 160 | +&usb_host1_ehci { 161 | + status = "okay"; 162 | +}; 163 | + 164 | +&usb_host1_ohci { 165 | + status = "okay"; 166 | +}; 167 | + 168 | +&i2c0 { 169 | + status = "okay"; 170 | + clock-frequency = <400000>; 171 | + i2c-scl-falling-time-ns = <50>; 172 | + i2c-scl-rising-time-ns = <100>; 173 | + 174 | + rk808: pmic@1b { 175 | + compatible = "rockchip,rk808"; 176 | + clock-output-names = "xin32k", "wifibt_32kin"; 177 | + interrupt-parent = <&gpio0>; 178 | + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 179 | + pinctrl-names = "default"; 180 | + pinctrl-0 = <&pmic_int_l>; 181 | + reg = <0x1b>; 182 | + rockchip,system-power-controller; 183 | + #clock-cells = <1>; 184 | + status = "okay"; 185 | + 186 | + vcc12-supply = <&vcc3v3_sys>; 187 | + 188 | + regulators { 189 | + vcc33_lcd: SWITCH_REG2 { 190 | + regulator-always-on; 191 | + regulator-boot-on; 192 | + regulator-name = "vcc33_lcd"; 193 | + }; 194 | + }; 195 | + }; 196 | +}; 197 | + 198 | +&pinctrl { 199 | + pmic { 200 | + pmic_int_l: pmic-int-l { 201 | + rockchip,pins = 202 | + <1 21 RK_FUNC_GPIO &pcfg_pull_up>; 203 | + }; 204 | + 205 | + pmic_dvs2: pmic-dvs2 { 206 | + rockchip,pins = 207 | + <1 18 RK_FUNC_GPIO &pcfg_pull_down>; 208 | + }; 209 | + }; 210 | +}; 211 | + 212 | diff --git a/configs/clockworkpi-a06-rk3399_defconfig b/configs/clockworkpi-a06-rk3399_defconfig 213 | new file mode 100644 214 | index 00000000..826139c1 215 | --- /dev/null 216 | +++ b/configs/clockworkpi-a06-rk3399_defconfig 217 | @@ -0,0 +1,54 @@ 218 | +CONFIG_ARM=y 219 | +CONFIG_ARCH_ROCKCHIP=y 220 | +CONFIG_SYS_TEXT_BASE=0x00200000 221 | +CONFIG_NR_DRAM_BANKS=1 222 | +CONFIG_ENV_OFFSET=0x3F8000 223 | +CONFIG_ROCKCHIP_RK3399=y 224 | +CONFIG_TARGET_EVB_RK3399=y 225 | +CONFIG_DEBUG_UART_BASE=0xFF1A0000 226 | +CONFIG_DEBUG_UART_CLOCK=24000000 227 | +CONFIG_DEFAULT_DEVICE_TREE="rk3399-clockworkpi-a06" 228 | +CONFIG_DEBUG_UART=y 229 | +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-clockworkpi-a06.dtb" 230 | +CONFIG_MISC_INIT_R=y 231 | +# CONFIG_DISPLAY_CPUINFO is not set 232 | +CONFIG_DISPLAY_BOARDINFO_LATE=y 233 | +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set 234 | +CONFIG_SPL_STACK_R=y 235 | +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 236 | +CONFIG_TPL=y 237 | +CONFIG_CMD_BOOTZ=y 238 | +CONFIG_CMD_GPT=y 239 | +CONFIG_CMD_MMC=y 240 | +CONFIG_CMD_USB=y 241 | +# CONFIG_CMD_SETEXPR is not set 242 | +CONFIG_CMD_TIME=y 243 | +CONFIG_SPL_OF_CONTROL=y 244 | +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" 245 | +CONFIG_ENV_IS_IN_MMC=y 246 | +CONFIG_SYS_RELOC_GD_ENV_ADDR=y 247 | +CONFIG_ROCKCHIP_GPIO=y 248 | +CONFIG_SYS_I2C_ROCKCHIP=y 249 | +CONFIG_MMC_DW=y 250 | +CONFIG_MMC_DW_ROCKCHIP=y 251 | +CONFIG_MMC_SDHCI=y 252 | +CONFIG_MMC_SDHCI_ROCKCHIP=y 253 | +CONFIG_PMIC_RK8XX=y 254 | +CONFIG_REGULATOR_RK8XX=y 255 | +CONFIG_RAM_RK3399_LPDDR4=y 256 | +CONFIG_RAM_ROCKCHIP_DEBUG=y 257 | +CONFIG_BAUDRATE=1500000 258 | +CONFIG_DEBUG_UART_SHIFT=2 259 | +CONFIG_SYSRESET=y 260 | +CONFIG_USB=y 261 | +CONFIG_USB_XHCI_HCD=y 262 | +CONFIG_USB_XHCI_DWC3=y 263 | +CONFIG_USB_EHCI_HCD=y 264 | +CONFIG_USB_EHCI_GENERIC=y 265 | +CONFIG_USB_KEYBOARD=y 266 | +CONFIG_DM_VIDEO=y 267 | +CONFIG_DISPLAY=y 268 | +CONFIG_VIDEO_ROCKCHIP=y 269 | +CONFIG_DISPLAY_ROCKCHIP_HDMI=y 270 | +CONFIG_SPL_TINY_MEMSET=y 271 | +CONFIG_ERRNO_STR=y 272 | -------------------------------------------------------------------------------- /uboot-clockworkpi-a06/PKGBUILD: -------------------------------------------------------------------------------- 1 | # U-Boot: ClockworkPI A06 based on PKGBUILD for RockPro64 2 | # Maintainer: Dan Johansen 3 | # Contributor: Max Fierke 4 | # Contributor: Michael Gollnick 5 | # Contributor: Kevin Mihelich 6 | # Contributor: Adam 7 | 8 | pkgname=uboot-clockworkpi-a06 9 | pkgver=2021.10 10 | pkgrel=3 11 | _tfaver=2.6 12 | pkgdesc="U-Boot for ClockworkPI A06" 13 | arch=('aarch64') 14 | url='http://www.denx.de/wiki/U-Boot/WebHome' 15 | license=('GPL') 16 | makedepends=('git' 'dtc' 'bc') 17 | provides=('uboot') 18 | conflicts=('uboot') 19 | install=${pkgname}.install 20 | groups=('clockworkpi-a06') 21 | source=("https://ftp.denx.de/pub/u-boot/u-boot-${pkgver/rc/-rc}.tar.bz2" 22 | "https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/snapshot/trusted-firmware-a-$_tfaver.tar.gz" 23 | "0001-uboot-clockworkpi-a06.patch") 24 | sha256sums=('cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4' 25 | '4e59f02ccb042d5d18c89c849701b96e6cf4b788709564405354b5d313d173f7' 26 | '64fe6b045a5379a6562b28884c66523b45cc51c1cc093a50a0b98ec5c091769b') 27 | 28 | prepare() { 29 | cd u-boot-${pkgver/rc/-rc} 30 | patch -Np1 -i "${srcdir}/0001-uboot-clockworkpi-a06.patch" 31 | } 32 | 33 | build() { 34 | # Avoid build warnings by editing a .config option in place instead of 35 | # appending an option to .config, if an option is already present 36 | update_config() { 37 | if ! grep -q "^$1=$2$" .config; then 38 | if grep -q "^# $1 is not set$" .config; then 39 | sed -i -e "s/^# $1 is not set$/$1=$2/g" .config 40 | elif grep -q "^$1=" .config; then 41 | sed -i -e "s/^$1=.*/$1=$2/g" .config 42 | else 43 | echo "$1=$2" >> .config 44 | fi 45 | fi 46 | } 47 | 48 | unset CFLAGS CXXFLAGS CPPFLAGS LDFLAGS 49 | 50 | cd trusted-firmware-a-$_tfaver 51 | 52 | echo -e "\nBuilding TF-A for ClockworkPI A06...\n" 53 | make PLAT=rk3399 54 | cp build/rk3399/release/bl31/bl31.elf ../u-boot-${pkgver/rc/-rc} 55 | 56 | cd ../u-boot-${pkgver/rc/-rc} 57 | 58 | echo -e "\nBuilding U-Boot for ClockworkPI A06...\n" 59 | make clockworkpi-a06-rk3399_defconfig 60 | 61 | update_config 'CONFIG_IDENT_STRING' '" Arch Linux ARM"' 62 | update_config 'CONFIG_OF_LIBFDT_OVERLAY' 'y' 63 | make EXTRAVERSION=-${pkgrel} 64 | } 65 | 66 | package() { 67 | cd u-boot-${pkgver/rc/-rc} 68 | 69 | mkdir -p "${pkgdir}/boot/extlinux" 70 | 71 | install -D -m 0644 idbloader.img u-boot.itb -t "${pkgdir}/boot" 72 | } 73 | -------------------------------------------------------------------------------- /uboot-clockworkpi-a06/uboot-clockworkpi-a06.install: -------------------------------------------------------------------------------- 1 | notice_uboot() { 2 | echo "New version of U-Boot firmware can be flashed to your microSD card (mmcblk1)" 3 | echo "or eMMC module (mmcblk2). You can do that by running:" 4 | echo "# dd if=/boot/idbloader.img of=/dev/mmcblkX seek=64 conv=notrunc,fsync" 5 | echo "# dd if=/boot/u-boot.itb of=/dev/mmcblkX seek=16384 conv=notrunc,fsync" 6 | } 7 | 8 | create_config() { 9 | mkdir -p /boot/extlinux 10 | echo "LABEL Arch ARM 11 | KERNEL /boot/Image 12 | FDT /boot/dtbs/rockchip/rk3399-clockworkpi-a06.dtb 13 | APPEND initrd=/boot/initramfs-linux.img console=ttyS2,1500000 root=LABEL=ROOT_ARCH rw rootwait audit=0" \ 14 | > /boot/extlinux/extlinux.conf 15 | } 16 | 17 | post_install() { 18 | notice_uboot 19 | if [ -f /boot/extlinux/extlinux.conf.pacsave ]; then 20 | mv /boot/extlinux/extlinux.conf.pacsave /boot/extlinux/extlinux.conf 21 | fi 22 | if [ -f /boot/extlinux/extlinux.conf ]; then 23 | echo "Keeping old extlinux.conf file..." 24 | else 25 | create_config 26 | fi 27 | } 28 | 29 | post_upgrade() { 30 | notice_uboot 31 | if [ -f /boot/extlinux/extlinux.conf.pacsave ]; then 32 | mv /boot/extlinux/extlinux.conf.pacsave /boot/extlinux/extlinux.conf 33 | fi 34 | if [ -f /boot/extlinux/extlinux.conf ]; then 35 | echo "Keeping old extlinux.conf file..." 36 | else 37 | create_config 38 | fi 39 | } 40 | -------------------------------------------------------------------------------- /wiringpi-clockworkpi/PKGBUILD: -------------------------------------------------------------------------------- 1 | # Maintainer: lonewsk 2 | pkgname=wiringpi-clockworkpi 3 | pkgver=109.11d3247 4 | pkgrel=1 5 | pkgdesc="Arduino wiring-like library written in C for RaspberryPi." 6 | url="http://wiringpi.com/" 7 | arch=('aarch64') 8 | license=('LGPL3') 9 | makedepends=('git' 'wiringpi') 10 | conflicts=('wiringpi') 11 | source=('git://github.com/clockworkpi/DevTerm') 12 | md5sums=('SKIP') 13 | 14 | pkgver() { 15 | cd $srcdir/DevTerm/Code/devterm_wiringpi_cpi 16 | echo $(git rev-list --count HEAD).$(git rev-parse --short HEAD) 17 | } 18 | prepare() { 19 | cd $srcdir/DevTerm/Code/devterm_wiringpi_cpi/wiringPi 20 | sed -i 's/-fPIC/-fPIC -fcommon /g' Makefile 21 | } 22 | package() { 23 | msg2 "Creating skeleton dirs..." 24 | mkdir -p "${pkgdir}"/{usr/lib,usr/bin} 25 | cd $srcdir/DevTerm/Code/devterm_wiringpi_cpi 26 | sed -i 's|$sudo make uninstall||g' build 27 | sed -i "s| make| make DESTDIR=\"${pkgdir}/usr\" PREFIX=\"\" LDCONFIG=\"\"|g" build 28 | msg2 "Running wiringPi build/package script..." 29 | export WIRINGPI_SUDO='' 30 | ./build 31 | install -Dm644 COPYING.LESSER "${pkgdir}/usr/share/licenses/${pkgname}/COPYING.LESSER" 32 | } 33 | --------------------------------------------------------------------------------