├── LICENSE ├── README.md ├── spi_clgen.v ├── spi_clgen_tb.v ├── spi_defines.v ├── spi_shift_reg.v ├── spi_shift_reg_tb.v ├── spi_slave.v ├── spi_top.v ├── tb.v └── wishbone_master.v /LICENSE: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/LICENSE -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/README.md -------------------------------------------------------------------------------- /spi_clgen.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_clgen.v -------------------------------------------------------------------------------- /spi_clgen_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_clgen_tb.v -------------------------------------------------------------------------------- /spi_defines.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_defines.v -------------------------------------------------------------------------------- /spi_shift_reg.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_shift_reg.v -------------------------------------------------------------------------------- /spi_shift_reg_tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_shift_reg_tb.v -------------------------------------------------------------------------------- /spi_slave.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_slave.v -------------------------------------------------------------------------------- /spi_top.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/spi_top.v -------------------------------------------------------------------------------- /tb.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/tb.v -------------------------------------------------------------------------------- /wishbone_master.v: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/daringpatil3134/SPI_Serial_Peripheral_Interface_Verilog_Modules/HEAD/wishbone_master.v --------------------------------------------------------------------------------