├── .gitignore ├── .vscode ├── c_cpp_properties.json ├── launch.json └── settings.json ├── README.md ├── hardware ├── LH154Q01.kicad_sch ├── SSD2828.kicad_sch ├── SSD2828.kicad_sch-bak ├── VS035ZSM.kicad_sch ├── bom │ └── ibom.html ├── fp-info-cache ├── fp-lib-table ├── gerbers.zip ├── gerbers │ ├── ssd2828_board-B_Cu.gbl │ ├── ssd2828_board-B_Mask.gbs │ ├── ssd2828_board-B_Paste.gbp │ ├── ssd2828_board-B_Silkscreen.gbo │ ├── ssd2828_board-Edge_Cuts.gm1 │ ├── ssd2828_board-F_Cu.gtl │ ├── ssd2828_board-F_Mask.gts │ ├── ssd2828_board-F_Paste.gtp │ ├── ssd2828_board-F_Silkscreen.gto │ ├── ssd2828_board-In1_Cu.g2 │ ├── ssd2828_board-In2_Cu.g3 │ ├── ssd2828_board-NPTH-drl_map.gbr │ ├── ssd2828_board-NPTH.drl │ ├── ssd2828_board-PTH-drl_map.gbr │ └── ssd2828_board-PTH.drl ├── libs │ ├── C2797218 │ │ ├── C2797218.3dshapes │ │ │ └── FPC-SMD_KH-FG0.5-H2.0-34PIN.wrl │ │ ├── C2797218.kicad_sym │ │ └── C2797218.pretty │ │ │ └── FPC-SMD_KH-FG0.5-H2.0-34PIN.kicad_mod │ ├── C602016 │ │ ├── C602016.3dshapes │ │ │ └── IND-SMD_L2.5-W2.0_FHD252012S-6R8MT.wrl │ │ ├── C602016.kicad_sym │ │ └── C602016.pretty │ │ │ └── IND-SMD_L2.5-W2.0_FHD252012S-6R8MT.kicad_mod │ ├── C98354 │ │ ├── C98354.3dshapes │ │ │ └── IND-SMD_L2.5-W2.0-H1.2-252012.wrl │ │ ├── C98354.kicad_sym │ │ └── C98354.pretty │ │ │ └── IND-SMD_L2.5-W2.0_WPN252012H.kicad_mod │ ├── SamacSys │ │ ├── SamacSys_Parts.3dshapes │ │ │ ├── 105162-0001.stp │ │ │ ├── 19705-4001.stp │ │ │ ├── 205863050104.igs │ │ │ ├── 205863050104.stp │ │ │ ├── 205863050104_new.iges │ │ │ ├── 205863050104_new.step │ │ │ ├── 245863050104829+.stp │ │ │ ├── 503548-1220.stp │ │ │ ├── 503548-1220_new.step │ │ │ ├── AD5227BUJZ10-RL7.stp │ │ │ ├── ADC081S021CIMF_NOPB.stp │ │ │ ├── ASPI-0312FS-100M-T2.stp │ │ │ ├── ASPI-0628-4R7M-T1.stp │ │ │ ├── BTA24-600BWRG.stp │ │ │ ├── CUS10S40,H3F.stp │ │ │ ├── ES1D-13-F.stp │ │ │ ├── FH35C-25S-0.3SHW_50_.stp │ │ │ ├── INA180A3IDBVR.stp │ │ │ ├── MIC5501-3.0YM5-TR.stp │ │ │ ├── MP2315GJ-Z.stp │ │ │ ├── NE555DR.stp │ │ │ ├── NRH2410T2R2MN.stp │ │ │ ├── NRS2012T4R7MGJ.stp │ │ │ ├── S380.stp │ │ │ ├── S8411-45R.stp │ │ │ ├── TLV62568DBVR.stp │ │ │ ├── TPS65131TRGERQ1.stp │ │ │ └── XT30PW-F.stp │ │ ├── SamacSys_Parts.dcm │ │ ├── SamacSys_Parts.kicad_sym │ │ ├── SamacSys_Parts.lib │ │ └── SamacSys_Parts.pretty │ │ │ ├── 105162-0001.kicad_mod │ │ │ ├── 245863050104829.kicad_mod │ │ │ ├── 5035481220.kicad_mod │ │ │ ├── ASPI0312FS100MT2.kicad_mod │ │ │ ├── ASPI06284R7MT1.kicad_mod │ │ │ ├── CUS10S40H3F.kicad_mod │ │ │ ├── DIOM5226X240N.kicad_mod │ │ │ ├── FH35C25S03SHW50.kicad_mod │ │ │ ├── NE555DR.kicad_mod │ │ │ ├── NRH2410T2R2MN.kicad_mod │ │ │ ├── NRS2012T4R7MGJ.kicad_mod │ │ │ ├── QFN50P400X400X100-25N-D.kicad_mod │ │ │ ├── S8411-45R_1.kicad_mod │ │ │ ├── SOP254P650X170-4N.kicad_mod │ │ │ ├── SOT65P280X100-8L.kicad_mod │ │ │ ├── SOT65P280X100-8N.kicad_mod │ │ │ ├── SOT95P280X145-5N.kicad_mod │ │ │ ├── SOT95P280X145-6N.kicad_mod │ │ │ ├── TO255P460X1020X2005-3P.kicad_mod │ │ │ └── XT30PWF.kicad_mod │ ├── mylib │ │ └── mylib.pretty │ │ │ ├── FPC_34.kicad_mod │ │ │ └── myTestpoint.kicad_mod │ └── ssd2828 │ │ └── ssd2828.kicad_sym ├── schematics.pdf ├── ssd2828_board.kicad_dru ├── ssd2828_board.kicad_pcb ├── ssd2828_board.kicad_prl ├── ssd2828_board.kicad_pro ├── ssd2828_board.kicad_sch ├── sym-lib-table └── untitled.kicad_sch ├── imgs ├── 3D.png ├── IMG_5381.JPG ├── IMG_5384.JPG └── IMG_5390.JPG └── software ├── Makefile ├── STM32F401.svd ├── libs ├── delay.c ├── delay.h ├── spi.c └── spi.h ├── src ├── DCS.h ├── LH154Q01.c ├── LH154Q01.h ├── VS035ZSM.c ├── VS035ZSM.h ├── clk.c ├── clk.h ├── main.c ├── ssd2828.c └── ssd2828.h └── system ├── STM32F401CCUX_FLASH.ld ├── cachel1_armv7.h ├── cmsis_armcc.h ├── cmsis_armclang.h ├── cmsis_armclang_ltm.h ├── cmsis_compiler.h ├── cmsis_gcc.h ├── cmsis_iccarm.h ├── cmsis_version.h ├── core_armv81mml.h ├── core_armv8mbl.h ├── core_armv8mml.h ├── core_cm0.h ├── core_cm0plus.h ├── core_cm1.h ├── core_cm23.h ├── core_cm3.h ├── core_cm33.h ├── core_cm35p.h ├── core_cm4.h ├── core_cm55.h ├── core_cm7.h ├── core_cm85.h ├── core_sc000.h ├── core_sc300.h ├── core_starmc1.h ├── mpu_armv7.h ├── mpu_armv8.h ├── pac_armv81.h ├── pmu_armv8.h ├── startup_stm32f401xc.s ├── stm32f401xc.h ├── stm32f4xx.h ├── system_stm32f4xx.c ├── system_stm32f4xx.h └── tz_context.h /.gitignore: -------------------------------------------------------------------------------- 1 | #kicad files 2 | # export files for BOM 3 | *.csv 4 | *.tsv 5 | *.xml 6 | # backup files 7 | *.bak 8 | /hardware/ssd2828_board-backups/* 9 | 10 | # Temporary files 11 | *.000 12 | *.bak 13 | *.bck 14 | *.kicad_pcb-bak 15 | *.kicad_sch-bak 16 | *-backups 17 | *.kicad_prl 18 | *.sch-bak 19 | *~ 20 | _autosave-* 21 | *.tmp 22 | *-save.pro 23 | *-save.kicad_pcb 24 | fp-info-cache 25 | 26 | # Netlist files (exported from Eeschema) 27 | *.net 28 | 29 | # Autorouter files (exported from Pcbnew) 30 | *.dsn 31 | *.ses 32 | 33 | # Exported BOM files 34 | *.xml 35 | *.csv 36 | 37 | software/build/*.o 38 | software/build/*.bin 39 | software/build/*.elf 40 | datasheets/* 41 | -------------------------------------------------------------------------------- /.vscode/c_cpp_properties.json: -------------------------------------------------------------------------------- 1 | { 2 | "configurations": [ 3 | { 4 | "name": "Linux", 5 | "includePath": [ 6 | "${workspaceFolder}/**" 7 | ], 8 | "defines": [], 9 | "compilerPath": "/usr/bin/clang", 10 | "cStandard": "c17", 11 | "cppStandard": "c++14", 12 | "intelliSenseMode": "linux-clang-x64" 13 | }, 14 | { 15 | "name": "ARM32", 16 | "includePath": [ 17 | "${workspaceFolder}/**" 18 | ], 19 | "defines": [], 20 | "compilerPath": "/opt/gcc-arm-none-eabi/bin/arm-none-eabi-gcc", 21 | "cStandard": "c17", 22 | "cppStandard": "c++14", 23 | "intelliSenseMode": "linux-gcc-arm" 24 | } 25 | ], 26 | "version": 4 27 | } -------------------------------------------------------------------------------- /.vscode/launch.json: -------------------------------------------------------------------------------- 1 | { 2 | // Use IntelliSense to learn about possible attributes. 3 | // Hover to view descriptions of existing attributes. 4 | // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387 5 | "version": "0.2.0", 6 | "configurations": [ 7 | { 8 | "name": "Cortex Debug", 9 | "cwd": "${workspaceRoot}/software", 10 | "executable": "${workspaceRoot}/software/build/main.elf", 11 | "request": "launch", 12 | "type": "cortex-debug", 13 | "servertype": "openocd", 14 | "device": "STM32F401CC", 15 | "configFiles": [ 16 | "interface/stlink.cfg", 17 | "target/stm32f4x.cfg" 18 | ], 19 | "svdFile": "${workspaceRoot}/software/STM32F401.svd", 20 | "showDevDebugOutput": "raw" 21 | } 22 | ] 23 | } 24 | -------------------------------------------------------------------------------- /.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "files.associations": { 3 | "stm32f4xx.h": "c", 4 | "stm32f401xc.h": "c", 5 | "core_cm4.h": "c", 6 | "cmsis_compiler.h": "c", 7 | "stdint.h": "c", 8 | "vs035zsm.h": "c", 9 | "ssd2828.h": "c", 10 | "lh154q01.h": "c", 11 | "spi.h": "c", 12 | "stddef.h": "c" 13 | }, 14 | "cortex-debug.variableUseNaturalFormat": false 15 | } -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # SSD2828-DEV 2 | A collection of boards to test the SSD2828 RGB to MIPI Converter with the LH154Q01 panel by AUO and the VS035ZSM by BOE. The boards are meant to be ordered as a single unit and then be separated using a box cutter ( the dust generated by cutting cutting FR4 is carcenogenic PLEASE be carefull! ). 3 | 4 | 5 |

6 | 7 | # The pcb 8 | The pcb is designed using the JLC04161H-7628 stackup by JLCPCB. The MIPI DSI protool requires controlled impedance traces to function properly (100Ω differental, 50Ω single ended), depending on the provided pcb stackup different trace widths and spacings need to be selected. Additionally the signals must be kept away from noise sources such as inductors and other signals. When switching layers with MIPI signals, GND vias need to be placed near the signal vias. 9 | 10 | 11 | # LH154Q01 panel 12 | The LH154Q01 panel has been tested and is working correctly. 13 | 14 | The panel does not support packed pixel stream packets, the only way to send pixel data to the display, is through DCS commands. in this demo, a STM32f401 is sending the the write_memory_continue(0x3C) DCS command containing pixel data, through SPI to the SSD2828. 15 | 16 | 17 |

18 | 19 | # VS035ZSM panel 20 | The VS035ZSM panel has been tested and is working correctly. 21 | 22 | The panel gets initialized on MIPI LP mode and the video is transmitted MIPI HS mode @912Mbps per lane. The ssd2828 is generating the test video signal called BIST. The panel has 8-bit color depth, reaning each pixel requires 24bits. The resolution of the panel is 1400x1600, including the porch values the total resoution is 1470 x 167. To operate at 60fps, 1470 x 1670 x 24 x 60 = 3.53Gbps are required resulting at 883Mbps per lane. The panel also suppors VESA DSC making 90fps operation possible. Unfortunately the SSD2828 does not include a DSC encoder. 23 | 24 | 25 |

26 | 27 | # Resources 28 | ### PCB 29 | - [jlcpcb capabilities](https://jlcpcb.com/capabilities/pcb-capabilities). 30 | - [jlcpcb impedance calculator](https://jlcpcb.com/pcb-impedance-calculator). 31 | - [Jacinto 7 High-Speed Interface Layout Guidelines](https://www.ti.com/lit/an/spracp4/spracp4.pdf?ts=1708080453311&ref_url=https%253A%252F%252Fwww.google.com%252F). 32 | - [MIPI DSI guidelines]( https://electronics.stackexchange.com/questions/610671/mipi-dsi-differential-pair-layout-guidance). 33 | - [High-Speed PCB Design Tips - Phil's Lab](https://www.youtube.com/watch?v=VRJI0X-6yTg). 34 | - [Differential Pairs - PCB Design Basics - Phil's Lab](https://www.youtube.com/watch?v=xwrdvhm4vgw). 35 | 36 | ### SSD2828 37 | - [SSD2828 RGB转MIPI转换板制作（1)](https://blog.csdn.net/weixin_37214729/article/details/123339267). 38 | - [SSD2828 RGB转MIPI转换板制作（2)](https://blog.csdn.net/weixin_37214729/article/details/127710648). 39 | - [SSD2828调试记录](https://blog.csdn.net/luoqindong/article/details/39349333). 40 | - [project-display](https://github.com/jlywxy/project-display). 41 | - [Index of /lcd/ssd2828/](http://www.internetsomething.com/lcd/ssd2828/). 42 | 43 | ### LH154Q01 44 | - [Driving IPOD Nano 6 MIPI LCD Using FPGA](https://www.circuitvalley.com/2020/01spi-mipi-bridge-fpga-verilog-hdl-ipod-nano-nano-lcd-iphone-mipi-lcd.html). 45 | - [SSD2805 w/ LH154Q01](https://github.com/techtoys/SSD2805/blob/master/Microchip/Graphics/Drivers/SSD2805.c). 46 | ### VS035ZSM 47 | - [Project North Star](https://github.com/leapmotion/ProjectNorthStar). 48 | 49 | 50 | -------------------------------------------------------------------------------- /hardware/fp-lib-table: -------------------------------------------------------------------------------- 1 | (fp_lib_table 2 | (version 7) 3 | (lib (name "SamacSys_Parts")(type "KiCad")(uri "${KIPRJMOD}/libs/SamacSys/SamacSys_Parts.pretty")(options "")(descr "")) 4 | (lib (name "C2797218")(type "KiCad")(uri "${KIPRJMOD}/libs/C2797218/C2797218.pretty")(options "")(descr "")) 5 | (lib (name "C602016")(type "KiCad")(uri "${KIPRJMOD}/libs/C602016/C602016.pretty")(options "")(descr "")) 6 | (lib (name "C98354")(type "KiCad")(uri "${KIPRJMOD}/libs/C98354/C98354.pretty")(options "")(descr "")) 7 | (lib (name "mylib")(type "KiCad")(uri "${KIPRJMOD}/libs/mylib/mylib.pretty")(options "")(descr "")) 8 | ) 9 | -------------------------------------------------------------------------------- /hardware/gerbers.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/hardware/gerbers.zip -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-B_Mask.gbs: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,7.0.8* 2 | G04 #@! TF.CreationDate,2023-11-03T17:47:37+02:00* 3 | G04 #@! TF.ProjectId,ssd2828_board,73736432-3832-4385-9f62-6f6172642e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Soldermask,Bot* 6 | G04 #@! TF.FilePolarity,Negative* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 7.0.8) date 2023-11-03 17:47:37* 10 | %MOMM*% 11 | %LPD*% 12 | G01* 13 | G04 APERTURE LIST* 14 | G04 Aperture macros list* 15 | %AMRoundRect* 16 | 0 Rectangle with rounded corners* 17 | 0 $1 Rounding radius* 18 | 0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* 19 | 0 Add a 4 corners polygon primitive as box body* 20 | 4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* 21 | 0 Add four circle primitives for the rounded corners* 22 | 1,1,$1+$1,$2,$3* 23 | 1,1,$1+$1,$4,$5* 24 | 1,1,$1+$1,$6,$7* 25 | 1,1,$1+$1,$8,$9* 26 | 0 Add four rect primitives between the rounded corners* 27 | 20,1,$1+$1,$2,$3,$4,$5,0* 28 | 20,1,$1+$1,$4,$5,$6,$7,0* 29 | 20,1,$1+$1,$6,$7,$8,$9,0* 30 | 20,1,$1+$1,$8,$9,$2,$3,0*% 31 | G04 Aperture macros list end* 32 | %ADD10RoundRect,0.225000X-0.017678X0.335876X-0.335876X0.017678X0.017678X-0.335876X0.335876X-0.017678X0*% 33 | %ADD11RoundRect,0.225000X-0.225000X-0.250000X0.225000X-0.250000X0.225000X0.250000X-0.225000X0.250000X0*% 34 | %ADD12RoundRect,0.225000X0.017678X-0.335876X0.335876X-0.017678X-0.017678X0.335876X-0.335876X0.017678X0*% 35 | %ADD13RoundRect,0.225000X0.225000X0.250000X-0.225000X0.250000X-0.225000X-0.250000X0.225000X-0.250000X0*% 36 | G04 APERTURE END LIST* 37 | D10* 38 | X74385808Y-70380992D03* 39 | X73289792Y-71477008D03* 40 | D11* 41 | X126606000Y-59715400D03* 42 | X128156000Y-59715400D03* 43 | X126606000Y-61264799D03* 44 | X128156000Y-61264799D03* 45 | D12* 46 | X75778992Y-55005608D03* 47 | X76875008Y-53909592D03* 48 | X77912592Y-57139208D03* 49 | X79008608Y-56043192D03* 50 | X80848200Y-60096400D03* 51 | X81944216Y-59000384D03* 52 | D13* 53 | X118808800Y-60528200D03* 54 | X117258800Y-60528200D03* 55 | D12* 56 | X81925792Y-61164608D03* 57 | X83021808Y-60068592D03* 58 | D13* 59 | X118808800Y-62103000D03* 60 | X117258800Y-62103000D03* 61 | D10* 62 | X70575808Y-66418592D03* 63 | X69479792Y-67514608D03* 64 | X73268208Y-69263392D03* 65 | X72172192Y-70359408D03* 66 | D12* 67 | X76845792Y-56084608D03* 68 | X77941808Y-54988592D03* 69 | D10* 70 | X69458208Y-65300992D03* 71 | X68362192Y-66397008D03* 72 | D12* 73 | X79792192Y-59018808D03* 74 | X80888208Y-57922792D03* 75 | M02* 76 | -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-B_Paste.gbp: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,7.0.8* 2 | G04 #@! TF.CreationDate,2023-11-03T17:47:37+02:00* 3 | G04 #@! TF.ProjectId,ssd2828_board,73736432-3832-4385-9f62-6f6172642e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Paste,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 7.0.8) date 2023-11-03 17:47:37* 10 | %MOMM*% 11 | %LPD*% 12 | G01* 13 | G04 APERTURE LIST* 14 | G04 Aperture macros list* 15 | %AMRoundRect* 16 | 0 Rectangle with rounded corners* 17 | 0 $1 Rounding radius* 18 | 0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* 19 | 0 Add a 4 corners polygon primitive as box body* 20 | 4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* 21 | 0 Add four circle primitives for the rounded corners* 22 | 1,1,$1+$1,$2,$3* 23 | 1,1,$1+$1,$4,$5* 24 | 1,1,$1+$1,$6,$7* 25 | 1,1,$1+$1,$8,$9* 26 | 0 Add four rect primitives between the rounded corners* 27 | 20,1,$1+$1,$2,$3,$4,$5,0* 28 | 20,1,$1+$1,$4,$5,$6,$7,0* 29 | 20,1,$1+$1,$6,$7,$8,$9,0* 30 | 20,1,$1+$1,$8,$9,$2,$3,0*% 31 | G04 Aperture macros list end* 32 | %ADD10RoundRect,0.225000X-0.017678X0.335876X-0.335876X0.017678X0.017678X-0.335876X0.335876X-0.017678X0*% 33 | %ADD11RoundRect,0.225000X-0.225000X-0.250000X0.225000X-0.250000X0.225000X0.250000X-0.225000X0.250000X0*% 34 | %ADD12RoundRect,0.225000X0.017678X-0.335876X0.335876X-0.017678X-0.017678X0.335876X-0.335876X0.017678X0*% 35 | %ADD13RoundRect,0.225000X0.225000X0.250000X-0.225000X0.250000X-0.225000X-0.250000X0.225000X-0.250000X0*% 36 | G04 APERTURE END LIST* 37 | D10* 38 | X74385808Y-70380992D03* 39 | X73289792Y-71477008D03* 40 | D11* 41 | X126606000Y-59715400D03* 42 | X128156000Y-59715400D03* 43 | X126606000Y-61264799D03* 44 | X128156000Y-61264799D03* 45 | D12* 46 | X75778992Y-55005608D03* 47 | X76875008Y-53909592D03* 48 | X77912592Y-57139208D03* 49 | X79008608Y-56043192D03* 50 | X80848200Y-60096400D03* 51 | X81944216Y-59000384D03* 52 | D13* 53 | X118808800Y-60528200D03* 54 | X117258800Y-60528200D03* 55 | D12* 56 | X81925792Y-61164608D03* 57 | X83021808Y-60068592D03* 58 | D13* 59 | X118808800Y-62103000D03* 60 | X117258800Y-62103000D03* 61 | D10* 62 | X70575808Y-66418592D03* 63 | X69479792Y-67514608D03* 64 | X73268208Y-69263392D03* 65 | X72172192Y-70359408D03* 66 | D12* 67 | X76845792Y-56084608D03* 68 | X77941808Y-54988592D03* 69 | D10* 70 | X69458208Y-65300992D03* 71 | X68362192Y-66397008D03* 72 | D12* 73 | X79792192Y-59018808D03* 74 | X80888208Y-57922792D03* 75 | M02* 76 | -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-B_Silkscreen.gbo: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,7.0.8* 2 | G04 #@! TF.CreationDate,2023-11-03T17:47:37+02:00* 3 | G04 #@! TF.ProjectId,ssd2828_board,73736432-3832-4385-9f62-6f6172642e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Legend,Bot* 6 | G04 #@! TF.FilePolarity,Positive* 7 | %FSLAX46Y46*% 8 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 7.0.8) date 2023-11-03 17:47:37* 10 | %MOMM*% 11 | %LPD*% 12 | G01* 13 | G04 APERTURE LIST* 14 | G04 Aperture macros list* 15 | %AMRoundRect* 16 | 0 Rectangle with rounded corners* 17 | 0 $1 Rounding radius* 18 | 0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* 19 | 0 Add a 4 corners polygon primitive as box body* 20 | 4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* 21 | 0 Add four circle primitives for the rounded corners* 22 | 1,1,$1+$1,$2,$3* 23 | 1,1,$1+$1,$4,$5* 24 | 1,1,$1+$1,$6,$7* 25 | 1,1,$1+$1,$8,$9* 26 | 0 Add four rect primitives between the rounded corners* 27 | 20,1,$1+$1,$2,$3,$4,$5,0* 28 | 20,1,$1+$1,$4,$5,$6,$7,0* 29 | 20,1,$1+$1,$6,$7,$8,$9,0* 30 | 20,1,$1+$1,$8,$9,$2,$3,0*% 31 | G04 Aperture macros list end* 32 | %ADD10C,0.150000*% 33 | %ADD11C,0.120000*% 34 | %ADD12RoundRect,0.225000X-0.017678X0.335876X-0.335876X0.017678X0.017678X-0.335876X0.335876X-0.017678X0*% 35 | %ADD13RoundRect,0.225000X-0.225000X-0.250000X0.225000X-0.250000X0.225000X0.250000X-0.225000X0.250000X0*% 36 | %ADD14RoundRect,0.225000X0.017678X-0.335876X0.335876X-0.017678X-0.017678X0.335876X-0.335876X0.017678X0*% 37 | %ADD15RoundRect,0.225000X0.225000X0.250000X-0.225000X0.250000X-0.225000X-0.250000X0.225000X-0.250000X0*% 38 | G04 APERTURE END LIST* 39 | D10* 40 | X94234000Y-51269400D02* 41 | X94234000Y-86372200D01* 42 | X113665000Y-86372200D02* 43 | X113665000Y-51269400D01* 44 | X51841400Y-86969600D02* 45 | X79527400Y-86969600D01* 46 | D11* 47 | X74297830Y-71190219D02* 48 | X74099019Y-71389030D01* 49 | X73576581Y-70468970D02* 50 | X73377770Y-70667781D01* 51 | X127240420Y-59205400D02* 52 | X127521580Y-59205400D01* 53 | X127240420Y-60225400D02* 54 | X127521580Y-60225400D01* 55 | X127240420Y-60754799D02* 56 | X127521580Y-60754799D01* 57 | X127240420Y-61774799D02* 58 | X127521580Y-61774799D01* 59 | X75866970Y-54196381D02* 60 | X76065781Y-53997570D01* 61 | X76588219Y-54917630D02* 62 | X76787030Y-54718819D01* 63 | X78000570Y-56329981D02* 64 | X78199381Y-56131170D01* 65 | X78721819Y-57051230D02* 66 | X78920630Y-56852419D01* 67 | X80936178Y-59287173D02* 68 | X81134989Y-59088362D01* 69 | X81657427Y-60008422D02* 70 | X81856238Y-59809611D01* 71 | X118174380Y-61038200D02* 72 | X117893220Y-61038200D01* 73 | X118174380Y-60018200D02* 74 | X117893220Y-60018200D01* 75 | X82013770Y-60355381D02* 76 | X82212581Y-60156570D01* 77 | X82735019Y-61076630D02* 78 | X82933830Y-60877819D01* 79 | X118174380Y-62613000D02* 80 | X117893220Y-62613000D01* 81 | X118174380Y-61593000D02* 82 | X117893220Y-61593000D01* 83 | X70487830Y-67227819D02* 84 | X70289019Y-67426630D01* 85 | X69766581Y-66506570D02* 86 | X69567770Y-66705381D01* 87 | X73180230Y-70072619D02* 88 | X72981419Y-70271430D01* 89 | X72458981Y-69351370D02* 90 | X72260170Y-69550181D01* 91 | X76933770Y-55275381D02* 92 | X77132581Y-55076570D01* 93 | X77655019Y-55996630D02* 94 | X77853830Y-55797819D01* 95 | X69370230Y-66110219D02* 96 | X69171419Y-66309030D01* 97 | X68648981Y-65388970D02* 98 | X68450170Y-65587781D01* 99 | X79880170Y-58209581D02* 100 | X80078981Y-58010770D01* 101 | X80601419Y-58930830D02* 102 | X80800230Y-58732019D01* 103 | %LPC*% 104 | D12* 105 | X74385808Y-70380992D03* 106 | X73289792Y-71477008D03* 107 | D13* 108 | X126606000Y-59715400D03* 109 | X128156000Y-59715400D03* 110 | X126606000Y-61264799D03* 111 | X128156000Y-61264799D03* 112 | D14* 113 | X75778992Y-55005608D03* 114 | X76875008Y-53909592D03* 115 | X77912592Y-57139208D03* 116 | X79008608Y-56043192D03* 117 | X80848200Y-60096400D03* 118 | X81944216Y-59000384D03* 119 | D15* 120 | X118808800Y-60528200D03* 121 | X117258800Y-60528200D03* 122 | D14* 123 | X81925792Y-61164608D03* 124 | X83021808Y-60068592D03* 125 | D15* 126 | X118808800Y-62103000D03* 127 | X117258800Y-62103000D03* 128 | D12* 129 | X70575808Y-66418592D03* 130 | X69479792Y-67514608D03* 131 | X73268208Y-69263392D03* 132 | X72172192Y-70359408D03* 133 | D14* 134 | X76845792Y-56084608D03* 135 | X77941808Y-54988592D03* 136 | D12* 137 | X69458208Y-65300992D03* 138 | X68362192Y-66397008D03* 139 | D14* 140 | X79792192Y-59018808D03* 141 | X80888208Y-57922792D03* 142 | %LPD*% 143 | M02* 144 | -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-Edge_Cuts.gm1: -------------------------------------------------------------------------------- 1 | G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,7.0.8* 2 | G04 #@! TF.CreationDate,2023-11-03T17:47:37+02:00* 3 | G04 #@! TF.ProjectId,ssd2828_board,73736432-3832-4385-9f62-6f6172642e6b,rev?* 4 | G04 #@! TF.SameCoordinates,Original* 5 | G04 #@! TF.FileFunction,Profile,NP* 6 | %FSLAX46Y46*% 7 | G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* 8 | G04 Created by KiCad (PCBNEW 7.0.8) date 2023-11-03 17:47:37* 9 | %MOMM*% 10 | %LPD*% 11 | G01* 12 | G04 APERTURE LIST* 13 | G04 #@! TA.AperFunction,Profile* 14 | %ADD10C,0.100000*% 15 | G04 #@! TD* 16 | G04 APERTURE END LIST* 17 | D10* 18 | X142001800Y-86566500D02* 19 | G75* 20 | G03* 21 | X142967000Y-85601301I0J965200D01* 22 | G01* 23 | X52676299Y-104622600D02* 24 | X78689200Y-104622600D01* 25 | X52676299Y-51116999D02* 26 | G75* 27 | G03* 28 | X51711099Y-52082200I1J-965201D01* 29 | G01* 30 | X51711100Y-103657400D02* 31 | G75* 32 | G03* 33 | X52676299Y-104622600I965200J0D01* 34 | G01* 35 | X51711099Y-85581701D02* 36 | X51711099Y-103657400D01* 37 | X79654400Y-103657400D02* 38 | X79654400Y-86563200D01* 39 | X142967000Y-52078899D02* 40 | X142967000Y-85598000D01* 41 | X78689201Y-104622600D02* 42 | G75* 43 | G03* 44 | X79654400Y-103657400I-1J965200D01* 45 | G01* 46 | X142001800Y-86563200D02* 47 | X79654400Y-86563200D01* 48 | X52676299Y-51117000D02* 49 | X142001800Y-51113699D01* 50 | X51711099Y-85581701D02* 51 | X51711099Y-52082200D01* 52 | X142967001Y-52078899D02* 53 | G75* 54 | G03* 55 | X142001800Y-51113699I-965201J-1D01* 56 | G01* 57 | M02* 58 | -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-NPTH-drl_map.gbr: -------------------------------------------------------------------------------- 1 | %TF.GenerationSoftware,KiCad,Pcbnew,7.0.8*% 2 | %TF.CreationDate,2023-11-03T17:47:42+02:00*% 3 | %TF.ProjectId,ssd2828_board,73736432-3832-4385-9f62-6f6172642e6b,rev?*% 4 | %TF.SameCoordinates,Original*% 5 | %TF.FileFunction,Drillmap*% 6 | %TF.FilePolarity,Positive*% 7 | %FSLAX45Y45*% 8 | G04 Gerber Fmt 4.5, Leading zero omitted, Abs format (unit mm)* 9 | G04 Created by KiCad (PCBNEW 7.0.8) date 2023-11-03 17:47:42* 10 | %MOMM*% 11 | %LPD*% 12 | G01* 13 | G04 APERTURE LIST* 14 | %ADD10C,0.100000*% 15 | %ADD11C,0.200000*% 16 | G04 APERTURE END LIST* 17 | D10* 18 | X14200180Y-8656650D02* 19 | G75* 20 | G03* 21 | X14296700Y-8560130I0J96520D01* 22 | G01* 23 | X5267630Y-10462260D02* 24 | X7868920Y-10462260D01* 25 | X5267630Y-5111700D02* 26 | G75* 27 | G03* 28 | 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70 | X5541172Y-10664458D02* 71 | X5541172Y-10693030D01* 72 | X5541172Y-10693030D02* 73 | X5531649Y-10731125D01* 74 | X5531649Y-10731125D02* 75 | X5522125Y-10750172D01* 76 | X5522125Y-10750172D02* 77 | X5503077Y-10769220D01* 78 | X5503077Y-10769220D02* 79 | X5474506Y-10778744D01* 80 | X5474506Y-10778744D02* 81 | X5426887Y-10778744D01* 82 | X5626887Y-10778744D02* 83 | X5626887Y-10645410D01* 84 | X5626887Y-10683506D02* 85 | X5636410Y-10664458D01* 86 | X5636410Y-10664458D02* 87 | X5645934Y-10654934D01* 88 | X5645934Y-10654934D02* 89 | X5664982Y-10645410D01* 90 | X5664982Y-10645410D02* 91 | X5684030Y-10645410D01* 92 | X5750696Y-10778744D02* 93 | X5750696Y-10645410D01* 94 | X5750696Y-10578744D02* 95 | X5741172Y-10588268D01* 96 | X5741172Y-10588268D02* 97 | X5750696Y-10597791D01* 98 | X5750696Y-10597791D02* 99 | X5760220Y-10588268D01* 100 | X5760220Y-10588268D02* 101 | X5750696Y-10578744D01* 102 | X5750696Y-10578744D02* 103 | X5750696Y-10597791D01* 104 | X5874506Y-10778744D02* 105 | X5855458Y-10769220D01* 106 | X5855458Y-10769220D02* 107 | X5845934Y-10750172D01* 108 | X5845934Y-10750172D02* 109 | X5845934Y-10578744D01* 110 | X5979268Y-10778744D02* 111 | X5960220Y-10769220D01* 112 | X5960220Y-10769220D02* 113 | X5950696Y-10750172D01* 114 | X5950696Y-10750172D02* 115 | X5950696Y-10578744D01* 116 | X6207839Y-10778744D02* 117 | X6207839Y-10578744D01* 118 | X6207839Y-10578744D02* 119 | X6274506Y-10721601D01* 120 | X6274506Y-10721601D02* 121 | X6341172Y-10578744D01* 122 | X6341172Y-10578744D02* 123 | X6341172Y-10778744D01* 124 | X6522125Y-10778744D02* 125 | X6522125Y-10673982D01* 126 | X6522125Y-10673982D02* 127 | X6512601Y-10654934D01* 128 | X6512601Y-10654934D02* 129 | X6493553Y-10645410D01* 130 | X6493553Y-10645410D02* 131 | X6455458Y-10645410D01* 132 | X6455458Y-10645410D02* 133 | X6436410Y-10654934D01* 134 | X6522125Y-10769220D02* 135 | X6503077Y-10778744D01* 136 | X6503077Y-10778744D02* 137 | X6455458Y-10778744D01* 138 | X6455458Y-10778744D02* 139 | X6436410Y-10769220D01* 140 | X6436410Y-10769220D02* 141 | X6426887Y-10750172D01* 142 | X6426887Y-10750172D02* 143 | X6426887Y-10731125D01* 144 | X6426887Y-10731125D02* 145 | X6436410Y-10712077D01* 146 | X6436410Y-10712077D02* 147 | X6455458Y-10702553D01* 148 | X6455458Y-10702553D02* 149 | X6503077Y-10702553D01* 150 | X6503077Y-10702553D02* 151 | X6522125Y-10693030D01* 152 | X6617363Y-10645410D02* 153 | X6617363Y-10845410D01* 154 | X6617363Y-10654934D02* 155 | X6636410Y-10645410D01* 156 | X6636410Y-10645410D02* 157 | X6674506Y-10645410D01* 158 | X6674506Y-10645410D02* 159 | X6693553Y-10654934D01* 160 | X6693553Y-10654934D02* 161 | X6703077Y-10664458D01* 162 | X6703077Y-10664458D02* 163 | X6712601Y-10683506D01* 164 | X6712601Y-10683506D02* 165 | X6712601Y-10740649D01* 166 | X6712601Y-10740649D02* 167 | X6703077Y-10759696D01* 168 | X6703077Y-10759696D02* 169 | X6693553Y-10769220D01* 170 | X6693553Y-10769220D02* 171 | X6674506Y-10778744D01* 172 | X6674506Y-10778744D02* 173 | X6636410Y-10778744D01* 174 | X6636410Y-10778744D02* 175 | X6617363Y-10769220D01* 176 | X6798315Y-10759696D02* 177 | X6807839Y-10769220D01* 178 | X6807839Y-10769220D02* 179 | X6798315Y-10778744D01* 180 | X6798315Y-10778744D02* 181 | X6788791Y-10769220D01* 182 | X6788791Y-10769220D02* 183 | X6798315Y-10759696D01* 184 | X6798315Y-10759696D02* 185 | X6798315Y-10778744D01* 186 | X6798315Y-10654934D02* 187 | X6807839Y-10664458D01* 188 | X6807839Y-10664458D02* 189 | X6798315Y-10673982D01* 190 | X6798315Y-10673982D02* 191 | X6788791Y-10664458D01* 192 | X6788791Y-10664458D02* 193 | X6798315Y-10654934D01* 194 | X6798315Y-10654934D02* 195 | X6798315Y-10673982D01* 196 | M02* 197 | -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-NPTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 7.0.8} date Fri Nov 3 17:47:41 2023 3 | ; FORMAT={-:-/ absolute / metric / decimal} 4 | ; #@! TF.CreationDate,2023-11-03T17:47:41+02:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,7.0.8 6 | ; #@! TF.FileFunction,NonPlated,1,4,NPTH 7 | FMAT,2 8 | METRIC 9 | % 10 | G90 11 | G05 12 | T0 13 | M30 14 | -------------------------------------------------------------------------------- /hardware/gerbers/ssd2828_board-PTH.drl: -------------------------------------------------------------------------------- 1 | M48 2 | ; DRILL file {KiCad 7.0.8} date Fri Nov 3 17:47:41 2023 3 | ; FORMAT={-:-/ absolute / metric / decimal} 4 | ; #@! TF.CreationDate,2023-11-03T17:47:41+02:00 5 | ; #@! TF.GenerationSoftware,Kicad,Pcbnew,7.0.8 6 | ; #@! TF.FileFunction,Plated,1,4,PTH 7 | FMAT,2 8 | METRIC 9 | ; #@! TA.AperFunction,Plated,PTH,ViaDrill 10 | T1C0.200 11 | ; #@! TA.AperFunction,Plated,PTH,ViaDrill 12 | T2C0.250 13 | ; #@! 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(name "1" (effects (font (size 1.27 1.27)))) 262 | (number "1" (effects (font (size 1.27 1.27)))) 263 | ) 264 | ) 265 | ) 266 | ) -------------------------------------------------------------------------------- /hardware/libs/C2797218/C2797218.pretty/FPC-SMD_KH-FG0.5-H2.0-34PIN.kicad_mod: -------------------------------------------------------------------------------- 1 | (module easyeda2kicad:FPC-SMD_KH-FG0.5-H2.0-34PIN (layer F.Cu) (tedit 5DC5F6A4) 2 | (attr smd) 3 | (fp_text reference REF** (at 0 -5.22) (layer F.SilkS) 4 | (effects (font (size 1 1) (thickness 0.15))) 5 | ) 6 | (fp_text value FPC-SMD_KH-FG0.5-H2.0-34PIN (at 0 5.22) (layer F.Fab) 7 | (effects (font (size 1 1) (thickness 0.15))) 8 | ) 9 | (fp_text user %R (at 0 0) (layer F.Fab) 10 | (effects (font (size 1 1) (thickness 0.15))) 11 | ) 12 | (fp_line (start -8.63 -0.63) (end -10.70 -0.63) (layer F.SilkS) (width 0.25)) 13 | (fp_line (start 10.70 -0.63) (end 8.63 -0.63) (layer F.SilkS) (width 0.25)) 14 | (fp_line (start 10.70 0.24) (end 10.70 -0.63) (layer F.SilkS) (width 0.25)) 15 | (fp_line (start -10.70 0.24) (end -10.70 -0.63) (layer F.SilkS) (width 0.25)) 16 | (fp_line (start 10.70 4.38) (end -10.70 4.38) (layer F.SilkS) (width 0.25)) 17 | (fp_line (start 10.70 4.38) (end 10.70 2.21) (layer F.SilkS) (width 0.25)) 18 | (fp_line (start -10.70 4.38) (end -10.70 2.21) (layer F.SilkS) (width 0.25)) 19 | (pad 34 smd rect (at -8.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 20 | (pad 33 smd rect (at -7.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 21 | (pad 32 smd rect (at -7.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 22 | (pad 31 smd rect (at -6.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 23 | (pad 30 smd rect (at -6.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 24 | (pad 29 smd rect (at -5.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 25 | (pad 28 smd rect (at -5.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 26 | (pad 27 smd rect (at -4.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 27 | (pad 26 smd rect (at -4.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 28 | (pad 25 smd rect (at -3.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 29 | (pad 24 smd rect (at -3.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 30 | (pad 23 smd rect (at -2.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 31 | (pad 22 smd rect (at -2.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 32 | (pad 21 smd rect (at -1.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 33 | (pad 20 smd rect (at -1.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 34 | (pad 19 smd rect (at -0.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 35 | (pad 18 smd rect (at -0.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 36 | (pad 17 smd rect (at 0.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 37 | (pad 16 smd rect (at 0.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 38 | (pad 15 smd rect (at 1.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 39 | (pad 14 smd rect (at 1.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 40 | (pad 13 smd rect (at 2.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 41 | (pad 36 smd rect (at 9.95 1.22 180.00) (size 2.00 1.50) (layers F.Cu F.Paste F.Mask)) 42 | (pad 35 smd rect (at -9.95 1.22 180.00) (size 2.00 1.50) (layers F.Cu F.Paste F.Mask)) 43 | (pad 12 smd rect (at 2.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 44 | (pad 11 smd rect (at 3.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 45 | (pad 10 smd rect (at 3.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 46 | (pad 9 smd rect (at 4.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 47 | (pad 8 smd rect (at 4.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 48 | (pad 7 smd rect (at 5.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 49 | (pad 6 smd rect (at 5.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 50 | (pad 5 smd rect (at 6.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 51 | (pad 4 smd rect (at 6.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 52 | (pad 3 smd rect (at 7.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 53 | (pad 2 smd rect (at 7.75 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 54 | (pad 1 smd rect (at 8.25 -1.22 180.00) (size 0.30 1.80) (layers F.Cu F.Paste F.Mask)) 55 | (fp_circle (center 8.89 -1.65) (end 9.02 -1.65) (layer F.SilkS) (width 0.25)) 56 | (fp_circle (center 10.70 -1.62) (end 10.73 -1.62) (layer F.Fab) (width 0.06)) 57 | (fp_circle (center 8.64 -1.27) (end 8.77 -1.27) (layer Cmts.User) (width 0.25)) 58 | (model "/C2797218/C2797218.3dshapes/FPC-SMD_KH-FG0.5-H2.0-34PIN.wrl" 59 | (offset (xyz 0.000 -1.350 -0.000)) 60 | (scale (xyz 1 1 1)) 61 | (rotate (xyz 0 0 0)) 62 | ) 63 | ) -------------------------------------------------------------------------------- /hardware/libs/C602016/C602016.kicad_sym: -------------------------------------------------------------------------------- 1 | (kicad_symbol_lib 2 | (version 20211014) 3 | (generator https://github.com/uPesy/easyeda2kicad.py) 4 | (symbol "FHD252012S-4R7MT" 5 | (in_bom yes) 6 | (on_board yes) 7 | (property 8 | "Reference" 9 | "L" 10 | (id 0) 11 | (at 0 5.08 0) 12 | (effects (font (size 1.27 1.27) ) ) 13 | ) 14 | (property 15 | "Value" 16 | "FHD252012S-4R7MT" 17 | (id 1) 18 | (at 0 -5.08 0) 19 | (effects (font (size 1.27 1.27) ) ) 20 | ) 21 | (property 22 | "Footprint" 23 | "C602016:IND-SMD_L2.5-W2.0_FHD252012S-6R8MT" 24 | (id 2) 25 | (at 0 -7.62 0) 26 | (effects (font (size 1.27 1.27) ) hide) 27 | ) 28 | (property 29 | "Datasheet" 30 | "https://lcsc.com/product-detail/Power-Inductors_cjiang-Changjiang-Microelectronics-Tech-FHD252012S-4R7MT_C602016.html" 31 | (id 3) 32 | (at 0 -10.16 0) 33 | (effects (font (size 1.27 1.27) ) hide) 34 | ) 35 | (property 36 | "LCSC Part" 37 | "C602016" 38 | (id 5) 39 | (at 0 -12.70 0) 40 | (effects (font (size 1.27 1.27) ) hide) 41 | ) 42 | (symbol "FHD252012S-4R7MT_0_1" 43 | (arc 44 | (start 2.21 -0.02) 45 | (mid 3.68 -1.01) 46 | (end 4.23 -0.02) 47 | (stroke (width 0) (type default) (color 0 0 0 0)) 48 | (fill (type none)) 49 | ) 50 | (arc 51 | (start 0.02 -0.02) 52 | (mid 1.49 -1.01) 53 | (end 2.04 -0.02) 54 | (stroke (width 0) (type default) (color 0 0 0 0)) 55 | (fill (type none)) 56 | ) 57 | (arc 58 | (start -2.13 -0.02) 59 | (mid -0.66 -1.01) 60 | (end -0.11 -0.02) 61 | (stroke (width 0) (type default) (color 0 0 0 0)) 62 | (fill (type none)) 63 | ) 64 | (arc 65 | (start -4.29 -0.02) 66 | (mid -2.81 -1.01) 67 | (end -2.27 -0.02) 68 | (stroke (width 0) (type default) (color 0 0 0 0)) 69 | (fill (type none)) 70 | ) 71 | (pin unspecified line 72 | (at -5.08 -0.00 0) 73 | (length 0.762) 74 | (name "1" (effects (font (size 1.27 1.27)))) 75 | (number "1" (effects (font (size 1.27 1.27)))) 76 | ) 77 | (pin unspecified line 78 | (at 5.08 -0.00 180) 79 | (length 0.762) 80 | (name "2" (effects (font (size 1.27 1.27)))) 81 | (number "2" (effects (font (size 1.27 1.27)))) 82 | ) 83 | ) 84 | ) 85 | ) -------------------------------------------------------------------------------- /hardware/libs/C602016/C602016.pretty/IND-SMD_L2.5-W2.0_FHD252012S-6R8MT.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "IND-SMD_L2.5-W2.0_FHD252012S-6R8MT" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (attr smd) 4 | (fp_text reference "REF**" (at 0 -2.2) (layer "F.SilkS") 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | (tstamp abd60af0-d9c6-4105-901c-7c73be9c8db7) 7 | ) 8 | (fp_text value "IND-SMD_L2.5-W2.0_FHD252012S-6R8MT" (at 0 4) (layer "F.Fab") 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | (tstamp 3ff28f45-c798-456a-b8ef-bab42e0e56ac) 11 | ) 12 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 13 | (effects (font (size 1 1) (thickness 0.15))) 14 | (tstamp 13e0aac9-e639-4b4d-bf0a-f51355d28c45) 15 | ) 16 | (fp_line (start -1.25 -1.32) (end 1.25 -1.32) 17 | (stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp 24581f10-7b48-471b-9b4f-79ec8cca6480)) 18 | (fp_line (start -1.25 1.3) (end 1.25 1.3) 19 | (stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp 135f6ee2-ed45-4d54-959a-c2f0c7e63988)) 20 | (fp_circle (center -1.25 1) (end -1.22 1) 21 | (stroke (width 0.06) (type solid)) (fill none) (layer "F.Fab") (tstamp 8bbd0766-6393-4a8f-87a5-e700d0e03848)) 22 | (pad "1" smd rect (at -0.95 0) (size 1 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp bd67f8b6-0a83-4fd1-ac1d-2cfd08b7c4c9)) 23 | (pad "2" smd rect (at 0.95 0) (size 1 2.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6d3821e3-58df-4611-bc4b-d1bc5f5eff56)) 24 | (model "${KIPRJMOD}/libs/C602016/C602016.3dshapes/IND-SMD_L2.5-W2.0_FHD252012S-6R8MT.wrl" 25 | (offset (xyz 0 -0 -0)) 26 | (scale (xyz 1 1 1)) 27 | (rotate (xyz 0 0 270)) 28 | ) 29 | ) 30 | -------------------------------------------------------------------------------- /hardware/libs/C98354/C98354.kicad_sym: -------------------------------------------------------------------------------- 1 | (kicad_symbol_lib 2 | (version 20211014) 3 | (generator https://github.com/uPesy/easyeda2kicad.py) 4 | (symbol "WPN252012H4R7MT" 5 | (in_bom yes) 6 | (on_board yes) 7 | (property 8 | "Reference" 9 | "L" 10 | (id 0) 11 | (at 0 5.08 0) 12 | (effects (font (size 1.27 1.27) ) ) 13 | ) 14 | (property 15 | "Value" 16 | "WPN252012H4R7MT" 17 | (id 1) 18 | (at 0 -5.08 0) 19 | (effects (font (size 1.27 1.27) ) ) 20 | ) 21 | (property 22 | "Footprint" 23 | "C98354:IND-SMD_L2.5-W2.0_WPN252012H" 24 | (id 2) 25 | (at 0 -7.62 0) 26 | (effects (font (size 1.27 1.27) ) hide) 27 | ) 28 | (property 29 | "Datasheet" 30 | "https://lcsc.com/product-detail/Power-Inductors_4-7uH-20_C98354.html" 31 | (id 3) 32 | (at 0 -10.16 0) 33 | (effects (font (size 1.27 1.27) ) hide) 34 | ) 35 | (property 36 | "LCSC Part" 37 | "C98354" 38 | (id 5) 39 | (at 0 -12.70 0) 40 | (effects (font (size 1.27 1.27) ) hide) 41 | ) 42 | (symbol "WPN252012H4R7MT_0_1" 43 | (arc 44 | (start -4.29 -0.02) 45 | (mid -2.81 -1.01) 46 | (end -2.27 -0.02) 47 | (stroke (width 0) (type default) (color 0 0 0 0)) 48 | (fill (type none)) 49 | ) 50 | (arc 51 | (start -2.13 -0.02) 52 | (mid -0.66 -1.01) 53 | (end -0.11 -0.02) 54 | (stroke (width 0) (type default) (color 0 0 0 0)) 55 | (fill (type none)) 56 | ) 57 | (arc 58 | (start 0.02 -0.02) 59 | (mid 1.49 -1.01) 60 | (end 2.04 -0.02) 61 | (stroke (width 0) (type default) (color 0 0 0 0)) 62 | (fill (type none)) 63 | ) 64 | (arc 65 | (start 2.21 -0.02) 66 | (mid 3.68 -1.01) 67 | (end 4.23 -0.02) 68 | (stroke (width 0) (type default) (color 0 0 0 0)) 69 | (fill (type none)) 70 | ) 71 | (pin unspecified line 72 | (at 5.08 -0.00 180) 73 | (length 0.762) 74 | (name "2" (effects (font (size 1.27 1.27)))) 75 | (number "2" (effects (font (size 1.27 1.27)))) 76 | ) 77 | (pin unspecified line 78 | (at -5.08 -0.00 0) 79 | (length 0.762) 80 | (name "1" (effects (font (size 1.27 1.27)))) 81 | (number "1" (effects (font (size 1.27 1.27)))) 82 | ) 83 | ) 84 | ) 85 | ) -------------------------------------------------------------------------------- /hardware/libs/C98354/C98354.pretty/IND-SMD_L2.5-W2.0_WPN252012H.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "IND-SMD_L2.5-W2.0_WPN252012H" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (attr smd) 4 | (fp_text reference "REF**" (at 0 -1.9) (layer "F.SilkS") 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | (tstamp 54806605-a3fd-47c0-9eee-36d66017b442) 7 | ) 8 | (fp_text value "IND-SMD_L2.5-W2.0_WPN252012H" (at 0 4) (layer "F.Fab") 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | (tstamp d66b6b74-0378-44c3-886b-d3dcade5c69d) 11 | ) 12 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 13 | (effects (font (size 1 1) (thickness 0.15))) 14 | (tstamp 7d4dad07-ea1b-4923-8573-8e337063d613) 15 | ) 16 | (fp_line (start -1.33 -1.09) (end -1.33 -1.08) 17 | (stroke (width 0.15) (type solid)) (layer "F.SilkS") (tstamp 695643b2-ece5-40d8-8603-1a8c284b5075)) 18 | (fp_line (start -1.33 -1.08) (end 1.33 -1.08) 19 | (stroke (width 0.15) (type solid)) (layer "F.SilkS") (tstamp ef9844d2-4d16-4716-b2bf-40294f9e1a11)) 20 | (fp_line (start -1.33 1.08) (end 1.33 1.08) 21 | (stroke (width 0.15) (type solid)) (layer "F.SilkS") (tstamp 11a9a7e5-9840-42e1-ae1c-e3d661fcb631)) 22 | (fp_line (start -1.33 1.09) (end -1.33 1.08) 23 | (stroke (width 0.15) (type solid)) (layer "F.SilkS") (tstamp f8a061ef-5b13-429b-ab2c-b8e91e7e9b6d)) 24 | (fp_line (start 1.33 -1.08) (end 1.33 -1.09) 25 | (stroke (width 0.15) (type solid)) (layer "F.SilkS") (tstamp 8779b5ee-5695-4e1d-b723-d0107fbdd5f5)) 26 | (fp_line (start 1.33 1.08) (end 1.33 1.09) 27 | (stroke (width 0.15) (type solid)) (layer "F.SilkS") (tstamp a79f7145-96b7-49a6-8bbe-04b11867f849)) 28 | (fp_circle (center -1.25 1) (end -1.22 1) 29 | (stroke (width 0.06) (type solid)) (fill none) (layer "F.Fab") (tstamp 12b8af3d-6a52-4f88-bc29-a309592ef32c)) 30 | (pad "1" smd rect (at 1.23 0) (size 1.72 1.87) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 2ba78fb5-2bfe-4d7e-8d6d-f478dbae1c00)) 31 | (pad "2" smd rect (at -1.23 0) (size 1.72 1.87) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 05a9f821-3a72-4ce2-9eda-df9a9145a798)) 32 | (model "${KIPRJMOD}/libs/C98354/C98354.3dshapes/IND-SMD_L2.5-W2.0-H1.2-252012.wrl" 33 | (offset (xyz 0 0 -0)) 34 | (scale (xyz 1 1 1)) 35 | (rotate (xyz 0 0 -90)) 36 | ) 37 | ) 38 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.3dshapes/205863050104.stp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/hardware/libs/SamacSys/SamacSys_Parts.3dshapes/205863050104.stp -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.dcm: -------------------------------------------------------------------------------- 1 | EESchema-DOCLIB Version 2.0 2 | # 3 | $CMP NE555DR 4 | D Single Precision Timer 5 | K 6 | F http://www.ti.com/lit/ds/symlink/ne555.pdf 7 | $ENDCMP 8 | # 9 | $CMP FH35C-25S-0.3SHW_50_ 10 | D HIROSE(HRS) - FH35C-25S-0.3SHW(50) - CONNECTOR, FPC, RCPT, 25POS, 1ROW 11 | K 12 | F https://www.hirose.com/product/en/products/FH35C/FH35C-25S-0.3SHW%2850%29/ 13 | $ENDCMP 14 | # 15 | $CMP 245863050104829+ 16 | D Board to Board & Mezzanine Connectors RECPT 0.35mm Pitch 50pos 8.0mm Height 17 | K 18 | F https://www.mouser.co.uk/datasheet/2/909/5863-1602212.pdf 19 | $ENDCMP 20 | # 21 | $CMP ADC081S021CIMF_NOPB 22 | D Single Channel, 50 to 200 ksps, 8-Bit A/D Converter 23 | K 24 | F http://www.ti.com/lit/gpn/adc081s021 25 | $ENDCMP 26 | # 27 | $CMP ES1D-13-F 28 | D Diodes Inc ES1D-13-F SMT Switching Diode, 200V 1A, 2-Pin DO-214AC 29 | K 30 | F https://www.diodes.com/assets/Datasheets/ds14001.pdf 31 | $ENDCMP 32 | # 33 | $CMP 105162-0001 34 | D Memory Card Connectors 1.45H MICRO SD HEADER WITH D/C PIN 35 | K 36 | F http://www.molex.com/webdocs/datasheets/pdf/en-us//1051620001_MEMORY_CARD_SOCKET.pdf 37 | $ENDCMP 38 | # 39 | $CMP TLV62568DBVR 40 | D 2.5V-5.5V input, 1A high efficiency step-down buck converter in SOT23 and SOT563 package 41 | K 42 | F http://www.ti.com/lit/gpn/tlv62568 43 | $ENDCMP 44 | # 45 | $CMP BTA24-600BWRG 46 | D TRIAC BTA24-600BWRG, 600V, Gate Trigger 1.3V 50mA, TO-220AB Isolated 3-Pin 47 | K 48 | F http://www.st.com/web/en/resource/technical/document/datasheet/CD00002264.pdf 49 | $ENDCMP 50 | # 51 | $CMP 503548-1220 52 | D MOLEX - 503548-1220 - PCB STACKING CONNECTOR, RECEPTACLE, 12 POSITION, 0.4MM 53 | K 54 | F https://componentsearchengine.com/Datasheets/1/503548-1220.pdf 55 | $ENDCMP 56 | # 57 | $CMP S380 58 | D Diode Rectifier Bridge Single 800V 0.8A Automotive 4-Pin Mini-DIP SMD T/R 59 | K 60 | F https://www.arrow.com/en/products/s380/diotec-semiconductor-ag 61 | $ENDCMP 62 | # 63 | $CMP ASPI-0312FS-100M-T2 64 | D 10 H Shielded Drum Core, Wirewound Inductor 630 mA 290mOhm Nonstandard 65 | K 66 | F https://componentsearchengine.com/Datasheets/1/ASPI-0312FS-100M-T2.pdf 67 | $ENDCMP 68 | # 69 | $CMP NRS2012T4R7MGJ 70 | D FIXED IND 4.7UH 910MA 241 MOHM 71 | K 72 | F https://ds.yuden.co.jp/TYCOMPAS/ut/download?pn=NRH2412T4R7MNGH++&fileType=CA 73 | $ENDCMP 74 | # 75 | $CMP ASPI-0628-4R7M-T1 76 | D Low Profile Wirewound Inductor. 4.7uh, 20%, 31mohm. 2.7a, 3.0a, 6.0 x 6.0 x 2.8mm, Smd, t&r, 1k/Reel 77 | K 78 | F https://componentsearchengine.com/Datasheets/1/ASPI-0628-4R7M-T1.pdf 79 | $ENDCMP 80 | # 81 | $CMP NRH2410T2R2MN 82 | D Inductor Power Shielded Wirewound 2.2uH 20% 100KHz Ferrite 0.97A 0.18Ohm DCR T/R 83 | K 84 | F 85 | $ENDCMP 86 | # 87 | $CMP MIC5501-3.0YM5-TR 88 | D MIC5501-3.0YM5-TR, SOT23-5 89 | K 90 | F http://www.microchip.com/mymicrochip/filehandler.aspx?ddocname=en580292 91 | $ENDCMP 92 | # 93 | $CMP TPS65131TRGERQ1 94 | D Automotive Catalog Split-Rail Converter with Dual Positive and Negative Outputs (300mA typ) 95 | K 96 | F http://www.ti.com/lit/gpn/tps65131-q1 97 | $ENDCMP 98 | # 99 | $CMP CUS10S40,H3F 100 | D Schottky Diodes & Rectifiers Single High-speed switching 101 | K 102 | F https://toshiba.semicon-storage.com/ap-en/semiconductor/product/diodes/detail.CUS10S40.html 103 | $ENDCMP 104 | # 105 | $CMP AD5227BUJZ10-RL7 106 | D AD5227BUJZ10-RL7, Digital Potentiometer 10k 64-Position Linear Serial-3 Wire 8 Pin, TSOT 107 | K 108 | F 109 | $ENDCMP 110 | # 111 | $CMP MP2315GJ-Z 112 | D Switching Voltage Regulators 3A 24V 500kHz Sync buck 113 | K 114 | F https://componentsearchengine.com/Datasheets/1/MP2315GJ-Z.pdf 115 | $ENDCMP 116 | # 117 | $CMP INA180A3IDBVR 118 | D 26-V, low-/high-side, voltage output current sense amplifier 119 | K 120 | F http://www.ti.com/lit/gpn/INA180 121 | $ENDCMP 122 | # 123 | $CMP XT30PW-F 124 | D Socket; DC supply; XT30; female; PIN:2; on PCBs; THT; Colour: yellow 125 | K 126 | F https://www.tme.eu/Document/ce4077e36b79046da520ca73227e15de/XT30PW%20SPEC.pdf 127 | $ENDCMP 128 | # 129 | $CMP S8411-45R 130 | D Coin Cell Battery Retainer, Horizontal SMT, for CR1220 Coin Cell Batteries 131 | K 132 | F https://cdn.harwin.com/pdfs/S8411R.pdf 133 | $ENDCMP 134 | # 135 | #End Doc Library 136 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/105162-0001.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "105162-0001" (layer F.Cu) 2 | (descr "105162-0001") 3 | (tags "Connector") 4 | (attr smd) 5 | (fp_text reference J** (at -0.549 3.399) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at -0.549 3.399) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "105162-0001" (at -0.549 3.399) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -5.65 0) (end 5.65 0) (layer F.Fab) (width 0.2)) 15 | (fp_line (start 5.65 0) (end 5.65 6.45) (layer F.Fab) (width 0.2)) 16 | (fp_line (start 5.65 6.45) (end -5.65 6.45) (layer F.Fab) (width 0.2)) 17 | (fp_line (start -5.65 6.45) (end -5.65 0) (layer F.Fab) (width 0.2)) 18 | (fp_line (start -5.65 6.45) (end 5.65 6.45) (layer F.SilkS) (width 0.2)) 19 | (fp_line (start 5.65 6.45) (end 5.65 5.355) (layer F.SilkS) (width 0.2)) 20 | (fp_line (start -5.65 6.45) (end -5.65 6.028) (layer F.SilkS) (width 0.2)) 21 | (fp_circle (center 3.584 8.15) (end 3.584 8.20657) (layer F.SilkS) (width 0.2)) 22 | (pad 1 smd rect (at 3.55 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 23 | (pad 2 smd rect (at 2.45 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 24 | (pad 3 smd rect (at 1.35 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 25 | (pad 4 smd rect (at 0.25 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 26 | (pad 5 smd rect (at -0.85 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 27 | (pad 6 smd rect (at -1.95 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 28 | (pad 7 smd rect (at -3.05 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 29 | (pad 8 smd rect (at -4.15 7.34 0) (size 0.5 1) (layers F.Cu F.Paste F.Mask)) 30 | (pad 9 smd rect (at 5.31 4.66 0) (size 0.72 0.78) (layers F.Cu F.Paste F.Mask)) 31 | (pad 10 smd rect (at 5.325 3.39 0) (size 1.05 1.08) (layers F.Cu F.Paste F.Mask)) 32 | (pad 11 smd rect (at 5.325 0.78 0) (size 1.05 1.2) (layers F.Cu F.Paste F.Mask)) 33 | (pad 12 smd rect (at -5.325 1.35 0) (size 1.05 1.2) (layers F.Cu F.Paste F.Mask)) 34 | (pad 13 smd rect (at -5.325 4.535 0) (size 1.05 2.39) (layers F.Cu F.Paste F.Mask)) 35 | (pad 14 smd rect (at 1.986 0.105 90) (size 0.55 2.91) (layers F.Cu F.Paste F.Mask)) 36 | (pad 15 smd rect (at -2.204 0.105 90) (size 0.55 2.91) (layers F.Cu F.Paste F.Mask)) 37 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\105162-0001.stp" 38 | (at (xyz 0 -0.13582677353085 0.010629921682238)) 39 | (scale (xyz 1 1 1)) 40 | (rotate (xyz -90 0 0)) 41 | ) 42 | ) 43 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/245863050104829.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "245863050104829" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "245863050104829+-1") 4 | (tags "Connector") 5 | (attr smd) 6 | (fp_text reference "J**" (at 0 0) (layer "F.SilkS") 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp 2671adf9-1aa7-4f95-b77b-b7fcb36f6432) 9 | ) 10 | (fp_text value "245863050104829" (at 0 0) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp f6e563fc-b67f-41d8-ad5e-3e11a94aaa4d) 13 | ) 14 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp de609fb5-4d54-47cf-b9f3-0ac6d930b3fb) 17 | ) 18 | (fp_line (start -5.55 -1.2) (end -5.55 -0.7) 19 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 6f631070-2250-4bab-b4da-425d3e2837dd)) 20 | (fp_line (start -5.55 0.6) (end -5.55 1.004) 21 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp a98339d1-b8d9-49ed-8863-7a6657fe021e)) 22 | (fp_line (start -5.55 0.935) (end -5.55 1.1) 23 | (stroke (width 0.1) (type solid)) (layer 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ccd0e751-9b44-45a8-b618-60204849a638)) 30 | (fp_line (start -3 -3) (end -3 3) 31 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 01e074a4-221b-4362-9e8b-15c614cda8d4)) 32 | (fp_line (start -3 3) (end 3 3) 33 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp b44aa553-67a1-4825-98c4-6dc9d3267802)) 34 | (fp_line (start 3 -3) (end -3 -3) 35 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 3c5b9203-0be8-4654-a108-a48683c1eb77)) 36 | (fp_line (start 3 3) (end 3 -3) 37 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 0fcef882-8437-452e-bde1-628832a25ba2)) 38 | (pad "1" smd rect (at -2.15 0) (size 2 5.7) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 294446a2-3687-4506-9dfb-ab60b8da551d)) 39 | (pad "2" smd rect (at 2.15 0) (size 2 5.7) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 590ad902-8834-4688-adb0-c57c230b1c14)) 40 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\ASPI-0628-4R7M-T1.stp" 41 | (offset (xyz 0 0 0)) 42 | (scale (xyz 1 1 1)) 43 | (rotate (xyz 0 0 0)) 44 | ) 45 | ) 46 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/CUS10S40H3F.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "CUS10S40H3F" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "USC(T=1.15mm)") 4 | (tags "Schottky Diode") 5 | (attr smd) 6 | (fp_text reference "D**" (at 0 -1.9) (layer "F.SilkS") 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp a6ca29fd-327a-4edc-9bcc-921acdd1c8d3) 9 | ) 10 | (fp_text value "CUS10S40H3F" (at 0 0) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp 34c4a29e-24a3-4012-ab6f-22e75db5b140) 13 | ) 14 | (fp_text user "${REFERENCE}" (at 0.075 2.8) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp fc0923bf-3801-4f5f-9258-89eeb7c46b27) 17 | ) 18 | (fp_line (start -1.575 -0.675) (end -1.575 -0.675) 19 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 519a067a-aaec-44bc-bbe1-da3aa3deae11)) 20 | (fp_line (start -1.475 -0.675) (end -1.475 -0.675) 21 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 463fc7f0-733e-404e-bf3a-06c920767fe8)) 22 | (fp_line (start -0.4 -0.625) (end 0.4 -0.625) 23 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp 7d26dc60-9555-46ca-b5ac-03281bb36e07)) 24 | (fp_line (start -0.4 0.625) (end 0.4 0.625) 25 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp 9715e703-c0b0-4560-962d-cbb08f75b142)) 26 | (fp_arc (start -1.575 -0.675) (mid -1.525 -0.725) (end -1.475 -0.675) 27 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 2e81f522-b00c-4310-b038-5b3eb59e773e)) 28 | (fp_arc (start -1.475 -0.675) (mid -1.525 -0.625) (end -1.575 -0.675) 29 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 4e64a926-f469-4128-a85a-aaa65002ad9e)) 30 | (fp_rect (start -1.7 -0.875) (end 1.7 0.875) 31 | (stroke (width 0.05) (type default)) (fill none) (layer "F.CrtYd") (tstamp 38d07ab2-7125-4c16-b9d0-84610f39a254)) 32 | (fp_line (start -0.85 -0.625) (end 0.85 -0.625) 33 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp a0f3cd86-b289-4e68-9fae-faae6eca92ff)) 34 | (fp_line (start -0.85 0.625) (end -0.85 -0.625) 35 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 4742070e-b15f-4f20-87bb-ee354e03b7d0)) 36 | (fp_line (start 0.85 -0.625) (end 0.85 0.625) 37 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 3efe61b7-ec31-4d2b-b637-8762047e9336)) 38 | (fp_line (start 0.85 0.625) (end -0.85 0.625) 39 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 421fa490-ce85-4a27-a750-39fbfc0f957a)) 40 | (pad "1" smd rect (at -1.15 0) (size 0.8 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6ca7a425-9ceb-4be5-8b0b-0625712956b4)) 41 | (pad "2" smd rect (at 1.15 0) (size 0.8 0.9) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 94bd0557-d5e1-4720-9781-73a894fc544f)) 42 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\CUS10S40,H3F.stp" 43 | (offset (xyz 0 0 0)) 44 | (scale (xyz 1 1 1)) 45 | (rotate (xyz 0 0 0)) 46 | ) 47 | ) 48 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/DIOM5226X240N.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "DIOM5226X240N" (layer F.Cu) 2 | (descr "ES1D-13-F-1") 3 | (tags "Diode") 4 | (attr smd) 5 | (fp_text reference D** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "DIOM5226X240N" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -3.575 -1.71) (end 3.575 -1.71) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 3.575 -1.71) (end 3.575 1.71) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 3.575 1.71) (end -3.575 1.71) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -3.575 1.71) (end -3.575 -1.71) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -2.598 -1.302) (end 2.598 -1.302) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 2.598 -1.302) (end 2.598 1.302) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 2.598 1.302) (end -2.598 1.302) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -2.598 1.302) (end -2.598 -1.302) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -2.598 -0.528) (end -1.822 -1.302) (layer F.Fab) (width 0.1)) 23 | (fp_line (start 2.598 -1.302) (end -2.925 -1.302) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start -2.598 1.302) (end 2.598 1.302) (layer F.SilkS) (width 0.2)) 25 | (pad 1 smd rect (at -2.15 0 90) (size 1.55 2.35) (layers F.Cu F.Paste F.Mask)) 26 | (pad 2 smd rect (at 2.15 0 90) (size 1.55 2.35) (layers F.Cu F.Paste F.Mask)) 27 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\ES1D-13-F.stp" 28 | (at (xyz 0 0 0)) 29 | (scale (xyz 1 1 1)) 30 | (rotate (xyz 0 0 0)) 31 | ) 32 | ) 33 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/FH35C25S03SHW50.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "FH35C25S03SHW50" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "FH35C-25S-0.3SHW(50)-3") 4 | (tags "Connector") 5 | (attr smd) 6 | (fp_text reference "J**" (at 0 0.088) (layer "F.SilkS") 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp b86b096a-4fb4-44f0-b743-502daa7e5979) 9 | ) 10 | (fp_text value "FH35C25S03SHW50" (at 0 0.088) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp 9405a4db-b5f7-4462-a92d-2bde61913700) 13 | ) 14 | (fp_text user "${REFERENCE}" (at 0 0.088) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp b35412d3-9345-4a91-b860-04e7b0d37f8b) 17 | ) 18 | (fp_line (start -4.55 -1.499) (end -3.9 -1.499) 19 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 32be07b7-c498-4e2c-bf92-1bba956caa6f)) 20 | (fp_line (start -4.55 0.5) (end -4.55 -1.499) 21 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 1ad3c190-e034-44dc-b3f9-dd10e52d0b08)) 22 | (fp_line (start 3.6 1.9) (end 3.6 1.9) 23 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp ef4e8182-6a08-49c3-b81a-fbeee2aa6ece)) 24 | (fp_line (start 3.6 2) (end 3.6 2) 25 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 4aa6ef9e-5c2c-49ff-9735-a6eedce902e8)) 26 | (fp_line (start 3.9 -1.499) (end 4.55 -1.499) 27 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp bf98bd3e-c177-4035-9c55-ec6bfeca7c76)) 28 | (fp_line (start 4.55 -1.499) (end 4.55 0.5) 29 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 3c17b0de-8062-424e-8675-fd083e37827d)) 30 | (fp_arc (start 3.6 1.9) (mid 3.65 1.95) (end 3.6 2) 31 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 364e756e-a3f6-4d68-90ef-45491e5bf873)) 32 | (fp_arc (start 3.6 2) (mid 3.55 1.95) (end 3.6 1.9) 33 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 956afe55-cbd0-47a7-a94d-3a6c072b9ebd)) 34 | (fp_line (start -5.55 -2.824) (end 5.55 -2.824) 35 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 2f02d2e8-51ac-4580-8290-71db38ceb293)) 36 | (fp_line (start -5.55 3) (end -5.55 -2.824) 37 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 6fd7f6f1-b59b-493d-b9ee-e12f2cde152f)) 38 | (fp_line (start 5.55 -2.824) (end 5.55 3) 39 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp bfe22f91-183b-4732-9022-38b3f04b17ee)) 40 | (fp_line (start 5.55 3) (end -5.55 3) 41 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 554f417b-f548-4937-a784-7a4ef1c41cf9)) 42 | (fp_line (start -4.55 -1.5) (end 4.55 -1.5) 43 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp c71c162b-3638-4560-9733-e2b27cadac05)) 44 | (fp_line (start -4.55 1.5) (end -4.55 -1.5) 45 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp 11937eb0-5f26-444f-a317-cd40afd00211)) 46 | (fp_line (start 4.55 -1.5) (end 4.55 1.5) 47 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp 4b908f60-e83c-434b-a68a-29da0a421362)) 48 | (fp_line (start 4.55 1.5) (end -4.55 1.5) 49 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp c9f6f37e-5942-454f-9765-10982f35de7b)) 50 | (pad "1" smd rect (at 3.6 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6a8e3194-2bf7-4a31-ba3f-3a9515e8da7b)) 51 | (pad "2" smd rect (at 3.3 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 29dde6a5-2666-456a-8075-54fe71e17d30)) 52 | (pad "3" smd rect (at 3 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp fcefcd2d-d064-4239-a7ce-1006e2bb2a23)) 53 | (pad "4" smd rect (at 2.7 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 141e5ae4-1499-4c51-86f6-050b5cf93a6f)) 54 | (pad "5" smd rect (at 2.4 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp e0846c4b-c2a0-4b29-b5fb-10b2a8c1c29a)) 55 | (pad "6" smd rect (at 2.1 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8c9bb7d8-222e-454b-8026-2ca855b3ea6d)) 56 | (pad "7" smd rect (at 1.8 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp dd172ce0-cdd9-466d-8ad5-74db1f9eb312)) 57 | (pad "8" smd rect (at 1.5 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 4055de75-7a48-4dcb-b982-15ca77394500)) 58 | (pad "9" smd rect (at 1.2 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 693b01f9-c8ae-4f15-b8e9-c816bf63aa97)) 59 | (pad "10" smd rect (at 0.9 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 0c4b0b85-6e66-45dc-90f3-cb999a5ef386)) 60 | (pad "11" smd rect (at 0.6 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ed1b6b7d-05cd-44a2-a171-0df376aa2d3a)) 61 | (pad "12" smd rect (at 0.3 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 65089f6b-75be-46a4-abfb-5ba386e1f7f0)) 62 | (pad "13" smd rect (at 0 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp b202cebc-758b-4e9c-b38b-fa7035135344)) 63 | (pad "14" smd rect (at -0.3 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f097aabb-7d73-4818-bf56-c817f914aaed)) 64 | (pad "15" smd rect (at -0.6 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 087c4082-8efb-4017-8d41-a27d8cdd0cf2)) 65 | (pad "16" smd rect (at -0.9 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 806a77ce-7ce3-43f9-98ca-c8d54e9cc164)) 66 | (pad "17" smd rect (at -1.2 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 8bcda064-0daa-4a4f-8995-c08004980771)) 67 | (pad "18" smd rect (at -1.5 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 81e10054-d2ae-4a71-8a21-1e8381d2b0bc)) 68 | (pad "19" smd rect (at -1.8 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 4abdf045-5899-49c7-a64b-fb4741a1cab1)) 69 | (pad "20" smd rect (at -2.1 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp cf5e7fcf-7077-4b6c-9626-9456e8ac1c6d)) 70 | (pad "21" smd rect (at -2.4 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6a2b3171-f401-436b-adeb-2750d6fffb98)) 71 | (pad "22" smd rect (at -2.7 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 7590644b-b4c1-4614-bf3e-fbda447214f9)) 72 | (pad "23" smd rect (at -3 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp cecfe4be-fc2b-4358-9ef5-df30087d6332)) 73 | (pad "24" smd rect (at -3.3 -1.499) (size 0.3 0.65) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp cec4bedc-188a-4dfd-b61b-80775459f0c5)) 74 | (pad "25" smd rect (at -3.6 1.375) (size 0.3 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp dc6399a1-5c83-4d20-8286-7446875e647c)) 75 | (pad "MP1" smd rect (at 4.3 1.101) (size 0.4 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp d5561a9a-d439-4f45-864d-01bfaddf4cb6)) 76 | (pad "MP2" smd rect (at -4.3 1.101) (size 0.4 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp eae8ae3a-3950-4b3b-ad21-c64e9c124b96)) 77 | (model "${KIPRJMOD}/libs/SamacSys/SamacSys_Parts.3dshapes/FH35C-25S-0.3SHW_50_.stp" 78 | (offset (xyz 1.969999999 -0.5299999634 -1.940000028)) 79 | (scale (xyz 1 1 1)) 80 | (rotate (xyz -90 0 -90)) 81 | ) 82 | ) 83 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/NE555DR.kicad_mod: -------------------------------------------------------------------------------- 1 | (module SOIC127P600X175-8N (layer F.Cu) 2 | (descr "D (R-PDSO-G8)") 3 | (tags "Integrated Circuit") 4 | (attr smd) 5 | (fp_text reference IC** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text value SOIC127P600X175-8N (at 0 0)(layer F.SilkS) hide 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_line (start -3.725 -2.75) (end 3.725 -2.75) (layer Dwgs.User) (width 0.05)) 12 | (fp_line (start 3.725 -2.75) (end 3.725 2.75) (layer Dwgs.User) (width 0.05)) 13 | (fp_line (start 3.725 2.75) (end -3.725 2.75) (layer Dwgs.User) (width 0.05)) 14 | (fp_line (start -3.725 2.75) (end -3.725 -2.75) (layer Dwgs.User) (width 0.05)) 15 | (fp_line (start -1.95 -2.45) (end 1.95 -2.45) (layer Dwgs.User) (width 0.1)) 16 | (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer Dwgs.User) (width 0.1)) 17 | (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer Dwgs.User) (width 0.1)) 18 | (fp_line (start -1.95 2.45) (end -1.95 -2.45) (layer Dwgs.User) (width 0.1)) 19 | (fp_line (start -1.95 -1.18) (end -0.68 -2.45) (layer Dwgs.User) (width 0.1)) 20 | (fp_line (start -1.6 -2.45) (end 1.6 -2.45) (layer F.SilkS) (width 0.2)) 21 | (fp_line (start 1.6 -2.45) (end 1.6 2.45) (layer F.SilkS) (width 0.2)) 22 | (fp_line (start 1.6 2.45) (end -1.6 2.45) (layer F.SilkS) (width 0.2)) 23 | (fp_line (start -1.6 2.45) (end -1.6 -2.45) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start -3.475 -2.58) (end -1.95 -2.58) (layer F.SilkS) (width 0.2)) 25 | (pad 1 smd rect (at -2.712 -1.905 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 26 | (pad 2 smd rect (at -2.712 -0.635 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 27 | (pad 3 smd rect (at -2.712 0.635 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 28 | (pad 4 smd rect (at -2.712 1.905 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 29 | (pad 5 smd rect (at 2.712 1.905 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 30 | (pad 6 smd rect (at 2.712 0.635 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 31 | (pad 7 smd rect (at 2.712 -0.635 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 32 | (pad 8 smd rect (at 2.712 -1.905 90) (size 0.65 1.525) (layers F.Cu F.Paste)) 33 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\NE555DR.stp" 34 | (at(xyz 0 0 0)) 35 | (scale (xyz 1 1 1)) 36 | (rotate(xyz 0 0 0)) 37 | ) 38 | ) 39 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/NRH2410T2R2MN.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "NRH2410T2R2MN" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "NRH2410T2R2MN-1") 4 | (tags "Inductor") 5 | (attr smd) 6 | (fp_text reference "L**" (at 0 0) (layer "F.SilkS") hide 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp 9c20ff59-f898-4adf-ab05-acdb13bcafee) 9 | ) 10 | (fp_text value "NRH2410T2R2MN" (at 0 0) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp a309ee39-6bf1-4fdb-a9a4-3c6b0b2e1e8d) 13 | ) 14 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp 38e978e5-6522-4b90-96e4-ac6ea967db81) 17 | ) 18 | (fp_line (start -1.4732 -1.4986) (end 1.4732 -1.4986) 19 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 2b9e525e-3333-43f7-b2ea-07b98388f68e)) 20 | (fp_line (start -1.4732 1.524) (end -1.4732 -1.4986) 21 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp d2d03070-9667-4f09-88e2-0465aeb3aa03)) 22 | (fp_line (start 1.4732 -1.4986) (end 1.4732 1.524) 23 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 01214e76-930f-445d-a13a-fbfb3fee668c)) 24 | (fp_line (start 1.4732 1.524) (end -1.4732 1.524) 25 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 49dc8481-2883-40e0-9f31-4f11a37f4b12)) 26 | (fp_line (start -1.2 -1.2) (end -1.2 1.2) 27 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp cda13730-8b1b-4f5e-9c30-2e7d4d1ba73a)) 28 | (fp_line (start -1.2 1.2) (end 1.2 1.2) 29 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 290a3f4f-49c9-4c4c-8fbf-95629e15c35c)) 30 | (fp_line (start 1.2 -1.2) (end -1.2 -1.2) 31 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 6089e878-436f-44a5-8689-50d18bbce470)) 32 | (fp_line (start 1.2 1.2) (end 1.2 -1.2) 33 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 579b08f8-97bc-4c84-b317-43eb717dbc90)) 34 | (pad "1" smd rect (at -0.725 0) (size 0.7 2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp df594e66-91da-43b5-9702-3c3c4b5316bd)) 35 | (pad "2" smd rect (at 0.725 0) (size 0.7 2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 1800f6b8-d4fb-4278-b92c-1ee5fff8b229)) 36 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\NRH2410T2R2MN.stp" 37 | (offset (xyz 0 0 0)) 38 | (scale (xyz 1 1 1)) 39 | (rotate (xyz 0 0 0)) 40 | ) 41 | ) 42 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/NRS2012T4R7MGJ.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "NRS2012T4R7MGJ" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "NRS2012T4R7MGJ-1") 4 | (tags "Inductor") 5 | (attr smd) 6 | (fp_text reference "L**" (at -0.4 0) (layer "F.SilkS") hide 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp e515c18d-cce4-43db-a789-221bcd578e24) 9 | ) 10 | (fp_text value "NRS2012T4R7MGJ" (at -0.4 0) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp 1171b16a-4847-47dd-b742-dac6cda9e9a5) 13 | ) 14 | (fp_text user "${REFERENCE}" (at -0.4 0) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp 41d7a0d2-9c9d-445e-8567-393741479219) 17 | ) 18 | (fp_line (start -1.27 -1.2954) (end 1.2446 -1.2954) 19 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 1370833b-38b0-42cf-88d1-ae508932b622)) 20 | (fp_line (start -1.27 1.3208) (end -1.27 -1.2954) 21 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp d5ae2334-403d-481b-bafd-d9e7ff6ef0c4)) 22 | (fp_line (start 1.2446 -1.2954) (end 1.2446 1.3208) 23 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 13ae0f71-8e52-40d5-b57a-d9ef2c435f1b)) 24 | (fp_line (start 1.2446 1.3208) (end -1.27 1.3208) 25 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp bc59f0dd-4369-4f72-8e17-f074986aee15)) 26 | (fp_line (start -1 -1) (end -1 1) 27 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp b13c97ef-c0e8-440c-b5b3-6424e611fd91)) 28 | (fp_line (start -1 1) (end 1 1) 29 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp debce619-3000-418e-a0df-8ac3b3889678)) 30 | (fp_line (start 1 -1) (end -1 -1) 31 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp 513690e4-9aa2-41b0-8a3b-aa6ea8142aef)) 32 | (fp_line (start 1 1) (end 1 -1) 33 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp d8eab311-44fa-4ad1-9aca-b3f588057d87)) 34 | (pad "1" smd rect (at -0.675 0) (size 0.65 2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 80142149-def3-4ea8-8ab8-21a8b323c704)) 35 | (pad "2" smd rect (at 0.675 0) (size 0.65 2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 998c1a22-5c5c-41b5-bbb5-5771307d6367)) 36 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\NRS2012T4R7MGJ.stp" 37 | (offset (xyz 0 0 0)) 38 | (scale (xyz 1 1 1)) 39 | (rotate (xyz 0 0 0)) 40 | ) 41 | ) 42 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/QFN50P400X400X100-25N-D.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "QFN50P400X400X100-25N-D" (layer F.Cu) 2 | (descr "RGE0024B") 3 | (tags "Integrated Circuit") 4 | (attr smd) 5 | (fp_text reference IC** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "QFN50P400X400X100-25N-D" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -2.625 -2.625) (end 2.625 -2.625) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 2.625 -2.625) (end 2.625 2.625) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 2.625 2.625) (end -2.625 2.625) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -2.625 2.625) (end -2.625 -2.625) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -2 -2) (end 2 -2) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 2 -2) (end 2 2) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 2 2) (end -2 2) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -2 2) (end -2 -2) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -2 -1.5) (end -1.5 -2) (layer F.Fab) (width 0.1)) 23 | (fp_circle (center -2.375 -2) (end -2.375 -1.875) (layer F.SilkS) (width 0.25)) 24 | (pad 1 smd rect (at -1.95 -1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 25 | (pad 2 smd rect (at -1.95 -0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 26 | (pad 3 smd rect (at -1.95 -0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 27 | (pad 4 smd rect (at -1.95 0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 28 | (pad 5 smd rect (at -1.95 0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 29 | (pad 6 smd rect (at -1.95 1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 30 | (pad 7 smd rect (at -1.25 1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 31 | (pad 8 smd rect (at -0.75 1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 32 | (pad 9 smd rect (at -0.25 1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 33 | (pad 10 smd rect (at 0.25 1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 34 | (pad 11 smd rect (at 0.75 1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 35 | (pad 12 smd rect (at 1.25 1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 36 | (pad 13 smd rect (at 1.95 1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 37 | (pad 14 smd rect (at 1.95 0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 38 | (pad 15 smd rect (at 1.95 0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 39 | (pad 16 smd rect (at 1.95 -0.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 40 | (pad 17 smd rect (at 1.95 -0.75 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 41 | (pad 18 smd rect (at 1.95 -1.25 90) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 42 | (pad 19 smd rect (at 1.25 -1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 43 | (pad 20 smd rect (at 0.75 -1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 44 | (pad 21 smd rect (at 0.25 -1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 45 | (pad 22 smd rect (at -0.25 -1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 46 | (pad 23 smd rect (at -0.75 -1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 47 | (pad 24 smd rect (at -1.25 -1.95 0) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask)) 48 | (pad 25 smd rect (at 0 0 0) (size 2.55 2.55) (layers F.Cu F.Paste F.Mask)) 49 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\TPS65131TRGERQ1.stp" 50 | (at (xyz 0 0 0)) 51 | (scale (xyz 1 1 1)) 52 | (rotate (xyz 0 0 0)) 53 | ) 54 | ) 55 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/S8411-45R_1.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "S8411-45R_1" (layer F.Cu) 2 | (descr "S8411-45R_1") 3 | (tags "Connector") 4 | (fp_text reference J** (at -0.412 -0.096) (layer F.SilkS) 5 | (effects (font (size 1.27 1.27) (thickness 0.254))) 6 | ) 7 | (fp_text user %R (at -0.412 -0.096) (layer F.Fab) 8 | (effects (font (size 1.27 1.27) (thickness 0.254))) 9 | ) 10 | (fp_text value "S8411-45R_1" (at -0.412 -0.096) (layer F.SilkS) hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | ) 13 | (fp_line (start -6.832 8.307) (end 6.832 8.307) (layer F.Fab) (width 0.2)) 14 | (fp_line (start -6.832 8.307) (end -6.832 6.625) (layer F.SilkS) (width 0.1)) 15 | (fp_line (start 6.832 8.307) (end 6.832 6.625) (layer F.Fab) (width 0.2)) 16 | (fp_line (start -6.832 6.625) (end -3.27 6.625) (layer F.SilkS) (width 0.1)) 17 | (fp_line (start 6.832 6.625) (end 3.27 6.625) (layer F.Fab) (width 0.2)) 18 | (fp_line (start -3.29687 6.625) (end -6.832 6.625) (layer F.Fab) (width 0.2)) 19 | (fp_line (start -6.832 6.625) (end -6.832 8.307) (layer F.Fab) (width 0.2)) 20 | (fp_line (start 6.832 8.307) (end 6.832 6.625) (layer F.SilkS) (width 0.1)) 21 | (fp_line (start 6.832 6.625) (end 3.296 6.625) (layer F.SilkS) (width 0.1)) 22 | (fp_line (start -6.832 8.307) (end -1.553 8.307) (layer F.SilkS) (width 0.1)) 23 | (fp_line (start 6.832 8.307) (end 1.49 8.307) (layer F.SilkS) (width 0.1)) 24 | (fp_circle (center 0 0) (end 0 7.4) (layer F.Fab) (width 0.2)) 25 | (fp_arc (start 0 -0) (end -3.29687 -6.625) (angle -127.1) (layer F.SilkS) (width 0.1)) 26 | (fp_arc (start -4.9999999998107E-6 -0) (end 3.29687 6.625) (angle -127.1) (layer F.SilkS) (width 0.1)) 27 | (pad 1 smd rect (at 0 8.2 0) (size 2.3 4.5) (layers F.Cu F.Paste F.Mask)) 28 | (pad MP1 np_thru_hole circle (at 0 3.725) (size 1.3 1.3) (drill 1.3) (layers *.Cu *.Mask)) 29 | (pad MP2 np_thru_hole circle (at 0 -3.725) (size 1.05 1.05) (drill 1.05) (layers *.Cu *.Mask)) 30 | (pad 2 smd rect (at 0 -8.2 0) (size 2.3 4.5) (layers F.Cu F.Paste F.Mask)) 31 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\S8411-45R.stp" 32 | (at (xyz 0 0.027559054648782 0.009055118274501)) 33 | (scale (xyz 1 1 1)) 34 | (rotate (xyz -90 0 0)) 35 | ) 36 | ) 37 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/SOP254P650X170-4N.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "SOP254P650X170-4N" (layer F.Cu) 2 | (descr "TO-269AA") 3 | (tags "Diode") 4 | (attr smd) 5 | (fp_text reference D** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "SOP254P650X170-4N" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -4.025 -2.65) (end 4.025 -2.65) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 4.025 -2.65) (end 4.025 2.65) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 4.025 2.65) (end -4.025 2.65) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -4.025 2.65) (end -4.025 -2.65) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -1.95 -2.35) (end 1.95 -2.35) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 1.95 -2.35) (end 1.95 2.35) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 1.95 2.35) (end -1.95 2.35) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -1.95 2.35) (end -1.95 -2.35) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -1.95 0.19) (end 0.59 -2.35) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -1.625 -2.35) (end 1.625 -2.35) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start 1.625 -2.35) (end 1.625 2.35) (layer F.SilkS) (width 0.2)) 25 | (fp_line (start 1.625 2.35) (end -1.625 2.35) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start -1.625 2.35) (end -1.625 -2.35) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start -3.775 -2.12) (end -1.975 -2.12) (layer F.SilkS) (width 0.2)) 28 | (pad 1 smd rect (at -2.875 -1.27 90) (size 1 1.8) (layers F.Cu F.Paste F.Mask)) 29 | (pad 2 smd rect (at -2.875 1.27 90) (size 1 1.8) (layers F.Cu F.Paste F.Mask)) 30 | (pad 3 smd rect (at 2.875 1.27 90) (size 1 1.8) (layers F.Cu F.Paste F.Mask)) 31 | (pad 4 smd rect (at 2.875 -1.27 90) (size 1 1.8) (layers F.Cu F.Paste F.Mask)) 32 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\S380.stp" 33 | (at (xyz 0 0 0)) 34 | (scale (xyz 1 1 1)) 35 | (rotate (xyz 0 0 0)) 36 | ) 37 | ) 38 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/SOT65P280X100-8L.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "SOT65P280X100-8L" (layer F.Cu) 2 | (descr "UJ-8 (TSOT)") 3 | (tags "Integrated Circuit") 4 | (attr smd) 5 | (fp_text reference IC** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "SOT65P280X100-8L" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -1.725 -1.55) (end 1.725 -1.55) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 1.725 -1.55) (end 1.725 1.55) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 1.725 1.55) (end -1.725 1.55) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -1.725 1.55) (end -1.725 -1.55) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -0.8 -1.45) (end 0.8 -1.45) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 0.8 -1.45) (end 0.8 1.45) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 0.8 1.45) (end -0.8 1.45) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -0.8 1.45) (end -0.8 -1.45) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -0.8 -0.8) (end -0.15 -1.45) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -0.425 -1.45) (end 0.425 -1.45) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start 0.425 -1.45) (end 0.425 1.45) (layer F.SilkS) (width 0.2)) 25 | (fp_line (start 0.425 1.45) (end -0.425 1.45) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start -0.425 1.45) (end -0.425 -1.45) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start -1.625 -1.55) (end -0.775 -1.55) (layer F.SilkS) (width 0.2)) 28 | (pad 1 smd rect (at -1.2 -0.975 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 29 | (pad 2 smd rect (at -1.2 -0.325 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 30 | (pad 3 smd rect (at -1.2 0.325 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 31 | (pad 4 smd rect (at -1.2 0.975 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 32 | (pad 5 smd rect (at 1.2 0.975 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 33 | (pad 6 smd rect (at 1.2 0.325 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 34 | (pad 7 smd rect (at 1.2 -0.325 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 35 | (pad 8 smd rect (at 1.2 -0.975 90) (size 0.45 0.85) (layers F.Cu F.Paste F.Mask)) 36 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\AD5227BUJZ10-RL7.stp" 37 | (at (xyz 0 0 0)) 38 | (scale (xyz 1 1 1)) 39 | (rotate (xyz 0 0 0)) 40 | ) 41 | ) 42 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/SOT65P280X100-8N.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "SOT65P280X100-8N" (layer F.Cu) 2 | (descr "TSOT23-8") 3 | (tags "Integrated Circuit") 4 | (attr smd) 5 | (fp_text reference IC** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "SOT65P280X100-8N" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -2.125 -1.75) (end 2.125 -1.75) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 2.125 -1.75) (end 2.125 1.75) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 2.125 1.75) (end -2.125 1.75) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -2.125 1.75) (end -2.125 -1.75) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -0.8 -1.45) (end 0.8 -1.45) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 0.8 -1.45) (end 0.8 1.45) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 0.8 1.45) (end -0.8 1.45) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -0.8 1.45) (end -0.8 -1.45) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -0.8 -0.8) (end -0.15 -1.45) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -0.375 -1.45) (end 0.375 -1.45) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start 0.375 -1.45) (end 0.375 1.45) (layer F.SilkS) (width 0.2)) 25 | (fp_line (start 0.375 1.45) (end -0.375 1.45) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start -0.375 1.45) (end -0.375 -1.45) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start -1.875 -1.55) (end -0.725 -1.55) (layer F.SilkS) (width 0.2)) 28 | (pad 1 smd rect (at -1.3 -0.975 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 29 | (pad 2 smd rect (at -1.3 -0.325 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 30 | (pad 3 smd rect (at -1.3 0.325 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 31 | (pad 4 smd rect (at -1.3 0.975 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 32 | (pad 5 smd rect (at 1.3 0.975 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 33 | (pad 6 smd rect (at 1.3 0.325 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 34 | (pad 7 smd rect (at 1.3 -0.325 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 35 | (pad 8 smd rect (at 1.3 -0.975 90) (size 0.45 1.15) (layers F.Cu F.Paste F.Mask)) 36 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\MP2315GJ-Z.stp" 37 | (at (xyz 0 0 0)) 38 | (scale (xyz 1 1 1)) 39 | (rotate (xyz 0 0 0)) 40 | ) 41 | ) 42 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/SOT95P280X145-5N.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "SOT95P280X145-5N" (layer F.Cu) 2 | (descr "DBV0005A") 3 | (tags "Filter") 4 | (attr smd) 5 | (fp_text reference FL** (at 0 0) (layer F.SilkS) 6 | (effects (font (size 1.27 1.27) (thickness 0.254))) 7 | ) 8 | (fp_text user %R (at 0 0) (layer F.Fab) 9 | (effects (font (size 1.27 1.27) (thickness 0.254))) 10 | ) 11 | (fp_text value "SOT95P280X145-5N" (at 0 0) (layer F.SilkS) hide 12 | (effects (font (size 1.27 1.27) (thickness 0.254))) 13 | ) 14 | (fp_line (start -2.1 -1.775) (end 2.1 -1.775) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 2.1 -1.775) (end 2.1 1.775) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start 2.1 1.775) (end -2.1 1.775) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -2.1 1.775) (end -2.1 -1.775) (layer F.CrtYd) (width 0.05)) 18 | (fp_line (start -0.8 -1.45) (end 0.8 -1.45) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 0.8 -1.45) (end 0.8 1.45) (layer F.Fab) (width 0.1)) 20 | (fp_line (start 0.8 1.45) (end -0.8 1.45) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -0.8 1.45) (end -0.8 -1.45) (layer F.Fab) (width 0.1)) 22 | (fp_line (start -0.8 -0.5) (end 0.15 -1.45) (layer F.Fab) (width 0.1)) 23 | (fp_line (start -0.3 -1.45) (end 0.3 -1.45) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start 0.3 -1.45) (end 0.3 1.45) (layer F.SilkS) (width 0.2)) 25 | (fp_line (start 0.3 1.45) (end -0.3 1.45) (layer F.SilkS) (width 0.2)) 26 | (fp_line (start -0.3 1.45) (end -0.3 -1.45) (layer F.SilkS) (width 0.2)) 27 | (fp_line (start -1.85 -1.5) (end -0.65 -1.5) (layer F.SilkS) (width 0.2)) 28 | (pad 1 smd rect (at -1.25 -0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask)) 29 | (pad 2 smd rect (at -1.25 0 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask)) 30 | (pad 3 smd rect (at -1.25 0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask)) 31 | (pad 4 smd rect (at 1.25 0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask)) 32 | (pad 5 smd rect (at 1.25 -0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask)) 33 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\INA180A3IDBVR.stp" 34 | (at (xyz 0 0 0)) 35 | (scale (xyz 1 1 1)) 36 | (rotate (xyz 0 0 0)) 37 | ) 38 | ) 39 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/SOT95P280X145-6N.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "SOT95P280X145-6N" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "DBV (R-PDSO-G6)") 4 | (tags "Integrated Circuit") 5 | (attr smd) 6 | (fp_text reference "IC**" (at 0 0) (layer "F.SilkS") hide 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp d8d5a372-b5d0-4e24-a901-b876f799d655) 9 | ) 10 | (fp_text value "SOT95P280X145-6N" (at 0 0) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp c0135be5-d018-42b3-af24-fc14a1967dfa) 13 | ) 14 | (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp bc22d848-ac13-4b3b-a1f0-1e5156f9d78f) 17 | ) 18 | (fp_line (start -1.85 -1.6) (end -0.65 -1.6) 19 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp a0e96e7a-c7b4-4921-a5d3-18cf4c7fc840)) 20 | (fp_line (start -0.3 -1.45) (end 0.3 -1.45) 21 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp 80911275-960a-456f-90c3-a1761e2421f7)) 22 | (fp_line (start -0.3 1.45) (end -0.3 -1.45) 23 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp 4d6e24e0-ddd6-4c36-8f1d-34446166ce4e)) 24 | (fp_line (start 0.3 -1.45) (end 0.3 1.45) 25 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp 9266e86a-3cf4-4525-b133-864dbed2e3d6)) 26 | (fp_line (start 0.3 1.45) (end -0.3 1.45) 27 | (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp ddf2c532-841b-4da3-9182-26fe7ab02e19)) 28 | (fp_line (start -2.1 -1.775) (end 2.1 -1.775) 29 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 307ab8fd-e706-4116-b4e8-3fcf63955d45)) 30 | (fp_line (start -2.1 1.775) (end -2.1 -1.775) 31 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 9c0915a2-94dc-49fe-97c8-9b71c514652a)) 32 | (fp_line (start 2.1 -1.775) (end 2.1 1.775) 33 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 185574f5-f68f-4fa0-9326-b7fd3b3bfa82)) 34 | (fp_line (start 2.1 1.775) (end -2.1 1.775) 35 | (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 24607248-7a6f-4735-a3c6-0b8f277f15f7)) 36 | (fp_line (start -0.8 -1.45) (end 0.8 -1.45) 37 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp aad949e6-71c6-48ab-a0f4-d082c97e20bb)) 38 | (fp_line (start -0.8 -0.5) (end 0.15 -1.45) 39 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 7bd699cd-446b-4fb1-8b13-cf26e75d2d43)) 40 | (fp_line (start -0.8 1.45) (end -0.8 -1.45) 41 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 3d1a8650-cc45-43f9-98b2-500edabe0f1d)) 42 | (fp_line (start 0.8 -1.45) (end 0.8 1.45) 43 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 0f0b2634-8141-46c6-980c-edbf43c972d5)) 44 | (fp_line (start 0.8 1.45) (end -0.8 1.45) 45 | (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 4d9edfd5-65e7-4c24-b355-539c807d110a)) 46 | (pad "1" smd rect (at -1.25 -0.95 90) (size 0.6 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 31cf3753-aa1d-4850-8177-23e0dac36133)) 47 | (pad "2" smd rect (at -1.25 0 90) (size 0.6 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 5143a72a-27c1-45d8-aca9-20d8126f9160)) 48 | (pad "3" smd rect (at -1.25 0.95 90) (size 0.6 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 6c6b24c6-668d-4b3c-a417-7c6ae60da228)) 49 | (pad "4" smd rect (at 1.25 0.95 90) (size 0.6 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 0d00dd07-1d67-4ed9-82d6-c75b8f095ab2)) 50 | (pad "5" smd rect (at 1.25 0 90) (size 0.6 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 7efe4652-ad90-4729-ba1c-f083607797d2)) 51 | (pad "6" smd rect (at 1.25 -0.95 90) (size 0.6 1.2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 642d8335-7998-4df7-bc39-6d7ea34cf7da)) 52 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\ADC081S021CIMF_NOPB.stp" 53 | (offset (xyz 0 0 0)) 54 | (scale (xyz 1 1 1)) 55 | (rotate (xyz 0 0 0)) 56 | ) 57 | ) 58 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/TO255P460X1020X2005-3P.kicad_mod: -------------------------------------------------------------------------------- 1 | (module "TO255P460X1020X2005-3P" (layer F.Cu) 2 | (descr "TO-220AB") 3 | (tags "Triac") 4 | (fp_text reference Q** (at 0 0) (layer F.SilkS) 5 | (effects (font (size 1.27 1.27) (thickness 0.254))) 6 | ) 7 | (fp_text user %R (at 0 0) (layer F.Fab) 8 | (effects (font (size 1.27 1.27) (thickness 0.254))) 9 | ) 10 | (fp_text value "TO255P460X1020X2005-3P" (at 0 0) (layer F.SilkS) hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | ) 13 | (fp_line (start -2.9 -3.2) (end 8 -3.2) (layer F.CrtYd) (width 0.05)) 14 | (fp_line (start 8 -3.2) (end 8 1.9) (layer F.CrtYd) (width 0.05)) 15 | (fp_line (start 8 1.9) (end -2.9 1.9) (layer F.CrtYd) (width 0.05)) 16 | (fp_line (start -2.9 1.9) (end -2.9 -3.2) (layer F.CrtYd) (width 0.05)) 17 | (fp_line (start -2.65 -2.95) (end 7.75 -2.95) (layer F.Fab) (width 0.1)) 18 | (fp_line (start 7.75 -2.95) (end 7.75 1.65) (layer F.Fab) (width 0.1)) 19 | (fp_line (start 7.75 1.65) (end -2.65 1.65) (layer F.Fab) (width 0.1)) 20 | (fp_line (start -2.65 1.65) (end -2.65 -2.95) (layer F.Fab) (width 0.1)) 21 | (fp_line (start -2.65 -1.675) (end -1.375 -2.95) (layer F.Fab) (width 0.1)) 22 | (fp_line (start 7.75 1.65) (end 7.75 -2.95) (layer F.SilkS) (width 0.2)) 23 | (fp_line (start 7.75 -2.95) (end -2.65 -2.95) (layer F.SilkS) (width 0.2)) 24 | (fp_line (start -2.65 -2.95) (end -2.65 0) (layer F.SilkS) (width 0.2)) 25 | (pad 1 thru_hole rect (at 0 0) (size 1.98 1.98) (drill 1.32) (layers *.Cu *.Mask)) 26 | (pad 2 thru_hole circle (at 2.55 0) (size 1.98 1.98) (drill 1.32) (layers *.Cu *.Mask)) 27 | (pad 3 thru_hole circle (at 5.1 0) (size 1.98 1.98) (drill 1.32) (layers *.Cu *.Mask)) 28 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\BTA24-600BWRG.stp" 29 | (at (xyz 0 0 0)) 30 | (scale (xyz 1 1 1)) 31 | (rotate (xyz 0 0 0)) 32 | ) 33 | ) 34 | -------------------------------------------------------------------------------- /hardware/libs/SamacSys/SamacSys_Parts.pretty/XT30PWF.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "XT30PWF" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (descr "XT30PW-F-2") 4 | (tags "Connector") 5 | (attr through_hole) 6 | (fp_text reference "J**" (at 2.5 -6.862) (layer "F.SilkS") 7 | (effects (font (size 1.27 1.27) (thickness 0.254))) 8 | (tstamp bf16f86e-b0d0-45f7-aafa-88e63780cbd6) 9 | ) 10 | (fp_text value "XT30PWF" (at 2.5 -6.862) (layer "F.SilkS") hide 11 | (effects (font (size 1.27 1.27) (thickness 0.254))) 12 | (tstamp 75c2a536-3650-45a7-8c32-5685a5d7e0e5) 13 | ) 14 | (fp_text user "${REFERENCE}" (at 2.5 -6.862) (layer "F.Fab") 15 | (effects (font (size 1.27 1.27) (thickness 0.254))) 16 | (tstamp 5462702d-d6eb-4aaf-a66e-3d3de849d512) 17 | ) 18 | (fp_line (start -4.15 -15) (end 9.15 -15) 19 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp b9da3e5e-2071-4daf-a6db-ce3328517acf)) 20 | (fp_line (start -4.15 -3) (end -4.15 -15) 21 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 658c3e5c-b9a7-4ea9-bb69-cee52f6e4b72)) 22 | (fp_line (start 9.15 -15) (end 9.15 -3) 23 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp a381f647-5810-4f74-ad24-f016cba6a57a)) 24 | (fp_line (start 9.15 -3) (end -4.15 -3) 25 | (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 74f061db-a37c-4a54-b843-c1c386258da5)) 26 | (fp_line (start -5.15 -16) (end 10.15 -16) 27 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp eaff6598-b62d-429e-a726-2fcd2df8af99)) 28 | (fp_line (start -5.15 2.275) (end -5.15 -16) 29 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp a7879817-d4df-4aef-84de-e56c1f3f13c8)) 30 | (fp_line (start 10.15 -16) (end 10.15 2.275) 31 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 03237c49-1a7f-4c64-8124-aaefa664ec1b)) 32 | (fp_line (start 10.15 2.275) (end -5.15 2.275) 33 | (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 8f40437c-15aa-4db0-a18b-1a7f7d27dbda)) 34 | (fp_line (start -4.15 -15) (end 9.15 -15) 35 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp 058d618b-1896-4482-b686-bc611f9677b1)) 36 | (fp_line (start -4.15 -3) (end -4.15 -15) 37 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp ec1069dd-7ca4-4f76-b50f-d558a379ddd9)) 38 | (fp_line (start 9.15 -15) (end 9.15 -3) 39 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp b72f9d07-359f-4bf8-8688-6a38d9d62437)) 40 | (fp_line (start 9.15 -3) (end -4.15 -3) 41 | (stroke (width 0.2) (type solid)) (layer "F.Fab") (tstamp 0fbbcbea-0ba7-4a2a-b8a0-310c6b5e6763)) 42 | (pad "" thru_hole circle (at -3 -5) (size 1.5 1.5) (drill 1) (layers "*.Cu" "*.Mask") (tstamp fa32bbce-2c59-40de-88e6-a80e7a63ff90)) 43 | (pad "" thru_hole circle (at 8 -5) (size 1.5 1.5) (drill 1) (layers "*.Cu" "*.Mask") (tstamp 80b2f111-6e1b-4ef6-b6a8-c6f33a63d112)) 44 | (pad "1" thru_hole circle (at 0 0) (size 2.55 2.55) (drill 1.7) (layers "*.Cu" "*.Mask") (tstamp 741682ba-6655-4360-a4da-67de77da47ff)) 45 | (pad "2" thru_hole circle (at 5 0) (size 2.55 2.55) (drill 1.7) (layers "*.Cu" "*.Mask") (tstamp 362f31d6-6a9e-4c0b-b31a-053304b8bc03)) 46 | (model "D:\\SamacSys\\Kicad\\SamacSys_Parts.3dshapes\\XT30PW-F.stp" 47 | (offset (xyz 2.499999962 7.929999709 0.2099999903)) 48 | (scale (xyz 1 1 1)) 49 | (rotate (xyz 0 0 -180)) 50 | ) 51 | ) 52 | -------------------------------------------------------------------------------- /hardware/libs/mylib/mylib.pretty/FPC_34.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "FPC_34" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (property "Sheetfile" "SSD2828.kicad_sch") 4 | (property "Sheetname" "SSD2828") 5 | (property "ki_description" "Generic connector, single row, 01x34, script generated (kicad-library-utils/schlib/autogen/connector/)") 6 | (property "ki_keywords" "connector") 7 | (attr through_hole) 8 | (fp_text reference "J3" (at 0 1.85) (layer "F.SilkS") hide 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | (tstamp 722cf3bb-a1bf-44fd-99a0-b6ca5884cfdf) 11 | ) 12 | (fp_text value "Conn_01x34" (at 0 3) (layer "F.Fab") 13 | (effects (font (size 1 1) (thickness 0.15))) 14 | (tstamp 7632d71d-9a30-401e-b0a9-06a68ee21de3) 15 | ) 16 | (fp_line (start -11.41 1.575) (end -8.5 1.575) 17 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 4db1a0ad-e0c4-4527-b590-f52710589bef)) 18 | (fp_line (start -11.41 3.735) (end -11.41 1.575) 19 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp d4047a48-47ae-43bc-9ca0-164f87340331)) 20 | (fp_line (start -8.5 -0.88) (end 8.5 -0.88) 21 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 76fe3fa6-3c7f-46f4-94db-c1d85dfbe32f)) 22 | (fp_line (start -8.5 0.88) (end -8.5 3.735) 23 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 3571367b-1cb7-47fd-b2f2-5c2ab5f26fb4)) 24 | (fp_line (start -8.5 0.88) (end 8.5 0.88) 25 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 50dcdc09-31c4-478e-a283-a1de22e9d4a3)) 26 | (fp_line (start -8.5 1.575) (end -8.5 -0.88) 27 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 59b85dee-0be1-4317-9b4a-7b5885a9de29)) 28 | (fp_line (start -8.5 3.735) (end -11.41 3.735) 29 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp b8dcfbd3-4a41-47d1-a8e8-bae0629b56a7)) 30 | (fp_line (start 8.5 0.88) (end 8.5 3.735) 31 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp f3886383-8e10-4289-9faf-059068aef1f4)) 32 | (fp_line (start 8.5 1.575) (end 8.5 -0.88) 33 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 9f45ed7e-646e-4ea2-90c8-9164aa8c3dec)) 34 | (fp_line (start 8.5 3.735) (end 11.41 3.735) 35 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 8cb3a1d0-ea17-46c0-af10-ce750357d863)) 36 | (fp_line (start 11.41 1.575) (end 8.5 1.575) 37 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp 5c19d238-623d-4b58-b9b5-975077df06c2)) 38 | (fp_line (start 11.41 3.735) (end 11.41 1.575) 39 | (stroke (width 0.12) (type default)) (layer "F.SilkS") (tstamp cad19315-c1f6-49e9-b358-00002c42c6f1)) 40 | (fp_line (start -11.65 -1.1) (end -11.65 4) 41 | (stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp e7409ebd-8797-4a26-bca7-be69acec3b56)) 42 | (fp_line (start -11.65 -1.1) (end 11.65 -1.1) 43 | (stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp c0f8a1ab-794f-43e6-a668-673aaff7f1c9)) 44 | (fp_line (start -11.65 4) (end 11.65 4) 45 | (stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp aa04ef46-e3ac-4324-8291-77324688b5e5)) 46 | (fp_line (start 11.65 -1.1) (end 11.65 4) 47 | (stroke (width 0.05) (type default)) (layer "F.CrtYd") (tstamp 53307144-370e-45ed-84b9-d84016049840)) 48 | (pad "0" smd rect (at -9.95 2.715) (size 2.2 1.8) (layers "F.Cu" "F.Paste" "F.Mask") 49 | (thermal_bridge_angle 45) (tstamp e11bc023-37ca-44d5-8ebb-7f1e4710135c)) 50 | (pad "0" smd rect (at 9.95 2.715) (size 2.2 1.8) (layers "F.Cu" "F.Paste" "F.Mask") 51 | (thermal_bridge_angle 45) (tstamp a9127df8-bae3-477d-8c87-c2778e279f08)) 52 | (pad "1" smd rect (at -8.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 53 | (thermal_bridge_angle 45) (tstamp 539f5e86-a8d9-4fca-a055-0554a1b0f4d2)) 54 | (pad "2" smd rect (at -7.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 55 | (thermal_bridge_angle 45) (tstamp 6ee01752-a09a-4d4d-a61d-1724c4e6b757)) 56 | (pad "3" smd rect (at -7.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 57 | (thermal_bridge_angle 45) (tstamp e95e3886-b32e-4562-b8a9-5a5a5bf49011)) 58 | (pad "4" smd rect (at -6.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 59 | (thermal_bridge_angle 45) (tstamp 13abd59f-1ebd-4709-b2c8-05e425df9eb0)) 60 | (pad "5" smd rect (at -6.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 61 | (thermal_bridge_angle 45) (tstamp 68cbc436-bbfa-4f2b-8b69-01b0d1465859)) 62 | (pad "6" smd rect (at -5.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 63 | (thermal_bridge_angle 45) (tstamp d2ba00ba-6c41-4172-b4dc-4a0b57b07ec7)) 64 | (pad "7" smd rect (at -5.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 65 | (thermal_bridge_angle 45) (tstamp c45ad497-81a8-42d4-bc2f-8be62ced08b4)) 66 | (pad "8" smd rect (at -4.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 67 | (thermal_bridge_angle 45) (tstamp 9ca1f0e9-7b34-4e54-9fef-05a843b3e1d3)) 68 | (pad "9" smd rect (at -4.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 69 | (thermal_bridge_angle 45) (tstamp c83aeda8-964c-412d-80a0-519ac36ae484)) 70 | (pad "10" smd rect (at -3.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 71 | (thermal_bridge_angle 45) (tstamp 918658e4-44b8-46d3-8bf3-13334d4ae45b)) 72 | (pad "11" smd rect (at -3.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 73 | (thermal_bridge_angle 45) (tstamp 24316a17-db0a-40c7-b5d2-e38cd6b72530)) 74 | (pad "12" smd rect (at -2.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 75 | (thermal_bridge_angle 45) (tstamp d4e729cb-6c5f-4d07-9bdc-e593aa843865)) 76 | (pad "13" smd rect (at -2.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 77 | (thermal_bridge_angle 45) (tstamp 95384bc1-b35b-4ddd-b085-f8537ae0fb09)) 78 | (pad "14" smd rect (at -1.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 79 | (thermal_bridge_angle 45) (tstamp db35ac58-09ca-45c6-8a1f-b181df7b0250)) 80 | (pad "15" smd rect (at -1.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 81 | (thermal_bridge_angle 45) (tstamp 0e1cd376-4a66-4ef2-849f-6a84038352d6)) 82 | (pad "16" smd rect (at -0.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 83 | (thermal_bridge_angle 45) (tstamp 8044fe19-fb61-40c7-9033-1757b15720b7)) 84 | (pad "17" smd rect (at -0.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 85 | (thermal_bridge_angle 45) (tstamp c9e53f07-0f35-4beb-9539-938dc69a58f2)) 86 | (pad "18" smd rect (at 0.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 87 | (thermal_bridge_angle 45) (tstamp bfb6c14a-42fd-4bd2-9e83-3db8dcbc9e69)) 88 | (pad "19" smd rect (at 0.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 89 | (thermal_bridge_angle 45) (tstamp c7d1d151-26b6-449f-9663-3e57bf88e15a)) 90 | (pad "20" smd rect (at 1.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 91 | (thermal_bridge_angle 45) (tstamp 1378f58a-4682-49d3-a503-48c6779b6dd2)) 92 | (pad "21" smd rect (at 1.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 93 | (thermal_bridge_angle 45) (tstamp 6aaab818-f218-4fc3-b818-dbdf9dcc8292)) 94 | (pad "22" smd rect (at 2.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 95 | (thermal_bridge_angle 45) (tstamp f87d30cb-d5ea-414f-a764-303a243f6f48)) 96 | (pad "23" smd rect (at 2.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 97 | (thermal_bridge_angle 45) (tstamp 190b229a-f765-471f-b16e-660d41175450)) 98 | (pad "24" smd rect (at 3.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 99 | (thermal_bridge_angle 45) (tstamp 65175a80-a4f2-45bd-a43d-c7239db99659)) 100 | (pad "25" smd rect (at 3.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 101 | (thermal_bridge_angle 45) (tstamp 2a956a07-c63c-40b1-9da4-3d20b03ae142)) 102 | (pad "26" smd rect (at 4.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 103 | (thermal_bridge_angle 45) (tstamp e02a34ed-0145-47b4-8b56-605487b6b40b)) 104 | (pad "27" smd rect (at 4.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 105 | (thermal_bridge_angle 45) (tstamp fac600a0-d764-42d4-bba1-62c580380e32)) 106 | (pad "28" smd rect (at 5.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 107 | (thermal_bridge_angle 45) (tstamp 8ff879c3-3027-42e7-a18a-2c4a172521ca)) 108 | (pad "29" smd rect (at 5.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 109 | (thermal_bridge_angle 45) (tstamp 6ba327cd-f16f-44e0-beff-32cfb5b4ce1b)) 110 | (pad "30" smd rect (at 6.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 111 | (thermal_bridge_angle 45) (tstamp 6029c857-4083-49fb-942a-3d3527d2628f)) 112 | (pad "31" smd rect (at 6.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 113 | (thermal_bridge_angle 45) (tstamp a89b8910-8ce6-4a56-aae1-462408f163a1)) 114 | (pad "32" smd rect (at 7.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 115 | (thermal_bridge_angle 45) (tstamp d023f764-ab66-41eb-8f7f-297b6891346f)) 116 | (pad "33" smd rect (at 7.75 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 117 | (thermal_bridge_angle 45) (tstamp 2190bf4d-c728-48d1-b981-8f6d410c8adc)) 118 | (pad "34" smd rect (at 8.25 0) (size 0.3 1.4) (layers "F.Cu" "F.Paste" "F.Mask") 119 | (thermal_bridge_angle 45) (tstamp 94dbf582-9e74-4290-a5c8-5e7b73675d2c)) 120 | (model "${KIPRJMOD}/libs/C2797218/C2797218.3dshapes/FPC-SMD_KH-FG0.5-H2.0-34PIN.wrl" 121 | (offset (xyz 0 0 0)) 122 | (scale (xyz 1 1 1)) 123 | (rotate (xyz 0 0 0)) 124 | ) 125 | ) 126 | -------------------------------------------------------------------------------- /hardware/libs/mylib/mylib.pretty/myTestpoint.kicad_mod: -------------------------------------------------------------------------------- 1 | (footprint "myTestpoint" (version 20221018) (generator pcbnew) 2 | (layer "F.Cu") 3 | (attr smd) 4 | (fp_text reference "REF**" (at 0 -9.3 unlocked) (layer "F.SilkS") 5 | (effects (font (size 1 1) (thickness 0.15))) 6 | (tstamp 73867bf5-3c79-43e4-a151-79768442e738) 7 | ) 8 | (fp_text value "myTestpoint" (at 0 -7.8 unlocked) (layer "F.Fab") 9 | (effects (font (size 1 1) (thickness 0.15))) 10 | (tstamp 593de9e1-3aa6-4847-a066-52701c3da19f) 11 | ) 12 | (fp_text user "${REFERENCE}" (at 0 -6.3 unlocked) (layer "F.Fab") 13 | (effects (font (size 1 1) (thickness 0.15))) 14 | (tstamp 67f96569-0218-4c94-b0fe-9b455e90282f) 15 | ) 16 | (fp_rect (start -0.5 -0.5) (end 0.5 0.5) 17 | (stroke (width 0.12) (type default)) (fill none) (layer "F.SilkS") (tstamp f7302489-7cea-426f-9e1a-f33de54facab)) 18 | (fp_rect (start -0.4 -0.4) (end 0.4 0.4) 19 | (stroke (width 0.05) (type default)) (fill none) (layer "F.CrtYd") (tstamp cb673e8c-0f6d-482f-8f31-d11845d74389)) 20 | (pad "1" smd roundrect (at 0 0) (size 0.7 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) 21 | (thermal_bridge_angle 45) (tstamp 58fd93af-eb4a-4baf-adc7-1901acc750af)) 22 | ) 23 | -------------------------------------------------------------------------------- /hardware/schematics.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/hardware/schematics.pdf -------------------------------------------------------------------------------- /hardware/ssd2828_board.kicad_dru: -------------------------------------------------------------------------------- 1 | (version 1) 2 | 3 | # clearance 4 | (rule "via to track clearance" 5 | (constraint hole_clearance (min 0.254mm)) 6 | (condition "A.Type == 'via' && B.Type == 'track'")) 7 | 8 | (rule "via to via clearance (same nets)" 9 | (constraint hole_clearance (min 0.254mm)) 10 | (condition "A.Type == 'via' && B.Type == 'via' && A.Net == B.Net")) 11 | 12 | (rule "pad to pad clearance (with hole, different nets)" 13 | (constraint hole_clearance (min 0.5mm)) 14 | (condition "A.Type == 'through-hole' && B.Type == A.Type && A.Net != B.Net")) -------------------------------------------------------------------------------- /hardware/ssd2828_board.kicad_prl: -------------------------------------------------------------------------------- 1 | { 2 | "board": { 3 | "active_layer": 0, 4 | "active_layer_preset": "", 5 | "auto_track_width": true, 6 | "hidden_netclasses": [], 7 | "hidden_nets": [], 8 | "high_contrast_mode": 1, 9 | "net_color_mode": 2, 10 | "opacity": { 11 | "images": 0.6, 12 | "pads": 1.0, 13 | "tracks": 1.0, 14 | "vias": 1.0, 15 | "zones": 0.3199999928474426 16 | }, 17 | "ratsnest_display_mode": 0, 18 | "selection_filter": { 19 | "dimensions": true, 20 | "footprints": true, 21 | "graphics": true, 22 | "keepouts": true, 23 | "lockedItems": true, 24 | "otherItems": true, 25 | "pads": true, 26 | "text": true, 27 | "tracks": true, 28 | "vias": true, 29 | "zones": true 30 | }, 31 | "visible_items": [ 32 | 0, 33 | 1, 34 | 2, 35 | 3, 36 | 4, 37 | 5, 38 | 8, 39 | 9, 40 | 10, 41 | 11, 42 | 12, 43 | 13, 44 | 15, 45 | 16, 46 | 17, 47 | 18, 48 | 19, 49 | 20, 50 | 21, 51 | 22, 52 | 23, 53 | 24, 54 | 25, 55 | 26, 56 | 27, 57 | 28, 58 | 29, 59 | 30, 60 | 32, 61 | 33, 62 | 34, 63 | 35, 64 | 36, 65 | 39, 66 | 40 67 | ], 68 | "visible_layers": "004d0fc_80000007", 69 | "zone_display_mode": 0 70 | }, 71 | "git": { 72 | "repo_password": "", 73 | "repo_type": "", 74 | "repo_username": "", 75 | "ssh_key": "" 76 | }, 77 | "meta": { 78 | "filename": "ssd2828_board.kicad_prl", 79 | "version": 3 80 | }, 81 | "project": { 82 | "files": [] 83 | } 84 | } 85 | -------------------------------------------------------------------------------- /hardware/ssd2828_board.kicad_sch: -------------------------------------------------------------------------------- 1 | (kicad_sch (version 20230121) (generator eeschema) 2 | 3 | (uuid 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"ssd2828")(type "KiCad")(uri "${KIPRJMOD}/libs/ssd2828/ssd2828.kicad_sym")(options "")(descr "")) 5 | ) 6 | -------------------------------------------------------------------------------- /imgs/3D.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/imgs/3D.png -------------------------------------------------------------------------------- /imgs/IMG_5381.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/imgs/IMG_5381.JPG -------------------------------------------------------------------------------- /imgs/IMG_5384.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/imgs/IMG_5384.JPG -------------------------------------------------------------------------------- /imgs/IMG_5390.JPG: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dartcom/ssd2828-dev/d9958e7049fa86391073ed8e13d35fab8647275b/imgs/IMG_5390.JPG -------------------------------------------------------------------------------- /software/Makefile: -------------------------------------------------------------------------------- 1 | PROGRAMMING_PORT = ... 2 | 3 | BUILD_DIR = build 4 | SRC_DIR = src 5 | LIBS_DIR = libs 6 | SYSTEM_DIR = system 7 | 8 | 9 | CPU = cortex-m4 10 | FPU = fpv4-sp-d16 11 | 12 | 13 | START_SCRIPT = startup_stm32f401xc.s 14 | INIT_SCRIPT = system_stm32f4xx.c 15 | LD_SCRIPT = STM32F401CCUX_FLASH.ld 16 | TARGET = main 17 | 18 | ASFLAGS += -c 19 | ASFLAGS += -O0 20 | ASFLAGS += -mcpu=$(CPU) 21 | ASFLAGS += -mthumb 22 | ASFLAGS += -mfpu=$(FPU) 23 | ASFLAGS += -mfloat-abi=hard 24 | ASFLAGS += -fmessage-length=0 25 | 26 | CFLAGS += -mcpu=$(CPU) 27 | CFLAGS += -mthumb 28 | CFLAGS += -mfpu=$(FPU) 29 | CFLAGS += -mfloat-abi=hard 30 | CFLAGS += -Wall 31 | CFLAGS += -g3 -gdwarf-2 32 | CFLAGS += -fmessage-length=0 33 | CFLAGS += -specs=nosys.specs 34 | 35 | LSCRIPT = $(SYSTEM_DIR)/$(LD_SCRIPT) 36 | LFLAGS += -mcpu=$(CPU) 37 | LFLAGS += -mthumb 38 | LFLAGS += -mfpu=$(FPU) 39 | LFLAGS += -mfloat-abi=hard 40 | LFLAGS += -Wall 41 | LFLAGS += -specs=nosys.specs 42 | LFLAGS += -lgcc 43 | LFLAGS += -T$(LSCRIPT) 44 | LFLAGS += -lc 45 | LFLAGS += -lm 46 | LFLAGS += -lnosys 47 | 48 | 49 | 50 | CC = arm-none-eabi-gcc 51 | AS = arm-none-eabi-as 52 | LD = arm-none-eabi-ld 53 | OC = arm-none-eabi-objcopy 54 | OD = arm-none-eabi-objdump 55 | OS = arm-none-eabi-size 56 | 57 | 58 | 59 | AS_SRC = $(START_SCRIPT) 60 | C_SRC = $(INIT_SCRIPT) main.c delay.c spi.c ssd2828.c clk.c LH154Q01.c VS035ZSM.c 61 | 62 | OBJS = $(AS_SRC:%.s=$(BUILD_DIR)/%.o) 63 | OBJS += $(C_SRC:%.c=$(BUILD_DIR)/%.o) 64 | 65 | all: $(BUILD_DIR)/$(TARGET).bin 66 | 67 | 68 | $(BUILD_DIR)/$(TARGET).bin: $(BUILD_DIR)/$(TARGET).elf 69 | $(OC) -S -O binary $^ $@ 70 | $(OS) $^ 71 | 72 | $(BUILD_DIR)/$(TARGET).elf: $(OBJS) 73 | $(CC) $^ $(LFLAGS) -o $@ 74 | 75 | 76 | $(BUILD_DIR)/%.o: $(SYSTEM_DIR)/%.s 77 | $(CC) -x assembler-with-cpp $(ASFLAGS) $^ -o $@ 78 | 79 | $(BUILD_DIR)/%.o: $(SRC_DIR)/%.s 80 | $(CC) -x assembler-with-cpp $(ASFLAGS) $^ -o $@ 81 | 82 | $(BUILD_DIR)/%.o: $(LIBS_DIR)/%.s 83 | $(CC) -x assembler-with-cpp $(ASFLAGS) $^ -o $@ 84 | 85 | $(BUILD_DIR)/%.o: $(SYSTEM_DIR)/%.c 86 | $(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@ 87 | 88 | $(BUILD_DIR)/%.o: $(SRC_DIR)/%.c 89 | $(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@ 90 | 91 | $(BUILD_DIR)/%.o: $(LIBS_DIR)/%.c 92 | $(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@ 93 | 94 | clean: $(BUILD_DIR)/$(TARGET).bin 95 | -rm -fR $(BUILD_DIR)/*.o 96 | 97 | flash_cmsis_dap: $(BUILD_DIR)/$(TARGET).elf 98 | openocd -f interface/cmsis-dap.cfg -f board/atmel_sam3x_ek.cfg -c "program $< verify reset exit" 99 | 100 | flash: $(BUILD_DIR)/$(TARGET).elf 101 | openocd -f interface/stlink.cfg -f target/stm32f4x.cfg -c "program $(BUILD_DIR)/$(TARGET).elf verify reset exit" -------------------------------------------------------------------------------- /software/libs/delay.c: -------------------------------------------------------------------------------- 1 | #include "delay.h" 2 | 3 | 4 | volatile uint64_t ms_ticks; 5 | volatile uint64_t us_ticks; 6 | 7 | void delay_ms(uint32_t delay_ms){ 8 | ms_ticks = 0; 9 | while (delay_ms > ms_ticks){ 10 | __NOP(); 11 | } 12 | } 13 | 14 | void delay_us(uint32_t delay_us){ 15 | us_ticks = 0; 16 | while (delay_us > us_ticks){ 17 | __NOP(); 18 | } 19 | } 20 | 21 | void delay_init(){ 22 | SysTick->CTRL |= (1 << SysTick_CTRL_TICKINT_Pos) | (1 << SysTick_CTRL_CLKSOURCE_Pos); 23 | //set for 1us 24 | SysTick->LOAD = SystemCoreClock / 1000000; 25 | SysTick->VAL = 0x00000000; 26 | 27 | 28 | SysTick->CTRL |= (1 << SysTick_CTRL_ENABLE_Pos); 29 | NVIC_SetPriority(SysTick_IRQn, 0x25); 30 | NVIC_EnableIRQ(SysTick_IRQn); 31 | } 32 | 33 | void SysTick_Handler(){ 34 | us_ticks++; 35 | if((us_ticks == 1000)){ 36 | ms_ticks++; 37 | 38 | us_ticks = 0; 39 | } 40 | 41 | } -------------------------------------------------------------------------------- /software/libs/delay.h: -------------------------------------------------------------------------------- 1 | #ifndef DELAY_H 2 | #define DELAY_H 3 | 4 | #include 5 | #include 6 | #include "../system/stm32f4xx.h" 7 | 8 | 9 | 10 | void delay_ms(uint32_t delay); 11 | 12 | void delay_us(uint32_t delay); 13 | 14 | void delay_init(); 15 | 16 | #endif -------------------------------------------------------------------------------- /software/libs/spi.c: -------------------------------------------------------------------------------- 1 | #include "spi.h" 2 | 3 | 4 | 5 | void spi_gpio_init(){ 6 | //enable GPIOA 7 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; 8 | //set A4 A5 A6 A7 alternate function 9 | GPIOA->MODER |= (0x2<OTYPER &= ~GPIO_OTYPER_OT4 & ~GPIO_OTYPER_OT5 & ~GPIO_OTYPER_OT6 & ~GPIO_OTYPER_OT7; 12 | //set A4 A5 A6 A7 speed high 13 | GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR4_1 | GPIO_OSPEEDER_OSPEEDR5_1 | GPIO_OSPEEDER_OSPEEDR5_1 | GPIO_OSPEEDER_OSPEEDR6_1; 14 | //set A4 to AF0 15 | GPIOA->AFR[0] |= (5<AFR[0] |= (5<AFR[0] |= (5<AFR[0] |= (5<APB2ENR |= RCC_APB2ENR_SPI1EN; 28 | //set baudrate to fclk/64 29 | SPI1->CR1 |= (0b101 << SPI_CR1_BR_Pos) | SPI_CR1_MSTR; 30 | //set CPOL CPHA to 0 31 | SPI1->CR1 &= ~SPI_CR1_CPHA & ~SPI_CR1_CPOL; 32 | //set 8-bit data frame 33 | SPI1->CR1 &= ~SPI_CR1_DFF; 34 | //set MSB first 35 | SPI1->CR1 &= ~SPI_CR1_LSBFIRST; 36 | //enable the SS pin 37 | SPI1->CR2 |= SPI_CR2_SSOE; 38 | 39 | } 40 | 41 | 42 | void spi_exchange_8(uint8_t data_in, uint8_t *data_out){ 43 | uint8_t tmp; 44 | SPI1->CR1 |= SPI_CR1_SPE ; 45 | //wait for SPI1 to be available 46 | while((SPI1->SR & SPI_SR_BSY_Msk) != 0){ 47 | __NOP(); 48 | } 49 | //write data on TX register 50 | SPI1->DR = data_in; 51 | //wait for TX buffer to get empty and RX to fill up 52 | while( ((SPI1->SR & SPI_SR_RXNE_Msk) == 0)){ 53 | __NOP(); 54 | } 55 | tmp = SPI1->DR; 56 | if(data_out != NULL){ 57 | *data_out = tmp; 58 | } 59 | SPI1->CR1 &= ~SPI_CR1_SPE ; 60 | } 61 | -------------------------------------------------------------------------------- /software/libs/spi.h: -------------------------------------------------------------------------------- 1 | #ifndef SPI_H 2 | #define SPI_H 3 | 4 | #include 5 | #include 6 | #include "../system/stm32f4xx.h" 7 | 8 | 9 | void spi_init(); 10 | 11 | void spi_exchange_8(uint8_t data_in, uint8_t *data_out); 12 | 13 | #endif -------------------------------------------------------------------------------- /software/src/DCS.h: -------------------------------------------------------------------------------- 1 | #ifndef DCS_H 2 | #define DCS_H 3 | 4 | 5 | #define DCS_enter_idle_mode 0x39 6 | #define DCS_enter_invert_mode 0x21 7 | #define DCS_enter_normal_mode 0x13 8 | #define DCS_enter_partial_mode 0x12 9 | #define DCS_enter_sleep_mode 0x10 10 | #define DCS_exit_idle_mode 0x38 11 | #define DCS_exit_invert_mode 0x20 12 | #define DCS_exit_sleep_mode 0x11 13 | #define DCS_get_address_mode 0x0B 14 | #define DCS_get_blue_channel 0x08 15 | #define DCS_get_diagnostic_result 0x0F 16 | #define DCS_get_display_mode 0x0D 17 | #define DCS_get_green_channel 0x07 18 | #define DCS_get_pixel_format 0x0C 19 | #define DCS_get_power_mode 0x0A 20 | #define DCS_get_red_channel 0x06 21 | #define DCS_get_scanline 0x45 22 | #define DCS_get_signal_mode 0x0E 23 | #define DCS_nop 0x00 24 | #define DCS_read_DDB_continue 0xA8 25 | #define DCS_read_DDB_start 0xA1 26 | #define DCS_read_memory_continue 0x3E 27 | #define DCS_read_memory_start 0x2E 28 | #define DCS_set_address_mode 0x36 29 | #define DCS_set_column_address 0x2A 30 | #define DCS_set_display_off 0x28 31 | #define DCS_set_display_on 0x29 32 | #define DCS_set_gamma_curve 0x26 33 | #define DCS_set_page_address 0x2B 34 | #define DCS_set_partial_columns 0x31 35 | #define DCS_set_partial_rows 0x30 36 | #define DCS_set_pixel_format 0x3A 37 | #define DCS_set_scroll_area 0x33 38 | #define DCS_set_scroll_start 0x37 39 | #define DCS_set_tear_off 0x34 40 | #define DCS_set_tear_on 0x35 41 | #define DCS_set_tear_scanline 0x44 42 | #define DCS_soft_reset 0x01 43 | #define DCS_write_LUT 0x2D 44 | #define DCS_write_memory_continue 0x3C 45 | #define DCS_write_memory_start 0x2C 46 | 47 | 48 | #endif -------------------------------------------------------------------------------- /software/src/LH154Q01.c: -------------------------------------------------------------------------------- 1 | #include "LH154Q01.h" 2 | 3 | void LH154Q01_SSD2828_write_cfg(){ 4 | //set lanes number to 1 5 | ssd2828_SPI_write_reg(LCFR_REG, 0x0000); 6 | //disable the PLL 7 | ssd2828_SPI_write_reg(PCR_REG, 0x0000); 8 | //set PLL freq to 336MHZ 9 | ssd2828_SPI_write_reg(PLCR_REG, 0x0000|(1U << PLCR_FR_POS) | (1U << PLCR_MS_POS) | (14U << PLCR_NS_POS)); 10 | //enable the PLL 11 | ssd2828_SPI_write_reg(PCR_REG, 0x0000|(1U << PCR_PEN_POS)); 12 | //wait 2 ms to stabilize 13 | delay_ms(2); 14 | //set divider for low speed to 8MHZ 15 | ssd2828_SPI_write_reg(CCR_REG, 0x0000|(4U << CCR_LPD_POS)); 16 | //set MIPI packet format 17 | //enable EOT DCS HS 18 | //disable Read Video 19 | ssd2828_SPI_write_reg(CFGR_REG, 0x0000 | (1U << CFGR_EOT_POS) | (1U << CFGR_DCS_POS) | (1U << CFGR_HS_POS) ); 20 | //set virtual channel 0x0000 21 | ssd2828_SPI_write_reg(VCR_REG, 0x0000); 22 | } 23 | 24 | void LH154Q01_init(){ 25 | LH154Q01_init_GPIO(); 26 | 27 | //enable 1V8 28 | LH154Q01_V_PORT->ODR |= (1U << LH154Q01_1V8); 29 | //pull rst high 30 | LH154Q01_C_PORT->ODR |= (1U << LH154Q01_RST); 31 | //wait 250ms 32 | delay_ms(300); 33 | //pull rst low 34 | LH154Q01_C_PORT->ODR &= ~(1U << LH154Q01_RST); 35 | //wait 10ms 36 | delay_ms(10); 37 | //pull rst high 38 | LH154Q01_C_PORT->ODR |= (1U << LH154Q01_RST); 39 | //wait 10ms 40 | delay_ms(10); 41 | //enable 3V0 42 | LH154Q01_V_PORT->ODR |= (1U << LH154Q01_3V0); 43 | //wait 10ms 44 | delay_ms(10); 45 | } 46 | 47 | void LH154Q01_start(){ 48 | const uint8_t SLPOUT[]={1,0x11}; 49 | const uint8_t DISPOFF[]={1,0x28}; 50 | const uint8_t INV[]={1,0x21}; 51 | const uint8_t DISPON[]={1,0x29}; 52 | const uint8_t RGB[]={2,0x3A ,0x77};//24bit 53 | const uint8_t FLIP[]={2,0x36 ,0x08};//COLOR 54 | 55 | 56 | 57 | //SSD_WritePacket(SLPOUT); 58 | ssd2828_MIPI_write_DCS_short_np(0x11); 59 | delay_ms(100); 60 | //SSD_WritePacket(RGB); 61 | ssd2828_MIPI_write_DCS_short_p(0x3A, 0x77); 62 | //SSD_WritePacket(DISPON); 63 | ssd2828_MIPI_write_DCS_short_np(0x29); 64 | 65 | } 66 | 67 | 68 | 69 | void LH154Q01_init_GPIO(){ 70 | //enable GPIOB 71 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; 72 | 73 | //set 1V8 3V0 as outputs 74 | LH154Q01_V_PORT->MODER |= (1U << (LH154Q01_1V8*2)) | (1U << (LH154Q01_3V0*2)); 75 | //set to push pull 76 | LH154Q01_V_PORT->OTYPER &= ~(1U << (LH154Q01_1V8*2)) & ~(1U << (LH154Q01_3V0*2)); 77 | //set speed to low 78 | LH154Q01_V_PORT->OSPEEDR &= ~(3U << (LH154Q01_1V8*2)) & ~(3U << (LH154Q01_3V0*2)); 79 | //set LOW 80 | LH154Q01_V_PORT->ODR &= ~(1U << LH154Q01_1V8) & ~(1U << LH154Q01_3V0); 81 | 82 | 83 | //set RST BACKLIGHT as outputs 84 | LH154Q01_C_PORT->MODER |= (1U << (LH154Q01_BACKLIGHT*2)) | (1U << (LH154Q01_RST*2)); 85 | //set to push pull 86 | LH154Q01_C_PORT->OTYPER &= ~(1U << (LH154Q01_BACKLIGHT*2)) & ~(1U << (LH154Q01_RST*2)); 87 | //set speed to low 88 | LH154Q01_C_PORT->OSPEEDR &= ~(3U << (LH154Q01_BACKLIGHT*2)) & ~(3U << (LH154Q01_RST*2)); 89 | //set LOW 90 | LH154Q01_C_PORT->ODR &= ~(1U << LH154Q01_BACKLIGHT) & ~(1U << LH154Q01_RST); 91 | } 92 | 93 | 94 | void LH154Q01_backlight(uint8_t i){ 95 | if(i == 1){ 96 | LH154Q01_V_PORT->ODR |= (1U << LH154Q01_BACKLIGHT); 97 | }else{ 98 | LH154Q01_V_PORT->ODR &= ~(1U << LH154Q01_BACKLIGHT); 99 | } 100 | } 101 | 102 | -------------------------------------------------------------------------------- /software/src/LH154Q01.h: -------------------------------------------------------------------------------- 1 | #ifndef LH154Q01_H 2 | #define LH154Q01_H 3 | 4 | #include 5 | #include 6 | #include "../system/stm32f4xx.h" 7 | 8 | #include "../libs/delay.h" 9 | #include "../libs/spi.h" 10 | #include "ssd2828.h" 11 | 12 | #include "DCS.h" 13 | 14 | #define LH154Q01_V_PORT GPIOB 15 | #define LH154Q01_3V0 12U 16 | #define LH154Q01_1V8 1U 17 | 18 | #define LH154Q01_C_PORT GPIOB 19 | #define LH154Q01_BACKLIGHT 13U 20 | #define LH154Q01_RST 14U 21 | 22 | 23 | void LH154Q01_SSD2828_write_cfg(); 24 | 25 | void LH154Q01_init(); 26 | 27 | void LH154Q01_start(); 28 | 29 | void LH154Q01_init_GPIO(); 30 | 31 | void LH154Q01_backlight(uint8_t i); 32 | 33 | #endif -------------------------------------------------------------------------------- /software/src/VS035ZSM.h: -------------------------------------------------------------------------------- 1 | #ifndef VS035ZSM_H 2 | #define VS035ZSM_H 3 | 4 | #include 5 | #include 6 | #include "../system/stm32f4xx.h" 7 | 8 | #include "../libs/delay.h" 9 | #include "../libs/spi.h" 10 | #include "ssd2828.h" 11 | 12 | #include "DCS.h" 13 | 14 | 15 | #define VS035ZSM_V_PORT GPIOB 16 | #define VS035ZSM_BIAS 15U 17 | #define VS035ZSM_1V8 1U 18 | 19 | #define VS035ZSM_C_PORT GPIOA 20 | #define VS035ZSM_BACKLIGHT 8U 21 | #define VS035ZSM_RST 9U 22 | 23 | #define VS035ZSM_H_ACTIVE 1440U 24 | #define VS035ZSM_V_ACTIVE 1600U 25 | 26 | #define VS035ZSM_HSYNC 40U 27 | #define VS035ZSM_VSYNC 40U 28 | #define VS035ZSM_HFP 80U 29 | #define VS035ZSM_HBP 80U 30 | #define VS035ZSM_VFP 40U 31 | #define VS035ZSM_VBP 40U 32 | 33 | 34 | #define VS035ZSM_PARTIAL_HSYNC 10U 35 | #define VS035ZSM_PARTIAL_VSYNC 10U 36 | #define VS035ZSM_PARTIAL_HFP 80U 37 | #define VS035ZSM_PARTIAL_HBP 90U 38 | #define VS035ZSM_PARTIAL_VFP 30U 39 | #define VS035ZSM_PARTIAL_VBP 40U 40 | #define VS035ZSM_PARTIAL_HACT 1440U 41 | #define VS035ZSM_PARTIAL_VACT 864U 42 | 43 | #define VS035ZSM_PARTIAL_RES_X 1440U 44 | #define VS035ZSM_PARTIAL_RES_Y 864U 45 | 46 | //#define VS035ZSM_PARTIAL_RES_X (VS035ZSM_PARTIAL_HSYNC + VS035ZSM_PARTIAL_HFP + VS035ZSM_PARTIAL_HBP + VS035ZSM_PARTIAL_HACT) 47 | //#define VS035ZSM_PARTIAL_RES_Y (VS035ZSM_PARTIAL_VSYNC + VS035ZSM_PARTIAL_VFP + VS035ZSM_PARTIAL_VBP + VS035ZSM_PARTIAL_VACT) 48 | 49 | void VS035ZSM_SSD2828_write_cfg(); 50 | 51 | void VS035ZSM_init(); 52 | 53 | void VS035ZSM_start(); 54 | 55 | void VS035ZSM_init_GPIO(); 56 | 57 | void VS035ZSM_init_BACKLIGHT(); 58 | 59 | void VS035ZSM_backlight(uint8_t i); 60 | 61 | void VS035ZSM_set_partial(); 62 | 63 | #endif 64 | -------------------------------------------------------------------------------- /software/src/clk.c: -------------------------------------------------------------------------------- 1 | #include "clk.h" 2 | 3 | 4 | 5 | uint32_t HAL_RCC_GetSysClockFreq(){ 6 | uint32_t pllm = 0U, pllvco = 0U, pllp = 0U; 7 | uint32_t sysclockfreq = 0U; 8 | 9 | /* Get SYSCLK source -------------------------------------------------------*/ 10 | switch (RCC->CFGR & RCC_CFGR_SWS) 11 | { 12 | case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ 13 | { 14 | sysclockfreq = ((uint32_t)16000000); 15 | break; 16 | } 17 | case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ 18 | { 19 | sysclockfreq = ((uint32_t)25000000); 20 | break; 21 | } 22 | case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ 23 | { 24 | /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN 25 | SYSCLK = PLL_VCO / PLLP */ 26 | pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 27 | if(((uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC)) != RCC_PLLCFGR_PLLSRC_HSI) 28 | { 29 | /* HSE used as PLL clock source */ 30 | pllvco = (uint32_t) ((((uint64_t) ((uint32_t)25000000) * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 31 | } 32 | else 33 | { 34 | /* HSI used as PLL clock source */ 35 | pllvco = (uint32_t) ((((uint64_t) ((uint32_t)16000000) * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 36 | } 37 | pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U); 38 | 39 | sysclockfreq = pllvco/pllp; 40 | break; 41 | } 42 | default: 43 | { 44 | sysclockfreq = ((uint32_t)16000000); 45 | break; 46 | } 47 | } 48 | return sysclockfreq; 49 | } 50 | 51 | uint32_t SystemClock_Config(){ 52 | uint32_t i, tmp; 53 | RCC->AHB1ENR |= RCC_APB1ENR_PWREN; 54 | PWR->CR |= PWR_CR_VOS_1; 55 | 56 | //set HSE oscillator ON 57 | RCC->CR |= RCC_CR_HSEON; 58 | //wait for HSE to get ready 59 | i = 0; 60 | while((RCC->CR & RCC_CR_HSERDY) == 0){ 61 | i++; 62 | if(i == TIMEOUT){return 1;} 63 | } 64 | 65 | //disable main PLL 66 | RCC->CR &= ~RCC_CR_PLLON; 67 | //wait to get ready 68 | i = 0; 69 | while((RCC->CR & RCC_CR_PLLRDY) != 0){ 70 | i++; 71 | if(i == TIMEOUT){return 1;} 72 | } 73 | //configure main PLL 74 | //set HSE as main PLL source 75 | RCC->PLLCFGR |= RCC_PLLCFGR_PLLSRC; 76 | RCC->PLLCFGR &= ~RCC_PLLCFGR_PLLM_Msk & ~RCC_PLLCFGR_PLLN_Msk & ~RCC_PLLCFGR_PLLP_Msk & ~RCC_PLLCFGR_PLLQ_Msk; 77 | //set main PLL M divider to 25 78 | RCC->PLLCFGR |= (25U << RCC_PLLCFGR_PLLM_Pos); 79 | //set main PLL N multiplier to 336 80 | RCC->PLLCFGR |= (336U << RCC_PLLCFGR_PLLN_Pos); 81 | //set main PLL P divider to 4 82 | RCC->PLLCFGR |= (1U << RCC_PLLCFGR_PLLP_Pos); 83 | //set main PLL Q divider to 4 84 | RCC->PLLCFGR |= (4U << RCC_PLLCFGR_PLLQ_Pos); 85 | 86 | //enable main PLL 87 | RCC->CR |= RCC_CR_PLLON; 88 | //wait for PLL to get ready 89 | i = 0; 90 | while((RCC->CR & RCC_CR_PLLRDY) == 0){ 91 | i++; 92 | if(i == TIMEOUT){return 1;} 93 | } 94 | 95 | 96 | if((FLASH->ACR & FLASH_ACR_LATENCY) < 2U){ 97 | tmp = FLASH->ACR; 98 | tmp &= ~FLASH_ACR_LATENCY_Msk; 99 | tmp |= (2U << FLASH_ACR_LATENCY_Pos); 100 | FLASH->ACR = tmp; 101 | if((FLASH->ACR & FLASH_ACR_LATENCY) != 2){ 102 | return 1; 103 | } 104 | } 105 | 106 | 107 | //set APBx dividers to their maximum 108 | RCC->CFGR |= (0x1C00U << RCC_CFGR_PPRE1_Pos); 109 | RCC->CFGR |= (0x1C00U << RCC_CFGR_PPRE2_Pos); 110 | //set HCLK divider 111 | RCC->CFGR &= ~RCC_CFGR_HPRE_Msk; 112 | 113 | //check if PLL is ready 114 | if((RCC->CR & RCC_CR_PLLRDY) == 0){ 115 | return 1; 116 | } 117 | //set PLL as source for SYSCLK 118 | RCC->CFGR |= (2U << RCC_CFGR_SW_Pos); 119 | //wait for the PLL source to apply 120 | i = 0; 121 | while(((RCC->CFGR & RCC_CFGR_SWS_Msk) >> RCC_CFGR_SWS_Pos) != 2U){ 122 | i++; 123 | if(i == TIMEOUT){return 1;} 124 | } 125 | if((FLASH->ACR & FLASH_ACR_LATENCY) > 2U){ 126 | tmp = FLASH->ACR; 127 | tmp &= ~FLASH_ACR_LATENCY_Msk; 128 | tmp |= (2U << FLASH_ACR_LATENCY_Pos); 129 | FLASH->ACR = tmp; 130 | if((FLASH->ACR & FLASH_ACR_LATENCY) != 2){ 131 | return 1; 132 | } 133 | } 134 | 135 | //set PCLK1 136 | tmp = (uint32_t)RCC->CFGR; 137 | tmp &= ~RCC_CFGR_PPRE1_Msk; 138 | tmp |= (RCC_CFGR_PPRE1_DIV2 << RCC_CFGR_PPRE1_Pos); 139 | RCC->CFGR = tmp; 140 | 141 | //set PCLK2 142 | tmp = (uint32_t)RCC->CFGR; 143 | tmp &= ~RCC_CFGR_PPRE2_Msk; 144 | tmp |= (RCC_CFGR_PPRE1_DIV1 << RCC_CFGR_PPRE2_Pos); 145 | RCC->CFGR = tmp; 146 | 147 | SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; 148 | 149 | return 0; 150 | } 151 | -------------------------------------------------------------------------------- /software/src/clk.h: -------------------------------------------------------------------------------- 1 | #ifndef CLK_H 2 | #define CLK_H 3 | 4 | #include 5 | #include "../system/stm32f4xx.h" 6 | 7 | #define TIMEOUT 15000 8 | 9 | uint32_t SystemClock_Config(); 10 | 11 | uint32_t HAL_RCC_GetSysClockFreq(); 12 | 13 | 14 | #endif -------------------------------------------------------------------------------- /software/src/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include "../system/stm32f4xx.h" 7 | 8 | #include "../libs/delay.h" 9 | #include "../libs/spi.h" 10 | 11 | #include "ssd2828.h" 12 | #include "LH154Q01.h" 13 | #include "VS035ZSM.h" 14 | #include "clk.h" 15 | 16 | 17 | 18 | void gpio_init(){ 19 | //enable GPIOC and GPIOA GPIOB GPIOC 20 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN; 21 | //set C13 to output 22 | GPIOC->MODER |= (0x1<OTYPER &= ~GPIO_OTYPER_OT13; 25 | //set C13 speed to low 26 | GPIOC->OSPEEDR &= ~GPIO_OSPEEDER_OSPEEDR13; 27 | //set C13 to LOW 28 | GPIOC->ODR |= GPIO_ODR_OD13; 29 | 30 | } 31 | 32 | 33 | void fill_line(uint8_t r, uint8_t g, uint8_t b){ 34 | uint32_t i; 35 | ssd2828_SPI_write_reg(PSCR1_REG, ((240*3)+1)&0x0FFF); 36 | ssd2828_SPI_write_cmd(PDR_REG);//0xBF 37 | ssd2828_SPI_write_data(0x3C); 38 | for(i = 0; i < 240; i++){ 39 | ssd2828_SPI_write_data(r); 40 | ssd2828_SPI_write_data(g); 41 | ssd2828_SPI_write_data(b); 42 | } 43 | } 44 | 45 | void fill_screen(uint8_t r, uint8_t g, uint8_t b){ 46 | uint32_t i; 47 | for(i = 0; i < 240; i++){ 48 | fill_line(r,g,b); 49 | } 50 | } 51 | 52 | int main(){ 53 | uint16_t i,j = 0; 54 | SystemClock_Config(); 55 | gpio_init(); 56 | delay_init(); 57 | spi_init(); 58 | delay_ms(550); 59 | 60 | 61 | 62 | ssd2828_init(); 63 | //LH154Q01_init(); 64 | //LH154Q01_SSD2828_write_cfg(); 65 | //LH154Q01_start(); 66 | //LH154Q01_backlight(1); 67 | VS035ZSM_init(); 68 | VS035ZSM_init_BACKLIGHT(); 69 | VS035ZSM_SSD2828_write_cfg(); 70 | ssd2828_set_LP(); 71 | VS035ZSM_start(); 72 | 73 | VS035ZSM_backlight(1); 74 | ssd2828_set_HS(); 75 | ssd2828_BIST_ON(); 76 | //VS035ZSM_set_partial(); 77 | ssd2828_VID_ON(); 78 | GPIOC->ODR ^= GPIO_ODR_OD13; 79 | 80 | while(1){ 81 | i = ssd2828_get_id(); 82 | if(i == 0x2828){ 83 | GPIOC->ODR ^= GPIO_ODR_OD13; 84 | } 85 | 86 | 87 | delay_ms(100); 88 | 89 | } 90 | return 0; 91 | } -------------------------------------------------------------------------------- /software/src/ssd2828.c: -------------------------------------------------------------------------------- 1 | #include "ssd2828.h" 2 | 3 | 4 | void ssd2828_SHUT_1(){ 5 | SSD2828_C_PORT->ODR |= SSD2828_SHUT; 6 | } 7 | 8 | void ssd2828_SHUT_0(){ 9 | SSD2828_C_PORT->ODR &= ~SSD2828_SHUT; 10 | } 11 | 12 | void ssd2828_gpio_init(){ 13 | //enable GPIOA GPIOB 14 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN; 15 | 16 | //set SHUT RST DC to output 17 | SSD2828_C_PORT->MODER |= (0x1 << (SSD2828_SHUT*2)) | (0x1 << (SSD2828_DC*2)) | (0x1 << (SSD2828_RST*2)); 18 | //set SHUT RST DC to push pull 19 | SSD2828_C_PORT->OTYPER &= ~(0x1 << (SSD2828_SHUT*2)) & ~(0x1 << (SSD2828_DC*2)) & ~(0x1 << (SSD2828_RST*2)); 20 | //set SHUT RST DC speed to low 21 | SSD2828_C_PORT->OSPEEDR &= ~(0x3U << (SSD2828_SHUT*2)) & ~(0x3U << (SSD2828_DC*2)) & ~(0x3U << (SSD2828_RST*2)); 22 | //set SHUT DC to LOW 23 | SSD2828_C_PORT->ODR &= ~(1 << SSD2828_SHUT) & ~(1 << SSD2828_DC); 24 | SSD2828_C_PORT->ODR |= (1 << SSD2828_RST); 25 | 26 | //set 1V2 3V3 as outputs 27 | SSD2828_V_PORT->MODER |= (1U << (SSD2828_1V2*2)) | (1U << (SSD2828_3V3*2)); 28 | //set to push pull 29 | SSD2828_V_PORT->OTYPER &= ~(1U << (SSD2828_1V2*2)) & ~(1U << (SSD2828_3V3*2)); 30 | //set speed to low 31 | SSD2828_V_PORT->OSPEEDR &= ~(3U << (SSD2828_1V2*2)) & ~(3U << (SSD2828_3V3*2)); 32 | //set LOW 33 | SSD2828_V_PORT->ODR &= ~(1U << SSD2828_1V2) & ~(1U << SSD2828_3V3); 34 | 35 | } 36 | 37 | void ssd2828_init(){ 38 | ssd2828_gpio_init(); 39 | ssd2828_SHUT_1(); 40 | 41 | //enable 1V2 42 | SSD2828_V_PORT->ODR |= (1 << SSD2828_1V2); 43 | //wait 10ms 44 | delay_ms(10); 45 | //enable 3V3 46 | SSD2828_V_PORT->ODR |= (1 << SSD2828_3V3); 47 | //wait 20ms 48 | delay_ms(20); 49 | 50 | SSD2828_C_PORT->ODR |= (1 << SSD2828_RST); 51 | delay_ms(100); 52 | //hold rst low for 20ms 53 | SSD2828_C_PORT->ODR &= ~(1 << SSD2828_RST); 54 | delay_ms(205); 55 | SSD2828_C_PORT->ODR |= (1 << SSD2828_RST); 56 | delay_ms(200); 57 | } 58 | 59 | void ssd2828_SPI_write_reg(uint8_t reg, uint16_t val){ 60 | uint8_t input[3] = {reg, (uint8_t)(val & 0xFF), (uint8_t)(val >> 8U)}; 61 | 62 | SSD2828_C_PORT->ODR &= ~(1 << SSD2828_DC); 63 | spi_exchange_8(input[0], NULL); 64 | SSD2828_C_PORT->ODR |= (1 << SSD2828_DC); 65 | spi_exchange_8(input[1], NULL); 66 | spi_exchange_8(input[2], NULL); 67 | } 68 | 69 | void ssd2828_SPI_read_reg(uint8_t reg, uint16_t *val){ 70 | uint8_t input[4] = {reg, 0xFA, 0x00, 0x00}; 71 | uint8_t output[2]; 72 | 73 | SSD2828_C_PORT->ODR &= ~(1 << SSD2828_DC); 74 | spi_exchange_8(input[0], NULL); 75 | spi_exchange_8(input[1], NULL); 76 | SSD2828_C_PORT->ODR |= (1 << SSD2828_DC); 77 | spi_exchange_8(input[2], &output[0]); 78 | spi_exchange_8(input[3], &output[1]); 79 | 80 | *val = (uint16_t)output[0] + (uint16_t)(output[1] << 8U); 81 | } 82 | 83 | uint16_t ssd2828_get_id(){ 84 | uint16_t val; 85 | ssd2828_SPI_read_reg(DIR_REG, &val); 86 | return val; 87 | } 88 | 89 | void ssd2828_SPI_write_cmd(uint8_t data){ 90 | SSD2828_C_PORT->ODR &= ~(1 << SSD2828_DC); 91 | spi_exchange_8(data, NULL); 92 | SSD2828_C_PORT->ODR |= (1 << SSD2828_DC); 93 | } 94 | 95 | void ssd2828_SPI_write_data(uint8_t data){ 96 | spi_exchange_8(data, NULL); 97 | } 98 | 99 | void ssd2828_SPI_read_data(uint8_t *data){ 100 | spi_exchange_8(0x00, data); 101 | } 102 | 103 | void ssd2828_MIPI_write_DCS_short_np(uint8_t cmd){ 104 | uint16_t tmp = 0; 105 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 106 | tmp |= (1 << CFGR_DCS_POS); 107 | tmp &= ~(1 << CFGR_LPE_POS); 108 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 109 | 110 | //set payload length 111 | ssd2828_SPI_write_reg(PSCR1_REG, 1); 112 | ssd2828_SPI_write_reg(PSCR2_REG, 0x0000); 113 | ssd2828_SPI_write_reg(PSCR3_REG, 1); 114 | //write on PDR 115 | ssd2828_SPI_write_cmd(PDR_REG); 116 | //write reg 117 | ssd2828_SPI_write_data(cmd); 118 | } 119 | 120 | void ssd2828_MIPI_write_DCS_short_p(uint8_t cmd, uint8_t param){ 121 | uint16_t tmp = 0; 122 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 123 | tmp |= (1 << CFGR_DCS_POS); 124 | tmp &= ~(1 << CFGR_LPE_POS); 125 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 126 | 127 | //set payload length 128 | ssd2828_SPI_write_reg(PSCR1_REG, 2); 129 | ssd2828_SPI_write_reg(PSCR2_REG, 0x0000); 130 | ssd2828_SPI_write_reg(PSCR3_REG, 2); 131 | //write on PDR 132 | ssd2828_SPI_write_cmd(PDR_REG); 133 | //write reg 134 | ssd2828_SPI_write_data(cmd); 135 | ssd2828_SPI_write_data(param); 136 | } 137 | 138 | void ssd2828_MIPI_write_DCS_long_p(uint8_t cmd, uint8_t *params, uint32_t len){ 139 | uint16_t tmp = 0; 140 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 141 | tmp |= (1 << CFGR_DCS_POS) | (1 << CFGR_LPE_POS); 142 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 143 | 144 | //set payload length 145 | ssd2828_SPI_write_reg(PSCR1_REG, len+1); 146 | ssd2828_SPI_write_reg(PSCR2_REG, (len+1) >> 16); 147 | ssd2828_SPI_write_reg(PSCR3_REG, len+1); 148 | //write on PDR 149 | ssd2828_SPI_write_cmd(PDR_REG); 150 | //write reg 151 | ssd2828_SPI_write_data(cmd); 152 | for(uint32_t i = 0; i < len; i++){ 153 | ssd2828_SPI_write_data(params[i]); 154 | } 155 | } 156 | 157 | void ssd2828_MIPI_write_generic_short_np(uint8_t cmd){ 158 | uint16_t tmp = 0; 159 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 160 | tmp &= ~(1 << CFGR_LPE_POS) & ~(1 << CFGR_DCS_POS); 161 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 162 | 163 | //set payload length 164 | ssd2828_SPI_write_reg(PSCR1_REG, 1); 165 | ssd2828_SPI_write_reg(PSCR2_REG, 0x0000); 166 | ssd2828_SPI_write_reg(PSCR3_REG, 1); 167 | //write on PDR 168 | ssd2828_SPI_write_cmd(PDR_REG); 169 | //write reg 170 | ssd2828_SPI_write_data(cmd); 171 | } 172 | 173 | void ssd2828_MIPI_write_generic_short_p(uint8_t cmd, uint8_t param){ 174 | uint16_t tmp = 0; 175 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 176 | tmp &= ~(1 << CFGR_LPE_POS) & ~(1 << CFGR_DCS_POS); 177 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 178 | 179 | //set payload length 180 | ssd2828_SPI_write_reg(PSCR1_REG, 2); 181 | ssd2828_SPI_write_reg(PSCR2_REG, 0x0000); 182 | ssd2828_SPI_write_reg(PSCR3_REG, 2); 183 | //write on PDR 184 | ssd2828_SPI_write_cmd(PDR_REG); 185 | //write reg 186 | ssd2828_SPI_write_data(cmd); 187 | ssd2828_SPI_write_data(param); 188 | } 189 | 190 | void ssd2828_MIPI_write_generic_long_p(uint8_t cmd, uint8_t *params, uint32_t len){ 191 | uint16_t tmp = 0; 192 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 193 | tmp |= (1 << CFGR_LPE_POS); 194 | tmp &= ~(1 << CFGR_DCS_POS); 195 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 196 | 197 | //set payload length 198 | ssd2828_SPI_write_reg(PSCR1_REG, len+1); 199 | ssd2828_SPI_write_reg(PSCR2_REG, (len+1) >> 16); 200 | ssd2828_SPI_write_reg(PSCR3_REG, len+1); 201 | //write on PDR 202 | ssd2828_SPI_write_cmd(PDR_REG); 203 | //write reg 204 | ssd2828_SPI_write_data(cmd); 205 | for(uint32_t i = 0; i < len; i++){ 206 | ssd2828_SPI_write_data(params[i]); 207 | } 208 | } 209 | 210 | void ssd2828_set_HS(){ 211 | uint16_t tmp = 0; 212 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 213 | tmp |= (1 << CFGR_HS_POS); 214 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 215 | } 216 | 217 | void ssd2828_set_LP(){ 218 | uint16_t tmp = 0; 219 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 220 | tmp &= ~(1 << CFGR_HS_POS); 221 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 222 | } 223 | 224 | 225 | 226 | void ssd2828_BIST_ON(){ 227 | uint16_t tmp; 228 | ssd2828_SPI_read_reg(TMR_REG, &tmp); 229 | tmp |= (1 << TMR_VBIST_EN_POS) | (1 << TMR_VBIST_SRT_POS); 230 | ssd2828_SPI_write_reg(TMR_REG, tmp); 231 | } 232 | 233 | void ssd2828_BIST_OFF(){ 234 | uint16_t tmp; 235 | ssd2828_SPI_read_reg(TMR_REG, &tmp); 236 | tmp &= ~(1 << TMR_VBIST_EN_POS) & ~(1 << TMR_VBIST_SRT_POS); 237 | ssd2828_SPI_write_reg(TMR_REG, tmp); 238 | } 239 | 240 | void ssd2828_VID_ON(){ 241 | uint16_t tmp; 242 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 243 | tmp |= (1U << CFGR_VEN_POS); 244 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 245 | } 246 | 247 | void ssd2828_VID_OFF(){ 248 | uint16_t tmp; 249 | ssd2828_SPI_read_reg(CFGR_REG, &tmp); 250 | tmp &= ~(1U << CFGR_VEN_POS); 251 | ssd2828_SPI_write_reg(CFGR_REG, tmp); 252 | } -------------------------------------------------------------------------------- /software/system/STM32F401CCUX_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | ** @file : LinkerScript.ld 5 | ** 6 | ** @author : Auto-generated by STM32CubeIDE 7 | ** 8 | ** @brief : Linker script for STM32F401CCUx Device from STM32F4 series 9 | ** 256Kbytes ROM 10 | ** 64Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed as is, without any warranty 20 | ** of any kind. 21 | ** 22 | ****************************************************************************** 23 | ** @attention 24 | ** 25 | ** Copyright (c) 2022 STMicroelectronics. 26 | ** All rights reserved. 27 | ** 28 | ** This software is licensed under terms that can be found in the LICENSE file 29 | ** in the root directory of this software component. 30 | ** If no LICENSE file comes with this software, it is provided AS-IS. 31 | ** 32 | ****************************************************************************** 33 | */ 34 | 35 | /* Entry Point */ 36 | ENTRY(Reset_Handler) 37 | 38 | /* Highest address of the user mode stack */ 39 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ 40 | 41 | _Min_Heap_Size = 0x200; /* required amount of heap */ 42 | _Min_Stack_Size = 0x400; /* required amount of stack */ 43 | 44 | /* Memories definition */ 45 | MEMORY 46 | { 47 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K 48 | ROM (rx) : ORIGIN = 0x08000000, LENGTH = 256K 49 | } 50 | 51 | /* Sections */ 52 | SECTIONS 53 | { 54 | /* The startup code into "ROM" Rom type memory */ 55 | .isr_vector : 56 | { 57 | . = ALIGN(4); 58 | KEEP(*(.isr_vector)) /* Startup code */ 59 | . = ALIGN(4); 60 | } >ROM 61 | 62 | /* The program code and other data into "ROM" Rom type memory */ 63 | .text : 64 | { 65 | . = ALIGN(4); 66 | *(.text) /* .text sections (code) */ 67 | *(.text*) /* .text* sections (code) */ 68 | *(.glue_7) /* glue arm to thumb code */ 69 | *(.glue_7t) /* glue thumb to arm code */ 70 | *(.eh_frame) 71 | 72 | KEEP (*(.init)) 73 | KEEP (*(.fini)) 74 | 75 | . = ALIGN(4); 76 | _etext = .; /* define a global symbols at end of code */ 77 | } >ROM 78 | 79 | /* Constant data into "ROM" Rom type memory */ 80 | .rodata : 81 | { 82 | . = ALIGN(4); 83 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 84 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 85 | . = ALIGN(4); 86 | } >ROM 87 | 88 | .ARM.extab : { 89 | . = ALIGN(4); 90 | *(.ARM.extab* .gnu.linkonce.armextab.*) 91 | . = ALIGN(4); 92 | } >ROM 93 | 94 | .ARM : { 95 | . = ALIGN(4); 96 | __exidx_start = .; 97 | *(.ARM.exidx*) 98 | __exidx_end = .; 99 | . = ALIGN(4); 100 | } >ROM 101 | 102 | .preinit_array : 103 | { 104 | . = ALIGN(4); 105 | PROVIDE_HIDDEN (__preinit_array_start = .); 106 | KEEP (*(.preinit_array*)) 107 | PROVIDE_HIDDEN (__preinit_array_end = .); 108 | . = ALIGN(4); 109 | } >ROM 110 | 111 | .init_array : 112 | { 113 | . = ALIGN(4); 114 | PROVIDE_HIDDEN (__init_array_start = .); 115 | KEEP (*(SORT(.init_array.*))) 116 | KEEP (*(.init_array*)) 117 | PROVIDE_HIDDEN (__init_array_end = .); 118 | . = ALIGN(4); 119 | } >ROM 120 | 121 | .fini_array : 122 | { 123 | . = ALIGN(4); 124 | PROVIDE_HIDDEN (__fini_array_start = .); 125 | KEEP (*(SORT(.fini_array.*))) 126 | KEEP (*(.fini_array*)) 127 | PROVIDE_HIDDEN (__fini_array_end = .); 128 | . = ALIGN(4); 129 | } >ROM 130 | 131 | /* Used by the startup to initialize data */ 132 | _sidata = LOADADDR(.data); 133 | 134 | /* Initialized data sections into "RAM" Ram type memory */ 135 | .data : 136 | { 137 | . = ALIGN(4); 138 | _sdata = .; /* create a global symbol at data start */ 139 | *(.data) /* .data sections */ 140 | *(.data*) /* .data* sections */ 141 | *(.RamFunc) /* .RamFunc sections */ 142 | *(.RamFunc*) /* .RamFunc* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | 147 | } >RAM AT> ROM 148 | 149 | /* Uninitialized data section into "RAM" Ram type memory */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss section */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | /* Remove information from the compiler libraries */ 177 | /DISCARD/ : 178 | { 179 | libc.a ( * ) 180 | libm.a ( * ) 181 | libgcc.a ( * ) 182 | } 183 | 184 | .ARM.attributes 0 : { *(.ARM.attributes) } 185 | } 186 | -------------------------------------------------------------------------------- /software/system/cmsis_compiler.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_compiler.h 3 | * @brief CMSIS compiler generic header file 4 | * @version V5.1.0 5 | * @date 09. October 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #ifndef __CMSIS_COMPILER_H 26 | #define __CMSIS_COMPILER_H 27 | 28 | #include 29 | 30 | /* 31 | * Arm Compiler 4/5 32 | */ 33 | #if defined ( __CC_ARM ) 34 | #include "cmsis_armcc.h" 35 | 36 | 37 | /* 38 | * Arm Compiler 6.6 LTM (armclang) 39 | */ 40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100) 41 | #include "cmsis_armclang_ltm.h" 42 | 43 | /* 44 | * Arm Compiler above 6.10.1 (armclang) 45 | */ 46 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) 47 | #include "cmsis_armclang.h" 48 | 49 | 50 | /* 51 | * GNU Compiler 52 | */ 53 | #elif defined ( __GNUC__ ) 54 | #include "cmsis_gcc.h" 55 | 56 | 57 | /* 58 | * IAR Compiler 59 | */ 60 | #elif defined ( __ICCARM__ ) 61 | #include 62 | 63 | 64 | /* 65 | * TI Arm Compiler 66 | */ 67 | #elif defined ( __TI_ARM__ ) 68 | #include 69 | 70 | #ifndef __ASM 71 | #define __ASM __asm 72 | #endif 73 | #ifndef __INLINE 74 | #define __INLINE inline 75 | #endif 76 | #ifndef __STATIC_INLINE 77 | #define __STATIC_INLINE static inline 78 | #endif 79 | #ifndef __STATIC_FORCEINLINE 80 | #define __STATIC_FORCEINLINE __STATIC_INLINE 81 | #endif 82 | #ifndef __NO_RETURN 83 | #define __NO_RETURN __attribute__((noreturn)) 84 | #endif 85 | #ifndef __USED 86 | #define __USED __attribute__((used)) 87 | #endif 88 | #ifndef __WEAK 89 | #define __WEAK __attribute__((weak)) 90 | #endif 91 | #ifndef __PACKED 92 | #define __PACKED __attribute__((packed)) 93 | #endif 94 | #ifndef __PACKED_STRUCT 95 | #define __PACKED_STRUCT struct __attribute__((packed)) 96 | #endif 97 | #ifndef __PACKED_UNION 98 | #define __PACKED_UNION union __attribute__((packed)) 99 | #endif 100 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 101 | struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 102 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 103 | #endif 104 | #ifndef __UNALIGNED_UINT16_WRITE 105 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 106 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) 107 | #endif 108 | #ifndef __UNALIGNED_UINT16_READ 109 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 110 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 111 | #endif 112 | #ifndef __UNALIGNED_UINT32_WRITE 113 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 114 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 115 | #endif 116 | #ifndef __UNALIGNED_UINT32_READ 117 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 118 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 119 | #endif 120 | #ifndef __ALIGNED 121 | #define __ALIGNED(x) __attribute__((aligned(x))) 122 | #endif 123 | #ifndef __RESTRICT 124 | #define __RESTRICT __restrict 125 | #endif 126 | #ifndef __COMPILER_BARRIER 127 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. 128 | #define __COMPILER_BARRIER() (void)0 129 | #endif 130 | 131 | 132 | /* 133 | * TASKING Compiler 134 | */ 135 | #elif defined ( __TASKING__ ) 136 | /* 137 | * The CMSIS functions have been implemented as intrinsics in the compiler. 138 | * Please use "carm -?i" to get an up to date list of all intrinsics, 139 | * Including the CMSIS ones. 140 | */ 141 | 142 | #ifndef __ASM 143 | #define __ASM __asm 144 | #endif 145 | #ifndef __INLINE 146 | #define __INLINE inline 147 | #endif 148 | #ifndef __STATIC_INLINE 149 | #define __STATIC_INLINE static inline 150 | #endif 151 | #ifndef __STATIC_FORCEINLINE 152 | #define __STATIC_FORCEINLINE __STATIC_INLINE 153 | #endif 154 | #ifndef __NO_RETURN 155 | #define __NO_RETURN __attribute__((noreturn)) 156 | #endif 157 | #ifndef __USED 158 | #define __USED __attribute__((used)) 159 | #endif 160 | #ifndef __WEAK 161 | #define __WEAK __attribute__((weak)) 162 | #endif 163 | #ifndef __PACKED 164 | #define __PACKED __packed__ 165 | #endif 166 | #ifndef __PACKED_STRUCT 167 | #define __PACKED_STRUCT struct __packed__ 168 | #endif 169 | #ifndef __PACKED_UNION 170 | #define __PACKED_UNION union __packed__ 171 | #endif 172 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 173 | struct __packed__ T_UINT32 { uint32_t v; }; 174 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 175 | #endif 176 | #ifndef __UNALIGNED_UINT16_WRITE 177 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 178 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 179 | #endif 180 | #ifndef __UNALIGNED_UINT16_READ 181 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 182 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 183 | #endif 184 | #ifndef __UNALIGNED_UINT32_WRITE 185 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 186 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 187 | #endif 188 | #ifndef __UNALIGNED_UINT32_READ 189 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 190 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 191 | #endif 192 | #ifndef __ALIGNED 193 | #define __ALIGNED(x) __align(x) 194 | #endif 195 | #ifndef __RESTRICT 196 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 197 | #define __RESTRICT 198 | #endif 199 | #ifndef __COMPILER_BARRIER 200 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. 201 | #define __COMPILER_BARRIER() (void)0 202 | #endif 203 | 204 | 205 | /* 206 | * COSMIC Compiler 207 | */ 208 | #elif defined ( __CSMC__ ) 209 | #include 210 | 211 | #ifndef __ASM 212 | #define __ASM _asm 213 | #endif 214 | #ifndef __INLINE 215 | #define __INLINE inline 216 | #endif 217 | #ifndef __STATIC_INLINE 218 | #define __STATIC_INLINE static inline 219 | #endif 220 | #ifndef __STATIC_FORCEINLINE 221 | #define __STATIC_FORCEINLINE __STATIC_INLINE 222 | #endif 223 | #ifndef __NO_RETURN 224 | // NO RETURN is automatically detected hence no warning here 225 | #define __NO_RETURN 226 | #endif 227 | #ifndef __USED 228 | #warning No compiler specific solution for __USED. __USED is ignored. 229 | #define __USED 230 | #endif 231 | #ifndef __WEAK 232 | #define __WEAK __weak 233 | #endif 234 | #ifndef __PACKED 235 | #define __PACKED @packed 236 | #endif 237 | #ifndef __PACKED_STRUCT 238 | #define __PACKED_STRUCT @packed struct 239 | #endif 240 | #ifndef __PACKED_UNION 241 | #define __PACKED_UNION @packed union 242 | #endif 243 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 244 | @packed struct T_UINT32 { uint32_t v; }; 245 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 246 | #endif 247 | #ifndef __UNALIGNED_UINT16_WRITE 248 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 249 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 250 | #endif 251 | #ifndef __UNALIGNED_UINT16_READ 252 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 253 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 254 | #endif 255 | #ifndef __UNALIGNED_UINT32_WRITE 256 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 257 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 258 | #endif 259 | #ifndef __UNALIGNED_UINT32_READ 260 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 261 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 262 | #endif 263 | #ifndef __ALIGNED 264 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. 265 | #define __ALIGNED(x) 266 | #endif 267 | #ifndef __RESTRICT 268 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 269 | #define __RESTRICT 270 | #endif 271 | #ifndef __COMPILER_BARRIER 272 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. 273 | #define __COMPILER_BARRIER() (void)0 274 | #endif 275 | 276 | 277 | #else 278 | #error Unknown compiler. 279 | #endif 280 | 281 | 282 | #endif /* __CMSIS_COMPILER_H */ 283 | 284 | -------------------------------------------------------------------------------- /software/system/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.5 5 | * @date 02. February 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2022 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /software/system/mpu_armv7.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file mpu_armv7.h 3 | * @brief CMSIS MPU API for Armv7-M MPU 4 | * @version V5.1.2 5 | * @date 25. May 2020 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2020 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef ARM_MPU_ARMV7_H 32 | #define ARM_MPU_ARMV7_H 33 | 34 | #define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes 35 | #define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes 36 | #define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes 37 | #define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes 38 | #define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes 39 | #define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte 40 | #define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes 41 | #define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes 42 | #define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes 43 | #define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes 44 | #define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes 45 | #define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes 46 | #define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes 47 | #define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes 48 | #define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes 49 | #define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte 50 | #define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes 51 | #define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes 52 | #define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes 53 | #define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes 54 | #define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes 55 | #define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes 56 | #define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes 57 | #define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes 58 | #define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes 59 | #define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte 60 | #define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes 61 | #define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes 62 | 63 | #define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access 64 | #define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only 65 | #define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only 66 | #define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access 67 | #define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only 68 | #define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access 69 | 70 | /** MPU Region Base Address Register Value 71 | * 72 | * \param Region The region to be configured, number 0 to 15. 73 | * \param BaseAddress The base address for the region. 74 | */ 75 | #define ARM_MPU_RBAR(Region, BaseAddress) \ 76 | (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ 77 | ((Region) & MPU_RBAR_REGION_Msk) | \ 78 | (MPU_RBAR_VALID_Msk)) 79 | 80 | /** 81 | * MPU Memory Access Attributes 82 | * 83 | * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. 84 | * \param IsShareable Region is shareable between multiple bus masters. 85 | * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. 86 | * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. 87 | */ 88 | #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ 89 | ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ 90 | (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ 91 | (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ 92 | (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) 93 | 94 | /** 95 | * MPU Region Attribute and Size Register Value 96 | * 97 | * \param DisableExec Instruction access disable bit, 1= disable instruction fetches. 98 | * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. 99 | * \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. 100 | * \param SubRegionDisable Sub-region disable field. 101 | * \param Size Region size of the region to be configured, for example 4K, 8K. 102 | */ 103 | #define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ 104 | ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ 105 | (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ 106 | (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \ 107 | (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \ 108 | (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \ 109 | (((MPU_RASR_ENABLE_Msk)))) 110 | 111 | /** 112 | * MPU Region Attribute and Size Register Value 113 | * 114 | * \param DisableExec Instruction access disable bit, 1= disable instruction fetches. 115 | * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. 116 | * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. 117 | * \param IsShareable Region is shareable between multiple bus masters. 118 | * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. 119 | * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. 120 | * \param SubRegionDisable Sub-region disable field. 121 | * \param Size Region size of the region to be configured, for example 4K, 8K. 122 | */ 123 | #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ 124 | ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) 125 | 126 | /** 127 | * MPU Memory Access Attribute for strongly ordered memory. 128 | * - TEX: 000b 129 | * - Shareable 130 | * - Non-cacheable 131 | * - Non-bufferable 132 | */ 133 | #define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) 134 | 135 | /** 136 | * MPU Memory Access Attribute for device memory. 137 | * - TEX: 000b (if shareable) or 010b (if non-shareable) 138 | * - Shareable or non-shareable 139 | * - Non-cacheable 140 | * - Bufferable (if shareable) or non-bufferable (if non-shareable) 141 | * 142 | * \param IsShareable Configures the device memory as shareable or non-shareable. 143 | */ 144 | #define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) 145 | 146 | /** 147 | * MPU Memory Access Attribute for normal memory. 148 | * - TEX: 1BBb (reflecting outer cacheability rules) 149 | * - Shareable or non-shareable 150 | * - Cacheable or non-cacheable (reflecting inner cacheability rules) 151 | * - Bufferable or non-bufferable (reflecting inner cacheability rules) 152 | * 153 | * \param OuterCp Configures the outer cache policy. 154 | * \param InnerCp Configures the inner cache policy. 155 | * \param IsShareable Configures the memory as shareable or non-shareable. 156 | */ 157 | #define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U)) 158 | 159 | /** 160 | * MPU Memory Access Attribute non-cacheable policy. 161 | */ 162 | #define ARM_MPU_CACHEP_NOCACHE 0U 163 | 164 | /** 165 | * MPU Memory Access Attribute write-back, write and read allocate policy. 166 | */ 167 | #define ARM_MPU_CACHEP_WB_WRA 1U 168 | 169 | /** 170 | * MPU Memory Access Attribute write-through, no write allocate policy. 171 | */ 172 | #define ARM_MPU_CACHEP_WT_NWA 2U 173 | 174 | /** 175 | * MPU Memory Access Attribute write-back, no write allocate policy. 176 | */ 177 | #define ARM_MPU_CACHEP_WB_NWA 3U 178 | 179 | 180 | /** 181 | * Struct for a single MPU Region 182 | */ 183 | typedef struct { 184 | uint32_t RBAR; //!< The region base address register value (RBAR) 185 | uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR 186 | } ARM_MPU_Region_t; 187 | 188 | /** Enable the MPU. 189 | * \param MPU_Control Default access permissions for unconfigured regions. 190 | */ 191 | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) 192 | { 193 | __DMB(); 194 | MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; 195 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk 196 | SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; 197 | #endif 198 | __DSB(); 199 | __ISB(); 200 | } 201 | 202 | /** Disable the MPU. 203 | */ 204 | __STATIC_INLINE void ARM_MPU_Disable(void) 205 | { 206 | __DMB(); 207 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk 208 | SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; 209 | #endif 210 | MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; 211 | __DSB(); 212 | __ISB(); 213 | } 214 | 215 | /** Clear and disable the given MPU region. 216 | * \param rnr Region number to be cleared. 217 | */ 218 | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) 219 | { 220 | MPU->RNR = rnr; 221 | MPU->RASR = 0U; 222 | } 223 | 224 | /** Configure an MPU region. 225 | * \param rbar Value for RBAR register. 226 | * \param rasr Value for RASR register. 227 | */ 228 | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) 229 | { 230 | MPU->RBAR = rbar; 231 | MPU->RASR = rasr; 232 | } 233 | 234 | /** Configure the given MPU region. 235 | * \param rnr Region number to be configured. 236 | * \param rbar Value for RBAR register. 237 | * \param rasr Value for RASR register. 238 | */ 239 | __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) 240 | { 241 | MPU->RNR = rnr; 242 | MPU->RBAR = rbar; 243 | MPU->RASR = rasr; 244 | } 245 | 246 | /** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load(). 247 | * \param dst Destination data is copied to. 248 | * \param src Source data is copied from. 249 | * \param len Amount of data words to be copied. 250 | */ 251 | __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) 252 | { 253 | uint32_t i; 254 | for (i = 0U; i < len; ++i) 255 | { 256 | dst[i] = src[i]; 257 | } 258 | } 259 | 260 | /** Load the given number of MPU regions from a table. 261 | * \param table Pointer to the MPU configuration table. 262 | * \param cnt Amount of regions to be configured. 263 | */ 264 | __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 265 | { 266 | const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; 267 | while (cnt > MPU_TYPE_RALIASES) { 268 | ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); 269 | table += MPU_TYPE_RALIASES; 270 | cnt -= MPU_TYPE_RALIASES; 271 | } 272 | ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); 273 | } 274 | 275 | #endif 276 | -------------------------------------------------------------------------------- /software/system/pac_armv81.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file pac_armv81.h 3 | * @brief CMSIS PAC key functions for Armv8.1-M PAC extension 4 | * @version V1.0.0 5 | * @date 23. March 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2022 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef PAC_ARMV81_H 32 | #define PAC_ARMV81_H 33 | 34 | 35 | /* ################### PAC Key functions ########################### */ 36 | /** 37 | \ingroup CMSIS_Core_FunctionInterface 38 | \defgroup CMSIS_Core_PacKeyFunctions PAC Key functions 39 | \brief Functions that access the PAC keys. 40 | @{ 41 | */ 42 | 43 | #if (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) 44 | 45 | /** 46 | \brief read the PAC key used for privileged mode 47 | \details Reads the PAC key stored in the PAC_KEY_P registers. 48 | \param [out] pPacKey 128bit PAC key 49 | */ 50 | __STATIC_FORCEINLINE void __get_PAC_KEY_P (uint32_t* pPacKey) { 51 | __ASM volatile ( 52 | "mrs r1, pac_key_p_0\n" 53 | "str r1,[%0,#0]\n" 54 | "mrs r1, pac_key_p_1\n" 55 | "str r1,[%0,#4]\n" 56 | "mrs r1, pac_key_p_2\n" 57 | "str r1,[%0,#8]\n" 58 | "mrs r1, pac_key_p_3\n" 59 | "str r1,[%0,#12]\n" 60 | : : "r" (pPacKey) : "memory", "r1" 61 | ); 62 | } 63 | 64 | /** 65 | \brief write the PAC key used for privileged mode 66 | \details writes the given PAC key to the PAC_KEY_P registers. 67 | \param [in] pPacKey 128bit PAC key 68 | */ 69 | __STATIC_FORCEINLINE void __set_PAC_KEY_P (uint32_t* pPacKey) { 70 | __ASM volatile ( 71 | "ldr r1,[%0,#0]\n" 72 | "msr pac_key_p_0, r1\n" 73 | "ldr r1,[%0,#4]\n" 74 | "msr pac_key_p_1, r1\n" 75 | "ldr r1,[%0,#8]\n" 76 | "msr pac_key_p_2, r1\n" 77 | "ldr r1,[%0,#12]\n" 78 | "msr pac_key_p_3, r1\n" 79 | : : "r" (pPacKey) : "memory", "r1" 80 | ); 81 | } 82 | 83 | /** 84 | \brief read the PAC key used for unprivileged mode 85 | \details Reads the PAC key stored in the PAC_KEY_U registers. 86 | \param [out] pPacKey 128bit PAC key 87 | */ 88 | __STATIC_FORCEINLINE void __get_PAC_KEY_U (uint32_t* pPacKey) { 89 | __ASM volatile ( 90 | "mrs r1, pac_key_u_0\n" 91 | "str r1,[%0,#0]\n" 92 | "mrs r1, pac_key_u_1\n" 93 | "str r1,[%0,#4]\n" 94 | "mrs r1, pac_key_u_2\n" 95 | "str r1,[%0,#8]\n" 96 | "mrs r1, pac_key_u_3\n" 97 | "str r1,[%0,#12]\n" 98 | : : "r" (pPacKey) : "memory", "r1" 99 | ); 100 | } 101 | 102 | /** 103 | \brief write the PAC key used for unprivileged mode 104 | \details writes the given PAC key to the PAC_KEY_U registers. 105 | \param [in] pPacKey 128bit PAC key 106 | */ 107 | __STATIC_FORCEINLINE void __set_PAC_KEY_U (uint32_t* pPacKey) { 108 | __ASM volatile ( 109 | "ldr r1,[%0,#0]\n" 110 | "msr pac_key_u_0, r1\n" 111 | "ldr r1,[%0,#4]\n" 112 | "msr pac_key_u_1, r1\n" 113 | "ldr r1,[%0,#8]\n" 114 | "msr pac_key_u_2, r1\n" 115 | "ldr r1,[%0,#12]\n" 116 | "msr pac_key_u_3, r1\n" 117 | : : "r" (pPacKey) : "memory", "r1" 118 | ); 119 | } 120 | 121 | #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 122 | 123 | /** 124 | \brief read the PAC key used for privileged mode (non-secure) 125 | \details Reads the PAC key stored in the non-secure PAC_KEY_P registers when in secure mode. 126 | \param [out] pPacKey 128bit PAC key 127 | */ 128 | __STATIC_FORCEINLINE void __TZ_get_PAC_KEY_P_NS (uint32_t* pPacKey) { 129 | __ASM volatile ( 130 | "mrs r1, pac_key_p_0_ns\n" 131 | "str r1,[%0,#0]\n" 132 | "mrs r1, pac_key_p_1_ns\n" 133 | "str r1,[%0,#4]\n" 134 | "mrs r1, pac_key_p_2_ns\n" 135 | "str r1,[%0,#8]\n" 136 | "mrs r1, pac_key_p_3_ns\n" 137 | "str r1,[%0,#12]\n" 138 | : : "r" (pPacKey) : "memory", "r1" 139 | ); 140 | } 141 | 142 | /** 143 | \brief write the PAC key used for privileged mode (non-secure) 144 | \details writes the given PAC key to the non-secure PAC_KEY_P registers when in secure mode. 145 | \param [in] pPacKey 128bit PAC key 146 | */ 147 | __STATIC_FORCEINLINE void __TZ_set_PAC_KEY_P_NS (uint32_t* pPacKey) { 148 | __ASM volatile ( 149 | "ldr r1,[%0,#0]\n" 150 | "msr pac_key_p_0_ns, r1\n" 151 | "ldr r1,[%0,#4]\n" 152 | "msr pac_key_p_1_ns, r1\n" 153 | "ldr r1,[%0,#8]\n" 154 | "msr pac_key_p_2_ns, r1\n" 155 | "ldr r1,[%0,#12]\n" 156 | "msr pac_key_p_3_ns, r1\n" 157 | : : "r" (pPacKey) : "memory", "r1" 158 | ); 159 | } 160 | 161 | /** 162 | \brief read the PAC key used for unprivileged mode (non-secure) 163 | \details Reads the PAC key stored in the non-secure PAC_KEY_U registers when in secure mode. 164 | \param [out] pPacKey 128bit PAC key 165 | */ 166 | __STATIC_FORCEINLINE void __TZ_get_PAC_KEY_U_NS (uint32_t* pPacKey) { 167 | __ASM volatile ( 168 | "mrs r1, pac_key_u_0_ns\n" 169 | "str r1,[%0,#0]\n" 170 | "mrs r1, pac_key_u_1_ns\n" 171 | "str r1,[%0,#4]\n" 172 | "mrs r1, pac_key_u_2_ns\n" 173 | "str r1,[%0,#8]\n" 174 | "mrs r1, pac_key_u_3_ns\n" 175 | "str r1,[%0,#12]\n" 176 | : : "r" (pPacKey) : "memory", "r1" 177 | ); 178 | } 179 | 180 | /** 181 | \brief write the PAC key used for unprivileged mode (non-secure) 182 | \details writes the given PAC key to the non-secure PAC_KEY_U registers when in secure mode. 183 | \param [in] pPacKey 128bit PAC key 184 | */ 185 | __STATIC_FORCEINLINE void __TZ_set_PAC_KEY_U_NS (uint32_t* pPacKey) { 186 | __ASM volatile ( 187 | "ldr r1,[%0,#0]\n" 188 | "msr pac_key_u_0_ns, r1\n" 189 | "ldr r1,[%0,#4]\n" 190 | "msr pac_key_u_1_ns, r1\n" 191 | "ldr r1,[%0,#8]\n" 192 | "msr pac_key_u_2_ns, r1\n" 193 | "ldr r1,[%0,#12]\n" 194 | "msr pac_key_u_3_ns, r1\n" 195 | : : "r" (pPacKey) : "memory", "r1" 196 | ); 197 | } 198 | 199 | #endif /* (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) */ 200 | 201 | #endif /* (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) */ 202 | 203 | /*@} end of CMSIS_Core_PacKeyFunctions */ 204 | 205 | 206 | #endif /* PAC_ARMV81_H */ 207 | -------------------------------------------------------------------------------- /software/system/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /** @addtogroup CMSIS 20 | * @{ 21 | */ 22 | 23 | /** @addtogroup stm32f4xx_system 24 | * @{ 25 | */ 26 | 27 | /** 28 | * @brief Define to prevent recursive inclusion 29 | */ 30 | #ifndef __SYSTEM_STM32F4XX_H 31 | #define __SYSTEM_STM32F4XX_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /** @addtogroup STM32F4xx_System_Includes 38 | * @{ 39 | */ 40 | 41 | /** 42 | * @} 43 | */ 44 | 45 | 46 | /** @addtogroup STM32F4xx_System_Exported_types 47 | * @{ 48 | */ 49 | /* This variable is updated in three ways: 50 | 1) by calling CMSIS function SystemCoreClockUpdate() 51 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 52 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 53 | Note: If you use this function to configure the system clock; then there 54 | is no need to call the 2 first functions listed above, since SystemCoreClock 55 | variable is updated automatically. 56 | */ 57 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 58 | 59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F4xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F4xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F4xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F4XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | -------------------------------------------------------------------------------- /software/system/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | --------------------------------------------------------------------------------