├── LICENSE ├── README.md ├── examples └── qn8027_example │ └── qn8027_example.ino ├── library.properties └── src ├── QN8027.cpp └── QN8027.h /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. Definitions. 8 | 9 | "License" shall mean the terms and conditions for use, reproduction, 10 | and distribution as defined by Sections 1 through 9 of this document. 11 | 12 | "Licensor" shall mean the copyright owner or entity authorized by 13 | the copyright owner that is granting the License. 14 | 15 | "Legal Entity" shall mean the union of the acting entity and all 16 | other entities that control, are controlled by, or are under common 17 | control with that entity. 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The text should be enclosed in the appropriate 184 | comment syntax for the file format. We also recommend that a 185 | file or class name and description of purpose be included on the 186 | same "printed page" as the copyright notice for easier 187 | identification within third-party archives. 188 | 189 | Copyright [yyyy] [name of copyright owner] 190 | 191 | Licensed under the Apache License, Version 2.0 (the "License"); 192 | you may not use this file except in compliance with the License. 193 | You may obtain a copy of the License at 194 | 195 | http://www.apache.org/licenses/LICENSE-2.0 196 | 197 | Unless required by applicable law or agreed to in writing, software 198 | distributed under the License is distributed on an "AS IS" BASIS, 199 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 200 | See the License for the specific language governing permissions and 201 | limitations under the License. 202 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # QN8027 2 | QN8027 Single-Chip FM RDS Transmitter Arduino Library 3 | 4 | # With partial RDS support 5 | -------------------------------------------------------------------------------- /examples/qn8027_example/qn8027_example.ino: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | #include 4 | #include 5 | 6 | QN8027 fm; 7 | float frequency = 89.5f; 8 | 9 | void setup() { 10 | fm.begin(frequency); 11 | } 12 | 13 | void loop() { 14 | // put your main code here, to run repeatedly: 15 | } 16 | -------------------------------------------------------------------------------- /library.properties: -------------------------------------------------------------------------------- 1 | name=QN8027 2 | version=0.0.1 3 | author=Martin Ondrak, Arduino 4 | maintainer=Arduino 5 | sentence=Allows Arduino/Genuino boards to control a QN8027. 6 | paragraph=This library can control a QN8027 FM Transmitter chip.
7 | category=Device Control 8 | url=https://github.com/dragon-engineer/qn8027_arduino_library 9 | architectures=avr,megaavr,sam,samd,nrf52,stm32f4,esp32,esp8266 -------------------------------------------------------------------------------- /src/QN8027.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | 3 | QN8027 Arduino Library 4 | QN8027 is a single chip Stereo FM RDS Exciter with I2C Interface 5 | 6 | Martin Ondrak, 2017 - 2018 7 | martas.ondrak@gmail.com 8 | 9 | */ 10 | #include 11 | 12 | #include 13 | #include "QN8027.h" 14 | 15 | // Usually once a few seconds 16 | void QN8027::rdsTick(void) 17 | { 18 | _rotateRdsBuf(4); 19 | } 20 | 21 | void QN8027::rdsRefresh(void) 22 | { 23 | _writeRds(); 24 | } 25 | 26 | void QN8027::_rotateRdsBuf(uint8_t num) 27 | { 28 | if (rdsBufPtr + num < rdsBufLength) 29 | { 30 | rdsBufPtr += num; 31 | pageNumber++; 32 | 33 | if (!(pageNumber % 2)) 34 | { 35 | rdsDisplayPtr++; 36 | } 37 | 38 | } 39 | else 40 | { 41 | rdsBufPtr = 0; 42 | pageNumber = 0; 43 | rdsDisplayPtr = 0; 44 | } 45 | 46 | } 47 | 48 | void QN8027::_writeRegister(uint8_t addr, uint8_t data) 49 | { 50 | Wire.beginTransmission(QN8027_ADDRESS); 51 | Wire.write(addr); 52 | Wire.write(data); 53 | Wire.endTransmission(true); 54 | } 55 | 56 | uint8_t QN8027::_readRegister(uint8_t addr) 57 | { 58 | Wire.beginTransmission(QN8027_ADDRESS); 59 | Wire.write(addr); 60 | Wire.endTransmission(); 61 | Wire.requestFrom(QN8027_ADDRESS, 1); 62 | return Wire.read(); 63 | } 64 | 65 | void QN8027::_updateRegister(uint8_t addr, uint8_t data, uint8_t mask) 66 | { 67 | uint8_t dataOld = _readRegister(addr); 68 | uint8_t dataNew = (dataOld & ~mask) | (data & mask); 69 | _writeRegister(addr, dataNew); 70 | } 71 | 72 | void QN8027::rdsBufSet(const char buf[RDSBUF_SIZE], uint16_t length) 73 | { 74 | length -= 1; 75 | memcpy(rdsBuf, buf, length); 76 | memset(&rdsBuf[length], ' ', RDSBUF_SIZE - length); 77 | rdsBufPtr = 0; 78 | rdsBufLength = length; 79 | pageNumber = 0; 80 | rdsDisplayPtr = 0; 81 | pages = (uint16_t)((length >> 3)); // Division by 8 - fast math 82 | 83 | } 84 | 85 | void QN8027::begin(float fmFreq) 86 | { 87 | Wire.begin(); 88 | 89 | uint16_t freqChannel = ((uint16_t)(FREQ_FLOAT2CHANNEL(fmFreq))); 90 | 91 | reset(); 92 | 93 | _setFrequency(freqChannel); 94 | } 95 | 96 | #if (defined(ESP32) || defined(ESP8266)) 97 | void QN8027::begin(uint8_t sda, uint8_t scl) 98 | { 99 | Wire.begin(sda, scl); 100 | 101 | uint16_t freqChannel = ((uint16_t)(FREQ_FLOAT2CHANNEL(FREQ_DEFAULT))); 102 | 103 | reset(); 104 | 105 | _setFrequency(freqChannel); 106 | 107 | } 108 | 109 | void QN8027::begin(uint8_t sda, uint8_t scl, float i2cFreq, float fmFreq) 110 | { 111 | Wire.begin(sda, scl, i2cFreq); 112 | 113 | uint16_t freqChannel = ((uint16_t)(FREQ_FLOAT2CHANNEL(fmFreq))); 114 | 115 | reset(); 116 | 117 | _setFrequency(freqChannel); 118 | 119 | enable(true); 120 | 121 | } 122 | #endif 123 | 124 | void QN8027::setTxPower(uint8_t pwr) // 20 - 75 125 | { 126 | uint8_t data; 127 | if (pwr < 20) 128 | data = 20; 129 | else if (pwr > 75) 130 | data = 75; 131 | else 132 | data = pwr; 133 | 134 | _writeRegister(QN8027_REG_PAC, data); 135 | } 136 | 137 | void QN8027::enable(boolean enable) 138 | { 139 | _updateRegister(QN8027_REG_SYSTEM, (enable << QN8027_BIT_IDLE), QN8027_MASK_IDLE); 140 | } 141 | 142 | void QN8027::rdsEnable(boolean enable) 143 | { 144 | _updateRegister(QN8027_REG_RDS, (enable << QN8027_BIT_RDSEN), QN8027_MASK_RDSEN); 145 | } 146 | 147 | void QN8027::_setFrequency(uint16_t freqChannel) 148 | { 149 | _writeRegister(QN8027_REG_CH1, (uint8_t)freqChannel); 150 | _updateRegister(QN8027_REG_SYSTEM, (uint8_t)(freqChannel >> 8), QN8027_MASK_CH_HI); 151 | } 152 | 153 | void QN8027::setFrequency(float freq) 154 | { 155 | uint16_t freqChannel = ((uint16_t)(FREQ_FLOAT2CHANNEL(freq))); 156 | 157 | if (freqChannel > 640) 158 | { 159 | freqChannel = 640; 160 | } 161 | 162 | _setFrequency(freqChannel); 163 | } 164 | 165 | // If a user is time constrained they can optimize these delay times but it is not really necessary as you initialize the QN8027 only once 166 | void QN8027::reset(void) 167 | { 168 | _writeRegister(QN8027_REG_SYSTEM, 1 << QN8027_BIT_RESET); 169 | 170 | delay(80); 171 | 172 | _writeRegister(QN8027_REG_XTL, (((uint8_t)CLOCK_XTAL) << QN8027_BIT_XINJ) | 0x0f); 173 | 174 | delay(80); 175 | 176 | _writeRegister(QN8027_REG_VGA, (((uint8_t)CLOCKSPEED_12) << QN8027_BIT_XSEL) | (((uint8_t)GAIN_0) << QN8027_BIT_GVGA) | (((uint8_t)TXGAIN_2) << QN8027_BIT_GDB) | (((uint8_t)RIN_1) << QN8027_BIT_RIN)); //0b1010101 //4-2-2 177 | 178 | delay(80); 179 | 180 | _writeRegister(QN8027_REG_SYSTEM, 1 << QN8027_BIT_RECAL); 181 | 182 | delay(80); 183 | 184 | _writeRegister(QN8027_REG_RDS, 10); // Experimental - Sets N*0,35 kHz as a RDS Freq deviation 185 | 186 | delay(80); 187 | 188 | _writeRegister(QN8027_REG_SYSTEM, 0x00); 189 | 190 | delay(80); 191 | 192 | _writeRegister(QN8027_REG_GPLT, 0x39); 193 | 194 | delay(80); 195 | 196 | } 197 | 198 | void QN8027::getCurrentRds(char rdsData[9]) 199 | { 200 | char buf[9]; 201 | buf[8] = '\0'; 202 | memcpy(&buf[0], &rdsBuf[rdsDisplayPtr * 8], 8); 203 | memcpy(rdsData, buf, 9); 204 | } 205 | 206 | void QN8027::_writeRds() 207 | { 208 | 209 | _writeRegister(QN8027_REG_RDSD0, 0b01000000); //0b00100000 210 | _writeRegister(QN8027_REG_RDSD1, 0b00000000); //0b00000000 211 | _writeRegister(QN8027_REG_RDSD2, 0b00001000); //0b00100000 212 | _writeRegister(QN8027_REG_RDSD3, (uint8_t)(0b01000000 | (pageNumber & 0b1111))); 213 | 214 | _writeRegister(QN8027_REG_RDSD4, (uint8_t)rdsBuf[rdsBufPtr]); 215 | _writeRegister(QN8027_REG_RDSD5, (uint8_t)rdsBuf[rdsBufPtr + 1]); 216 | _writeRegister(QN8027_REG_RDSD6, (uint8_t)rdsBuf[rdsBufPtr + 2]); 217 | _writeRegister(QN8027_REG_RDSD7, (uint8_t)rdsBuf[rdsBufPtr + 3]); 218 | 219 | //if (_readRegister(QN8027_REG_STATUS) & (1 << QN8027_BIT_RDS_UPD)) 220 | { 221 | 222 | uint8_t tmp = _readRegister(QN8027_REG_SYSTEM); 223 | 224 | boolean rdsUpdated = (tmp & (1 << QN8027_BIT_RDSRDY)) ? false : true; 225 | if (!rdsUpdated) 226 | { 227 | _writeRegister(QN8027_REG_SYSTEM, (tmp & (0xff - (1 << QN8027_BIT_RDSRDY)))); 228 | } 229 | else 230 | { 231 | _writeRegister(QN8027_REG_SYSTEM, tmp | (1 << QN8027_BIT_RDSRDY)); 232 | } 233 | } 234 | //else 235 | { 236 | //Serial.printf("Not updating RDS, exit.\r\n"); 237 | } 238 | 239 | } 240 | 241 | 242 | -------------------------------------------------------------------------------- /src/QN8027.h: -------------------------------------------------------------------------------- 1 | /* 2 | 3 | QN8027 Arduino library 4 | QN8027 is a single chip Stereo FM RDS Exciter with I2C Interface 5 | 6 | Martin Ondrak, 2017-2018 7 | Univerzita Pardubice 8 | martas.ondrak@gmail.com 9 | 10 | */ 11 | 12 | #ifndef _QN8027_h 13 | #define _QN8027_h 14 | 15 | #include 16 | 17 | #define TX_POWER_MAX 75 18 | #define RDSBUF_SIZE 128 //8 (bytes) is the smallest value 19 | 20 | #define FREQ_DEFAULT 88.9f 21 | 22 | #define QN8027_ADDRESS (0x2C) 23 | 24 | #define QN8027_REG_SYSTEM (0x00) //SYSTEM Sets device modes, resets. 25 | #define QN8027_REG_CH1 (0x01) //Lower 8 bits of 10-bit channel index. 26 | #define QN8027_REG_GPLT (0x02) //Audio controls, gain of TX pilot frequency deviation. 27 | #define QN8027_REG_XTL (0x03) //XCLK pin control. 28 | #define QN8027_REG_VGA (0x04) //TX mode input impedance, crystal frequency setting. 29 | #define QN8027_REG_CID1 (0x05) //Device ID numbers. 30 | #define QN8027_REG_CID2 (0x06) //Device ID numbers. 31 | #define QN8027_REG_STATUS (0x07) //Device status indicators. 32 | #define QN8027_REG_RDSD0 (0x08) //RDS data byte 0. 33 | #define QN8027_REG_RDSD1 (0x09) //RDS data byte 1. 34 | #define QN8027_REG_RDSD2 (0x0A) //RDS data byte 2. 35 | #define QN8027_REG_RDSD3 (0x0B) //RDS data byte 3. 36 | #define QN8027_REG_RDSD4 (0x0C) //RDS data byte 4. 37 | #define QN8027_REG_RDSD5 (0x0D) //RDS data byte 5. 38 | #define QN8027_REG_RDSD6 (0x0E) //RDS data byte 6. 39 | #define QN8027_REG_RDSD7 (0x0F) //RDS data byte 7. 40 | #define QN8027_REG_PAC (0x10) //PA output power target control. 41 | #define QN8027_REG_FDEV (0x11) //Specify total TX frequency deviation. 42 | #define QN8027_REG_RDS (0x12) //Specify RDS frequency deviation, RDS mode selection. 43 | 44 | #define QN8027_WRITEREG (0x58) 45 | #define QN8027_READREG (0x59) 46 | 47 | //SYSTEM - 0x00 48 | #define QN8027_BIT_RESET (7) 49 | #define QN8027_BIT_RECAL (6) 50 | #define QN8027_BIT_IDLE (5) 51 | #define QN8027_BIT_MONO (4) 52 | #define QN8027_BIT_MUTE (3) 53 | #define QN8027_BIT_RDSRDY (2) 54 | #define QN8027_BIT_CH_HI (0) 55 | 56 | #define QN8027_MASK_RESET (1 << QN8027_BIT_RESET) //1 = RESET 57 | #define QN8027_MASK_RECAL (1 << QN8027_BIT_RECAL) 58 | #define QN8027_MASK_IDLE (1 << QN8027_BIT_IDLE) //0 = IDLE 59 | #define QN8027_MASK_MONO (1 << QN8027_BIT_MONO) //0 = Stereo 60 | #define QN8027_MASK_MUTE (1 << QN8027_BIT_MUTE) //0 = Not Muted 61 | #define QN8027_MASK_RDSRDY (1 << QN8027_BIT_RDSRDY) //1 = RDS Ready 62 | #define QN8027_MASK_CH_HI (3 << QN8027_BIT_CH_HI) 63 | 64 | //GPLT - 0x02 65 | #define QN8027_BIT_PREEMP (7) 66 | #define QN8027_BIT_PRIV (6) 67 | #define QN8027_BIT_T1M (4) 68 | 69 | #define QN8027_MASK_PREEMP (1 << QN8027_BIT_PREEMP) 70 | #define QN8027_MASK_PRIV (1 << QN8027_BIT_PRIV) 71 | #define QN8027_MASK_T1M (3 << QN8027_BIT_T1M) 72 | #define QN8027_MASK_TXPLT (15) 73 | 74 | //XTL - 0x03 75 | #define QN8027_BIT_XINJ (6) 76 | 77 | #define QN8027_MASK_XINJ (3 << QN8027_BIT_XINJ) 78 | #define QN8027_MASK_XISEL (31) 79 | 80 | //VGA - 0x04 81 | #define QN8027_BIT_XSEL (7) 82 | #define QN8027_BIT_GVGA (4) 83 | #define QN8027_BIT_GDB (2) 84 | #define QN8027_BIT_RIN (0) 85 | 86 | #define QN8027_MASK_XSEL (1 << QN8027_BIT_XSEL) //0 = 12 MHz; 1 = 24 MHz 87 | #define QN8027_MASK_GVGA (3 << QN8027_BIT_GVGA) 88 | #define QN8027_MASK_GDB (3 << QN8027_BIT_GDB) 89 | #define QN8027_MASK_RIN (3) 90 | 91 | //CID1 - 0x05 92 | #define QN8027_BIT_CID1 (2) 93 | 94 | #define QN8027_MASK_CID1 (3 << QN8027_BIT_CID1) 95 | #define QN8027_MASK_CID2 (3) 96 | 97 | //CID2 - 0x06 98 | #define QN8027_BIT_CID3 (4) 99 | 100 | #define QN8027_MASK_CID3 (15 << QN8027_BIT_CID3) 101 | #define QN8027_MASK_CID4 (15) 102 | 103 | //STATUS - 0x07 104 | #define QN8027_BIT_AUD_UPK (4) 105 | #define QN8027_BIT_RDS_UPD (3) 106 | 107 | #define QN8027_MASK_AUD_UPK (15 << QN8027_BIT_AUD_UPK) 108 | #define QN8027_MASK_RDS_UPD (1 << QN8027_BIT_RDS_UPD) 109 | #define QN8027_MASK_FSM (7) 110 | 111 | //PAC - 0x10 112 | #define QN8027_BIT_TXPD_CLR (7) 113 | 114 | #define QN8027_MASK_TXPD_CLR (1 << QN8027_BIT_TXPD_CLR) 115 | #define QN8027_MASK_PA_TRGT (127) 116 | 117 | //RDS - 0x12 118 | #define QN8027_BIT_RDSEN (7) 119 | 120 | #define QN8027_MASK_RDSEN (1 << QN8027_BIT_RDSEN) //0 - Off; 1 - On 121 | #define QN8027_MASK_RDSFDEV (127) 122 | 123 | 124 | #define FREQ_FLOAT2CHANNEL(X) (round((X - 76) / 0.05f)) 125 | 126 | 127 | typedef enum 128 | { 129 | STEREO = 0, 130 | MONO = 1 131 | }audioMode_e; 132 | 133 | typedef enum 134 | { 135 | PREEMP_50US = 0, 136 | PREEMP_75US = 1 137 | }preEmphasis_e; 138 | 139 | typedef enum 140 | { 141 | POWERSAVE_58S = 0, 142 | POWERSAVE_59S = 1, 143 | POWERSAVE_60S = 2, 144 | POWERSAVE_NONE = 3 145 | }powerSave_e; 146 | 147 | typedef enum 148 | { 149 | GAIN_TXPILOT_0 = 0, 150 | GAIN_TXPILOT_1 = 1, 151 | GAIN_TXPILOT_2 = 2, 152 | GAIN_TXPILOT_3 = 3 153 | }gainTxPilot_e; 154 | 155 | typedef enum 156 | { 157 | CLOCK_XTAL = 0, 158 | CLOCK_SQIN = 1, 159 | CLOCK_OSC = 2, 160 | }clockSource_e; 161 | 162 | typedef enum 163 | { 164 | CLOCKSPEED_12 = 0, 165 | CLOCKSPEED_24 = 1 166 | }clockSpeed_e; 167 | 168 | typedef enum 169 | { 170 | RIN_0 = 0, 171 | RIN_1 = 1, 172 | RIN_2 = 2, 173 | RIN_3 = 3 174 | }inputResistance_e; 175 | 176 | typedef enum 177 | { 178 | GAIN_0 = 0, 179 | GAIN_1 = 1, 180 | GAIN_2 = 2, 181 | GAIN_3 = 3, 182 | GAIN_4 = 4, 183 | GAIN_5 = 5 184 | }inputGain_e; 185 | 186 | typedef enum 187 | { 188 | TXGAIN_0 = 0, 189 | TXGAIN_1 = 1, 190 | TXGAIN_2 = 2 191 | }txGain_e; 192 | 193 | 194 | 195 | 196 | 197 | class QN8027 198 | { 199 | public: 200 | void begin(float fmFreq); 201 | void begin(uint8_t sda, uint8_t scl); 202 | void begin(uint8_t sda, uint8_t scl, float i2cFreq, float fmFreq); 203 | 204 | void reset(void); 205 | 206 | void setFrequency(float freq); 207 | void setTxPower(uint8_t pwr); 208 | void enable(boolean enable); 209 | 210 | void rdsBufSet(const char buf[RDSBUF_SIZE], uint16_t length); 211 | void rdsTick(void); 212 | void rdsRefresh(void); 213 | void rdsEnable(boolean enable); 214 | 215 | void getCurrentRds(char rdsBuf[9]); 216 | 217 | 218 | protected: 219 | 220 | private: 221 | void _writeRegister(uint8_t addr, uint8_t data); 222 | void _updateRegister(uint8_t addr, uint8_t data, uint8_t mask); 223 | uint8_t _readRegister(uint8_t addr); 224 | 225 | void _setFrequency(uint16_t freqChannel); 226 | 227 | void _rotateRdsBuf(uint8_t num); 228 | 229 | void _writeRds(); 230 | 231 | uint8_t pages; 232 | uint8_t pageNumber; 233 | uint8_t rdsBufPtr; 234 | uint8_t rdsBufLength; 235 | uint8_t rdsDisplayPtr; 236 | char rdsBuf[RDSBUF_SIZE]; 237 | 238 | }; 239 | 240 | //typedef void (*callback_t)(void); 241 | 242 | 243 | 244 | #endif 245 | 246 | --------------------------------------------------------------------------------