├── .gitmodules ├── License ├── Readme.md ├── doc ├── block_diagram.svg ├── cdbus_gui.png ├── cdstep_v3.jpg ├── cdstep_v4.jpg ├── csa_list_show.png ├── iap_export.png └── plot.png ├── hardware ├── cdstep_pcb_v3.1.png ├── cdstep_pcb_v4.1.png ├── cdstep_sch_v3.1.pdf └── cdstep_sch_v4.1.pdf ├── mdrv_bl ├── .gitignore ├── Core │ ├── Inc │ │ ├── main.h │ │ ├── stm32g0xx_hal_conf.h │ │ └── stm32g0xx_it.h │ └── Src │ │ ├── main.c │ │ ├── stm32g0xx_hal_msp.c │ │ ├── stm32g0xx_it.c │ │ ├── syscalls.c │ │ ├── sysmem.c │ │ └── system_stm32g0xx.c ├── Drivers │ ├── CMSIS │ │ ├── Device │ │ │ └── ST │ │ │ │ └── STM32G0xx │ │ │ │ ├── Include │ │ │ │ ├── stm32g071xx.h │ │ │ │ ├── stm32g0xx.h │ │ │ │ └── system_stm32g0xx.h │ │ │ │ └── LICENSE.txt │ │ ├── Include │ │ │ ├── cmsis_armcc.h │ │ │ ├── cmsis_armclang.h │ │ │ ├── cmsis_armclang_ltm.h │ │ │ ├── cmsis_compiler.h │ │ │ ├── cmsis_gcc.h │ │ │ ├── cmsis_iccarm.h │ │ │ ├── cmsis_version.h │ │ │ ├── core_armv81mml.h │ │ │ ├── core_armv8mbl.h │ │ │ ├── core_armv8mml.h │ │ │ ├── core_cm0.h │ │ │ ├── core_cm0plus.h │ │ │ ├── core_cm1.h │ │ │ ├── core_cm23.h │ │ │ ├── core_cm3.h │ │ │ ├── core_cm33.h │ │ │ ├── core_cm35p.h │ │ │ ├── core_cm4.h │ │ │ ├── core_cm7.h │ │ │ ├── core_sc000.h │ │ │ ├── core_sc300.h │ │ │ ├── mpu_armv7.h │ │ │ ├── mpu_armv8.h │ │ │ └── tz_context.h │ │ └── LICENSE.txt │ └── STM32G0xx_HAL_Driver │ │ ├── Inc │ │ ├── Legacy │ │ │ └── stm32_hal_legacy.h │ │ ├── stm32g0xx_hal.h │ │ ├── stm32g0xx_hal_cortex.h │ │ ├── stm32g0xx_hal_def.h │ │ ├── stm32g0xx_hal_dma.h │ │ ├── stm32g0xx_hal_dma_ex.h │ │ ├── stm32g0xx_hal_exti.h │ │ ├── stm32g0xx_hal_flash.h │ │ ├── stm32g0xx_hal_flash_ex.h │ │ ├── stm32g0xx_hal_gpio.h │ │ ├── stm32g0xx_hal_gpio_ex.h │ │ ├── stm32g0xx_hal_pwr.h │ │ ├── stm32g0xx_hal_pwr_ex.h │ │ ├── stm32g0xx_hal_rcc.h │ │ ├── stm32g0xx_hal_rcc_ex.h │ │ ├── stm32g0xx_hal_spi.h │ │ ├── stm32g0xx_hal_spi_ex.h │ │ ├── stm32g0xx_hal_uart.h │ │ ├── stm32g0xx_hal_uart_ex.h │ │ ├── stm32g0xx_ll_bus.h │ │ ├── stm32g0xx_ll_cortex.h │ │ ├── stm32g0xx_ll_dma.h │ │ ├── stm32g0xx_ll_dmamux.h │ │ ├── stm32g0xx_ll_exti.h │ │ ├── stm32g0xx_ll_gpio.h │ │ ├── stm32g0xx_ll_lpuart.h │ │ ├── stm32g0xx_ll_pwr.h │ │ ├── stm32g0xx_ll_rcc.h │ │ ├── stm32g0xx_ll_spi.h │ │ ├── stm32g0xx_ll_system.h │ │ ├── stm32g0xx_ll_usart.h │ │ └── stm32g0xx_ll_utils.h │ │ ├── LICENSE.txt │ │ └── Src │ │ ├── stm32g0xx_hal.c │ │ ├── stm32g0xx_hal_cortex.c │ │ ├── stm32g0xx_hal_dma.c │ │ ├── stm32g0xx_hal_dma_ex.c │ │ ├── stm32g0xx_hal_exti.c │ │ ├── stm32g0xx_hal_flash.c │ │ ├── stm32g0xx_hal_flash_ex.c │ │ ├── stm32g0xx_hal_gpio.c │ │ ├── stm32g0xx_hal_pwr.c │ │ ├── stm32g0xx_hal_pwr_ex.c │ │ ├── stm32g0xx_hal_rcc.c │ │ ├── stm32g0xx_hal_rcc_ex.c │ │ ├── stm32g0xx_hal_spi.c │ │ ├── stm32g0xx_hal_spi_ex.c │ │ ├── stm32g0xx_hal_uart.c │ │ ├── stm32g0xx_hal_uart_ex.c │ │ └── stm32g0xx_ll_rcc.c ├── Makefile ├── flash.sh ├── mdrv_bl.ioc ├── startup_stm32g071xx.s ├── stm32g071cbtx_flash.ld └── usr │ ├── app_main.c │ ├── app_main.h │ ├── cd_config.h │ ├── common_services.c │ ├── config.c │ └── debug_config.h └── mdrv_fw ├── .gitignore ├── Core ├── Inc │ ├── main.h │ ├── stm32g0xx_hal_conf.h │ └── stm32g0xx_it.h └── Src │ ├── main.c │ ├── stm32g0xx_hal_msp.c │ ├── stm32g0xx_it.c │ ├── syscalls.c │ ├── sysmem.c │ └── system_stm32g0xx.c ├── Drivers ├── CMSIS │ ├── Device │ │ └── ST │ │ │ └── STM32G0xx │ │ │ ├── Include │ │ │ ├── stm32g071xx.h │ │ │ ├── stm32g0xx.h │ │ │ └── system_stm32g0xx.h │ │ │ └── LICENSE.txt │ ├── Include │ │ ├── cmsis_armcc.h │ │ ├── cmsis_armclang.h │ │ ├── cmsis_armclang_ltm.h │ │ ├── cmsis_compiler.h │ │ ├── cmsis_gcc.h │ │ ├── cmsis_iccarm.h │ │ ├── cmsis_version.h │ │ ├── core_armv81mml.h │ │ ├── core_armv8mbl.h │ │ ├── core_armv8mml.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm1.h │ │ ├── core_cm23.h │ │ ├── core_cm3.h │ │ ├── core_cm33.h │ │ ├── core_cm35p.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_sc000.h │ │ ├── core_sc300.h │ │ ├── mpu_armv7.h │ │ ├── mpu_armv8.h │ │ └── tz_context.h │ └── LICENSE.txt └── STM32G0xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32g0xx_hal.h │ ├── stm32g0xx_hal_cortex.h │ ├── stm32g0xx_hal_dac.h │ ├── stm32g0xx_hal_dac_ex.h │ ├── stm32g0xx_hal_def.h │ ├── stm32g0xx_hal_dma.h │ ├── stm32g0xx_hal_dma_ex.h │ ├── stm32g0xx_hal_exti.h │ ├── stm32g0xx_hal_flash.h │ ├── stm32g0xx_hal_flash_ex.h │ ├── stm32g0xx_hal_gpio.h │ ├── stm32g0xx_hal_gpio_ex.h │ ├── stm32g0xx_hal_pwr.h │ ├── stm32g0xx_hal_pwr_ex.h │ ├── stm32g0xx_hal_rcc.h │ ├── stm32g0xx_hal_rcc_ex.h │ ├── stm32g0xx_hal_spi.h │ ├── stm32g0xx_hal_spi_ex.h │ ├── stm32g0xx_hal_tim.h │ ├── stm32g0xx_hal_tim_ex.h │ ├── stm32g0xx_hal_uart.h │ ├── stm32g0xx_hal_uart_ex.h │ ├── stm32g0xx_ll_bus.h │ ├── stm32g0xx_ll_cortex.h │ ├── stm32g0xx_ll_dac.h │ ├── stm32g0xx_ll_dma.h │ ├── stm32g0xx_ll_dmamux.h │ ├── stm32g0xx_ll_exti.h │ ├── stm32g0xx_ll_gpio.h │ ├── stm32g0xx_ll_lpuart.h │ ├── stm32g0xx_ll_pwr.h │ ├── stm32g0xx_ll_rcc.h │ ├── stm32g0xx_ll_spi.h │ ├── stm32g0xx_ll_system.h │ ├── stm32g0xx_ll_tim.h │ ├── stm32g0xx_ll_usart.h │ └── stm32g0xx_ll_utils.h │ ├── LICENSE.txt │ └── Src │ ├── stm32g0xx_hal.c │ ├── stm32g0xx_hal_cortex.c │ ├── stm32g0xx_hal_dac.c │ ├── stm32g0xx_hal_dac_ex.c │ ├── stm32g0xx_hal_dma.c │ ├── stm32g0xx_hal_dma_ex.c │ ├── stm32g0xx_hal_exti.c │ ├── stm32g0xx_hal_flash.c │ ├── stm32g0xx_hal_flash_ex.c │ ├── stm32g0xx_hal_gpio.c │ ├── stm32g0xx_hal_pwr.c │ ├── stm32g0xx_hal_pwr_ex.c │ ├── stm32g0xx_hal_rcc.c │ ├── stm32g0xx_hal_rcc_ex.c │ ├── stm32g0xx_hal_spi.c │ ├── stm32g0xx_hal_spi_ex.c │ ├── stm32g0xx_hal_tim.c │ ├── stm32g0xx_hal_tim_ex.c │ ├── stm32g0xx_hal_uart.c │ ├── stm32g0xx_hal_uart_ex.c │ └── stm32g0xx_ll_rcc.c ├── Makefile ├── flash.sh ├── mdrv_fw.ioc ├── startup_stm32g071xx.s ├── stm32g071cbtx_flash.ld └── usr ├── app_main.c ├── app_main.h ├── app_motor.c ├── cd_config.h ├── common_services.c ├── config.c ├── debug_config.h ├── pid_i.c ├── pid_i.h └── raw_dbg.c /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "cdnet_bl"] 2 | path = mdrv_bl/cdnet 3 | url = ../cdnet 4 | 5 | [submodule "cdnet_fw"] 6 | path = mdrv_fw/cdnet 7 | url = ../cdnet 8 | 9 | -------------------------------------------------------------------------------- /License: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2018 DUKELEC 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /Readme.md: -------------------------------------------------------------------------------- 1 | CDSTEP Introduction 2 | ======================================= 3 | 4 | 5 | 6 | RS-485 wire housing: Molex 5264 (4 pin) 7 | 8 | Download this project: 9 | ``` 10 | git clone --recursive https://github.com/dukelec/cdstep 11 | ``` 12 | 13 | ## Protocol 14 | 15 | CDSTEP is an open-source stepper motor controller that communicates over an RS485 interface. 16 | - Default baud rate: 115200 bps 17 | - Maximum speed: 50 Mbps 18 | - Default address: 0xfe 19 | 20 | The underlying protocol is CDBUS, with the following frame format: 21 | `src, dst, len, [payload], crc_l, crc_h` 22 | 23 | Each frame includes a 3-byte header, a variable-length payload, and a 2-byte CRC (identical to Modbus CRC). 24 | For more information on the CDBUS protocol, please refer to: 25 | - https://cdbus.org 26 | 27 | The payload is encoded using the CDNET protocol. For detailed information, please refer to: 28 | - https://github.com/dukelec/cdnet 29 | - https://github.com/dukelec/cdnet/wiki/CDNET-Intro-and-Demo 30 | 31 | 32 | ## Block Diagram 33 | 34 | 35 | 36 | ## GUI Tool 37 | 38 | CDBUS GUI Tool: https://github.com/dukelec/cdbus_gui 39 | 40 | After power on, first write 1 to `state`, then write the target position to `tc_pos`, then the stepper motor will rotate. 41 | 42 | 43 | 44 | 45 | After modifying the configuration, write 1 to `save_conf` to save the configuration to flash. 46 | If you need to restore the default configuration, change `magic_code` to another value and save it to flash. Then reapply power. 47 | 48 | Logs: 49 | 50 | 51 | 52 | Plots: 53 | 54 | 55 | 56 | Plot details, IAP upgrade, data import/export (including registers, logs, plots). 57 | 58 | 59 | -------------------------------------------------------------------------------- /doc/cdbus_gui.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/doc/cdbus_gui.png -------------------------------------------------------------------------------- /doc/cdstep_v3.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/doc/cdstep_v3.jpg -------------------------------------------------------------------------------- /doc/cdstep_v4.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/doc/cdstep_v4.jpg -------------------------------------------------------------------------------- /doc/csa_list_show.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/doc/csa_list_show.png -------------------------------------------------------------------------------- /doc/iap_export.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/doc/iap_export.png -------------------------------------------------------------------------------- /doc/plot.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/doc/plot.png -------------------------------------------------------------------------------- /hardware/cdstep_pcb_v3.1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/hardware/cdstep_pcb_v3.1.png -------------------------------------------------------------------------------- /hardware/cdstep_pcb_v4.1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/hardware/cdstep_pcb_v4.1.png -------------------------------------------------------------------------------- /hardware/cdstep_sch_v3.1.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/hardware/cdstep_sch_v3.1.pdf -------------------------------------------------------------------------------- /hardware/cdstep_sch_v4.1.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dukelec/cdstep/501052335a72169b9b48de908c45fa566b31246c/hardware/cdstep_sch_v4.1.pdf -------------------------------------------------------------------------------- /mdrv_bl/.gitignore: -------------------------------------------------------------------------------- 1 | # 2 | # NOTE! Don't add files that are generated in specific 3 | # subdirectories here. Add them in the ".gitignore" file 4 | # in that subdirectory instead. 5 | # 6 | # NOTE! Please use 'git ls-files -i --exclude-standard' 7 | # command after changing this file, to see if there are 8 | # any tracked files which get ignored after the change. 9 | # 10 | # Normal rules 11 | # 12 | .* 13 | *.log 14 | 15 | build/ 16 | mx.scratch 17 | .mxproject 18 | 19 | # 20 | # git files that we don't want to ignore even it they are dot-files 21 | # 22 | !.gitignore 23 | !.gitkeep 24 | !.mailmap 25 | 26 | *.orig 27 | *~ 28 | \#*# 29 | 30 | -------------------------------------------------------------------------------- /mdrv_bl/Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.h 5 | * @brief : Header for main.c file. 6 | * This file contains the common defines of the application. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2024 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __MAIN_H 23 | #define __MAIN_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32g0xx_hal.h" 31 | 32 | /* Private includes ----------------------------------------------------------*/ 33 | /* USER CODE BEGIN Includes */ 34 | 35 | /* USER CODE END Includes */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* USER CODE BEGIN ET */ 39 | 40 | /* USER CODE END ET */ 41 | 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* USER CODE BEGIN EC */ 44 | 45 | /* USER CODE END EC */ 46 | 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* USER CODE BEGIN EM */ 49 | 50 | /* USER CODE END EM */ 51 | 52 | /* Exported functions prototypes ---------------------------------------------*/ 53 | void Error_Handler(void); 54 | 55 | /* USER CODE BEGIN EFP */ 56 | 57 | /* USER CODE END EFP */ 58 | 59 | /* Private defines -----------------------------------------------------------*/ 60 | #define CD_CS_Pin GPIO_PIN_15 61 | #define CD_CS_GPIO_Port GPIOA 62 | #define LED_G_Pin GPIO_PIN_1 63 | #define LED_G_GPIO_Port GPIOD 64 | #define LED_R_Pin GPIO_PIN_2 65 | #define LED_R_GPIO_Port GPIOD 66 | #define OLD_CD_RST_Pin GPIO_PIN_9 67 | #define OLD_CD_RST_GPIO_Port GPIOB 68 | 69 | /* USER CODE BEGIN Private defines */ 70 | 71 | /* USER CODE END Private defines */ 72 | 73 | #ifdef __cplusplus 74 | } 75 | #endif 76 | 77 | #endif /* __MAIN_H */ 78 | -------------------------------------------------------------------------------- /mdrv_bl/Core/Inc/stm32g0xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32g0xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2024 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32G0xx_IT_H 22 | #define __STM32G0xx_IT_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Private includes ----------------------------------------------------------*/ 29 | /* USER CODE BEGIN Includes */ 30 | 31 | /* USER CODE END Includes */ 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN ET */ 35 | 36 | /* USER CODE END ET */ 37 | 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* USER CODE BEGIN EC */ 40 | 41 | /* USER CODE END EC */ 42 | 43 | /* Exported macro ------------------------------------------------------------*/ 44 | /* USER CODE BEGIN EM */ 45 | 46 | /* USER CODE END EM */ 47 | 48 | /* Exported functions prototypes ---------------------------------------------*/ 49 | void NMI_Handler(void); 50 | void HardFault_Handler(void); 51 | void SVC_Handler(void); 52 | void PendSV_Handler(void); 53 | void SysTick_Handler(void); 54 | /* USER CODE BEGIN EFP */ 55 | 56 | /* USER CODE END EFP */ 57 | 58 | #ifdef __cplusplus 59 | } 60 | #endif 61 | 62 | #endif /* __STM32G0xx_IT_H */ 63 | -------------------------------------------------------------------------------- /mdrv_bl/Core/Src/stm32g0xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32g0xx_hal_msp.c 5 | * @brief This file provides code for the MSP Initialization 6 | * and de-Initialization codes. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2024 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "main.h" 23 | /* USER CODE BEGIN Includes */ 24 | 25 | /* USER CODE END Includes */ 26 | 27 | /* Private typedef -----------------------------------------------------------*/ 28 | /* USER CODE BEGIN TD */ 29 | 30 | /* USER CODE END TD */ 31 | 32 | /* Private define ------------------------------------------------------------*/ 33 | /* USER CODE BEGIN Define */ 34 | 35 | /* USER CODE END Define */ 36 | 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* USER CODE BEGIN Macro */ 39 | 40 | /* USER CODE END Macro */ 41 | 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* USER CODE BEGIN PV */ 44 | 45 | /* USER CODE END PV */ 46 | 47 | /* Private function prototypes -----------------------------------------------*/ 48 | /* USER CODE BEGIN PFP */ 49 | 50 | /* USER CODE END PFP */ 51 | 52 | /* External functions --------------------------------------------------------*/ 53 | /* USER CODE BEGIN ExternalFunctions */ 54 | 55 | /* USER CODE END ExternalFunctions */ 56 | 57 | /* USER CODE BEGIN 0 */ 58 | 59 | /* USER CODE END 0 */ 60 | /** 61 | * Initializes the Global MSP. 62 | */ 63 | void HAL_MspInit(void) 64 | { 65 | 66 | /* USER CODE BEGIN MspInit 0 */ 67 | 68 | /* USER CODE END MspInit 0 */ 69 | 70 | __HAL_RCC_SYSCFG_CLK_ENABLE(); 71 | __HAL_RCC_PWR_CLK_ENABLE(); 72 | 73 | /* System interrupt init*/ 74 | 75 | /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral 76 | */ 77 | HAL_SYSCFG_StrobeDBattpinsConfig(SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE); 78 | 79 | /* USER CODE BEGIN MspInit 1 */ 80 | 81 | /* USER CODE END MspInit 1 */ 82 | } 83 | 84 | /** 85 | * @brief SPI MSP Initialization 86 | * This function configures the hardware resources used in this example 87 | * @param hspi: SPI handle pointer 88 | * @retval None 89 | */ 90 | void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) 91 | { 92 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 93 | if(hspi->Instance==SPI1) 94 | { 95 | /* USER CODE BEGIN SPI1_MspInit 0 */ 96 | 97 | /* USER CODE END SPI1_MspInit 0 */ 98 | /* Peripheral clock enable */ 99 | __HAL_RCC_SPI1_CLK_ENABLE(); 100 | 101 | __HAL_RCC_GPIOB_CLK_ENABLE(); 102 | /**SPI1 GPIO Configuration 103 | PB3 ------> SPI1_SCK 104 | PB4 ------> SPI1_MISO 105 | PB5 ------> SPI1_MOSI 106 | */ 107 | GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5; 108 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 109 | GPIO_InitStruct.Pull = GPIO_NOPULL; 110 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 111 | GPIO_InitStruct.Alternate = GPIO_AF0_SPI1; 112 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 113 | 114 | /* USER CODE BEGIN SPI1_MspInit 1 */ 115 | 116 | /* USER CODE END SPI1_MspInit 1 */ 117 | 118 | } 119 | 120 | } 121 | 122 | /** 123 | * @brief SPI MSP De-Initialization 124 | * This function freeze the hardware resources used in this example 125 | * @param hspi: SPI handle pointer 126 | * @retval None 127 | */ 128 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) 129 | { 130 | if(hspi->Instance==SPI1) 131 | { 132 | /* USER CODE BEGIN SPI1_MspDeInit 0 */ 133 | 134 | /* USER CODE END SPI1_MspDeInit 0 */ 135 | /* Peripheral clock disable */ 136 | __HAL_RCC_SPI1_CLK_DISABLE(); 137 | 138 | /**SPI1 GPIO Configuration 139 | PB3 ------> SPI1_SCK 140 | PB4 ------> SPI1_MISO 141 | PB5 ------> SPI1_MOSI 142 | */ 143 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5); 144 | 145 | /* USER CODE BEGIN SPI1_MspDeInit 1 */ 146 | 147 | /* USER CODE END SPI1_MspDeInit 1 */ 148 | } 149 | 150 | } 151 | 152 | /** 153 | * @brief UART MSP Initialization 154 | * This function configures the hardware resources used in this example 155 | * @param huart: UART handle pointer 156 | * @retval None 157 | */ 158 | void HAL_UART_MspInit(UART_HandleTypeDef* huart) 159 | { 160 | GPIO_InitTypeDef GPIO_InitStruct = {0}; 161 | RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 162 | if(huart->Instance==USART1) 163 | { 164 | /* USER CODE BEGIN USART1_MspInit 0 */ 165 | 166 | /* USER CODE END USART1_MspInit 0 */ 167 | 168 | /** Initializes the peripherals clocks 169 | */ 170 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 171 | PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; 172 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 173 | { 174 | Error_Handler(); 175 | } 176 | 177 | /* Peripheral clock enable */ 178 | __HAL_RCC_USART1_CLK_ENABLE(); 179 | 180 | __HAL_RCC_GPIOA_CLK_ENABLE(); 181 | /**USART1 GPIO Configuration 182 | PA9 ------> USART1_TX 183 | */ 184 | GPIO_InitStruct.Pin = GPIO_PIN_9; 185 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 186 | GPIO_InitStruct.Pull = GPIO_PULLUP; 187 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; 188 | GPIO_InitStruct.Alternate = GPIO_AF1_USART1; 189 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 190 | 191 | /* USER CODE BEGIN USART1_MspInit 1 */ 192 | 193 | /* USER CODE END USART1_MspInit 1 */ 194 | 195 | } 196 | 197 | } 198 | 199 | /** 200 | * @brief UART MSP De-Initialization 201 | * This function freeze the hardware resources used in this example 202 | * @param huart: UART handle pointer 203 | * @retval None 204 | */ 205 | void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 206 | { 207 | if(huart->Instance==USART1) 208 | { 209 | /* USER CODE BEGIN USART1_MspDeInit 0 */ 210 | 211 | /* USER CODE END USART1_MspDeInit 0 */ 212 | /* Peripheral clock disable */ 213 | __HAL_RCC_USART1_CLK_DISABLE(); 214 | 215 | /**USART1 GPIO Configuration 216 | PA9 ------> USART1_TX 217 | */ 218 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9); 219 | 220 | /* USER CODE BEGIN USART1_MspDeInit 1 */ 221 | 222 | /* USER CODE END USART1_MspDeInit 1 */ 223 | } 224 | 225 | } 226 | 227 | /* USER CODE BEGIN 1 */ 228 | 229 | /* USER CODE END 1 */ 230 | -------------------------------------------------------------------------------- /mdrv_bl/Core/Src/stm32g0xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32g0xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2024 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "main.h" 22 | #include "stm32g0xx_it.h" 23 | /* Private includes ----------------------------------------------------------*/ 24 | /* USER CODE BEGIN Includes */ 25 | #include "app_main.h" 26 | /* USER CODE END Includes */ 27 | 28 | /* Private typedef -----------------------------------------------------------*/ 29 | /* USER CODE BEGIN TD */ 30 | 31 | /* USER CODE END TD */ 32 | 33 | /* Private define ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN PD */ 35 | 36 | /* USER CODE END PD */ 37 | 38 | /* Private macro -------------------------------------------------------------*/ 39 | /* USER CODE BEGIN PM */ 40 | 41 | /* USER CODE END PM */ 42 | 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* USER CODE BEGIN PV */ 45 | 46 | /* USER CODE END PV */ 47 | 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* USER CODE BEGIN PFP */ 50 | 51 | /* USER CODE END PFP */ 52 | 53 | /* Private user code ---------------------------------------------------------*/ 54 | /* USER CODE BEGIN 0 */ 55 | 56 | /* USER CODE END 0 */ 57 | 58 | /* External variables --------------------------------------------------------*/ 59 | 60 | /* USER CODE BEGIN EV */ 61 | 62 | /* USER CODE END EV */ 63 | 64 | /******************************************************************************/ 65 | /* Cortex-M0+ Processor Interruption and Exception Handlers */ 66 | /******************************************************************************/ 67 | /** 68 | * @brief This function handles Non maskable interrupt. 69 | */ 70 | void NMI_Handler(void) 71 | { 72 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 73 | printf("NMI_Handler\n"); 74 | 75 | /* USER CODE END NonMaskableInt_IRQn 0 */ 76 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 77 | while (1) 78 | { 79 | } 80 | /* USER CODE END NonMaskableInt_IRQn 1 */ 81 | } 82 | 83 | /** 84 | * @brief This function handles Hard fault interrupt. 85 | */ 86 | void HardFault_Handler(void) 87 | { 88 | /* USER CODE BEGIN HardFault_IRQn 0 */ 89 | printf("HardFault_Handler\n"); 90 | 91 | /* USER CODE END HardFault_IRQn 0 */ 92 | while (1) 93 | { 94 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 95 | /* USER CODE END W1_HardFault_IRQn 0 */ 96 | } 97 | } 98 | 99 | /** 100 | * @brief This function handles System service call via SWI instruction. 101 | */ 102 | void SVC_Handler(void) 103 | { 104 | /* USER CODE BEGIN SVC_IRQn 0 */ 105 | 106 | /* USER CODE END SVC_IRQn 0 */ 107 | /* USER CODE BEGIN SVC_IRQn 1 */ 108 | 109 | /* USER CODE END SVC_IRQn 1 */ 110 | } 111 | 112 | /** 113 | * @brief This function handles Pendable request for system service. 114 | */ 115 | void PendSV_Handler(void) 116 | { 117 | /* USER CODE BEGIN PendSV_IRQn 0 */ 118 | 119 | /* USER CODE END PendSV_IRQn 0 */ 120 | /* USER CODE BEGIN PendSV_IRQn 1 */ 121 | 122 | /* USER CODE END PendSV_IRQn 1 */ 123 | } 124 | 125 | /** 126 | * @brief This function handles System tick timer. 127 | */ 128 | void SysTick_Handler(void) 129 | { 130 | /* USER CODE BEGIN SysTick_IRQn 0 */ 131 | 132 | /* USER CODE END SysTick_IRQn 0 */ 133 | HAL_IncTick(); 134 | /* USER CODE BEGIN SysTick_IRQn 1 */ 135 | 136 | /* USER CODE END SysTick_IRQn 1 */ 137 | } 138 | 139 | /******************************************************************************/ 140 | /* STM32G0xx Peripheral Interrupt Handlers */ 141 | /* Add here the Interrupt Handlers for the used peripherals. */ 142 | /* For the available peripheral interrupt handler names, */ 143 | /* please refer to the startup file (startup_stm32g0xx.s). */ 144 | /******************************************************************************/ 145 | 146 | /* USER CODE BEGIN 1 */ 147 | 148 | /* USER CODE END 1 */ 149 | -------------------------------------------------------------------------------- /mdrv_bl/Core/Src/syscalls.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file syscalls.c 4 | * @author Auto-generated by STM32CubeMX 5 | * @brief Minimal System calls file 6 | * 7 | * For more information about which c-functions 8 | * need which of these lowlevel functions 9 | * please consult the Newlib libc-manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2020-2024 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | 34 | /* Variables */ 35 | extern int __io_putchar(int ch) __attribute__((weak)); 36 | extern int __io_getchar(void) __attribute__((weak)); 37 | 38 | 39 | char *__env[1] = { 0 }; 40 | char **environ = __env; 41 | 42 | 43 | /* Functions */ 44 | void initialise_monitor_handles() 45 | { 46 | } 47 | 48 | int _getpid(void) 49 | { 50 | return 1; 51 | } 52 | 53 | int _kill(int pid, int sig) 54 | { 55 | (void)pid; 56 | (void)sig; 57 | errno = EINVAL; 58 | return -1; 59 | } 60 | 61 | void _exit (int status) 62 | { 63 | _kill(status, -1); 64 | while (1) {} /* Make sure we hang here */ 65 | } 66 | 67 | __attribute__((weak)) int _read(int file, char *ptr, int len) 68 | { 69 | (void)file; 70 | int DataIdx; 71 | 72 | for (DataIdx = 0; DataIdx < len; DataIdx++) 73 | { 74 | *ptr++ = __io_getchar(); 75 | } 76 | 77 | return len; 78 | } 79 | 80 | __attribute__((weak)) int _write(int file, char *ptr, int len) 81 | { 82 | (void)file; 83 | int DataIdx; 84 | 85 | for (DataIdx = 0; DataIdx < len; DataIdx++) 86 | { 87 | __io_putchar(*ptr++); 88 | } 89 | return len; 90 | } 91 | 92 | int _close(int file) 93 | { 94 | (void)file; 95 | return -1; 96 | } 97 | 98 | 99 | int _fstat(int file, struct stat *st) 100 | { 101 | (void)file; 102 | st->st_mode = S_IFCHR; 103 | return 0; 104 | } 105 | 106 | int _isatty(int file) 107 | { 108 | (void)file; 109 | return 1; 110 | } 111 | 112 | int _lseek(int file, int ptr, int dir) 113 | { 114 | (void)file; 115 | (void)ptr; 116 | (void)dir; 117 | return 0; 118 | } 119 | 120 | int _open(char *path, int flags, ...) 121 | { 122 | (void)path; 123 | (void)flags; 124 | /* Pretend like we always fail */ 125 | return -1; 126 | } 127 | 128 | int _wait(int *status) 129 | { 130 | (void)status; 131 | errno = ECHILD; 132 | return -1; 133 | } 134 | 135 | int _unlink(char *name) 136 | { 137 | (void)name; 138 | errno = ENOENT; 139 | return -1; 140 | } 141 | 142 | int _times(struct tms *buf) 143 | { 144 | (void)buf; 145 | return -1; 146 | } 147 | 148 | int _stat(char *file, struct stat *st) 149 | { 150 | (void)file; 151 | st->st_mode = S_IFCHR; 152 | return 0; 153 | } 154 | 155 | int _link(char *old, char *new) 156 | { 157 | (void)old; 158 | (void)new; 159 | errno = EMLINK; 160 | return -1; 161 | } 162 | 163 | int _fork(void) 164 | { 165 | errno = EAGAIN; 166 | return -1; 167 | } 168 | 169 | int _execve(char *name, char **argv, char **env) 170 | { 171 | (void)name; 172 | (void)argv; 173 | (void)env; 174 | errno = ENOMEM; 175 | return -1; 176 | } 177 | -------------------------------------------------------------------------------- /mdrv_bl/Core/Src/sysmem.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sysmem.c 4 | * @author Generated by STM32CubeMX 5 | * @brief System Memory calls file 6 | * 7 | * For more information about which C functions 8 | * need which of these lowlevel functions 9 | * please consult the newlib libc manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2024 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | 27 | /** 28 | * Pointer to the current high watermark of the heap usage 29 | */ 30 | static uint8_t *__sbrk_heap_end = NULL; 31 | 32 | /** 33 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc 34 | * and others from the C library 35 | * 36 | * @verbatim 37 | * ############################################################################ 38 | * # .data # .bss # newlib heap # MSP stack # 39 | * # # # # Reserved by _Min_Stack_Size # 40 | * ############################################################################ 41 | * ^-- RAM start ^-- _end _estack, RAM end --^ 42 | * @endverbatim 43 | * 44 | * This implementation starts allocating at the '_end' linker symbol 45 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack 46 | * The implementation considers '_estack' linker symbol to be RAM end 47 | * NOTE: If the MSP stack, at any point during execution, grows larger than the 48 | * reserved size, please increase the '_Min_Stack_Size'. 49 | * 50 | * @param incr Memory size 51 | * @return Pointer to allocated memory 52 | */ 53 | void *_sbrk(ptrdiff_t incr) 54 | { 55 | extern uint8_t _end; /* Symbol defined in the linker script */ 56 | extern uint8_t _estack; /* Symbol defined in the linker script */ 57 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ 58 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 59 | const uint8_t *max_heap = (uint8_t *)stack_limit; 60 | uint8_t *prev_heap_end; 61 | 62 | /* Initialize heap end at first call */ 63 | if (NULL == __sbrk_heap_end) 64 | { 65 | __sbrk_heap_end = &_end; 66 | } 67 | 68 | /* Protect heap from growing into the reserved MSP stack */ 69 | if (__sbrk_heap_end + incr > max_heap) 70 | { 71 | errno = ENOMEM; 72 | return (void *)-1; 73 | } 74 | 75 | prev_heap_end = __sbrk_heap_end; 76 | __sbrk_heap_end += incr; 77 | 78 | return (void *)prev_heap_end; 79 | } 80 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS STM32G0xx Device Peripheral Access Layer Header File. 6 | * 7 | * The file is the unique include file that the application programmer 8 | * is using in the C source code, usually in main.c. This file contains: 9 | * - Configuration section that allows to select: 10 | * - The STM32G0xx device used in the target application 11 | * - To use or not the peripherals drivers in application code(i.e. 12 | * code will be based on direct access to peripherals registers 13 | * rather than drivers API), this option is controlled by 14 | * "#define USE_HAL_DRIVER" 15 | * 16 | ****************************************************************************** 17 | * @attention 18 | * 19 | * Copyright (c) 2018-2021 STMicroelectronics. 20 | * All rights reserved. 21 | * 22 | * This software is licensed under terms that can be found in the LICENSE file 23 | * in the root directory of this software component. 24 | * If no LICENSE file comes with this software, it is provided AS-IS. 25 | * 26 | ****************************************************************************** 27 | */ 28 | /** @addtogroup CMSIS 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup stm32g0xx 33 | * @{ 34 | */ 35 | 36 | #ifndef STM32G0xx_H 37 | #define STM32G0xx_H 38 | 39 | #ifdef __cplusplus 40 | extern "C" { 41 | #endif /* __cplusplus */ 42 | 43 | /** @addtogroup Library_configuration_section 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @brief STM32 Family 49 | */ 50 | #if !defined (STM32G0) 51 | #define STM32G0 52 | #endif /* STM32G0 */ 53 | 54 | /* Uncomment the line below according to the target STM32G0 device used in your 55 | application 56 | */ 57 | 58 | #if !defined (STM32G071xx) && !defined (STM32G081xx) && !defined (STM32G070xx) \ 59 | && !defined (STM32G030xx) && !defined (STM32G031xx) && !defined (STM32G041xx) \ 60 | && !defined (STM32G0B0xx) && !defined (STM32G0B1xx) && !defined (STM32G0C1xx) \ 61 | && !defined (STM32G050xx) && !defined (STM32G051xx) && !defined (STM32G061xx) 62 | /* #define STM32G0B0xx */ /*!< STM32G0B0xx Devices */ 63 | /* #define STM32G0B1xx */ /*!< STM32G0B1xx Devices */ 64 | /* #define STM32G0C1xx */ /*!< STM32G0C1xx Devices */ 65 | /* #define STM32G070xx */ /*!< STM32G070xx Devices */ 66 | /* #define STM32G071xx */ /*!< STM32G071xx Devices */ 67 | /* #define STM32G081xx */ /*!< STM32G081xx Devices */ 68 | /* #define STM32G050xx */ /*!< STM32G050xx Devices */ 69 | /* #define STM32G051xx */ /*!< STM32G051xx Devices */ 70 | /* #define STM32G061xx */ /*!< STM32G061xx Devices */ 71 | /* #define STM32G030xx */ /*!< STM32G030xx Devices */ 72 | /* #define STM32G031xx */ /*!< STM32G031xx Devices */ 73 | /* #define STM32G041xx */ /*!< STM32G041xx Devices */ 74 | #endif 75 | 76 | /* Tip: To avoid modifying this file each time you need to switch between these 77 | devices, you can define the device in your toolchain compiler preprocessor. 78 | */ 79 | #if !defined (USE_HAL_DRIVER) 80 | /** 81 | * @brief Comment the line below if you will not use the peripherals drivers. 82 | In this case, these drivers will not be included and the application code will 83 | be based on direct access to peripherals registers 84 | */ 85 | /*#define USE_HAL_DRIVER */ 86 | #endif /* USE_HAL_DRIVER */ 87 | 88 | /** 89 | * @brief CMSIS Device version number $VERSION$ 90 | */ 91 | #define __STM32G0_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */ 92 | #define __STM32G0_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */ 93 | #define __STM32G0_CMSIS_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */ 94 | #define __STM32G0_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ 95 | #define __STM32G0_CMSIS_VERSION ((__STM32G0_CMSIS_VERSION_MAIN << 24)\ 96 | |(__STM32G0_CMSIS_VERSION_SUB1 << 16)\ 97 | |(__STM32G0_CMSIS_VERSION_SUB2 << 8 )\ 98 | |(__STM32G0_CMSIS_VERSION_RC)) 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @addtogroup Device_Included 105 | * @{ 106 | */ 107 | 108 | #if defined(STM32G0B1xx) 109 | #include "stm32g0b1xx.h" 110 | #elif defined(STM32G0C1xx) 111 | #include "stm32g0c1xx.h" 112 | #elif defined(STM32G0B0xx) 113 | #include "stm32g0b0xx.h" 114 | #elif defined(STM32G071xx) 115 | #include "stm32g071xx.h" 116 | #elif defined(STM32G081xx) 117 | #include "stm32g081xx.h" 118 | #elif defined(STM32G070xx) 119 | #include "stm32g070xx.h" 120 | #elif defined(STM32G031xx) 121 | #include "stm32g031xx.h" 122 | #elif defined(STM32G041xx) 123 | #include "stm32g041xx.h" 124 | #elif defined(STM32G030xx) 125 | #include "stm32g030xx.h" 126 | #elif defined(STM32G051xx) 127 | #include "stm32g051xx.h" 128 | #elif defined(STM32G061xx) 129 | #include "stm32g061xx.h" 130 | #elif defined(STM32G050xx) 131 | #include "stm32g050xx.h" 132 | #else 133 | #error "Please select first the target STM32G0xx device used in your application (in stm32g0xx.h file)" 134 | #endif 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /** @addtogroup Exported_types 141 | * @{ 142 | */ 143 | typedef enum 144 | { 145 | RESET = 0, 146 | SET = !RESET 147 | } FlagStatus, ITStatus; 148 | 149 | typedef enum 150 | { 151 | DISABLE = 0, 152 | ENABLE = !DISABLE 153 | } FunctionalState; 154 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 155 | 156 | typedef enum 157 | { 158 | SUCCESS = 0, 159 | ERROR = !SUCCESS 160 | } ErrorStatus; 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | 167 | /** @addtogroup Exported_macros 168 | * @{ 169 | */ 170 | #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 171 | 172 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 173 | 174 | #define READ_BIT(REG, BIT) ((REG) & (BIT)) 175 | 176 | #define CLEAR_REG(REG) ((REG) = (0x0)) 177 | 178 | #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 179 | 180 | #define READ_REG(REG) ((REG)) 181 | 182 | #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 183 | 184 | /* Use of interrupt control for register exclusive access */ 185 | /* Atomic 32-bit register access macro to set one or several bits */ 186 | #define ATOMIC_SET_BIT(REG, BIT) \ 187 | do { \ 188 | uint32_t primask; \ 189 | primask = __get_PRIMASK(); \ 190 | __set_PRIMASK(1); \ 191 | SET_BIT((REG), (BIT)); \ 192 | __set_PRIMASK(primask); \ 193 | } while(0) 194 | 195 | /* Atomic 32-bit register access macro to clear one or several bits */ 196 | #define ATOMIC_CLEAR_BIT(REG, BIT) \ 197 | do { \ 198 | uint32_t primask; \ 199 | primask = __get_PRIMASK(); \ 200 | __set_PRIMASK(1); \ 201 | CLEAR_BIT((REG), (BIT)); \ 202 | __set_PRIMASK(primask); \ 203 | } while(0) 204 | 205 | /* Atomic 32-bit register access macro to clear and set one or several bits */ 206 | #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 207 | do { \ 208 | uint32_t primask; \ 209 | primask = __get_PRIMASK(); \ 210 | __set_PRIMASK(1); \ 211 | MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \ 212 | __set_PRIMASK(primask); \ 213 | } while(0) 214 | 215 | /* Atomic 16-bit register access macro to set one or several bits */ 216 | #define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \ 217 | 218 | /* Atomic 16-bit register access macro to clear one or several bits */ 219 | #define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \ 220 | 221 | /* Atomic 16-bit register access macro to clear and set one or several bits */ 222 | #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 223 | 224 | /*#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))*/ 225 | /** 226 | * @} 227 | */ 228 | 229 | #if defined (USE_HAL_DRIVER) 230 | #include "stm32g0xx_hal.h" 231 | #endif /* USE_HAL_DRIVER */ 232 | 233 | #ifdef __cplusplus 234 | } 235 | #endif /* __cplusplus */ 236 | 237 | #endif /* STM32G0xx_H */ 238 | /** 239 | * @} 240 | */ 241 | 242 | /** 243 | * @} 244 | */ 245 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32g0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M0+ Device System Source File for STM32G0xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018-2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /** @addtogroup CMSIS 19 | * @{ 20 | */ 21 | 22 | /** @addtogroup stm32g0xx_system 23 | * @{ 24 | */ 25 | 26 | /** 27 | * @brief Define to prevent recursive inclusion 28 | */ 29 | #ifndef SYSTEM_STM32G0XX_H 30 | #define SYSTEM_STM32G0XX_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /** @addtogroup STM32G0xx_System_Includes 37 | * @{ 38 | */ 39 | 40 | /** 41 | * @} 42 | */ 43 | 44 | 45 | /** @addtogroup STM32G0xx_System_Exported_types 46 | * @{ 47 | */ 48 | /* This variable is updated in three ways: 49 | 1) by calling CMSIS function SystemCoreClockUpdate() 50 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 51 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 52 | Note: If you use this function to configure the system clock; then there 53 | is no need to call the 2 first functions listed above, since SystemCoreClock 54 | variable is updated automatically. 55 | */ 56 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 57 | 58 | extern const uint32_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 59 | extern const uint32_t APBPrescTable[8]; /*!< APB prescalers table values */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** @addtogroup STM32G0xx_System_Exported_Constants 66 | * @{ 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** @addtogroup STM32G0xx_System_Exported_Macros 74 | * @{ 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /** @addtogroup STM32G0xx_System_Exported_Functions 82 | * @{ 83 | */ 84 | 85 | extern void SystemInit(void); 86 | extern void SystemCoreClockUpdate(void); 87 | /** 88 | * @} 89 | */ 90 | 91 | #ifdef __cplusplus 92 | } 93 | #endif 94 | 95 | #endif /*SYSTEM_STM32G0XX_H */ 96 | 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/CMSIS/Device/ST/STM32G0xx/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the Apache-2.0 license shall apply. 5 | You may obtain a copy of the Apache-2.0 at: 6 | https://opensource.org/licenses/Apache-2.0 7 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/CMSIS/Include/cmsis_compiler.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_compiler.h 3 | * @brief CMSIS compiler generic header file 4 | * @version V5.1.0 5 | * @date 09. October 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #ifndef __CMSIS_COMPILER_H 26 | #define __CMSIS_COMPILER_H 27 | 28 | #include 29 | 30 | /* 31 | * Arm Compiler 4/5 32 | */ 33 | #if defined ( __CC_ARM ) 34 | #include "cmsis_armcc.h" 35 | 36 | 37 | /* 38 | * Arm Compiler 6.6 LTM (armclang) 39 | */ 40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100) 41 | #include "cmsis_armclang_ltm.h" 42 | 43 | /* 44 | * Arm Compiler above 6.10.1 (armclang) 45 | */ 46 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) 47 | #include "cmsis_armclang.h" 48 | 49 | 50 | /* 51 | * GNU Compiler 52 | */ 53 | #elif defined ( __GNUC__ ) 54 | #include "cmsis_gcc.h" 55 | 56 | 57 | /* 58 | * IAR Compiler 59 | */ 60 | #elif defined ( __ICCARM__ ) 61 | #include 62 | 63 | 64 | /* 65 | * TI Arm Compiler 66 | */ 67 | #elif defined ( __TI_ARM__ ) 68 | #include 69 | 70 | #ifndef __ASM 71 | #define __ASM __asm 72 | #endif 73 | #ifndef __INLINE 74 | #define __INLINE inline 75 | #endif 76 | #ifndef __STATIC_INLINE 77 | #define __STATIC_INLINE static inline 78 | #endif 79 | #ifndef __STATIC_FORCEINLINE 80 | #define __STATIC_FORCEINLINE __STATIC_INLINE 81 | #endif 82 | #ifndef __NO_RETURN 83 | #define __NO_RETURN __attribute__((noreturn)) 84 | #endif 85 | #ifndef __USED 86 | #define __USED __attribute__((used)) 87 | #endif 88 | #ifndef __WEAK 89 | #define __WEAK __attribute__((weak)) 90 | #endif 91 | #ifndef __PACKED 92 | #define __PACKED __attribute__((packed)) 93 | #endif 94 | #ifndef __PACKED_STRUCT 95 | #define __PACKED_STRUCT struct __attribute__((packed)) 96 | #endif 97 | #ifndef __PACKED_UNION 98 | #define __PACKED_UNION union __attribute__((packed)) 99 | #endif 100 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 101 | struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 102 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 103 | #endif 104 | #ifndef __UNALIGNED_UINT16_WRITE 105 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 106 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) 107 | #endif 108 | #ifndef __UNALIGNED_UINT16_READ 109 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 110 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 111 | #endif 112 | #ifndef __UNALIGNED_UINT32_WRITE 113 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 114 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 115 | #endif 116 | #ifndef __UNALIGNED_UINT32_READ 117 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 118 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 119 | #endif 120 | #ifndef __ALIGNED 121 | #define __ALIGNED(x) __attribute__((aligned(x))) 122 | #endif 123 | #ifndef __RESTRICT 124 | #define __RESTRICT __restrict 125 | #endif 126 | #ifndef __COMPILER_BARRIER 127 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. 128 | #define __COMPILER_BARRIER() (void)0 129 | #endif 130 | 131 | 132 | /* 133 | * TASKING Compiler 134 | */ 135 | #elif defined ( __TASKING__ ) 136 | /* 137 | * The CMSIS functions have been implemented as intrinsics in the compiler. 138 | * Please use "carm -?i" to get an up to date list of all intrinsics, 139 | * Including the CMSIS ones. 140 | */ 141 | 142 | #ifndef __ASM 143 | #define __ASM __asm 144 | #endif 145 | #ifndef __INLINE 146 | #define __INLINE inline 147 | #endif 148 | #ifndef __STATIC_INLINE 149 | #define __STATIC_INLINE static inline 150 | #endif 151 | #ifndef __STATIC_FORCEINLINE 152 | #define __STATIC_FORCEINLINE __STATIC_INLINE 153 | #endif 154 | #ifndef __NO_RETURN 155 | #define __NO_RETURN __attribute__((noreturn)) 156 | #endif 157 | #ifndef __USED 158 | #define __USED __attribute__((used)) 159 | #endif 160 | #ifndef __WEAK 161 | #define __WEAK __attribute__((weak)) 162 | #endif 163 | #ifndef __PACKED 164 | #define __PACKED __packed__ 165 | #endif 166 | #ifndef __PACKED_STRUCT 167 | #define __PACKED_STRUCT struct __packed__ 168 | #endif 169 | #ifndef __PACKED_UNION 170 | #define __PACKED_UNION union __packed__ 171 | #endif 172 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 173 | struct __packed__ T_UINT32 { uint32_t v; }; 174 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 175 | #endif 176 | #ifndef __UNALIGNED_UINT16_WRITE 177 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 178 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 179 | #endif 180 | #ifndef __UNALIGNED_UINT16_READ 181 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 182 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 183 | #endif 184 | #ifndef __UNALIGNED_UINT32_WRITE 185 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 186 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 187 | #endif 188 | #ifndef __UNALIGNED_UINT32_READ 189 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 190 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 191 | #endif 192 | #ifndef __ALIGNED 193 | #define __ALIGNED(x) __align(x) 194 | #endif 195 | #ifndef __RESTRICT 196 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 197 | #define __RESTRICT 198 | #endif 199 | #ifndef __COMPILER_BARRIER 200 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. 201 | #define __COMPILER_BARRIER() (void)0 202 | #endif 203 | 204 | 205 | /* 206 | * COSMIC Compiler 207 | */ 208 | #elif defined ( __CSMC__ ) 209 | #include 210 | 211 | #ifndef __ASM 212 | #define __ASM _asm 213 | #endif 214 | #ifndef __INLINE 215 | #define __INLINE inline 216 | #endif 217 | #ifndef __STATIC_INLINE 218 | #define __STATIC_INLINE static inline 219 | #endif 220 | #ifndef __STATIC_FORCEINLINE 221 | #define __STATIC_FORCEINLINE __STATIC_INLINE 222 | #endif 223 | #ifndef __NO_RETURN 224 | // NO RETURN is automatically detected hence no warning here 225 | #define __NO_RETURN 226 | #endif 227 | #ifndef __USED 228 | #warning No compiler specific solution for __USED. __USED is ignored. 229 | #define __USED 230 | #endif 231 | #ifndef __WEAK 232 | #define __WEAK __weak 233 | #endif 234 | #ifndef __PACKED 235 | #define __PACKED @packed 236 | #endif 237 | #ifndef __PACKED_STRUCT 238 | #define __PACKED_STRUCT @packed struct 239 | #endif 240 | #ifndef __PACKED_UNION 241 | #define __PACKED_UNION @packed union 242 | #endif 243 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 244 | @packed struct T_UINT32 { uint32_t v; }; 245 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 246 | #endif 247 | #ifndef __UNALIGNED_UINT16_WRITE 248 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 249 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 250 | #endif 251 | #ifndef __UNALIGNED_UINT16_READ 252 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 253 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 254 | #endif 255 | #ifndef __UNALIGNED_UINT32_WRITE 256 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 257 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 258 | #endif 259 | #ifndef __UNALIGNED_UINT32_READ 260 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 261 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 262 | #endif 263 | #ifndef __ALIGNED 264 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. 265 | #define __ALIGNED(x) 266 | #endif 267 | #ifndef __RESTRICT 268 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 269 | #define __RESTRICT 270 | #endif 271 | #ifndef __COMPILER_BARRIER 272 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. 273 | #define __COMPILER_BARRIER() (void)0 274 | #endif 275 | 276 | 277 | #else 278 | #error Unknown compiler. 279 | #endif 280 | 281 | 282 | #endif /* __CMSIS_COMPILER_H */ 283 | 284 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.3 5 | * @date 24. June 2019 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2019 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2018 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_DEF 22 | #define STM32G0xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx.h" 30 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ 31 | #include 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | 35 | /** 36 | * @brief HAL Status structures definition 37 | */ 38 | typedef enum 39 | { 40 | HAL_OK = 0x00U, 41 | HAL_ERROR = 0x01U, 42 | HAL_BUSY = 0x02U, 43 | HAL_TIMEOUT = 0x03U 44 | } HAL_StatusTypeDef; 45 | 46 | /** 47 | * @brief HAL Lock structures definition 48 | */ 49 | typedef enum 50 | { 51 | HAL_UNLOCKED = 0x00U, 52 | HAL_LOCKED = 0x01U 53 | } HAL_LockTypeDef; 54 | 55 | /* Exported macros -----------------------------------------------------------*/ 56 | 57 | #if !defined(UNUSED) 58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 59 | #endif /* UNUSED */ 60 | 61 | #define HAL_MAX_DELAY 0xFFFFFFFFU 62 | 63 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 64 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 65 | 66 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 67 | do{ \ 68 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 69 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 70 | } while(0U) 71 | 72 | /** @brief Reset the Handles State field. 73 | * @param __HANDLE__ specifies the Peripheral Handle. 74 | * @note This macro can be used for the following purpose: 75 | * - When the Handle is declared as local variable; before passing it as parameter 76 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 77 | * to set to 0 the Handles "State" field. 78 | * Otherwise, "State" field may have any random value and the first time the function 79 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 80 | * (i.e. HAL_PPP_MspInit() will not be executed). 81 | * - When there is a need to reconfigure the low level hardware: instead of calling 82 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 83 | * In this later function, when the Handles "State" field is set to 0, it will execute the function 84 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 85 | * @retval None 86 | */ 87 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 88 | 89 | #if (USE_RTOS == 1U) 90 | /* Reserved for future use */ 91 | #error " USE_RTOS should be 0 in the current HAL release " 92 | #else 93 | #define __HAL_LOCK(__HANDLE__) \ 94 | do{ \ 95 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 96 | { \ 97 | return HAL_BUSY; \ 98 | } \ 99 | else \ 100 | { \ 101 | (__HANDLE__)->Lock = HAL_LOCKED; \ 102 | } \ 103 | }while (0U) 104 | 105 | #define __HAL_UNLOCK(__HANDLE__) \ 106 | do{ \ 107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 108 | }while (0U) 109 | #endif /* USE_RTOS */ 110 | 111 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 112 | #ifndef __weak 113 | #define __weak __attribute__((weak)) 114 | #endif /* __weak */ 115 | #ifndef __packed 116 | #define __packed __attribute__((packed)) 117 | #endif /* __packed */ 118 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 119 | #ifndef __weak 120 | #define __weak __attribute__((weak)) 121 | #endif /* __weak */ 122 | #ifndef __packed 123 | #define __packed __attribute__((__packed__)) 124 | #endif /* __packed */ 125 | #endif /* __GNUC__ */ 126 | 127 | 128 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 129 | /* GNU Compiler */ 130 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 131 | #ifndef __ALIGN_BEGIN 132 | #define __ALIGN_BEGIN 133 | #endif /* __ALIGN_BEGIN */ 134 | #ifndef __ALIGN_END 135 | #define __ALIGN_END __attribute__ ((aligned (4))) 136 | #endif /* __ALIGN_END */ 137 | #elif defined (__GNUC__) && !defined (__CC_ARM) /* GNU Compiler */ 138 | #ifndef __ALIGN_END 139 | #define __ALIGN_END __attribute__ ((aligned (4U))) 140 | #endif /* __ALIGN_END */ 141 | #ifndef __ALIGN_BEGIN 142 | #define __ALIGN_BEGIN 143 | #endif /* __ALIGN_BEGIN */ 144 | #else 145 | #ifndef __ALIGN_END 146 | #define __ALIGN_END 147 | #endif /* __ALIGN_END */ 148 | #ifndef __ALIGN_BEGIN 149 | /* ARM Compiler */ 150 | #if defined (__CC_ARM) /* ARM Compiler V5 */ 151 | #define __ALIGN_BEGIN __align(4U) 152 | /* IAR Compiler */ 153 | #elif defined (__ICCARM__) 154 | #define __ALIGN_BEGIN 155 | #endif /* __CC_ARM */ 156 | #endif /* __ALIGN_BEGIN */ 157 | #endif /* __GNUC__ */ 158 | 159 | /** 160 | * @brief __RAM_FUNC definition 161 | */ 162 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 163 | /* ARM Compiler V4/V5 and V6 164 | -------------------------- 165 | RAM functions are defined using the toolchain options. 166 | Functions that are executed in RAM should reside in a separate source module. 167 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 168 | area of a module to a memory space in physical RAM. 169 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 170 | dialog. 171 | */ 172 | #define __RAM_FUNC 173 | 174 | #elif defined ( __ICCARM__ ) 175 | /* ICCARM Compiler 176 | --------------- 177 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 178 | */ 179 | #define __RAM_FUNC __ramfunc 180 | 181 | #elif defined ( __GNUC__ ) 182 | /* GNU Compiler 183 | ------------ 184 | RAM functions are defined using a specific toolchain attribute 185 | "__attribute__((section(".RamFunc")))". 186 | */ 187 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 188 | 189 | #endif /* __CC_ARM || __ARMCC_VERSION */ 190 | 191 | /** 192 | * @brief __NOINLINE definition 193 | */ 194 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 195 | /* ARM V4/V5 and V6 & GNU Compiler 196 | ------------------------------- 197 | */ 198 | #define __NOINLINE __attribute__ ( (noinline) ) 199 | 200 | #elif defined ( __ICCARM__ ) 201 | /* ICCARM Compiler 202 | --------------- 203 | */ 204 | #define __NOINLINE _Pragma("optimize = no_inline") 205 | 206 | #endif /* __CC_ARM || __ARMCC_VERSION */ 207 | 208 | 209 | #ifdef __cplusplus 210 | } 211 | #endif 212 | 213 | #endif /* STM32G0xx_HAL_DEF */ 214 | 215 | 216 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32G0xx_HAL_FLASH_EX_H 20 | #define STM32G0xx_HAL_FLASH_EX_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32g0xx_hal_def.h" 28 | 29 | /** @addtogroup STM32G0xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASHEx 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported constants --------------------------------------------------------*/ 39 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants 40 | * @{ 41 | */ 42 | /** @defgroup FLASHEx_Empty_Check FLASHEx Empty Check 43 | * @{ 44 | */ 45 | #define FLASH_PROG_NOT_EMPTY 0x00000000u /*!< 1st location in Flash is programmed */ 46 | #define FLASH_PROG_EMPTY FLASH_ACR_PROGEMPTY /*!< 1st location in Flash is empty */ 47 | /** 48 | * @} 49 | */ 50 | /** 51 | * @} 52 | */ 53 | 54 | /* Exported macro ------------------------------------------------------------*/ 55 | /* Exported functions --------------------------------------------------------*/ 56 | /** @addtogroup FLASHEx_Exported_Functions 57 | * @{ 58 | */ 59 | 60 | /* Extended Program operation functions *************************************/ 61 | /** @addtogroup FLASHEx_Exported_Functions_Group1 62 | * @{ 63 | */ 64 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 65 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 66 | void HAL_FLASHEx_EnableDebugger(void); 67 | void HAL_FLASHEx_DisableDebugger(void); 68 | uint32_t HAL_FLASHEx_FlashEmptyCheck(void); 69 | void HAL_FLASHEx_ForceFlashEmpty(uint32_t FlashEmpty); 70 | #if defined(FLASH_SECURABLE_MEMORY_SUPPORT) 71 | void HAL_FLASHEx_EnableSecMemProtection(uint32_t Banks); 72 | #endif /* FLASH_SECURABLE_MEMORY_SUPPORT */ 73 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 74 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 75 | /** 76 | * @} 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /* Private macros ------------------------------------------------------------*/ 84 | /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants 85 | * @{ 86 | */ 87 | #define FLASH_PCROP_GRANULARITY_OFFSET 9u /*!< FLASH Code Readout Protection granularity offset */ 88 | #define FLASH_PCROP_GRANULARITY (1UL << FLASH_PCROP_GRANULARITY_OFFSET) /*!< FLASH Code Readout Protection granularity, 512 Bytes */ 89 | /** 90 | * @} 91 | */ 92 | 93 | 94 | /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros 95 | * @{ 96 | */ 97 | #define IS_FLASH_EMPTY_CHECK(__VALUE__) (((__VALUE__) == FLASH_PROG_EMPTY) || ((__VALUE__) == FLASH_PROG_NOT_EMPTY)) 98 | void FLASH_PageErase(uint32_t Banks, uint32_t Page); 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | #ifdef __cplusplus 112 | } 113 | #endif 114 | 115 | #endif /* STM32G0xx_HAL_FLASH_EX_H */ 116 | 117 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SPI HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_SPI_EX_H 21 | #define STM32G0xx_HAL_SPI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SPIEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup SPIEx_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /* Initialization and de-initialization functions ****************************/ 47 | /* IO operation functions *****************************************************/ 48 | /** @addtogroup SPIEx_Exported_Functions_Group1 49 | * @{ 50 | */ 51 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); 52 | /** 53 | * @} 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | #ifdef __cplusplus 69 | } 70 | #endif 71 | 72 | #endif /* STM32G0xx_HAL_SPI_EX_H */ 73 | 74 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/STM32G0xx_HAL_Driver/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the BSD-3-Clause license shall apply. 5 | You may obtain a copy of the BSD-3-Clause at: 6 | https://opensource.org/licenses/BSD-3-Clause 7 | -------------------------------------------------------------------------------- /mdrv_bl/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended SPI HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * SPI peripheral extended functionalities : 8 | * + IO operation functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2018 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g0xx_hal.h" 25 | 26 | /** @addtogroup STM32G0xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup SPIEx SPIEx 31 | * @brief SPI Extended HAL module driver 32 | * @{ 33 | */ 34 | #ifdef HAL_SPI_MODULE_ENABLED 35 | 36 | /* Private typedef -----------------------------------------------------------*/ 37 | /* Private defines -----------------------------------------------------------*/ 38 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants 39 | * @{ 40 | */ 41 | #define SPI_FIFO_SIZE 4UL 42 | /** 43 | * @} 44 | */ 45 | 46 | /* Private macros ------------------------------------------------------------*/ 47 | /* Private variables ---------------------------------------------------------*/ 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* Exported functions --------------------------------------------------------*/ 50 | 51 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions 52 | * @{ 53 | */ 54 | 55 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions 56 | * @brief Data transfers functions 57 | * 58 | @verbatim 59 | ============================================================================== 60 | ##### IO operation functions ##### 61 | =============================================================================== 62 | [..] 63 | This subsection provides a set of extended functions to manage the SPI 64 | data transfers. 65 | 66 | (#) Rx data flush function: 67 | (++) HAL_SPIEx_FlushRxFifo() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Flush the RX fifo. 75 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains 76 | * the configuration information for the specified SPI module. 77 | * @retval HAL status 78 | */ 79 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) 80 | { 81 | __IO uint32_t tmpreg; 82 | uint8_t count = 0U; 83 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) 84 | { 85 | count++; 86 | tmpreg = hspi->Instance->DR; 87 | UNUSED(tmpreg); /* To avoid GCC warning */ 88 | if (count == SPI_FIFO_SIZE) 89 | { 90 | return HAL_TIMEOUT; 91 | } 92 | } 93 | return HAL_OK; 94 | } 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* HAL_SPI_MODULE_ENABLED */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | /** 111 | * @} 112 | */ 113 | -------------------------------------------------------------------------------- /mdrv_bl/Makefile: -------------------------------------------------------------------------------- 1 | ########################################################################################################################## 2 | # File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Thu Jan 16 10:10:00 HKT 2025] 3 | ########################################################################################################################## 4 | 5 | # ------------------------------------------------ 6 | # Generic Makefile (based on gcc) 7 | # 8 | # ChangeLog : 9 | # 2017-02-10 - Several enhancements + project update mode 10 | # 2015-07-22 - first version 11 | # ------------------------------------------------ 12 | 13 | ###################################### 14 | # target 15 | ###################################### 16 | TARGET = mdrv_bl 17 | GIT_VERSION := $(shell git describe --dirty --always --tags) 18 | 19 | 20 | ###################################### 21 | # building variables 22 | ###################################### 23 | # debug build? 24 | DEBUG = 1 25 | # optimization 26 | OPT = -Os 27 | 28 | 29 | ####################################### 30 | # paths 31 | ####################################### 32 | # Build path 33 | BUILD_DIR = build 34 | 35 | ###################################### 36 | # source 37 | ###################################### 38 | # C sources 39 | C_SOURCES = \ 40 | Core/Src/main.c \ 41 | Core/Src/stm32g0xx_it.c \ 42 | Core/Src/stm32g0xx_hal_msp.c \ 43 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c \ 44 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c \ 45 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c \ 46 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c \ 47 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c \ 48 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \ 49 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \ 50 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c \ 51 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c \ 52 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \ 53 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c \ 54 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c \ 55 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c \ 56 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c \ 57 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c \ 58 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \ 59 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \ 60 | Core/Src/system_stm32g0xx.c \ 61 | Core/Src/sysmem.c \ 62 | Core/Src/syscalls.c \ 63 | cdnet/core/cdnet_core.c \ 64 | cdnet/parser/cdnet_l0.c \ 65 | cdnet/parser/cdnet_l1.c \ 66 | cdnet/parser/cdnet.c \ 67 | cdnet/dev/cdctl_pll_cal.c \ 68 | cdnet/dev/cdctl.c \ 69 | cdnet/utils/cd_list.c \ 70 | usr/config.c \ 71 | usr/common_services.c \ 72 | usr/app_main.c 73 | 74 | # ASM sources 75 | ASM_SOURCES = \ 76 | startup_stm32g071xx.s 77 | 78 | # ASM sources 79 | ASMM_SOURCES = 80 | 81 | 82 | ####################################### 83 | # binaries 84 | ####################################### 85 | PREFIX = arm-none-eabi- 86 | # The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) 87 | # either it can be added to the PATH environment variable. 88 | ifdef GCC_PATH 89 | CC = $(GCC_PATH)/$(PREFIX)gcc 90 | AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp 91 | CP = $(GCC_PATH)/$(PREFIX)objcopy 92 | SZ = $(GCC_PATH)/$(PREFIX)size 93 | else 94 | CC = $(PREFIX)gcc 95 | AS = $(PREFIX)gcc -x assembler-with-cpp 96 | CP = $(PREFIX)objcopy 97 | SZ = $(PREFIX)size 98 | endif 99 | HEX = $(CP) -O ihex 100 | BIN = $(CP) -O binary -S 101 | 102 | ####################################### 103 | # CFLAGS 104 | ####################################### 105 | # cpu 106 | CPU = -mcpu=cortex-m0plus 107 | 108 | # fpu 109 | # NONE for Cortex-M0/M0+/M3 110 | 111 | # float-abi 112 | 113 | 114 | # mcu 115 | MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) -Wdouble-promotion -Wabsolute-value # -u _printf_float 116 | 117 | # macros for gcc 118 | # AS defines 119 | AS_DEFS = 120 | 121 | # C defines 122 | C_DEFS = \ 123 | -DUSE_HAL_DRIVER \ 124 | -DSTM32G071xx \ 125 | -DSW_VER=\"$(GIT_VERSION)\" 126 | 127 | 128 | # AS includes 129 | AS_INCLUDES = 130 | 131 | # C includes 132 | C_INCLUDES = \ 133 | -ICore/Inc \ 134 | -IDrivers/STM32G0xx_HAL_Driver/Inc \ 135 | -IDrivers/STM32G0xx_HAL_Driver/Inc/Legacy \ 136 | -IDrivers/CMSIS/Device/ST/STM32G0xx/Include \ 137 | -IDrivers/CMSIS/Include \ 138 | -Icdnet/parser \ 139 | -Icdnet/core \ 140 | -Icdnet/utils \ 141 | -Icdnet/dev \ 142 | -Icdnet/arch/stm32 \ 143 | -Iusr 144 | 145 | 146 | # compile gcc flags 147 | ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 148 | 149 | CFLAGS += $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 150 | 151 | ifeq ($(DEBUG), 1) 152 | CFLAGS += -g -gdwarf-2 153 | endif 154 | 155 | 156 | # Generate dependency information 157 | CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" 158 | 159 | 160 | ####################################### 161 | # LDFLAGS 162 | ####################################### 163 | # link script 164 | LDSCRIPT = stm32g071cbtx_flash.ld 165 | 166 | # libraries 167 | LIBS = -lc -lm -lnosys 168 | LIBDIR = 169 | LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections 170 | 171 | # default action: build all 172 | all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin 173 | 174 | 175 | ####################################### 176 | # build the application 177 | ####################################### 178 | # list of objects 179 | OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) 180 | vpath %.c $(sort $(dir $(C_SOURCES))) 181 | # list of ASM program objects 182 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) 183 | vpath %.s $(sort $(dir $(ASM_SOURCES))) 184 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASMM_SOURCES:.S=.o))) 185 | vpath %.S $(sort $(dir $(ASMM_SOURCES))) 186 | 187 | $(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 188 | $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ 189 | 190 | $(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) 191 | $(AS) -c $(CFLAGS) $< -o $@ 192 | $(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR) 193 | $(AS) -c $(CFLAGS) $< -o $@ 194 | 195 | $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile 196 | $(CC) $(OBJECTS) $(LDFLAGS) -o $@ 197 | $(SZ) $@ 198 | 199 | $(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 200 | $(HEX) $< $@ 201 | 202 | $(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 203 | $(BIN) $< $@ 204 | 205 | $(BUILD_DIR): 206 | mkdir $@ 207 | 208 | ####################################### 209 | # clean up 210 | ####################################### 211 | clean: 212 | -rm -fR $(BUILD_DIR) 213 | 214 | ####################################### 215 | # dependencies 216 | ####################################### 217 | -include $(wildcard $(BUILD_DIR)/*.d) 218 | 219 | # *** EOF *** 220 | -------------------------------------------------------------------------------- /mdrv_bl/flash.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | st-flash --reset --format ihex write build/*.hex 4 | 5 | 6 | # st-flash --area=option read 7 | # 0xfffffeaa -> 0xf7fffeaa (nrst as io) 8 | # st-flash --area=option write 0xf7fffeaa 9 | 10 | 11 | # bit[28:27] => 2'b10: nrst as io 12 | 13 | -------------------------------------------------------------------------------- /mdrv_bl/mdrv_bl.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | CAD.formats= 3 | CAD.pinconfig= 4 | CAD.provider= 5 | File.Version=6 6 | GPIO.groupedBy=Group By Peripherals 7 | KeepUserPlacement=false 8 | Mcu.CPN=STM32G071CBT3 9 | Mcu.Family=STM32G0 10 | Mcu.IP0=NVIC 11 | Mcu.IP1=RCC 12 | Mcu.IP2=SPI1 13 | Mcu.IP3=SYS 14 | Mcu.IP4=USART1 15 | Mcu.IPNb=5 16 | Mcu.Name=STM32G071C(6-8-B)Tx 17 | Mcu.Package=LQFP48 18 | Mcu.Pin0=PF2 - NRST 19 | Mcu.Pin1=PA9 20 | Mcu.Pin10=PB9 21 | Mcu.Pin11=VP_SYS_VS_Systick 22 | Mcu.Pin12=VP_SYS_VS_DBSignals 23 | Mcu.Pin2=PA13 24 | Mcu.Pin3=PA14-BOOT0 25 | Mcu.Pin4=PA15 26 | Mcu.Pin5=PD1 27 | Mcu.Pin6=PD2 28 | Mcu.Pin7=PB3 29 | Mcu.Pin8=PB4 30 | Mcu.Pin9=PB5 31 | Mcu.PinsNb=13 32 | Mcu.ThirdPartyNb=0 33 | Mcu.UserConstants= 34 | Mcu.UserName=STM32G071CBTx 35 | MxCube.Version=6.13.0 36 | MxDb.Version=DB.6.0.130 37 | NVIC.ForceEnableDMAVector=true 38 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 39 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 40 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 41 | NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true 42 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false 43 | PA13.Mode=Serial_Wire 44 | PA13.Signal=SYS_SWDIO 45 | PA14-BOOT0.Mode=Serial_Wire 46 | PA14-BOOT0.Signal=SYS_SWCLK 47 | PA15.GPIOParameters=GPIO_Speed,PinState,GPIO_Label 48 | PA15.GPIO_Label=CD_CS 49 | PA15.GPIO_Speed=GPIO_SPEED_FREQ_HIGH 50 | PA15.Locked=true 51 | PA15.PinState=GPIO_PIN_SET 52 | PA15.Signal=GPIO_Output 53 | PA9.GPIOParameters=GPIO_Speed,GPIO_ModeDefaultOD 54 | PA9.GPIO_ModeDefaultOD=GPIO_MODE_AF_PP 55 | PA9.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM 56 | PA9.Locked=true 57 | PA9.Mode=Half_duplex(single_wire_mode) 58 | PA9.Signal=USART1_TX 59 | PB3.GPIOParameters=GPIO_Speed 60 | PB3.GPIO_Speed=GPIO_SPEED_FREQ_HIGH 61 | PB3.Locked=true 62 | PB3.Mode=Full_Duplex_Master 63 | PB3.Signal=SPI1_SCK 64 | PB4.GPIOParameters=GPIO_Speed 65 | PB4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH 66 | PB4.Locked=true 67 | PB4.Mode=Full_Duplex_Master 68 | PB4.Signal=SPI1_MISO 69 | PB5.GPIOParameters=GPIO_Speed 70 | PB5.GPIO_Speed=GPIO_SPEED_FREQ_HIGH 71 | PB5.Locked=true 72 | PB5.Mode=Full_Duplex_Master 73 | PB5.Signal=SPI1_MOSI 74 | PB9.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP 75 | PB9.GPIO_Label=OLD_CD_RST 76 | PB9.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 77 | PB9.GPIO_PuPd=GPIO_NOPULL 78 | PB9.Locked=true 79 | PB9.PinState=GPIO_PIN_SET 80 | PB9.Signal=GPIO_Output 81 | PD1.GPIOParameters=GPIO_Label 82 | PD1.GPIO_Label=LED_G 83 | PD1.Locked=true 84 | PD1.Signal=GPIO_Output 85 | PD2.GPIOParameters=GPIO_Label 86 | PD2.GPIO_Label=LED_R 87 | PD2.Locked=true 88 | PD2.Signal=GPIO_Output 89 | PF2\ -\ NRST.GPIOParameters=GPIO_Speed 90 | PF2\ -\ NRST.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM 91 | PF2\ -\ NRST.Mode=Clock-out 92 | PF2\ -\ NRST.Signal=RCC_MCO 93 | PinOutPanel.RotationAngle=0 94 | ProjectManager.AskForMigrate=true 95 | ProjectManager.BackupPrevious=false 96 | ProjectManager.CompilerOptimize=6 97 | ProjectManager.ComputerToolchain=false 98 | ProjectManager.CoupleFile=false 99 | ProjectManager.CustomerFirmwarePackage= 100 | ProjectManager.DefaultFWLocation=true 101 | ProjectManager.DeletePrevious=true 102 | ProjectManager.DeviceId=STM32G071CBTx 103 | ProjectManager.FirmwarePackage=STM32Cube FW_G0 V1.6.2 104 | ProjectManager.FreePins=false 105 | ProjectManager.HalAssertFull=false 106 | ProjectManager.HeapSize=0x200 107 | ProjectManager.KeepUserCode=true 108 | ProjectManager.LastFirmware=true 109 | ProjectManager.LibraryCopy=1 110 | ProjectManager.MainLocation=Core/Src 111 | ProjectManager.NoMain=false 112 | ProjectManager.PreviousToolchain= 113 | ProjectManager.ProjectBuild=false 114 | ProjectManager.ProjectFileName=mdrv_bl.ioc 115 | ProjectManager.ProjectName=mdrv_bl 116 | ProjectManager.ProjectStructure= 117 | ProjectManager.RegisterCallBack= 118 | ProjectManager.StackSize=0x400 119 | ProjectManager.TargetToolchain=Makefile 120 | ProjectManager.ToolChainLocation= 121 | ProjectManager.UAScriptAfterPath= 122 | ProjectManager.UAScriptBeforePath= 123 | ProjectManager.UnderRoot=false 124 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_SPI1_Init-SPI1-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true 125 | RCC.ADCFreq_Value=64000000 126 | RCC.AHBFreq_Value=64000000 127 | RCC.APBFreq_Value=64000000 128 | RCC.APBTimFreq_Value=64000000 129 | RCC.CECFreq_Value=32786.88524590164 130 | RCC.CortexFreq_Value=64000000 131 | RCC.EXTERNAL_CLOCK_VALUE=48000 132 | RCC.FCLKCortexFreq_Value=64000000 133 | RCC.FamilyName=M 134 | RCC.HCLKFreq_Value=64000000 135 | RCC.HSE_VALUE=12000000 136 | RCC.HSI_VALUE=16000000 137 | RCC.I2C1Freq_Value=64000000 138 | RCC.I2S1Freq_Value=64000000 139 | RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APBFreq_Value,APBTimFreq_Value,CECFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2S1Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PWRFreq_Value,RCC_MCO1Source,RCC_MCODiv,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value 140 | RCC.LPTIM1Freq_Value=64000000 141 | RCC.LPTIM2Freq_Value=64000000 142 | RCC.LPUART1Freq_Value=64000000 143 | RCC.LSCOPinFreq_Value=32000 144 | RCC.LSE_VALUE=32768 145 | RCC.LSI_VALUE=32000 146 | RCC.MCO1PinFreq_Value=16000000 147 | RCC.PLLN=16 148 | RCC.PLLPoutputFreq_Value=128000000 149 | RCC.PLLQoutputFreq_Value=128000000 150 | RCC.PLLR=RCC_PLLR_DIV4 151 | RCC.PLLRCLKFreq_Value=64000000 152 | RCC.PWRFreq_Value=64000000 153 | RCC.RCC_MCO1Source=RCC_MCO1SOURCE_PLLCLK 154 | RCC.RCC_MCODiv=RCC_MCODIV_4 155 | RCC.SYSCLKFreq_VALUE=64000000 156 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 157 | RCC.TIM15Freq_Value=64000000 158 | RCC.TIM1Freq_Value=64000000 159 | RCC.USART1Freq_Value=64000000 160 | RCC.USART2Freq_Value=64000000 161 | RCC.VCOInputFreq_Value=16000000 162 | RCC.VCOOutputFreq_Value=256000000 163 | SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4 164 | SPI1.CalculateBaudRate=16.0 MBits/s 165 | SPI1.DataSize=SPI_DATASIZE_8BIT 166 | SPI1.Direction=SPI_DIRECTION_2LINES 167 | SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler 168 | SPI1.Mode=SPI_MODE_MASTER 169 | SPI1.VirtualType=VM_MASTER 170 | USART1.BaudRate=2000000 171 | USART1.IPParameters=VirtualMode-Half_duplex(single_wire_mode),BaudRate 172 | USART1.VirtualMode-Half_duplex(single_wire_mode)=VM_ASYNC 173 | VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals 174 | VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals 175 | VP_SYS_VS_Systick.Mode=SysTick 176 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 177 | board=custom 178 | -------------------------------------------------------------------------------- /mdrv_bl/stm32g071cbtx_flash.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | 5 | ** File : LinkerScript.ld 6 | ** 7 | ** Author : STM32CubeMX 8 | ** 9 | ** Abstract : Linker script for STM32G071CBTx series 10 | ** 128Kbytes FLASH and 36Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used. 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed “as is,” without any warranty 20 | ** of any kind. 21 | ** 22 | ***************************************************************************** 23 | ** @attention 24 | ** 25 | **

© COPYRIGHT(c) 2019 STMicroelectronics

26 | ** 27 | ** Redistribution and use in source and binary forms, with or without modification, 28 | ** are permitted provided that the following conditions are met: 29 | ** 1. Redistributions of source code must retain the above copyright notice, 30 | ** this list of conditions and the following disclaimer. 31 | ** 2. Redistributions in binary form must reproduce the above copyright notice, 32 | ** this list of conditions and the following disclaimer in the documentation 33 | ** and/or other materials provided with the distribution. 34 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | ** may be used to endorse or promote products derived from this software 36 | ** without specific prior written permission. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | ** 49 | ***************************************************************************** 50 | */ 51 | 52 | /* Entry Point */ 53 | ENTRY(Reset_Handler) 54 | 55 | /* Highest address of the user mode stack */ 56 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ 57 | /* Generate a link error if heap and stack don't fit into RAM */ 58 | _Min_Heap_Size = 0x200; /* required amount of heap */ 59 | _Min_Stack_Size = 0x400; /* required amount of stack */ 60 | 61 | /* Specify the memory areas */ 62 | MEMORY 63 | { 64 | RAM (xrw) : ORIGIN = 0x20000004, LENGTH = 36K - 4 65 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 24K /* 128k */ 66 | } 67 | 68 | /* Define output sections */ 69 | SECTIONS 70 | { 71 | /* The startup code goes first into FLASH */ 72 | .isr_vector : 73 | { 74 | . = ALIGN(4); 75 | KEEP(*(.isr_vector)) /* Startup code */ 76 | . = ALIGN(4); 77 | } >FLASH 78 | 79 | /* The program code and other data goes into FLASH */ 80 | .text : 81 | { 82 | . = ALIGN(4); 83 | *(.text) /* .text sections (code) */ 84 | *(.text*) /* .text* sections (code) */ 85 | *(.glue_7) /* glue arm to thumb code */ 86 | *(.glue_7t) /* glue thumb to arm code */ 87 | *(.eh_frame) 88 | 89 | KEEP (*(.init)) 90 | KEEP (*(.fini)) 91 | 92 | . = ALIGN(4); 93 | _etext = .; /* define a global symbols at end of code */ 94 | } >FLASH 95 | 96 | /* Constant data goes into FLASH */ 97 | .rodata : 98 | { 99 | . = ALIGN(4); 100 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 101 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 102 | . = ALIGN(4); 103 | } >FLASH 104 | 105 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 106 | .ARM : { 107 | __exidx_start = .; 108 | *(.ARM.exidx*) 109 | __exidx_end = .; 110 | } >FLASH 111 | 112 | .preinit_array : 113 | { 114 | PROVIDE_HIDDEN (__preinit_array_start = .); 115 | KEEP (*(.preinit_array*)) 116 | PROVIDE_HIDDEN (__preinit_array_end = .); 117 | } >FLASH 118 | .init_array : 119 | { 120 | PROVIDE_HIDDEN (__init_array_start = .); 121 | KEEP (*(SORT(.init_array.*))) 122 | KEEP (*(.init_array*)) 123 | PROVIDE_HIDDEN (__init_array_end = .); 124 | } >FLASH 125 | .fini_array : 126 | { 127 | PROVIDE_HIDDEN (__fini_array_start = .); 128 | KEEP (*(SORT(.fini_array.*))) 129 | KEEP (*(.fini_array*)) 130 | PROVIDE_HIDDEN (__fini_array_end = .); 131 | } >FLASH 132 | 133 | /* used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections goes into RAM, load LMA copy after code */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | } >RAM AT> FLASH 147 | 148 | 149 | /* Uninitialized data section */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss secion */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough RAM left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | 177 | 178 | /* Remove information from the standard libraries */ 179 | /DISCARD/ : 180 | { 181 | libc.a ( * ) 182 | libm.a ( * ) 183 | libgcc.a ( * ) 184 | } 185 | 186 | } 187 | 188 | 189 | -------------------------------------------------------------------------------- /mdrv_bl/usr/app_main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include "app_main.h" 11 | 12 | extern SPI_HandleTypeDef hspi1; 13 | extern UART_HandleTypeDef huart1; 14 | 15 | uint32_t *bl_args = (uint32_t *)BL_ARGS; 16 | 17 | gpio_t led_r = { .group = LED_R_GPIO_Port, .num = LED_R_Pin }; 18 | gpio_t led_g = { .group = LED_G_GPIO_Port, .num = LED_G_Pin }; 19 | 20 | uart_t debug_uart = { .huart = &huart1 }; 21 | 22 | static gpio_t r_cs = { .group = CD_CS_GPIO_Port, .num = CD_CS_Pin }; 23 | static spi_t r_spi = { .hspi = &hspi1, .ns_pin = &r_cs }; 24 | 25 | static cd_frame_t frame_alloc[FRAME_MAX]; 26 | list_head_t frame_free_head = {0}; 27 | 28 | static cdn_pkt_t packet_alloc[PACKET_MAX]; 29 | list_head_t packet_free_head = {0}; 30 | 31 | cdctl_dev_t r_dev = {0}; // CDBUS 32 | cdn_ns_t dft_ns = {0}; // CDNET 33 | 34 | 35 | static void device_init(void) 36 | { 37 | int i; 38 | cdn_init_ns(&dft_ns, &packet_free_head, &frame_free_head); 39 | 40 | for (i = 0; i < FRAME_MAX; i++) 41 | cd_list_put(&frame_free_head, &frame_alloc[i]); 42 | for (i = 0; i < PACKET_MAX; i++) 43 | cdn_list_put(&packet_free_head, &packet_alloc[i]); 44 | 45 | cdctl_dev_init(&r_dev, &frame_free_head, &csa.bus_cfg, &r_spi); 46 | if (!csa.keep_in_bl) { 47 | cdctl_set_baud_rate(&r_dev, 115200, 115200); 48 | cdctl_flush(&r_dev); 49 | } 50 | 51 | cdn_add_intf(&dft_ns, &r_dev.cd_dev, csa.bus_net, csa.bus_cfg.mac); 52 | } 53 | 54 | 55 | #define APP_ADDR 0x08006000 // offset: 24KB 56 | 57 | static void jump_to_app(void) 58 | { 59 | uint32_t stack = *(uint32_t*)APP_ADDR; 60 | uint32_t func = *(uint32_t*)(APP_ADDR + 4); 61 | 62 | gpio_set_val(&led_r, 0); 63 | gpio_set_val(&led_g, 0); 64 | printf("jump to app...\n"); 65 | while (!__HAL_UART_GET_FLAG(debug_uart.huart, UART_FLAG_TC)); 66 | HAL_UART_DeInit(debug_uart.huart); 67 | HAL_SPI_DeInit(r_spi.hspi); 68 | HAL_RCC_DeInit(); 69 | 70 | // NOTE: change app's SCB->VTOR in app's system_stm32fxxx.c 71 | //for(int i = 0; i < 256; i++) 72 | // HAL_NVIC_DisableIRQ(i); 73 | HAL_NVIC_DisableIRQ(SysTick_IRQn); 74 | __set_MSP(stack); // init stack pointer 75 | ((void(*)()) func)(); 76 | while (true); 77 | } 78 | 79 | 80 | void app_main(void) 81 | { 82 | printf("\nstart app_main (bl)...\n"); 83 | 84 | load_conf(); 85 | bool dbg_en_bk = csa.dbg_en; 86 | csa.keep_in_bl = *bl_args == 0xcdcd0001; 87 | if (!csa.keep_in_bl) 88 | csa.dbg_en = false; // silence 89 | delay_systick(50); 90 | device_init(); 91 | common_service_init(); 92 | printf("bl conf: %s, bl_args: %08lx\n", csa.conf_from ? "load from flash" : "use default", *bl_args); 93 | gpio_set_val(&led_g, 1); 94 | 95 | uint32_t t_last = get_systick(); 96 | bool update_baud = csa.keep_in_bl; 97 | 98 | while (true) { 99 | if (get_systick() - t_last > (update_baud ? 100000 : 200000) / CD_SYSTICK_US_DIV) { 100 | t_last = get_systick(); 101 | gpio_set_val(&led_g, !gpio_get_val(&led_g)); 102 | } 103 | 104 | if (!csa.keep_in_bl && !update_baud && get_systick() > 1000000 / CD_SYSTICK_US_DIV) { 105 | update_baud = true; 106 | if (csa.bus_cfg.baud_l != 115200 || csa.bus_cfg.baud_h != 115200) { 107 | cdctl_set_baud_rate(&r_dev, csa.bus_cfg.baud_l, csa.bus_cfg.baud_h); 108 | cdctl_flush(&r_dev); 109 | } 110 | csa.dbg_en = dbg_en_bk; 111 | } 112 | 113 | if (!csa.keep_in_bl && get_systick() > 2000000 / CD_SYSTICK_US_DIV) 114 | jump_to_app(); 115 | 116 | cdctl_routine(&r_dev); 117 | cdn_routine(&dft_ns); // handle cdnet 118 | common_service_routine(); 119 | } 120 | } 121 | 122 | -------------------------------------------------------------------------------- /mdrv_bl/usr/app_main.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #ifndef __APP_MAIN_H__ 11 | #define __APP_MAIN_H__ 12 | 13 | #include "cdnet_core.h" 14 | #include "cd_debug.h" 15 | #include "cdbus_uart.h" 16 | #include "cdctl.h" 17 | 18 | // printf float value without enable "-u _printf_float" 19 | // e.g.: printf("%d.%.2d\n", P_2F(2.14)); 20 | #define P_2F(x) (int)(x), abs(((x)-(int)(x))*100) // "%d.%.2d" 21 | #define P_3F(x) (int)(x), abs(((x)-(int)(x))*1000) // "%d.%.3d" 22 | 23 | 24 | #define BL_ARGS 0x20000000 // first word 25 | #define APP_CONF_ADDR 0x0801f800 // page 63, the last page 26 | #define APP_CONF_VER 0x0100 27 | 28 | #define FRAME_MAX 30 29 | #define PACKET_MAX 30 30 | 31 | 32 | typedef struct { 33 | uint16_t offset; 34 | uint16_t size; 35 | } regr_t; // reg range 36 | 37 | 38 | typedef struct { 39 | uint16_t magic_code; // 0xcdcd 40 | uint16_t conf_ver; 41 | uint8_t conf_from; // 0: default, 1: load from flash 42 | uint8_t do_reboot; 43 | bool keep_in_bl; 44 | bool save_conf; 45 | 46 | uint8_t bus_net; 47 | cdctl_cfg_t bus_cfg; 48 | bool dbg_en; 49 | 50 | uint8_t _keep[512]; // covers the areas in the app csa that need to be saved 51 | 52 | // end of flash 53 | uint8_t _end_save; 54 | 55 | } csa_t; // config status area 56 | 57 | extern csa_t csa; 58 | extern const csa_t csa_dft; 59 | 60 | extern cdctl_dev_t r_dev; 61 | extern list_head_t frame_free_head; 62 | 63 | int flash_erase(uint32_t addr, uint32_t len); 64 | int flash_write(uint32_t addr, uint32_t len, const uint8_t *buf); 65 | 66 | void app_main(void); 67 | void load_conf(void); 68 | int save_conf(void); 69 | 70 | void common_service_init(void); 71 | void common_service_routine(void); 72 | 73 | extern gpio_t led_r; 74 | extern gpio_t led_g; 75 | extern cdn_ns_t dft_ns; 76 | extern uint32_t *bl_args; 77 | 78 | #endif 79 | -------------------------------------------------------------------------------- /mdrv_bl/usr/cd_config.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (MIT License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #ifndef __CD_CONFIG_H__ 11 | #define __CD_CONFIG_H__ 12 | 13 | #define CDCTL_OSC_CLK 16000000UL // 16MHz 14 | 15 | #define CD_ARCH_SPI 16 | 17 | #define CD_DEBUG 18 | //#define CD_VERBOSE 19 | //#define CD_LIST_DEBUG 20 | 21 | #define CD_LIST_IT 22 | //#define CD_IRQ_SAFE 23 | //#define CDN_IRQ_SAFE 24 | 25 | #include "main.h" // generated by stm32cube 26 | #include "debug_config.h" 27 | 28 | #endif 29 | -------------------------------------------------------------------------------- /mdrv_bl/usr/common_services.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include "app_main.h" 11 | #include 12 | 13 | static char cpu_id[25]; 14 | static char info_str[100]; 15 | 16 | static cdn_sock_t sock1 = { .port = 1, .ns = &dft_ns }; 17 | static cdn_sock_t sock5 = { .port = 5, .ns = &dft_ns }; 18 | static cdn_sock_t sock8 = { .port = 8, .ns = &dft_ns }; 19 | 20 | 21 | static void get_uid(char *buf) 22 | { 23 | const char tlb[] = "0123456789abcdef"; 24 | int i; 25 | 26 | for (i = 0; i < 12; i++) { 27 | uint8_t val = *((char *)UID_BASE + i); 28 | buf[i * 2 + 0] = tlb[val >> 4]; 29 | buf[i * 2 + 1] = tlb[val & 0xf]; 30 | } 31 | buf[24] = '\0'; 32 | } 33 | 34 | static void init_info_str(void) 35 | { 36 | // M: model; S: serial string; HW: hardware version; SW: software version 37 | get_uid(cpu_id); 38 | sprintf(info_str, "M: cdstep (bl); S: %s; SW: %s", cpu_id, SW_VER); 39 | d_info("info: %s\n", info_str); 40 | } 41 | 42 | 43 | // device info 44 | static void p1_service_routine(void) 45 | { 46 | cdn_pkt_t *pkt = cdn_sock_recvfrom(&sock1); 47 | if (!pkt) 48 | return; 49 | pkt->dst = pkt->src; 50 | cdn_pkt_prepare(&sock1, pkt); 51 | 52 | if (pkt->len == 0) { 53 | strcpy((char *)pkt->dat, info_str); 54 | pkt->len = strlen(info_str); 55 | cdn_sock_sendto(&sock1, pkt); 56 | return; 57 | } 58 | d_debug("p1 ser: ignore\n"); 59 | cdn_pkt_free(&dft_ns, pkt); 60 | } 61 | 62 | 63 | // csa manipulation 64 | static void p5_service_routine(void) 65 | { 66 | // read: 0x00, offset_16, len_8 | return [0x00, data] 67 | // read_dft: 0x01, offset_16, len_8 | return [0x00, data] 68 | // write: 0x20, offset_16 + [data] | return [0x00] on success 69 | 70 | cdn_pkt_t *pkt = cdn_sock_recvfrom(&sock5); 71 | if (!pkt) 72 | return; 73 | uint8_t *rx_dat = pkt->dat; 74 | bool reply = !(rx_dat[0] & 0x80); 75 | rx_dat[0] &= ~0x80; 76 | pkt->dst = pkt->src; 77 | cdn_pkt_prepare(&sock5, pkt); 78 | 79 | if (rx_dat[0] == 0x00 && pkt->len == 4) { 80 | uint16_t offset = get_unaligned16(rx_dat + 1); 81 | uint8_t len = min(rx_dat[3], CDN_MAX_DAT - 1); 82 | 83 | memcpy(pkt->dat + 1, ((void *) &csa) + offset, len); 84 | 85 | d_debug("csa read: %04x %d\n", offset, len); 86 | pkt->dat[0] = 0; 87 | pkt->len = len + 1; 88 | 89 | } else if (rx_dat[0] == 0x20 && pkt->len > 3) { 90 | uint16_t offset = get_unaligned16(rx_dat + 1); 91 | uint8_t len = pkt->len - 3; 92 | uint8_t *src_dat = rx_dat + 3; 93 | 94 | uint16_t start = clip(offset, 0, sizeof(csa_t)); 95 | uint16_t end = clip(offset + len, 0, sizeof(csa_t)); 96 | if (start != end) 97 | memcpy(((void *) &csa) + start, src_dat + (start - offset), end - start); 98 | 99 | d_debug("csa write: %04x %d\n", offset, len); 100 | pkt->len = 1; 101 | pkt->dat[0] = 0; 102 | 103 | } else if (rx_dat[0] == 0x01 && pkt->len == 4) { 104 | uint16_t offset = get_unaligned16(rx_dat + 1); 105 | uint8_t len = min(rx_dat[3], CDN_MAX_DAT - 1); 106 | memcpy(pkt->dat + 1, ((void *) &csa_dft) + offset, len); 107 | //d_debug("csa read_dft: %04x %d\n", offset, len); 108 | pkt->dat[0] = 0; 109 | pkt->len = len + 1; 110 | 111 | } else { 112 | d_warn("csa: wrong cmd, len: %d\n", pkt->len); 113 | cdn_pkt_free(&dft_ns, pkt); 114 | return; 115 | } 116 | 117 | if (reply) 118 | cdn_sock_sendto(&sock5, pkt); 119 | else 120 | cdn_pkt_free(&dft_ns, pkt); 121 | } 122 | 123 | 124 | // flash memory manipulation 125 | static void p8_service_routine(void) 126 | { 127 | // erase: 0x2f, addr_32, len_32 | return [0x00] on success 128 | // write: 0x20, addr_32 + [data] | return [0x00] on success 129 | // read: 0x00, addr_32, len_8 | return [0x00, data] 130 | // cal crc: 0x10, addr_32, len_32 | return [0x00, crc_16] 131 | 132 | cdn_pkt_t *pkt = cdn_sock_recvfrom(&sock8); 133 | if (!pkt) 134 | return; 135 | uint8_t *rx_dat = pkt->dat; 136 | bool reply = !(rx_dat[0] & 0x80); 137 | rx_dat[0] &= ~0x80; 138 | pkt->dst = pkt->src; 139 | cdn_pkt_prepare(&sock8, pkt); 140 | 141 | if (rx_dat[0] == 0x2f && pkt->len == 9) { 142 | uint32_t addr = get_unaligned32(rx_dat + 1); 143 | uint32_t len = get_unaligned32(rx_dat + 5); 144 | int ret = flash_erase(addr, len); 145 | pkt->len = 1; 146 | pkt->dat[0] = ret == HAL_OK ? 0 : 1; 147 | 148 | } else if (rx_dat[0] == 0x00 && pkt->len == 6) { 149 | uint8_t *src_dat = (uint8_t *) get_unaligned32(rx_dat + 1); 150 | uint8_t len = min(rx_dat[5], CDN_MAX_DAT - 1); 151 | memcpy(pkt->dat + 1, src_dat, len); 152 | d_verbose("nvm read: %08x %d\n", src_dat, len); 153 | pkt->dat[0] = 0; 154 | pkt->len = len + 1; 155 | 156 | } else if (rx_dat[0] == 0x20 && pkt->len > 5) { 157 | uint32_t addr = get_unaligned32(rx_dat + 1); 158 | uint8_t len = pkt->len - 5; 159 | int ret = flash_write(addr, len, rx_dat + 5); 160 | pkt->len = 1; 161 | pkt->dat[0] = ret == HAL_OK ? 0 : 1; 162 | #if 0 163 | } else if (rx_dat[0] == 0x10 && pkt->len == 9) { 164 | uint32_t f_addr = get_unaligned32(rx_dat + 1); 165 | uint32_t f_len = get_unaligned32(rx_dat + 5); 166 | uint16_t crc = crc16((const uint8_t *)f_addr, f_len); 167 | 168 | d_debug("nvm crc addr: %x, len: %x, crc: %02x", f_addr, f_len, crc); 169 | put_unaligned16(crc, pkt->dat + 1); 170 | pkt->dat[0] = 0; 171 | pkt->len = 3; 172 | #endif 173 | } else { 174 | d_warn("nvm: wrong cmd, len: %d\n", pkt->len); 175 | cdn_pkt_free(&dft_ns, pkt); 176 | return; 177 | } 178 | 179 | if (reply) 180 | cdn_sock_sendto(&sock8, pkt); 181 | else 182 | cdn_pkt_free(&dft_ns, pkt); 183 | } 184 | 185 | 186 | void common_service_init(void) 187 | { 188 | cdn_sock_bind(&sock8); 189 | cdn_sock_bind(&sock5); 190 | cdn_sock_bind(&sock1); 191 | init_info_str(); 192 | } 193 | 194 | void common_service_routine(void) 195 | { 196 | if (csa.save_conf) { 197 | csa.save_conf = false; 198 | save_conf(); 199 | } 200 | if (csa.do_reboot) { 201 | *bl_args = 0xcdcd0000 | csa.do_reboot; 202 | NVIC_SystemReset(); 203 | } 204 | 205 | p1_service_routine(); 206 | p5_service_routine(); 207 | p8_service_routine(); 208 | } 209 | 210 | 211 | // for printf 212 | int _write(int file, char *data, int len) 213 | { 214 | if (csa.dbg_en) { 215 | cd_frame_t *frm = cd_list_get(&frame_free_head); 216 | if (frm) { 217 | len = min(CDN_MAX_DAT - 2, len); 218 | frm->dat[0] = csa.bus_cfg.mac; 219 | frm->dat[1] = 0x0; 220 | frm->dat[2] = 2 + len; 221 | frm->dat[3] = 64; 222 | frm->dat[4] = 9; 223 | memcpy(frm->dat + 5, data, len); 224 | cdctl_put_tx_frame(&r_dev.cd_dev, frm); 225 | //return len; 226 | } 227 | } 228 | 229 | arch_dbg_tx((uint8_t *)data, len); 230 | return len; 231 | } 232 | -------------------------------------------------------------------------------- /mdrv_bl/usr/config.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include "app_main.h" 11 | 12 | const csa_t csa_dft = { 13 | .magic_code = 0xcdcd, 14 | .conf_ver = APP_CONF_VER, 15 | 16 | .bus_net = 0, 17 | .bus_cfg = CDCTL_CFG_DFT(0xfe), 18 | .dbg_en = false 19 | }; 20 | 21 | csa_t csa; 22 | 23 | 24 | void load_conf(void) 25 | { 26 | uint16_t magic_code = *(uint16_t *)APP_CONF_ADDR; 27 | uint16_t conf_ver = *(uint16_t *)(APP_CONF_ADDR + 2); 28 | csa = csa_dft; 29 | 30 | if (magic_code == 0xcdcd && (conf_ver >> 8) == (APP_CONF_VER >> 8)) { 31 | memcpy(&csa, (void *)APP_CONF_ADDR, offsetof(csa_t, _end_save)); 32 | csa.conf_from = 1; 33 | memset(&csa.do_reboot, 0, 3); 34 | } 35 | } 36 | 37 | int save_conf(void) 38 | { 39 | uint8_t ret = flash_erase(APP_CONF_ADDR, 2048); 40 | if (ret != HAL_OK) 41 | d_info("conf: failed to erase flash\n"); 42 | ret = flash_write(APP_CONF_ADDR, offsetof(csa_t, _end_save), (uint8_t *)&csa); 43 | 44 | if (ret == HAL_OK) { 45 | d_info("conf: save to flash successed, size: %d\n", offsetof(csa_t, _end_save)); 46 | return 0; 47 | } else { 48 | d_error("conf: save to flash error\n"); 49 | return 1; 50 | } 51 | } 52 | 53 | 54 | int flash_erase(uint32_t addr, uint32_t len) 55 | { 56 | int ret = -1; 57 | uint32_t err_sector = 0xffffffff; 58 | FLASH_EraseInitTypeDef f; 59 | 60 | uint32_t ofs = addr & ~0x08000000; 61 | f.TypeErase = FLASH_TYPEERASE_PAGES; 62 | f.Banks = FLASH_BANK_1; 63 | f.Page = ofs / 2048; 64 | f.NbPages = (ofs + len) / 2048 - f.Page; 65 | if ((ofs + len) % 2048) 66 | f.NbPages++; 67 | 68 | ret = HAL_FLASH_Unlock(); 69 | if (ret == HAL_OK) 70 | ret = HAL_FLASHEx_Erase(&f, &err_sector); 71 | ret |= HAL_FLASH_Lock(); 72 | d_debug("nvm erase: %08lx +%08lx (%ld %ld), %08lx, ret: %d\n", addr, len, f.Page, f.NbPages, err_sector, ret); 73 | return ret; 74 | } 75 | 76 | int flash_write(uint32_t addr, uint32_t len, const uint8_t *buf) 77 | { 78 | int ret = -1; 79 | 80 | uint64_t *dst_dat = (uint64_t *) addr; 81 | int cnt = (len + 7) / 8; 82 | uint64_t *src_dat = (uint64_t *)buf; 83 | 84 | ret = HAL_FLASH_Unlock(); 85 | for (int i = 0; ret == HAL_OK && i < cnt; i++) { 86 | uint64_t dat = get_unaligned32((uint8_t *)(src_dat + i)); 87 | dat |= (uint64_t)get_unaligned32((uint8_t *)(src_dat + i) + 4) << 32; 88 | ret = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, (uint32_t)(dst_dat + i), dat); 89 | } 90 | ret |= HAL_FLASH_Lock(); 91 | 92 | d_verbose("nvm write: %08x %d(%d), ret: %d\n", dst_dat, len, cnt, ret); 93 | return ret; 94 | } 95 | -------------------------------------------------------------------------------- /mdrv_bl/usr/debug_config.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (MIT License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #ifndef __DEBUG_CONFIG_H__ 11 | #define __DEBUG_CONFIG_H__ 12 | 13 | #include "arch_wrapper.h" 14 | 15 | #define DBG_UART USART1 16 | 17 | 18 | static inline void arch_dbg_tx(const uint8_t *buf, uint16_t len) 19 | { 20 | for (uint16_t i = 0; i < len; i++) { 21 | while (!(DBG_UART->ISR & UART_FLAG_TXE)); // UART_FLAG_TXFE 22 | DBG_UART->TDR = *buf++; 23 | } 24 | } 25 | 26 | #endif 27 | -------------------------------------------------------------------------------- /mdrv_fw/.gitignore: -------------------------------------------------------------------------------- 1 | # 2 | # NOTE! Don't add files that are generated in specific 3 | # subdirectories here. Add them in the ".gitignore" file 4 | # in that subdirectory instead. 5 | # 6 | # NOTE! Please use 'git ls-files -i --exclude-standard' 7 | # command after changing this file, to see if there are 8 | # any tracked files which get ignored after the change. 9 | # 10 | # Normal rules 11 | # 12 | .* 13 | *.log 14 | 15 | build/ 16 | mx.scratch 17 | .mxproject 18 | 19 | # 20 | # git files that we don't want to ignore even it they are dot-files 21 | # 22 | !.gitignore 23 | !.gitkeep 24 | !.mailmap 25 | 26 | *.orig 27 | *~ 28 | \#*# 29 | 30 | -------------------------------------------------------------------------------- /mdrv_fw/Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.h 5 | * @brief : Header for main.c file. 6 | * This file contains the common defines of the application. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2024 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __MAIN_H 23 | #define __MAIN_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32g0xx_hal.h" 31 | 32 | /* Private includes ----------------------------------------------------------*/ 33 | /* USER CODE BEGIN Includes */ 34 | 35 | /* USER CODE END Includes */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* USER CODE BEGIN ET */ 39 | 40 | /* USER CODE END ET */ 41 | 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* USER CODE BEGIN EC */ 44 | 45 | /* USER CODE END EC */ 46 | 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* USER CODE BEGIN EM */ 49 | 50 | /* USER CODE END EM */ 51 | 52 | void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); 53 | 54 | /* Exported functions prototypes ---------------------------------------------*/ 55 | void Error_Handler(void); 56 | 57 | /* USER CODE BEGIN EFP */ 58 | 59 | /* USER CODE END EFP */ 60 | 61 | /* Private defines -----------------------------------------------------------*/ 62 | #define DRV_DIR_Pin GPIO_PIN_7 63 | #define DRV_DIR_GPIO_Port GPIOA 64 | #define DRV_MD3_Pin GPIO_PIN_0 65 | #define DRV_MD3_GPIO_Port GPIOB 66 | #define DRV_MD2_Pin GPIO_PIN_1 67 | #define DRV_MD2_GPIO_Port GPIOB 68 | #define DRV_MD1_Pin GPIO_PIN_2 69 | #define DRV_MD1_GPIO_Port GPIOB 70 | #define DRV_EN_Pin GPIO_PIN_10 71 | #define DRV_EN_GPIO_Port GPIOB 72 | #define DRV_MO_Pin GPIO_PIN_11 73 | #define DRV_MO_GPIO_Port GPIOB 74 | #define SEN_INT_Pin GPIO_PIN_12 75 | #define SEN_INT_GPIO_Port GPIOB 76 | #define SEN_SCK_Pin GPIO_PIN_13 77 | #define SEN_SCK_GPIO_Port GPIOB 78 | #define SEN_SDO_Pin GPIO_PIN_14 79 | #define SEN_SDO_GPIO_Port GPIOB 80 | #define CD_CS_Pin GPIO_PIN_15 81 | #define CD_CS_GPIO_Port GPIOA 82 | #define LED_G_Pin GPIO_PIN_1 83 | #define LED_G_GPIO_Port GPIOD 84 | #define LED_R_Pin GPIO_PIN_2 85 | #define LED_R_GPIO_Port GPIOD 86 | #define CD_INT_Pin GPIO_PIN_3 87 | #define CD_INT_GPIO_Port GPIOD 88 | 89 | /* USER CODE BEGIN Private defines */ 90 | 91 | /* USER CODE END Private defines */ 92 | 93 | #ifdef __cplusplus 94 | } 95 | #endif 96 | 97 | #endif /* __MAIN_H */ 98 | -------------------------------------------------------------------------------- /mdrv_fw/Core/Inc/stm32g0xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32g0xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2024 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32G0xx_IT_H 22 | #define __STM32G0xx_IT_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Private includes ----------------------------------------------------------*/ 29 | /* USER CODE BEGIN Includes */ 30 | 31 | /* USER CODE END Includes */ 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN ET */ 35 | 36 | /* USER CODE END ET */ 37 | 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* USER CODE BEGIN EC */ 40 | 41 | /* USER CODE END EC */ 42 | 43 | /* Exported macro ------------------------------------------------------------*/ 44 | /* USER CODE BEGIN EM */ 45 | 46 | /* USER CODE END EM */ 47 | 48 | /* Exported functions prototypes ---------------------------------------------*/ 49 | void NMI_Handler(void); 50 | void HardFault_Handler(void); 51 | void SVC_Handler(void); 52 | void PendSV_Handler(void); 53 | void SysTick_Handler(void); 54 | /* USER CODE BEGIN EFP */ 55 | 56 | /* USER CODE END EFP */ 57 | 58 | #ifdef __cplusplus 59 | } 60 | #endif 61 | 62 | #endif /* __STM32G0xx_IT_H */ 63 | -------------------------------------------------------------------------------- /mdrv_fw/Core/Src/stm32g0xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32g0xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2024 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "main.h" 22 | #include "stm32g0xx_it.h" 23 | /* Private includes ----------------------------------------------------------*/ 24 | /* USER CODE BEGIN Includes */ 25 | #include "app_main.h" 26 | /* USER CODE END Includes */ 27 | 28 | /* Private typedef -----------------------------------------------------------*/ 29 | /* USER CODE BEGIN TD */ 30 | 31 | /* USER CODE END TD */ 32 | 33 | /* Private define ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN PD */ 35 | 36 | /* USER CODE END PD */ 37 | 38 | /* Private macro -------------------------------------------------------------*/ 39 | /* USER CODE BEGIN PM */ 40 | 41 | /* USER CODE END PM */ 42 | 43 | /* Private variables ---------------------------------------------------------*/ 44 | /* USER CODE BEGIN PV */ 45 | 46 | /* USER CODE END PV */ 47 | 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* USER CODE BEGIN PFP */ 50 | 51 | /* USER CODE END PFP */ 52 | 53 | /* Private user code ---------------------------------------------------------*/ 54 | /* USER CODE BEGIN 0 */ 55 | 56 | /* USER CODE END 0 */ 57 | 58 | /* External variables --------------------------------------------------------*/ 59 | 60 | /* USER CODE BEGIN EV */ 61 | 62 | /* USER CODE END EV */ 63 | 64 | /******************************************************************************/ 65 | /* Cortex-M0+ Processor Interruption and Exception Handlers */ 66 | /******************************************************************************/ 67 | /** 68 | * @brief This function handles Non maskable interrupt. 69 | */ 70 | void NMI_Handler(void) 71 | { 72 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 73 | printf("NMI_Handler\n"); 74 | 75 | /* USER CODE END NonMaskableInt_IRQn 0 */ 76 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 77 | while (1) 78 | { 79 | } 80 | /* USER CODE END NonMaskableInt_IRQn 1 */ 81 | } 82 | 83 | /** 84 | * @brief This function handles Hard fault interrupt. 85 | */ 86 | void HardFault_Handler(void) 87 | { 88 | /* USER CODE BEGIN HardFault_IRQn 0 */ 89 | printf("HardFault_Handler\n"); 90 | 91 | /* USER CODE END HardFault_IRQn 0 */ 92 | while (1) 93 | { 94 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 95 | /* USER CODE END W1_HardFault_IRQn 0 */ 96 | } 97 | } 98 | 99 | /** 100 | * @brief This function handles System service call via SWI instruction. 101 | */ 102 | void SVC_Handler(void) 103 | { 104 | /* USER CODE BEGIN SVC_IRQn 0 */ 105 | 106 | /* USER CODE END SVC_IRQn 0 */ 107 | /* USER CODE BEGIN SVC_IRQn 1 */ 108 | 109 | /* USER CODE END SVC_IRQn 1 */ 110 | } 111 | 112 | /** 113 | * @brief This function handles Pendable request for system service. 114 | */ 115 | void PendSV_Handler(void) 116 | { 117 | /* USER CODE BEGIN PendSV_IRQn 0 */ 118 | 119 | /* USER CODE END PendSV_IRQn 0 */ 120 | /* USER CODE BEGIN PendSV_IRQn 1 */ 121 | 122 | /* USER CODE END PendSV_IRQn 1 */ 123 | } 124 | 125 | /** 126 | * @brief This function handles System tick timer. 127 | */ 128 | void SysTick_Handler(void) 129 | { 130 | /* USER CODE BEGIN SysTick_IRQn 0 */ 131 | 132 | /* USER CODE END SysTick_IRQn 0 */ 133 | HAL_IncTick(); 134 | /* USER CODE BEGIN SysTick_IRQn 1 */ 135 | 136 | /* USER CODE END SysTick_IRQn 1 */ 137 | } 138 | 139 | /******************************************************************************/ 140 | /* STM32G0xx Peripheral Interrupt Handlers */ 141 | /* Add here the Interrupt Handlers for the used peripherals. */ 142 | /* For the available peripheral interrupt handler names, */ 143 | /* please refer to the startup file (startup_stm32g0xx.s). */ 144 | /******************************************************************************/ 145 | 146 | /* USER CODE BEGIN 1 */ 147 | 148 | /* USER CODE END 1 */ 149 | -------------------------------------------------------------------------------- /mdrv_fw/Core/Src/syscalls.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file syscalls.c 4 | * @author Auto-generated by STM32CubeMX 5 | * @brief Minimal System calls file 6 | * 7 | * For more information about which c-functions 8 | * need which of these lowlevel functions 9 | * please consult the Newlib libc-manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2020-2024 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | 34 | /* Variables */ 35 | extern int __io_putchar(int ch) __attribute__((weak)); 36 | extern int __io_getchar(void) __attribute__((weak)); 37 | 38 | 39 | char *__env[1] = { 0 }; 40 | char **environ = __env; 41 | 42 | 43 | /* Functions */ 44 | void initialise_monitor_handles() 45 | { 46 | } 47 | 48 | int _getpid(void) 49 | { 50 | return 1; 51 | } 52 | 53 | int _kill(int pid, int sig) 54 | { 55 | (void)pid; 56 | (void)sig; 57 | errno = EINVAL; 58 | return -1; 59 | } 60 | 61 | void _exit (int status) 62 | { 63 | _kill(status, -1); 64 | while (1) {} /* Make sure we hang here */ 65 | } 66 | 67 | __attribute__((weak)) int _read(int file, char *ptr, int len) 68 | { 69 | (void)file; 70 | int DataIdx; 71 | 72 | for (DataIdx = 0; DataIdx < len; DataIdx++) 73 | { 74 | *ptr++ = __io_getchar(); 75 | } 76 | 77 | return len; 78 | } 79 | 80 | __attribute__((weak)) int _write(int file, char *ptr, int len) 81 | { 82 | (void)file; 83 | int DataIdx; 84 | 85 | for (DataIdx = 0; DataIdx < len; DataIdx++) 86 | { 87 | __io_putchar(*ptr++); 88 | } 89 | return len; 90 | } 91 | 92 | int _close(int file) 93 | { 94 | (void)file; 95 | return -1; 96 | } 97 | 98 | 99 | int _fstat(int file, struct stat *st) 100 | { 101 | (void)file; 102 | st->st_mode = S_IFCHR; 103 | return 0; 104 | } 105 | 106 | int _isatty(int file) 107 | { 108 | (void)file; 109 | return 1; 110 | } 111 | 112 | int _lseek(int file, int ptr, int dir) 113 | { 114 | (void)file; 115 | (void)ptr; 116 | (void)dir; 117 | return 0; 118 | } 119 | 120 | int _open(char *path, int flags, ...) 121 | { 122 | (void)path; 123 | (void)flags; 124 | /* Pretend like we always fail */ 125 | return -1; 126 | } 127 | 128 | int _wait(int *status) 129 | { 130 | (void)status; 131 | errno = ECHILD; 132 | return -1; 133 | } 134 | 135 | int _unlink(char *name) 136 | { 137 | (void)name; 138 | errno = ENOENT; 139 | return -1; 140 | } 141 | 142 | int _times(struct tms *buf) 143 | { 144 | (void)buf; 145 | return -1; 146 | } 147 | 148 | int _stat(char *file, struct stat *st) 149 | { 150 | (void)file; 151 | st->st_mode = S_IFCHR; 152 | return 0; 153 | } 154 | 155 | int _link(char *old, char *new) 156 | { 157 | (void)old; 158 | (void)new; 159 | errno = EMLINK; 160 | return -1; 161 | } 162 | 163 | int _fork(void) 164 | { 165 | errno = EAGAIN; 166 | return -1; 167 | } 168 | 169 | int _execve(char *name, char **argv, char **env) 170 | { 171 | (void)name; 172 | (void)argv; 173 | (void)env; 174 | errno = ENOMEM; 175 | return -1; 176 | } 177 | -------------------------------------------------------------------------------- /mdrv_fw/Core/Src/sysmem.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sysmem.c 4 | * @author Generated by STM32CubeMX 5 | * @brief System Memory calls file 6 | * 7 | * For more information about which C functions 8 | * need which of these lowlevel functions 9 | * please consult the newlib libc manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2024 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | 27 | /** 28 | * Pointer to the current high watermark of the heap usage 29 | */ 30 | static uint8_t *__sbrk_heap_end = NULL; 31 | 32 | /** 33 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc 34 | * and others from the C library 35 | * 36 | * @verbatim 37 | * ############################################################################ 38 | * # .data # .bss # newlib heap # MSP stack # 39 | * # # # # Reserved by _Min_Stack_Size # 40 | * ############################################################################ 41 | * ^-- RAM start ^-- _end _estack, RAM end --^ 42 | * @endverbatim 43 | * 44 | * This implementation starts allocating at the '_end' linker symbol 45 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack 46 | * The implementation considers '_estack' linker symbol to be RAM end 47 | * NOTE: If the MSP stack, at any point during execution, grows larger than the 48 | * reserved size, please increase the '_Min_Stack_Size'. 49 | * 50 | * @param incr Memory size 51 | * @return Pointer to allocated memory 52 | */ 53 | void *_sbrk(ptrdiff_t incr) 54 | { 55 | extern uint8_t _end; /* Symbol defined in the linker script */ 56 | extern uint8_t _estack; /* Symbol defined in the linker script */ 57 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ 58 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 59 | const uint8_t *max_heap = (uint8_t *)stack_limit; 60 | uint8_t *prev_heap_end; 61 | 62 | /* Initialize heap end at first call */ 63 | if (NULL == __sbrk_heap_end) 64 | { 65 | __sbrk_heap_end = &_end; 66 | } 67 | 68 | /* Protect heap from growing into the reserved MSP stack */ 69 | if (__sbrk_heap_end + incr > max_heap) 70 | { 71 | errno = ENOMEM; 72 | return (void *)-1; 73 | } 74 | 75 | prev_heap_end = __sbrk_heap_end; 76 | __sbrk_heap_end += incr; 77 | 78 | return (void *)prev_heap_end; 79 | } 80 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS STM32G0xx Device Peripheral Access Layer Header File. 6 | * 7 | * The file is the unique include file that the application programmer 8 | * is using in the C source code, usually in main.c. This file contains: 9 | * - Configuration section that allows to select: 10 | * - The STM32G0xx device used in the target application 11 | * - To use or not the peripherals drivers in application code(i.e. 12 | * code will be based on direct access to peripherals registers 13 | * rather than drivers API), this option is controlled by 14 | * "#define USE_HAL_DRIVER" 15 | * 16 | ****************************************************************************** 17 | * @attention 18 | * 19 | * Copyright (c) 2018-2021 STMicroelectronics. 20 | * All rights reserved. 21 | * 22 | * This software is licensed under terms that can be found in the LICENSE file 23 | * in the root directory of this software component. 24 | * If no LICENSE file comes with this software, it is provided AS-IS. 25 | * 26 | ****************************************************************************** 27 | */ 28 | /** @addtogroup CMSIS 29 | * @{ 30 | */ 31 | 32 | /** @addtogroup stm32g0xx 33 | * @{ 34 | */ 35 | 36 | #ifndef STM32G0xx_H 37 | #define STM32G0xx_H 38 | 39 | #ifdef __cplusplus 40 | extern "C" { 41 | #endif /* __cplusplus */ 42 | 43 | /** @addtogroup Library_configuration_section 44 | * @{ 45 | */ 46 | 47 | /** 48 | * @brief STM32 Family 49 | */ 50 | #if !defined (STM32G0) 51 | #define STM32G0 52 | #endif /* STM32G0 */ 53 | 54 | /* Uncomment the line below according to the target STM32G0 device used in your 55 | application 56 | */ 57 | 58 | #if !defined (STM32G071xx) && !defined (STM32G081xx) && !defined (STM32G070xx) \ 59 | && !defined (STM32G030xx) && !defined (STM32G031xx) && !defined (STM32G041xx) \ 60 | && !defined (STM32G0B0xx) && !defined (STM32G0B1xx) && !defined (STM32G0C1xx) \ 61 | && !defined (STM32G050xx) && !defined (STM32G051xx) && !defined (STM32G061xx) 62 | /* #define STM32G0B0xx */ /*!< STM32G0B0xx Devices */ 63 | /* #define STM32G0B1xx */ /*!< STM32G0B1xx Devices */ 64 | /* #define STM32G0C1xx */ /*!< STM32G0C1xx Devices */ 65 | /* #define STM32G070xx */ /*!< STM32G070xx Devices */ 66 | /* #define STM32G071xx */ /*!< STM32G071xx Devices */ 67 | /* #define STM32G081xx */ /*!< STM32G081xx Devices */ 68 | /* #define STM32G050xx */ /*!< STM32G050xx Devices */ 69 | /* #define STM32G051xx */ /*!< STM32G051xx Devices */ 70 | /* #define STM32G061xx */ /*!< STM32G061xx Devices */ 71 | /* #define STM32G030xx */ /*!< STM32G030xx Devices */ 72 | /* #define STM32G031xx */ /*!< STM32G031xx Devices */ 73 | /* #define STM32G041xx */ /*!< STM32G041xx Devices */ 74 | #endif 75 | 76 | /* Tip: To avoid modifying this file each time you need to switch between these 77 | devices, you can define the device in your toolchain compiler preprocessor. 78 | */ 79 | #if !defined (USE_HAL_DRIVER) 80 | /** 81 | * @brief Comment the line below if you will not use the peripherals drivers. 82 | In this case, these drivers will not be included and the application code will 83 | be based on direct access to peripherals registers 84 | */ 85 | /*#define USE_HAL_DRIVER */ 86 | #endif /* USE_HAL_DRIVER */ 87 | 88 | /** 89 | * @brief CMSIS Device version number $VERSION$ 90 | */ 91 | #define __STM32G0_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */ 92 | #define __STM32G0_CMSIS_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */ 93 | #define __STM32G0_CMSIS_VERSION_SUB2 (0x04U) /*!< [15:8] sub2 version */ 94 | #define __STM32G0_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ 95 | #define __STM32G0_CMSIS_VERSION ((__STM32G0_CMSIS_VERSION_MAIN << 24)\ 96 | |(__STM32G0_CMSIS_VERSION_SUB1 << 16)\ 97 | |(__STM32G0_CMSIS_VERSION_SUB2 << 8 )\ 98 | |(__STM32G0_CMSIS_VERSION_RC)) 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @addtogroup Device_Included 105 | * @{ 106 | */ 107 | 108 | #if defined(STM32G0B1xx) 109 | #include "stm32g0b1xx.h" 110 | #elif defined(STM32G0C1xx) 111 | #include "stm32g0c1xx.h" 112 | #elif defined(STM32G0B0xx) 113 | #include "stm32g0b0xx.h" 114 | #elif defined(STM32G071xx) 115 | #include "stm32g071xx.h" 116 | #elif defined(STM32G081xx) 117 | #include "stm32g081xx.h" 118 | #elif defined(STM32G070xx) 119 | #include "stm32g070xx.h" 120 | #elif defined(STM32G031xx) 121 | #include "stm32g031xx.h" 122 | #elif defined(STM32G041xx) 123 | #include "stm32g041xx.h" 124 | #elif defined(STM32G030xx) 125 | #include "stm32g030xx.h" 126 | #elif defined(STM32G051xx) 127 | #include "stm32g051xx.h" 128 | #elif defined(STM32G061xx) 129 | #include "stm32g061xx.h" 130 | #elif defined(STM32G050xx) 131 | #include "stm32g050xx.h" 132 | #else 133 | #error "Please select first the target STM32G0xx device used in your application (in stm32g0xx.h file)" 134 | #endif 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /** @addtogroup Exported_types 141 | * @{ 142 | */ 143 | typedef enum 144 | { 145 | RESET = 0, 146 | SET = !RESET 147 | } FlagStatus, ITStatus; 148 | 149 | typedef enum 150 | { 151 | DISABLE = 0, 152 | ENABLE = !DISABLE 153 | } FunctionalState; 154 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 155 | 156 | typedef enum 157 | { 158 | SUCCESS = 0, 159 | ERROR = !SUCCESS 160 | } ErrorStatus; 161 | 162 | /** 163 | * @} 164 | */ 165 | 166 | 167 | /** @addtogroup Exported_macros 168 | * @{ 169 | */ 170 | #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 171 | 172 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 173 | 174 | #define READ_BIT(REG, BIT) ((REG) & (BIT)) 175 | 176 | #define CLEAR_REG(REG) ((REG) = (0x0)) 177 | 178 | #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 179 | 180 | #define READ_REG(REG) ((REG)) 181 | 182 | #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 183 | 184 | /* Use of interrupt control for register exclusive access */ 185 | /* Atomic 32-bit register access macro to set one or several bits */ 186 | #define ATOMIC_SET_BIT(REG, BIT) \ 187 | do { \ 188 | uint32_t primask; \ 189 | primask = __get_PRIMASK(); \ 190 | __set_PRIMASK(1); \ 191 | SET_BIT((REG), (BIT)); \ 192 | __set_PRIMASK(primask); \ 193 | } while(0) 194 | 195 | /* Atomic 32-bit register access macro to clear one or several bits */ 196 | #define ATOMIC_CLEAR_BIT(REG, BIT) \ 197 | do { \ 198 | uint32_t primask; \ 199 | primask = __get_PRIMASK(); \ 200 | __set_PRIMASK(1); \ 201 | CLEAR_BIT((REG), (BIT)); \ 202 | __set_PRIMASK(primask); \ 203 | } while(0) 204 | 205 | /* Atomic 32-bit register access macro to clear and set one or several bits */ 206 | #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 207 | do { \ 208 | uint32_t primask; \ 209 | primask = __get_PRIMASK(); \ 210 | __set_PRIMASK(1); \ 211 | MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \ 212 | __set_PRIMASK(primask); \ 213 | } while(0) 214 | 215 | /* Atomic 16-bit register access macro to set one or several bits */ 216 | #define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \ 217 | 218 | /* Atomic 16-bit register access macro to clear one or several bits */ 219 | #define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \ 220 | 221 | /* Atomic 16-bit register access macro to clear and set one or several bits */ 222 | #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 223 | 224 | /*#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))*/ 225 | /** 226 | * @} 227 | */ 228 | 229 | #if defined (USE_HAL_DRIVER) 230 | #include "stm32g0xx_hal.h" 231 | #endif /* USE_HAL_DRIVER */ 232 | 233 | #ifdef __cplusplus 234 | } 235 | #endif /* __cplusplus */ 236 | 237 | #endif /* STM32G0xx_H */ 238 | /** 239 | * @} 240 | */ 241 | 242 | /** 243 | * @} 244 | */ 245 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32g0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M0+ Device System Source File for STM32G0xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018-2021 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /** @addtogroup CMSIS 19 | * @{ 20 | */ 21 | 22 | /** @addtogroup stm32g0xx_system 23 | * @{ 24 | */ 25 | 26 | /** 27 | * @brief Define to prevent recursive inclusion 28 | */ 29 | #ifndef SYSTEM_STM32G0XX_H 30 | #define SYSTEM_STM32G0XX_H 31 | 32 | #ifdef __cplusplus 33 | extern "C" { 34 | #endif 35 | 36 | /** @addtogroup STM32G0xx_System_Includes 37 | * @{ 38 | */ 39 | 40 | /** 41 | * @} 42 | */ 43 | 44 | 45 | /** @addtogroup STM32G0xx_System_Exported_types 46 | * @{ 47 | */ 48 | /* This variable is updated in three ways: 49 | 1) by calling CMSIS function SystemCoreClockUpdate() 50 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 51 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 52 | Note: If you use this function to configure the system clock; then there 53 | is no need to call the 2 first functions listed above, since SystemCoreClock 54 | variable is updated automatically. 55 | */ 56 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 57 | 58 | extern const uint32_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 59 | extern const uint32_t APBPrescTable[8]; /*!< APB prescalers table values */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** @addtogroup STM32G0xx_System_Exported_Constants 66 | * @{ 67 | */ 68 | 69 | /** 70 | * @} 71 | */ 72 | 73 | /** @addtogroup STM32G0xx_System_Exported_Macros 74 | * @{ 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /** @addtogroup STM32G0xx_System_Exported_Functions 82 | * @{ 83 | */ 84 | 85 | extern void SystemInit(void); 86 | extern void SystemCoreClockUpdate(void); 87 | /** 88 | * @} 89 | */ 90 | 91 | #ifdef __cplusplus 92 | } 93 | #endif 94 | 95 | #endif /*SYSTEM_STM32G0XX_H */ 96 | 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/CMSIS/Device/ST/STM32G0xx/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the Apache-2.0 license shall apply. 5 | You may obtain a copy of the Apache-2.0 at: 6 | https://opensource.org/licenses/Apache-2.0 7 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.3 5 | * @date 24. June 2019 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2019 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2018 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_DEF 22 | #define STM32G0xx_HAL_DEF 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx.h" 30 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ 31 | #include 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | 35 | /** 36 | * @brief HAL Status structures definition 37 | */ 38 | typedef enum 39 | { 40 | HAL_OK = 0x00U, 41 | HAL_ERROR = 0x01U, 42 | HAL_BUSY = 0x02U, 43 | HAL_TIMEOUT = 0x03U 44 | } HAL_StatusTypeDef; 45 | 46 | /** 47 | * @brief HAL Lock structures definition 48 | */ 49 | typedef enum 50 | { 51 | HAL_UNLOCKED = 0x00U, 52 | HAL_LOCKED = 0x01U 53 | } HAL_LockTypeDef; 54 | 55 | /* Exported macros -----------------------------------------------------------*/ 56 | 57 | #if !defined(UNUSED) 58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 59 | #endif /* UNUSED */ 60 | 61 | #define HAL_MAX_DELAY 0xFFFFFFFFU 62 | 63 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 64 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 65 | 66 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 67 | do{ \ 68 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 69 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 70 | } while(0U) 71 | 72 | /** @brief Reset the Handles State field. 73 | * @param __HANDLE__ specifies the Peripheral Handle. 74 | * @note This macro can be used for the following purpose: 75 | * - When the Handle is declared as local variable; before passing it as parameter 76 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 77 | * to set to 0 the Handles "State" field. 78 | * Otherwise, "State" field may have any random value and the first time the function 79 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 80 | * (i.e. HAL_PPP_MspInit() will not be executed). 81 | * - When there is a need to reconfigure the low level hardware: instead of calling 82 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 83 | * In this later function, when the Handles "State" field is set to 0, it will execute the function 84 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 85 | * @retval None 86 | */ 87 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 88 | 89 | #if (USE_RTOS == 1U) 90 | /* Reserved for future use */ 91 | #error " USE_RTOS should be 0 in the current HAL release " 92 | #else 93 | #define __HAL_LOCK(__HANDLE__) \ 94 | do{ \ 95 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 96 | { \ 97 | return HAL_BUSY; \ 98 | } \ 99 | else \ 100 | { \ 101 | (__HANDLE__)->Lock = HAL_LOCKED; \ 102 | } \ 103 | }while (0U) 104 | 105 | #define __HAL_UNLOCK(__HANDLE__) \ 106 | do{ \ 107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 108 | }while (0U) 109 | #endif /* USE_RTOS */ 110 | 111 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 112 | #ifndef __weak 113 | #define __weak __attribute__((weak)) 114 | #endif /* __weak */ 115 | #ifndef __packed 116 | #define __packed __attribute__((packed)) 117 | #endif /* __packed */ 118 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 119 | #ifndef __weak 120 | #define __weak __attribute__((weak)) 121 | #endif /* __weak */ 122 | #ifndef __packed 123 | #define __packed __attribute__((__packed__)) 124 | #endif /* __packed */ 125 | #endif /* __GNUC__ */ 126 | 127 | 128 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 129 | /* GNU Compiler */ 130 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */ 131 | #ifndef __ALIGN_BEGIN 132 | #define __ALIGN_BEGIN 133 | #endif /* __ALIGN_BEGIN */ 134 | #ifndef __ALIGN_END 135 | #define __ALIGN_END __attribute__ ((aligned (4))) 136 | #endif /* __ALIGN_END */ 137 | #elif defined (__GNUC__) && !defined (__CC_ARM) /* GNU Compiler */ 138 | #ifndef __ALIGN_END 139 | #define __ALIGN_END __attribute__ ((aligned (4U))) 140 | #endif /* __ALIGN_END */ 141 | #ifndef __ALIGN_BEGIN 142 | #define __ALIGN_BEGIN 143 | #endif /* __ALIGN_BEGIN */ 144 | #else 145 | #ifndef __ALIGN_END 146 | #define __ALIGN_END 147 | #endif /* __ALIGN_END */ 148 | #ifndef __ALIGN_BEGIN 149 | /* ARM Compiler */ 150 | #if defined (__CC_ARM) /* ARM Compiler V5 */ 151 | #define __ALIGN_BEGIN __align(4U) 152 | /* IAR Compiler */ 153 | #elif defined (__ICCARM__) 154 | #define __ALIGN_BEGIN 155 | #endif /* __CC_ARM */ 156 | #endif /* __ALIGN_BEGIN */ 157 | #endif /* __GNUC__ */ 158 | 159 | /** 160 | * @brief __RAM_FUNC definition 161 | */ 162 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) 163 | /* ARM Compiler V4/V5 and V6 164 | -------------------------- 165 | RAM functions are defined using the toolchain options. 166 | Functions that are executed in RAM should reside in a separate source module. 167 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 168 | area of a module to a memory space in physical RAM. 169 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 170 | dialog. 171 | */ 172 | #define __RAM_FUNC 173 | 174 | #elif defined ( __ICCARM__ ) 175 | /* ICCARM Compiler 176 | --------------- 177 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 178 | */ 179 | #define __RAM_FUNC __ramfunc 180 | 181 | #elif defined ( __GNUC__ ) 182 | /* GNU Compiler 183 | ------------ 184 | RAM functions are defined using a specific toolchain attribute 185 | "__attribute__((section(".RamFunc")))". 186 | */ 187 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 188 | 189 | #endif /* __CC_ARM || __ARMCC_VERSION */ 190 | 191 | /** 192 | * @brief __NOINLINE definition 193 | */ 194 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ ) 195 | /* ARM V4/V5 and V6 & GNU Compiler 196 | ------------------------------- 197 | */ 198 | #define __NOINLINE __attribute__ ( (noinline) ) 199 | 200 | #elif defined ( __ICCARM__ ) 201 | /* ICCARM Compiler 202 | --------------- 203 | */ 204 | #define __NOINLINE _Pragma("optimize = no_inline") 205 | 206 | #endif /* __CC_ARM || __ARMCC_VERSION */ 207 | 208 | 209 | #ifdef __cplusplus 210 | } 211 | #endif 212 | 213 | #endif /* STM32G0xx_HAL_DEF */ 214 | 215 | 216 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32G0xx_HAL_FLASH_EX_H 20 | #define STM32G0xx_HAL_FLASH_EX_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32g0xx_hal_def.h" 28 | 29 | /** @addtogroup STM32G0xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASHEx 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported constants --------------------------------------------------------*/ 39 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants 40 | * @{ 41 | */ 42 | /** @defgroup FLASHEx_Empty_Check FLASHEx Empty Check 43 | * @{ 44 | */ 45 | #define FLASH_PROG_NOT_EMPTY 0x00000000u /*!< 1st location in Flash is programmed */ 46 | #define FLASH_PROG_EMPTY FLASH_ACR_PROGEMPTY /*!< 1st location in Flash is empty */ 47 | /** 48 | * @} 49 | */ 50 | /** 51 | * @} 52 | */ 53 | 54 | /* Exported macro ------------------------------------------------------------*/ 55 | /* Exported functions --------------------------------------------------------*/ 56 | /** @addtogroup FLASHEx_Exported_Functions 57 | * @{ 58 | */ 59 | 60 | /* Extended Program operation functions *************************************/ 61 | /** @addtogroup FLASHEx_Exported_Functions_Group1 62 | * @{ 63 | */ 64 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 65 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 66 | void HAL_FLASHEx_EnableDebugger(void); 67 | void HAL_FLASHEx_DisableDebugger(void); 68 | uint32_t HAL_FLASHEx_FlashEmptyCheck(void); 69 | void HAL_FLASHEx_ForceFlashEmpty(uint32_t FlashEmpty); 70 | #if defined(FLASH_SECURABLE_MEMORY_SUPPORT) 71 | void HAL_FLASHEx_EnableSecMemProtection(uint32_t Banks); 72 | #endif /* FLASH_SECURABLE_MEMORY_SUPPORT */ 73 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 74 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 75 | /** 76 | * @} 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /* Private macros ------------------------------------------------------------*/ 84 | /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants 85 | * @{ 86 | */ 87 | #define FLASH_PCROP_GRANULARITY_OFFSET 9u /*!< FLASH Code Readout Protection granularity offset */ 88 | #define FLASH_PCROP_GRANULARITY (1UL << FLASH_PCROP_GRANULARITY_OFFSET) /*!< FLASH Code Readout Protection granularity, 512 Bytes */ 89 | /** 90 | * @} 91 | */ 92 | 93 | 94 | /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros 95 | * @{ 96 | */ 97 | #define IS_FLASH_EMPTY_CHECK(__VALUE__) (((__VALUE__) == FLASH_PROG_EMPTY) || ((__VALUE__) == FLASH_PROG_NOT_EMPTY)) 98 | void FLASH_PageErase(uint32_t Banks, uint32_t Page); 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | #ifdef __cplusplus 112 | } 113 | #endif 114 | 115 | #endif /* STM32G0xx_HAL_FLASH_EX_H */ 116 | 117 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SPI HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32G0xx_HAL_SPI_EX_H 21 | #define STM32G0xx_HAL_SPI_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32g0xx_hal_def.h" 29 | 30 | /** @addtogroup STM32G0xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup SPIEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /* Exported macros -----------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup SPIEx_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /* Initialization and de-initialization functions ****************************/ 47 | /* IO operation functions *****************************************************/ 48 | /** @addtogroup SPIEx_Exported_Functions_Group1 49 | * @{ 50 | */ 51 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); 52 | /** 53 | * @} 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | #ifdef __cplusplus 69 | } 70 | #endif 71 | 72 | #endif /* STM32G0xx_HAL_SPI_EX_H */ 73 | 74 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/STM32G0xx_HAL_Driver/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the BSD-3-Clause license shall apply. 5 | You may obtain a copy of the BSD-3-Clause at: 6 | https://opensource.org/licenses/BSD-3-Clause 7 | -------------------------------------------------------------------------------- /mdrv_fw/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended SPI HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * SPI peripheral extended functionalities : 8 | * + IO operation functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2018 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "stm32g0xx_hal.h" 25 | 26 | /** @addtogroup STM32G0xx_HAL_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup SPIEx SPIEx 31 | * @brief SPI Extended HAL module driver 32 | * @{ 33 | */ 34 | #ifdef HAL_SPI_MODULE_ENABLED 35 | 36 | /* Private typedef -----------------------------------------------------------*/ 37 | /* Private defines -----------------------------------------------------------*/ 38 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants 39 | * @{ 40 | */ 41 | #define SPI_FIFO_SIZE 4UL 42 | /** 43 | * @} 44 | */ 45 | 46 | /* Private macros ------------------------------------------------------------*/ 47 | /* Private variables ---------------------------------------------------------*/ 48 | /* Private function prototypes -----------------------------------------------*/ 49 | /* Exported functions --------------------------------------------------------*/ 50 | 51 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions 52 | * @{ 53 | */ 54 | 55 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions 56 | * @brief Data transfers functions 57 | * 58 | @verbatim 59 | ============================================================================== 60 | ##### IO operation functions ##### 61 | =============================================================================== 62 | [..] 63 | This subsection provides a set of extended functions to manage the SPI 64 | data transfers. 65 | 66 | (#) Rx data flush function: 67 | (++) HAL_SPIEx_FlushRxFifo() 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief Flush the RX fifo. 75 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains 76 | * the configuration information for the specified SPI module. 77 | * @retval HAL status 78 | */ 79 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi) 80 | { 81 | __IO uint32_t tmpreg; 82 | uint8_t count = 0U; 83 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) 84 | { 85 | count++; 86 | tmpreg = hspi->Instance->DR; 87 | UNUSED(tmpreg); /* To avoid GCC warning */ 88 | if (count == SPI_FIFO_SIZE) 89 | { 90 | return HAL_TIMEOUT; 91 | } 92 | } 93 | return HAL_OK; 94 | } 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* HAL_SPI_MODULE_ENABLED */ 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | /** 111 | * @} 112 | */ 113 | -------------------------------------------------------------------------------- /mdrv_fw/Makefile: -------------------------------------------------------------------------------- 1 | ########################################################################################################################## 2 | # File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Thu Jan 16 09:45:05 HKT 2025] 3 | ########################################################################################################################## 4 | 5 | # ------------------------------------------------ 6 | # Generic Makefile (based on gcc) 7 | # 8 | # ChangeLog : 9 | # 2017-02-10 - Several enhancements + project update mode 10 | # 2015-07-22 - first version 11 | # ------------------------------------------------ 12 | 13 | ###################################### 14 | # target 15 | ###################################### 16 | TARGET = mdrv_fw 17 | GIT_VERSION := $(shell git describe --dirty --always --tags) 18 | 19 | 20 | ###################################### 21 | # building variables 22 | ###################################### 23 | # debug build? 24 | DEBUG = 1 25 | # optimization 26 | OPT = -Og 27 | 28 | 29 | ####################################### 30 | # paths 31 | ####################################### 32 | # Build path 33 | BUILD_DIR = build 34 | 35 | ###################################### 36 | # source 37 | ###################################### 38 | # C sources 39 | C_SOURCES = \ 40 | Core/Src/main.c \ 41 | Core/Src/stm32g0xx_it.c \ 42 | Core/Src/stm32g0xx_hal_msp.c \ 43 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac.c \ 44 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dac_ex.c \ 45 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc.c \ 46 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_rcc_ex.c \ 47 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rcc.c \ 48 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \ 49 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \ 50 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c \ 51 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma.c \ 52 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \ 53 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr.c \ 54 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_pwr_ex.c \ 55 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_cortex.c \ 56 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal.c \ 57 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_exti.c \ 58 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi.c \ 59 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c \ 60 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim.c \ 61 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_tim_ex.c \ 62 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart.c \ 63 | Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_uart_ex.c \ 64 | Core/Src/system_stm32g0xx.c \ 65 | Core/Src/sysmem.c \ 66 | Core/Src/syscalls.c \ 67 | cdnet/core/cdnet_core.c \ 68 | cdnet/parser/cdnet_l0.c \ 69 | cdnet/parser/cdnet_l1.c \ 70 | cdnet/parser/cdnet.c \ 71 | cdnet/arch/stm32/arch_wrapper.c \ 72 | cdnet/dev/cdctl_pll_cal.c \ 73 | cdnet/dev/cdctl_it.c \ 74 | cdnet/utils/cd_list.c \ 75 | cdnet/utils/hex_dump.c \ 76 | usr/config.c \ 77 | usr/common_services.c \ 78 | usr/app_main.c \ 79 | usr/app_motor.c \ 80 | usr/pid_i.c \ 81 | usr/raw_dbg.c 82 | 83 | # ASM sources 84 | ASM_SOURCES = \ 85 | startup_stm32g071xx.s 86 | 87 | # ASM sources 88 | ASMM_SOURCES = 89 | 90 | 91 | ####################################### 92 | # binaries 93 | ####################################### 94 | PREFIX = arm-none-eabi- 95 | # The gcc compiler bin path can be either defined in make command via GCC_PATH variable (> make GCC_PATH=xxx) 96 | # either it can be added to the PATH environment variable. 97 | ifdef GCC_PATH 98 | CC = $(GCC_PATH)/$(PREFIX)gcc 99 | AS = $(GCC_PATH)/$(PREFIX)gcc -x assembler-with-cpp 100 | CP = $(GCC_PATH)/$(PREFIX)objcopy 101 | SZ = $(GCC_PATH)/$(PREFIX)size 102 | else 103 | CC = $(PREFIX)gcc 104 | AS = $(PREFIX)gcc -x assembler-with-cpp 105 | CP = $(PREFIX)objcopy 106 | SZ = $(PREFIX)size 107 | endif 108 | HEX = $(CP) -O ihex 109 | BIN = $(CP) -O binary -S 110 | 111 | ####################################### 112 | # CFLAGS 113 | ####################################### 114 | # cpu 115 | CPU = -mcpu=cortex-m0plus 116 | 117 | # fpu 118 | # NONE for Cortex-M0/M0+/M3 119 | 120 | # float-abi 121 | 122 | 123 | # mcu 124 | MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) -Wdouble-promotion -Wabsolute-value # -u _printf_float 125 | 126 | # macros for gcc 127 | # AS defines 128 | AS_DEFS = 129 | 130 | # C defines 131 | C_DEFS = \ 132 | -DUSE_HAL_DRIVER \ 133 | -DSTM32G071xx \ 134 | -DSW_VER=\"$(GIT_VERSION)\" 135 | 136 | 137 | # AS includes 138 | AS_INCLUDES = 139 | 140 | # C includes 141 | C_INCLUDES = \ 142 | -ICore/Inc \ 143 | -IDrivers/STM32G0xx_HAL_Driver/Inc \ 144 | -IDrivers/STM32G0xx_HAL_Driver/Inc/Legacy \ 145 | -IDrivers/CMSIS/Device/ST/STM32G0xx/Include \ 146 | -IDrivers/CMSIS/Include \ 147 | -Icdnet/parser \ 148 | -Icdnet/core \ 149 | -Icdnet/utils \ 150 | -Icdnet/dev \ 151 | -Icdnet/arch/stm32 \ 152 | -Iusr 153 | 154 | 155 | # compile gcc flags 156 | ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 157 | 158 | CFLAGS += $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections 159 | 160 | ifeq ($(DEBUG), 1) 161 | CFLAGS += -g -gdwarf-2 162 | endif 163 | 164 | 165 | # Generate dependency information 166 | CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" 167 | 168 | 169 | ####################################### 170 | # LDFLAGS 171 | ####################################### 172 | # link script 173 | LDSCRIPT = stm32g071cbtx_flash.ld 174 | 175 | # libraries 176 | LIBS = -lc -lm -lnosys 177 | LIBDIR = 178 | LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections 179 | 180 | # default action: build all 181 | all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin 182 | 183 | 184 | ####################################### 185 | # build the application 186 | ####################################### 187 | # list of objects 188 | OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) 189 | vpath %.c $(sort $(dir $(C_SOURCES))) 190 | # list of ASM program objects 191 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) 192 | vpath %.s $(sort $(dir $(ASM_SOURCES))) 193 | OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASMM_SOURCES:.S=.o))) 194 | vpath %.S $(sort $(dir $(ASMM_SOURCES))) 195 | 196 | $(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) 197 | $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ 198 | 199 | $(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) 200 | $(AS) -c $(CFLAGS) $< -o $@ 201 | $(BUILD_DIR)/%.o: %.S Makefile | $(BUILD_DIR) 202 | $(AS) -c $(CFLAGS) $< -o $@ 203 | 204 | $(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile 205 | $(CC) $(OBJECTS) $(LDFLAGS) -o $@ 206 | $(SZ) $@ 207 | 208 | $(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 209 | $(HEX) $< $@ 210 | 211 | $(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) 212 | $(BIN) $< $@ 213 | 214 | $(BUILD_DIR): 215 | mkdir $@ 216 | 217 | ####################################### 218 | # clean up 219 | ####################################### 220 | clean: 221 | -rm -fR $(BUILD_DIR) 222 | 223 | ####################################### 224 | # dependencies 225 | ####################################### 226 | -include $(wildcard $(BUILD_DIR)/*.d) 227 | 228 | # *** EOF *** 229 | -------------------------------------------------------------------------------- /mdrv_fw/flash.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | st-flash --reset --format ihex write build/*.hex 4 | 5 | -------------------------------------------------------------------------------- /mdrv_fw/stm32g071cbtx_flash.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | 5 | ** File : LinkerScript.ld 6 | ** 7 | ** Author : STM32CubeMX 8 | ** 9 | ** Abstract : Linker script for STM32G071CBTx series 10 | ** 128Kbytes FLASH and 36Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used. 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed “as is,” without any warranty 20 | ** of any kind. 21 | ** 22 | ***************************************************************************** 23 | ** @attention 24 | ** 25 | **

© COPYRIGHT(c) 2019 STMicroelectronics

26 | ** 27 | ** Redistribution and use in source and binary forms, with or without modification, 28 | ** are permitted provided that the following conditions are met: 29 | ** 1. Redistributions of source code must retain the above copyright notice, 30 | ** this list of conditions and the following disclaimer. 31 | ** 2. Redistributions in binary form must reproduce the above copyright notice, 32 | ** this list of conditions and the following disclaimer in the documentation 33 | ** and/or other materials provided with the distribution. 34 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors 35 | ** may be used to endorse or promote products derived from this software 36 | ** without specific prior written permission. 37 | ** 38 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 39 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 40 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 41 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 42 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 43 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 45 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 46 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 47 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 48 | ** 49 | ***************************************************************************** 50 | */ 51 | 52 | /* Entry Point */ 53 | ENTRY(Reset_Handler) 54 | 55 | /* Highest address of the user mode stack */ 56 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of RAM */ 57 | /* Generate a link error if heap and stack don't fit into RAM */ 58 | _Min_Heap_Size = 0x200; /* required amount of heap */ 59 | _Min_Stack_Size = 0x400; /* required amount of stack */ 60 | 61 | /* Specify the memory areas */ 62 | MEMORY 63 | { 64 | RAM (xrw) : ORIGIN = 0x20000004, LENGTH = 36K - 4 65 | FLASH (rx) : ORIGIN = 0x8006000, LENGTH = 102K /* 128 - 24 - 2 = 102 */ 66 | } 67 | 68 | /* Define output sections */ 69 | SECTIONS 70 | { 71 | /* The startup code goes first into FLASH */ 72 | .isr_vector : 73 | { 74 | . = ALIGN(4); 75 | KEEP(*(.isr_vector)) /* Startup code */ 76 | . = ALIGN(4); 77 | } >FLASH 78 | 79 | /* The program code and other data goes into FLASH */ 80 | .text : 81 | { 82 | . = ALIGN(4); 83 | *(.text) /* .text sections (code) */ 84 | *(.text*) /* .text* sections (code) */ 85 | *(.glue_7) /* glue arm to thumb code */ 86 | *(.glue_7t) /* glue thumb to arm code */ 87 | *(.eh_frame) 88 | 89 | KEEP (*(.init)) 90 | KEEP (*(.fini)) 91 | 92 | . = ALIGN(4); 93 | _etext = .; /* define a global symbols at end of code */ 94 | } >FLASH 95 | 96 | /* Constant data goes into FLASH */ 97 | .rodata : 98 | { 99 | . = ALIGN(4); 100 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 101 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 102 | . = ALIGN(4); 103 | } >FLASH 104 | 105 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 106 | .ARM : { 107 | __exidx_start = .; 108 | *(.ARM.exidx*) 109 | __exidx_end = .; 110 | } >FLASH 111 | 112 | .preinit_array : 113 | { 114 | PROVIDE_HIDDEN (__preinit_array_start = .); 115 | KEEP (*(.preinit_array*)) 116 | PROVIDE_HIDDEN (__preinit_array_end = .); 117 | } >FLASH 118 | .init_array : 119 | { 120 | PROVIDE_HIDDEN (__init_array_start = .); 121 | KEEP (*(SORT(.init_array.*))) 122 | KEEP (*(.init_array*)) 123 | PROVIDE_HIDDEN (__init_array_end = .); 124 | } >FLASH 125 | .fini_array : 126 | { 127 | PROVIDE_HIDDEN (__fini_array_start = .); 128 | KEEP (*(SORT(.fini_array.*))) 129 | KEEP (*(.fini_array*)) 130 | PROVIDE_HIDDEN (__fini_array_end = .); 131 | } >FLASH 132 | 133 | /* used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections goes into RAM, load LMA copy after code */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | } >RAM AT> FLASH 147 | 148 | 149 | /* Uninitialized data section */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss secion */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough RAM left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | 177 | 178 | /* Remove information from the standard libraries */ 179 | /DISCARD/ : 180 | { 181 | libc.a ( * ) 182 | libm.a ( * ) 183 | libgcc.a ( * ) 184 | } 185 | 186 | } 187 | 188 | 189 | -------------------------------------------------------------------------------- /mdrv_fw/usr/app_main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include "math.h" 11 | #include "app_main.h" 12 | 13 | gpio_t led_r = { .group = LED_R_GPIO_Port, .num = LED_R_Pin }; 14 | gpio_t led_g = { .group = LED_G_GPIO_Port, .num = LED_G_Pin }; 15 | 16 | static gpio_t r_int = { .group = CD_INT_GPIO_Port, .num = CD_INT_Pin }; 17 | static gpio_t r_cs = { .group = CD_CS_GPIO_Port, .num = CD_CS_Pin }; 18 | static spi_t r_spi = { 19 | .spi = SPI1, 20 | .ns_pin = &r_cs, 21 | .dma_rx = DMA1, 22 | .dma_ch_rx = DMA1_Channel1, 23 | .dma_ch_tx = DMA1_Channel2, 24 | .dma_mask = (2 << 0) 25 | }; 26 | 27 | static cd_frame_t frame_alloc[FRAME_MAX]; 28 | list_head_t frame_free_head = {0}; 29 | 30 | static cdn_pkt_t packet_alloc[PACKET_MAX]; 31 | list_head_t packet_free_head = {0}; 32 | 33 | cdctl_dev_t r_dev = {0}; // CDBUS 34 | cdn_ns_t dft_ns = {0}; // CDNET 35 | 36 | 37 | static void device_init(void) 38 | { 39 | int i; 40 | cdn_init_ns(&dft_ns, &packet_free_head, &frame_free_head); 41 | 42 | for (i = 0; i < FRAME_MAX; i++) 43 | cd_list_put(&frame_free_head, &frame_alloc[i]); 44 | for (i = 0; i < PACKET_MAX; i++) 45 | cdn_list_put(&packet_free_head, &packet_alloc[i]); 46 | 47 | spi_wr_init(&r_spi); 48 | cdctl_dev_init(&r_dev, &frame_free_head, &csa.bus_cfg, &r_spi, &r_int, EXTI2_3_IRQn); 49 | 50 | cdn_add_intf(&dft_ns, &r_dev.cd_dev, csa.bus_net, csa.bus_cfg.mac); 51 | } 52 | 53 | 54 | #if 0 55 | static void dump_hw_status(void) 56 | { 57 | static int t_l = 0; 58 | if (get_systick() - t_l > 5000) { 59 | t_l = get_systick(); 60 | 61 | d_debug("ctl: state %d, t_len %ld, r_len %ld, irq %d\n", 62 | r_dev.state, r_dev.tx_head.len, r_dev.rx_head.len, 63 | !gpio_get_val(r_dev.int_n)); 64 | d_debug(" r_cnt %ld (lost %ld, err %ld, no-free %ld), t_cnt %ld (cd %ld, err %ld)\n", 65 | r_dev.rx_cnt, r_dev.rx_lost_cnt, r_dev.rx_error_cnt, 66 | r_dev.rx_no_free_node_cnt, 67 | r_dev.tx_cnt, r_dev.tx_cd_cnt, r_dev.tx_error_cnt); 68 | } 69 | } 70 | #endif 71 | 72 | void app_main(void) 73 | { 74 | uint64_t *stack_check = (uint64_t *)((uint32_t)&end + 256); 75 | gpio_set_val(&led_r, 1); 76 | gpio_set_val(&led_g, 1); 77 | 78 | printf("\nstart app_main (mdrv-step)...\n"); 79 | *stack_check = 0xababcdcd12123434; 80 | load_conf(); 81 | 82 | HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 2, 0); 83 | HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 2, 0); 84 | HAL_NVIC_SetPriority(DMA1_Ch4_7_DMAMUX1_OVR_IRQn, 2, 0); 85 | HAL_NVIC_SetPriority(EXTI2_3_IRQn, 2, 0); 86 | HAL_NVIC_SetPriority(EXTI4_15_IRQn, 2, 0); 87 | HAL_NVIC_SetPriority(TIM1_BRK_UP_TRG_COM_IRQn, 1, 0); 88 | 89 | device_init(); 90 | common_service_init(); 91 | d_info("conf (mdrv-step): %s\n", csa.conf_from ? "load from flash" : "use default"); 92 | 93 | app_motor_init(); 94 | HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); 95 | HAL_NVIC_EnableIRQ(EXTI2_3_IRQn); 96 | HAL_NVIC_EnableIRQ(EXTI4_15_IRQn); 97 | HAL_NVIC_EnableIRQ(TIM1_BRK_UP_TRG_COM_IRQn); 98 | 99 | csa_list_show(); 100 | d_info("\x1b[92mColor Test\x1b[0m and \x1b[93mAnother Color\x1b[0m...\n"); 101 | delay_systick(100); 102 | gpio_set_val(&led_r, 0); 103 | //uint32_t t_last = get_systick(); 104 | while (true) { 105 | //if (get_systick() - t_last > (gpio_get_val(&led_g) ? 400 : 600)) { 106 | // t_last = get_systick(); 107 | // gpio_set_val(&led_g, !gpio_get_val(&led_g)); 108 | //} 109 | //dump_hw_status(); 110 | app_motor_routine(); 111 | cdn_routine(&dft_ns); // handle cdnet 112 | common_service_routine(); 113 | 114 | if (*stack_check != 0xababcdcd12123434) { 115 | printf("stack overflow\n"); 116 | while (true); 117 | } 118 | } 119 | } 120 | 121 | 122 | void EXTI2_3_IRQHandler(void) 123 | { 124 | __HAL_GPIO_EXTI_CLEAR_FALLING_IT(CD_INT_Pin); 125 | cdctl_int_isr(&r_dev); 126 | } 127 | 128 | void EXTI4_15_IRQHandler(void) 129 | { 130 | __HAL_GPIO_EXTI_CLEAR_FALLING_IT(SEN_INT_Pin); 131 | limit_det_isr(); 132 | } 133 | 134 | void DMA1_Channel1_IRQHandler(void) 135 | { 136 | r_spi.dma_rx->IFCR = r_spi.dma_mask; 137 | cdctl_spi_isr(&r_dev); 138 | } 139 | 140 | void TIM1_BRK_UP_TRG_COM_IRQHandler(void) 141 | { 142 | TIM1->SR &= ~TIM_FLAG_UPDATE; 143 | timer_isr(); 144 | } 145 | -------------------------------------------------------------------------------- /mdrv_fw/usr/app_main.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #ifndef __APP_MAIN_H__ 11 | #define __APP_MAIN_H__ 12 | 13 | #include "cdnet_core.h" 14 | #include "cd_debug.h" 15 | #include "cdbus_uart.h" 16 | #include "cdctl_it.h" 17 | #include "pid_i.h" 18 | 19 | #define P_2F(x) (int)(x), abs(((x)-(int)(x))*100) // "%d.%.2d" 20 | #define P_3F(x) (int)(x), abs(((x)-(int)(x))*1000) // "%d.%.3d" 21 | 22 | 23 | #define BL_ARGS 0x20000000 // first word 24 | #define APP_CONF_ADDR 0x0801f800 // page 63, the last page 25 | #define APP_CONF_VER 0x0106 26 | 27 | #define FRAME_MAX 80 28 | #define PACKET_MAX 80 29 | 30 | #define LOOP_FREQ (64000000 / 64 / 200) // 5 KHz 31 | 32 | 33 | typedef struct { 34 | uint16_t offset; 35 | uint16_t size; 36 | } regr_t; // reg range 37 | 38 | 39 | typedef struct { 40 | uint16_t magic_code; // 0xcdcd 41 | uint16_t conf_ver; 42 | uint8_t conf_from; // 0: default, 1: all from flash, 2: partly from flash 43 | uint8_t do_reboot; 44 | bool _reserved_bl; // keep_in_bl for bl 45 | bool save_conf; 46 | 47 | uint8_t bus_net; 48 | cdctl_cfg_t bus_cfg; 49 | bool dbg_en; 50 | uint8_t _reserved0[6]; 51 | #define _end_common qxchg_mcast 52 | 53 | regr_t qxchg_mcast; // for multicast 54 | regr_t qxchg_set[5]; 55 | regr_t qxchg_ret[5]; 56 | uint8_t _reserved1[36]; 57 | 58 | uint8_t dbg_raw_msk; 59 | uint8_t dbg_raw_th; // len threshold (+ 1 samples < pkt size) 60 | regr_t dbg_raw[2][6]; 61 | 62 | uint16_t ref_volt; 63 | uint8_t md_val; 64 | bool set_home; 65 | bool drv_mo; // mo pin state of drv chip 66 | 67 | uint8_t _reserved2[2]; 68 | bool lim_en; 69 | uint8_t _reserved3[5]; 70 | 71 | int32_t tc_pos; 72 | uint32_t tc_speed; 73 | uint32_t tc_accel; 74 | uint32_t tc_accel_emg; 75 | uint8_t _reserved4[6]; 76 | 77 | pid_i_t pid_pos; 78 | #define _end_save cal_pos // end of flash 79 | int32_t cal_pos; 80 | float cal_speed; 81 | 82 | uint8_t state; // 0: drv not enable, 1: drv enable 83 | uint8_t tc_state; // t_curve: 0: stop, 1: run 84 | int cur_pos; 85 | float tc_vc; 86 | float tc_ac; 87 | uint8_t _reserved5[10]; 88 | 89 | uint32_t loop_cnt; 90 | char string_test[10]; // for cdbus_gui tool test 91 | 92 | } csa_t; // config status area 93 | 94 | 95 | typedef uint8_t (*hook_func_t)(uint16_t sub_offset, uint8_t len, uint8_t *dat); 96 | 97 | typedef struct { 98 | regr_t range; 99 | hook_func_t before; 100 | hook_func_t after; 101 | } csa_hook_t; 102 | 103 | 104 | extern csa_t csa; 105 | extern const csa_t csa_dft; 106 | 107 | extern regr_t csa_w_allow[]; // writable list 108 | extern int csa_w_allow_num; 109 | 110 | extern csa_hook_t csa_w_hook[]; 111 | extern int csa_w_hook_num; 112 | extern csa_hook_t csa_r_hook[]; 113 | extern int csa_r_hook_num; 114 | 115 | extern uint32_t end; // end of bss 116 | 117 | int flash_erase(uint32_t addr, uint32_t len); 118 | int flash_write(uint32_t addr, uint32_t len, const uint8_t *buf); 119 | 120 | void app_main(void); 121 | void load_conf(void); 122 | int save_conf(void); 123 | void csa_list_show(void); 124 | 125 | void common_service_init(void); 126 | void common_service_routine(void); 127 | 128 | uint8_t motor_w_hook(uint16_t sub_offset, uint8_t len, uint8_t *dat); 129 | uint8_t ref_volt_w_hook(uint16_t sub_offset, uint8_t len, uint8_t *dat); 130 | uint8_t drv_mo_r_hook(uint16_t sub_offset, uint8_t len, uint8_t *dat); 131 | void app_motor_routine(void); 132 | void app_motor_init(void); 133 | void raw_dbg(int idx); 134 | void limit_det_isr(void); 135 | void timer_isr(void); 136 | 137 | extern gpio_t led_r; 138 | extern gpio_t led_g; 139 | extern cdn_ns_t dft_ns; 140 | extern list_head_t frame_free_head; 141 | extern cdctl_dev_t r_dev; 142 | 143 | #endif 144 | -------------------------------------------------------------------------------- /mdrv_fw/usr/app_motor.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include 11 | #include "app_main.h" 12 | 13 | extern TIM_HandleTypeDef htim1; 14 | extern TIM_HandleTypeDef htim2; 15 | extern TIM_HandleTypeDef htim3; 16 | extern DAC_HandleTypeDef hdac1; 17 | 18 | static gpio_t drv_en = { .group = DRV_EN_GPIO_Port, .num = DRV_EN_Pin }; 19 | static gpio_t drv_md1 = { .group = DRV_MD1_GPIO_Port, .num = DRV_MD1_Pin }; 20 | static gpio_t drv_md2 = { .group = DRV_MD2_GPIO_Port, .num = DRV_MD2_Pin }; 21 | static gpio_t drv_md3 = { .group = DRV_MD3_GPIO_Port, .num = DRV_MD3_Pin }; 22 | static gpio_t drv_dir = { .group = DRV_DIR_GPIO_Port, .num = DRV_DIR_Pin }; 23 | static gpio_t drv_mo = { .group = DRV_MO_GPIO_Port, .num = DRV_MO_Pin }; 24 | static bool limit_disable = false; 25 | 26 | static int32_t pos_at_cnt0 = 0; // backup cur_pos at start 27 | static bool is_last_0 = false; // for set_pwm 28 | // add time space before and after drv_dir switch (not necessary) 29 | static bool wait_before_dir_chg = false; 30 | static bool wait_after_dir_chg = false; 31 | 32 | 33 | static void set_pwm(int value) 34 | { 35 | if (wait_before_dir_chg) { 36 | gpio_set_val(&drv_dir, (value >= 0)); 37 | wait_before_dir_chg = false; 38 | wait_after_dir_chg = true; 39 | return; 40 | } 41 | if (wait_after_dir_chg) { 42 | wait_after_dir_chg = false; 43 | return; 44 | } 45 | 46 | if (value == 0 || gpio_get_val(&drv_dir) != (value >= 0)) { 47 | if (!is_last_0) { 48 | __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_1, 0); // pause pwm 49 | __HAL_TIM_SET_AUTORELOAD(&htim3, 65535); 50 | __HAL_TIM_SET_PRESCALER(&htim3, 4-1); 51 | // after pausing pwm the counter must be read again and then cleared 52 | int counter_dir = gpio_get_val(&drv_dir) ? 1 : -1; 53 | csa.cur_pos = pos_at_cnt0 + __HAL_TIM_GET_COUNTER(&htim2) * counter_dir; 54 | __HAL_TIM_SET_COUNTER(&htim2, 0); 55 | pos_at_cnt0 = csa.cur_pos; 56 | } 57 | is_last_0 = true; 58 | wait_before_dir_chg = true; 59 | return; 60 | } 61 | 62 | // 16: 250ns, auto-reload: 16*2-1, 65536*4: 4ms 63 | value = clip(abs(value), 16*2-1, 65536*4-1); 64 | int div = value / 65536; 65 | value = value / (div + 1); 66 | __HAL_TIM_SET_PRESCALER(&htim3, div); 67 | __HAL_TIM_SET_AUTORELOAD(&htim3, value); 68 | __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_1, 16); 69 | is_last_0 = false; 70 | } 71 | 72 | uint8_t motor_w_hook(uint16_t sub_offset, uint8_t len, uint8_t *dat) 73 | { 74 | uint32_t flags; 75 | static uint8_t last_csa_state = 0; 76 | gpio_set_val(&drv_en, csa.state); 77 | 78 | local_irq_save(flags); 79 | if (csa.state && !csa.tc_state && csa.tc_pos != csa.cal_pos) { 80 | local_irq_restore(flags); 81 | d_debug("run motor ...\n"); 82 | csa.tc_state = 1; 83 | } else { 84 | local_irq_restore(flags); 85 | } 86 | 87 | if (!csa.state && last_csa_state) { 88 | d_debug("disable motor ...\n"); 89 | local_irq_save(flags); 90 | csa.tc_pos = csa.cur_pos; 91 | local_irq_restore(flags); 92 | } 93 | 94 | last_csa_state = csa.state; 95 | return 0; 96 | } 97 | 98 | uint8_t ref_volt_w_hook(uint16_t sub_offset, uint8_t len, uint8_t *dat) 99 | { 100 | d_debug("set reference voltage: %d mv\n", csa.ref_volt); 101 | HAL_DAC_SetValue(&hdac1, DAC_CHANNEL_2, DAC_ALIGN_12B_R, (csa.ref_volt / 1000.0f) * 0x0fff / 3.3f); 102 | return 0; 103 | } 104 | 105 | uint8_t drv_mo_r_hook(uint16_t sub_offset, uint8_t len, uint8_t *dat) 106 | { 107 | csa.drv_mo = gpio_get_val(&drv_mo); 108 | d_debug("read drv_mo: %d\n", csa.drv_mo); 109 | return 0; 110 | } 111 | 112 | 113 | void app_motor_init(void) 114 | { 115 | HAL_DAC_Start(&hdac1, DAC_CHANNEL_2); 116 | HAL_DAC_SetValue(&hdac1, DAC_CHANNEL_2, DAC_ALIGN_12B_R, (csa.ref_volt / 1000.0f) * 0x0fff / 3.3f); 117 | 118 | gpio_set_val(&drv_md1, csa.md_val & 1); 119 | gpio_set_val(&drv_md2, csa.md_val & 2); 120 | gpio_set_val(&drv_md3, csa.md_val & 4); 121 | gpio_set_val(&drv_en, csa.state); 122 | pid_i_init(&csa.pid_pos, true); 123 | 124 | __HAL_TIM_ENABLE(&htim1); 125 | __HAL_TIM_ENABLE(&htim2); 126 | 127 | d_info("init pwm...\n"); 128 | //__HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_1, 16); 129 | //__HAL_TIM_SET_AUTORELOAD(&htim3, 65535); 130 | //__HAL_TIM_SET_PRESCALER(&htim3, 4-1); 131 | HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1); 132 | __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_1, 0); // pause pwm 133 | __HAL_TIM_SET_COUNTER(&htim2, 0); // tim2 count at pos edge of tim3 ch1 pwm 134 | set_pwm(0); // init flags 135 | 136 | __HAL_TIM_CLEAR_IT(&htim1, TIM_IT_UPDATE); 137 | __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE); 138 | } 139 | 140 | void app_motor_routine(void) 141 | { 142 | uint32_t flags; 143 | 144 | if (csa.set_home && is_last_0) { 145 | // after setting home, do not set tc_pos too close to 0 to avoid impacting the mechanical limits 146 | local_irq_save(flags); 147 | pos_at_cnt0 = csa.cal_pos = csa.tc_pos = csa.cur_pos = 0; 148 | pid_i_reset(&csa.pid_pos, csa.cur_pos, 0); 149 | pid_i_set_target(&csa.pid_pos, csa.cur_pos); 150 | csa.cal_speed = 0; 151 | local_irq_restore(flags); 152 | d_debug("after set home cur_pos: %d\n", csa.cur_pos); 153 | csa.set_home = false; 154 | } 155 | 156 | if (!csa.state && !csa.tc_state) { 157 | pos_at_cnt0 = csa.cur_pos; 158 | __HAL_TIM_SET_COUNTER(&htim2, 0); 159 | } 160 | 161 | if (!csa.tc_state) 162 | limit_disable = false; 163 | } 164 | 165 | 166 | static inline void t_curve_compute(void) 167 | { 168 | static double p64f = (double)INFINITY; 169 | uint32_t accel = limit_disable ? csa.tc_accel_emg : csa.tc_accel; 170 | float v_step = (float)accel / LOOP_FREQ; 171 | 172 | if (!csa.tc_state) { 173 | csa.tc_vc = 0; 174 | csa.tc_ac = 0; 175 | p64f = (double)INFINITY; 176 | return; 177 | } else if (p64f == (double)INFINITY) { 178 | p64f = csa.cal_pos; 179 | } 180 | 181 | if (csa.tc_pos != csa.cal_pos) { 182 | // t = (v1 - v2) / a; s = ((v1 + v2) / 2) * t; a => 183 | csa.tc_ac = ((/* tc_ve + */ csa.tc_vc) / 2.0f) * (/* tc_ve */ - csa.tc_vc) / (csa.tc_pos - csa.cal_pos); 184 | csa.tc_ac = min(fabsf(csa.tc_ac), accel * 1.2f); 185 | } else { 186 | csa.tc_ac = accel * 1.2f; 187 | } 188 | 189 | if (csa.tc_ac >= accel) { 190 | float delta_v = csa.tc_ac / LOOP_FREQ; 191 | csa.tc_vc += -sign(csa.tc_vc) * delta_v; 192 | } else { 193 | float target_v = ((csa.tc_pos >= csa.cal_pos) ? 1 : -1) * (float)csa.tc_speed; 194 | float delta_v = ((target_v >= csa.tc_vc) ? 1 : -1) * min(v_step, fabsf(target_v - csa.tc_vc)); 195 | csa.tc_vc += delta_v; 196 | } 197 | 198 | float dt_pos = csa.tc_vc / LOOP_FREQ; 199 | p64f += (double)dt_pos; 200 | int32_t p32i = lround(p64f); 201 | 202 | if (fabsf(csa.tc_vc) <= v_step * 4.4f) { // avoid overrun 203 | csa.cal_pos = (csa.tc_pos >= csa.cal_pos) ? min(p32i, csa.tc_pos) : max(p32i, csa.tc_pos); 204 | if (csa.cal_pos == csa.tc_pos) { 205 | csa.tc_state = 0; 206 | csa.tc_vc = 0; 207 | csa.tc_ac = 0; 208 | p64f = csa.cal_pos; 209 | } 210 | } else { 211 | csa.cal_pos = p32i; 212 | } 213 | } 214 | 215 | 216 | void timer_isr(void) 217 | { 218 | if (!csa.state) { 219 | pid_i_reset(&csa.pid_pos, csa.cur_pos, 0); 220 | pid_i_set_target(&csa.pid_pos, csa.cur_pos); 221 | csa.cal_pos = csa.cur_pos; 222 | csa.cal_speed = 0; 223 | 224 | } else { 225 | int counter_dir = gpio_get_val(&drv_dir) ? 1 : -1; 226 | csa.cur_pos = pos_at_cnt0 + __HAL_TIM_GET_COUNTER(&htim2) * counter_dir; 227 | 228 | t_curve_compute(); 229 | pid_i_set_target(&csa.pid_pos, csa.cal_pos); 230 | csa.cal_speed = pid_i_compute(&csa.pid_pos, csa.cur_pos); 231 | 232 | if (fabsf(csa.cal_speed) <= max((float)csa.tc_accel / LOOP_FREQ, 50.0f)) { 233 | set_pwm(0); 234 | } else { 235 | // tc_vc: step / sec; tim3 unit: 1 / 64000000Hz 236 | int tim_val = lroundf(64000000 / csa.cal_speed); 237 | set_pwm(tim_val); 238 | } 239 | } 240 | 241 | raw_dbg(0); 242 | raw_dbg(1); 243 | csa.loop_cnt++; 244 | } 245 | 246 | void limit_det_isr(void) 247 | { 248 | d_debug("lim: detected, %d\n", limit_disable); 249 | if (!csa.lim_en || limit_disable) 250 | return; 251 | limit_disable = true; 252 | 253 | // when performing detection, it is recommended to set tc_speed smaller and tc_accel larger 254 | csa.tc_pos = csa.cur_pos; 255 | } 256 | -------------------------------------------------------------------------------- /mdrv_fw/usr/cd_config.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (MIT License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #ifndef __CD_CONFIG_H__ 11 | #define __CD_CONFIG_H__ 12 | 13 | #define CDCTL_OSC_CLK 16000000UL // 16MHz 14 | 15 | #define CD_ARCH_SPI_DMA 16 | 17 | #define CD_DEBUG 18 | //#define CD_VERBOSE 19 | //#define CD_LIST_DEBUG 20 | 21 | #define CD_LIST_IT 22 | #define CD_IRQ_SAFE 23 | #define CDN_IRQ_SAFE 24 | 25 | #include "main.h" // generated by stm32cube 26 | #include "debug_config.h" 27 | 28 | #endif 29 | -------------------------------------------------------------------------------- /mdrv_fw/usr/config.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include "app_main.h" 11 | 12 | regr_t csa_w_allow[] = { 13 | { .offset = offsetof(csa_t, magic_code), .size = offsetof(csa_t, tc_state) - offsetof(csa_t, magic_code) }, 14 | { .offset = offsetof(csa_t, string_test), .size = 10 } 15 | }; 16 | 17 | csa_hook_t csa_w_hook[] = { 18 | { 19 | .range = { .offset = offsetof(csa_t, tc_pos), .size = offsetof(csa_t, tc_state) - offsetof(csa_t, tc_pos) }, 20 | .after = motor_w_hook 21 | }, { 22 | .range = { .offset = offsetof(csa_t, ref_volt), .size = sizeof(((csa_t *)0)->ref_volt) }, 23 | .after = ref_volt_w_hook 24 | } 25 | }; 26 | 27 | csa_hook_t csa_r_hook[] = { 28 | { 29 | .range = { .offset = offsetof(csa_t, drv_mo), .size = 1 }, 30 | .before = drv_mo_r_hook 31 | } 32 | }; 33 | 34 | int csa_w_allow_num = sizeof(csa_w_allow) / sizeof(regr_t); 35 | int csa_w_hook_num = sizeof(csa_w_hook) / sizeof(csa_hook_t); 36 | int csa_r_hook_num = sizeof(csa_r_hook) / sizeof(csa_hook_t); 37 | 38 | 39 | const csa_t csa_dft = { 40 | .magic_code = 0xcdcd, 41 | .conf_ver = APP_CONF_VER, 42 | 43 | .bus_net = 0, 44 | .bus_cfg = CDCTL_CFG_DFT(0xfe), 45 | .dbg_en = false, 46 | 47 | .qxchg_mcast = { .offset = 0, .size = 4 * 3}, 48 | .qxchg_set = { 49 | { .offset = offsetof(csa_t, tc_pos), .size = 4 * 3 } 50 | }, 51 | .qxchg_ret = { 52 | { .offset = offsetof(csa_t, cur_pos), .size = 4 * 2 } 53 | }, 54 | 55 | .dbg_raw_msk = 0, 56 | .dbg_raw_th = 200, 57 | .dbg_raw = { 58 | { 59 | { .offset = offsetof(csa_t, tc_pos), .size = 4 }, 60 | { .offset = offsetof(csa_t, tc_state), .size = 1 }, 61 | { .offset = offsetof(csa_t, cal_pos), .size = 4 }, 62 | { .offset = offsetof(csa_t, cur_pos), .size = 4 * 3 } // + tc_vc, tc_va 63 | }, { 64 | { .offset = offsetof(csa_t, pid_pos) + offsetof(pid_i_t, target), .size = 4 * 3 }, 65 | { .offset = offsetof(csa_t, cal_speed), .size = 4 }, 66 | } 67 | }, 68 | 69 | .ref_volt = 500, 70 | .md_val = 7, // 3'b111 71 | .lim_en = true, 72 | 73 | .tc_speed = 100000, 74 | .tc_accel = 200000, 75 | .tc_accel_emg = 8000000, 76 | 77 | .pid_pos = { 78 | .kp = 50, .ki = 5000, .kd = 0.02, 79 | .out_min = -2000000, // 64000000/32 80 | .out_max = 2000000, // limit output speed 81 | .period = 1.0f / LOOP_FREQ 82 | }, 83 | 84 | .string_test = "hello" 85 | }; 86 | 87 | csa_t csa; 88 | 89 | 90 | void load_conf(void) 91 | { 92 | uint16_t magic_code = *(uint16_t *)APP_CONF_ADDR; 93 | uint16_t conf_ver = *(uint16_t *)(APP_CONF_ADDR + 2); 94 | csa = csa_dft; 95 | 96 | if (magic_code == 0xcdcd && conf_ver == APP_CONF_VER) { 97 | memcpy(&csa, (void *)APP_CONF_ADDR, offsetof(csa_t, _end_save)); 98 | csa.conf_from = 1; 99 | } else if (magic_code == 0xcdcd && (conf_ver >> 8) == (APP_CONF_VER >> 8)) { 100 | memcpy(&csa, (void *)APP_CONF_ADDR, offsetof(csa_t, _end_common)); 101 | csa.conf_from = 2; 102 | csa.conf_ver = APP_CONF_VER; 103 | } 104 | if (csa.conf_from) { 105 | memset(&csa.do_reboot, 0, 3); 106 | csa.tc_pos = 0; 107 | csa.pid_pos.out_max = csa_dft.pid_pos.out_max; 108 | csa.pid_pos.out_min = csa_dft.pid_pos.out_min; 109 | } 110 | } 111 | 112 | int save_conf(void) 113 | { 114 | uint8_t ret = flash_erase(APP_CONF_ADDR, 2048); 115 | if (ret != HAL_OK) 116 | d_info("conf: failed to erase flash\n"); 117 | ret = flash_write(APP_CONF_ADDR, offsetof(csa_t, _end_save), (uint8_t *)&csa); 118 | 119 | if (ret == HAL_OK) { 120 | d_info("conf: save to flash successed, size: %d\n", offsetof(csa_t, _end_save)); 121 | return 0; 122 | } else { 123 | d_error("conf: save to flash error\n"); 124 | return 1; 125 | } 126 | } 127 | 128 | 129 | int flash_erase(uint32_t addr, uint32_t len) 130 | { 131 | int ret = -1; 132 | uint32_t err_sector = 0xffffffff; 133 | FLASH_EraseInitTypeDef f; 134 | 135 | uint32_t ofs = addr & ~0x08000000; 136 | f.TypeErase = FLASH_TYPEERASE_PAGES; 137 | f.Banks = FLASH_BANK_1; 138 | f.Page = ofs / 2048; 139 | f.NbPages = (ofs + len) / 2048 - f.Page; 140 | if ((ofs + len) % 2048) 141 | f.NbPages++; 142 | 143 | ret = HAL_FLASH_Unlock(); 144 | if (ret == HAL_OK) 145 | ret = HAL_FLASHEx_Erase(&f, &err_sector); 146 | ret |= HAL_FLASH_Lock(); 147 | d_debug("nvm erase: %08lx +%08lx (%ld %ld), %08lx, ret: %d\n", addr, len, f.Page, f.NbPages, err_sector, ret); 148 | return ret; 149 | } 150 | 151 | int flash_write(uint32_t addr, uint32_t len, const uint8_t *buf) 152 | { 153 | int ret = -1; 154 | 155 | uint64_t *dst_dat = (uint64_t *) addr; 156 | int cnt = (len + 7) / 8; 157 | uint64_t *src_dat = (uint64_t *)buf; 158 | 159 | ret = HAL_FLASH_Unlock(); 160 | for (int i = 0; ret == HAL_OK && i < cnt; i++) { 161 | uint64_t dat = get_unaligned32((uint8_t *)(src_dat + i)); 162 | dat |= (uint64_t)get_unaligned32((uint8_t *)(src_dat + i) + 4) << 32; 163 | ret = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, (uint32_t)(dst_dat + i), dat); 164 | } 165 | ret |= HAL_FLASH_Lock(); 166 | 167 | d_verbose("nvm write: %p %ld(%d), ret: %d\n", dst_dat, len, cnt, ret); 168 | return ret; 169 | } 170 | 171 | 172 | #define t_name(expr) \ 173 | (_Generic((expr), \ 174 | int8_t: "b", uint8_t: "B", \ 175 | int16_t: "h", uint16_t: "H", \ 176 | int32_t: "i", uint32_t: "I", \ 177 | int: "i", \ 178 | bool: "b", \ 179 | float: "f", \ 180 | char *: "[c]", \ 181 | uint8_t *: "[B]", \ 182 | regr_t: "H,H", \ 183 | regr_t *: "{H,H}", \ 184 | default: "-")) 185 | 186 | 187 | #define CSA_SHOW(_p, _x, _desc) \ 188 | d_debug(" [ 0x%04x, %d, \"%s\", " #_p ", \"" #_x "\", \"%s\" ],\n", \ 189 | offsetof(csa_t, _x), sizeof(csa._x), t_name(csa._x), _desc); 190 | 191 | #define CSA_SHOW_SUB(_p, _x, _y_t, _y, _desc) \ 192 | d_debug(" [ 0x%04x, %d, \"%s\", " #_p ", \"" #_x "_" #_y "\", \"%s\" ],\n", \ 193 | offsetof(csa_t, _x) + offsetof(_y_t, _y), sizeof(csa._x._y), t_name(csa._x._y), _desc); 194 | 195 | void csa_list_show(void) 196 | { 197 | d_info("csa_list_show:\n\n"); 198 | while (frame_free_head.len < FRAME_MAX - 5); 199 | 200 | CSA_SHOW(1, magic_code, "Magic code: 0xcdcd"); 201 | CSA_SHOW(1, conf_ver, "Config version"); 202 | CSA_SHOW(0, conf_from, "0: default config, 1: all from flash, 2: partly from flash"); 203 | CSA_SHOW(0, do_reboot, "1: reboot to bl, 2: reboot to app"); 204 | CSA_SHOW(0, save_conf, "Write 1 to save current config to flash"); 205 | d_info("\n"); 206 | 207 | CSA_SHOW_SUB(1, bus_cfg, cdctl_cfg_t, mac, "RS-485 port id, range: 0~254"); 208 | CSA_SHOW_SUB(0, bus_cfg, cdctl_cfg_t, baud_l, "RS-485 baud rate for first byte"); 209 | CSA_SHOW_SUB(0, bus_cfg, cdctl_cfg_t, baud_h, "RS-485 baud rate for follow bytes"); 210 | CSA_SHOW_SUB(1, bus_cfg, cdctl_cfg_t, filter_m, "Multicast address"); 211 | CSA_SHOW_SUB(0, bus_cfg, cdctl_cfg_t, mode, "0: Arbitration, 1: Break Sync"); 212 | CSA_SHOW_SUB(0, bus_cfg, cdctl_cfg_t, tx_permit_len, "Allow send wait time"); 213 | CSA_SHOW_SUB(0, bus_cfg, cdctl_cfg_t, max_idle_len, "Max idle wait time for BS mode"); 214 | CSA_SHOW_SUB(0, bus_cfg, cdctl_cfg_t, tx_pre_len, " Active TX_EN before TX"); 215 | d_debug("\n"); 216 | 217 | CSA_SHOW(0, dbg_en, "1: Report debug message to host, 0: do not report"); 218 | d_info("\n"); 219 | 220 | CSA_SHOW(1, qxchg_mcast, "Quick-exchange multicast data slice"); 221 | CSA_SHOW(1, qxchg_set, "Config the write data components for quick-exchange channel"); 222 | CSA_SHOW(1, qxchg_ret, "Config the return data components for quick-exchange channel"); 223 | d_info("\n"); 224 | 225 | CSA_SHOW(1, dbg_raw_msk, "Config which raw debug data to be send"); 226 | CSA_SHOW(0, dbg_raw_th, "Config raw debug data package size"); 227 | CSA_SHOW(1, dbg_raw[0], "Config raw debug for plot0"); 228 | CSA_SHOW(1, dbg_raw[1], "Config raw debug for plot1"); 229 | d_info("\n"); 230 | 231 | CSA_SHOW(0, ref_volt, "Motor driver reference voltage, unit: mV"); 232 | CSA_SHOW(0, md_val, "Motor driver md[2:0] pin value"); 233 | CSA_SHOW(0, set_home, "Write 1 set home position"); 234 | CSA_SHOW(0, drv_mo, "MO pin state of drv chip, for debug"); 235 | CSA_SHOW(0, lim_en, "Enable limit switch"); 236 | d_debug("\n"); 237 | 238 | CSA_SHOW(0, tc_pos, "Set target position"); 239 | CSA_SHOW(0, tc_speed, "Set target speed"); 240 | CSA_SHOW(0, tc_accel, "Set target accel"); 241 | CSA_SHOW(0, tc_accel_emg, "Set emergency accel"); 242 | d_debug("\n"); 243 | 244 | CSA_SHOW_SUB(0, pid_pos, pid_i_t, kp, ""); 245 | CSA_SHOW_SUB(0, pid_pos, pid_i_t, ki, ""); 246 | CSA_SHOW_SUB(0, pid_pos, pid_i_t, kd, ""); 247 | //CSA_SHOW_SUB(0, pid_pos, pid_i_t, out_min, ""); 248 | //CSA_SHOW_SUB(0, pid_pos, pid_i_t, out_max, ""); 249 | CSA_SHOW(0, cal_pos, "PID input position"); 250 | CSA_SHOW(0, cal_speed, "PID output speed"); 251 | d_info("\n"); 252 | 253 | CSA_SHOW(0, state, "0: disable drive, 1: enable drive"); 254 | d_debug("\n"); 255 | 256 | d_debug(" // --------------- Follows are not writable: -------------------\n"); 257 | CSA_SHOW(0, tc_state, "t_curve: 0: stop, 1: run"); 258 | CSA_SHOW(0, cur_pos, "Motor current position"); 259 | CSA_SHOW(0, tc_vc, "Motor current speed"); 260 | CSA_SHOW(0, tc_ac, "Motor current accel"); 261 | d_debug("\n"); 262 | 263 | CSA_SHOW(0, loop_cnt, "Count for plot"); 264 | CSA_SHOW(0, string_test, "String test"); 265 | d_debug("\n"); 266 | while (frame_free_head.len < FRAME_MAX - 5); 267 | } 268 | -------------------------------------------------------------------------------- /mdrv_fw/usr/debug_config.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (MIT License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #ifndef __DEBUG_CONFIG_H__ 11 | #define __DEBUG_CONFIG_H__ 12 | 13 | #include "arch_wrapper.h" 14 | 15 | #define DBG_UART USART1 16 | 17 | 18 | static inline void arch_dbg_tx(const uint8_t *buf, uint16_t len) 19 | { 20 | for (uint16_t i = 0; i < len; i++) { 21 | while (!(DBG_UART->ISR & UART_FLAG_TXE)); // UART_FLAG_TXFE 22 | DBG_UART->TDR = *buf++; 23 | } 24 | } 25 | 26 | #endif 27 | -------------------------------------------------------------------------------- /mdrv_fw/usr/pid_i.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (MIT License) 3 | * 4 | * Copyright (c) 2016, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: http://brettbeauregard.com/blog/2011/04/improving-the-beginners-pid-introduction/ 8 | * Modified by: Duke Fong 9 | */ 10 | 11 | #include "cd_utils.h" 12 | #include "pid_i.h" 13 | #include "app_main.h" 14 | 15 | #define HIST_LEN 3 16 | static int32_t hist[HIST_LEN] = { 0 }; 17 | 18 | float pid_i_compute(pid_i_t *pid, int input) 19 | { 20 | int error, delta_input; 21 | float output; 22 | 23 | error = pid->target - input; 24 | pid->i_term += pid->_ki * error; 25 | pid->i_term = clip(pid->i_term, pid->out_min, pid->out_max); 26 | 27 | float kp_term = pid->kp * error; 28 | 29 | delta_input = input - pid->last_input; // delta_input = -delta_error 30 | pid->last_input = input; 31 | 32 | for (int i = 0; i < HIST_LEN - 1; i++) 33 | hist[i] = hist[i + 1]; 34 | hist[HIST_LEN - 1] = delta_input; 35 | 36 | float di_avg = 0; 37 | for (int i = 0; i < HIST_LEN; i++) 38 | di_avg += hist[i]; 39 | di_avg = di_avg / (float)HIST_LEN; 40 | 41 | output = kp_term + pid->i_term - pid->_kd * di_avg; 42 | output = clip(output, pid->out_min, pid->out_max); 43 | return output; 44 | } 45 | 46 | float pid_i_compute_no_d(pid_i_t *pid, int input) 47 | { 48 | int error; 49 | float output; 50 | 51 | error = pid->target - input; 52 | 53 | pid->i_term += pid->_ki * error; 54 | pid->i_term = clip(pid->i_term, pid->out_min, pid->out_max); 55 | pid->last_input = input; 56 | 57 | output = pid->kp * error + pid->i_term; 58 | output = clip(output, pid->out_min, pid->out_max); 59 | return output; 60 | } 61 | 62 | 63 | void pid_i_reset(pid_i_t *pid, int input, float output) 64 | { 65 | pid->last_input = input; 66 | pid->i_term = clip(output, pid->out_min, pid->out_max); 67 | for (int i = 0; i < HIST_LEN; i++) 68 | hist[i] = 0; 69 | } 70 | 71 | void pid_i_init(pid_i_t *pid, bool reset) 72 | { 73 | pid->_ki = pid->ki * pid->period; 74 | pid->_kd = pid->kd / pid->period; 75 | 76 | if (reset) 77 | pid_i_reset(pid, 0, 0); 78 | } 79 | -------------------------------------------------------------------------------- /mdrv_fw/usr/pid_i.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (MIT License) 3 | * 4 | * Copyright (c) 2016, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: http://brettbeauregard.com/blog/2011/04/improving-the-beginners-pid-introduction/ 8 | * Modified by: Duke Fong 9 | */ 10 | 11 | #ifndef __PID_I_H__ 12 | #define __PID_I_H__ 13 | 14 | typedef struct { 15 | // configuration 16 | float kp, ki, kd; 17 | float out_min, out_max; 18 | float period; 19 | 20 | int target; 21 | 22 | // runtime and internal 23 | float i_term; 24 | int last_input; 25 | float _ki, _kd; 26 | } pid_i_t; 27 | 28 | float pid_i_compute(pid_i_t *pid, int input); 29 | 30 | float pid_i_compute_no_d(pid_i_t *pid, int input); 31 | 32 | inline void pid_i_set_target(pid_i_t *pid, int target) 33 | { 34 | pid->target = target; 35 | } 36 | 37 | void pid_i_reset(pid_i_t *pid, int input, float output); 38 | 39 | // invoke after ki or kd changed 40 | void pid_i_init(pid_i_t *pid, bool reset); 41 | 42 | #endif 43 | -------------------------------------------------------------------------------- /mdrv_fw/usr/raw_dbg.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Software License Agreement (BSD License) 3 | * 4 | * Copyright (c) 2017, DUKELEC, Inc. 5 | * All rights reserved. 6 | * 7 | * Author: Duke Fong 8 | */ 9 | 10 | #include "app_main.h" 11 | 12 | 13 | void raw_dbg(int idx) 14 | { 15 | static cd_frame_t *frm_raw[2] = { NULL }; 16 | static bool frm_less = false; 17 | 18 | if (!(csa.dbg_raw_msk & (1 << idx))) { 19 | if (frm_raw[idx]) { 20 | cd_list_put(&frame_free_head, frm_raw[idx]); 21 | frm_raw[idx] = NULL; 22 | } 23 | return; 24 | } 25 | 26 | if (frm_less && frame_free_head.len >= FRAME_MAX - 5) 27 | frm_less = false; 28 | 29 | if (!frm_less && !frm_raw[idx]) { 30 | if (frame_free_head.len < 5) { 31 | frm_less = true; 32 | return; 33 | 34 | } else { 35 | frm_raw[idx] = cd_list_get(&frame_free_head); 36 | frm_raw[idx]->dat[0] = csa.bus_cfg.mac; 37 | frm_raw[idx]->dat[1] = 0x0; 38 | frm_raw[idx]->dat[2] = 6; 39 | frm_raw[idx]->dat[3] = 0x40 | idx; 40 | frm_raw[idx]->dat[4] = 0xa; 41 | put_unaligned32(csa.loop_cnt, frm_raw[idx]->dat + 5); 42 | } 43 | } 44 | if (!frm_raw[idx]) 45 | return; 46 | 47 | for (int i = 0; i < 6; i++) { // len of csa.dbg_raw 48 | regr_t *regr = &csa.dbg_raw[idx][i]; 49 | if (!regr->size) 50 | break; 51 | uint8_t *dst_dat = frm_raw[idx]->dat + frm_raw[idx]->dat[2] + 3; 52 | memcpy(dst_dat, ((void *) &csa) + regr->offset, regr->size); 53 | frm_raw[idx]->dat[2] += regr->size; 54 | } 55 | 56 | if (frm_raw[idx]->dat[2] >= csa.dbg_raw_th) { 57 | cdctl_put_tx_frame(&r_dev.cd_dev, frm_raw[idx]); 58 | frm_raw[idx] = NULL; 59 | } 60 | } 61 | --------------------------------------------------------------------------------