├── README ├── TOOLCHAIN ├── adventure ├── .clang.bc ├── Makefile ├── README.adventure.txt ├── crc.c ├── data.c ├── done.c ├── extern.h ├── hdr.h ├── init.c ├── io.c ├── main.c ├── memmap ├── orig │ ├── Makefile │ ├── Makefile.bsd │ ├── Makefrag │ ├── adventure.6 │ ├── crc.c │ ├── data.c │ ├── done.c │ ├── extern.h │ ├── glorkz │ ├── hdr.h │ ├── init.c │ ├── io.c │ ├── main.c │ ├── save.c │ ├── setup.c │ ├── subr.c │ ├── vocab.c │ └── wizard.c ├── putget.s ├── show.c ├── show.h ├── subr.c ├── uart.c ├── vectors.s ├── vocab.c └── wizard.c ├── blinker01 ├── Makefile ├── README.blinker01.txt ├── blinker01.s ├── flash.ld └── memmap ├── blinker02 ├── Makefile ├── README.blinker02.txt ├── blinker02.c ├── flash.ld └── vectors.s ├── blinker03 ├── Makefile ├── README.blinker03.txt ├── blinker03.c ├── flash.ld └── vectors.s ├── blinker04 ├── Makefile ├── README.blinker04.txt ├── blinker04.c ├── flash.ld └── vectors.s ├── blinker05 ├── Makefile ├── README.blinker05.txt ├── blinker05.c ├── flash.ld └── vectors.s ├── blinker06 ├── Makefile ├── README.blinker06.txt ├── blinker06.c ├── memmap └── vectors.s ├── blinker07 ├── Makefile ├── README.blinker07.txt ├── blinker07.c ├── memmap └── vectors.s ├── ebay_board ├── README └── blinker01 │ ├── README.blinker01.txt │ ├── ram │ ├── Makefile │ ├── blinker01.s │ ├── jlink.cfg │ ├── jtagkey-tiny.cfg │ ├── lpc1768.cfg │ ├── memmap │ └── signalyzer-lite.cfg │ └── rom │ ├── Makefile │ ├── blinker01.s │ ├── jlink.cfg │ ├── jtagkey-tiny.cfg │ ├── lpc1768.cfg │ ├── memmap │ └── signalyzer-lite.cfg ├── mzero ├── README ├── blinker02 │ ├── Makefile │ ├── README │ ├── blinker02.c │ ├── memmap │ └── vectors.s ├── blinker03 │ ├── Makefile │ ├── README │ ├── blinker03.c │ ├── memmap │ └── vectors.s ├── blinker04 │ ├── Makefile │ ├── README │ ├── blinker04.c │ ├── memmap │ └── vectors.s ├── blinker05 │ ├── Makefile │ ├── README │ ├── blinker05.c │ ├── memmap │ └── vectors.s ├── blinker06 │ ├── Makefile │ ├── README │ ├── blinker06.c │ ├── memmap │ └── vectors.s ├── ired01 │ ├── Makefile │ ├── README │ ├── ired01.c │ ├── memmap │ └── vectors.s ├── ired02 │ ├── Makefile │ ├── README │ ├── ired02.c │ ├── memmap │ └── vectors.s ├── ired03 │ ├── Makefile │ ├── README │ ├── ired03.c │ ├── memmap │ └── vectors.s ├── promicro │ ├── Makefile │ ├── README │ ├── blinker.h │ ├── blinker01.s │ ├── blinker02.s │ ├── dumphex.c │ ├── memmap │ ├── promicro.c │ └── vectors.s ├── uart01 │ ├── Makefile │ ├── README │ ├── memmap │ ├── uart01.c │ └── vectors.s ├── uart02 │ ├── Makefile │ ├── README │ ├── memmap │ ├── uart02.c │ └── vectors.s ├── uart03 │ ├── Makefile │ ├── README │ ├── memmap │ ├── uart03.c │ └── vectors.s ├── xmega01 │ ├── Makefile │ ├── README │ ├── blinker01.s │ ├── blinker01 │ │ ├── Makefile │ │ ├── README │ │ ├── blinker01.s │ │ └── dumphex.c │ ├── blinker02.s │ ├── dumphex.c │ ├── memmap │ ├── par.c │ ├── parity.h │ ├── vectors.s │ └── xmega01.c └── xmega02 │ ├── Makefile │ ├── README │ ├── avrmap │ ├── blinker01.s │ ├── blinker02.s │ ├── blinker03.s │ ├── dumphex.c │ ├── memmap │ ├── par.c │ ├── parity.h │ ├── vectors.s │ ├── xblinker.c │ └── xmega02.c ├── pasblinker ├── README.pasblinker.txt └── pasblinker.pp ├── thread01 ├── Makefile ├── README ├── common.h ├── novectors.s ├── rommap ├── sched.c ├── threada.c ├── threadb.c ├── threadc.c ├── threadd.c └── vectors.s ├── thread02 ├── Makefile ├── README ├── common.h ├── novectors.s ├── rammap ├── rommap ├── sched.c ├── threada.c ├── threadb.c ├── threadc.c ├── threadd.c └── vectors.s └── uart01 ├── Makefile ├── README.uart01.txt ├── memmap ├── uart01.c ├── uartdiv.c └── vectors.s /README: -------------------------------------------------------------------------------- 1 | 2 | This is a collection of sample programs, in some respects building 3 | on each other for the mbed (http://mbed.org) platform. 4 | 5 | These samples are intended to demonstrate how to use the platform 6 | without using the web compiler or mbed api. This will hopefully 7 | get you kick started into learning to program the hardware directly 8 | using the reference material provided by the vendor(s). 9 | 10 | At a minimum you will need some documents, starting at 11 | 12 | http://mbed.org 13 | 14 | go to the handbook page (Handbook link top right of page) 15 | 16 | http://mbed.org/handbook 17 | 18 | At the bottom of the page (before the comments start) go to the 19 | hardware page (mbed NXP LPC1768 link) 20 | 21 | http://mbed.org/handbook/mbed-NXP-LPC1768 22 | 23 | Near the bottom of that page are two documents you need, first 24 | is the schematic 25 | 26 | http://mbed.org/media/uploads/chris/mbed-005.1.pdf 27 | 28 | The second is the LPC1768 users manual 29 | 30 | http://ics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc17xx.pdf 31 | 32 | 33 | Need a place for these, notes to self about building binutils and gcc 34 | from sources: 35 | 36 | 37 | ../configure --target=arm-none-eabi --prefix=/gnuarm --disable-werror? 38 | ../configure --target=arm-none-eabi --prefix=/gnuarm --disable-werror --disable-nls 39 | 40 | ../configure --target=arm-none-eabi --prefix=/gnuarm --disable-libssp --disable-libc --disable-libgcc 41 | important to use make all-gcc and install-gcc instead of just make and make install 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | Start with the blinker programs, blinker01, blinker02, blinker03, etc. 60 | 61 | 62 | -------------------------------------------------------------------------------- /TOOLCHAIN: -------------------------------------------------------------------------------- 1 | 2 | Toolchain. I run on linux, these examples are tested on linux, other 3 | than subtle differences like rm vs del in the Makefile, you should be 4 | able to use these examples on a windows or mac system. 5 | 6 | My code is written to be somewhat generic, but the assembly and in 7 | particular the linker script are specific to the gnu tools because 8 | that is how the toolchain world works unfortunately. Since everyone 9 | can get the gnu tools, they are available for Windows, Mac and Linux, 10 | but not everyone can or wants to use the pay-for tools (or free tools 11 | that are specific to one operating system) these examples are written 12 | and tested using a gnu tool chain. My personal style is such that 13 | this code tends to port across the various versions of the gnu tools 14 | also it is not specific to arm-none-eabi, arm-none-gnueabi, 15 | arm-linux-gnueabi and so on. You may need to change the ARMGNU line 16 | at the top of my Makefile though. 17 | 18 | So, if you are running Ubuntu Linux or a derivative you might only 19 | need to do this: 20 | 21 | apt-get install gcc-arm-linux-gnueabi binutils-arm-linux-gnueabi 22 | 23 | Or you can go here and get a pre-built for your operating system 24 | 25 | https://launchpad.net/gcc-arm-embedded 26 | 27 | Or in another one of my github repositories you can get a build_arm 28 | script 29 | 30 | https://github.com/dwelch67/build_gcc 31 | 32 | Which builds a cross compiler from sources. Here again tested on 33 | Linux (Ubuntu derivative) I used to use prior versions of this 34 | script on Windows, but I gave up on maintaining that...This latter 35 | build from the script is what I use as my daily driver arm toolchain. 36 | 37 | Easier to come by but you can also get the llvm/clang toolchain as 38 | an alternate compiler, it is not like gcc, one toolchain supports 39 | all targets (normally). I still use gnu binutils to do the assembling 40 | and linking when using clang/llvm as a compiler (that part is target 41 | specific for llvm). So for this last solution you still need binutils 42 | (which is easier to get built and working than gcc). And my build_gcc 43 | repo has a build_llvm script that I use for clang/llvm. 44 | -------------------------------------------------------------------------------- /adventure/.clang.bc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dwelch67/mbed_samples/d4719a508f1ee6082ee03280d0ddfb38c320bfbc/adventure/.clang.bc -------------------------------------------------------------------------------- /adventure/README.adventure.txt: -------------------------------------------------------------------------------- 1 | 2 | This is the classic game of adventure. Yeah, really, on a 3 | microcontroller. (using the 4MHz oscillator). 4 | 5 | It needs some debugging, perhaps compiler, perhaps code, who knows. 6 | 7 | The gcc.thumb2. version likes to work sometimes. The others do not. 8 | 9 | It is one of those things where you change a line of code and things 10 | break, change another and things work. 11 | 12 | The cpu clock has not been boosted in this version, running at the 13 | power on 14 | 15 | It just barely fits more than 0x3000 bytes of .bss, allocated 0x4000 16 | synthesized mallocs, over 0x3000 bytes of mallocs, have only 0x8000 17 | bytes of ram in a single chunk for all of that data. There are two 18 | other 0x4000 byte chunks. Would like to use one for the stack but 19 | need to read more about those other memories. Perhaps they have to 20 | be enabled. 21 | -------------------------------------------------------------------------------- /adventure/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 32K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /adventure/orig/Makefile: -------------------------------------------------------------------------------- 1 | adventure.6 2 | crc.c 3 | done.c 4 | extern.h 5 | glorkz 6 | hdr.h 7 | init.c 8 | io.c 9 | main.c 10 | Makefile.bsd 11 | Makefrag 12 | save.c 13 | setup.c 14 | subr.c 15 | vocab.c 16 | wizard.c 17 | -------------------------------------------------------------------------------- /adventure/orig/Makefile.bsd: -------------------------------------------------------------------------------- 1 | # $NetBSD: Makefile,v 1.13 2003/11/16 14:14:18 lukem Exp $ 2 | # @(#)Makefile 8.1 (Berkeley) 6/12/93 3 | 4 | PROG= adventure 5 | SRCS= main.c init.c done.c save.c subr.c vocab.c wizard.c io.c data.c crc.c 6 | MAN= adventure.6 7 | HIDEGAME=hidegame 8 | CLEANFILES+=setup setup.lo data.c 9 | 10 | data.c: glorkz setup 11 | ${_MKTARGET_CREATE} 12 | ./setup ${.CURDIR}/glorkz > data.c 13 | 14 | setup.lo: hdr.h 15 | setup: setup.lo 16 | ${_MKTARGET_LINK} 17 | ${HOST_LINK.c} -o ${.TARGET} ${.ALLSRC} 18 | 19 | .include 20 | -------------------------------------------------------------------------------- /adventure/orig/Makefrag: -------------------------------------------------------------------------------- 1 | # Makefrag - makefile fragment for adventure 2 | # 3 | # Copyright (c) 1997, 1998 Joseph Samuel Myers. 4 | # All rights reserved. 5 | # 6 | # Redistribution and use in source and binary forms, with or without 7 | # modification, are permitted provided that the following conditions 8 | # are met: 9 | # 1. Redistributions of source code must retain the above copyright 10 | # notice, this list of conditions and the following disclaimer. 11 | # 2. Redistributions in binary form must reproduce the above copyright 12 | # notice, this list of conditions and the following disclaimer in the 13 | # documentation and/or other materials provided with the distribution. 14 | # 3. The name of the author may not be used to endorse or promote products 15 | # derived from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 | # BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 | # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 | # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 | # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 | # SUCH DAMAGE. 28 | 29 | adventure_CLEANFILES := data.c 30 | adventure_DIRS := $(GAMESDIR) $(MAN6DIR) 31 | 32 | adventure_all: adventure/adventure adventure/adventure.6 33 | 34 | adventure/data.c: adventure/glorkz adventure/setup 35 | adventure/setup $< >$@ 36 | 37 | adventure_install: adventure_all 38 | $(INSTALL_BINARY) adventure/adventure $(INSTALL_PREFIX)$(GAMESDIR)/adventure 39 | $(HIDE_GAME) adventure 40 | $(INSTALL_MANUAL) adventure/adventure.6 41 | -------------------------------------------------------------------------------- /adventure/orig/adventure.6: -------------------------------------------------------------------------------- 1 | .\" $NetBSD: adventure.6,v 1.4 2003/08/07 09:36:50 agc Exp $ 2 | .\" 3 | .\" Copyright (c) 1991, 1993 4 | .\" The Regents of the University of California. All rights reserved. 5 | .\" 6 | .\" The game adventure was originally written in Fortran by Will Crowther 7 | .\" and Don Woods. It was later translated to C and enhanced by Jim 8 | .\" Gillogly. This code is derived from software contributed to Berkeley 9 | .\" by Jim Gillogly at The Rand Corporation. 10 | .\" 11 | .\" Redistribution and use in source and binary forms, with or without 12 | .\" modification, are permitted provided that the following conditions 13 | .\" are met: 14 | .\" 1. Redistributions of source code must retain the above copyright 15 | .\" notice, this list of conditions and the following disclaimer. 16 | .\" 2. Redistributions in binary form must reproduce the above copyright 17 | .\" notice, this list of conditions and the following disclaimer in the 18 | .\" documentation and/or other materials provided with the distribution. 19 | .\" 3. Neither the name of the University nor the names of its contributors 20 | .\" may be used to endorse or promote products derived from this software 21 | .\" without specific prior written permission. 22 | .\" 23 | .\" THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 | .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 | .\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 | .\" ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 | .\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 | .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 | .\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 | .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 | .\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 | .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 | .\" SUCH DAMAGE. 34 | .\" 35 | .\" @(#)adventure.6 8.1 (Berkeley) 5/31/93 36 | .\" 37 | .Dd May 31, 1993 38 | .Dt ADVENTURE 6 39 | .Os 40 | .Sh NAME 41 | .Nm adventure 42 | .Nd an exploration game 43 | .Sh SYNOPSIS 44 | .Nm 45 | .Op saved-file 46 | .Sh DESCRIPTION 47 | The object of the game is to locate and explore Colossal Cave, find the 48 | treasures hidden there, and bring them back to the building with you. 49 | The program is self-descriptive to a point, but part of the game is to 50 | discover its rules. 51 | .Pp 52 | To terminate a game, enter 53 | .Dq quit ; 54 | to save a game for later resumption, enter 55 | .Dq suspend . 56 | -------------------------------------------------------------------------------- /adventure/putget.s: -------------------------------------------------------------------------------- 1 | 2 | .thumb 3 | 4 | .thumb_func 5 | .globl PUT32 6 | PUT32: 7 | str r1,[r0] 8 | bx lr 9 | 10 | .thumb_func 11 | .globl GET32 12 | GET32: 13 | ldr r0,[r0] 14 | bx lr 15 | 16 | -------------------------------------------------------------------------------- /adventure/show.c: -------------------------------------------------------------------------------- 1 | 2 | #include "show.h" 3 | #include "hdr.h" 4 | 5 | void hexstring ( unsigned int d, unsigned int cr ); 6 | 7 | static unsigned int heap_off; 8 | static unsigned int prand; 9 | 10 | //static char heap_data[0x10000]; 11 | 12 | void show_init ( void ) 13 | { 14 | heap_off=0x10004000; 15 | prand=0x1234; 16 | } 17 | 18 | int not_atoi ( char *s ) 19 | { 20 | int x; 21 | 22 | x=0; 23 | while(*s) 24 | { 25 | x*=10; 26 | x+=(*s&0xF); 27 | s++; 28 | } 29 | return(x); 30 | } 31 | 32 | char get_onechar ( void ) 33 | { 34 | char x; 35 | 36 | x=uart_getc(); 37 | if(x==0x0D) x=0x0A; 38 | show_onechar(x); 39 | return(x); 40 | } 41 | 42 | void show_onechar ( char c ) 43 | { 44 | if(c==0x0A) uart_putc(0x0D); 45 | uart_putc(c); 46 | } 47 | 48 | void show_string ( char *s ) 49 | { 50 | while(*s) 51 | { 52 | show_onechar(*s); 53 | s++; 54 | } 55 | } 56 | 57 | void show_int ( int d ) 58 | { 59 | char s[16]; 60 | int off; 61 | 62 | off=0; 63 | while(d) 64 | { 65 | s[off++]=d%10; 66 | d/=10; 67 | } 68 | if(off) 69 | { 70 | while(off) 71 | { 72 | off--; 73 | show_onechar(s[off]+0x30); 74 | } 75 | } 76 | else 77 | { 78 | show_onechar(0x30); 79 | } 80 | } 81 | 82 | void * not_malloc ( unsigned int len ) 83 | { 84 | void *ret; 85 | 86 | // ret=(void *)&heap_data[heap_off]; 87 | ret=(void *)heap_off; 88 | heap_off+=len; 89 | 90 | //if(heap_off>=0x10007F00) hexstring(heap_off,1); 91 | return(ret); 92 | } 93 | 94 | void * tbuf_malloc ( unsigned int len ) 95 | { 96 | void *ret; 97 | 98 | // ret=(void *)&heap_data[heap_off]; 99 | ret=(void *)heap_off; 100 | //if(heap_off>=0x10007F00) hexstring(heap_off,1); 101 | return(ret); 102 | } 103 | 104 | 105 | 106 | 107 | void copystr ( char *s, char *d ) 108 | { 109 | while(*s) 110 | { 111 | *d=*s; 112 | d++; 113 | s++; 114 | } 115 | } 116 | 117 | int weq ( char *a, char *b ) 118 | { 119 | int ra; 120 | 121 | for(ra=0;ra<5;ra++) 122 | { 123 | if(*a!=*b) return(0); 124 | if(*a==0) return(1); 125 | a++; 126 | b++; 127 | } 128 | return(1); 129 | } 130 | 131 | int length ( const char *s ) 132 | { 133 | int ra; 134 | 135 | ra=0; 136 | while(*s) 137 | { 138 | ra++; 139 | s++; 140 | } 141 | return(ra+1); 142 | } 143 | 144 | 145 | void not_memcpy( char *d, char *s, int len) 146 | { 147 | while(len--) 148 | { 149 | *d=*s; 150 | d++; 151 | s++; 152 | } 153 | } 154 | 155 | void err ( int i, char *s ) 156 | { 157 | if(s) 158 | { 159 | show_string(s); 160 | } 161 | while(1) continue; 162 | } 163 | 164 | void errx(int i,char *s) 165 | { 166 | err(i,s); 167 | } 168 | 169 | unsigned int randy ( void ) 170 | { 171 | if(prand&1) 172 | { 173 | prand=prand>>1; 174 | prand=prand^0xBF9EC099; 175 | } 176 | else 177 | { 178 | prand=prand>>1; 179 | } 180 | return(prand); 181 | } 182 | 183 | -------------------------------------------------------------------------------- /adventure/show.h: -------------------------------------------------------------------------------- 1 | 2 | void uart_putc ( unsigned int ); 3 | unsigned int uart_getc ( void ); 4 | 5 | char get_onechar ( void ); 6 | void show_onechar ( char c ); 7 | void show_string ( char *s ); 8 | void show_int ( int i ); 9 | void *not_malloc ( unsigned int ); 10 | void *tbuf_malloc ( unsigned int ); 11 | 12 | void srandy ( unsigned int x ); 13 | unsigned int randy ( void ); 14 | void not_memcpy( char *d, char *s, int len); 15 | 16 | int not_atoi ( char *s ); 17 | 18 | void err ( int i, char *s ); 19 | void errx(int i,char *s); 20 | unsigned int randy ( void ); 21 | -------------------------------------------------------------------------------- /adventure/uart.c: -------------------------------------------------------------------------------- 1 | 2 | void PUT32 ( unsigned int , unsigned int ); 3 | unsigned int GET32 ( unsigned int ); 4 | 5 | #define PINSEL0 0x4002C000 6 | 7 | #define U0ACR 0x4000C020 8 | #define U0LCR 0x4000C00C 9 | #define U0DLL 0x4000C000 10 | #define U0DLM 0x4000C004 11 | #define U0IER 0x4000C004 12 | #define U0FDR 0x4000C028 13 | #define U0FCR 0x4000C008 14 | #define U0TER 0x4000C030 15 | 16 | #define U0LSR 0x4000C014 17 | #define U0THR 0x4000C000 18 | #define U0RBR 0x4000C000 19 | 20 | //------------------------------------------------------------------- 21 | void uart_putc ( unsigned int x ) 22 | { 23 | while (( GET32(U0LSR) & (1<<5)) == 0) continue; 24 | PUT32(U0THR,x); 25 | } 26 | //------------------------------------------------------------------- 27 | unsigned int uart_getc ( void ) 28 | { 29 | while (( GET32(U0LSR) & (1<<0)) == 0) continue; 30 | return(GET32(U0RBR)); 31 | } 32 | //------------------------------------------------------------------- 33 | void hexstring ( unsigned int d, unsigned int cr ) 34 | { 35 | //unsigned int ra; 36 | unsigned int rb; 37 | unsigned int rc; 38 | 39 | rb=32; 40 | while(1) 41 | { 42 | rb-=4; 43 | rc=(d>>rb)&0xF; 44 | if(rc>9) rc+=0x37; else rc+=0x30; 45 | uart_putc(rc); 46 | if(rb==0) break; 47 | } 48 | if(cr) 49 | { 50 | uart_putc(0x0D); 51 | uart_putc(0x0A); 52 | } 53 | else 54 | { 55 | uart_putc(0x20); 56 | } 57 | } 58 | //------------------------------------------------------------------- 59 | void uart_init ( void ) 60 | { 61 | unsigned int ra; 62 | 63 | ra=GET32(PINSEL0); 64 | ra&=(~(0xF<<4)); 65 | ra|=0x5<<4; 66 | PUT32(PINSEL0,ra); 67 | //1000000 Hz PCLK 9600 baud 68 | //dl 0x04 mul 0x08 div 0x05 baud 9615 diff 15 69 | PUT32(U0ACR,0x00); //no autobaud 70 | PUT32(U0LCR,0x83); //dlab=1; N81 71 | PUT32(U0DLL,0x04); //dl = 0x0004 72 | PUT32(U0DLM,0x00); //dl = 0x0004 73 | PUT32(U0IER,0x00); //no interrupts 74 | PUT32(U0LCR,0x03); //dlab=0; N81 75 | PUT32(U0IER,0x00); //no interrupts 76 | PUT32(U0FDR,(0x8<<4)|(0x5<<0)); //mul 0x08, div 0x05 77 | PUT32(U0FCR,(1<<2)|(1<<1)|(1<<0)); //enable and reset fifos 78 | PUT32(U0TER,(1<<7)); //transmit enable 79 | 80 | PUT32(U0THR,'H'); 81 | PUT32(U0THR,'I'); 82 | hexstring(0x12345678,1); 83 | } 84 | //------------------------------------------------------------------- 85 | //------------------------------------------------------------------- 86 | -------------------------------------------------------------------------------- /adventure/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | .globl __div0 30 | __div0: 31 | 32 | .thumb_func 33 | hang: b . 34 | 35 | .thumb_func 36 | .globl _start 37 | _start: 38 | ldr r0,=0x10000000; 39 | ldr r1,=0x10008000; 40 | 41 | mov r2,#0 42 | zero_bss: 43 | str r2,[r0] 44 | add r0,#4 45 | cmp r0,r1 46 | bne zero_bss; 47 | 48 | bl notmain 49 | b . 50 | 51 | .thumb_func 52 | .globl PUT32 53 | PUT32: 54 | str r1,[r0] 55 | bx lr 56 | 57 | .thumb_func 58 | .globl GET32 59 | GET32: 60 | ldr r0,[r0] 61 | bx lr 62 | 63 | -------------------------------------------------------------------------------- /adventure/wizard.c: -------------------------------------------------------------------------------- 1 | /* $NetBSD: wizard.c,v 1.11 2003/08/07 09:36:51 agc Exp $ */ 2 | 3 | /*- 4 | * Copyright (c) 1991, 1993 5 | * The Regents of the University of California. All rights reserved. 6 | * 7 | * The game adventure was originally written in Fortran by Will Crowther 8 | * and Don Woods. It was later translated to C and enhanced by Jim 9 | * Gillogly. This code is derived from software contributed to Berkeley 10 | * by Jim Gillogly at The Rand Corporation. 11 | * 12 | * Redistribution and use in source and binary forms, with or without 13 | * modification, are permitted provided that the following conditions 14 | * are met: 15 | * 1. Redistributions of source code must retain the above copyright 16 | * notice, this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright 18 | * notice, this list of conditions and the following disclaimer in the 19 | * documentation and/or other materials provided with the distribution. 20 | * 3. Neither the name of the University nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 | * SUCH DAMAGE. 35 | */ 36 | 37 | //static char sccsid[] = "@(#)wizard.c 8.1 (Berkeley) 6/2/93"; 38 | //__RCSID("$NetBSD: wizard.c,v 1.11 2003/08/07 09:36:51 agc Exp $"); 39 | 40 | #include "hdr.h" 41 | #include "extern.h" 42 | 43 | #include "show.h" 44 | 45 | char magic[6]; 46 | 47 | void 48 | poof() 49 | { 50 | copystr(DECR('d', 'w', 'a', 'r', 'f'),magic); 51 | latncy = 45; 52 | } 53 | 54 | 55 | int 56 | ran(range) 57 | int range; 58 | { 59 | int i; 60 | 61 | i = randy() % range; 62 | return (i); 63 | } 64 | -------------------------------------------------------------------------------- /blinker01/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | all : blinker01.bin 7 | 8 | blinker01.bin : blinker01.s flash.ld 9 | $(ARMGNU)-as blinker01.s -o blinker01.o 10 | $(ARMGNU)-ld -o blinker01.elf blinker01.o -T flash.ld 11 | $(ARMGNU)-objdump -D blinker01.elf > blinker01.list 12 | $(ARMGNU)-objcopy blinker01.elf blinker01.bin -O binary 13 | 14 | clean: 15 | rm -f *.bin 16 | rm -f *.o 17 | rm -f *.elf 18 | rm -f *.list 19 | 20 | -------------------------------------------------------------------------------- /blinker01/blinker01.s: -------------------------------------------------------------------------------- 1 | 2 | /*blinker1.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | dowait: 33 | ldr r7,=0x20000 34 | dowaitloop: 35 | sub r7,#1 36 | bne dowaitloop 37 | bx lr 38 | 39 | .thumb_func 40 | .globl _start 41 | _start: 42 | ldr r0,=0x2009C022 43 | ldrb r1,[r0] 44 | mov r2,#0xB4 45 | orr r1,r2 46 | strb r1,[r0] 47 | 48 | ldr r0,=0x2009C03A 49 | ldr r1,=0x2009C03E 50 | ldr r2,=0x80 51 | ldr r3,=0x20 52 | ldr r4,=0x10 53 | ldr r5,=0x04 54 | 55 | mainloop: 56 | strb r2,[r0] 57 | strb r3,[r1] 58 | strb r4,[r1] 59 | strb r5,[r1] 60 | bl dowait 61 | strb r2,[r1] 62 | strb r3,[r0] 63 | strb r4,[r1] 64 | strb r5,[r1] 65 | bl dowait 66 | strb r2,[r1] 67 | strb r3,[r1] 68 | strb r4,[r0] 69 | strb r5,[r1] 70 | bl dowait 71 | strb r2,[r1] 72 | strb r3,[r1] 73 | strb r4,[r1] 74 | strb r5,[r0] 75 | bl dowait 76 | strb r2,[r1] 77 | strb r3,[r1] 78 | strb r4,[r0] 79 | strb r5,[r1] 80 | bl dowait 81 | strb r2,[r1] 82 | strb r3,[r0] 83 | strb r4,[r1] 84 | strb r5,[r1] 85 | bl dowait 86 | b mainloop 87 | 88 | .end 89 | -------------------------------------------------------------------------------- /blinker01/flash.ld: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 5 | ram : ORIGIN = 0x10000000, LENGTH = 30K 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > rom 11 | .rodata : { *(.rodata*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker01/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker02/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 7 | AOPS = --warn --fatal-warnings 8 | 9 | COPS2 = -Wall -O2 -nostdlib -nostartfiles -ffreestanding -mcpu=cortex-m3 -march=armv7-m 10 | 11 | all : blinker02.bin 12 | 13 | vectors.o : vectors.s 14 | $(ARMGNU)-as vectors.s -o vectors.o 15 | 16 | blinker02.o : blinker02.c 17 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker02.c -o blinker02.o 18 | 19 | blinker02.bin : flash.ld vectors.o blinker02.o 20 | $(ARMGNU)-ld -o blinker02.elf -T flash.ld vectors.o blinker02.o 21 | $(ARMGNU)-objdump -D blinker02.elf > blinker02.list 22 | $(ARMGNU)-objcopy blinker02.elf blinker02.bin -O binary 23 | 24 | clean: 25 | rm -f *.bin 26 | rm -f *.o 27 | rm -f *.elf 28 | rm -f *.list 29 | 30 | -------------------------------------------------------------------------------- /blinker02/blinker02.c: -------------------------------------------------------------------------------- 1 | 2 | extern void PUT8 ( unsigned int, unsigned int ); 3 | extern unsigned int GET8 ( unsigned int ); 4 | extern void dummy ( unsigned int ); 5 | 6 | void dowait ( void ) 7 | { 8 | unsigned int ra; 9 | 10 | for(ra=0x20000;ra;ra--) 11 | { 12 | dummy(ra); 13 | } 14 | } 15 | 16 | void notmain ( void ) 17 | { 18 | unsigned int ra,rb,rc,rd,re,rf; 19 | 20 | ra=GET8(0x2009C022); 21 | ra|=0xB4; 22 | PUT8(0x2009C022,ra); 23 | 24 | 25 | ra=0x2009C03A; 26 | rb=0x2009C03E; 27 | rc=0x80; 28 | rd=0x20; 29 | re=0x10; 30 | rf=0x04; 31 | 32 | while(1) 33 | { 34 | PUT8(ra,rc); 35 | PUT8(rb,rd); 36 | PUT8(rb,re); 37 | PUT8(rb,rf); 38 | dowait(); 39 | PUT8(rb,rc); 40 | PUT8(ra,rd); 41 | PUT8(rb,re); 42 | PUT8(rb,rf); 43 | dowait(); 44 | PUT8(rb,rc); 45 | PUT8(rb,rd); 46 | PUT8(ra,re); 47 | PUT8(rb,rf); 48 | dowait(); 49 | PUT8(rb,rc); 50 | PUT8(rb,rd); 51 | PUT8(rb,re); 52 | PUT8(ra,rf); 53 | dowait(); 54 | PUT8(rb,rc); 55 | PUT8(rb,rd); 56 | PUT8(ra,re); 57 | PUT8(rb,rf); 58 | dowait(); 59 | PUT8(rb,rc); 60 | PUT8(ra,rd); 61 | PUT8(rb,re); 62 | PUT8(rb,rf); 63 | dowait(); 64 | } 65 | 66 | } 67 | 68 | -------------------------------------------------------------------------------- /blinker02/flash.ld: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 5 | ram : ORIGIN = 0x10000000, LENGTH = 30K 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > rom 11 | .rodata : { *(.rodata*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker02/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl dummy 51 | dummy: 52 | bx lr 53 | -------------------------------------------------------------------------------- /blinker03/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 7 | AOPS = --warn --fatal-warnings 8 | 9 | all : blinker03.bin 10 | 11 | vectors.o : vectors.s 12 | $(ARMGNU)-as vectors.s -o vectors.o 13 | 14 | blinker03.o : blinker03.c 15 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker03.c -o blinker03.o 16 | 17 | blinker03.thumb2.o : blinker03.c 18 | $(ARMGNU)-gcc $(COPS) -mthumb -mcpu=cortex-m3 -march=armv7-m -c blinker03.c -o blinker03.thumb2.o 19 | 20 | blinker03.bin : flash.ld vectors.o blinker03.o 21 | $(ARMGNU)-ld -o blinker03.elf -T flash.ld vectors.o blinker03.o 22 | $(ARMGNU)-objdump -D blinker03.elf > blinker03.list 23 | $(ARMGNU)-objcopy blinker03.elf blinker03.bin -O binary 24 | 25 | clean: 26 | rm -f *.bin 27 | rm -f *.o 28 | rm -f *.elf 29 | rm -f *.list 30 | 31 | -------------------------------------------------------------------------------- /blinker03/blinker03.c: -------------------------------------------------------------------------------- 1 | 2 | extern void PUT8 ( unsigned int, unsigned int ); 3 | extern unsigned int GET8 ( unsigned int ); 4 | 5 | extern void PUT32 ( unsigned int, unsigned int ); 6 | extern unsigned int GET32 ( unsigned int ); 7 | 8 | #define STCTRL 0xE000E010 9 | #define STRELOAD 0xE000E014 10 | #define STCURR 0xE000E018 11 | 12 | #define FIO1DIR2 0x2009C022 13 | #define FIO1SET2 0x2009C03A 14 | #define FIO1CLR2 0x2009C03E 15 | 16 | void dowait ( void ) 17 | { 18 | unsigned int ra; 19 | ra=1; 20 | 21 | while(ra) 22 | { 23 | if(GET32(STCTRL)&0x00010000) ra--; 24 | } 25 | } 26 | 27 | 28 | void notmain ( void ) 29 | { 30 | unsigned int ra,rb,rc,rd,re,rf; 31 | 32 | //init GPIO 33 | ra=GET8(FIO1DIR2); 34 | ra|=0xB4; 35 | PUT8(FIO1DIR2,ra); 36 | 37 | 38 | PUT32(STCTRL,0x00000004); //disabled, no ints, use cpu clock 39 | PUT32(STRELOAD,0xFFFFFFF); 40 | PUT32(STCTRL,0x00000005); //enabled, no ints, use cpu clock 41 | 42 | ra=FIO1SET2; 43 | rb=FIO1CLR2; 44 | rc=0x80; 45 | rd=0x20; 46 | re=0x10; 47 | rf=0x04; 48 | 49 | PUT8(rb,rc); 50 | PUT8(rb,rd); 51 | PUT8(rb,re); 52 | PUT8(rb,rf); 53 | 54 | while(1) 55 | { 56 | PUT8(ra,rc); 57 | dowait(); 58 | PUT8(rb,rc); 59 | dowait(); 60 | } 61 | } 62 | -------------------------------------------------------------------------------- /blinker03/flash.ld: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 5 | ram : ORIGIN = 0x10000000, LENGTH = 30K 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > rom 11 | .rodata : { *(.rodata*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker03/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | -------------------------------------------------------------------------------- /blinker04/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 7 | AOPS = --warn --fatal-warnings 8 | 9 | COPS2 = -Wall -O2 -nostdlib -nostartfiles -ffreestanding -mcpu=cortex-m3 -march=armv7-m 10 | 11 | all : blinker04.bin 12 | 13 | vectors.o : vectors.s 14 | $(ARMGNU)-as vectors.s -o vectors.o 15 | 16 | blinker04.o : blinker04.c 17 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker04.c -o blinker04.o 18 | 19 | blinker04.bin : flash.ld vectors.o blinker04.o 20 | $(ARMGNU)-ld -o blinker04.elf -T flash.ld vectors.o blinker04.o 21 | $(ARMGNU)-objdump -D blinker04.elf > blinker04.list 22 | $(ARMGNU)-objcopy blinker04.elf blinker04.bin -O binary 23 | 24 | clean: 25 | rm -f *.bin 26 | rm -f *.o 27 | rm -f *.elf 28 | rm -f *.list 29 | 30 | -------------------------------------------------------------------------------- /blinker04/README.blinker04.txt: -------------------------------------------------------------------------------- 1 | 2 | This is the same as blinker03 except we want to use the 12MHz main 3 | oscillator instead of the onboard, boot up, 4MHz oscillator. 4 | 5 | The LPC microcontrollers can make clock setup quite difficult, even 6 | to read how to do things. 7 | 8 | For this particular desired mode, the first thing we figure out is that 9 | PLL0 which is the one that can optionally feed the cpu clock, is 10 | bypassed after reset. That is good. 11 | 12 | Next, to use the main oscillator we need to enable it as an input/clock. 13 | The SCS System Control and Status register, bit OSCEN needs to be set, 14 | then we have to wait until OSCSTAT is set indicating the clock is 15 | stable and we can use it. Then we can change CLKSRCSEL to a 1 to select 16 | the main clock as a source. 17 | 18 | Now we are running at 12MHz instead of 4MHz. The countdown timer is 19 | set to 12,000,000 - 1 giving 12,000,000 CCLK clocks each cycle. Change 20 | dowait() to wait for 5 cycles and the led will change state once 21 | every 5 seconds. 22 | 23 | BTW, blinking an led like this, and using clock dividers in the chip 24 | to get led changes that are many seconds like 30 or 60 or many minutes 25 | like 5, 10, 15, etc. You can use a watch (yeah, you know from the 26 | history books what those are) or anything with a minute and second hand 27 | and your eyes to get fairly good precision on hacking your way through 28 | figuring out what clock source something is using. Also figure out 29 | for example if putting a 4 in a divisor register divides the clock 30 | by 4 or by 5 for example. You may think you have found all the clock 31 | divisor blocks in some path only to realize you are off by a power of 32 | two or four or something, and trying to count one one thousand, two 33 | one thousand, three one thousand, is not going to be accurate enough 34 | to figure this all out. 35 | 36 | 37 | -------------------------------------------------------------------------------- /blinker04/blinker04.c: -------------------------------------------------------------------------------- 1 | 2 | extern void PUT8 ( unsigned int, unsigned int ); 3 | extern unsigned int GET8 ( unsigned int ); 4 | 5 | extern void PUT32 ( unsigned int, unsigned int ); 6 | extern unsigned int GET32 ( unsigned int ); 7 | 8 | #define STCTRL 0xE000E010 9 | #define STRELOAD 0xE000E014 10 | #define STCURR 0xE000E018 11 | 12 | #define FIO1DIR2 0x2009C022 13 | #define FIO1SET2 0x2009C03A 14 | #define FIO1CLR2 0x2009C03E 15 | 16 | 17 | #define SCS 0x400FC1A0 18 | #define CLKSRCSEL 0x400FC10C 19 | 20 | void dowait ( void ) 21 | { 22 | unsigned int ra; 23 | ra=5; 24 | 25 | while(ra) 26 | { 27 | if(GET32(STCTRL)&0x00010000) ra--; 28 | } 29 | } 30 | 31 | 32 | void notmain ( void ) 33 | { 34 | unsigned int ra,rb,rc,rd,re,rf; 35 | 36 | PUT32(SCS,1<<5); 37 | while((GET32(SCS)&(1<<6))==0) continue; 38 | 39 | PUT32(CLKSRCSEL,1); 40 | 41 | //init GPIO 42 | ra=GET8(FIO1DIR2); 43 | ra|=0xB4; 44 | PUT8(FIO1DIR2,ra); 45 | 46 | PUT32(STCTRL,0x00000004); 47 | PUT32(STRELOAD,12000000-1); 48 | PUT32(STCTRL,0x00000005); 49 | 50 | ra=FIO1SET2; 51 | rb=FIO1CLR2; 52 | rc=0x80; 53 | rd=0x20; 54 | re=0x10; 55 | rf=0x04; 56 | 57 | PUT8(rb,rc); 58 | PUT8(rb,rd); 59 | PUT8(rb,re); 60 | PUT8(rb,rf); 61 | 62 | while(1) 63 | { 64 | PUT8(ra,rc); 65 | dowait(); 66 | PUT8(rb,rc); 67 | dowait(); 68 | } 69 | } 70 | 71 | -------------------------------------------------------------------------------- /blinker04/flash.ld: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 5 | ram : ORIGIN = 0x10000000, LENGTH = 30K 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > rom 11 | .rodata : { *(.rodata*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker04/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | -------------------------------------------------------------------------------- /blinker05/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 7 | AOPS = --warn --fatal-warnings 8 | 9 | COPS2 = -Wall -O2 -nostdlib -nostartfiles -ffreestanding -mcpu=cortex-m3 -march=armv7-m 10 | 11 | all : blinker05.bin 12 | 13 | vectors.o : vectors.s 14 | $(ARMGNU)-as vectors.s -o vectors.o 15 | 16 | blinker05.o : blinker05.c 17 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker05.c -o blinker05.o 18 | 19 | blinker05.bin : flash.ld vectors.o blinker05.o 20 | $(ARMGNU)-ld -o blinker05.elf -T flash.ld vectors.o blinker05.o 21 | $(ARMGNU)-objdump -D blinker05.elf > blinker05.list 22 | $(ARMGNU)-objcopy blinker05.elf blinker05.bin -O binary 23 | 24 | clean: 25 | rm -f *.bin 26 | rm -f *.o 27 | rm -f *.elf 28 | rm -f *.list 29 | 30 | -------------------------------------------------------------------------------- /blinker05/blinker05.c: -------------------------------------------------------------------------------- 1 | 2 | extern void PUT8 ( unsigned int, unsigned int ); 3 | extern unsigned int GET8 ( unsigned int ); 4 | 5 | extern void PUT32 ( unsigned int, unsigned int ); 6 | extern unsigned int GET32 ( unsigned int ); 7 | 8 | #define STCTRL 0xE000E010 9 | #define STRELOAD 0xE000E014 10 | #define STCURR 0xE000E018 11 | 12 | #define FIO1DIR2 0x2009C022 13 | #define FIO1SET2 0x2009C03A 14 | #define FIO1CLR2 0x2009C03E 15 | 16 | #define SCS 0x400FC1A0 17 | #define CLKSRCSEL 0x400FC10C 18 | 19 | #define PLL0FEED 0x400FC08C 20 | #define PLL0CON 0x400FC080 21 | #define PLL0CFG 0x400FC084 22 | #define PLL0STAT 0x400FC088 23 | 24 | #define CCLKCFG 0x400FC104 25 | 26 | #define T0CR 0x40004004 27 | #define T0TC 0x40004008 28 | #define T0PR 0x4000400C 29 | 30 | 31 | void pll_init(void) 32 | { 33 | //enable the main oscillator 34 | PUT32(SCS,1<<5); 35 | while((GET32(SCS)&(1<<6))==0) continue; 36 | 37 | //1. Disconnect PLL0 with one feed sequence if PLL0 is already connected. 38 | //powers up disconnected 39 | //2. Disable PLL0 with one feed sequence. 40 | //powers up disabled 41 | //3. Change the CPU Clock Divider setting to speed up operation without PLL0, if desired. 42 | //already there 43 | //4. Write to the Clock Source Selection Control register to change the clock source if 44 | //needed. 45 | PUT32(CLKSRCSEL,1); 46 | //5. Write to the PLL0CFG and make it effective with one feed sequence. The PLL0CFG 47 | //can only be updated when PLL0 is disabled. 48 | //An N of 3 and M of 50 gives a pllclk of 400MHz. remember the register uses M-1 and N-1 49 | //otherwise you get a clock slower than you were planning. 50 | PUT32(PLL0CFG,((3-1)<<16)|((50-1)<<0)); 51 | PUT32(PLL0FEED,0xAA); 52 | PUT32(PLL0FEED,0x55); 53 | //6. Enable PLL0 with one feed sequence. 54 | PUT32(PLL0CON,1); 55 | PUT32(PLL0FEED,0xAA); 56 | PUT32(PLL0FEED,0x55); 57 | //6.1 not listed in the manual as something to do 58 | while((GET32(PLL0STAT) & (1<<24)) == 0) continue; 59 | //7. Change the CPU Clock Divider setting for the operation with PLL0. It is critical to do 60 | //this before connecting PLL0. 61 | //to divide by 4 put a 3 here 62 | PUT32(CCLKCFG,(4-1)); 63 | //8. Wait for PLL0 to achieve lock by monitoring the PLOCK0 bit in the PLL0STAT register, 64 | while((GET32(PLL0STAT) & (1<<26)) == 0) continue; 65 | //9. Connect PLL0 with one feed sequence. 66 | //It is very important not to merge any steps above. 67 | PUT32(PLL0CON,3); 68 | PUT32(PLL0FEED,0xAA); 69 | PUT32(PLL0FEED,0x55); 70 | //9.1 not listed in instructions 71 | while((GET32(PLL0STAT) & (1<<25)) == 0) continue; 72 | } 73 | 74 | 75 | void notmain ( void ) 76 | { 77 | unsigned int ra,rb,rc,rd,re,rf; 78 | 79 | unsigned int lastcount,nowcount; 80 | 81 | pll_init(); 82 | 83 | 84 | //init GPIO 85 | ra=GET8(FIO1DIR2); 86 | ra|=0xB4; 87 | PUT8(FIO1DIR2,ra); 88 | 89 | ra=FIO1SET2; 90 | rb=FIO1CLR2; 91 | rc=0x80; 92 | rd=0x20; 93 | re=0x10; 94 | rf=0x04; 95 | 96 | PUT8(rb,rc); 97 | PUT8(rb,rd); 98 | PUT8(rb,re); 99 | PUT8(rb,rf); 100 | 101 | PUT32(T0PR,(120-1)); 102 | PUT32(T0CR,1); //enable timer 103 | lastcount=GET32(T0TC); 104 | while(1) 105 | { 106 | PUT8(ra,rc); 107 | while(1) 108 | { 109 | nowcount=GET32(T0TC); 110 | nowcount-=lastcount; //upcounter 111 | if(nowcount>=25000000) break; 112 | } 113 | lastcount+=25000000; 114 | PUT8(rb,rc); 115 | while(1) 116 | { 117 | nowcount=GET32(T0TC); 118 | nowcount-=lastcount; //upcounter 119 | if(nowcount>=25000000) break; 120 | } 121 | lastcount+=25000000; 122 | } 123 | } 124 | 125 | -------------------------------------------------------------------------------- /blinker05/flash.ld: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 5 | ram : ORIGIN = 0x10000000, LENGTH = 30K 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > rom 11 | .rodata : { *(.rodata*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker05/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | -------------------------------------------------------------------------------- /blinker06/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | LLCOPS2 = -march=thumb -mtriple=$(ARMGNU) -mcpu=cortex-m3 11 | 12 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 13 | 14 | AOPS = --warn --fatal-warnings 15 | 16 | OOPS = -std-compile-opts 17 | 18 | stuff = -O2 -std-compile-opts -strip-debug 19 | 20 | 21 | 22 | 23 | all : blinker06.gcc.thumb.bin blinker06.gcc.thumb2.bin blinker06.clang.thumb.norm.bin blinker06.clang.thumb.opt.bin blinker06.clang.thumb2.norm.bin blinker06.clang.thumb2.opt.bin 24 | 25 | vectors.o : vectors.s 26 | $(ARMGNU)-as vectors.s -o vectors.o 27 | 28 | blinker06.gcc.thumb.o : blinker06.c 29 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker06.c -o blinker06.gcc.thumb.o 30 | 31 | blinker06.gcc.thumb2.o : blinker06.c 32 | $(ARMGNU)-gcc $(COPS) -mthumb -mcpu=cortex-m3 -march=armv7-m -c blinker06.c -o blinker06.gcc.thumb2.o 33 | 34 | blinker06.gcc.thumb.bin : memmap vectors.o blinker06.gcc.thumb.o 35 | $(ARMGNU)-ld -o blinker06.gcc.thumb.elf -T memmap vectors.o blinker06.gcc.thumb.o 36 | $(ARMGNU)-objdump -D blinker06.gcc.thumb.elf > blinker06.gcc.thumb.list 37 | $(ARMGNU)-objcopy blinker06.gcc.thumb.elf blinker06.gcc.thumb.bin -O binary 38 | 39 | blinker06.gcc.thumb2.bin : memmap vectors.o blinker06.gcc.thumb2.o 40 | $(ARMGNU)-ld -o blinker06.gcc.thumb2.elf -T memmap vectors.o blinker06.gcc.thumb2.o 41 | $(ARMGNU)-objdump -D blinker06.gcc.thumb2.elf > blinker06.gcc.thumb2.list 42 | $(ARMGNU)-objcopy blinker06.gcc.thumb2.elf blinker06.gcc.thumb2.bin -O binary 43 | 44 | 45 | blinker06.clang.bc : blinker06.c 46 | clang $(LOPS) -c blinker06.c -o blinker06.clang.bc 47 | 48 | blinker06.clang.thumb.norm.bin : memmap vectors.o blinker06.clang.bc 49 | llc $(LLCOPS) blinker06.clang.bc -o blinker06.clang.thumb.norm.s 50 | $(ARMGNU)-as blinker06.clang.thumb.norm.s -o blinker06.clang.thumb.norm.o 51 | $(ARMGNU)-ld -o blinker06.clang.thumb.norm.elf -T memmap vectors.o blinker06.clang.thumb.norm.o 52 | $(ARMGNU)-objdump -D blinker06.clang.thumb.norm.elf > blinker06.clang.thumb.norm.list 53 | $(ARMGNU)-objcopy blinker06.clang.thumb.norm.elf blinker06.clang.thumb.norm.bin -O binary 54 | 55 | blinker06.clang.thumb.opt.bin : memmap vectors.o blinker06.clang.bc 56 | opt $(OOPS) blinker06.clang.bc -o blinker06.clang.thumb.opt.bc 57 | llc $(LLCOPS) blinker06.clang.thumb.opt.bc -o blinker06.clang.thumb.opt.s 58 | $(ARMGNU)-as blinker06.clang.thumb.opt.s -o blinker06.clang.thumb.opt.o 59 | $(ARMGNU)-ld -o blinker06.clang.thumb.opt.elf -T memmap vectors.o blinker06.clang.thumb.opt.o 60 | $(ARMGNU)-objdump -D blinker06.clang.thumb.opt.elf > blinker06.clang.thumb.opt.list 61 | $(ARMGNU)-objcopy blinker06.clang.thumb.opt.elf blinker06.clang.thumb.opt.bin -O binary 62 | 63 | blinker06.clang.thumb2.norm.bin : memmap vectors.o blinker06.clang.bc 64 | llc $(LLCOPS2) blinker06.clang.bc -o blinker06.clang.thumb2.norm.s 65 | $(ARMGNU)-as blinker06.clang.thumb2.norm.s -o blinker06.clang.thumb2.norm.o 66 | $(ARMGNU)-ld -o blinker06.clang.thumb2.norm.elf -T memmap vectors.o blinker06.clang.thumb2.norm.o 67 | $(ARMGNU)-objdump -D blinker06.clang.thumb2.norm.elf > blinker06.clang.thumb2.norm.list 68 | $(ARMGNU)-objcopy blinker06.clang.thumb2.norm.elf blinker06.clang.thumb2.norm.bin -O binary 69 | 70 | blinker06.clang.thumb2.opt.bin : memmap vectors.o blinker06.clang.bc 71 | opt $(OOPS) blinker06.clang.bc -o blinker06.clang.thumb2.opt.bc 72 | llc $(LLCOPS2) blinker06.clang.thumb2.opt.bc -o blinker06.clang.thumb2.opt.s 73 | $(ARMGNU)-as blinker06.clang.thumb2.opt.s -o blinker06.clang.thumb2.opt.o 74 | $(ARMGNU)-ld -o blinker06.clang.thumb2.opt.elf -T memmap vectors.o blinker06.clang.thumb2.opt.o 75 | $(ARMGNU)-objdump -D blinker06.clang.thumb2.opt.elf > blinker06.clang.thumb2.opt.list 76 | $(ARMGNU)-objcopy blinker06.clang.thumb2.opt.elf blinker06.clang.thumb2.opt.bin -O binary 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | clean: 85 | rm -f *.bin 86 | rm -f *.o 87 | rm -f *.elf 88 | rm -f *.list 89 | rm -f *.bc 90 | rm -f *.opt.s 91 | rm -f *.norm.s 92 | 93 | -------------------------------------------------------------------------------- /blinker06/README.blinker06.txt: -------------------------------------------------------------------------------- 1 | 2 | Where to find the schematic and users manual is described in the 3 | top level README file. 4 | 5 | You definitely need to read the blinker05 README first, you should be 6 | reading all of these in order anyway. 7 | 8 | With blinker05 we succeeded in setting the processor to run at 100Mhz 9 | but we had to divide the 12MHz external clock to do it. 96Mhz 10 | can be reached without dividing that clock up front. 11 | 12 | M = (pllclk * N) / (2 * fin); 13 | 14 | We want an N of one and a minimal M, the first M that puts the pllclk 15 | at a valid rate is 12 which gives 288MHz. Dividing that by 3 gives 16 | 96Mhz to the processor. 17 | 18 | If we use the same numbers from blinker05 which counted to 120 seconds 19 | but we run it at 96MHz instead of 100MHz, then it should take 20 | 21 | 120 * 100 / 96 = 125 seconds. And that is what we get, so we are 22 | now running 96MHz. 23 | 24 | -------------------------------------------------------------------------------- /blinker06/blinker06.c: -------------------------------------------------------------------------------- 1 | 2 | extern void PUT8 ( unsigned int, unsigned int ); 3 | extern unsigned int GET8 ( unsigned int ); 4 | 5 | extern void PUT32 ( unsigned int, unsigned int ); 6 | extern unsigned int GET32 ( unsigned int ); 7 | 8 | #define STCTRL 0xE000E010 9 | #define STRELOAD 0xE000E014 10 | #define STCURR 0xE000E018 11 | 12 | #define FIO1DIR2 0x2009C022 13 | #define FIO1SET2 0x2009C03A 14 | #define FIO1CLR2 0x2009C03E 15 | 16 | #define SCS 0x400FC1A0 17 | #define CLKSRCSEL 0x400FC10C 18 | 19 | #define PLL0FEED 0x400FC08C 20 | #define PLL0CON 0x400FC080 21 | #define PLL0CFG 0x400FC084 22 | #define PLL0STAT 0x400FC088 23 | 24 | #define CCLKCFG 0x400FC104 25 | 26 | #define T0CR 0x40004004 27 | #define T0TC 0x40004008 28 | #define T0PR 0x4000400C 29 | 30 | 31 | 32 | void pll_init(void) 33 | { 34 | //enable the main oscillator 35 | PUT32(SCS,1<<5); 36 | while((GET32(SCS)&(1<<6))==0) continue; 37 | 38 | //1. Disconnect PLL0 with one feed sequence if PLL0 is already connected. 39 | //powers up disconnected 40 | //PUT32(PLL0CON,GET32(PLL0CON)&(~2)); 41 | //PUT32(PLL0FEED,0xAA); 42 | //PUT32(PLL0FEED,0x55); 43 | //while((GET32(PLL0STAT) & (1<<25)) != 0) continue; 44 | //2. Disable PLL0 with one feed sequence. 45 | //powers up disabled 46 | //PUT32(PLL0CON,GET32(PLL0CON)&(~1)); 47 | //PUT32(PLL0FEED,0xAA); 48 | //PUT32(PLL0FEED,0x55); 49 | //while((GET32(PLL0STAT) & (1<<24)) != 0) continue; 50 | //3. Change the CPU Clock Divider setting to speed up operation without PLL0, if desired. 51 | //PUT32(CCLKCFG,0); 52 | //4. Write to the Clock Source Selection Control register to change the clock source if 53 | //needed. 54 | PUT32(CLKSRCSEL,1); 55 | //5. Write to the PLL0CFG and make it effective with one feed sequence. The PLL0CFG 56 | //can only be updated when PLL0 is disabled. 57 | //An N of 1 and M of 12 gives a pllclk of 288MHz. remember the register uses M-1 and N-1 58 | //otherwise you get a clock slower than you were planning. 59 | PUT32(PLL0CFG,(12-1)); 60 | PUT32(PLL0FEED,0xAA); 61 | PUT32(PLL0FEED,0x55); 62 | //6. Enable PLL0 with one feed sequence. 63 | PUT32(PLL0CON,1); 64 | PUT32(PLL0FEED,0xAA); 65 | PUT32(PLL0FEED,0x55); 66 | //6.1 not listed in the manual as something to do 67 | while((GET32(PLL0STAT) & (1<<24)) == 0) continue; 68 | //7. Change the CPU Clock Divider setting for the operation with PLL0. It is critical to do 69 | //this before connecting PLL0. 70 | //288/3 = 96 MHZ 71 | PUT32(CCLKCFG,(3-1)); 72 | //8. Wait for PLL0 to achieve lock by monitoring the PLOCK0 bit in the PLL0STAT register, 73 | while((GET32(PLL0STAT) & (1<<26)) == 0) continue; 74 | //9. Connect PLL0 with one feed sequence. 75 | PUT32(PLL0CON,3); 76 | PUT32(PLL0FEED,0xAA); 77 | PUT32(PLL0FEED,0x55); 78 | //9.1 not listed in instructions 79 | while((GET32(PLL0STAT) & (1<<25)) == 0) continue; 80 | } 81 | 82 | 83 | void notmain ( void ) 84 | { 85 | unsigned int ra,rb,rc,rd,re,rf; 86 | 87 | unsigned int lastcount,nowcount; 88 | 89 | pll_init(); 90 | 91 | 92 | //init GPIO 93 | ra=GET8(FIO1DIR2); 94 | ra|=0xB4; 95 | PUT8(FIO1DIR2,ra); 96 | 97 | ra=FIO1SET2; 98 | rb=FIO1CLR2; 99 | rc=0x80; 100 | rd=0x20; 101 | re=0x10; 102 | rf=0x04; 103 | 104 | PUT8(rb,rc); 105 | PUT8(rb,rd); 106 | PUT8(rb,re); 107 | PUT8(rb,rf); 108 | 109 | 110 | PUT32(T0PR,(120-1)); 111 | PUT32(T0CR,1); //enable timer 112 | lastcount=GET32(T0TC); 113 | while(1) 114 | { 115 | PUT8(ra,rc); 116 | while(1) 117 | { 118 | nowcount=GET32(T0TC); 119 | nowcount-=lastcount; //upcounter 120 | if(nowcount>=25000000) break; 121 | } 122 | lastcount+=25000000; 123 | PUT8(rb,rc); 124 | while(1) 125 | { 126 | nowcount=GET32(T0TC); 127 | nowcount-=lastcount; //upcounter 128 | if(nowcount>=25000000) break; 129 | } 130 | lastcount+=25000000; 131 | } 132 | } 133 | 134 | -------------------------------------------------------------------------------- /blinker06/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker06/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | -------------------------------------------------------------------------------- /blinker07/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | LLCOPS2 = -march=thumb -mtriple=$(ARMGNU) -mcpu=cortex-m3 11 | 12 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 13 | 14 | AOPS = --warn --fatal-warnings 15 | 16 | OOPS = -std-compile-opts 17 | 18 | stuff = -O2 -std-compile-opts -strip-debug 19 | 20 | 21 | 22 | 23 | all : blinker07.gcc.thumb.bin blinker07.gcc.thumb2.bin blinker07.clang.thumb.norm.bin blinker07.clang.thumb.opt.bin blinker07.clang.thumb2.norm.bin blinker07.clang.thumb2.opt.bin 24 | 25 | vectors.o : vectors.s 26 | $(ARMGNU)-as vectors.s -o vectors.o 27 | 28 | blinker07.gcc.thumb.o : blinker07.c 29 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker07.c -o blinker07.gcc.thumb.o 30 | 31 | blinker07.gcc.thumb2.o : blinker07.c 32 | $(ARMGNU)-gcc $(COPS) -mthumb -mcpu=cortex-m3 -march=armv7-m -c blinker07.c -o blinker07.gcc.thumb2.o 33 | 34 | blinker07.gcc.thumb.bin : memmap vectors.o blinker07.gcc.thumb.o 35 | $(ARMGNU)-ld -o blinker07.gcc.thumb.elf -T memmap vectors.o blinker07.gcc.thumb.o 36 | $(ARMGNU)-objdump -D blinker07.gcc.thumb.elf > blinker07.gcc.thumb.list 37 | $(ARMGNU)-objcopy blinker07.gcc.thumb.elf blinker07.gcc.thumb.bin -O binary 38 | 39 | blinker07.gcc.thumb2.bin : memmap vectors.o blinker07.gcc.thumb2.o 40 | $(ARMGNU)-ld -o blinker07.gcc.thumb2.elf -T memmap vectors.o blinker07.gcc.thumb2.o 41 | $(ARMGNU)-objdump -D blinker07.gcc.thumb2.elf > blinker07.gcc.thumb2.list 42 | $(ARMGNU)-objcopy blinker07.gcc.thumb2.elf blinker07.gcc.thumb2.bin -O binary 43 | 44 | 45 | blinker07.clang.bc : blinker07.c 46 | clang $(LOPS) -c blinker07.c -o blinker07.clang.bc 47 | 48 | blinker07.clang.thumb.norm.bin : memmap vectors.o blinker07.clang.bc 49 | llc $(LLCOPS) blinker07.clang.bc -o blinker07.clang.thumb.norm.s 50 | $(ARMGNU)-as blinker07.clang.thumb.norm.s -o blinker07.clang.thumb.norm.o 51 | $(ARMGNU)-ld -o blinker07.clang.thumb.norm.elf -T memmap vectors.o blinker07.clang.thumb.norm.o 52 | $(ARMGNU)-objdump -D blinker07.clang.thumb.norm.elf > blinker07.clang.thumb.norm.list 53 | $(ARMGNU)-objcopy blinker07.clang.thumb.norm.elf blinker07.clang.thumb.norm.bin -O binary 54 | 55 | blinker07.clang.thumb.opt.bin : memmap vectors.o blinker07.clang.bc 56 | opt $(OOPS) blinker07.clang.bc -o blinker07.clang.thumb.opt.bc 57 | llc $(LLCOPS) blinker07.clang.thumb.opt.bc -o blinker07.clang.thumb.opt.s 58 | $(ARMGNU)-as blinker07.clang.thumb.opt.s -o blinker07.clang.thumb.opt.o 59 | $(ARMGNU)-ld -o blinker07.clang.thumb.opt.elf -T memmap vectors.o blinker07.clang.thumb.opt.o 60 | $(ARMGNU)-objdump -D blinker07.clang.thumb.opt.elf > blinker07.clang.thumb.opt.list 61 | $(ARMGNU)-objcopy blinker07.clang.thumb.opt.elf blinker07.clang.thumb.opt.bin -O binary 62 | 63 | blinker07.clang.thumb2.norm.bin : memmap vectors.o blinker07.clang.bc 64 | llc $(LLCOPS2) blinker07.clang.bc -o blinker07.clang.thumb2.norm.s 65 | $(ARMGNU)-as blinker07.clang.thumb2.norm.s -o blinker07.clang.thumb2.norm.o 66 | $(ARMGNU)-ld -o blinker07.clang.thumb2.norm.elf -T memmap vectors.o blinker07.clang.thumb2.norm.o 67 | $(ARMGNU)-objdump -D blinker07.clang.thumb2.norm.elf > blinker07.clang.thumb2.norm.list 68 | $(ARMGNU)-objcopy blinker07.clang.thumb2.norm.elf blinker07.clang.thumb2.norm.bin -O binary 69 | 70 | blinker07.clang.thumb2.opt.bin : memmap vectors.o blinker07.clang.bc 71 | opt $(OOPS) blinker07.clang.bc -o blinker07.clang.thumb2.opt.bc 72 | llc $(LLCOPS2) blinker07.clang.thumb2.opt.bc -o blinker07.clang.thumb2.opt.s 73 | $(ARMGNU)-as blinker07.clang.thumb2.opt.s -o blinker07.clang.thumb2.opt.o 74 | $(ARMGNU)-ld -o blinker07.clang.thumb2.opt.elf -T memmap vectors.o blinker07.clang.thumb2.opt.o 75 | $(ARMGNU)-objdump -D blinker07.clang.thumb2.opt.elf > blinker07.clang.thumb2.opt.list 76 | $(ARMGNU)-objcopy blinker07.clang.thumb2.opt.elf blinker07.clang.thumb2.opt.bin -O binary 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | clean: 85 | rm -f *.bin 86 | rm -f *.o 87 | rm -f *.elf 88 | rm -f *.list 89 | rm -f *.bc 90 | rm -f *.opt.s 91 | rm -f *.norm.s 92 | 93 | -------------------------------------------------------------------------------- /blinker07/README.blinker07.txt: -------------------------------------------------------------------------------- 1 | 2 | Where to find the schematic and users manual (and ARM ARM) is described 3 | in the top level README file. 4 | 5 | This sample is derived from blinker04, 12MHz external speed and pll 6 | bypassed to give the processor 12MHz. 7 | 8 | Although I have clearly demonstrated that you dont need to use interrupts 9 | to do timing or blink leds or anything like that, the added complexity 10 | and system engineering to use interrupts is not trivial, dont use them 11 | unless you have a really good reason. The alternative is do everything 12 | with interrupts and nothing in the foreground task. 13 | 14 | The systick timer looks to be clean and easy, apparently designed just 15 | for periodotic interrupts. 16 | 17 | Need to do some research in the ARM ARM. 18 | 19 | This is not like the traditional ARM, more and more this core is like 20 | other processors than an ARM. For example on an ARM core there are 21 | banked registers, when you have an interrupt, you have a certain 22 | number of interrupt mode registers, for example there is an interrupt 23 | stack pointer, which is different from other stack pointers so that 24 | you can isolate the stacks. What the cortex-m3 is doing here 25 | is not only does it rely on the normal stack to preserve the state 26 | of the machine. It preserves the state of the machine for you by 27 | pushing a number of registers on the stack. Which resgisters? Well 28 | the ones defined in the ABI as registers that are somewhat volitile 29 | within a function. Also there is a lot of confusing verbage about 30 | different modes and returning from the exception depending on the mode, 31 | etc. Basically though they put the value you need to use to return 32 | from the interrupt in the link register so just like any other 33 | function you use a normal function return (pop pc or bx lr or something 34 | like that). So what this means is that if you are using the right 35 | compiler you can have the vector table put the address of the handler 36 | in C, and not have to use any assembly. Pretty slick if it works. 37 | 38 | So this code blinks two leds, it uses timer0 to blink one of the leds 39 | and uses the interrupt service routine based on the systick interrupt 40 | to blink the other led at a different rate. the two are ultimately 41 | driven by the same clocks and use comperable timers, basically the 42 | fast led is 6 times faster than the slow. When the slow led changes 43 | it will also appear that its when the fast is having one of its 44 | state changes. 45 | -------------------------------------------------------------------------------- /blinker07/blinker07.c: -------------------------------------------------------------------------------- 1 | 2 | extern void PUT8 ( unsigned int, unsigned int ); 3 | extern unsigned int GET8 ( unsigned int ); 4 | 5 | extern void PUT32 ( unsigned int, unsigned int ); 6 | extern unsigned int GET32 ( unsigned int ); 7 | 8 | #define STCTRL 0xE000E010 9 | #define STRELOAD 0xE000E014 10 | #define STCURR 0xE000E018 11 | 12 | #define FIO1DIR2 0x2009C022 13 | #define FIO1SET2 0x2009C03A 14 | #define FIO1CLR2 0x2009C03E 15 | 16 | #define SCS 0x400FC1A0 17 | #define CLKSRCSEL 0x400FC10C 18 | 19 | #define T0CR 0x40004004 20 | #define T0TC 0x40004008 21 | #define T0PR 0x4000400C 22 | 23 | 24 | //********************************************************* 25 | // THIS IS AN INTERRUPT HANDLER, DONT MESS AROUND 26 | unsigned int twoled; 27 | void systick_handler ( void ) 28 | { 29 | GET32(STCTRL); 30 | if(twoled&1) 31 | { 32 | PUT8(FIO1CLR2,0x20); 33 | } 34 | else 35 | { 36 | PUT8(FIO1SET2,0x20); 37 | } 38 | twoled++; 39 | } 40 | //********************************************************* 41 | 42 | 43 | void notmain ( void ) 44 | { 45 | unsigned int ra,rb,rc,rd,re,rf; 46 | unsigned int lastcount,nowcount; 47 | unsigned int nticks; 48 | unsigned int oneled; 49 | 50 | //init GPIO 51 | ra=GET8(FIO1DIR2); 52 | ra|=0xB4; 53 | PUT8(FIO1DIR2,ra); 54 | 55 | ra=FIO1SET2; 56 | rb=FIO1CLR2; 57 | rc=0x80; 58 | rd=0x20; 59 | re=0x10; 60 | rf=0x04; 61 | 62 | PUT8(rb,rc); 63 | PUT8(rb,rd); 64 | PUT8(rb,re); 65 | PUT8(rb,rf); 66 | 67 | oneled=0; 68 | twoled=0; 69 | 70 | //4MHz, 12000000 counts is 3 seconds 71 | PUT32(STCTRL,0x00000004); 72 | PUT32(STRELOAD,12000000-1); 73 | PUT32(STCTRL,0x00000007); //interrupt enabled 74 | 75 | //4Mhz/4 = 1Mhz 500000 is half a second 76 | nticks=500000; 77 | PUT32(T0CR,1); //enable timer 78 | lastcount=GET32(T0TC); 79 | while(1) 80 | { 81 | nowcount=GET32(T0TC); 82 | nowcount-=lastcount; //upcounter 83 | if(nowcount>=nticks) 84 | { 85 | if(oneled&1) 86 | { 87 | PUT8(ra,rc); 88 | } 89 | else 90 | { 91 | PUT8(rb,rc); 92 | } 93 | oneled++; 94 | lastcount+=nticks; 95 | } 96 | } 97 | 98 | while(1) continue; 99 | } 100 | 101 | -------------------------------------------------------------------------------- /blinker07/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /blinker07/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word systick_handler /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | 61 | .thumb_func 62 | _systick: 63 | ldr r0,=0xE000E010 64 | ldr r0,[r0] 65 | ldr r0,=systick_counter 66 | ldr r1,[r0] 67 | add r1,#1 68 | str r1,[r0] 69 | /*bx lr*/ 70 | mov pc,lr 71 | 72 | .globl systick_counter 73 | systick_counter: .word 0 74 | /*#define STCTRL 0xE000E010 */ 75 | 76 | -------------------------------------------------------------------------------- /ebay_board/README: -------------------------------------------------------------------------------- 1 | 2 | for now see the blinker01 readme file for more information on this 3 | board. 4 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | all : blinker01.bin 7 | 8 | blinker01.bin : blinker01.s memmap 9 | $(ARMGNU)-as blinker01.s -o blinker01.o 10 | $(ARMGNU)-ld -o blinker01.elf blinker01.o -T memmap 11 | $(ARMGNU)-objdump -D blinker01.elf > blinker01.list 12 | $(ARMGNU)-objcopy blinker01.elf blinker01.bin -O binary 13 | 14 | clean: 15 | rm -f *.bin 16 | rm -f *.o 17 | rm -f *.elf 18 | rm -f *.list 19 | 20 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/blinker01.s: -------------------------------------------------------------------------------- 1 | 2 | /*blinker01.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | 8 | .thumb_func 9 | .globl _start 10 | _start: 11 | ldr r0,=0x2009C040 12 | ldrb r1,[r0] 13 | mov r2,#0x01 14 | orr r1,r2 15 | strb r1,[r0] 16 | 17 | ldr r0,=0x2009C050 18 | mov r1,#0x00 19 | strb r1,[r0] 20 | 21 | ldr r0,=0x2009C058 22 | ldr r1,=0x2009C05C 23 | ldr r2,=0x01 24 | 25 | mainloop: 26 | strb r2,[r0] 27 | bl dowait 28 | strb r2,[r1] 29 | bl dowait 30 | b mainloop 31 | 32 | .thumb_func 33 | dowait: 34 | ldr r7,=0x200000 35 | dowaitloop: 36 | sub r7,#1 37 | bne dowaitloop 38 | bx lr 39 | 40 | .end 41 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/jlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Segger J-Link 3 | # 4 | # http://www.segger.com/jlink.html 5 | # 6 | 7 | interface jlink 8 | 9 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/jtagkey-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey-tiny 3 | # 4 | # http://www.amontec.com/jtagkey-tiny.shtml 5 | # 6 | 7 | # The JTAGkey-tiny uses exactly the same config as the JTAGkey. 8 | source [find interface/jtagkey.cfg] 9 | 10 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 2 | 3 | # LPC17xx chips support both JTAG and SWD transports. 4 | # Adapt based on what transport is active. 5 | source [find target/swj-dp.tcl] 6 | 7 | if { [info exists CHIPNAME] } { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME lpc1768 11 | } 12 | 13 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 14 | # When board-specific code (reset-init handler or device firmware) 15 | # configures another oscillator and/or PLL0, set CCLK to match; if 16 | # you don't, then flash erase and write operations may misbehave. 17 | # (The ROM code doing those updates cares about core clock speed...) 18 | # 19 | # CCLK is the core clock frequency in KHz 20 | if { [info exists CCLK ] } { 21 | set _CCLK $CCLK 22 | } else { 23 | set _CCLK 4000 24 | } 25 | if { [info exists CPUTAPID ] } { 26 | set _CPUTAPID $CPUTAPID 27 | } else { 28 | set _CPUTAPID 0x4ba00477 29 | } 30 | 31 | #delays on reset lines 32 | adapter_nsrst_delay 200 33 | jtag_ntrst_delay 200 34 | 35 | #jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID 36 | swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID 37 | 38 | set _TARGETNAME $_CHIPNAME.cpu 39 | target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME 40 | 41 | # LPC1768 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000) 42 | # and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000). 43 | $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 44 | 45 | # LPC1768 has 512kB of flash memory, managed by ROM code (including a 46 | # boot loader which verifies the flash exception table's checksum). 47 | # flash bank lpc2000 0 0 [calc checksum] 48 | set _FLASHNAME $_CHIPNAME.flash 49 | flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ 50 | lpc1700 $_CCLK calc_checksum 51 | 52 | # Run with *real slow* clock by default since the 53 | # boot rom could have been playing with the PLL, so 54 | # we have no idea what clock the target is running at. 55 | jtag_khz 10 56 | 57 | $_TARGETNAME configure -event reset-init { 58 | # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select 59 | # "User Flash Mode" where interrupt vectors are _not_ remapped, 60 | # and reside in flash instead). 61 | # 62 | # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description 63 | # Bit Symbol Value Description Reset 64 | # value 65 | # 0 MAP Memory map control. 0 66 | # 0 Boot mode. A portion of the Boot ROM is mapped to address 0. 67 | # 1 User mode. The on-chip Flash memory is mapped to address 0. 68 | # 31:1 - Reserved. The value read from a reserved bit is not defined. NA 69 | # 70 | # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user 71 | 72 | mww 0x400FC040 0x01 73 | } 74 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | ram : ORIGIN = 0x10000000, LENGTH = 30K 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > ram 11 | .bss : { *(.bss*) } > ram 12 | } 13 | 14 | -------------------------------------------------------------------------------- /ebay_board/blinker01/ram/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer LITE" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca1 11 | 12 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | all : blinker01.bin 7 | 8 | blinker01.bin : blinker01.s memmap 9 | $(ARMGNU)-as blinker01.s -o blinker01.o 10 | $(ARMGNU)-ld -o blinker01.elf blinker01.o -T memmap 11 | $(ARMGNU)-objdump -D blinker01.elf > blinker01.list 12 | $(ARMGNU)-objcopy blinker01.elf blinker01.bin -O binary 13 | 14 | clean: 15 | rm -f *.bin 16 | rm -f *.o 17 | rm -f *.elf 18 | rm -f *.list 19 | 20 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/blinker01.s: -------------------------------------------------------------------------------- 1 | 2 | /*blinker01.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word 0xefff7e1d /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | hang: b . 29 | 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | ldr r0,=0x2009C040 35 | ldrb r1,[r0] 36 | mov r2,#0x01 37 | orr r1,r2 38 | strb r1,[r0] 39 | 40 | ldr r0,=0x2009C050 41 | mov r1,#0x00 42 | strb r1,[r0] 43 | 44 | ldr r0,=0x2009C058 45 | ldr r1,=0x2009C05C 46 | ldr r2,=0x01 47 | 48 | mainloop: 49 | strb r2,[r0] 50 | bl dowait 51 | strb r2,[r1] 52 | bl dowait 53 | b mainloop 54 | 55 | .thumb_func 56 | dowait: 57 | ldr r7,=0x40000 58 | dowaitloop: 59 | sub r7,#1 60 | bne dowaitloop 61 | bx lr 62 | 63 | .end 64 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/jlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Segger J-Link 3 | # 4 | # http://www.segger.com/jlink.html 5 | # 6 | 7 | interface jlink 8 | 9 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/jtagkey-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey-tiny 3 | # 4 | # http://www.amontec.com/jtagkey-tiny.shtml 5 | # 6 | 7 | # The JTAGkey-tiny uses exactly the same config as the JTAGkey. 8 | source [find interface/jtagkey.cfg] 9 | 10 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC1768 Cortex-M3 with 512kB Flash and 32kB+32kB Local On-Chip SRAM, 2 | 3 | # LPC17xx chips support both JTAG and SWD transports. 4 | # Adapt based on what transport is active. 5 | source [find target/swj-dp.tcl] 6 | 7 | if { [info exists CHIPNAME] } { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME lpc1768 11 | } 12 | 13 | # After reset the chip is clocked by the ~4MHz internal RC oscillator. 14 | # When board-specific code (reset-init handler or device firmware) 15 | # configures another oscillator and/or PLL0, set CCLK to match; if 16 | # you don't, then flash erase and write operations may misbehave. 17 | # (The ROM code doing those updates cares about core clock speed...) 18 | # 19 | # CCLK is the core clock frequency in KHz 20 | if { [info exists CCLK ] } { 21 | set _CCLK $CCLK 22 | } else { 23 | set _CCLK 4000 24 | } 25 | if { [info exists CPUTAPID ] } { 26 | set _CPUTAPID $CPUTAPID 27 | } else { 28 | set _CPUTAPID 0x4ba00477 29 | } 30 | 31 | #delays on reset lines 32 | adapter_nsrst_delay 200 33 | jtag_ntrst_delay 200 34 | 35 | #jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID 36 | swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID 37 | 38 | set _TARGETNAME $_CHIPNAME.cpu 39 | target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME 40 | 41 | # LPC1768 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000) 42 | # and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000). 43 | $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 44 | 45 | # LPC1768 has 512kB of flash memory, managed by ROM code (including a 46 | # boot loader which verifies the flash exception table's checksum). 47 | # flash bank lpc2000 0 0 [calc checksum] 48 | set _FLASHNAME $_CHIPNAME.flash 49 | flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ 50 | lpc1700 $_CCLK calc_checksum 51 | 52 | # Run with *real slow* clock by default since the 53 | # boot rom could have been playing with the PLL, so 54 | # we have no idea what clock the target is running at. 55 | jtag_khz 10 56 | 57 | $_TARGETNAME configure -event reset-init { 58 | # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select 59 | # "User Flash Mode" where interrupt vectors are _not_ remapped, 60 | # and reside in flash instead). 61 | # 62 | # See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description 63 | # Bit Symbol Value Description Reset 64 | # value 65 | # 0 MAP Memory map control. 0 66 | # 0 Boot mode. A portion of the Boot ROM is mapped to address 0. 67 | # 1 User mode. The on-chip Flash memory is mapped to address 0. 68 | # 31:1 - Reserved. The value read from a reserved bit is not defined. NA 69 | # 70 | # http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user 71 | 72 | mww 0x400FC040 0x01 73 | } 74 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /ebay_board/blinker01/rom/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer LITE" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca1 11 | 12 | -------------------------------------------------------------------------------- /mzero/README: -------------------------------------------------------------------------------- 1 | 2 | This is a collection of sample programs, in some respects building 3 | on each other for the mbed (http://mbed.org) platform. This subdirectory 4 | the mzero subdirectory, specifically is for the lpc11u24 based mbed. 5 | The main directory is for the original lpc17xx based mbed. The lpc11u24 6 | uses a cortex-m0 ARM core. 7 | 8 | These samples are intended to demonstrate how to use the platform 9 | without using the web compiler or mbed api. This will hopefully 10 | get you kick started into learning to program the hardware directly 11 | using the reference material provided by the vendor(s). 12 | 13 | At a minimum you will need some documents, starting at 14 | 15 | http://mbed.org 16 | 17 | go to the handbook page (Handbook link top right of page) 18 | 19 | http://mbed.org/handbook 20 | 21 | This web page appears to keep changing, at the moment near the top 22 | of the page under About mbed find the link for the LPC11U24 based 23 | mbed: 24 | 25 | http://mbed.org/handbook/mbed-NXP-LPC11U24 26 | 27 | You are going to need the schematic 28 | 29 | http://mbed.org/media/uploads/chris/mbed-010.2-schematic.pdf 30 | 31 | Then follow the link to the LPC11U24 homepage at nxp. 32 | 33 | http://www.nxp.com/products/microcontrollers/cortex_m0/lpc11u00/LPC11U24FBD64.html 34 | 35 | There is a link to a zip file called all documentation, you may find some 36 | interesting information there but it does not have the users manual 37 | which is the most important of the programming manuals as it has all 38 | the register/memory addresses and descriptions. I struggled to find 39 | this manual for this processor then eventually did, the problem is it 40 | is listed as the LPC11Uxx manual and when you look inside you see it 41 | is the LPC11Uxx manual. 42 | 43 | user manuals for the nxp cortex-m0 processors 44 | 45 | http://www.nxp.com/technical-support-portal/50809/71391/user-manuals 46 | 47 | And specifically what is at the moment shown on the nxp website as 48 | the LPC11U1x user manual: 49 | 50 | http://www.nxp.com/documents/user_manual/UM10462.pdf 51 | 52 | For now start with the blinker02 example and go from there. 53 | -------------------------------------------------------------------------------- /mzero/blinker02/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : blinker02.gcc.thumb.bin blinker02.clang.thumb.norm.bin blinker02.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | blinker02.gcc.thumb.o : blinker02.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker02.c -o blinker02.gcc.thumb.o 28 | 29 | blinker02.gcc.thumb.bin : memmap vectors.o blinker02.gcc.thumb.o 30 | $(ARMGNU)-ld -o blinker02.gcc.thumb.elf -T memmap vectors.o blinker02.gcc.thumb.o 31 | $(ARMGNU)-objdump -D blinker02.gcc.thumb.elf > blinker02.gcc.thumb.list 32 | $(ARMGNU)-objcopy blinker02.gcc.thumb.elf blinker02.gcc.thumb.bin -O binary 33 | 34 | 35 | blinker02.clang.bc : blinker02.c 36 | clang $(LOPS) -c blinker02.c -o blinker02.clang.bc 37 | 38 | blinker02.clang.thumb.norm.bin : memmap vectors.o blinker02.clang.bc 39 | llc $(LLCOPS) blinker02.clang.bc -o blinker02.clang.thumb.norm.s 40 | $(ARMGNU)-as blinker02.clang.thumb.norm.s -o blinker02.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o blinker02.clang.thumb.norm.elf -T memmap vectors.o blinker02.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D blinker02.clang.thumb.norm.elf > blinker02.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy blinker02.clang.thumb.norm.elf blinker02.clang.thumb.norm.bin -O binary 44 | 45 | blinker02.clang.thumb.opt.bin : memmap vectors.o blinker02.clang.bc 46 | opt $(OOPS) blinker02.clang.bc -o blinker02.clang.thumb.opt.bc 47 | llc $(LLCOPS) blinker02.clang.thumb.opt.bc -o blinker02.clang.thumb.opt.s 48 | $(ARMGNU)-as blinker02.clang.thumb.opt.s -o blinker02.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o blinker02.clang.thumb.opt.elf -T memmap vectors.o blinker02.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D blinker02.clang.thumb.opt.elf > blinker02.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy blinker02.clang.thumb.opt.elf blinker02.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/blinker02/README: -------------------------------------------------------------------------------- 1 | 2 | This sample is derived from the blinker02 sample for the lpc17xx based 3 | mbed board. See the blinker01 and blinker02 samples for that board 4 | for more information on where to get gnu and llvm tools. 5 | 6 | The lpc11u24 has a cortex-m0 not a cortex-m3. The cortex-m0 and cortex-m1 7 | ARM cores are basically thumb only, they do not support the 32 bit thumb2 8 | instructions. 9 | 10 | This processor has fewer gpio ports and a simpler gpio than the other 11 | mbed processor. Looking at the schematic the leds on this board are 12 | on port 1 pins 8,9,10,11. 13 | 14 | This sample demonstrates booting the processor using a little bit 15 | of assembler but the bulk of the program being written in C. 16 | 17 | vectors.s is the vector table that is used when the processor boots 18 | or has an exception or interrupt. The first 32 bits entry in this table 19 | is the value that will be loaded in the stack pointer on boot/reset. 20 | The second entry is the reset vector, the address the processor finds 21 | the boot code on a reset. Note because this is thumb mode the lsbit 22 | has to be set. the reset code very quickly calls notmain(). Why notmain() 23 | instead of main()? I have seen compilers add stuff when you have main() 24 | in the project. This also emphasises this an embeded program, assembler 25 | with some code written in C for simplicity. This is not a desktop 26 | application running on an operating system. 27 | 28 | blinker02.c contains the bulk of the sample code. Very similar to 29 | blinker01.s, we turn on one led at a time (turning off the other three 30 | for no particular reason) and use a simple counter based delay loop 31 | to slow the on/off times so that we can see them with our slow human 32 | eyes. Volatile and not-optimizing could/would avoid this but by 33 | using an external function (not found until link time) in the delay 34 | loop we force the compiler to generate the counter loop. It is a quick 35 | and easy way to prevent the optimizer from removing code you want 36 | present to intentially slow things down. 37 | 38 | for this chip the gpio port is enabled on boot, some microcontrollers 39 | you have to turn on or enable the gpio port before using it. The 40 | registers to interest are the direction register where we define 41 | the four pins to be outputs, and then a set and clear set of registers 42 | which make it very easy to set (vcc) or clear (gnd or zero volts) the 43 | output pin. The clr and set registers avoid the need for a read-modify-write 44 | similar to the one needed for the dir register. 45 | -------------------------------------------------------------------------------- /mzero/blinker02/blinker02.c: -------------------------------------------------------------------------------- 1 | 2 | #define GPIO_BASE 0x50000000 3 | 4 | #define GPIO_DIR1 (GPIO_BASE+0x2004) 5 | #define GPIO_SET1 (GPIO_BASE+0x2204) 6 | #define GPIO_CLR1 (GPIO_BASE+0x2284) 7 | 8 | extern void PUT32 ( unsigned int, unsigned int ); 9 | extern unsigned int GET32 ( unsigned int ); 10 | extern void dummy ( unsigned int ); 11 | 12 | void dowait ( void ) 13 | { 14 | unsigned int ra; 15 | 16 | for(ra=0x20000;ra;ra--) 17 | { 18 | dummy(ra); 19 | } 20 | } 21 | 22 | void notmain ( void ) 23 | { 24 | unsigned int ra,rb,rc,rd,re,rf; 25 | 26 | ra=GET32(GPIO_DIR1); 27 | ra|=1<<8; 28 | ra|=1<<9; 29 | ra|=1<<10; 30 | ra|=1<<11; 31 | PUT32(GPIO_DIR1,ra); 32 | 33 | ra=GPIO_SET1; 34 | rb=GPIO_CLR1; 35 | rc=1<<8; 36 | rd=1<<9; 37 | re=1<<10; 38 | rf=1<<11; 39 | 40 | while(1) 41 | { 42 | PUT32(ra,rc); 43 | PUT32(rb,rd); 44 | PUT32(rb,re); 45 | PUT32(rb,rf); 46 | dowait(); 47 | PUT32(rb,rc); 48 | PUT32(ra,rd); 49 | PUT32(rb,re); 50 | PUT32(rb,rf); 51 | dowait(); 52 | PUT32(rb,rc); 53 | PUT32(rb,rd); 54 | PUT32(ra,re); 55 | PUT32(rb,rf); 56 | dowait(); 57 | PUT32(rb,rc); 58 | PUT32(rb,rd); 59 | PUT32(rb,re); 60 | PUT32(ra,rf); 61 | dowait(); 62 | PUT32(rb,rc); 63 | PUT32(rb,rd); 64 | PUT32(ra,re); 65 | PUT32(rb,rf); 66 | dowait(); 67 | PUT32(rb,rc); 68 | PUT32(ra,rd); 69 | PUT32(rb,re); 70 | PUT32(rb,rf); 71 | dowait(); 72 | } 73 | } 74 | -------------------------------------------------------------------------------- /mzero/blinker02/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/blinker02/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl dummy 51 | dummy: 52 | bx lr 53 | -------------------------------------------------------------------------------- /mzero/blinker03/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : blinker03.gcc.thumb.bin blinker03.clang.thumb.norm.bin blinker03.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | blinker03.gcc.thumb.o : blinker03.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker03.c -o blinker03.gcc.thumb.o 28 | 29 | blinker03.gcc.thumb.bin : memmap vectors.o blinker03.gcc.thumb.o 30 | $(ARMGNU)-ld -o blinker03.gcc.thumb.elf -T memmap vectors.o blinker03.gcc.thumb.o 31 | $(ARMGNU)-objdump -D blinker03.gcc.thumb.elf > blinker03.gcc.thumb.list 32 | $(ARMGNU)-objcopy blinker03.gcc.thumb.elf blinker03.gcc.thumb.bin -O binary 33 | 34 | 35 | blinker03.clang.bc : blinker03.c 36 | clang $(LOPS) -c blinker03.c -o blinker03.clang.bc 37 | 38 | blinker03.clang.thumb.norm.bin : memmap vectors.o blinker03.clang.bc 39 | llc $(LLCOPS) blinker03.clang.bc -o blinker03.clang.thumb.norm.s 40 | $(ARMGNU)-as blinker03.clang.thumb.norm.s -o blinker03.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o blinker03.clang.thumb.norm.elf -T memmap vectors.o blinker03.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D blinker03.clang.thumb.norm.elf > blinker03.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy blinker03.clang.thumb.norm.elf blinker03.clang.thumb.norm.bin -O binary 44 | 45 | blinker03.clang.thumb.opt.bin : memmap vectors.o blinker03.clang.bc 46 | opt $(OOPS) blinker03.clang.bc -o blinker03.clang.thumb.opt.bc 47 | llc $(LLCOPS) blinker03.clang.thumb.opt.bc -o blinker03.clang.thumb.opt.s 48 | $(ARMGNU)-as blinker03.clang.thumb.opt.s -o blinker03.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o blinker03.clang.thumb.opt.elf -T memmap vectors.o blinker03.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D blinker03.clang.thumb.opt.elf > blinker03.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy blinker03.clang.thumb.opt.elf blinker03.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/blinker03/blinker03.c: -------------------------------------------------------------------------------- 1 | 2 | 3 | extern void PUT32 ( unsigned int, unsigned int ); 4 | extern unsigned int GET32 ( unsigned int ); 5 | extern void dummy ( unsigned int ); 6 | 7 | #define GPIO_BASE 0x50000000 8 | 9 | #define GPIO_DIR1 (GPIO_BASE+0x2004) 10 | #define GPIO_SET1 (GPIO_BASE+0x2204) 11 | #define GPIO_CLR1 (GPIO_BASE+0x2284) 12 | 13 | #define STCTRL 0xE000E010 14 | #define STRELOAD 0xE000E014 15 | #define STCURR 0xE000E018 16 | 17 | void dowait ( void ) 18 | { 19 | unsigned int ra; 20 | ra=10; 21 | 22 | while(ra) 23 | { 24 | if(GET32(STCTRL)&0x00010000) ra--; 25 | } 26 | } 27 | 28 | void notmain ( void ) 29 | { 30 | unsigned int ra,rb,rc,rd,re,rf; 31 | 32 | ra=GET32(GPIO_DIR1); 33 | ra|=1<<8; 34 | ra|=1<<9; 35 | ra|=1<<10; 36 | ra|=1<<11; 37 | PUT32(GPIO_DIR1,ra); 38 | 39 | PUT32(STCTRL,0x00000004); //disabled, no ints, use cpu clock 40 | PUT32(STRELOAD,0xFFFFFFF); 41 | PUT32(STCTRL,0x00000005); //enabled, no ints, use cpu clock 42 | 43 | 44 | ra=GPIO_SET1; 45 | rb=GPIO_CLR1; 46 | rc=1<<8; 47 | rd=1<<9; 48 | re=1<<10; 49 | rf=1<<11; 50 | 51 | while(1) 52 | { 53 | PUT32(ra,rc); 54 | PUT32(rb,rd); 55 | PUT32(rb,re); 56 | PUT32(rb,rf); 57 | dowait(); 58 | PUT32(rb,rc); 59 | PUT32(ra,rd); 60 | PUT32(rb,re); 61 | PUT32(rb,rf); 62 | dowait(); 63 | PUT32(rb,rc); 64 | PUT32(rb,rd); 65 | PUT32(ra,re); 66 | PUT32(rb,rf); 67 | dowait(); 68 | PUT32(rb,rc); 69 | PUT32(rb,rd); 70 | PUT32(rb,re); 71 | PUT32(ra,rf); 72 | dowait(); 73 | PUT32(rb,rc); 74 | PUT32(rb,rd); 75 | PUT32(ra,re); 76 | PUT32(rb,rf); 77 | dowait(); 78 | PUT32(rb,rc); 79 | PUT32(ra,rd); 80 | PUT32(rb,re); 81 | PUT32(rb,rf); 82 | dowait(); 83 | } 84 | } 85 | -------------------------------------------------------------------------------- /mzero/blinker03/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/blinker03/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl dummy 51 | dummy: 52 | bx lr 53 | -------------------------------------------------------------------------------- /mzero/blinker04/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : blinker04.gcc.thumb.bin blinker04.clang.thumb.norm.bin blinker04.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | blinker04.gcc.thumb.o : blinker04.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker04.c -o blinker04.gcc.thumb.o 28 | 29 | blinker04.gcc.thumb.bin : memmap vectors.o blinker04.gcc.thumb.o 30 | $(ARMGNU)-ld -o blinker04.gcc.thumb.elf -T memmap vectors.o blinker04.gcc.thumb.o 31 | $(ARMGNU)-objdump -D blinker04.gcc.thumb.elf > blinker04.gcc.thumb.list 32 | $(ARMGNU)-objcopy blinker04.gcc.thumb.elf blinker04.gcc.thumb.bin -O binary 33 | 34 | 35 | blinker04.clang.bc : blinker04.c 36 | clang $(LOPS) -c blinker04.c -o blinker04.clang.bc 37 | 38 | blinker04.clang.thumb.norm.bin : memmap vectors.o blinker04.clang.bc 39 | llc $(LLCOPS) blinker04.clang.bc -o blinker04.clang.thumb.norm.s 40 | $(ARMGNU)-as blinker04.clang.thumb.norm.s -o blinker04.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o blinker04.clang.thumb.norm.elf -T memmap vectors.o blinker04.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D blinker04.clang.thumb.norm.elf > blinker04.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy blinker04.clang.thumb.norm.elf blinker04.clang.thumb.norm.bin -O binary 44 | 45 | blinker04.clang.thumb.opt.bin : memmap vectors.o blinker04.clang.bc 46 | opt $(OOPS) blinker04.clang.bc -o blinker04.clang.thumb.opt.bc 47 | llc $(LLCOPS) blinker04.clang.thumb.opt.bc -o blinker04.clang.thumb.opt.s 48 | $(ARMGNU)-as blinker04.clang.thumb.opt.s -o blinker04.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o blinker04.clang.thumb.opt.elf -T memmap vectors.o blinker04.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D blinker04.clang.thumb.opt.elf > blinker04.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy blinker04.clang.thumb.opt.elf blinker04.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/blinker04/README: -------------------------------------------------------------------------------- 1 | 2 | This is the same as blinker03 except we want to use the 12MHz main 3 | oscillator instead of the onboard, boot up, 12MHz oscillator. 4 | 5 | This example was more painful that I would have liked. I ended up 6 | bricking one board trying to recover it. Basically if you mess up the 7 | clock on the target LPC11U24 such that on boot you kill the clock to the 8 | ARM then the mbed interface chip is not able to go in and reprogram the 9 | flash. The LPC's I have used have more than one bootloader built in 10 | and the solution is to short port P0.1 on when you reset the 11 | microcontroller. The solution is the same as one of the mbed.org pages 12 | but the LPC11U24 board IS NOT THE SAME AS THE LPC17xx based board. At 13 | this time I dont know where else on the board to find that signal so I 14 | soldered a thin wire to pin 5 on the part and shorted that. Power up 15 | the board with pin 5 of the microcontroller shorted, the microcontroller 16 | will boot from an alternate flash, one that doesnt turn the clocks off 17 | and the mbed interface can flash it. Now if you have left the same 18 | binary on the mbed interface virtual usb flash that caused the 19 | microcontroller to stop, well you need to change that binary to something 20 | that works, and power cycle again. Then disconnect pin 5 to ground 21 | and power cycle again or press reset and the microcontroller should 22 | come back to life. 23 | 24 | I had hoped to switch from the internal oscillator to the external 25 | oscillator and not use the PLL. In theory you go through the pll 26 | clock select mux then use the pll input based on drawings in the 27 | users manual. I played with the pll bypass register settings to see 28 | what would happen and that is when all the problems started. For now 29 | do not change this line: 30 | 31 | PUT32(SYSOSCCTRL,0x00000000); //DO NOT BYPASS PLL HERE 32 | 33 | If you change it to a 0x00000001 I expect you to run into the problems 34 | I had. 35 | 36 | Since the internal and external are the same frequency I will probably 37 | just use the internal for examples at that speed. Usually external 38 | clock sources are more accurate, but I would rather know more about how 39 | to initialize the clock source before trying this again. A future 40 | blinker example will use the external clock source and the pll to 41 | multiply the clock to a faster rate, whatever the maximum the chip 42 | is rated for (or the max we can get with this clock source, whichever 43 | is faster). 44 | 45 | 46 | EDIT: I added a little safety measure. If the clock init code sees 47 | PIN0.7 shorted to ground it will not continue configuring the clocks. 48 | PIN0.7 is PIN21 on the mbed LPC11U24 board, the opposite corner from 49 | ground. If you want to mess with the clock init code and make a mistake 50 | then short PIN21 to ground and it will leave the internal 12MHz clock 51 | as the clock source allowing the mbed interface to recover/reprogram 52 | the microcontroller. Press reset with PIN21 shorted and your program 53 | will run but possibly at the wrong clock rate. Copy a different program 54 | and press reset and it will load that allowing you to remove the jumper 55 | and trying again. 56 | -------------------------------------------------------------------------------- /mzero/blinker04/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/blinker04/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .thumb 5 | 6 | .word 0x10001800 /* stack top address */ 7 | .word _start /* 1 Reset */ 8 | .word hang /* 2 NMI */ 9 | .word hang /* 3 HardFault */ 10 | .word hang /* 4 MemManage */ 11 | .word hang /* 5 BusFault */ 12 | .word hang /* 6 UsageFault */ 13 | .word hang /* 7 RESERVED */ 14 | .word hang /* 8 RESERVED */ 15 | .word hang /* 9 RESERVED*/ 16 | .word hang /* 10 RESERVED */ 17 | .word hang /* 11 SVCall */ 18 | .word hang /* 12 Debug Monitor */ 19 | .word hang /* 13 RESERVED */ 20 | .word hang /* 14 PendSV */ 21 | .word hang /* 15 SysTick */ 22 | .word hang /* 16 External Interrupt(0) */ 23 | .word hang /* 17 External Interrupt(1) */ 24 | .word hang /* 18 External Interrupt(2) */ 25 | .word hang /* 19 ... */ 26 | 27 | .thumb_func 28 | hang: b . 29 | 30 | .thumb_func 31 | .globl _start 32 | _start: 33 | bl notmain 34 | b hang 35 | 36 | .thumb_func 37 | .globl PUT32 38 | PUT32: 39 | str r1,[r0] 40 | bx lr 41 | 42 | .thumb_func 43 | .globl GET32 44 | GET32: 45 | ldr r0,[r0] 46 | bx lr 47 | 48 | .thumb_func 49 | .globl PUTGETCLR 50 | PUTGETCLR: 51 | ldr r2,[r0] 52 | bic r2,r1 53 | str r2,[r0] 54 | mov r0,r2 55 | bx lr 56 | 57 | .thumb_func 58 | .globl PUTGETSET 59 | PUTGETSET: 60 | ldr r2,[r0] 61 | orr r2,r1 62 | str r2,[r0] 63 | mov r0,r2 64 | bx lr 65 | 66 | 67 | .thumb_func 68 | .globl dummy 69 | dummy: 70 | bx lr 71 | -------------------------------------------------------------------------------- /mzero/blinker05/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : blinker05.gcc.thumb.bin blinker05.clang.thumb.norm.bin blinker05.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | blinker05.gcc.thumb.o : blinker05.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker05.c -o blinker05.gcc.thumb.o 28 | 29 | blinker05.gcc.thumb.bin : memmap vectors.o blinker05.gcc.thumb.o 30 | $(ARMGNU)-ld -o blinker05.gcc.thumb.elf -T memmap vectors.o blinker05.gcc.thumb.o 31 | $(ARMGNU)-objdump -D blinker05.gcc.thumb.elf > blinker05.gcc.thumb.list 32 | $(ARMGNU)-objcopy blinker05.gcc.thumb.elf blinker05.gcc.thumb.bin -O binary 33 | 34 | 35 | blinker05.clang.bc : blinker05.c 36 | clang $(LOPS) -c blinker05.c -o blinker05.clang.bc 37 | 38 | blinker05.clang.thumb.norm.bin : memmap vectors.o blinker05.clang.bc 39 | llc $(LLCOPS) blinker05.clang.bc -o blinker05.clang.thumb.norm.s 40 | $(ARMGNU)-as blinker05.clang.thumb.norm.s -o blinker05.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o blinker05.clang.thumb.norm.elf -T memmap vectors.o blinker05.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D blinker05.clang.thumb.norm.elf > blinker05.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy blinker05.clang.thumb.norm.elf blinker05.clang.thumb.norm.bin -O binary 44 | 45 | blinker05.clang.thumb.opt.bin : memmap vectors.o blinker05.clang.bc 46 | opt $(OOPS) blinker05.clang.bc -o blinker05.clang.thumb.opt.bc 47 | llc $(LLCOPS) blinker05.clang.thumb.opt.bc -o blinker05.clang.thumb.opt.s 48 | $(ARMGNU)-as blinker05.clang.thumb.opt.s -o blinker05.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o blinker05.clang.thumb.opt.elf -T memmap vectors.o blinker05.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D blinker05.clang.thumb.opt.elf > blinker05.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy blinker05.clang.thumb.opt.elf blinker05.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/blinker05/README: -------------------------------------------------------------------------------- 1 | 2 | Look at the readme for blinker04 about bricking you board. Not really 3 | bricked as there are multiple boot flash images in an NXP part. It 4 | is just potentially painful to add a jumper to recover. See the 5 | note below about a safety measure I added to save me some grief over 6 | this. 7 | 8 | Blinker05 is like blinker04 except that it uses the pll to multiply 9 | the external clock source by 4. The external clock source is 12Mhz 10 | times four gives 48MHz. This part is rated up to 50Mhz, maybe there 11 | is a way to set that with a 12MHz input, maybe not. 48MHz from 12 is 12 | very easy though, in fact described in the users manual. Unlike other 13 | NXP and perhaps others note that the P divider is for the PLL and not 14 | our main clock source. Our main clock is the external oscillator times 15 | M divided by SYSAHBCLKDIV. P is used in the PLL to keep the PLL FCCO 16 | within limits. FCCO is basically the external clock rate times 2 times 17 | P times M. So for this case 12*2*2*4 = 192Mhz. And that is a valid 18 | FCCO rate. 19 | 20 | So the arm is now running 48MHz. Becareful with the systick divisor 21 | it is a 24 bit register, you cant just put 48 million - 1 and hope for 22 | a cycle every second. (48,000,000-1) = 0x2DC6BFF. Instead of getting 23 | a divide by 48000000 you would get a divide by 0xDC6BFF which is a 24 | divide by 14,445,567, almost three times faster than what you were 25 | expecting. So this example divides by 12 Million, 1/4th of a second, 26 | then the dowait loop counts to 16 quarter seconds making it a 4 second 27 | wait. The leds should change state every 4 seconds. Something you can 28 | measure with a stopwatch to verify. After you read the safety measure 29 | below, if you short PIN21 to ground, and reset then the leds should change 30 | state every 16 seconds because the internal 12MHz oscillator is being 31 | used not the pll derived 48MHz. 32 | 33 | 34 | 35 | I added a little safety measure. If the clock init code sees 36 | PIN0.7 shorted to ground it will not continue configuring the clocks. 37 | PIN0.7 is PIN21 on the mbed LPC11U24 board, the opposite corner from 38 | ground. If you want to mess with the clock init code and make a mistake 39 | then short PIN21 to ground and it will leave the internal 12MHz clock 40 | as the clock source allowing the mbed interface to recover/reprogram 41 | the microcontroller. Press reset with PIN21 shorted and your program 42 | will run but possibly at the wrong clock rate. Copy a different program 43 | and press reset and it will load that allowing you to remove the jumper 44 | and trying again. 45 | 46 | 47 | 48 | 49 | -------------------------------------------------------------------------------- /mzero/blinker05/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/blinker05/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .thumb 5 | 6 | .word 0x10001800 /* stack top address */ 7 | .word _start /* 1 Reset */ 8 | .word hang /* 2 NMI */ 9 | .word hang /* 3 HardFault */ 10 | .word hang /* 4 MemManage */ 11 | .word hang /* 5 BusFault */ 12 | .word hang /* 6 UsageFault */ 13 | .word hang /* 7 RESERVED */ 14 | .word hang /* 8 RESERVED */ 15 | .word hang /* 9 RESERVED*/ 16 | .word hang /* 10 RESERVED */ 17 | .word hang /* 11 SVCall */ 18 | .word hang /* 12 Debug Monitor */ 19 | .word hang /* 13 RESERVED */ 20 | .word hang /* 14 PendSV */ 21 | .word hang /* 15 SysTick */ 22 | .word hang /* 16 External Interrupt(0) */ 23 | .word hang /* 17 External Interrupt(1) */ 24 | .word hang /* 18 External Interrupt(2) */ 25 | .word hang /* 19 ... */ 26 | 27 | .thumb_func 28 | hang: b . 29 | 30 | .thumb_func 31 | .globl _start 32 | _start: 33 | bl notmain 34 | b hang 35 | 36 | .thumb_func 37 | .globl PUT32 38 | PUT32: 39 | str r1,[r0] 40 | bx lr 41 | 42 | .thumb_func 43 | .globl GET32 44 | GET32: 45 | ldr r0,[r0] 46 | bx lr 47 | 48 | .thumb_func 49 | .globl PUTGETCLR 50 | PUTGETCLR: 51 | ldr r2,[r0] 52 | bic r2,r1 53 | str r2,[r0] 54 | mov r0,r2 55 | bx lr 56 | 57 | .thumb_func 58 | .globl PUTGETSET 59 | PUTGETSET: 60 | ldr r2,[r0] 61 | orr r2,r1 62 | str r2,[r0] 63 | mov r0,r2 64 | bx lr 65 | 66 | 67 | .thumb_func 68 | .globl dummy 69 | dummy: 70 | bx lr 71 | -------------------------------------------------------------------------------- /mzero/blinker06/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : blinker06.gcc.thumb.bin blinker06.clang.thumb.norm.bin blinker06.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | blinker06.gcc.thumb.o : blinker06.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c blinker06.c -o blinker06.gcc.thumb.o 28 | 29 | blinker06.gcc.thumb.bin : memmap vectors.o blinker06.gcc.thumb.o 30 | $(ARMGNU)-ld -o blinker06.gcc.thumb.elf -T memmap vectors.o blinker06.gcc.thumb.o 31 | $(ARMGNU)-objdump -D blinker06.gcc.thumb.elf > blinker06.gcc.thumb.list 32 | $(ARMGNU)-objcopy blinker06.gcc.thumb.elf blinker06.gcc.thumb.bin -O binary 33 | 34 | 35 | blinker06.clang.bc : blinker06.c 36 | clang $(LOPS) -c blinker06.c -o blinker06.clang.bc 37 | 38 | blinker06.clang.thumb.norm.bin : memmap vectors.o blinker06.clang.bc 39 | llc $(LLCOPS) blinker06.clang.bc -o blinker06.clang.thumb.norm.s 40 | $(ARMGNU)-as blinker06.clang.thumb.norm.s -o blinker06.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o blinker06.clang.thumb.norm.elf -T memmap vectors.o blinker06.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D blinker06.clang.thumb.norm.elf > blinker06.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy blinker06.clang.thumb.norm.elf blinker06.clang.thumb.norm.bin -O binary 44 | 45 | blinker06.clang.thumb.opt.bin : memmap vectors.o blinker06.clang.bc 46 | opt $(OOPS) blinker06.clang.bc -o blinker06.clang.thumb.opt.bc 47 | llc $(LLCOPS) blinker06.clang.thumb.opt.bc -o blinker06.clang.thumb.opt.s 48 | $(ARMGNU)-as blinker06.clang.thumb.opt.s -o blinker06.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o blinker06.clang.thumb.opt.elf -T memmap vectors.o blinker06.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D blinker06.clang.thumb.opt.elf > blinker06.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy blinker06.clang.thumb.opt.elf blinker06.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/blinker06/README: -------------------------------------------------------------------------------- 1 | 2 | Look at the readme for blinker04 about bricking you board. Not really 3 | bricked as there are multiple boot flash images in an NXP part. It 4 | is just potentially painful to add a jumper to recover. See the 5 | note below about a safety measure I added to save me some grief over 6 | this. 7 | 8 | I added a little safety measure. If the clock init code sees 9 | PIN0.7 shorted to ground it will not continue configuring the clocks. 10 | PIN0.7 is PIN21 on the mbed LPC11U24 board, the opposite corner from 11 | ground. If you want to mess with the clock init code and make a mistake 12 | then short PIN21 to ground and it will leave the internal 12MHz clock 13 | as the clock source allowing the mbed interface to recover/reprogram 14 | the microcontroller. Press reset with PIN21 shorted and your program 15 | will run but possibly at the wrong clock rate. Copy a different program 16 | and press reset and it will load that allowing you to remove the jumper 17 | and trying again. 18 | 19 | 20 | 21 | blinker06. This example sets the clock at 48MHz (see comments above) 22 | then uses the four non-cortex-m-systick timers in the part to drive 23 | the blink rate for the four user leds on the board. Two of the 24 | counters are 16 bit and two are 32 bit. The 32 bit counters are 25 | set with a 48 Million and 32 Million count prescaler, one second per 26 | timer count and a count a little faster for the other. The 16 bit 27 | timers prescalers are, well, 16 bit so they cannot handle numbers like 28 | that so they are set for 48Million/1024 and 32million/1024. The main 29 | loop looks for changes in the timer counts and changes the leds as 30 | a result. 31 | 32 | 33 | -------------------------------------------------------------------------------- /mzero/blinker06/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/blinker06/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .thumb 5 | 6 | .word 0x10001800 /* stack top address */ 7 | .word _start /* 1 Reset */ 8 | .word hang /* 2 NMI */ 9 | .word hang /* 3 HardFault */ 10 | .word hang /* 4 MemManage */ 11 | .word hang /* 5 BusFault */ 12 | .word hang /* 6 UsageFault */ 13 | .word hang /* 7 RESERVED */ 14 | .word hang /* 8 RESERVED */ 15 | .word hang /* 9 RESERVED*/ 16 | .word hang /* 10 RESERVED */ 17 | .word hang /* 11 SVCall */ 18 | .word hang /* 12 Debug Monitor */ 19 | .word hang /* 13 RESERVED */ 20 | .word hang /* 14 PendSV */ 21 | .word hang /* 15 SysTick */ 22 | .word hang /* 16 External Interrupt(0) */ 23 | .word hang /* 17 External Interrupt(1) */ 24 | .word hang /* 18 External Interrupt(2) */ 25 | .word hang /* 19 ... */ 26 | 27 | .thumb_func 28 | hang: b . 29 | 30 | .thumb_func 31 | .globl _start 32 | _start: 33 | bl notmain 34 | b hang 35 | 36 | .thumb_func 37 | .globl PUT32 38 | PUT32: 39 | str r1,[r0] 40 | bx lr 41 | 42 | .thumb_func 43 | .globl GET32 44 | GET32: 45 | ldr r0,[r0] 46 | bx lr 47 | 48 | .thumb_func 49 | .globl PUTGETCLR 50 | PUTGETCLR: 51 | ldr r2,[r0] 52 | bic r2,r1 53 | str r2,[r0] 54 | mov r0,r2 55 | bx lr 56 | 57 | .thumb_func 58 | .globl PUTGETSET 59 | PUTGETSET: 60 | ldr r2,[r0] 61 | orr r2,r1 62 | str r2,[r0] 63 | mov r0,r2 64 | bx lr 65 | 66 | 67 | .thumb_func 68 | .globl dummy 69 | dummy: 70 | bx lr 71 | -------------------------------------------------------------------------------- /mzero/ired01/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : ired01.gcc.bin ired01.clang.norm.bin ired01.clang.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | ired01.gcc.o : ired01.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c ired01.c -o ired01.gcc.o 28 | 29 | ired01.gcc.bin : memmap vectors.o ired01.gcc.o 30 | $(ARMGNU)-ld -o ired01.gcc.elf -T memmap vectors.o ired01.gcc.o 31 | $(ARMGNU)-objdump -D ired01.gcc.elf > ired01.gcc.list 32 | $(ARMGNU)-objcopy ired01.gcc.elf ired01.gcc.bin -O binary 33 | 34 | 35 | ired01.clang.bc : ired01.c 36 | clang $(LOPS) -c ired01.c -o ired01.clang.bc 37 | 38 | ired01.clang.norm.bin : memmap vectors.o ired01.clang.bc 39 | llc $(LLCOPS) ired01.clang.bc -o ired01.clang.norm.s 40 | $(ARMGNU)-as ired01.clang.norm.s -o ired01.clang.norm.o 41 | $(ARMGNU)-ld -o ired01.clang.norm.elf -T memmap vectors.o ired01.clang.norm.o 42 | $(ARMGNU)-objdump -D ired01.clang.norm.elf > ired01.clang.norm.list 43 | $(ARMGNU)-objcopy ired01.clang.norm.elf ired01.clang.norm.bin -O binary 44 | 45 | ired01.clang.opt.bin : memmap vectors.o ired01.clang.bc 46 | opt $(OOPS) ired01.clang.bc -o ired01.clang.opt.bc 47 | llc $(LLCOPS) ired01.clang.opt.bc -o ired01.clang.opt.s 48 | $(ARMGNU)-as ired01.clang.opt.s -o ired01.clang.opt.o 49 | $(ARMGNU)-ld -o ired01.clang.opt.elf -T memmap vectors.o ired01.clang.opt.o 50 | $(ARMGNU)-objdump -D ired01.clang.opt.elf > ired01.clang.opt.list 51 | $(ARMGNU)-objcopy ired01.clang.opt.elf ired01.clang.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/ired01/README: -------------------------------------------------------------------------------- 1 | 2 | 3 | This sample program demonstrates using an ir (infra red) receiver module 4 | in particular the one from sparkfun 5 | 6 | http://www.sparkfun.com/products/10266 7 | 8 | The way these work is that you supply power and ground, 3.3 or whatever 9 | you are using on your microcontroller, and there is an output pin this 10 | output is the demodulated IR signal. You ultimately want to decode 11 | this signal by measuring the pulses, each IR command has a different 12 | sequence/encoding. 13 | 14 | This example simply demonstrates that it works. When the receiver 15 | output changes the microcontroller changes its led, so normally the led 16 | is off when the output of the ir module is high, when the ir module 17 | pulses low, the led pulses high and comes on. 18 | 19 | Note that not all ir modules use the same pinout and the dont always 20 | use high for off and low for on. 21 | 22 | Decoding will be a future example 23 | -------------------------------------------------------------------------------- /mzero/ired01/ired01.c: -------------------------------------------------------------------------------- 1 | 2 | #define SYSAHBCLKCTRL 0x40048080 3 | 4 | #define GPIO_BASE 0x50000000 5 | 6 | #define GPIO_DIR0 (GPIO_BASE+0x2000) 7 | #define GPIO_PIN0 (GPIO_BASE+0x2100) 8 | 9 | #define GPIO_DIR1 (GPIO_BASE+0x2004) 10 | #define GPIO_SET1 (GPIO_BASE+0x2204) 11 | #define GPIO_CLR1 (GPIO_BASE+0x2284) 12 | 13 | #define PIO0_17 0x40044044 14 | 15 | extern void PUT32 ( unsigned int, unsigned int ); 16 | extern unsigned int GET32 ( unsigned int ); 17 | extern unsigned int PUTGETCLR ( unsigned int, unsigned int ); 18 | extern unsigned int PUTGETSET ( unsigned int, unsigned int ); 19 | 20 | void notmain ( void ) 21 | { 22 | unsigned int ra; 23 | 24 | PUTGETSET(SYSAHBCLKCTRL,(1<<16)); //need this for I/O in general 25 | PUTGETSET(SYSAHBCLKCTRL,(1<<6)); //specifically make sure gpio is enabled 26 | 27 | 28 | ra=GET32(GPIO_DIR1); 29 | ra|=1<<8; 30 | ra|=1<<9; 31 | ra|=1<<10; 32 | ra|=1<<11; 33 | PUT32(GPIO_DIR1,ra); 34 | 35 | PUT32(GPIO_CLR1,(1<<8)|(1<<9)|(1<<10)|(1<<11)); 36 | 37 | PUT32(PIO0_17,0x00000000); 38 | PUTGETCLR(GPIO_DIR0,1<<17); 39 | 40 | while(1) 41 | { 42 | if(GET32(GPIO_PIN0)&(1<<17)) 43 | { 44 | PUT32(GPIO_CLR1,(1<<8)); 45 | } 46 | else 47 | { 48 | PUT32(GPIO_SET1,(1<<8)); 49 | } 50 | } 51 | } 52 | -------------------------------------------------------------------------------- /mzero/ired01/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/ired01/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl dummy 51 | dummy: 52 | bx lr 53 | 54 | 55 | .thumb_func 56 | .globl PUTGETCLR 57 | PUTGETCLR: 58 | ldr r2,[r0] 59 | bic r2,r1 60 | str r2,[r0] 61 | mov r0,r2 62 | bx lr 63 | 64 | .thumb_func 65 | .globl PUTGETSET 66 | PUTGETSET: 67 | ldr r2,[r0] 68 | orr r2,r1 69 | str r2,[r0] 70 | mov r0,r2 71 | bx lr 72 | -------------------------------------------------------------------------------- /mzero/ired02/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : ired02.gcc.bin ired02.clang.norm.bin ired02.clang.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | ired02.gcc.o : ired02.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c ired02.c -o ired02.gcc.o 28 | 29 | ired02.gcc.bin : memmap vectors.o ired02.gcc.o 30 | $(ARMGNU)-ld -o ired02.gcc.elf -T memmap vectors.o ired02.gcc.o 31 | $(ARMGNU)-objdump -D ired02.gcc.elf > ired02.gcc.list 32 | $(ARMGNU)-objcopy ired02.gcc.elf ired02.gcc.bin -O binary 33 | 34 | 35 | ired02.clang.bc : ired02.c 36 | clang $(LOPS) -c ired02.c -o ired02.clang.bc 37 | 38 | ired02.clang.norm.bin : memmap vectors.o ired02.clang.bc 39 | llc $(LLCOPS) ired02.clang.bc -o ired02.clang.norm.s 40 | $(ARMGNU)-as ired02.clang.norm.s -o ired02.clang.norm.o 41 | $(ARMGNU)-ld -o ired02.clang.norm.elf -T memmap vectors.o ired02.clang.norm.o 42 | $(ARMGNU)-objdump -D ired02.clang.norm.elf > ired02.clang.norm.list 43 | $(ARMGNU)-objcopy ired02.clang.norm.elf ired02.clang.norm.bin -O binary 44 | 45 | ired02.clang.opt.bin : memmap vectors.o ired02.clang.bc 46 | opt $(OOPS) ired02.clang.bc -o ired02.clang.opt.bc 47 | llc $(LLCOPS) ired02.clang.opt.bc -o ired02.clang.opt.s 48 | $(ARMGNU)-as ired02.clang.opt.s -o ired02.clang.opt.o 49 | $(ARMGNU)-ld -o ired02.clang.opt.elf -T memmap vectors.o ired02.clang.opt.o 50 | $(ARMGNU)-objdump -D ired02.clang.opt.elf > ired02.clang.opt.list 51 | $(ARMGNU)-objcopy ired02.clang.opt.elf ired02.clang.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/ired02/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/ired02/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | 50 | .thumb_func 51 | .globl PUTGETCLR 52 | PUTGETCLR: 53 | ldr r2,[r0] 54 | bic r2,r1 55 | str r2,[r0] 56 | mov r0,r2 57 | bx lr 58 | 59 | .thumb_func 60 | .globl PUTGETSET 61 | PUTGETSET: 62 | ldr r2,[r0] 63 | orr r2,r1 64 | str r2,[r0] 65 | mov r0,r2 66 | bx lr 67 | 68 | .thumb_func 69 | .globl dummy 70 | dummy: 71 | bx lr 72 | -------------------------------------------------------------------------------- /mzero/ired03/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : ired03.gcc.bin ired03.clang.norm.bin ired03.clang.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | ired03.gcc.o : ired03.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c ired03.c -o ired03.gcc.o 28 | 29 | ired03.gcc.bin : memmap vectors.o ired03.gcc.o 30 | $(ARMGNU)-ld -o ired03.gcc.elf -T memmap vectors.o ired03.gcc.o 31 | $(ARMGNU)-objdump -D ired03.gcc.elf > ired03.gcc.list 32 | $(ARMGNU)-objcopy ired03.gcc.elf ired03.gcc.bin -O binary 33 | 34 | 35 | ired03.clang.bc : ired03.c 36 | clang $(LOPS) -c ired03.c -o ired03.clang.bc 37 | 38 | ired03.clang.norm.bin : memmap vectors.o ired03.clang.bc 39 | llc $(LLCOPS) ired03.clang.bc -o ired03.clang.norm.s 40 | $(ARMGNU)-as ired03.clang.norm.s -o ired03.clang.norm.o 41 | $(ARMGNU)-ld -o ired03.clang.norm.elf -T memmap vectors.o ired03.clang.norm.o 42 | $(ARMGNU)-objdump -D ired03.clang.norm.elf > ired03.clang.norm.list 43 | $(ARMGNU)-objcopy ired03.clang.norm.elf ired03.clang.norm.bin -O binary 44 | 45 | ired03.clang.opt.bin : memmap vectors.o ired03.clang.bc 46 | opt $(OOPS) ired03.clang.bc -o ired03.clang.opt.bc 47 | llc $(LLCOPS) ired03.clang.opt.bc -o ired03.clang.opt.s 48 | $(ARMGNU)-as ired03.clang.opt.s -o ired03.clang.opt.o 49 | $(ARMGNU)-ld -o ired03.clang.opt.elf -T memmap vectors.o ired03.clang.opt.o 50 | $(ARMGNU)-objdump -D ired03.clang.opt.elf > ired03.clang.opt.list 51 | $(ARMGNU)-objcopy ired03.clang.opt.elf ired03.clang.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/ired03/README: -------------------------------------------------------------------------------- 1 | 2 | See the ired02 README, it goes into detail as to what is going on. 3 | 4 | ired03 is the same as ired02 except it uses a 48MHz system clock 5 | instead of the 12MHz clock. 6 | 7 | -------------------------------------------------------------------------------- /mzero/ired03/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/ired03/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | 50 | .thumb_func 51 | .globl PUTGETCLR 52 | PUTGETCLR: 53 | ldr r2,[r0] 54 | bic r2,r1 55 | str r2,[r0] 56 | mov r0,r2 57 | bx lr 58 | 59 | .thumb_func 60 | .globl PUTGETSET 61 | PUTGETSET: 62 | ldr r2,[r0] 63 | orr r2,r1 64 | str r2,[r0] 65 | mov r0,r2 66 | bx lr 67 | 68 | .thumb_func 69 | .globl dummy 70 | dummy: 71 | bx lr 72 | -------------------------------------------------------------------------------- /mzero/promicro/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | all : promicro.gcc.thumb.bin promicro.clang.thumb.norm.bin promicro.clang.thumb.opt.bin 21 | 22 | vectors.o : vectors.s 23 | $(ARMGNU)-as vectors.s -o vectors.o 24 | 25 | promicro.gcc.thumb.o : promicro.c blinker.h 26 | $(ARMGNU)-gcc $(COPS) -mthumb -c promicro.c -o promicro.gcc.thumb.o 27 | 28 | promicro.gcc.thumb.bin : memmap vectors.o promicro.gcc.thumb.o 29 | $(ARMGNU)-ld -o promicro.gcc.thumb.elf -T memmap vectors.o promicro.gcc.thumb.o 30 | $(ARMGNU)-objdump -D promicro.gcc.thumb.elf > promicro.gcc.thumb.list 31 | $(ARMGNU)-objcopy promicro.gcc.thumb.elf promicro.gcc.thumb.bin -O binary 32 | 33 | 34 | promicro.clang.bc : promicro.c blinker.h 35 | clang $(LOPS) -c promicro.c -o promicro.clang.bc 36 | 37 | promicro.clang.thumb.norm.bin : memmap vectors.o promicro.clang.bc 38 | llc $(LLCOPS) promicro.clang.bc -o promicro.clang.thumb.norm.s 39 | $(ARMGNU)-as promicro.clang.thumb.norm.s -o promicro.clang.thumb.norm.o 40 | $(ARMGNU)-ld -o promicro.clang.thumb.norm.elf -T memmap vectors.o promicro.clang.thumb.norm.o 41 | $(ARMGNU)-objdump -D promicro.clang.thumb.norm.elf > promicro.clang.thumb.norm.list 42 | $(ARMGNU)-objcopy promicro.clang.thumb.norm.elf promicro.clang.thumb.norm.bin -O binary 43 | 44 | promicro.clang.thumb.opt.bin : memmap vectors.o promicro.clang.bc 45 | opt $(OOPS) promicro.clang.bc -o promicro.clang.thumb.opt.bc 46 | llc $(LLCOPS) promicro.clang.thumb.opt.bc -o promicro.clang.thumb.opt.s 47 | $(ARMGNU)-as promicro.clang.thumb.opt.s -o promicro.clang.thumb.opt.o 48 | $(ARMGNU)-ld -o promicro.clang.thumb.opt.elf -T memmap vectors.o promicro.clang.thumb.opt.o 49 | $(ARMGNU)-objdump -D promicro.clang.thumb.opt.elf > promicro.clang.thumb.opt.list 50 | $(ARMGNU)-objcopy promicro.clang.thumb.opt.elf promicro.clang.thumb.opt.bin -O binary 51 | 52 | 53 | dumphex : dumphex.c 54 | gcc -o dumphex dumphex.c 55 | 56 | blinker.h : blinker02.s.hex dumphex 57 | ./dumphex blinker02.s.hex 58 | 59 | 60 | blinker01.s.hex : blinker01.s 61 | avra -fI blinker01.s 62 | 63 | blinker02.s.hex : blinker02.s 64 | avra -fI blinker02.s 65 | 66 | clean: 67 | rm -f *.bin 68 | rm -f *.o 69 | rm -f *.elf 70 | rm -f *.list 71 | rm -f *.bc 72 | rm -f *.opt.s 73 | rm -f *.norm.s 74 | rm -f blinker01.s.* 75 | rm -f blinker02.s.* 76 | rm -f dumphex 77 | 78 | 79 | -------------------------------------------------------------------------------- /mzero/promicro/README: -------------------------------------------------------------------------------- 1 | 2 | This example is using the cortex-m0 based mbed as an AVR ISP. 3 | 4 | The AVR board used initially is the Sparkfun pro micro 8Mhz/3.3v 5 | 6 | http://www.sparkfun.com/products/10999 7 | 8 | From an AVR document the chips with this serial isp are either byte 9 | mode or page mode. This chip atmega32u4 is page mode so you load a 10 | temporary buffer with 64 instructions, then send one command to program 11 | that buffer into a page of flash. 12 | 13 | The serial protocol is quite trivial so writing code to use it or modify 14 | this program is simple. 15 | 16 | At this time the code only supports one page/buffer, 64 instructions. 17 | 18 | At this time not worrying about exact timing, it is fast enough using 19 | count to N loops. 20 | 21 | promicro board JP6 (right side) 22 | 23 | 1 24 | 2 gnd 25 | 3 reset 26 | 4 vcc 27 | 5 28 | 6 29 | 7 30 | 8 31 | 9 sck 32 | 10 miso 33 | 11 mosi 34 | 12 35 | 36 | mbed 37 | 38 | lower right 39 | 40 | p26 to reset 41 | p25 to sck 42 | p24 to miso 43 | p23 to mosi 44 | p22 45 | p21 46 | 47 | get power/vcc from top right pin on mbed, get gnd from top left pin 48 | on mbed. 49 | 50 | 51 | 52 | 53 | -------------------------------------------------------------------------------- /mzero/promicro/blinker.h: -------------------------------------------------------------------------------- 1 | 2 | const unsigned short rom[0x80]= 3 | { 4 | 0xC000, //00000000 5 | 0xE000, //00000001 6 | 0xBD04, //00000002 7 | 0xE005, //00000003 8 | 0xBD05, //00000004 9 | 0xE001, //00000005 10 | 0xB904, //00000006 11 | 0xE010, //00000007 12 | 0xE041, //00000008 13 | 0xEF20, //00000009 14 | 0xB516, //0000000A 15 | 0x3010, //0000000B 16 | 0xF7E9, //0000000C 17 | 0xB516, //0000000D 18 | 0x3010, //0000000E 19 | 0xF3E9, //0000000F 20 | 0x9523, //00000010 21 | 0x3020, //00000011 22 | 0xF7B9, //00000012 23 | 0x2704, //00000013 24 | 0xB905, //00000014 25 | 0xCFF3, //00000015 26 | }; 27 | 28 | -------------------------------------------------------------------------------- /mzero/promicro/blinker01.s: -------------------------------------------------------------------------------- 1 | .device ATmega168 2 | .equ DDRB = 0x04 3 | .equ PORTB = 0x05 4 | 5 | .org 0x0000 6 | rjmp RESET 7 | 8 | RESET: 9 | ldi R16,0x01 10 | out DDRB,R16 11 | 12 | ldi R18,0x00 13 | ldi R17,0x00 14 | ldi R20,0x01 15 | Loop: 16 | 17 | ldi R19,0xE8 18 | aloop: 19 | inc R17 20 | cpi R17,0x00 21 | brne aloop 22 | 23 | inc R18 24 | cpi R18,0x00 25 | brne aloop 26 | 27 | inc R19 28 | cpi R19,0x00 29 | brne aloop 30 | 31 | eor R16,R20 32 | out PORTB, R16 33 | rjmp Loop 34 | 35 | -------------------------------------------------------------------------------- /mzero/promicro/blinker02.s: -------------------------------------------------------------------------------- 1 | 2 | .device ATmega168 3 | 4 | .equ DDRB = 0x04 5 | .equ PORTB = 0x05 6 | .equ TCCR0A = 0x24 7 | .equ TCCR0B = 0x25 8 | .equ TCNT0 = 0x26 9 | 10 | ;.equ CLKPR = 0x61 11 | 12 | .org 0x0000 13 | rjmp RESET 14 | 15 | RESET: 16 | 17 | ; ldi r16,0x80 18 | ; ldi r17,0x00 19 | ; sts CLKPR,r16 20 | ; sts CLKPR,r17 21 | 22 | 23 | ldi R16,0x00 24 | out TCCR0A,R16 25 | ldi R16,0x05 26 | out TCCR0B,R16 27 | 28 | ldi R16,0x01 29 | out DDRB,R16 30 | 31 | ldi R17,0x00 32 | ldi R20,0x01 33 | Loop: 34 | 35 | 36 | ldi R18,0xF0 37 | aloop: 38 | in R17,TCNT0 39 | cpi R17,0x00 40 | brne aloop 41 | 42 | bloop: 43 | in R17,TCNT0 44 | cpi R17,0x00 45 | breq bloop 46 | 47 | inc R18 48 | cpi R18,0x00 49 | brne aloop 50 | 51 | eor R16,R20 52 | out PORTB, R16 53 | rjmp Loop 54 | -------------------------------------------------------------------------------- /mzero/promicro/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/promicro/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m0 5 | .syntax unified 6 | 7 | .thumb 8 | 9 | .word 0x10001800 /* stack top address */ 10 | .word _start /* 1 Reset */ 11 | .word hang /* 2 NMI */ 12 | .word hang /* 3 HardFault */ 13 | .word hang /* 4 MemManage */ 14 | .word hang /* 5 BusFault */ 15 | .word hang /* 6 UsageFault */ 16 | .word hang /* 7 RESERVED */ 17 | .word hang /* 8 RESERVED */ 18 | .word hang /* 9 RESERVED*/ 19 | .word hang /* 10 RESERVED */ 20 | .word hang /* 11 SVCall */ 21 | .word hang /* 12 Debug Monitor */ 22 | .word hang /* 13 RESERVED */ 23 | .word hang /* 14 PendSV */ 24 | .word hang /* 15 SysTick */ 25 | .word hang /* 16 External Interrupt(0) */ 26 | .word hang /* 17 External Interrupt(1) */ 27 | .word hang /* 18 External Interrupt(2) */ 28 | .word hang /* 19 ... */ 29 | 30 | 31 | .thumb_func 32 | hang: b . 33 | 34 | .thumb_func 35 | .globl _start 36 | _start: 37 | bl notmain 38 | b hang 39 | 40 | .thumb_func 41 | .globl exit 42 | exit: 43 | b exit 44 | 45 | 46 | .thumb_func 47 | .globl ASMDELAY 48 | ASMDELAY: 49 | subs r0,#1 50 | bne ASMDELAY 51 | 52 | .thumb_func 53 | .globl PUT32 54 | PUT32: 55 | str r1,[r0] 56 | bx lr 57 | 58 | .thumb_func 59 | .globl GET32 60 | GET32: 61 | ldr r0,[r0] 62 | bx lr 63 | 64 | 65 | .thumb_func 66 | .globl PUT8 67 | PUT8: 68 | strb r1,[r0] 69 | bx lr 70 | 71 | .thumb_func 72 | .globl GET8 73 | GET8: 74 | ldrb r0,[r0] 75 | bx lr 76 | 77 | .thumb_func 78 | .globl PUTGETCLR 79 | PUTGETCLR: 80 | ldr r2,[r0] 81 | bics r2,r1 82 | str r2,[r0] 83 | mov r0,r2 84 | bx lr 85 | 86 | .thumb_func 87 | .globl PUTGETSET 88 | PUTGETSET: 89 | ldr r2,[r0] 90 | orrs r2,r1 91 | str r2,[r0] 92 | mov r0,r2 93 | bx lr 94 | 95 | 96 | 97 | .thumb_func 98 | .globl dummy 99 | dummy: 100 | bx lr 101 | -------------------------------------------------------------------------------- /mzero/uart01/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : uart01.gcc.thumb.bin uart01.clang.thumb.norm.bin uart01.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | uart01.gcc.thumb.o : uart01.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c uart01.c -o uart01.gcc.thumb.o 28 | 29 | uart01.gcc.thumb.bin : memmap vectors.o uart01.gcc.thumb.o 30 | $(ARMGNU)-ld -o uart01.gcc.thumb.elf -T memmap vectors.o uart01.gcc.thumb.o 31 | $(ARMGNU)-objdump -D uart01.gcc.thumb.elf > uart01.gcc.thumb.list 32 | $(ARMGNU)-objcopy uart01.gcc.thumb.elf uart01.gcc.thumb.bin -O binary 33 | 34 | 35 | uart01.clang.bc : uart01.c 36 | clang $(LOPS) -c uart01.c -o uart01.clang.bc 37 | 38 | uart01.clang.thumb.norm.bin : memmap vectors.o uart01.clang.bc 39 | llc $(LLCOPS) uart01.clang.bc -o uart01.clang.thumb.norm.s 40 | $(ARMGNU)-as uart01.clang.thumb.norm.s -o uart01.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o uart01.clang.thumb.norm.elf -T memmap vectors.o uart01.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D uart01.clang.thumb.norm.elf > uart01.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy uart01.clang.thumb.norm.elf uart01.clang.thumb.norm.bin -O binary 44 | 45 | uart01.clang.thumb.opt.bin : memmap vectors.o uart01.clang.bc 46 | opt $(OOPS) uart01.clang.bc -o uart01.clang.thumb.opt.bc 47 | llc $(LLCOPS) uart01.clang.thumb.opt.bc -o uart01.clang.thumb.opt.s 48 | $(ARMGNU)-as uart01.clang.thumb.opt.s -o uart01.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o uart01.clang.thumb.opt.elf -T memmap vectors.o uart01.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D uart01.clang.thumb.opt.elf > uart01.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy uart01.clang.thumb.opt.elf uart01.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/uart01/README: -------------------------------------------------------------------------------- 1 | 2 | The blinker programs have established what our clock rate is. Next step 3 | is to set up the uart so we can print stuff out, interact, whatever. 4 | 5 | The USART chapter mentions: 6 | 7 | The USART is configured as follows: 8 | - Pins: The USART pins must be configured in the corresponding IOCON 9 | registers 10 | - The USART block is enabled through the SYSAHBCLKCTRL register 11 | - The peripheral USART clock (PCLK), which is used by the USART baud 12 | rate generator, is controlled by the UARTCLKDIV register 13 | 14 | So we enable the usart we enable gpio pins and iocon. The uart clock 15 | divide register allows clocks as well, wont work with the default setting 16 | of PCLK disabled. There are two output pins that are tied to TXD 17 | p0.19 and p1.27. I/O pins on microcontrollers these days are often 18 | multiplexed, the default setting is for the pins to be general purpose 19 | I/O (GPIO). To connect one of these pins to the USART TXD instead 20 | of the GPIO logic, you have to use the pin configuration registers. 21 | 22 | Looking at the schematic one very cool features is the p0.19 pin does 23 | not go to one of the header pins, it goes to the interface chip. Basically 24 | the interface chip echos what it sees over usb. So you dont need something 25 | to listen to pin level uart signals, you can just use the usb connection 26 | you are already using to program the board and to power it. On linux 27 | the device is /dev/ttyACM0 or ACM1, etc whatever the next free one is 28 | when you plug in. 29 | 30 | Derived from blinker03 this program still blinks the leds, it sends 31 | one character out at 115200 per blink. 32 | 33 | -------------------------------------------------------------------------------- /mzero/uart01/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/uart01/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | 50 | .thumb_func 51 | .globl PUTGETCLR 52 | PUTGETCLR: 53 | ldr r2,[r0] 54 | bic r2,r1 55 | str r2,[r0] 56 | mov r0,r2 57 | bx lr 58 | 59 | .thumb_func 60 | .globl PUTGETSET 61 | PUTGETSET: 62 | ldr r2,[r0] 63 | orr r2,r1 64 | str r2,[r0] 65 | mov r0,r2 66 | bx lr 67 | 68 | .thumb_func 69 | .globl dummy 70 | dummy: 71 | bx lr 72 | -------------------------------------------------------------------------------- /mzero/uart02/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : uart02.gcc.thumb.bin uart02.clang.thumb.norm.bin uart02.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | uart02.gcc.thumb.o : uart02.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c uart02.c -o uart02.gcc.thumb.o 28 | 29 | uart02.gcc.thumb.bin : memmap vectors.o uart02.gcc.thumb.o 30 | $(ARMGNU)-ld -o uart02.gcc.thumb.elf -T memmap vectors.o uart02.gcc.thumb.o 31 | $(ARMGNU)-objdump -D uart02.gcc.thumb.elf > uart02.gcc.thumb.list 32 | $(ARMGNU)-objcopy uart02.gcc.thumb.elf uart02.gcc.thumb.bin -O binary 33 | 34 | 35 | uart02.clang.bc : uart02.c 36 | clang $(LOPS) -c uart02.c -o uart02.clang.bc 37 | 38 | uart02.clang.thumb.norm.bin : memmap vectors.o uart02.clang.bc 39 | llc $(LLCOPS) uart02.clang.bc -o uart02.clang.thumb.norm.s 40 | $(ARMGNU)-as uart02.clang.thumb.norm.s -o uart02.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o uart02.clang.thumb.norm.elf -T memmap vectors.o uart02.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D uart02.clang.thumb.norm.elf > uart02.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy uart02.clang.thumb.norm.elf uart02.clang.thumb.norm.bin -O binary 44 | 45 | uart02.clang.thumb.opt.bin : memmap vectors.o uart02.clang.bc 46 | opt $(OOPS) uart02.clang.bc -o uart02.clang.thumb.opt.bc 47 | llc $(LLCOPS) uart02.clang.thumb.opt.bc -o uart02.clang.thumb.opt.s 48 | $(ARMGNU)-as uart02.clang.thumb.opt.s -o uart02.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o uart02.clang.thumb.opt.elf -T memmap vectors.o uart02.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D uart02.clang.thumb.opt.elf > uart02.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy uart02.clang.thumb.opt.elf uart02.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/uart02/README: -------------------------------------------------------------------------------- 1 | 2 | derived from uart01. whatever you type into your terminal attached 3 | to the virtual uart over usb comes back. The mbed interface chip 4 | handles the usb side of things the target microcontroller is strictly 5 | using the USART. uart01 example was TX only this example demonstrates 6 | both RX and TX on the USART (using polling). 7 | -------------------------------------------------------------------------------- /mzero/uart02/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/uart02/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | 50 | .thumb_func 51 | .globl PUTGETCLR 52 | PUTGETCLR: 53 | ldr r2,[r0] 54 | bic r2,r1 55 | str r2,[r0] 56 | mov r0,r2 57 | bx lr 58 | 59 | .thumb_func 60 | .globl PUTGETSET 61 | PUTGETSET: 62 | ldr r2,[r0] 63 | orr r2,r1 64 | str r2,[r0] 65 | mov r0,r2 66 | bx lr 67 | 68 | .thumb_func 69 | .globl dummy 70 | dummy: 71 | bx lr 72 | -------------------------------------------------------------------------------- /mzero/uart03/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | 21 | all : uart03.gcc.thumb.bin uart03.clang.thumb.norm.bin uart03.clang.thumb.opt.bin 22 | 23 | vectors.o : vectors.s 24 | $(ARMGNU)-as vectors.s -o vectors.o 25 | 26 | uart03.gcc.thumb.o : uart03.c 27 | $(ARMGNU)-gcc $(COPS) -mthumb -c uart03.c -o uart03.gcc.thumb.o 28 | 29 | uart03.gcc.thumb.bin : memmap vectors.o uart03.gcc.thumb.o 30 | $(ARMGNU)-ld -o uart03.gcc.thumb.elf -T memmap vectors.o uart03.gcc.thumb.o 31 | $(ARMGNU)-objdump -D uart03.gcc.thumb.elf > uart03.gcc.thumb.list 32 | $(ARMGNU)-objcopy uart03.gcc.thumb.elf uart03.gcc.thumb.bin -O binary 33 | 34 | 35 | uart03.clang.bc : uart03.c 36 | clang $(LOPS) -c uart03.c -o uart03.clang.bc 37 | 38 | uart03.clang.thumb.norm.bin : memmap vectors.o uart03.clang.bc 39 | llc $(LLCOPS) uart03.clang.bc -o uart03.clang.thumb.norm.s 40 | $(ARMGNU)-as uart03.clang.thumb.norm.s -o uart03.clang.thumb.norm.o 41 | $(ARMGNU)-ld -o uart03.clang.thumb.norm.elf -T memmap vectors.o uart03.clang.thumb.norm.o 42 | $(ARMGNU)-objdump -D uart03.clang.thumb.norm.elf > uart03.clang.thumb.norm.list 43 | $(ARMGNU)-objcopy uart03.clang.thumb.norm.elf uart03.clang.thumb.norm.bin -O binary 44 | 45 | uart03.clang.thumb.opt.bin : memmap vectors.o uart03.clang.bc 46 | opt $(OOPS) uart03.clang.bc -o uart03.clang.thumb.opt.bc 47 | llc $(LLCOPS) uart03.clang.thumb.opt.bc -o uart03.clang.thumb.opt.s 48 | $(ARMGNU)-as uart03.clang.thumb.opt.s -o uart03.clang.thumb.opt.o 49 | $(ARMGNU)-ld -o uart03.clang.thumb.opt.elf -T memmap vectors.o uart03.clang.thumb.opt.o 50 | $(ARMGNU)-objdump -D uart03.clang.thumb.opt.elf > uart03.clang.thumb.opt.list 51 | $(ARMGNU)-objcopy uart03.clang.thumb.opt.elf uart03.clang.thumb.opt.bin -O binary 52 | 53 | 54 | 55 | 56 | clean: 57 | rm -f *.bin 58 | rm -f *.o 59 | rm -f *.elf 60 | rm -f *.list 61 | rm -f *.bc 62 | rm -f *.opt.s 63 | rm -f *.norm.s 64 | 65 | -------------------------------------------------------------------------------- /mzero/uart03/README: -------------------------------------------------------------------------------- 1 | 2 | derived from uart02. and blinker05 (see blinker05 and blinker04 about 3 | using something other than the internal clock). 4 | 5 | PCLK set to 48MHz. Two uart init methods shown, the simplest is to 6 | divide the UART_PCLK by four, resulting in a 12Mhz clock which is what 7 | uart02 used. No need to change the fractional divisors, etc. The other 8 | method is to follow the flowchart in the users manual to come up with 9 | a fractional divisor, in this case 1.533333.... 1 + 8/15. With a DLL 10 | of 17. 11 | 12 | The microcontroller uses the USART to communicate here, it is in this 13 | example configured to connec to the mbed interface which acts as a 14 | usb to serial adapter so you dont need a separate serial interface. 15 | Find the /dev/ttyACM# associated with the mbed. 16 | -------------------------------------------------------------------------------- /mzero/uart03/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/uart03/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10001800 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT32 39 | PUT32: 40 | str r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET32 45 | GET32: 46 | ldr r0,[r0] 47 | bx lr 48 | 49 | 50 | .thumb_func 51 | .globl PUTGETCLR 52 | PUTGETCLR: 53 | ldr r2,[r0] 54 | bic r2,r1 55 | str r2,[r0] 56 | mov r0,r2 57 | bx lr 58 | 59 | .thumb_func 60 | .globl PUTGETSET 61 | PUTGETSET: 62 | ldr r2,[r0] 63 | orr r2,r1 64 | str r2,[r0] 65 | mov r0,r2 66 | bx lr 67 | 68 | .thumb_func 69 | .globl dummy 70 | dummy: 71 | bx lr 72 | -------------------------------------------------------------------------------- /mzero/xmega01/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | all : xmega01.gcc.thumb.bin xmega01.clang.thumb.norm.bin xmega01.clang.thumb.opt.bin 21 | 22 | vectors.o : vectors.s 23 | $(ARMGNU)-as vectors.s -o vectors.o 24 | 25 | xmega01.gcc.thumb.o : xmega01.c blinker.h 26 | $(ARMGNU)-gcc $(COPS) -mthumb -c xmega01.c -o xmega01.gcc.thumb.o 27 | 28 | xmega01.gcc.thumb.bin : memmap vectors.o xmega01.gcc.thumb.o 29 | $(ARMGNU)-ld -o xmega01.gcc.thumb.elf -T memmap vectors.o xmega01.gcc.thumb.o 30 | $(ARMGNU)-objdump -D xmega01.gcc.thumb.elf > xmega01.gcc.thumb.list 31 | $(ARMGNU)-objcopy xmega01.gcc.thumb.elf xmega01.gcc.thumb.bin -O binary 32 | 33 | 34 | xmega01.clang.bc : xmega01.c blinker.h 35 | clang $(LOPS) -c xmega01.c -o xmega01.clang.bc 36 | 37 | xmega01.clang.thumb.norm.bin : memmap vectors.o xmega01.clang.bc 38 | llc $(LLCOPS) xmega01.clang.bc -o xmega01.clang.thumb.norm.s 39 | $(ARMGNU)-as xmega01.clang.thumb.norm.s -o xmega01.clang.thumb.norm.o 40 | $(ARMGNU)-ld -o xmega01.clang.thumb.norm.elf -T memmap vectors.o xmega01.clang.thumb.norm.o 41 | $(ARMGNU)-objdump -D xmega01.clang.thumb.norm.elf > xmega01.clang.thumb.norm.list 42 | $(ARMGNU)-objcopy xmega01.clang.thumb.norm.elf xmega01.clang.thumb.norm.bin -O binary 43 | 44 | xmega01.clang.thumb.opt.bin : memmap vectors.o xmega01.clang.bc 45 | opt $(OOPS) xmega01.clang.bc -o xmega01.clang.thumb.opt.bc 46 | llc $(LLCOPS) xmega01.clang.thumb.opt.bc -o xmega01.clang.thumb.opt.s 47 | $(ARMGNU)-as xmega01.clang.thumb.opt.s -o xmega01.clang.thumb.opt.o 48 | $(ARMGNU)-ld -o xmega01.clang.thumb.opt.elf -T memmap vectors.o xmega01.clang.thumb.opt.o 49 | $(ARMGNU)-objdump -D xmega01.clang.thumb.opt.elf > xmega01.clang.thumb.opt.list 50 | $(ARMGNU)-objcopy xmega01.clang.thumb.opt.elf xmega01.clang.thumb.opt.bin -O binary 51 | 52 | dumphex : dumphex.c 53 | gcc -o dumphex dumphex.c 54 | 55 | blinker.h : blinker02.s.hex dumphex 56 | ./dumphex blinker02.s.hex 57 | 58 | 59 | blinker01.s.hex : blinker01.s 60 | avra -fI blinker01.s 61 | 62 | 63 | 64 | blinker02.s.hex : blinker02.s 65 | avra -fI blinker02.s 66 | 67 | clean: 68 | rm -f *.bin 69 | rm -f *.o 70 | rm -f *.elf 71 | rm -f *.list 72 | rm -f *.bc 73 | rm -f *.opt.s 74 | rm -f *.norm.s 75 | rm -f blinker01.s.* 76 | rm -f blinker02.s.* 77 | rm -f dumphex 78 | 79 | 80 | -------------------------------------------------------------------------------- /mzero/xmega01/README: -------------------------------------------------------------------------------- 1 | 2 | -------------------------------------------------------------------------------- /mzero/xmega01/blinker01.s: -------------------------------------------------------------------------------- 1 | 2 | .org 0x0000 3 | rjmp RESET 4 | 5 | RESET: 6 | 7 | 8 | ldi r19,0x02 9 | ldi r30,0x50 10 | ldi r31,0x00 11 | st z+,r19 ;; enable 32MHz internal oscillator 12 | osc_wait: 13 | ld r18,z 14 | andi r18,0x2 15 | breq osc_wait ;; wait for it to be stable 16 | ldi r18,0xD8 17 | ldi r19,0x01 18 | 19 | ldi r28,0x34 20 | ldi r29,0x00 21 | 22 | ldi r30,0x40 23 | ldi r31,0x00 24 | 25 | st y,r18 ;; ccp I/O protection 26 | st z,r19 ;; change clock source 27 | nop 28 | nop 29 | nop 30 | 31 | 32 | ;;USART initialization should use the following sequence: 33 | ;;1. Set the TxD pin value high, and optionally the XCK pin low. 34 | ;;2. Set the TxD and optionally the XCK pin as output. 35 | ;;3. Set the baud rate and frame format. 36 | ;;4. Set mode of operation (enables the XCK pin output in synchronous mode). 37 | ;;5. Enable the Transmitter or the Receiver depending on the usage. 38 | ;;For interrupt driven USART operation, global interrupts should be disabled during the 39 | ;;initialization 40 | 41 | 42 | over: 43 | 44 | ldi R16,0xFF 45 | ldi R21,0xFF 46 | sts 0x6A1,R16 47 | sts 0x6A4,R16 48 | 49 | 50 | 51 | 52 | ldi R18,0x00 53 | ldi R17,0x00 54 | ldi R20,0x20 55 | Loop: 56 | 57 | ldi R19,0xD0 58 | aloop: 59 | inc R17 60 | cpi R17,0x00 61 | brne aloop 62 | 63 | inc R18 64 | cpi R18,0x00 65 | brne aloop 66 | 67 | inc R19 68 | cpi R19,0x00 69 | brne aloop 70 | 71 | eor R16,R21 72 | sts 0x6A4, R16 73 | rjmp Loop 74 | 75 | 76 | 77 | -------------------------------------------------------------------------------- /mzero/xmega01/blinker01/Makefile: -------------------------------------------------------------------------------- 1 | 2 | 3 | blinker01.s.hex : blinker01.s 4 | avra -fI blinker01.s 5 | 6 | clean : 7 | rm -f blinker01.s.* 8 | 9 | -------------------------------------------------------------------------------- /mzero/xmega01/blinker01/README: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/dwelch67/mbed_samples/d4719a508f1ee6082ee03280d0ddfb38c320bfbc/mzero/xmega01/blinker01/README -------------------------------------------------------------------------------- /mzero/xmega01/blinker01/blinker01.s: -------------------------------------------------------------------------------- 1 | 2 | .org 0x0000 3 | rjmp RESET 4 | 5 | RESET: 6 | ldi R16,0xFF 7 | ldi R21,0xFF 8 | sts 0x6A1,R16 9 | 10 | ldi R18,0x00 11 | ldi R17,0x00 12 | ldi R20,0x20 13 | Loop: 14 | 15 | ldi R19,0xE8 16 | aloop: 17 | inc R17 18 | cpi R17,0x00 19 | brne aloop 20 | 21 | inc R18 22 | cpi R18,0x00 23 | brne aloop 24 | 25 | inc R19 26 | cpi R19,0x00 27 | brne aloop 28 | 29 | eor R16,R21 30 | sts 0x6A4, R16 31 | rjmp Loop 32 | 33 | -------------------------------------------------------------------------------- /mzero/xmega01/blinker02.s: -------------------------------------------------------------------------------- 1 | 2 | .org 0x0000 3 | rjmp RESET 4 | 5 | RESET: 6 | 7 | 8 | ;; 9 | ;; 10 | ;; ldi r19,0x02 11 | ;; ldi r30,0x50 12 | ;; ldi r31,0x00 13 | ;; st z+,r19 ;; enable 32MHz internal oscillator 14 | ;;osc_wait: 15 | ;; ld r18,z 16 | ;; andi r18,0x2 17 | ;; breq osc_wait ;; wait for it to be stable 18 | ;; ldi r18,0xD8 19 | ;; ldi r19,0x01 20 | ;; 21 | ;; ldi r28,0x34 22 | ;; ldi r29,0x00 23 | ;; 24 | ;; ldi r30,0x40 25 | ;; ldi r31,0x00 26 | ;; 27 | ;; st y,r18 ;; ccp I/O protection 28 | ;; st z,r19 ;; change clock source 29 | ;; nop 30 | ;; nop 31 | ;; nop 32 | ;; 33 | ;;#define SPL (0x3D + 0x20) 34 | ;;#define SPH (0x3E + 0x20) 35 | 36 | 37 | 38 | ldi r30,0x40 39 | ldi r31,0x20 40 | 41 | ldi r16,0x69 42 | st z,r16 43 | 44 | ldi r16,0x3C 45 | mov r0,r16 46 | ;lac z,rd 47 | .dw 0x9204 48 | 49 | 50 | 51 | ldi R16,0xFF 52 | sts 0x6A1,R16 53 | 54 | ld r24,z 55 | mov r24,r0 56 | ;mov r24,r30 57 | 58 | mov r25,r24 59 | andi r25,0x80 60 | rcall dobit 61 | mov r25,r24 62 | andi r25,0x40 63 | rcall dobit 64 | mov r25,r24 65 | andi r25,0x20 66 | rcall dobit 67 | mov r25,r24 68 | andi r25,0x10 69 | rcall dobit 70 | mov r25,r24 71 | andi r25,0x08 72 | rcall dobit 73 | mov r25,r24 74 | andi r25,0x04 75 | rcall dobit 76 | mov r25,r24 77 | andi r25,0x02 78 | rcall dobit 79 | mov r25,r24 80 | andi r25,0x01 81 | rcall dobit 82 | 83 | top: 84 | rjmp top 85 | 86 | 87 | 88 | 89 | 90 | dobit: 91 | breq zero 92 | ;brne one 93 | 94 | 95 | one: 96 | ldi R16,0xFF 97 | sts 0x6A4,R16 98 | 99 | ldi R18,0x00 100 | ldi R17,0x00 101 | ldi R19,0x10 102 | oloop: 103 | inc R17 104 | cpi R17,0x00 105 | brne oloop 106 | 107 | inc R18 108 | cpi R18,0x00 109 | brne oloop 110 | 111 | dec R19 112 | cpi R19,0x00 113 | brne oloop 114 | 115 | rjmp off 116 | 117 | 118 | zero: 119 | ldi R16,0xFF 120 | sts 0x6A4,R16 121 | 122 | ldi R18,0x00 123 | ldi R17,0x00 124 | ldi R19,0x4 125 | zloop: 126 | inc R17 127 | cpi R17,0x00 128 | brne zloop 129 | 130 | inc R18 131 | cpi R18,0x00 132 | brne zloop 133 | 134 | dec R19 135 | cpi R19,0x00 136 | brne zloop 137 | 138 | rjmp off 139 | 140 | off: 141 | ldi R16,0x00 142 | sts 0x6A4,R16 143 | 144 | ldi R18,0x00 145 | ldi R17,0x00 146 | ldi R19,0x4 147 | floop: 148 | inc R17 149 | cpi R17,0x00 150 | brne floop 151 | 152 | inc R18 153 | cpi R18,0x00 154 | brne floop 155 | 156 | dec R19 157 | cpi R19,0x00 158 | brne floop 159 | 160 | ret 161 | 162 | -------------------------------------------------------------------------------- /mzero/xmega01/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/xmega01/par.c: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | 4 | 5 | int main ( void ) 6 | { 7 | unsigned int ra; 8 | unsigned int rb; 9 | unsigned int rc; 10 | 11 | for(ra=0x00;ra<=0xFF;ra++) 12 | { 13 | rc=0; 14 | for(rb=0x80;rb;rb>>=1) if(ra&rb) rc++; 15 | rc&=1; 16 | printf(" %u, //0x%02X\n",rc,ra); 17 | } 18 | 19 | return(0); 20 | } 21 | 22 | 23 | -------------------------------------------------------------------------------- /mzero/xmega01/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m0 5 | .syntax unified 6 | 7 | .thumb 8 | 9 | .word 0x10001800 /* stack top address */ 10 | .word _start /* 1 Reset */ 11 | .word hang /* 2 NMI */ 12 | .word hang /* 3 HardFault */ 13 | .word hang /* 4 MemManage */ 14 | .word hang /* 5 BusFault */ 15 | .word hang /* 6 UsageFault */ 16 | .word hang /* 7 RESERVED */ 17 | .word hang /* 8 RESERVED */ 18 | .word hang /* 9 RESERVED*/ 19 | .word hang /* 10 RESERVED */ 20 | .word hang /* 11 SVCall */ 21 | .word hang /* 12 Debug Monitor */ 22 | .word hang /* 13 RESERVED */ 23 | .word hang /* 14 PendSV */ 24 | .word hang /* 15 SysTick */ 25 | .word hang /* 16 External Interrupt(0) */ 26 | .word hang /* 17 External Interrupt(1) */ 27 | .word hang /* 18 External Interrupt(2) */ 28 | .word hang /* 19 ... */ 29 | 30 | 31 | .thumb_func 32 | hang: b . 33 | 34 | .thumb_func 35 | .globl _start 36 | _start: 37 | bl notmain 38 | b hang 39 | 40 | .thumb_func 41 | .globl exit 42 | exit: 43 | b exit 44 | 45 | 46 | .thumb_func 47 | .globl ASMDELAY 48 | ASMDELAY: 49 | subs r0,#1 50 | bne ASMDELAY 51 | 52 | .thumb_func 53 | .globl PUT32 54 | PUT32: 55 | str r1,[r0] 56 | bx lr 57 | 58 | .thumb_func 59 | .globl GET32 60 | GET32: 61 | ldr r0,[r0] 62 | bx lr 63 | 64 | 65 | .thumb_func 66 | .globl PUT8 67 | PUT8: 68 | strb r1,[r0] 69 | bx lr 70 | 71 | .thumb_func 72 | .globl GET8 73 | GET8: 74 | ldrb r0,[r0] 75 | bx lr 76 | 77 | .thumb_func 78 | .globl PUTGETCLR 79 | PUTGETCLR: 80 | ldr r2,[r0] 81 | bics r2,r1 82 | str r2,[r0] 83 | mov r0,r2 84 | bx lr 85 | 86 | .thumb_func 87 | .globl PUTGETSET 88 | PUTGETSET: 89 | ldr r2,[r0] 90 | orrs r2,r1 91 | str r2,[r0] 92 | mov r0,r2 93 | bx lr 94 | 95 | 96 | 97 | .thumb_func 98 | .globl dummy 99 | dummy: 100 | bx lr 101 | -------------------------------------------------------------------------------- /mzero/xmega02/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 11 | 12 | AOPS = --warn --fatal-warnings 13 | 14 | OOPS = -std-compile-opts 15 | 16 | stuff = -O2 -std-compile-opts -strip-debug 17 | 18 | 19 | 20 | all : xmega02.gcc.thumb.bin xmega02.clang.thumb.norm.bin xmega02.clang.thumb.opt.bin 21 | 22 | vectors.o : vectors.s 23 | $(ARMGNU)-as vectors.s -o vectors.o 24 | 25 | xmega02.gcc.thumb.o : xmega02.c blinker.h 26 | $(ARMGNU)-gcc $(COPS) -mthumb -c xmega02.c -o xmega02.gcc.thumb.o 27 | 28 | xmega02.gcc.thumb.bin : memmap vectors.o xmega02.gcc.thumb.o 29 | $(ARMGNU)-ld -o xmega02.gcc.thumb.elf -T memmap vectors.o xmega02.gcc.thumb.o 30 | $(ARMGNU)-objdump -D xmega02.gcc.thumb.elf > xmega02.gcc.thumb.list 31 | $(ARMGNU)-objcopy xmega02.gcc.thumb.elf xmega02.gcc.thumb.bin -O binary 32 | 33 | 34 | xmega02.clang.bc : xmega02.c blinker.h 35 | clang $(LOPS) -c xmega02.c -o xmega02.clang.bc 36 | 37 | xmega02.clang.thumb.norm.bin : memmap vectors.o xmega02.clang.bc 38 | llc $(LLCOPS) xmega02.clang.bc -o xmega02.clang.thumb.norm.s 39 | $(ARMGNU)-as xmega02.clang.thumb.norm.s -o xmega02.clang.thumb.norm.o 40 | $(ARMGNU)-ld -o xmega02.clang.thumb.norm.elf -T memmap vectors.o xmega02.clang.thumb.norm.o 41 | $(ARMGNU)-objdump -D xmega02.clang.thumb.norm.elf > xmega02.clang.thumb.norm.list 42 | $(ARMGNU)-objcopy xmega02.clang.thumb.norm.elf xmega02.clang.thumb.norm.bin -O binary 43 | 44 | xmega02.clang.thumb.opt.bin : memmap vectors.o xmega02.clang.bc 45 | opt $(OOPS) xmega02.clang.bc -o xmega02.clang.thumb.opt.bc 46 | llc $(LLCOPS) xmega02.clang.thumb.opt.bc -o xmega02.clang.thumb.opt.s 47 | $(ARMGNU)-as xmega02.clang.thumb.opt.s -o xmega02.clang.thumb.opt.o 48 | $(ARMGNU)-ld -o xmega02.clang.thumb.opt.elf -T memmap vectors.o xmega02.clang.thumb.opt.o 49 | $(ARMGNU)-objdump -D xmega02.clang.thumb.opt.elf > xmega02.clang.thumb.opt.list 50 | $(ARMGNU)-objcopy xmega02.clang.thumb.opt.elf xmega02.clang.thumb.opt.bin -O binary 51 | 52 | dumphex : dumphex.c 53 | gcc -o dumphex dumphex.c 54 | 55 | blinker.h : blinker03.hex dumphex 56 | ./dumphex blinker03.hex 57 | 58 | 59 | blinker01.s.hex : blinker01.s 60 | avra -fI blinker01.s 61 | 62 | blinker02.s.hex : blinker02.s 63 | avra -fI blinker02.s 64 | 65 | blinker03.hex : blinker03.s xblinker.c avrmap 66 | avr-as blinker03.s -o blinker03.o 67 | avr-gcc -c $(COPS) xblinker.c -o xblinker.o 68 | avr-ld -T avrmap blinker03.o xblinker.o -o blinker03.elf 69 | avr-objdump -D blinker03.elf > blinker03.list 70 | avr-objcopy blinker03.elf -O ihex blinker03.hex 71 | 72 | clean: 73 | rm -f *.bin 74 | rm -f *.o 75 | rm -f *.elf 76 | rm -f *.list 77 | rm -f *.bc 78 | rm -f *.opt.s 79 | rm -f *.norm.s 80 | rm -f blinker01.s.* 81 | rm -f blinker02.s.* 82 | rm -f dumphex 83 | rm -f *.hex 84 | 85 | 86 | -------------------------------------------------------------------------------- /mzero/xmega02/README: -------------------------------------------------------------------------------- 1 | 2 | -------------------------------------------------------------------------------- /mzero/xmega02/avrmap: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x00000000, LENGTH = 0x1000 5 | ram : ORIGIN = 0x00002000, LENGTH = 0x1000 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > rom 11 | .trampolines : { *(.trampolines*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/xmega02/blinker01.s: -------------------------------------------------------------------------------- 1 | 2 | .org 0x0000 3 | rjmp RESET 4 | 5 | RESET: 6 | 7 | ldi r19,0x02 8 | ldi r30,0x50 9 | ldi r31,0x00 10 | st z+,r19 ;; enable 32MHz internal oscillator 11 | osc_wait: 12 | ld r18,z 13 | andi r18,0x2 14 | breq osc_wait ;; wait for it to be stable 15 | ldi r18,0xD8 16 | ldi r19,0x01 17 | 18 | ldi r28,0x34 19 | ldi r29,0x00 20 | 21 | ldi r30,0x40 22 | ldi r31,0x00 23 | 24 | st y,r18 ;; ccp I/O protection 25 | st z,r19 ;; change clock source 26 | nop 27 | nop 28 | nop 29 | 30 | over: 31 | 32 | ldi R16,0x80 33 | sts 0x6A1,R16 34 | ldi R16,0xFF 35 | sts 0x6A4,R16 36 | 37 | ldi R21,0xFF 38 | 39 | 40 | ldi R18,0x00 41 | ldi R17,0x00 42 | ldi R20,0x20 43 | Loop: 44 | 45 | ldi R19,0xD0 46 | aloop: 47 | inc R17 48 | cpi R17,0x00 49 | brne aloop 50 | 51 | inc R18 52 | cpi R18,0x00 53 | brne aloop 54 | 55 | inc R19 56 | cpi R19,0x00 57 | brne aloop 58 | 59 | eor R16,R21 60 | sts 0x6A4, R16 61 | rjmp Loop 62 | 63 | -------------------------------------------------------------------------------- /mzero/xmega02/blinker02.s: -------------------------------------------------------------------------------- 1 | 2 | .org 0x0000 3 | rjmp RESET 4 | 5 | RESET: 6 | 7 | 8 | ;; 9 | ;; 10 | ;; ldi r19,0x02 11 | ;; ldi r30,0x50 12 | ;; ldi r31,0x00 13 | ;; st z+,r19 ;; enable 32MHz internal oscillator 14 | ;;osc_wait: 15 | ;; ld r18,z 16 | ;; andi r18,0x2 17 | ;; breq osc_wait ;; wait for it to be stable 18 | ;; ldi r18,0xD8 19 | ;; ldi r19,0x01 20 | ;; 21 | ;; ldi r28,0x34 22 | ;; ldi r29,0x00 23 | ;; 24 | ;; ldi r30,0x40 25 | ;; ldi r31,0x00 26 | ;; 27 | ;; st y,r18 ;; ccp I/O protection 28 | ;; st z,r19 ;; change clock source 29 | ;; nop 30 | ;; nop 31 | ;; nop 32 | ;; 33 | ;;#define SPL (0x3D + 0x20) 34 | ;;#define SPH (0x3E + 0x20) 35 | 36 | 37 | 38 | ldi r30,0x40 39 | ldi r31,0x20 40 | 41 | ldi r16,0x69 42 | st z,r16 43 | 44 | ldi r16,0x3C 45 | mov r0,r16 46 | ;lac z,rd 47 | .dw 0x9204 48 | 49 | 50 | 51 | ldi R16,0xFF 52 | sts 0x6A1,R16 53 | 54 | ld r24,z 55 | mov r24,r0 56 | ;mov r24,r30 57 | 58 | mov r25,r24 59 | andi r25,0x80 60 | rcall dobit 61 | mov r25,r24 62 | andi r25,0x40 63 | rcall dobit 64 | mov r25,r24 65 | andi r25,0x20 66 | rcall dobit 67 | mov r25,r24 68 | andi r25,0x10 69 | rcall dobit 70 | mov r25,r24 71 | andi r25,0x08 72 | rcall dobit 73 | mov r25,r24 74 | andi r25,0x04 75 | rcall dobit 76 | mov r25,r24 77 | andi r25,0x02 78 | rcall dobit 79 | mov r25,r24 80 | andi r25,0x01 81 | rcall dobit 82 | 83 | top: 84 | rjmp top 85 | 86 | 87 | 88 | 89 | 90 | dobit: 91 | breq zero 92 | ;brne one 93 | 94 | 95 | one: 96 | ldi R16,0xFF 97 | sts 0x6A4,R16 98 | 99 | ldi R18,0x00 100 | ldi R17,0x00 101 | ldi R19,0x10 102 | oloop: 103 | inc R17 104 | cpi R17,0x00 105 | brne oloop 106 | 107 | inc R18 108 | cpi R18,0x00 109 | brne oloop 110 | 111 | dec R19 112 | cpi R19,0x00 113 | brne oloop 114 | 115 | rjmp off 116 | 117 | 118 | zero: 119 | ldi R16,0xFF 120 | sts 0x6A4,R16 121 | 122 | ldi R18,0x00 123 | ldi R17,0x00 124 | ldi R19,0x4 125 | zloop: 126 | inc R17 127 | cpi R17,0x00 128 | brne zloop 129 | 130 | inc R18 131 | cpi R18,0x00 132 | brne zloop 133 | 134 | dec R19 135 | cpi R19,0x00 136 | brne zloop 137 | 138 | rjmp off 139 | 140 | off: 141 | ldi R16,0x00 142 | sts 0x6A4,R16 143 | 144 | ldi R18,0x00 145 | ldi R17,0x00 146 | ldi R19,0x4 147 | floop: 148 | inc R17 149 | cpi R17,0x00 150 | brne floop 151 | 152 | inc R18 153 | cpi R18,0x00 154 | brne floop 155 | 156 | dec R19 157 | cpi R19,0x00 158 | brne floop 159 | 160 | ret 161 | 162 | -------------------------------------------------------------------------------- /mzero/xmega02/blinker03.s: -------------------------------------------------------------------------------- 1 | 2 | .globl _start 3 | _start: 4 | rjmp reset 5 | 6 | 7 | reset: 8 | 9 | ;rjmp over 10 | 11 | ldi r19,0x02 12 | ldi r30,0x50 13 | ldi r31,0x00 14 | st z+,r19 ;; enable 32MHz internal oscillator 15 | osc_wait: 16 | ld r18,z 17 | andi r18,0x2 18 | breq osc_wait ;; wait for it to be stable 19 | ldi r18,0xD8 20 | ldi r19,0x01 21 | 22 | ldi r28,0x34 23 | ldi r29,0x00 24 | 25 | ldi r30,0x40 26 | ldi r31,0x00 27 | 28 | st y,r18 ;; ccp I/O protection 29 | st z,r19 ;; change clock source 30 | nop 31 | nop 32 | nop 33 | 34 | over: 35 | 36 | rcall notmain 37 | 1: 38 | rjmp 1b 39 | 40 | .globl dummy 41 | dummy: 42 | ldi r24,0x00 43 | 1: 44 | inc r24 45 | brne 1b 46 | 47 | ret 48 | 49 | -------------------------------------------------------------------------------- /mzero/xmega02/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /mzero/xmega02/par.c: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | 4 | 5 | int main ( void ) 6 | { 7 | unsigned int ra; 8 | unsigned int rb; 9 | unsigned int rc; 10 | 11 | for(ra=0x00;ra<=0xFF;ra++) 12 | { 13 | rc=0; 14 | for(rb=0x80;rb;rb>>=1) if(ra&rb) rc++; 15 | rc&=1; 16 | printf(" %u, //0x%02X\n",rc,ra); 17 | } 18 | 19 | return(0); 20 | } 21 | 22 | 23 | -------------------------------------------------------------------------------- /mzero/xmega02/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m0 5 | .syntax unified 6 | 7 | .thumb 8 | 9 | .word 0x10001800 /* stack top address */ 10 | .word _start /* 1 Reset */ 11 | .word hang /* 2 NMI */ 12 | .word hang /* 3 HardFault */ 13 | .word hang /* 4 MemManage */ 14 | .word hang /* 5 BusFault */ 15 | .word hang /* 6 UsageFault */ 16 | .word hang /* 7 RESERVED */ 17 | .word hang /* 8 RESERVED */ 18 | .word hang /* 9 RESERVED*/ 19 | .word hang /* 10 RESERVED */ 20 | .word hang /* 11 SVCall */ 21 | .word hang /* 12 Debug Monitor */ 22 | .word hang /* 13 RESERVED */ 23 | .word hang /* 14 PendSV */ 24 | .word hang /* 15 SysTick */ 25 | .word hang /* 16 External Interrupt(0) */ 26 | .word hang /* 17 External Interrupt(1) */ 27 | .word hang /* 18 External Interrupt(2) */ 28 | .word hang /* 19 ... */ 29 | 30 | 31 | .thumb_func 32 | hang: b . 33 | 34 | .thumb_func 35 | .globl _start 36 | _start: 37 | bl notmain 38 | b hang 39 | 40 | .thumb_func 41 | .globl doexit 42 | doexit: 43 | b doexit 44 | 45 | 46 | .thumb_func 47 | .globl ASMDELAY 48 | ASMDELAY: 49 | subs r0,#1 50 | bne ASMDELAY 51 | 52 | .thumb_func 53 | .globl PUT32 54 | PUT32: 55 | str r1,[r0] 56 | bx lr 57 | 58 | .thumb_func 59 | .globl GET32 60 | GET32: 61 | ldr r0,[r0] 62 | bx lr 63 | 64 | 65 | .thumb_func 66 | .globl PUT8 67 | PUT8: 68 | strb r1,[r0] 69 | bx lr 70 | 71 | .thumb_func 72 | .globl GET8 73 | GET8: 74 | ldrb r0,[r0] 75 | bx lr 76 | 77 | .thumb_func 78 | .globl PUTGETCLR 79 | PUTGETCLR: 80 | ldr r2,[r0] 81 | bics r2,r1 82 | str r2,[r0] 83 | mov r0,r2 84 | bx lr 85 | 86 | .thumb_func 87 | .globl PUTGETSET 88 | PUTGETSET: 89 | ldr r2,[r0] 90 | orrs r2,r1 91 | str r2,[r0] 92 | mov r0,r2 93 | bx lr 94 | 95 | 96 | 97 | .thumb_func 98 | .globl dummy 99 | dummy: 100 | bx lr 101 | -------------------------------------------------------------------------------- /mzero/xmega02/xblinker.c: -------------------------------------------------------------------------------- 1 | 2 | #define PORTF_BASE 0x6A0 3 | #define PORTF_DIRSET (*((volatile unsigned char *)(PORTF_BASE+0x01))) 4 | #define PORTF_DIRCLR (*((volatile unsigned char *)(PORTF_BASE+0x02))) 5 | #define PORTF_OUT (*((volatile unsigned char *)(PORTF_BASE+0x04))) 6 | #define PORTF_OUTSET (*((volatile unsigned char *)(PORTF_BASE+0x05))) 7 | #define PORTF_OUTCLR (*((volatile unsigned char *)(PORTF_BASE+0x06))) 8 | #define UARTF0_BASE 0xBA0 9 | #define UARTF0_DATA (*((volatile unsigned char *)(UARTF0_BASE+0x00))) 10 | #define UARTF0_STATUS (*((volatile unsigned char *)(UARTF0_BASE+0x01))) 11 | #define UARTF0_CTRLB (*((volatile unsigned char *)(UARTF0_BASE+0x04))) 12 | #define UARTF0_CTRLC (*((volatile unsigned char *)(UARTF0_BASE+0x05))) 13 | #define UARTF0_BAUDCTRLA (*((volatile unsigned char *)(UARTF0_BASE+0x06))) 14 | #define UARTF0_BAUDCTRLB (*((volatile unsigned char *)(UARTF0_BASE+0x07))) 15 | 16 | #define UARTF1_BASE 0xBB0 17 | #define UARTF1_DATA (*((volatile unsigned char *)(UARTF1_BASE+0x00))) 18 | #define UARTF1_STATUS (*((volatile unsigned char *)(UARTF1_BASE+0x01))) 19 | #define UARTF1_CTRLB (*((volatile unsigned char *)(UARTF1_BASE+0x04))) 20 | #define UARTF1_CTRLC (*((volatile unsigned char *)(UARTF1_BASE+0x05))) 21 | #define UARTF1_BAUDCTRLA (*((volatile unsigned char *)(UARTF1_BASE+0x06))) 22 | #define UARTF1_BAUDCTRLB (*((volatile unsigned char *)(UARTF1_BASE+0x07))) 23 | 24 | void dummy ( void ); 25 | 26 | void uart_putc ( unsigned char x ) 27 | { 28 | while((UARTF0_STATUS&(1<<5))==0) continue; 29 | UARTF0_DATA=x; 30 | } 31 | 32 | unsigned char uart_getc ( void ) 33 | { 34 | while((UARTF0_STATUS&(1<<7))==0) continue; 35 | return(UARTF0_DATA); 36 | } 37 | 38 | void hexstring ( unsigned int d ) 39 | { 40 | //unsigned int ra; 41 | unsigned int rb; 42 | unsigned int rc; 43 | 44 | rb=16; 45 | while(1) 46 | { 47 | rb-=4; 48 | rc=(d>>rb)&0xF; 49 | if(rc>9) rc+=0x37; else rc+=0x30; 50 | uart_putc(rc); 51 | if(rb==0) break; 52 | } 53 | uart_putc(0x0D); 54 | uart_putc(0x0A); 55 | } 56 | 57 | void notmain ( void ) 58 | { 59 | unsigned char ca; 60 | 61 | 62 | //setup GPIOF7 for led output 63 | PORTF_DIRSET=1<<7; 64 | PORTF_OUTSET=1<<7; 65 | 66 | //initialize uartf0 TX0 on GPIOF3 RX0 on GPIOF2 67 | PORTF_DIRSET=1<<3; 68 | PORTF_OUTSET=1<<3; 69 | PORTF_DIRCLR=1<<2; 70 | UARTF0_CTRLC=0x03; 71 | UARTF0_BAUDCTRLA=16; 72 | UARTF0_BAUDCTRLB=0; 73 | UARTF0_CTRLB=(1<<3)|(1<<4); 74 | 75 | while(1) 76 | { 77 | ca=uart_getc(); 78 | uart_putc(ca); 79 | PORTF_OUTCLR=0x80; 80 | ca=uart_getc(); 81 | uart_putc(ca); 82 | PORTF_OUTSET=0x80; 83 | } 84 | } 85 | -------------------------------------------------------------------------------- /pasblinker/README.pasblinker.txt: -------------------------------------------------------------------------------- 1 | 2 | Well here is a fun one. The freepascal.org folks are working on an 3 | embedded pascal compiler. The lpc1768 is supported so we can start 4 | using it. 5 | 6 | 7 | You will need a binutils with the right arm-embedded- prefix. 8 | 9 | > wget http://ftp.gnu.org/gnu/binutils/binutils-2.21.1a.tar.bz2 10 | 11 | If you dont have wget then just use the link in a web browser 12 | 13 | You might will need these things in order to build binutils 14 | 15 | > sudo apt-get install build-essential libmpfr-dev libgmp3-dev libmpc-dev 16 | 17 | Extract, build, and install binutils 18 | 19 | > tar xjf binutils-2.21.1a.tar.bz2 20 | > cd binutils-2.21.1 21 | > ./configure --target=arm-linux --prefix=/opt/embarm/ --program-prefix=arm-embedded- --disable-werror 22 | > make 23 | > sudo make install 24 | 25 | Add it to your path when you want to use it (will need it both to build 26 | fpc embedded and when using fpc embedded). 27 | 28 | > PATH=/opt/embarm/bin/:$PATH 29 | 30 | You will need fpc to build fpc 31 | 32 | > sudo apt-get install fpc 33 | 34 | Get the sources to fpc 35 | 36 | > svn co http://svn.freepascal.org/svn/fpc/trunk fpc 37 | > cd fpc 38 | 39 | And build it. 40 | 41 | > make clean buildbase installbase CROSSINSTALL=1 OS_TARGET=embedded CPU_TARGET=arm SUBARCH=armv7m 42 | 43 | Copy the pasblinker.pp file here 44 | 45 | > cp /path/to/pasblinker.pp . 46 | 47 | Compile the pascal program 48 | 49 | > ./compiler/ppcrossarm -Parm -Tembedded -Wplpc1768 -Cparmv7m pasblinker.pp 50 | > arm-embedded-objcopy pasblinker.elf -O binary pasblinker.bin 51 | 52 | Copy the binary to the mbed board 53 | 54 | > cp pasblinker.bin /media/MBED/ 55 | 56 | And press the button on the mbed board to run/load the binary. 57 | 58 | read through the blinker examples to understand what the pasblinker.pp 59 | program is doing 60 | -------------------------------------------------------------------------------- /pasblinker/pasblinker.pp: -------------------------------------------------------------------------------- 1 | 2 | 3 | { Registers are defined in fpc/rtl/embedded/arm/lpc1768.pp } 4 | 5 | procedure PLL_Init; 6 | begin 7 | SCS := $20; 8 | while ((SCS and $40) = 0) do 9 | ; 10 | CLKSRCSEL := 1; 11 | PLL0CFG := 12-1; 12 | PLL0FEED := $AA; 13 | PLL0FEED := $55; 14 | PLL0CON := 1; 15 | PLL0FEED := $AA; 16 | PLL0FEED := $55; 17 | while ((PLL0STAT and $01000000) = 0) do 18 | ; 19 | CCLKCFG := 3-1; 20 | while ((PLL0STAT and $04000000) = 0) do 21 | ; 22 | PLL0CON := 3; 23 | PLL0FEED := $AA; 24 | PLL0FEED := $55; 25 | while ((PLL0STAT and $02000000) = 0) do 26 | ; 27 | end; 28 | 29 | 30 | procedure STWait; 31 | begin 32 | while((STCTRL and $00010000) = 0) do 33 | ; 34 | end; 35 | 36 | 37 | 38 | 39 | begin 40 | PLL_Init(); 41 | 42 | FIO1DIR2 := FIO1DIR2 or $B4; 43 | 44 | STCTRL :=$00000004; 45 | STRELOAD:=$00FFFFFF; 46 | STCTRL :=$00000005; 47 | 48 | FIO1CLR2:=$B4; 49 | 50 | while true do 51 | begin 52 | FIO1SET2:=$80; 53 | FIO1CLR2:=$20; 54 | STWait(); 55 | FIO1SET2:=$20; 56 | FIO1CLR2:=$80; 57 | STWait(); 58 | FIO1SET2:=$10; 59 | FIO1CLR2:=$20; 60 | STWait(); 61 | FIO1SET2:=$04; 62 | FIO1CLR2:=$10; 63 | STWait(); 64 | FIO1SET2:=$10; 65 | FIO1CLR2:=$04; 66 | STWait(); 67 | FIO1SET2:=$20; 68 | FIO1CLR2:=$10; 69 | STWait(); 70 | end; 71 | end. 72 | 73 | 74 | -------------------------------------------------------------------------------- /thread01/README: -------------------------------------------------------------------------------- 1 | 2 | This is taken directly from the stm32f4d examples and adapted for 3 | the mbed. 4 | 5 | This is a very simple threaded application. Cooperative multithreading 6 | is perhaps the correct term. The scheduler is more than that it is 7 | the operating system, if you will, it initalizes the hardware and has 8 | api calls for the threads to use. Then it goes into its loop that 9 | round robin calls the thread handlers. Each thread handler needs to 10 | get in and get out fast. No stopping to poll or anything like that. 11 | You can poll in the sense that you try once per heartbeat for example 12 | and that is how these happen to work, no interrupts are needed to 13 | demonstrate threading. 14 | 15 | Future examples can/will do things like have the scheduler use different 16 | messages, perhaps watch the timer for you and send you a specific message 17 | on a particular time interval so you dont have to. Later make that 18 | interrupt driven. 19 | -------------------------------------------------------------------------------- /thread01/common.h: -------------------------------------------------------------------------------- 1 | 2 | extern unsigned int threada ( unsigned int event ); 3 | extern unsigned int threadb ( unsigned int event ); 4 | extern unsigned int threadc ( unsigned int event ); 5 | extern unsigned int threadd ( unsigned int event ); 6 | 7 | extern unsigned int get_timer_tick ( void ); 8 | extern unsigned int uart_tx_if_ready ( unsigned int x ); 9 | extern void change_led_state ( unsigned int led, unsigned int state ); 10 | 11 | #define TIMER_TICK_MASK 0x00FFFFFF 12 | 13 | #define INIT 1 14 | #define HEARTBEAT 2 15 | -------------------------------------------------------------------------------- /thread01/novectors.s: -------------------------------------------------------------------------------- 1 | 2 | /* vectors.s */ 3 | .cpu cortex-m3 4 | .thumb 5 | 6 | .thumb_func 7 | .global _start 8 | _start: 9 | ldr r0,stacktop 10 | mov sp,r0 11 | bl notmain 12 | b hang 13 | 14 | .thumb_func 15 | hang: b . 16 | 17 | .align 18 | stacktop: .word 0x20020000 19 | 20 | ;@----------------------- 21 | .thumb_func 22 | .globl PUT8 23 | PUT8: 24 | strb r1,[r0] 25 | bx lr 26 | ;@----------------------- 27 | .thumb_func 28 | .globl PUT16 29 | PUT16: 30 | strh r1,[r0] 31 | bx lr 32 | ;@----------------------- 33 | .thumb_func 34 | .globl PUT32 35 | PUT32: 36 | str r1,[r0] 37 | bx lr 38 | ;@----------------------- 39 | .thumb_func 40 | .globl GET32 41 | GET32: 42 | ldr r0,[r0] 43 | bx lr 44 | ;@----------------------- 45 | .thumb_func 46 | .globl GET16 47 | GET16: 48 | ldrh r0,[r0] 49 | bx lr 50 | ;@----------------------- 51 | .thumb_func 52 | .globl ASM_DELAY 53 | ASM_DELAY: 54 | sub r0,#1 ;@ subs r0,#1 55 | bne ASM_DELAY 56 | bx lr 57 | 58 | .end 59 | -------------------------------------------------------------------------------- /thread01/rommap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /thread01/sched.c: -------------------------------------------------------------------------------- 1 | 2 | //------------------------------------------------------------------- 3 | //------------------------------------------------------------------- 4 | void PUT32 ( unsigned int, unsigned int ); 5 | void PUT16 ( unsigned int, unsigned int ); 6 | void PUT8 ( unsigned int, unsigned int ); 7 | unsigned int GET32 ( unsigned int ); 8 | unsigned int GET16 ( unsigned int ); 9 | unsigned int GET8 ( unsigned int ); 10 | //------------------------------------------------------------------- 11 | 12 | #define STCTRL 0xE000E010 13 | #define STRELOAD 0xE000E014 14 | #define STCURR 0xE000E018 15 | 16 | #define FIO1DIR2 0x2009C022 17 | #define FIO1SET2 0x2009C03A 18 | #define FIO1CLR2 0x2009C03E 19 | 20 | #define SCS 0x400FC1A0 21 | #define CLKSRCSEL 0x400FC10C 22 | 23 | //------------------------------------------------------------------- 24 | #include "common.h" 25 | //------------------------------------------------------------------- 26 | //------------------------------------------------------------------- 27 | void clock_init ( void ) 28 | { 29 | PUT32(SCS,1<<5); 30 | while((GET32(SCS)&(1<<6))==0) continue; 31 | 32 | PUT32(CLKSRCSEL,1); 33 | } 34 | //------------------------------------------------------------------------ 35 | void change_led_state ( unsigned int led, unsigned int state ) 36 | { 37 | unsigned int ra,rb; 38 | 39 | if(state) ra=FIO1CLR2; else ra=FIO1SET2; 40 | switch(led&3) 41 | { 42 | case 0: rb=0x80; break; 43 | case 1: rb=0x20; break; 44 | case 2: rb=0x10; break; 45 | case 3: rb=0x04; break; 46 | } 47 | PUT8(ra,rb); 48 | } 49 | //------------------------------------------------------------------------ 50 | unsigned int next_prand ( unsigned int x ) 51 | { 52 | if(x&1) 53 | { 54 | x=x>>1; 55 | x=x^0xBF9EC099; 56 | } 57 | else 58 | { 59 | x=x>>1; 60 | } 61 | return(x); 62 | } 63 | //------------------------------------------------------------------- 64 | unsigned int get_timer_tick ( void ) 65 | { 66 | //down counter, make it look like an up counter? 67 | //24 bit counter... 68 | return((0-GET32(STCURR))&0x00FFFFFF); 69 | } 70 | //------------------------------------------------------------------- 71 | unsigned int uart_tx_if_ready ( unsigned int x ) 72 | { 73 | return(1); 74 | } 75 | //------------------------------------------------------------------- 76 | int notmain ( void ) 77 | { 78 | unsigned int ra; 79 | 80 | clock_init(); 81 | 82 | //init GPIO 83 | ra=GET8(FIO1DIR2); 84 | ra|=0xB4; 85 | PUT8(FIO1DIR2,ra); 86 | //init cortex-m3 clock 87 | PUT32(STCTRL,0x00000004); 88 | PUT32(STRELOAD,0xFFFFFFFF); 89 | PUT32(STCTRL,0x00000005); 90 | 91 | PUT8(FIO1CLR2,0xB4); 92 | 93 | threada(INIT); 94 | threadb(INIT); 95 | threadc(INIT); 96 | threadd(INIT); 97 | while(1) 98 | { 99 | threada(HEARTBEAT); 100 | threadb(HEARTBEAT); 101 | threadc(HEARTBEAT); 102 | threadd(HEARTBEAT); 103 | } 104 | 105 | return(0); 106 | } 107 | //------------------------------------------------------------------- 108 | //------------------------------------------------------------------- 109 | -------------------------------------------------------------------------------- /thread01/threada.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | static unsigned int ta_tick_last; 5 | static unsigned int ta_send_char; 6 | static unsigned int ta_char_to_send; 7 | static unsigned int ta_led_state; 8 | 9 | unsigned int threada ( unsigned int event ) 10 | { 11 | unsigned int nowtick; 12 | unsigned int tickdiff; 13 | 14 | switch(event) 15 | { 16 | case INIT: 17 | { 18 | ta_send_char=1; 19 | ta_char_to_send=0x31; 20 | ta_tick_last=get_timer_tick(); 21 | ta_led_state=0; 22 | change_led_state(0,ta_led_state); 23 | return(0); 24 | } 25 | case HEARTBEAT: 26 | { 27 | if(ta_send_char) 28 | { 29 | if(uart_tx_if_ready(ta_char_to_send)) ta_send_char=0; 30 | } 31 | nowtick=get_timer_tick(); 32 | tickdiff=(nowtick-ta_tick_last)&TIMER_TICK_MASK; 33 | if(tickdiff>=10000000) 34 | { 35 | ta_tick_last=(ta_tick_last+10000000)&TIMER_TICK_MASK; 36 | ta_send_char=1; 37 | //ta_char_to_send= 38 | ta_led_state=(ta_led_state+1)&1; 39 | change_led_state(0,ta_led_state); 40 | } 41 | return(0); 42 | } 43 | default: 44 | { 45 | break; 46 | } 47 | } 48 | return(0); 49 | } 50 | -------------------------------------------------------------------------------- /thread01/threadb.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | static unsigned int tb_tick_last; 5 | static unsigned int tb_send_char; 6 | static unsigned int tb_char_to_send; 7 | static unsigned int tb_led_state; 8 | 9 | unsigned int threadb ( unsigned int event ) 10 | { 11 | unsigned int nowtick; 12 | unsigned int tickdiff; 13 | 14 | switch(event) 15 | { 16 | case INIT: 17 | { 18 | tb_send_char=1; 19 | tb_char_to_send=0x32; 20 | tb_tick_last=get_timer_tick(); 21 | tb_led_state=0; 22 | change_led_state(1,tb_led_state); 23 | return(0); 24 | } 25 | case HEARTBEAT: 26 | { 27 | if(tb_send_char) 28 | { 29 | if(uart_tx_if_ready(tb_char_to_send)) tb_send_char=0; 30 | } 31 | nowtick=get_timer_tick(); 32 | tickdiff=(nowtick-tb_tick_last)&TIMER_TICK_MASK; 33 | if(tickdiff>=5000000) 34 | { 35 | tb_tick_last=(tb_tick_last+5000000)&TIMER_TICK_MASK; 36 | tb_send_char=1; 37 | //tb_char_to_send= 38 | tb_led_state=(tb_led_state+1)&1; 39 | change_led_state(1,tb_led_state); 40 | } 41 | return(0); 42 | } 43 | default: 44 | { 45 | break; 46 | } 47 | } 48 | return(0); 49 | } 50 | -------------------------------------------------------------------------------- /thread01/threadc.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | static unsigned int tc_tick_last; 5 | static unsigned int tc_send_char; 6 | static unsigned int tc_char_to_send; 7 | static unsigned int tc_led_state; 8 | 9 | unsigned int threadc ( unsigned int event ) 10 | { 11 | unsigned int nowtick; 12 | unsigned int tickdiff; 13 | 14 | switch(event) 15 | { 16 | case INIT: 17 | { 18 | tc_send_char=1; 19 | tc_char_to_send=0x33; 20 | tc_tick_last=get_timer_tick(); 21 | tc_led_state=0; 22 | change_led_state(2,tc_led_state); 23 | return(0); 24 | } 25 | case HEARTBEAT: 26 | { 27 | if(tc_send_char) 28 | { 29 | if(uart_tx_if_ready(tc_char_to_send)) tc_send_char=0; 30 | } 31 | nowtick=get_timer_tick(); 32 | tickdiff=(nowtick-tc_tick_last)&TIMER_TICK_MASK; 33 | if(tickdiff>=6000000) 34 | { 35 | tc_tick_last=(tc_tick_last+6000000)&TIMER_TICK_MASK; 36 | tc_send_char=1; 37 | //tc_char_to_send= 38 | tc_led_state=(tc_led_state+1)&1; 39 | change_led_state(2,tc_led_state); 40 | } 41 | return(0); 42 | } 43 | default: 44 | { 45 | break; 46 | } 47 | } 48 | return(0); 49 | } 50 | -------------------------------------------------------------------------------- /thread01/threadd.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | static unsigned int td_tick_last; 5 | static unsigned int td_send_char; 6 | static unsigned int td_char_to_send; 7 | static unsigned int td_led_state; 8 | 9 | unsigned int threadd ( unsigned int event ) 10 | { 11 | unsigned int nowtick; 12 | unsigned int tickdiff; 13 | 14 | switch(event) 15 | { 16 | case INIT: 17 | { 18 | td_send_char=1; 19 | td_char_to_send=0x34; 20 | td_tick_last=get_timer_tick(); 21 | td_led_state=0; 22 | change_led_state(3,td_led_state); 23 | return(0); 24 | } 25 | case HEARTBEAT: 26 | { 27 | if(td_send_char) 28 | { 29 | if(uart_tx_if_ready(td_char_to_send)) td_send_char=0; 30 | } 31 | nowtick=get_timer_tick(); 32 | tickdiff=(nowtick-td_tick_last)&TIMER_TICK_MASK; 33 | if(tickdiff>=7000000) 34 | { 35 | td_tick_last=(td_tick_last+7000000)&TIMER_TICK_MASK; 36 | td_send_char=1; 37 | //td_char_to_send= 38 | td_led_state=(td_led_state+1)&1; 39 | change_led_state(3,td_led_state); 40 | } 41 | return(0); 42 | } 43 | default: 44 | { 45 | break; 46 | } 47 | } 48 | return(0); 49 | } 50 | -------------------------------------------------------------------------------- /thread01/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | -------------------------------------------------------------------------------- /thread02/README: -------------------------------------------------------------------------------- 1 | 2 | Derived from thread01. The scheduler manages the timer so that it can 3 | send messages to the threads at certain time intervals. 4 | 5 | -------------------------------------------------------------------------------- /thread02/common.h: -------------------------------------------------------------------------------- 1 | 2 | extern unsigned int threada ( unsigned int event ); 3 | extern unsigned int threadb ( unsigned int event ); 4 | extern unsigned int threadc ( unsigned int event ); 5 | extern unsigned int threadd ( unsigned int event ); 6 | 7 | extern unsigned int get_timer_tick ( void ); 8 | extern void change_led_state ( unsigned int led, unsigned int state ); 9 | 10 | #define TIMER_TICK_MASK 0x00FFFFFF 11 | 12 | #define INIT 1 13 | #define LOOP 2 14 | #define HEARTBEAT 3 15 | #define TIMER 4 16 | -------------------------------------------------------------------------------- /thread02/novectors.s: -------------------------------------------------------------------------------- 1 | 2 | /* vectors.s */ 3 | .cpu cortex-m3 4 | .thumb 5 | 6 | .thumb_func 7 | .global _start 8 | _start: 9 | ldr r0,stacktop 10 | mov sp,r0 11 | bl notmain 12 | b hang 13 | 14 | .thumb_func 15 | hang: b . 16 | 17 | .align 18 | stacktop: .word 0x20020000 19 | 20 | ;@----------------------- 21 | .thumb_func 22 | .globl PUT8 23 | PUT8: 24 | strb r1,[r0] 25 | bx lr 26 | ;@----------------------- 27 | .thumb_func 28 | .globl PUT16 29 | PUT16: 30 | strh r1,[r0] 31 | bx lr 32 | ;@----------------------- 33 | .thumb_func 34 | .globl PUT32 35 | PUT32: 36 | str r1,[r0] 37 | bx lr 38 | ;@----------------------- 39 | .thumb_func 40 | .globl GET32 41 | GET32: 42 | ldr r0,[r0] 43 | bx lr 44 | ;@----------------------- 45 | .thumb_func 46 | .globl GET16 47 | GET16: 48 | ldrh r0,[r0] 49 | bx lr 50 | ;@----------------------- 51 | .thumb_func 52 | .globl ASM_DELAY 53 | ASM_DELAY: 54 | sub r0,#1 ;@ subs r0,#1 55 | bne ASM_DELAY 56 | bx lr 57 | 58 | .end 59 | -------------------------------------------------------------------------------- /thread02/rammap: -------------------------------------------------------------------------------- 1 | 2 | MEMORY 3 | { 4 | rom : ORIGIN = 0x08000000, LENGTH = 0x100000 5 | ram : ORIGIN = 0x20000000, LENGTH = 0x1C000 6 | } 7 | 8 | SECTIONS 9 | { 10 | .text : { *(.text*) } > ram 11 | .data : { *(.data*) } > ram 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /thread02/rommap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /thread02/threada.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | #define MY_LED 0 5 | 6 | unsigned int threada ( unsigned int event ) 7 | { 8 | static unsigned int led_state; 9 | static unsigned int timer_count; 10 | 11 | switch(event) 12 | { 13 | case INIT: 14 | { 15 | led_state=0; 16 | change_led_state(MY_LED,led_state); 17 | return(0); 18 | } 19 | case LOOP: 20 | { 21 | return(0); 22 | } 23 | case TIMER: 24 | { 25 | timer_count=4; 26 | return(0); 27 | } 28 | case HEARTBEAT: 29 | { 30 | if(timer_count) 31 | { 32 | timer_count--; 33 | led_state=(led_state+1)&1; 34 | change_led_state(MY_LED,led_state); 35 | } 36 | return(0); 37 | } 38 | default: 39 | { 40 | break; 41 | } 42 | } 43 | return(0); 44 | } 45 | -------------------------------------------------------------------------------- /thread02/threadb.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | #define MY_LED 1 5 | 6 | unsigned int threadb ( unsigned int event ) 7 | { 8 | static unsigned int led_state; 9 | static unsigned int timer_count; 10 | 11 | switch(event) 12 | { 13 | case INIT: 14 | { 15 | led_state=0; 16 | change_led_state(MY_LED,led_state); 17 | return(0); 18 | } 19 | case LOOP: 20 | { 21 | return(0); 22 | } 23 | case TIMER: 24 | { 25 | timer_count=4; 26 | return(0); 27 | } 28 | case HEARTBEAT: 29 | { 30 | if(timer_count) 31 | { 32 | timer_count--; 33 | led_state=(led_state+1)&1; 34 | change_led_state(MY_LED,led_state); 35 | } 36 | return(0); 37 | } 38 | default: 39 | { 40 | break; 41 | } 42 | } 43 | return(0); 44 | } 45 | -------------------------------------------------------------------------------- /thread02/threadc.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | #define MY_LED 2 5 | 6 | unsigned int threadc ( unsigned int event ) 7 | { 8 | static unsigned int led_state; 9 | static unsigned int timer_count; 10 | 11 | switch(event) 12 | { 13 | case INIT: 14 | { 15 | led_state=0; 16 | change_led_state(MY_LED,led_state); 17 | return(0); 18 | } 19 | case LOOP: 20 | { 21 | return(0); 22 | } 23 | case TIMER: 24 | { 25 | timer_count=4; 26 | return(0); 27 | } 28 | case HEARTBEAT: 29 | { 30 | if(timer_count) 31 | { 32 | timer_count--; 33 | led_state=(led_state+1)&1; 34 | change_led_state(MY_LED,led_state); 35 | } 36 | return(0); 37 | } 38 | default: 39 | { 40 | break; 41 | } 42 | } 43 | return(0); 44 | } 45 | -------------------------------------------------------------------------------- /thread02/threadd.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | 4 | #define MY_LED 3 5 | 6 | unsigned int threadd ( unsigned int event ) 7 | { 8 | static unsigned int led_state; 9 | static unsigned int timer_count; 10 | 11 | switch(event) 12 | { 13 | case INIT: 14 | { 15 | led_state=0; 16 | change_led_state(MY_LED,led_state); 17 | return(0); 18 | } 19 | case LOOP: 20 | { 21 | return(0); 22 | } 23 | case TIMER: 24 | { 25 | timer_count=4; 26 | return(0); 27 | } 28 | case HEARTBEAT: 29 | { 30 | if(timer_count) 31 | { 32 | timer_count--; 33 | led_state=(led_state+1)&1; 34 | change_led_state(MY_LED,led_state); 35 | } 36 | return(0); 37 | } 38 | default: 39 | { 40 | break; 41 | } 42 | } 43 | return(0); 44 | } 45 | -------------------------------------------------------------------------------- /thread02/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | -------------------------------------------------------------------------------- /uart01/Makefile: -------------------------------------------------------------------------------- 1 | 2 | #ARMGNU=arm-thumb-elf 3 | #ARMGNU=arm-none-linux-gnueabi 4 | ARMGNU?=arm-none-eabi 5 | 6 | LOPS = -Wall -m32 -emit-llvm -ccc-host-triple $(ARMGNU) 7 | 8 | LLCOPS = -march=thumb -mtriple=$(ARMGNU) 9 | 10 | LLCOPS2 = -march=thumb -mtriple=$(ARMGNU) -mcpu=cortex-m3 11 | 12 | COPS = -Wall -O2 -nostdlib -nostartfiles -ffreestanding 13 | 14 | AOPS = --warn --fatal-warnings 15 | 16 | OOPS = -std-compile-opts 17 | 18 | stuff = -O2 -std-compile-opts -strip-debug 19 | 20 | 21 | 22 | 23 | all : uart01.gcc.thumb.bin uart01.gcc.thumb2.bin uart01.clang.thumb.norm.bin uart01.clang.thumb.opt.bin uart01.clang.thumb2.norm.bin uart01.clang.thumb2.opt.bin 24 | 25 | vectors.o : vectors.s 26 | $(ARMGNU)-as vectors.s -o vectors.o 27 | 28 | uart01.gcc.thumb.o : uart01.c 29 | $(ARMGNU)-gcc $(COPS) -mthumb -c uart01.c -o uart01.gcc.thumb.o 30 | 31 | uart01.gcc.thumb2.o : uart01.c 32 | $(ARMGNU)-gcc $(COPS) -mthumb -mcpu=cortex-m3 -march=armv7-m -c uart01.c -o uart01.gcc.thumb2.o 33 | 34 | uart01.gcc.thumb.bin : memmap vectors.o uart01.gcc.thumb.o 35 | $(ARMGNU)-ld -o uart01.gcc.thumb.elf -T memmap vectors.o uart01.gcc.thumb.o 36 | $(ARMGNU)-objdump -D uart01.gcc.thumb.elf > uart01.gcc.thumb.list 37 | $(ARMGNU)-objcopy uart01.gcc.thumb.elf uart01.gcc.thumb.bin -O binary 38 | 39 | uart01.gcc.thumb2.bin : memmap vectors.o uart01.gcc.thumb2.o 40 | $(ARMGNU)-ld -o uart01.gcc.thumb2.elf -T memmap vectors.o uart01.gcc.thumb2.o 41 | $(ARMGNU)-objdump -D uart01.gcc.thumb2.elf > uart01.gcc.thumb2.list 42 | $(ARMGNU)-objcopy uart01.gcc.thumb2.elf uart01.gcc.thumb2.bin -O binary 43 | 44 | 45 | uart01.clang.bc : uart01.c 46 | clang $(LOPS) -c uart01.c -o uart01.clang.bc 47 | 48 | uart01.clang.thumb.norm.bin : memmap vectors.o uart01.clang.bc 49 | llc $(LLCOPS) uart01.clang.bc -o uart01.clang.thumb.norm.s 50 | $(ARMGNU)-as uart01.clang.thumb.norm.s -o uart01.clang.thumb.norm.o 51 | $(ARMGNU)-ld -o uart01.clang.thumb.norm.elf -T memmap vectors.o uart01.clang.thumb.norm.o 52 | $(ARMGNU)-objdump -D uart01.clang.thumb.norm.elf > uart01.clang.thumb.norm.list 53 | $(ARMGNU)-objcopy uart01.clang.thumb.norm.elf uart01.clang.thumb.norm.bin -O binary 54 | 55 | uart01.clang.thumb.opt.bin : memmap vectors.o uart01.clang.bc 56 | opt $(OOPS) uart01.clang.bc -o uart01.clang.thumb.opt.bc 57 | llc $(LLCOPS) uart01.clang.thumb.opt.bc -o uart01.clang.thumb.opt.s 58 | $(ARMGNU)-as uart01.clang.thumb.opt.s -o uart01.clang.thumb.opt.o 59 | $(ARMGNU)-ld -o uart01.clang.thumb.opt.elf -T memmap vectors.o uart01.clang.thumb.opt.o 60 | $(ARMGNU)-objdump -D uart01.clang.thumb.opt.elf > uart01.clang.thumb.opt.list 61 | $(ARMGNU)-objcopy uart01.clang.thumb.opt.elf uart01.clang.thumb.opt.bin -O binary 62 | 63 | uart01.clang.thumb2.norm.bin : memmap vectors.o uart01.clang.bc 64 | llc $(LLCOPS2) uart01.clang.bc -o uart01.clang.thumb2.norm.s 65 | $(ARMGNU)-as uart01.clang.thumb2.norm.s -o uart01.clang.thumb2.norm.o 66 | $(ARMGNU)-ld -o uart01.clang.thumb2.norm.elf -T memmap vectors.o uart01.clang.thumb2.norm.o 67 | $(ARMGNU)-objdump -D uart01.clang.thumb2.norm.elf > uart01.clang.thumb2.norm.list 68 | $(ARMGNU)-objcopy uart01.clang.thumb2.norm.elf uart01.clang.thumb2.norm.bin -O binary 69 | 70 | uart01.clang.thumb2.opt.bin : memmap vectors.o uart01.clang.bc 71 | opt $(OOPS) uart01.clang.bc -o uart01.clang.thumb2.opt.bc 72 | llc $(LLCOPS2) uart01.clang.thumb2.opt.bc -o uart01.clang.thumb2.opt.s 73 | $(ARMGNU)-as uart01.clang.thumb2.opt.s -o uart01.clang.thumb2.opt.o 74 | $(ARMGNU)-ld -o uart01.clang.thumb2.opt.elf -T memmap vectors.o uart01.clang.thumb2.opt.o 75 | $(ARMGNU)-objdump -D uart01.clang.thumb2.opt.elf > uart01.clang.thumb2.opt.list 76 | $(ARMGNU)-objcopy uart01.clang.thumb2.opt.elf uart01.clang.thumb2.opt.bin -O binary 77 | 78 | 79 | 80 | 81 | 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | 93 | 94 | clean: 95 | rm -f *.bin 96 | rm -f *.o 97 | rm -f *.elf 98 | rm -f *.list 99 | rm -f *.bc 100 | rm -f *.opt.s 101 | rm -f *.norm.s 102 | 103 | -------------------------------------------------------------------------------- /uart01/memmap: -------------------------------------------------------------------------------- 1 | 2 | /* memmap */ 3 | MEMORY 4 | { 5 | rom(RX) : ORIGIN = 0x00000000, LENGTH = 0x40000 6 | ram(WAIL) : ORIGIN = 0x10000000, LENGTH = 30K 7 | } 8 | 9 | SECTIONS 10 | { 11 | .text : { *(.text*) } > rom 12 | .bss : { *(.bss*) } > ram 13 | } 14 | 15 | -------------------------------------------------------------------------------- /uart01/uart01.c: -------------------------------------------------------------------------------- 1 | 2 | //------------------------------------------------------------------- 3 | //------------------------------------------------------------------- 4 | 5 | extern void PUT8 ( unsigned int, unsigned int ); 6 | extern unsigned int GET8 ( unsigned int ); 7 | 8 | extern void PUT32 ( unsigned int, unsigned int ); 9 | extern unsigned int GET32 ( unsigned int ); 10 | 11 | //------------------------------------------------------------------- 12 | 13 | #define PINSEL0 0x4002C000 14 | 15 | #define U0ACR 0x4000C020 16 | #define U0LCR 0x4000C00C 17 | #define U0DLL 0x4000C000 18 | #define U0DLM 0x4000C004 19 | #define U0IER 0x4000C004 20 | #define U0FDR 0x4000C028 21 | #define U0FCR 0x4000C008 22 | #define U0TER 0x4000C030 23 | 24 | #define U0LSR 0x4000C014 25 | #define U0THR 0x4000C000 26 | #define U0RBR 0x4000C000 27 | 28 | //------------------------------------------------------------------- 29 | void uart_init ( void ) 30 | { 31 | unsigned int ra; 32 | 33 | ra=GET32(PINSEL0); 34 | ra&=(~(0xF<<4)); 35 | ra|=0x5<<4; 36 | PUT32(PINSEL0,ra); 37 | //1000000 Hz PCLK 9600 baud 38 | //dl 0x04 mul 0x08 div 0x05 baud 9615 diff 15 39 | PUT32(U0ACR,0x00); //no autobaud 40 | PUT32(U0LCR,0x83); //dlab=1; N81 41 | PUT32(U0DLL,0x04); //dl = 0x0004 42 | PUT32(U0DLM,0x00); //dl = 0x0004 43 | PUT32(U0IER,0x00); //no interrupts 44 | PUT32(U0LCR,0x03); //dlab=0; N81 45 | PUT32(U0IER,0x00); //no interrupts 46 | PUT32(U0FDR,(0x8<<4)|(0x5<<0)); //mul 0x08, div 0x05 47 | PUT32(U0FCR,(1<<2)|(1<<1)|(1<<0)); //enable and reset fifos 48 | PUT32(U0TER,(1<<7)); //transmit enable 49 | } 50 | //------------------------------------------------------------------- 51 | void uart_putc ( unsigned int x ) 52 | { 53 | while (( GET32(U0LSR) & (1<<5)) == 0) continue; 54 | PUT32(U0THR,x); 55 | } 56 | //------------------------------------------------------------------- 57 | unsigned int uart_getc ( void ) 58 | { 59 | while (( GET32(U0LSR) & (1<<0)) == 0) continue; 60 | return(GET32(U0RBR)); 61 | } 62 | //------------------------------------------------------------------- 63 | void hexstring ( unsigned int d, unsigned int cr ) 64 | { 65 | //unsigned int ra; 66 | unsigned int rb; 67 | unsigned int rc; 68 | 69 | rb=32; 70 | while(1) 71 | { 72 | rb-=4; 73 | rc=(d>>rb)&0xF; 74 | if(rc>9) rc+=0x37; else rc+=0x30; 75 | uart_putc(rc); 76 | if(rb==0) break; 77 | } 78 | if(cr) 79 | { 80 | uart_putc(0x0D); 81 | uart_putc(0x0A); 82 | } 83 | else 84 | { 85 | uart_putc(0x20); 86 | } 87 | } 88 | //------------------------------------------------------------------- 89 | void notmain ( void ) 90 | { 91 | unsigned int ra; 92 | 93 | uart_init(); 94 | hexstring(0x12345678,1); 95 | while(1) 96 | { 97 | ra=uart_getc(); 98 | uart_putc(ra); 99 | if(ra==0x0D) uart_putc(0x0A); 100 | } 101 | } 102 | //------------------------------------------------------------------- 103 | -------------------------------------------------------------------------------- /uart01/uartdiv.c: -------------------------------------------------------------------------------- 1 | 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | unsigned int pclk; 8 | unsigned int dbaud; 9 | unsigned int baud; 10 | unsigned int nmul; 11 | unsigned int ndiv; 12 | unsigned int dl; 13 | 14 | unsigned int newdiff; 15 | unsigned int mindiff; 16 | 17 | double da; 18 | double db; 19 | 20 | 21 | int main ( void ) 22 | { 23 | pclk=1000000; 24 | dbaud=9600; 25 | 26 | mindiff=0; mindiff--; 27 | 28 | for(dl=1;dl<=0xFFFF;dl++) 29 | { 30 | for(ndiv=0;ndiv<15;ndiv++) 31 | { 32 | for(nmul=ndiv+1;nmul<=15;nmul++) 33 | { 34 | da=pclk; 35 | da/=16; 36 | da/=dl; 37 | db=ndiv; 38 | db/=nmul; 39 | db+=1; 40 | da/=db; 41 | da+=0.5; 42 | baud=da; 43 | if(baud>dbaud) newdiff=baud-dbaud; 44 | else newdiff=dbaud-baud; 45 | if(newdiff<=mindiff) 46 | { 47 | printf("dl 0x%02X mul 0x%02X div 0x%02X baud %u diff %u\n",dl,nmul,ndiv,baud,newdiff); 48 | mindiff=newdiff; 49 | } 50 | } 51 | } 52 | } 53 | 54 | return(0); 55 | } 56 | 57 | 58 | 59 | 60 | 61 | 62 | -------------------------------------------------------------------------------- /uart01/vectors.s: -------------------------------------------------------------------------------- 1 | 2 | /*vectors.s*/ 3 | 4 | .cpu cortex-m3 5 | .thumb 6 | 7 | .word 0x10008000 /* stack top address */ 8 | .word _start /* 1 Reset */ 9 | .word hang /* 2 NMI */ 10 | .word hang /* 3 HardFault */ 11 | .word hang /* 4 MemManage */ 12 | .word hang /* 5 BusFault */ 13 | .word hang /* 6 UsageFault */ 14 | .word hang /* 7 RESERVED */ 15 | .word hang /* 8 RESERVED */ 16 | .word hang /* 9 RESERVED*/ 17 | .word hang /* 10 RESERVED */ 18 | .word hang /* 11 SVCall */ 19 | .word hang /* 12 Debug Monitor */ 20 | .word hang /* 13 RESERVED */ 21 | .word hang /* 14 PendSV */ 22 | .word hang /* 15 SysTick */ 23 | .word hang /* 16 External Interrupt(0) */ 24 | .word hang /* 17 External Interrupt(1) */ 25 | .word hang /* 18 External Interrupt(2) */ 26 | .word hang /* 19 ... */ 27 | 28 | .thumb_func 29 | hang: b . 30 | 31 | .thumb_func 32 | .globl _start 33 | _start: 34 | bl notmain 35 | b hang 36 | 37 | .thumb_func 38 | .globl PUT8 39 | PUT8: 40 | strb r1,[r0] 41 | bx lr 42 | 43 | .thumb_func 44 | .globl GET8 45 | GET8: 46 | ldrb r0,[r0] 47 | bx lr 48 | 49 | .thumb_func 50 | .globl PUT32 51 | PUT32: 52 | str r1,[r0] 53 | bx lr 54 | 55 | .thumb_func 56 | .globl GET32 57 | GET32: 58 | ldr r0,[r0] 59 | bx lr 60 | --------------------------------------------------------------------------------