├── README.md ├── example ├── PL_eMPC_controller │ ├── .gitignore │ ├── .metadata │ │ ├── MicroZed_PS_properties_v02.tcl │ │ ├── build_sdk_project.tcl │ │ ├── configuration_parameters_matlab_interface.dat │ │ ├── eMPC_controller_configuration_parameters.dat │ │ ├── eMPC_controller_ip_design_build.tcl │ │ ├── eMPC_controller_ip_design_test.tcl │ │ ├── load_configuration_parameters.m │ │ └── run_fpga_prototype.tcl │ ├── doc │ │ └── eMPC_controller │ │ │ ├── ip_configuration_parameters.txt │ │ │ ├── ip_design.dat │ │ │ ├── ip_design.txt │ │ │ ├── ip_prototype.dat │ │ │ └── ip_prototype.txt │ ├── ip_design │ │ ├── build │ │ │ └── prj │ │ │ │ └── null │ │ ├── src │ │ │ ├── FPGAclientAPI.h │ │ │ ├── FPGAclientMATLAB.c │ │ │ ├── FPGAclientMATLAB.m │ │ │ ├── eMPC_controller_directives.tcl │ │ │ ├── eMPC_inverted_pendulum.mat │ │ │ ├── foo.cpp │ │ │ ├── foo_data.h │ │ │ ├── foo_test.cpp │ │ │ ├── foo_user.cpp │ │ │ ├── foo_user.m │ │ │ ├── functions │ │ │ │ ├── FIX_control_law.m │ │ │ │ ├── FIX_eMPC_quantizer.m │ │ │ │ ├── FIX_simulation_explicit_controller.m │ │ │ │ ├── double_control_law.m │ │ │ │ ├── double_searchTree_point_location.m │ │ │ │ ├── double_simulation_explicit_controller.m │ │ │ │ ├── inverted_pendulum.m │ │ │ │ ├── sdlqr.m │ │ │ │ ├── searchTree_analysis.m │ │ │ │ └── tree_FIX_point_location.m │ │ │ └── test_HIL.m │ │ └── test │ │ │ ├── prj │ │ │ └── null │ │ │ ├── results │ │ │ └── eMPC_controller │ │ │ │ ├── fpga_time_log.dat │ │ │ │ ├── fpga_u_out_log.dat │ │ │ │ ├── fpga_x_in_log.dat │ │ │ │ ├── matlab_u_out_log.dat │ │ │ │ ├── matlab_x_in_log.dat │ │ │ │ └── u_out.dat │ │ │ └── stimuli │ │ │ └── eMPC_controller │ │ │ └── x_in.dat │ ├── ip_prototype │ │ ├── build │ │ │ └── prj │ │ │ │ └── null │ │ ├── src │ │ │ ├── FPGAserver.h │ │ │ ├── echo.c │ │ │ └── main.c │ │ └── test │ │ │ ├── prj │ │ │ └── null │ │ │ └── results │ │ │ └── eMPC_controller │ │ │ ├── fpga_time_log.dat │ │ │ ├── fpga_u_out_log.dat │ │ │ ├── fpga_x_in_log.dat │ │ │ ├── matlab_u_out_log.dat │ │ │ └── matlab_x_in_log.dat │ ├── make_matlab.m │ ├── make_project_files.m │ ├── make_vivado.tcl │ └── test_results.fig ├── PL_fgm_controller │ ├── .gitignore │ ├── .metadata │ │ ├── MicroZed_PS_properties_v02.tcl │ │ ├── build_sdk_project.tcl │ │ ├── configuration_parameters_matlab_interface.dat │ │ ├── fgm_controller_configuration_parameters.dat │ │ ├── fgm_controller_ip_design_build.tcl │ │ ├── fgm_controller_ip_design_test.tcl │ │ ├── load_configuration_parameters.m │ │ └── run_fpga_prototype.tcl │ ├── doc │ │ └── fgm_controller │ │ │ ├── ip_configuration_parameters.txt │ │ │ ├── ip_design.dat │ │ │ ├── ip_design.txt │ │ │ ├── ip_prototype.dat │ │ │ └── ip_prototype.txt │ ├── ip_design │ │ ├── build │ │ │ └── prj │ │ │ │ └── null │ │ ├── src │ │ │ ├── FGM_example.mat │ │ │ ├── FPGAclientAPI.h │ │ │ ├── FPGAclientMATLAB.c │ │ │ ├── FPGAclientMATLAB.m │ │ │ ├── fgm_controller_directives.tcl │ │ │ ├── foo.cpp │ │ │ ├── foo_data.h │ │ │ ├── foo_test.cpp │ │ │ ├── foo_user.cpp │ │ │ ├── foo_user.m │ │ │ └── test_HIL.m │ │ └── test │ │ │ ├── prj │ │ │ └── fgm_controller │ │ │ │ └── null │ │ │ ├── results │ │ │ └── fgm_controller │ │ │ │ ├── fpga_time_log.dat │ │ │ │ ├── fpga_u_log.dat │ │ │ │ ├── fpga_x0_log.dat │ │ │ │ ├── fpga_x_in_log.dat │ │ │ │ ├── fpga_x_out_log.dat │ │ │ │ ├── matlab_u_log.dat │ │ │ │ ├── matlab_x0_log.dat │ │ │ │ ├── matlab_x_in_log.dat │ │ │ │ ├── matlab_x_out_log.dat │ │ │ │ ├── num_iter_in_log.dat │ │ │ │ └── x_out.dat │ │ │ └── stimuli │ │ │ └── fgm_controller │ │ │ ├── num_iter_in.dat │ │ │ └── x_in.dat │ ├── ip_prototype │ │ ├── src │ │ │ ├── FPGAserver.h │ │ │ ├── echo.c │ │ │ └── main.c │ │ └── test │ │ │ └── results │ │ │ └── fgm_controller │ │ │ ├── fpga_time_log.dat │ │ │ ├── fpga_u_log.dat │ │ │ ├── fpga_x0_log.dat │ │ │ ├── fpga_x_in_log.dat │ │ │ ├── fpga_x_out_log.dat │ │ │ ├── matlab_u_log.dat │ │ │ ├── matlab_x0_log.dat │ │ │ ├── matlab_x_in_log.dat │ │ │ ├── matlab_x_out_log.dat │ │ │ └── num_iter_in_log.dat │ ├── make_matlab.m │ ├── make_project_files.m │ ├── make_vivado.tcl │ └── test_results.fig └── PL_lqr_controller │ ├── .gitignore │ ├── .metadata │ ├── MicroZed_PS_properties_v02.tcl │ ├── build_sdk_project.tcl │ ├── configuration_parameters_matlab_interface.dat │ ├── load_configuration_parameters.m │ ├── lqr_controller_configuration_parameters.dat │ ├── lqr_controller_ip_design_build.tcl │ ├── lqr_controller_ip_design_test.tcl │ └── run_fpga_prototype.tcl │ ├── doc │ └── lqr_controller │ │ ├── ip_configuration_parameters.txt │ │ ├── ip_design.dat │ │ ├── ip_design.txt │ │ ├── ip_prototype.dat │ │ └── ip_prototype.txt │ ├── ip_design │ ├── build │ │ └── prj │ │ │ └── lqr_controller │ │ │ └── null │ ├── src │ │ ├── FPGAclientAPI.h │ │ ├── FPGAclientMATLAB.c │ │ ├── FPGAclientMATLAB.m │ │ ├── LQR_example.mat │ │ ├── foo.cpp │ │ ├── foo_data.h │ │ ├── foo_test.cpp │ │ ├── foo_user.cpp │ │ ├── foo_user.m │ │ ├── lqr_controller_directives.tcl │ │ └── test_HIL.m │ └── test │ │ ├── prj │ │ └── lqr_controller │ │ │ └── null │ │ ├── results │ │ └── lqr_controller │ │ │ ├── fpga_time_log.dat │ │ │ ├── fpga_u_out_log.dat │ │ │ ├── fpga_x0_in_log.dat │ │ │ ├── matlab_u_out_log.dat │ │ │ ├── matlab_x0_in_log.dat │ │ │ ├── u_out.dat │ │ │ └── x_ref_in_log.dat │ │ └── stimuli │ │ └── lqr_controller │ │ └── null │ ├── ip_prototype │ ├── src │ │ ├── FPGAserver.h │ │ ├── echo.c │ │ └── main.c │ └── test │ │ └── results │ │ └── lqr_controller │ │ ├── fpga_time_log.dat │ │ ├── fpga_u_out_log.dat │ │ ├── fpga_x0_in_log.dat │ │ ├── matlab_u_out_log.dat │ │ ├── matlab_x0_in_log.dat │ │ └── x_ref_in_log.dat │ ├── make_matlab.m │ ├── make_project_files.m │ ├── make_vivado.tcl │ └── test_results.fig ├── protoip_matlab_interface ├── ip_design_build.m ├── ip_design_build_debug.m ├── ip_design_delete.m ├── ip_design_duplicate.m ├── ip_design_test.m ├── ip_design_test_debug.m ├── ip_design_test_debug.tcl ├── ip_prototype_build.m ├── ip_prototype_build_debug.m ├── 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