├── ChangeLog ├── testing ├── examples │ ├── STR710Test │ │ ├── .gitignore │ │ ├── prj │ │ │ ├── str710_program.script │ │ │ ├── eclipse_ram.gdb │ │ │ ├── eclipse_rom.gdb │ │ │ └── str710_jtagkey.cfg │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ └── test_ram.hex │ ├── STM32-103 │ │ ├── main.elf │ │ └── readme.txt │ ├── cortex │ │ ├── lm3s3748.elf │ │ └── test.c │ ├── PIC32 │ │ ├── BlinkingLeds.elf │ │ ├── readme.txt │ │ └── BlinkingLeds.c │ ├── LPC2148Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ ├── prj │ │ │ ├── eclipse_ram.gdb │ │ │ ├── eclipse_rom.gdb │ │ │ └── lpc2148_jtagkey.cfg │ │ ├── test_rom.hex │ │ └── test_ram.hex │ ├── LPC2294Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ ├── prj │ │ │ ├── eclipse_ram.gdb │ │ │ ├── eclipse_rom.gdb │ │ │ └── lpc2294_jtagkey.cfg │ │ ├── test_rom.hex │ │ └── test_ram.hex │ ├── SAM7S256Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ ├── prj │ │ │ ├── sam7s256_reset.script │ │ │ ├── eclipse_ram.gdb │ │ │ ├── eclipse_rom.gdb │ │ │ └── sam7s256_jtagkey.cfg │ │ ├── test_ram.hex │ │ └── test_rom.hex │ ├── SAM7X256Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ ├── prj │ │ │ ├── sam7x256_reset.script │ │ │ ├── eclipse_ram.gdb │ │ │ ├── eclipse_rom.gdb │ │ │ └── sam7x256_jtagkey.cfg │ │ ├── test_ram.hex │ │ └── test_rom.hex │ ├── STR710JtagSpeed │ │ ├── test.elf │ │ └── prj │ │ │ ├── eclipse_ft2232_ram.gdb │ │ │ └── str710_jtagkey.cfg │ ├── STR912Test │ │ ├── test_ram.elf │ │ ├── test_rom.elf │ │ ├── prj │ │ │ ├── str912_program.script │ │ │ ├── eclipse_ram.gdb │ │ │ ├── eclipse_rom.gdb │ │ │ └── str912_jtagkey.cfg │ │ ├── test_rom.hex │ │ └── test_ram.hex │ ├── ledtest-imx27ads │ │ ├── test.elf │ │ ├── ldscript │ │ ├── gdbinit-imx27ads │ │ ├── Makefile │ │ └── crt0.S │ ├── ledtest-imx31pdk │ │ ├── test.elf │ │ ├── ldscript │ │ ├── gdbinit-imx31pdk │ │ ├── Makefile │ │ └── crt0.S │ └── AT91R40008Test │ │ ├── test_ram.elf │ │ ├── prj │ │ ├── at91r40008_reset.script │ │ ├── eclipse_ram.gdb │ │ └── at91r40008_turtle.cfg │ │ └── test_ram.hex ├── tcl_server.tcl ├── build.test1 │ ├── mingw32_help │ │ └── include │ │ │ ├── sys │ │ │ └── cdefs.h │ │ │ └── elf.h │ ├── README.TXT │ ├── local.uses │ ├── Makefile.confuse │ ├── Makefile.libftdi │ └── Makefile.libusb ├── results │ └── template.html ├── profile_stm32.txt └── build.test2 │ └── README.txt ├── tools ├── st7_dtc_as │ └── st7_dtc_as ├── rlink_make_speed_table │ └── rlink_make_speed_table ├── uncrustify1.sh └── logger.pl ├── src ├── flash │ ├── startup.tcl │ ├── ocl │ │ └── at91sam7x │ │ │ └── at91sam7x_ocl_flash.script │ ├── Makefile.am │ ├── nor │ │ └── Makefile.am │ └── nand │ │ └── Makefile.am ├── target │ ├── ecos │ │ └── at91eb40a.elf │ └── xscale │ │ ├── debug_handler.bin │ │ ├── build.sh │ │ └── debug_handler.cmd ├── jtag │ ├── driver.h │ ├── drivers │ │ └── Makefile.am │ └── Makefile.am ├── svf │ └── Makefile.am ├── xsvf │ └── Makefile.am ├── pld │ └── Makefile.am ├── server │ ├── startup.tcl │ ├── Makefile.am │ ├── server_stubs.c │ └── tcl_server.h └── helper │ ├── Makefile.am │ ├── util.h │ └── ioutil.h ├── ecosflash ├── debug_at91eb40a.elf └── notes.txt ├── tcl ├── board │ ├── atmel_sam3u_ek.cfg │ ├── iar_str912_sk.cfg │ ├── atmel_sam3s_ek.cfg │ ├── pic-p32mx.cfg │ ├── olimex_sam7_ex256.cfg │ ├── stm32f10x_128k_eval.cfg │ ├── keil_mcb1700.cfg │ ├── keil_mcb2140.cfg │ ├── olimex_lpc_h2148.cfg │ ├── atmel_at91sam7s-ek.cfg │ ├── open-bldc.cfg │ ├── lisa-l.cfg │ ├── olimex_stm32_h103.cfg │ ├── efikamx.cfg │ ├── stm32100b_eval.cfg │ ├── arm_evaluator7t.cfg │ ├── stm3210e_eval.cfg │ ├── redbee-econotag.cfg │ ├── stm3210b_eval.cfg │ ├── stm3210c_eval.cfg │ ├── ti_beagleboard.cfg │ ├── linksys_nslu2.cfg │ ├── redbee-usb.cfg │ ├── olimex_LPC2378STK.cfg │ ├── ti_beagleboard_xm.cfg │ ├── microchip_explorer16.cfg │ ├── crossbow_tech_imote2.cfg │ ├── colibri.cfg │ ├── logicpd_imx27.cfg │ ├── iar_lpc1768.cfg │ ├── omap2420_h4.cfg │ ├── da850evm.cfg │ ├── ek-lm3s3748.cfg │ ├── voipac.cfg │ ├── hitex_stm32-performancestick.cfg │ ├── ek-lm3s6965.cfg │ ├── ek-lm3s811.cfg │ ├── balloon3-cpu.cfg │ ├── ek-lm3s9b9x.cfg │ ├── am3517evm.cfg │ ├── ek-lm3s1968.cfg │ ├── x300t.cfg │ ├── spear310evb20_mod.cfg │ ├── hammer.cfg │ ├── osk5912.cfg │ └── imx27lnst.cfg ├── interface │ ├── dummy.cfg │ ├── jlink.cfg │ ├── arm-jtag-ew.cfg │ ├── at91rm9200.cfg │ ├── chameleon.cfg │ ├── rlink.cfg │ ├── kt-link.cfg │ ├── ngxtech.cfg │ ├── vpaclink.cfg │ ├── axm0432.cfg │ ├── cortino.cfg │ ├── icebear.cfg │ ├── lisa-l.cfg │ ├── jtagkey-tiny.cfg │ ├── jtagkey.cfg │ ├── jtagkey2.cfg │ ├── jtagkey2p.cfg │ ├── signalyzer.cfg │ ├── usb-jtag.cfg │ ├── hitex_str9-comstick.cfg │ ├── signalyzer-h2.cfg │ ├── signalyzer-h4.cfg │ ├── flyswatter.cfg │ ├── signalyzer-lite.cfg │ ├── arm-usb-ocd.cfg │ ├── neodb.cfg │ ├── olimex-arm-usb-ocd.cfg │ ├── stm32-stick.cfg │ ├── calao-usb-a9260.cfg │ ├── olimex-jtag-tiny.cfg │ ├── usbprog.cfg │ ├── olimex-arm-usb-ocd-h.cfg │ ├── oocdlink.cfg │ ├── turtelizer2.cfg │ ├── olimex-arm-usb-tiny-h.cfg │ ├── openocd-usb.cfg │ ├── altera-usb-blaster.cfg │ ├── openrd.cfg │ ├── calao-usb-a9260-c01.cfg │ ├── calao-usb-a9260-c02.cfg │ ├── sheevaplug.cfg │ ├── parport.cfg │ ├── parport_dlc5.cfg │ ├── flashlink.cfg │ ├── vsllink.cfg │ ├── flossjtag-noeeprom.cfg │ ├── buspirate.cfg │ ├── flossjtag.cfg │ ├── luminary-lm3s811.cfg │ ├── luminary-icdi.cfg │ └── luminary.cfg ├── target │ ├── test_syntax_error.cfg │ ├── at91sam3uXX.cfg │ ├── at91sam3u1c.cfg │ ├── at91sam3u1e.cfg │ ├── at91sam3u2c.cfg │ ├── at91sam3u2e.cfg │ ├── at91sam3sXX.cfg │ ├── at91sam3u4c.cfg │ ├── at91sam3u4e.cfg │ ├── smdk6410.cfg │ ├── test_reset_syntax_error.cfg │ ├── avr32.cfg │ ├── samsung_s3c4510.cfg │ ├── sharp_lh79532.cfg │ ├── nuc910.cfg │ ├── icepick.cfg │ ├── at32ap7000.cfg │ ├── feroceon.cfg │ ├── dragonite.cfg │ ├── faux.cfg │ ├── netx500.cfg │ ├── ixp42x.cfg │ ├── smp8634.cfg │ ├── at91r40008.cfg │ ├── imx21.cfg │ ├── imx.cfg │ ├── cs351x.cfg │ ├── dsp56321.cfg │ ├── mega128.cfg │ ├── swj-dp.tcl │ ├── lpc2129.cfg │ ├── epc9301.cfg │ ├── lpc3250.cfg │ ├── lpc2294.cfg │ ├── samsung_s3c2410.cfg │ ├── lpc2124.cfg │ ├── lpc2103.cfg │ ├── samsung_s3c2440.cfg │ ├── at91sam9260.cfg │ ├── at91sam9rl.cfg │ ├── at91sam3XXX.cfg │ ├── spear3xx.cfg │ ├── c100.cfg │ ├── imx25.cfg │ ├── omap5912.cfg │ ├── sam7se512.cfg │ ├── samsung_s3c2450.cfg │ ├── is5114.cfg │ ├── imx51.cfg │ ├── lpc2378.cfg │ ├── tmpa900.cfg │ ├── tmpa910.cfg │ ├── imx35.cfg │ ├── pxa270.cfg │ ├── lpc2478.cfg │ ├── pxa255.cfg │ ├── str730.cfg │ ├── imx27.cfg │ └── sam7x256.cfg ├── cpu │ └── arm │ │ ├── arm7tdmi.tcl │ │ ├── arm920.tcl │ │ ├── arm946.tcl │ │ ├── arm966.tcl │ │ └── cortex_m3.tcl ├── cpld │ └── xilinx-xcr3256.cfg ├── chip │ ├── st │ │ ├── stm32 │ │ │ └── stm32.tcl │ │ └── spear │ │ │ └── spear310.tcl │ └── atmel │ │ └── at91 │ │ ├── pmc.tcl │ │ └── rtt.tcl ├── test │ ├── selftest.cfg │ └── syntax1.cfg └── mem_helper.tcl ├── .gitmodules ├── common.mk ├── doc ├── manual │ ├── app.txt │ ├── flash.txt │ └── target.txt └── Makefile.am ├── AUTHORS.ChangeLog ├── contrib ├── libdcc │ └── README └── loaders │ └── README ├── AUTHORS ├── config_subdir.m4 ├── bootstrap ├── .gitignore └── PATCHES.txt /ChangeLog: -------------------------------------------------------------------------------- 1 | Retired in favor of git log. 2 | -------------------------------------------------------------------------------- /testing/examples/STR710Test/.gitignore: -------------------------------------------------------------------------------- 1 | .dep 2 | src/main.lst 3 | -------------------------------------------------------------------------------- /tools/st7_dtc_as/st7_dtc_as: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | exec perl "$0.pl" $* 3 | -------------------------------------------------------------------------------- /src/flash/startup.tcl: -------------------------------------------------------------------------------- 1 | # Defines basic Tcl procs for OpenOCD flash module 2 | 3 | -------------------------------------------------------------------------------- /tools/rlink_make_speed_table/rlink_make_speed_table: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | exec perl "$0.pl" $* 3 | -------------------------------------------------------------------------------- /ecosflash/debug_at91eb40a.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/ecosflash/debug_at91eb40a.elf -------------------------------------------------------------------------------- /src/target/ecos/at91eb40a.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/src/target/ecos/at91eb40a.elf -------------------------------------------------------------------------------- /tcl/board/atmel_sam3u_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3u4e.cfg] 2 | 3 | reset_config srst_only 4 | 5 | -------------------------------------------------------------------------------- /tcl/interface/dummy.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Dummy interface (for testing purposes) 3 | # 4 | 5 | interface dummy 6 | 7 | -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/str710_program.script: -------------------------------------------------------------------------------- 1 | flash protect 0 0 7 off 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | -------------------------------------------------------------------------------- /src/jtag/driver.h: -------------------------------------------------------------------------------- 1 | struct command_context; 2 | 3 | int interface_register_commands(struct command_context *ctx); 4 | 5 | -------------------------------------------------------------------------------- /src/target/xscale/debug_handler.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/src/target/xscale/debug_handler.bin -------------------------------------------------------------------------------- /testing/examples/STM32-103/main.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/STM32-103/main.elf -------------------------------------------------------------------------------- /testing/examples/cortex/lm3s3748.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/cortex/lm3s3748.elf -------------------------------------------------------------------------------- /testing/examples/PIC32/BlinkingLeds.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/PIC32/BlinkingLeds.elf -------------------------------------------------------------------------------- /tcl/board/iar_str912_sk.cfg: -------------------------------------------------------------------------------- 1 | # The IAR str912-sk evaluation kick start board has an str912 2 | 3 | source [find target/str912.cfg] -------------------------------------------------------------------------------- /tcl/interface/jlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Segger J-Link 3 | # 4 | # http://www.segger.com/jlink.html 5 | # 6 | 7 | interface jlink 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/test_syntax_error.cfg: -------------------------------------------------------------------------------- 1 | # This script tests a syntax error in the startup 2 | # config script 3 | 4 | syntax error here 5 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/LPC2148Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/LPC2148Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/LPC2294Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/LPC2294Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/SAM7S256Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/SAM7S256Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/SAM7X256Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/SAM7X256Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/STR710JtagSpeed/test.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/STR710JtagSpeed/test.elf -------------------------------------------------------------------------------- /testing/examples/STR710Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/STR710Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/STR710Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/STR710Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/STR912Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/STR912Test/test_ram.elf -------------------------------------------------------------------------------- /testing/examples/STR912Test/test_rom.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/STR912Test/test_rom.elf -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/test.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/ledtest-imx27ads/test.elf -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/test.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/ledtest-imx31pdk/test.elf -------------------------------------------------------------------------------- /tcl/board/atmel_sam3s_ek.cfg: -------------------------------------------------------------------------------- 1 | source [find target/at91sam3sXX.cfg] 2 | 3 | $_TARGETNAME configure -event gdb-attach { reset init } 4 | -------------------------------------------------------------------------------- /tcl/board/pic-p32mx.cfg: -------------------------------------------------------------------------------- 1 | # The Olimex PIC-P32MX has a PIC32MX 2 | 3 | set CPUTAPID 0x40916053 4 | source [find target/pic32mx.cfg] 5 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/test_ram.elf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/esden/openocd/HEAD/testing/examples/AT91R40008Test/test_ram.elf -------------------------------------------------------------------------------- /tcl/board/olimex_sam7_ex256.cfg: -------------------------------------------------------------------------------- 1 | # Olimex SAM7-EX256 has a single Atmel at91sam7ex256 on it. 2 | 3 | source [find target/sam7x256.cfg] 4 | 5 | -------------------------------------------------------------------------------- /src/flash/ocl/at91sam7x/at91sam7x_ocl_flash.script: -------------------------------------------------------------------------------- 1 | soft_reset_halt 2 | load_image at91sam7x_ocl.bin 0x200000 3 | resume 0x200000 4 | flash probe 0 5 | -------------------------------------------------------------------------------- /tcl/board/stm32f10x_128k_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F103VBT6 chip on it. 2 | 3 | source [find target/stm32.cfg] 4 | 5 | -------------------------------------------------------------------------------- /tcl/interface/arm-jtag-ew.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-JTAG-EW 3 | # 4 | # http://www.olimex.com/dev/arm-jtag-ew.html 5 | # 6 | 7 | interface arm-jtag-ew 8 | 9 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm7tdmi.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm7tdmi 3 | set CPU_ARCH armv4t 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm920.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm920 3 | set CPU_ARCH armv4t 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm946.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm946 3 | set CPU_ARCH armv5te 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /tcl/cpu/arm/arm966.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME arm966 3 | set CPU_ARCH armv5te 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /ecosflash/notes.txt: -------------------------------------------------------------------------------- 1 | Some of these binaries are build & linked using eCos. 2 | 3 | For source for the flash drivers, see: 4 | 5 | http://ecos.sourceware.org/ 6 | 7 | -------------------------------------------------------------------------------- /tcl/board/keil_mcb1700.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil MCB1700 eval board 3 | # 4 | # http://www.keil.com/mcb1700/picture.asp 5 | # 6 | 7 | source [find target/lpc1768.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/board/keil_mcb2140.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Keil MCB2140 eval board 3 | # 4 | # http://www.keil.com/mcb2140/picture.asp 5 | # 6 | 7 | source [find target/lpc2148.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/cpu/arm/cortex_m3.tcl: -------------------------------------------------------------------------------- 1 | set CPU_TYPE arm 2 | set CPU_NAME cortex_m3 3 | set CPU_ARCH armv7 4 | set CPU_MAX_ADDRESS 0xFFFFFFFF 5 | set CPU_NBITS 32 6 | 7 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/str912_program.script: -------------------------------------------------------------------------------- 1 | str9x flash_config 0 4 2 0 0x80000 2 | flash protect 0 0 7 off 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | -------------------------------------------------------------------------------- /tcl/board/olimex_lpc_h2148.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex LPC-H2148 eval board 3 | # 4 | # http://www.olimex.com/dev/lpc-h2148.html 5 | # 6 | 7 | source [find target/lpc2148.cfg] 8 | 9 | -------------------------------------------------------------------------------- /tcl/interface/at91rm9200.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Various Atmel AT91RM9200 boards 3 | # 4 | # TODO: URL? 5 | # 6 | 7 | interface at91rm9200 8 | at91rm9200_device rea_ecr 9 | 10 | -------------------------------------------------------------------------------- /tcl/cpld/xilinx-xcr3256.cfg: -------------------------------------------------------------------------------- 1 | #xilinx coolrunner xcr3256 2 | #simple device - just configure a tap 3 | jtag newtap xcr tap -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id 0x0494c093 4 | -------------------------------------------------------------------------------- /tcl/interface/chameleon.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec Chameleon POD 3 | # 4 | # http://www.amontec.com/chameleon.shtml 5 | # 6 | 7 | interface parport 8 | parport_cable chameleon 9 | 10 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "tools/git2cl"] 2 | path = tools/git2cl 3 | url = git://repo.or.cz/git2cl.git 4 | [submodule "jimtcl"] 5 | path = jimtcl 6 | url = http://repo.or.cz/r/jimtcl.git 7 | -------------------------------------------------------------------------------- /tcl/interface/rlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Raisonance RLink 3 | # 4 | # http://www.mcu-raisonance.com/~rlink-debugger-programmer__microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html 5 | # 6 | 7 | interface rlink 8 | 9 | -------------------------------------------------------------------------------- /tcl/board/atmel_at91sam7s-ek.cfg: -------------------------------------------------------------------------------- 1 | # Atmel AT91SAM7S-EK 2 | # http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3784 3 | 4 | set CHIPNAME at91sam7s256 5 | 6 | source [find target/at91sam7sx.cfg] 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/interface/kt-link.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kristech KT-Link 3 | # 4 | # http://www.kristech.eu 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "KT-LINK" 9 | ft2232_layout ktlink 10 | ft2232_vid_pid 0x0403 0xBBE2 11 | -------------------------------------------------------------------------------- /tcl/interface/ngxtech.cfg: -------------------------------------------------------------------------------- 1 | # http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30 2 | 3 | interface ft2232 4 | ft2232_device_desc "NGX JTAG A" 5 | ft2232_vid_pid 0x0403 0x6010 6 | ft2232_layout "oocdlink" 7 | -------------------------------------------------------------------------------- /src/svf/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libsvf.la 5 | noinst_HEADERS = svf.h 6 | libsvf_la_SOURCES = svf.c 7 | 8 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 9 | -------------------------------------------------------------------------------- /testing/examples/STM32-103/readme.txt: -------------------------------------------------------------------------------- 1 | Olimex STM32-p103 board. 2 | 3 | main.elf is a file that can be programmed to flash for 4 | testing purposes(e.g. test GDB load performance). 5 | 6 | http://www.olimex.com/dev/stm32-p103.html -------------------------------------------------------------------------------- /src/xsvf/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libxsvf.la 5 | noinst_HEADERS = xsvf.h 6 | libxsvf_la_SOURCES = xsvf.c 7 | 8 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 9 | -------------------------------------------------------------------------------- /tcl/board/open-bldc.cfg: -------------------------------------------------------------------------------- 1 | # Open Source Brush Less DC Motor Controller 2 | # http://open-bldc.org 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/vpaclink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Voipac VPACLink 3 | # 4 | # http://voipac.com/27M-JTG-000 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "VPACLink A" 9 | ft2232_layout oocdlink 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /tcl/interface/axm0432.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Axiom axm0432 3 | # 4 | # http://www.axman.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Symphony SoundBite" 9 | ft2232_layout "axm0432_jtag" 10 | ft2232_vid_pid 0x0403 0x6010 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # the Lost Illusions Serendipitous Autopilot 2 | # http://paparazzi.enac.fr/wiki/Lisa 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32.cfg] 8 | -------------------------------------------------------------------------------- /tcl/board/olimex_stm32_h103.cfg: -------------------------------------------------------------------------------- 1 | # Olimex STM32-H103 eval board 2 | # http://olimex.com/dev/stm32-h103.html 3 | 4 | # Work-area size (RAM size) = 20kB for STM32F103RB device 5 | set WORKAREASIZE 0x5000 6 | 7 | source [find target/stm32.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/cortino.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex Cortino 3 | # 4 | # http://www.hitex.com/index.php?id=cortino 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Cortino" 9 | ft2232_layout cortino 10 | ft2232_vid_pid 0x0640 0x0032 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/icebear.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Section5 ICEBear 3 | # 4 | # http://section5.ch/icebear 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "ICEbear JTAG adapter" 9 | ft2232_layout icebear 10 | ft2232_vid_pid 0x0403 0xc140 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/lisa-l.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Lisa/L 3 | # 4 | # http://paparazzi.enac.fr/wiki/Lisa 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Lisa/L" 10 | ft2232_layout "lisa-l" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /tcl/board/efikamx.cfg: -------------------------------------------------------------------------------- 1 | # Genesi USA EfikaMX 2 | # http://www.genesi-usa.com/products/efika 3 | 4 | # Fall back to 6MHz if RTCK is not supported 5 | jtag_rclk 6000 6 | 7 | source [find target/imx51.cfg] 8 | 9 | reset_config trst_only 10 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey-tiny 3 | # 4 | # http://www.amontec.com/jtagkey-tiny.shtml 5 | # 6 | 7 | # The JTAGkey-tiny uses exactly the same config as the JTAGkey. 8 | source [find interface/jtagkey.cfg] 9 | 10 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey 3 | # 4 | # http://www.amontec.com/jtagkey.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xcff8 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3uXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3u4e 4 | # at91sam3u2e 5 | # at91sam3u1e 6 | # at91sam3u4c 7 | # at91sam3u2c 8 | # at91sam3u1c 9 | 10 | source [find target/at91sam3XXX.cfg] 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2 3 | # 4 | # http://www.amontec.com/jtagkey2.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey-2" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xCFF8 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u1c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u1e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u2c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u2e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | 8 | 9 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/prj/at91r40008_reset.script: -------------------------------------------------------------------------------- 1 | wait_halt 2 | sleep 10 3 | poll 4 | # Ethernut 3 remapping is required to access external flash memory. 5 | mww 0xffe00000 0x1000213d 6 | mww 0xffe00004 0x20003e3d 7 | mww 0xffe00020 0x00000001 8 | -------------------------------------------------------------------------------- /tcl/chip/st/stm32/stm32.tcl: -------------------------------------------------------------------------------- 1 | source [find bitsbytes.tcl] 2 | source [find cpu/arm/cortex_m3.tcl] 3 | source [find memory.tcl] 4 | source [find mmr_helpers.tcl] 5 | 6 | source [find chip/st/stm32/stm32_regs.tcl] 7 | source [find chip/st/stm32/stm32_rcc.tcl] 8 | -------------------------------------------------------------------------------- /tcl/interface/jtagkey2p.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Amontec JTAGkey2P 3 | # 4 | # http://www.amontec.com/jtagkey2p.shtml 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Amontec JTAGkey-2P" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x0403 0xCFF8 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer Tool (DT-USB-ST) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca0 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/usb-jtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Kolja Waschk's USB-JTAG 3 | # 4 | # http://www.ixo.de/info/usb_jtag/ 5 | # 6 | 7 | interface usb_blaster 8 | usb_blaster_vid_pid 0x16C0 0x06AD 9 | usb_blaster_device_desc "USB-JTAG-IF" 10 | adapter_khz 3000 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/stm32100b_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F100VB chip on it. 2 | # http://www.st.com/mcu/contentid-100-110-STM32100B_EVAL.html 3 | 4 | # we only have 8k sram 5 | set WORKAREASIZE 8192 6 | 7 | source [find target/stm32.cfg] 8 | -------------------------------------------------------------------------------- /tcl/interface/hitex_str9-comstick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STR9-comStick 3 | # 4 | # http://www.hitex.com/index.php?id=383 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "STR9-comStick" 9 | ft2232_layout comstick 10 | ft2232_vid_pid 0x0640 0x002c 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer-h2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer H2 (DT-USB-SH2) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer H2" 9 | ft2232_layout signalyzer-h 10 | ft2232_vid_pid 0x0403 0xbca2 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer-h4.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer H4 (DT-USB-SH4) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer H4" 9 | ft2232_layout signalyzer-h 10 | ft2232_vid_pid 0x0403 0xbca4 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/flyswatter.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TinCanTools Flyswatter 3 | # 4 | # http://www.tincantools.com/product.php?productid=16134 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Flyswatter" 9 | ft2232_layout "flyswatter" 10 | ft2232_vid_pid 0x0403 0x6010 11 | -------------------------------------------------------------------------------- /tcl/interface/signalyzer-lite.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xverve Signalyzer LITE (DT-USB-SLITE) 3 | # 4 | # http://www.signalyzer.com 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Signalyzer LITE" 9 | ft2232_layout signalyzer 10 | ft2232_vid_pid 0x0403 0xbca1 11 | 12 | -------------------------------------------------------------------------------- /src/pld/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libpld.la 5 | noinst_HEADERS = pld.h xilinx_bit.h virtex2.h 6 | libpld_la_SOURCES = pld.c xilinx_bit.c virtex2.c 7 | 8 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 9 | -------------------------------------------------------------------------------- /tcl/board/arm_evaluator7t.cfg: -------------------------------------------------------------------------------- 1 | # This board is from ARM and has an samsung s3c45101x01 chip 2 | 3 | source [find target/samsung_s3c4510.cfg] 4 | 5 | # 6 | # FIXME: 7 | # Add (A) sdram configuration 8 | # Add (B) flash cfi programing configuration 9 | # 10 | 11 | -------------------------------------------------------------------------------- /tcl/interface/arm-usb-ocd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG" 9 | ft2232_layout "olimex-jtag" 10 | ft2232_vid_pid 0x15BA 0x0003 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/neodb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Openmoko USB JTAG/RS232 adapter 3 | # 4 | # http://wiki.openmoko.org/wiki/Debug_Board_v3 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Debug Board for Neo1973" 9 | ft2232_layout jtagkey 10 | ft2232_vid_pid 0x1457 0x5118 11 | -------------------------------------------------------------------------------- /tcl/interface/olimex-arm-usb-ocd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x0003 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/stm32-stick.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hitex STM32-PerformanceStick 3 | # 4 | # http://www.hitex.com/index.php?id=340 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "STM32-PerformanceStick" 9 | ft2232_layout stm32stick 10 | ft2232_vid_pid 0x0640 0x002d 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/calao-usb-a9260.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260 common -C01 -C02 setup 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | # See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg. 7 | # 8 | 9 | adapter_nsrst_delay 200 10 | jtag_ntrst_delay 200 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/olimex-jtag-tiny.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG TINY" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x0004 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/usbprog.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Embedded Projects USBprog 3 | # 4 | # http://embedded-projects.net/index.php?page_id=135 5 | # 6 | 7 | interface usbprog 8 | # USBprog is broken w/short tms sequences, this is a workaround 9 | # until the C code can be fixed. 10 | tms_sequence long -------------------------------------------------------------------------------- /common.mk: -------------------------------------------------------------------------------- 1 | 2 | # common flags used in openocd build 3 | AM_CPPFLAGS = -I$(top_srcdir)/src \ 4 | -I$(top_builddir)/src \ 5 | -DPKGDATADIR=\"$(pkgdatadir)\" 6 | 7 | if INTERNAL_JIMTCL 8 | AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \ 9 | -I$(top_builddir)/jimtcl 10 | endif 11 | -------------------------------------------------------------------------------- /tcl/board/stm3210e_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F103ZE chip on it. 2 | # http://www.st.com/mcu/contentid-100-110-STM3210E_EVAL.html 3 | 4 | # increase working area for faster flash programming 5 | 6 | set WORKAREASIZE 32768 7 | 8 | source [find target/stm32.cfg] 9 | -------------------------------------------------------------------------------- /tcl/interface/olimex-arm-usb-ocd-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-OCD-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-ocd.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-OCD-H" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x002b 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/oocdlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Joern Kaipf's OOCDLink 3 | # 4 | # http://www.joernonline.de/contrexx2/cms/index.php?page=126 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "OOCDLink" 9 | ft2232_layout oocdlink 10 | ft2232_vid_pid 0x0403 0xbaf8 11 | adapter_khz 5 12 | 13 | -------------------------------------------------------------------------------- /tcl/interface/turtelizer2.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # egnite Turtelizer 2 3 | # 4 | # http://www.ethernut.de/en/hardware/turtelizer/index.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Turtelizer JTAG/RS232 Adapter" 9 | ft2232_layout turtelizer2 10 | ft2232_vid_pid 0x0403 0xbdc8 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/redbee-econotag.cfg: -------------------------------------------------------------------------------- 1 | source [find target/mc13224v.cfg] 2 | 3 | # The redbee-econotag has an onboard ft2232h with channel A wired 4 | # to the JTAG pins on the mc13224v 5 | # channel B is wired to UART1 6 | interface ft2232 7 | ft2232_layout redbee-econotag 8 | ft2232_vid_pid 0x0403 0x6010 9 | -------------------------------------------------------------------------------- /tcl/board/stm3210b_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F100VBT6 chip on it. 2 | # http://www.st.com/mcu/contentid-100-110-STM3210B_EVAL.html 3 | 4 | # increase working area for faster flash programming 5 | 6 | set WORKAREASIZE 32768 7 | 8 | source [find target/stm32.cfg] 9 | -------------------------------------------------------------------------------- /tcl/board/stm3210c_eval.cfg: -------------------------------------------------------------------------------- 1 | # This is an STM32 eval board with a single STM32F107VCT chip on it. 2 | # http://www.st.com/mcu/contentid-100-110-STM3210C_EVAL.html 3 | 4 | # increase working area for faster flash programming 5 | 6 | set WORKAREASIZE 32768 7 | 8 | source [find target/stm32.cfg] 9 | -------------------------------------------------------------------------------- /tcl/interface/olimex-arm-usb-tiny-h.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Olimex ARM-USB-TINY-H 3 | # 4 | # http://www.olimex.com/dev/arm-usb-tiny-h.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H" 9 | ft2232_layout olimex-jtag 10 | ft2232_vid_pid 0x15ba 0x002a 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/openocd-usb.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Hubert Hoegl's USB to JTAG 3 | # 4 | # http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html 5 | # 6 | 7 | interface ft2232 8 | ft2232_vid_pid 0x0403 0x6010 9 | ft2232_device_desc "Dual RS232" 10 | ft2232_layout "oocdlink" 11 | ft2232_latency 2 12 | -------------------------------------------------------------------------------- /tcl/board/ti_beagleboard.cfg: -------------------------------------------------------------------------------- 1 | # OMAP3 BeagleBoard 2 | # http://beagleboard.org 3 | 4 | # Fall back to 6MHz if RTCK is not supported 5 | jtag_rclk 6000 6 | 7 | source [find target/omap3530.cfg] 8 | 9 | # TI-14 JTAG connector 10 | reset_config trst_only 11 | 12 | # Later run: omap3_dbginit 13 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xA0000050 0x01c2 8 | monitor mdw 0xA0000050 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /tcl/board/linksys_nslu2.cfg: -------------------------------------------------------------------------------- 1 | # This is for the LinkSys (CISCO) NSLU2 board 2 | # It is an Intel XSCALE IXP420 CPU. 3 | 4 | source [find target/ixp42x.cfg] 5 | # The _TARGETNAME is set by the above. 6 | 7 | $_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x10000 -work-area-backup 0 8 | 9 | -------------------------------------------------------------------------------- /tcl/board/redbee-usb.cfg: -------------------------------------------------------------------------------- 1 | source [find target/mc13224v.cfg] 2 | 3 | # The redbee-econotag has an onboard ft2232h with 4 | # channel B wired to the JTAG pins on the mc13224v 5 | # channel A is wired to UART1 on the mc13224v 6 | interface ft2232 7 | ft2232_layout redbee-usb 8 | ft2232_vid_pid 0x0403 0x6010 9 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | monitor mww 0xE01FC040 0x0002 8 | monitor mdw 0xE01FC040 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | monitor mww 0xA0000050 0x01c2 8 | monitor mdw 0xA0000050 9 | load 10 | break main 11 | continue -------------------------------------------------------------------------------- /tcl/interface/altera-usb-blaster.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Altera USB-Blaster 3 | # 4 | # http://www.altera.com/literature/ug/ug_usb_blstr.pdf 5 | # 6 | 7 | interface usb_blaster 8 | # These are already the defaults. 9 | # usb_blaster_vid_pid 0x09FB 0x6001 10 | # usb_blaster_device_desc "USB-Blaster" 11 | adapter_khz 3000 12 | -------------------------------------------------------------------------------- /tcl/interface/openrd.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvell OpenRD 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/openrd.jsp 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout sheevaplug 9 | ft2232_vid_pid 0x0403 0x9e90 10 | ft2232_device_desc "OpenRD JTAGKey FT2232D B" 11 | adapter_khz 3000 12 | 13 | -------------------------------------------------------------------------------- /tcl/interface/calao-usb-a9260-c01.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C01 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout jtagkey 9 | ft2232_device_desc "USB-A9260" 10 | ft2232_vid_pid 0x0403 0x6010 11 | script interface/calao-usb-a9260.cfg 12 | script target/at91sam9260minimal.cfg 13 | 14 | -------------------------------------------------------------------------------- /tcl/interface/calao-usb-a9260-c02.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # CALAO Systems USB-A9260-C02 3 | # 4 | # http://www.calao-systems.com/ 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout jtagkey 9 | ft2232_device_desc "USB-A9260" 10 | ft2232_vid_pid 0x0403 0x6001 11 | script interface/calao-usb-a9260.cfg 12 | script target/at91sam9260minimal.cfg 13 | 14 | -------------------------------------------------------------------------------- /tcl/board/olimex_LPC2378STK.cfg: -------------------------------------------------------------------------------- 1 | ##################################################### 2 | # Olimex LPC2378STK eval board 3 | # 4 | # http://olimex.com/dev/lpc-2378stk.html 5 | # 6 | # Author: Sten, debian@sansys-electronic.com 7 | ##################################################### 8 | # 9 | 10 | source [find target/lpc2378.cfg] 11 | 12 | -------------------------------------------------------------------------------- /tcl/interface/sheevaplug.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Marvel SheevaPlug Development Kit 3 | # 4 | # http://www.marvell.com/products/embedded_processors/developer/kirkwood/sheevaplug.jsp 5 | # 6 | 7 | interface ft2232 8 | ft2232_layout sheevaplug 9 | ft2232_vid_pid 0x9e88 0x9e8f 10 | ft2232_device_desc "SheevaPlug JTAGKey FT2232D B" 11 | adapter_khz 2000 12 | 13 | -------------------------------------------------------------------------------- /tcl/board/ti_beagleboard_xm.cfg: -------------------------------------------------------------------------------- 1 | # BeagleBoard xM (DM37x) 2 | # http://beagleboard.org 3 | 4 | set CHIPTYPE "dm37x" 5 | source [find target/amdm37x.cfg] 6 | 7 | # The TI-14 JTAG connector does not have srst. CPU reset is handled in 8 | # hardware. 9 | reset_config trst_only 10 | 11 | # "amdm37x_dbginit dm37x.cpu" needs to be run after init. 12 | 13 | -------------------------------------------------------------------------------- /tcl/board/microchip_explorer16.cfg: -------------------------------------------------------------------------------- 1 | # Microchip Explorer 16 with PIC32MX360F512L PIM module. 2 | # http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en024858 3 | 4 | # TAPID for PIC32MX360F512L 5 | set CPUTAPID 0x30938053 6 | 7 | # use 32k working area 8 | set WORKAREASIZE 32768 9 | 10 | source [find target/pic32mx.cfg] 11 | -------------------------------------------------------------------------------- /doc/manual/app.txt: -------------------------------------------------------------------------------- 1 | /** @page appdocs OpenOCD Application APIs 2 | 3 | The top-level APIs in the OpenOCD library allow applications to integrate 4 | all of the low-level functionality using a set of simple function calls. 5 | 6 | These function calls do not exist in a re-usable form, but 7 | contributions to create and document them will be welcome. 8 | 9 | */ 10 | -------------------------------------------------------------------------------- /tcl/interface/parport.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Parallel port wiggler (many clones available) on port 0x378 3 | # 4 | # Addresses: 0x378/LPT1 or 0x278/LPT2 ... 5 | 6 | if { [info exists PARPORTADDR] } { 7 | set _PARPORTADDR $PARPORTADDR 8 | } else { 9 | set _PARPORTADDR 0x378 10 | } 11 | 12 | interface parport 13 | parport_port $_PARPORTADDR 14 | parport_cable wiggler 15 | -------------------------------------------------------------------------------- /tcl/board/crossbow_tech_imote2.cfg: -------------------------------------------------------------------------------- 1 | # Crossbow Technology iMote2 2 | 3 | set CHIPNAME imote2 4 | source [find target/pxa270.cfg] 5 | 6 | # longer-than-normal reset delay 7 | adapter_nsrst_delay 800 8 | 9 | reset_config trst_and_srst separate 10 | 11 | # works for P30 flash 12 | set _FLASHNAME $_CHIPNAME.flash 13 | flash bank $_FLASHNAME cfi 0x00000000 0x2000000 2 2 $_TARGETNAME 14 | -------------------------------------------------------------------------------- /src/server/startup.tcl: -------------------------------------------------------------------------------- 1 | # Defines basic Tcl procs for OpenOCD server modules 2 | 3 | # Handle GDB 'R' packet. Can be overriden by configuration script, 4 | # but it's not something one would expect target scripts to do 5 | # normally 6 | proc ocd_gdb_restart {target_id} { 7 | # Fix!!! we're resetting all targets here! Really we should reset only 8 | # one target 9 | reset halt 10 | } 11 | -------------------------------------------------------------------------------- /tcl/interface/parport_dlc5.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Xilinx Parallel Cable III 'DLC 5' (and various clones) 3 | # 4 | # http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html 5 | # 6 | 7 | if { [info exists PARPORTADDR] } { 8 | set _PARPORTADDR $PARPORTADDR 9 | } else { 10 | set _PARPORTADDR 0 11 | } 12 | 13 | interface parport 14 | parport_port $_PARPORTADDR 15 | parport_cable dlc5 16 | 17 | -------------------------------------------------------------------------------- /tcl/target/at91sam3sXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3s4c 4 | # at91sam3s4b 5 | # at91sam3s4a 6 | # at91sam3s2c 7 | # at91sam3s2b 8 | # at91sam3s2a 9 | # at91sam3s1c 10 | # at91sam3s1b 11 | # at91sam3s1a 12 | 13 | source [find target/at91sam3XXX.cfg] 14 | 15 | set _FLASHNAME $_CHIPNAME.flash 16 | flash bank $_FLASHNAME at91sam3 0x00400000 0 1 1 $_TARGETNAME 17 | -------------------------------------------------------------------------------- /tcl/board/colibri.cfg: -------------------------------------------------------------------------------- 1 | # Toradex Colibri PXA270 2 | source [find target/pxa270.cfg] 3 | reset_config trst_and_srst srst_push_pull 4 | adapter_nsrst_assert_width 40 5 | 6 | # CS0 -- one bank of CFI flash, 32 MBytes 7 | # the bank is 32-bits wide, two 16-bit chips in parallel 8 | set _FLASHNAME $_CHIPNAME.flash 9 | flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME 10 | 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u4c.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uxx.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip, it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /tcl/target/at91sam3u4e.cfg: -------------------------------------------------------------------------------- 1 | # common stuff 2 | source [find target/at91sam3uXX.cfg] 3 | 4 | # size is automatically "calculated" by probing 5 | set _FLASHNAME $_CHIPNAME.flash0 6 | flash bank $_FLASHNAME at91sam3 0x000080000 0 1 1 $_TARGETNAME 7 | # This is a 256K chip - it has the 2nd bank 8 | set _FLASHNAME $_CHIPNAME.flash1 9 | flash bank $_FLASHNAME at91sam3 0x000100000 0 1 1 $_TARGETNAME 10 | 11 | 12 | -------------------------------------------------------------------------------- /tcl/board/logicpd_imx27.cfg: -------------------------------------------------------------------------------- 1 | # The LogicPD Eval IMX27 eval board has a single IMX27 chip 2 | source [find target/imx27.cfg] 3 | 4 | # The Logic PD board has a NOR flash on CS0 5 | set _FLASHNAME $_CHIPNAME.flash 6 | flash bank $_FLASHNAME cfi 0xc0000000 0x00200000 2 2 $_TARGETNAME 7 | 8 | # 9 | # FIX ME, Add support to 10 | # 11 | # (A) hard reset the board. 12 | # (B) Initialize the SDRAM on the board 13 | # 14 | -------------------------------------------------------------------------------- /tcl/target/smdk6410.cfg: -------------------------------------------------------------------------------- 1 | # Target configuration for the Samsung s3c6410 system on chip 2 | # Tested on a SMDK6410 3 | # Processor : ARM1176 4 | # Info: JTAG device found: 0x0032409d (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0) 5 | 6 | source [find target/samsung_s3c6410.cfg] 7 | 8 | set _FLASHNAME $_CHIPNAME.flash 9 | flash bank $_FLASHNAME cfi 0x00000000 0x00100000 2 2 $_TARGETNAME jedec_probe 10 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | monitor mww 0xFFE00000 0x1000213D 8 | monitor mww 0xFFE00004 0x20003E3D 9 | monitor mww 0xFFE00020 0x00000001 10 | monitor mdw 0xFFE00000 1 11 | monitor mdw 0xFFE00004 1 12 | load 13 | break main 14 | continue 15 | -------------------------------------------------------------------------------- /testing/tcl_server.tcl: -------------------------------------------------------------------------------- 1 | # Simple tcl client to connect to openocd 2 | puts "Use empty line to exit" 3 | set fo [socket 127.0.0.1 6666] 4 | puts -nonewline stdout "> " 5 | flush stdout 6 | while {[gets stdin line] >= 0} { 7 | if {$line eq {}} break 8 | puts $fo $line 9 | flush $fo 10 | gets $fo line 11 | puts $line 12 | puts -nonewline stdout "> " 13 | flush stdout 14 | } 15 | close $fo 16 | -------------------------------------------------------------------------------- /tcl/interface/flashlink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # ST FlashLINK JTAG parallel cable 3 | # 4 | # http://www.st.com/mcu/contentid-94-80-FL_101.html 5 | # http://www.st.com/stonline/products/literature/um/7889.pdf 6 | # 7 | 8 | if { [info exists PARPORTADDR] } { 9 | set _PARPORTADDR $PARPORTADDR 10 | } else { 11 | set _PARPORTADDR 0 12 | } 13 | 14 | interface parport 15 | parport_port $_PARPORTADDR 16 | parport_cable flashlink 17 | -------------------------------------------------------------------------------- /testing/examples/PIC32/readme.txt: -------------------------------------------------------------------------------- 1 | Here you'll find a simple example tested with PIC32 Starter kit (source code and .elf file). It will blink repeatedly the LEDs on the board. 2 | The program was compiled and written on the target using MPLAB IDE v 8.0 that comes with the kit because openocd is missing currently the ability 3 | to program the flash for this specific target. It is possible in the future this limitation to be removed. 4 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | 8 | # Set SRAM size to 96 KB 9 | monitor mww 0x5C002034 0x0197 10 | monitor mdw 0x5C002034 11 | 12 | # Set Flash, Bank0 size to 512 KB 13 | monitor mww 0x54000000 0xf 14 | 15 | load 16 | break main 17 | continue 18 | 19 | 20 | 21 | 22 | -------------------------------------------------------------------------------- /tcl/chip/atmel/at91/pmc.tcl: -------------------------------------------------------------------------------- 1 | 2 | if [info exists AT91C_MAINOSC_FREQ] { 3 | # user set this... let it be. 4 | } { 5 | # 18.432mhz is a common thing... 6 | set AT91C_MAINOSC_FREQ 18432000 7 | } 8 | global AT91C_MAINOSC_FREQ 9 | 10 | if [info exists AT91C_SLOWOSC_FREQ] { 11 | # user set this... let it be. 12 | } { 13 | # 32khz is the norm 14 | set AT91C_SLOWOSC_FREQ 32768 15 | } 16 | global AT91C_SLOWOSC_FREQ 17 | 18 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | 8 | # Set SRAM size to 96 KB 9 | monitor mww 0x5C002034 0x0197 10 | monitor mdw 0x5C002034 11 | 12 | # Set Flash, Bank0 size to 512 KB 13 | monitor mww 0x54000000 0xf 14 | 15 | load 16 | break main 17 | continue 18 | 19 | 20 | 21 | 22 | -------------------------------------------------------------------------------- /tcl/board/iar_lpc1768.cfg: -------------------------------------------------------------------------------- 1 | # Board from IAR KickStart Kit for LPC1768 2 | # See www.iar.com and also 3 | # http://www.olimex.com/dev/lpc-1766stk.html 4 | # 5 | 6 | source [find target/lpc1768.cfg] 7 | 8 | # The chip has just been reset. 9 | # 10 | $_TARGETNAME configure -event reset-init { 11 | # FIXME update the core clock to run at 100 MHz; 12 | # and update JTAG clocking similarly; then 13 | # make CCLK match, 14 | 15 | flash probe 0 16 | } 17 | 18 | -------------------------------------------------------------------------------- /src/target/xscale/build.sh: -------------------------------------------------------------------------------- 1 | arm-none-eabi-gcc -c debug_handler.S -o debug_handler.o 2 | arm-none-eabi-ld -EL -n -Tdebug_handler.cmd debug_handler.o -o debug_handler.out 3 | arm-none-eabi-objcopy -O binary debug_handler.out debug_handler.bin 4 | 5 | #arm-none-eabi-gcc -mbig-endian -c debug_handler.S -o debug_handler_be.o 6 | #arm-none-eabi-ld -EB -n -Tdebug_handler.cmd debug_handler_be.o -o debug_handler_be.out 7 | #arm-none-eabi-objcopy -O binary debug_handler_be.out debug_handler_be.bin 8 | -------------------------------------------------------------------------------- /tcl/board/omap2420_h4.cfg: -------------------------------------------------------------------------------- 1 | # OMAP2420 SDP board ("H4") 2 | 3 | source [find target/omap2420.cfg] 4 | 5 | # NOTE: this assumes you're *NOT* using a TI-14 connector. 6 | reset_config trst_and_srst separate 7 | 8 | # Board configs can vary a *LOT* ... parts, jumpers, etc. 9 | # This GP board boots from cs0 using NOR (2x32M), and also 10 | # has 64M NAND on cs6. 11 | flash bank h4.u10 cfi 0x04000000 0x02000000 2 2 $_TARGETNAME 12 | flash bank h4.u11 cfi 0x06000000 0x02000000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /tcl/board/da850evm.cfg: -------------------------------------------------------------------------------- 1 | #DA850 EVM board 2 | # http://focus.ti.com/dsp/docs/thirdparty/catalog/devtoolsproductfolder.tsp?actionPerformed=productFolder&productId=5939 3 | # http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit 4 | 5 | source [find target/omapl138.cfg] 6 | 7 | reset_config trst_and_srst separate 8 | 9 | #currently any pinmux/timing must be setup by UBL before openocd can do debug 10 | #TODO: implement pinmux/timing on reset like in board/dm365evm.cfg 11 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s3748.cfg: -------------------------------------------------------------------------------- 1 | # Stellaris lm3s3748 Evaluation Kit 2 | # http://www.luminarymicro.com/products/lm3s3748_usb_h_d_evaluation_kits.html 3 | 4 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 5 | # so is using it in JTAG mode, as done here. 6 | source [find interface/luminary.cfg] 7 | 8 | # 20k working area 9 | set WORKAREASIZE 0x4000 10 | set CHIPNAME lm3s3748 11 | source [find target/stellaris.cfg] 12 | 13 | # Board has only srst 14 | reset_config srst_only 15 | 16 | -------------------------------------------------------------------------------- /AUTHORS.ChangeLog: -------------------------------------------------------------------------------- 1 | drath:Dominic Rath 2 | mlu:Magnus Lundin 3 | mifi:Michael Fischer 4 | ntfreak:Spencer Oliver 5 | duane:Duane Ellis 6 | oharboe:Øyvind Harboe 7 | kc8apf:Rick Altherr 8 | zwelch:Zachary T Welch 9 | vpalatin:Vincent Palatin 10 | bodylove:Carsten Schlote 11 | -------------------------------------------------------------------------------- /tcl/board/voipac.cfg: -------------------------------------------------------------------------------- 1 | # Config for Voipac PXA270/PXA270M module. 2 | 3 | set CHIPNAME voipac 4 | source [find target/pxa270.cfg] 5 | 6 | # The board supports separate reset lines 7 | # Override this in the interface config for parallel dongles 8 | reset_config trst_and_srst separate 9 | 10 | # flash bank 11 | flash bank $_CHIPNAME.flash0 cfi 0x00000000 0x2000000 2 2 $_TARGETNAME 12 | flash bank $_CHIPNAME.flash1 cfi 0x02000000 0x2000000 2 2 $_TARGETNAME 13 | -------------------------------------------------------------------------------- /tcl/test/selftest.cfg: -------------------------------------------------------------------------------- 1 | 2 | add_help_text selftest "run selftest using working ram
" 3 | 4 | proc selftest {tmpfile address size} { 5 | 6 | for {set i 0} {$i < $size } {set i [expr $i+4]} { 7 | mww [expr $address+$i] $i 8 | } 9 | 10 | for {set i 0} {$i < 10 } {set i [expr $i+1]} { 11 | echo "Test iteration $i" 12 | dump_image $tmpfile $address $size 13 | verify_image $tmpfile $address bin 14 | load_image $tmpfile $address bin 15 | } 16 | 17 | } 18 | -------------------------------------------------------------------------------- /contrib/libdcc/README: -------------------------------------------------------------------------------- 1 | This code is an example of using the openocd debug message system. 2 | 3 | Before the message output is seen in the debug window, the functionality 4 | will need enabling: 5 | 6 | From the gdb prompt: 7 | monitor target_request debugmsgs enable 8 | monitor trace point 1 9 | 10 | From the Telnet prompt: 11 | target_request debugmsgs enable 12 | trace point 1 13 | 14 | To see how many times the trace point was hit: 15 | (monitor) trace point 1 16 | 17 | Spen 18 | spen@spen-soft.co.uk 19 | 20 | -------------------------------------------------------------------------------- /src/flash/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | SUBDIRS = \ 4 | nor \ 5 | nand 6 | 7 | METASOURCES = AUTO 8 | noinst_LTLIBRARIES = libflash.la 9 | libflash_la_SOURCES = \ 10 | common.c \ 11 | mflash.c 12 | 13 | libflash_la_LIBADD = \ 14 | $(top_builddir)/src/flash/nor/libocdflashnor.la \ 15 | $(top_builddir)/src/flash/nand/libocdflashnand.la 16 | 17 | noinst_HEADERS = \ 18 | common.h \ 19 | mflash.h 20 | 21 | EXTRA_DIST = startup.tcl 22 | 23 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 24 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/ldscript: -------------------------------------------------------------------------------- 1 | SECTIONS 2 | { 3 | . = 0x80000100; 4 | .text : { *(.text) } 5 | .data ALIGN(0x10): { *(.data) } 6 | .bss ALIGN(0x10): { 7 | __bss_start__ = ABSOLUTE(.); 8 | *(.bss) 9 | . += 0x100; 10 | } 11 | __bss_end__ = .; 12 | PROVIDE (__stack = .); 13 | _end = .; 14 | .debug_info 0 : { *(.debug_info) } 15 | .debug_abbrev 0 : { *(.debug_abbrev) } 16 | .debug_line 0 : { *(.debug_line) } 17 | .debug_frame 0 : { *(.debug_frame) } 18 | } 19 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/ldscript: -------------------------------------------------------------------------------- 1 | SECTIONS 2 | { 3 | . = 0xA0000000; 4 | .text : { *(.text) } 5 | .data ALIGN(0x10): { *(.data) } 6 | .bss ALIGN(0x10): { 7 | __bss_start__ = ABSOLUTE(.); 8 | *(.bss) 9 | . += 0x100; 10 | } 11 | __bss_end__ = .; 12 | PROVIDE (__stack = .); 13 | _end = .; 14 | .debug_info 0 : { *(.debug_info) } 15 | .debug_abbrev 0 : { *(.debug_abbrev) } 16 | .debug_line 0 : { *(.debug_line) } 17 | .debug_frame 0 : { *(.debug_frame) } 18 | } 19 | -------------------------------------------------------------------------------- /AUTHORS: -------------------------------------------------------------------------------- 1 | Dominic Rath 2 | Magnus Lundin 3 | Michael Fischer 4 | Spencer Oliver 5 | Carsten Schlote 6 | Øyvind Harboe 7 | Duane Ellis 8 | Michael Schwingen 9 | Rick Altherr 10 | David Brownell 11 | Vincint Palatin 12 | Zachary T Welch 13 | -------------------------------------------------------------------------------- /tcl/board/hitex_stm32-performancestick.cfg: -------------------------------------------------------------------------------- 1 | # Hitex stm32 performance stick 2 | 3 | reset_config trst_and_srst 4 | 5 | source [find interface/stm32-stick.cfg] 6 | 7 | set CHIPNAME stm32_hitex 8 | source [find target/stm32.cfg] 9 | 10 | # configure str750 connected to jtag chain 11 | # FIXME -- source [find target/str750.cfg] after cleaning that up 12 | jtag newtap str750 cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id 0x4f1f0041 13 | 14 | # for some reason this board like to startup @ 500kHz 15 | adapter_khz 500 16 | 17 | -------------------------------------------------------------------------------- /tcl/target/test_reset_syntax_error.cfg: -------------------------------------------------------------------------------- 1 | # Test script to check that syntax error in reset 2 | # script is reported properly. 3 | 4 | # at91eb40a target 5 | 6 | #jtag scan chain 7 | set _CHIPNAME syntaxtest 8 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf 9 | 10 | #target configuration 11 | set _TARGETNAME $_CHIPNAME.cpu 12 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 13 | 14 | $_TARGETNAME configure -event reset-init { 15 | 16 | syntax error 17 | } 18 | -------------------------------------------------------------------------------- /testing/examples/PIC32/BlinkingLeds.c: -------------------------------------------------------------------------------- 1 | #include 2 | int main(void) 3 | { 4 | int i; 5 | mPORTDClearBits(BIT_0); 6 | mPORTDSetPinsDigitalOut(BIT_0); 7 | mPORTDClearBits(BIT_1); 8 | mPORTDSetPinsDigitalOut(BIT_1); 9 | mPORTDClearBits(BIT_2); 10 | mPORTDSetPinsDigitalOut(BIT_2); 11 | 12 | while (1) 13 | { 14 | for (i = 0; i < 500000; i++) 15 | mPORTDToggleBits(BIT_0); 16 | for (i = 0; i < 500000; i++) 17 | mPORTDToggleBits(BIT_1); 18 | for (i = 0; i < 500000; i++) 19 | mPORTDToggleBits(BIT_2); 20 | } 21 | 22 | return 0; 23 | } 24 | -------------------------------------------------------------------------------- /testing/examples/cortex/test.c: -------------------------------------------------------------------------------- 1 | /* simple app. 2 | 3 | modify test.ld to change address. 4 | 5 | Even if the app is position independent, the symbols 6 | need to match to test basic debugging. 7 | 8 | To load the app to 0x20000000 in GDB, use: 9 | 10 | load a.out 11 | monitor reg sp 0x20004000 12 | monitor reg pc 0x20002000 13 | stepi 14 | 15 | arm-elf-gcc -mthumb -mcpu = cortex-m3 -nostdlib -Ttest.ld test.c 16 | 17 | 18 | */ 19 | int j; 20 | void _start() 21 | { 22 | int i; 23 | for (i = 0; i < 1000; i++) 24 | { 25 | j++; 26 | } 27 | } 28 | -------------------------------------------------------------------------------- /doc/Makefile.am: -------------------------------------------------------------------------------- 1 | info_TEXINFOS = openocd.texi 2 | openocd_TEXINFOS = fdl.texi 3 | man_MANS = openocd.1 4 | EXTRA_DIST = openocd.1 5 | 6 | dist-hook: 7 | mkdir $(distdir)/manual 8 | cp -p $(srcdir)/manual/*.txt $(distdir)/manual 9 | for i in $$(cd $(srcdir)/manual/ && ls -d */); do \ 10 | mkdir $(distdir)/manual/$$i; \ 11 | cp -p $(srcdir)/manual/$$i/* $(distdir)/manual/$$i/; \ 12 | done 13 | 14 | MAINTAINERCLEANFILES = \ 15 | $(srcdir)/Makefile.in \ 16 | $(srcdir)/mdate-sh \ 17 | $(srcdir)/stamp-vti \ 18 | $(srcdir)/version.texi \ 19 | $(srcdir)/texinfo.tex 20 | -------------------------------------------------------------------------------- /tcl/target/avr32.cfg: -------------------------------------------------------------------------------- 1 | set _CHIPNAME avr32 2 | set _ENDIAN big 3 | 4 | # force an error till we get a good number 5 | set _CPUTAPID 0x21e8203f 6 | 7 | jtag_nsrst_delay 100 8 | jtag_ntrst_delay 100 9 | 10 | reset_config trst_and_srst separate 11 | 12 | # jtag scan chain 13 | # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 14 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_CPUTAPID 15 | 16 | set _TARGETNAME [format "%s.cpu" $_CHIPNAME] 17 | target create $_TARGETNAME avr32_ap7k -endian $_ENDIAN -chain-position $_TARGETNAME 18 | 19 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s6965.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S6965 Evaluation Kits 3 | # 4 | # http://www.luminarymicro.com/products/lm3s6965_ethernet_evaluation_kit.html 5 | 6 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 7 | # so is using it in JTAG mode, as done here. 8 | source [find interface/luminary.cfg] 9 | 10 | # 20k working area 11 | set WORKAREASIZE 0x5000 12 | set CHIPNAME lm3s6965 13 | # include the target config 14 | source [find target/stellaris.cfg] 15 | 16 | adapter_nsrst_delay 100 17 | 18 | # LM3S6965 Evaluation Board has only srst 19 | reset_config srst_only 20 | -------------------------------------------------------------------------------- /tcl/interface/vsllink.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Versaloon Link -- VSLLink 3 | # 4 | # http://www.simonqian.com/en/Versaloon 5 | # 6 | 7 | interface vsllink 8 | 9 | #vsllink_usb_vid 0x03EB 10 | #vsllink_usb_pid 0x2103 11 | #vsllink_usb_bulkin 0x02 12 | #vsllink_usb_bulkout 0x02 13 | #vsllink_usb_interface 0 14 | 15 | vsllink_usb_vid 0x0483 16 | vsllink_usb_pid 0x5740 17 | vsllink_usb_bulkin 0x02 18 | vsllink_usb_bulkout 0x03 19 | vsllink_usb_interface 1 20 | 21 | # vsllink mode, dma or normal 22 | # for low adapter_khz, use normal 23 | # for high adapter_khz, use dma 24 | #vsllink_mode dma 25 | vsllink_mode normal 26 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S811 Evaluation Kits 3 | # 4 | # http://www.luminarymicro.com/products/stellaris_811_evaluation_kits.html 5 | 6 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 7 | # so is using it in JTAG mode, as done here. 8 | # NOTE: older '811-EK boards (before rev C) shouldn't use this. 9 | source [find interface/luminary.cfg] 10 | 11 | # include the target config 12 | set CHIPNAME lm3s811 13 | source [find target/stellaris.cfg] 14 | 15 | 16 | adapter_nsrst_delay 100 17 | 18 | #LM3S811 Evaluation Board has only srst 19 | reset_config srst_only 20 | -------------------------------------------------------------------------------- /tcl/interface/flossjtag-noeeprom.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the pre v0.3 Floss-JTAG compatible config file. It can also be used 7 | # for newer versions of Floss-JTAG with empty or not populated eeprom. If you 8 | # have several Floss-JTAG connected you have to use the usb id to select a 9 | # specific one. 10 | # 11 | # If you have a Floss-JTAG WITH eeprom that is programmed use flossjtag.cfg 12 | # file. 13 | # 14 | 15 | interface ft2232 16 | ft2232_vid_pid 0x0403 0x6010 17 | ft2232_device_desc "Dual RS232-HS" 18 | ft2232_layout "usbjtag" 19 | ft2232_latency 2 20 | -------------------------------------------------------------------------------- /tcl/board/balloon3-cpu.cfg: -------------------------------------------------------------------------------- 1 | # Config for balloon3 board, cpu JTAG port. http://balloonboard.org/ 2 | # The board has separate JTAG ports for cpu and CPLD/FPGA devices 3 | # Chaining is done on IO interfaces if desired. 4 | 5 | source [find target/pxa270.cfg] 6 | 7 | # The board supports separate reset lines 8 | # Override this in the interface config for parallel dongles 9 | reset_config trst_and_srst separate 10 | 11 | # flash bank 12 | # 29LV650 64Mbit Flash 13 | set _FLASHNAME $_CHIPNAME.flash 14 | flash bank $_FLASHNAME cfi 0x00000000 0x800000 2 2 $_TARGETNAME 15 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s9b9x.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S9B9x Evaluation Kits 3 | # 4 | # http://www.luminarymicro.com/products/ek-lm3s9b90.html 5 | # http://www.luminarymicro.com/products/ek-lm3s9b92.html 6 | # 7 | 8 | # NOTE: using the bundled FT2232 JTAG/SWD/SWO interface is optional! 9 | # so is using in JTAG mode, as done here. 10 | source [find interface/luminary-icdi.cfg] 11 | 12 | set WORKAREASIZE 0x4000 13 | set CHIPNAME lm3s9b9x 14 | source [find target/stellaris.cfg] 15 | 16 | # jtag speed 17 | adapter_khz 500 18 | 19 | adapter_nsrst_delay 100 20 | 21 | #LM3S9B9x Evaluation Board has only srst 22 | reset_config srst_only 23 | -------------------------------------------------------------------------------- /tcl/interface/buspirate.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Buspirate with OpenOCD support 3 | # 4 | # http://dangerousprototypes.com/bus-pirate-manual/ 5 | # 6 | 7 | interface buspirate 8 | 9 | # you need to specify port on which BP lives 10 | #buspirate_port /dev/ttyUSB0 11 | 12 | # communication speed setting 13 | buspirate_speed normal # or fast 14 | 15 | # voltage regulator Enabled = 1 Disabled = 0 16 | #buspirate_vreg 0 17 | 18 | # pin mode normal or open-drain 19 | #buspirate_mode normal 20 | 21 | # pullup state Enabled = 1 Disabled = 0 22 | #buspirate_pullup 0 23 | 24 | # this depends on the cable, you are safe with this option 25 | reset_config srst_only 26 | 27 | -------------------------------------------------------------------------------- /testing/build.test1/mingw32_help/include/sys/cdefs.h: -------------------------------------------------------------------------------- 1 | /* sys/cdefs.h 2 | 3 | Copyright 1998, 2000, 2001 Red Hat, Inc. 4 | 5 | This file is part of Cygwin. 6 | 7 | This software is a copyrighted work licensed under the terms of the 8 | Cygwin license. Please consult the file "CYGWIN_LICENSE" for 9 | details. */ 10 | 11 | #ifndef _SYS_CDEFS_H 12 | #define _SYS_CDEFS_H 13 | #ifdef __cplusplus 14 | #define __BEGIN_DECLS extern "C" { 15 | #define __END_DECLS } 16 | #else 17 | #define __BEGIN_DECLS 18 | #define __END_DECLS 19 | #endif 20 | #define __P(protos) protos /* full-blown ANSI C */ 21 | #define __CONCAT(__x,__y) __x##__y 22 | #endif 23 | 24 | -------------------------------------------------------------------------------- /tcl/interface/flossjtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # FlossJTAG 3 | # 4 | # http://github.com/esden/floss-jtag 5 | # 6 | # This is the v0.3 and v1.0 Floss-JTAG compatible config file. It relies on the 7 | # existence of an eeprom on Floss-JTAG containing a name. If you have several 8 | # Floss-JTAG adapters connected you can use the serial number to select a 9 | # specific device. 10 | # 11 | # If your Floss-JTAG does not have an eeprom or eeprom is empty use 12 | # flossjtag-noeeprom.cfg file. 13 | # 14 | 15 | interface ft2232 16 | ft2232_vid_pid 0x0403 0x6010 17 | ft2232_device_desc "FLOSS-JTAG" 18 | #ft2232_serial "FJ000001" 19 | ft2232_layout "flossjtag" 20 | ft2232_latency 2 21 | -------------------------------------------------------------------------------- /tcl/target/samsung_s3c4510.cfg: -------------------------------------------------------------------------------- 1 | 2 | if { [info exists CHIPNAME] } { 3 | set _CHIPNAME $CHIPNAME 4 | } else { 5 | set _CHIPNAME s3c4510 6 | } 7 | 8 | if { [info exists ENDIAN] } { 9 | set _ENDIAN $ENDIAN 10 | } else { 11 | set _ENDIAN little 12 | } 13 | 14 | 15 | # This appears to be a "Version 1" arm7tdmi. 16 | if { [info exists CPUTAPID ] } { 17 | set _CPUTAPID $CPUTAPID 18 | } else { 19 | set _CPUTAPID 0x1f0f0f0f 20 | } 21 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 22 | 23 | set _TARGETNAME $_CHIPNAME.cpu 24 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME 25 | 26 | -------------------------------------------------------------------------------- /tcl/interface/luminary-lm3s811.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S811 Evaluation Kit 3 | # 4 | # http://www.luminarymicro.com/products/stellaris_811_evaluation_kits.html 5 | # 6 | # NOTE: this is only for boards *before* Rev C, which adds support 7 | # for SWO tracing with ADBUS_6 DBG_ENn and BDBUS_4 SWO_EN signals. 8 | # The "evb_lm3s811" layout doesn't set up those signals. 9 | # 10 | # Rev C boards work more like the other Stellaris eval boards. They 11 | # need to use the "luminary_icdi" layout to work correctly. 12 | # 13 | 14 | interface ft2232 15 | ft2232_device_desc "Stellaris Evaluation Board" 16 | ft2232_layout evb_lm3s811 17 | ft2232_vid_pid 0x0403 0xbcd9 18 | 19 | -------------------------------------------------------------------------------- /src/server/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libserver.la 5 | noinst_HEADERS = server.h telnet_server.h gdb_server.h 6 | libserver_la_SOURCES = server.c telnet_server.c gdb_server.c 7 | 8 | if !ECOSBOARD 9 | libserver_la_SOURCES += server_stubs.c 10 | endif 11 | 12 | libserver_la_CFLAGS = 13 | if IS_MINGW 14 | # FD_* macros are sloppy with their signs on MinGW32 platform 15 | libserver_la_CFLAGS += -Wno-sign-compare 16 | endif 17 | 18 | # tcl server addons 19 | noinst_HEADERS += tcl_server.h 20 | libserver_la_SOURCES += tcl_server.c 21 | 22 | EXTRA_DIST = \ 23 | startup.tcl 24 | 25 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 26 | -------------------------------------------------------------------------------- /tcl/target/sharp_lh79532.cfg: -------------------------------------------------------------------------------- 1 | reset_config srst_only srst_pulls_trst 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lh79532 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID ] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # sharp changed the number! 19 | set _CPUTAPID 0x00002061 20 | } 21 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 22 | 23 | set _TARGETNAME $_CHIPNAME.cpu 24 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME 25 | 26 | 27 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/sam7s256_reset.script: -------------------------------------------------------------------------------- 1 | # 2 | # Init - taken form the script openocd_at91sam7_ecr.script 3 | # 4 | # I take this script from the following page: 5 | # 6 | # http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html 7 | # 8 | mww 0xfffffd44 0x00008000 # disable watchdog 9 | mww 0xfffffd08 0xa5000001 # enable user reset 10 | mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator 11 | sleep 10 12 | mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz 13 | sleep 10 14 | mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz 15 | sleep 10 16 | mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) 17 | sleep 100 18 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/sam7x256_reset.script: -------------------------------------------------------------------------------- 1 | # 2 | # Init - taken form the script openocd_at91sam7_ecr.script 3 | # 4 | # I take this script from the following page: 5 | # 6 | # http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html 7 | # 8 | mww 0xfffffd44 0x00008000 # disable watchdog 9 | mww 0xfffffd08 0xa5000001 # enable user reset 10 | mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator 11 | sleep 10 12 | mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz 13 | sleep 10 14 | mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz 15 | sleep 10 16 | mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) 17 | sleep 100 18 | -------------------------------------------------------------------------------- /tcl/target/nuc910.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Nuvoton nuc910 (previously W90P910) based soc 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME nuc910 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # set useful default 21 | set _CPUTAPID 0x07926f0f 22 | } 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 28 | -------------------------------------------------------------------------------- /tcl/target/icepick.cfg: -------------------------------------------------------------------------------- 1 | # Utilities for TI ICEpick-C ... used in DaVinci, OMAP3, and more. 2 | 3 | # jrc == TAP name for the ICEpick 4 | # port == a port number, 0..15 5 | proc icepick_c_tapenable {jrc port} { 6 | 7 | # NOTE: it's important not to enter RUN/IDLE state until 8 | # done sending these instructions and data to the ICEpick. 9 | # And never to enter RESET, which will disable the TAPs. 10 | 11 | # select router 12 | irscan $jrc 7 -endstate IRPAUSE 13 | drscan $jrc 8 0x89 -endstate DRPAUSE 14 | 15 | # set ip control 16 | irscan $jrc 2 -endstate IRPAUSE 17 | drscan $jrc 32 [expr 0xa0002108 + ($port << 24)] -endstate DRPAUSE 18 | 19 | irscan $jrc 0x3F -endstate RUN/IDLE 20 | runtest 10 21 | } 22 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/eclipse_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 sw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/eclipse_rom.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | monitor reset 3 | monitor sleep 500 4 | monitor poll 5 | monitor soft_reset_halt 6 | monitor arm7_9 force_hw_bkpts enable 7 | 8 | # WDT_MR, disable watchdog 9 | monitor mww 0xFFFFFD44 0x00008000 10 | 11 | # RSTC_MR, enable user reset 12 | monitor mww 0xfffffd08 0xa5000001 13 | 14 | # CKGR_MOR 15 | monitor mww 0xFFFFFC20 0x00000601 16 | monitor sleep 10 17 | 18 | # CKGR_PLLR 19 | monitor mww 0xFFFFFC2C 0x00481c0e 20 | monitor sleep 10 21 | 22 | # PMC_MCKR 23 | monitor mww 0xFFFFFC30 0x00000007 24 | monitor sleep 10 25 | 26 | # PMC_IER 27 | monitor mww 0xFFFFFF60 0x00480100 28 | monitor sleep 100 29 | 30 | load 31 | break main 32 | continue 33 | -------------------------------------------------------------------------------- /tcl/mem_helper.tcl: -------------------------------------------------------------------------------- 1 | # Helper for common memory read/modify/write procedures 2 | 3 | # mrw: "memory read word", returns value of $reg 4 | proc mrw {reg} { 5 | set value "" 6 | mem2array value 32 $reg 1 7 | return $value(0) 8 | } 9 | 10 | add_usage_text mrw "address" 11 | add_help_text mrw "Returns value of word in memory." 12 | 13 | # mmw: "memory modify word", updates value of $reg 14 | # $reg <== ((value & ~$clearbits) | $setbits) 15 | proc mmw {reg setbits clearbits} { 16 | set old [mrw $reg] 17 | set new [expr ($old & ~$clearbits) | $setbits] 18 | mww $reg $new 19 | } 20 | 21 | add_usage_text mmw "address setbits clearbits" 22 | add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;" 23 | -------------------------------------------------------------------------------- /tcl/target/at32ap7000.cfg: -------------------------------------------------------------------------------- 1 | # Atmel AT32AP7000 2 | # 3 | # This is the only core in the now-inactive high end AVR32 product line, 4 | # with MMU, Java Acceleration, and "pixel coprocessor". The AP7 line 5 | # is for "Application Processors" (AP) with 7-stage pipelines. 6 | # 7 | # Most current AVR32 parts are in the UC3 flash based microcontroller (UC) 8 | # product line with 3-stage pipelines and without those extras. 9 | # 10 | # All AVR32 parts provide the Nexus Class 3 on-chip debug interfaces 11 | # through their JTAG interfaces. 12 | 13 | jtag newtap ap7 nexus -irlen 5 -expected-id 0x21e8203f 14 | 15 | # REVISIT declare an avr32 target ... needs OpenOCD infrastructure 16 | # for both Nexus (generic) and AVR32 (Atmel-specific). 17 | -------------------------------------------------------------------------------- /src/flash/nor/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | noinst_LTLIBRARIES = libocdflashnor.la 4 | libocdflashnor_la_SOURCES = \ 5 | core.c \ 6 | tcl.c \ 7 | $(NOR_DRIVERS) \ 8 | drivers.c 9 | 10 | NOR_DRIVERS = \ 11 | aduc702x.c \ 12 | at91sam3.c \ 13 | at91sam7.c \ 14 | avrf.c \ 15 | cfi.c \ 16 | ecos.c \ 17 | faux.c \ 18 | lpc2000.c \ 19 | lpc288x.c \ 20 | lpc2900.c \ 21 | non_cfi.c \ 22 | ocl.c \ 23 | pic32mx.c \ 24 | stmsmi.c \ 25 | stellaris.c \ 26 | stm32x.c \ 27 | str7x.c \ 28 | str9x.c \ 29 | str9xpec.c \ 30 | tms470.c \ 31 | virtual.c 32 | 33 | noinst_HEADERS = \ 34 | core.h \ 35 | cfi.h \ 36 | driver.h \ 37 | imp.h \ 38 | non_cfi.h \ 39 | ocl.h 40 | 41 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 42 | -------------------------------------------------------------------------------- /tcl/board/am3517evm.cfg: -------------------------------------------------------------------------------- 1 | # DANGER!!!! early work in progress for this PCB/target. 2 | # 3 | # The most basic operations work well enough that it is 4 | # useful to have this in the repository for cooperation 5 | # alpha testing purposes. 6 | # 7 | # TI AM3517 8 | # 9 | # http://focus.ti.com/docs/prod/folders/print/am3517.html 10 | # http://processors.wiki.ti.com/index.php/Debug_Access_Port_(DAP) 11 | # http://processors.wiki.ti.com/index.php?title=How_to_Find_the_Silicon_Revision_of_your_OMAP35x 12 | 13 | set CHIPTYPE "am35x" 14 | source [find target/amdm37x.cfg] 15 | 16 | # The TI-14 JTAG connector does not have srst. CPU reset is handled in 17 | # hardware. 18 | reset_config trst_only 19 | 20 | # "amdm37x_dbginit am35x.cpu" needs to be run after init. 21 | 22 | -------------------------------------------------------------------------------- /testing/examples/STR710JtagSpeed/prj/eclipse_ft2232_ram.gdb: -------------------------------------------------------------------------------- 1 | target remote localhost:3333 2 | 3 | monitor reset 4 | monitor sleep 500 5 | monitor poll 6 | monitor soft_reset_halt 7 | monitor arm7_9 sw_bkpts enable 8 | monitor mww 0xA0000050 0x01c2 9 | monitor mdw 0xA0000050 10 | monitor mww 0x6C000004 0x8005 11 | monitor mdw 0x6C000004 12 | monitor mww 0xE0005000 0xFFFF 13 | monitor mww 0xE0005004 0x00FF 14 | monitor mww 0xE0005008 0xFFFF 15 | monitor mdw 0xE0005000 16 | monitor mdw 0xE0005004 17 | monitor mdw 0xE0005008 18 | monitor mww 0xE000500C 0x0000 19 | 20 | monitor arm7_9 fast_memory_access enable 21 | monitor arm7_9 dcc_downloads enable 22 | monitor verify_ircapture disable 23 | 24 | load 25 | break main 26 | continue 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/gdbinit-imx27ads: -------------------------------------------------------------------------------- 1 | echo Script to load ledtest on iMX27ADS.\n 2 | 3 | # Note: you need to startup openocd with "-f board/imx27ads.cfg" 4 | # in order to it initialize RAM memory. 5 | 6 | # SETUP GDB : 7 | # 8 | # Common gdb setup for ARM CPUs 9 | set complaints 1 10 | set output-radix 10 11 | set input-radix 10 12 | set prompt (arm-gdb) 13 | set endian little 14 | dir . 15 | 16 | # CONNECT TO TARGET : 17 | target remote 127.0.0.1:3333 18 | 19 | # LOAD IMAGE : 20 | # 21 | 22 | # Load the program executable called "u-boot" 23 | load test.elf 24 | 25 | # Load the symbols for the program. 26 | symbol-file test.elf 27 | 28 | # RUN TO MAIN : 29 | # 30 | # Set a breakpoint at main(). 31 | #b reset 32 | b main 33 | 34 | # Run to the breakpoint. 35 | c 36 | 37 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/gdbinit-imx31pdk: -------------------------------------------------------------------------------- 1 | echo Script to load ledtest on iMX31PDK.\n 2 | 3 | # Note: you need to startup openocd with "-f board/imx31pdk.cfg" 4 | # in order to it initialize RAM memory. 5 | 6 | # SETUP GDB : 7 | # 8 | # Common gdb setup for ARM CPUs 9 | set complaints 1 10 | set output-radix 10 11 | set input-radix 10 12 | set prompt (arm-gdb) 13 | set endian little 14 | dir . 15 | 16 | # CONNECT TO TARGET : 17 | target remote 127.0.0.1:3333 18 | 19 | # LOAD IMAGE : 20 | # 21 | 22 | # Load the program executable called "u-boot" 23 | load test.elf 24 | 25 | # Load the symbols for the program. 26 | symbol-file test.elf 27 | 28 | # RUN TO MAIN : 29 | # 30 | # Set a breakpoint at main(). 31 | #b reset 32 | b main 33 | 34 | # Run to the breakpoint. 35 | c 36 | 37 | -------------------------------------------------------------------------------- /src/flash/nand/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | noinst_LTLIBRARIES = libocdflashnand.la 4 | 5 | libocdflashnand_la_SOURCES = \ 6 | ecc.c \ 7 | ecc_kw.c \ 8 | core.c \ 9 | fileio.c \ 10 | tcl.c \ 11 | arm_io.c \ 12 | $(NAND_DRIVERS) \ 13 | driver.c 14 | 15 | NAND_DRIVERS = \ 16 | nonce.c \ 17 | davinci.c \ 18 | lpc3180.c \ 19 | mx2.c \ 20 | mx3.c \ 21 | orion.c \ 22 | s3c24xx.c \ 23 | s3c2410.c \ 24 | s3c2412.c \ 25 | s3c2440.c \ 26 | s3c2443.c \ 27 | s3c6400.c \ 28 | at91sam9.c \ 29 | nuc910.c 30 | 31 | noinst_HEADERS = \ 32 | arm_io.h \ 33 | core.h \ 34 | driver.h \ 35 | fileio.h \ 36 | imp.h \ 37 | lpc3180.h \ 38 | mx2.h \ 39 | mx3.h \ 40 | s3c24xx.h \ 41 | s3c24xx_regs.h \ 42 | nuc910.h 43 | 44 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 45 | -------------------------------------------------------------------------------- /tcl/board/ek-lm3s1968.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # TI/Luminary Stellaris LM3S1968 Evaluation Kits 3 | # 4 | # http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html 5 | 6 | # NOTE: to use J-Link instead of the on-board interface, 7 | # you may also need to reduce adapter_khz to be about 1200. 8 | # source [find interface/jlink.cfg] 9 | 10 | # include the FT2232 interface config for on-board JTAG interface 11 | # NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional! 12 | # so is using in JTAG mode, as done here. 13 | source [find interface/luminary.cfg] 14 | 15 | # include the target config 16 | set CHIPNAME lm3s1968 17 | source [find target/stellaris.cfg] 18 | 19 | # jtag speed 20 | adapter_khz 3000 21 | 22 | adapter_nsrst_delay 100 23 | 24 | #LM3S1968 Evaluation Board has only srst 25 | reset_config srst_only 26 | -------------------------------------------------------------------------------- /tcl/target/feroceon.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Marvell Feroceon CPU core 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME feroceon 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x20a023d3 21 | } 22 | 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME 27 | 28 | reset_config trst_and_srst 29 | adapter_nsrst_delay 200 30 | jtag_ntrst_delay 200 31 | 32 | -------------------------------------------------------------------------------- /tcl/target/dragonite.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Marvell Dragonite CPU core 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME dragonite 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x121003d3 21 | } 22 | 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME 27 | 28 | reset_config trst_and_srst 29 | adapter_nsrst_delay 200 30 | jtag_ntrst_delay 200 31 | 32 | -------------------------------------------------------------------------------- /tcl/target/faux.cfg: -------------------------------------------------------------------------------- 1 | #Script for faux target - used for testing 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME at91eb40a 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID ] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x00000000 19 | } 20 | 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | #target configuration 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 27 | 28 | #dummy flash driver 29 | set _FLASHNAME $_CHIPNAME.flash 30 | flash bank $_FLASHNAME faux 0x01000000 0x200000 2 2 $_TARGETNAME 31 | -------------------------------------------------------------------------------- /tcl/target/netx500.cfg: -------------------------------------------------------------------------------- 1 | #Hilscher netX 500 CPU 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME netx500 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID ] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | set _CPUTAPID 0x07926021 19 | } 20 | 21 | # FIXME most reset config belongs in board code 22 | reset_config trst_and_srst 23 | adapter_nsrst_delay 100 24 | jtag_ntrst_delay 100 25 | 26 | # jtag scan chain 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 28 | 29 | # that TAP is associated with a target 30 | set _TARGETNAME $_CHIPNAME.cpu 31 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 32 | 33 | -------------------------------------------------------------------------------- /tools/uncrustify1.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | # Run the beautifier "Uncrustify" on a single file. 3 | # Because the file "uncrustify.cfg" only exists in the top level of the project 4 | # you should run this script from there so this script can find your uncrustify.cfg file. 5 | 6 | 7 | UNCRUSTIFYTMP=/tmp/uncrustify.tmp 8 | 9 | 10 | if [ ! -f uncrustify.cfg ]; then 11 | echo "unable to find uncrustify.cfg, aborting" 12 | exit 1 13 | fi 14 | 15 | UNCRUSTIFYBIN=`which uncrustify` 16 | 17 | if [ "$UNCRUSTIFYBIN" = "" ]; then 18 | echo "you must specify uncrustify in your PATH, I cannot find it" 19 | exit 2 20 | fi 21 | 22 | if [ $# -lt 1 ]; then 23 | echo "Usage $0 " 24 | exit 3 25 | fi 26 | 27 | uncrustify -c uncrustify.cfg <$1 >$UNCRUSTIFYTMP 28 | 29 | # you can comment this out while tuning the uncrustify.cfg file: 30 | mv $UNCRUSTIFYTMP $1 31 | -------------------------------------------------------------------------------- /tcl/target/ixp42x.cfg: -------------------------------------------------------------------------------- 1 | #xscale ixp42x CPU 2 | 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME ixp42x 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | # this defaults to a bigendian 14 | set _ENDIAN big 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # force an error till we get a good number 21 | set _CPUTAPID 0xffffffff 22 | } 23 | 24 | #use combined on interfaces or targets that can?t set TRST/SRST separately 25 | reset_config srst_only srst_pulls_trst 26 | #jtag scan chain 27 | 28 | jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID 29 | 30 | set _TARGETNAME $_CHIPNAME.cpu 31 | target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x 32 | 33 | -------------------------------------------------------------------------------- /tcl/target/smp8634.cfg: -------------------------------------------------------------------------------- 1 | # script for Sigma Designs SMP8634 (eventually even SMP8635) 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME smp8634 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID ] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # force an error till we get a good number 19 | set _CPUTAPID 0x08630001 20 | } 21 | 22 | adapter_nsrst_delay 100 23 | jtag_ntrst_delay 100 24 | 25 | reset_config trst_and_srst separate 26 | 27 | # jtag scan chain 28 | # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 29 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 30 | 31 | set _TARGETNAME $_CHIPNAME.cpu 32 | target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant 33 | -------------------------------------------------------------------------------- /testing/build.test1/README.TXT: -------------------------------------------------------------------------------- 1 | -- Duane Ellis'es test case for building numerous openocd configurations... 2 | Dec 26,2008 3 | --------------------------------------------------------------------------- 4 | 5 | 1) Make a directory some where.. 6 | 7 | mkdir ~/test 8 | 9 | 2) Change to that directory 10 | 11 | cd ~/test 12 | 13 | 3) Checkout OpenOCD in that directory. 14 | 15 | cd ~/test 16 | svn co https://svn.berlios.de/svnroot/repos/openocd/trunk openocd 17 | 18 | 4) Copy the "build.test1" directory to the "~/work" directory. 19 | 20 | 21 | cd ~/test 22 | cp ~/openocd/testing/build.test1/. ~/test/. 23 | 24 | 5) If needed, download various components. 25 | 26 | cd ~/work 27 | make all.download 28 | 29 | 30 | 6) For Linux - type: 31 | 32 | cd ~/work 33 | make linux.buildtest 34 | 35 | 7) For Cygwin - type: 36 | 37 | cd ~/work 38 | make cygwin.buildtest 39 | 40 | -------------------------------------------------------------------------------- /tcl/target/at91r40008.cfg: -------------------------------------------------------------------------------- 1 | # AT91R40008 target configuration file 2 | 3 | # TRST is tied to SRST on the AT91X40 family. 4 | reset_config srst_only srst_pulls_trst 5 | 6 | 7 | if {[info exists CHIPNAME]} { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME at91r40008 11 | } 12 | 13 | if { [info exists ENDIAN] } { 14 | set _ENDIAN $ENDIAN 15 | } else { 16 | set _ENDIAN little 17 | } 18 | 19 | # Setup the JTAG scan chain. 20 | if { [info exists CPUTAPID ] } { 21 | set _CPUTAPID $CPUTAPID 22 | } else { 23 | set _CPUTAPID 0x1f0f0f0f 24 | } 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | set _TARGETNAME $_CHIPNAME.cpu 28 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi 29 | $_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0 30 | -------------------------------------------------------------------------------- /tcl/interface/luminary-icdi.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris LM3S9B9x Evaluation Kits 3 | # In-Circuit Debug Interface (ICDI) Board 4 | # 5 | # Essentially all Luminary debug hardware is the same, (with both 6 | # JTAG and SWD support compatible with ICDI boards. This ICDI adapter 7 | # configuration is JTAG-only, but the same hardware handles SWD too. 8 | # 9 | # This is a discrete FT2232 based debug board which supports ARM's 10 | # JTAG/SWD connectors in both backwards-compatible 20-pin format and 11 | # in the new-style compact 10-pin. There's also an 8-pin connector 12 | # with serial port support. It's included with LM3S9B9x eval boards. 13 | # 14 | # http://www.luminarymicro.com/products/ek-lm3s9b90.html 15 | # http://www.luminarymicro.com/products/ek-lm3s9b92.html 16 | # 17 | 18 | interface ft2232 19 | ft2232_device_desc "Luminary Micro ICDI Board" 20 | ft2232_layout luminary_icdi 21 | ft2232_vid_pid 0x0403 0xbcda 22 | -------------------------------------------------------------------------------- /testing/build.test1/mingw32_help/include/elf.h: -------------------------------------------------------------------------------- 1 | /* elf.h 2 | 3 | Copyright 2005 Red Hat, Inc. 4 | 5 | This file is part of Cygwin. 6 | 7 | This software is a copyrighted work licensed under the terms of the 8 | Cygwin license. Please consult the file "CYGWIN_LICENSE" for 9 | details. */ 10 | 11 | #ifndef _ELF_H_ 12 | #define _ELF_H_ 13 | 14 | #include 15 | 16 | typedef signed char int8_t; 17 | typedef unsigned char u_int8_t; 18 | typedef short int16_t; 19 | typedef unsigned short u_int16_t; 20 | typedef int int32_t; 21 | typedef unsigned int u_int32_t; 22 | typedef long long int64_t; 23 | typedef unsigned long long u_int64_t; 24 | typedef int32_t register_t; 25 | 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | #include 31 | #include 32 | #include 33 | #include 34 | #ifdef __cplusplus 35 | } 36 | #endif 37 | 38 | #endif /*_ELF_H_*/ 39 | -------------------------------------------------------------------------------- /tcl/target/imx21.cfg: -------------------------------------------------------------------------------- 1 | #use combined on interfaces or targets that can't set TRST/SRST separately 2 | # 3 | # Hmmm.... should srst_pulls_trst be used here like i.MX27??? 4 | reset_config trst_and_srst 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME imx21 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | set _ENDIAN little 16 | } 17 | 18 | 19 | # Note above there is 1 tap 20 | 21 | # The CPU tap 22 | if { [info exists CPUTAPID ] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x0792611f 26 | } 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 28 | 29 | 30 | # Create the GDB Target. 31 | set _TARGETNAME $_CHIPNAME.cpu 32 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 33 | 34 | arm7_9 dcc_downloads enable 35 | -------------------------------------------------------------------------------- /config_subdir.m4: -------------------------------------------------------------------------------- 1 | dnl 2 | dnl If needed, define the m4_ifblank and m4_ifnblank macros from autoconf 2.64 3 | dnl This allows us to run with earlier Autoconfs as well. 4 | ifdef([m4_ifblank],[],[ 5 | m4_define([m4_ifblank], 6 | [m4_if(m4_translit([[$1]], [ ][ ][ 7 | ]), [], [$2], [$3])])]) 8 | dnl 9 | ifdef([m4_ifnblank],[],[ 10 | m4_define([m4_ifnblank], 11 | [m4_if(m4_translit([[$1]], [ ][ ][ 12 | ]), [], [$3], [$2])])]) 13 | dnl 14 | 15 | dnl AC_CONFIG_SUBDIRS does not allow configure options to be passed 16 | dnl to subdirs, this function allows that by creating a configure.gnu 17 | dnl script that prepends configure options and then calls the real 18 | dnl configure script 19 | AC_DEFUN([AX_CONFIG_SUBDIR_OPTION], 20 | [ 21 | AC_CONFIG_SUBDIRS([$1]) 22 | 23 | m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu], 24 | [printf "#!/bin/sh 25 | "\$"SHELL "../$srcdir/$1/configure" $2 \""\$"@"\" > "$srcdir/$1/configure.gnu" 26 | ]) 27 | ]) 28 | -------------------------------------------------------------------------------- /tcl/target/imx.cfg: -------------------------------------------------------------------------------- 1 | # utility fn's for Freescale i.MX series 2 | 3 | global TARGETNAME 4 | set TARGETNAME $_TARGETNAME 5 | 6 | # rewrite commands of the form below to arm11 mcr... 7 | # Data.Set c15:0x042f %long 0x40000015 8 | proc setc15 {regs value} { 9 | global TARGETNAME 10 | 11 | echo [format "set p15 0x%04x, 0x%08x" $regs $value] 12 | 13 | arm mcr 15 [expr ($regs>>12)&0x7] [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] [expr ($regs>>8)&0x7] $value 14 | } 15 | 16 | 17 | proc imx3x_reset {} { 18 | # this reset script comes from the Freescale PDK 19 | # 20 | # http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX35PDK 21 | 22 | echo "Target Setup: initialize DRAM controller and peripherals" 23 | 24 | # Data.Set c15:0x01 %long 0x00050078 25 | setc15 0x01 0x00050078 26 | 27 | echo "configuring CP15 for enabling the peripheral bus" 28 | # Data.Set c15:0x042f %long 0x40000015 29 | setc15 0x042f 0x40000015 30 | } 31 | -------------------------------------------------------------------------------- /doc/manual/flash.txt: -------------------------------------------------------------------------------- 1 | /** @page flashdocs OpenOCD Flash APIs 2 | 3 | OpenOCD provides its Flash APIs for developers to support different 4 | types of flash devices, some of which are built-in to target devices 5 | while others may be connected via standard memory interface (e.g. CFI, 6 | FMI, etc.). 7 | 8 | The Flash module provides the following APIs: 9 | 10 | - @subpage flashcfi 11 | - @subpage flashnand 12 | - @subpage flashtarget 13 | 14 | This section needs to be expanded. 15 | 16 | */ 17 | 18 | 19 | /** @page flashcfi OpenOCD CFI Flash API 20 | 21 | This section needs to be expanded to describe OpenOCD's CFI Flash API. 22 | 23 | */ 24 | 25 | /** @page flashnand OpenOCD NAND Flash API 26 | 27 | This section needs to be expanded to describe OpenOCD's NAND Flash API. 28 | 29 | */ 30 | 31 | /** @page flashtarget OpenOCD Target Flash API 32 | 33 | This section needs to be expanded to describe OpenOCD's Target Flash API. 34 | 35 | */ 36 | -------------------------------------------------------------------------------- /src/target/xscale/debug_handler.cmd: -------------------------------------------------------------------------------- 1 | /* identify the Entry Point */ 2 | ENTRY(reset_handler) 3 | 4 | /* specify the mini-ICache memory areas */ 5 | MEMORY 6 | { 7 | mini_icache_0 (x) : ORIGIN = 0x0, LENGTH = 1024 /* first part of mini icache (sets 0-31) */ 8 | mini_icache_1 (x) : ORIGIN = 0x400, LENGTH = 1024 /* second part of mini icache (sets 0-31) */ 9 | } 10 | 11 | /* now define the output sections */ 12 | SECTIONS 13 | { 14 | .part1 : 15 | { 16 | LONG(0) 17 | LONG(0) 18 | LONG(0) 19 | LONG(0) 20 | LONG(0) 21 | LONG(0) 22 | LONG(0) 23 | LONG(0) 24 | *(.part1) 25 | } >mini_icache_0 26 | 27 | .part2 : 28 | { 29 | LONG(0) 30 | LONG(0) 31 | LONG(0) 32 | LONG(0) 33 | LONG(0) 34 | LONG(0) 35 | LONG(0) 36 | LONG(0) 37 | *(.part2) 38 | FILL(0x0) 39 | } >mini_icache_1 40 | 41 | /DISCARD/ : 42 | { 43 | *(.text) 44 | *(.glue_7) 45 | *(.glue_7t) 46 | *(.data) 47 | *(.bss) 48 | } 49 | } 50 | -------------------------------------------------------------------------------- /tcl/target/cs351x.cfg: -------------------------------------------------------------------------------- 1 | if { [info exists CHIPNAME] } { 2 | set _CHIPNAME $CHIPNAME 3 | } else { 4 | set _CHIPNAME cs351x 5 | } 6 | 7 | if { [info exists ENDIAN] } { 8 | set _ENDIAN $ENDIAN 9 | } else { 10 | set _ENDIAN little 11 | } 12 | 13 | if { [info exists CPUTAPID ] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x00526fa1 17 | } 18 | 19 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 20 | 21 | # Create the GDB Target. 22 | set _TARGETNAME $_CHIPNAME.cpu 23 | target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526 24 | 25 | # There is 16K of SRAM on this chip 26 | # FIXME: flash programming is not working by using this work area. So comment this out for now. 27 | #$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1 28 | 29 | # This chip has a DCC ... use it 30 | arm7_9 dcc_downloads enable 31 | 32 | -------------------------------------------------------------------------------- /tcl/target/dsp56321.cfg: -------------------------------------------------------------------------------- 1 | # Script for freescale DSP56321 2 | # 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME dsp56321 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | # this defaults to a big endian 14 | set _ENDIAN big 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # force an error till we get a good number 21 | set _CPUTAPID 0x1181501d 22 | } 23 | 24 | #jtag speed 25 | adapter_khz 4500 26 | 27 | #has only srst 28 | reset_config srst_only 29 | 30 | #jtag scan chain 31 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0x1 -expected-id $_CPUTAPID 32 | 33 | #target configuration 34 | set _TARGETNAME $_CHIPNAME.cpu 35 | target create $_TARGETNAME dsp563xx -endian $_ENDIAN -chain-position $_TARGETNAME 36 | 37 | #working area at base of ram 38 | $_TARGETNAME configure -work-area-virt 0 39 | -------------------------------------------------------------------------------- /tcl/test/syntax1.cfg: -------------------------------------------------------------------------------- 1 | adapter_nsrst_delay 200 2 | jtag_ntrst_delay 200 3 | 4 | #use combined on interfaces or targets that can't set TRST/SRST separately 5 | reset_config trst_and_srst srst_pulls_trst 6 | 7 | #LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough 8 | jtag_reset 1 1 9 | jtag_reset 0 0 10 | 11 | #jtag scan chain 12 | #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) 13 | jtag newtap lpc2148 one -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4f1f0f0f 14 | 15 | #target configuration 16 | #daemon_startup reset 17 | 18 | set _TARGETNAME [format "%s.cpu" lpc2148] 19 | target create lpc2148.cpu arm7tdmi -endian little -work-area-size 0x4000 -work-area-phys 0x40000000 -work-area-backup 0 20 | 21 | $_TARGETNAME configure -event reset-init { 22 | soft_reset_halt 23 | mvb 0xE01FC040 0x01 24 | } 25 | 26 | 27 | 28 | set _FLASHNAME $_CHIPNAME.flash 29 | flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 30 | 31 | -------------------------------------------------------------------------------- /tcl/board/x300t.cfg: -------------------------------------------------------------------------------- 1 | # This is for the T-Home X300T / X301T IPTV box, 2 | # which are based on IPTV reference designs from Kiss/Cisco KMM-3*** 3 | # 4 | # It has Sigma Designs SMP8634 chip. 5 | source [find target/smp8634.cfg] 6 | 7 | $_TARGETNAME configure -event reset-init { x300t_init } 8 | 9 | # 1MB CFI capable flash 10 | # flash bank 11 | set _FLASHNAME $_CHIPNAME.flash 12 | flash bank $_FLASHNAME cfi 0xac000000 0x100000 2 2 $_TARGETNAME 13 | 14 | proc x300t_init { } { 15 | # Setup SDRAM config and flash mapping 16 | # initialize ram 17 | mww 0xa003fffc 3 18 | mww 0xa003fffc 2 19 | mww 0xa0030000 0xE34111BA 20 | mww 0xa003fffc 0xa4444 21 | mww 0xa003fffc 0 22 | 23 | # remap boot vector in CPU local RAM 24 | mww 0xa006f000 0x60000 25 | 26 | # map flash to CPU address space REG_BASE_cpu_block+CPU_remap4 27 | mww 0x0006f010 0x48000000 28 | 29 | # map flash addr to REG_BASE_cpu_block + LR_XENV_LOCATION (normally done by XOS) 30 | mww 0x00061ff0 0x48000000 31 | } 32 | -------------------------------------------------------------------------------- /tcl/target/mega128.cfg: -------------------------------------------------------------------------------- 1 | # for avr 2 | 3 | set _CHIPNAME avr 4 | set _ENDIAN little 5 | 6 | # jtag speed 7 | adapter_khz 4500 8 | 9 | reset_config srst_only 10 | adapter_nsrst_delay 100 11 | 12 | #jtag scan chain 13 | if { [info exists CPUTAPID ] } { 14 | set _CPUTAPID $CPUTAPID 15 | } else { 16 | set _CPUTAPID 0x8970203F 17 | } 18 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 19 | 20 | set _TARGETNAME $_CHIPNAME.cpu 21 | target create $_TARGETNAME avr -endian $_ENDIAN -chain-position $_TARGETNAME 22 | 23 | #$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 24 | 25 | set _FLASHNAME $_CHIPNAME.flash 26 | flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME 27 | 28 | #to use it, script will be like: 29 | #init 30 | #adapter_khz 4500 31 | #reset init 32 | #verify_ircapture disable 33 | # 34 | #halt 35 | #wait halt 36 | #poll 37 | #avr mass_erase 0 38 | #flash write_image E:/Versaloon/Software/CAMERAPROTOCOLAGENT.hex 39 | #reset run 40 | #shutdown 41 | -------------------------------------------------------------------------------- /tcl/target/swj-dp.tcl: -------------------------------------------------------------------------------- 1 | # ARM Debug Interface V5 (ADI_V5) utility 2 | # ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since 3 | # SW-DP and JTAG-DP targets don't need to switch based 4 | # on which transport is active. 5 | # 6 | # declare a JTAG or SWD Debug Access Point (DAP) 7 | # based on the transport in use with this session. 8 | # You can't access JTAG ops when SWD is active, etc. 9 | 10 | # params are currently what "jtag newtap" uses 11 | # because OpenOCD internals are still strongly biased 12 | # to JTAG .... but for SWD, "irlen" etc are ignored, 13 | # and the internals work differently 14 | 15 | # for now, ignore non-JTAG and non-SWD transports 16 | # (e.g. initial flash programming via SPI or UART) 17 | 18 | # split out "chip" and "tag" so we can someday handle 19 | # them more uniformly irlen too...) 20 | 21 | proc swj_newdap {chip tag args} { 22 | set tran [transport select] 23 | if [string equal $tran "jtag"] { eval jtag newtap $chip $tag $args} 24 | if [string equal $tran "swd"] { eval swd newdap $chip $tag $args } 25 | } 26 | -------------------------------------------------------------------------------- /tcl/target/lpc2129.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2129 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lpc2129 7 | } 8 | 9 | if { [info exists CPUTAPID ] } { 10 | set _CPUTAPID $CPUTAPID 11 | } else { 12 | set _CPUTAPID 0xcf1f0f0f 13 | } 14 | 15 | #use combined on interfaces or targets that can't set TRST/SRST separately 16 | reset_config trst_and_srst srst_pulls_trst 17 | 18 | # reset delays 19 | adapter_nsrst_delay 100 20 | jtag_ntrst_delay 100 21 | 22 | #jtag scan chain 23 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME 27 | 28 | $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 29 | 30 | # flash bank lpc2000 0 0 [calc checksum] 31 | set _FLASHNAME $_CHIPNAME.flash 32 | flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum 33 | -------------------------------------------------------------------------------- /testing/results/template.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | Testcases 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
TestInterfaceTargetResult
CON001 FILL IN! FILL IN!PASS/FAIL
CON002 FILL IN! FILL IN!PASS/FAIL
RES001 FILL IN! FILL IN!PASS/FAIL
RES002 FILL IN! FILL IN!PASS/FAIL
RES003 FILL IN! FILL IN!PASS/FAIL
DBG001 FILL IN! FILL IN!PASS/FAIL
16 | 17 | 18 | -------------------------------------------------------------------------------- /tcl/target/epc9301.cfg: -------------------------------------------------------------------------------- 1 | # Cirrus Logic EP9301 processor on an Olimex CS-E9301 board. 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME ep9301 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | if { [info exists CPUTAPID ] } { 16 | set _CPUTAPID $CPUTAPID 17 | } else { 18 | # force an error till we get a good number 19 | set _CPUTAPID 0xffffffff 20 | } 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | adapter_nsrst_delay 100 24 | jtag_ntrst_delay 100 25 | 26 | set _TARGETNAME $_CHIPNAME.cpu 27 | target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -work-area-phys 0x80014000 -work-area-size 0x1000 -work-area-backup 1 28 | 29 | #flash configuration 30 | #flash bank [driver_options ...] 31 | set _FLASHNAME $_CHIPNAME.flash 32 | flash bank $_FLASHNAME cfi 0x60000000 0x1000000 2 2 $_TARGETNAME 33 | -------------------------------------------------------------------------------- /tcl/target/lpc3250.cfg: -------------------------------------------------------------------------------- 1 | # lpc3250 config 2 | # 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME lpc3250 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | set _ENDIAN little 14 | } 15 | 16 | if { [info exists CPUTAPID ] } { 17 | set _CPUTAPID $CPUTAPID 18 | } else { 19 | set _CPUTAPID 0x17900f0f 20 | } 21 | 22 | if { [info exists SJCTAPID ] } { 23 | set _SJCTAPID $SJCTAPID 24 | } else { 25 | set _SJCTAPID 0x1b900f0f 26 | } 27 | 28 | jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_SJCTAPID 29 | 30 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 31 | 32 | set _TARGETNAME $_CHIPNAME.cpu 33 | target create $_TARGETNAME arm926ejs -endian little -chain-position $_TARGETNAME -work-area-phys 0x00000000 -work-area-size 0x7d0000 -work-area-backup 0 34 | 35 | proc power_restore {} { echo "Sensed power restore. No action." } 36 | proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." } 37 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 2 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 3 | :1000200040000000B0000000B4000000B800000074 4 | :10003000BC00000000000000C0000000C400000080 5 | :10004000DBF021E37CD09FE5D7F021E378D09FE57A 6 | :10005000D1F021E374D09FE5D2F021E370D09FE589 7 | :10006000D3F021E36CD09FE56C109FE56C209FE5F9 8 | :100070000030A0E3020051E104308114FCFFFF1ABC 9 | :1000800000000FE1C000C0E300F029E10000A0E3A0 10 | :100090000010A0E348209FE50FE0A0E112FF2FE150 11 | :1000A0000000A0E10000A0E10000A0E1FBFFFFEAEA 12 | :1000B000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEAA8 13 | :1000C000FEFFFFEAFEFFFFEA000600000005000059 14 | :1000D0000003000000040000000A00004C010000C2 15 | :1000E0004C010000E80000000CD04DE20130A0E31C 16 | :1000F00000308DE50230A0E304308DE50030A0E350 17 | :1001000008308DE538309FE5002093E500309DE50F 18 | :10011000023083E000308DE500309DE5013083E260 19 | :1001200000308DE504309DE5013083E204308DE53B 20 | :1001300000209DE504309DE5033082E008308DE528 21 | :0C014000F4FFFFEA480100000700000087 22 | :0400000300000040B9 23 | :00000001FF 24 | -------------------------------------------------------------------------------- /tcl/target/lpc2294.cfg: -------------------------------------------------------------------------------- 1 | if { [info exists CHIPNAME] } { 2 | set _CHIPNAME $CHIPNAME 3 | } else { 4 | set _CHIPNAME lpc2294 5 | } 6 | 7 | if { [info exists CPUTAPID ] } { 8 | set _CPUTAPID $CPUTAPID 9 | } else { 10 | # force an error till we get a good number 11 | set _CPUTAPID 0xffffffff 12 | } 13 | 14 | adapter_nsrst_delay 200 15 | jtag_ntrst_delay 200 16 | 17 | #use combined on interfaces or targets that can't set TRST/SRST separately 18 | reset_config trst_and_srst srst_pulls_trst 19 | 20 | #jtag scan chain 21 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 22 | 23 | set _TARGETNAME $_CHIPNAME.cpu 24 | target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME 25 | $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 26 | 27 | #flash configuration 28 | # flash bank lpc2000 0 0 [calc checksum] 29 | set _FLASHNAME $_CHIPNAME.flash 30 | flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum 31 | -------------------------------------------------------------------------------- /tcl/target/samsung_s3c2410.cfg: -------------------------------------------------------------------------------- 1 | # Found on the 'TinCanTools' Hammer board. 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME s3c2410 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | # This config file was defaulting to big endian.. 13 | set _ENDIAN little 14 | } 15 | 16 | if { [info exists CPUTAPID] } { 17 | set _CPUTAPID $CPUTAPID 18 | } else { 19 | set _CPUTAPID 0xffffffff 20 | } 21 | 22 | #use combined on interfaces or targets that cannot set TRST/SRST separately 23 | reset_config trst_and_srst 24 | 25 | #jtag scan chain 26 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 27 | 28 | set _TARGETNAME $_CHIPNAME.cpu 29 | target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t 30 | 31 | $_TARGETNAME configure -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0 32 | 33 | # speed up memory downloads 34 | arm7_9 fast_memory_access enable 35 | arm7_9 dcc_downloads enable 36 | -------------------------------------------------------------------------------- /tcl/target/lpc2124.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2124 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lpc2124 7 | } 8 | 9 | if { [info exists CPUTAPID ] } { 10 | set _CPUTAPID $CPUTAPID 11 | } else { 12 | set _CPUTAPID 0x4f1f0f0f 13 | } 14 | 15 | #use combined on interfaces or targets that can't set TRST/SRST separately 16 | reset_config trst_and_srst srst_pulls_trst 17 | 18 | # reset delays 19 | adapter_nsrst_delay 100 20 | jtag_ntrst_delay 100 21 | 22 | adapter_khz 1000 23 | 24 | #jtag scan chain 25 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 26 | 27 | set _TARGETNAME $_CHIPNAME.cpu 28 | target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME 29 | 30 | $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 31 | 32 | # flash bank lpc2000 0 0 [calc checksum] 33 | set _FLASHNAME $_CHIPNAME.flash 34 | flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum 35 | -------------------------------------------------------------------------------- /contrib/loaders/README: -------------------------------------------------------------------------------- 1 | Included in these directories are the src to the various ram loaders used 2 | within openocd. 3 | 4 | ** target checksum loaders ** 5 | 6 | checksum/armv4_5_crc.s : 7 | - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code 8 | 9 | checksum/armv7m_crc.s : 10 | - ARMv7m checksum loader : see target/armv7m.c:cortex_m3_crc_code 11 | 12 | checksum/mips32.s : 13 | - MIPS32 checksum loader : see target/mips32.c:mips_crc_code 14 | 15 | ** target flash loaders ** 16 | 17 | flash/pic32mx.s : 18 | - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code 19 | 20 | flash/stellaris.s : 21 | - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code 22 | 23 | flash/stm32x.s : 24 | - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code 25 | 26 | flash/str7x.s : 27 | - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code 28 | 29 | flash/str9x.s : 30 | - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code 31 | 32 | Spencer Oliver 33 | spen@spen-soft.co.uk 34 | -------------------------------------------------------------------------------- /bootstrap: -------------------------------------------------------------------------------- 1 | #!/bin/sh -e 2 | # Run the autotools bootstrap sequence to create the configure script 3 | 4 | # Stop execution as soon as we have an unknown command 5 | set -e 6 | 7 | if libtoolize --version >/dev/null 2>&1; then 8 | libtoolize="libtoolize" 9 | elif glibtoolize --version >/dev/null 2>&1; then 10 | libtoolize="glibtoolize" 11 | else 12 | echo "libtool is required" >&2 13 | exit 1 14 | fi 15 | 16 | # bootstrap the autotools 17 | ( 18 | set -x 19 | aclocal 20 | ${libtoolize} --automake --copy 21 | autoconf 22 | autoheader 23 | automake --gnu --add-missing --copy 24 | ) 25 | 26 | # AM_MAINTAINER_MODE requires --enable-maintainer-mode from everyone using 27 | # current source snapshots (working from GIT, or some source snapshot, etc) 28 | # otherwise the documentation will fail to build due to missing version.texi 29 | echo "Bootstrap complete. Quick start build instructions:" 30 | echo "" 31 | echo "1. Fetch Jim Tcl" 32 | echo "" 33 | echo "git submodule init" 34 | echo "git submodule update" 35 | echo "" 36 | echo "2. Configure" 37 | echo "./configure --enable-maintainer-mode ...." 38 | -------------------------------------------------------------------------------- /tools/logger.pl: -------------------------------------------------------------------------------- 1 | #!/usr/bin/perl 2 | # logger.pl: masks long meaningless output with pretty lines of dots 3 | # Details: 1) reads lines from STDIN and echos them on STDOUT, 4 | # 2) print a '.' to STDERR every $N lines. 5 | # 3) print a newline after a sequence of $C dots 6 | 7 | use strict; 8 | use warnings; 9 | 10 | # make sure all output gets displayed immediately 11 | $| = 1; 12 | 13 | # TODO: add -n and -c options w/ zero checks) 14 | # line and column limits 15 | my $N = 10; 16 | my $C = 72; 17 | 18 | # current line and column counters 19 | my $n = 0; 20 | my $c = 0; 21 | 22 | # read all lines from STDIN 23 | while () 24 | { 25 | # echo line to output 26 | print STDOUT $_; 27 | # echo line to console if it is important 28 | if (/(Warning|Error)/) { 29 | print STDERR "\n" if $c; 30 | print STDERR $_; 31 | $c = 0; 32 | } 33 | # only display progress every Nth step 34 | next if ++$n % $N; 35 | print STDERR "."; 36 | # wrap at column C to provide fixed-width rows of dots 37 | print STDERR "\n" unless ++$c % $C; 38 | } 39 | 40 | print STDERR "\n" if $c; 41 | -------------------------------------------------------------------------------- /testing/examples/STR710JtagSpeed/prj/str710_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 0 16 | 17 | #use combined on interfaces or targets that can't set TRST/SRST separately 18 | reset_config trst_and_srst srst_pulls_trst 19 | 20 | #jtag scan chain 21 | jtag newtap str7 cpu -irlen 4 -irmask 0xf 22 | 23 | #target configuration 24 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi 25 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup false 26 | 27 | #flash bank str7x 0 0 28 | flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x 29 | 30 | # For more information about the configuration files, 31 | # look at the OpenOCD User's Guide. 32 | 33 | init 34 | reset halt 35 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/prj/lpc2148_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 3 16 | 17 | #use combined on interfaces or targets that can't set TRST/SRST separately 18 | reset_config trst_and_srst srst_pulls_trst 19 | 20 | #jtag scan chain 21 | jtag newtap lpc cpu -irlen 4 -irmask 0xf 22 | 23 | #target configuration 24 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4 25 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup false 26 | 27 | #flash bank lpc2000 0 0 28 | flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum 29 | 30 | # For more information about the configuration files, 31 | # look at the OpenOCD User's Guide. 32 | 33 | init 34 | reset halt 35 | -------------------------------------------------------------------------------- /tcl/target/lpc2103.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lpc2103 7 | } 8 | 9 | if { [info exists CPUTAPID ] } { 10 | set _CPUTAPID $CPUTAPID 11 | } else { 12 | set _CPUTAPID 0x4f1f0f0f 13 | } 14 | 15 | # LPC2000 -> SRST causes TRST 16 | reset_config trst_and_srst srst_pulls_trst 17 | 18 | # reset delays 19 | adapter_nsrst_delay 100 20 | jtag_ntrst_delay 100 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME 26 | 27 | # 8kB of internal SRAM 28 | $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0 29 | 30 | # 32kB of internal Flash, core clocked with 12MHz crystal 31 | # flash bank lpc2000 0 0 [calc checksum] 32 | set _FLASHNAME $_CHIPNAME.flash 33 | flash bank $_FLASHNAME lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum 34 | -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/prj/lpc2294_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 3 16 | 17 | #use combined on interfaces or targets that can't set TRST/SRST separately 18 | reset_config trst_and_srst srst_pulls_trst 19 | 20 | #jtag scan chain 21 | jtag newtap lpc cpu -irlen 4 -irmask 0xf 22 | 23 | #target configuration 24 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4 25 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup false 26 | 27 | #flash configuration 28 | #flash bank lpc2000 0 0 29 | flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14765 calc_checksum 30 | 31 | # For more information about the configuration files, 32 | # look at the OpenOCD User's Guide. 33 | 34 | init 35 | reset halt 36 | -------------------------------------------------------------------------------- /testing/examples/AT91R40008Test/prj/at91r40008_turtle.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | gdb_memory_map enable 7 | # enable flash programming 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A" 13 | ft2232_layout turtelizer2 14 | ft2232_vid_pid 0x0403 0xbdc8 15 | jtag_speed 0 16 | jtag_nsrst_delay 200 17 | jtag_ntrst_delay 200 18 | 19 | #use combined on interfaces or targets that can't set TRST/SRST separately 20 | reset_config srst_only srst_pulls_trst 21 | 22 | #jtag scan chain 23 | jtag newtap at91 cpu -irlen 4 -irmask 0xf 24 | 25 | #target configuration 26 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi 27 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup false 28 | 29 | target_script 0 reset .\prj\at91r40008_reset.script 30 | 31 | flash bank cfi 0x10000000 0x400000 2 2 0 32 | 33 | # For more information about the configuration files, 34 | # look at the OpenOCD User's Guide. 35 | 36 | init 37 | reset halt 38 | -------------------------------------------------------------------------------- /tcl/board/spear310evb20_mod.cfg: -------------------------------------------------------------------------------- 1 | # Configuration for the ST SPEAr310 Evaluation board 2 | # EVALSPEAr310 Rev. 2.0, modified to enable SRST on JTAG connector 3 | # http://www.st.com/spear 4 | # 5 | # List of board modifications to enable SRST, as per ST Application Note 6 | # (FIXME: put reference to AN) 7 | # - Modifications on the top layer: 8 | # 1. remove R137 and C57, located near the SMII PHY U18; 9 | # 2. remove R172 and C75, located near the SMII PHY U19; 10 | # 3. remove R207 and C90, located near the SMII PHY U20; 11 | # 4. remove C236, located near the SMII PHY U21; 12 | # 5. remove U12, located near the JTAG connector; 13 | # 6. solder together pins 7, 8 and 9 of U12; 14 | # 7. solder together pins 11, 12, 13, 14, 15, 16, 17 and 18 of U12. 15 | # - Modifications on the bottom layer: 16 | # 8. replace reset chip U11 with a STM6315SDW13F; 17 | # 9. add 0 ohm resistor R329. It is located close to JTAG connector. 18 | # 19 | # Date: 2009-10-31 20 | # Author: Antonio Borneo 21 | 22 | 23 | # Modified boards has SRST on JTAG connector 24 | set BOARD_HAS_SRST 1 25 | source [find board/spear310evb20.cfg] 26 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/test_rom.hex: -------------------------------------------------------------------------------- 1 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 2 | :1000100018F09FE5606FA0B818F09FE518F09FE515 3 | :1000200040000000D0000000D4000000D800000014 4 | :10003000DC00000000000000E0000000E400000020 5 | :100040000000A0E10000A0E10000A0E10000A0E1AC 6 | :100050000000A0E10000A0E10000A0E10000A0E19C 7 | :10006000DBF021E37CD09FE5D7F021E378D09FE55A 8 | :10007000D1F021E374D09FE5D2F021E370D09FE569 9 | :10008000D3F021E36CD09FE56C109FE56C209FE5D9 10 | :100090000030A0E3020051E104308114FCFFFF1A9C 11 | :1000A00000000FE1C000C0E300F029E10000A0E380 12 | :1000B0000010A0E348209FE50FE0A0E112FF2FE130 13 | :1000C0000000A0E10000A0E10000A0E1FBFFFFEACA 14 | :1000D000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA88 15 | :1000E000FEFFFFEAFEFFFFEA0004004000030040BD 16 | :1000F00000010040000200400008004000000040F5 17 | :1001000000000040080100000CD04DE20130A0E3E7 18 | :1001100000308DE50230A0E304308DE50030A0E32F 19 | :1001200008308DE538309FE5002093E500309DE5EF 20 | :10013000023083E000308DE500309DE5013083E240 21 | :1001400000308DE504309DE5013083E204308DE51B 22 | :1001500000209DE504309DE5033082E008308DE508 23 | :0C016000F4FFFFEA680100000700000047 24 | :0400000300000040B9 25 | :00000001FF 26 | -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/test_rom.hex: -------------------------------------------------------------------------------- 1 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 2 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 3 | :1000200040000000D0000000D4000000D800000014 4 | :10003000DC00000000000000E0000000E400000020 5 | :100040000000A0E10000A0E10000A0E10000A0E1AC 6 | :100050000000A0E10000A0E10000A0E10000A0E19C 7 | :10006000DBF021E37CD09FE5D7F021E378D09FE55A 8 | :10007000D1F021E374D09FE5D2F021E370D09FE569 9 | :10008000D3F021E36CD09FE56C109FE56C209FE5D9 10 | :100090000030A0E3020051E104308114FCFFFF1A9C 11 | :1000A00000000FE1C000C0E300F029E10000A0E380 12 | :1000B0000010A0E348209FE50FE0A0E112FF2FE130 13 | :1000C0000000A0E10000A0E10000A0E1FBFFFFEACA 14 | :1000D000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA88 15 | :1000E000FEFFFFEAFEFFFFEA0004004000030040BD 16 | :1000F00000010040000200400008004000000040F5 17 | :1001000000000040080100000CD04DE20130A0E3E7 18 | :1001100000308DE50230A0E304308DE50030A0E32F 19 | :1001200008308DE538309FE5002093E500309DE5EF 20 | :10013000023083E000308DE500309DE5013083E240 21 | :1001400000308DE504309DE5013083E204308DE51B 22 | :1001500000209DE504309DE5033082E008308DE508 23 | :0C016000F4FFFFEA680100000700000047 24 | :0400000300000040B9 25 | :00000001FF 26 | -------------------------------------------------------------------------------- /testing/examples/STR710Test/prj/str710_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 0 16 | 17 | #use combined on interfaces or targets that can't set TRST/SRST separately 18 | reset_config trst_and_srst srst_pulls_trst 19 | 20 | #jtag scan chain 21 | jtag newtap str7 cpu -irlen 4 -irmask 0xf 22 | 23 | #target configuration 24 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi 25 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup false 26 | 27 | target_script 0 gdb_program_config .\prj\str710_program.script 28 | 29 | #flash bank str7x 0 0 30 | flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x 31 | 32 | # For more information about the configuration files, 33 | # look at the OpenOCD User's Guide. 34 | 35 | init 36 | reset halt 37 | -------------------------------------------------------------------------------- /tcl/target/samsung_s3c2440.cfg: -------------------------------------------------------------------------------- 1 | # Target configuration for the Samsung 2440 system on chip 2 | # Tested on a S3C2440 Evaluation board by keesj 3 | # Processor : ARM920Tid(wb) rev 0 (v4l) 4 | # Info: JTAG tap: s3c2440.cpu tap/device found: 0x0032409d (Manufacturer: 0x04e, Part: 0x0324, Version: 0x0) 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME s3c2440 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | # this defaults to a bigendian 16 | set _ENDIAN little 17 | } 18 | 19 | if { [info exists CPUTAPID ] } { 20 | set _CPUTAPID $CPUTAPID 21 | } else { 22 | # force an error till we get a good number 23 | set _CPUTAPID 0x0032409d 24 | } 25 | 26 | #jtag scan chain 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID 28 | 29 | set _TARGETNAME $_CHIPNAME.cpu 30 | target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t 31 | 32 | $_TARGETNAME configure -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1 33 | 34 | #reset configuration 35 | reset_config trst_and_srst 36 | 37 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/Makefile: -------------------------------------------------------------------------------- 1 | # $Header: $ 2 | # This will make the test program for ARM. 3 | 4 | PROC=arm 5 | TYPE=none-linux-gnueabi 6 | LDSCRIPT=ldscript 7 | 8 | PATH:=/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/:$(PATH) 9 | CC=$(PROC)-$(TYPE)-gcc 10 | AS=$(PROC)-$(TYPE)-as 11 | AR=$(PROC)-$(TYPE)-ar 12 | LD=$(PROC)-$(TYPE)-ld 13 | NM=$(PROC)-$(TYPE)-nm 14 | OBJDUMP=$(PROC)-$(TYPE)-objdump 15 | CFLAGS= -g -c -mcpu=arm1136j-s 16 | 17 | all: test.elf 18 | 19 | # Make a little endian image: 20 | # In Eclipse, add the line : 21 | # source gdbinit 22 | # to : Run -> Debug... (menu) -> Commands (tab): Commands (listbox) 23 | # To start gdb from a window use : arm-elf-gdb --command=gdbinit 24 | test.elf: test.c Makefile ldscript crt0.S 25 | $(CC) $(CFLAGS) -o crt0.o crt0.S 26 | $(CC) $(CFLAGS) -o test.o test.c 27 | $(LD) -g -v -T$(LDSCRIPT) -o test.elf crt0.o test.o 28 | $(NM) test.elf 29 | 30 | 31 | dump: 32 | $(OBJDUMP) --all-headers test.elf 33 | 34 | dump_test: 35 | $(OBJDUMP) --disassemble test.elf 36 | 37 | dump_full: 38 | $(OBJDUMP) --full-contents test.elf 39 | 40 | clean: 41 | -/bin/rm -f *.o *~ test.elf 42 | 43 | -------------------------------------------------------------------------------- /testing/examples/LPC2148Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :020000044000BA 2 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 3 | :1000100018F09FE5606FA0B818F09FE518F09FE515 4 | :1000200040000040D0000040D4000040D800004014 5 | :10003000DC00004000000000E0000040E400004060 6 | :100040000000A0E10000A0E10000A0E10000A0E1AC 7 | :100050000000A0E10000A0E10000A0E10000A0E19C 8 | :10006000DBF021E37CD09FE5D7F021E378D09FE55A 9 | :10007000D1F021E374D09FE5D2F021E370D09FE569 10 | :10008000D3F021E36CD09FE56C109FE56C209FE5D9 11 | :100090000030A0E3020051E104308114FCFFFF1A9C 12 | :1000A00000000FE1C000C0E300F029E10000A0E380 13 | :1000B0000010A0E348209FE50FE0A0E112FF2FE130 14 | :1000C0000000A0E10000A0E10000A0E1FBFFFFEACA 15 | :1000D000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA88 16 | :1000E000FEFFFFEAFEFFFFEA0006004000050040B9 17 | :1000F0000003004000040040000A00406C01004082 18 | :100100006C010040080100400CD04DE20130A0E33A 19 | :1001100000308DE50230A0E304308DE50030A0E32F 20 | :1001200008308DE538309FE5002093E500309DE5EF 21 | :10013000023083E000308DE500309DE5013083E240 22 | :1001400000308DE504309DE5013083E204308DE51B 23 | :1001500000209DE504309DE5033082E008308DE508 24 | :0C016000F4FFFFEA680100400700000007 25 | :040000054000004077 26 | :00000001FF 27 | -------------------------------------------------------------------------------- /testing/examples/LPC2294Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :020000044000BA 2 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 3 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 4 | :1000200040000040D0000040D4000040D800004014 5 | :10003000DC00004000000000E0000040E400004060 6 | :100040000000A0E10000A0E10000A0E10000A0E1AC 7 | :100050000000A0E10000A0E10000A0E10000A0E19C 8 | :10006000DBF021E37CD09FE5D7F021E378D09FE55A 9 | :10007000D1F021E374D09FE5D2F021E370D09FE569 10 | :10008000D3F021E36CD09FE56C109FE56C209FE5D9 11 | :100090000030A0E3020051E104308114FCFFFF1A9C 12 | :1000A00000000FE1C000C0E300F029E10000A0E380 13 | :1000B0000010A0E348209FE50FE0A0E112FF2FE130 14 | :1000C0000000A0E10000A0E10000A0E1FBFFFFEACA 15 | :1000D000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA88 16 | :1000E000FEFFFFEAFEFFFFEA0006004000050040B9 17 | :1000F0000003004000040040000A00406C01004082 18 | :100100006C010040080100400CD04DE20130A0E33A 19 | :1001100000308DE50230A0E304308DE50030A0E32F 20 | :1001200008308DE538309FE5002093E500309DE5EF 21 | :10013000023083E000308DE500309DE5013083E240 22 | :1001400000308DE504309DE5013083E204308DE51B 23 | :1001500000209DE504309DE5033082E008308DE508 24 | :0C016000F4FFFFEA680100400700000007 25 | :040000054000004077 26 | :00000001FF 27 | -------------------------------------------------------------------------------- /tcl/target/at91sam9260.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9260 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME at91sam9260 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # force an error till we get a good number 21 | set _CPUTAPID 0x0792603f 22 | } 23 | 24 | reset_config trst_and_srst separate trst_push_pull srst_open_drain 25 | 26 | # 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 28 | 29 | adapter_nsrst_delay 300 30 | jtag_ntrst_delay 200 31 | 32 | jtag_rclk 3 33 | 34 | ###################### 35 | # Target configuration 36 | ###################### 37 | 38 | set _TARGETNAME $_CHIPNAME.cpu 39 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 40 | 41 | # Internal sram1 memory 42 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1 43 | 44 | 45 | -------------------------------------------------------------------------------- /tcl/target/at91sam9rl.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Atmel AT91SAM9RL 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME at91sam9rl 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # force an error till we get a good number 21 | set _CPUTAPID 0x0792603f 22 | } 23 | 24 | reset_config trst_and_srst separate trst_push_pull srst_open_drain 25 | 26 | # 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 28 | 29 | adapter_nsrst_delay 300 30 | jtag_ntrst_delay 200 31 | 32 | jtag_rclk 3 33 | 34 | ###################### 35 | # Target configuration 36 | ###################### 37 | 38 | set _TARGETNAME $_CHIPNAME.cpu 39 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 40 | 41 | # Internal sram1 memory 42 | $_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x10000 -work-area-backup 1 43 | 44 | 45 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 0 16 | jtag_nsrst_delay 200 17 | jtag_ntrst_delay 200 18 | 19 | 20 | #use combined on interfaces or targets that can't set TRST/SRST separately 21 | reset_config srst_only srst_pulls_trst 22 | 23 | #jtag scan chain 24 | jtag newtap sam7 cpu -irlen 4 -irmask 0xf 25 | 26 | #target configuration 27 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi 28 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false 29 | 30 | target_script 0 reset .\prj\sam7s256_reset.script 31 | 32 | #flash bank 33 | flash bank at91sam7 0 0 0 0 0 34 | 35 | # For more information about the configuration files, 36 | # look at the OpenOCD User's Guide. 37 | 38 | init 39 | reset halt 40 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 0 16 | jtag_nsrst_delay 200 17 | jtag_ntrst_delay 200 18 | 19 | 20 | #use combined on interfaces or targets that can't set TRST/SRST separately 21 | reset_config srst_only srst_pulls_trst 22 | 23 | #jtag scan chain 24 | jtag newtap sam7 cpu -irlen 4 -irmask 0xf 25 | 26 | #target configuration 27 | target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi 28 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false 29 | 30 | target_script 0 reset .\prj\sam7x256_reset.script 31 | 32 | #flash bank 33 | flash bank at91sam7 0 0 0 0 0 34 | 35 | # For more information about the configuration files, 36 | # look at the OpenOCD User's Guide. 37 | 38 | init 39 | reset halt 40 | -------------------------------------------------------------------------------- /tcl/target/at91sam3XXX.cfg: -------------------------------------------------------------------------------- 1 | # script for ATMEL sam3, a CORTEX-M3 chip 2 | # 3 | # at91sam3u4e 4 | # at91sam3u2e 5 | # at91sam3u1e 6 | # at91sam3u4c 7 | # at91sam3u2c 8 | # at91sam3u1c 9 | # 10 | # at91sam3s4c 11 | # at91sam3s4b 12 | # at91sam3s4a 13 | # at91sam3s2c 14 | # at91sam3s2b 15 | # at91sam3s2a 16 | # at91sam3s1c 17 | # at91sam3s1b 18 | # at91sam3s1a 19 | 20 | if { [info exists CHIPNAME] } { 21 | set _CHIPNAME $CHIPNAME 22 | } else { 23 | set _CHIPNAME sam3 24 | } 25 | 26 | if { [info exists ENDIAN] } { 27 | set _ENDIAN $ENDIAN 28 | } else { 29 | set _ENDIAN little 30 | } 31 | 32 | 33 | #jtag scan chain 34 | if { [info exists CPUTAPID ] } { 35 | set _CPUTAPID $CPUTAPID 36 | } else { 37 | set _CPUTAPID 0x4ba00477 38 | } 39 | 40 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 41 | 42 | set _TARGETNAME $_CHIPNAME.cpu 43 | target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME 44 | 45 | # 16K is plenty, the smallest chip has this much 46 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0 47 | 48 | $_TARGETNAME configure -event gdb-flash-erase-start { 49 | halt 50 | } 51 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/Makefile: -------------------------------------------------------------------------------- 1 | # This will make the test program for a Freescale iMX27 ADS Board with a 2 | # FreeScale iMX27 CPU 3 | 4 | PROC=arm 5 | TYPE=926ejs-linux 6 | LDSCRIPT=ldscript 7 | 8 | PATH:=/opt/freescale/usr/local/gcc-4.1.1-glibc-2.4-nptl-sf-1/arm-926ejs-linux/bin/:$(PATH) 9 | CC=$(PROC)-$(TYPE)-gcc 10 | AS=$(PROC)-$(TYPE)-as 11 | AR=$(PROC)-$(TYPE)-ar 12 | LD=$(PROC)-$(TYPE)-ld 13 | NM=$(PROC)-$(TYPE)-nm 14 | OBJDUMP=$(PROC)-$(TYPE)-objdump 15 | CFLAGS= -g -c -mcpu=arm920t 16 | 17 | all: test.elf 18 | 19 | # Make a little endian image: 20 | # In Eclipse, add the line : 21 | # source gdbinit 22 | # to : Run -> Debug... (menu) -> Commands (tab): Commands (listbox) 23 | # To start gdb from a window use : arm-elf-gdb --command=gdbinit 24 | test.elf: test.c Makefile ldscript crt0.S 25 | $(CC) $(CFLAGS) -o crt0.o crt0.S 26 | $(CC) $(CFLAGS) -o test.o test.c 27 | $(LD) -g -v -T$(LDSCRIPT) -o test.elf crt0.o test.o 28 | $(NM) test.elf 29 | 30 | 31 | dump: 32 | $(OBJDUMP) --all-headers test.elf 33 | 34 | dump_test: 35 | $(OBJDUMP) --disassemble test.elf 36 | 37 | dump_full: 38 | $(OBJDUMP) --full-contents test.elf 39 | 40 | clean: 41 | -/bin/rm -f *.o *~ test.elf 42 | 43 | -------------------------------------------------------------------------------- /testing/profile_stm32.txt: -------------------------------------------------------------------------------- 1 | These are profile tests for the stm32 target. 2 | 3 | old version rev 1606: 4 | 5 | single step: 59 ms 6 | flash 64k : 24kB/s 7 | mdb 0 128 : 44ms 8 | 9 | 10 | trunk rev 1662: 11 | 12 | single step: 99 ms 13 | flash 64k : 21.5kB/s 14 | mdb 0 128 : 72ms 15 | 16 | 17 | How to run tests: 18 | 19 | poll off 20 | set before [flush_count] 21 | step 22 | set step_count [expr [flush_count]-$before] 23 | 24 | set before [flush_count] 25 | mdb 0 128 26 | set mem_count [expr [flush_count]-$before] 27 | 28 | set before [flush_count] 29 | flash erase_address 0x8000000 0x10000 30 | set erase_count [expr [flush_count]-$before] 31 | 32 | set before [flush_count] 33 | flash fillb 0x8000000 0x55 0x10000 34 | set flash_fill_count [expr [flush_count]-$before] 35 | 36 | puts "counts" ; puts "step $step_count" ; puts "mem $mem_count" ; puts "erase $erase_count" ; puts "flash fill $flash_fill_count" 37 | 38 | parport trunk rev 1675 39 | ====================== 40 | 41 | step 336 42 | mem 160 43 | erase 3076 44 | flash fill 32754 45 | 46 | verify_ircapture disable 47 | 48 | step 114 49 | mem 96 50 | erase 1547 51 | flash fill 15564 52 | 53 | -------------------------------------------------------------------------------- /tcl/target/spear3xx.cfg: -------------------------------------------------------------------------------- 1 | # Target configuration for the ST SPEAr3xx family of system on chip 2 | # Supported SPEAr300, SPEAr310, SPEAr320 3 | # http://www.st.com/spear 4 | # 5 | # Processor: ARM926ejs 6 | # Info: JTAG tap: spear3xx.cpu tap/device found: 0x07926041 7 | # Date: 2009-10-31 8 | # Author: Antonio Borneo 9 | 10 | if { [info exists CHIPNAME] } { 11 | set _CHIPNAME $CHIPNAME 12 | } else { 13 | set _CHIPNAME spear3xx 14 | } 15 | 16 | if { [info exists ENDIAN] } { 17 | set _ENDIAN $ENDIAN 18 | } else { 19 | set _ENDIAN little 20 | } 21 | 22 | if { [info exists CPUTAPID ] } { 23 | set _CPUTAPID $CPUTAPID 24 | } else { 25 | set _CPUTAPID 0x07926041 26 | } 27 | 28 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x03 \ 29 | -expected-id $_CPUTAPID 30 | 31 | set _TARGETNAME $_CHIPNAME.cpu 32 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN \ 33 | -chain-position $_TARGETNAME 34 | 35 | # SPEAr3xx has a 8K block of sram @ 0xd280.0000 36 | # REVISIT: what OS puts virtual address equal to phys? 37 | $_TARGETNAME configure \ 38 | -work-area-virt 0xd2800000 \ 39 | -work-area-phys 0xd2800000 \ 40 | -work-area-size 0x2000 \ 41 | -work-area-backup 0 42 | -------------------------------------------------------------------------------- /testing/build.test1/local.uses: -------------------------------------------------------------------------------- 1 | # -*- mode: makefile -*- 2 | HERE := $(shell pwd) 3 | 4 | # Solve problems on systems with DASH.. Grrr... 5 | SHELL=/bin/bash 6 | export SHELL 7 | 8 | VIRGINS=${HERE}/virgins 9 | 10 | # Determine the build platform. 11 | BUILD_SYSNAME_Linux =linux 12 | BUILD_SYSNAME_linux =linux 13 | BUILD_SYSNAME_CYGWIN_NT =cygwin 14 | BUILD_SYSNAME_MINGW32_NT =mingw32 15 | BUILD_SYSNAME_Darwin =darwin 16 | BUILD_SYSNAME_darwin =darwin 17 | BUILD_SYSNAME :=$(BUILD_SYSNAME_$(shell uname --sysname | cut -d'-' -f1)) 18 | 19 | # And machine (ie: i686, x86_64, or what) 20 | BUILD_MACHINE :=$(BUILD_SYSNAME).$(shell uname -m) 21 | 22 | 23 | INSTALL_DIR := $(HERE)/install 24 | PREFIX := ${INSTALL_DIR} 25 | EXEC_PREFIX := ${INSTALL_DIR}/${BUILD_MACHINE} 26 | 27 | LIBFTDI_VERSION=0.14 28 | LIBCONFUSE_VERSION=2.5 29 | 30 | LIBUSB_VERSION_linux=0.1.12 31 | 32 | LIBUSB_VERSION=${LIBUSB_VERSION_${BUILD_SYSNAME}} 33 | 34 | FTD2XX_WIN32_VERSION=2.04.14 35 | FTD2XX_WIN32_DIR = ${HERE}/ftd2xx.win32 36 | 37 | FTD2XX_LINUX_VERSION=0.4.16 38 | FTD2XX_LINUX_DIR = ${HERE}/libftd2xx${FTD2XX_LINUX_VERSION} 39 | FTD2XX_LINUX_64_DIR = ${HERE}/libftd2xx${FTD2XX_LINUX_VERSION}_x86_64 40 | -------------------------------------------------------------------------------- /tcl/target/c100.cfg: -------------------------------------------------------------------------------- 1 | # c100 config. 2 | # This is ARM1136 dual core 3 | # this script only configures one core (that is used to run Linux) 4 | 5 | # assume no PLL lock, start slowly 6 | adapter_khz 100 7 | 8 | if { [info exists CHIPNAME] } { 9 | set _CHIPNAME $CHIPNAME 10 | } else { 11 | set _CHIPNAME c100 12 | } 13 | 14 | if { [info exists ENDIAN] } { 15 | set _ENDIAN $ENDIAN 16 | } else { 17 | set _ENDIAN little 18 | } 19 | 20 | if { [info exists CPUTAPID ] } { 21 | set _CPUTAPID $CPUTAPID 22 | } else { 23 | set _CPUTAPID 0x27b3645b 24 | } 25 | 26 | if { [info exists DSPTAPID ] } { 27 | set _DSPTAPID $DSPTAPID 28 | } else { 29 | set _DSPTAPID 0x27b3645b 30 | } 31 | 32 | jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_DSPTAPID 33 | 34 | 35 | # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register 36 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID 37 | 38 | set _TARGETNAME $_CHIPNAME.cpu 39 | target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME 40 | 41 | # C100's ARAM 64k SRAM 42 | $_TARGETNAME configure -work-area-phys 0x0a000000 -work-area-size 0x10000 -work-area-backup 0 43 | -------------------------------------------------------------------------------- /tcl/target/imx25.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # imx25 config 3 | # 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME imx25 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists ETBTAPID ] } { 18 | set _ETBTAPID $ETBTAPID 19 | } else { 20 | set _ETBTAPID 0x1b900f0f 21 | } 22 | jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0x0f -expected-id $_ETBTAPID 23 | 24 | if { [info exists CPUTAPID ] } { 25 | set _CPUTAPID $CPUTAPID 26 | } else { 27 | set _CPUTAPID 0x07926041 28 | } 29 | jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID 30 | 31 | jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id 0x0 32 | 33 | if { [info exists SDMATAPID ] } { 34 | set _SDMATAPID $SDMATAPID 35 | } else { 36 | set _SDMATAPID 0x0882301d 37 | } 38 | jtag newtap $_CHIPNAME sdma -irlen 5 -expected-id $_SDMATAPID 39 | 40 | set _TARGETNAME $_CHIPNAME.cpu 41 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN \ 42 | -chain-position $_TARGETNAME 43 | 44 | # trace setup 45 | etm config $_TARGETNAME 16 normal full etb 46 | etb config $_TARGETNAME $_CHIPNAME.etb 47 | -------------------------------------------------------------------------------- /tcl/board/hammer.cfg: -------------------------------------------------------------------------------- 1 | # Target Configuration for the TinCanTools S3C2410 Based Hammer Module 2 | # http://www.tincantools.com 3 | 4 | source [find target/samsung_s3c2410.cfg] 5 | 6 | $_TARGETNAME configure -event reset-init { 7 | # Reset Script for the TinCanTools S3C2410 Based Hammer Module 8 | # http://www.tincantools.com 9 | # 10 | # Setup primary clocks and initialize the SDRAM 11 | mww 0x53000000 0x00000000 12 | mww 0x4a000008 0xffffffff 13 | mww 0x4a00000c 0x000007ff 14 | mww 0x4c000000 0x00ffffff 15 | mww 0x4c000014 0x00000003 16 | mww 0x4c000004 0x000a1031 17 | mww 0x48000000 0x11111122 18 | mww 0x48000004 0x00000700 19 | mww 0x48000008 0x00000700 20 | mww 0x4800000c 0x00000700 21 | mww 0x48000010 0x00000700 22 | mww 0x48000014 0x00000700 23 | mww 0x48000018 0x00000700 24 | mww 0x4800001c 0x00018005 25 | mww 0x48000020 0x00018005 26 | mww 0x48000024 0x009c0459 27 | mww 0x48000028 0x000000b2 28 | mww 0x4800002c 0x00000030 29 | mww 0x48000030 0x00000030 30 | flash probe 0 31 | } 32 | 33 | 34 | #flash configuration 35 | #flash bank [driver_options ...] 36 | set _FLASHNAME $_CHIPNAME.flash 37 | flash bank $_FLASHNAME cfi 0x00000000 0x1000000 2 2 $_TARGETNAME 38 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx27ads/crt0.S: -------------------------------------------------------------------------------- 1 | /* Sample initialization file */ 2 | 3 | .extern main 4 | .extern exit 5 | 6 | /* .text is used instead of .section .text so it works with arm-aout too. */ 7 | .text 8 | .code 32 9 | .align 0 10 | 11 | .global _mainCRTStartup 12 | .global _start 13 | .global start 14 | start: 15 | _start: 16 | _mainCRTStartup: 17 | 18 | /* Start by setting up a stack */ 19 | /* Set up the stack pointer to end of bss */ 20 | ldr r3, .LC2 21 | mov sp, r3 22 | 23 | sub sl, sp, #512 /* Still assumes 512 bytes below sl */ 24 | 25 | mov a2, #0 /* Second arg: fill value */ 26 | mov fp, a2 /* Null frame pointer */ 27 | mov r7, a2 /* Null frame pointer for Thumb */ 28 | 29 | ldr a1, .LC1 /* First arg: start of memory block */ 30 | ldr a3, .LC2 /* Second arg: end of memory block */ 31 | sub a3, a3, a1 /* Third arg: length of block */ 32 | 33 | mov r0, #0 /* no arguments */ 34 | mov r1, #0 /* no argv either */ 35 | 36 | bl main 37 | bl exit /* Should not return */ 38 | 39 | /* For Thumb, constants must be after the code since only 40 | positive offsets are supported for PC relative addresses. */ 41 | 42 | .align 0 43 | .LC1: 44 | .word __bss_start__ 45 | .LC2: 46 | .word __bss_end__ 47 | 48 | -------------------------------------------------------------------------------- /testing/examples/ledtest-imx31pdk/crt0.S: -------------------------------------------------------------------------------- 1 | /* Sample initialization file */ 2 | 3 | .extern main 4 | .extern exit 5 | 6 | /* .text is used instead of .section .text so it works with arm-aout too. */ 7 | .text 8 | .code 32 9 | .align 0 10 | 11 | .global _mainCRTStartup 12 | .global _start 13 | .global start 14 | start: 15 | _start: 16 | _mainCRTStartup: 17 | 18 | /* Start by setting up a stack */ 19 | /* Set up the stack pointer to end of bss */ 20 | ldr r3, .LC2 21 | mov sp, r3 22 | 23 | sub sl, sp, #512 /* Still assumes 512 bytes below sl */ 24 | 25 | mov a2, #0 /* Second arg: fill value */ 26 | mov fp, a2 /* Null frame pointer */ 27 | mov r7, a2 /* Null frame pointer for Thumb */ 28 | 29 | ldr a1, .LC1 /* First arg: start of memory block */ 30 | ldr a3, .LC2 /* Second arg: end of memory block */ 31 | sub a3, a3, a1 /* Third arg: length of block */ 32 | 33 | mov r0, #0 /* no arguments */ 34 | mov r1, #0 /* no argv either */ 35 | 36 | bl main 37 | bl exit /* Should not return */ 38 | 39 | /* For Thumb, constants must be after the code since only 40 | positive offsets are supported for PC relative addresses. */ 41 | 42 | .align 0 43 | .LC1: 44 | .word __bss_start__ 45 | .LC2: 46 | .word __bss_end__ 47 | 48 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # stuff "git status" should ignore 2 | 3 | # build output 4 | .libs 5 | .deps 6 | *.o 7 | *.o.?????? 8 | *.a 9 | *.lo 10 | *.la 11 | *.in 12 | 13 | # generated source files 14 | src/jtag/minidriver_imp.h 15 | src/jtag/jtag_minidriver.h 16 | 17 | # editor files 18 | *.swp 19 | 20 | src/startup.tcl 21 | startup_tcl.c 22 | xscale_debug.h 23 | 24 | bin2char 25 | bin2char.exe 26 | 27 | doc/openocd.aux 28 | doc/openocd.cp 29 | doc/openocd.cps 30 | doc/openocd.fn 31 | doc/openocd.fns 32 | doc/openocd.html 33 | doc/openocd.info 34 | doc/openocd.info-1 35 | doc/openocd.info-2 36 | doc/openocd.ky 37 | doc/openocd.log 38 | doc/openocd.pdf 39 | doc/openocd.pg 40 | doc/openocd.toc 41 | doc/openocd.tp 42 | doc/openocd.vr 43 | doc/texinfo.tex 44 | doc/version.texi 45 | src/openocd 46 | src/openocd.exe 47 | 48 | # configure/autotools output 49 | aclocal.m4 50 | autom4te.cache 51 | compile 52 | config.* 53 | configure 54 | depcomp 55 | doxygen 56 | doxygen.log 57 | Doxyfile 58 | install-sh 59 | libtool 60 | ltmain.sh 61 | Makefile 62 | mdate-sh 63 | missing 64 | stamp-h1 65 | stamp-vti 66 | INSTALL 67 | NOTES 68 | 69 | # coexist with quilt 70 | patches 71 | 72 | # Eclipse stuff 73 | .project 74 | .cproject 75 | .settings 76 | 77 | # Emacs temp files 78 | *~ 79 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/prj/str912_jtagkey.cfg: -------------------------------------------------------------------------------- 1 | #daemon configuration 2 | telnet_port 4444 3 | gdb_port 3333 4 | 5 | # tell gdb our flash memory map 6 | # and enable flash programming 7 | gdb_memory_map enable 8 | gdb_flash_program enable 9 | 10 | #interface 11 | interface ft2232 12 | ft2232_device_desc "Amontec JTAGkey A" 13 | ft2232_layout jtagkey 14 | ft2232_vid_pid 0x0403 0xcff8 15 | jtag_speed 1 16 | 17 | jtag_nsrst_delay 100 18 | jtag_ntrst_delay 100 19 | 20 | #use combined on interfaces or targets that can't set TRST/SRST separately 21 | reset_config trst_and_srst 22 | 23 | #jtag scan chain 24 | jtag newtap str9 flash -irlen 8 25 | jtag newtap str9 cpu -irlen 4 -irmask 0xf 26 | jtag newtap str9 bs -irlen 5 27 | 28 | #target configuration 29 | target create target0 arm966e -endian little -chain-position 1 -variant arm966e 30 | [new_target_name] configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup false 31 | 32 | target_script 0 gdb_program_config .\prj\str912_program.script 33 | 34 | #flash bank str7x 0 0 35 | flash bank str9x 0x00000000 0x00080000 0 0 0 36 | 37 | # For more information about the configuration files, 38 | # look at the OpenOCD User's Guide. 39 | 40 | init 41 | reset halt 42 | -------------------------------------------------------------------------------- /tcl/board/osk5912.cfg: -------------------------------------------------------------------------------- 1 | # http://omap.spectrumdigital.com/osk5912/ 2 | 3 | source [find target/omap5912.cfg] 4 | 5 | # NOTE: this assumes you're using the ARM 20-pin ("Multi-ICE") 6 | # JTAG connector, and accordingly have J1 connecting pins 1 & 2. 7 | # The TI-14 pin needs "trst_only", and J1 connecting 2 & 3. 8 | reset_config trst_and_srst separate 9 | 10 | # NOTE: boards with XOMAP parts wire nSRST to nPWRON_RESET. 11 | # That resets everything -- including JTAG and EmbeddedICE. 12 | # So they must use "reset_config srst_pulls_trst". 13 | 14 | # NOTE: an expansion board could add a trace connector ... if 15 | # it does, change this appropriately. And reset_config too, 16 | # assuming JTAG_DIS reroutes JTAG to that connector. 17 | etm config $_TARGETNAME 8 demultiplexed full dummy 18 | etm_dummy config $_TARGETNAME 19 | 20 | # standard boards populate two 16 MB chips, but manufacturing 21 | # options or an expansion board could change this config. 22 | flash bank osk.u1 cfi 0x00000000 0x01000000 2 2 $_TARGETNAME 23 | flash bank osk.u2 cfi 0x01000000 0x01000000 2 2 $_TARGETNAME 24 | 25 | proc osk5912_init {} { 26 | omap5912_reset 27 | 28 | # detect flash 29 | flash probe 0 30 | flash probe 1 31 | } 32 | $_TARGETNAME configure -event reset-init { osk5912_init } 33 | 34 | arm7_9 dcc_downloads enable 35 | -------------------------------------------------------------------------------- /tcl/interface/luminary.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Luminary Micro Stellaris Evaluation Kits 3 | # 4 | # http://www.luminarymicro.com/products/evaluation_kits.html 5 | # 6 | # There are a number of evaluation kits for Stellaris Cortex-M3 chips. 7 | # Currently they all bundle FT2232 based debug support. When that is 8 | # used (instead of an external adapter), use this config file in one 9 | # of these two modes: 10 | # 11 | # - Eval board debug ... debug of the Stellaris chip via port A. 12 | # 13 | # - Other board debug ... same thing, but the board acts as a debug 14 | # adapter for another board (using a standard ARM JTAG connector). 15 | # The Stellaris chip stays in reset. 16 | # 17 | # Those support both JTAG and SWD. SWD is an ARM-only two-wire debug 18 | # protocol; in 2009, OpenOCD does not support SWD. 19 | # 20 | # Port B of the FT2232 chip is normally used as a serial link to the 21 | # Stellaris chip. On most boards (but not older LM3S811 eval boards), 22 | # when SWD is used Port B may instead be used to read low-bandwidth 23 | # "SWO trace" data, including so-called "printf style" output from 24 | # firmware via the ITM module as well as profile data. 25 | # 26 | 27 | interface ft2232 28 | ft2232_device_desc "Stellaris Evaluation Board" 29 | ft2232_layout luminary_icdi 30 | ft2232_vid_pid 0x0403 0xbcd9 31 | 32 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :020000040020DA 2 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 3 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 4 | :1000200040002000E4002000E8002000EC00200058 5 | :10003000F000200000000000F4002000F800200084 6 | :10004000B4109FE50209A0E3040081E5AC009FE540 7 | :10005000AC109FE5000081E5FF10E0E3A4009FE500 8 | :10006000600081E5A0109FE50000E0E3300181E53C 9 | :10007000240181E5DBF021E390D09FE5D7F021E377 10 | :100080008CD09FE5D1F021E388D09FE5D2F021E329 11 | :1000900084D09FE5D3F021E380D09FE580109FE5D9 12 | :1000A00080209FE50030A0E3020051E1043081147C 13 | :1000B000FCFFFF1A00000FE1C000C0E300F029E1DF 14 | :1000C0000000A0E30010A0E35C209FE50FE0A0E1AA 15 | :1000D00012FF2FE10000A0E10000A0E10000A0E17C 16 | :1000E000FBFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA7B 17 | :1000F000FEFFFFEAFEFFFFEAFEFFFFEA40FDFFFF13 18 | :10010000010400A508FDFFFF0001480000F0FFFF0B 19 | :10011000000620000005200000032000000420004D 20 | :10012000000A2000940120009401200030012000EA 21 | :100130000CD04DE20130A0E300308DE50230A0E3A9 22 | :1001400004308DE50030A0E308308DE538309FE5C0 23 | :10015000002093E500309DE5023083E000308DE51E 24 | :1001600000309DE5013083E200308DE504309DE5EF 25 | :10017000013083E204308DE500209DE504309DE5EB 26 | :10018000033082E008308DE5F4FFFFEA90012000A3 27 | :040190000700000064 28 | :040000050020004097 29 | :00000001FF 30 | -------------------------------------------------------------------------------- /testing/examples/SAM7S256Test/test_rom.hex: -------------------------------------------------------------------------------- 1 | :020000040010EA 2 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 3 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 4 | :1000200040001000E4001000E8001000EC00100098 5 | :10003000F000100000000000F4001000F8001000B4 6 | :10004000B4109FE50209A0E3040081E5AC009FE540 7 | :10005000AC109FE5000081E5FF10E0E3A4009FE500 8 | :10006000600081E5A0109FE50000E0E3300181E53C 9 | :10007000240181E5DBF021E390D09FE5D7F021E377 10 | :100080008CD09FE5D1F021E388D09FE5D2F021E329 11 | :1000900084D09FE5D3F021E380D09FE580109FE5D9 12 | :1000A00080209FE50030A0E3020051E1043081147C 13 | :1000B000FCFFFF1A00000FE1C000C0E300F029E1DF 14 | :1000C0000000A0E30010A0E35C209FE50FE0A0E1AA 15 | :1000D00012FF2FE10000A0E10000A0E10000A0E17C 16 | :1000E000FBFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA7B 17 | :1000F000FEFFFFEAFEFFFFEAFEFFFFEA40FDFFFF13 18 | :10010000010400A508FDFFFF0001480000F0FFFF0B 19 | :100110000004200000032000000120000002200055 20 | :100120000008200000002000000020003001100026 21 | :100130000CD04DE20130A0E300308DE50230A0E3A9 22 | :1001400004308DE50030A0E308308DE538309FE5C0 23 | :10015000002093E500309DE5023083E000308DE51E 24 | :1001600000309DE5013083E200308DE504309DE5EF 25 | :10017000013083E204308DE500209DE504309DE5EB 26 | :10018000033082E008308DE5F4FFFFEA90011000B3 27 | :040190000700000064 28 | :0400000500100040A7 29 | :00000001FF 30 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :020000040020DA 2 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 3 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 4 | :1000200040002000E4002000E8002000EC00200058 5 | :10003000F000200000000000F4002000F800200084 6 | :10004000B4109FE50209A0E3040081E5AC009FE540 7 | :10005000AC109FE5000081E5FF10E0E3A4009FE500 8 | :10006000600081E5A0109FE50000E0E3300181E53C 9 | :10007000240181E5DBF021E390D09FE5D7F021E377 10 | :100080008CD09FE5D1F021E388D09FE5D2F021E329 11 | :1000900084D09FE5D3F021E380D09FE580109FE5D9 12 | :1000A00080209FE50030A0E3020051E1043081147C 13 | :1000B000FCFFFF1A00000FE1C000C0E300F029E1DF 14 | :1000C0000000A0E30010A0E35C209FE50FE0A0E1AA 15 | :1000D00012FF2FE10000A0E10000A0E10000A0E17C 16 | :1000E000FBFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA7B 17 | :1000F000FEFFFFEAFEFFFFEAFEFFFFEA40FDFFFF13 18 | :10010000010400A508FDFFFF0001480000F0FFFF0B 19 | :10011000000620000005200000032000000420004D 20 | :10012000000A2000940120009401200030012000EA 21 | :100130000CD04DE20130A0E300308DE50230A0E3A9 22 | :1001400004308DE50030A0E308308DE538309FE5C0 23 | :10015000002093E500309DE5023083E000308DE51E 24 | :1001600000309DE5013083E200308DE504309DE5EF 25 | :10017000013083E204308DE500209DE504309DE5EB 26 | :10018000033082E008308DE5F4FFFFEA90012000A3 27 | :040190000700000064 28 | :040000050020004097 29 | :00000001FF 30 | -------------------------------------------------------------------------------- /testing/examples/SAM7X256Test/test_rom.hex: -------------------------------------------------------------------------------- 1 | :020000040010EA 2 | :1000000018F09FE518F09FE518F09FE518F09FE5C0 3 | :1000100018F09FE518F09FE518F09FE518F09FE5B0 4 | :1000200040001000E4001000E8001000EC00100098 5 | :10003000F000100000000000F4001000F8001000B4 6 | :10004000B4109FE50209A0E3040081E5AC009FE540 7 | :10005000AC109FE5000081E5FF10E0E3A4009FE500 8 | :10006000600081E5A0109FE50000E0E3300181E53C 9 | :10007000240181E5DBF021E390D09FE5D7F021E377 10 | :100080008CD09FE5D1F021E388D09FE5D2F021E329 11 | :1000900084D09FE5D3F021E380D09FE580109FE5D9 12 | :1000A00080209FE50030A0E3020051E1043081147C 13 | :1000B000FCFFFF1A00000FE1C000C0E300F029E1DF 14 | :1000C0000000A0E30010A0E35C209FE50FE0A0E1AA 15 | :1000D00012FF2FE10000A0E10000A0E10000A0E17C 16 | :1000E000FBFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA7B 17 | :1000F000FEFFFFEAFEFFFFEAFEFFFFEA40FDFFFF13 18 | :10010000010400A508FDFFFF0001480000F0FFFF0B 19 | :100110000004200000032000000120000002200055 20 | :100120000008200000002000000020003001100026 21 | :100130000CD04DE20130A0E300308DE50230A0E3A9 22 | :1001400004308DE50030A0E308308DE538309FE5C0 23 | :10015000002093E500309DE5023083E000308DE51E 24 | :1001600000309DE5013083E200308DE504309DE5EF 25 | :10017000013083E204308DE500209DE504309DE5EB 26 | :10018000033082E008308DE5F4FFFFEA90011000B3 27 | :040190000700000064 28 | :0400000500100040A7 29 | :00000001FF 30 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/test_rom.hex: -------------------------------------------------------------------------------- 1 | :10000000F8F09FE50000A0E10000A0E10000A0E101 2 | :100010000000A0E10000A0E10000A0E10000A0E1DC 3 | :100020000000A0E10000A0E11503A0E30410A0E39C 4 | :10003000001080E50210A0E3041080E50010A0E3AA 5 | :100040000C1080E50218A0E3101080E51810A0E362 6 | :10005000181080E5A8009FE5A8109FE5001080E536 7 | :100060000608A0E3110F2FEED7F021E398D09FE50B 8 | :10007000DBF021E394D09FE5D3F021E390D09FE51E 9 | :10008000D1F021E38CD09FE5D2F021E388D09FE529 10 | :100090001FF021E384D09FE584A09FE584109FE5B5 11 | :1000A00084209FE584309FE5030052E104009134F1 12 | :1000B00004008234FBFFFF3A0000A0E370109FE5CC 13 | :1000C0005C209FE5020051E104008134FCFFFF3A0F 14 | :1000D00060009FE560109FE5010050E10400000A08 15 | :1000E000042090E403002DE932FF2FE10300BDE876 16 | :1000F000F8FFFFEAFFFFFFEB100000EAA861000035 17 | :10010000040000003420005C97010000000D000492 18 | :10011000000D0004000D00040009000400090004A3 19 | :100120000008000400000004A40100000000000416 20 | :100130000000000400000004A0010000A001000075 21 | :100140000CD04DE20130A0E300308DE50230A0E399 22 | :1001500004308DE50030A0E308308DE538309FE5B0 23 | :10016000002093E500309DE5023083E000308DE50E 24 | :1001700000309DE5013083E200308DE504309DE5DF 25 | :10018000013083E204308DE500209DE504309DE5DB 26 | :10019000033082E008308DE5F4FFFFEAA0010000A3 27 | :0401A0000700000054 28 | :00000001FF 29 | -------------------------------------------------------------------------------- /doc/manual/target.txt: -------------------------------------------------------------------------------- 1 | /** @page targetdocs OpenOCD Target APIs 2 | 3 | OpenOCD provides its Target APIs to allow developers to provide trace and 4 | debugging support for specific device targets. These primarily consist of 5 | ARM cores, but other types have been supported. New targets should be 6 | developed by following or using these APIs. 7 | 8 | The Target Support module contains APIs that cover several functional areas: 9 | 10 | - @subpage targetarm 11 | - @subpage targetnotarm 12 | - @subpage targetregister 13 | - @subpage targetimage 14 | - @subpage targettrace 15 | 16 | This section needs to be expanded. 17 | 18 | */ 19 | 20 | /** @page targetarm OpenOCD ARM Targets 21 | 22 | This section needs to describe OpenOCD's ARM target support. 23 | 24 | */ 25 | 26 | /** @page targetregister OpenOCD Target Register API 27 | 28 | This section needs to describe OpenOCD's Target Register API, as 29 | provided by 'src/target/register.h'. 30 | 31 | */ 32 | 33 | /** @page targetimage OpenOCD Target Image API 34 | 35 | This section needs to describe OpenOCD's Target Image API, as provided 36 | by 'src/target/image.h'. 37 | 38 | */ 39 | 40 | /** @page targettrace OpenOCD Target Trace API 41 | 42 | This section needs to describe OpenOCD's Target Trace API, as provided 43 | by 'src/target/trace.h'. 44 | 45 | */ 46 | -------------------------------------------------------------------------------- /src/helper/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libhelper.la 5 | 6 | if ECOSBOARD 7 | CONFIGFILES = time_support_ecos.c 8 | else 9 | CONFIGFILES = options.c time_support_common.c 10 | endif 11 | 12 | 13 | 14 | libhelper_la_SOURCES = \ 15 | binarybuffer.c \ 16 | $(CONFIGFILES) \ 17 | configuration.c \ 18 | log.c \ 19 | command.c \ 20 | time_support.c \ 21 | replacements.c \ 22 | fileio.c \ 23 | util.c 24 | 25 | if IOUTIL 26 | libhelper_la_SOURCES += ioutil.c 27 | else 28 | libhelper_la_SOURCES += ioutil_stubs.c 29 | endif 30 | 31 | libhelper_la_CFLAGS = 32 | if IS_MINGW 33 | # FD_* macros are sloppy with their signs on MinGW32 platform 34 | libhelper_la_CFLAGS += -Wno-sign-compare 35 | endif 36 | 37 | noinst_HEADERS = \ 38 | binarybuffer.h \ 39 | configuration.h \ 40 | ioutil.h \ 41 | util.h \ 42 | types.h \ 43 | log.h \ 44 | command.h \ 45 | time_support.h \ 46 | replacements.h \ 47 | fileio.h \ 48 | system.h \ 49 | bin2char.c 50 | 51 | EXTRA_DIST = startup.tcl 52 | 53 | BIN2C = bin2char$(EXEEXT_FOR_BUILD) 54 | 55 | BUILT_SOURCES = $(BIN2C) 56 | 57 | $(BIN2C): bin2char.c 58 | ${CC_FOR_BUILD} ${CFLAGS_FOR_BUILD} $(srcdir)/bin2char.c -o $@ 59 | 60 | CLEANFILES = bin2char$(EXEEXT_FOR_BUILD) 61 | 62 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 63 | -------------------------------------------------------------------------------- /tcl/chip/st/spear/spear310.tcl: -------------------------------------------------------------------------------- 1 | # Specific init scripts for ST SPEAr310 system on chip 2 | # http://www.st.com/spear 3 | # 4 | # Date: 2010-09-23 5 | # Author: Antonio Borneo 6 | 7 | 8 | proc sp310_init {} { 9 | mww 0xfca80034 0x0000ffff # enable all RAS clocks 10 | mww 0xfca80040 0x00000000 # remove all RAS resets 11 | mww 0xb4000008 0x00002ff4 # RAS function enable 12 | 13 | mww 0xfca8013c 0x2f7bc210 # plgpio_pad_drv 14 | mww 0xfca80140 0x017bdef6 15 | } 16 | 17 | proc sp310_emi_init {} { 18 | # set EMI pad strength 19 | mmw 0xfca80134 0x0e000000 0x00000000 20 | mmw 0xfca80138 0x0e739ce7 0x00000000 21 | mmw 0xfca8013c 0x00039ce7 0x00000000 22 | 23 | # set safe EMI timing as in BootROM 24 | #mww 0x4f000000 0x0000000f # tAP_0_reg 25 | #mww 0x4f000004 0x00000000 # tSDP_0_reg 26 | #mww 0x4f000008 0x000000ff # tDPw_0_reg 27 | #mww 0x4f00000c 0x00000111 # tDPr_0_reg 28 | #mww 0x4f000010 0x00000002 # tDCS_0_reg 29 | 30 | # set fast EMI timing as in Linux 31 | mww 0x4f000000 0x00000010 # tAP_0_reg 32 | mww 0x4f000004 0x00000005 # tSDP_0_reg 33 | mww 0x4f000008 0x0000000a # tDPw_0_reg 34 | mww 0x4f00000c 0x0000000a # tDPr_0_reg 35 | mww 0x4f000010 0x00000005 # tDCS_0_re 36 | 37 | # 32bit wide, 8/16/32bit access 38 | mww 0x4f000014 0x0000000e # control_0_reg 39 | mww 0x4f000094 0x0000003f # ack_reg 40 | } 41 | -------------------------------------------------------------------------------- /testing/build.test1/Makefile.confuse: -------------------------------------------------------------------------------- 1 | # -*- mode: makefile -*- 2 | default: _complain_ 3 | include ./local.uses 4 | 5 | TARFILE_LOCAL=${VIRGINS}/confuse-${LIBCONFUSE_VERSION}.tar.gz 6 | TARFILE_URL =http://www.intra2net.com/de/produkte/opensource/ftdi/TGZ/confuse-${LIBCONFUSE_VERSION}.tar.gz 7 | 8 | CONFUSE_SRC_DIR =${HERE}/confuse-${LIBCONFUSE_VERSION} 9 | CONFUSE_BUILD_DIR =${HERE}/confuse-build 10 | 11 | download: 12 | wget -O ${TARFILE_LOCAL} ${TARFILE_URL} 13 | 14 | unpack: 15 | rm -rf ${CONFUSE_SRC_DIR} 16 | tar xfz ${TARFILE_LOCAL} 17 | 18 | clean:: 19 | rm -rf ${CONFUSE_SRC_DIR} 20 | 21 | configure: 22 | rm -rf ${CONFUSE_BUILD_DIR} 23 | mkdir ${CONFUSE_BUILD_DIR} 24 | cd ${CONFUSE_BUILD_DIR} && ${CONFUSE_SRC_DIR}/configure \ 25 | --prefix=${PREFIX} \ 26 | --exec-prefix=${EXEC_PREFIX} 27 | 28 | clean:: 29 | rm -rf ${CONFUSE_BUILD_DIR} 30 | 31 | build: 32 | cd ${CONFUSE_BUILD_DIR} && ${MAKE} 33 | 34 | install: 35 | cd ${CONFUSE_BUILD_DIR} && ${MAKE} install 36 | 37 | all: unpack configure build install 38 | 39 | _complain_: 40 | @echo "" 41 | @echo "Please try one of these targets: bootstrap, clean, configure, build, install" 42 | @echo " Or read the makefile and learn about the permutation test targets" 43 | @echo "" 44 | @echo "You also might find the download and unpack targets helpful." 45 | @echo "" 46 | @exit 1 47 | -------------------------------------------------------------------------------- /testing/examples/STR912Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :020000040400F6 2 | :10000000F8F09FE50000A0E10000A0E10000A0E101 3 | :100010000000A0E10000A0E10000A0E10000A0E1DC 4 | :100020000000A0E10000A0E11503A0E30410A0E39C 5 | :10003000001080E50210A0E3041080E50010A0E3AA 6 | :100040000C1080E50218A0E3101080E51810A0E362 7 | :10005000181080E5A8009FE5A8109FE5001080E536 8 | :100060000608A0E3110F2FEED7F021E398D09FE50B 9 | :10007000DBF021E394D09FE5D3F021E390D09FE51E 10 | :10008000D1F021E38CD09FE5D2F021E388D09FE529 11 | :100090001FF021E384D09FE584A09FE584109FE5B5 12 | :1000A00084209FE584309FE5030052E104009134F1 13 | :1000B00004008234FBFFFF3A0000A0E370109FE5CC 14 | :1000C0005C209FE5020051E104008134FCFFFF3A0F 15 | :1000D00060009FE560109FE5010050E10400000A08 16 | :1000E000042090E403002DE932FF2FE10300BDE876 17 | :1000F000F8FFFFEAFFFFFFEB100000EAA861000035 18 | :10010000040000043420005C97010000A40E0004E9 19 | :10011000A40E0004A40E0004A40A0004A40A00040F 20 | :10012000A4090004A4010004A4010004A401000423 21 | :10013000A4010004A4010004A0010004A001000423 22 | :100140000CD04DE20130A0E300308DE50230A0E399 23 | :1001500004308DE50030A0E308308DE538309FE5B0 24 | :10016000002093E500309DE5023083E000308DE50E 25 | :1001700000309DE5013083E200308DE504309DE5DF 26 | :10018000013083E204308DE500209DE504309DE5DB 27 | :10019000033082E008308DE5F4FFFFEAA00100049F 28 | :0401A0000700000054 29 | :0400000504000000F3 30 | :00000001FF 31 | -------------------------------------------------------------------------------- /tcl/target/omap5912.cfg: -------------------------------------------------------------------------------- 1 | # TI OMAP5912 dual core processor 2 | # http://focus.ti.com/docs/prod/folders/print/omap5912.html 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME omap5912 8 | } 9 | 10 | if { [info exists CPUTAPID ] } { 11 | set _CPUTAPID $CPUTAPID 12 | } else { 13 | # NOTE: validated with XOMAP5912 part 14 | set _CPUTAPID 0x0692602f 15 | } 16 | 17 | adapter_nsrst_delay 100 18 | 19 | # NOTE: presumes irlen 38 is the C55x DSP, matching BSDL for 20 | # its standalone siblings (like TMS320VC5502) of the same era 21 | 22 | #jtag scan chain 23 | jtag newtap $_CHIPNAME dsp -irlen 38 -expected-id 0x03df1d81 24 | jtag newtap $_CHIPNAME arm -irlen 4 -expected-id $_CPUTAPID 25 | jtag newtap $_CHIPNAME unknown -irlen 8 26 | 27 | set _TARGETNAME $_CHIPNAME.arm 28 | target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME 29 | 30 | proc omap5912_reset {} { 31 | # 32 | # halt target 33 | # 34 | poll 35 | sleep 1 36 | halt 37 | wait_halt 38 | # 39 | # disable wdt 40 | # 41 | mww 0xfffec808 0x000000f5 42 | mww 0xfffec808 0x000000a0 43 | 44 | mww 0xfffeb048 0x0000aaaa 45 | sleep 500 46 | mww 0xfffeb048 0x00005555 47 | sleep 500 48 | } 49 | 50 | # omap5912 lcd frame buffer as working area 51 | $_TARGETNAME configure -work-area-phys 0x20000000 \ 52 | -work-area-size 0x3e800 -work-area-backup 0 53 | -------------------------------------------------------------------------------- /tcl/target/sam7se512.cfg: -------------------------------------------------------------------------------- 1 | 2 | # ATMEL sam7se512 3 | # Example: the "Elektor Internet Radio" - EIR 4 | # http://www.ethernut.de/en/hardware/eir/index.html 5 | 6 | if { [info exists CHIPNAME] } { 7 | set _CHIPNAME $CHIPNAME 8 | } else { 9 | set _CHIPNAME sam7se512 10 | } 11 | 12 | if { [info exists ENDIAN] } { 13 | set _ENDIAN $ENDIAN 14 | } else { 15 | set _ENDIAN little 16 | } 17 | 18 | if { [info exists CPUTAPID ] } { 19 | set _CPUTAPID $CPUTAPID 20 | } else { 21 | # force an error till we get a good number 22 | set _CPUTAPID 0xffffffff 23 | } 24 | 25 | #use combined on interfaces or targets that can't set TRST/SRST separately 26 | reset_config srst_only srst_pulls_trst 27 | 28 | #jtag scan chain 29 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 30 | 31 | # The target 32 | set _TARGETNAME $_CHIPNAME.cpu 33 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi 34 | 35 | $_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 36 | 37 | #flash bank [ ] 38 | set _FLASHNAME $_CHIPNAME.flash 39 | flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432 40 | 41 | -------------------------------------------------------------------------------- /tcl/target/samsung_s3c2450.cfg: -------------------------------------------------------------------------------- 1 | # Target configuration for the Samsung 2450 system on chip 2 | # Processor : ARM926ejs (wb) rev 0 (v4l) 3 | # Info: JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F 4 | 5 | 6 | # FIX!!! what to use here? 7 | # 8 | # RCLK? 9 | # 10 | # adapter_khz 0 11 | # 12 | # Really low clock during reset? 13 | # 14 | # adapter_khz 1 15 | 16 | if { [info exists CHIPNAME] } { 17 | set _CHIPNAME $CHIPNAME 18 | } else { 19 | set _CHIPNAME s3c2450 20 | } 21 | 22 | if { [info exists ENDIAN] } { 23 | set _ENDIAN $ENDIAN 24 | } else { 25 | # this defaults to a bigendian 26 | set _ENDIAN little 27 | } 28 | 29 | if { [info exists CPUTAPID ] } { 30 | set _CPUTAPID $CPUTAPID 31 | } else { 32 | # force an error till we get a good number 33 | set _CPUTAPID 0x07926f0f 34 | } 35 | 36 | #jtag scan chain 37 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID 38 | 39 | set _TARGETNAME $_CHIPNAME.cpu 40 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 41 | 42 | # FIX!!!!! should this really use srst_pulls_trst? 43 | # With srst_pulls_trst "reset halt" will not reset into the 44 | # halted mode, but rather "reset run" and then halt the target. 45 | # 46 | # However, without "srst_pulls_trst", then "reset halt" produces weird 47 | # errors: 48 | # WARNING: unknown debug reason: 0x0 49 | reset_config trst_and_srst 50 | -------------------------------------------------------------------------------- /testing/build.test1/Makefile.libftdi: -------------------------------------------------------------------------------- 1 | # -*- mode: makefile -*- 2 | default: _complain_ 3 | include ./local.uses 4 | 5 | TARFILE_LOCAL = ${VIRGINS}/libftdi-${LIBFTDI_VERSION}.tar.gz 6 | TARFILE_URL = http://www.intra2net.com/de/produkte/opensource/ftdi/TGZ/libftdi-${LIBFTDI_VERSION}.tar.gz 7 | 8 | LIBFTDI_SRC_DIR = ${HERE}/libftdi-${LIBFTDI_VERSION} 9 | LIBFTDI_BUILD_DIR= ${HERE}/libftdi-build 10 | 11 | download: 12 | mkdir -p virgins 13 | wget -O ${TARFILE_LOCAL} ${TARFILE_URL} 14 | 15 | clean:: 16 | rm -rf ${LIBFTDI_SRC_DIR} 17 | 18 | unpack: 19 | tar xf ${TARFILE_LOCAL} 20 | 21 | PATH := ${EXEC_PREFIX}/bin:${PATH} 22 | export PATH 23 | 24 | clean:: 25 | rm -rf ${LIBFTDI_BUILD_DIR} 26 | 27 | configure: 28 | rm -rf ${LIBFTDI_BUILD_DIR} 29 | mkdir -p ${LIBFTDI_BUILD_DIR} 30 | cd ${LIBFTDI_BUILD_DIR} && ${LIBFTDI_SRC_DIR}/configure \ 31 | --prefix=${PREFIX} \ 32 | --exec-prefix=${EXEC_PREFIX} 33 | 34 | build: 35 | cd ${LIBFTDI_BUILD_DIR} && ${MAKE} 36 | 37 | install: 38 | cd ${LIBFTDI_BUILD_DIR} && ${MAKE} install 39 | 40 | all: unpack configure build install 41 | 42 | .PHONY: install 43 | 44 | _complain_: 45 | @echo "" 46 | @echo "Please try one of these targets: bootstrap, clean, configure, build, install" 47 | @echo " Or read the makefile and learn about the permutation test targets" 48 | @echo "" 49 | @echo "You also might find the download and unpack targets helpful." 50 | @echo "" 51 | @exit 1 52 | -------------------------------------------------------------------------------- /tcl/target/is5114.cfg: -------------------------------------------------------------------------------- 1 | # script for Insilica IS-5114 2 | # AKA: Atmel AT76C114 - an ARM946 chip 3 | # ATMEL sold his product line to Insilica... 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME is5114 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | # this defaults to a little endian 15 | set _ENDIAN little 16 | } 17 | 18 | if { [info exists CPUTAPID ] } { 19 | set _CPUTAPID $CPUTAPID 20 | } else { 21 | # force an error till we get a good number 22 | set _CPUTAPID 0xffffffff 23 | } 24 | 25 | # jtag speed. We need to stick to 16kHz until we've finished reset. 26 | jtag_rclk 16 27 | 28 | reset_config trst_and_srst 29 | 30 | # Do not specify a tap id here... 31 | jtag newtap $_CHIPNAME unknown1 -irlen 8 -ircapture 0x01 -irmask 1 32 | # This is the "arm946" chip. 33 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x0e -irmask 0xf 34 | jtag newtap $_CHIPNAME unknown2 -irlen 5 -ircapture 1 -irmask 1 35 | 36 | 37 | #arm946e-s and 38 | set _TARGETNAME $_CHIPNAME.cpu 39 | target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e 40 | 41 | $_TARGETNAME configure -event reset-start { jtag_rclk 16 } 42 | $_TARGETNAME configure -event reset-init { 43 | # We can increase speed now that we know the target is halted. 44 | jtag_rclk 3000 45 | } 46 | $_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 1 47 | -------------------------------------------------------------------------------- /tcl/target/imx51.cfg: -------------------------------------------------------------------------------- 1 | # Freescale i.MX51 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME imx51 7 | } 8 | 9 | # CoreSight Debug Access Port 10 | if { [info exists DAP_TAPID ] } { 11 | set _DAP_TAPID $DAP_TAPID 12 | } else { 13 | set _DAP_TAPID 0x1ba00477 14 | } 15 | 16 | jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \ 17 | -expected-id $_DAP_TAPID 18 | 19 | # SDMA / no IDCODE 20 | jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf 21 | 22 | # SJC 23 | if { [info exists SJC_TAPID ] } { 24 | set _SJC_TAPID SJC_TAPID 25 | } else { 26 | set _SJC_TAPID 0x0190c01d 27 | } 28 | 29 | jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \ 30 | -expected-id $_SJC_TAPID -ignore-version 31 | 32 | # GDB target: Cortex-A8, using DAP 33 | set _TARGETNAME $_CHIPNAME.cpu 34 | target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.DAP 35 | 36 | # some TCK tycles are required to activate the DEBUG power domain 37 | jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100" 38 | 39 | # have the DAP "always" be active 40 | jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP" 41 | 42 | proc imx51_dbginit {target} { 43 | # General Cortex A8 debug initialisation 44 | cortex_a8 dbginit 45 | } 46 | 47 | # Slow speed to be sure it will work 48 | jtag_rclk 1000 49 | $_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 } 50 | 51 | $_TARGETNAME configure -event reset-assert-post "imx51_dbginit $_TARGETNAME" 52 | -------------------------------------------------------------------------------- /src/jtag/drivers/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | noinst_LTLIBRARIES = libocdjtagdrivers.la 4 | 5 | libocdjtagdrivers_la_SOURCES = \ 6 | $(DRIVERFILES) 7 | 8 | DRIVERFILES = 9 | 10 | # Standard Driver: common files 11 | DRIVERFILES += driver.c 12 | 13 | if USB 14 | DRIVERFILES += usb_common.c 15 | endif 16 | 17 | if BITBANG 18 | DRIVERFILES += bitbang.c 19 | endif 20 | if PARPORT 21 | DRIVERFILES += parport.c 22 | endif 23 | if DUMMY 24 | DRIVERFILES += dummy.c 25 | endif 26 | if FT2232_DRIVER 27 | DRIVERFILES += ft2232.c 28 | endif 29 | if USB_BLASTER_DRIVER 30 | DRIVERFILES += usb_blaster.c 31 | endif 32 | if AMTJTAGACCEL 33 | DRIVERFILES += amt_jtagaccel.c 34 | endif 35 | if EP93XX 36 | DRIVERFILES += ep93xx.c 37 | endif 38 | if AT91RM9200 39 | DRIVERFILES += at91rm9200.c 40 | endif 41 | if GW16012 42 | DRIVERFILES += gw16012.c 43 | endif 44 | if BITQ 45 | DRIVERFILES += bitq.c 46 | endif 47 | if PRESTO_DRIVER 48 | DRIVERFILES += presto.c 49 | endif 50 | if USBPROG 51 | DRIVERFILES += usbprog.c 52 | endif 53 | if JLINK 54 | DRIVERFILES += jlink.c 55 | endif 56 | if RLINK 57 | DRIVERFILES += rlink.c rlink_speed_table.c 58 | endif 59 | if VSLLINK 60 | DRIVERFILES += vsllink.c 61 | endif 62 | if ARMJTAGEW 63 | DRIVERFILES += arm-jtag-ew.c 64 | endif 65 | if BUSPIRATE 66 | DRIVERFILES += buspirate.c 67 | endif 68 | 69 | noinst_HEADERS = \ 70 | bitbang.h \ 71 | bitq.h \ 72 | minidriver_imp.h \ 73 | rlink.h \ 74 | rlink_dtc_cmd.h \ 75 | rlink_ep1_cmd.h \ 76 | rlink_st7.h \ 77 | usb_common.h 78 | 79 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 80 | -------------------------------------------------------------------------------- /tcl/target/lpc2378.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lpc2378 7 | } 8 | 9 | if { [info exists CPUTAPID ] } { 10 | set _CPUTAPID $CPUTAPID 11 | } else { 12 | set _CPUTAPID 0x4f1f0f0f 13 | } 14 | 15 | #delays on reset lines 16 | adapter_nsrst_delay 200 17 | jtag_ntrst_delay 200 18 | 19 | # LPC2000 -> SRST causes TRST 20 | reset_config trst_and_srst srst_pulls_trst 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME 26 | 27 | # LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) 28 | $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0 29 | 30 | $_TARGETNAME configure -event reset-init { 31 | # Force target into ARM state 32 | arm core_state arm 33 | #do not remap 0x0000-0x0020 to anything but the flash 34 | mwb 0xE01FC040 0x01 35 | } 36 | 37 | # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader. 38 | # After reset the chip uses its internal 4MHz RC oscillator 39 | # flash bank lpc2000 0 0 [calc checksum] 40 | set _FLASHNAME $_CHIPNAME.flash 41 | flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum 42 | 43 | # 4MHz / 6 = 666kHz, so use 500 44 | adapter_khz 500 45 | -------------------------------------------------------------------------------- /tcl/target/tmpa900.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Toshiba TMPA910 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME tmpa910 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # force an error till we get a good number 21 | set _CPUTAPID 0x07926031 22 | } 23 | 24 | #TMPA910 has following IDs: 25 | # CP15.0 register 0x41069265 26 | # CP15.1 register 0x1d152152 27 | # ARM core 0x07926031 28 | 29 | 30 | # 31 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | 33 | #use combined on interfaces or targets that can't set TRST/SRST separately 34 | reset_config trst_and_srst 35 | adapter_nsrst_delay 20 36 | jtag_ntrst_delay 20 37 | 38 | ###################### 39 | # Target configuration 40 | ###################### 41 | 42 | set _TARGETNAME $_CHIPNAME.cpu 43 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 44 | 45 | # built-in RAM0 46 | #working_area 0 0xf8004000 0x4000 nobackup 47 | # built-in RAM1 48 | #working_area 1 0xf8008000 0x4000 nobackup 49 | # built-in RAM2 50 | #working_area 2 0xf800c000 0x4000 nobackup 51 | # built-in RAM 0-2 48k total 52 | #working_area 0 0xf8004000 0xc000 nobackup 53 | 54 | # Internal sram1 memory 55 | $_TARGETNAME configure -work-area-phys 0xf8004000 -work-area-size 0x8000 \ 56 | -work-area-backup 0 57 | -------------------------------------------------------------------------------- /tcl/target/tmpa910.cfg: -------------------------------------------------------------------------------- 1 | ###################################### 2 | # Target: Toshiba TMPA910 3 | ###################################### 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME tmpa910 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID ] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | # force an error till we get a good number 21 | set _CPUTAPID 0x07926031 22 | } 23 | 24 | #TMPA910 has following IDs: 25 | # CP15.0 register 0x41069265 26 | # CP15.1 register 0x1d152152 27 | # ARM core 0x07926031 28 | 29 | 30 | # 31 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | 33 | #use combined on interfaces or targets that can't set TRST/SRST separately 34 | reset_config trst_and_srst 35 | adapter_nsrst_delay 20 36 | jtag_ntrst_delay 20 37 | 38 | ###################### 39 | # Target configuration 40 | ###################### 41 | 42 | set _TARGETNAME $_CHIPNAME.cpu 43 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 44 | 45 | # built-in RAM0 46 | #working_area 0 0xf8004000 0x4000 nobackup 47 | # built-in RAM1 48 | #working_area 1 0xf8008000 0x4000 nobackup 49 | # built-in RAM2 50 | #working_area 2 0xf800c000 0x4000 nobackup 51 | # built-in RAM 0-2 48k total 52 | #working_area 0 0xf8004000 0xc000 nobackup 53 | 54 | # Internal sram1 memory 55 | $_TARGETNAME configure -work-area-phys 0xf8004000 -work-area-size 0xc000 \ 56 | -work-area-backup 0 57 | -------------------------------------------------------------------------------- /src/jtag/Makefile.am: -------------------------------------------------------------------------------- 1 | include $(top_srcdir)/common.mk 2 | 3 | METASOURCES = AUTO 4 | noinst_LTLIBRARIES = libjtag.la 5 | 6 | SUBDIRS = 7 | DRIVERFILES = 8 | libjtag_la_LIBADD = 9 | 10 | CLEANFILES = 11 | 12 | BUILT_SOURCES = 13 | 14 | BUILT_SOURCES += minidriver_imp.h 15 | CLEANFILES += minidriver_imp.h 16 | 17 | if MINIDRIVER 18 | 19 | if ZY1000 20 | DRIVERFILES += zy1000/zy1000.c 21 | JTAG_MINIDRIVER_DIR = $(srcdir)/zy1000 22 | endif 23 | if MINIDRIVER_DUMMY 24 | DRIVERFILES += minidummy/minidummy.c commands.c 25 | JTAG_MINIDRIVER_DIR = $(srcdir)/minidummy 26 | endif 27 | 28 | MINIDRIVER_IMP_DIR = $(srcdir)/minidriver 29 | 30 | jtag_minidriver.h: $(JTAG_MINIDRIVER_DIR)/jtag_minidriver.h 31 | cp $< $@ 32 | 33 | BUILT_SOURCES += jtag_minidriver.h 34 | 35 | CLEANFILES += jtag_minidriver.h 36 | 37 | else 38 | 39 | MINIDRIVER_IMP_DIR = $(srcdir)/drivers 40 | DRIVERFILES += commands.c 41 | 42 | SUBDIRS += drivers 43 | libjtag_la_LIBADD += $(top_builddir)/src/jtag/drivers/libocdjtagdrivers.la 44 | 45 | endif 46 | 47 | # endif // MINIDRIVER 48 | 49 | minidriver_imp.h: $(MINIDRIVER_IMP_DIR)/minidriver_imp.h 50 | cp $< $@ 51 | 52 | 53 | libjtag_la_SOURCES = \ 54 | adapter.c \ 55 | core.c \ 56 | interface.c \ 57 | interfaces.c \ 58 | tcl.c \ 59 | transport.c \ 60 | $(DRIVERFILES) 61 | 62 | noinst_HEADERS = \ 63 | commands.h \ 64 | driver.h \ 65 | interface.h \ 66 | interfaces.h \ 67 | minidriver.h \ 68 | jtag.h \ 69 | transport.h \ 70 | minidriver/minidriver_imp.h \ 71 | minidummy/jtag_minidriver.h 72 | 73 | EXTRA_DIST = startup.tcl 74 | 75 | MAINTAINERCLEANFILES = $(srcdir)/Makefile.in 76 | -------------------------------------------------------------------------------- /tcl/board/imx27lnst.cfg: -------------------------------------------------------------------------------- 1 | # The Linuxstamp-mx27 is board has a single IMX27 chip 2 | # For further info see http://opencircuits.com/Linuxstamp_mx27#OpenOCD 3 | source [find target/imx27.cfg] 4 | $_TARGETNAME configure -event gdb-attach { reset init } 5 | $_TARGETNAME configure -event reset-init { imx27lnst_init } 6 | 7 | proc imx27lnst_init { } { 8 | # This setup puts RAM at 0xA0000000 9 | 10 | # reset the board correctly 11 | adapter_khz 500 12 | reset run 13 | reset halt 14 | 15 | mww 0x10000000 0x20040304 16 | mww 0x10020000 0x00000000 17 | mww 0x10000004 0xDFFBFCFB 18 | mww 0x10020004 0xFFFFFFFF 19 | 20 | sleep 100 21 | 22 | # ======================================== 23 | # Configure DDR on CSD0 -- initial reset 24 | # ======================================== 25 | mww 0xD8001010 0x00000008 26 | 27 | sleep 100 28 | 29 | # ======================================== 30 | # Configure DDR on CSD0 -- wait 5000 cycle 31 | # ======================================== 32 | mww 0x10027828 0x55555555 33 | mww 0x10027830 0x55555555 34 | mww 0x10027834 0x55555555 35 | mww 0x10027838 0x00005005 36 | mww 0x1002783C 0x15555555 37 | 38 | mww 0xD8001010 0x00000004 39 | 40 | mww 0xD8001004 0x00795729 41 | 42 | #mww 0xD8001000 0x92200000 43 | mww 0xD8001000 0x91120000 44 | mww 0xA0000F00 0x0 45 | 46 | #mww 0xD8001000 0xA2200000 47 | mww 0xD8001000 0xA1120000 48 | mww 0xA0000F00 0x0 49 | mww 0xA0000F00 0x0 50 | 51 | #mww 0xD8001000 0xB2200000 52 | mww 0xD8001000 0xB1120000 53 | mwb 0xA0000033 0xFF 54 | mwb 0xA1000000 0xAA 55 | 56 | #mww 0xD8001000 0x82228085 57 | mww 0xD8001000 0x81128080 58 | 59 | } 60 | -------------------------------------------------------------------------------- /testing/build.test1/Makefile.libusb: -------------------------------------------------------------------------------- 1 | # -*- mode: makefile -*- 2 | default: _complain_ 3 | 4 | include ./local.uses 5 | 6 | ifeq (x"$BUILD_SYSNAME",x"cygwin") 7 | $(error Please use the Win32 specific port of LibUSB not the Unix version) 8 | endif 9 | ifeq (x"$BUILD_SYSNAME",x"mingw32") 10 | $(error Please use the win32 specific port of LibUSB not the Unix version) 11 | endif 12 | 13 | TARFILE_LOCAL = ${VIRGINS}/libusb-${LIBUSB_VERSION_linux}.tar.bz2 14 | TARFILE_URL = http://downloads.sourceforge.net/libusb/libusb-${LIBUSB_VERSION_linux}.tar.gz 15 | 16 | LIBUSB_SRC_DIR = ${HERE}/libusb-${LIBUSB_VERSION} 17 | LIBUSB_BUILD_DIR = ${HERE}/libusb-build 18 | 19 | download: 20 | wget -O ${TARFILE_LOCAL} ${TARFILE_URL} 21 | 22 | unpack: 23 | rm -rf ${LIBUSB_SRC_DIR} 24 | tar xfz ${TARFILE_LOCAL} 25 | 26 | clean:: 27 | rm -rf ${LIBUSB_SRC_DIR} 28 | 29 | configure: 30 | rm -rf ${LIBUSB_BUILD_DIR} 31 | mkdir -p ${LIBUSB_BUILD_DIR} 32 | cd ${LIBUSB_BUILD_DIR} && ${LIBUSB_SRC_DIR}/configure \ 33 | --prefix=${PREFIX} --exec-prefix=${EXEC_PREFIX} 34 | 35 | clean:: 36 | rm -rf ${LIBUSB_BUILD_DIR} 37 | 38 | build: 39 | cd ${LIBUSB_BUILD_DIR} && ${MAKE} 40 | 41 | install: 42 | cd ${LIBUSB_BUILD_DIR} && ${MAKE} install 43 | 44 | all: unpack configure build install 45 | 46 | .PHONY: install 47 | 48 | _complain_: 49 | @echo "" 50 | @echo "Please try one of these targets: bootstrap, clean, configure, build, install" 51 | @echo " Or read the makefile and learn about the permutation test targets" 52 | @echo "" 53 | @echo "You also might find the download and unpack targets helpful." 54 | @echo "" 55 | @exit 1 56 | -------------------------------------------------------------------------------- /tcl/target/imx35.cfg: -------------------------------------------------------------------------------- 1 | # imx35 config 2 | # 3 | 4 | reset_config trst_and_srst srst_gates_jtag 5 | jtag_ntrst_delay 100 6 | 7 | if { [info exists CHIPNAME] } { 8 | set _CHIPNAME $CHIPNAME 9 | } else { 10 | set _CHIPNAME imx35 11 | } 12 | 13 | if { [info exists ENDIAN] } { 14 | set _ENDIAN $ENDIAN 15 | } else { 16 | set _ENDIAN little 17 | } 18 | 19 | if { [info exists CPUTAPID ] } { 20 | set _CPUTAPID $CPUTAPID 21 | } else { 22 | set _CPUTAPID 0x07b3601d 23 | } 24 | 25 | if { [info exists SDMATAPID ] } { 26 | set _SDMATAPID $SDMATAPID 27 | } else { 28 | set _SDMATAPID 0x0882601d 29 | } 30 | 31 | if { [info exists ETBTAPID ] } { 32 | set _ETBTAPID $ETBTAPID 33 | } else { 34 | set _ETBTAPID 0x2b900f0f 35 | } 36 | 37 | #======================================== 38 | 39 | jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID 40 | jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID 41 | 42 | # No IDCODE for this TAP 43 | jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected-id 0x0 44 | 45 | jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID 46 | 47 | set _TARGETNAME $_CHIPNAME.cpu 48 | target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME 49 | 50 | proc power_restore {} { echo "Sensed power restore. No action." } 51 | proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." } 52 | 53 | # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode 54 | etm config $_TARGETNAME 16 normal full etb 55 | etb config $_TARGETNAME $_CHIPNAME.etb 56 | -------------------------------------------------------------------------------- /src/helper/util.h: -------------------------------------------------------------------------------- 1 | /*************************************************************************** 2 | * Copyright (C) 2010 by Øyvind Harboe * 3 | * * 4 | * This program is free software; you can redistribute it and/or modify * 5 | * it under the terms of the GNU General Public License as published by * 6 | * the Free Software Foundation; either version 2 of the License, or * 7 | * (at your option) any later version. * 8 | * * 9 | * This program is distributed in the hope that it will be useful, * 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 12 | * GNU General Public License for more details. * 13 | * * 14 | * You should have received a copy of the GNU General Public License * 15 | * along with this program; if not, write to the * 16 | * Free Software Foundation, Inc., * 17 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 18 | ***************************************************************************/ 19 | 20 | #ifndef HELPER_UTILS_H 21 | #define HELPER_UTILS_H 22 | 23 | struct command_context; 24 | 25 | int util_init(struct command_context *cmd_ctx); 26 | 27 | #endif // HELPER_UTILS_H 28 | -------------------------------------------------------------------------------- /tcl/target/pxa270.cfg: -------------------------------------------------------------------------------- 1 | #Marvell/Intel PXA270 Script 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME pxa270 7 | } 8 | 9 | if { [info exists ENDIAN] } { 10 | set _ENDIAN $ENDIAN 11 | } else { 12 | set _ENDIAN little 13 | } 14 | 15 | #IDs for pxa270. Are there more? 16 | if { [info exists CPUTAPID ] } { 17 | set _CPUTAPID $CPUTAPID 18 | } else { 19 | # set useful default 20 | set _CPUTAPID 0x49265013 21 | } 22 | 23 | if { [info exists CPUTAPID2 ] } { 24 | set _CPUTAPID2 $CPUTAPID2 25 | } else { 26 | # set useful default 27 | set _CPUTAPID2 0x79265013 28 | } 29 | 30 | if { [info exists CPUTAPID3 ] } { 31 | set _CPUTAPID2 $CPUTAPID3 32 | } else { 33 | # set useful default 34 | set _CPUTAPID3 0x89265013 35 | } 36 | 37 | # set adapter_nsrst_delay to the delay introduced by your reset circuit 38 | # the rest of the needed delays are built into the openocd program 39 | adapter_nsrst_delay 260 40 | # set the jtag_ntrst_delay to the delay introduced by a reset circuit 41 | # the rest of the needed delays are built into the openocd program 42 | jtag_ntrst_delay 250 43 | 44 | set _TARGETNAME $_CHIPNAME.cpu 45 | jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 46 | 47 | target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x 48 | # maps to PXA internal RAM. If you are using a PXA255 49 | # you must initialize SDRAM or leave this option off 50 | $_TARGETNAME configure -work-area-phys 0x5c000000 -work-area-size 0x10000 -work-area-backup 0 51 | -------------------------------------------------------------------------------- /tcl/target/lpc2478.cfg: -------------------------------------------------------------------------------- 1 | # NXP LPC2478 ARM7TDMI-S with 512kB Flash and 64kB Local On-Chip SRAM (98kB total), clocked with 4MHz internal RC oscillator 2 | 3 | if { [info exists CHIPNAME] } { 4 | set _CHIPNAME $CHIPNAME 5 | } else { 6 | set _CHIPNAME lpc2478 7 | } 8 | 9 | if { [info exists CPUTAPID ] } { 10 | set _CPUTAPID $CPUTAPID 11 | } else { 12 | set _CPUTAPID 0x4f1f0f0f 13 | } 14 | 15 | #delays on reset lines 16 | adapter_nsrst_delay 100 17 | jtag_ntrst_delay 100 18 | 19 | # LPC2000 -> SRST causes TRST 20 | reset_config trst_and_srst srst_pulls_trst 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME 26 | 27 | # LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM) 28 | $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0 29 | 30 | $_TARGETNAME configure -event reset-init { 31 | # Force target into ARM state 32 | arm core_state arm 33 | # Do not remap 0x0000-0x0020 to anything but the Flash 34 | mwb 0xE01FC040 0x01 35 | } 36 | 37 | # LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader. 38 | # After reset the chip uses its internal 4MHz RC oscillator. 39 | # flash bank lpc2000 0 0 [calc checksum] 40 | set _FLASHNAME $_CHIPNAME.flash 41 | flash bank $_FLASHNAME lpc2000 0x0 0x7D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum 42 | 43 | # Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500. 44 | jtag_rclk 500 45 | -------------------------------------------------------------------------------- /src/helper/ioutil.h: -------------------------------------------------------------------------------- 1 | /*************************************************************************** 2 | * Copyright (C) 2009 Zachary T Welch * 3 | * * 4 | * This program is free software; you can redistribute it and/or modify * 5 | * it under the terms of the GNU General Public License as published by * 6 | * the Free Software Foundation; either version 2 of the License, or * 7 | * (at your option) any later version. * 8 | * * 9 | * This program is distributed in the hope that it will be useful, * 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 12 | * GNU General Public License for more details. * 13 | * * 14 | * You should have received a copy of the GNU General Public License * 15 | * along with this program; if not, write to the * 16 | * Free Software Foundation, Inc., * 17 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 18 | ***************************************************************************/ 19 | 20 | #ifndef HELPER_IOUTILS_H 21 | #define HELPER_IOUTILS_H 22 | 23 | struct command_context; 24 | 25 | int ioutil_init(struct command_context *cmd_ctx); 26 | 27 | #endif // HELPER_IOUTILS_H 28 | -------------------------------------------------------------------------------- /tcl/chip/atmel/at91/rtt.tcl: -------------------------------------------------------------------------------- 1 | 2 | set RTTC_RTMR [expr $AT91C_BASE_RTTC + 0x00] 3 | set RTTC_RTAR [expr $AT91C_BASE_RTTC + 0x04] 4 | set RTTC_RTVR [expr $AT91C_BASE_RTTC + 0x08] 5 | set RTTC_RTSR [expr $AT91C_BASE_RTTC + 0x0c] 6 | global RTTC_RTMR 7 | global RTTC_RTAR 8 | global RTTC_RTVR 9 | global RTTC_RTSR 10 | 11 | proc show_RTTC_RTMR_helper { NAME ADDR VAL } { 12 | set rtpres [expr $VAL & 0x0ffff] 13 | global BIT16 BIT17 14 | if { $rtpres == 0 } { 15 | set rtpres 65536; 16 | } 17 | global AT91C_SLOWOSC_FREQ 18 | # Nasty hack, make this a float by tacking a .0 on the end 19 | # otherwise, jim makes the value an integer 20 | set f [expr $AT91C_SLOWOSC_FREQ.0 / $rtpres.0] 21 | echo [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f] 22 | if { $VAL & $BIT16 } { 23 | echo "\tBit16 -> Alarm IRQ Enabled" 24 | } else { 25 | echo "\tBit16 -> Alarm IRQ Disabled" 26 | } 27 | if { $VAL & $BIT17 } { 28 | echo "\tBit17 -> RTC Inc IRQ Enabled" 29 | } else { 30 | echo "\tBit17 -> RTC Inc IRQ Disabled" 31 | } 32 | # Bit 18 is write only. 33 | } 34 | 35 | proc show_RTTC_RTSR_helper { NAME ADDR VAL } { 36 | global BIT0 BIT1 37 | if { $VAL & $BIT0 } { 38 | echo "\tBit0 -> ALARM PENDING" 39 | } else { 40 | echo "\tBit0 -> alarm not pending" 41 | } 42 | if { $VAL & $BIT1 } { 43 | echo "\tBit0 -> RTINC PENDING" 44 | } else { 45 | echo "\tBit0 -> rtinc not pending" 46 | } 47 | } 48 | 49 | proc show_RTTC { } { 50 | 51 | show_mmr32_reg RTTC_RTMR 52 | show_mmr32_reg RTTC_RTAR 53 | show_mmr32_reg RTTC_RTVR 54 | show_mmr32_reg RTTC_RTSR 55 | } 56 | 57 | -------------------------------------------------------------------------------- /tcl/target/pxa255.cfg: -------------------------------------------------------------------------------- 1 | # PXA255 chip ... originally from Intel, PXA line was sold to Marvell. 2 | # This chip is now at end-of-life. Final orders have been taken. 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME pxa255 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | set _ENDIAN little 14 | } 15 | 16 | if { [info exists CPUTAPID ] } { 17 | set _CPUTAPID $CPUTAPID 18 | } else { 19 | set _CPUTAPID 0x69264013 20 | } 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | target create $_TARGETNAME xscale -endian $_ENDIAN \ 26 | -chain-position $_CHIPNAME.cpu 27 | 28 | # PXA255 comes out of reset using 3.6864 MHz oscillator. 29 | # Until the PLL kicks in, keep the JTAG clock slow enough 30 | # that we get no errors. 31 | adapter_khz 300 32 | $_TARGETNAME configure -event "reset-start" { adapter_khz 300 } 33 | 34 | # both TRST and SRST are *required* for debug 35 | # DCSR is often accessed with SRST active 36 | reset_config trst_and_srst separate srst_nogate 37 | 38 | # reset processing that works with PXA 39 | proc init_reset {mode} { 40 | # assert both resets; equivalent to power-on reset 41 | jtag_reset 1 1 42 | 43 | # drop TRST after at least 32 cycles 44 | sleep 1 45 | jtag_reset 0 1 46 | 47 | # minimum 32 TCK cycles to wake up the controller 48 | runtest 50 49 | 50 | # now the TAP will be responsive; validate scanchain 51 | jtag arp_init 52 | 53 | # ... and take it out of reset 54 | jtag_reset 0 0 55 | } 56 | 57 | proc jtag_init {} { 58 | init_reset startup 59 | } 60 | -------------------------------------------------------------------------------- /PATCHES.txt: -------------------------------------------------------------------------------- 1 | // This file is part of the Doxygen Developer Manual 2 | /** @page patchguide Patch Guidelines 3 | 4 | Please mail patches to: @par 5 | openocd-development@lists.berlios.de 6 | 7 | Note that you can't send patches to that list unless 8 | you're a member, despite what the list info page says. 9 | 10 | @section Patch Guidelines in a Nutshell 11 | 12 | Your patches should be against git mainline. Submit output 13 | of "git diff"; equivalently, quilt patches are OK. 14 | 15 | It should be a "good patch": focus it on a single 16 | issue, and make it be easily reviewable. Don't make 17 | it so large that it's hard to review; split large 18 | patches into smaller ones. (That can also help 19 | track down bugs later on.) All patches should 20 | be "clean", which includes preserving the existing 21 | coding style and updating documentation as needed.j 22 | 23 | Attach the patch to the email as a .txt file and 24 | also write a short change log entry that maintainers 25 | can copy and paste into the commit message 26 | 27 | Say if it's a bugfix (describe the bug) or a new 28 | feature. Don't expect patches to merge immediately 29 | for the next release. Be ready to rework patches 30 | in response to feedback. 31 | 32 | Add yourself to the GPL copyright for non-trivial changes. 33 | 34 | To create a patch from the command line: 35 | @code 36 | git diff >mypatch.txt 37 | @endcode 38 | 39 | @section More Information on Patching 40 | 41 | The @ref primerpatches provides a more complete guide to creating, 42 | managing, and contributing patches to the OpenOCD project. 43 | 44 | */ 45 | /** @file 46 | This file contains the @ref patchguide page. 47 | */ 48 | -------------------------------------------------------------------------------- /tcl/target/str730.cfg: -------------------------------------------------------------------------------- 1 | #STR730 CPU 2 | 3 | adapter_khz 3000 4 | 5 | if { [info exists CHIPNAME] } { 6 | set _CHIPNAME $CHIPNAME 7 | } else { 8 | set _CHIPNAME str730 9 | } 10 | 11 | if { [info exists ENDIAN] } { 12 | set _ENDIAN $ENDIAN 13 | } else { 14 | set _ENDIAN little 15 | } 16 | 17 | if { [info exists CPUTAPID] } { 18 | set _CPUTAPID $CPUTAPID 19 | } else { 20 | set _CPUTAPID 0x3f0f0f0f 21 | } 22 | 23 | #use combined on interfaces or targets that can't set TRST/SRST separately 24 | reset_config trst_and_srst srst_pulls_trst 25 | 26 | #jtag scan chain 27 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID 28 | 29 | #jtag nTRST and nSRST delay 30 | adapter_nsrst_delay 500 31 | jtag_ntrst_delay 500 32 | 33 | set _TARGETNAME $_CHIPNAME.cpu 34 | target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi 35 | 36 | $_TARGETNAME configure -event reset-start { adapter_khz 10 } 37 | $_TARGETNAME configure -event reset-init { 38 | adapter_khz 3000 39 | 40 | # Because the hardware cannot be interrogated for the protection state 41 | # of sectors, initialize all the sectors to be unprotected. The initial 42 | # state is reflected by the driver, too. 43 | flash protect 0 0 last off 44 | } 45 | $_TARGETNAME configure -event gdb-flash-erase-start { 46 | flash protect 0 0 7 off 47 | } 48 | 49 | $_TARGETNAME configure -work-area-phys 0xA0000000 -work-area-size 0x4000 -work-area-backup 0 50 | 51 | #flash bank 52 | set _FLASHNAME $_CHIPNAME.flash 53 | flash bank $_FLASHNAME str7x 0x80000000 0x00040000 0 0 $_TARGETNAME STR3x 54 | 55 | -------------------------------------------------------------------------------- /tcl/target/imx27.cfg: -------------------------------------------------------------------------------- 1 | # page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3" 2 | # SRST pulls TRST 3 | # 4 | # Without setting these options correctly you'll see all sorts 5 | # of weird errors, e.g. MOE=0xe, invalid cpsr values, reset 6 | # failing, etc. 7 | reset_config trst_and_srst srst_pulls_trst 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME imx27 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | 22 | # Note above there are 2 taps 23 | 24 | # trace buffer 25 | if { [info exists ETBTAPID ] } { 26 | set _ETBTAPID $ETBTAPID 27 | } else { 28 | set _ETBTAPID 0x1b900f0f 29 | } 30 | jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID 31 | 32 | # The CPU tap 33 | if { [info exists CPUTAPID ] } { 34 | set _CPUTAPID $CPUTAPID 35 | } else { 36 | set _CPUTAPID 0x07926121 37 | } 38 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 39 | 40 | # Create the GDB Target. 41 | set _TARGETNAME $_CHIPNAME.cpu 42 | target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs 43 | # REVISIT what operating environment sets up this virtual address mapping? 44 | $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \ 45 | -work-area-size 0x8000 -work-area-backup 1 46 | # Internal to the chip, there is 45K of SRAM 47 | # 48 | 49 | arm7_9 dcc_downloads enable 50 | 51 | # trace setup 52 | etm config $_TARGETNAME 16 normal full etb 53 | etb config $_TARGETNAME $_CHIPNAME.etb 54 | -------------------------------------------------------------------------------- /tcl/target/sam7x256.cfg: -------------------------------------------------------------------------------- 1 | #use combined on interfaces or targets that can't set TRST/SRST separately 2 | reset_config srst_only srst_pulls_trst 3 | 4 | if { [info exists CHIPNAME] } { 5 | set _CHIPNAME $CHIPNAME 6 | } else { 7 | set _CHIPNAME sam7x256 8 | } 9 | 10 | if { [info exists ENDIAN] } { 11 | set _ENDIAN $ENDIAN 12 | } else { 13 | set _ENDIAN little 14 | } 15 | 16 | if { [info exists CPUTAPID ] } { 17 | set _CPUTAPID $CPUTAPID 18 | } else { 19 | set _CPUTAPID 0x3f0f0f0f 20 | } 21 | 22 | jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 23 | 24 | set _TARGETNAME $_CHIPNAME.cpu 25 | target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi 26 | 27 | $_TARGETNAME configure -event reset-init { 28 | # disable watchdog 29 | mww 0xfffffd44 0x00008000 30 | # enable user reset 31 | mww 0xfffffd08 0xa5000001 32 | # CKGR_MOR : enable the main oscillator 33 | mww 0xfffffc20 0x00000601 34 | sleep 10 35 | # CKGR_PLLR: 96.1097 MHz 36 | mww 0xfffffc2c 0x00481c0e 37 | sleep 10 38 | # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz 39 | mww 0xfffffc30 0x00000007 40 | sleep 10 41 | # MC_FMR: flash mode (FWS=1,FMCN=60) 42 | mww 0xffffff60 0x003c0100 43 | sleep 100 44 | } 45 | 46 | $_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0 47 | 48 | #flash bank [ ] 49 | set _FLASHNAME $_CHIPNAME.flash 50 | flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 18432 51 | -------------------------------------------------------------------------------- /src/server/server_stubs.c: -------------------------------------------------------------------------------- 1 | /*************************************************************************** 2 | * Copyright (C) 2009 Zachary T Welch * 3 | * * 4 | * This program is free software; you can redistribute it and/or modify * 5 | * it under the terms of the GNU General Public License as published by * 6 | * the Free Software Foundation; either version 2 of the License, or * 7 | * (at your option) any later version. * 8 | * * 9 | * This program is distributed in the hope that it will be useful, * 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 12 | * GNU General Public License for more details. * 13 | * * 14 | * You should have received a copy of the GNU General Public License * 15 | * along with this program; if not, write to the * 16 | * Free Software Foundation, Inc., * 17 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 18 | ***************************************************************************/ 19 | 20 | #ifdef HAVE_CONFIG_H 21 | #include 22 | #endif 23 | #include "server.h" 24 | 25 | void openocd_sleep_prelude(void) 26 | { 27 | // no-op 28 | } 29 | void openocd_sleep_postlude(void) 30 | { 31 | // no-op 32 | } 33 | -------------------------------------------------------------------------------- /src/server/tcl_server.h: -------------------------------------------------------------------------------- 1 | /*************************************************************************** 2 | * Copyright (C) 2008 * 3 | * * 4 | * This program is free software; you can redistribute it and/or modify * 5 | * it under the terms of the GNU General Public License as published by * 6 | * the Free Software Foundation; either version 2 of the License, or * 7 | * (at your option) any later version. * 8 | * * 9 | * This program is distributed in the hope that it will be useful, * 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 12 | * GNU General Public License for more details. * 13 | * * 14 | * You should have received a copy of the GNU General Public License * 15 | * along with this program; if not, write to the * 16 | * Free Software Foundation, Inc., * 17 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * 18 | ***************************************************************************/ 19 | 20 | #ifndef _TCL_SERVER_H_ 21 | #define _TCL_SERVER_H_ 22 | 23 | #include 24 | 25 | int tcl_init(void); 26 | int tcl_register_commands(struct command_context *cmd_ctx); 27 | 28 | #endif /* _TCL_SERVER_H_ */ 29 | -------------------------------------------------------------------------------- /testing/build.test2/README.txt: -------------------------------------------------------------------------------- 1 | 2 | This makefile is how I Duane Ellis (openocd@duaneellis.com) builds 3 | openocd test purposes on Cygwin. I have included it here so others 4 | might also make use of the same configuration that I use to develop 5 | Openocd. 6 | 7 | --Duane Ellis 8 | 9 | To make use of it do the following: 10 | 11 | (1) Check out openocd in the standard way. 12 | 13 | For example - in cygwin, type this: 14 | 15 | bash$ mkdir -p /home/duane/test 16 | bash$ cd /home/duane/test 17 | bash$ svn co https://svn.berlios.de/svnroot/repos/openocd/trunk openocd 18 | 19 | (2) COPY this folder "right above" where you have OpenOCD. 20 | 21 | bash$ cd /home/duane/test 22 | bash$ cp ./openocd/testing/build.test2/* /home/duane/test/. 23 | 24 | (3) OPTIONALLY 25 | 26 | You might want to review the file "local.uses" 27 | Change options and so forth at the top of the file. 28 | 29 | (4) Initially, you need to download some additional files. 30 | These include "libftdi", "libconfuse", and the ftd2xx drivers. 31 | 32 | (5) You also need to build the supporting libraries and install them 33 | (They are installed "locally" only) 34 | 35 | Type this command: 36 | 37 | bash$ cd /home/duane/test 38 | 39 | bash$ make initial.build 40 | 41 | which: (1) downloads files 42 | (2) builds the libs 43 | (3) builds OpenOCD 44 | 45 | (6) As you hack upon OpenOCD... to rebuild OpenOCD... 46 | 47 | bash$ cd /home/duane/test 48 | 49 | bash$ make remake 50 | 51 | which: (1) re-bootstraps 52 | (2) re-configures 53 | (3) re-builds 54 | (4) re-installs. 55 | 56 | ======= 57 | **END** 58 | ======= 59 | 60 | -------------------------------------------------------------------------------- /testing/examples/STR710Test/test_ram.hex: -------------------------------------------------------------------------------- 1 | :020000042000DA 2 | :100000000000A0E10000A0E10000A0E10000A0E1EC 3 | :100010000000A0E10000A0E10000A0E10000A0E1DC 4 | :100020000A02A0E304119FE5501080E50A02A0E354 5 | :100030000010A0E3441080E50A02A0E30010A0E352 6 | :100040000A02A0E37310A0E3181080E5081090E501 7 | :10005000020011E3FCFFFF0A0A02A0E3D0109FE5B3 8 | :10006000081080E5DBF021E3C8D09FE5D7F021E35D 9 | :10007000C4D09FE5D1F021E3C0D09FE5D2F021E3C9 10 | :10008000BCD09FE5D3F021E3B8D09FE5B8109FE541 11 | :10009000B8209FE5B8309FE5030052E10400913499 12 | :1000A00004008234FBFFFF3A0000A0E3A4109FE5A8 13 | :1000B000A4209FE5020051E104008134FCFFFF3AD7 14 | :1000C00098009FE598109FE5010050E10500000AA7 15 | :1000D000042090E403002DE90FE0A0E102F0A0E18C 16 | :1000E0000300BDE8F7FFFFEA00000FE1C000C0E336 17 | :1000F00000F029E10000A0E30010A0E364209FE5E8 18 | :100100000FE0A0E112FF2FE10000A0E10000A0E15C 19 | :100110000000A0E1FBFFFFEAFEFFFFEAFEFFFFEAAF 20 | :10012000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA37 21 | :10013000C201000009800000100F0020100F0020F5 22 | :10014000100B0020100B0020100F002010020020C8 23 | :1001500010020020100200201002002010020020D7 24 | :100160000C0200200C0200206C0100200CD04DE29B 25 | :100170000130A0E300308DE50230A0E304308DE5CE 26 | :100180000030A0E308308DE538309FE5002093E58E 27 | :1001900000309DE5023083E000308DE500309DE5C4 28 | :1001A000013083E200308DE504309DE5013083E2CB 29 | :1001B00004308DE500209DE504309DE5033082E0AC 30 | :0C01C00008308DE5F4FFFFEA0C0200207F 31 | :1001CC0018F09FE518F09FE518F09FE518F09FE5F3 32 | :1001DC0018F09FE518F09FE518F09FE518F09FE5E3 33 | :1001EC0000000020180100201C010020200100202C 34 | :1001FC002401002000000000280100202C01002018 35 | :04020C0007000000E7 36 | :0400000520000000D7 37 | :00000001FF 38 | --------------------------------------------------------------------------------