├── .cproject
├── .gitignore
├── .mxproject
├── .project
├── .settings
├── com.atollic.truestudio.debug.hardware_device.prefs
├── language.settings.xml
└── org.eclipse.cdt.managedbuilder.core.prefs
├── Drivers
├── CMSIS
│ ├── Device
│ │ └── ST
│ │ │ └── STM32F4xx
│ │ │ └── Include
│ │ │ ├── stm32f407xx.h
│ │ │ ├── stm32f4xx.h
│ │ │ └── system_stm32f4xx.h
│ └── Include
│ │ ├── arm_common_tables.h
│ │ ├── arm_const_structs.h
│ │ ├── arm_math.h
│ │ ├── cmsis_armcc.h
│ │ ├── cmsis_armcc_V6.h
│ │ ├── cmsis_gcc.h
│ │ ├── core_cm0.h
│ │ ├── core_cm0plus.h
│ │ ├── core_cm3.h
│ │ ├── core_cm4.h
│ │ ├── core_cm7.h
│ │ ├── core_cmFunc.h
│ │ ├── core_cmInstr.h
│ │ ├── core_cmSimd.h
│ │ ├── core_sc000.h
│ │ └── core_sc300.h
└── STM32F4xx_HAL_Driver
│ ├── Inc
│ ├── Legacy
│ │ └── stm32_hal_legacy.h
│ ├── stm32f4xx_hal.h
│ ├── stm32f4xx_hal_cortex.h
│ ├── stm32f4xx_hal_def.h
│ ├── stm32f4xx_hal_dma.h
│ ├── stm32f4xx_hal_dma_ex.h
│ ├── stm32f4xx_hal_flash.h
│ ├── stm32f4xx_hal_flash_ex.h
│ ├── stm32f4xx_hal_flash_ramfunc.h
│ ├── stm32f4xx_hal_gpio.h
│ ├── stm32f4xx_hal_gpio_ex.h
│ ├── stm32f4xx_hal_pwr.h
│ ├── stm32f4xx_hal_pwr_ex.h
│ ├── stm32f4xx_hal_rcc.h
│ ├── stm32f4xx_hal_rcc_ex.h
│ ├── stm32f4xx_hal_rng.h
│ ├── stm32f4xx_hal_spi.h
│ ├── stm32f4xx_hal_tim.h
│ └── stm32f4xx_hal_tim_ex.h
│ └── Src
│ ├── stm32f4xx_hal.c
│ ├── stm32f4xx_hal_cortex.c
│ ├── stm32f4xx_hal_dma.c
│ ├── stm32f4xx_hal_dma_ex.c
│ ├── stm32f4xx_hal_flash.c
│ ├── stm32f4xx_hal_flash_ex.c
│ ├── stm32f4xx_hal_flash_ramfunc.c
│ ├── stm32f4xx_hal_gpio.c
│ ├── stm32f4xx_hal_pwr.c
│ ├── stm32f4xx_hal_pwr_ex.c
│ ├── stm32f4xx_hal_rcc.c
│ ├── stm32f4xx_hal_rcc_ex.c
│ ├── stm32f4xx_hal_rng.c
│ ├── stm32f4xx_hal_spi.c
│ ├── stm32f4xx_hal_tim.c
│ └── stm32f4xx_hal_tim_ex.c
├── Inc
├── ILI9341_GFX.h
├── ILI9341_STM32_Driver.h
├── fonts.h
├── main.h
├── snow_tiger.h
├── stm32f4xx_hal_conf.h
└── stm32f4xx_it.h
├── README.md
├── STM32F407VG_FLASH.ld
├── STM32F4_HAL_ILI9341.elf.launch
├── STM32F4_HAL_ILI9341.ioc
├── Src
├── ILI9341_GFX.c
├── ILI9341_STM32_Driver.c
├── fonts.c
├── main.c
├── stm32f4xx_hal_msp.c
├── stm32f4xx_it.c
└── system_stm32f4xx.c
├── pinout.jpg
└── startup
└── startup_stm32f407xx.s
/.gitignore:
--------------------------------------------------------------------------------
1 | /Debug/
2 |
--------------------------------------------------------------------------------
/.mxproject:
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1 | [PreviousGenFiles]
2 | HeaderPath=F:/Workspace/GitHub/STM32F4_HAL_EXAMPLES/STM32F4_HAL_ILI9341/Inc
3 | HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;
4 | SourcePath=F:/Workspace/GitHub/STM32F4_HAL_EXAMPLES/STM32F4_HAL_ILI9341/Src
5 | SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;
6 |
7 | [PreviousLibFiles]
8 | LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rng.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
9 |
10 | [PreviousUsedTStudioFiles]
11 | SourceFiles=..\Src\main.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;F:/Workspace/GitHub/STM32F4_HAL_EXAMPLES/STM32F4_HAL_ILI9341//startup/startup_stm32f407xx.s;
12 | HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
13 | CDefines=__weak:__attribute__((weak));__packed:__attribute__((__packed__));
14 |
15 |
--------------------------------------------------------------------------------
/.project:
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1 |
2 |
3 | STM32F4_HAL_ILI9341
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 | clean,full,incremental,
11 |
12 |
13 | ?children?
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16 |
17 | ?name?
18 |
19 |
20 |
21 | org.eclipse.cdt.make.core.append_environment
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23 |
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25 | org.eclipse.cdt.make.core.buildArguments
26 |
27 |
28 |
29 | org.eclipse.cdt.make.core.buildCommand
30 | make
31 |
32 |
33 | org.eclipse.cdt.make.core.buildLocation
34 | ${workspace_loc:/STM32100B-EVAL/Debug}
35 |
36 |
37 | org.eclipse.cdt.make.core.contents
38 | org.eclipse.cdt.make.core.activeConfigSettings
39 |
40 |
41 | org.eclipse.cdt.make.core.enableAutoBuild
42 | false
43 |
44 |
45 | org.eclipse.cdt.make.core.enableCleanBuild
46 | true
47 |
48 |
49 | org.eclipse.cdt.make.core.enableFullBuild
50 | true
51 |
52 |
53 | org.eclipse.cdt.make.core.stopOnError
54 | true
55 |
56 |
57 | org.eclipse.cdt.make.core.useDefaultBuildCmd
58 | true
59 |
60 |
61 |
62 |
63 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
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65 |
66 |
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69 | org.eclipse.cdt.core.cnature
70 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
71 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
72 |
73 |
74 |
75 |
76 |
77 |
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/.settings/com.atollic.truestudio.debug.hardware_device.prefs:
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1 | BOARD=None
2 | CODE_LOCATION=FLASH
3 | ENDIAN=Little-endian
4 | MCU=STM32F407VG
5 | MCU_VENDOR=STMicroelectronics
6 | MODEL=Lite
7 | PROBE=ST-LINK
8 | PROJECT_FORMAT_VERSION=2
9 | TARGET=ARM\u00AE
10 | VERSION=4.1.0
11 | eclipse.preferences.version=1
12 |
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2 |
3 |
4 |
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6 |
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8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
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11 | environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.1518366166/appendContributed=true
12 |
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/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
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https://raw.githubusercontent.com/eziya/STM32_HAL_ILI9341/d1648eeb61a2624fb23eedafc57dfc1c13328077/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h
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/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /** @addtogroup CMSIS
37 | * @{
38 | */
39 |
40 | /** @addtogroup stm32f4xx_system
41 | * @{
42 | */
43 |
44 | /**
45 | * @brief Define to prevent recursive inclusion
46 | */
47 | #ifndef __SYSTEM_STM32F4XX_H
48 | #define __SYSTEM_STM32F4XX_H
49 |
50 | #ifdef __cplusplus
51 | extern "C" {
52 | #endif
53 |
54 | /** @addtogroup STM32F4xx_System_Includes
55 | * @{
56 | */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 |
63 | /** @addtogroup STM32F4xx_System_Exported_types
64 | * @{
65 | */
66 | /* This variable is updated in three ways:
67 | 1) by calling CMSIS function SystemCoreClockUpdate()
68 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
69 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
70 | Note: If you use this function to configure the system clock; then there
71 | is no need to call the 2 first functions listed above, since SystemCoreClock
72 | variable is updated automatically.
73 | */
74 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
75 |
76 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
77 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /** @addtogroup STM32F4xx_System_Exported_Constants
84 | * @{
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /** @addtogroup STM32F4xx_System_Exported_Macros
92 | * @{
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 |
99 | /** @addtogroup STM32F4xx_System_Exported_Functions
100 | * @{
101 | */
102 |
103 | extern void SystemInit(void);
104 | extern void SystemCoreClockUpdate(void);
105 | /**
106 | * @}
107 | */
108 |
109 | #ifdef __cplusplus
110 | }
111 | #endif
112 |
113 | #endif /*__SYSTEM_STM32F4XX_H */
114 |
115 | /**
116 | * @}
117 | */
118 |
119 | /**
120 | * @}
121 | */
122 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
123 |
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/Drivers/CMSIS/Include/arm_common_tables.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. October 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_common_tables.h
9 | *
10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #ifndef _ARM_COMMON_TABLES_H
42 | #define _ARM_COMMON_TABLES_H
43 |
44 | #include "arm_math.h"
45 |
46 | extern const uint16_t armBitRevTable[1024];
47 | extern const q15_t armRecipTableQ15[64];
48 | extern const q31_t armRecipTableQ31[64];
49 | /* extern const q31_t realCoefAQ31[1024]; */
50 | /* extern const q31_t realCoefBQ31[1024]; */
51 | extern const float32_t twiddleCoef_16[32];
52 | extern const float32_t twiddleCoef_32[64];
53 | extern const float32_t twiddleCoef_64[128];
54 | extern const float32_t twiddleCoef_128[256];
55 | extern const float32_t twiddleCoef_256[512];
56 | extern const float32_t twiddleCoef_512[1024];
57 | extern const float32_t twiddleCoef_1024[2048];
58 | extern const float32_t twiddleCoef_2048[4096];
59 | extern const float32_t twiddleCoef_4096[8192];
60 | #define twiddleCoef twiddleCoef_4096
61 | extern const q31_t twiddleCoef_16_q31[24];
62 | extern const q31_t twiddleCoef_32_q31[48];
63 | extern const q31_t twiddleCoef_64_q31[96];
64 | extern const q31_t twiddleCoef_128_q31[192];
65 | extern const q31_t twiddleCoef_256_q31[384];
66 | extern const q31_t twiddleCoef_512_q31[768];
67 | extern const q31_t twiddleCoef_1024_q31[1536];
68 | extern const q31_t twiddleCoef_2048_q31[3072];
69 | extern const q31_t twiddleCoef_4096_q31[6144];
70 | extern const q15_t twiddleCoef_16_q15[24];
71 | extern const q15_t twiddleCoef_32_q15[48];
72 | extern const q15_t twiddleCoef_64_q15[96];
73 | extern const q15_t twiddleCoef_128_q15[192];
74 | extern const q15_t twiddleCoef_256_q15[384];
75 | extern const q15_t twiddleCoef_512_q15[768];
76 | extern const q15_t twiddleCoef_1024_q15[1536];
77 | extern const q15_t twiddleCoef_2048_q15[3072];
78 | extern const q15_t twiddleCoef_4096_q15[6144];
79 | extern const float32_t twiddleCoef_rfft_32[32];
80 | extern const float32_t twiddleCoef_rfft_64[64];
81 | extern const float32_t twiddleCoef_rfft_128[128];
82 | extern const float32_t twiddleCoef_rfft_256[256];
83 | extern const float32_t twiddleCoef_rfft_512[512];
84 | extern const float32_t twiddleCoef_rfft_1024[1024];
85 | extern const float32_t twiddleCoef_rfft_2048[2048];
86 | extern const float32_t twiddleCoef_rfft_4096[4096];
87 |
88 |
89 | /* floating-point bit reversal tables */
90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
99 |
100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
109 |
110 | /* fixed-point bit reversal tables */
111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 )
112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 )
113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 )
114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
120 |
121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
130 |
131 | /* Tables for Fast Math Sine and Cosine */
132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
135 |
136 | #endif /* ARM_COMMON_TABLES_H */
137 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal.h
4 | * @author MCD Application Team
5 | * @brief This file contains all the functions prototypes for the HAL
6 | * module driver.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © COPYRIGHT(c) 2017 STMicroelectronics
11 | *
12 | * Redistribution and use in source and binary forms, with or without modification,
13 | * are permitted provided that the following conditions are met:
14 | * 1. Redistributions of source code must retain the above copyright notice,
15 | * this list of conditions and the following disclaimer.
16 | * 2. Redistributions in binary form must reproduce the above copyright notice,
17 | * this list of conditions and the following disclaimer in the documentation
18 | * and/or other materials provided with the distribution.
19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
20 | * may be used to endorse or promote products derived from this software
21 | * without specific prior written permission.
22 | *
23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 | *
34 | ******************************************************************************
35 | */
36 |
37 | /* Define to prevent recursive inclusion -------------------------------------*/
38 | #ifndef __STM32F4xx_HAL_H
39 | #define __STM32F4xx_HAL_H
40 |
41 | #ifdef __cplusplus
42 | extern "C" {
43 | #endif
44 |
45 | /* Includes ------------------------------------------------------------------*/
46 | #include "stm32f4xx_hal_conf.h"
47 |
48 | /** @addtogroup STM32F4xx_HAL_Driver
49 | * @{
50 | */
51 |
52 | /** @addtogroup HAL
53 | * @{
54 | */
55 |
56 | /* Exported types ------------------------------------------------------------*/
57 | /* Exported constants --------------------------------------------------------*/
58 |
59 | /** @defgroup HAL_Exported_Constants HAL Exported Constants
60 | * @{
61 | */
62 |
63 | /** @defgroup HAL_TICK_FREQ Tick Frequency
64 | * @{
65 | */
66 | typedef enum
67 | {
68 | HAL_TICK_FREQ_10HZ = 100U,
69 | HAL_TICK_FREQ_100HZ = 10U,
70 | HAL_TICK_FREQ_1KHZ = 1U,
71 | HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
72 | } HAL_TickFreqTypeDef;
73 | /**
74 | * @}
75 | */
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /* Exported macro ------------------------------------------------------------*/
82 | /** @defgroup HAL_Exported_Macros HAL Exported Macros
83 | * @{
84 | */
85 |
86 | /** @brief Freeze/Unfreeze Peripherals in Debug mode
87 | */
88 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
89 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
90 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
91 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
92 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
93 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
94 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
95 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
96 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
97 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
98 | #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
99 | #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
100 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
101 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
102 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
103 | #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
104 | #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
105 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
106 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
107 | #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
108 | #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
109 | #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
110 |
111 | #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
112 | #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
113 | #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
114 | #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
115 | #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
116 | #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
117 | #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
118 | #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
119 | #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
120 | #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
121 | #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
122 | #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
123 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
124 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
125 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
126 | #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
127 | #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
128 | #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
129 | #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
130 | #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
131 | #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
132 | #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
133 |
134 | /** @brief Main Flash memory mapped at 0x00000000
135 | */
136 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
137 |
138 | /** @brief System Flash memory mapped at 0x00000000
139 | */
140 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
141 | SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
142 | }while(0);
143 |
144 | /** @brief Embedded SRAM mapped at 0x00000000
145 | */
146 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
147 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
148 | }while(0);
149 |
150 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
151 | /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
152 | */
153 | #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
154 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
155 | }while(0);
156 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
157 |
158 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
159 | defined(STM32F469xx) || defined(STM32F479xx)
160 | /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
161 | */
162 | #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
163 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
164 | }while(0);
165 |
166 | /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
167 | */
168 | #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
169 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
170 | }while(0);
171 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
172 |
173 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
174 | /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
175 | * @{
176 | */
177 | /** @brief SYSCFG Break Lockup lock
178 | * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
179 | * @note The selected configuration is locked and can be unlocked by system reset
180 | */
181 | #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
182 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
183 | }while(0)
184 | /**
185 | * @}
186 | */
187 |
188 | /** @defgroup PVD_Lock_Enable PVD Lock
189 | * @{
190 | */
191 | /** @brief SYSCFG Break PVD lock
192 | * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
193 | * @note The selected configuration is locked and can be unlocked by system reset
194 | */
195 | #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
196 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
197 | }while(0)
198 | /**
199 | * @}
200 | */
201 | #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
202 | /**
203 | * @}
204 | */
205 |
206 | /** @defgroup HAL_Private_Macros HAL Private Macros
207 | * @{
208 | */
209 | #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
210 | ((FREQ) == HAL_TICK_FREQ_100HZ) || \
211 | ((FREQ) == HAL_TICK_FREQ_1KHZ))
212 | /**
213 | * @}
214 | */
215 |
216 | /* Exported functions --------------------------------------------------------*/
217 | /** @addtogroup HAL_Exported_Functions
218 | * @{
219 | */
220 | /** @addtogroup HAL_Exported_Functions_Group1
221 | * @{
222 | */
223 | /* Initialization and Configuration functions ******************************/
224 | HAL_StatusTypeDef HAL_Init(void);
225 | HAL_StatusTypeDef HAL_DeInit(void);
226 | void HAL_MspInit(void);
227 | void HAL_MspDeInit(void);
228 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
229 | /**
230 | * @}
231 | */
232 |
233 | /** @addtogroup HAL_Exported_Functions_Group2
234 | * @{
235 | */
236 | /* Peripheral Control functions ************************************************/
237 | void HAL_IncTick(void);
238 | void HAL_Delay(uint32_t Delay);
239 | uint32_t HAL_GetTick(void);
240 | uint32_t HAL_GetTickPrio(void);
241 | HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
242 | HAL_TickFreqTypeDef HAL_GetTickFreq(void);
243 | void HAL_SuspendTick(void);
244 | void HAL_ResumeTick(void);
245 | uint32_t HAL_GetHalVersion(void);
246 | uint32_t HAL_GetREVID(void);
247 | uint32_t HAL_GetDEVID(void);
248 | void HAL_DBGMCU_EnableDBGSleepMode(void);
249 | void HAL_DBGMCU_DisableDBGSleepMode(void);
250 | void HAL_DBGMCU_EnableDBGStopMode(void);
251 | void HAL_DBGMCU_DisableDBGStopMode(void);
252 | void HAL_DBGMCU_EnableDBGStandbyMode(void);
253 | void HAL_DBGMCU_DisableDBGStandbyMode(void);
254 | void HAL_EnableCompensationCell(void);
255 | void HAL_DisableCompensationCell(void);
256 | void HAL_GetUID(uint32_t *UID);
257 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
258 | defined(STM32F469xx) || defined(STM32F479xx)
259 | void HAL_EnableMemorySwappingBank(void);
260 | void HAL_DisableMemorySwappingBank(void);
261 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
262 | /**
263 | * @}
264 | */
265 |
266 | /**
267 | * @}
268 | */
269 | /* Private types -------------------------------------------------------------*/
270 | /* Private variables ---------------------------------------------------------*/
271 | /** @defgroup HAL_Private_Variables HAL Private Variables
272 | * @{
273 | */
274 | /**
275 | * @}
276 | */
277 | /* Private constants ---------------------------------------------------------*/
278 | /** @defgroup HAL_Private_Constants HAL Private Constants
279 | * @{
280 | */
281 | /**
282 | * @}
283 | */
284 | /* Private macros ------------------------------------------------------------*/
285 | /* Private functions ---------------------------------------------------------*/
286 | /**
287 | * @}
288 | */
289 |
290 | /**
291 | * @}
292 | */
293 |
294 | #ifdef __cplusplus
295 | }
296 | #endif
297 |
298 | #endif /* __STM32F4xx_HAL_H */
299 |
300 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
301 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_def.h
4 | * @author MCD Application Team
5 | * @brief This file contains HAL common defines, enumeration, macros and
6 | * structures definitions.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © COPYRIGHT(c) 2017 STMicroelectronics
11 | *
12 | * Redistribution and use in source and binary forms, with or without modification,
13 | * are permitted provided that the following conditions are met:
14 | * 1. Redistributions of source code must retain the above copyright notice,
15 | * this list of conditions and the following disclaimer.
16 | * 2. Redistributions in binary form must reproduce the above copyright notice,
17 | * this list of conditions and the following disclaimer in the documentation
18 | * and/or other materials provided with the distribution.
19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
20 | * may be used to endorse or promote products derived from this software
21 | * without specific prior written permission.
22 | *
23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 | *
34 | ******************************************************************************
35 | */
36 |
37 | /* Define to prevent recursive inclusion -------------------------------------*/
38 | #ifndef __STM32F4xx_HAL_DEF
39 | #define __STM32F4xx_HAL_DEF
40 |
41 | #ifdef __cplusplus
42 | extern "C" {
43 | #endif
44 |
45 | /* Includes ------------------------------------------------------------------*/
46 | #include "stm32f4xx.h"
47 | #include "Legacy/stm32_hal_legacy.h"
48 | #include
49 |
50 | /* Exported types ------------------------------------------------------------*/
51 |
52 | /**
53 | * @brief HAL Status structures definition
54 | */
55 | typedef enum
56 | {
57 | HAL_OK = 0x00U,
58 | HAL_ERROR = 0x01U,
59 | HAL_BUSY = 0x02U,
60 | HAL_TIMEOUT = 0x03U
61 | } HAL_StatusTypeDef;
62 |
63 | /**
64 | * @brief HAL Lock structures definition
65 | */
66 | typedef enum
67 | {
68 | HAL_UNLOCKED = 0x00U,
69 | HAL_LOCKED = 0x01U
70 | } HAL_LockTypeDef;
71 |
72 | /* Exported macro ------------------------------------------------------------*/
73 |
74 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
75 |
76 | #define HAL_MAX_DELAY 0xFFFFFFFFU
77 |
78 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET)
79 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET)
80 |
81 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
82 | do{ \
83 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
84 | (__DMA_HANDLE__).Parent = (__HANDLE__); \
85 | } while(0U)
86 |
87 | /** @brief Reset the Handle's State field.
88 | * @param __HANDLE__ specifies the Peripheral Handle.
89 | * @note This macro can be used for the following purpose:
90 | * - When the Handle is declared as local variable; before passing it as parameter
91 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
92 | * to set to 0 the Handle's "State" field.
93 | * Otherwise, "State" field may have any random value and the first time the function
94 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed
95 | * (i.e. HAL_PPP_MspInit() will not be executed).
96 | * - When there is a need to reconfigure the low level hardware: instead of calling
97 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
98 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function
99 | * HAL_PPP_MspInit() which will reconfigure the low level hardware.
100 | * @retval None
101 | */
102 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
103 |
104 | #if (USE_RTOS == 1U)
105 | /* Reserved for future use */
106 | #error "USE_RTOS should be 0 in the current HAL release"
107 | #else
108 | #define __HAL_LOCK(__HANDLE__) \
109 | do{ \
110 | if((__HANDLE__)->Lock == HAL_LOCKED) \
111 | { \
112 | return HAL_BUSY; \
113 | } \
114 | else \
115 | { \
116 | (__HANDLE__)->Lock = HAL_LOCKED; \
117 | } \
118 | }while (0U)
119 |
120 | #define __HAL_UNLOCK(__HANDLE__) \
121 | do{ \
122 | (__HANDLE__)->Lock = HAL_UNLOCKED; \
123 | }while (0U)
124 | #endif /* USE_RTOS */
125 |
126 | #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
127 | #ifndef __weak
128 | #define __weak __attribute__((weak))
129 | #endif /* __weak */
130 | #ifndef __packed
131 | #define __packed __attribute__((__packed__))
132 | #endif /* __packed */
133 | #endif /* __GNUC__ */
134 |
135 |
136 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
137 | #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
138 | #ifndef __ALIGN_END
139 | #define __ALIGN_END __attribute__ ((aligned (4)))
140 | #endif /* __ALIGN_END */
141 | #ifndef __ALIGN_BEGIN
142 | #define __ALIGN_BEGIN
143 | #endif /* __ALIGN_BEGIN */
144 | #else
145 | #ifndef __ALIGN_END
146 | #define __ALIGN_END
147 | #endif /* __ALIGN_END */
148 | #ifndef __ALIGN_BEGIN
149 | #if defined (__CC_ARM) /* ARM Compiler */
150 | #define __ALIGN_BEGIN __align(4)
151 | #elif defined (__ICCARM__) /* IAR Compiler */
152 | #define __ALIGN_BEGIN
153 | #endif /* __CC_ARM */
154 | #endif /* __ALIGN_BEGIN */
155 | #endif /* __GNUC__ */
156 |
157 |
158 | /**
159 | * @brief __RAM_FUNC definition
160 | */
161 | #if defined ( __CC_ARM )
162 | /* ARM Compiler
163 | ------------
164 | RAM functions are defined using the toolchain options.
165 | Functions that are executed in RAM should reside in a separate source module.
166 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
167 | area of a module to a memory space in physical RAM.
168 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
169 | dialog.
170 | */
171 | #define __RAM_FUNC
172 |
173 | #elif defined ( __ICCARM__ )
174 | /* ICCARM Compiler
175 | ---------------
176 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
177 | */
178 | #define __RAM_FUNC __ramfunc
179 |
180 | #elif defined ( __GNUC__ )
181 | /* GNU Compiler
182 | ------------
183 | RAM functions are defined using a specific toolchain attribute
184 | "__attribute__((section(".RamFunc")))".
185 | */
186 | #define __RAM_FUNC __attribute__((section(".RamFunc")))
187 |
188 | #endif
189 |
190 | /**
191 | * @brief __NOINLINE definition
192 | */
193 | #if defined ( __CC_ARM ) || defined ( __GNUC__ )
194 | /* ARM & GNUCompiler
195 | ----------------
196 | */
197 | #define __NOINLINE __attribute__ ( (noinline) )
198 |
199 | #elif defined ( __ICCARM__ )
200 | /* ICCARM Compiler
201 | ---------------
202 | */
203 | #define __NOINLINE _Pragma("optimize = no_inline")
204 |
205 | #endif
206 |
207 | #ifdef __cplusplus
208 | }
209 | #endif
210 |
211 | #endif /* ___STM32F4xx_HAL_DEF */
212 |
213 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
214 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_dma_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of DMA HAL extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F4xx_HAL_DMA_EX_H
38 | #define __STM32F4xx_HAL_DMA_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32f4xx_hal_def.h"
46 |
47 | /** @addtogroup STM32F4xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup DMAEx
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types
57 | * @brief DMAEx Exported types
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief HAL DMA Memory definition
63 | */
64 | typedef enum
65 | {
66 | MEMORY0 = 0x00U, /*!< Memory 0 */
67 | MEMORY1 = 0x01U /*!< Memory 1 */
68 | }HAL_DMA_MemoryTypeDef;
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /* Exported functions --------------------------------------------------------*/
75 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
76 | * @brief DMAEx Exported functions
77 | * @{
78 | */
79 |
80 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
81 | * @brief Extended features functions
82 | * @{
83 | */
84 |
85 | /* IO operation functions *******************************************************/
86 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
87 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
88 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
89 |
90 | /**
91 | * @}
92 | */
93 | /**
94 | * @}
95 | */
96 |
97 | /* Private functions ---------------------------------------------------------*/
98 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions
99 | * @brief DMAEx Private functions
100 | * @{
101 | */
102 | /**
103 | * @}
104 | */
105 |
106 | /**
107 | * @}
108 | */
109 |
110 | /**
111 | * @}
112 | */
113 |
114 | #ifdef __cplusplus
115 | }
116 | #endif
117 |
118 | #endif /*__STM32F4xx_HAL_DMA_EX_H*/
119 |
120 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
121 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_flash.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F4xx_HAL_FLASH_H
38 | #define __STM32F4xx_HAL_FLASH_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32f4xx_hal_def.h"
46 |
47 | /** @addtogroup STM32F4xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup FLASH
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /** @defgroup FLASH_Exported_Types FLASH Exported Types
57 | * @{
58 | */
59 |
60 | /**
61 | * @brief FLASH Procedure structure definition
62 | */
63 | typedef enum
64 | {
65 | FLASH_PROC_NONE = 0U,
66 | FLASH_PROC_SECTERASE,
67 | FLASH_PROC_MASSERASE,
68 | FLASH_PROC_PROGRAM
69 | } FLASH_ProcedureTypeDef;
70 |
71 | /**
72 | * @brief FLASH handle Structure definition
73 | */
74 | typedef struct
75 | {
76 | __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*Internal variable to indicate which procedure is ongoing or not in IT context*/
77 |
78 | __IO uint32_t NbSectorsToErase; /*Internal variable to save the remaining sectors to erase in IT context*/
79 |
80 | __IO uint8_t VoltageForErase; /*Internal variable to provide voltage range selected by user in IT context*/
81 |
82 | __IO uint32_t Sector; /*Internal variable to define the current sector which is erasing*/
83 |
84 | __IO uint32_t Bank; /*Internal variable to save current bank selected during mass erase*/
85 |
86 | __IO uint32_t Address; /*Internal variable to save address selected for program*/
87 |
88 | HAL_LockTypeDef Lock; /* FLASH locking object */
89 |
90 | __IO uint32_t ErrorCode; /* FLASH error code */
91 |
92 | }FLASH_ProcessTypeDef;
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /* Exported constants --------------------------------------------------------*/
99 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants
100 | * @{
101 | */
102 | /** @defgroup FLASH_Error_Code FLASH Error Code
103 | * @brief FLASH Error Code
104 | * @{
105 | */
106 | #define HAL_FLASH_ERROR_NONE 0x00000000U /*!< No error */
107 | #define HAL_FLASH_ERROR_RD 0x00000001U /*!< Read Protection error */
108 | #define HAL_FLASH_ERROR_PGS 0x00000002U /*!< Programming Sequence error */
109 | #define HAL_FLASH_ERROR_PGP 0x00000004U /*!< Programming Parallelism error */
110 | #define HAL_FLASH_ERROR_PGA 0x00000008U /*!< Programming Alignment error */
111 | #define HAL_FLASH_ERROR_WRP 0x00000010U /*!< Write protection error */
112 | #define HAL_FLASH_ERROR_OPERATION 0x00000020U /*!< Operation Error */
113 | /**
114 | * @}
115 | */
116 |
117 | /** @defgroup FLASH_Type_Program FLASH Type Program
118 | * @{
119 | */
120 | #define FLASH_TYPEPROGRAM_BYTE 0x00000000U /*!< Program byte (8-bit) at a specified address */
121 | #define FLASH_TYPEPROGRAM_HALFWORD 0x00000001U /*!< Program a half-word (16-bit) at a specified address */
122 | #define FLASH_TYPEPROGRAM_WORD 0x00000002U /*!< Program a word (32-bit) at a specified address */
123 | #define FLASH_TYPEPROGRAM_DOUBLEWORD 0x00000003U /*!< Program a double word (64-bit) at a specified address */
124 | /**
125 | * @}
126 | */
127 |
128 | /** @defgroup FLASH_Flag_definition FLASH Flag definition
129 | * @brief Flag definition
130 | * @{
131 | */
132 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Operation flag */
133 | #define FLASH_FLAG_OPERR FLASH_SR_SOP /*!< FLASH operation Error flag */
134 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */
135 | #define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */
136 | #define FLASH_FLAG_PGPERR FLASH_SR_PGPERR /*!< FLASH Programming Parallelism error flag */
137 | #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< FLASH Programming Sequence error flag */
138 | #if defined(FLASH_SR_RDERR)
139 | #define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< Read Protection error flag (PCROP) */
140 | #endif /* FLASH_SR_RDERR */
141 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
142 | /**
143 | * @}
144 | */
145 |
146 | /** @defgroup FLASH_Interrupt_definition FLASH Interrupt definition
147 | * @brief FLASH Interrupt definition
148 | * @{
149 | */
150 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of FLASH Operation Interrupt source */
151 | #define FLASH_IT_ERR 0x02000000U /*!< Error Interrupt source */
152 | /**
153 | * @}
154 | */
155 |
156 | /** @defgroup FLASH_Program_Parallelism FLASH Program Parallelism
157 | * @{
158 | */
159 | #define FLASH_PSIZE_BYTE 0x00000000U
160 | #define FLASH_PSIZE_HALF_WORD 0x00000100U
161 | #define FLASH_PSIZE_WORD 0x00000200U
162 | #define FLASH_PSIZE_DOUBLE_WORD 0x00000300U
163 | #define CR_PSIZE_MASK 0xFFFFFCFFU
164 | /**
165 | * @}
166 | */
167 |
168 | /** @defgroup FLASH_Keys FLASH Keys
169 | * @{
170 | */
171 | #define RDP_KEY ((uint16_t)0x00A5)
172 | #define FLASH_KEY1 0x45670123U
173 | #define FLASH_KEY2 0xCDEF89ABU
174 | #define FLASH_OPT_KEY1 0x08192A3BU
175 | #define FLASH_OPT_KEY2 0x4C5D6E7FU
176 | /**
177 | * @}
178 | */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /* Exported macro ------------------------------------------------------------*/
185 | /** @defgroup FLASH_Exported_Macros FLASH Exported Macros
186 | * @{
187 | */
188 | /**
189 | * @brief Set the FLASH Latency.
190 | * @param __LATENCY__ FLASH Latency
191 | * The value of this parameter depend on device used within the same series
192 | * @retval none
193 | */
194 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (*(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)(__LATENCY__))
195 |
196 | /**
197 | * @brief Get the FLASH Latency.
198 | * @retval FLASH Latency
199 | * The value of this parameter depend on device used within the same series
200 | */
201 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
202 |
203 | /**
204 | * @brief Enable the FLASH prefetch buffer.
205 | * @retval none
206 | */
207 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTEN)
208 |
209 | /**
210 | * @brief Disable the FLASH prefetch buffer.
211 | * @retval none
212 | */
213 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTEN))
214 |
215 | /**
216 | * @brief Enable the FLASH instruction cache.
217 | * @retval none
218 | */
219 | #define __HAL_FLASH_INSTRUCTION_CACHE_ENABLE() (FLASH->ACR |= FLASH_ACR_ICEN)
220 |
221 | /**
222 | * @brief Disable the FLASH instruction cache.
223 | * @retval none
224 | */
225 | #define __HAL_FLASH_INSTRUCTION_CACHE_DISABLE() (FLASH->ACR &= (~FLASH_ACR_ICEN))
226 |
227 | /**
228 | * @brief Enable the FLASH data cache.
229 | * @retval none
230 | */
231 | #define __HAL_FLASH_DATA_CACHE_ENABLE() (FLASH->ACR |= FLASH_ACR_DCEN)
232 |
233 | /**
234 | * @brief Disable the FLASH data cache.
235 | * @retval none
236 | */
237 | #define __HAL_FLASH_DATA_CACHE_DISABLE() (FLASH->ACR &= (~FLASH_ACR_DCEN))
238 |
239 | /**
240 | * @brief Resets the FLASH instruction Cache.
241 | * @note This function must be used only when the Instruction Cache is disabled.
242 | * @retval None
243 | */
244 | #define __HAL_FLASH_INSTRUCTION_CACHE_RESET() do {FLASH->ACR |= FLASH_ACR_ICRST; \
245 | FLASH->ACR &= ~FLASH_ACR_ICRST; \
246 | }while(0U)
247 |
248 | /**
249 | * @brief Resets the FLASH data Cache.
250 | * @note This function must be used only when the data Cache is disabled.
251 | * @retval None
252 | */
253 | #define __HAL_FLASH_DATA_CACHE_RESET() do {FLASH->ACR |= FLASH_ACR_DCRST; \
254 | FLASH->ACR &= ~FLASH_ACR_DCRST; \
255 | }while(0U)
256 | /**
257 | * @brief Enable the specified FLASH interrupt.
258 | * @param __INTERRUPT__ FLASH interrupt
259 | * This parameter can be any combination of the following values:
260 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
261 | * @arg FLASH_IT_ERR: Error Interrupt
262 | * @retval none
263 | */
264 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (FLASH->CR |= (__INTERRUPT__))
265 |
266 | /**
267 | * @brief Disable the specified FLASH interrupt.
268 | * @param __INTERRUPT__ FLASH interrupt
269 | * This parameter can be any combination of the following values:
270 | * @arg FLASH_IT_EOP: End of FLASH Operation Interrupt
271 | * @arg FLASH_IT_ERR: Error Interrupt
272 | * @retval none
273 | */
274 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (FLASH->CR &= ~(uint32_t)(__INTERRUPT__))
275 |
276 | /**
277 | * @brief Get the specified FLASH flag status.
278 | * @param __FLAG__ specifies the FLASH flags to check.
279 | * This parameter can be any combination of the following values:
280 | * @arg FLASH_FLAG_EOP : FLASH End of Operation flag
281 | * @arg FLASH_FLAG_OPERR : FLASH operation Error flag
282 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
283 | * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
284 | * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
285 | * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
286 | * @arg FLASH_FLAG_RDERR : FLASH Read Protection error flag (PCROP) (*)
287 | * @arg FLASH_FLAG_BSY : FLASH Busy flag
288 | * (*) FLASH_FLAG_RDERR is not available for STM32F405xx/407xx/415xx/417xx devices
289 | * @retval The new state of __FLAG__ (SET or RESET).
290 | */
291 | #define __HAL_FLASH_GET_FLAG(__FLAG__) ((FLASH->SR & (__FLAG__)))
292 |
293 | /**
294 | * @brief Clear the specified FLASH flags.
295 | * @param __FLAG__ specifies the FLASH flags to clear.
296 | * This parameter can be any combination of the following values:
297 | * @arg FLASH_FLAG_EOP : FLASH End of Operation flag
298 | * @arg FLASH_FLAG_OPERR : FLASH operation Error flag
299 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
300 | * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
301 | * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
302 | * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
303 | * @arg FLASH_FLAG_RDERR : FLASH Read Protection error flag (PCROP) (*)
304 | * (*) FLASH_FLAG_RDERR is not available for STM32F405xx/407xx/415xx/417xx devices
305 | * @retval none
306 | */
307 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) (FLASH->SR = (__FLAG__))
308 | /**
309 | * @}
310 | */
311 |
312 | /* Include FLASH HAL Extension module */
313 | #include "stm32f4xx_hal_flash_ex.h"
314 | #include "stm32f4xx_hal_flash_ramfunc.h"
315 |
316 | /* Exported functions --------------------------------------------------------*/
317 | /** @addtogroup FLASH_Exported_Functions
318 | * @{
319 | */
320 | /** @addtogroup FLASH_Exported_Functions_Group1
321 | * @{
322 | */
323 | /* Program operation functions ***********************************************/
324 | HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
325 | HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data);
326 | /* FLASH IRQ handler method */
327 | void HAL_FLASH_IRQHandler(void);
328 | /* Callbacks in non blocking modes */
329 | void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
330 | void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
331 | /**
332 | * @}
333 | */
334 |
335 | /** @addtogroup FLASH_Exported_Functions_Group2
336 | * @{
337 | */
338 | /* Peripheral Control functions **********************************************/
339 | HAL_StatusTypeDef HAL_FLASH_Unlock(void);
340 | HAL_StatusTypeDef HAL_FLASH_Lock(void);
341 | HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
342 | HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
343 | /* Option bytes control */
344 | HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
345 | /**
346 | * @}
347 | */
348 |
349 | /** @addtogroup FLASH_Exported_Functions_Group3
350 | * @{
351 | */
352 | /* Peripheral State functions ************************************************/
353 | uint32_t HAL_FLASH_GetError(void);
354 | HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
355 | /**
356 | * @}
357 | */
358 |
359 | /**
360 | * @}
361 | */
362 | /* Private types -------------------------------------------------------------*/
363 | /* Private variables ---------------------------------------------------------*/
364 | /** @defgroup FLASH_Private_Variables FLASH Private Variables
365 | * @{
366 | */
367 |
368 | /**
369 | * @}
370 | */
371 | /* Private constants ---------------------------------------------------------*/
372 | /** @defgroup FLASH_Private_Constants FLASH Private Constants
373 | * @{
374 | */
375 |
376 | /**
377 | * @brief ACR register byte 0 (Bits[7:0]) base address
378 | */
379 | #define ACR_BYTE0_ADDRESS 0x40023C00U
380 | /**
381 | * @brief OPTCR register byte 0 (Bits[7:0]) base address
382 | */
383 | #define OPTCR_BYTE0_ADDRESS 0x40023C14U
384 | /**
385 | * @brief OPTCR register byte 1 (Bits[15:8]) base address
386 | */
387 | #define OPTCR_BYTE1_ADDRESS 0x40023C15U
388 | /**
389 | * @brief OPTCR register byte 2 (Bits[23:16]) base address
390 | */
391 | #define OPTCR_BYTE2_ADDRESS 0x40023C16U
392 | /**
393 | * @brief OPTCR register byte 3 (Bits[31:24]) base address
394 | */
395 | #define OPTCR_BYTE3_ADDRESS 0x40023C17U
396 |
397 | /**
398 | * @}
399 | */
400 |
401 | /* Private macros ------------------------------------------------------------*/
402 | /** @defgroup FLASH_Private_Macros FLASH Private Macros
403 | * @{
404 | */
405 |
406 | /** @defgroup FLASH_IS_FLASH_Definitions FLASH Private macros to check input parameters
407 | * @{
408 | */
409 | #define IS_FLASH_TYPEPROGRAM(VALUE)(((VALUE) == FLASH_TYPEPROGRAM_BYTE) || \
410 | ((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \
411 | ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \
412 | ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD))
413 | /**
414 | * @}
415 | */
416 |
417 | /**
418 | * @}
419 | */
420 |
421 | /* Private functions ---------------------------------------------------------*/
422 | /** @defgroup FLASH_Private_Functions FLASH Private Functions
423 | * @{
424 | */
425 |
426 | /**
427 | * @}
428 | */
429 |
430 | /**
431 | * @}
432 | */
433 |
434 | /**
435 | * @}
436 | */
437 |
438 | #ifdef __cplusplus
439 | }
440 | #endif
441 |
442 | #endif /* __STM32F4xx_HAL_FLASH_H */
443 |
444 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
445 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_flash_ramfunc.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH RAMFUNC driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H
38 | #define __STM32F4xx_FLASH_RAMFUNC_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
44 | defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f4xx_hal_def.h"
48 |
49 | /** @addtogroup STM32F4xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @addtogroup FLASH_RAMFUNC
54 | * @{
55 | */
56 |
57 | /* Exported types ------------------------------------------------------------*/
58 | /* Exported macro ------------------------------------------------------------*/
59 | /* Exported functions --------------------------------------------------------*/
60 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions
61 | * @{
62 | */
63 |
64 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
65 | * @{
66 | */
67 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void);
68 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void);
69 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void);
70 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void);
71 | /**
72 | * @}
73 | */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
88 | #ifdef __cplusplus
89 | }
90 | #endif
91 |
92 |
93 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */
94 |
95 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
96 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_gpio.h
4 | * @author MCD Application Team
5 | * @brief Header file of GPIO HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F4xx_HAL_GPIO_H
38 | #define __STM32F4xx_HAL_GPIO_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32f4xx_hal_def.h"
46 |
47 | /** @addtogroup STM32F4xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup GPIO
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /** @defgroup GPIO_Exported_Types GPIO Exported Types
57 | * @{
58 | */
59 |
60 | /**
61 | * @brief GPIO Init structure definition
62 | */
63 | typedef struct
64 | {
65 | uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
66 | This parameter can be any value of @ref GPIO_pins_define */
67 |
68 | uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
69 | This parameter can be a value of @ref GPIO_mode_define */
70 |
71 | uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
72 | This parameter can be a value of @ref GPIO_pull_define */
73 |
74 | uint32_t Speed; /*!< Specifies the speed for the selected pins.
75 | This parameter can be a value of @ref GPIO_speed_define */
76 |
77 | uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
78 | This parameter can be a value of @ref GPIO_Alternate_function_selection */
79 | }GPIO_InitTypeDef;
80 |
81 | /**
82 | * @brief GPIO Bit SET and Bit RESET enumeration
83 | */
84 | typedef enum
85 | {
86 | GPIO_PIN_RESET = 0,
87 | GPIO_PIN_SET
88 | }GPIO_PinState;
89 | /**
90 | * @}
91 | */
92 |
93 | /* Exported constants --------------------------------------------------------*/
94 |
95 | /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
96 | * @{
97 | */
98 |
99 | /** @defgroup GPIO_pins_define GPIO pins define
100 | * @{
101 | */
102 | #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
103 | #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
104 | #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
105 | #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
106 | #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
107 | #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
108 | #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
109 | #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
110 | #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
111 | #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
112 | #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
113 | #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
114 | #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
115 | #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
116 | #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
117 | #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
118 | #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
119 |
120 | #define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */
121 | /**
122 | * @}
123 | */
124 |
125 | /** @defgroup GPIO_mode_define GPIO mode define
126 | * @brief GPIO Configuration Mode
127 | * Elements values convention: 0xX0yz00YZ
128 | * - X : GPIO mode or EXTI Mode
129 | * - y : External IT or Event trigger detection
130 | * - z : IO configuration on External IT or Event
131 | * - Y : Output type (Push Pull or Open Drain)
132 | * - Z : IO Direction mode (Input, Output, Alternate or Analog)
133 | * @{
134 | */
135 | #define GPIO_MODE_INPUT 0x00000000U /*!< Input Floating Mode */
136 | #define GPIO_MODE_OUTPUT_PP 0x00000001U /*!< Output Push Pull Mode */
137 | #define GPIO_MODE_OUTPUT_OD 0x00000011U /*!< Output Open Drain Mode */
138 | #define GPIO_MODE_AF_PP 0x00000002U /*!< Alternate Function Push Pull Mode */
139 | #define GPIO_MODE_AF_OD 0x00000012U /*!< Alternate Function Open Drain Mode */
140 |
141 | #define GPIO_MODE_ANALOG 0x00000003U /*!< Analog Mode */
142 |
143 | #define GPIO_MODE_IT_RISING 0x10110000U /*!< External Interrupt Mode with Rising edge trigger detection */
144 | #define GPIO_MODE_IT_FALLING 0x10210000U /*!< External Interrupt Mode with Falling edge trigger detection */
145 | #define GPIO_MODE_IT_RISING_FALLING 0x10310000U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
146 |
147 | #define GPIO_MODE_EVT_RISING 0x10120000U /*!< External Event Mode with Rising edge trigger detection */
148 | #define GPIO_MODE_EVT_FALLING 0x10220000U /*!< External Event Mode with Falling edge trigger detection */
149 | #define GPIO_MODE_EVT_RISING_FALLING 0x10320000U /*!< External Event Mode with Rising/Falling edge trigger detection */
150 | /**
151 | * @}
152 | */
153 |
154 | /** @defgroup GPIO_speed_define GPIO speed define
155 | * @brief GPIO Output Maximum frequency
156 | * @{
157 | */
158 | #define GPIO_SPEED_FREQ_LOW 0x00000000U /*!< IO works at 2 MHz, please refer to the product datasheet */
159 | #define GPIO_SPEED_FREQ_MEDIUM 0x00000001U /*!< range 12,5 MHz to 50 MHz, please refer to the product datasheet */
160 | #define GPIO_SPEED_FREQ_HIGH 0x00000002U /*!< range 25 MHz to 100 MHz, please refer to the product datasheet */
161 | #define GPIO_SPEED_FREQ_VERY_HIGH 0x00000003U /*!< range 50 MHz to 200 MHz, please refer to the product datasheet */
162 | /**
163 | * @}
164 | */
165 |
166 | /** @defgroup GPIO_pull_define GPIO pull define
167 | * @brief GPIO Pull-Up or Pull-Down Activation
168 | * @{
169 | */
170 | #define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */
171 | #define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */
172 | #define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */
173 | /**
174 | * @}
175 | */
176 |
177 | /**
178 | * @}
179 | */
180 |
181 | /* Exported macro ------------------------------------------------------------*/
182 | /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
183 | * @{
184 | */
185 |
186 | /**
187 | * @brief Checks whether the specified EXTI line flag is set or not.
188 | * @param __EXTI_LINE__ specifies the EXTI line flag to check.
189 | * This parameter can be GPIO_PIN_x where x can be(0..15)
190 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
191 | */
192 | #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
193 |
194 | /**
195 | * @brief Clears the EXTI's line pending flags.
196 | * @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
197 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
198 | * @retval None
199 | */
200 | #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
201 |
202 | /**
203 | * @brief Checks whether the specified EXTI line is asserted or not.
204 | * @param __EXTI_LINE__ specifies the EXTI line to check.
205 | * This parameter can be GPIO_PIN_x where x can be(0..15)
206 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
207 | */
208 | #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
209 |
210 | /**
211 | * @brief Clears the EXTI's line pending bits.
212 | * @param __EXTI_LINE__ specifies the EXTI lines to clear.
213 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
214 | * @retval None
215 | */
216 | #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
217 |
218 | /**
219 | * @brief Generates a Software interrupt on selected EXTI line.
220 | * @param __EXTI_LINE__ specifies the EXTI line to check.
221 | * This parameter can be GPIO_PIN_x where x can be(0..15)
222 | * @retval None
223 | */
224 | #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
225 | /**
226 | * @}
227 | */
228 |
229 | /* Include GPIO HAL Extension module */
230 | #include "stm32f4xx_hal_gpio_ex.h"
231 |
232 | /* Exported functions --------------------------------------------------------*/
233 | /** @addtogroup GPIO_Exported_Functions
234 | * @{
235 | */
236 |
237 | /** @addtogroup GPIO_Exported_Functions_Group1
238 | * @{
239 | */
240 | /* Initialization and de-initialization functions *****************************/
241 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
242 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
243 | /**
244 | * @}
245 | */
246 |
247 | /** @addtogroup GPIO_Exported_Functions_Group2
248 | * @{
249 | */
250 | /* IO operation functions *****************************************************/
251 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
252 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
253 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
254 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
255 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
256 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
257 |
258 | /**
259 | * @}
260 | */
261 |
262 | /**
263 | * @}
264 | */
265 | /* Private types -------------------------------------------------------------*/
266 | /* Private variables ---------------------------------------------------------*/
267 | /* Private constants ---------------------------------------------------------*/
268 | /** @defgroup GPIO_Private_Constants GPIO Private Constants
269 | * @{
270 | */
271 |
272 | /**
273 | * @}
274 | */
275 |
276 | /* Private macros ------------------------------------------------------------*/
277 | /** @defgroup GPIO_Private_Macros GPIO Private Macros
278 | * @{
279 | */
280 | #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
281 | #define IS_GPIO_PIN(PIN) ((((PIN) & GPIO_PIN_MASK ) != 0x00U) && (((PIN) & ~GPIO_PIN_MASK) == 0x00U))
282 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
283 | ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
284 | ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
285 | ((MODE) == GPIO_MODE_AF_PP) ||\
286 | ((MODE) == GPIO_MODE_AF_OD) ||\
287 | ((MODE) == GPIO_MODE_IT_RISING) ||\
288 | ((MODE) == GPIO_MODE_IT_FALLING) ||\
289 | ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
290 | ((MODE) == GPIO_MODE_EVT_RISING) ||\
291 | ((MODE) == GPIO_MODE_EVT_FALLING) ||\
292 | ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
293 | ((MODE) == GPIO_MODE_ANALOG))
294 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
295 | ((SPEED) == GPIO_SPEED_FREQ_HIGH) || ((SPEED) == GPIO_SPEED_FREQ_VERY_HIGH))
296 | #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
297 | ((PULL) == GPIO_PULLDOWN))
298 | /**
299 | * @}
300 | */
301 |
302 | /* Private functions ---------------------------------------------------------*/
303 | /** @defgroup GPIO_Private_Functions GPIO Private Functions
304 | * @{
305 | */
306 |
307 | /**
308 | * @}
309 | */
310 |
311 | /**
312 | * @}
313 | */
314 |
315 | /**
316 | * @}
317 | */
318 |
319 | #ifdef __cplusplus
320 | }
321 | #endif
322 |
323 | #endif /* __STM32F4xx_HAL_GPIO_H */
324 |
325 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
326 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_pwr.h
4 | * @author MCD Application Team
5 | * @brief Header file of PWR HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F4xx_HAL_PWR_H
38 | #define __STM32F4xx_HAL_PWR_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32f4xx_hal_def.h"
46 |
47 | /** @addtogroup STM32F4xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup PWR
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 |
57 | /** @defgroup PWR_Exported_Types PWR Exported Types
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief PWR PVD configuration structure definition
63 | */
64 | typedef struct
65 | {
66 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
67 | This parameter can be a value of @ref PWR_PVD_detection_level */
68 |
69 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
70 | This parameter can be a value of @ref PWR_PVD_Mode */
71 | }PWR_PVDTypeDef;
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /* Exported constants --------------------------------------------------------*/
78 | /** @defgroup PWR_Exported_Constants PWR Exported Constants
79 | * @{
80 | */
81 |
82 | /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
83 | * @{
84 | */
85 | #define PWR_WAKEUP_PIN1 0x00000100U
86 | /**
87 | * @}
88 | */
89 |
90 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level
91 | * @{
92 | */
93 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
94 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
95 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
96 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
97 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
98 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
99 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
100 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
101 | (Compare internally to VREFINT) */
102 | /**
103 | * @}
104 | */
105 |
106 | /** @defgroup PWR_PVD_Mode PWR PVD Mode
107 | * @{
108 | */
109 | #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
110 | #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
111 | #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
112 | #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
113 | #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
114 | #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
115 | #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
116 | /**
117 | * @}
118 | */
119 |
120 |
121 | /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
122 | * @{
123 | */
124 | #define PWR_MAINREGULATOR_ON 0x00000000U
125 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
126 | /**
127 | * @}
128 | */
129 |
130 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
131 | * @{
132 | */
133 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
134 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
135 | /**
136 | * @}
137 | */
138 |
139 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
140 | * @{
141 | */
142 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
143 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
144 | /**
145 | * @}
146 | */
147 |
148 | /** @defgroup PWR_Flag PWR Flag
149 | * @{
150 | */
151 | #define PWR_FLAG_WU PWR_CSR_WUF
152 | #define PWR_FLAG_SB PWR_CSR_SBF
153 | #define PWR_FLAG_PVDO PWR_CSR_PVDO
154 | #define PWR_FLAG_BRR PWR_CSR_BRR
155 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
156 | /**
157 | * @}
158 | */
159 |
160 | /**
161 | * @}
162 | */
163 |
164 | /* Exported macro ------------------------------------------------------------*/
165 | /** @defgroup PWR_Exported_Macro PWR Exported Macro
166 | * @{
167 | */
168 |
169 | /** @brief Check PWR flag is set or not.
170 | * @param __FLAG__ specifies the flag to check.
171 | * This parameter can be one of the following values:
172 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
173 | * was received from the WKUP pin or from the RTC alarm (Alarm A
174 | * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
175 | * An additional wakeup event is detected if the WKUP pin is enabled
176 | * (by setting the EWUP bit) when the WKUP pin level is already high.
177 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
178 | * resumed from StandBy mode.
179 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
180 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
181 | * For this reason, this bit is equal to 0 after Standby or reset
182 | * until the PVDE bit is set.
183 | * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
184 | * when the device wakes up from Standby mode or by a system reset
185 | * or power reset.
186 | * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
187 | * scaling output selection is ready.
188 | * @retval The new state of __FLAG__ (TRUE or FALSE).
189 | */
190 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
191 |
192 | /** @brief Clear the PWR's pending flags.
193 | * @param __FLAG__ specifies the flag to clear.
194 | * This parameter can be one of the following values:
195 | * @arg PWR_FLAG_WU: Wake Up flag
196 | * @arg PWR_FLAG_SB: StandBy flag
197 | */
198 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
199 |
200 | /**
201 | * @brief Enable the PVD Exti Line 16.
202 | * @retval None.
203 | */
204 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
205 |
206 | /**
207 | * @brief Disable the PVD EXTI Line 16.
208 | * @retval None.
209 | */
210 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
211 |
212 | /**
213 | * @brief Enable event on PVD Exti Line 16.
214 | * @retval None.
215 | */
216 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
217 |
218 | /**
219 | * @brief Disable event on PVD Exti Line 16.
220 | * @retval None.
221 | */
222 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
223 |
224 | /**
225 | * @brief Enable the PVD Extended Interrupt Rising Trigger.
226 | * @retval None.
227 | */
228 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
229 |
230 | /**
231 | * @brief Disable the PVD Extended Interrupt Rising Trigger.
232 | * @retval None.
233 | */
234 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
235 |
236 | /**
237 | * @brief Enable the PVD Extended Interrupt Falling Trigger.
238 | * @retval None.
239 | */
240 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
241 |
242 |
243 | /**
244 | * @brief Disable the PVD Extended Interrupt Falling Trigger.
245 | * @retval None.
246 | */
247 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
248 |
249 |
250 | /**
251 | * @brief PVD EXTI line configuration: set rising & falling edge trigger.
252 | * @retval None.
253 | */
254 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
255 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
256 | }while(0U)
257 |
258 | /**
259 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
260 | * This parameter can be:
261 | * @retval None.
262 | */
263 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
264 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
265 | }while(0U)
266 |
267 | /**
268 | * @brief checks whether the specified PVD Exti interrupt flag is set or not.
269 | * @retval EXTI PVD Line Status.
270 | */
271 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
272 |
273 | /**
274 | * @brief Clear the PVD Exti flag.
275 | * @retval None.
276 | */
277 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
278 |
279 | /**
280 | * @brief Generates a Software interrupt on PVD EXTI line.
281 | * @retval None
282 | */
283 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
284 |
285 | /**
286 | * @}
287 | */
288 |
289 | /* Include PWR HAL Extension module */
290 | #include "stm32f4xx_hal_pwr_ex.h"
291 |
292 | /* Exported functions --------------------------------------------------------*/
293 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions
294 | * @{
295 | */
296 |
297 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
298 | * @{
299 | */
300 | /* Initialization and de-initialization functions *****************************/
301 | void HAL_PWR_DeInit(void);
302 | void HAL_PWR_EnableBkUpAccess(void);
303 | void HAL_PWR_DisableBkUpAccess(void);
304 | /**
305 | * @}
306 | */
307 |
308 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
309 | * @{
310 | */
311 | /* Peripheral Control functions **********************************************/
312 | /* PVD configuration */
313 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
314 | void HAL_PWR_EnablePVD(void);
315 | void HAL_PWR_DisablePVD(void);
316 |
317 | /* WakeUp pins configuration */
318 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
319 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
320 |
321 | /* Low Power modes entry */
322 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
323 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
324 | void HAL_PWR_EnterSTANDBYMode(void);
325 |
326 | /* Power PVD IRQ Handler */
327 | void HAL_PWR_PVD_IRQHandler(void);
328 | void HAL_PWR_PVDCallback(void);
329 |
330 | /* Cortex System Control functions *******************************************/
331 | void HAL_PWR_EnableSleepOnExit(void);
332 | void HAL_PWR_DisableSleepOnExit(void);
333 | void HAL_PWR_EnableSEVOnPend(void);
334 | void HAL_PWR_DisableSEVOnPend(void);
335 | /**
336 | * @}
337 | */
338 |
339 | /**
340 | * @}
341 | */
342 |
343 | /* Private types -------------------------------------------------------------*/
344 | /* Private variables ---------------------------------------------------------*/
345 | /* Private constants ---------------------------------------------------------*/
346 | /** @defgroup PWR_Private_Constants PWR Private Constants
347 | * @{
348 | */
349 |
350 | /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
351 | * @{
352 | */
353 | #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
354 | /**
355 | * @}
356 | */
357 |
358 | /** @defgroup PWR_register_alias_address PWR Register alias address
359 | * @{
360 | */
361 | /* ------------- PWR registers bit address in the alias region ---------------*/
362 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
363 | #define PWR_CR_OFFSET 0x00U
364 | #define PWR_CSR_OFFSET 0x04U
365 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
366 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
367 | /**
368 | * @}
369 | */
370 |
371 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address
372 | * @{
373 | */
374 | /* --- CR Register ---*/
375 | /* Alias word address of DBP bit */
376 | #define DBP_BIT_NUMBER PWR_CR_DBP_Pos
377 | #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
378 |
379 | /* Alias word address of PVDE bit */
380 | #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
381 | #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
382 |
383 | /* Alias word address of VOS bit */
384 | #define VOS_BIT_NUMBER PWR_CR_VOS_Pos
385 | #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
386 | /**
387 | * @}
388 | */
389 |
390 | /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
391 | * @{
392 | */
393 | /* --- CSR Register ---*/
394 | /* Alias word address of EWUP bit */
395 | #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
396 | #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
397 | /**
398 | * @}
399 | */
400 |
401 | /**
402 | * @}
403 | */
404 | /* Private macros ------------------------------------------------------------*/
405 | /** @defgroup PWR_Private_Macros PWR Private Macros
406 | * @{
407 | */
408 |
409 | /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
410 | * @{
411 | */
412 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
413 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
414 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
415 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
416 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
417 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
418 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
419 | ((MODE) == PWR_PVD_MODE_NORMAL))
420 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
421 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
422 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
423 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
424 | /**
425 | * @}
426 | */
427 |
428 | /**
429 | * @}
430 | */
431 |
432 | /**
433 | * @}
434 | */
435 |
436 | /**
437 | * @}
438 | */
439 |
440 | #ifdef __cplusplus
441 | }
442 | #endif
443 |
444 |
445 | #endif /* __STM32F4xx_HAL_PWR_H */
446 |
447 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
448 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rng.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_rng.h
4 | * @author MCD Application Team
5 | * @brief Header file of RNG HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F4xx_HAL_RNG_H
38 | #define __STM32F4xx_HAL_RNG_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
45 | defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
46 | defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F469xx) ||\
47 | defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
48 | defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
49 |
50 | /* Includes ------------------------------------------------------------------*/
51 | #include "stm32f4xx_hal_def.h"
52 |
53 | /** @addtogroup STM32F4xx_HAL_Driver
54 | * @{
55 | */
56 |
57 | /** @defgroup RNG RNG
58 | * @brief RNG HAL module driver
59 | * @{
60 | */
61 |
62 | /* Exported types ------------------------------------------------------------*/
63 |
64 | /** @defgroup RNG_Exported_Types RNG Exported Types
65 | * @{
66 | */
67 |
68 | /** @defgroup RNG_Exported_Types_Group1 RNG State Structure definition
69 | * @{
70 | */
71 | typedef enum
72 | {
73 | HAL_RNG_STATE_RESET = 0x00U, /*!< RNG not yet initialized or disabled */
74 | HAL_RNG_STATE_READY = 0x01U, /*!< RNG initialized and ready for use */
75 | HAL_RNG_STATE_BUSY = 0x02U, /*!< RNG internal process is ongoing */
76 | HAL_RNG_STATE_TIMEOUT = 0x03U, /*!< RNG timeout state */
77 | HAL_RNG_STATE_ERROR = 0x04U /*!< RNG error state */
78 |
79 | }HAL_RNG_StateTypeDef;
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | /** @defgroup RNG_Exported_Types_Group2 RNG Handle Structure definition
86 | * @{
87 | */
88 | typedef struct
89 | {
90 | RNG_TypeDef *Instance; /*!< Register base address */
91 |
92 | HAL_LockTypeDef Lock; /*!< RNG locking object */
93 |
94 | __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */
95 |
96 | uint32_t RandomNumber; /*!< Last Generated RNG Data */
97 |
98 | }RNG_HandleTypeDef;
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | /**
105 | * @}
106 | */
107 |
108 | /* Exported constants --------------------------------------------------------*/
109 |
110 | /** @defgroup RNG_Exported_Constants RNG Exported Constants
111 | * @{
112 | */
113 |
114 | /** @defgroup RNG_Exported_Constants_Group1 RNG Interrupt definition
115 | * @{
116 | */
117 | #define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */
118 | #define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */
119 | #define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */
120 | /**
121 | * @}
122 | */
123 |
124 | /** @defgroup RNG_Exported_Constants_Group2 RNG Flag definition
125 | * @{
126 | */
127 | #define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */
128 | #define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */
129 | #define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */
130 |
131 | /**
132 | * @}
133 | */
134 |
135 | /**
136 | * @}
137 | */
138 |
139 | /* Exported macros -----------------------------------------------------------*/
140 |
141 | /** @defgroup RNG_Exported_Macros RNG Exported Macros
142 | * @{
143 | */
144 |
145 | /** @brief Reset RNG handle state
146 | * @param __HANDLE__ RNG Handle
147 | * @retval None
148 | */
149 | #define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET)
150 |
151 | /**
152 | * @brief Enables the RNG peripheral.
153 | * @param __HANDLE__ RNG Handle
154 | * @retval None
155 | */
156 | #define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN)
157 |
158 | /**
159 | * @brief Disables the RNG peripheral.
160 | * @param __HANDLE__ RNG Handle
161 | * @retval None
162 | */
163 | #define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN)
164 |
165 | /**
166 | * @brief Check the selected RNG flag status.
167 | * @param __HANDLE__ RNG Handle
168 | * @param __FLAG__ RNG flag
169 | * This parameter can be one of the following values:
170 | * @arg RNG_FLAG_DRDY: Data ready
171 | * @arg RNG_FLAG_CECS: Clock error current status
172 | * @arg RNG_FLAG_SECS: Seed error current status
173 | * @retval The new state of __FLAG__ (SET or RESET).
174 | */
175 | #define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
176 |
177 | /**
178 | * @brief Clears the selected RNG flag status.
179 | * @param __HANDLE__ RNG handle
180 | * @param __FLAG__ RNG flag to clear
181 | * @note WARNING: This is a dummy macro for HAL code alignment,
182 | * flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only.
183 | * @retval None
184 | */
185 | #define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */
186 |
187 |
188 |
189 | /**
190 | * @brief Enables the RNG interrupts.
191 | * @param __HANDLE__ RNG Handle
192 | * @retval None
193 | */
194 | #define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE)
195 |
196 | /**
197 | * @brief Disables the RNG interrupts.
198 | * @param __HANDLE__ RNG Handle
199 | * @retval None
200 | */
201 | #define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE)
202 |
203 | /**
204 | * @brief Checks whether the specified RNG interrupt has occurred or not.
205 | * @param __HANDLE__ RNG Handle
206 | * @param __INTERRUPT__ specifies the RNG interrupt status flag to check.
207 | * This parameter can be one of the following values:
208 | * @arg RNG_IT_DRDY: Data ready interrupt
209 | * @arg RNG_IT_CEI: Clock error interrupt
210 | * @arg RNG_IT_SEI: Seed error interrupt
211 | * @retval The new state of __INTERRUPT__ (SET or RESET).
212 | */
213 | #define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__))
214 |
215 | /**
216 | * @brief Clear the RNG interrupt status flags.
217 | * @param __HANDLE__ RNG Handle
218 | * @param __INTERRUPT__ specifies the RNG interrupt status flag to clear.
219 | * This parameter can be one of the following values:
220 | * @arg RNG_IT_CEI: Clock error interrupt
221 | * @arg RNG_IT_SEI: Seed error interrupt
222 | * @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY.
223 | * @retval None
224 | */
225 | #define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__))
226 |
227 | /**
228 | * @}
229 | */
230 |
231 | /* Exported functions --------------------------------------------------------*/
232 | /** @defgroup RNG_Exported_Functions RNG Exported Functions
233 | * @{
234 | */
235 |
236 | /** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions
237 | * @{
238 | */
239 | HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng);
240 | HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng);
241 | void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng);
242 | void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng);
243 |
244 | /**
245 | * @}
246 | */
247 |
248 | /** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions
249 | * @{
250 | */
251 | uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */
252 | uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */
253 |
254 | HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit);
255 | HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng);
256 | uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng);
257 |
258 | void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng);
259 | void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
260 | void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit);
261 |
262 | /**
263 | * @}
264 | */
265 |
266 | /** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions
267 | * @{
268 | */
269 | HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng);
270 |
271 | /**
272 | * @}
273 | */
274 |
275 | /**
276 | * @}
277 | */
278 |
279 | /* Private types -------------------------------------------------------------*/
280 | /** @defgroup RNG_Private_Types RNG Private Types
281 | * @{
282 | */
283 |
284 | /**
285 | * @}
286 | */
287 |
288 | /* Private defines -----------------------------------------------------------*/
289 | /** @defgroup RNG_Private_Defines RNG Private Defines
290 | * @{
291 | */
292 |
293 | /**
294 | * @}
295 | */
296 |
297 | /* Private variables ---------------------------------------------------------*/
298 | /** @defgroup RNG_Private_Variables RNG Private Variables
299 | * @{
300 | */
301 |
302 | /**
303 | * @}
304 | */
305 |
306 | /* Private constants ---------------------------------------------------------*/
307 | /** @defgroup RNG_Private_Constants RNG Private Constants
308 | * @{
309 | */
310 |
311 | /**
312 | * @}
313 | */
314 |
315 | /* Private macros ------------------------------------------------------------*/
316 | /** @defgroup RNG_Private_Macros RNG Private Macros
317 | * @{
318 | */
319 | #define IS_RNG_IT(IT) (((IT) == RNG_IT_CEI) || \
320 | ((IT) == RNG_IT_SEI))
321 |
322 | #define IS_RNG_FLAG(FLAG) (((FLAG) == RNG_FLAG_DRDY) || \
323 | ((FLAG) == RNG_FLAG_CECS) || \
324 | ((FLAG) == RNG_FLAG_SECS))
325 |
326 | /**
327 | * @}
328 | */
329 |
330 | /* Private functions prototypes ----------------------------------------------*/
331 | /** @defgroup RNG_Private_Functions_Prototypes RNG Private Functions Prototypes
332 | * @{
333 | */
334 |
335 | /**
336 | * @}
337 | */
338 |
339 | /* Private functions ---------------------------------------------------------*/
340 | /** @defgroup RNG_Private_Functions RNG Private Functions
341 | * @{
342 | */
343 |
344 | /**
345 | * @}
346 | */
347 |
348 | /**
349 | * @}
350 | */
351 |
352 | /**
353 | * @}
354 | */
355 |
356 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
357 | STM32F429xx || STM32F439xx || STM32F410xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
358 | STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
359 |
360 | #ifdef __cplusplus
361 | }
362 | #endif
363 |
364 |
365 | #endif /* __STM32F4xx_HAL_RNG_H */
366 |
367 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
368 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_dma_ex.c
4 | * @author MCD Application Team
5 | * @brief DMA Extension HAL module driver
6 | * This file provides firmware functions to manage the following
7 | * functionalities of the DMA Extension peripheral:
8 | * + Extended features functions
9 | *
10 | @verbatim
11 | ==============================================================================
12 | ##### How to use this driver #####
13 | ==============================================================================
14 | [..]
15 | The DMA Extension HAL driver can be used as follows:
16 | (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
17 | for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
18 |
19 | -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
20 | -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
21 | -@- In Multi (Double) buffer mode, it is possible to update the base address for
22 | the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
23 |
24 | @endverbatim
25 | ******************************************************************************
26 | * @attention
27 | *
28 | * © COPYRIGHT(c) 2017 STMicroelectronics
29 | *
30 | * Redistribution and use in source and binary forms, with or without modification,
31 | * are permitted provided that the following conditions are met:
32 | * 1. Redistributions of source code must retain the above copyright notice,
33 | * this list of conditions and the following disclaimer.
34 | * 2. Redistributions in binary form must reproduce the above copyright notice,
35 | * this list of conditions and the following disclaimer in the documentation
36 | * and/or other materials provided with the distribution.
37 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
38 | * may be used to endorse or promote products derived from this software
39 | * without specific prior written permission.
40 | *
41 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
42 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
44 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
45 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
47 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
48 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
50 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
51 | *
52 | ******************************************************************************
53 | */
54 |
55 | /* Includes ------------------------------------------------------------------*/
56 | #include "stm32f4xx_hal.h"
57 |
58 | /** @addtogroup STM32F4xx_HAL_Driver
59 | * @{
60 | */
61 |
62 | /** @defgroup DMAEx DMAEx
63 | * @brief DMA Extended HAL module driver
64 | * @{
65 | */
66 |
67 | #ifdef HAL_DMA_MODULE_ENABLED
68 |
69 | /* Private types -------------------------------------------------------------*/
70 | /* Private variables ---------------------------------------------------------*/
71 | /* Private Constants ---------------------------------------------------------*/
72 | /* Private macros ------------------------------------------------------------*/
73 | /* Private functions ---------------------------------------------------------*/
74 | /** @addtogroup DMAEx_Private_Functions
75 | * @{
76 | */
77 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
78 | /**
79 | * @}
80 | */
81 |
82 | /* Exported functions ---------------------------------------------------------*/
83 |
84 | /** @addtogroup DMAEx_Exported_Functions
85 | * @{
86 | */
87 |
88 |
89 | /** @addtogroup DMAEx_Exported_Functions_Group1
90 | *
91 | @verbatim
92 | ===============================================================================
93 | ##### Extended features functions #####
94 | ===============================================================================
95 | [..] This section provides functions allowing to:
96 | (+) Configure the source, destination address and data length and
97 | Start MultiBuffer DMA transfer
98 | (+) Configure the source, destination address and data length and
99 | Start MultiBuffer DMA transfer with interrupt
100 | (+) Change on the fly the memory0 or memory1 address.
101 |
102 | @endverbatim
103 | * @{
104 | */
105 |
106 |
107 | /**
108 | * @brief Starts the multi_buffer DMA Transfer.
109 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
110 | * the configuration information for the specified DMA Stream.
111 | * @param SrcAddress The source memory Buffer address
112 | * @param DstAddress The destination memory Buffer address
113 | * @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
114 | * @param DataLength The length of data to be transferred from source to destination
115 | * @retval HAL status
116 | */
117 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
118 | {
119 | HAL_StatusTypeDef status = HAL_OK;
120 |
121 | /* Check the parameters */
122 | assert_param(IS_DMA_BUFFER_SIZE(DataLength));
123 |
124 | /* Memory-to-memory transfer not supported in double buffering mode */
125 | if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
126 | {
127 | hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
128 | status = HAL_ERROR;
129 | }
130 | else
131 | {
132 | /* Process Locked */
133 | __HAL_LOCK(hdma);
134 |
135 | if(HAL_DMA_STATE_READY == hdma->State)
136 | {
137 | /* Change DMA peripheral state */
138 | hdma->State = HAL_DMA_STATE_BUSY;
139 |
140 | /* Enable the double buffer mode */
141 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
142 |
143 | /* Configure DMA Stream destination address */
144 | hdma->Instance->M1AR = SecondMemAddress;
145 |
146 | /* Configure the source, destination address and the data length */
147 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
148 |
149 | /* Enable the peripheral */
150 | __HAL_DMA_ENABLE(hdma);
151 | }
152 | else
153 | {
154 | /* Return error status */
155 | status = HAL_BUSY;
156 | }
157 | }
158 | return status;
159 | }
160 |
161 | /**
162 | * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
163 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
164 | * the configuration information for the specified DMA Stream.
165 | * @param SrcAddress The source memory Buffer address
166 | * @param DstAddress The destination memory Buffer address
167 | * @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
168 | * @param DataLength The length of data to be transferred from source to destination
169 | * @retval HAL status
170 | */
171 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
172 | {
173 | HAL_StatusTypeDef status = HAL_OK;
174 |
175 | /* Check the parameters */
176 | assert_param(IS_DMA_BUFFER_SIZE(DataLength));
177 |
178 | /* Memory-to-memory transfer not supported in double buffering mode */
179 | if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
180 | {
181 | hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
182 | return HAL_ERROR;
183 | }
184 |
185 | /* Check callback functions */
186 | if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback))
187 | {
188 | hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
189 | return HAL_ERROR;
190 | }
191 |
192 | /* Process locked */
193 | __HAL_LOCK(hdma);
194 |
195 | if(HAL_DMA_STATE_READY == hdma->State)
196 | {
197 | /* Change DMA peripheral state */
198 | hdma->State = HAL_DMA_STATE_BUSY;
199 |
200 | /* Initialize the error code */
201 | hdma->ErrorCode = HAL_DMA_ERROR_NONE;
202 |
203 | /* Enable the Double buffer mode */
204 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
205 |
206 | /* Configure DMA Stream destination address */
207 | hdma->Instance->M1AR = SecondMemAddress;
208 |
209 | /* Configure the source, destination address and the data length */
210 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
211 |
212 | /* Clear all flags */
213 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
214 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
215 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
216 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
217 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
218 |
219 | /* Enable Common interrupts*/
220 | hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
221 | hdma->Instance->FCR |= DMA_IT_FE;
222 |
223 | if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
224 | {
225 | hdma->Instance->CR |= DMA_IT_HT;
226 | }
227 |
228 | /* Enable the peripheral */
229 | __HAL_DMA_ENABLE(hdma);
230 | }
231 | else
232 | {
233 | /* Process unlocked */
234 | __HAL_UNLOCK(hdma);
235 |
236 | /* Return error status */
237 | status = HAL_BUSY;
238 | }
239 | return status;
240 | }
241 |
242 | /**
243 | * @brief Change the memory0 or memory1 address on the fly.
244 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
245 | * the configuration information for the specified DMA Stream.
246 | * @param Address The new address
247 | * @param memory the memory to be changed, This parameter can be one of
248 | * the following values:
249 | * MEMORY0 /
250 | * MEMORY1
251 | * @note The MEMORY0 address can be changed only when the current transfer use
252 | * MEMORY1 and the MEMORY1 address can be changed only when the current
253 | * transfer use MEMORY0.
254 | * @retval HAL status
255 | */
256 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
257 | {
258 | if(memory == MEMORY0)
259 | {
260 | /* change the memory0 address */
261 | hdma->Instance->M0AR = Address;
262 | }
263 | else
264 | {
265 | /* change the memory1 address */
266 | hdma->Instance->M1AR = Address;
267 | }
268 |
269 | return HAL_OK;
270 | }
271 |
272 | /**
273 | * @}
274 | */
275 |
276 | /**
277 | * @}
278 | */
279 |
280 | /** @addtogroup DMAEx_Private_Functions
281 | * @{
282 | */
283 |
284 | /**
285 | * @brief Set the DMA Transfer parameter.
286 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
287 | * the configuration information for the specified DMA Stream.
288 | * @param SrcAddress The source memory Buffer address
289 | * @param DstAddress The destination memory Buffer address
290 | * @param DataLength The length of data to be transferred from source to destination
291 | * @retval HAL status
292 | */
293 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
294 | {
295 | /* Configure DMA Stream data length */
296 | hdma->Instance->NDTR = DataLength;
297 |
298 | /* Peripheral to Memory */
299 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
300 | {
301 | /* Configure DMA Stream destination address */
302 | hdma->Instance->PAR = DstAddress;
303 |
304 | /* Configure DMA Stream source address */
305 | hdma->Instance->M0AR = SrcAddress;
306 | }
307 | /* Memory to Peripheral */
308 | else
309 | {
310 | /* Configure DMA Stream source address */
311 | hdma->Instance->PAR = SrcAddress;
312 |
313 | /* Configure DMA Stream destination address */
314 | hdma->Instance->M0AR = DstAddress;
315 | }
316 | }
317 |
318 | /**
319 | * @}
320 | */
321 |
322 | #endif /* HAL_DMA_MODULE_ENABLED */
323 | /**
324 | * @}
325 | */
326 |
327 | /**
328 | * @}
329 | */
330 |
331 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
332 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_flash_ramfunc.c
4 | * @author MCD Application Team
5 | * @brief FLASH RAMFUNC module driver.
6 | * This file provides a FLASH firmware functions which should be
7 | * executed from internal SRAM
8 | * + Stop/Start the flash interface while System Run
9 | * + Enable/Disable the flash sleep while System Run
10 | @verbatim
11 | ==============================================================================
12 | ##### APIs executed from Internal RAM #####
13 | ==============================================================================
14 | [..]
15 | *** ARM Compiler ***
16 | --------------------
17 | [..] RAM functions are defined using the toolchain options.
18 | Functions that are be executed in RAM should reside in a separate
19 | source module. Using the 'Options for File' dialog you can simply change
20 | the 'Code / Const' area of a module to a memory space in physical RAM.
21 | Available memory areas are declared in the 'Target' tab of the
22 | Options for Target' dialog.
23 |
24 | *** ICCARM Compiler ***
25 | -----------------------
26 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
27 |
28 | *** GNU Compiler ***
29 | --------------------
30 | [..] RAM functions are defined using a specific toolchain attribute
31 | "__attribute__((section(".RamFunc")))".
32 |
33 | @endverbatim
34 | ******************************************************************************
35 | * @attention
36 | *
37 | * © COPYRIGHT(c) 2017 STMicroelectronics
38 | *
39 | * Redistribution and use in source and binary forms, with or without modification,
40 | * are permitted provided that the following conditions are met:
41 | * 1. Redistributions of source code must retain the above copyright notice,
42 | * this list of conditions and the following disclaimer.
43 | * 2. Redistributions in binary form must reproduce the above copyright notice,
44 | * this list of conditions and the following disclaimer in the documentation
45 | * and/or other materials provided with the distribution.
46 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
47 | * may be used to endorse or promote products derived from this software
48 | * without specific prior written permission.
49 | *
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
53 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
54 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
55 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
56 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
57 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
58 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60 | *
61 | ******************************************************************************
62 | */
63 |
64 | /* Includes ------------------------------------------------------------------*/
65 | #include "stm32f4xx_hal.h"
66 |
67 | /** @addtogroup STM32F4xx_HAL_Driver
68 | * @{
69 | */
70 |
71 | /** @defgroup FLASH_RAMFUNC FLASH RAMFUNC
72 | * @brief FLASH functions executed from RAM
73 | * @{
74 | */
75 | #ifdef HAL_FLASH_MODULE_ENABLED
76 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
77 | defined(STM32F412Rx) || defined(STM32F412Cx)
78 |
79 | /* Private typedef -----------------------------------------------------------*/
80 | /* Private define ------------------------------------------------------------*/
81 | /* Private macro -------------------------------------------------------------*/
82 | /* Private variables ---------------------------------------------------------*/
83 | /* Private function prototypes -----------------------------------------------*/
84 | /* Exported functions --------------------------------------------------------*/
85 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions
86 | * @{
87 | */
88 |
89 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM
90 | * @brief Peripheral Extended features functions
91 | *
92 | @verbatim
93 |
94 | ===============================================================================
95 | ##### ramfunc functions #####
96 | ===============================================================================
97 | [..]
98 | This subsection provides a set of functions that should be executed from RAM
99 | transfers.
100 |
101 | @endverbatim
102 | * @{
103 | */
104 |
105 | /**
106 | * @brief Stop the flash interface while System Run
107 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
108 | * @note This mode couldn't be set while executing with the flash itself.
109 | * It should be done with specific routine executed from RAM.
110 | * @retval HAL status
111 | */
112 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void)
113 | {
114 | /* Enable Power ctrl clock */
115 | __HAL_RCC_PWR_CLK_ENABLE();
116 | /* Stop the flash interface while System Run */
117 | SET_BIT(PWR->CR, PWR_CR_FISSR);
118 |
119 | return HAL_OK;
120 | }
121 |
122 | /**
123 | * @brief Start the flash interface while System Run
124 | * @note This mode is only available for STM32F411xx/STM32F446xx devices.
125 | * @note This mode couldn't be set while executing with the flash itself.
126 | * It should be done with specific routine executed from RAM.
127 | * @retval HAL status
128 | */
129 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void)
130 | {
131 | /* Enable Power ctrl clock */
132 | __HAL_RCC_PWR_CLK_ENABLE();
133 | /* Start the flash interface while System Run */
134 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
135 |
136 | return HAL_OK;
137 | }
138 |
139 | /**
140 | * @brief Enable the flash sleep while System Run
141 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
142 | * @note This mode could n't be set while executing with the flash itself.
143 | * It should be done with specific routine executed from RAM.
144 | * @retval HAL status
145 | */
146 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void)
147 | {
148 | /* Enable Power ctrl clock */
149 | __HAL_RCC_PWR_CLK_ENABLE();
150 | /* Enable the flash sleep while System Run */
151 | SET_BIT(PWR->CR, PWR_CR_FMSSR);
152 |
153 | return HAL_OK;
154 | }
155 |
156 | /**
157 | * @brief Disable the flash sleep while System Run
158 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
159 | * @note This mode couldn't be set while executing with the flash itself.
160 | * It should be done with specific routine executed from RAM.
161 | * @retval HAL status
162 | */
163 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void)
164 | {
165 | /* Enable Power ctrl clock */
166 | __HAL_RCC_PWR_CLK_ENABLE();
167 | /* Disable the flash sleep while System Run */
168 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
169 |
170 | return HAL_OK;
171 | }
172 |
173 | /**
174 | * @}
175 | */
176 |
177 | /**
178 | * @}
179 | */
180 |
181 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
182 | #endif /* HAL_FLASH_MODULE_ENABLED */
183 | /**
184 | * @}
185 | */
186 |
187 | /**
188 | * @}
189 | */
190 |
191 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
192 |
--------------------------------------------------------------------------------
/Inc/ILI9341_GFX.h:
--------------------------------------------------------------------------------
1 | #ifndef ILI9341_GFX_H
2 | #define ILI9341_GFX_H
3 |
4 | #include "stm32f4xx_hal.h"
5 | #include "fonts.h"
6 |
7 | #define HORIZONTAL_IMAGE 0
8 | #define VERTICAL_IMAGE 1
9 |
10 | void ILI9341_DrawHollowCircle(uint16_t X, uint16_t Y, uint16_t radius, uint16_t color);
11 | void ILI9341_DrawFilledCircle(uint16_t X, uint16_t Y, uint16_t radius, uint16_t color);
12 | void ILI9341_DrawHollowRectangleCoord(uint16_t X0, uint16_t Y0, uint16_t X1, uint16_t Y1, uint16_t color);
13 | void ILI9341_DrawFilledRectangleCoord(uint16_t X0, uint16_t Y0, uint16_t X1, uint16_t Y1, uint16_t color);
14 | void ILI9341_DrawChar(char ch, const uint8_t font[], uint16_t X, uint16_t Y, uint16_t color, uint16_t bgcolor);
15 | void ILI9341_DrawText(const char* str, const uint8_t font[], uint16_t X, uint16_t Y, uint16_t color, uint16_t bgcolor);
16 | void ILI9341_DrawImage(const uint8_t* image, uint8_t orientation);
17 |
18 | #endif
19 |
--------------------------------------------------------------------------------
/Inc/ILI9341_STM32_Driver.h:
--------------------------------------------------------------------------------
1 | #ifndef ILI9341_STM32_DRIVER_H
2 | #define ILI9341_STM32_DRIVER_H
3 |
4 | #include "stm32f4xx_hal.h"
5 |
6 | extern SPI_HandleTypeDef hspi1;
7 |
8 | #define ILI9341_SCREEN_HEIGHT 240
9 | #define ILI9341_SCREEN_WIDTH 320
10 |
11 | /* PIN Configuration */
12 | #define HSPI_INSTANCE &hspi1
13 | #define LCD_CS_PORT GPIOC
14 | #define LCD_CS_PIN GPIO_PIN_1
15 | #define LCD_DC_PORT GPIOC
16 | #define LCD_DC_PIN GPIO_PIN_2
17 | #define LCD_RST_PORT GPIOC
18 | #define LCD_RST_PIN GPIO_PIN_3
19 |
20 | #define BURST_MAX_SIZE 500
21 | #define BLACK 0x0000
22 | #define NAVY 0x000F
23 | #define DARKGREEN 0x03E0
24 | #define DARKCYAN 0x03EF
25 | #define MAROON 0x7800
26 | #define PURPLE 0x780F
27 | #define OLIVE 0x7BE0
28 | #define LIGHTGREY 0xC618
29 | #define DARKGREY 0x7BEF
30 | #define BLUE 0x001F
31 | #define GREEN 0x07E0
32 | #define CYAN 0x07FF
33 | #define RED 0xF800
34 | #define MAGENTA 0xF81F
35 | #define YELLOW 0xFFE0
36 | #define WHITE 0xFFFF
37 | #define ORANGE 0xFD20
38 | #define GREENYELLOW 0xAFE5
39 | #define PINK 0xF81F
40 |
41 | #define SCREEN_VERTICAL_1 0
42 | #define SCREEN_HORIZONTAL_1 1
43 | #define SCREEN_VERTICAL_2 2
44 | #define SCREEN_HORIZONTAL_2 3
45 |
46 | void ILI9341_WriteCommand(uint8_t cmd);
47 | void ILI9341_WriteData(uint8_t data);
48 | void ILI9341_WriteBuffer(uint8_t *buffer, uint16_t len);
49 | void ILI9341_Reset(void);
50 | void ILI9341_Enable(void);
51 | void ILI9341_Init(void);
52 | void ILI9341_SetRotation(uint8_t rotation);
53 | void ILI9341_SetAddress(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
54 | void ILI9341_DrawColor(uint16_t color);
55 | void ILI9341_DrawColorBurst(uint16_t color, uint32_t size);
56 | void ILI9341_FillScreen(uint16_t color);
57 | void ILI9341_DrawPixel(uint16_t x,uint16_t y,uint16_t color);
58 | void ILI9341_DrawRectangle(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint16_t color);
59 | void ILI9341_DrawHLine(uint16_t x, uint16_t y, uint16_t width, uint16_t color);
60 | void ILI9341_DrawVLine(uint16_t x, uint16_t y, uint16_t height, uint16_t color);
61 | #endif
62 |
--------------------------------------------------------------------------------
/Inc/fonts.h:
--------------------------------------------------------------------------------
1 | #ifndef __FONTS_H__
2 | #define __FONTS_H__
3 |
4 | #include
5 |
6 | #define FONT1 Arial_Narrow8x12
7 | #define FONT2 Arial_Narrow10x13
8 | #define FONT3 Arial_Narrow12x16
9 | #define FONT4 Arial_Narrow15x19
10 |
11 | extern const uint8_t Arial_Narrow8x12[];
12 | extern const uint8_t Arial_Narrow10x13[];
13 | extern const uint8_t Arial_Narrow12x16[];
14 | extern const uint8_t Arial_Narrow15x19[];
15 |
16 | #endif // __FONTS_H__
17 |
--------------------------------------------------------------------------------
/Inc/main.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file : main.h
4 | * @brief : Header for main.c file.
5 | * This file contains the common defines of the application.
6 | ******************************************************************************
7 | ** This notice applies to any and all portions of this file
8 | * that are not between comment pairs USER CODE BEGIN and
9 | * USER CODE END. Other portions of this file, whether
10 | * inserted by the user or by software development tools
11 | * are owned by their respective copyright owners.
12 | *
13 | * COPYRIGHT(c) 2019 STMicroelectronics
14 | *
15 | * Redistribution and use in source and binary forms, with or without modification,
16 | * are permitted provided that the following conditions are met:
17 | * 1. Redistributions of source code must retain the above copyright notice,
18 | * this list of conditions and the following disclaimer.
19 | * 2. Redistributions in binary form must reproduce the above copyright notice,
20 | * this list of conditions and the following disclaimer in the documentation
21 | * and/or other materials provided with the distribution.
22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
23 | * may be used to endorse or promote products derived from this software
24 | * without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 | *
37 | ******************************************************************************
38 | */
39 |
40 | /* Define to prevent recursive inclusion -------------------------------------*/
41 | #ifndef __MAIN_H__
42 | #define __MAIN_H__
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 |
46 | /* USER CODE BEGIN Includes */
47 |
48 | /* USER CODE END Includes */
49 |
50 | /* Private define ------------------------------------------------------------*/
51 |
52 | #define LCD_CS_Pin GPIO_PIN_1
53 | #define LCD_CS_GPIO_Port GPIOC
54 | #define LCD_DC_Pin GPIO_PIN_2
55 | #define LCD_DC_GPIO_Port GPIOC
56 | #define LCD_RST_Pin GPIO_PIN_3
57 | #define LCD_RST_GPIO_Port GPIOC
58 |
59 | /* ########################## Assert Selection ############################## */
60 | /**
61 | * @brief Uncomment the line below to expanse the "assert_param" macro in the
62 | * HAL drivers code
63 | */
64 | /* #define USE_FULL_ASSERT 1U */
65 |
66 | /* USER CODE BEGIN Private defines */
67 |
68 | /* USER CODE END Private defines */
69 |
70 | #ifdef __cplusplus
71 | extern "C" {
72 | #endif
73 | void _Error_Handler(char *, int);
74 |
75 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__)
76 | #ifdef __cplusplus
77 | }
78 | #endif
79 |
80 | #endif /* __MAIN_H__ */
81 |
82 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
83 |
--------------------------------------------------------------------------------
/Inc/stm32f4xx_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_it.h
4 | * @brief This file contains the headers of the interrupt handlers.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2019 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 |
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __STM32F4xx_IT_H
36 | #define __STM32F4xx_IT_H
37 |
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f4xx_hal.h"
44 | #include "main.h"
45 | /* Exported types ------------------------------------------------------------*/
46 | /* Exported constants --------------------------------------------------------*/
47 | /* Exported macro ------------------------------------------------------------*/
48 | /* Exported functions ------------------------------------------------------- */
49 |
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void SVC_Handler(void);
56 | void DebugMon_Handler(void);
57 | void PendSV_Handler(void);
58 | void SysTick_Handler(void);
59 | void SPI1_IRQHandler(void);
60 | void DMA2_Stream3_IRQHandler(void);
61 |
62 | #ifdef __cplusplus
63 | }
64 | #endif
65 |
66 | #endif /* __STM32F4xx_IT_H */
67 |
68 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
69 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | # STM32_HAL_ILI9341
2 | ILI9341 Library for STM32 HAL
3 |
4 | Tutorial
5 | https://blog.naver.com/eziya76/221579262995
6 |
7 | References
8 | 1. https://github.com/martnak/STM32-ILI9341
9 | 2. https://os.mbed.com/users/dreschpe/code/SPI_TFT_ILI9341/
10 | 3. https://www.mikroe.com/glcd-font-creator
11 |
12 | Most of codes are originated from martnak's library.
13 | https://github.com/martnak/STM32-ILI9341
14 |
15 | I wanted to make it support diverse fonts so I adopted character functions from SPI_TFT_ILI9341 library.
16 | As it supports C font array created by GLCD Font Creator by MikroElektronika.
17 | https://www.mikroe.com/glcd-font-creator
18 |
19 | Please refer to the following link to get more details about fonts.
20 | https://os.mbed.com/users/dreschpe/code/SPI_TFT_ILI9341/
21 |
22 | [Modification]
23 | 1. Modified DrawText & DrawChar functions to make them support diverse bitmap fonts.
24 | 2. Rearrange SPI functions
25 | 3. Removed TIM1 related test.
26 |
27 | [ How to add new fonts ]
28 | 1. Run GLCD Font Creator
29 | 2. Click File-New Font-Import An Existing System Font
30 | 3. Select font, style and size from font dialog.
31 | 4. GLCD Font Cretor makes Bitmap fonts
32 | 5. Click Export for GLCD menu
33 | 6. Select mikroC tab.
34 | 7. Copy generated code to fonts.c file
35 | 8. Modify data type from unsigned short to uint8_t
36 | 9. Add optional bytes (offset, width, height, bpl) to the array !!! IMPORTANT !!!
37 | 10. Add extern declaration to fonts.h file
38 |
39 | 
40 |
41 | [](https://youtu.be/dZdysqPwehE)
42 |
--------------------------------------------------------------------------------
/STM32F407VG_FLASH.ld:
--------------------------------------------------------------------------------
1 | /*
2 | *****************************************************************************
3 | **
4 |
5 | ** File : stm32_flash.ld
6 | **
7 | ** Abstract : Linker script for STM32F407VG Device with
8 | ** 1024KByte FLASH, 128KByte RAM
9 | **
10 | ** Set heap size, stack size and stack location according
11 | ** to application requirements.
12 | **
13 | ** Set memory bank area and size if external memory is used.
14 | **
15 | ** Target : STMicroelectronics STM32
16 | **
17 | ** Environment : Atollic TrueSTUDIO(R)
18 | **
19 | ** Distribution: The file is distributed as is, without any warranty
20 | ** of any kind.
21 | **
22 | ** (c)Copyright Atollic AB.
23 | ** You may use this file as-is or modify it according to the needs of your
24 | ** project. This file may only be built (assembled or compiled and linked)
25 | ** using the Atollic TrueSTUDIO(R) product. The use of this file together
26 | ** with other tools than Atollic TrueSTUDIO(R) is not permitted.
27 | **
28 | *****************************************************************************
29 | */
30 |
31 | /* Entry Point */
32 | ENTRY(Reset_Handler)
33 |
34 | /* Highest address of the user mode stack */
35 | _estack = 0x20020000; /* end of RAM */
36 | /* Generate a link error if heap and stack don't fit into RAM */
37 | _Min_Heap_Size = 0x200; /* required amount of heap */
38 | _Min_Stack_Size = 0x400; /* required amount of stack */
39 |
40 | /* Specify the memory areas */
41 | MEMORY
42 | {
43 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
44 | CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K
45 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
46 | }
47 |
48 | /* Define output sections */
49 | SECTIONS
50 | {
51 | /* The startup code goes first into FLASH */
52 | .isr_vector :
53 | {
54 | . = ALIGN(4);
55 | KEEP(*(.isr_vector)) /* Startup code */
56 | . = ALIGN(4);
57 | } >FLASH
58 |
59 | /* The program code and other data goes into FLASH */
60 | .text :
61 | {
62 | . = ALIGN(4);
63 | *(.text) /* .text sections (code) */
64 | *(.text*) /* .text* sections (code) */
65 | *(.glue_7) /* glue arm to thumb code */
66 | *(.glue_7t) /* glue thumb to arm code */
67 | *(.eh_frame)
68 |
69 | KEEP (*(.init))
70 | KEEP (*(.fini))
71 |
72 | . = ALIGN(4);
73 | _etext = .; /* define a global symbols at end of code */
74 | } >FLASH
75 |
76 | /* Constant data goes into FLASH */
77 | .rodata :
78 | {
79 | . = ALIGN(4);
80 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
81 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
82 | . = ALIGN(4);
83 | } >FLASH
84 |
85 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
86 | .ARM : {
87 | __exidx_start = .;
88 | *(.ARM.exidx*)
89 | __exidx_end = .;
90 | } >FLASH
91 |
92 | .preinit_array :
93 | {
94 | PROVIDE_HIDDEN (__preinit_array_start = .);
95 | KEEP (*(.preinit_array*))
96 | PROVIDE_HIDDEN (__preinit_array_end = .);
97 | } >FLASH
98 | .init_array :
99 | {
100 | PROVIDE_HIDDEN (__init_array_start = .);
101 | KEEP (*(SORT(.init_array.*)))
102 | KEEP (*(.init_array*))
103 | PROVIDE_HIDDEN (__init_array_end = .);
104 | } >FLASH
105 | .fini_array :
106 | {
107 | PROVIDE_HIDDEN (__fini_array_start = .);
108 | KEEP (*(SORT(.fini_array.*)))
109 | KEEP (*(.fini_array*))
110 | PROVIDE_HIDDEN (__fini_array_end = .);
111 | } >FLASH
112 |
113 | /* used by the startup to initialize data */
114 | _sidata = LOADADDR(.data);
115 |
116 | /* Initialized data sections goes into RAM, load LMA copy after code */
117 | .data :
118 | {
119 | . = ALIGN(4);
120 | _sdata = .; /* create a global symbol at data start */
121 | *(.data) /* .data sections */
122 | *(.data*) /* .data* sections */
123 |
124 | . = ALIGN(4);
125 | _edata = .; /* define a global symbol at data end */
126 | } >RAM AT> FLASH
127 |
128 | _siccmram = LOADADDR(.ccmram);
129 |
130 | /* CCM-RAM section
131 | *
132 | * IMPORTANT NOTE!
133 | * If initialized variables will be placed in this section,
134 | * the startup code needs to be modified to copy the init-values.
135 | */
136 | .ccmram :
137 | {
138 | . = ALIGN(4);
139 | _sccmram = .; /* create a global symbol at ccmram start */
140 | *(.ccmram)
141 | *(.ccmram*)
142 |
143 | . = ALIGN(4);
144 | _eccmram = .; /* create a global symbol at ccmram end */
145 | } >CCMRAM AT> FLASH
146 |
147 |
148 | /* Uninitialized data section */
149 | . = ALIGN(4);
150 | .bss :
151 | {
152 | /* This is used by the startup in order to initialize the .bss secion */
153 | _sbss = .; /* define a global symbol at bss start */
154 | __bss_start__ = _sbss;
155 | *(.bss)
156 | *(.bss*)
157 | *(COMMON)
158 |
159 | . = ALIGN(4);
160 | _ebss = .; /* define a global symbol at bss end */
161 | __bss_end__ = _ebss;
162 | } >RAM
163 |
164 | /* User_heap_stack section, used to check that there is enough RAM left */
165 | ._user_heap_stack :
166 | {
167 | . = ALIGN(4);
168 | PROVIDE ( end = . );
169 | PROVIDE ( _end = . );
170 | . = . + _Min_Heap_Size;
171 | . = . + _Min_Stack_Size;
172 | . = ALIGN(4);
173 | } >RAM
174 |
175 |
176 |
177 | /* Remove information from the standard libraries */
178 | /DISCARD/ :
179 | {
180 | libc.a ( * )
181 | libm.a ( * )
182 | libgcc.a ( * )
183 | }
184 |
185 | .ARM.attributes 0 : { *(.ARM.attributes) }
186 | }
187 |
188 |
189 |
--------------------------------------------------------------------------------
/STM32F4_HAL_ILI9341.elf.launch:
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/STM32F4_HAL_ILI9341.ioc:
--------------------------------------------------------------------------------
1 | #MicroXplorer Configuration settings - do not modify
2 | Dma.Request0=SPI1_TX
3 | Dma.RequestsNb=1
4 | Dma.SPI1_TX.0.Direction=DMA_MEMORY_TO_PERIPH
5 | Dma.SPI1_TX.0.FIFOMode=DMA_FIFOMODE_DISABLE
6 | Dma.SPI1_TX.0.Instance=DMA2_Stream3
7 | Dma.SPI1_TX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
8 | Dma.SPI1_TX.0.MemInc=DMA_MINC_ENABLE
9 | Dma.SPI1_TX.0.Mode=DMA_NORMAL
10 | Dma.SPI1_TX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
11 | Dma.SPI1_TX.0.PeriphInc=DMA_PINC_DISABLE
12 | Dma.SPI1_TX.0.Priority=DMA_PRIORITY_LOW
13 | Dma.SPI1_TX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
14 | File.Version=6
15 | KeepUserPlacement=true
16 | Mcu.Family=STM32F4
17 | Mcu.IP0=DMA
18 | Mcu.IP1=NVIC
19 | Mcu.IP2=RCC
20 | Mcu.IP3=RNG
21 | Mcu.IP4=SPI1
22 | Mcu.IP5=SYS
23 | Mcu.IPNb=6
24 | Mcu.Name=STM32F407V(E-G)Tx
25 | Mcu.Package=LQFP100
26 | Mcu.Pin0=PH0-OSC_IN
27 | Mcu.Pin1=PH1-OSC_OUT
28 | Mcu.Pin2=PC1
29 | Mcu.Pin3=PC2
30 | Mcu.Pin4=PC3
31 | Mcu.Pin5=PA5
32 | Mcu.Pin6=PA6
33 | Mcu.Pin7=PA7
34 | Mcu.Pin8=VP_RNG_VS_RNG
35 | Mcu.Pin9=VP_SYS_VS_Systick
36 | Mcu.PinsNb=10
37 | Mcu.ThirdPartyNb=0
38 | Mcu.UserConstants=
39 | Mcu.UserName=STM32F407VGTx
40 | MxCube.Version=4.27.0
41 | MxDb.Version=DB.4.0.270
42 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true
43 | NVIC.DMA2_Stream3_IRQn=true\:0\:0\:false\:false\:true\:false
44 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true
45 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true
46 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true
47 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true
48 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true
49 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0
50 | NVIC.SPI1_IRQn=true\:0\:0\:false\:false\:true\:true
51 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true
52 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true
53 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true
54 | PA5.Mode=Full_Duplex_Master
55 | PA5.Signal=SPI1_SCK
56 | PA6.Mode=Full_Duplex_Master
57 | PA6.Signal=SPI1_MISO
58 | PA7.Mode=Full_Duplex_Master
59 | PA7.Signal=SPI1_MOSI
60 | PC1.GPIOParameters=GPIO_Label
61 | PC1.GPIO_Label=LCD_CS
62 | PC1.Locked=true
63 | PC1.Signal=GPIO_Output
64 | PC2.GPIOParameters=GPIO_Label
65 | PC2.GPIO_Label=LCD_DC
66 | PC2.Locked=true
67 | PC2.Signal=GPIO_Output
68 | PC3.GPIOParameters=GPIO_Label
69 | PC3.GPIO_Label=LCD_RST
70 | PC3.Locked=true
71 | PC3.Signal=GPIO_Output
72 | PCC.Checker=false
73 | PCC.Line=STM32F407/417
74 | PCC.MCU=STM32F407V(E-G)Tx
75 | PCC.PartNumber=STM32F407VGTx
76 | PCC.Seq0=0
77 | PCC.Series=STM32F4
78 | PCC.Temperature=25
79 | PCC.Vdd=3.3
80 | PH0-OSC_IN.Mode=HSE-External-Oscillator
81 | PH0-OSC_IN.Signal=RCC_OSC_IN
82 | PH1-OSC_OUT.Mode=HSE-External-Oscillator
83 | PH1-OSC_OUT.Signal=RCC_OSC_OUT
84 | PinOutPanel.RotationAngle=0
85 | ProjectManager.AskForMigrate=true
86 | ProjectManager.BackupPrevious=false
87 | ProjectManager.CompilerOptimize=6
88 | ProjectManager.ComputerToolchain=false
89 | ProjectManager.CoupleFile=false
90 | ProjectManager.CustomerFirmwarePackage=
91 | ProjectManager.DefaultFWLocation=true
92 | ProjectManager.DeletePrevious=true
93 | ProjectManager.DeviceId=STM32F407VGTx
94 | ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.21.0
95 | ProjectManager.FreePins=false
96 | ProjectManager.HalAssertFull=false
97 | ProjectManager.HeapSize=0x200
98 | ProjectManager.KeepUserCode=true
99 | ProjectManager.LastFirmware=true
100 | ProjectManager.LibraryCopy=1
101 | ProjectManager.MainLocation=Src
102 | ProjectManager.NoMain=false
103 | ProjectManager.PreviousToolchain=TrueSTUDIO
104 | ProjectManager.ProjectBuild=false
105 | ProjectManager.ProjectFileName=STM32F4_HAL_ILI9341.ioc
106 | ProjectManager.ProjectName=STM32F4_HAL_ILI9341
107 | ProjectManager.StackSize=0x400
108 | ProjectManager.TargetToolchain=TrueSTUDIO
109 | ProjectManager.ToolChainLocation=
110 | ProjectManager.UnderRoot=true
111 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_RNG_Init-RNG-false-HAL-true
112 | RCC.48MHZClocksFreq_Value=48000000
113 | RCC.AHBFreq_Value=168000000
114 | RCC.APB1CLKDivider=RCC_HCLK_DIV4
115 | RCC.APB1Freq_Value=42000000
116 | RCC.APB1TimFreq_Value=84000000
117 | RCC.APB2CLKDivider=RCC_HCLK_DIV2
118 | RCC.APB2Freq_Value=84000000
119 | RCC.APB2TimFreq_Value=168000000
120 | RCC.CortexFreq_Value=168000000
121 | RCC.EthernetFreq_Value=168000000
122 | RCC.FCLKCortexFreq_Value=168000000
123 | RCC.FamilyName=M
124 | RCC.HCLKFreq_Value=168000000
125 | RCC.HSE_VALUE=8000000
126 | RCC.HSI_VALUE=16000000
127 | RCC.I2SClocksFreq_Value=96000000
128 | RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S
129 | RCC.LSE_VALUE=32768
130 | RCC.LSI_VALUE=32000
131 | RCC.MCO2PinFreq_Value=168000000
132 | RCC.PLLCLKFreq_Value=168000000
133 | RCC.PLLM=8
134 | RCC.PLLN=336
135 | RCC.PLLQ=7
136 | RCC.PLLQCLKFreq_Value=48000000
137 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
138 | RCC.RTCFreq_Value=32000
139 | RCC.RTCHSEDivFreq_Value=4000000
140 | RCC.SYSCLKFreq_VALUE=168000000
141 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
142 | RCC.VCOI2SOutputFreq_Value=192000000
143 | RCC.VCOInputFreq_Value=1000000
144 | RCC.VCOOutputFreq_Value=336000000
145 | RCC.VcooutputI2S=96000000
146 | SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
147 | SPI1.CalculateBaudRate=42.0 MBits/s
148 | SPI1.Direction=SPI_DIRECTION_2LINES
149 | SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
150 | SPI1.Mode=SPI_MODE_MASTER
151 | SPI1.VirtualType=VM_MASTER
152 | VP_RNG_VS_RNG.Mode=RNG_Activate
153 | VP_RNG_VS_RNG.Signal=RNG_VS_RNG
154 | VP_SYS_VS_Systick.Mode=SysTick
155 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick
156 | board=STM32F4DISCOVERY
157 | boardIOC=true
158 |
--------------------------------------------------------------------------------
/Src/ILI9341_GFX.c:
--------------------------------------------------------------------------------
1 | #include "ILI9341_STM32_Driver.h"
2 | #include "ILI9341_GFX.h"
3 |
4 | /* imprecise small delay */
5 | __STATIC_INLINE void DelayUs(volatile uint32_t us)
6 | {
7 | us *= (SystemCoreClock / 1000000);
8 | while (us--);
9 | }
10 |
11 | void ILI9341_DrawHollowCircle(uint16_t X, uint16_t Y, uint16_t radius, uint16_t color)
12 | {
13 | int x = radius-1;
14 | int y = 0;
15 | int dx = 1;
16 | int dy = 1;
17 | int err = dx - (radius << 1);
18 |
19 | while (x >= y)
20 | {
21 | ILI9341_DrawPixel(X + x, Y + y, color);
22 | ILI9341_DrawPixel(X + y, Y + x, color);
23 | ILI9341_DrawPixel(X - y, Y + x, color);
24 | ILI9341_DrawPixel(X - x, Y + y, color);
25 | ILI9341_DrawPixel(X - x, Y - y, color);
26 | ILI9341_DrawPixel(X - y, Y - x, color);
27 | ILI9341_DrawPixel(X + y, Y - x, color);
28 | ILI9341_DrawPixel(X + x, Y - y, color);
29 |
30 | if (err <= 0)
31 | {
32 | y++;
33 | err += dy;
34 | dy += 2;
35 | }
36 |
37 | if (err > 0)
38 | {
39 | x--;
40 | dx += 2;
41 | err += (-radius << 1) + dx;
42 | }
43 | }
44 | }
45 |
46 | void ILI9341_DrawFilledCircle(uint16_t X, uint16_t Y, uint16_t radius, uint16_t color)
47 | {
48 |
49 | int x = radius;
50 | int y = 0;
51 | int xChange = 1 - (radius << 1);
52 | int yChange = 0;
53 | int radiusError = 0;
54 |
55 | while (x >= y)
56 | {
57 | for (int i = X - x; i <= X + x; i++)
58 | {
59 | ILI9341_DrawPixel(i, Y + y,color);
60 | ILI9341_DrawPixel(i, Y - y,color);
61 | }
62 |
63 | for (int i = X - y; i <= X + y; i++)
64 | {
65 | ILI9341_DrawPixel(i, Y + x,color);
66 | ILI9341_DrawPixel(i, Y - x,color);
67 | }
68 |
69 | y++;
70 | radiusError += yChange;
71 | yChange += 2;
72 |
73 | if (((radiusError << 1) + xChange) > 0)
74 | {
75 | x--;
76 | radiusError += xChange;
77 | xChange += 2;
78 | }
79 | }
80 | }
81 |
82 | void ILI9341_DrawHollowRectangleCoord(uint16_t X0, uint16_t Y0, uint16_t X1, uint16_t Y1, uint16_t color)
83 | {
84 | uint16_t xLen = 0;
85 | uint16_t yLen = 0;
86 | uint8_t negX = 0;
87 | uint8_t negY = 0;
88 | float negCalc = 0;
89 |
90 | negCalc = X1 - X0;
91 | if(negCalc < 0) negX = 1;
92 | negCalc = 0;
93 |
94 | negCalc = Y1 - Y0;
95 | if(negCalc < 0) negY = 1;
96 |
97 | //DRAW HORIZONTAL!
98 | if(!negX)
99 | {
100 | xLen = X1 - X0;
101 | }
102 | else
103 | {
104 | xLen = X0 - X1;
105 | }
106 | ILI9341_DrawHLine(X0, Y0, xLen, color);
107 | ILI9341_DrawHLine(X0, Y1, xLen, color);
108 |
109 | //DRAW VERTICAL!
110 | if(!negY)
111 | {
112 | yLen = Y1 - Y0;
113 | }
114 | else
115 | {
116 | yLen = Y0 - Y1;
117 | }
118 |
119 | ILI9341_DrawVLine(X0, Y0, yLen, color);
120 | ILI9341_DrawVLine(X1, Y0, yLen, color);
121 |
122 | if((xLen > 0)||(yLen > 0))
123 | {
124 | ILI9341_DrawPixel(X1, Y1, color);
125 | }
126 | }
127 |
128 | void ILI9341_DrawFilledRectangleCoord(uint16_t X0, uint16_t Y0, uint16_t X1, uint16_t Y1, uint16_t color)
129 | {
130 | uint16_t xLen = 0;
131 | uint16_t yLen = 0;
132 | uint8_t negX = 0;
133 | uint8_t negY = 0;
134 | int32_t negCalc = 0;
135 | uint16_t X0True = 0;
136 | uint16_t Y0True = 0;
137 |
138 | negCalc = X1 - X0;
139 | if(negCalc < 0) negX = 1;
140 | negCalc = 0;
141 |
142 | negCalc = Y1 - Y0;
143 | if(negCalc < 0) negY = 1;
144 |
145 | if(!negX)
146 | {
147 | xLen = X1 - X0;
148 | X0True = X0;
149 | }
150 | else
151 | {
152 | xLen = X0 - X1;
153 | X0True = X1;
154 | }
155 |
156 | if(!negY)
157 | {
158 | yLen = Y1 - Y0;
159 | Y0True = Y0;
160 | }
161 | else
162 | {
163 | yLen = Y0 - Y1;
164 | Y0True = Y1;
165 | }
166 |
167 | ILI9341_DrawRectangle(X0True, Y0True, xLen, yLen, color);
168 | }
169 |
170 | void ILI9341_DrawChar(char ch, const uint8_t font[], uint16_t X, uint16_t Y, uint16_t color, uint16_t bgcolor)
171 | {
172 | if ((ch < 31) || (ch > 127)) return;
173 |
174 | uint8_t fOffset, fWidth, fHeight, fBPL;
175 | uint8_t *tempChar;
176 |
177 | fOffset = font[0];
178 | fWidth = font[1];
179 | fHeight = font[2];
180 | fBPL = font[3];
181 |
182 | tempChar = (uint8_t*)&font[((ch - 0x20) * fOffset) + 4]; /* Current Character = Meta + (Character Index * Offset) */
183 |
184 | /* Clear background first */
185 | ILI9341_DrawRectangle(X, Y, fWidth, fHeight, bgcolor);
186 |
187 | for (int j=0; j < fHeight; j++)
188 | {
189 | for (int i=0; i < fWidth; i++)
190 | {
191 | uint8_t z = tempChar[fBPL * i + ((j & 0xF8) >> 3) + 1]; /* (j & 0xF8) >> 3, increase one by 8-bits */
192 | uint8_t b = 1 << (j & 0x07);
193 | if (( z & b ) != 0x00)
194 | {
195 | ILI9341_DrawPixel(X+i, Y+j, color);
196 | }
197 | }
198 | }
199 | }
200 |
201 | void ILI9341_DrawText(const char* str, const uint8_t font[], uint16_t X, uint16_t Y, uint16_t color, uint16_t bgcolor)
202 | {
203 | uint8_t charWidth; /* Width of character */
204 | uint8_t fOffset = font[0]; /* Offset of character */
205 | uint8_t fWidth = font[1]; /* Width of font */
206 |
207 | while (*str)
208 | {
209 | ILI9341_DrawChar(*str, font, X, Y, color, bgcolor);
210 |
211 | /* Check character width and calculate proper position */
212 | uint8_t *tempChar = (uint8_t*)&font[((*str - 0x20) * fOffset) + 4];
213 | charWidth = tempChar[0];
214 |
215 | if(charWidth + 2 < fWidth)
216 | {
217 | /* If character width is smaller than font width */
218 | X += (charWidth + 2);
219 | }
220 | else
221 | {
222 | X += fWidth;
223 | }
224 |
225 | str++;
226 | }
227 | }
228 |
229 | void ILI9341_DrawImage(const uint8_t* image, uint8_t orientation)
230 | {
231 | if(orientation == SCREEN_HORIZONTAL_1)
232 | {
233 | ILI9341_SetRotation(SCREEN_HORIZONTAL_1);
234 | ILI9341_SetAddress(0,0,ILI9341_SCREEN_WIDTH,ILI9341_SCREEN_HEIGHT);
235 | }
236 | else if(orientation == SCREEN_HORIZONTAL_2)
237 | {
238 | ILI9341_SetRotation(SCREEN_HORIZONTAL_2);
239 | ILI9341_SetAddress(0,0,ILI9341_SCREEN_WIDTH,ILI9341_SCREEN_HEIGHT);
240 | }
241 | else if(orientation == SCREEN_VERTICAL_2)
242 | {
243 | ILI9341_SetRotation(SCREEN_VERTICAL_2);
244 | ILI9341_SetAddress(0,0,ILI9341_SCREEN_HEIGHT,ILI9341_SCREEN_WIDTH);
245 | }
246 | else if(orientation == SCREEN_VERTICAL_1)
247 | {
248 | ILI9341_SetRotation(SCREEN_VERTICAL_1);
249 | ILI9341_SetAddress(0,0,ILI9341_SCREEN_HEIGHT,ILI9341_SCREEN_WIDTH);
250 | }
251 |
252 | uint32_t counter = 0;
253 | for(uint32_t i = 0; i < ILI9341_SCREEN_WIDTH*ILI9341_SCREEN_HEIGHT*2/BURST_MAX_SIZE; i++)
254 | {
255 | ILI9341_WriteBuffer((uint8_t*)(image + counter), BURST_MAX_SIZE);
256 | counter += BURST_MAX_SIZE;
257 |
258 | /* DMA Tx is too fast, It needs some delay */
259 | DelayUs(1);
260 | }
261 | }
262 |
--------------------------------------------------------------------------------
/Src/ILI9341_STM32_Driver.c:
--------------------------------------------------------------------------------
1 | #include "ILI9341_STM32_Driver.h"
2 |
3 | volatile uint16_t LCD_HEIGHT = ILI9341_SCREEN_HEIGHT;
4 | volatile uint16_t LCD_WIDTH = ILI9341_SCREEN_WIDTH;
5 |
6 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
7 | {
8 | /* Deselect when Tx Complete */
9 | if(hspi == HSPI_INSTANCE)
10 | {
11 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_SET);
12 | }
13 | }
14 |
15 | static void ILI9341_SPI_Tx(uint8_t data)
16 | {
17 | while(!__HAL_SPI_GET_FLAG(HSPI_INSTANCE, SPI_FLAG_TXE));
18 | HAL_SPI_Transmit_DMA(HSPI_INSTANCE, &data, 1);
19 | //HAL_SPI_Transmit(HSPI_INSTANCE, &data, 1, 10);
20 | }
21 |
22 | static void ILI9341_SPI_TxBuffer(uint8_t *buffer, uint16_t len)
23 | {
24 | while(!__HAL_SPI_GET_FLAG(HSPI_INSTANCE, SPI_FLAG_TXE));
25 | HAL_SPI_Transmit_DMA(HSPI_INSTANCE, buffer, len);
26 | //HAL_SPI_Transmit(HSPI_INSTANCE, buffer, len, 10);
27 | }
28 |
29 | void ILI9341_WriteCommand(uint8_t cmd)
30 | {
31 | HAL_GPIO_WritePin(LCD_DC_PORT, LCD_DC_PIN, GPIO_PIN_RESET); //command
32 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_RESET); //select
33 | ILI9341_SPI_Tx(cmd);
34 | //HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_SET); //deselect
35 | }
36 |
37 | void ILI9341_WriteData(uint8_t data)
38 | {
39 | HAL_GPIO_WritePin(LCD_DC_PORT, LCD_DC_PIN, GPIO_PIN_SET); //data
40 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_RESET); //select
41 | ILI9341_SPI_Tx(data);
42 | //HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_SET); //deselect
43 | }
44 |
45 | void ILI9341_WriteBuffer(uint8_t *buffer, uint16_t len)
46 | {
47 | HAL_GPIO_WritePin(LCD_DC_PORT, LCD_DC_PIN, GPIO_PIN_SET); //data
48 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_RESET); //select
49 | ILI9341_SPI_TxBuffer(buffer, len);
50 | //HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_SET); //deselect
51 | }
52 |
53 | void ILI9341_SetAddress(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
54 | {
55 | uint8_t buffer[4];
56 | buffer[0] = x1 >> 8;
57 | buffer[1] = x1;
58 | buffer[2] = x2 >> 8;
59 | buffer[3] = x2;
60 |
61 | ILI9341_WriteCommand(0x2A);
62 | ILI9341_WriteBuffer(buffer, sizeof(buffer));
63 |
64 | buffer[0] = y1 >> 8;
65 | buffer[1] = y1;
66 | buffer[2] = y2 >> 8;
67 | buffer[3] = y2;
68 |
69 | ILI9341_WriteCommand(0x2B);
70 | ILI9341_WriteBuffer(buffer, sizeof(buffer));
71 |
72 | ILI9341_WriteCommand(0x2C);
73 | }
74 |
75 | void ILI9341_Reset(void)
76 | {
77 | HAL_GPIO_WritePin(LCD_RST_PORT, LCD_RST_PIN, GPIO_PIN_RESET); //Disable
78 | HAL_Delay(10);
79 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_RESET); //Select
80 | HAL_Delay(10);
81 | HAL_GPIO_WritePin(LCD_RST_PORT, LCD_RST_PIN, GPIO_PIN_SET); //Enable
82 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_SET); //Deselect
83 | }
84 |
85 | void ILI9341_Enable(void)
86 | {
87 | HAL_GPIO_WritePin(LCD_RST_PORT, LCD_RST_PIN, GPIO_PIN_SET); //Enable
88 | }
89 |
90 | void ILI9341_Init(void)
91 | {
92 | ILI9341_Enable();
93 | ILI9341_Reset();
94 |
95 | //SOFTWARE RESET
96 | ILI9341_WriteCommand(0x01);
97 | HAL_Delay(10);
98 |
99 | //POWER CONTROL A
100 | ILI9341_WriteCommand(0xCB);
101 | ILI9341_WriteData(0x39);
102 | ILI9341_WriteData(0x2C);
103 | ILI9341_WriteData(0x00);
104 | ILI9341_WriteData(0x34);
105 | ILI9341_WriteData(0x02);
106 |
107 | //POWER CONTROL B
108 | ILI9341_WriteCommand(0xCF);
109 | ILI9341_WriteData(0x00);
110 | ILI9341_WriteData(0xC1);
111 | ILI9341_WriteData(0x30);
112 |
113 | //DRIVER TIMING CONTROL A
114 | ILI9341_WriteCommand(0xE8);
115 | ILI9341_WriteData(0x85);
116 | ILI9341_WriteData(0x00);
117 | ILI9341_WriteData(0x78);
118 |
119 | //DRIVER TIMING CONTROL B
120 | ILI9341_WriteCommand(0xEA);
121 | ILI9341_WriteData(0x00);
122 | ILI9341_WriteData(0x00);
123 |
124 | //POWER ON SEQUENCE CONTROL
125 | ILI9341_WriteCommand(0xED);
126 | ILI9341_WriteData(0x64);
127 | ILI9341_WriteData(0x03);
128 | ILI9341_WriteData(0x12);
129 | ILI9341_WriteData(0x81);
130 |
131 | //PUMP RATIO CONTROL
132 | ILI9341_WriteCommand(0xF7);
133 | ILI9341_WriteData(0x20);
134 |
135 | //POWER CONTROL,VRH[5:0]
136 | ILI9341_WriteCommand(0xC0);
137 | ILI9341_WriteData(0x23);
138 |
139 | //POWER CONTROL,SAP[2:0];BT[3:0]
140 | ILI9341_WriteCommand(0xC1);
141 | ILI9341_WriteData(0x10);
142 |
143 | //VCM CONTROL
144 | ILI9341_WriteCommand(0xC5);
145 | ILI9341_WriteData(0x3E);
146 | ILI9341_WriteData(0x28);
147 |
148 | //VCM CONTROL 2
149 | ILI9341_WriteCommand(0xC7);
150 | ILI9341_WriteData(0x86);
151 |
152 | //MEMORY ACCESS CONTROL
153 | ILI9341_WriteCommand(0x36);
154 | ILI9341_WriteData(0x48);
155 |
156 | //PIXEL FORMAT
157 | ILI9341_WriteCommand(0x3A);
158 | ILI9341_WriteData(0x55);
159 |
160 | //FRAME RATIO CONTROL, STANDARD RGB COLOR
161 | ILI9341_WriteCommand(0xB1);
162 | ILI9341_WriteData(0x00);
163 | ILI9341_WriteData(0x18);
164 |
165 | //DISPLAY FUNCTION CONTROL
166 | ILI9341_WriteCommand(0xB6);
167 | ILI9341_WriteData(0x08);
168 | ILI9341_WriteData(0x82);
169 | ILI9341_WriteData(0x27);
170 |
171 | //3GAMMA FUNCTION DISABLE
172 | ILI9341_WriteCommand(0xF2);
173 | ILI9341_WriteData(0x00);
174 |
175 | //GAMMA CURVE SELECTED
176 | ILI9341_WriteCommand(0x26);
177 | ILI9341_WriteData(0x01);
178 |
179 | //POSITIVE GAMMA CORRECTION
180 | ILI9341_WriteCommand(0xE0);
181 | ILI9341_WriteData(0x0F);
182 | ILI9341_WriteData(0x31);
183 | ILI9341_WriteData(0x2B);
184 | ILI9341_WriteData(0x0C);
185 | ILI9341_WriteData(0x0E);
186 | ILI9341_WriteData(0x08);
187 | ILI9341_WriteData(0x4E);
188 | ILI9341_WriteData(0xF1);
189 | ILI9341_WriteData(0x37);
190 | ILI9341_WriteData(0x07);
191 | ILI9341_WriteData(0x10);
192 | ILI9341_WriteData(0x03);
193 | ILI9341_WriteData(0x0E);
194 | ILI9341_WriteData(0x09);
195 | ILI9341_WriteData(0x00);
196 |
197 | //NEGATIVE GAMMA CORRECTION
198 | ILI9341_WriteCommand(0xE1);
199 | ILI9341_WriteData(0x00);
200 | ILI9341_WriteData(0x0E);
201 | ILI9341_WriteData(0x14);
202 | ILI9341_WriteData(0x03);
203 | ILI9341_WriteData(0x11);
204 | ILI9341_WriteData(0x07);
205 | ILI9341_WriteData(0x31);
206 | ILI9341_WriteData(0xC1);
207 | ILI9341_WriteData(0x48);
208 | ILI9341_WriteData(0x08);
209 | ILI9341_WriteData(0x0F);
210 | ILI9341_WriteData(0x0C);
211 | ILI9341_WriteData(0x31);
212 | ILI9341_WriteData(0x36);
213 | ILI9341_WriteData(0x0F);
214 |
215 | //EXIT SLEEP
216 | ILI9341_WriteCommand(0x11);
217 | HAL_Delay(100);
218 |
219 | //TURN ON DISPLAY
220 | ILI9341_WriteCommand(0x29);
221 |
222 | //STARTING ROTATION
223 | ILI9341_SetRotation(SCREEN_VERTICAL_1);
224 | }
225 |
226 | void ILI9341_SetRotation(uint8_t rotation)
227 | {
228 | ILI9341_WriteCommand(0x36);
229 | HAL_Delay(1);
230 |
231 | switch(rotation)
232 | {
233 | case SCREEN_VERTICAL_1:
234 | ILI9341_WriteData(0x40|0x08);
235 | LCD_WIDTH = 240;
236 | LCD_HEIGHT = 320;
237 | break;
238 | case SCREEN_HORIZONTAL_1:
239 | ILI9341_WriteData(0x20|0x08);
240 | LCD_WIDTH = 320;
241 | LCD_HEIGHT = 240;
242 | break;
243 | case SCREEN_VERTICAL_2:
244 | ILI9341_WriteData(0x80|0x08);
245 | LCD_WIDTH = 240;
246 | LCD_HEIGHT = 320;
247 | break;
248 | case SCREEN_HORIZONTAL_2:
249 | ILI9341_WriteData(0x40|0x80|0x20|0x08);
250 | LCD_WIDTH = 320;
251 | LCD_HEIGHT = 240;
252 | break;
253 | default:
254 | break;
255 | }
256 | }
257 |
258 | void ILI9341_DrawColor(uint16_t color)
259 | {
260 | uint8_t buffer[2] = {color>>8, color};
261 | ILI9341_WriteBuffer(buffer, sizeof(buffer));
262 | }
263 |
264 | void ILI9341_DrawColorBurst(uint16_t color, uint32_t size)
265 | {
266 | uint32_t BufferSize = 0;
267 |
268 | if((size*2) < BURST_MAX_SIZE)
269 | {
270 | BufferSize = size;
271 | }
272 | else
273 | {
274 | BufferSize = BURST_MAX_SIZE;
275 | }
276 |
277 | HAL_GPIO_WritePin(LCD_DC_PORT, LCD_DC_PIN, GPIO_PIN_SET);
278 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_RESET);
279 |
280 | uint8_t chifted = color>>8;
281 | uint8_t BurstBuffer[BufferSize];
282 |
283 | for(uint32_t j = 0; j < BufferSize; j+=2)
284 | {
285 | BurstBuffer[j] = chifted;
286 | BurstBuffer[j+1] = color;
287 | }
288 |
289 | uint32_t SendingSize = size * 2;
290 | uint32_t SendingInBlock = SendingSize / BufferSize;
291 | uint32_t RemainderFromBlock = SendingSize % BufferSize;
292 |
293 | if(SendingInBlock != 0)
294 | {
295 | for(uint32_t j = 0; j < (SendingInBlock); j++)
296 | {
297 | HAL_SPI_Transmit(HSPI_INSTANCE, BurstBuffer, BufferSize, 10);
298 | }
299 | }
300 |
301 | HAL_SPI_Transmit(HSPI_INSTANCE, BurstBuffer, RemainderFromBlock, 10);
302 | HAL_GPIO_WritePin(LCD_CS_PORT, LCD_CS_PIN, GPIO_PIN_SET);
303 | }
304 |
305 | void ILI9341_FillScreen(uint16_t color)
306 | {
307 | ILI9341_SetAddress(0, 0, LCD_WIDTH, LCD_HEIGHT);
308 | ILI9341_DrawColorBurst(color, LCD_WIDTH*LCD_HEIGHT);
309 | }
310 |
311 | void ILI9341_DrawPixel(uint16_t x,uint16_t y,uint16_t color)
312 | {
313 | if((x >=LCD_WIDTH) || (y >=LCD_HEIGHT)) return;
314 |
315 | uint8_t bufferX[4] = {x>>8, x, (x+1)>>8, (x+1)};
316 | uint8_t bufferY[4] = {y>>8, y, (y+1)>>8, (y+1)};
317 | uint8_t bufferC[2] = {color>>8, color};
318 |
319 | ILI9341_WriteCommand(0x2A); //ADDRESS
320 | ILI9341_WriteBuffer(bufferX, sizeof(bufferX)); //XDATA
321 |
322 | ILI9341_WriteCommand(0x2B); //ADDRESS
323 | ILI9341_WriteBuffer(bufferY, sizeof(bufferY)); //YDATA
324 |
325 | ILI9341_WriteCommand(0x2C); //ADDRESS
326 | ILI9341_WriteBuffer(bufferC, sizeof(bufferC)); //COLOR
327 | }
328 |
329 | void ILI9341_DrawRectangle(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint16_t color)
330 | {
331 | if((x >=LCD_WIDTH) || (y >=LCD_HEIGHT)) return;
332 |
333 | if((x+width-1)>=LCD_WIDTH)
334 | {
335 | width=LCD_WIDTH-x;
336 | }
337 |
338 | if((y+height-1)>=LCD_HEIGHT)
339 | {
340 | height=LCD_HEIGHT-y;
341 | }
342 |
343 | ILI9341_SetAddress(x, y, x+width-1, y+height-1);
344 | ILI9341_DrawColorBurst(color, height*width);
345 | }
346 |
347 | void ILI9341_DrawHLine(uint16_t x, uint16_t y, uint16_t width, uint16_t color)
348 | {
349 | if((x >=LCD_WIDTH) || (y >=LCD_HEIGHT)) return;
350 |
351 | if((x+width-1)>=LCD_WIDTH)
352 | {
353 | width=LCD_WIDTH-x;
354 | }
355 |
356 | ILI9341_SetAddress(x, y, x+width-1, y);
357 | ILI9341_DrawColorBurst(color, width);
358 | }
359 |
360 | void ILI9341_DrawVLine(uint16_t x, uint16_t y, uint16_t height, uint16_t color)
361 | {
362 | if((x >=LCD_WIDTH) || (y >=LCD_HEIGHT)) return;
363 |
364 | if((y+height-1)>=LCD_HEIGHT)
365 | {
366 | height=LCD_HEIGHT-y;
367 | }
368 |
369 | ILI9341_SetAddress(x, y, x, y+height-1);
370 | ILI9341_DrawColorBurst(color, height);
371 | }
372 |
--------------------------------------------------------------------------------
/Src/stm32f4xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : stm32f4xx_hal_msp.c
4 | * Description : This file provides code for the MSP Initialization
5 | * and de-Initialization codes.
6 | ******************************************************************************
7 | ** This notice applies to any and all portions of this file
8 | * that are not between comment pairs USER CODE BEGIN and
9 | * USER CODE END. Other portions of this file, whether
10 | * inserted by the user or by software development tools
11 | * are owned by their respective copyright owners.
12 | *
13 | * COPYRIGHT(c) 2019 STMicroelectronics
14 | *
15 | * Redistribution and use in source and binary forms, with or without modification,
16 | * are permitted provided that the following conditions are met:
17 | * 1. Redistributions of source code must retain the above copyright notice,
18 | * this list of conditions and the following disclaimer.
19 | * 2. Redistributions in binary form must reproduce the above copyright notice,
20 | * this list of conditions and the following disclaimer in the documentation
21 | * and/or other materials provided with the distribution.
22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
23 | * may be used to endorse or promote products derived from this software
24 | * without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 | *
37 | ******************************************************************************
38 | */
39 | /* Includes ------------------------------------------------------------------*/
40 | #include "stm32f4xx_hal.h"
41 | extern DMA_HandleTypeDef hdma_spi1_tx;
42 |
43 | extern void _Error_Handler(char *, int);
44 | /* USER CODE BEGIN 0 */
45 |
46 | /* USER CODE END 0 */
47 | /**
48 | * Initializes the Global MSP.
49 | */
50 | void HAL_MspInit(void)
51 | {
52 | /* USER CODE BEGIN MspInit 0 */
53 |
54 | /* USER CODE END MspInit 0 */
55 |
56 | __HAL_RCC_SYSCFG_CLK_ENABLE();
57 | __HAL_RCC_PWR_CLK_ENABLE();
58 |
59 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
60 |
61 | /* System interrupt init*/
62 | /* MemoryManagement_IRQn interrupt configuration */
63 | HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0);
64 | /* BusFault_IRQn interrupt configuration */
65 | HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0);
66 | /* UsageFault_IRQn interrupt configuration */
67 | HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0);
68 | /* SVCall_IRQn interrupt configuration */
69 | HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0);
70 | /* DebugMonitor_IRQn interrupt configuration */
71 | HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0);
72 | /* PendSV_IRQn interrupt configuration */
73 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0);
74 | /* SysTick_IRQn interrupt configuration */
75 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
76 |
77 | /* USER CODE BEGIN MspInit 1 */
78 |
79 | /* USER CODE END MspInit 1 */
80 | }
81 |
82 | void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
83 | {
84 |
85 | if(hrng->Instance==RNG)
86 | {
87 | /* USER CODE BEGIN RNG_MspInit 0 */
88 |
89 | /* USER CODE END RNG_MspInit 0 */
90 | /* Peripheral clock enable */
91 | __HAL_RCC_RNG_CLK_ENABLE();
92 | /* USER CODE BEGIN RNG_MspInit 1 */
93 |
94 | /* USER CODE END RNG_MspInit 1 */
95 | }
96 |
97 | }
98 |
99 | void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
100 | {
101 |
102 | if(hrng->Instance==RNG)
103 | {
104 | /* USER CODE BEGIN RNG_MspDeInit 0 */
105 |
106 | /* USER CODE END RNG_MspDeInit 0 */
107 | /* Peripheral clock disable */
108 | __HAL_RCC_RNG_CLK_DISABLE();
109 | /* USER CODE BEGIN RNG_MspDeInit 1 */
110 |
111 | /* USER CODE END RNG_MspDeInit 1 */
112 | }
113 |
114 | }
115 |
116 | void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
117 | {
118 |
119 | GPIO_InitTypeDef GPIO_InitStruct;
120 | if(hspi->Instance==SPI1)
121 | {
122 | /* USER CODE BEGIN SPI1_MspInit 0 */
123 |
124 | /* USER CODE END SPI1_MspInit 0 */
125 | /* Peripheral clock enable */
126 | __HAL_RCC_SPI1_CLK_ENABLE();
127 |
128 | /**SPI1 GPIO Configuration
129 | PA5 ------> SPI1_SCK
130 | PA6 ------> SPI1_MISO
131 | PA7 ------> SPI1_MOSI
132 | */
133 | GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
134 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
135 | GPIO_InitStruct.Pull = GPIO_NOPULL;
136 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
137 | GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
138 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
139 |
140 | /* SPI1 DMA Init */
141 | /* SPI1_TX Init */
142 | hdma_spi1_tx.Instance = DMA2_Stream3;
143 | hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3;
144 | hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
145 | hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
146 | hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
147 | hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
148 | hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
149 | hdma_spi1_tx.Init.Mode = DMA_NORMAL;
150 | hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
151 | hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
152 | if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
153 | {
154 | _Error_Handler(__FILE__, __LINE__);
155 | }
156 |
157 | __HAL_LINKDMA(hspi,hdmatx,hdma_spi1_tx);
158 |
159 | /* SPI1 interrupt Init */
160 | HAL_NVIC_SetPriority(SPI1_IRQn, 0, 0);
161 | HAL_NVIC_EnableIRQ(SPI1_IRQn);
162 | /* USER CODE BEGIN SPI1_MspInit 1 */
163 |
164 | /* USER CODE END SPI1_MspInit 1 */
165 | }
166 |
167 | }
168 |
169 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
170 | {
171 |
172 | if(hspi->Instance==SPI1)
173 | {
174 | /* USER CODE BEGIN SPI1_MspDeInit 0 */
175 |
176 | /* USER CODE END SPI1_MspDeInit 0 */
177 | /* Peripheral clock disable */
178 | __HAL_RCC_SPI1_CLK_DISABLE();
179 |
180 | /**SPI1 GPIO Configuration
181 | PA5 ------> SPI1_SCK
182 | PA6 ------> SPI1_MISO
183 | PA7 ------> SPI1_MOSI
184 | */
185 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
186 |
187 | /* SPI1 DMA DeInit */
188 | HAL_DMA_DeInit(hspi->hdmatx);
189 |
190 | /* SPI1 interrupt DeInit */
191 | HAL_NVIC_DisableIRQ(SPI1_IRQn);
192 | /* USER CODE BEGIN SPI1_MspDeInit 1 */
193 |
194 | /* USER CODE END SPI1_MspDeInit 1 */
195 | }
196 |
197 | }
198 |
199 | /* USER CODE BEGIN 1 */
200 |
201 | /* USER CODE END 1 */
202 |
203 | /**
204 | * @}
205 | */
206 |
207 | /**
208 | * @}
209 | */
210 |
211 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
212 |
--------------------------------------------------------------------------------
/Src/stm32f4xx_it.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_it.c
4 | * @brief Interrupt Service Routines.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2019 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 | /* Includes ------------------------------------------------------------------*/
34 | #include "stm32f4xx_hal.h"
35 | #include "stm32f4xx.h"
36 | #include "stm32f4xx_it.h"
37 |
38 | /* USER CODE BEGIN 0 */
39 |
40 | /* USER CODE END 0 */
41 |
42 | /* External variables --------------------------------------------------------*/
43 | extern DMA_HandleTypeDef hdma_spi1_tx;
44 | extern SPI_HandleTypeDef hspi1;
45 |
46 | /******************************************************************************/
47 | /* Cortex-M4 Processor Interruption and Exception Handlers */
48 | /******************************************************************************/
49 |
50 | /**
51 | * @brief This function handles Non maskable interrupt.
52 | */
53 | void NMI_Handler(void)
54 | {
55 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
56 |
57 | /* USER CODE END NonMaskableInt_IRQn 0 */
58 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
59 |
60 | /* USER CODE END NonMaskableInt_IRQn 1 */
61 | }
62 |
63 | /**
64 | * @brief This function handles Hard fault interrupt.
65 | */
66 | void HardFault_Handler(void)
67 | {
68 | /* USER CODE BEGIN HardFault_IRQn 0 */
69 |
70 | /* USER CODE END HardFault_IRQn 0 */
71 | while (1)
72 | {
73 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */
74 | /* USER CODE END W1_HardFault_IRQn 0 */
75 | }
76 | /* USER CODE BEGIN HardFault_IRQn 1 */
77 |
78 | /* USER CODE END HardFault_IRQn 1 */
79 | }
80 |
81 | /**
82 | * @brief This function handles Memory management fault.
83 | */
84 | void MemManage_Handler(void)
85 | {
86 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */
87 |
88 | /* USER CODE END MemoryManagement_IRQn 0 */
89 | while (1)
90 | {
91 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
92 | /* USER CODE END W1_MemoryManagement_IRQn 0 */
93 | }
94 | /* USER CODE BEGIN MemoryManagement_IRQn 1 */
95 |
96 | /* USER CODE END MemoryManagement_IRQn 1 */
97 | }
98 |
99 | /**
100 | * @brief This function handles Pre-fetch fault, memory access fault.
101 | */
102 | void BusFault_Handler(void)
103 | {
104 | /* USER CODE BEGIN BusFault_IRQn 0 */
105 |
106 | /* USER CODE END BusFault_IRQn 0 */
107 | while (1)
108 | {
109 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */
110 | /* USER CODE END W1_BusFault_IRQn 0 */
111 | }
112 | /* USER CODE BEGIN BusFault_IRQn 1 */
113 |
114 | /* USER CODE END BusFault_IRQn 1 */
115 | }
116 |
117 | /**
118 | * @brief This function handles Undefined instruction or illegal state.
119 | */
120 | void UsageFault_Handler(void)
121 | {
122 | /* USER CODE BEGIN UsageFault_IRQn 0 */
123 |
124 | /* USER CODE END UsageFault_IRQn 0 */
125 | while (1)
126 | {
127 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
128 | /* USER CODE END W1_UsageFault_IRQn 0 */
129 | }
130 | /* USER CODE BEGIN UsageFault_IRQn 1 */
131 |
132 | /* USER CODE END UsageFault_IRQn 1 */
133 | }
134 |
135 | /**
136 | * @brief This function handles System service call via SWI instruction.
137 | */
138 | void SVC_Handler(void)
139 | {
140 | /* USER CODE BEGIN SVCall_IRQn 0 */
141 |
142 | /* USER CODE END SVCall_IRQn 0 */
143 | /* USER CODE BEGIN SVCall_IRQn 1 */
144 |
145 | /* USER CODE END SVCall_IRQn 1 */
146 | }
147 |
148 | /**
149 | * @brief This function handles Debug monitor.
150 | */
151 | void DebugMon_Handler(void)
152 | {
153 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */
154 |
155 | /* USER CODE END DebugMonitor_IRQn 0 */
156 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */
157 |
158 | /* USER CODE END DebugMonitor_IRQn 1 */
159 | }
160 |
161 | /**
162 | * @brief This function handles Pendable request for system service.
163 | */
164 | void PendSV_Handler(void)
165 | {
166 | /* USER CODE BEGIN PendSV_IRQn 0 */
167 |
168 | /* USER CODE END PendSV_IRQn 0 */
169 | /* USER CODE BEGIN PendSV_IRQn 1 */
170 |
171 | /* USER CODE END PendSV_IRQn 1 */
172 | }
173 |
174 | /**
175 | * @brief This function handles System tick timer.
176 | */
177 | void SysTick_Handler(void)
178 | {
179 | /* USER CODE BEGIN SysTick_IRQn 0 */
180 |
181 | /* USER CODE END SysTick_IRQn 0 */
182 | HAL_IncTick();
183 | HAL_SYSTICK_IRQHandler();
184 | /* USER CODE BEGIN SysTick_IRQn 1 */
185 |
186 | /* USER CODE END SysTick_IRQn 1 */
187 | }
188 |
189 | /******************************************************************************/
190 | /* STM32F4xx Peripheral Interrupt Handlers */
191 | /* Add here the Interrupt Handlers for the used peripherals. */
192 | /* For the available peripheral interrupt handler names, */
193 | /* please refer to the startup file (startup_stm32f4xx.s). */
194 | /******************************************************************************/
195 |
196 | /**
197 | * @brief This function handles SPI1 global interrupt.
198 | */
199 | void SPI1_IRQHandler(void)
200 | {
201 | /* USER CODE BEGIN SPI1_IRQn 0 */
202 |
203 | /* USER CODE END SPI1_IRQn 0 */
204 | HAL_SPI_IRQHandler(&hspi1);
205 | /* USER CODE BEGIN SPI1_IRQn 1 */
206 |
207 | /* USER CODE END SPI1_IRQn 1 */
208 | }
209 |
210 | /**
211 | * @brief This function handles DMA2 stream3 global interrupt.
212 | */
213 | void DMA2_Stream3_IRQHandler(void)
214 | {
215 | /* USER CODE BEGIN DMA2_Stream3_IRQn 0 */
216 |
217 | /* USER CODE END DMA2_Stream3_IRQn 0 */
218 | HAL_DMA_IRQHandler(&hdma_spi1_tx);
219 | /* USER CODE BEGIN DMA2_Stream3_IRQn 1 */
220 |
221 | /* USER CODE END DMA2_Stream3_IRQn 1 */
222 | }
223 |
224 | /* USER CODE BEGIN 1 */
225 |
226 | /* USER CODE END 1 */
227 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
228 |
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