├── .cproject ├── .gitignore ├── .mxproject ├── .project ├── Bootloader.ioc ├── Design ├── bootloader.graphml ├── bootloader.png ├── memory_map.graphml ├── memory_map.png ├── stm32f100-pinout.png ├── terminal-putty.png └── terminal-teraterm.png ├── Drivers ├── CMSIS │ ├── Device │ │ └── ST │ │ │ └── STM32F1xx │ │ │ └── Include │ │ │ ├── stm32f100xb.h │ │ │ ├── stm32f1xx.h │ │ │ └── system_stm32f1xx.h │ └── Include │ │ ├── arm_common_tables.h │ │ ├── arm_const_structs.h │ │ ├── arm_math.h │ │ ├── cmsis_armcc.h │ │ ├── cmsis_armcc_V6.h │ │ ├── cmsis_gcc.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm3.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_cmFunc.h │ │ ├── core_cmInstr.h │ │ ├── core_cmSimd.h │ │ ├── core_sc000.h │ │ └── core_sc300.h └── STM32F1xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32f1xx_hal.h │ ├── stm32f1xx_hal_cortex.h │ ├── stm32f1xx_hal_def.h │ ├── stm32f1xx_hal_dma.h │ ├── stm32f1xx_hal_dma_ex.h │ ├── stm32f1xx_hal_flash.h │ ├── stm32f1xx_hal_flash_ex.h │ ├── stm32f1xx_hal_gpio.h │ ├── stm32f1xx_hal_gpio_ex.h │ ├── stm32f1xx_hal_pwr.h │ ├── stm32f1xx_hal_rcc.h │ ├── stm32f1xx_hal_rcc_ex.h │ ├── stm32f1xx_hal_tim.h │ ├── stm32f1xx_hal_tim_ex.h │ └── stm32f1xx_hal_uart.h │ └── Src │ ├── stm32f1xx_hal.c │ ├── stm32f1xx_hal_cortex.c │ ├── stm32f1xx_hal_dma.c │ ├── stm32f1xx_hal_flash.c │ ├── stm32f1xx_hal_flash_ex.c │ ├── stm32f1xx_hal_gpio.c │ ├── stm32f1xx_hal_gpio_ex.c │ ├── stm32f1xx_hal_pwr.c │ ├── stm32f1xx_hal_rcc.c │ ├── stm32f1xx_hal_rcc_ex.c │ ├── stm32f1xx_hal_tim.c │ ├── stm32f1xx_hal_tim_ex.c │ └── stm32f1xx_hal_uart.c ├── Inc ├── flash.h ├── main.h ├── stm32f1xx_hal_conf.h ├── stm32f1xx_it.h ├── uart.h └── xmodem.h ├── LICENSE ├── README.md ├── STM32F100RB_FLASH.ld ├── Src ├── flash.c ├── main.c ├── stm32f1xx_hal_msp.c ├── stm32f1xx_it.c ├── system_stm32f1xx.c ├── uart.c └── xmodem.c ├── blinky_test.bin └── startup └── startup_stm32f100xb.s /.gitignore: -------------------------------------------------------------------------------- 1 | .settings 2 | Debug/ 3 | Release/ 4 | *.launch 5 | !blinky_test.bin -------------------------------------------------------------------------------- /.mxproject: -------------------------------------------------------------------------------- 1 | [PreviousGenFiles] 2 | HeaderPath=C:/Users/Feco/Documents/STM32/Bootloader/Inc 3 | HeaderFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; 4 | SourcePath=C:/Users/Feco/Documents/STM32/Bootloader/Src 5 | SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; 6 | 7 | [PreviousLibFiles] 8 | LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; 9 | 10 | [PreviousUsedTStudioFiles] 11 | SourceFiles=..\Src\main.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;null; 12 | HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc; 13 | CDefines=__weak:__attribute__((weak));__packed:__attribute__((__packed__)); 14 | 15 | -------------------------------------------------------------------------------- /.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | Bootloader 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | ?children? 14 | ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| 15 | 16 | 17 | ?name? 18 | 19 | 20 | 21 | org.eclipse.cdt.make.core.append_environment 22 | true 23 | 24 | 25 | org.eclipse.cdt.make.core.buildArguments 26 | 27 | 28 | 29 | org.eclipse.cdt.make.core.buildCommand 30 | make 31 | 32 | 33 | org.eclipse.cdt.make.core.buildLocation 34 | ${workspace_loc:/STM32100B-EVAL/Debug} 35 | 36 | 37 | org.eclipse.cdt.make.core.contents 38 | org.eclipse.cdt.make.core.activeConfigSettings 39 | 40 | 41 | org.eclipse.cdt.make.core.enableAutoBuild 42 | false 43 | 44 | 45 | org.eclipse.cdt.make.core.enableCleanBuild 46 | true 47 | 48 | 49 | org.eclipse.cdt.make.core.enableFullBuild 50 | true 51 | 52 | 53 | org.eclipse.cdt.make.core.stopOnError 54 | true 55 | 56 | 57 | org.eclipse.cdt.make.core.useDefaultBuildCmd 58 | true 59 | 60 | 61 | 62 | 63 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 64 | 65 | 66 | 67 | 68 | 69 | org.eclipse.cdt.core.cnature 70 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 71 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 72 | 73 | 74 | 75 | 76 | 77 | -------------------------------------------------------------------------------- /Bootloader.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | File.Version=6 3 | KeepUserPlacement=true 4 | Mcu.Family=STM32F1 5 | Mcu.IP0=NVIC 6 | Mcu.IP1=RCC 7 | Mcu.IP2=SYS 8 | Mcu.IP3=USART1 9 | Mcu.IPNb=4 10 | Mcu.Name=STM32F100R(8-B)Tx 11 | Mcu.Package=LQFP64 12 | Mcu.Pin0=PD0-OSC_IN 13 | Mcu.Pin1=PD1-OSC_OUT 14 | Mcu.Pin2=PA0-WKUP 15 | Mcu.Pin3=PC8 16 | Mcu.Pin4=PC9 17 | Mcu.Pin5=PA9 18 | Mcu.Pin6=PA10 19 | Mcu.Pin7=PA13 20 | Mcu.Pin8=PA14 21 | Mcu.Pin9=VP_SYS_VS_Systick 22 | Mcu.PinsNb=10 23 | Mcu.ThirdPartyNb=0 24 | Mcu.UserConstants= 25 | Mcu.UserName=STM32F100RBTx 26 | MxCube.Version=4.26.1 27 | MxDb.Version=DB.4.0.261 28 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true 29 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true 30 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true 31 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true 32 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true 33 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true 34 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 35 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true 36 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true 37 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true 38 | PA0-WKUP.GPIOParameters=GPIO_Label 39 | PA0-WKUP.GPIO_Label=BTN 40 | PA0-WKUP.Locked=true 41 | PA0-WKUP.Signal=GPIO_Input 42 | PA10.Mode=Asynchronous 43 | PA10.Signal=USART1_RX 44 | PA13.GPIOParameters=GPIO_Label 45 | PA13.GPIO_Label=TMS_SWDIO 46 | PA13.Locked=true 47 | PA13.Mode=Serial_Wire 48 | PA13.Signal=SYS_JTMS-SWDIO 49 | PA14.GPIOParameters=GPIO_Label 50 | PA14.GPIO_Label=TCK_SWCLK 51 | PA14.Locked=true 52 | PA14.Mode=Serial_Wire 53 | PA14.Signal=SYS_JTCK-SWCLK 54 | PA9.Mode=Asynchronous 55 | PA9.Signal=USART1_TX 56 | PC8.GPIOParameters=GPIO_Label 57 | PC8.GPIO_Label=LD4 [Blue] 58 | PC8.Locked=true 59 | PC8.Signal=GPIO_Output 60 | PC9.GPIOParameters=GPIO_Label 61 | PC9.GPIO_Label=LD3 [Green] 62 | PC9.Locked=true 63 | PC9.Signal=GPIO_Output 64 | PCC.Checker=false 65 | PCC.Line=STM32F100 Value Line 66 | PCC.MCU=STM32F100R(8-B)Tx 67 | PCC.PartNumber=STM32F100RBTx 68 | PCC.Seq0=0 69 | PCC.Series=STM32F1 70 | PCC.Temperature=25 71 | PCC.Vdd=3.3 72 | PD0-OSC_IN.Mode=HSE-External-Oscillator 73 | PD0-OSC_IN.Signal=RCC_OSC_IN 74 | PD1-OSC_OUT.Mode=HSE-External-Oscillator 75 | PD1-OSC_OUT.Signal=RCC_OSC_OUT 76 | PinOutPanel.RotationAngle=0 77 | ProjectManager.AskForMigrate=true 78 | ProjectManager.BackupPrevious=false 79 | ProjectManager.CompilerOptimize=6 80 | ProjectManager.ComputerToolchain=false 81 | ProjectManager.CoupleFile=false 82 | ProjectManager.CustomerFirmwarePackage= 83 | ProjectManager.DefaultFWLocation=true 84 | ProjectManager.DeletePrevious=true 85 | ProjectManager.DeviceId=STM32F100RBTx 86 | ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.6.1 87 | ProjectManager.FreePins=false 88 | ProjectManager.HalAssertFull=false 89 | ProjectManager.HeapSize=0x200 90 | ProjectManager.KeepUserCode=true 91 | ProjectManager.LastFirmware=true 92 | ProjectManager.LibraryCopy=1 93 | ProjectManager.MainLocation=Src 94 | ProjectManager.PreviousToolchain=TrueSTUDIO 95 | ProjectManager.ProjectBuild=false 96 | ProjectManager.ProjectFileName=Bootloader.ioc 97 | ProjectManager.ProjectName=Bootloader 98 | ProjectManager.StackSize=0x400 99 | ProjectManager.TargetToolchain=TrueSTUDIO 100 | ProjectManager.ToolChainLocation= 101 | ProjectManager.UnderRoot=true 102 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true 103 | RCC.APB1Freq_Value=8000000 104 | RCC.APB2Freq_Value=8000000 105 | RCC.FamilyName=M 106 | RCC.IPParameters=APB1Freq_Value,APB2Freq_Value,FamilyName,PLLCLKFreq_Value,PLLMCOFreq_Value,SYSCLKSource,TimSysFreq_Value 107 | RCC.PLLCLKFreq_Value=8000000 108 | RCC.PLLMCOFreq_Value=4000000 109 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_HSE 110 | RCC.TimSysFreq_Value=8000000 111 | USART1.IPParameters=VirtualMode 112 | USART1.VirtualMode=VM_ASYNC 113 | VP_SYS_VS_Systick.Mode=SysTick 114 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 115 | board=STM32VLDISCOVERY 116 | boardIOC=true 117 | -------------------------------------------------------------------------------- /Design/bootloader.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Design/bootloader.png -------------------------------------------------------------------------------- /Design/memory_map.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Design/memory_map.png -------------------------------------------------------------------------------- /Design/stm32f100-pinout.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Design/stm32f100-pinout.png -------------------------------------------------------------------------------- /Design/terminal-putty.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Design/terminal-putty.png -------------------------------------------------------------------------------- /Design/terminal-teraterm.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Design/terminal-teraterm.png -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @version V4.2.0 6 | * @date 31-March-2017 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2017 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /** @addtogroup CMSIS 39 | * @{ 40 | */ 41 | 42 | /** @addtogroup stm32f10x_system 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief Define to prevent recursive inclusion 48 | */ 49 | #ifndef __SYSTEM_STM32F10X_H 50 | #define __SYSTEM_STM32F10X_H 51 | 52 | #ifdef __cplusplus 53 | extern "C" { 54 | #endif 55 | 56 | /** @addtogroup STM32F10x_System_Includes 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | 65 | /** @addtogroup STM32F10x_System_Exported_types 66 | * @{ 67 | */ 68 | 69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 70 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */ 71 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @addtogroup STM32F10x_System_Exported_Constants 78 | * @{ 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** @addtogroup STM32F10x_System_Exported_Macros 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @addtogroup STM32F10x_System_Exported_Functions 94 | * @{ 95 | */ 96 | 97 | extern void SystemInit(void); 98 | extern void SystemCoreClockUpdate(void); 99 | /** 100 | * @} 101 | */ 102 | 103 | #ifdef __cplusplus 104 | } 105 | #endif 106 | 107 | #endif /*__SYSTEM_STM32F10X_H */ 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 117 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. October 2015 5 | * $Revision: V.1.4.5 a 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | /* extern const q31_t realCoefAQ31[1024]; */ 50 | /* extern const q31_t realCoefBQ31[1024]; */ 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmFunc.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmFunc.h 3 | * @brief CMSIS Cortex-M Core Function Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMFUNC_H 42 | #define __CORE_CMFUNC_H 43 | 44 | 45 | /* ########################### Core Function Access ########################### */ 46 | /** \ingroup CMSIS_Core_FunctionInterface 47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@} end of CMSIS_Core_RegAccFunctions */ 86 | 87 | #endif /* __CORE_CMFUNC_H */ 88 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmInstr.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmInstr.h 3 | * @brief CMSIS Cortex-M Core Instruction Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMINSTR_H 42 | #define __CORE_CMINSTR_H 43 | 44 | 45 | /* ########################## Core Instruction Access ######################### */ 46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 47 | Access to dedicated instructions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 86 | 87 | #endif /* __CORE_CMINSTR_H */ 88 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmSimd.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmSimd.h 3 | * @brief CMSIS Cortex-M SIMD Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMSIMD_H 42 | #define __CORE_CMSIMD_H 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | 49 | /* ################### Compiler specific Intrinsics ########################### */ 50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 51 | Access to dedicated SIMD instructions 52 | @{ 53 | */ 54 | 55 | /*------------------ RealView Compiler -----------------*/ 56 | #if defined ( __CC_ARM ) 57 | #include "cmsis_armcc.h" 58 | 59 | /*------------------ ARM Compiler V6 -------------------*/ 60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 61 | #include "cmsis_armcc_V6.h" 62 | 63 | /*------------------ GNU Compiler ----------------------*/ 64 | #elif defined ( __GNUC__ ) 65 | #include "cmsis_gcc.h" 66 | 67 | /*------------------ ICC Compiler ----------------------*/ 68 | #elif defined ( __ICCARM__ ) 69 | #include 70 | 71 | /*------------------ TI CCS Compiler -------------------*/ 72 | #elif defined ( __TMS470__ ) 73 | #include 74 | 75 | /*------------------ TASKING Compiler ------------------*/ 76 | #elif defined ( __TASKING__ ) 77 | /* 78 | * The CMSIS functions have been implemented as intrinsics in the compiler. 79 | * Please use "carm -?i" to get an up to date list of all intrinsics, 80 | * Including the CMSIS ones. 81 | */ 82 | 83 | /*------------------ COSMIC Compiler -------------------*/ 84 | #elif defined ( __CSMC__ ) 85 | #include 86 | 87 | #endif 88 | 89 | /*@} end of group CMSIS_SIMD_intrinsics */ 90 | 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /* __CORE_CMSIMD_H */ 97 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal.h 4 | * @author MCD Application Team 5 | * @brief This file contains all the functions prototypes for the HAL 6 | * module driver. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© COPYRIGHT(c) 2017 STMicroelectronics

11 | * 12 | * Redistribution and use in source and binary forms, with or without modification, 13 | * are permitted provided that the following conditions are met: 14 | * 1. Redistributions of source code must retain the above copyright notice, 15 | * this list of conditions and the following disclaimer. 16 | * 2. Redistributions in binary form must reproduce the above copyright notice, 17 | * this list of conditions and the following disclaimer in the documentation 18 | * and/or other materials provided with the distribution. 19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 20 | * may be used to endorse or promote products derived from this software 21 | * without specific prior written permission. 22 | * 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 | * 34 | ****************************************************************************** 35 | */ 36 | 37 | /* Define to prevent recursive inclusion -------------------------------------*/ 38 | #ifndef __STM32F1xx_HAL_H 39 | #define __STM32F1xx_HAL_H 40 | 41 | #ifdef __cplusplus 42 | extern "C" { 43 | #endif 44 | 45 | /* Includes ------------------------------------------------------------------*/ 46 | #include "stm32f1xx_hal_conf.h" 47 | 48 | /** @addtogroup STM32F1xx_HAL_Driver 49 | * @{ 50 | */ 51 | 52 | /** @addtogroup HAL 53 | * @{ 54 | */ 55 | 56 | /* Exported types ------------------------------------------------------------*/ 57 | /* Exported constants --------------------------------------------------------*/ 58 | 59 | /** @defgroup HAL_Exported_Constants HAL Exported Constants 60 | * @{ 61 | */ 62 | 63 | /** @defgroup HAL_TICK_FREQ Tick Frequency 64 | * @{ 65 | */ 66 | typedef enum 67 | { 68 | HAL_TICK_FREQ_10HZ = 100U, 69 | HAL_TICK_FREQ_100HZ = 10U, 70 | HAL_TICK_FREQ_1KHZ = 1U, 71 | HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ 72 | } HAL_TickFreqTypeDef; 73 | /** 74 | * @} 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | /* Exported macro ------------------------------------------------------------*/ 81 | /** @defgroup HAL_Exported_Macros HAL Exported Macros 82 | * @{ 83 | */ 84 | 85 | /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode 86 | * @brief Freeze/Unfreeze Peripherals in Debug mode 87 | * Note: On devices STM32F10xx8 and STM32F10xxB, 88 | * STM32F101xC/D/E and STM32F103xC/D/E, 89 | * STM32F101xF/G and STM32F103xF/G 90 | * STM32F10xx4 and STM32F10xx6 91 | * Debug registers DBGMCU_IDCODE and DBGMCU_CR are accessible only in 92 | * debug mode (not accessible by the user software in normal mode). 93 | * Refer to errata sheet of these devices for more details. 94 | * @{ 95 | */ 96 | 97 | /* Peripherals on APB1 */ 98 | /** 99 | * @brief TIM2 Peripherals Debug mode 100 | */ 101 | #define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) 102 | #define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM2_STOP) 103 | 104 | /** 105 | * @brief TIM3 Peripherals Debug mode 106 | */ 107 | #define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) 108 | #define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM3_STOP) 109 | 110 | #if defined (DBGMCU_CR_DBG_TIM4_STOP) 111 | /** 112 | * @brief TIM4 Peripherals Debug mode 113 | */ 114 | #define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) 115 | #define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM4_STOP) 116 | #endif 117 | 118 | #if defined (DBGMCU_CR_DBG_TIM5_STOP) 119 | /** 120 | * @brief TIM5 Peripherals Debug mode 121 | */ 122 | #define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) 123 | #define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM5_STOP) 124 | #endif 125 | 126 | #if defined (DBGMCU_CR_DBG_TIM6_STOP) 127 | /** 128 | * @brief TIM6 Peripherals Debug mode 129 | */ 130 | #define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) 131 | #define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM6_STOP) 132 | #endif 133 | 134 | #if defined (DBGMCU_CR_DBG_TIM7_STOP) 135 | /** 136 | * @brief TIM7 Peripherals Debug mode 137 | */ 138 | #define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) 139 | #define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM7_STOP) 140 | #endif 141 | 142 | #if defined (DBGMCU_CR_DBG_TIM12_STOP) 143 | /** 144 | * @brief TIM12 Peripherals Debug mode 145 | */ 146 | #define __HAL_DBGMCU_FREEZE_TIM12() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) 147 | #define __HAL_DBGMCU_UNFREEZE_TIM12() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM12_STOP) 148 | #endif 149 | 150 | #if defined (DBGMCU_CR_DBG_TIM13_STOP) 151 | /** 152 | * @brief TIM13 Peripherals Debug mode 153 | */ 154 | #define __HAL_DBGMCU_FREEZE_TIM13() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) 155 | #define __HAL_DBGMCU_UNFREEZE_TIM13() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM13_STOP) 156 | #endif 157 | 158 | #if defined (DBGMCU_CR_DBG_TIM14_STOP) 159 | /** 160 | * @brief TIM14 Peripherals Debug mode 161 | */ 162 | #define __HAL_DBGMCU_FREEZE_TIM14() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) 163 | #define __HAL_DBGMCU_UNFREEZE_TIM14() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM14_STOP) 164 | #endif 165 | 166 | /** 167 | * @brief WWDG Peripherals Debug mode 168 | */ 169 | #define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) 170 | #define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_WWDG_STOP) 171 | 172 | /** 173 | * @brief IWDG Peripherals Debug mode 174 | */ 175 | #define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) 176 | #define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_IWDG_STOP) 177 | 178 | /** 179 | * @brief I2C1 Peripherals Debug mode 180 | */ 181 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) 182 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT) 183 | 184 | #if defined (DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) 185 | /** 186 | * @brief I2C2 Peripherals Debug mode 187 | */ 188 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) 189 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT) 190 | #endif 191 | 192 | #if defined (DBGMCU_CR_DBG_CAN1_STOP) 193 | /** 194 | * @brief CAN1 Peripherals Debug mode 195 | */ 196 | #define __HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) 197 | #define __HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN1_STOP) 198 | #endif 199 | 200 | #if defined (DBGMCU_CR_DBG_CAN2_STOP) 201 | /** 202 | * @brief CAN2 Peripherals Debug mode 203 | */ 204 | #define __HAL_DBGMCU_FREEZE_CAN2() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) 205 | #define __HAL_DBGMCU_UNFREEZE_CAN2() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_CAN2_STOP) 206 | #endif 207 | 208 | /* Peripherals on APB2 */ 209 | #if defined (DBGMCU_CR_DBG_TIM1_STOP) 210 | /** 211 | * @brief TIM1 Peripherals Debug mode 212 | */ 213 | #define __HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) 214 | #define __HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM1_STOP) 215 | #endif 216 | 217 | #if defined (DBGMCU_CR_DBG_TIM8_STOP) 218 | /** 219 | * @brief TIM8 Peripherals Debug mode 220 | */ 221 | #define __HAL_DBGMCU_FREEZE_TIM8() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) 222 | #define __HAL_DBGMCU_UNFREEZE_TIM8() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM8_STOP) 223 | #endif 224 | 225 | #if defined (DBGMCU_CR_DBG_TIM9_STOP) 226 | /** 227 | * @brief TIM9 Peripherals Debug mode 228 | */ 229 | #define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) 230 | #define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM9_STOP) 231 | #endif 232 | 233 | #if defined (DBGMCU_CR_DBG_TIM10_STOP) 234 | /** 235 | * @brief TIM10 Peripherals Debug mode 236 | */ 237 | #define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) 238 | #define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM10_STOP) 239 | #endif 240 | 241 | #if defined (DBGMCU_CR_DBG_TIM11_STOP) 242 | /** 243 | * @brief TIM11 Peripherals Debug mode 244 | */ 245 | #define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) 246 | #define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM11_STOP) 247 | #endif 248 | 249 | 250 | #if defined (DBGMCU_CR_DBG_TIM15_STOP) 251 | /** 252 | * @brief TIM15 Peripherals Debug mode 253 | */ 254 | #define __HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) 255 | #define __HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM15_STOP) 256 | #endif 257 | 258 | #if defined (DBGMCU_CR_DBG_TIM16_STOP) 259 | /** 260 | * @brief TIM16 Peripherals Debug mode 261 | */ 262 | #define __HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) 263 | #define __HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM16_STOP) 264 | #endif 265 | 266 | #if defined (DBGMCU_CR_DBG_TIM17_STOP) 267 | /** 268 | * @brief TIM17 Peripherals Debug mode 269 | */ 270 | #define __HAL_DBGMCU_FREEZE_TIM17() SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) 271 | #define __HAL_DBGMCU_UNFREEZE_TIM17() CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_TIM17_STOP) 272 | #endif 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | /** @defgroup HAL_Private_Macros HAL Private Macros 279 | * @{ 280 | */ 281 | #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \ 282 | ((FREQ) == HAL_TICK_FREQ_100HZ) || \ 283 | ((FREQ) == HAL_TICK_FREQ_1KHZ)) 284 | /** 285 | * @} 286 | */ 287 | 288 | /* Exported functions --------------------------------------------------------*/ 289 | /** @addtogroup HAL_Exported_Functions 290 | * @{ 291 | */ 292 | /** @addtogroup HAL_Exported_Functions_Group1 293 | * @{ 294 | */ 295 | /* Initialization and de-initialization functions ******************************/ 296 | HAL_StatusTypeDef HAL_Init(void); 297 | HAL_StatusTypeDef HAL_DeInit(void); 298 | void HAL_MspInit(void); 299 | void HAL_MspDeInit(void); 300 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority); 301 | /** 302 | * @} 303 | */ 304 | 305 | /** @addtogroup HAL_Exported_Functions_Group2 306 | * @{ 307 | */ 308 | /* Peripheral Control functions ************************************************/ 309 | void HAL_IncTick(void); 310 | void HAL_Delay(uint32_t Delay); 311 | uint32_t HAL_GetTick(void); 312 | uint32_t HAL_GetTickPrio(void); 313 | HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq); 314 | HAL_TickFreqTypeDef HAL_GetTickFreq(void); 315 | void HAL_SuspendTick(void); 316 | void HAL_ResumeTick(void); 317 | uint32_t HAL_GetHalVersion(void); 318 | uint32_t HAL_GetREVID(void); 319 | uint32_t HAL_GetDEVID(void); 320 | void HAL_DBGMCU_EnableDBGSleepMode(void); 321 | void HAL_DBGMCU_DisableDBGSleepMode(void); 322 | void HAL_DBGMCU_EnableDBGStopMode(void); 323 | void HAL_DBGMCU_DisableDBGStopMode(void); 324 | void HAL_DBGMCU_EnableDBGStandbyMode(void); 325 | void HAL_DBGMCU_DisableDBGStandbyMode(void); 326 | void HAL_GetUID(uint32_t *UID); 327 | /** 328 | * @} 329 | */ 330 | 331 | /** 332 | * @} 333 | */ 334 | /* Private types -------------------------------------------------------------*/ 335 | /* Private variables ---------------------------------------------------------*/ 336 | /** @defgroup HAL_Private_Variables HAL Private Variables 337 | * @{ 338 | */ 339 | /** 340 | * @} 341 | */ 342 | /* Private constants ---------------------------------------------------------*/ 343 | /** @defgroup HAL_Private_Constants HAL Private Constants 344 | * @{ 345 | */ 346 | /** 347 | * @} 348 | */ 349 | /* Private macros ------------------------------------------------------------*/ 350 | /* Private functions ---------------------------------------------------------*/ 351 | /** 352 | * @} 353 | */ 354 | 355 | /** 356 | * @} 357 | */ 358 | 359 | #ifdef __cplusplus 360 | } 361 | #endif 362 | 363 | #endif /* __STM32F1xx_HAL_H */ 364 | 365 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 366 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© COPYRIGHT(c) 2017 STMicroelectronics

11 | * 12 | * Redistribution and use in source and binary forms, with or without modification, 13 | * are permitted provided that the following conditions are met: 14 | * 1. Redistributions of source code must retain the above copyright notice, 15 | * this list of conditions and the following disclaimer. 16 | * 2. Redistributions in binary form must reproduce the above copyright notice, 17 | * this list of conditions and the following disclaimer in the documentation 18 | * and/or other materials provided with the distribution. 19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 20 | * may be used to endorse or promote products derived from this software 21 | * without specific prior written permission. 22 | * 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 | * 34 | ****************************************************************************** 35 | */ 36 | 37 | /* Define to prevent recursive inclusion -------------------------------------*/ 38 | #ifndef __STM32F1xx_HAL_DEF 39 | #define __STM32F1xx_HAL_DEF 40 | 41 | #ifdef __cplusplus 42 | extern "C" { 43 | #endif 44 | 45 | /* Includes ------------------------------------------------------------------*/ 46 | #include "stm32f1xx.h" 47 | #if defined(USE_HAL_LEGACY) 48 | #include "Legacy/stm32_hal_legacy.h" 49 | #endif 50 | #include 51 | 52 | /* Exported types ------------------------------------------------------------*/ 53 | 54 | /** 55 | * @brief HAL Status structures definition 56 | */ 57 | typedef enum 58 | { 59 | HAL_OK = 0x00U, 60 | HAL_ERROR = 0x01U, 61 | HAL_BUSY = 0x02U, 62 | HAL_TIMEOUT = 0x03U 63 | } HAL_StatusTypeDef; 64 | 65 | /** 66 | * @brief HAL Lock structures definition 67 | */ 68 | typedef enum 69 | { 70 | HAL_UNLOCKED = 0x00U, 71 | HAL_LOCKED = 0x01U 72 | } HAL_LockTypeDef; 73 | 74 | /* Exported macro ------------------------------------------------------------*/ 75 | #define HAL_MAX_DELAY 0xFFFFFFFFU 76 | 77 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET) 78 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) 79 | 80 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 81 | do{ \ 82 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 83 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 84 | } while(0U) 85 | 86 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 87 | 88 | /** @brief Reset the Handle's State field. 89 | * @param __HANDLE__: specifies the Peripheral Handle. 90 | * @note This macro can be used for the following purpose: 91 | * - When the Handle is declared as local variable; before passing it as parameter 92 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 93 | * to set to 0 the Handle's "State" field. 94 | * Otherwise, "State" field may have any random value and the first time the function 95 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 96 | * (i.e. HAL_PPP_MspInit() will not be executed). 97 | * - When there is a need to reconfigure the low level hardware: instead of calling 98 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 99 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 100 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 101 | * @retval None 102 | */ 103 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 104 | 105 | #if (USE_RTOS == 1U) 106 | /* Reserved for future use */ 107 | #error "USE_RTOS should be 0 in the current HAL release" 108 | #else 109 | #define __HAL_LOCK(__HANDLE__) \ 110 | do{ \ 111 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 112 | { \ 113 | return HAL_BUSY; \ 114 | } \ 115 | else \ 116 | { \ 117 | (__HANDLE__)->Lock = HAL_LOCKED; \ 118 | } \ 119 | }while (0U) 120 | 121 | #define __HAL_UNLOCK(__HANDLE__) \ 122 | do{ \ 123 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 124 | }while (0U) 125 | #endif /* USE_RTOS */ 126 | 127 | #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 128 | #ifndef __weak 129 | #define __weak __attribute__((weak)) 130 | #endif /* __weak */ 131 | #ifndef __packed 132 | #define __packed __attribute__((__packed__)) 133 | #endif /* __packed */ 134 | #endif /* __GNUC__ */ 135 | 136 | 137 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 138 | #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ 139 | #ifndef __ALIGN_END 140 | #define __ALIGN_END __attribute__ ((aligned (4))) 141 | #endif /* __ALIGN_END */ 142 | #ifndef __ALIGN_BEGIN 143 | #define __ALIGN_BEGIN 144 | #endif /* __ALIGN_BEGIN */ 145 | #else 146 | #ifndef __ALIGN_END 147 | #define __ALIGN_END 148 | #endif /* __ALIGN_END */ 149 | #ifndef __ALIGN_BEGIN 150 | #if defined (__CC_ARM) /* ARM Compiler */ 151 | #define __ALIGN_BEGIN __align(4) 152 | #elif defined (__ICCARM__) /* IAR Compiler */ 153 | #define __ALIGN_BEGIN 154 | #endif /* __CC_ARM */ 155 | #endif /* __ALIGN_BEGIN */ 156 | #endif /* __GNUC__ */ 157 | 158 | 159 | /** 160 | * @brief __RAM_FUNC definition 161 | */ 162 | #if defined ( __CC_ARM ) 163 | /* ARM Compiler 164 | ------------ 165 | RAM functions are defined using the toolchain options. 166 | Functions that are executed in RAM should reside in a separate source module. 167 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 168 | area of a module to a memory space in physical RAM. 169 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 170 | dialog. 171 | */ 172 | #define __RAM_FUNC 173 | 174 | #elif defined ( __ICCARM__ ) 175 | /* ICCARM Compiler 176 | --------------- 177 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 178 | */ 179 | #define __RAM_FUNC __ramfunc 180 | 181 | #elif defined ( __GNUC__ ) 182 | /* GNU Compiler 183 | ------------ 184 | RAM functions are defined using a specific toolchain attribute 185 | "__attribute__((section(".RamFunc")))". 186 | */ 187 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 188 | 189 | #endif 190 | 191 | /** 192 | * @brief __NOINLINE definition 193 | */ 194 | #if defined ( __CC_ARM ) || defined ( __GNUC__ ) 195 | /* ARM & GNUCompiler 196 | ---------------- 197 | */ 198 | #define __NOINLINE __attribute__ ( (noinline) ) 199 | 200 | #elif defined ( __ICCARM__ ) 201 | /* ICCARM Compiler 202 | --------------- 203 | */ 204 | #define __NOINLINE _Pragma("optimize = no_inline") 205 | 206 | #endif 207 | 208 | #ifdef __cplusplus 209 | } 210 | #endif 211 | 212 | #endif /* ___STM32F1xx_HAL_DEF */ 213 | 214 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 215 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_dma_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of DMA HAL extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2017 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F1xx_HAL_DMA_EX_H 38 | #define __STM32F1xx_HAL_DMA_EX_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f1xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F1xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @defgroup DMAEx DMAEx 52 | * @{ 53 | */ 54 | 55 | /* Exported types ------------------------------------------------------------*/ 56 | /* Exported constants --------------------------------------------------------*/ 57 | /* Exported macro ------------------------------------------------------------*/ 58 | /** @defgroup DMAEx_Exported_Macros DMA Extended Exported Macros 59 | * @{ 60 | */ 61 | /* Interrupt & Flag management */ 62 | #if defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || \ 63 | defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) 64 | /** @defgroup DMAEx_High_density_XL_density_Product_devices DMAEx High density and XL density product devices 65 | * @{ 66 | */ 67 | 68 | /** 69 | * @brief Returns the current DMA Channel transfer complete flag. 70 | * @param __HANDLE__: DMA handle 71 | * @retval The specified transfer complete flag index. 72 | */ 73 | #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 74 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 75 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 76 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 77 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 78 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 79 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 80 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TC7 :\ 81 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\ 82 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\ 83 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\ 84 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\ 85 | DMA_FLAG_TC5) 86 | 87 | /** 88 | * @brief Returns the current DMA Channel half transfer complete flag. 89 | * @param __HANDLE__: DMA handle 90 | * @retval The specified half transfer complete flag index. 91 | */ 92 | #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 93 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 94 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 95 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 96 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 97 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 98 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 99 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_HT7 :\ 100 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\ 101 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\ 102 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\ 103 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\ 104 | DMA_FLAG_HT5) 105 | 106 | /** 107 | * @brief Returns the current DMA Channel transfer error flag. 108 | * @param __HANDLE__: DMA handle 109 | * @retval The specified transfer error flag index. 110 | */ 111 | #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 112 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 113 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 114 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 115 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 116 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 117 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 118 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_TE7 :\ 119 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\ 120 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\ 121 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\ 122 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\ 123 | DMA_FLAG_TE5) 124 | 125 | /** 126 | * @brief Return the current DMA Channel Global interrupt flag. 127 | * @param __HANDLE__: DMA handle 128 | * @retval The specified transfer error flag index. 129 | */ 130 | #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 131 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 132 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 133 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 134 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 135 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 136 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 137 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel7))? DMA_FLAG_GL7 :\ 138 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_GL1 :\ 139 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_GL2 :\ 140 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_GL3 :\ 141 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_GL4 :\ 142 | DMA_FLAG_GL5) 143 | 144 | /** 145 | * @brief Get the DMA Channel pending flags. 146 | * @param __HANDLE__: DMA handle 147 | * @param __FLAG__: Get the specified flag. 148 | * This parameter can be any combination of the following values: 149 | * @arg DMA_FLAG_TCx: Transfer complete flag 150 | * @arg DMA_FLAG_HTx: Half transfer complete flag 151 | * @arg DMA_FLAG_TEx: Transfer error flag 152 | * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 153 | * @retval The state of FLAG (SET or RESET). 154 | */ 155 | #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__)\ 156 | (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->ISR & (__FLAG__)) :\ 157 | (DMA1->ISR & (__FLAG__))) 158 | 159 | /** 160 | * @brief Clears the DMA Channel pending flags. 161 | * @param __HANDLE__: DMA handle 162 | * @param __FLAG__: specifies the flag to clear. 163 | * This parameter can be any combination of the following values: 164 | * @arg DMA_FLAG_TCx: Transfer complete flag 165 | * @arg DMA_FLAG_HTx: Half transfer complete flag 166 | * @arg DMA_FLAG_TEx: Transfer error flag 167 | * Where x can be 1_7 or 1_5 (depending on DMA1 or DMA2) to select the DMA Channel flag. 168 | * @retval None 169 | */ 170 | #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) \ 171 | (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Channel7)? (DMA2->IFCR = (__FLAG__)) :\ 172 | (DMA1->IFCR = (__FLAG__))) 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | #else 179 | /** @defgroup DMA_Low_density_Medium_density_Product_devices DMA Low density and Medium density product devices 180 | * @{ 181 | */ 182 | 183 | /** 184 | * @brief Returns the current DMA Channel transfer complete flag. 185 | * @param __HANDLE__: DMA handle 186 | * @retval The specified transfer complete flag index. 187 | */ 188 | #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \ 189 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\ 190 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\ 191 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\ 192 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\ 193 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\ 194 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\ 195 | DMA_FLAG_TC7) 196 | 197 | /** 198 | * @brief Return the current DMA Channel half transfer complete flag. 199 | * @param __HANDLE__: DMA handle 200 | * @retval The specified half transfer complete flag index. 201 | */ 202 | #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\ 203 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\ 204 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\ 205 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\ 206 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\ 207 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\ 208 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\ 209 | DMA_FLAG_HT7) 210 | 211 | /** 212 | * @brief Return the current DMA Channel transfer error flag. 213 | * @param __HANDLE__: DMA handle 214 | * @retval The specified transfer error flag index. 215 | */ 216 | #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\ 217 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\ 218 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\ 219 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\ 220 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\ 221 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\ 222 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\ 223 | DMA_FLAG_TE7) 224 | 225 | /** 226 | * @brief Return the current DMA Channel Global interrupt flag. 227 | * @param __HANDLE__: DMA handle 228 | * @retval The specified transfer error flag index. 229 | */ 230 | #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\ 231 | (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_GL1 :\ 232 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_GL2 :\ 233 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_GL3 :\ 234 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_GL4 :\ 235 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_GL5 :\ 236 | ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_GL6 :\ 237 | DMA_FLAG_GL7) 238 | 239 | /** 240 | * @brief Get the DMA Channel pending flags. 241 | * @param __HANDLE__: DMA handle 242 | * @param __FLAG__: Get the specified flag. 243 | * This parameter can be any combination of the following values: 244 | * @arg DMA_FLAG_TCx: Transfer complete flag 245 | * @arg DMA_FLAG_HTx: Half transfer complete flag 246 | * @arg DMA_FLAG_TEx: Transfer error flag 247 | * @arg DMA_FLAG_GLx: Global interrupt flag 248 | * Where x can be 1_7 to select the DMA Channel flag. 249 | * @retval The state of FLAG (SET or RESET). 250 | */ 251 | 252 | #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__)) 253 | 254 | /** 255 | * @brief Clear the DMA Channel pending flags. 256 | * @param __HANDLE__: DMA handle 257 | * @param __FLAG__: specifies the flag to clear. 258 | * This parameter can be any combination of the following values: 259 | * @arg DMA_FLAG_TCx: Transfer complete flag 260 | * @arg DMA_FLAG_HTx: Half transfer complete flag 261 | * @arg DMA_FLAG_TEx: Transfer error flag 262 | * @arg DMA_FLAG_GLx: Global interrupt flag 263 | * Where x can be 1_7 to select the DMA Channel flag. 264 | * @retval None 265 | */ 266 | #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__)) 267 | 268 | /** 269 | * @} 270 | */ 271 | 272 | #endif 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | /** 279 | * @} 280 | */ 281 | 282 | /** 283 | * @} 284 | */ 285 | 286 | #ifdef __cplusplus 287 | } 288 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || */ 289 | /* STM32F103xG || STM32F105xC || STM32F107xC */ 290 | 291 | #endif /* __STM32F1xx_HAL_DMA_H */ 292 | 293 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 294 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_flash.h 4 | * @author MCD Application Team 5 | * @brief Header file of Flash HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F1xx_HAL_FLASH_H 38 | #define __STM32F1xx_HAL_FLASH_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f1xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F1xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup FLASH 52 | * @{ 53 | */ 54 | 55 | /** @addtogroup FLASH_Private_Constants 56 | * @{ 57 | */ 58 | #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */ 59 | /** 60 | * @} 61 | */ 62 | 63 | /** @addtogroup FLASH_Private_Macros 64 | * @{ 65 | */ 66 | 67 | #define IS_FLASH_TYPEPROGRAM(VALUE) (((VALUE) == FLASH_TYPEPROGRAM_HALFWORD) || \ 68 | ((VALUE) == FLASH_TYPEPROGRAM_WORD) || \ 69 | ((VALUE) == FLASH_TYPEPROGRAM_DOUBLEWORD)) 70 | 71 | #if defined(FLASH_ACR_LATENCY) 72 | #define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \ 73 | ((__LATENCY__) == FLASH_LATENCY_1) || \ 74 | ((__LATENCY__) == FLASH_LATENCY_2)) 75 | 76 | #else 77 | #define IS_FLASH_LATENCY(__LATENCY__) ((__LATENCY__) == FLASH_LATENCY_0) 78 | #endif /* FLASH_ACR_LATENCY */ 79 | /** 80 | * @} 81 | */ 82 | 83 | /* Exported types ------------------------------------------------------------*/ 84 | /** @defgroup FLASH_Exported_Types FLASH Exported Types 85 | * @{ 86 | */ 87 | 88 | /** 89 | * @brief FLASH Procedure structure definition 90 | */ 91 | typedef enum 92 | { 93 | FLASH_PROC_NONE = 0U, 94 | FLASH_PROC_PAGEERASE = 1U, 95 | FLASH_PROC_MASSERASE = 2U, 96 | FLASH_PROC_PROGRAMHALFWORD = 3U, 97 | FLASH_PROC_PROGRAMWORD = 4U, 98 | FLASH_PROC_PROGRAMDOUBLEWORD = 5U 99 | } FLASH_ProcedureTypeDef; 100 | 101 | /** 102 | * @brief FLASH handle Structure definition 103 | */ 104 | typedef struct 105 | { 106 | __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ 107 | 108 | __IO uint32_t DataRemaining; /*!< Internal variable to save the remaining pages to erase or half-word to program in IT context */ 109 | 110 | __IO uint32_t Address; /*!< Internal variable to save address selected for program or erase */ 111 | 112 | __IO uint64_t Data; /*!< Internal variable to save data to be programmed */ 113 | 114 | HAL_LockTypeDef Lock; /*!< FLASH locking object */ 115 | 116 | __IO uint32_t ErrorCode; /*!< FLASH error code 117 | This parameter can be a value of @ref FLASH_Error_Codes */ 118 | } FLASH_ProcessTypeDef; 119 | 120 | /** 121 | * @} 122 | */ 123 | 124 | /* Exported constants --------------------------------------------------------*/ 125 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants 126 | * @{ 127 | */ 128 | 129 | /** @defgroup FLASH_Error_Codes FLASH Error Codes 130 | * @{ 131 | */ 132 | 133 | #define HAL_FLASH_ERROR_NONE 0x00U /*!< No error */ 134 | #define HAL_FLASH_ERROR_PROG 0x01U /*!< Programming error */ 135 | #define HAL_FLASH_ERROR_WRP 0x02U /*!< Write protection error */ 136 | #define HAL_FLASH_ERROR_OPTV 0x04U /*!< Option validity error */ 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** @defgroup FLASH_Type_Program FLASH Type Program 143 | * @{ 144 | */ 145 | #define FLASH_TYPEPROGRAM_HALFWORD 0x01U /*!ACR |= FLASH_ACR_HLFCYA) 199 | 200 | /** 201 | * @brief Disable the FLASH half cycle access. 202 | * @note half cycle access can only be used with a low-frequency clock of less than 203 | 8 MHz that can be obtained with the use of HSI or HSE but not of PLL. 204 | * @retval None 205 | */ 206 | #define __HAL_FLASH_HALF_CYCLE_ACCESS_DISABLE() (FLASH->ACR &= (~FLASH_ACR_HLFCYA)) 207 | 208 | /** 209 | * @} 210 | */ 211 | 212 | #if defined(FLASH_ACR_LATENCY) 213 | /** @defgroup FLASH_EM_Latency FLASH Latency 214 | * @brief macros to handle FLASH Latency 215 | * @{ 216 | */ 217 | 218 | /** 219 | * @brief Set the FLASH Latency. 220 | * @param __LATENCY__ FLASH Latency 221 | * The value of this parameter depend on device used within the same series 222 | * @retval None 223 | */ 224 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) (FLASH->ACR = (FLASH->ACR&(~FLASH_ACR_LATENCY)) | (__LATENCY__)) 225 | 226 | 227 | /** 228 | * @brief Get the FLASH Latency. 229 | * @retval FLASH Latency 230 | * The value of this parameter depend on device used within the same series 231 | */ 232 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) 233 | 234 | /** 235 | * @} 236 | */ 237 | 238 | #endif /* FLASH_ACR_LATENCY */ 239 | /** @defgroup FLASH_Prefetch FLASH Prefetch 240 | * @brief macros to handle FLASH Prefetch buffer 241 | * @{ 242 | */ 243 | /** 244 | * @brief Enable the FLASH prefetch buffer. 245 | * @retval None 246 | */ 247 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() (FLASH->ACR |= FLASH_ACR_PRFTBE) 248 | 249 | /** 250 | * @brief Disable the FLASH prefetch buffer. 251 | * @retval None 252 | */ 253 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() (FLASH->ACR &= (~FLASH_ACR_PRFTBE)) 254 | 255 | /** 256 | * @} 257 | */ 258 | 259 | /** 260 | * @} 261 | */ 262 | 263 | /* Include FLASH HAL Extended module */ 264 | #include "stm32f1xx_hal_flash_ex.h" 265 | 266 | /* Exported functions --------------------------------------------------------*/ 267 | /** @addtogroup FLASH_Exported_Functions 268 | * @{ 269 | */ 270 | 271 | /** @addtogroup FLASH_Exported_Functions_Group1 272 | * @{ 273 | */ 274 | /* IO operation functions *****************************************************/ 275 | HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data); 276 | HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data); 277 | 278 | /* FLASH IRQ handler function */ 279 | void HAL_FLASH_IRQHandler(void); 280 | /* Callbacks in non blocking modes */ 281 | void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); 282 | void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); 283 | 284 | /** 285 | * @} 286 | */ 287 | 288 | /** @addtogroup FLASH_Exported_Functions_Group2 289 | * @{ 290 | */ 291 | /* Peripheral Control functions ***********************************************/ 292 | HAL_StatusTypeDef HAL_FLASH_Unlock(void); 293 | HAL_StatusTypeDef HAL_FLASH_Lock(void); 294 | HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); 295 | HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); 296 | void HAL_FLASH_OB_Launch(void); 297 | 298 | /** 299 | * @} 300 | */ 301 | 302 | /** @addtogroup FLASH_Exported_Functions_Group3 303 | * @{ 304 | */ 305 | /* Peripheral State and Error functions ***************************************/ 306 | uint32_t HAL_FLASH_GetError(void); 307 | 308 | /** 309 | * @} 310 | */ 311 | 312 | /** 313 | * @} 314 | */ 315 | 316 | /* Private function -------------------------------------------------*/ 317 | /** @addtogroup FLASH_Private_Functions 318 | * @{ 319 | */ 320 | HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 321 | #if defined(FLASH_BANK2_END) 322 | HAL_StatusTypeDef FLASH_WaitForLastOperationBank2(uint32_t Timeout); 323 | #endif /* FLASH_BANK2_END */ 324 | 325 | /** 326 | * @} 327 | */ 328 | 329 | /** 330 | * @} 331 | */ 332 | 333 | /** 334 | * @} 335 | */ 336 | 337 | #ifdef __cplusplus 338 | } 339 | #endif 340 | 341 | #endif /* __STM32F1xx_HAL_FLASH_H */ 342 | 343 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 344 | 345 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_gpio.h 4 | * @author MCD Application Team 5 | * @brief Header file of GPIO HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F1xx_HAL_GPIO_H 38 | #define __STM32F1xx_HAL_GPIO_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f1xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F1xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup GPIO 52 | * @{ 53 | */ 54 | 55 | /* Exported types ------------------------------------------------------------*/ 56 | /** @defgroup GPIO_Exported_Types GPIO Exported Types 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @brief GPIO Init structure definition 62 | */ 63 | typedef struct 64 | { 65 | uint32_t Pin; /*!< Specifies the GPIO pins to be configured. 66 | This parameter can be any value of @ref GPIO_pins_define */ 67 | 68 | uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 69 | This parameter can be a value of @ref GPIO_mode_define */ 70 | 71 | uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins. 72 | This parameter can be a value of @ref GPIO_pull_define */ 73 | 74 | uint32_t Speed; /*!< Specifies the speed for the selected pins. 75 | This parameter can be a value of @ref GPIO_speed_define */ 76 | } GPIO_InitTypeDef; 77 | 78 | /** 79 | * @brief GPIO Bit SET and Bit RESET enumeration 80 | */ 81 | typedef enum 82 | { 83 | GPIO_PIN_RESET = 0U, 84 | GPIO_PIN_SET 85 | } GPIO_PinState; 86 | /** 87 | * @} 88 | */ 89 | 90 | /* Exported constants --------------------------------------------------------*/ 91 | 92 | /** @defgroup GPIO_Exported_Constants GPIO Exported Constants 93 | * @{ 94 | */ 95 | 96 | /** @defgroup GPIO_pins_define GPIO pins define 97 | * @{ 98 | */ 99 | #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */ 100 | #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */ 101 | #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */ 102 | #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */ 103 | #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */ 104 | #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */ 105 | #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */ 106 | #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */ 107 | #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */ 108 | #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */ 109 | #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */ 110 | #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */ 111 | #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */ 112 | #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */ 113 | #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */ 114 | #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */ 115 | #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */ 116 | 117 | #define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */ 118 | /** 119 | * @} 120 | */ 121 | 122 | /** @defgroup GPIO_mode_define GPIO mode define 123 | * @brief GPIO Configuration Mode 124 | * Elements values convention: 0xX0yz00YZ 125 | * - X : GPIO mode or EXTI Mode 126 | * - y : External IT or Event trigger detection 127 | * - z : IO configuration on External IT or Event 128 | * - Y : Output type (Push Pull or Open Drain) 129 | * - Z : IO Direction mode (Input, Output, Alternate or Analog) 130 | * @{ 131 | */ 132 | #define GPIO_MODE_INPUT 0x00000000U /*!< Input Floating Mode */ 133 | #define GPIO_MODE_OUTPUT_PP 0x00000001U /*!< Output Push Pull Mode */ 134 | #define GPIO_MODE_OUTPUT_OD 0x00000011U /*!< Output Open Drain Mode */ 135 | #define GPIO_MODE_AF_PP 0x00000002U /*!< Alternate Function Push Pull Mode */ 136 | #define GPIO_MODE_AF_OD 0x00000012U /*!< Alternate Function Open Drain Mode */ 137 | #define GPIO_MODE_AF_INPUT GPIO_MODE_INPUT /*!< Alternate Function Input Mode */ 138 | 139 | #define GPIO_MODE_ANALOG 0x00000003U /*!< Analog Mode */ 140 | 141 | #define GPIO_MODE_IT_RISING 0x10110000U /*!< External Interrupt Mode with Rising edge trigger detection */ 142 | #define GPIO_MODE_IT_FALLING 0x10210000U /*!< External Interrupt Mode with Falling edge trigger detection */ 143 | #define GPIO_MODE_IT_RISING_FALLING 0x10310000U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 144 | 145 | #define GPIO_MODE_EVT_RISING 0x10120000U /*!< External Event Mode with Rising edge trigger detection */ 146 | #define GPIO_MODE_EVT_FALLING 0x10220000U /*!< External Event Mode with Falling edge trigger detection */ 147 | #define GPIO_MODE_EVT_RISING_FALLING 0x10320000U /*!< External Event Mode with Rising/Falling edge trigger detection */ 148 | 149 | /** 150 | * @} 151 | */ 152 | 153 | /** @defgroup GPIO_speed_define GPIO speed define 154 | * @brief GPIO Output Maximum frequency 155 | * @{ 156 | */ 157 | #define GPIO_SPEED_FREQ_LOW (GPIO_CRL_MODE0_1) /*!< Low speed */ 158 | #define GPIO_SPEED_FREQ_MEDIUM (GPIO_CRL_MODE0_0) /*!< Medium speed */ 159 | #define GPIO_SPEED_FREQ_HIGH (GPIO_CRL_MODE0) /*!< High speed */ 160 | 161 | /** 162 | * @} 163 | */ 164 | 165 | /** @defgroup GPIO_pull_define GPIO pull define 166 | * @brief GPIO Pull-Up or Pull-Down Activation 167 | * @{ 168 | */ 169 | #define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */ 170 | #define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */ 171 | #define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */ 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /* Exported macro ------------------------------------------------------------*/ 181 | /** @defgroup GPIO_Exported_Macros GPIO Exported Macros 182 | * @{ 183 | */ 184 | 185 | /** 186 | * @brief Checks whether the specified EXTI line flag is set or not. 187 | * @param __EXTI_LINE__: specifies the EXTI line flag to check. 188 | * This parameter can be GPIO_PIN_x where x can be(0..15) 189 | * @retval The new state of __EXTI_LINE__ (SET or RESET). 190 | */ 191 | #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__)) 192 | 193 | /** 194 | * @brief Clears the EXTI's line pending flags. 195 | * @param __EXTI_LINE__: specifies the EXTI lines flags to clear. 196 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) 197 | * @retval None 198 | */ 199 | #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__)) 200 | 201 | /** 202 | * @brief Checks whether the specified EXTI line is asserted or not. 203 | * @param __EXTI_LINE__: specifies the EXTI line to check. 204 | * This parameter can be GPIO_PIN_x where x can be(0..15) 205 | * @retval The new state of __EXTI_LINE__ (SET or RESET). 206 | */ 207 | #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__)) 208 | 209 | /** 210 | * @brief Clears the EXTI's line pending bits. 211 | * @param __EXTI_LINE__: specifies the EXTI lines to clear. 212 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15) 213 | * @retval None 214 | */ 215 | #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__)) 216 | 217 | /** 218 | * @brief Generates a Software interrupt on selected EXTI line. 219 | * @param __EXTI_LINE__: specifies the EXTI line to check. 220 | * This parameter can be GPIO_PIN_x where x can be(0..15) 221 | * @retval None 222 | */ 223 | #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__)) 224 | /** 225 | * @} 226 | */ 227 | 228 | /* Include GPIO HAL Extension module */ 229 | #include "stm32f1xx_hal_gpio_ex.h" 230 | 231 | /* Exported functions --------------------------------------------------------*/ 232 | /** @addtogroup GPIO_Exported_Functions 233 | * @{ 234 | */ 235 | 236 | /** @addtogroup GPIO_Exported_Functions_Group1 237 | * @{ 238 | */ 239 | /* Initialization and de-initialization functions *****************************/ 240 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); 241 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); 242 | /** 243 | * @} 244 | */ 245 | 246 | /** @addtogroup GPIO_Exported_Functions_Group2 247 | * @{ 248 | */ 249 | /* IO operation functions *****************************************************/ 250 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); 251 | void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState); 252 | void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); 253 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); 254 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin); 255 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | /* Private types -------------------------------------------------------------*/ 265 | /* Private variables ---------------------------------------------------------*/ 266 | /* Private constants ---------------------------------------------------------*/ 267 | /** @defgroup GPIO_Private_Constants GPIO Private Constants 268 | * @{ 269 | */ 270 | 271 | /** 272 | * @} 273 | */ 274 | 275 | /* Private macros ------------------------------------------------------------*/ 276 | /** @defgroup GPIO_Private_Macros GPIO Private Macros 277 | * @{ 278 | */ 279 | #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) 280 | #define IS_GPIO_PIN(PIN) ((((PIN) & GPIO_PIN_MASK ) != 0x00U) && (((PIN) & ~GPIO_PIN_MASK) == 0x00U)) 281 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ 282 | ((MODE) == GPIO_MODE_OUTPUT_PP) ||\ 283 | ((MODE) == GPIO_MODE_OUTPUT_OD) ||\ 284 | ((MODE) == GPIO_MODE_AF_PP) ||\ 285 | ((MODE) == GPIO_MODE_AF_OD) ||\ 286 | ((MODE) == GPIO_MODE_IT_RISING) ||\ 287 | ((MODE) == GPIO_MODE_IT_FALLING) ||\ 288 | ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\ 289 | ((MODE) == GPIO_MODE_EVT_RISING) ||\ 290 | ((MODE) == GPIO_MODE_EVT_FALLING) ||\ 291 | ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\ 292 | ((MODE) == GPIO_MODE_ANALOG)) 293 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || \ 294 | ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || ((SPEED) == GPIO_SPEED_FREQ_HIGH)) 295 | #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \ 296 | ((PULL) == GPIO_PULLDOWN)) 297 | /** 298 | * @} 299 | */ 300 | 301 | /* Private functions ---------------------------------------------------------*/ 302 | /** @defgroup GPIO_Private_Functions GPIO Private Functions 303 | * @{ 304 | */ 305 | 306 | /** 307 | * @} 308 | */ 309 | 310 | /** 311 | * @} 312 | */ 313 | 314 | /** 315 | * @} 316 | */ 317 | 318 | #ifdef __cplusplus 319 | } 320 | #endif 321 | 322 | #endif /* __STM32F1xx_HAL_GPIO_H */ 323 | 324 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 325 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_pwr.h 4 | * @author MCD Application Team 5 | * @brief Header file of PWR HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© COPYRIGHT(c) 2016 STMicroelectronics

10 | * 11 | * Redistribution and use in source and binary forms, with or without modification, 12 | * are permitted provided that the following conditions are met: 13 | * 1. Redistributions of source code must retain the above copyright notice, 14 | * this list of conditions and the following disclaimer. 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, 16 | * this list of conditions and the following disclaimer in the documentation 17 | * and/or other materials provided with the distribution. 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 | * may be used to endorse or promote products derived from this software 20 | * without specific prior written permission. 21 | * 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 | * 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ 37 | #ifndef __STM32F1xx_HAL_PWR_H 38 | #define __STM32F1xx_HAL_PWR_H 39 | 40 | #ifdef __cplusplus 41 | extern "C" { 42 | #endif 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f1xx_hal_def.h" 46 | 47 | /** @addtogroup STM32F1xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup PWR 52 | * @{ 53 | */ 54 | 55 | /* Exported types ------------------------------------------------------------*/ 56 | 57 | /** @defgroup PWR_Exported_Types PWR Exported Types 58 | * @{ 59 | */ 60 | 61 | /** 62 | * @brief PWR PVD configuration structure definition 63 | */ 64 | typedef struct 65 | { 66 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 67 | This parameter can be a value of @ref PWR_PVD_detection_level */ 68 | 69 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 70 | This parameter can be a value of @ref PWR_PVD_Mode */ 71 | }PWR_PVDTypeDef; 72 | 73 | 74 | /** 75 | * @} 76 | */ 77 | 78 | 79 | /* Internal constants --------------------------------------------------------*/ 80 | 81 | /** @addtogroup PWR_Private_Constants 82 | * @{ 83 | */ 84 | 85 | #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | 92 | /* Exported constants --------------------------------------------------------*/ 93 | 94 | /** @defgroup PWR_Exported_Constants PWR Exported Constants 95 | * @{ 96 | */ 97 | 98 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level 99 | * @{ 100 | */ 101 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_2V2 102 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_2V3 103 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_2V4 104 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_2V5 105 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_2V6 106 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_2V7 107 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_2V8 108 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_2V9 109 | 110 | /** 111 | * @} 112 | */ 113 | 114 | /** @defgroup PWR_PVD_Mode PWR PVD Mode 115 | * @{ 116 | */ 117 | #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */ 118 | #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */ 119 | #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */ 120 | #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 121 | #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */ 122 | #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */ 123 | #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | 130 | /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins 131 | * @{ 132 | */ 133 | 134 | #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode 141 | * @{ 142 | */ 143 | #define PWR_MAINREGULATOR_ON 0x00000000U 144 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 151 | * @{ 152 | */ 153 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) 154 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 161 | * @{ 162 | */ 163 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) 164 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) 165 | 166 | /** 167 | * @} 168 | */ 169 | 170 | /** @defgroup PWR_Flag PWR Flag 171 | * @{ 172 | */ 173 | #define PWR_FLAG_WU PWR_CSR_WUF 174 | #define PWR_FLAG_SB PWR_CSR_SBF 175 | #define PWR_FLAG_PVDO PWR_CSR_PVDO 176 | 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | /* Exported macro ------------------------------------------------------------*/ 187 | /** @defgroup PWR_Exported_Macros PWR Exported Macros 188 | * @{ 189 | */ 190 | 191 | /** @brief Check PWR flag is set or not. 192 | * @param __FLAG__: specifies the flag to check. 193 | * This parameter can be one of the following values: 194 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 195 | * was received from the WKUP pin or from the RTC alarm 196 | * An additional wakeup event is detected if the WKUP pin is enabled 197 | * (by setting the EWUP bit) when the WKUP pin level is already high. 198 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was 199 | * resumed from StandBy mode. 200 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 201 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode 202 | * For this reason, this bit is equal to 0 after Standby or reset 203 | * until the PVDE bit is set. 204 | * @retval The new state of __FLAG__ (TRUE or FALSE). 205 | */ 206 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) 207 | 208 | /** @brief Clear the PWR's pending flags. 209 | * @param __FLAG__: specifies the flag to clear. 210 | * This parameter can be one of the following values: 211 | * @arg PWR_FLAG_WU: Wake Up flag 212 | * @arg PWR_FLAG_SB: StandBy flag 213 | */ 214 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) 215 | 216 | /** 217 | * @brief Enable interrupt on PVD Exti Line 16. 218 | * @retval None. 219 | */ 220 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) 221 | 222 | /** 223 | * @brief Disable interrupt on PVD Exti Line 16. 224 | * @retval None. 225 | */ 226 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) 227 | 228 | /** 229 | * @brief Enable event on PVD Exti Line 16. 230 | * @retval None. 231 | */ 232 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) 233 | 234 | /** 235 | * @brief Disable event on PVD Exti Line 16. 236 | * @retval None. 237 | */ 238 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) 239 | 240 | 241 | /** 242 | * @brief PVD EXTI line configuration: set falling edge trigger. 243 | * @retval None. 244 | */ 245 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 246 | 247 | 248 | /** 249 | * @brief Disable the PVD Extended Interrupt Falling Trigger. 250 | * @retval None. 251 | */ 252 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) 253 | 254 | 255 | /** 256 | * @brief PVD EXTI line configuration: set rising edge trigger. 257 | * @retval None. 258 | */ 259 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 260 | 261 | /** 262 | * @brief Disable the PVD Extended Interrupt Rising Trigger. 263 | * This parameter can be: 264 | * @retval None. 265 | */ 266 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) 267 | 268 | /** 269 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. 270 | * @retval None. 271 | */ 272 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); 273 | 274 | /** 275 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 276 | * This parameter can be: 277 | * @retval None. 278 | */ 279 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); 280 | 281 | 282 | 283 | /** 284 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. 285 | * @retval EXTI PVD Line Status. 286 | */ 287 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) 288 | 289 | /** 290 | * @brief Clear the PVD EXTI flag. 291 | * @retval None. 292 | */ 293 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) 294 | 295 | /** 296 | * @brief Generate a Software interrupt on selected EXTI line. 297 | * @retval None. 298 | */ 299 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD) 300 | /** 301 | * @} 302 | */ 303 | 304 | /* Private macro -------------------------------------------------------------*/ 305 | /** @defgroup PWR_Private_Macros PWR Private Macros 306 | * @{ 307 | */ 308 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 309 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 310 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 311 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 312 | 313 | 314 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ 315 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ 316 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ 317 | ((MODE) == PWR_PVD_MODE_NORMAL)) 318 | 319 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1)) 320 | 321 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 322 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 323 | 324 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 325 | 326 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) 327 | 328 | /** 329 | * @} 330 | */ 331 | 332 | 333 | 334 | /* Exported functions --------------------------------------------------------*/ 335 | 336 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions 337 | * @{ 338 | */ 339 | 340 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 341 | * @{ 342 | */ 343 | 344 | /* Initialization and de-initialization functions *******************************/ 345 | void HAL_PWR_DeInit(void); 346 | void HAL_PWR_EnableBkUpAccess(void); 347 | void HAL_PWR_DisableBkUpAccess(void); 348 | 349 | /** 350 | * @} 351 | */ 352 | 353 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 354 | * @{ 355 | */ 356 | 357 | /* Peripheral Control functions ************************************************/ 358 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 359 | /* #define HAL_PWR_ConfigPVD 12*/ 360 | void HAL_PWR_EnablePVD(void); 361 | void HAL_PWR_DisablePVD(void); 362 | 363 | /* WakeUp pins configuration functions ****************************************/ 364 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); 365 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 366 | 367 | /* Low Power modes configuration functions ************************************/ 368 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 369 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 370 | void HAL_PWR_EnterSTANDBYMode(void); 371 | 372 | void HAL_PWR_EnableSleepOnExit(void); 373 | void HAL_PWR_DisableSleepOnExit(void); 374 | void HAL_PWR_EnableSEVOnPend(void); 375 | void HAL_PWR_DisableSEVOnPend(void); 376 | 377 | 378 | 379 | void HAL_PWR_PVD_IRQHandler(void); 380 | void HAL_PWR_PVDCallback(void); 381 | /** 382 | * @} 383 | */ 384 | 385 | /** 386 | * @} 387 | */ 388 | 389 | /** 390 | * @} 391 | */ 392 | 393 | /** 394 | * @} 395 | */ 396 | 397 | #ifdef __cplusplus 398 | } 399 | #endif 400 | 401 | 402 | #endif /* __STM32F1xx_HAL_PWR_H */ 403 | 404 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 405 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_gpio_ex.c 4 | * @author MCD Application Team 5 | * @brief GPIO Extension HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * functionalities of the General Purpose Input/Output (GPIO) extension peripheral. 8 | * + Extended features functions 9 | * 10 | @verbatim 11 | ============================================================================== 12 | ##### GPIO Peripheral extension features ##### 13 | ============================================================================== 14 | [..] GPIO module on STM32F1 family, manage also the AFIO register: 15 | (+) Possibility to use the EVENTOUT Cortex feature 16 | 17 | ##### How to use this driver ##### 18 | ============================================================================== 19 | [..] This driver provides functions to use EVENTOUT Cortex feature 20 | (#) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 21 | (#) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 22 | (#) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 23 | 24 | @endverbatim 25 | ****************************************************************************** 26 | * @attention 27 | * 28 | *

© COPYRIGHT(c) 2016 STMicroelectronics

29 | * 30 | * Redistribution and use in source and binary forms, with or without modification, 31 | * are permitted provided that the following conditions are met: 32 | * 1. Redistributions of source code must retain the above copyright notice, 33 | * this list of conditions and the following disclaimer. 34 | * 2. Redistributions in binary form must reproduce the above copyright notice, 35 | * this list of conditions and the following disclaimer in the documentation 36 | * and/or other materials provided with the distribution. 37 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 38 | * may be used to endorse or promote products derived from this software 39 | * without specific prior written permission. 40 | * 41 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 42 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 43 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 44 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 45 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 46 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 47 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 48 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 49 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51 | * 52 | ****************************************************************************** 53 | */ 54 | 55 | /* Includes ------------------------------------------------------------------*/ 56 | #include "stm32f1xx_hal.h" 57 | 58 | /** @addtogroup STM32F1xx_HAL_Driver 59 | * @{ 60 | */ 61 | 62 | /** @defgroup GPIOEx GPIOEx 63 | * @brief GPIO HAL module driver 64 | * @{ 65 | */ 66 | 67 | #ifdef HAL_GPIO_MODULE_ENABLED 68 | 69 | /** @defgroup GPIOEx_Exported_Functions GPIOEx Exported Functions 70 | * @{ 71 | */ 72 | 73 | /** @defgroup GPIOEx_Exported_Functions_Group1 Extended features functions 74 | * @brief Extended features functions 75 | * 76 | @verbatim 77 | ============================================================================== 78 | ##### Extended features functions ##### 79 | ============================================================================== 80 | [..] This section provides functions allowing to: 81 | (+) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 82 | (+) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 83 | (+) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 84 | 85 | @endverbatim 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @brief Configures the port and pin on which the EVENTOUT Cortex signal will be connected. 91 | * @param GPIO_PortSource Select the port used to output the Cortex EVENTOUT signal. 92 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PORT. 93 | * @param GPIO_PinSource Select the pin used to output the Cortex EVENTOUT signal. 94 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PIN. 95 | * @retval None 96 | */ 97 | void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource) 98 | { 99 | /* Verify the parameters */ 100 | assert_param(IS_AFIO_EVENTOUT_PORT(GPIO_PortSource)); 101 | assert_param(IS_AFIO_EVENTOUT_PIN(GPIO_PinSource)); 102 | 103 | /* Apply the new configuration */ 104 | MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT) | (AFIO_EVCR_PIN), (GPIO_PortSource) | (GPIO_PinSource)); 105 | } 106 | 107 | /** 108 | * @brief Enables the Event Output. 109 | * @retval None 110 | */ 111 | void HAL_GPIOEx_EnableEventout(void) 112 | { 113 | SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 114 | } 115 | 116 | /** 117 | * @brief Disables the Event Output. 118 | * @retval None 119 | */ 120 | void HAL_GPIOEx_DisableEventout(void) 121 | { 122 | CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 123 | } 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /** 130 | * @} 131 | */ 132 | 133 | #endif /* HAL_GPIO_MODULE_ENABLED */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** 140 | * @} 141 | */ 142 | 143 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 144 | -------------------------------------------------------------------------------- /Inc/flash.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file flash.h 3 | * @author Ferenc Nemeth 4 | * @date 21 Dec 2018 5 | * @brief This module handles the memory related functions. 6 | * 7 | * Copyright (c) 2018 Ferenc Nemeth - https://github.com/ferenc-nemeth 8 | */ 9 | 10 | #ifndef FLASH_H_ 11 | #define FLASH_H_ 12 | 13 | #include "stm32f1xx_hal.h" 14 | 15 | /* Start and end addresses of the user application. */ 16 | #define FLASH_APP_START_ADDRESS ((uint32_t)0x08008000u) 17 | #define FLASH_APP_END_ADDRESS ((uint32_t)FLASH_BANK1_END-0x10u) /**< Leave a little extra space at the end. */ 18 | 19 | /* Status report for the functions. */ 20 | typedef enum { 21 | FLASH_OK = 0x00u, /**< The action was successful. */ 22 | FLASH_ERROR_SIZE = 0x01u, /**< The binary is too big. */ 23 | FLASH_ERROR_WRITE = 0x02u, /**< Writing failed. */ 24 | FLASH_ERROR_READBACK = 0x04u, /**< Writing was successful, but the content of the memory is wrong. */ 25 | FLASH_ERROR = 0xFFu /**< Generic error. */ 26 | } flash_status; 27 | 28 | flash_status flash_erase(uint32_t address); 29 | flash_status flash_write(uint32_t address, uint32_t *data, uint32_t length); 30 | void flash_jump_to_app(void); 31 | 32 | #endif /* FLASH_H_ */ 33 | -------------------------------------------------------------------------------- /Inc/main.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : main.h 4 | * @brief : Header for main.c file. 5 | * This file contains the common defines of the application. 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2018 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | 40 | /* Define to prevent recursive inclusion -------------------------------------*/ 41 | #ifndef __MAIN_H__ 42 | #define __MAIN_H__ 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | 46 | /* USER CODE BEGIN Includes */ 47 | 48 | /* USER CODE END Includes */ 49 | 50 | /* Private define ------------------------------------------------------------*/ 51 | 52 | #define BTN_Pin GPIO_PIN_0 53 | #define BTN_GPIO_Port GPIOA 54 | #define LD4_Pin GPIO_PIN_8 55 | #define LD4_GPIO_Port GPIOC 56 | #define LD3_Pin GPIO_PIN_9 57 | #define LD3_GPIO_Port GPIOC 58 | #define TMS_SWDIO_Pin GPIO_PIN_13 59 | #define TMS_SWDIO_GPIO_Port GPIOA 60 | #define TCK_SWCLK_Pin GPIO_PIN_14 61 | #define TCK_SWCLK_GPIO_Port GPIOA 62 | 63 | /* ########################## Assert Selection ############################## */ 64 | /** 65 | * @brief Uncomment the line below to expanse the "assert_param" macro in the 66 | * HAL drivers code 67 | */ 68 | /* #define USE_FULL_ASSERT 1U */ 69 | 70 | /* USER CODE BEGIN Private defines */ 71 | 72 | /* USER CODE END Private defines */ 73 | 74 | #ifdef __cplusplus 75 | extern "C" { 76 | #endif 77 | void _Error_Handler(char *, int); 78 | 79 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__) 80 | #ifdef __cplusplus 81 | } 82 | #endif 83 | 84 | #endif /* __MAIN_H__ */ 85 | 86 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 87 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_hal_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_conf.h 4 | * @brief HAL configuration file. 5 | ****************************************************************************** 6 | * @attention 7 | * 8 | *

© COPYRIGHT(c) 2018 STMicroelectronics

9 | * 10 | * Redistribution and use in source and binary forms, with or without modification, 11 | * are permitted provided that the following conditions are met: 12 | * 1. Redistributions of source code must retain the above copyright notice, 13 | * this list of conditions and the following disclaimer. 14 | * 2. Redistributions in binary form must reproduce the above copyright notice, 15 | * this list of conditions and the following disclaimer in the documentation 16 | * and/or other materials provided with the distribution. 17 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 18 | * may be used to endorse or promote products derived from this software 19 | * without specific prior written permission. 20 | * 21 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 28 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 | * 32 | ****************************************************************************** 33 | */ 34 | 35 | /* Define to prevent recursive inclusion -------------------------------------*/ 36 | #ifndef __STM32F1xx_HAL_CONF_H 37 | #define __STM32F1xx_HAL_CONF_H 38 | 39 | #ifdef __cplusplus 40 | extern "C" { 41 | #endif 42 | 43 | #include "main.h" 44 | /* Exported types ------------------------------------------------------------*/ 45 | /* Exported constants --------------------------------------------------------*/ 46 | 47 | /* ########################## Module Selection ############################## */ 48 | /** 49 | * @brief This is the list of modules to be used in the HAL driver 50 | */ 51 | 52 | #define HAL_MODULE_ENABLED 53 | /*#define HAL_ADC_MODULE_ENABLED */ 54 | /*#define HAL_CRYP_MODULE_ENABLED */ 55 | /*#define HAL_CAN_MODULE_ENABLED */ 56 | /*#define HAL_CEC_MODULE_ENABLED */ 57 | /*#define HAL_CORTEX_MODULE_ENABLED */ 58 | /*#define HAL_CRC_MODULE_ENABLED */ 59 | /*#define HAL_DAC_MODULE_ENABLED */ 60 | /*#define HAL_DMA_MODULE_ENABLED */ 61 | /*#define HAL_ETH_MODULE_ENABLED */ 62 | /*#define HAL_FLASH_MODULE_ENABLED */ 63 | #define HAL_GPIO_MODULE_ENABLED 64 | /*#define HAL_I2C_MODULE_ENABLED */ 65 | /*#define HAL_I2S_MODULE_ENABLED */ 66 | /*#define HAL_IRDA_MODULE_ENABLED */ 67 | /*#define HAL_IWDG_MODULE_ENABLED */ 68 | /*#define HAL_NOR_MODULE_ENABLED */ 69 | /*#define HAL_NAND_MODULE_ENABLED */ 70 | /*#define HAL_PCCARD_MODULE_ENABLED */ 71 | /*#define HAL_PCD_MODULE_ENABLED */ 72 | /*#define HAL_HCD_MODULE_ENABLED */ 73 | /*#define HAL_PWR_MODULE_ENABLED */ 74 | /*#define HAL_RCC_MODULE_ENABLED */ 75 | /*#define HAL_RTC_MODULE_ENABLED */ 76 | /*#define HAL_SD_MODULE_ENABLED */ 77 | /*#define HAL_MMC_MODULE_ENABLED */ 78 | /*#define HAL_SDRAM_MODULE_ENABLED */ 79 | /*#define HAL_SMARTCARD_MODULE_ENABLED */ 80 | /*#define HAL_SPI_MODULE_ENABLED */ 81 | /*#define HAL_SRAM_MODULE_ENABLED */ 82 | /*#define HAL_TIM_MODULE_ENABLED */ 83 | #define HAL_UART_MODULE_ENABLED 84 | /*#define HAL_USART_MODULE_ENABLED */ 85 | /*#define HAL_WWDG_MODULE_ENABLED */ 86 | /*#define HAL_EXTI_MODULE_ENABLED */ 87 | 88 | #define HAL_CORTEX_MODULE_ENABLED 89 | #define HAL_DMA_MODULE_ENABLED 90 | #define HAL_FLASH_MODULE_ENABLED 91 | #define HAL_GPIO_MODULE_ENABLED 92 | #define HAL_PWR_MODULE_ENABLED 93 | #define HAL_RCC_MODULE_ENABLED 94 | 95 | /* ########################## Oscillator Values adaptation ####################*/ 96 | /** 97 | * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. 98 | * This value is used by the RCC HAL module to compute the system frequency 99 | * (when HSE is used as system clock source, directly or through the PLL). 100 | */ 101 | #if !defined (HSE_VALUE) 102 | #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ 103 | #endif /* HSE_VALUE */ 104 | 105 | #if !defined (HSE_STARTUP_TIMEOUT) 106 | #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ 107 | #endif /* HSE_STARTUP_TIMEOUT */ 108 | 109 | /** 110 | * @brief Internal High Speed oscillator (HSI) value. 111 | * This value is used by the RCC HAL module to compute the system frequency 112 | * (when HSI is used as system clock source, directly or through the PLL). 113 | */ 114 | #if !defined (HSI_VALUE) 115 | #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ 116 | #endif /* HSI_VALUE */ 117 | 118 | /** 119 | * @brief Internal Low Speed oscillator (LSI) value. 120 | */ 121 | #if !defined (LSI_VALUE) 122 | #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ 123 | #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz 124 | The real value may vary depending on the variations 125 | in voltage and temperature. */ 126 | 127 | /** 128 | * @brief External Low Speed oscillator (LSE) value. 129 | * This value is used by the UART, RTC HAL module to compute the system frequency 130 | */ 131 | #if !defined (LSE_VALUE) 132 | #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ 133 | #endif /* LSE_VALUE */ 134 | 135 | #if !defined (LSE_STARTUP_TIMEOUT) 136 | #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ 137 | #endif /* LSE_STARTUP_TIMEOUT */ 138 | 139 | /* Tip: To avoid modifying this file each time you need to use different HSE, 140 | === you can define the HSE value in your toolchain compiler preprocessor. */ 141 | 142 | /* ########################### System Configuration ######################### */ 143 | /** 144 | * @brief This is the HAL system configuration section 145 | */ 146 | #define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ 147 | #define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ 148 | #define USE_RTOS 0 149 | #define PREFETCH_ENABLE 1 150 | 151 | /* ########################## Assert Selection ############################## */ 152 | /** 153 | * @brief Uncomment the line below to expanse the "assert_param" macro in the 154 | * HAL drivers code 155 | */ 156 | /* #define USE_FULL_ASSERT 1U */ 157 | 158 | /* ################## Ethernet peripheral configuration ##################### */ 159 | 160 | /* Section 1 : Ethernet peripheral configuration */ 161 | 162 | /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ 163 | #define MAC_ADDR0 2 164 | #define MAC_ADDR1 0 165 | #define MAC_ADDR2 0 166 | #define MAC_ADDR3 0 167 | #define MAC_ADDR4 0 168 | #define MAC_ADDR5 0 169 | 170 | /* Definition of the Ethernet driver buffers size and count */ 171 | #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ 172 | #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ 173 | #define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ 174 | #define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ 175 | 176 | /* Section 2: PHY configuration section */ 177 | 178 | /* DP83848_PHY_ADDRESS Address*/ 179 | #define DP83848_PHY_ADDRESS 0x01U 180 | /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 181 | #define PHY_RESET_DELAY ((uint32_t)0x000000FF) 182 | /* PHY Configuration delay */ 183 | #define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) 184 | 185 | #define PHY_READ_TO ((uint32_t)0x0000FFFF) 186 | #define PHY_WRITE_TO ((uint32_t)0x0000FFFF) 187 | 188 | /* Section 3: Common PHY Registers */ 189 | 190 | #define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ 191 | #define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ 192 | 193 | #define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ 194 | #define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ 195 | #define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ 196 | #define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ 197 | #define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ 198 | #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ 199 | #define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ 200 | #define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ 201 | #define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ 202 | #define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ 203 | 204 | #define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ 205 | #define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ 206 | #define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ 207 | 208 | /* Section 4: Extended PHY Registers */ 209 | #define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ 210 | 211 | #define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ 212 | #define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ 213 | 214 | /* Includes ------------------------------------------------------------------*/ 215 | /** 216 | * @brief Include module's header file 217 | */ 218 | 219 | #ifdef HAL_RCC_MODULE_ENABLED 220 | #include "stm32f1xx_hal_rcc.h" 221 | #endif /* HAL_RCC_MODULE_ENABLED */ 222 | 223 | #ifdef HAL_EXTI_MODULE_ENABLED 224 | #include "stm32f1xx_hal_exti.h" 225 | #endif /* HAL_EXTI_MODULE_ENABLED */ 226 | 227 | #ifdef HAL_GPIO_MODULE_ENABLED 228 | #include "stm32f1xx_hal_gpio.h" 229 | #endif /* HAL_GPIO_MODULE_ENABLED */ 230 | 231 | #ifdef HAL_DMA_MODULE_ENABLED 232 | #include "stm32f1xx_hal_dma.h" 233 | #endif /* HAL_DMA_MODULE_ENABLED */ 234 | 235 | #ifdef HAL_ETH_MODULE_ENABLED 236 | #include "stm32f1xx_hal_eth.h" 237 | #endif /* HAL_ETH_MODULE_ENABLED */ 238 | 239 | #ifdef HAL_CAN_MODULE_ENABLED 240 | #include "stm32f1xx_hal_can.h" 241 | #endif /* HAL_CAN_MODULE_ENABLED */ 242 | 243 | #ifdef HAL_CEC_MODULE_ENABLED 244 | #include "stm32f1xx_hal_cec.h" 245 | #endif /* HAL_CEC_MODULE_ENABLED */ 246 | 247 | #ifdef HAL_CORTEX_MODULE_ENABLED 248 | #include "stm32f1xx_hal_cortex.h" 249 | #endif /* HAL_CORTEX_MODULE_ENABLED */ 250 | 251 | #ifdef HAL_ADC_MODULE_ENABLED 252 | #include "stm32f1xx_hal_adc.h" 253 | #endif /* HAL_ADC_MODULE_ENABLED */ 254 | 255 | #ifdef HAL_CRC_MODULE_ENABLED 256 | #include "stm32f1xx_hal_crc.h" 257 | #endif /* HAL_CRC_MODULE_ENABLED */ 258 | 259 | #ifdef HAL_DAC_MODULE_ENABLED 260 | #include "stm32f1xx_hal_dac.h" 261 | #endif /* HAL_DAC_MODULE_ENABLED */ 262 | 263 | #ifdef HAL_FLASH_MODULE_ENABLED 264 | #include "stm32f1xx_hal_flash.h" 265 | #endif /* HAL_FLASH_MODULE_ENABLED */ 266 | 267 | #ifdef HAL_SRAM_MODULE_ENABLED 268 | #include "stm32f1xx_hal_sram.h" 269 | #endif /* HAL_SRAM_MODULE_ENABLED */ 270 | 271 | #ifdef HAL_NOR_MODULE_ENABLED 272 | #include "stm32f1xx_hal_nor.h" 273 | #endif /* HAL_NOR_MODULE_ENABLED */ 274 | 275 | #ifdef HAL_I2C_MODULE_ENABLED 276 | #include "stm32f1xx_hal_i2c.h" 277 | #endif /* HAL_I2C_MODULE_ENABLED */ 278 | 279 | #ifdef HAL_I2S_MODULE_ENABLED 280 | #include "stm32f1xx_hal_i2s.h" 281 | #endif /* HAL_I2S_MODULE_ENABLED */ 282 | 283 | #ifdef HAL_IWDG_MODULE_ENABLED 284 | #include "stm32f1xx_hal_iwdg.h" 285 | #endif /* HAL_IWDG_MODULE_ENABLED */ 286 | 287 | #ifdef HAL_PWR_MODULE_ENABLED 288 | #include "stm32f1xx_hal_pwr.h" 289 | #endif /* HAL_PWR_MODULE_ENABLED */ 290 | 291 | #ifdef HAL_RTC_MODULE_ENABLED 292 | #include "stm32f1xx_hal_rtc.h" 293 | #endif /* HAL_RTC_MODULE_ENABLED */ 294 | 295 | #ifdef HAL_PCCARD_MODULE_ENABLED 296 | #include "stm32f1xx_hal_pccard.h" 297 | #endif /* HAL_PCCARD_MODULE_ENABLED */ 298 | 299 | #ifdef HAL_SD_MODULE_ENABLED 300 | #include "stm32f1xx_hal_sd.h" 301 | #endif /* HAL_SD_MODULE_ENABLED */ 302 | 303 | #ifdef HAL_MMC_MODULE_ENABLED 304 | #include "stm32f1xx_hal_mmc.h" 305 | #endif /* HAL_MMC_MODULE_ENABLED */ 306 | 307 | #ifdef HAL_NAND_MODULE_ENABLED 308 | #include "stm32f1xx_hal_nand.h" 309 | #endif /* HAL_NAND_MODULE_ENABLED */ 310 | 311 | #ifdef HAL_SPI_MODULE_ENABLED 312 | #include "stm32f1xx_hal_spi.h" 313 | #endif /* HAL_SPI_MODULE_ENABLED */ 314 | 315 | #ifdef HAL_TIM_MODULE_ENABLED 316 | #include "stm32f1xx_hal_tim.h" 317 | #endif /* HAL_TIM_MODULE_ENABLED */ 318 | 319 | #ifdef HAL_UART_MODULE_ENABLED 320 | #include "stm32f1xx_hal_uart.h" 321 | #endif /* HAL_UART_MODULE_ENABLED */ 322 | 323 | #ifdef HAL_USART_MODULE_ENABLED 324 | #include "stm32f1xx_hal_usart.h" 325 | #endif /* HAL_USART_MODULE_ENABLED */ 326 | 327 | #ifdef HAL_IRDA_MODULE_ENABLED 328 | #include "stm32f1xx_hal_irda.h" 329 | #endif /* HAL_IRDA_MODULE_ENABLED */ 330 | 331 | #ifdef HAL_SMARTCARD_MODULE_ENABLED 332 | #include "stm32f1xx_hal_smartcard.h" 333 | #endif /* HAL_SMARTCARD_MODULE_ENABLED */ 334 | 335 | #ifdef HAL_WWDG_MODULE_ENABLED 336 | #include "stm32f1xx_hal_wwdg.h" 337 | #endif /* HAL_WWDG_MODULE_ENABLED */ 338 | 339 | #ifdef HAL_PCD_MODULE_ENABLED 340 | #include "stm32f1xx_hal_pcd.h" 341 | #endif /* HAL_PCD_MODULE_ENABLED */ 342 | 343 | #ifdef HAL_HCD_MODULE_ENABLED 344 | #include "stm32f1xx_hal_hcd.h" 345 | #endif /* HAL_HCD_MODULE_ENABLED */ 346 | 347 | 348 | /* Exported macro ------------------------------------------------------------*/ 349 | #ifdef USE_FULL_ASSERT 350 | /** 351 | * @brief The assert_param macro is used for function's parameters check. 352 | * @param expr: If expr is false, it calls assert_failed function 353 | * which reports the name of the source file and the source 354 | * line number of the call that failed. 355 | * If expr is true, it returns no value. 356 | * @retval None 357 | */ 358 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 359 | /* Exported functions ------------------------------------------------------- */ 360 | void assert_failed(uint8_t* file, uint32_t line); 361 | #else 362 | #define assert_param(expr) ((void)0U) 363 | #endif /* USE_FULL_ASSERT */ 364 | 365 | #ifdef __cplusplus 366 | } 367 | #endif 368 | 369 | #endif /* __STM32F1xx_HAL_CONF_H */ 370 | 371 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 372 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_it.h 4 | * @brief This file contains the headers of the interrupt handlers. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2018 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Define to prevent recursive inclusion -------------------------------------*/ 35 | #ifndef __STM32F1xx_IT_H 36 | #define __STM32F1xx_IT_H 37 | 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32f1xx_hal.h" 44 | #include "main.h" 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* Exported functions ------------------------------------------------------- */ 49 | 50 | void NMI_Handler(void); 51 | void HardFault_Handler(void); 52 | void MemManage_Handler(void); 53 | void BusFault_Handler(void); 54 | void UsageFault_Handler(void); 55 | void SVC_Handler(void); 56 | void DebugMon_Handler(void); 57 | void PendSV_Handler(void); 58 | void SysTick_Handler(void); 59 | 60 | #ifdef __cplusplus 61 | } 62 | #endif 63 | 64 | #endif /* __STM32F1xx_IT_H */ 65 | 66 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 67 | -------------------------------------------------------------------------------- /Inc/uart.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file uart.h 3 | * @author Ferenc Nemeth 4 | * @date 21 Dec 2018 5 | * @brief This module is a layer between the HAL UART functions and my Xmodem protocol. 6 | * 7 | * Copyright (c) 2018 Ferenc Nemeth - https://github.com/ferenc-nemeth 8 | */ 9 | 10 | #ifndef UART_H_ 11 | #define UART_H_ 12 | 13 | #include "stm32f1xx_hal.h" 14 | 15 | extern UART_HandleTypeDef huart1; 16 | 17 | /* Timeout for HAL. */ 18 | #define UART_TIMEOUT ((uint16_t)1000u) 19 | 20 | /* Status report for the functions. */ 21 | typedef enum { 22 | UART_OK = 0x00u, /**< The action was successful. */ 23 | UART_ERROR = 0xFFu /**< Generic error. */ 24 | } uart_status; 25 | 26 | uart_status uart_receive(uint8_t *data, uint16_t length); 27 | uart_status uart_transmit_str(uint8_t *data); 28 | uart_status uart_transmit_ch(uint8_t data); 29 | 30 | 31 | #endif /* UART_H_ */ 32 | -------------------------------------------------------------------------------- /Inc/xmodem.h: -------------------------------------------------------------------------------- 1 | /** 2 | * @file xmodem.h 3 | * @author Ferenc Nemeth 4 | * @date 21 Dec 2018 5 | * @brief This module is the implementation of the Xmodem protocol. 6 | * 7 | * Copyright (c) 2018 Ferenc Nemeth - https://github.com/ferenc-nemeth 8 | */ 9 | 10 | #ifndef XMODEM_H_ 11 | #define XMODEM_H_ 12 | 13 | #include "uart.h" 14 | #include "flash.h" 15 | #include "stdbool.h" 16 | 17 | /* Xmodem (128 bytes) packet format 18 | * Byte 0: Header 19 | * Byte 1: Packet number 20 | * Byte 2: Packet number complement 21 | * Bytes 3-130: Data 22 | * Bytes 131-132: CRC 23 | */ 24 | 25 | /* Xmodem (1024 bytes) packet format 26 | * Byte 0: Header 27 | * Byte 1: Packet number 28 | * Byte 2: Packet number complement 29 | * Bytes 3-1026: Data 30 | * Bytes 1027-1028: CRC 31 | */ 32 | 33 | /* Maximum allowed errors (user defined). */ 34 | #define X_MAX_ERRORS ((uint8_t)3u) 35 | 36 | /* Sizes of the packets. */ 37 | #define X_PACKET_NUMBER_SIZE ((uint16_t)2u) 38 | #define X_PACKET_128_SIZE ((uint16_t)128u) 39 | #define X_PACKET_1024_SIZE ((uint16_t)1024u) 40 | #define X_PACKET_CRC_SIZE ((uint16_t)2u) 41 | 42 | /* Indexes inside packets. */ 43 | #define X_PACKET_NUMBER_INDEX ((uint16_t)0u) 44 | #define X_PACKET_NUMBER_COMPLEMENT_INDEX ((uint16_t)1u) 45 | #define X_PACKET_CRC_HIGH_INDEX ((uint16_t)0u) 46 | #define X_PACKET_CRC_LOW_INDEX ((uint16_t)1u) 47 | 48 | 49 | /* Bytes defined by the protocol. */ 50 | #define X_SOH ((uint8_t)0x01u) /**< Start Of Header (128 bytes). */ 51 | #define X_STX ((uint8_t)0x02u) /**< Start Of Header (1024 bytes). */ 52 | #define X_EOT ((uint8_t)0x04u) /**< End Of Transmission. */ 53 | #define X_ACK ((uint8_t)0x06u) /**< Acknowledge. */ 54 | #define X_NAK ((uint8_t)0x15u) /**< Not Acknowledge. */ 55 | #define X_CAN ((uint8_t)0x18u) /**< Cancel. */ 56 | #define X_C ((uint8_t)0x43u) /**< ASCII "C" to notify the host we want to use CRC16. */ 57 | 58 | /* Status report for the functions. */ 59 | typedef enum { 60 | X_OK = 0x00u, /**< The action was successful. */ 61 | X_ERROR_CRC = 0x01u, /**< CRC calculation error. */ 62 | X_ERROR_NUMBER = 0x02u, /**< Packet number mismatch error. */ 63 | X_ERROR_UART = 0x04u, /**< UART communication error. */ 64 | X_ERROR_FLASH = 0x08u, /**< Flash related error. */ 65 | X_ERROR = 0xFFu /**< Generic error. */ 66 | } xmodem_status; 67 | 68 | void xmodem_receive(void); 69 | 70 | #endif /* XMODEM_H_ */ 71 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2018 Ferenc Németh - https://github.com/ferenc-nemeth/ 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # stm32-bootloader 2 | UART bootloader for STM32 microcontroller. 3 | 4 | ### Table of contents 5 | - [Introduction](#introduction) 6 | - [How it works](#how-it-works) 7 | - [Overall](#overall) 8 | - [Memory map](#memory-map) 9 | - [Code](#code) 10 | - [How to use it](#how-to-use-it) 11 | - [Embedded](#embedded) 12 | - [PC](#pc) 13 | - [Porting](#porting) 14 | - [References](#references) 15 | 16 | ### Introduction 17 | A bootloader for STM32F100 (STM32VLDISCOVERY board) [[1]](#references) with UART and Xmodem protocol [[2]](#references)[[3]](#references). 18 | The software is created with Atollic trueSTUDIO and the drivers are generated with CubeMX. 19 | 20 | Main features: 21 | - UART & Xmodem protocol 22 | - CRC16 checksum 23 | - Supports 128 and 1024 bytes data length 24 | 25 | ### How it works 26 | #### Overall 27 | The bootloader was developed for STM32VLDISCOVERY board, the only extra thing needed is an USB-UART module on PA10 (RX) and PA9 (TX) pins. 28 | 29 |
30 | *Figure 1. Pinout of the system.* 31 | 32 | After start-up, the system sends a welcome message through UART and checks if the user button is pressed. If it is pressed, then it stays in booatloader mode, turns on the green (PC9) LED and waits for a new binary file. If the button isn't pressed, then it jumps to the user application. 33 | 34 |
35 | *Figure 2. Brief overview of the workflow of the system.* 36 | 37 | The Xmodem protocol is clearly explained in the [references](#references). 38 | 39 | #### Memory map 40 | The bootloader starts from 0x08000000 and the user application starts from 0x08008000. 41 | 42 |
43 | *Figure 3. The organization of the memory.* 44 | 45 | #### Code 46 | Every important code is inside the Src and Inc folders. main.c holds the button check, xmodem.c and .h hold the communication portocol, uart.c and .h are a layer between Xmodem and the generated HAL code, flash.c and .h have the writing/erasing/jumping related functions. Everything else is provided by ST. 47 | The code is fully commented, so it should be easy to understand. 48 | 49 | ### How to use it 50 | #### Embedded 51 | To use the bootloader, just get the softwares mentioned in the [Introduction](#introduction) and flash it. 52 | 53 | I included an example binary file called "blinky_test.bin" in the root folder. It blinks the blue (PC8) LED on the board. 54 | To make your own binary, you have to modify the memory location in the linker script (STM32F100RB_FLASH.ld): 55 | ``` 56 | FLASH (rx) : ORIGIN = 0x8008000, 57 | ``` 58 | And the vector table offset in system_stm32f1xx.c 59 | ``` 60 | #define VECT_TAB_OFFSET 0x00008000U 61 | ``` 62 | Last step is you have to generate a \*.bin file: 63 | ``` 64 | arm-atollic-eabi-objcopy -O binary "input.elf" "output.bin" 65 | ``` 66 | 67 | #### PC 68 | To update the firmware, you need a terminal software, that supports Xmodem. I recommend PuTTY [[4]](#references) or Tera Term [[5]](#references). 69 | 70 | Configure them in the following way: 71 | - Baud rate: 115200 72 | - Data bits: 8 73 | - Parity: none 74 | - Stop bits: 1 75 | 76 | In PuTTY: select *Files Transfer* >> *Xmodem* (or *Xmodem 1K*) >> *Send* and then open the binary file. 77 | 78 |
79 | *Figure 4. PuTTY.* 80 | 81 | In Tera Term: select *File* >> *Transfer* >> *Xmodem* >> *Send* and then open the binary file. 82 |
83 | *Figure 5. Tera Term.* 84 | 85 | In case everything was fine, then the output should be the same: 86 | ``` 87 | ================================ 88 | UART Bootloader 89 | https://github.com/ferenc-nemeth 90 | ================================ 91 | 92 | Please send a new binary file with Xmodem protocol to update the firmware. 93 | CCCCCCC 94 | Firmware updated! 95 | Jumping to user application... 96 | ``` 97 | 98 | #### Porting 99 | I included the *.ioc file, so the drivers can be regenerated for any ST microntroller (if it has similar memory structure). 100 | If you have a non-ST microntroller, then the xmodem protocol can be reused, but nothing else. 101 | 102 | ### References 103 | [1] [ST - Discovery kit with STM32F100RB MCU](https://www.st.com/en/evaluation-tools/stm32vldiscovery.html)
104 | [2] [Xmodem protocol with CRC](https://web.mit.edu/6.115/www/amulet/xmodem.htm)
105 | [3] [Chuck Forsberg - XMODEM/YMODEM PROTOCOL REFERENCE](http://www.blunk-electronic.de/train-z/pdf/xymodem.pdf)
106 | [4] [PuTTY](https://putty.org/)
107 | [5] [Tera Term](https://ttssh2.osdn.jp/)
108 | 109 | -------------------------------------------------------------------------------- /STM32F100RB_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | 5 | ** File : stm32_flash.ld 6 | ** 7 | ** Abstract : Linker script for STM32F100RB Device with 8 | ** 128KByte FLASH, 8KByte RAM 9 | ** 10 | ** Set heap size, stack size and stack location according 11 | ** to application requirements. 12 | ** 13 | ** Set memory bank area and size if external memory is used. 14 | ** 15 | ** Target : STMicroelectronics STM32 16 | ** 17 | ** Environment : Atollic TrueSTUDIO(R) 18 | ** 19 | ** Distribution: The file is distributed as is, without any warranty 20 | ** of any kind. 21 | ** 22 | ** (c)Copyright Atollic AB. 23 | ** You may use this file as-is or modify it according to the needs of your 24 | ** project. This file may only be built (assembled or compiled and linked) 25 | ** using the Atollic TrueSTUDIO(R) product. The use of this file together 26 | ** with other tools than Atollic TrueSTUDIO(R) is not permitted. 27 | ** 28 | ***************************************************************************** 29 | */ 30 | 31 | /* Entry Point */ 32 | ENTRY(Reset_Handler) 33 | 34 | /* Highest address of the user mode stack */ 35 | _estack = 0x20002000; /* end of RAM */ 36 | /* Generate a link error if heap and stack don't fit into RAM */ 37 | _Min_Heap_Size = 0x200; /* required amount of heap */ 38 | _Min_Stack_Size = 0x400; /* required amount of stack */ 39 | 40 | /* Specify the memory areas */ 41 | MEMORY 42 | { 43 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K 44 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K 45 | } 46 | 47 | /* Define output sections */ 48 | SECTIONS 49 | { 50 | /* The startup code goes first into FLASH */ 51 | .isr_vector : 52 | { 53 | . = ALIGN(4); 54 | KEEP(*(.isr_vector)) /* Startup code */ 55 | . = ALIGN(4); 56 | } >FLASH 57 | 58 | /* The program code and other data goes into FLASH */ 59 | .text : 60 | { 61 | . = ALIGN(4); 62 | *(.text) /* .text sections (code) */ 63 | *(.text*) /* .text* sections (code) */ 64 | *(.glue_7) /* glue arm to thumb code */ 65 | *(.glue_7t) /* glue thumb to arm code */ 66 | *(.eh_frame) 67 | 68 | KEEP (*(.init)) 69 | KEEP (*(.fini)) 70 | 71 | . = ALIGN(4); 72 | _etext = .; /* define a global symbols at end of code */ 73 | } >FLASH 74 | 75 | /* Constant data goes into FLASH */ 76 | .rodata : 77 | { 78 | . = ALIGN(4); 79 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 80 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 81 | . = ALIGN(4); 82 | } >FLASH 83 | 84 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 85 | .ARM : { 86 | __exidx_start = .; 87 | *(.ARM.exidx*) 88 | __exidx_end = .; 89 | } >FLASH 90 | 91 | .preinit_array : 92 | { 93 | PROVIDE_HIDDEN (__preinit_array_start = .); 94 | KEEP (*(.preinit_array*)) 95 | PROVIDE_HIDDEN (__preinit_array_end = .); 96 | } >FLASH 97 | .init_array : 98 | { 99 | PROVIDE_HIDDEN (__init_array_start = .); 100 | KEEP (*(SORT(.init_array.*))) 101 | KEEP (*(.init_array*)) 102 | PROVIDE_HIDDEN (__init_array_end = .); 103 | } >FLASH 104 | .fini_array : 105 | { 106 | PROVIDE_HIDDEN (__fini_array_start = .); 107 | KEEP (*(SORT(.fini_array.*))) 108 | KEEP (*(.fini_array*)) 109 | PROVIDE_HIDDEN (__fini_array_end = .); 110 | } >FLASH 111 | 112 | /* used by the startup to initialize data */ 113 | _sidata = LOADADDR(.data); 114 | 115 | /* Initialized data sections goes into RAM, load LMA copy after code */ 116 | .data : 117 | { 118 | . = ALIGN(4); 119 | _sdata = .; /* create a global symbol at data start */ 120 | *(.data) /* .data sections */ 121 | *(.data*) /* .data* sections */ 122 | 123 | . = ALIGN(4); 124 | _edata = .; /* define a global symbol at data end */ 125 | } >RAM AT> FLASH 126 | 127 | 128 | /* Uninitialized data section */ 129 | . = ALIGN(4); 130 | .bss : 131 | { 132 | /* This is used by the startup in order to initialize the .bss secion */ 133 | _sbss = .; /* define a global symbol at bss start */ 134 | __bss_start__ = _sbss; 135 | *(.bss) 136 | *(.bss*) 137 | *(COMMON) 138 | 139 | . = ALIGN(4); 140 | _ebss = .; /* define a global symbol at bss end */ 141 | __bss_end__ = _ebss; 142 | } >RAM 143 | 144 | /* User_heap_stack section, used to check that there is enough RAM left */ 145 | ._user_heap_stack : 146 | { 147 | . = ALIGN(4); 148 | PROVIDE ( end = . ); 149 | PROVIDE ( _end = . ); 150 | . = . + _Min_Heap_Size; 151 | . = . + _Min_Stack_Size; 152 | . = ALIGN(4); 153 | } >RAM 154 | 155 | 156 | 157 | /* Remove information from the standard libraries */ 158 | /DISCARD/ : 159 | { 160 | libc.a ( * ) 161 | libm.a ( * ) 162 | libgcc.a ( * ) 163 | } 164 | 165 | .ARM.attributes 0 : { *(.ARM.attributes) } 166 | } 167 | 168 | 169 | -------------------------------------------------------------------------------- /Src/flash.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file flash.c 3 | * @author Ferenc Nemeth 4 | * @date 21 Dec 2018 5 | * @brief This module handles the memory related functions. 6 | * 7 | * Copyright (c) 2018 Ferenc Nemeth - https://github.com/ferenc-nemeth 8 | */ 9 | 10 | #include "flash.h" 11 | 12 | /* Function pointer for jumping to user application. */ 13 | typedef void (*fnc_ptr)(void); 14 | 15 | /** 16 | * @brief This function erases the memory. 17 | * @param address: First address to be erased (the last is the end of the flash). 18 | * @return status: Report about the success of the erasing. 19 | */ 20 | flash_status flash_erase(uint32_t address) 21 | { 22 | HAL_FLASH_Unlock(); 23 | 24 | flash_status status = FLASH_ERROR; 25 | FLASH_EraseInitTypeDef erase_init; 26 | uint32_t error = 0u; 27 | 28 | erase_init.TypeErase = FLASH_TYPEERASE_PAGES; 29 | erase_init.PageAddress = address; 30 | erase_init.Banks = FLASH_BANK_1; 31 | /* Calculate the number of pages from "address" and the end of flash. */ 32 | erase_init.NbPages = (FLASH_BANK1_END - address) / FLASH_PAGE_SIZE; 33 | /* Do the actual erasing. */ 34 | if (HAL_OK == HAL_FLASHEx_Erase(&erase_init, &error)) 35 | { 36 | status = FLASH_OK; 37 | } 38 | 39 | HAL_FLASH_Lock(); 40 | 41 | return status; 42 | } 43 | 44 | /** 45 | * @brief This function flashes the memory. 46 | * @param address: First address to be written to. 47 | * @param *data: Array of the data that we want to write. 48 | * @param *length: Size of the array. 49 | * @return status: Report about the success of the writing. 50 | */ 51 | flash_status flash_write(uint32_t address, uint32_t *data, uint32_t length) 52 | { 53 | flash_status status = FLASH_OK; 54 | 55 | HAL_FLASH_Unlock(); 56 | 57 | /* Loop through the array. */ 58 | for (uint32_t i = 0u; (i < length) && (FLASH_OK == status); i++) 59 | { 60 | /* If we reached the end of the memory, then report an error and don't do anything else.*/ 61 | if (FLASH_APP_END_ADDRESS <= address) 62 | { 63 | status |= FLASH_ERROR_SIZE; 64 | } 65 | else 66 | { 67 | /* The actual flashing. If there is an error, then report it. */ 68 | if (HAL_OK != HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, address, data[i])) 69 | { 70 | status |= FLASH_ERROR_WRITE; 71 | } 72 | /* Read back the content of the memory. If it is wrong, then report an error. */ 73 | if (((data[i])) != (*(volatile uint32_t*)address)) 74 | { 75 | status |= FLASH_ERROR_READBACK; 76 | } 77 | 78 | /* Shift the address by a word. */ 79 | address += 4u; 80 | } 81 | } 82 | 83 | HAL_FLASH_Lock(); 84 | 85 | return status; 86 | } 87 | 88 | /** 89 | * @brief Actually jumps to the user application. 90 | * @param void 91 | * @return void 92 | */ 93 | void flash_jump_to_app(void) 94 | { 95 | /* Function pointer to the address of the user application. */ 96 | fnc_ptr jump_to_app; 97 | jump_to_app = (fnc_ptr)(*(volatile uint32_t*) (FLASH_APP_START_ADDRESS+4u)); 98 | HAL_DeInit(); 99 | /* Change the main stack pointer. */ 100 | __set_MSP(*(volatile uint32_t*)FLASH_APP_START_ADDRESS); 101 | jump_to_app(); 102 | } 103 | 104 | -------------------------------------------------------------------------------- /Src/main.c: -------------------------------------------------------------------------------- 1 | 2 | /** 3 | ****************************************************************************** 4 | * @file : main.c 5 | * @brief : Main program body 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2018 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "main.h" 41 | #include "stm32f1xx_hal.h" 42 | 43 | /* USER CODE BEGIN Includes */ 44 | #include "xmodem.h" 45 | #include "flash.h" 46 | /* USER CODE END Includes */ 47 | 48 | /* Private variables ---------------------------------------------------------*/ 49 | UART_HandleTypeDef huart1; 50 | 51 | /* USER CODE BEGIN PV */ 52 | /* Private variables ---------------------------------------------------------*/ 53 | 54 | /* USER CODE END PV */ 55 | 56 | /* Private function prototypes -----------------------------------------------*/ 57 | void SystemClock_Config(void); 58 | static void MX_GPIO_Init(void); 59 | static void MX_USART1_UART_Init(void); 60 | 61 | /* USER CODE BEGIN PFP */ 62 | /* Private function prototypes -----------------------------------------------*/ 63 | 64 | /* USER CODE END PFP */ 65 | 66 | /* USER CODE BEGIN 0 */ 67 | 68 | /* USER CODE END 0 */ 69 | 70 | /** 71 | * @brief The application entry point. 72 | * 73 | * @retval None 74 | */ 75 | int main(void) 76 | { 77 | /* USER CODE BEGIN 1 */ 78 | 79 | /* USER CODE END 1 */ 80 | 81 | /* MCU Configuration----------------------------------------------------------*/ 82 | 83 | /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 84 | HAL_Init(); 85 | 86 | /* USER CODE BEGIN Init */ 87 | 88 | /* USER CODE END Init */ 89 | 90 | /* Configure the system clock */ 91 | SystemClock_Config(); 92 | 93 | /* USER CODE BEGIN SysInit */ 94 | 95 | /* USER CODE END SysInit */ 96 | 97 | /* Initialize all configured peripherals */ 98 | MX_GPIO_Init(); 99 | MX_USART1_UART_Init(); 100 | /* USER CODE BEGIN 2 */ 101 | /* Send welcome message on startup. */ 102 | uart_transmit_str((uint8_t*)"\n\r================================\n\r"); 103 | uart_transmit_str((uint8_t*)"UART Bootloader\n\r"); 104 | uart_transmit_str((uint8_t*)"https://github.com/ferenc-nemeth\n\r"); 105 | uart_transmit_str((uint8_t*)"================================\n\r\n\r"); 106 | 107 | /* If the button is pressed, then jump to the user application, 108 | * otherwise stay in the bootloader. */ 109 | if(!HAL_GPIO_ReadPin(BTN_GPIO_Port, BTN_Pin)) 110 | { 111 | uart_transmit_str((uint8_t*)"Jumping to user application...\n\r"); 112 | flash_jump_to_app(); 113 | } 114 | /* USER CODE END 2 */ 115 | 116 | /* Infinite loop */ 117 | /* USER CODE BEGIN WHILE */ 118 | while (1) 119 | { 120 | /* Turn on the green LED to indicate, that we are in bootloader mode.*/ 121 | HAL_GPIO_WritePin(GPIOC, LD3_Pin, GPIO_PIN_SET); 122 | /* Ask for new data and start the Xmodem protocol. */ 123 | uart_transmit_str((uint8_t*)"Please send a new binary file with Xmodem protocol to update the firmware.\n\r"); 124 | xmodem_receive(); 125 | /* We only exit the xmodem protocol, if there are any errors. 126 | * In that case, notify the user and start over. */ 127 | uart_transmit_str((uint8_t*)"\n\rFailed... Please try again.\n\r"); 128 | /* USER CODE END WHILE */ 129 | 130 | /* USER CODE BEGIN 3 */ 131 | 132 | } 133 | /* USER CODE END 3 */ 134 | 135 | } 136 | 137 | /** 138 | * @brief System Clock Configuration 139 | * @retval None 140 | */ 141 | void SystemClock_Config(void) 142 | { 143 | 144 | RCC_OscInitTypeDef RCC_OscInitStruct; 145 | RCC_ClkInitTypeDef RCC_ClkInitStruct; 146 | 147 | /**Initializes the CPU, AHB and APB busses clocks 148 | */ 149 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 150 | RCC_OscInitStruct.HSEState = RCC_HSE_ON; 151 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 152 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 153 | { 154 | _Error_Handler(__FILE__, __LINE__); 155 | } 156 | 157 | /**Initializes the CPU, AHB and APB busses clocks 158 | */ 159 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 160 | |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 161 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 162 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 163 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 164 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 165 | 166 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 167 | { 168 | _Error_Handler(__FILE__, __LINE__); 169 | } 170 | 171 | /**Configure the Systick interrupt time 172 | */ 173 | HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); 174 | 175 | /**Configure the Systick 176 | */ 177 | HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); 178 | 179 | /* SysTick_IRQn interrupt configuration */ 180 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 181 | } 182 | 183 | /* USART1 init function */ 184 | static void MX_USART1_UART_Init(void) 185 | { 186 | 187 | huart1.Instance = USART1; 188 | huart1.Init.BaudRate = 115200; 189 | huart1.Init.WordLength = UART_WORDLENGTH_8B; 190 | huart1.Init.StopBits = UART_STOPBITS_1; 191 | huart1.Init.Parity = UART_PARITY_NONE; 192 | huart1.Init.Mode = UART_MODE_TX_RX; 193 | huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 194 | huart1.Init.OverSampling = UART_OVERSAMPLING_16; 195 | if (HAL_UART_Init(&huart1) != HAL_OK) 196 | { 197 | _Error_Handler(__FILE__, __LINE__); 198 | } 199 | 200 | } 201 | 202 | /** Configure pins as 203 | * Analog 204 | * Input 205 | * Output 206 | * EVENT_OUT 207 | * EXTI 208 | */ 209 | static void MX_GPIO_Init(void) 210 | { 211 | 212 | GPIO_InitTypeDef GPIO_InitStruct; 213 | 214 | /* GPIO Ports Clock Enable */ 215 | __HAL_RCC_GPIOD_CLK_ENABLE(); 216 | __HAL_RCC_GPIOA_CLK_ENABLE(); 217 | __HAL_RCC_GPIOC_CLK_ENABLE(); 218 | 219 | /*Configure GPIO pin Output Level */ 220 | HAL_GPIO_WritePin(GPIOC, LD4_Pin|LD3_Pin, GPIO_PIN_RESET); 221 | 222 | /*Configure GPIO pin : BTN_Pin */ 223 | GPIO_InitStruct.Pin = BTN_Pin; 224 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 225 | GPIO_InitStruct.Pull = GPIO_NOPULL; 226 | HAL_GPIO_Init(BTN_GPIO_Port, &GPIO_InitStruct); 227 | 228 | /*Configure GPIO pins : LD4_Pin LD3_Pin */ 229 | GPIO_InitStruct.Pin = LD4_Pin|LD3_Pin; 230 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 231 | GPIO_InitStruct.Pull = GPIO_NOPULL; 232 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 233 | HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 234 | 235 | } 236 | 237 | /* USER CODE BEGIN 4 */ 238 | 239 | /* USER CODE END 4 */ 240 | 241 | /** 242 | * @brief This function is executed in case of error occurrence. 243 | * @param file: The file name as string. 244 | * @param line: The line in file as a number. 245 | * @retval None 246 | */ 247 | void _Error_Handler(char *file, int line) 248 | { 249 | /* USER CODE BEGIN Error_Handler_Debug */ 250 | /* User can add his own implementation to report the HAL error return state */ 251 | while(1) 252 | { 253 | } 254 | /* USER CODE END Error_Handler_Debug */ 255 | } 256 | 257 | #ifdef USE_FULL_ASSERT 258 | /** 259 | * @brief Reports the name of the source file and the source line number 260 | * where the assert_param error has occurred. 261 | * @param file: pointer to the source file name 262 | * @param line: assert_param error line source number 263 | * @retval None 264 | */ 265 | void assert_failed(uint8_t* file, uint32_t line) 266 | { 267 | /* USER CODE BEGIN 6 */ 268 | /* User can add his own implementation to report the file name and line number, 269 | tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 270 | /* USER CODE END 6 */ 271 | } 272 | #endif /* USE_FULL_ASSERT */ 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | /** 279 | * @} 280 | */ 281 | 282 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 283 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : stm32f1xx_hal_msp.c 4 | * Description : This file provides code for the MSP Initialization 5 | * and de-Initialization codes. 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2018 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f1xx_hal.h" 41 | 42 | extern void _Error_Handler(char *, int); 43 | /* USER CODE BEGIN 0 */ 44 | 45 | /* USER CODE END 0 */ 46 | /** 47 | * Initializes the Global MSP. 48 | */ 49 | void HAL_MspInit(void) 50 | { 51 | /* USER CODE BEGIN MspInit 0 */ 52 | 53 | /* USER CODE END MspInit 0 */ 54 | 55 | __HAL_RCC_AFIO_CLK_ENABLE(); 56 | __HAL_RCC_PWR_CLK_ENABLE(); 57 | 58 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 59 | 60 | /* System interrupt init*/ 61 | /* MemoryManagement_IRQn interrupt configuration */ 62 | HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); 63 | /* BusFault_IRQn interrupt configuration */ 64 | HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); 65 | /* UsageFault_IRQn interrupt configuration */ 66 | HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); 67 | /* SVCall_IRQn interrupt configuration */ 68 | HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); 69 | /* DebugMonitor_IRQn interrupt configuration */ 70 | HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); 71 | /* PendSV_IRQn interrupt configuration */ 72 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); 73 | /* SysTick_IRQn interrupt configuration */ 74 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 75 | 76 | /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled 77 | */ 78 | __HAL_AFIO_REMAP_SWJ_NOJTAG(); 79 | 80 | /* USER CODE BEGIN MspInit 1 */ 81 | 82 | /* USER CODE END MspInit 1 */ 83 | } 84 | 85 | void HAL_UART_MspInit(UART_HandleTypeDef* huart) 86 | { 87 | 88 | GPIO_InitTypeDef GPIO_InitStruct; 89 | if(huart->Instance==USART1) 90 | { 91 | /* USER CODE BEGIN USART1_MspInit 0 */ 92 | 93 | /* USER CODE END USART1_MspInit 0 */ 94 | /* Peripheral clock enable */ 95 | __HAL_RCC_USART1_CLK_ENABLE(); 96 | 97 | /**USART1 GPIO Configuration 98 | PA9 ------> USART1_TX 99 | PA10 ------> USART1_RX 100 | */ 101 | GPIO_InitStruct.Pin = GPIO_PIN_9; 102 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 103 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 104 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 105 | 106 | GPIO_InitStruct.Pin = GPIO_PIN_10; 107 | GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 108 | GPIO_InitStruct.Pull = GPIO_NOPULL; 109 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 110 | 111 | /* USER CODE BEGIN USART1_MspInit 1 */ 112 | 113 | /* USER CODE END USART1_MspInit 1 */ 114 | } 115 | 116 | } 117 | 118 | void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 119 | { 120 | 121 | if(huart->Instance==USART1) 122 | { 123 | /* USER CODE BEGIN USART1_MspDeInit 0 */ 124 | 125 | /* USER CODE END USART1_MspDeInit 0 */ 126 | /* Peripheral clock disable */ 127 | __HAL_RCC_USART1_CLK_DISABLE(); 128 | 129 | /**USART1 GPIO Configuration 130 | PA9 ------> USART1_TX 131 | PA10 ------> USART1_RX 132 | */ 133 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); 134 | 135 | /* USER CODE BEGIN USART1_MspDeInit 1 */ 136 | 137 | /* USER CODE END USART1_MspDeInit 1 */ 138 | } 139 | 140 | } 141 | 142 | /* USER CODE BEGIN 1 */ 143 | 144 | /* USER CODE END 1 */ 145 | 146 | /** 147 | * @} 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 155 | -------------------------------------------------------------------------------- /Src/stm32f1xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_it.c 4 | * @brief Interrupt Service Routines. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2018 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm32f1xx_hal.h" 35 | #include "stm32f1xx.h" 36 | #include "stm32f1xx_it.h" 37 | 38 | /* USER CODE BEGIN 0 */ 39 | 40 | /* USER CODE END 0 */ 41 | 42 | /* External variables --------------------------------------------------------*/ 43 | 44 | /******************************************************************************/ 45 | /* Cortex-M3 Processor Interruption and Exception Handlers */ 46 | /******************************************************************************/ 47 | 48 | /** 49 | * @brief This function handles Non maskable interrupt. 50 | */ 51 | void NMI_Handler(void) 52 | { 53 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 54 | 55 | /* USER CODE END NonMaskableInt_IRQn 0 */ 56 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 57 | 58 | /* USER CODE END NonMaskableInt_IRQn 1 */ 59 | } 60 | 61 | /** 62 | * @brief This function handles Hard fault interrupt. 63 | */ 64 | void HardFault_Handler(void) 65 | { 66 | /* USER CODE BEGIN HardFault_IRQn 0 */ 67 | 68 | /* USER CODE END HardFault_IRQn 0 */ 69 | while (1) 70 | { 71 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 72 | /* USER CODE END W1_HardFault_IRQn 0 */ 73 | } 74 | /* USER CODE BEGIN HardFault_IRQn 1 */ 75 | 76 | /* USER CODE END HardFault_IRQn 1 */ 77 | } 78 | 79 | /** 80 | * @brief This function handles Memory management fault. 81 | */ 82 | void MemManage_Handler(void) 83 | { 84 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 85 | 86 | /* USER CODE END MemoryManagement_IRQn 0 */ 87 | while (1) 88 | { 89 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 90 | /* USER CODE END W1_MemoryManagement_IRQn 0 */ 91 | } 92 | /* USER CODE BEGIN MemoryManagement_IRQn 1 */ 93 | 94 | /* USER CODE END MemoryManagement_IRQn 1 */ 95 | } 96 | 97 | /** 98 | * @brief This function handles Prefetch fault, memory access fault. 99 | */ 100 | void BusFault_Handler(void) 101 | { 102 | /* USER CODE BEGIN BusFault_IRQn 0 */ 103 | 104 | /* USER CODE END BusFault_IRQn 0 */ 105 | while (1) 106 | { 107 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 108 | /* USER CODE END W1_BusFault_IRQn 0 */ 109 | } 110 | /* USER CODE BEGIN BusFault_IRQn 1 */ 111 | 112 | /* USER CODE END BusFault_IRQn 1 */ 113 | } 114 | 115 | /** 116 | * @brief This function handles Undefined instruction or illegal state. 117 | */ 118 | void UsageFault_Handler(void) 119 | { 120 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 121 | 122 | /* USER CODE END UsageFault_IRQn 0 */ 123 | while (1) 124 | { 125 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 126 | /* USER CODE END W1_UsageFault_IRQn 0 */ 127 | } 128 | /* USER CODE BEGIN UsageFault_IRQn 1 */ 129 | 130 | /* USER CODE END UsageFault_IRQn 1 */ 131 | } 132 | 133 | /** 134 | * @brief This function handles System service call via SWI instruction. 135 | */ 136 | void SVC_Handler(void) 137 | { 138 | /* USER CODE BEGIN SVCall_IRQn 0 */ 139 | 140 | /* USER CODE END SVCall_IRQn 0 */ 141 | /* USER CODE BEGIN SVCall_IRQn 1 */ 142 | 143 | /* USER CODE END SVCall_IRQn 1 */ 144 | } 145 | 146 | /** 147 | * @brief This function handles Debug monitor. 148 | */ 149 | void DebugMon_Handler(void) 150 | { 151 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 152 | 153 | /* USER CODE END DebugMonitor_IRQn 0 */ 154 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 155 | 156 | /* USER CODE END DebugMonitor_IRQn 1 */ 157 | } 158 | 159 | /** 160 | * @brief This function handles Pendable request for system service. 161 | */ 162 | void PendSV_Handler(void) 163 | { 164 | /* USER CODE BEGIN PendSV_IRQn 0 */ 165 | 166 | /* USER CODE END PendSV_IRQn 0 */ 167 | /* USER CODE BEGIN PendSV_IRQn 1 */ 168 | 169 | /* USER CODE END PendSV_IRQn 1 */ 170 | } 171 | 172 | /** 173 | * @brief This function handles System tick timer. 174 | */ 175 | void SysTick_Handler(void) 176 | { 177 | /* USER CODE BEGIN SysTick_IRQn 0 */ 178 | 179 | /* USER CODE END SysTick_IRQn 0 */ 180 | HAL_IncTick(); 181 | HAL_SYSTICK_IRQHandler(); 182 | /* USER CODE BEGIN SysTick_IRQn 1 */ 183 | 184 | /* USER CODE END SysTick_IRQn 1 */ 185 | } 186 | 187 | /******************************************************************************/ 188 | /* STM32F1xx Peripheral Interrupt Handlers */ 189 | /* Add here the Interrupt Handlers for the used peripherals. */ 190 | /* For the available peripheral interrupt handler names, */ 191 | /* please refer to the startup file (startup_stm32f1xx.s). */ 192 | /******************************************************************************/ 193 | 194 | /* USER CODE BEGIN 1 */ 195 | 196 | /* USER CODE END 1 */ 197 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 198 | -------------------------------------------------------------------------------- /Src/uart.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file uart.c 3 | * @author Ferenc Nemeth 4 | * @date 21 Dec 2018 5 | * @brief This module is a layer between the HAL UART functions and my Xmodem protocol. 6 | * 7 | * Copyright (c) 2018 Ferenc Nemeth - https://github.com/ferenc-nemeth 8 | */ 9 | 10 | #include "uart.h" 11 | 12 | /** 13 | * @brief Receives data from UART. 14 | * @param *data: Array to save the received data. 15 | * @param length: Size of the data. 16 | * @return status: Report about the success of the receiving. 17 | */ 18 | uart_status uart_receive(uint8_t *data, uint16_t length) 19 | { 20 | uart_status status = UART_ERROR; 21 | 22 | if (HAL_OK == HAL_UART_Receive(&huart1, data, length, UART_TIMEOUT)) 23 | { 24 | status = UART_OK; 25 | } 26 | 27 | return status; 28 | } 29 | 30 | /** 31 | * @brief Transmits a string to UART. 32 | * @param *data: Array of the data. 33 | * @return status: Report about the success of the transmission. 34 | */ 35 | uart_status uart_transmit_str(uint8_t *data) 36 | { 37 | uart_status status = UART_ERROR; 38 | uint16_t length = 0u; 39 | 40 | /* Calculate the length. */ 41 | while ('\0' != data[length]) 42 | { 43 | length++; 44 | } 45 | 46 | if (HAL_OK == HAL_UART_Transmit(&huart1, data, length, UART_TIMEOUT)) 47 | { 48 | status = UART_OK; 49 | } 50 | 51 | return status; 52 | } 53 | 54 | /** 55 | * @brief Transmits a single char to UART. 56 | * @param *data: The char. 57 | * @return status: Report about the success of the transmission. 58 | */ 59 | uart_status uart_transmit_ch(uint8_t data) 60 | { 61 | uart_status status = UART_ERROR; 62 | 63 | /* Make available the UART module. */ 64 | if (HAL_UART_STATE_TIMEOUT == HAL_UART_GetState(&huart1)) 65 | { 66 | HAL_UART_Abort(&huart1); 67 | } 68 | 69 | if (HAL_OK == HAL_UART_Transmit(&huart1, &data, 1u, UART_TIMEOUT)) 70 | { 71 | status = UART_OK; 72 | } 73 | return status; 74 | } 75 | -------------------------------------------------------------------------------- /Src/xmodem.c: -------------------------------------------------------------------------------- 1 | /** 2 | * @file xmodem.c 3 | * @author Ferenc Nemeth 4 | * @date 21 Dec 2018 5 | * @brief This module is the implementation of the Xmodem protocol. 6 | * 7 | * Copyright (c) 2018 Ferenc Nemeth - https://github.com/ferenc-nemeth 8 | */ 9 | 10 | #include "xmodem.h" 11 | 12 | /* Global variables. */ 13 | static uint8_t xmodem_packet_number = 1u; /**< Packet number counter. */ 14 | static uint32_t xmodem_actual_flash_address = 0u; /**< Address where we have to write. */ 15 | static uint8_t x_first_packet_received = false; /**< First packet or not. */ 16 | 17 | /* Local functions. */ 18 | static uint16_t xmodem_calc_crc(uint8_t *data, uint16_t length); 19 | static xmodem_status xmodem_handle_packet(uint8_t size); 20 | static xmodem_status xmodem_error_handler(uint8_t *error_number, uint8_t max_error_number); 21 | 22 | /** 23 | * @brief This function is the base of the Xmodem protocol. 24 | * When we receive a header from UART, it decides what action it shall take. 25 | * @param void 26 | * @return void 27 | */ 28 | void xmodem_receive(void) 29 | { 30 | volatile xmodem_status status = X_OK; 31 | uint8_t error_number = 0u; 32 | 33 | x_first_packet_received = false; 34 | xmodem_packet_number = 1u; 35 | xmodem_actual_flash_address = FLASH_APP_START_ADDRESS; 36 | 37 | /* Loop until there isn't any error (or until we jump to the user application). */ 38 | while (X_OK == status) 39 | { 40 | uint8_t header = 0x00u; 41 | 42 | /* Get the header from UART. */ 43 | uart_status comm_status = uart_receive(&header, 1u); 44 | 45 | /* Spam the host (until we receive something) with ACSII "C", to notify it, we want to use CRC-16. */ 46 | if ((UART_OK != comm_status) && (false == x_first_packet_received)) 47 | { 48 | (void)uart_transmit_ch(X_C); 49 | } 50 | /* Uart timeout or any other errors. */ 51 | else if ((UART_OK != comm_status) && (true == x_first_packet_received)) 52 | { 53 | status = xmodem_error_handler(&error_number, X_MAX_ERRORS); 54 | } 55 | else 56 | { 57 | /* Do nothing. */ 58 | } 59 | 60 | /* The header can be: SOH, STX, EOT and CAN. */ 61 | switch(header) 62 | { 63 | xmodem_status packet_status = X_ERROR; 64 | /* 128 or 1024 bytes of data. */ 65 | case X_SOH: 66 | case X_STX: 67 | /* If the handling was successful, then send an ACK. */ 68 | packet_status = xmodem_handle_packet(header); 69 | if (X_OK == packet_status) 70 | { 71 | (void)uart_transmit_ch(X_ACK); 72 | } 73 | /* If the error was flash related, then immediately set the error counter to max (graceful abort). */ 74 | else if (X_ERROR_FLASH == packet_status) 75 | { 76 | error_number = X_MAX_ERRORS; 77 | status = xmodem_error_handler(&error_number, X_MAX_ERRORS); 78 | } 79 | /* Error while processing the packet, either send a NAK or do graceful abort. */ 80 | else 81 | { 82 | status = xmodem_error_handler(&error_number, X_MAX_ERRORS); 83 | } 84 | break; 85 | /* End of Transmission. */ 86 | case X_EOT: 87 | /* ACK, feedback to user (as a text), then jump to user application. */ 88 | (void)uart_transmit_ch(X_ACK); 89 | (void)uart_transmit_str((uint8_t*)"\n\rFirmware updated!\n\r"); 90 | (void)uart_transmit_str((uint8_t*)"Jumping to user application...\n\r"); 91 | flash_jump_to_app(); 92 | break; 93 | /* Abort from host. */ 94 | case X_CAN: 95 | status = X_ERROR; 96 | break; 97 | default: 98 | /* Wrong header. */ 99 | if (UART_OK == comm_status) 100 | { 101 | status = xmodem_error_handler(&error_number, X_MAX_ERRORS); 102 | } 103 | break; 104 | } 105 | } 106 | } 107 | 108 | /** 109 | * @brief Calculates the CRC-16 for the input package. 110 | * @param *data: Array of the data which we want to calculate. 111 | * @param length: Size of the data, either 128 or 1024 bytes. 112 | * @return status: The calculated CRC. 113 | */ 114 | static uint16_t xmodem_calc_crc(uint8_t *data, uint16_t length) 115 | { 116 | uint16_t crc = 0u; 117 | while (length) 118 | { 119 | length--; 120 | crc = crc ^ ((uint16_t)*data++ << 8u); 121 | for (uint8_t i = 0u; i < 8u; i++) 122 | { 123 | if (crc & 0x8000u) 124 | { 125 | crc = (crc << 1u) ^ 0x1021u; 126 | } 127 | else 128 | { 129 | crc = crc << 1u; 130 | } 131 | } 132 | } 133 | return crc; 134 | } 135 | 136 | /** 137 | * @brief This function handles the data packet we get from the xmodem protocol. 138 | * @param header: SOH or STX. 139 | * @return status: Report about the packet. 140 | */ 141 | static xmodem_status xmodem_handle_packet(uint8_t header) 142 | { 143 | xmodem_status status = X_OK; 144 | uint16_t size = 0u; 145 | 146 | /* 2 bytes for packet number, 1024 for data, 2 for CRC*/ 147 | uint8_t received_packet_number[X_PACKET_NUMBER_SIZE]; 148 | uint8_t received_packet_data[X_PACKET_1024_SIZE]; 149 | uint8_t received_packet_crc[X_PACKET_CRC_SIZE]; 150 | 151 | /* Get the size of the data. */ 152 | if (X_SOH == header) 153 | { 154 | size = X_PACKET_128_SIZE; 155 | } 156 | else if (X_STX == header) 157 | { 158 | size = X_PACKET_1024_SIZE; 159 | } 160 | else 161 | { 162 | /* Wrong header type. This shoudn't be possible... */ 163 | status |= X_ERROR; 164 | } 165 | 166 | uart_status comm_status = UART_OK; 167 | /* Get the packet number, data and CRC from UART. */ 168 | comm_status |= uart_receive(&received_packet_number[0u], X_PACKET_NUMBER_SIZE); 169 | comm_status |= uart_receive(&received_packet_data[0u], size); 170 | comm_status |= uart_receive(&received_packet_crc[0u], X_PACKET_CRC_SIZE); 171 | /* Merge the two bytes of CRC. */ 172 | uint16_t crc_received = ((uint16_t)received_packet_crc[X_PACKET_CRC_HIGH_INDEX] << 8u) | ((uint16_t)received_packet_crc[X_PACKET_CRC_LOW_INDEX]); 173 | /* We calculate it too. */ 174 | uint16_t crc_calculated = xmodem_calc_crc(&received_packet_data[0u], size); 175 | 176 | /* Communication error. */ 177 | if (UART_OK != comm_status) 178 | { 179 | status |= X_ERROR_UART; 180 | } 181 | 182 | /* If it is the first packet, then erase the memory. */ 183 | if ((X_OK == status) && (false == x_first_packet_received)) 184 | { 185 | if (FLASH_OK == flash_erase(FLASH_APP_START_ADDRESS)) 186 | { 187 | x_first_packet_received = true; 188 | } 189 | else 190 | { 191 | status |= X_ERROR_FLASH; 192 | } 193 | } 194 | 195 | /* Error handling and flashing. */ 196 | if (X_OK == status) 197 | { 198 | if (xmodem_packet_number != received_packet_number[0u]) 199 | { 200 | /* Packet number counter mismatch. */ 201 | status |= X_ERROR_NUMBER; 202 | } 203 | if (255u != (received_packet_number[X_PACKET_NUMBER_INDEX] + received_packet_number[X_PACKET_NUMBER_COMPLEMENT_INDEX])) 204 | { 205 | /* The sum of the packet number and packet number complement aren't 255. */ 206 | /* The sum always has to be 255. */ 207 | status |= X_ERROR_NUMBER; 208 | } 209 | if (crc_calculated != crc_received) 210 | { 211 | /* The calculated and received CRC are different. */ 212 | status |= X_ERROR_CRC; 213 | } 214 | } 215 | 216 | /* Do the actual flashing (if there weren't any errors). */ 217 | if ((X_OK == status) && (FLASH_OK != flash_write(xmodem_actual_flash_address, (uint32_t*)&received_packet_data[0u], (uint32_t)size/4u))) 218 | { 219 | /* Flashing error. */ 220 | status |= X_ERROR_FLASH; 221 | } 222 | 223 | /* Raise the packet number and the address counters (if there weren't any errors). */ 224 | if (X_OK == status) 225 | { 226 | xmodem_packet_number++; 227 | xmodem_actual_flash_address += size; 228 | } 229 | 230 | return status; 231 | } 232 | 233 | /** 234 | * @brief Handles the xmodem error. 235 | * Raises the error counter, then if the number of the errors reached critical, do a graceful abort, otherwise send a NAK. 236 | * @param *error_number: Number of current errors (passed as a pointer). 237 | * @param max_error_number: Maximal allowed number of errors. 238 | * @return status: X_ERROR in case of too many errors, X_OK otherwise. 239 | */ 240 | static xmodem_status xmodem_error_handler(uint8_t *error_number, uint8_t max_error_number) 241 | { 242 | xmodem_status status = X_OK; 243 | /* Raise the error counter. */ 244 | (*error_number)++; 245 | /* If the counter reached the max value, then abort. */ 246 | if ((*error_number) >= max_error_number) 247 | { 248 | /* Graceful abort. */ 249 | (void)uart_transmit_ch(X_CAN); 250 | (void)uart_transmit_ch(X_CAN); 251 | status = X_ERROR; 252 | } 253 | /* Otherwise send a NAK for a repeat. */ 254 | else 255 | { 256 | (void)uart_transmit_ch(X_NAK); 257 | status = X_OK; 258 | } 259 | return status; 260 | } 261 | -------------------------------------------------------------------------------- /blinky_test.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/ferenc-nemeth/stm32-bootloader/8848449728ca38db6924e130c035f3b379671ba3/blinky_test.bin -------------------------------------------------------------------------------- /startup/startup_stm32f100xb.s: -------------------------------------------------------------------------------- 1 | /** 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ 3 | * @file startup_stm32f100xb.s 4 | * @author MCD Application Team 5 | * @version V4.2.0 6 | * @date 31-March-2017 7 | * @brief STM32F100xB Devices vector table for Atollic toolchain. 8 | * This module performs: 9 | * - Set the initial SP 10 | * - Set the initial PC == Reset_Handler, 11 | * - Set the vector table entries with the exceptions ISR address 12 | * - Configure the clock system 13 | * - Branches to main in the C library (which eventually 14 | * calls main()). 15 | * After Reset the Cortex-M3 processor is in Thread mode, 16 | * priority is Privileged, and the Stack is set to Main. 17 | ****************************************************************************** 18 | * 19 | *

© COPYRIGHT(c) 2017 STMicroelectronics

20 | * 21 | * Redistribution and use in source and binary forms, with or without modification, 22 | * are permitted provided that the following conditions are met: 23 | * 1. Redistributions of source code must retain the above copyright notice, 24 | * this list of conditions and the following disclaimer. 25 | * 2. Redistributions in binary form must reproduce the above copyright notice, 26 | * this list of conditions and the following disclaimer in the documentation 27 | * and/or other materials provided with the distribution. 28 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 29 | * may be used to endorse or promote products derived from this software 30 | * without specific prior written permission. 31 | * 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 33 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 35 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 36 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 38 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 39 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 40 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 41 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 | * 43 | ****************************************************************************** 44 | */ 45 | 46 | .syntax unified 47 | .cpu cortex-m3 48 | .fpu softvfp 49 | .thumb 50 | 51 | .global g_pfnVectors 52 | .global Default_Handler 53 | 54 | /* start address for the initialization values of the .data section. 55 | defined in linker script */ 56 | .word _sidata 57 | /* start address for the .data section. defined in linker script */ 58 | .word _sdata 59 | /* end address for the .data section. defined in linker script */ 60 | .word _edata 61 | /* start address for the .bss section. defined in linker script */ 62 | .word _sbss 63 | /* end address for the .bss section. defined in linker script */ 64 | .word _ebss 65 | 66 | .equ BootRAM, 0xF108F85F 67 | /** 68 | * @brief This is the code that gets called when the processor first 69 | * starts execution following a reset event. Only the absolutely 70 | * necessary set is performed, after which the application 71 | * supplied main() routine is called. 72 | * @param None 73 | * @retval : None 74 | */ 75 | 76 | .section .text.Reset_Handler 77 | .weak Reset_Handler 78 | .type Reset_Handler, %function 79 | Reset_Handler: 80 | 81 | /* Copy the data segment initializers from flash to SRAM */ 82 | movs r1, #0 83 | b LoopCopyDataInit 84 | 85 | CopyDataInit: 86 | ldr r3, =_sidata 87 | ldr r3, [r3, r1] 88 | str r3, [r0, r1] 89 | adds r1, r1, #4 90 | 91 | LoopCopyDataInit: 92 | ldr r0, =_sdata 93 | ldr r3, =_edata 94 | adds r2, r0, r1 95 | cmp r2, r3 96 | bcc CopyDataInit 97 | ldr r2, =_sbss 98 | b LoopFillZerobss 99 | /* Zero fill the bss segment. */ 100 | FillZerobss: 101 | movs r3, #0 102 | str r3, [r2], #4 103 | 104 | LoopFillZerobss: 105 | ldr r3, = _ebss 106 | cmp r2, r3 107 | bcc FillZerobss 108 | 109 | /* Call the clock system intitialization function.*/ 110 | bl SystemInit 111 | /* Call static constructors */ 112 | bl __libc_init_array 113 | /* Call the application's entry point.*/ 114 | bl main 115 | bx lr 116 | .size Reset_Handler, .-Reset_Handler 117 | 118 | /** 119 | * @brief This is the code that gets called when the processor receives an 120 | * unexpected interrupt. This simply enters an infinite loop, preserving 121 | * the system state for examination by a debugger. 122 | * 123 | * @param None 124 | * @retval : None 125 | */ 126 | .section .text.Default_Handler,"ax",%progbits 127 | Default_Handler: 128 | Infinite_Loop: 129 | b Infinite_Loop 130 | .size Default_Handler, .-Default_Handler 131 | /****************************************************************************** 132 | * 133 | * The minimal vector table for a Cortex M3. Note that the proper constructs 134 | * must be placed on this to ensure that it ends up at physical address 135 | * 0x0000.0000. 136 | * 137 | ******************************************************************************/ 138 | .section .isr_vector,"a",%progbits 139 | .type g_pfnVectors, %object 140 | .size g_pfnVectors, .-g_pfnVectors 141 | 142 | 143 | g_pfnVectors: 144 | .word _estack 145 | .word Reset_Handler 146 | .word NMI_Handler 147 | .word HardFault_Handler 148 | .word MemManage_Handler 149 | .word BusFault_Handler 150 | .word UsageFault_Handler 151 | .word 0 152 | .word 0 153 | .word 0 154 | .word 0 155 | .word SVC_Handler 156 | .word DebugMon_Handler 157 | .word 0 158 | .word PendSV_Handler 159 | .word SysTick_Handler 160 | .word WWDG_IRQHandler 161 | .word PVD_IRQHandler 162 | .word TAMPER_IRQHandler 163 | .word RTC_IRQHandler 164 | .word FLASH_IRQHandler 165 | .word RCC_IRQHandler 166 | .word EXTI0_IRQHandler 167 | .word EXTI1_IRQHandler 168 | .word EXTI2_IRQHandler 169 | .word EXTI3_IRQHandler 170 | .word EXTI4_IRQHandler 171 | .word DMA1_Channel1_IRQHandler 172 | .word DMA1_Channel2_IRQHandler 173 | .word DMA1_Channel3_IRQHandler 174 | .word DMA1_Channel4_IRQHandler 175 | .word DMA1_Channel5_IRQHandler 176 | .word DMA1_Channel6_IRQHandler 177 | .word DMA1_Channel7_IRQHandler 178 | .word ADC1_IRQHandler 179 | .word 0 180 | .word 0 181 | .word 0 182 | .word 0 183 | .word EXTI9_5_IRQHandler 184 | .word TIM1_BRK_TIM15_IRQHandler 185 | .word TIM1_UP_TIM16_IRQHandler 186 | .word TIM1_TRG_COM_TIM17_IRQHandler 187 | .word TIM1_CC_IRQHandler 188 | .word TIM2_IRQHandler 189 | .word TIM3_IRQHandler 190 | .word TIM4_IRQHandler 191 | .word I2C1_EV_IRQHandler 192 | .word I2C1_ER_IRQHandler 193 | .word I2C2_EV_IRQHandler 194 | .word I2C2_ER_IRQHandler 195 | .word SPI1_IRQHandler 196 | .word SPI2_IRQHandler 197 | .word USART1_IRQHandler 198 | .word USART2_IRQHandler 199 | .word USART3_IRQHandler 200 | .word EXTI15_10_IRQHandler 201 | .word RTC_Alarm_IRQHandler 202 | .word CEC_IRQHandler 203 | .word 0 204 | .word 0 205 | .word 0 206 | .word 0 207 | .word 0 208 | .word 0 209 | .word 0 210 | .word 0 211 | .word 0 212 | .word 0 213 | .word 0 214 | .word TIM6_DAC_IRQHandler 215 | .word TIM7_IRQHandler 216 | .word 0 217 | .word 0 218 | .word 0 219 | .word 0 220 | .word 0 221 | .word 0 222 | .word 0 223 | .word 0 224 | .word 0 225 | .word 0 226 | .word 0 227 | .word 0 228 | .word 0 229 | .word 0 230 | .word 0 231 | .word 0 232 | .word 0 233 | .word 0 234 | .word 0 235 | .word 0 236 | .word 0 237 | .word 0 238 | .word 0 239 | .word 0 240 | .word 0 241 | .word 0 242 | .word 0 243 | .word 0 244 | .word 0 245 | .word 0 246 | .word 0 247 | .word 0 248 | .word 0 249 | .word 0 250 | .word 0 251 | .word 0 252 | .word 0 253 | .word 0 254 | .word 0 255 | .word 0 256 | .word 0 257 | .word 0 258 | .word 0 259 | .word BootRAM /* @0x01CC. This is for boot in RAM mode for 260 | STM32F10xB Value Line devices. */ 261 | 262 | /******************************************************************************* 263 | * 264 | * Provide weak aliases for each Exception handler to the Default_Handler. 265 | * As they are weak aliases, any function with the same name will override 266 | * this definition. 267 | * 268 | *******************************************************************************/ 269 | 270 | 271 | .weak NMI_Handler 272 | .thumb_set NMI_Handler,Default_Handler 273 | 274 | .weak HardFault_Handler 275 | .thumb_set HardFault_Handler,Default_Handler 276 | 277 | .weak MemManage_Handler 278 | .thumb_set MemManage_Handler,Default_Handler 279 | 280 | .weak BusFault_Handler 281 | .thumb_set BusFault_Handler,Default_Handler 282 | 283 | .weak UsageFault_Handler 284 | .thumb_set UsageFault_Handler,Default_Handler 285 | 286 | .weak SVC_Handler 287 | .thumb_set SVC_Handler,Default_Handler 288 | 289 | .weak DebugMon_Handler 290 | .thumb_set DebugMon_Handler,Default_Handler 291 | 292 | .weak PendSV_Handler 293 | .thumb_set PendSV_Handler,Default_Handler 294 | 295 | .weak SysTick_Handler 296 | .thumb_set SysTick_Handler,Default_Handler 297 | 298 | .weak WWDG_IRQHandler 299 | .thumb_set WWDG_IRQHandler,Default_Handler 300 | 301 | .weak PVD_IRQHandler 302 | .thumb_set PVD_IRQHandler,Default_Handler 303 | 304 | .weak TAMPER_IRQHandler 305 | .thumb_set TAMPER_IRQHandler,Default_Handler 306 | 307 | .weak RTC_IRQHandler 308 | .thumb_set RTC_IRQHandler,Default_Handler 309 | 310 | .weak FLASH_IRQHandler 311 | .thumb_set FLASH_IRQHandler,Default_Handler 312 | 313 | .weak RCC_IRQHandler 314 | .thumb_set RCC_IRQHandler,Default_Handler 315 | 316 | .weak EXTI0_IRQHandler 317 | .thumb_set EXTI0_IRQHandler,Default_Handler 318 | 319 | .weak EXTI1_IRQHandler 320 | .thumb_set EXTI1_IRQHandler,Default_Handler 321 | 322 | .weak EXTI2_IRQHandler 323 | .thumb_set EXTI2_IRQHandler,Default_Handler 324 | 325 | .weak EXTI3_IRQHandler 326 | .thumb_set EXTI3_IRQHandler,Default_Handler 327 | 328 | .weak EXTI4_IRQHandler 329 | .thumb_set EXTI4_IRQHandler,Default_Handler 330 | 331 | .weak DMA1_Channel1_IRQHandler 332 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 333 | 334 | .weak DMA1_Channel2_IRQHandler 335 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler 336 | 337 | .weak DMA1_Channel3_IRQHandler 338 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler 339 | 340 | .weak DMA1_Channel4_IRQHandler 341 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler 342 | 343 | .weak DMA1_Channel5_IRQHandler 344 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler 345 | 346 | .weak DMA1_Channel6_IRQHandler 347 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler 348 | 349 | .weak DMA1_Channel7_IRQHandler 350 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler 351 | 352 | .weak ADC1_IRQHandler 353 | .thumb_set ADC1_IRQHandler,Default_Handler 354 | 355 | .weak EXTI9_5_IRQHandler 356 | .thumb_set EXTI9_5_IRQHandler,Default_Handler 357 | 358 | .weak TIM1_BRK_TIM15_IRQHandler 359 | .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler 360 | 361 | .weak TIM1_UP_TIM16_IRQHandler 362 | .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler 363 | 364 | .weak TIM1_TRG_COM_TIM17_IRQHandler 365 | .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler 366 | 367 | .weak TIM1_CC_IRQHandler 368 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 369 | 370 | .weak TIM2_IRQHandler 371 | .thumb_set TIM2_IRQHandler,Default_Handler 372 | 373 | .weak TIM3_IRQHandler 374 | .thumb_set TIM3_IRQHandler,Default_Handler 375 | 376 | .weak TIM4_IRQHandler 377 | .thumb_set TIM4_IRQHandler,Default_Handler 378 | 379 | .weak I2C1_EV_IRQHandler 380 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 381 | 382 | .weak I2C1_ER_IRQHandler 383 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 384 | 385 | .weak I2C2_EV_IRQHandler 386 | .thumb_set I2C1_EV_IRQHandler,Default_Handler 387 | 388 | .weak I2C2_ER_IRQHandler 389 | .thumb_set I2C1_ER_IRQHandler,Default_Handler 390 | 391 | .weak SPI1_IRQHandler 392 | .thumb_set SPI1_IRQHandler,Default_Handler 393 | 394 | .weak SPI1_IRQHandler 395 | .thumb_set SPI2_IRQHandler,Default_Handler 396 | 397 | .weak USART1_IRQHandler 398 | .thumb_set USART1_IRQHandler,Default_Handler 399 | 400 | .weak USART2_IRQHandler 401 | .thumb_set USART2_IRQHandler,Default_Handler 402 | 403 | .weak USART3_IRQHandler 404 | .thumb_set USART3_IRQHandler,Default_Handler 405 | 406 | .weak EXTI15_10_IRQHandler 407 | .thumb_set EXTI15_10_IRQHandler,Default_Handler 408 | 409 | .weak RTC_Alarm_IRQHandler 410 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler 411 | 412 | .weak CEC_IRQHandler 413 | .thumb_set CEC_IRQHandler,Default_Handler 414 | 415 | .weak TIM6_DAC_IRQHandler 416 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler 417 | 418 | .weak TIM7_IRQHandler 419 | .thumb_set TIM7_IRQHandler,Default_Handler 420 | 421 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 422 | 423 | --------------------------------------------------------------------------------