├── board ├── emsk │ ├── emsk_hardware.h │ ├── configs │ │ ├── 11 │ │ │ └── ld │ │ │ │ ├── linker_mw.ld │ │ │ │ └── linker_gnu.ld │ │ ├── 22 │ │ │ └── ld │ │ │ │ ├── linker_mw.ld │ │ │ │ └── linker_gnu.ld │ │ └── 23 │ │ │ └── ld │ │ │ ├── linker_mw.ld │ │ │ └── linker_gnu.ld │ ├── common │ │ ├── emsk_timer.h │ │ ├── mux_hal.h │ │ ├── mux.c │ │ ├── emsk_init.c │ │ ├── emsk_timer.c │ │ └── mux.h │ ├── iic │ │ └── dw_iic_obj.h │ ├── spi │ │ └── dw_spi_obj.h │ ├── uart │ │ ├── dw_uart_obj.h │ │ └── dw_uart_obj.c │ ├── gpio │ │ ├── dw_gpio_obj.h │ │ ├── emsk_gpio.h │ │ └── emsk_gpio.c │ └── emsk.h ├── board.c └── board.h ├── doc └── documents │ └── pic │ └── embarc_bsp_arch.jpg ├── example └── hello │ ├── mwdt │ ├── .gitignore │ ├── .project │ ├── embARC_BSP_config.h │ └── Makefile │ ├── arcgnu │ ├── .gitignore │ ├── .project │ ├── embARC_BSP_config.h │ └── Makefile │ └── main.c ├── .travis ├── before_install.sh └── script.sh ├── .gitignore ├── .travis.yml ├── common ├── xprintf.h ├── console_io.h └── console_io.c ├── README.md ├── device ├── designware │ ├── spi │ │ ├── dw_spi_hal_cfg.h │ │ ├── dw_spi_hal.h │ │ └── dw_spi.h │ ├── iic │ │ ├── dw_iic_hal_cfg.h │ │ └── dw_iic_hal.h │ ├── gpio │ │ └── dw_gpio.h │ └── uart │ │ ├── dw_uart.h │ │ └── dw_uart_hal.h └── device_hal │ └── inc │ └── dev_common.h ├── inc ├── embARC_debug.h ├── arc │ ├── arc_timer.h │ └── arc_em.h ├── embARC_toolchain.h └── embARC_error.h └── arc ├── startup ├── arc_cxx_support.c └── arc_startup.S ├── arc_exc_asm.S └── arc_timer.c /board/emsk/emsk_hardware.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/foss-for-synopsys-dwc-arc-processors/embarc_emsk_bsp/HEAD/board/emsk/emsk_hardware.h -------------------------------------------------------------------------------- /doc/documents/pic/embarc_bsp_arch.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/foss-for-synopsys-dwc-arc-processors/embarc_emsk_bsp/HEAD/doc/documents/pic/embarc_bsp_arch.jpg -------------------------------------------------------------------------------- /example/hello/mwdt/.gitignore: -------------------------------------------------------------------------------- 1 | /build_arcem/ 2 | /Debug/ 3 | /BUILD_*/ 4 | *.o 5 | *.elf 6 | *.map 7 | *.d 8 | *.log 9 | .settings 10 | *.ld 11 | *.tcf 12 | arc_core_config.h 13 | gcc.arg 14 | ccac.arg -------------------------------------------------------------------------------- /example/hello/arcgnu/.gitignore: -------------------------------------------------------------------------------- 1 | /build_arcem/ 2 | /Debug/ 3 | /BUILD_*/ 4 | *.o 5 | *.elf 6 | *.map 7 | *.d 8 | *.log 9 | .settings 10 | *.ld 11 | *.tcf 12 | arc_core_config.h 13 | gcc.arg 14 | ccac.arg -------------------------------------------------------------------------------- /.travis/before_install.sh: -------------------------------------------------------------------------------- 1 | die() { 2 | 3 | echo " *** ERROR: " $* 4 | 5 | exit 1 6 | 7 | } 8 | #set -x 9 | 10 | [ $TRAVIS_OS_NAME != linux ] || { 11 | if [ "$STATUS" != "" ] && [ "$NAME" != "" ] ; then 12 | bash -c "$STATUS" pending "Local $NAME testing is in progress" || \ 13 | die "Not able to post status to github, did you set EMBARC_BOT variable in travis ci setting page" 14 | fi 15 | 16 | sudo apt-get update || die 17 | sudo apt-get install lib32z1 || die 18 | sudo apt-get install dos2unix || die 19 | pip install --upgrade pip || die 20 | pip install PrettyTable || die 21 | pip install colorama || die 22 | pip install configparser || die 23 | } 24 | -------------------------------------------------------------------------------- /.travis/script.sh: -------------------------------------------------------------------------------- 1 | die() { 2 | echo " *** ERROR: " $* 3 | exit 1 4 | 5 | } 6 | set -x 7 | 8 | [ "$TRAVIS_OS_NAME" != "linux" ] || { 9 | 10 | U_NAME=${U_NAME:=embARC_Bot} 11 | U_EMAIL=${U_EMAIL:=info@embARC.org} 12 | git config --global user.name "${U_NAME}" 13 | git config --global user.email "${U_EMAIL}" 14 | 15 | export PATH=/tmp/arc_gnu_${GNU_VER}_prebuilt_elf32_le_linux_install/bin:$PATH || die 16 | git checkout -- . || die 17 | cd .travis || die 18 | { 19 | BUILD_OPTS="BSP_ROOT=${BSP_ROOT} TOOLCHAIN=${TOOLCHAIN} BOARD=${BOARD} BD_VER=${BD_VER} CUR_CORE=${CUR_CORE} GNU_VER=${GNU_VER} EXAMPLES=${EXAMPLES}" 20 | 21 | python build.py ${BUILD_OPTS} || die 22 | } 23 | 24 | } 25 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Object files 2 | *.o 3 | *.ko 4 | *.obj 5 | *.elf 6 | *.bin 7 | *.hex 8 | *.dasm 9 | 10 | # Libraries 11 | *.lib 12 | *.a 13 | 14 | # Shared objects (inc. Windows DLLs) 15 | *.dll 16 | *.so 17 | *.so.* 18 | *.dylib 19 | 20 | # Executables 21 | *.exe 22 | *.out 23 | *.app 24 | *.i*86 25 | *.x86_64 26 | *.hex 27 | *.pyc 28 | 29 | # Map file 30 | *.map 31 | 32 | # vim swap file 33 | *.swp 34 | 35 | # dependency file 36 | *.o.d 37 | 38 | # TAGS 39 | *.tags* 40 | *TAGS* 41 | *tags* 42 | 43 | # logs 44 | *.log 45 | 46 | # generated link file 47 | *.ldf 48 | *.mkdir_done 49 | 50 | # metaware debugger temp files 51 | **/.sc.project 52 | 53 | # ide project temporary files 54 | **/.metadata 55 | **/.settings 56 | 57 | # TCF generated files 58 | arc_core_config.h 59 | ccac.arg 60 | gcc.arg 61 | -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | language: python 2 | python: 2.7 3 | 4 | sudo: required 5 | dist: trusty 6 | 7 | env: 8 | global: 9 | - > 10 | STATUS=$'curl -so/dev/null --user "$EMBARC_BOT" --request POST 11 | https://api.github.com/repos/$TRAVIS_REPO_SLUG/statuses/${TRAVIS_PULL_REQUEST_SHA:-$TRAVIS_COMMIT} 12 | --data @- << DATA\n{ 13 | "state": "$0", 14 | "description": "$1", 15 | "context": "travis-ci/$NAME", 16 | "target_url": "https://travis-ci.org/$TRAVIS_REPO_SLUG/jobs/$TRAVIS_JOB_ID" 17 | }\nDATA' 18 | - EXPECTED=".travis/expected.ini" 19 | 20 | cache: 21 | pip: true 22 | directories: 23 | - $HOME/.cache/result 24 | - $HOME/.cache/toolchain 25 | 26 | before_install: 27 | - bash .travis/before_install.sh 28 | 29 | after_success: 30 | - bash -c "$STATUS" success "Local $NAME testing has passed" 31 | 32 | after_failure: 33 | - bash -c "$STATUS" failure "Local $NAME testing has failed" 34 | 35 | script: 36 | - bash .travis/script.sh 37 | 38 | matrix: 39 | include: 40 | - env: NAME="gnu-201709" BSP_ROOT="." TOOLCHAIN="gnu" GNU_VER="2017.09" EXAMPLES="example/hello/arcgnu" 41 | os: linux 42 | compiler: gcc 43 | - env: NAME="gnu-201803" BSP_ROOT="." TOOLCHAIN="gnu" GNU_VER="2018.03" EXAMPLES="example/hello/arcgnu" 44 | os: linux 45 | compiler: gcc 46 | -------------------------------------------------------------------------------- /board/emsk/configs/11/ld/linker_mw.ld: -------------------------------------------------------------------------------- 1 | MEMORY { 2 | ICCM : ORIGIN = 0x00000000, LENGTH = 0x20000 3 | DCCM : ORIGIN = 0x80000000, LENGTH = 0x10000 4 | EXT_RAM : ORIGIN = 0x10000000, LENGTH = 0x8000000 5 | } 6 | 7 | ENTRY(_start) 8 | 9 | SECTIONS { 10 | 11 | GROUP : { 12 | .init_bootstrap:{ 13 | *(.init_vector) 14 | *(.init_bootstrap) 15 | } 16 | .vector ALIGN(1024): { 17 | _f_vector = .; 18 | *(.vector) 19 | _e_vector = .; 20 | } 21 | } > ICCM 22 | 23 | GROUP : { 24 | 25 | .text ALIGN(4): { 26 | _f_text = .; 27 | *(TYPE text) 28 | _e_text = .; 29 | } 30 | 31 | .rodata ALIGN(4): { 32 | _f_rodata = .; 33 | 34 | _fctors = .; 35 | *(.ctors*) 36 | _ectors = .; 37 | _fdtors = .; 38 | *(.dtors*) 39 | _edtors = .; 40 | _feh_frame = .; 41 | *(.eh_frame*) 42 | _eeh_frame = .; 43 | 44 | *(TYPE lit) 45 | 46 | _e_rodata = .; 47 | } 48 | 49 | } > ICCM 50 | 51 | 52 | GROUP : { 53 | .data ALIGN(8): { 54 | _f_data = .; 55 | _f_sdata = .; 56 | *(.sdata) 57 | _e_sdata = .; 58 | *(TYPE data) 59 | } 60 | .tls ALIGN(8): { 61 | *(.tls*) 62 | _e_data = .; 63 | } 64 | } > DCCM AT > ICCM 65 | 66 | GROUP (NOLOAD) : { 67 | .bss ALIGN(8): { 68 | _f_bss = .; 69 | *(TYPE bss) 70 | _e_bss = .; 71 | } 72 | .stack ALIGN(4) SIZE(8192): {} 73 | .heap? ALIGN(4) SIZE(8192): {} 74 | } > DCCM 75 | 76 | _f_stack = ADDR(.stack); 77 | _e_stack = ADDR(.stack) + SIZEOF(.stack); 78 | _f_heap = ADDR(.heap); 79 | _e_heap = ADDR(.heap) + SIZEOF(.heap); 80 | 81 | _load_addr_text = LOADADDR(.text); 82 | _load_addr_rodata = LOADADDR(.rodata); 83 | _load_addr_data = LOADADDR(.data); 84 | } 85 | -------------------------------------------------------------------------------- /board/emsk/configs/22/ld/linker_mw.ld: -------------------------------------------------------------------------------- 1 | MEMORY { 2 | ICCM : ORIGIN = 0x00000000, LENGTH = 0x40000 3 | DCCM : ORIGIN = 0x80000000, LENGTH = 0x20000 4 | EXT_RAM : ORIGIN = 0x10000000, LENGTH = 0x8000000 5 | } 6 | 7 | ENTRY(_start) 8 | 9 | SECTIONS { 10 | 11 | GROUP : { 12 | .init_bootstrap:{ 13 | *(.init_vector) 14 | *(.init_bootstrap) 15 | } 16 | .vector ALIGN(1024): { 17 | _f_vector = .; 18 | *(.vector) 19 | _e_vector = .; 20 | } 21 | } > EXT_RAM 22 | 23 | GROUP : { 24 | 25 | .text ALIGN(4): { 26 | _f_text = .; 27 | *(TYPE text) 28 | _e_text = .; 29 | } 30 | 31 | .rodata ALIGN(4): { 32 | _f_rodata = .; 33 | 34 | _fctors = .; 35 | *(.ctors*) 36 | _ectors = .; 37 | _fdtors = .; 38 | *(.dtors*) 39 | _edtors = .; 40 | _feh_frame = .; 41 | *(.eh_frame*) 42 | _eeh_frame = .; 43 | 44 | *(TYPE lit) 45 | 46 | _e_rodata = .; 47 | } 48 | 49 | } > EXT_RAM 50 | 51 | 52 | GROUP : { 53 | .data ALIGN(8): { 54 | _f_data = .; 55 | _f_sdata = .; 56 | *(.sdata) 57 | _e_sdata = .; 58 | *(TYPE data) 59 | } 60 | .tls ALIGN(8): { 61 | *(.tls*) 62 | _e_data = .; 63 | } 64 | } > EXT_RAM AT > EXT_RAM 65 | 66 | GROUP (NOLOAD) : { 67 | .bss ALIGN(8): { 68 | _f_bss = .; 69 | *(TYPE bss) 70 | _e_bss = .; 71 | } 72 | .stack ALIGN(4) SIZE(8192): {} 73 | .heap? ALIGN(4) SIZE(8192): {} 74 | } > EXT_RAM 75 | 76 | _f_stack = ADDR(.stack); 77 | _e_stack = ADDR(.stack) + SIZEOF(.stack); 78 | _f_heap = ADDR(.heap); 79 | _e_heap = ADDR(.heap) + SIZEOF(.heap); 80 | 81 | _load_addr_text = LOADADDR(.text); 82 | _load_addr_rodata = LOADADDR(.rodata); 83 | _load_addr_data = LOADADDR(.data); 84 | } 85 | -------------------------------------------------------------------------------- /board/emsk/configs/23/ld/linker_mw.ld: -------------------------------------------------------------------------------- 1 | MEMORY { 2 | ICCM : ORIGIN = 0x00000000, LENGTH = 0x40000 3 | DCCM : ORIGIN = 0x80000000, LENGTH = 0x20000 4 | EXT_RAM : ORIGIN = 0x10000000, LENGTH = 0x8000000 5 | } 6 | 7 | ENTRY(_start) 8 | 9 | SECTIONS { 10 | 11 | GROUP : { 12 | .init_bootstrap:{ 13 | *(.init_vector) 14 | *(.init_bootstrap) 15 | } 16 | .vector ALIGN(1024): { 17 | _f_vector = .; 18 | *(.vector) 19 | _e_vector = .; 20 | } 21 | } > EXT_RAM 22 | 23 | GROUP : { 24 | 25 | .text ALIGN(4): { 26 | _f_text = .; 27 | *(TYPE text) 28 | _e_text = .; 29 | } 30 | 31 | .rodata ALIGN(4): { 32 | _f_rodata = .; 33 | 34 | _fctors = .; 35 | *(.ctors*) 36 | _ectors = .; 37 | _fdtors = .; 38 | *(.dtors*) 39 | _edtors = .; 40 | _feh_frame = .; 41 | *(.eh_frame*) 42 | _eeh_frame = .; 43 | 44 | *(TYPE lit) 45 | 46 | _e_rodata = .; 47 | } 48 | 49 | } > EXT_RAM 50 | 51 | 52 | GROUP : { 53 | .data ALIGN(8): { 54 | _f_data = .; 55 | _f_sdata = .; 56 | *(.sdata) 57 | _e_sdata = .; 58 | *(TYPE data) 59 | } 60 | .tls ALIGN(8): { 61 | *(.tls*) 62 | _e_data = .; 63 | } 64 | } > EXT_RAM AT > EXT_RAM 65 | 66 | GROUP (NOLOAD) : { 67 | .bss ALIGN(8): { 68 | _f_bss = .; 69 | *(TYPE bss) 70 | _e_bss = .; 71 | } 72 | .stack ALIGN(4) SIZE(8192): {} 73 | .heap? ALIGN(4) SIZE(8192): {} 74 | } > EXT_RAM 75 | 76 | _f_stack = ADDR(.stack); 77 | _e_stack = ADDR(.stack) + SIZEOF(.stack); 78 | _f_heap = ADDR(.heap); 79 | _e_heap = ADDR(.heap) + SIZEOF(.heap); 80 | 81 | _load_addr_text = LOADADDR(.text); 82 | _load_addr_rodata = LOADADDR(.rodata); 83 | _load_addr_data = LOADADDR(.data); 84 | } 85 | -------------------------------------------------------------------------------- /common/xprintf.h: -------------------------------------------------------------------------------- 1 | /*------------------------------------------------------------------------*/ 2 | /* Universal string handler for user console interface (C)ChaN, 2011 */ 3 | /*------------------------------------------------------------------------*/ 4 | 5 | #ifndef _STRFUNC 6 | #define _STRFUNC 7 | 8 | #include 9 | 10 | #ifdef __cplusplus 11 | extern "C" { 12 | #endif 13 | 14 | #define _USE_XFUNC_OUT 1 /* 1: Use output functions */ 15 | #define _CR_CRLF 1 /* 1: Convert \n ==> \r\n in the output char */ 16 | 17 | #define _USE_XFUNC_IN 1 /* 1: Use input function */ 18 | #define _LINE_ECHO 1 /* 1: Echo back input chars in xgets function */ 19 | 20 | #if _USE_XFUNC_OUT 21 | #define xdev_out(func) xfunc_out = (void(*)(unsigned char))(func) 22 | extern void (*xfunc_out)(unsigned char); 23 | extern void xputc (char c); 24 | extern void xputs (const char* str); 25 | extern void xfputs (void (*func)(unsigned char), const char* str); 26 | extern void xvprintf (const char* fmt, va_list arp); 27 | extern void xprintf (const char* fmt, ...); 28 | extern void xsprintf (char* buff, const char* fmt, ...); 29 | extern void xfprintf (void (*func)(unsigned char), const char* fmt, ...); 30 | extern void put_dump (const void* buff, unsigned long addr, int len, int width); 31 | #define DW_CHAR sizeof(char) 32 | #define DW_SHORT sizeof(short) 33 | #define DW_LONG sizeof(long) 34 | #endif 35 | 36 | #if _USE_XFUNC_IN 37 | #define xdev_in(func) xfunc_in = (unsigned char(*)(void))(func) 38 | extern unsigned char (*xfunc_in)(void); 39 | extern int xgets (char* buff, int len); 40 | extern int xfgets (unsigned char (*func)(void), char* buff, int len); 41 | extern int xatoi (char** str, long* res); 42 | #endif 43 | 44 | #ifdef __cplusplus 45 | } 46 | #endif 47 | 48 | #endif 49 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # embARC BSP for EMSK 2 | [![Build Status](https://travis-ci.org/foss-for-synopsys-dwc-arc-processors/embarc_emsk_bsp.svg?branch=master)](https://travis-ci.org/foss-for-synopsys-dwc-arc-processors/embarc_emsk_bsp) 3 | 4 | ## Introduction 5 | The embARC Board support Package (BSP) for DesignWare® ARC® EM Starter Kit (EMSK) is a software distribution aimed at facilitating the development and evaluation of embedded systems based on ARCv2 processors. 6 | 7 | It is designed to provide a board support package for ARC EMSK users by defining consistent and simple software interfaces to the processors and onboard devices. 8 | 9 | ## embARC BSP Features 10 | The embARC BSP architecture is shown in the block diagram below. 11 | 12 | ![embARC BSP Architecture](doc/documents/pic/embarc_bsp_arch.jpg) 13 | 14 | embARC BSP provides ARC Hardware Abstraction Layer (HAL), device HAL and driver implementation for UART, I2C, GPIO and SPI. A group of driver implementations for DesignWare IP are provided in embARC BSP for EMSK. 15 | 16 | Choose [Premium MetaWare Development Toolkit (2017.09)](http://www.synopsys.com/dw/ipdir.php?ds=sw_metaware) and [Open Source ARC GNU IDE(2017.09)](https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases) according to your requirement. 17 | 18 | ### embARC BSP & embARC OSP 19 | 20 | embARC BSP code is originated from [embARC OSP](https://github.com/foss-for-synopsys-dwc-arc-processors/embarc_osp). The code are reorganized with the same ARC HAL, device HAL and driver implementations for DesignWare IP peripherals. The operating system layer, common library layer, middleware layer and applications are not included in embARC BSP. The code in embARC BSP is independent with build system. It can be ported to various build system easily. The lightweight makefile and Eclipse IDE are both supported in embARC BSP as reference. 21 | 22 | ## Get Started with embARC BSP 23 | * Please go to [embARC BSP Wiki](https://github.com/foss-for-synopsys-dwc-arc-processors/embarc_emsk_bsp/wiki) for details. 24 | -------------------------------------------------------------------------------- /example/hello/arcgnu/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | bsp_hello 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | 26 | 27 | 28 | embarc_bsp 29 | 2 30 | virtual:/virtual 31 | 32 | 33 | src 34 | 2 35 | virtual:/virtual 36 | 37 | 38 | embarc_bsp/arc 39 | 2 40 | PARENT-3-PROJECT_LOC/arc 41 | 42 | 43 | embarc_bsp/board 44 | 2 45 | PARENT-3-PROJECT_LOC/board 46 | 47 | 48 | embarc_bsp/common 49 | 2 50 | PARENT-3-PROJECT_LOC/common 51 | 52 | 53 | embarc_bsp/device 54 | 2 55 | PARENT-3-PROJECT_LOC/device 56 | 57 | 58 | embarc_bsp/inc 59 | 2 60 | PARENT-3-PROJECT_LOC/inc 61 | 62 | 63 | src/main.c 64 | 1 65 | PARENT-1-PROJECT_LOC/main.c 66 | 67 | 68 | 69 | -------------------------------------------------------------------------------- /example/hello/mwdt/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | bsp_hello 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | org.eclipse.cdt.core.cnature 23 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 24 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 25 | 26 | 27 | 28 | embarc_bsp 29 | 2 30 | virtual:/virtual 31 | 32 | 33 | src 34 | 2 35 | virtual:/virtual 36 | 37 | 38 | embarc_bsp/arc 39 | 2 40 | PARENT-3-PROJECT_LOC/arc 41 | 42 | 43 | embarc_bsp/board 44 | 2 45 | PARENT-3-PROJECT_LOC/board 46 | 47 | 48 | embarc_bsp/common 49 | 2 50 | PARENT-3-PROJECT_LOC/common 51 | 52 | 53 | embarc_bsp/device 54 | 2 55 | PARENT-3-PROJECT_LOC/device 56 | 57 | 58 | embarc_bsp/inc 59 | 2 60 | PARENT-3-PROJECT_LOC/inc 61 | 62 | 63 | src/main.c 64 | 1 65 | PARENT-1-PROJECT_LOC/main.c 66 | 67 | 68 | 69 | -------------------------------------------------------------------------------- /board/emsk/configs/11/ld/linker_gnu.ld: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | ICCM : ORIGIN = 0x00000000, LENGTH = 0x20000 4 | DCCM : ORIGIN = 0x80000000, LENGTH = 0x10000 5 | EXT_RAM : ORIGIN = 0x10000000, LENGTH = 0x8000000 6 | } 7 | ENTRY(_start) 8 | SECTIONS 9 | { 10 | .init : 11 | { 12 | _f_init = .; 13 | KEEP (*(.init_vector)) 14 | KEEP (*(.init_bootstrap)) 15 | _e_init = .; 16 | } > ICCM 17 | .vector : ALIGN(1024) 18 | { 19 | _f_vector = .; 20 | *(.vector) 21 | _e_vector = .; 22 | } > ICCM 23 | .text : ALIGN(4) 24 | { 25 | _f_text = .; 26 | *(.text .text.* .gnu.linkonce.t.*) 27 | _e_text = .; 28 | } > ICCM 29 | .rodata : ALIGN(4) 30 | { 31 | _f_rodata = .; 32 | . = ALIGN(4); 33 | __CTOR_LIST__ = .; 34 | LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) 35 | KEEP(*(SORT_BY_NAME(".ctors*"))) 36 | LONG(0) 37 | __CTOR_END__ = .; 38 | . = ALIGN(4); 39 | __init_array_start = .; 40 | KEEP(*(SORT_BY_NAME(".init_array*"))) 41 | __init_array_end = .; 42 | . = ALIGN(4); 43 | __DTOR_LIST__ = .; 44 | LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) 45 | KEEP(*(SORT_BY_NAME(".dtors*"))) 46 | LONG(0) 47 | __DTOR_END__ = .; 48 | *(.rodata .rodata.* .gnu.linkonce.r.*) 49 | _e_rodata = .; 50 | } > ICCM 51 | .data : ALIGN(4) 52 | { 53 | _f_data = .; 54 | *(.data .data.* .gnu.linkonce.d.*) 55 | _f_sdata = .; 56 | __SDATA_BEGIN__ = .; 57 | *(.sdata .sdata.* .gnu.linkonce.s.*) 58 | _e_sdata = .; 59 | _e_data = .; 60 | } > DCCM AT > ICCM 61 | .bss (NOLOAD) : ALIGN(8) 62 | { 63 | PROVIDE (__sbss_start = .); 64 | PROVIDE (___sbss_start = .); 65 | _f_bss = .; 66 | _f_sbss = .; 67 | *(.dynsbss) 68 | *(.sbss .sbss.* .gnu.linkonce.sb.*) 69 | *(.scommon) 70 | _e_sbss = .; 71 | PROVIDE (__sbss_end = .); 72 | PROVIDE (___sbss_end = .); 73 | *(.dynbss) 74 | *(.bss .bss.* .gnu.linkonce.b.*) 75 | *(COMMON) 76 | _e_bss = .; 77 | } > DCCM 78 | .stack (NOLOAD) : 79 | { 80 | . = ALIGN(4); 81 | _f_stack = .; 82 | . = . + 8192; 83 | _e_stack = .; 84 | } > DCCM 85 | .heap (NOLOAD) : 86 | { 87 | . = ALIGN(4); 88 | __start_heap = . ; 89 | _f_heap = .; 90 | . = . + 8192; 91 | _e_heap = .; 92 | __end_heap = . ; 93 | } > DCCM 94 | _load_addr_text = LOADADDR(.text); 95 | _load_addr_rodata = LOADADDR(.rodata); 96 | _load_addr_data = LOADADDR(.data); 97 | } 98 | -------------------------------------------------------------------------------- /board/emsk/configs/22/ld/linker_gnu.ld: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | ICCM : ORIGIN = 0x00000000, LENGTH = 0x40000 4 | DCCM : ORIGIN = 0x80000000, LENGTH = 0x20000 5 | EXT_RAM : ORIGIN = 0x10000000, LENGTH = 0x8000000 6 | } 7 | ENTRY(_start) 8 | SECTIONS 9 | { 10 | .init : 11 | { 12 | _f_init = .; 13 | KEEP (*(.init_vector)) 14 | KEEP (*(.init_bootstrap)) 15 | _e_init = .; 16 | } > EXT_RAM 17 | .vector : ALIGN(1024) 18 | { 19 | _f_vector = .; 20 | *(.vector) 21 | _e_vector = .; 22 | } > EXT_RAM 23 | .text : ALIGN(4) 24 | { 25 | _f_text = .; 26 | *(.text .text.* .gnu.linkonce.t.*) 27 | _e_text = .; 28 | } > EXT_RAM 29 | .rodata : ALIGN(4) 30 | { 31 | _f_rodata = .; 32 | . = ALIGN(4); 33 | __CTOR_LIST__ = .; 34 | LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) 35 | KEEP(*(SORT_BY_NAME(".ctors*"))) 36 | LONG(0) 37 | __CTOR_END__ = .; 38 | . = ALIGN(4); 39 | __init_array_start = .; 40 | KEEP(*(SORT_BY_NAME(".init_array*"))) 41 | __init_array_end = .; 42 | . = ALIGN(4); 43 | __DTOR_LIST__ = .; 44 | LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) 45 | KEEP(*(SORT_BY_NAME(".dtors*"))) 46 | LONG(0) 47 | __DTOR_END__ = .; 48 | *(.rodata .rodata.* .gnu.linkonce.r.*) 49 | _e_rodata = .; 50 | } > EXT_RAM 51 | .data : ALIGN(4) 52 | { 53 | _f_data = .; 54 | *(.data .data.* .gnu.linkonce.d.*) 55 | _f_sdata = .; 56 | __SDATA_BEGIN__ = .; 57 | *(.sdata .sdata.* .gnu.linkonce.s.*) 58 | _e_sdata = .; 59 | _e_data = .; 60 | } > EXT_RAM AT > EXT_RAM 61 | .bss (NOLOAD) : ALIGN(8) 62 | { 63 | PROVIDE (__sbss_start = .); 64 | PROVIDE (___sbss_start = .); 65 | _f_bss = .; 66 | _f_sbss = .; 67 | *(.dynsbss) 68 | *(.sbss .sbss.* .gnu.linkonce.sb.*) 69 | *(.scommon) 70 | _e_sbss = .; 71 | PROVIDE (__sbss_end = .); 72 | PROVIDE (___sbss_end = .); 73 | *(.dynbss) 74 | *(.bss .bss.* .gnu.linkonce.b.*) 75 | *(COMMON) 76 | _e_bss = .; 77 | } > EXT_RAM 78 | .stack (NOLOAD) : 79 | { 80 | . = ALIGN(4); 81 | _f_stack = .; 82 | . = . + 8192; 83 | _e_stack = .; 84 | } > EXT_RAM 85 | .heap (NOLOAD) : 86 | { 87 | . = ALIGN(4); 88 | __start_heap = . ; 89 | _f_heap = .; 90 | . = . + 8192; 91 | _e_heap = .; 92 | __end_heap = . ; 93 | } > EXT_RAM 94 | _load_addr_text = LOADADDR(.text); 95 | _load_addr_rodata = LOADADDR(.rodata); 96 | _load_addr_data = LOADADDR(.data); 97 | } 98 | -------------------------------------------------------------------------------- /board/emsk/configs/23/ld/linker_gnu.ld: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | ICCM : ORIGIN = 0x00000000, LENGTH = 0x40000 4 | DCCM : ORIGIN = 0x80000000, LENGTH = 0x20000 5 | EXT_RAM : ORIGIN = 0x10000000, LENGTH = 0x8000000 6 | } 7 | ENTRY(_start) 8 | SECTIONS 9 | { 10 | .init : 11 | { 12 | _f_init = .; 13 | KEEP (*(.init_vector)) 14 | KEEP (*(.init_bootstrap)) 15 | _e_init = .; 16 | } > EXT_RAM 17 | .vector : ALIGN(1024) 18 | { 19 | _f_vector = .; 20 | *(.vector) 21 | _e_vector = .; 22 | } > EXT_RAM 23 | .text : ALIGN(4) 24 | { 25 | _f_text = .; 26 | *(.text .text.* .gnu.linkonce.t.*) 27 | _e_text = .; 28 | } > EXT_RAM 29 | .rodata : ALIGN(4) 30 | { 31 | _f_rodata = .; 32 | . = ALIGN(4); 33 | __CTOR_LIST__ = .; 34 | LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) 35 | KEEP(*(SORT_BY_NAME(".ctors*"))) 36 | LONG(0) 37 | __CTOR_END__ = .; 38 | . = ALIGN(4); 39 | __init_array_start = .; 40 | KEEP(*(SORT_BY_NAME(".init_array*"))) 41 | __init_array_end = .; 42 | . = ALIGN(4); 43 | __DTOR_LIST__ = .; 44 | LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) 45 | KEEP(*(SORT_BY_NAME(".dtors*"))) 46 | LONG(0) 47 | __DTOR_END__ = .; 48 | *(.rodata .rodata.* .gnu.linkonce.r.*) 49 | _e_rodata = .; 50 | } > EXT_RAM 51 | .data : ALIGN(4) 52 | { 53 | _f_data = .; 54 | *(.data .data.* .gnu.linkonce.d.*) 55 | _f_sdata = .; 56 | __SDATA_BEGIN__ = .; 57 | *(.sdata .sdata.* .gnu.linkonce.s.*) 58 | _e_sdata = .; 59 | _e_data = .; 60 | } > EXT_RAM AT > EXT_RAM 61 | .bss (NOLOAD) : ALIGN(8) 62 | { 63 | PROVIDE (__sbss_start = .); 64 | PROVIDE (___sbss_start = .); 65 | _f_bss = .; 66 | _f_sbss = .; 67 | *(.dynsbss) 68 | *(.sbss .sbss.* .gnu.linkonce.sb.*) 69 | *(.scommon) 70 | _e_sbss = .; 71 | PROVIDE (__sbss_end = .); 72 | PROVIDE (___sbss_end = .); 73 | *(.dynbss) 74 | *(.bss .bss.* .gnu.linkonce.b.*) 75 | *(COMMON) 76 | _e_bss = .; 77 | } > EXT_RAM 78 | .stack (NOLOAD) : 79 | { 80 | . = ALIGN(4); 81 | _f_stack = .; 82 | . = . + 8192; 83 | _e_stack = .; 84 | } > EXT_RAM 85 | .heap (NOLOAD) : 86 | { 87 | . = ALIGN(4); 88 | __start_heap = . ; 89 | _f_heap = .; 90 | . = . + 8192; 91 | _e_heap = .; 92 | __end_heap = . ; 93 | } > EXT_RAM 94 | _load_addr_text = LOADADDR(.text); 95 | _load_addr_rodata = LOADADDR(.rodata); 96 | _load_addr_data = LOADADDR(.data); 97 | } 98 | -------------------------------------------------------------------------------- /common/console_io.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-23 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \brief common io implementation 37 | */ 38 | #ifndef _CONSOLE_IO_H_ 39 | #define _CONSOLE_IO_H_ 40 | 41 | #include 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | extern int console_putchar(unsigned char chr); 48 | extern int console_putstr(const char *str, unsigned int len); 49 | extern int console_getchar(void); 50 | extern int console_getstr(char *str, unsigned int len); 51 | extern void xprintf_setup(void); 52 | 53 | #ifdef __cplusplus 54 | } 55 | #endif 56 | 57 | #endif /* _CONSOLE_IO_H_ */ 58 | -------------------------------------------------------------------------------- /board/emsk/common/emsk_timer.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-31 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_COMMON_TIMER 36 | * \brief emsk timer functions header 37 | */ 38 | 39 | /** 40 | * \addtogroup BOARD_EMSK_COMMON_TIMER 41 | * @{ 42 | */ 43 | #ifndef _EMSK_TIMER_ 44 | #define _EMSK_TIMER_ 45 | 46 | #include "inc/embARC_toolchain.h" 47 | 48 | #ifdef __cplusplus 49 | extern "C" { 50 | #endif 51 | 52 | extern volatile uint64_t gl_emsk_sys_hz_cnt; 53 | extern volatile uint32_t gl_emsk_ms_cnt; 54 | 55 | extern void emsk_timer_init(void); 56 | 57 | #ifdef __cplusplus 58 | } 59 | #endif 60 | 61 | #endif /* _EMSK_TIMER_ */ 62 | 63 | /** @} end of group BOARD_EMSK_COMMON_TIMER */ 64 | -------------------------------------------------------------------------------- /board/board.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2016-01-20 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | #include "inc/arc/arc_builtin.h" 34 | #include "board/board.h" 35 | #include "common/console_io.h" 36 | #include "string.h" 37 | 38 | typedef struct main_args { 39 | int argc; 40 | char *argv[]; 41 | } MAIN_ARGS; 42 | 43 | /** Change this to pass your own arguments to main functions */ 44 | MAIN_ARGS s_main_args = {1, {"main"}}; 45 | 46 | static void enter_to_main(MAIN_ARGS *main_arg) 47 | { 48 | if (main_arg == NULL) { 49 | /* null or aligned not to 4 bytes */ 50 | _arc_goto_main(0, NULL); 51 | } else { 52 | _arc_goto_main(main_arg->argc, main_arg->argv); 53 | } 54 | } 55 | 56 | void board_main(void) 57 | { 58 | /* board level hardware init */ 59 | board_init(); 60 | xprintf_setup(); 61 | cpu_unlock(); /* unlock cpu to let interrupt work */ 62 | enter_to_main(&s_main_args); 63 | } 64 | -------------------------------------------------------------------------------- /example/hello/mwdt/embARC_BSP_config.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-12-25 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | #ifndef _EMBARC_BSP_CONFIG_H_ 35 | #define _EMBARC_BSP_CONFIG_H_ 36 | 37 | #ifdef __cplusplus 38 | extern "C" { 39 | #endif 40 | 41 | #define BOARD_EMSK 42 | /**************************************************************************** 43 | * BSP Definitions 44 | ****************************************************************************/ 45 | /** 46 | * Toolchain Definition for MetaWare or GNU 47 | */ 48 | #define __MW__ 49 | //#define __GNU__ 50 | 51 | /** 52 | * Must be set. 53 | * If changed, modify .lcf file for 54 | * .stack ALIGN(4) SIZE(524288): {} 55 | * .heap? ALIGN(4) SIZE(524288): {} 56 | */ 57 | #define _STACKSIZE 8192 58 | #define _HEAPSZ 8192 59 | 60 | 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif /* _EMBARC_CONFIG_BSP_H_ */ 67 | -------------------------------------------------------------------------------- /example/hello/arcgnu/embARC_BSP_config.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-12-25 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | #ifndef _EMBARC_BSP_CONFIG_H_ 35 | #define _EMBARC_BSP_CONFIG_H_ 36 | 37 | #ifdef __cplusplus 38 | extern "C" { 39 | #endif 40 | 41 | #define BOARD_EMSK 42 | /**************************************************************************** 43 | * BSP Definitions 44 | ****************************************************************************/ 45 | /** 46 | * Toolchain Definition for MetaWare or GNU 47 | */ 48 | //#define __MW__ 49 | #define __GNU__ 50 | 51 | /** 52 | * Must be set. 53 | * If changed, modify .lcf file for 54 | * .stack ALIGN(4) SIZE(524288): {} 55 | * .heap? ALIGN(4) SIZE(524288): {} 56 | */ 57 | #define _STACKSIZE 8192 58 | #define _HEAPSZ 8192 59 | 60 | 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif /* _EMBARC_CONFIG_BSP_H_ */ 67 | -------------------------------------------------------------------------------- /device/designware/spi/dw_spi_hal_cfg.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2015-09-09 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup DEVICE_DW_SPI 37 | * \brief DesignWare SPI driver hardware description 38 | * related header file configuration file 39 | * \details configuration file to enable or disable some function of spi 40 | */ 41 | 42 | #ifndef _DEVICE_DW_SPI_HAL_CFG_H_ 43 | #define _DEVICE_DW_SPI_HAL_CFG_H_ 44 | 45 | #ifndef DW_SPI_CALC_FIFO_LEN_ENABLE 46 | #define DW_SPI_CALC_FIFO_LEN_ENABLE (1) /*!< Defaultly enable calculate fifo length */ 47 | #endif 48 | 49 | #ifndef DW_SPI_MAX_FIFO_LENGTH 50 | #define DW_SPI_MAX_FIFO_LENGTH (256) /*!< Max FIFO depth for designware SPI device */ 51 | #endif 52 | 53 | #ifndef DW_SPI_MIN_FIFO_LENGTH 54 | #define DW_SPI_MIN_FIFO_LENGTH (2) /*!< Min FIFO depth for designware SPI device */ 55 | #endif 56 | 57 | #endif /* _DEVICE_DW_SPI_HAL_CFG_H_ */ 58 | 59 | -------------------------------------------------------------------------------- /board/emsk/common/mux_hal.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-07 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup BOARD_EMSK_DRV_MUX 37 | * \brief emsk mux control register index header 38 | */ 39 | 40 | /** 41 | * \addtogroup BOARD_EMSK_DRV_MUX 42 | * @{ 43 | */ 44 | #ifndef _MUX_HAL_H_ 45 | #define _MUX_HAL_H_ 46 | 47 | /** 48 | * \name Mux Control Register Index 49 | * @{ 50 | */ 51 | #define PMOD_MUX_CTRL 0 /*!< 32-bits, offset 0x0, 52 | This register controls mapping of the peripheral device signals on Pmod connectors */ 53 | 54 | #define I2C_MAP_CTRL 1 /*!< 32-bits, offset 0x4 */ 55 | 56 | #define SPI_MAP_CTRL 2 /*!< 32-bits, offset 0x8, 57 | SPI_MAP_CTRL[0] selects the mode of operation of the SPI Slave: 58 | - Normal operation, SPI_MAP_CTRL[0]=0: SPI Slave is connected to Pmod1 at connector J1. 59 | - Loop-back mode, SPI_MAP_CTRL[0]=1: SPI Slave is connected to the SPI Master inside the FPGA using CS4. 60 | */ 61 | 62 | #define UART_MAP_CTRL 3 /*!< 32-bits, offset 0x8, 63 | This register controls the mapping of the UART signals on the Pmod1 connector. */ 64 | /** @} end of name */ 65 | 66 | 67 | #endif /* _MUX_HAL_H_ */ 68 | 69 | /** @} end of group BOARD_EMSK_DRV_MUX */ 70 | -------------------------------------------------------------------------------- /board/emsk/iic/dw_iic_obj.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-07-03 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_DRV_DW_IIC_OBJ 36 | * \brief header file of designware iic object instantiation on emsk 37 | */ 38 | 39 | /** 40 | * \addtogroup BOARD_EMSK_DRV_DW_IIC_OBJ 41 | * @{ 42 | */ 43 | #ifndef _DW_IIC_OBJ_H_ 44 | #define _DW_IIC_OBJ_H_ 45 | 46 | #include "device/device_hal/inc/dev_iic.h" 47 | 48 | /** 49 | * \name DesignWare IIC Object Number 50 | * @{ 51 | */ 52 | #define DW_IIC_NUM (1) /*!< DesignWare IIC valid number */ 53 | /** @} end of name */ 54 | 55 | /** 56 | * \name Designware IIC Object ID Macros 57 | * @{ 58 | */ 59 | #define DW_IIC_0_ID 0 /*!< iic 0 id macro */ 60 | #define DW_IIC_1_ID 1 /*!< iic 1 id macro */ 61 | /** @} end of name */ 62 | 63 | /** 64 | * \name Designware IIC Object Control Macros 65 | * @{ 66 | */ 67 | #define USE_DW_IIC_0 1 /*!< enable use designware iic 0 */ 68 | #define USE_DW_IIC_1 1 /*!< enable use designware iic 1 */ 69 | /** @} end of name */ 70 | 71 | #ifdef __cplusplus 72 | extern "C" { 73 | #endif 74 | 75 | extern void dw_iic_all_install(void); 76 | 77 | #ifdef __cplusplus 78 | } 79 | #endif 80 | 81 | #endif /* _DW_IIC_OBJ_H_ */ 82 | 83 | /** @} end of group BOARD_EMSK_IIC_OBJ */ 84 | -------------------------------------------------------------------------------- /board/emsk/spi/dw_spi_obj.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-07-03 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_DRV_DW_SPI_OBJ 36 | * \brief header file of designware spi object instantiation on emsk 37 | */ 38 | 39 | /** 40 | * \addtogroup BOARD_EMSK_DRV_DW_SPI_OBJ 41 | * @{ 42 | */ 43 | #ifndef _DW_SPI_OBJ_H_ 44 | #define _DW_SPI_OBJ_H_ 45 | 46 | #include "device/device_hal/inc/dev_spi.h" 47 | 48 | /** 49 | * \name DesignWare SPI Object Number 50 | * @{ 51 | */ 52 | #define DW_SPI_NUM (2) /*!< DesignWare SPI valid number */ 53 | /** @} end of name */ 54 | 55 | /** 56 | * \name Designware SPI Object ID Macros 57 | * @{ 58 | */ 59 | #define DW_SPI_0_ID 0 /*!< SPI 0 id macro (master node) */ 60 | #define DW_SPI_1_ID 1 /*!< SPI 1 id macro (slave node) */ 61 | /** @} end of name */ 62 | 63 | /** 64 | * \name Designware SPI Object Control Macros 65 | * @{ 66 | */ 67 | #define USE_DW_SPI_0 1 /*!< enable use designware SPI 0 */ 68 | #define USE_DW_SPI_1 1 /*!< enable use designware SPI 1 */ 69 | /** @} end of name */ 70 | 71 | #ifdef __cplusplus 72 | extern "C" { 73 | #endif 74 | 75 | extern void dw_spi_all_install(void); 76 | 77 | #ifdef __cplusplus 78 | } 79 | #endif 80 | 81 | #endif /* _DW_SPI_OBJ_H_ */ 82 | /** @} end of group BOARD_EMSK_DRV_DW_SPI_OBJ */ 83 | -------------------------------------------------------------------------------- /board/board.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-07-03 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * 35 | * \file 36 | * \ingroup BOARD_COMMON 37 | * \brief common board header file 38 | * \details 39 | * - This header file will contain board related settings for different boards. 40 | * - Each board configurations are put in its own header file, like emsk/emsk.h 41 | * - If you want to change the configuration, you need to go to related header file, e.g. 42 | * if you want to change EMSK board settings, you need to go to emsk/emsk.h 43 | * - In embARC 2015.05, all the settings are in this board.h, but now it moved to related board header file 44 | */ 45 | 46 | /** 47 | * \addtogroup BOARD_COMMON 48 | * @{ 49 | */ 50 | #ifndef _EMBARC_BOARD_H_ 51 | #define _EMBARC_BOARD_H_ 52 | 53 | #include "embARC_BSP_config.h" 54 | /** 55 | * \todo add comments and documents to describe the macros 56 | * \note the following macros must use the same name, because 57 | * they are used by middleware and other applications 58 | */ 59 | /** here is a sample of EMSK board resource definitions */ 60 | #ifdef BOARD_EMSK 61 | #include "board/emsk/emsk.h" 62 | #endif /* BOARD_EMSK */ 63 | 64 | /** you can add your board configuration as BOARD_EMSK defined up */ 65 | 66 | #endif /* _EMBARC_BOARD_H_ */ 67 | 68 | /** @} end of group BOARD_COMMON */ 69 | -------------------------------------------------------------------------------- /example/hello/main.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2016-04-20 31 | * \author Qiang Gu(Qiang.Gu@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \defgroup EMBARC_APP_BAREMETAL_BLINKY embARC Blinky Example 36 | * \ingroup EMBARC_APPS_TOTAL 37 | * \ingroup EMBARC_APPS_BAREMETAL 38 | * \brief embARC example for toggle leds on board 39 | * 40 | * \details 41 | * ### Extra Required Tools 42 | * 43 | * ### Extra Required Peripherals 44 | * 45 | * ### Design Concept 46 | * This example is designed to test board without any extra peripheral 47 | * 48 | * ### Usage Manual 49 | * Toggle all leds on board in 1s period 50 | * 51 | * ### Extra Comments 52 | * 53 | */ 54 | 55 | /** 56 | * \file 57 | * \ingroup EMBARC_APP_BAREMETAL_BLINKY 58 | * \brief main source file for blinky example 59 | */ 60 | 61 | /** 62 | * \addtogroup EMBARC_APP_BAREMETAL_BLINKY 63 | * @{ 64 | */ 65 | /* embARC HAL */ 66 | #include 67 | #include 68 | 69 | #include "board/board.h" 70 | #include "inc/embARC_debug.h" 71 | 72 | #define LED_TOGGLE_MASK BOARD_LED_MASK 73 | 74 | int main(void) { 75 | 76 | uint16_t led_toggle_val = LED_TOGGLE_MASK; 77 | 78 | EMBARC_PRINTF("!!!Hello World!!!\r\n"); /* prints !!!Hello World!!! */ 79 | 80 | while(1) { 81 | EMBARC_PRINTF("Toggle onboard LEDs.\r\n"); 82 | led_write(led_toggle_val, BOARD_LED_MASK); 83 | led_toggle_val = ~led_toggle_val; 84 | board_delay_ms(1000, 0); 85 | } 86 | 87 | 88 | return EXIT_SUCCESS; 89 | } 90 | 91 | /** @} */ 92 | -------------------------------------------------------------------------------- /board/emsk/uart/dw_uart_obj.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-03 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_DRV_DW_UART_OBJ 36 | * \brief header file of designware uart object instantiation on emsk 37 | */ 38 | 39 | /** 40 | * \addtogroup BOARD_EMSK_DRV_DW_UART_OBJ 41 | * @{ 42 | */ 43 | #ifndef _DW_UART_OBJ_H_ 44 | #define _DW_UART_OBJ_H_ 45 | 46 | #include "device/device_hal/inc/dev_uart.h" 47 | 48 | /** 49 | * \name DesignWare UART Object Number 50 | * @{ 51 | */ 52 | #define DW_UART_NUM (2) /*!< DesignWare UART valid number */ 53 | /** @} end of name */ 54 | 55 | /** 56 | * \name Designware UART Object ID Macros 57 | * @{ 58 | */ 59 | #define DW_UART_0_ID 0 /*!< uart 0 id macro */ 60 | #define DW_UART_1_ID 1 /*!< uart 1 id macro */ 61 | /** @} end of name */ 62 | 63 | /** 64 | * \name Designware UART Object Control Macros 65 | * @{ 66 | */ 67 | #define USE_DW_UART_0 1 /*!< enable use designware uart 0 */ 68 | #define USE_DW_UART_1 1 /*!< enable use designware uart 1 */ 69 | /** @} end of name */ 70 | 71 | /** 72 | * \name Designware UART Ringbuffer Size Control Macros 73 | * @{ 74 | */ 75 | #define MAX_SNDBUF_SIZE 256 /*!< max size of uart send buffer */ 76 | #define MAX_RCVBUF_SIZE 10 /*!< max size of uart recv buffer */ 77 | /** @} end of name */ 78 | 79 | #ifdef __cplusplus 80 | extern "C" { 81 | #endif 82 | 83 | extern void dw_uart_all_install(void); 84 | 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif /* _DW_UART_OBJ_H_ */ 90 | -------------------------------------------------------------------------------- /board/emsk/gpio/dw_gpio_obj.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-24 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_DRV_DW_GPIO_OBJ 36 | * \brief header file of designware gpio object instantiation on emsk 37 | */ 38 | 39 | /** 40 | * \addtogroup BOARD_EMSK_DRV_DW_GPIO_OBJ 41 | * @{ 42 | */ 43 | #ifndef _DW_GPIO_OBJ_H_ 44 | #define _DW_GPIO_OBJ_H_ 45 | 46 | #include "device/designware/gpio/dw_gpio.h" 47 | 48 | /** 49 | * \name Designware GPIO Port Bank Control Macros 50 | * @{ 51 | */ 52 | #define USE_DW_GPIO_PORT_A 1 53 | #define USE_DW_GPIO_PORT_B 1 54 | #define USE_DW_GPIO_PORT_C 1 55 | #define USE_DW_GPIO_PORT_D 1 56 | /** @} end of name */ 57 | 58 | /** 59 | * \name Designware GPIO Port Interrupt Available Number Macros 60 | * @{ 61 | */ 62 | #define EMSK_GPIO_A_INT_MAX_COUNT 32 63 | #define EMSK_GPIO_B_INT_MAX_COUNT 0 64 | #define EMSK_GPIO_C_INT_MAX_COUNT 0 65 | #define EMSK_GPIO_D_INT_MAX_COUNT 0 66 | /** @} end of name */ 67 | 68 | /** 69 | * \name Designware GPIO Port Available Bits Macros 70 | * @{ 71 | */ 72 | #define EMSK_GPIO_A_VALID_MASK DW_GPIO_MASK_ALL 73 | #define EMSK_GPIO_B_VALID_MASK DW_GPIO_MASK_ALL 74 | #define EMSK_GPIO_C_VALID_MASK DW_GPIO_MASK_ALL 75 | #define EMSK_GPIO_D_VALID_MASK DW_GPIO_MASK_ALL 76 | /** @} end of name */ 77 | 78 | #ifdef __cplusplus 79 | extern "C" { 80 | #endif 81 | 82 | extern void dw_gpio_all_install(void); 83 | 84 | #ifdef __cplusplus 85 | } 86 | #endif 87 | 88 | #endif /* _DW_GPIO_OBJ_H_*/ 89 | 90 | /** @} end of group BOARD_EMSK_DRV_DW_GPIO_OBJ */ 91 | -------------------------------------------------------------------------------- /inc/embARC_debug.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-12-26 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup EMBARC_DEBUG 37 | * \brief necessary definitions of debug 38 | */ 39 | 40 | #ifndef _EMBARC_DEBUG_H_ 41 | #define _EMBARC_DEBUG_H_ 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | #ifndef EMBARC_PRINTF 48 | #include "common/xprintf.h" 49 | #define EMBARC_PRINTF xprintf 50 | #endif 51 | 52 | /* 53 | * if you want to use DBG or dbg_printf, 54 | * please define DEBUG or DBG_LESS or DBG_MORE before include embARC_debug.h 55 | * DEBUG: enable debug print 56 | * DBG_LESS: enable less debug msg 57 | * DBG_MORE: enable more debug msg 58 | **/ 59 | 60 | #if defined(DEBUG) 61 | #if defined(DEBUG_HOSTLINK) 62 | #include 63 | #define DBG(fmt, ...) printf(fmt, ##__VA_ARGS__) 64 | #else 65 | #define DBG(fmt, ...) EMBARC_PRINTF(fmt, ##__VA_ARGS__) 66 | #endif 67 | #else 68 | #define DBG(fmt, ...) 69 | #endif 70 | 71 | #define DBG_LESS_INFO 0x01 /* less debug messages */ 72 | #define DBG_MORE_INFO 0x02 /* more debug messages */ 73 | 74 | 75 | #if defined (DBG_LESS) 76 | #define DBG_TYPE (DBG_LESS_INFO) 77 | #elif defined (DBG_MORE) 78 | #define DBG_TYPE ((DBG_LESS_INFO) | (DBG_MORE_INFO)) 79 | #else 80 | #define DBG_TYPE 0 81 | #endif 82 | 83 | #if DBG_TYPE > 0 84 | #define dbg_printf(type, fmt, ...) \ 85 | if (((type) & DBG_TYPE)) { EMBARC_PRINTF(fmt, ##__VA_ARGS__); } 86 | #else 87 | #define dbg_printf(type, fmt, ...) 88 | #endif 89 | 90 | #ifdef __cplusplus 91 | } 92 | #endif 93 | 94 | #endif /* DEBUG_H_ */ 95 | -------------------------------------------------------------------------------- /device/designware/iic/dw_iic_hal_cfg.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-07-01 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup DEVICE_DW_IIC 37 | * \brief DesignWare IIC driver hardware description 38 | * related header file configuration file 39 | * \details configuration file to enable or disable some function of iic 40 | */ 41 | 42 | #ifndef _DEVICE_DW_IIC_HAL_CFG_H_ 43 | #define _DEVICE_DW_IIC_HAL_CFG_H_ 44 | 45 | #ifndef DW_IIC_ALLOW_RESTART 46 | #define DW_IIC_ALLOW_RESTART (1) /*!< allow restart configuration */ 47 | #endif 48 | 49 | #ifdef DW_IIC_SPECIAL_START_BYTE 50 | #define DW_IIC_SPECIAL_START_BYTE (0) /*!< SPECIAL bit enable in IC_TAR */ 51 | #endif 52 | 53 | #ifndef DW_IIC_MST_10_BIT_ADDR_SUPPORT 54 | #define DW_IIC_MST_10_BIT_ADDR_SUPPORT (1) /*!< enable 10-bit address mode */ 55 | #endif 56 | 57 | #ifdef DW_IIC_SLV_10_BIT_ADDR_SUPPORT 58 | #define DW_IIC_SLV_10_BIT_ADDR_SUPPORT (1) /*!< slave 10-bit addressing mode */ 59 | #endif 60 | 61 | #ifndef DW_IIC_DYNAMIC_TAR_UPDATE_SUPPORT 62 | #define DW_IIC_DYNAMIC_TAR_UPDATE_SUPPORT (0) /*!< Dynamic target address update support */ 63 | #endif 64 | 65 | #ifndef DW_IIC_DISABLE_MAX_T_POLL_CNT 66 | #define DW_IIC_DISABLE_MAX_T_POLL_CNT (1250) /*!< Timeout count, approximate to be 25us in 50MHz CPU @ Standard mode */ 67 | #endif 68 | 69 | #ifndef DW_IIC_CALC_FIFO_LEN_ENABLE 70 | #define DW_IIC_CALC_FIFO_LEN_ENABLE (1) /*!< Default enable calculate fifo length */ 71 | #endif 72 | 73 | #ifndef DW_IIC_USE_IC_CLK_MHZ 74 | #define DW_IIC_USE_IC_CLK_MHZ (50) /*!< Default use 50MHz IC_CLK */ 75 | #endif 76 | 77 | #ifndef DW_IIC_USE_HS_BUS_LOADING_100PF 78 | #define DW_IIC_USE_HS_BUS_LOADING_100PF (1) /*!< Use bus loading 100pf */ 79 | #endif 80 | 81 | #endif /* _DEVICE_DW_IIC_HAL_CFG_H_ */ 82 | 83 | -------------------------------------------------------------------------------- /board/emsk/gpio/emsk_gpio.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-31 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_DRV_GPIO 36 | * \brief emsk board gpio related functions header 37 | */ 38 | /** 39 | * \addtogroup BOARD_EMSK_DRV_GPIO 40 | * @{ 41 | */ 42 | #ifndef _EMSK_GPIO_H_ 43 | #define _EMSK_GPIO_H_ 44 | 45 | #include "device/designware/gpio/dw_gpio.h" 46 | 47 | /** 48 | * \name EMSK LED Port Configuration 49 | * @{ 50 | */ 51 | #define EMSK_LED_OFFSET (0) 52 | #define EMSK_LED_MASK ((0x1ff) << EMSK_LED_OFFSET) 53 | #define EMSK_LED_PORT (DW_GPIO_PORT_B) 54 | #define EMSK_LED_DIR ((0x1ff) << EMSK_LED_OFFSET) 55 | /** @} end of name */ 56 | 57 | /** 58 | * \name EMSK Switch Port Configuration 59 | * @{ 60 | */ 61 | #define EMSK_SWITCH_OFFSET (0) 62 | #define EMSK_SWITCH_MASK ((0xf) << EMSK_SWITCH_OFFSET) 63 | #define EMSK_SWITCH_PORT (DW_GPIO_PORT_C) 64 | #define EMSK_SWITCH_DIR ((0x0) << EMSK_SWITCH_OFFSET) 65 | /** @} end of name */ 66 | 67 | /** 68 | * \name EMSK Button Port Configuration 69 | * @{ 70 | */ 71 | #define EMSK_BUTTON_OFFSET (0) 72 | #define EMSK_BUTTON_MASK ((0x7) << EMSK_BUTTON_OFFSET) 73 | #define EMSK_BUTTON_PORT (DW_GPIO_PORT_A) 74 | #define EMSK_BUTTON_DIR ((0x0) << EMSK_BUTTON_OFFSET) 75 | /** @} end of name */ 76 | 77 | #ifdef __cplusplus 78 | extern "C" { 79 | #endif 80 | 81 | extern void emsk_led_init(void); 82 | extern void emsk_button_init(void); 83 | extern void emsk_switch_init(void); 84 | extern void emsk_gpio_init(void); 85 | extern void led_write(uint32_t led_val, uint32_t mask); 86 | extern uint32_t led_read(uint32_t mask); 87 | extern uint32_t switch_read(uint32_t mask); 88 | extern uint32_t button_read(uint32_t mask); 89 | 90 | #ifdef __cplusplus 91 | } 92 | #endif 93 | 94 | #endif /* _EMSK_GPIO_H_ */ 95 | 96 | /** @} end of group BOARD_EMSK_DRV_GPIO */ 97 | -------------------------------------------------------------------------------- /inc/arc/arc_timer.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-15 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup ARC_HAL_MISC_TIMER 37 | * \brief header file of ARC internal timer 38 | */ 39 | 40 | /** 41 | * \addtogroup ARC_HAL_MISC_TIMER 42 | * @{ 43 | */ 44 | 45 | #ifndef _ARC_HAL_TIMER_H_ 46 | #define _ARC_HAL_TIMER_H_ 47 | #include "inc/arc/arc.h" 48 | #include "inc/embARC_toolchain.h" 49 | 50 | /** 51 | * \name arc internal timers names 52 | * @{ 53 | */ 54 | #define TIMER_0 0 /*!< macro name for arc internal timer 0 */ 55 | #define TIMER_1 1 /*!< macro name for arc internal timer 1 */ 56 | #define TIMER_RTC 2 /*!< macro name for arc internal RTC */ 57 | 58 | /** @} */ 59 | 60 | /** 61 | * \name bit definition of RTC CTRL reg 62 | * @{ 63 | */ 64 | 65 | #define TIMER_RTC_ENABLE 0x01 /*!< enable RTC */ 66 | #define TIMER_RTC_CLEAR 0x02 /* clears the AUX_RTC_LOW and AUX_RTC_HIGH */ 67 | #define TIMER_RTC_STATUS_A0 0x40000000 /*!< track bit of atomicity of reads of RTC */ 68 | #define TIMER_RTC_STATUS_A1 0x80000000 /*!< track bit of atomicity of reads of RTC */ 69 | 70 | /** @} */ 71 | 72 | /** 73 | * \name bit definition of timer CTRL reg 74 | * @{ 75 | */ 76 | #define TIMER_CTRL_IE (1 << 0) /*!< Interrupt when count reaches limit */ 77 | #define TIMER_CTRL_NH (1 << 1) /*!< Count only when CPU NOT halted */ 78 | #define TIMER_CTRL_W (1 << 2) /*!< watchdog enable */ 79 | #define TIMER_CTRL_IP (1 << 3) /*!< interrupt pending */ 80 | 81 | /** @} */ 82 | 83 | #ifdef __cplusplus 84 | extern "C" { 85 | #endif 86 | 87 | extern int32_t arc_timer_present(const uint32_t no); 88 | extern int32_t arc_timer_start(const uint32_t no, const uint32_t mode, const uint32_t val); 89 | extern int32_t arc_timer_stop(const uint32_t no); 90 | extern int32_t arc_timer_current(const uint32_t no, void* val); 91 | extern int32_t arc_timer_int_clear(const uint32_t no); 92 | extern void arc_timer_init(void); 93 | 94 | #ifdef __cplusplus 95 | } 96 | #endif 97 | 98 | #endif /* _ARC_HAL_TIMER_H_ */ 99 | /** }@*/ 100 | -------------------------------------------------------------------------------- /board/emsk/common/mux.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-07 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \defgroup BOARD_EMSK_DRV_MUX EMSK Mux Driver 35 | * \ingroup BOARD_EMSK_DRIVER 36 | * \brief EMSK Mux Controller Driver 37 | * \details 38 | * Mux controller is the hardware external PMOD port pin connection 39 | * controller, it can distribute the external port pins into different 40 | * functions like general input/output, spi, iic, uart and so on. 41 | */ 42 | 43 | /** 44 | * \file 45 | * \ingroup BOARD_EMSK_DRV_MUX 46 | * \brief emsk mux controller driver 47 | */ 48 | 49 | /** 50 | * \addtogroup BOARD_EMSK_DRV_MUX 51 | * @{ 52 | */ 53 | #include "board/emsk/common/mux_hal.h" 54 | #include "board/emsk/common/mux.h" 55 | 56 | static MUX_REG *mux_ctrl_regs = (MUX_REG *)0; 57 | 58 | /** initialize i2c controller and set slave device address */ 59 | void mux_init(MUX_REG *mux_regs) 60 | { 61 | // Initialize Mux controller registers by default values 62 | mux_regs[PMOD_MUX_CTRL] = PMOD_MUX_CTRL_DEFAULT; 63 | mux_regs[SPI_MAP_CTRL] = SPI_MAP_CTRL_DEFAULT; 64 | mux_regs[UART_MAP_CTRL] = UART_MAP_CTRL_DEFAULT; 65 | mux_ctrl_regs = mux_regs; 66 | } 67 | 68 | /** Get mux ctrl register pointer, only valid after mux_init */ 69 | MUX_REG *get_mux_regs(void) 70 | { 71 | return mux_ctrl_regs; 72 | } 73 | 74 | /** set PMOD muxer scheme */ 75 | void set_pmod_mux(MUX_REG *mux_regs, uint32_t val) 76 | { 77 | mux_regs[PMOD_MUX_CTRL] = val; 78 | } 79 | 80 | /** get PMOD muxer scheme */ 81 | uint32_t get_pmod_mux(MUX_REG *mux_regs) 82 | { 83 | return (uint32_t) mux_regs[PMOD_MUX_CTRL]; 84 | } 85 | 86 | /** set PMOD muxer scheme */ 87 | void change_pmod_mux(MUX_REG *mux_regs, uint32_t val, uint32_t change_bits) 88 | { 89 | mux_regs[PMOD_MUX_CTRL] = ((mux_regs[PMOD_MUX_CTRL] & ~change_bits) | val); 90 | } 91 | 92 | /** set SPI connection scheme */ 93 | void set_spi_map(MUX_REG *mux_regs, uint32_t val) 94 | { 95 | mux_regs[SPI_MAP_CTRL] = val; 96 | } 97 | 98 | /** get SPI connection scheme */ 99 | uint32_t get_spi_map(MUX_REG *mux_regs) 100 | { 101 | return (uint32_t) mux_regs[SPI_MAP_CTRL]; 102 | } 103 | 104 | /** set UART connection scheme */ 105 | void set_uart_map(MUX_REG *mux_regs, uint32_t val) 106 | { 107 | mux_regs[UART_MAP_CTRL] = val; 108 | } 109 | 110 | /** get UART connection scheme */ 111 | uint32_t get_uart_map(MUX_REG *mux_regs) 112 | { 113 | return (uint32_t) mux_regs[UART_MAP_CTRL]; 114 | } 115 | /** @} end of group BOARD_EMSK_DRV_MUX */ 116 | 117 | -------------------------------------------------------------------------------- /board/emsk/common/emsk_init.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-31 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \defgroup BOARD_EMSK_COMMON_INIT EMSK Common Init Module 35 | * \ingroup BOARD_EMSK_COMMON 36 | * \brief EMSK Board Common Init Module 37 | * \details 38 | * EMSK timer/gpio/interrupt init process. Device-driver installation is done while 39 | * getting the device object for the first time. 40 | */ 41 | 42 | /** 43 | * \file 44 | * \ingroup BOARD_EMSK_COMMON_INIT 45 | * \brief common emsk init module 46 | */ 47 | 48 | /** 49 | * \addtogroup BOARD_EMSK_COMMON_INIT 50 | * @{ 51 | */ 52 | #include "inc/arc/arc_builtin.h" 53 | #include "inc/arc/arc.h" 54 | #include "inc/arc/arc_timer.h" 55 | 56 | #include "board/emsk/emsk.h" 57 | #include "board/emsk/common/emsk_timer.h" 58 | #include "board/emsk/common/mux.h" 59 | 60 | #ifdef ARC_FEATURE_DMP_PERIPHERAL 61 | #define PERIPHERAL_BASE ARC_FEATURE_DMP_PERIPHERAL 62 | #else 63 | #define PERIPHERAL_BASE _arc_aux_read(AUX_DMP_PERIPHERAL) 64 | #endif 65 | 66 | /** 67 | * \brief emsk-related mux io init 68 | */ 69 | static void emsk_mux_init(void) 70 | { 71 | MUX_REG *mux_regs; 72 | 73 | mux_regs = (MUX_REG *)(PERIPHERAL_BASE|REL_REGBASE_PINMUX); 74 | mux_init(mux_regs); 75 | 76 | /** 77 | * + Please refer to corresponding EMSK User Guide for detailed information 78 | * -> Appendix: A Hardware Functional Description 79 | * -> Pmods Configuration summary 80 | * + Set up pin-multiplexer of all PMOD connections 81 | * - PM1 J1: Upper row as UART 0, lower row as SPI Slave 82 | * - PM2 J2: IIC 0 and run/halt signals 83 | * - PM3 J3: GPIO Port A and Port C 84 | * - PM4 J4: IIC 1 and Port D 85 | * - PM5 J5: Upper row as SPI Master, lower row as Port A 86 | * - PM6 J6: Upper row as SPI Master, lower row as Port A 87 | */ 88 | set_pmod_mux(mux_regs, PM1_UR_UART_0 | PM1_LR_SPI_S \ 89 | | PM2_I2C_HRI \ 90 | | PM3_GPIO_AC \ 91 | | PM4_I2C_GPIO_D \ 92 | | PM5_UR_SPI_M1 | PM5_LR_GPIO_A \ 93 | | PM6_UR_SPI_M0 | PM6_LR_GPIO_A ); 94 | 95 | /** 96 | * PM1 upper row as UART 97 | * UM4:RXD, UM3:TXD 98 | * UM2:RTS_N, UM1:CTS_N 99 | */ 100 | set_uart_map(mux_regs, 0x9c); 101 | } 102 | 103 | /** 104 | * \brief Board init routine MUST be called in each application 105 | * \note It is better to disable interrupts when calling this function 106 | * remember to enable interrupt when you want to use them 107 | */ 108 | void board_init(void) 109 | { 110 | arc_timer_init(); 111 | emsk_mux_init(); 112 | emsk_gpio_init(); 113 | emsk_timer_init(); 114 | } 115 | 116 | /** @} end of group BOARD_EMSK_COMMON_INIT */ 117 | -------------------------------------------------------------------------------- /inc/embARC_toolchain.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-12-25 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup TOOLCHAIN 37 | * \brief toolchain dependent definitions 38 | */ 39 | 40 | #include /* C99 standard lib */ 41 | #include /* C99 standard lib */ 42 | #include /* C99 standard lib */ 43 | #include /* C99 standard lib */ 44 | 45 | #include "embARC_BSP_config.h" 46 | 47 | /** 48 | * \addtogroup TOOLCHAIN 49 | * @{ 50 | */ 51 | 52 | #ifndef _EMBARC_TOOLCHAIN_H_ 53 | #define _EMBARC_TOOLCHAIN_H_ 54 | 55 | #ifdef __cplusplus 56 | extern "C" { 57 | #endif 58 | 59 | /* 60 | * macro definitions of compiler extend function 61 | */ 62 | #ifndef __cplusplus /* C++ supports inline */ 63 | #if __STDC_VERSION__ < 199901L /* C99 supports inline */ 64 | #ifndef inline 65 | #define inline __inline__ /* inline function */ 66 | #endif 67 | #endif /* __STDC_VERSION__ < 199901L */ 68 | #endif /* __cplusplus */ 69 | 70 | #ifndef Inline 71 | #define Inline static __inline__ /* inline function */ 72 | #endif 73 | 74 | #ifndef __cplusplus /* C++ supports asm */ 75 | #ifndef asm 76 | #define asm __asm__ /* inline asm */ 77 | #endif 78 | #endif /* __cplusplus */ 79 | 80 | #ifndef Asm 81 | #define Asm __asm__ volatile /* inline asm (no optimization) */ 82 | #endif 83 | 84 | /* compiler attributes */ 85 | #define EMBARC_FORCEINLINE __attribute__((always_inline)) 86 | #define EMBARC_NOINLINE __attribute__((noinline)) 87 | #define EMBARC_PACKED __attribute__((packed)) 88 | #define EMBARC_WEAK __attribute__((weak)) 89 | #define EMBARC_ALIAS(f) __attribute__((weak, alias (#f))) 90 | #define EMBARC_LINKTO(f) __attribute__((alias (#f))) 91 | #define EMBARC_NORETURN __attribute__((noreturn)) 92 | #define EMBARC_NAKED __attribute__((naked)) /* function without return */ 93 | #define EMBARC_ALIGNED(x) __attribute__((aligned(x))) 94 | 95 | 96 | /* array count macro */ 97 | #define EMBARC_ARRAY_COUNT(x) (sizeof(x)/sizeof(x[0])) 98 | 99 | /* convert macro argument to string */ 100 | /* note: this needs one level of indirection, accomplished with the helper macro 101 | * __EMBARC_TO_STRING */ 102 | #define __EMBARC_TO_STRING(x) #x 103 | #define EMBARC_TO_STRING(x) __EMBARC_TO_STRING(x) 104 | 105 | #if defined(__GNU__) 106 | /* GNU tool specific definitions */ 107 | 108 | #elif defined(__MW__) 109 | /* Metaware tool specific definitions */ 110 | /* Metaware toolchain related definitions */ 111 | 112 | #else 113 | #error "unsupported toolchain" 114 | #endif 115 | 116 | #ifdef __cplusplus 117 | } 118 | #endif 119 | 120 | #endif /* _EMBARC_TOOLCHAIN_H_ */ 121 | /** }@ */ 122 | -------------------------------------------------------------------------------- /board/emsk/emsk.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-18 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * 35 | * \file 36 | * \ingroup BOARD_EMSK_COMMON_INIT 37 | * \brief emsk resource definitions 38 | */ 39 | 40 | /** 41 | * \addtogroup BOARD_EMSK_COMMON_INIT 42 | * @{ 43 | */ 44 | #ifndef _EMSK_H_ 45 | #define _EMSK_H_ 46 | 47 | #include "inc/arc/arc_em.h" 48 | 49 | #include "board/emsk/uart/dw_uart_obj.h" 50 | #include "board/emsk/gpio/dw_gpio_obj.h" 51 | #include "board/emsk/gpio/emsk_gpio.h" 52 | #include "board/emsk/iic/dw_iic_obj.h" 53 | #include "board/emsk/spi/dw_spi_obj.h" 54 | 55 | #include "board/emsk/common/emsk_timer.h" 56 | 57 | #include "board/emsk/emsk_hardware.h" 58 | 59 | #define EMSK_GPIO_PORT_A DW_GPIO_PORT_A 60 | #define EMSK_GPIO_PORT_B DW_GPIO_PORT_B 61 | #define EMSK_GPIO_PORT_C DW_GPIO_PORT_C 62 | #define EMSK_GPIO_PORT_D DW_GPIO_PORT_D 63 | 64 | /* common macros must be defined by all boards */ 65 | 66 | #define BOARD_CONSOLE_UART_ID DW_UART_1_ID 67 | #define BOARD_CONSOLE_UART_BAUD UART_BAUDRATE_115200 68 | #define BOARD_ADC_IIC_ID DW_IIC_0_ID 69 | #define BOARD_TEMP_SENSOR_IIC_ID DW_IIC_0_ID 70 | 71 | #define BOARD_TEMP_IIC_SLVADDR TEMP_I2C_SLAVE_ADDRESS 72 | 73 | #ifndef BOARD_SPI_FREQ 74 | #define BOARD_SPI_FREQ (1000000) 75 | #endif 76 | 77 | #ifndef BOARD_SPI_CLKMODE 78 | #define BOARD_SPI_CLKMODE (SPI_CLK_MODE_0) 79 | #endif 80 | 81 | #define BOARD_SYS_TIMER_ID TIMER_0 82 | #define BOARD_SYS_TIMER_INTNO INTNO_TIMER0 83 | #define BOARD_SYS_TIMER_HZ (1000) 84 | 85 | /** board timer count frequency (HZ) */ 86 | #define BOARD_SYS_TIMER_MS_HZ (1000) 87 | /** board timer count frequency convention based on the global timer counter */ 88 | #define BOARD_SYS_TIMER_MS_CONV (BOARD_SYS_TIMER_MS_HZ/BOARD_SYS_TIMER_HZ) 89 | 90 | 91 | #define BOARD_CPU_CLOCK CLK_CPU 92 | #define BOARD_DEV_CLOCK CLK_BUS_APB 93 | 94 | #define BOARD_LED_MASK (0x1ff) 95 | #define BOARD_LED_CNT (9) 96 | #define BOARD_BTN_MASK (0x7) 97 | #define BOARD_BTN_CNT (3) 98 | #define BOARD_SWT_MASK (0xf) 99 | #define BOARD_SWT_CNT (4) 100 | 101 | #define BOARD_ONBOARD_NTSHELL_ID (EMSK_NTSHELL_0_ID) 102 | 103 | #define OSP_DELAY_OS_COMPAT_ENABLE (1) 104 | #define OSP_DELAY_OS_COMPAT_DISABLE (0) 105 | 106 | 107 | #define OSP_GET_CUR_SYSHZ() (gl_emsk_sys_hz_cnt) 108 | #define OSP_GET_CUR_MS() (gl_emsk_ms_cnt) 109 | #define OSP_GET_CUR_US() board_get_cur_us() 110 | #define OSP_GET_CUR_HWTICKS() board_get_hwticks() 111 | 112 | #ifdef __cplusplus 113 | extern "C" { 114 | #endif 115 | 116 | extern void board_init(void); 117 | extern void board_timer_update(uint32_t precision); 118 | extern void board_delay_ms(uint32_t ms, uint8_t os_compat); 119 | extern uint64_t board_get_hwticks(void); 120 | extern uint64_t board_get_cur_us(void); 121 | 122 | #ifdef __cplusplus 123 | } 124 | #endif 125 | 126 | #endif /* _EMSK_H_ */ 127 | 128 | /** @} end of group BOARD_EMSK_COMMON_INIT */ 129 | -------------------------------------------------------------------------------- /inc/arc/arc_em.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-12 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup ARC_HAL_CORE_EM 37 | * \brief header file of EM series 38 | */ 39 | 40 | /** 41 | * \addtogroup ARC_HAL_CORE_EM 42 | * @{ 43 | */ 44 | 45 | #ifndef _ARC_HAL_EM_H_ 46 | #define _ARC_HAL_EM_H_ 47 | 48 | #include "inc/arc/arc.h" 49 | 50 | #define AUX_ACC0_LO (0x580) 51 | #define AUX_ACC0_GLO (0x581) 52 | #define AUX_ACC0_HI (0x582) 53 | #define AUX_ACC0_GHI (0x583) 54 | #define AUX_DSP_BFLY0 (0x598) 55 | #define AUX_DSP_FFT_CTRL (0x59e) 56 | #define AUX_DSP_CTRL (0x59f) 57 | 58 | #define AUX_AGU_AUX_AP0 (0x5c0) 59 | #define AUX_AGU_AUX_AP1 (0x5c1) 60 | #define AUX_AGU_AUX_AP2 (0x5c2) 61 | #define AUX_AGU_AUX_AP3 (0x5c3) 62 | #define AUX_AGU_AUX_AP4 (0x5c4) 63 | #define AUX_AGU_AUX_AP5 (0x5c5) 64 | #define AUX_AGU_AUX_AP6 (0x5c6) 65 | #define AUX_AGU_AUX_AP7 (0x5c7) 66 | #define AUX_AGU_AUX_AP8 (0x5c8) 67 | #define AUX_AGU_AUX_AP9 (0x5c9) 68 | #define AUX_AGU_AUX_AP10 (0x5ca) 69 | #define AUX_AGU_AUX_AP11 (0x5cb) 70 | #define AUX_AGU_AUX_AP12 (0x5cc) 71 | #define AUX_AGU_AUX_AP13 (0x5cd) 72 | #define AUX_AGU_AUX_AP14 (0x5ce) 73 | #define AUX_AGU_AUX_AP15 (0x5cf) 74 | 75 | #define AUX_AGU_AXU_OS0 (0x5d0) 76 | #define AUX_AGU_AXU_OS1 (0x5d1) 77 | #define AUX_AGU_AXU_OS2 (0x5d2) 78 | #define AUX_AGU_AXU_OS3 (0x5d3) 79 | #define AUX_AGU_AXU_OS4 (0x5d4) 80 | #define AUX_AGU_AXU_OS5 (0x5d5) 81 | #define AUX_AGU_AXU_OS6 (0x5d6) 82 | #define AUX_AGU_AXU_OS7 (0x5d7) 83 | #define AUX_AGU_AXU_OS8 (0x5d8) 84 | #define AUX_AGU_AXU_OS9 (0x5d9) 85 | #define AUX_AGU_AXU_OS10 (0x5da) 86 | #define AUX_AGU_AXU_OS11 (0x5db) 87 | #define AUX_AGU_AXU_OS12 (0x5dc) 88 | #define AUX_AGU_AXU_OS13 (0x5dd) 89 | #define AUX_AGU_AXU_OS14 (0x5de) 90 | #define AUX_AGU_AXU_OS15 (0x5df) 91 | 92 | #define AUX_AGU_AUX_MOD0 (0x5e0) 93 | #define AUX_AGU_AUX_MOD1 (0x5e1) 94 | #define AUX_AGU_AUX_MOD2 (0x5e2) 95 | #define AUX_AGU_AUX_MOD3 (0x5e3) 96 | #define AUX_AGU_AUX_MOD4 (0x5e4) 97 | #define AUX_AGU_AUX_MOD5 (0x5e5) 98 | #define AUX_AGU_AUX_MOD6 (0x5e6) 99 | #define AUX_AGU_AUX_MOD7 (0x5e7) 100 | #define AUX_AGU_AUX_MOD8 (0x5e8) 101 | #define AUX_AGU_AUX_MOD9 (0x5e9) 102 | #define AUX_AGU_AUX_MOD10 (0x5ea) 103 | #define AUX_AGU_AUX_MOD11 (0x5eb) 104 | #define AUX_AGU_AUX_MOD12 (0x5ec) 105 | #define AUX_AGU_AUX_MOD13 (0x5ed) 106 | #define AUX_AGU_AUX_MOD14 (0x5ee) 107 | #define AUX_AGU_AUX_MOD15 (0x5ef) 108 | #define AUX_AGU_AUX_MOD16 (0x5f0) 109 | #define AUX_AGU_AUX_MOD17 (0x5f1) 110 | #define AUX_AGU_AUX_MOD18 (0x5f2) 111 | #define AUX_AGU_AUX_MOD19 (0x5f3) 112 | #define AUX_AGU_AUX_MOD20 (0x5f4) 113 | #define AUX_AGU_AUX_MOD21 (0x5f5) 114 | #define AUX_AGU_AUX_MOD22 (0x5f6) 115 | #define AUX_AGU_AUX_MOD23 (0x5f7) 116 | 117 | #define AUX_XCCM_BASE (0x5f8) 118 | #define AUX_YCCM_BASE (0x5f9) 119 | 120 | 121 | /** \todo add em series specific definitions here */ 122 | 123 | #ifdef __cplusplus 124 | extern "C" { 125 | #endif 126 | 127 | #ifdef __cplusplus 128 | } 129 | #endif 130 | 131 | #endif /* _ARC_HAL_EM_H_ */ 132 | 133 | /** @} */ 134 | -------------------------------------------------------------------------------- /device/designware/spi/dw_spi_hal.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-06-25 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup DEVICE_DW_SPI 37 | * \brief DesignWare SPI driver hardware description related header file 38 | * \details detailed hardware related definitions of DesignWare SPI driver 39 | */ 40 | 41 | #ifndef _DEVICE_DW_SPI_HAL_H_ 42 | #define _DEVICE_DW_SPI_HAL_H_ 43 | 44 | #include "device/designware/spi/dw_spi_hal_cfg.h" 45 | 46 | /* DW APB SPI bit definitions */ 47 | 48 | /** 49 | * \name DesignWare SPI HAL CTRL0 Macros 50 | * \brief DesignWare SPI hal ctrl0 macros, 51 | * include dfs, scph, scppl, tmod, etc 52 | * @{ 53 | */ 54 | #define DW_SPI_CTRLR0_DFS_MASK (0xf) 55 | 56 | #define DW_SPI_CTRLR0_SC_OFS (6) 57 | #define DW_SPI_CTRLR0_SC_MASK (0xC0) 58 | #define DW_SPI_CTRLR0_SCPH_HIGH (0x40) 59 | #define DW_SPI_CTRLR0_SCPH_LOW (0) 60 | #define DW_SPI_CTRLR0_SCPOL_HIGH (0x80) 61 | #define DW_SPI_CTRLR0_SCPOL_LOW (0) 62 | 63 | #define DW_SPI_CTRLR0_TMOD_MASK (0x300) 64 | #define DW_SPI_TMOD_TRANSMIT_RECEIVE (0) 65 | #define DW_SPI_TMOD_TRANSMIT_ONLY (0x100) 66 | #define DW_SPI_TMOD_RECEIVE_ONLY (0x200) 67 | #define DW_SPI_TMOD_EEPROM_READ_ONLY (0x300) 68 | 69 | #define DW_SPI_CTRLR0_FRF_MOTOROLA (0x0) 70 | #define DW_SPI_CTRLR0_FRF_TI (0x10) 71 | #define DW_SPI_CTRLR0_FRF_MICROWIRE (0x20) 72 | 73 | #define DW_SPI_CTRLR0_SLV_OE_DISABLE (1<<10) 74 | #define DW_SPI_CTRLR0_SLV_OE_ENABLE (0) 75 | 76 | 77 | /** @} */ 78 | 79 | /** 80 | * \name DesignWare SPI HAL ISR Flags 81 | * \brief DesignWare SPI hal Interrupt Status Flags 82 | * @{ 83 | */ 84 | #define DW_SPI_TX_OVERFLOW_ERROR (0x2) 85 | #define DW_SPI_RX_UNDERFLOW_ERROR (0x4) 86 | #define DW_SPI_RX_OVERFLOW_ERROR (0x8) 87 | 88 | #define DW_SPI_ISR_RX_FIFO_INT_MASK (0x10) 89 | #define DW_SPI_ISR_TX_FIFO_INT_MASK (0x1) 90 | #define DW_SPI_ISR_TX_OVERFLOW_INT_MASK (0x2) 91 | #define DW_SPI_ISR_RX_UNDERFLOW_INT_MASK (0x4) 92 | #define DW_SPI_ISR_RX_OVERFLOW_INT_MASK (0x8) 93 | /** @} */ 94 | 95 | /** 96 | * \name DesignWare SPI HAL SR Flags 97 | * \brief DesignWare SPI hal Status Flags 98 | * @{ 99 | */ 100 | #define DW_SPI_SR_DCOL (0x40) 101 | #define DW_SPI_SR_TXE (0x20) 102 | #define DW_SPI_SR_RFF (0x10) 103 | #define DW_SPI_SR_RFNE (0x8) 104 | #define DW_SPI_SR_TFE (0x4) 105 | #define DW_SPI_SR_TFNF (0x2) 106 | #define DW_SPI_SR_BUSY (0x1) 107 | /** @} */ 108 | 109 | /** 110 | * \name DesignWare SPI HAL SSI Enable Macros 111 | * \brief DesignWare SPI hal ssi enable macros 112 | * @{ 113 | */ 114 | /* Macros */ 115 | #define DW_SPI_SSI_ENABLE (1) /*!< SSI Enable */ 116 | #define DW_SPI_SSI_DISABLE (0) /*!< SSI Disable */ 117 | /** @} */ 118 | 119 | /** 120 | * \name DesignWare SPI HAL IMR Macros 121 | * \brief DesignWare SPI hal interrupt mask macros 122 | * @{ 123 | */ 124 | #define DW_SPI_IMR_MSTIM (0x20) /*!< Multi-Master Contention Interrupt Mask */ 125 | #define DW_SPI_IMR_RXFIM (0x10) /*!< Receive FIFO Full Interrupt Mask */ 126 | #define DW_SPI_IMR_RXOIM (0x08) /*!< Receive FIFO Overflow Interrupt Mask */ 127 | #define DW_SPI_IMR_RXUIM (0x04) /*!< Receive FIFO Underflow Interrupt Mask */ 128 | #define DW_SPI_IMR_TXOIM (0x02) /*!< Transmit FIFO Overflow Interrupt Mask */ 129 | #define DW_SPI_IMR_TXEIM (0x01) /*!< Transmit FIFO Empty Interrupt Mask */ 130 | 131 | #define DW_SPI_IMR_XFER (DW_SPI_IMR_TXEIM|DW_SPI_IMR_RXFIM|DW_SPI_IMR_TXOIM|DW_SPI_IMR_RXOIM|DW_SPI_IMR_RXUIM) 132 | /** @} */ 133 | 134 | #define DW_SPI_SSI_IDLE (1) 135 | #define DW_SPI_SPI_TRANSMIT (1) 136 | #define DW_SPI_SPI_RECEIVE (2) 137 | #define DW_SPI_SSI_MASTER (1) 138 | #define DW_SPI_SSI_SLAVE (0) 139 | 140 | 141 | #endif /* _DEVICE_DW_SPI_HAL_H_ */ 142 | -------------------------------------------------------------------------------- /arc/startup/arc_cxx_support.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2012-2014 Wind River Systems, Inc. 3 | * 4 | * Licensed under the Apache License, Version 2.0 (the "License"); 5 | * you may not use this file except in compliance with the License. 6 | * You may obtain a copy of the License at 7 | * 8 | * http://www.apache.org/licenses/LICENSE-2.0 9 | * 10 | * Unless required by applicable law or agreed to in writing, software 11 | * distributed under the License is distributed on an "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | * See the License for the specific language governing permissions and 14 | * limitations under the License. 15 | */ 16 | 17 | /* ------------------------------------------ 18 | * Copyright (c) 2015, Synopsys, Inc. All rights reserved. 19 | 20 | * Redistribution and use in source and binary forms, with or without modification, 21 | * are permitted provided that the following conditions are met: 22 | 23 | * 1) Redistributions of source code must retain the above copyright notice, this 24 | * list of conditions and the following disclaimer. 25 | 26 | * 2) Redistributions in binary form must reproduce the above copyright notice, 27 | * this list of conditions and the following disclaimer in the documentation and/or 28 | * other materials provided with the distribution. 29 | 30 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 31 | * be used to endorse or promote products derived from this software without 32 | * specific prior written permission. 33 | 34 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 35 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 36 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 37 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 38 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 39 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 40 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 41 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 42 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 43 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 44 | * 45 | * \version 2016.05 46 | * \date 2016-03-02 47 | * \author Wayne Ren(wei.ren@synopsys.com) 48 | --------------------------------------------- */ 49 | #include "embARC_BSP_config.h" 50 | #if defined(__GNU__) 51 | /* embARC's GNU C++ support takes reference from Zephyr (cpp_xxx.c) */ 52 | 53 | /** 54 | * @file - Constructor module 55 | * @brief 56 | * The ctors section contains a list of function pointers that execute the 57 | * C++ constructors of static global objects. These must be executed before 58 | * the application's main() routine. 59 | * 60 | * NOTE: Not all compilers put those function pointers into the ctors section; 61 | * some put them into the init_array section instead. 62 | */ 63 | 64 | /* What a constructor function pointer looks like */ 65 | 66 | typedef void (*CtorFuncPtr)(void); 67 | 68 | /* Constructor function pointer list is generated by the linker script. */ 69 | 70 | extern CtorFuncPtr __CTOR_LIST__[]; 71 | extern CtorFuncPtr __CTOR_END__[]; 72 | 73 | /** 74 | * 75 | * @brief Invoke all C++ style global object constructors 76 | * 77 | * This routine is invoked before the execution of the 78 | * application's main(). 79 | */ 80 | void __do_global_ctors_aux(void) 81 | { 82 | unsigned int nCtors; 83 | 84 | nCtors = (unsigned int)__CTOR_LIST__[0]; 85 | 86 | while (nCtors >= 1) { 87 | __CTOR_LIST__[nCtors--](); 88 | } 89 | } 90 | 91 | typedef void (*DtorFuncPtr)(void); 92 | 93 | extern DtorFuncPtr __DTOR_LIST__[]; 94 | extern DtorFuncPtr __DTOR_END__[]; 95 | 96 | /** 97 | * 98 | * @brief Invoke all C++ style global object destructors 99 | * 100 | * This routine is invoked after the execution of the 101 | * application's main(). 102 | */ 103 | void __do_global_dtors_aux(void) 104 | { 105 | unsigned int nDtors; 106 | unsigned int i; 107 | 108 | nDtors = (unsigned int)__DTOR_LIST__[0]; 109 | i = 0; 110 | 111 | while (i <= nDtors) { 112 | __DTOR_LIST__[i++](); 113 | } 114 | } 115 | 116 | void *__dso_handle = 0; 117 | 118 | /** 119 | * @brief Register destructor for a global object 120 | * 121 | * @param destructor the global object destructor function 122 | * @param objptr global object pointer 123 | * @param dso Dynamic Shared Object handle for shared libraries 124 | * 125 | * Function does nothing at the moment, assuming the global objects 126 | * do not need to be deleted 127 | * 128 | * @return N/A 129 | */ 130 | int __cxa_atexit(void (*destructor)(void *), void *objptr, void *dso) 131 | { 132 | return 0; 133 | } 134 | 135 | typedef void (*func_ptr)(void); 136 | 137 | extern func_ptr __init_array_start[0]; 138 | extern func_ptr __init_array_end[0]; 139 | 140 | /** 141 | * @brief Execute initialization routines referenced in .init_array section 142 | * 143 | * @return N/A 144 | */ 145 | void __do_init_array_aux(void) 146 | { 147 | for (func_ptr *func = __init_array_start; 148 | func < __init_array_end; 149 | func++) { 150 | (*func)(); 151 | } 152 | } 153 | 154 | /** 155 | * @brief Stub for pure virtual functions 156 | * 157 | * This routine is needed for linking C++ code that uses pure virtual 158 | * functions. 159 | * 160 | * @return N/A 161 | */ 162 | void __cxa_pure_virtual(void) 163 | { 164 | while (1) { 165 | ; 166 | } 167 | } 168 | #endif 169 | -------------------------------------------------------------------------------- /device/designware/gpio/dw_gpio.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-22 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \brief designware gpio driver 37 | * \ingroup DEVICE_DW_GPIO 38 | * \brief Designware GPIO driver header file 39 | */ 40 | 41 | #ifndef _DW_GPIO_H_ 42 | #define _DW_GPIO_H_ 43 | 44 | #include "device/device_hal/inc/dev_gpio.h" 45 | 46 | #include "inc/arc/arc_exception.h" 47 | 48 | #define DW_GPIO_PORT_A (0x00) 49 | #define DW_GPIO_PORT_B (0x01) 50 | #define DW_GPIO_PORT_C (0x02) 51 | #define DW_GPIO_PORT_D (0x03) 52 | 53 | #define DW_GPIO_INT_ACT_LOW GPIO_INT_ACTIVE_LOW 54 | #define DW_GPIO_INT_ACT_HIGH GPIO_INT_ACTIVE_HIGH 55 | 56 | #define DW_GPIO_INT_LEVEL_TRIG GPIO_INT_LEVEL_TRIG 57 | #define DW_GPIO_INT_EDGE_TRIG GPIO_INT_EDGE_TRIG 58 | 59 | #define DW_GPIO_INT_NO_DEBOUNCE GPIO_INT_NO_DEBOUNCE 60 | #define DW_GPIO_INT_DEBOUNCE GPIO_INT_DEBOUNCE 61 | 62 | #define DW_GPIO_ALL_ZERO (0x0) 63 | #define DW_GPIO_ALL_ONE (0xffffffff) 64 | #define DW_GPIO_MASK_ALL (0xffffffff) 65 | #define DW_GPIO_INPUT_ALL (0x0) 66 | #define DW_GPIO_OUTPUT_ALL (0xffffffff) 67 | 68 | /** 69 | * \name DesignWare GPIO Register Structure 70 | * \brief contains definitions of DesignWare GPIO register structure. 71 | * @{ 72 | */ 73 | typedef struct port_ctrl { 74 | uint32_t DR; 75 | uint32_t DDR; 76 | uint32_t CTRL; 77 | } PORT_CTRL; 78 | 79 | /* DW GPIO PORTS Registers */ 80 | typedef volatile struct dw_gpio_reg { 81 | PORT_CTRL SWPORTS[4]; 82 | uint32_t INTEN; /*!< (0x30) */ 83 | uint32_t INTMASK; /*!< (0x34) */ 84 | uint32_t INTTYPE_LEVEL; /*!< (0x38) */ 85 | uint32_t INT_POLARITY; /*!< (0x3c) */ 86 | uint32_t INTSTATUS; /*!< (0x40) */ 87 | uint32_t RAW_INTSTATUS; /*!< (0x44) */ 88 | uint32_t DEBOUNCE; /*!< (0x48) */ 89 | uint32_t PORTA_EOI; /*!< (0x4c) */ 90 | uint32_t EXT_PORTS[4]; /*!< (0x50) -A 91 | (0x54) -B 92 | (0x58) -C 93 | (0x5c) -D */ 94 | uint32_t LS_SYNC; /*!< (0x60) */ 95 | uint32_t ID_CODE; /*!< (0x64) */ 96 | uint32_t RESERVED_3; /*!< (0x68) */ 97 | uint32_t VER_ID_CODE; /*!< (0x6c) */ 98 | uint32_t CONFIG_REG2; /*!< (0x70) */ 99 | uint32_t CONFIG_REG1; /*!< (0x74) */ 100 | } DW_GPIO_REG, *DW_GPIO_REG_PTR; 101 | /** @} */ 102 | 103 | /** interrupt handler for each port bit */ 104 | typedef struct dw_gpio_bit_isr { 105 | uint32_t int_bit_max_cnt; /*!< max bit count for each port */ 106 | DEV_GPIO_HANDLER *int_bit_handler_ptr; /*!< interrupt handler pointer */ 107 | } DW_GPIO_BIT_ISR, * DW_GPIO_BIT_ISR_PTR; 108 | 109 | /** 110 | * \brief DesignWare GPIO control structure definition 111 | * \details implement of dev_gpio_info::gpio_ctrl 112 | */ 113 | typedef struct dw_gpio_port { 114 | uint32_t no; /*!< gpio port number */ 115 | DW_GPIO_REG_PTR regs; /*!< gpio port register */ 116 | uint32_t intno; /*!< gpio interrupt vector number */ 117 | uint32_t valid_bit_mask; /*!< valid bit mask of gpio port */ 118 | INT_HANDLER int_handler; /*!< gpio interrupt handler */ 119 | DW_GPIO_BIT_ISR_PTR gpio_bit_isr; /*!< gpio bit handler struct */ 120 | } DW_GPIO_PORT, *DW_GPIO_PORT_PTR; 121 | 122 | #ifdef __cplusplus 123 | extern "C" { 124 | #endif 125 | 126 | /** 127 | * \name DesignWare GPIO Function Declaration 128 | * \brief contains declarations of designware gpio functions. 129 | * \details This are only used in gpio object implementation source file 130 | * @{ 131 | */ 132 | extern int32_t dw_gpio_open(DEV_GPIO *gpio_obj, uint32_t dir); 133 | extern int32_t dw_gpio_close(DEV_GPIO *gpio_obj); 134 | extern int32_t dw_gpio_read(DEV_GPIO *gpio_obj, uint32_t *val, uint32_t mask); 135 | extern int32_t dw_gpio_write(DEV_GPIO *gpio_obj, uint32_t val, uint32_t mask); 136 | extern int32_t dw_gpio_control(DEV_GPIO *gpio_obj, uint32_t ctrl_cmd, void *param); 137 | extern int32_t dw_gpio_isr_handler(DEV_GPIO *gpio_obj, void *ptr); 138 | 139 | #ifdef __cplusplus 140 | } 141 | #endif 142 | 143 | /** @} */ 144 | 145 | #endif /* _DW_GPIO_H_ */ 146 | -------------------------------------------------------------------------------- /example/hello/mwdt/Makefile: -------------------------------------------------------------------------------- 1 | ## Small Functions ## 2 | get_csrcs = $(foreach subdir, $(1), $(wildcard $(subdir)/*.c $(subdir)/*.C)) 3 | get_asmsrcs = $(foreach subdir, $(1), $(wildcard $(subdir)/*.s $(subdir)/*.S)) 4 | get_cxxsrcs = $(foreach subdir, $(1), $(wildcard $(subdir)/*.cpp $(subdir)/*.CPP)) 5 | ## MAKEFILE COMPILE MESSAGE CONTROL ## 6 | ECHO=echo 7 | ifeq ($(V),1) 8 | Q= 9 | else 10 | Q=@ 11 | endif 12 | 13 | ## Suppress All Message ## 14 | ifeq ($(SILENT), 1) 15 | TRACE_CREATE_DIR = 16 | TRACE_COMPILE = 17 | TRACE_ASSEMBLE = 18 | TRACE_LINK = 19 | TRACE_ARCHIVE = 20 | TRACE_GEN_LINKFILE = 21 | ## Overwrite Q Value set by V option ## 22 | override Q=@ 23 | else 24 | TRACE_CREATE_DIR = @$(ECHO) "Creating Directory : " $(@D) 25 | TRACE_COMPILE = @$(ECHO) "Compiling : " $< 26 | TRACE_ASSEMBLE = @$(ECHO) "Assembling : " $< 27 | TRACE_LINK = @$(ECHO) "Linking : " $@ 28 | TRACE_ARCHIVE = @$(ECHO) "Archiving : " $@ 29 | TRACE_GEN_LINKFILE = @$(ECHO) "Generating Linkfile : " $@ 30 | endif 31 | ### 32 | 33 | APPL_FULL_NAME = hello 34 | ### 35 | # Compiler Settings 36 | ### 37 | CC=ccac 38 | OBJCOPY=elf2bin 39 | DUMP=elfdumpac 40 | AR=arac 41 | SIZE=sizeac 42 | DBG=mdb 43 | 44 | ### 45 | # Configurations need to be changed according to your environment 46 | ### 47 | DEBUG = 1 48 | EMBARC_BSP_ROOT = ../../.. 49 | ARC_CORE_CONFIG_DIR = . 50 | 51 | COMPILE_OPT_ARGFILE = $(ARC_CORE_CONFIG_DIR)/ccac.arg 52 | APP_LINK_FILE = $(ARC_CORE_CONFIG_DIR)/arc_core.ld 53 | 54 | ### 55 | # embARC EMSK BSP source directories configuration 56 | ### 57 | EMBARC_EMSK_BSP_ROOT = $(EMBARC_BSP_ROOT)/board/emsk 58 | 59 | EMBARC_EMSK_BSP_CSRC_DIRS = $(EMBARC_EMSK_BSP_ROOT)/common \ 60 | $(EMBARC_EMSK_BSP_ROOT)/gpio \ 61 | $(EMBARC_EMSK_BSP_ROOT)/iic \ 62 | $(EMBARC_EMSK_BSP_ROOT)/spi \ 63 | $(EMBARC_EMSK_BSP_ROOT)/uart 64 | 65 | EMBARC_BSP_CSRC_DIRS = $(EMBARC_BSP_ROOT)/arc/startup $(EMBARC_BSP_ROOT)/arc \ 66 | $(EMBARC_BSP_ROOT)/board $(EMBARC_EMSK_BSP_CSRC_DIRS) \ 67 | $(EMBARC_BSP_ROOT)/device/designware/gpio \ 68 | $(EMBARC_BSP_ROOT)/device/designware/iic \ 69 | $(EMBARC_BSP_ROOT)/device/designware/spi \ 70 | $(EMBARC_BSP_ROOT)/device/designware/uart \ 71 | $(EMBARC_BSP_ROOT)/common 72 | 73 | EMBARC_BSP_ASMSRC_DIRS = $(EMBARC_BSP_ROOT)/arc/startup $(EMBARC_BSP_ROOT)/arc 74 | EMBARC_BSP_INC_DIRS = $(EMBARC_BSP_ROOT) 75 | 76 | ### 77 | # embARC EMSK BSP c/asm source files configuration 78 | ## 79 | EMBARC_EMSK_BSP_CSRCS = $(call get_csrcs, $(EMBARC_BSP_CSRC_DIRS)) 80 | EMBARC_EMSK_BSP_ASMSRCS = $(call get_asmsrcs, $(EMBARC_BSP_ASMSRC_DIRS)) 81 | 82 | # C/ASM source files 83 | # Defined your own extra c/asm source code files, and include folders 84 | ### 85 | EXTRA_CSRCS = 86 | 87 | EXTRA_ASMSRCS = 88 | 89 | EXTRA_INC_DIRS = 90 | 91 | ### 92 | # All C/ASM source files 93 | ### 94 | ALL_C_SRCS = ../main.c \ 95 | $(EXTRA_CSRCS) \ 96 | $(EMBARC_EMSK_BSP_CSRCS) 97 | 98 | ALL_ASM_SRCS = $(EXTRA_ASMSRCS) $(EMBARC_EMSK_BSP_ASMSRCS) 99 | ALL_INC_DIRS = . $(ARC_CORE_CONFIG_DIR) $(EMBARC_BSP_INC_DIRS) \ 100 | $(EXTRA_INC_DIRS) 101 | ### 102 | # Compiler Options 103 | ### 104 | 105 | ifeq ($(DEBUG), 1) 106 | COMMON_COMPILE_OPT += -g 107 | endif 108 | 109 | ALL_INCLUDES = $(foreach dir,$(ALL_INC_DIRS),-I$(dir)) 110 | ALL_DEFINES = -DMID_COMMON $(OS_FREERTOS_DEFINES) 111 | 112 | LMAP_OPTION = -Hldopt=-Coutput=$(APPL_FULL_NAME).map -Hldopt=-Csections -Hldopt=-Ccrossfunc -Hldopt=-Csize -zstdout 113 | MKDEP_OPT = -MMD -MT $@ -MF $@.d 114 | COMMON_COMPILE_OPT += -O2 -Hnoccm -Hnosdata -Wincompatible-pointer-types -Hnocopyr $(ALL_INCLUDES) $(MKDEP_OPT) $(ALL_DEFINES) 115 | 116 | CFLAGS = @$(COMPILE_OPT_ARGFILE) $(COMMON_COMPILE_OPT) -Hnocplus 117 | CXXFLAGS = @$(COMPILE_OPT_ARGFILE) $(COMMON_COMPILE_OPT) 118 | ASFLAGS = @$(COMPILE_OPT_ARGFILE) $(COMMON_COMPILE_OPT) -Hasmcpp 119 | LDFLAGS = @$(COMPILE_OPT_ARGFILE) -Hnocopyr -Hnosdata -Hnocrt \ 120 | $(LMAP_OPTION) $(APP_LINK_FILE) 121 | LDFLAGS_LIBS = -Hldopt=-Bgrouplib 122 | 123 | DBG_HW_FLAGS = -nooptions -nogoifmain -toggle=include_local_symbols=1 -digilent 124 | 125 | ## Run target options 126 | ifeq ($(MAKECMDGOALS),run) 127 | DBG_HW_FLAGS += -run 128 | endif 129 | # 130 | # Define all object files. 131 | # 132 | COBJS = $(addsuffix .o, $(ALL_C_SRCS)) 133 | CXXOBJS = $(addsuffix .o, $(ALL_CXX_SRCS)) 134 | ASMOBJS = $(addsuffix .o, $(ALL_ASM_SRCS)) 135 | ALLOBJS = $(ASMOBJS) $(COBJS) $(CXXOBJS) 136 | ALLDEPS = $(ALLOBJS:.o=.o.d) 137 | 138 | .PHONY : all bin hex size clean run gui 139 | 140 | all : $(APPL_FULL_NAME).elf 141 | 142 | bin : $(APPL_FULL_NAME).bin 143 | 144 | hex : $(APPL_FULL_NAME).hex 145 | 146 | size : $(APPL_FULL_NAME).elf 147 | @$(ECHO) "Print Application Program Size" 148 | $(Q)$(SIZE) $(SIZE_OPT) $< 149 | 150 | $(APPL_FULL_NAME).hex : $(APPL_FULL_NAME).elf 151 | @$(ECHO) "Generating Intel Hex File $@" 152 | $(Q)$(OBJCOPY) -O ihex $< $@ 153 | 154 | $(APPL_FULL_NAME).bin : $(APPL_FULL_NAME).elf 155 | @$(ECHO) "Generating Binary $@" 156 | $(Q)$(OBJCOPY) -O binary $< $@ 157 | 158 | $(APPL_FULL_NAME).elf : $(ALLOBJS) Makefile 159 | $(TRACE_LINK) 160 | $(Q)$(CC) $(LDFLAGS) $(ALLOBJS) $(LDFLAGS_LIBS) -o $@ 161 | 162 | $(COBJS) : %.o : % Makefile 163 | $(TRACE_COMPILE) 164 | $(Q)$(CC) -c $(CFLAGS) $< -o $@ 165 | 166 | $(CXXOBJS) : %.o : % Makefile 167 | $(TRACE_COMPILE) 168 | $(Q)$(CC) -c $(CXXFLAGS) $< -o $@ 169 | 170 | $(ASMOBJS) : %.o : % Makefile 171 | $(TRACE_ASSEMBLE) 172 | $(Q)$(CC) -c $(ASFLAGS) $< -o $@ 173 | 174 | run : $(APPL_FULL_NAME).elf 175 | @$(ECHO) "Download & Run $<" 176 | $(DBG) $(DBG_HW_FLAGS) $< 177 | 178 | gui : $(APPL_FULL_NAME).elf 179 | @$(ECHO) "Download & Debug $<" 180 | $(DBG) $(DBG_HW_FLAGS) $< 181 | 182 | clean : 183 | @$(ECHO) "Clean all object files and dependency files" 184 | -$(Q)rm -rf $(ALLOBJS) 185 | -$(Q)rm -rf $(ALLDEPS) 186 | -$(Q)rm -rf $(APPL_FULL_NAME).elf $(APPL_FULL_NAME).map 187 | -$(Q)rm -rf openocd.log .sc.project *.log 188 | @$(ECHO) "Clean finished" 189 | 190 | -include $(ALLDEPS) -------------------------------------------------------------------------------- /arc/arc_exc_asm.S: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-15 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup ARC_HAL_EXCEPTION_CPU 37 | * \brief assembly part of exception and interrupt processing 38 | */ 39 | 40 | /** 41 | * \addtogroup ARC_HAL_EXCEPTION_CPU 42 | * @{ 43 | */ 44 | 45 | /* function documentation */ 46 | /** 47 | * \fn void exc_entry_cpu(void) 48 | * \brief default entry of CPU exceptions, such as TLB miss and swap. 49 | * 50 | * \fn void exc_entry_int(void) 51 | * \brief normal interrupt exception entry. 52 | * In default, all interrupt exceptions are installed with normal entry. 53 | * If FIRQ is required, exc_entry_firq should be the entry. 54 | * 55 | * \fn void exc_entry_firq(void) 56 | * \brief firq exception entry 57 | */ 58 | /** }@ */ 59 | 60 | /** @cond EXCEPTION_ASM */ 61 | 62 | #define __ASSEMBLY__ 63 | #include "embARC_BSP_config.h" 64 | #include "inc/arc/arc.h" 65 | #include "inc/arc/arc_asm_common.h" 66 | 67 | .file "arc_exc_asm.S" 68 | 69 | /* entry for cpu exception handling */ 70 | .text 71 | .global exc_entry_cpu 72 | .weak exc_entry_cpu 73 | .align 4 74 | exc_entry_cpu: 75 | 76 | EXCEPTION_PROLOGUE 77 | 78 | mov r3, sp /* as exception handler's para(exc_frame) */ 79 | 80 | /* exc_nest_count +1 */ 81 | ld r0, [exc_nest_count] 82 | add r0, r0, 1 83 | st r0, [exc_nest_count] 84 | 85 | /* find the exception cause */ 86 | lr r0, [AUX_ECR] 87 | lsr r0, r0, 16 88 | bmsk r0, r0, 7 89 | mov r1, exc_int_handler_table 90 | ld.as r2, [r1, r0] 91 | 92 | mov r0, r3 93 | jl [r2] /* jump to exception handler where interrupts are not allowed! */ 94 | 95 | /* interrupts are not allowed */ 96 | exc_return: 97 | 98 | /* exc_nest_count -1 */ 99 | ld r0, [exc_nest_count] 100 | sub r0, r0, 1 101 | st r0, [exc_nest_count] 102 | 103 | EXCEPTION_EPILOGUE 104 | rtie 105 | 106 | 107 | /****** entry for normal interrupt exception handling ******/ 108 | .global exc_entry_int 109 | .weak exc_entry_int 110 | .align 4 111 | exc_entry_int: 112 | clri /* disable interrupt */ 113 | 114 | #if ARC_FEATURE_FIRQ == 1 115 | #if ARC_FEATURE_RGF_NUM_BANKS > 1 116 | lr r0, [AUX_IRQ_ACT] /* check whether it is P0 interrupt */ 117 | btst r0, 0 118 | bnz exc_entry_firq 119 | #else 120 | PUSH r10 121 | lr r10, [AUX_IRQ_ACT] 122 | btst r10, 0 123 | POP r10 124 | bnz exc_entry_firq 125 | #endif 126 | #endif 127 | INTERRUPT_PROLOGUE /* save scratch regs, this will be affected */ 128 | 129 | 130 | /* exc_nest_count +1 */ 131 | ld r0, [exc_nest_count] 132 | add r0, r0, 1 133 | st r0, [exc_nest_count] 134 | 135 | 136 | lr r0, [AUX_IRQ_CAUSE] 137 | mov r1, exc_int_handler_table 138 | ld.as r2, [r1, r0] /* r2 = _kernel_exc_tbl + irqno *4 */ 139 | 140 | /* for the case of software triggered interrupt */ 141 | lr r3, [AUX_IRQ_HINT] 142 | cmp r3, r0 143 | bne.d irq_hint_handled 144 | xor r3, r3, r3 145 | sr r3, [AUX_IRQ_HINT] 146 | irq_hint_handled: 147 | seti /* enable higher priority interrupt */ 148 | 149 | mov r0, sp 150 | jl [r2] /* jump to interrupt handler */ 151 | 152 | /* no interrupts are allowed from here */ 153 | int_return: 154 | clri /* disable interrupt */ 155 | 156 | /* exc_nest_count -1 */ 157 | ld r0, [exc_nest_count] 158 | sub r0, r0, 1 159 | st r0, [exc_nest_count] 160 | 161 | INTERRUPT_EPILOGUE 162 | rtie 163 | 164 | /****** entry for fast irq exception handling ******/ 165 | .global exc_entry_firq 166 | .weak exc_entry_firq 167 | .align 4 168 | exc_entry_firq: 169 | clri /* disable interrupt */ 170 | SAVE_FIQ_EXC_REGS 171 | 172 | /* exc_nest_count +1 */ 173 | ld r0, [exc_nest_count] 174 | add r0, r0, 1 175 | st r0, [exc_nest_count] 176 | 177 | lr r0, [AUX_IRQ_CAUSE] 178 | mov r1, exc_int_handler_table 179 | ld.as r2, [r1, r0] /* r2 = _kernel_exc_tbl + irqno *4 */ 180 | 181 | /* for the case of software triggered interrupt */ 182 | lr r3, [AUX_IRQ_HINT] 183 | cmp r3, r0 184 | bne.d firq_hint_handled 185 | xor r3, r3, r3 186 | sr r3, [AUX_IRQ_HINT] 187 | firq_hint_handled: 188 | 189 | jl [r2] /* jump to interrupt handler */ 190 | 191 | /* no interrupts are allowed from here */ 192 | firq_return: 193 | 194 | /* exc_nest_count -1 */ 195 | ld r0, [exc_nest_count] 196 | sub r0, r0, 1 197 | st r0, [exc_nest_count] 198 | 199 | RESTORE_FIQ_EXC_REGS 200 | rtie 201 | 202 | /** @endcond */ 203 | -------------------------------------------------------------------------------- /arc/arc_timer.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-15 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup ARC_HAL_MISC_TIMER 37 | * \brief implementation of internal timer related functions 38 | * \todo RTC support should be improved if RTC is enabled 39 | */ 40 | #include "inc/arc/arc_timer.h" 41 | #include "inc/arc/arc.h" 42 | #include "inc/arc/arc_builtin.h" 43 | 44 | /** 45 | * \brief check whether the specific timer present 46 | * \param[in] no timer number 47 | * \retval 1 present 48 | * \retval 0 not present 49 | */ 50 | int32_t arc_timer_present(const uint32_t no) 51 | { 52 | uint32_t bcr = _arc_aux_read(AUX_BCR_TIMERS); 53 | switch (no) { 54 | case TIMER_0: 55 | bcr = (bcr >> 8) & 1; 56 | break; 57 | case TIMER_1: 58 | bcr = (bcr >> 9) & 1; 59 | break; 60 | case TIMER_RTC: 61 | bcr = (bcr >> 10) & 1; 62 | break; 63 | default: 64 | bcr = 0; 65 | /* illegal argument so return false */ 66 | break; 67 | } 68 | 69 | return (int)bcr; 70 | } 71 | 72 | /** 73 | * \brief start the specific timer 74 | * \param[in] no timer number 75 | * \param[in] mode timer mode 76 | * \param[in] val timer limit value (not for RTC) 77 | * \return 0 success, -1 failure 78 | */ 79 | int32_t arc_timer_start(const uint32_t no, const uint32_t mode, const uint32_t val) 80 | { 81 | if (arc_timer_present(no) == 0) { 82 | return -1; 83 | } 84 | 85 | switch (no) { 86 | case TIMER_0: 87 | _arc_aux_write(AUX_TIMER0_CTRL, 0); 88 | _arc_aux_write(AUX_TIMER0_LIMIT, val); 89 | _arc_aux_write(AUX_TIMER0_CTRL, mode); 90 | _arc_aux_write(AUX_TIMER0_CNT, 0); 91 | break; 92 | case TIMER_1: 93 | _arc_aux_write(AUX_TIMER1_CTRL, 0); 94 | _arc_aux_write(AUX_TIMER1_LIMIT, val); 95 | _arc_aux_write(AUX_TIMER1_CTRL, mode); 96 | _arc_aux_write(AUX_TIMER1_CNT, 0); 97 | break; 98 | case TIMER_RTC: 99 | _arc_aux_write(AUX_RTC_CTRL, mode); 100 | break; 101 | default: 102 | return -1; 103 | } 104 | 105 | return 0; 106 | } 107 | 108 | /** 109 | * \brief stop and clear the specific timer 110 | * 111 | * \param[in] no timer number 112 | * \return 0 success, -1 failure 113 | */ 114 | int32_t arc_timer_stop(const uint32_t no) 115 | { 116 | if (arc_timer_present(no) == 0) { 117 | return -1; 118 | } 119 | 120 | switch (no) { 121 | case TIMER_0 : 122 | _arc_aux_write(AUX_TIMER0_CTRL, 0); 123 | _arc_aux_write(AUX_TIMER0_LIMIT,0); 124 | _arc_aux_write(AUX_TIMER0_CNT, 0); 125 | break; 126 | case TIMER_1: 127 | _arc_aux_write(AUX_TIMER1_CTRL, 0); 128 | _arc_aux_write(AUX_TIMER1_LIMIT,0); 129 | _arc_aux_write(AUX_TIMER1_CNT, 0); 130 | break; 131 | case TIMER_RTC: 132 | _arc_aux_write(AUX_RTC_CTRL, TIMER_RTC_CLEAR); 133 | break; 134 | default: 135 | return -1; 136 | } 137 | 138 | return 0; 139 | } 140 | 141 | /** 142 | * \brief get timer current tick 143 | * 144 | * \param[in] no timer number 145 | * \param[out] val, timer value 146 | * \return 0 success, -1 failure 147 | */ 148 | int32_t arc_timer_current(const uint32_t no, void *val) 149 | { 150 | if (arc_timer_present(no) == 0) { 151 | return -1; 152 | } 153 | 154 | switch (no) { 155 | case TIMER_0 : 156 | *((uint32_t *)val) = _arc_aux_read(AUX_TIMER0_CNT); 157 | break; 158 | case TIMER_1 : 159 | *((uint32_t *)val) = _arc_aux_read(AUX_TIMER1_CNT); 160 | break; 161 | case TIMER_RTC: 162 | *((uint64_t *)val) = _arc_aux_read(AUX_RTC_LOW); 163 | break; 164 | default : 165 | return -1; 166 | } 167 | 168 | return 0; 169 | } 170 | 171 | /** 172 | * \brief clear the interrupt pending bit of timer 173 | * 174 | * \param[in] no timer number 175 | * \return 0 success, -1 failure 176 | */ 177 | int32_t arc_timer_int_clear(const uint32_t no) 178 | { 179 | uint32_t val; 180 | 181 | if (arc_timer_present(no) == 0) { 182 | return -1; 183 | } 184 | 185 | switch (no) { 186 | case TIMER_0 : 187 | val = _arc_aux_read(AUX_TIMER0_CTRL); 188 | val &= ~TIMER_CTRL_IP; 189 | _arc_aux_write(AUX_TIMER0_CTRL, val); 190 | break; 191 | case TIMER_1 : 192 | val = _arc_aux_read(AUX_TIMER1_CTRL); 193 | val &= ~TIMER_CTRL_IP; 194 | _arc_aux_write(AUX_TIMER1_CTRL, val); 195 | break; 196 | default : 197 | return -1; 198 | } 199 | 200 | return 0; 201 | } 202 | 203 | /** 204 | * \brief init internal timer 205 | */ 206 | void arc_timer_init(void) 207 | { 208 | arc_timer_stop(TIMER_0); 209 | arc_timer_stop(TIMER_1); 210 | arc_timer_stop(TIMER_RTC); 211 | } 212 | -------------------------------------------------------------------------------- /inc/embARC_error.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-12-25 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup EMBARC_ERROR 37 | * \brief header file to define common definitions error management 38 | */ 39 | 40 | /** 41 | * \addtogroup EMBARC_ERROR 42 | * @{ 43 | */ 44 | 45 | #ifndef _EMBARC_ERROR_H_ 46 | #define _EMBARC_ERROR_H_ 47 | 48 | #include 49 | #include "inc/arc/arc_builtin.h" 50 | 51 | #ifdef __cplusplus 52 | extern "C" { 53 | #endif 54 | /** 55 | * \name Main Error Code Definitions 56 | * @{ 57 | */ 58 | #define E_OK (0) /*!< ok */ 59 | #define E_SYS (-5) /*!< system error */ 60 | #define E_NOSPT (-9) /*!< unsupported features */ 61 | #define E_RSFN (-10) /*!< reserved function code */ 62 | #define E_RSATR (-11) /*!< reserved attribute */ 63 | #define E_PAR (-17) /*!< parameter error */ 64 | #define E_ID (-18) /*!< invalid ID number */ 65 | #define E_CTX (-25) /*!< context error */ 66 | #define E_MACV (-26) /*!< memory access violation */ 67 | #define E_OACV (-27) /*!< object access violation */ 68 | #define E_ILUSE (-28) /*!< illegal service call use */ 69 | #define E_NOMEM (-33) /*!< insufficient memory */ 70 | #define E_NOID (-34) /*!< no ID number available */ 71 | #define E_NORES (-35) /*!< no resource available */ 72 | #define E_OBJ (-41) /*!< object state error */ 73 | #define E_NOEXS (-42) /*!< non-existent object */ 74 | #define E_QOVR (-43) /*!< queue overflow */ 75 | #define E_RLWAI (-49) /*!< forced release from waiting */ 76 | #define E_TMOUT (-50) /*!< polling failure or timeout */ 77 | #define E_DLT (-51) /*!< waiting object deleted */ 78 | #define E_CLS (-52) /*!< waiting object state changed */ 79 | #define E_WBLK (-57) /*!< non-blocking accepted */ 80 | #define E_BOVR (-58) /*!< buffer overflow */ 81 | #define E_OPNED (-6) /*!< device is opened */ 82 | #define E_CLSED (-7) /*!< device is closed */ 83 | /** @} end of name */ 84 | 85 | /** 86 | * \name Generate And Decompose Error Code 87 | * @{ 88 | */ 89 | #ifndef ERCD 90 | /** generate error code using main error code and sub error code */ 91 | #define ERCD(mercd, sercd) \ 92 | ((uint32_t)((((uint32_t) sercd) << 8) | (((uint32_t) mercd) & 0xffU))) 93 | #endif /* ERCD */ 94 | 95 | #ifndef MERCD 96 | #ifdef INT8_MAX 97 | /** get main error code from error code */ 98 | #define MERCD(ercd) ((uint32_t)((int8_t)(ercd))) 99 | #else /* INT8_MAX */ 100 | /** get main error code from error code */ 101 | #define MERCD(ercd) ((uint32_t)(((uint32_t) ercd) | ~0xffU)) 102 | #endif /* INT8_MAX */ 103 | #endif /* MERCD */ 104 | 105 | #ifndef SERCD 106 | /** get sub error code from error code */ 107 | #define SERCD(ercd) ((uint32_t)((ercd) >> 8)) 108 | #endif /* SERCD */ 109 | /** @} end of name */ 110 | 111 | /** 112 | * \name Check Error 113 | * @{ 114 | */ 115 | /** 116 | * \brief check an expression to see if it is right, and when error 117 | * set the ercd, and goto exit_label 118 | * \param EXPR the expression that need to be checked (==0 failed) 119 | * \param ERCD MUST pass a variable to here to get the error code 120 | * \param ERROR_CODE error code that pass to ERCD 121 | * \param EXIT_LABEL a label to go when error happens 122 | */ 123 | #define CHECK_EXP(EXPR, ERCD, ERROR_CODE, EXIT_LABEL) { \ 124 | if (_arc_rarely(!(EXPR))) { \ 125 | ERCD = (ERROR_CODE); \ 126 | goto EXIT_LABEL; \ 127 | } \ 128 | } 129 | /** 130 | * \brief check an expression to see if it is right, and when error 131 | * directly goto exit_label 132 | * \param EXPR the expression that need to be checked (==0 failed) 133 | * \param EXIT_LABEL a label to go when error happens 134 | * \retval 135 | */ 136 | #define CHECK_EXP_NOERCD(EXPR, EXIT_LABEL) { \ 137 | if (_arc_rarely(!(EXPR))) { \ 138 | goto EXIT_LABEL; \ 139 | } \ 140 | } 141 | /** check cnt bytes align, 1 for aligned, 0 for not-aligned */ 142 | #define CHECK_ALIGN_BYTES(pointer, cnt) ((((uint32_t)(pointer)) & (cnt-1)) == 0) 143 | /** check 2 bytes align, 1 for aligned, 0 for not-aligned */ 144 | #define CHECK_ALIGN_2BYTES(pointer) ((((uint32_t)(pointer)) & 0x1) == 0) 145 | /** check 4 bytes align, 1 for aligned, 0 for not-aligned */ 146 | #define CHECK_ALIGN_4BYTES(pointer) ((((uint32_t)(pointer)) & 0x3) == 0) 147 | /** check 8 bytes align, 1 for aligned, 0 for not-aligned */ 148 | #define CHECK_ALIGN_8BYTES(pointer) ((((uint32_t)(pointer)) & 0x7) == 0) 149 | /** @} end of name */ 150 | 151 | #ifdef __cplusplus 152 | } 153 | #endif 154 | 155 | #endif /* _EMBARC_ERROR_H_ */ 156 | /** @} end of group EMBARC_ERROR */ 157 | -------------------------------------------------------------------------------- /device/designware/uart/dw_uart.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-20 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup DEVICE_DW_UART 37 | * \brief DesignWare UART driver header file 38 | * \details detailed definitions of designware uart driver 39 | */ 40 | 41 | #ifndef _DW_UART_H_ 42 | #define _DW_UART_H_ 43 | 44 | #include "device/device_hal/inc/dev_uart.h" 45 | 46 | #include "inc/arc/arc_exception.h" 47 | 48 | /** 49 | * if this header file is included, 50 | * will indicate that this designware uart device 51 | * is used 52 | */ 53 | #define DEVICE_USE_DESIGNWARE_UART 54 | 55 | /** 56 | * \name DesignWare UART Register Structure 57 | * \brief contains definitions of DesignWare UART register structure. 58 | * @{ 59 | */ 60 | /** 61 | * \brief DesignWare UART register structure 62 | * \details Detailed struct description of DesignWare UART 63 | * block register information, implementation of dev_uart_info::uart_regs 64 | */ 65 | typedef volatile struct dw_uart_reg { 66 | uint32_t DATA; /*!< data in/out and DLL */ 67 | uint32_t IER; /*!< Interrupt enable register and DLH */ 68 | uint32_t IIR; /*!< Interrupt Id register and FCR */ 69 | uint32_t LCR; /*!< Line control Register */ 70 | uint32_t MCR; /*!< Modem control register */ 71 | uint32_t LSR; /*!< Line Status Register */ 72 | uint32_t MSR; /*!< Modem status Register */ 73 | uint32_t SCRATCHPAD; /*!< Uart scratch pad register */ 74 | uint32_t LPDLL; /*!< Low Power Divisor Latch (Low) Reg */ 75 | uint32_t LPDLH; /*!< Low Power Divisor Latch (High) Reg */ 76 | uint32_t RES1[2]; /*!< Reserved */ 77 | uint32_t SHR[16]; /*!< Shadow data register(SRBR and STHR) */ 78 | uint32_t FAR; /*!< FIFO Access register */ 79 | uint32_t TFR; /*!< Transmit FIFO Read */ 80 | uint32_t RFW; /*!< Receive FIFO write */ 81 | uint32_t USR; /*!< UART status register */ 82 | uint32_t TFL; /*!< Transmit FIFO level */ 83 | uint32_t RFL; /*!< Receive FIFO level */ 84 | uint32_t SRR; /*!< Software reset register */ 85 | uint32_t SRTS; /*!< Shadow request to send */ 86 | uint32_t SBCR; /*!< Shadow break control */ 87 | uint32_t SDMAM; /*!< Shadow DMA mode */ 88 | uint32_t SFE; /*!< Shadow FIFO enable */ 89 | uint32_t SRT; /*!< Shadow RCVR Trigger */ 90 | uint32_t STET; /*!< Shadow TX empty register */ 91 | uint32_t HTX; /*!< Halt TX */ 92 | uint32_t DMASA; /*!< DMA Software ACK */ 93 | uint32_t RES2[18]; /*!< Reserved */ 94 | uint32_t CPR; /*!< Camponent parameter register */ 95 | uint32_t UCV; /*!< UART Component Version */ 96 | uint32_t CTR; /*!< Component typw register */ 97 | } DW_UART_REG, *DW_UART_REG_PTR; 98 | /** @} */ 99 | 100 | #define DW_UART_GINT_DISABLED (0) /*!< designware interrupt disabled for control uart irq/fiq */ 101 | #define DW_UART_GINT_ENABLE (1<<0) /*!< designware interrupt enabled for control uart irq/fiq */ 102 | #define DW_UART_TXINT_ENABLE (1<<1) /*!< designware interrupt enabled for control transmit process */ 103 | #define DW_UART_RXINT_ENABLE (1<<2) /*!< designware interrupt enabled for control transmit process */ 104 | 105 | /** 106 | * \brief DesignWare UART control structure definition 107 | * \details implement of dev_uart_info::uart_ctrl 108 | */ 109 | typedef struct dw_uart_ctrl { 110 | uint32_t dw_uart_regbase; /*!< uart ip register base */ 111 | uint32_t dw_apb_bus_freq; /*!< uart ip apb bus frequency */ 112 | uint32_t intno; /*!< uart interrupt vector number */ 113 | INT_HANDLER dw_uart_int_handler; /*!< uart interrupt handler */ 114 | uint32_t tx_fifo_len; /*!< transmit fifo length, set by user in object implementation */ 115 | uint32_t rx_fifo_len; /*!< receive fifo length, set by user in object implementation */ 116 | uint32_t int_status; /*!< interrupt status for designware uart */ 117 | } DW_UART_CTRL, *DW_UART_CTRL_PTR; 118 | 119 | #ifdef __cplusplus 120 | extern "C" { 121 | #endif 122 | 123 | /** 124 | * \name DesignWare UART Function Declaration 125 | * \brief contains declarations of designware uart functions. 126 | * \details This are only used in uart object implementation source file 127 | * @{ 128 | */ 129 | extern int32_t dw_uart_open (DEV_UART *uart_obj, uint32_t baud); 130 | extern int32_t dw_uart_close (DEV_UART *uart_obj); 131 | extern int32_t dw_uart_control (DEV_UART *uart_obj, uint32_t ctrl_cmd, void *param); 132 | extern int32_t dw_uart_write (DEV_UART *uart_obj, const void *data, uint32_t len); 133 | extern int32_t dw_uart_read (DEV_UART *uart_obj, void *data, uint32_t len); 134 | extern void dw_uart_isr(DEV_UART *uart_obj, void *ptr); 135 | /** @} */ 136 | 137 | #ifdef __cplusplus 138 | } 139 | #endif 140 | 141 | #endif /* _DW_UART_H_ */ 142 | -------------------------------------------------------------------------------- /example/hello/arcgnu/Makefile: -------------------------------------------------------------------------------- 1 | ## Small Functions ## 2 | get_csrcs = $(foreach subdir, $(1), $(wildcard $(subdir)/*.c $(subdir)/*.C)) 3 | get_asmsrcs = $(foreach subdir, $(1), $(wildcard $(subdir)/*.s $(subdir)/*.S)) 4 | get_cxxsrcs = $(foreach subdir, $(1), $(wildcard $(subdir)/*.cpp $(subdir)/*.CPP)) 5 | ## MAKEFILE COMPILE MESSAGE CONTROL ## 6 | ECHO=echo 7 | ifeq ($(V),1) 8 | Q= 9 | else 10 | Q=@ 11 | endif 12 | 13 | ## Suppress All Message ## 14 | ifeq ($(SILENT), 1) 15 | TRACE_CREATE_DIR = 16 | TRACE_COMPILE = 17 | TRACE_ASSEMBLE = 18 | TRACE_LINK = 19 | TRACE_ARCHIVE = 20 | TRACE_GEN_LINKFILE = 21 | ## Overwrite Q Value set by V option ## 22 | override Q=@ 23 | else 24 | TRACE_CREATE_DIR = @$(ECHO) "Creating Directory : " $(@D) 25 | TRACE_COMPILE = @$(ECHO) "Compiling : " $< 26 | TRACE_ASSEMBLE = @$(ECHO) "Assembling : " $< 27 | TRACE_LINK = @$(ECHO) "Linking : " $@ 28 | TRACE_ARCHIVE = @$(ECHO) "Archiving : " $@ 29 | TRACE_GEN_LINKFILE = @$(ECHO) "Generating Linkfile : " $@ 30 | endif 31 | ### 32 | 33 | APPL_FULL_NAME = hello 34 | ### 35 | # Compiler Settings 36 | ### 37 | CC=arc-elf32-gcc 38 | OBJCOPY=arc-elf32-objcopy 39 | DUMP=arc-elf32-objdump 40 | AR=arc-elf32-ar 41 | SIZE=arc-elf32-size 42 | DBG=arc-elf32-gdb 43 | 44 | ### 45 | # Configurations need to be changed according to your environment 46 | ### 47 | DEBUG = 1 48 | EMBARC_BSP_ROOT = ../../.. 49 | ARC_CORE_CONFIG_DIR = . 50 | OPENOCD_SCRIPT_ROOT = C:/arc_gnu/share/openocd/scripts 51 | 52 | COMPILE_OPT_ARGFILE = $(ARC_CORE_CONFIG_DIR)/gcc.arg 53 | APP_LINK_FILE = $(ARC_CORE_CONFIG_DIR)/arc_core.ld 54 | OPENOCD_CFG_FILE = $(OPENOCD_SCRIPT_ROOT)/board/snps_em_sk_v2.2.cfg 55 | OPENOCD_OPTIONS = -s $(OPENOCD_SCRIPT_ROOT) -f $(OPENOCD_CFG_FILE) 56 | 57 | ### 58 | # embARC EMSK BSP source directories configuration 59 | ### 60 | EMBARC_EMSK_BSP_ROOT = $(EMBARC_BSP_ROOT)/board/emsk 61 | 62 | EMBARC_EMSK_BSP_CSRC_DIRS = $(EMBARC_EMSK_BSP_ROOT)/common \ 63 | $(EMBARC_EMSK_BSP_ROOT)/gpio \ 64 | $(EMBARC_EMSK_BSP_ROOT)/iic \ 65 | $(EMBARC_EMSK_BSP_ROOT)/spi \ 66 | $(EMBARC_EMSK_BSP_ROOT)/uart 67 | 68 | EMBARC_BSP_CSRC_DIRS = $(EMBARC_BSP_ROOT)/arc/startup $(EMBARC_BSP_ROOT)/arc \ 69 | $(EMBARC_BSP_ROOT)/board $(EMBARC_EMSK_BSP_CSRC_DIRS) \ 70 | $(EMBARC_BSP_ROOT)/device/designware/gpio \ 71 | $(EMBARC_BSP_ROOT)/device/designware/iic \ 72 | $(EMBARC_BSP_ROOT)/device/designware/spi \ 73 | $(EMBARC_BSP_ROOT)/device/designware/uart \ 74 | $(EMBARC_BSP_ROOT)/common 75 | 76 | EMBARC_BSP_ASMSRC_DIRS = $(EMBARC_BSP_ROOT)/arc/startup $(EMBARC_BSP_ROOT)/arc 77 | EMBARC_BSP_INC_DIRS = $(EMBARC_BSP_ROOT) 78 | 79 | ### 80 | # embARC EMSK BSP c/asm source files configuration 81 | ## 82 | EMBARC_EMSK_BSP_CSRCS = $(call get_csrcs, $(EMBARC_BSP_CSRC_DIRS)) 83 | EMBARC_EMSK_BSP_ASMSRCS = $(call get_asmsrcs, $(EMBARC_BSP_ASMSRC_DIRS)) 84 | 85 | ### 86 | # C/ASM source files 87 | # Defined your own extra c/asm source code files, and include folders 88 | ### 89 | EXTRA_CSRCS = 90 | 91 | EXTRA_ASMSRCS = 92 | 93 | EXTRA_INC_DIRS = 94 | 95 | ### 96 | # All C/ASM source files 97 | ### 98 | ALL_C_SRCS = ../main.c \ 99 | $(EXTRA_CSRCS) \ 100 | $(EMBARC_EMSK_BSP_CSRCS) 101 | 102 | ALL_ASM_SRCS = $(EXTRA_ASMSRCS) $(EMBARC_EMSK_BSP_ASMSRCS) 103 | ALL_INC_DIRS = . $(ARC_CORE_CONFIG_DIR) $(EMBARC_BSP_INC_DIRS) \ 104 | $(EXTRA_INC_DIRS) 105 | 106 | ### 107 | # Compiler Options 108 | ### 109 | 110 | ifeq ($(DEBUG), 1) 111 | COMMON_COMPILE_OPT += -g3 -gdwarf-2 112 | endif 113 | 114 | ALL_INCLUDES = $(foreach dir,$(ALL_INC_DIRS),-I$(dir)) 115 | ALL_DEFINES = -DMID_COMMON 116 | 117 | LMAP_OPTION = -Wl,-M,-Map=$(APPL_FULL_NAME).map 118 | MKDEP_OPT = -MMD -MT $@ -MF $@.d 119 | COMMON_COMPILE_OPT += -O2 -mno-sdata $(ALL_INCLUDES) $(MKDEP_OPT) $(ALL_DEFINES) 120 | 121 | CFLAGS = @$(COMPILE_OPT_ARGFILE) $(COMMON_COMPILE_OPT) -std=gnu99 122 | CXXFLAGS = @$(COMPILE_OPT_ARGFILE) $(COMMON_COMPILE_OPT) 123 | ASFLAGS = @$(COMPILE_OPT_ARGFILE) $(COMMON_COMPILE_OPT) -x assembler-with-cpp 124 | LDFLAGS = @$(COMPILE_OPT_ARGFILE) -mno-sdata -nostartfiles \ 125 | $(LMAP_OPTION) -Wl,--script=$(APP_LINK_FILE) 126 | LDFLAGS_LIBS = -Wl,--start-group -lm -lc -lgcc -Wl,--end-group 127 | 128 | ifeq ($(DBG), arc-elf32-gdb) 129 | DBG_HW_FLAGS = -ex "target remote | openocd --pipe $(OPENOCD_OPTIONS)" -ex "load" 130 | else 131 | DBG_HW_FLAGS = -nooptions -nogoifmain -toggle=include_local_symbols=1 -digilent 132 | endif 133 | 134 | ## Run target options 135 | ifeq ($(MAKECMDGOALS),run) 136 | ifeq ($(DBG), mdb) 137 | DBG_HW_FLAGS += -run 138 | endif 139 | ifeq ($(DBG), arc-elf32-gdb) 140 | DBG_HW_FLAGS += -ex "c" 141 | endif 142 | endif 143 | # 144 | # Define all object files. 145 | # 146 | COBJS = $(addsuffix .o, $(ALL_C_SRCS)) 147 | CXXOBJS = $(addsuffix .o, $(ALL_CXX_SRCS)) 148 | ASMOBJS = $(addsuffix .o, $(ALL_ASM_SRCS)) 149 | ALLOBJS = $(ASMOBJS) $(COBJS) $(CXXOBJS) 150 | ALLDEPS = $(ALLOBJS:.o=.o.d) 151 | 152 | .PHONY : all bin hex size clean run gui 153 | 154 | all : $(APPL_FULL_NAME).elf 155 | 156 | bin : $(APPL_FULL_NAME).bin 157 | 158 | hex : $(APPL_FULL_NAME).hex 159 | 160 | size : $(APPL_FULL_NAME).elf 161 | @$(ECHO) "Print Application Program Size" 162 | $(Q)$(SIZE) $(SIZE_OPT) $< 163 | 164 | $(APPL_FULL_NAME).hex : $(APPL_FULL_NAME).elf 165 | @$(ECHO) "Generating Intel Hex File $@" 166 | $(Q)$(OBJCOPY) -O ihex $< $@ 167 | 168 | $(APPL_FULL_NAME).bin : $(APPL_FULL_NAME).elf 169 | @$(ECHO) "Generating Binary $@" 170 | $(Q)$(OBJCOPY) -O binary $< $@ 171 | 172 | $(APPL_FULL_NAME).elf : $(ALLOBJS) Makefile 173 | $(TRACE_LINK) 174 | $(Q)$(CC) $(LDFLAGS) $(ALLOBJS) $(LDFLAGS_LIBS) -o $@ 175 | 176 | $(COBJS) : %.o : % Makefile 177 | $(TRACE_COMPILE) 178 | $(Q)$(CC) -c $(CFLAGS) $< -o $@ 179 | 180 | $(CXXOBJS) : %.o : % Makefile 181 | $(TRACE_COMPILE) 182 | $(Q)$(CC) -c $(CXXFLAGS) $< -o $@ 183 | 184 | $(ASMOBJS) : %.o : % Makefile 185 | $(TRACE_ASSEMBLE) 186 | $(Q)$(CC) -c $(ASFLAGS) $< -o $@ 187 | 188 | run : $(APPL_FULL_NAME).elf 189 | @$(ECHO) "Download & Run $<" 190 | $(DBG) $(DBG_HW_FLAGS) $< 191 | 192 | gui : $(APPL_FULL_NAME).elf 193 | @$(ECHO) "Download & Debug $<" 194 | $(DBG) $(DBG_HW_FLAGS) $< 195 | 196 | clean : 197 | @$(ECHO) "Clean all object files and dependency files" 198 | -$(Q)rm -rf $(ALLOBJS) 199 | -$(Q)rm -rf $(ALLDEPS) 200 | -$(Q)rm -rf $(APPL_FULL_NAME).elf $(APPL_FULL_NAME).map 201 | -$(Q)rm -rf openocd.log .sc.project *.log 202 | @$(ECHO) "Clean finished" 203 | 204 | -include $(ALLDEPS) -------------------------------------------------------------------------------- /board/emsk/gpio/emsk_gpio.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-31 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \defgroup BOARD_EMSK_DRV_GPIO EMSK GPIO Driver 35 | * \ingroup BOARD_EMSK_DRIVER 36 | * \brief EMSK Onboard GPIO Peripherals Driver 37 | * \details 38 | * Implementation of EMSK on-board button, led, dip switch driver, 39 | * this is for better use, you don't have to get a gpio object before operating 40 | * led,button,switch, because some basic functions for usage are provided. 41 | */ 42 | 43 | /** 44 | * \file 45 | * \ingroup BOARD_EMSK_DRV_GPIO 46 | * \brief all on emsk board gpio device init and operate functions 47 | * \details this gpio devices are button, led, dip switch 48 | */ 49 | 50 | /** 51 | * \addtogroup BOARD_EMSK_DRV_GPIO 52 | * @{ 53 | */ 54 | #include "inc/arc/arc.h" 55 | #include "inc/arc/arc_builtin.h" 56 | #include "inc/embARC_toolchain.h" 57 | #include "inc/embARC_error.h" 58 | 59 | #include "board/emsk/gpio/emsk_gpio.h" 60 | #include "board/emsk/emsk.h" 61 | 62 | static DEV_GPIO *led_port; 63 | static DEV_GPIO *button_port; 64 | static DEV_GPIO *switch_port; 65 | 66 | #define EMSK_GPIO_CHECK_EXP_NORTN(EXPR) CHECK_EXP_NOERCD(EXPR, error_exit) 67 | 68 | /** emsk on board gpio init */ 69 | void emsk_gpio_init(void) 70 | { 71 | emsk_led_init(); 72 | emsk_button_init(); 73 | emsk_switch_init(); 74 | } 75 | 76 | /** emsk on-board led init, led default off */ 77 | void emsk_led_init(void) 78 | { 79 | led_port = gpio_get_dev(EMSK_LED_PORT); 80 | 81 | EMSK_GPIO_CHECK_EXP_NORTN(led_port != NULL); 82 | 83 | if (led_port->gpio_open(EMSK_LED_DIR) == E_OPNED) { 84 | led_port->gpio_control(GPIO_CMD_SET_BIT_DIR_OUTPUT, (void *)(EMSK_LED_MASK)); 85 | led_port->gpio_control(GPIO_CMD_DIS_BIT_INT, (void *)(EMSK_LED_MASK)); 86 | } 87 | 88 | led_write(0, BOARD_LED_MASK); 89 | 90 | error_exit: 91 | return; 92 | } 93 | 94 | /** emsk on-board button init */ 95 | void emsk_button_init(void) 96 | { 97 | button_port = gpio_get_dev(EMSK_BUTTON_PORT); 98 | 99 | EMSK_GPIO_CHECK_EXP_NORTN(button_port != NULL); 100 | 101 | if (button_port->gpio_open(EMSK_BUTTON_DIR) == E_OPNED) { 102 | button_port->gpio_control(GPIO_CMD_SET_BIT_DIR_INPUT, (void *)(EMSK_BUTTON_MASK)); 103 | button_port->gpio_control(GPIO_CMD_DIS_BIT_INT, (void *)(EMSK_BUTTON_MASK)); 104 | } 105 | 106 | error_exit: 107 | return; 108 | } 109 | 110 | /** emsk on-board switch init */ 111 | void emsk_switch_init(void) 112 | { 113 | switch_port = gpio_get_dev(EMSK_SWITCH_PORT); 114 | 115 | EMSK_GPIO_CHECK_EXP_NORTN(switch_port != NULL); 116 | 117 | if (switch_port->gpio_open(EMSK_SWITCH_DIR) == E_OPNED) { 118 | switch_port->gpio_control(GPIO_CMD_SET_BIT_DIR_INPUT, (void *)(EMSK_SWITCH_MASK)); 119 | switch_port->gpio_control(GPIO_CMD_DIS_BIT_INT, (void *)(EMSK_SWITCH_MASK)); 120 | } 121 | 122 | error_exit: 123 | return; 124 | } 125 | 126 | /** 127 | * workaround for get led value 128 | * because gpio read return is not right 129 | */ 130 | static uint32_t g_led_val; 131 | /** write 1 to light on led bit, else light off led */ 132 | void led_write(uint32_t led_val, uint32_t mask) 133 | { 134 | EMSK_GPIO_CHECK_EXP_NORTN(led_port != NULL); 135 | 136 | led_val = (~led_val) & mask; 137 | led_val = led_val << EMSK_LED_OFFSET; 138 | mask = (mask << EMSK_LED_OFFSET) & EMSK_LED_MASK; 139 | led_port->gpio_write(led_val, mask); 140 | 141 | g_led_val = led_val; 142 | 143 | error_exit: 144 | return; 145 | } 146 | 147 | /** read led value, on for 1, off for 0 */ 148 | /** \todo need to find why when led set to output then can't get the right value of led */ 149 | uint32_t led_read(uint32_t mask) 150 | { 151 | uint32_t value; 152 | 153 | EMSK_GPIO_CHECK_EXP_NORTN(led_port != NULL); 154 | 155 | mask = (mask << EMSK_LED_OFFSET) & EMSK_LED_MASK; 156 | led_port->gpio_read(&value, mask); 157 | value = (~value) & EMSK_LED_MASK; 158 | 159 | return (value >> EMSK_LED_OFFSET); 160 | 161 | error_exit: 162 | return 0; 163 | } 164 | 165 | /** Pull down switch return 1, else 0 */ 166 | uint32_t switch_read(uint32_t mask) 167 | { 168 | uint32_t value; 169 | 170 | EMSK_GPIO_CHECK_EXP_NORTN(switch_port != NULL); 171 | 172 | mask = (mask << EMSK_SWITCH_OFFSET) & EMSK_SWITCH_MASK; 173 | switch_port->gpio_read(&value, mask); 174 | value = (~value) & mask; 175 | 176 | return (value >> EMSK_SWITCH_OFFSET); 177 | 178 | error_exit: 179 | return 0; 180 | } 181 | 182 | /** Press down bit set to 1 else 0 */ 183 | uint32_t button_read(uint32_t mask) 184 | { 185 | uint32_t value; 186 | 187 | EMSK_GPIO_CHECK_EXP_NORTN(button_port != NULL); 188 | 189 | mask = (mask << EMSK_BUTTON_OFFSET) & EMSK_BUTTON_MASK; 190 | button_port->gpio_read(&value, mask); 191 | value = (~value) & mask; 192 | 193 | return (value >> EMSK_BUTTON_OFFSET); 194 | 195 | error_exit: 196 | return 0; 197 | } 198 | 199 | /** @} end of group BOARD_EMSK_DRV_GPIO */ 200 | -------------------------------------------------------------------------------- /common/console_io.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-23 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \brief common io implementation 37 | */ 38 | #include 39 | #include "inc/embARC_toolchain.h" 40 | #include "inc/arc/arc_builtin.h" 41 | #include "device/device_hal/inc/dev_uart.h" 42 | #include "common/console_io.h" 43 | #include "common/xprintf.h" 44 | #include "board/board.h" 45 | 46 | #define CONSOLE_UART_ID BOARD_CONSOLE_UART_ID /*!< console uart id */ 47 | 48 | /*!< to indicate xprintf setup state(0 for not setup) */ 49 | static int xprintf_setup_flag = 0; 50 | static DEV_UART *console_uart; /*!< console uart device pointer */ 51 | 52 | /** put one char */ 53 | int console_putchar(unsigned char chr) 54 | { 55 | if (console_uart == NULL) { 56 | return -1; 57 | } 58 | console_uart->uart_write((const void *)(&chr), 1); 59 | return 0; 60 | } 61 | 62 | /** put string */ 63 | int console_putstr(const char *str, unsigned int len) 64 | { 65 | if (console_uart == NULL) { 66 | return -1; 67 | } 68 | return (int)console_uart->uart_write((const void *)(str), len); 69 | } 70 | 71 | /** get one char*/ 72 | int console_getchar(void) 73 | { 74 | unsigned char data; 75 | if (console_uart == NULL) { 76 | return -1; 77 | } 78 | while (!console_uart->uart_read((void *)(&data), 1)); 79 | 80 | return (int)data; 81 | } 82 | 83 | /** get string */ 84 | int console_getstr(char *str, unsigned int len) 85 | { 86 | if (console_uart == NULL) { 87 | return -1; 88 | } 89 | return (int)console_uart->uart_read((void *)(str), len); 90 | } 91 | 92 | #ifndef ENABLE_BANNER 93 | #define ENABLE_BANNER 1 94 | #endif 95 | 96 | #ifndef EMBARC_BANNER_TYPE 97 | #define EMBARC_BANNER_TYPE 1 98 | #endif 99 | 100 | static const char *embarc_banner = 101 | #if EMBARC_BANNER_TYPE == 1 102 | "----------------------------------------------------------- \r\n\ 103 | ____ _ ____ \r\n\ 104 | | _ \\ _____ _____ _ __ ___ __| | __ ) _ _ \r\n\ 105 | | |_) / _ \\ \\ /\\ / / _ \\ '__/ _ \\/ _` | _ \\| | | | \r\n\ 106 | | __/ (_) \\ V V / __/ | | __/ (_| | |_) | |_| | \r\n\ 107 | |_| \\___/ \\_/\\_/ \\___|_| \\___|\\__,_|____/ \\__, | \r\n\ 108 | |___/ \r\n\ 109 | _ _ ____ ____ \r\n\ 110 | ___ _ __ ___ | |__ / \\ | _ \\ / ___| \r\n\ 111 | / _ \\ '_ ` _ \\| '_ \\ / _ \\ | |_) | | \r\n\ 112 | | __/ | | | | | |_) / ___ \\| _ <| |___ \r\n\ 113 | \\___|_| |_| |_|_.__/_/ \\_\\_| \\_\\\\____| \r\n\ 114 | ------------------------------------------------------------ \r\n\ 115 | "; 116 | #else 117 | "-----------------------------------------------------------------------------------------------\r\n\ 118 | _/_/_/ _/ _/_/_/ \r\n\ 119 | _/ _/ _/_/ _/ _/ _/ _/_/ _/ _/_/ _/_/ _/_/_/ _/ _/ _/ _/ \r\n\ 120 | _/_/_/ _/ _/ _/ _/ _/ _/_/_/_/ _/_/ _/_/_/_/ _/ _/ _/_/_/ _/ _/ \r\n\ 121 | _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ \r\n\ 122 | _/ _/_/ _/ _/ _/_/_/ _/ _/_/_/ _/_/_/ _/_/_/ _/_/_/ \r\n\ 123 | _/ \r\n\ 124 | _/_/ \r\n\ 125 | _/ _/_/ _/_/_/ _/_/_/ \r\n\ 126 | _/_/ _/_/_/ _/_/ _/_/_/ _/ _/ _/ _/ _/ \r\n\ 127 | _/_/_/_/ _/ _/ _/ _/ _/ _/_/_/_/ _/_/_/ _/ \r\n\ 128 | _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ \r\n\ 129 | _/_/_/ _/ _/ _/ _/_/_/ _/ _/ _/ _/ _/_/_/ \r\n\ 130 | ------------------------------------------------------------------------------------------------\r\n\ 131 | "; 132 | #endif 133 | 134 | static void embarc_print_banner(void) 135 | { 136 | xprintf("%s\r\n", embarc_banner); 137 | } 138 | 139 | /** xprintf need functions api setup */ 140 | void xprintf_setup(void) 141 | { 142 | if (xprintf_setup_flag) { 143 | return; 144 | } 145 | console_uart = uart_get_dev(CONSOLE_UART_ID); 146 | console_uart->uart_open(BOARD_CONSOLE_UART_BAUD); 147 | 148 | xdev_in(console_getchar); 149 | xdev_out(console_putchar); 150 | 151 | #if ENABLE_BANNER == 1 152 | embarc_print_banner(); 153 | #endif 154 | 155 | xprintf("embARC Build Time: %s, %s\r\n", __DATE__, __TIME__); 156 | #if defined(__GNU__) 157 | xprintf("Compiler Version: ARC GNU, %s\r\n", __VERSION__); 158 | #else 159 | xprintf("Compiler Version: Metaware, %s\r\n", __VERSION__); 160 | #endif 161 | 162 | xprintf_setup_flag = 1; 163 | } 164 | 165 | -------------------------------------------------------------------------------- /board/emsk/common/emsk_timer.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-31 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \defgroup BOARD_EMSK_COMMON_TIMER EMSK Common Timer Module 35 | * \ingroup BOARD_EMSK_COMMON 36 | * \brief provide basic board timer-related functions 37 | * \details 38 | * Provide a 1 MS (default) timer interrupt, 39 | * provide a 64-bit counter value (no clear) count in the timer interrupt, 40 | * provide MS-precision delay, with OS enabled-support delay 41 | */ 42 | 43 | /** 44 | * \file 45 | * \ingroup BOARD_EMSK_COMMON_TIMER 46 | * \brief provide emsk board timer-related functions 47 | */ 48 | 49 | /** 50 | * \addtogroup BOARD_EMSK_COMMON_TIMER 51 | * @{ 52 | */ 53 | #include "inc/arc/arc_builtin.h" 54 | #include "inc/arc/arc.h" 55 | #include "inc/arc/arc_timer.h" 56 | #include "inc/arc/arc_exception.h" 57 | 58 | #include "board/emsk/emsk.h" 59 | 60 | #define MAX_SYS_COUNTER_VALUE (0xffffffff) 61 | 62 | #ifndef BOARD_SYS_TIMER_HZ 63 | #define BOARD_SYS_TIMER_HZ (1000) 64 | #endif 65 | 66 | /** emsk board timer interrupt reset count */ 67 | static uint32_t cyc_hz_count = (BOARD_CPU_CLOCK / BOARD_SYS_TIMER_HZ); 68 | 69 | /** emsk board timer counter in timer interrupt */ 70 | volatile uint64_t gl_emsk_sys_hz_cnt = 0; 71 | /** emsk board 1ms counter */ 72 | volatile uint32_t gl_emsk_ms_cnt = 0; 73 | 74 | #define HZ_COUNT_CONV(precision, base) ((precision)/(base)) 75 | 76 | /** 77 | * \brief Update timer counter and other MS period operation 78 | * in cycling interrupt and must be called periodically. When the OS timer 79 | * interrupt is in conflict with the bare-metal timer interrupt, 80 | * put this function into the OS timer interrupt 81 | * \param[in] precision interrupt-period precision in Hz 82 | */ 83 | void board_timer_update(uint32_t precision) 84 | { 85 | static uint32_t sys_hz_update = 0; 86 | static uint32_t sys_ms_update = 0; 87 | uint32_t hz_conv = 0; 88 | 89 | /** count sys hz */ 90 | hz_conv = HZ_COUNT_CONV(precision, BOARD_SYS_TIMER_HZ); 91 | sys_hz_update ++; 92 | if (sys_hz_update >= hz_conv) { 93 | sys_hz_update = 0; 94 | gl_emsk_sys_hz_cnt ++; 95 | } 96 | 97 | /** count ms */ 98 | hz_conv = HZ_COUNT_CONV(precision, BOARD_SYS_TIMER_MS_HZ); 99 | sys_ms_update ++; 100 | if (sys_ms_update >= hz_conv) { 101 | sys_ms_update = 0; 102 | gl_emsk_ms_cnt ++; 103 | } 104 | } 105 | 106 | /** 107 | * \brief emsk bare-metal timer interrupt. 108 | * the Interrupt frequency is based on the defined \ref BOARD_SYS_TIMER_HZ 109 | */ 110 | static void emsk_timer_isr(void *ptr) 111 | { 112 | arc_timer_int_clear(BOARD_SYS_TIMER_ID); 113 | 114 | board_timer_update(BOARD_SYS_TIMER_HZ); 115 | } 116 | 117 | /** 118 | * \brief init bare-metal emsk board timer and interrupt 119 | * \details 120 | * This function is called in \ref board_init, and 121 | * it initializes the 1-MS timer interrupt for bare-metal mode 122 | */ 123 | void emsk_timer_init(void) 124 | { 125 | if (arc_timer_present(BOARD_SYS_TIMER_ID)) { 126 | int_disable(BOARD_SYS_TIMER_INTNO); /* disable first then enable */ 127 | int_handler_install(BOARD_SYS_TIMER_INTNO, emsk_timer_isr); 128 | arc_timer_start(BOARD_SYS_TIMER_ID, TIMER_CTRL_IE|TIMER_CTRL_NH, cyc_hz_count); /* start 1ms timer interrupt */ 129 | 130 | int_enable(BOARD_SYS_TIMER_INTNO); 131 | } 132 | } 133 | 134 | /** 135 | * \brief get current cpu hardware ticks 136 | * \retval hardware ticks count in 64 bit format 137 | */ 138 | uint64_t board_get_hwticks(void) 139 | { 140 | uint32_t sub_ticks; 141 | uint64_t total_ticks; 142 | arc_timer_current(TIMER_0, &sub_ticks); 143 | 144 | total_ticks = (uint64_t)OSP_GET_CUR_MS() * (BOARD_CPU_CLOCK/BOARD_SYS_TIMER_HZ); 145 | total_ticks += (uint64_t)sub_ticks; 146 | 147 | return total_ticks; 148 | } 149 | 150 | /** 151 | * \brief get current passed us since timer init 152 | * \retval us count in 64 bit format 153 | */ 154 | uint64_t board_get_cur_us(void) 155 | { 156 | uint32_t sub_us; 157 | uint64_t total_us; 158 | arc_timer_current(TIMER_0, &sub_us); 159 | 160 | sub_us = ((uint64_t)sub_us * 1000000) / BOARD_CPU_CLOCK; 161 | total_us = ((uint64_t)OSP_GET_CUR_MS()) * 1000 + (uint64_t)sub_us; 162 | 163 | return total_us; 164 | } 165 | 166 | /** 167 | * \brief provide MS delay function 168 | * \details 169 | * this function needs a 1-MS timer interrupt to work. 170 | * For bare-metal, it is implemented in this file. 171 | * For OS, you must call \ref board_timer_update in 172 | * the OS 1-MS timer interrupt when the bare-metal timer interrupt 173 | * is not ready 174 | * \param[in] ms MS to delay 175 | * \param[in] os_compat Enable or disable 176 | * When this delay is enabled, use the OS delay function, if one is provided. 177 | * See \ref OSP_DELAY_OS_COMPAT_ENABLE and 178 | * \ref OSP_DELAY_OS_COMPAT_DISABLE 179 | */ 180 | void board_delay_ms(uint32_t ms, uint8_t os_compat) 181 | { 182 | uint64_t start_us, us_delayed; 183 | 184 | us_delayed = ((uint64_t)ms * 1000); 185 | start_us = board_get_cur_us(); 186 | while ((board_get_cur_us() - start_us) < us_delayed); 187 | } 188 | 189 | /** @} end of group BOARD_EMSK_COMMON_TIMER */ 190 | -------------------------------------------------------------------------------- /device/device_hal/inc/dev_common.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-16 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \defgroup DEVICE_HAL_COMMON Common Device Layer Definitions 36 | * \ingroup DEVICE_HAL_DEF 37 | * \brief common definitions for device layer (\ref dev_common.h) 38 | * 39 | * @{ 40 | * 41 | * \file 42 | * \brief header file to define common definitions for device layer 43 | * \details Here in this file provide definitions that need by other 44 | * devices in device layer 45 | */ 46 | 47 | #ifndef _DEVICE_HAL_COMMON_H_ 48 | #define _DEVICE_HAL_COMMON_H_ 49 | 50 | #include 51 | 52 | /** 53 | * \defgroup DEVICE_HAL_COMMON_DEVSTATE Common Device State 54 | * \ingroup DEVICE_HAL_COMMON 55 | * \brief definitions for device state 56 | * \details here defines macros for device open/close, 57 | * device working good/error, used in 58 | * \ref DEVICE_HAL_UART, \ref DEVICE_HAL_SPI, 59 | * \ref DEVICE_HAL_IIC, \ref DEVICE_HAL_GPIO 60 | * @{ 61 | */ 62 | /* 63 | * macros for device open and close state 64 | */ 65 | #define DEV_CLOSED (0) /*!< Indicate that device was closed */ 66 | #define DEV_OPENED (1) /*!< Indicate that the device was opened */ 67 | 68 | /* 69 | * macros for device good and error state 70 | */ 71 | #define DEV_GOOD (0) /*!< Indicate device is good */ 72 | #define DEV_ERROR (1) /*!< Indicate device error */ 73 | /** @} */ 74 | 75 | /** 76 | * \defgroup DEVICE_HAL_COMMON_DEVMTHD Common Device Working Method 77 | * \ingroup DEVICE_HAL_COMMON 78 | * \brief definitions for device working method(interrupt or poll) 79 | * \details here defines macros for working method, 80 | * interrupt or poll method,used in 81 | * \ref DEVICE_HAL_UART, \ref DEVICE_HAL_SPI, 82 | * \ref DEVICE_HAL_IIC, \ref DEVICE_HAL_GPIO 83 | * @{ 84 | */ 85 | /* 86 | * macros for device working method 87 | */ 88 | #define DEV_POLL_METHOD (0) /*!< Indicate that the device running in poll method */ 89 | #define DEV_INTERRUPT_METHOD (1) /*!< Indicate that the device running in interrupt method */ 90 | /** @} */ 91 | 92 | /** 93 | * \defgroup DEVICE_HAL_COMMON_DEVMODE Common Device Working Mode 94 | * \ingroup DEVICE_HAL_COMMON 95 | * \brief definitions for device working mode(master or slave) 96 | * \details here defines macros for working mode, 97 | * Master or Slave mode,used in 98 | * \ref DEV_HAL_IIC, \ref DEV_HAL_SPI. 99 | * @{ 100 | */ 101 | /* 102 | * macros for device working mode 103 | */ 104 | #define DEV_MASTER_MODE (0) /*!< Indicate that the device working as master */ 105 | #define DEV_SLAVE_MODE (1) /*!< Indicate that the device working as slave */ 106 | /** @} */ 107 | 108 | /** 109 | * \defgroup DEVICE_HAL_COMMON_DEVSTATUS Common Device Status 110 | * \ingroup DEVICE_HAL_COMMON 111 | * \brief definitions for device status, 1 bit for 1 function 112 | * @{ 113 | */ 114 | #define DEV_DISABLED (0) /*!< Bit 0 for device enabled state, disabled */ 115 | #define DEV_ENABLED (1<<0) /*!< Bit 0 for device enabled state, enabled */ 116 | #define DEV_IN_TX (1<<1) /*!< Bit 1 for device in transmit state */ 117 | #define DEV_IN_RX (1<<2) /*!< Bit 2 for device in receive state */ 118 | #define DEV_IN_XFER (1<<3) /*!< Bit 3 for device in transfer state */ 119 | #define DEV_IN_TX_ABRT (1<<4) /*!< Bit 4 for device in transmit abort state */ 120 | #define DEV_IN_RX_ABRT (1<<5) /*!< Bit 5 for device in receive abort state */ 121 | #define DEV_IN_XFER_ABRT (1<<6) /*!< Bit 6 for device in transfer abort state */ 122 | /** @} */ 123 | 124 | /** 125 | * \defgroup DEVICE_HAL_COMMON_DEFCMD Common Device Defining Command 126 | * \ingroup DEVICE_HAL_COMMON 127 | * \brief definitions for defining command code 128 | * \details here defines macros to define command code, 129 | * in system code, use \ref DEV_SET_SYSCMD to define command code. 130 | * in user code, use \ref DEV_SET_USRCMD to define command code. 131 | * So that there will be no conflicts in system and user defined command code. 132 | * this used used in 133 | * \ref DEVICE_HAL_UART, \ref DEVICE_HAL_SPI, 134 | * \ref DEVICE_HAL_IIC, \ref DEVICE_HAL_GPIO, 135 | * and in user code 136 | * @{ 137 | */ 138 | /* 139 | * macros for control command base 140 | */ 141 | #define DEV_SYS_CMDBSE (0x00000000) /*!< default system device control command base(defined by embARC) */ 142 | #define DEV_USR_CMDBSE (0x80000000) /*!< default user device control command base(defined by user) in user implementing */ 143 | #define DEV_SET_SYSCMD(cmd) (DEV_SYS_CMDBSE|(cmd)) /*!< set device system control command */ 144 | #define DEV_SET_USRCMD(cmd) (DEV_USR_CMDBSE|(cmd)) /*!< set device user control command */ 145 | 146 | #define CONV2VOID(param) ((void *)(param)) /*!< convert param into void * type */ 147 | /** @} */ 148 | 149 | /** 150 | * Common Device Buffer Structure 151 | */ 152 | typedef struct dev_buffer { 153 | void *buf; /*!< buffer pointer */ 154 | uint32_t len; /*!< buffer length in bytes */ 155 | uint32_t ofs; /*!< current offset in buffer */ 156 | } DEV_BUFFER; 157 | 158 | /** Init device buffer */ 159 | #define DEV_BUFFER_INIT(devbuf, buffer, size) { \ 160 | (devbuf)->buf = (void *)(buffer); \ 161 | (devbuf)->len = (uint32_t)(size); \ 162 | (devbuf)->ofs = (uint32_t)(0); \ 163 | } 164 | 165 | /** 166 | * Device callback function typedef. 167 | * This is usually used in device callback settings, 168 | * and \ptr should be the device object pointer, 169 | * such as DEV_IIC * */ 170 | typedef void (*DEV_CALLBACK) (void *ptr); 171 | 172 | /** @} */ 173 | #endif /* _DEVICE_HAL_COMMON_H_ */ 174 | -------------------------------------------------------------------------------- /arc/startup/arc_startup.S: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-15 31 | * \author Wayne Ren(Wei.Ren@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup ARC_HAL_STARTUP 37 | * \brief assembly part of startup process 38 | */ 39 | 40 | /** 41 | * \addtogroup ARC_HAL_STARTUP 42 | * @{ 43 | */ 44 | /** @cond STARTUP_ASM */ 45 | 46 | #define __ASSEMBLY__ 47 | #include "embARC_BSP_config.h" 48 | #include "inc/arc/arc.h" 49 | 50 | .file "arc_startup.S" 51 | 52 | .weak _f_sdata /* start of small data, defined in link script */ 53 | .weak init_hardware_hook /* app hardware init hook */ 54 | .weak init_software_hook /* app software init hook */ 55 | 56 | .extern board_main 57 | .extern exc_entry_table 58 | 59 | /* initial vector table */ 60 | .section .init_vector, "a" 61 | .long _arc_reset 62 | .section .init_bootstrap, "ax" 63 | .global _arc_reset 64 | .global _start 65 | .align 4 66 | _start: 67 | _arc_reset: 68 | _arc_reset_stage1: 69 | kflag STATUS32_RESET_VALUE 70 | 71 | /* STAGE 1 */ 72 | 73 | /* necessary hardware should be done first to speed up initialization 74 | 1. system clk 75 | 2. mem controller must be initialized before any access to external 76 | mem. 77 | 3. others 78 | */ 79 | _arc_cache_init_start: 80 | lr r0, [AUX_BCR_D_CACHE] 81 | cmp r0, 2 82 | /* invalidate dcache */ 83 | jle _arc_icache_init 84 | mov r0, 1 85 | sr r0, [AUX_DC_IVDC] 86 | sr r0, [AUX_DC_CTRL] 87 | _arc_icache_init: 88 | lr r0, [AUX_BCR_I_CACHE] 89 | cmp r0, 2 90 | jle _arc_cache_init_end 91 | /* invalidate icache */ 92 | mov r0, 1 93 | sr r0, [AUX_IC_IVIC] 94 | nop_s 95 | nop_s 96 | nop_s 97 | sr r0, [AUX_IC_CTRL] 98 | 99 | _arc_cache_init_end: 100 | mov r0, init_hardware_hook 101 | cmp r0, 0 102 | jlne [r0] 103 | 104 | /* STAGE 2: init necessary registers */ 105 | 106 | _arc_reset_stage2: 107 | mov r0, 0 108 | 109 | /* interrupt related init */ 110 | sr r0, [AUX_IRQ_ACT] 111 | sr r0, [AUX_IRQ_CTRL] 112 | sr r0, [AUX_IRQ_HINT] 113 | 114 | /* use the new vector table to replace the old one */ 115 | #if defined(ARC_FEATURE_SEC_PRESENT) && (SECURESHIELD_VERSION < 2) 116 | sr exc_entry_table, [AUX_INT_VECT_BASE_S] 117 | #else 118 | sr exc_entry_table, [AUX_INT_VECT_BASE] 119 | #endif 120 | 121 | /* init stack */ 122 | #if ARC_FEATURE_RGF_BANKED_REGS >= 16 && ARC_FEATURE_RGF_BANKED_REGS > 1 && ARC_FEATURE_FIRQ == 1 123 | #if _STACKSIZE < 512 124 | #error "not enough stack size for irq and firq" 125 | #endif 126 | 127 | /* switch to register bank1 */ 128 | lr r0, [AUX_STATUS32] 129 | bic r0, r0, 0x70000 130 | or r0, r0, 0x10000 131 | kflag r0 132 | /* set sp, gp, fp in bank1 */ 133 | mov sp, _e_stack 134 | mov gp, _f_sdata 135 | mov fp, 0 136 | /* come back to bank0 */ 137 | lr r0, [AUX_STATUS32] 138 | bic r0, r0, 0x70000 139 | kflag r0 140 | mov sp, _e_stack-256 141 | #else 142 | mov sp, _e_stack /* init stack pointer */ 143 | #endif 144 | mov gp, _f_sdata /* init small-data base register */ 145 | mov fp, 0 /* init fp register */ 146 | 147 | _arc_reset_stage3: 148 | _s3_copy_text: 149 | mov r0, _f_text 150 | mov r1, _load_addr_text 151 | cmp r0, r1 152 | 153 | /* if load addr == run addr, no need to copy */ 154 | jeq _s3_copy_rodata 155 | mov r3, _e_text 156 | _s3_copy_text_loop: 157 | ld.ab r2, [r1, 4] 158 | st.ab r2, [r0, 4] 159 | cmp r0, r3 160 | jlt _s3_copy_text_loop 161 | _s3_copy_rodata: 162 | mov r0, _f_rodata 163 | mov r1, _load_addr_rodata 164 | cmp r0, r1 165 | 166 | /* if load addr == run addr, no need to copy */ 167 | jeq _s3_copy_data 168 | mov r3, _e_rodata 169 | _s3_copy_rodata_loop: 170 | ld.ab r2, [r1, 4] 171 | st.ab r2, [r0, 4] 172 | cmp r0, r3 173 | jlt _s3_copy_rodata_loop 174 | _s3_copy_data: 175 | mov r0, _f_data 176 | mov r1, _load_addr_data 177 | cmp r0, r1 178 | jeq _s3_clear_bss 179 | 180 | /* if load addr == run addr, no need to copy */ 181 | mov r3, _e_data 182 | _s3_copy_data_loop: 183 | ld.ab r2, [r1, 4] 184 | st.ab r2, [r0, 4] 185 | cmp r0, r3 186 | jlt _s3_copy_data_loop 187 | _s3_clear_bss: 188 | mov r0, _f_bss 189 | mov r1, _e_bss 190 | cmp r0, r1 191 | jge _arc_reset_call_main 192 | mov r2, 0 193 | _s3_clear_bss_loop: 194 | st.ab r2, [r0, 4] 195 | cmp r0, r1 196 | jlt _s3_clear_bss_loop 197 | 198 | /* STAGE 3: go to main */ 199 | 200 | _arc_reset_call_main: 201 | 202 | /* \todo add cpp init here */ 203 | mov r0, init_software_hook 204 | cmp r0, 0 205 | jlne [r0] 206 | /* board level library init */ 207 | #ifdef LIB_SECURESHIELD 208 | jl secureshield_start 209 | #else 210 | /* early init of interrupt and exception */ 211 | jl exc_int_init 212 | #endif 213 | /* init cache */ 214 | jl arc_cache_init 215 | #if defined(__MW__) 216 | jl _init 217 | #elif defined(__GNU__) 218 | jl __do_global_ctors_aux 219 | jl __do_init_array_aux 220 | #endif 221 | jl board_main /* board-level main */ 222 | #if defined(__MW__) 223 | jl _fini 224 | #elif defined(__GNU__) 225 | jl __do_global_dtors_aux 226 | #endif 227 | .global _exit_loop 228 | .global _exit_halt 229 | .align 4 230 | _exit_halt: 231 | _exit_loop: 232 | flag 0x1 233 | nop 234 | nop 235 | nop 236 | b _exit_loop 237 | 238 | #if defined(__MW__) 239 | .global _init, _fini 240 | .section ".init",text 241 | _init: 242 | .cfa_bf _init 243 | push %blink 244 | .cfa_push {%blink} 245 | 246 | .section ".init$999999", text, 1, 2, check_text_align=0 247 | pop %blink 248 | .cfa_pop {%blink} 249 | j [%blink] 250 | .cfa_ef 251 | 252 | .section ".fini", text 253 | _fini: 254 | .cfa_bf _fini 255 | push %blink 256 | .cfa_push {%blink} 257 | 258 | .section ".fini$999999", text, 1, 2, check_text_align=0 259 | pop %blink 260 | .cfa_pop {%blink} 261 | j [%blink] 262 | .cfa_ef 263 | #endif 264 | /** @endcond */ 265 | 266 | /** }@*/ 267 | -------------------------------------------------------------------------------- /board/emsk/common/mux.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-07 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | /** 34 | * \file 35 | * \ingroup BOARD_EMSK_DRV_MUX 36 | * \brief header file of emsk mux controller driver 37 | */ 38 | 39 | /** 40 | * \addtogroup BOARD_EMSK_DRV_MUX 41 | * @{ 42 | */ 43 | #ifndef _MUX_H_ 44 | #define _MUX_H_ 45 | 46 | #include "inc/embARC_toolchain.h" 47 | 48 | #define BIT0 (0) 49 | #define BIT1 (1) 50 | #define BIT2 (2) 51 | #define BIT3 (3) 52 | #define PM1_OFFSET (0) 53 | #define PM2_OFFSET (4) 54 | #define PM3_OFFSET (8) 55 | #define PM4_OFFSET (12) 56 | #define PM5_OFFSET (16) 57 | #define PM6_OFFSET (20) 58 | #define PM7_OFFSET (24) 59 | 60 | #define PM1_MASK (0xf << PM1_OFFSET) 61 | #define PM2_MASK (0xf << PM2_OFFSET) 62 | #define PM3_MASK (0xf << PM3_OFFSET) 63 | #define PM4_MASK (0xf << PM4_OFFSET) 64 | #define PM5_MASK (0xf << PM5_OFFSET) 65 | #define PM6_MASK (0xf << PM6_OFFSET) 66 | #define PM7_MASK (0xf << PM7_OFFSET) 67 | 68 | 69 | #define SPI_MAP_NORMAL (0) 70 | #define SPI_MAP_LOOPBACK (1) 71 | 72 | #define UART_MAP_TYPE4 (0xE4) 73 | #define UART_MAP_TYPE3 (0x6C) 74 | 75 | /** 76 | * \name Default pin muxer settings 77 | * @{ 78 | */ 79 | #define PMOD_MUX_CTRL_DEFAULT (0) /*!< all pins are configured as GPIO inputs */ 80 | #define SPI_MAP_CTRL_DEFAULT (SPI_MAP_NORMAL) /*!< normal SPI mode */ 81 | #define UART_MAP_CTRL_DEFAULT (UART_MAP_TYPE4) /*!< TYPE4 PMOD compatible */ 82 | /** @} end of name */ 83 | 84 | /** 85 | * \name PMOD 1 Multiplexor 86 | * @{ 87 | */ 88 | #define PM1_UR_GPIO_C ((0 << BIT0) << PM1_OFFSET) /*!< Pmod1[4:1] are connected to DW GPIO Port C[11:8] */ 89 | #define PM1_UR_UART_0 ((1 << BIT0) << PM1_OFFSET) /*!< Pmod1[4:1] are connected to DW UART0 signals */ 90 | 91 | #define PM1_LR_GPIO_A ((0 << BIT2) << PM1_OFFSET) /*!< Pmod1[10:7] are connected to DW GPIO Port A[11:8] */ 92 | #define PM1_LR_SPI_S ((1 << BIT2) << PM1_OFFSET) /*!< Pmod1[10:7] are connected to DW SPI Slave signals */ 93 | /** @} end of name */ 94 | 95 | 96 | /** 97 | * \name PMOD 2 Multiplexor 98 | * @{ 99 | */ 100 | #define PM2_GPIO_AC ((0 << BIT0) << PM2_OFFSET) /*!< Pmod2[4:1] are connected to DW GPIO Port C[15:12], 101 | Pmod2[10:7] are connected to DW GPIO Port A[15:12] */ 102 | 103 | #define PM2_I2C_HRI ((1 << BIT0) << PM2_OFFSET) /*!< connect I2C to Pmod2[4:1] and halt/run interface to Pmod2[10:7] */ 104 | /** @} end of name */ 105 | 106 | 107 | /** 108 | * \name PMOD 3 Multiplexor 109 | * @{ 110 | */ 111 | #define PM3_GPIO_AC ((0 << BIT0) << PM3_OFFSET) /*!< Pmod3[4:1] are connected to DW GPIO Port C[19:16], 112 | Pmod3[10:7] are connected to DW GPIO Port A[19:16] */ 113 | 114 | #define PM3_I2C_GPIO_D ((1 << BIT0) << PM3_OFFSET) /*!< Pmod3[4:3] are connected to DW I2C signals, 115 | Pmod3[2:1] are connected to DW GPIO Port D[1:0], 116 | Pmod3[10:7] are connected to DW GPIO Port D[3:2] */ 117 | /** @} end of name */ 118 | 119 | 120 | /** 121 | * \name PMOD 4 Multiplexor 122 | * @{ 123 | */ 124 | #define PM4_GPIO_AC ((0 << BIT0) << PM4_OFFSET) /*!< Pmod4[4:1] are connected to DW GPIO Port C[23:20], 125 | Pmod4[10:7] are connected to DW GPIO Port A[23:20] */ 126 | 127 | #define PM4_I2C_GPIO_D ((1 << BIT0) << PM4_OFFSET) /*!< Pmod4[4:3] are connected to DW I2C signals, 128 | Pmod4[2:1] are connected to DW GPIO Port D[5:4], 129 | Pmod4[10:7] are connected to DW GPIO Port D[7:6] */ 130 | /** @} end of name */ 131 | 132 | /** 133 | * \name PMOD 5 Multiplexor 134 | * @{ 135 | */ 136 | #define PM5_UR_GPIO_C ((0 << BIT0) << PM5_OFFSET) /*!< Pmod5[4:1] are connected to DW GPIO Port C[27:24] */ 137 | #define PM5_UR_SPI_M1 ((1 << BIT0) << PM5_OFFSET) /*!< Pmod5[4:1] are connected to DW SPI Master signals using CS1_N */ 138 | 139 | #define PM5_LR_GPIO_A ((0 << BIT2) << PM5_OFFSET) /*!< Pmod5[10:7] are connected to DW GPIO Port A[27:24] */ 140 | #define PM5_LR_SPI_M2 ((1 << BIT2) << PM5_OFFSET) /*!< Pmod5[10:7] are connected to DW SPI Master signals using CS2_N */ 141 | /** @} end of name */ 142 | 143 | 144 | /** 145 | * \name PMOD 6 Multiplexor 146 | * @{ 147 | */ 148 | #define PM6_UR_GPIO_C ((0 << BIT0) << PM6_OFFSET) /*!< Pmod6[4:1] are connected to DW GPIO Port C[31:28] */ 149 | #define PM6_UR_SPI_M0 ((1 << BIT0) << PM6_OFFSET) /*!< Pmod6[4:1] are connected to DW SPI Master signals using CS0_N */ 150 | 151 | #define PM6_LR_GPIO_A ((0 << BIT2) << PM6_OFFSET) /*!< Pmod6[10:7] are connected to DW GPIO Port A[31:28] */ 152 | 153 | #define PM6_LR_CSS_STAT ((1 << BIT2) << PM6_OFFSET) /*!< Pmod6[8:7] are connected to the DW SPI Master chip select signals CS1_N and CS2_N, 154 | Pmod6[6:5] are connected to the ARC EM halt and sleep status signals */ 155 | /** @} end of name */ 156 | 157 | /** 158 | * \name PMOD 7 Multiplexor 159 | * @{ 160 | */ 161 | #define PM7_GPIO_D ((0 << BIT0) << PM7_OFFSET) /*!< Pmod7[4:1] are connected to DW GPIO Port D[11:8] */ 162 | #define PM7_STAT ((1 << BIT0) << PM7_OFFSET) /*!< Pmod7[4:1] are connected to the ARC EM sleep status signals */ 163 | /** @} end of name */ 164 | typedef volatile uint32_t MUX_REG; 165 | 166 | #ifdef __cplusplus 167 | extern "C" { 168 | #endif 169 | 170 | extern void mux_init(MUX_REG *mux_regs); 171 | extern MUX_REG *get_mux_regs(void); 172 | extern void set_pmod_mux(MUX_REG *mux_regs, uint32_t val); 173 | extern uint32_t get_pmod_mux(MUX_REG *mux_regs); 174 | extern void change_pmod_mux(MUX_REG *mux_regs, uint32_t val, uint32_t change_bits); 175 | extern void set_spi_map(MUX_REG *mux_regs, uint32_t val); 176 | extern uint32_t get_spi_map(MUX_REG *mux_regs); 177 | extern void set_uart_map(MUX_REG *mux_regs, uint32_t val); 178 | extern uint32_t get_uart_map(MUX_REG *mux_regs); 179 | 180 | #ifdef __cplusplus 181 | } 182 | #endif 183 | 184 | #endif /* _MUX_H_ */ 185 | 186 | /** @} end of group BOARD_EMSK_DRV_MUX */ 187 | -------------------------------------------------------------------------------- /device/designware/iic/dw_iic_hal.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-06-30 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup DEVICE_DW_IIC 37 | * \brief DesignWare IIC driver hardware description related header file 38 | * \details detailed hardware related definitions of DesignWare IIC driver 39 | */ 40 | 41 | #ifndef _DEVICE_DW_IIC_HAL_H_ 42 | #define _DEVICE_DW_IIC_HAL_H_ 43 | 44 | #include "device/designware/iic/dw_iic_hal_cfg.h" 45 | 46 | /** Enable Designware IIC */ 47 | #define DW_IIC_ENABLE (1) 48 | /** Disable Designware IIC */ 49 | #define DW_IIC_DISABLE (0) 50 | 51 | /** Stop Condition issue after this byte */ 52 | #define IC_DATA_CMD_STOP (1 << 9) 53 | /** Restart Condition issue after this byte */ 54 | #define IC_DATA_CMD_RESTART (1 << 10) 55 | /** No Restart or stop condition after this byte */ 56 | #define IC_DATA_CMD_NONE (0) 57 | 58 | /** Perform a write request */ 59 | #define IC_DATA_CMD_WRITE_REQ (0) 60 | /** Perform a read request */ 61 | #define IC_DATA_CMD_READ_REQ (1 << 8) 62 | 63 | /** Fields of IC_CON register */ 64 | /* DW_APB I2C IP Config Dependencies. */ 65 | #if DW_IIC_ALLOW_RESTART 66 | #define IC_CON_RESTART_EN (1 << 5) 67 | #else 68 | #define IC_CON_RESTART_EN (0x00) 69 | #endif 70 | 71 | /* Master Addressing Mode Config */ 72 | #if DW_IIC_MST_10_BIT_ADDR_SUPPORT 73 | #define MST_10_BIT_ADDR_MODE (1 << 4) 74 | #define IC_10BITADDR_MASTER (1 << 12) 75 | #else 76 | #define MST_10_BIT_ADDR_MODE (0x00) 77 | #define IC_10BITADDR_MASTER (0x00) 78 | #endif 79 | 80 | /* Slave Addressing Mode Config */ 81 | #if DW_IIC_SLV_10_BIT_ADDR_SUPPORT 82 | #define SLV_10_BIT_ADDR_MODE (1 << 3) 83 | #else 84 | #define SLV_10_BIT_ADDR_MODE (0x00) 85 | #endif 86 | 87 | #if DW_IIC_SPECIAL_START_BYTE 88 | #define IC_TAR_SPECIAL (1 << 11) 89 | #define IC_TAR_GC_OR_START (1 << 10) 90 | #else 91 | #define IC_TAR_SPECIAL (0x00) 92 | #define IC_TAR_GC_OR_START (0x00) 93 | #endif 94 | 95 | /** 7bit IIC address mask for target address register */ 96 | #define IC_TAR_7BIT_ADDR_MASK (0x7F) 97 | /** 7bit IIC address mask for slave address register */ 98 | #define IC_SAR_7BIT_ADDR_MASK (0x7F) 99 | /** 10bit IIC address mask for target address register */ 100 | #define IC_TAR_10BIT_ADDR_MASK (0x3FF) 101 | /** 10bit IIC address mask for slave address register */ 102 | #define IC_SAR_10BIT_ADDR_MASK (0x3FF) 103 | 104 | /** Speed modes of IC_CON */ 105 | #define IC_CON_SPEED_MASK (0x6) 106 | #define IC_CON_SPEED_STANDARD (0x2) 107 | #define IC_CON_SPEED_FAST (0x4) 108 | #define IC_CON_SPEED_HIGH (0x6) 109 | /** Working mode of IC_CON */ 110 | #define IC_CON_MST_SLV_MODE_MASK (0x41) 111 | #define IC_CON_ENA_MASTER_MODE (0x41) 112 | #define IC_CON_ENA_SLAVE_MODE (0) 113 | 114 | /* IIC interrupt control */ 115 | #define IC_INT_DISABLE_ALL (0x0) 116 | #define IC_INT_ENABLE_ALL (0x7FF) 117 | /* Interrupt Register Fields */ 118 | #define IC_INTR_STAT_GEN_CALL (1 << 11) 119 | #define IC_INTR_STAT_START_DET (1 << 10) 120 | #define IC_INTR_STAT_STOP_DET (1 << 9) 121 | #define IC_INTR_STAT_ACTIVITY (1 << 8) 122 | #define IC_INTR_STAT_RX_DONE (1 << 7) 123 | #define IC_INTR_STAT_TX_ABRT (1 << 6) 124 | #define IC_INTR_STAT_RD_REQ (1 << 5) 125 | #define IC_INTR_STAT_TX_EMPTY (1 << 4) 126 | #define IC_INTR_STAT_TX_OVER (1 << 3) 127 | #define IC_INTR_STAT_RX_FULL (1 << 2) 128 | #define IC_INTR_STAT_RX_OVER (1 << 1) 129 | #define IC_INTR_STAT_RX_UNDER (1 << 0) 130 | 131 | /* Interrupt enable mask as master */ 132 | #define IC_INT_MST_TX_ENABLE (IC_INTR_STAT_TX_EMPTY|IC_INTR_STAT_TX_OVER|IC_INTR_STAT_TX_ABRT) 133 | #define IC_INT_MST_RX_ENABLE (IC_INTR_STAT_TX_EMPTY|IC_INTR_STAT_RX_FULL|IC_INTR_STAT_RX_OVER|IC_INTR_STAT_RX_UNDER|IC_INTR_STAT_TX_ABRT) 134 | 135 | /* Interrupt enable mask as master */ 136 | #define IC_INT_SLV_COMMON_ENABLE (IC_INTR_STAT_START_DET|IC_INTR_STAT_STOP_DET) 137 | #define IC_INT_SLV_TX_ENABLE (IC_INTR_STAT_RD_REQ|IC_INTR_STAT_TX_ABRT) 138 | #define IC_INT_SLV_RX_ENABLE (IC_INTR_STAT_RX_FULL|IC_INTR_STAT_RX_OVER|IC_INTR_STAT_RX_UNDER) 139 | 140 | /* IC_ENABLE_STATUS Bits */ 141 | #define IC_ENABLE_STATUS_IC_EN (1 << 0) 142 | #define IC_ENABLE_STATUS_SLV_DIS (1 << 1) 143 | #define IC_ENABLE_STATUS_SLV_RX_LOST (1 << 2) 144 | 145 | /* IIC TX & RX threshold settings */ 146 | #define IIC_TX_THRESHOLD (0) 147 | #define IIC_RX_THRESHOLD (0) 148 | 149 | /* DW_APB IIC (DW_IC_STATUS) Status Register Fields. */ 150 | #define IC_STATUS_ACTIVITY (0x01) 151 | #define IC_STATUS_TFNF (0x02) /* (1 << 1) */ 152 | #define IC_STATUS_TFE (0x04) /* (1 << 2) */ 153 | #define IC_STATUS_RFNE (0x08) /* (1 << 3) */ 154 | #define IC_STATUS_RFF (0x10) /* (1 << 4) */ 155 | #define IC_STATUS_MASTER_ACT (0x20) /* (1 << 5) */ 156 | #define IC_STATUS_SLAVE_ACT (0x40) /* (1 << 6) */ 157 | 158 | /* IC_TX_ABRT_SOURCE Register Bit Fields */ 159 | #define IC_TX_ABRT_7B_ADDR_NOACK (1 << 0) 160 | #define IC_TX_ABRT_10ADDR1_NOACK (1 << 1) 161 | #define IC_TX_ABRT_10ADDR2_NOACK (1 << 2) 162 | #define IC_TX_ABRT_TXDATA_NOACK (1 << 3) 163 | #define IC_TX_ABRT_GCALL_NOACK (1 << 4) 164 | #define IC_TX_ABRT_GCALL_READ (1 << 5) 165 | #define IC_TX_ABRT_HS_ACKDET (1 << 6) 166 | #define IC_TX_ABRT_SBYTE_ACKDET (1 << 7) 167 | #define IC_TX_ABRT_HS_NORSTRT (1 << 8) 168 | #define IC_TX_ABRT_SBYTE_NORSTRT (1 << 9) 169 | #define IC_TX_ABRT_10B_RD_NORSTRT (1 << 10) 170 | #define IC_TX_ABRT_MASTER_DIS (1 << 11) 171 | #define IC_TX_ABRT_ARB_LOST (1 << 12) 172 | #define IC_TX_ABRT_SLVFLUSH_TXFIFO (1 << 13) 173 | #define IC_TX_ABRT_SLV_ARBLOST (1 << 14) 174 | #define IC_TX_ABRT_SLVRD_INTX (1 << 15) 175 | 176 | /* Combined bits for iic abort source as master */ 177 | #define IIC_MST_ABRT_ADDR_NOACK (IC_TX_ABRT_7B_ADDR_NOACK|IC_TX_ABRT_10ADDR1_NOACK|IC_TX_ABRT_10ADDR1_NOACK) 178 | #define IIC_MST_ABRT_LOST_BUS (IC_TX_ABRT_ARB_LOST) 179 | #define IIC_MST_ABRT_DATA_NOACK (IC_TX_ABRT_TXDATA_NOACK) 180 | 181 | /* Combined bits for iic abort source as slave */ 182 | #define IIC_SLV_ABRT_LOST_BUS (IC_TX_ABRT_ARB_LOST|IC_TX_ABRT_SLV_ARBLOST) 183 | 184 | /** @} */ 185 | 186 | #endif /* _DEVICE_DW_IIC_HAL_H_ */ 187 | -------------------------------------------------------------------------------- /device/designware/spi/dw_spi.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2017, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2017.03 30 | * \date 2014-06-25 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \brief DesignWare SPI driver header file 37 | * \ingroup DEVICE_DW_SPI 38 | */ 39 | 40 | #ifndef _DEVICE_DW_SPI_H_ 41 | #define _DEVICE_DW_SPI_H_ 42 | 43 | #include "device/device_hal/inc/dev_spi.h" 44 | 45 | /** 46 | * if this header file is included, 47 | * will indicate that this designware spi device 48 | * is used 49 | */ 50 | #define DEVICE_USE_DESIGNWARE_SPI 51 | 52 | #define DW_SPI_IN_FREE (0) /*!< Currently not in spi transfer */ 53 | #define DW_SPI_IN_XFER (DEV_IN_TX|DEV_IN_RX|DEV_IN_XFER) /*!< Currently in spi transfer */ 54 | #define DW_SPI_IN_TX (DEV_IN_TX|DEV_IN_XFER) /*!< Currently in spi tx */ 55 | #define DW_SPI_IN_RX (DEV_IN_RX|DEV_IN_XFER) /*!< Currently in spi rx */ 56 | 57 | #define DW_SPI_GINT_DISABLED (0) /*!< designware interrupt disabled for control iic irq/fiq */ 58 | #define DW_SPI_GINT_ENABLE (1<<0) /*!< designware interrupt enabled for control iic irq/fiq */ 59 | 60 | #define DW_SPI_MASTER_SUPPORTED (0x1) /*!< Support Designware SPI Master Mode */ 61 | #define DW_SPI_SLAVE_SUPPORTED (0x2) /*!< Support Designware SPI Slave Mode */ 62 | /*!< Support Designware SPI Both Master and Slave Mode */ 63 | #define DW_SPI_BOTH_SUPPORTED (DW_SPI_MASTER_SUPPORTED|DW_SPI_SLAVE_SUPPORTED) 64 | 65 | /** 66 | * \defgroup DEVICE_DW_SPI_REGSTRUCT DesignWare SPI Register Structure 67 | * \ingroup DEVICE_DW_SPI 68 | * \brief contains definitions of DesignWare SPI register structure. 69 | * \details detailed description of DesignWare SPI register information 70 | * @{ 71 | */ 72 | /** 73 | * \brief DesignWare SPI register structure 74 | * \details Detailed struct description of DesignWare SPI 75 | * block register information, implementation of dev_spi_info::spi_regs 76 | */ 77 | typedef volatile struct dw_spi_reg 78 | { 79 | /*!< Control Register */ 80 | /*!< SPI Control Register 0 (0x0) */ 81 | uint32_t CTRLR0; 82 | /*!< SPI Control Register 1 (0x4) */ 83 | uint32_t CTRLR1; 84 | /*!< Enable Register */ 85 | /*!< SPI Enable Register (0x8) */ 86 | uint32_t SSIENR; 87 | /*!< SPI Microwire Control Register (0xC) */ 88 | uint32_t MWCR; 89 | /*!< SPI Slave Enable Register (0x10) */ 90 | uint32_t SER; 91 | /*!< SPI Baud Rate Select Register (0x14) */ 92 | uint32_t BAUDR; 93 | /*!< TX and RX FIFO Control Register */ 94 | /*!< SPI Transmit FIFO Threshold Level Register (0x18) */ 95 | uint32_t TXFTLR; 96 | /*!< SPI Receive FIFO Threshold Level Register (0x1C) */ 97 | uint32_t RXFTLR; 98 | /*!< SPI Transmit FIFO Level Register (0x20) */ 99 | uint32_t TXFLR; 100 | /*!< SPI Receive FIFO Level Register (0x24) */ 101 | uint32_t RXFLR; 102 | /*!< SPI Status Register (0x28) */ 103 | uint32_t SR; 104 | /*!< Interrupt Enable/Disable/Control Registers */ 105 | /*!< SPI Interrupt Mask Register (0x2C) */ 106 | uint32_t IMR; 107 | /*!< SPI Interrupt Status Register (0x30) */ 108 | uint32_t ISR; 109 | /*!< SPI Raw Interrupt Status Register (0x34) */ 110 | uint32_t RISR; 111 | /*!< SPI Transmit FIFO Overflow Interrupt Clear Register (0x38) */ 112 | uint32_t TXOICR; 113 | /*!< SPI Receive FIFO Overflow Interrupt Clear Register (0x3C) */ 114 | uint32_t RXOICR; 115 | /*!< SPI Receive FIFO Underflow Interrupt Clear Register (0x40) */ 116 | uint32_t RXUICR; 117 | /*!< SPI Multi-Master Interrupt Clear Register (0x44) */ 118 | uint32_t MSTICR; 119 | /*!< SPI Interrupt Clear Register (0x48) */ 120 | uint32_t ICR; 121 | /*!< DMA Control Register (0x4C) */ 122 | uint32_t DMACR; 123 | /*!< DMA Transmit Data Level (0x50) */ 124 | uint32_t DMATDLR; 125 | /*!< DMA Receive Data Level (0x54) */ 126 | uint32_t DMARDLR; 127 | /*!< SPI Identification Register (0x58) */ 128 | uint32_t IDR; 129 | /*!< SPI CoreKit ID Register (Value after Reset : 0x3332322A) (0x5C) */ 130 | uint32_t SSI_VER_ID; 131 | /*!< Data Register */ 132 | /*!< SPI DATA Register for both Read and Write (0x60) */ 133 | uint32_t DATAREG; 134 | } DW_SPI_REG, *DW_SPI_REG_PTR; 135 | /** @} */ 136 | 137 | /** Designware SPI Message Transfer */ 138 | typedef struct dw_spi_transfer { 139 | uint32_t xfer_len; 140 | uint32_t tx_idx; 141 | uint32_t rx_idx; 142 | uint32_t nbytes; 143 | DEV_SPI_TRANSFER *tx_xfer; 144 | DEV_SPI_TRANSFER *rx_xfer; 145 | } DW_SPI_TRANSFER, *DW_SPI_TRANSFER_PTR; 146 | 147 | /** 148 | * \brief DesignWare SPI control structure definition 149 | * \details implement of dev_spi_info::dev_spi_info 150 | */ 151 | typedef struct dw_spi_ctrl { 152 | DW_SPI_REG *dw_spi_regs; /*!< spi register */ 153 | /* Variables which should be set during object implementation */ 154 | uint32_t support_modes; /*!< supported spi modes */ 155 | uint32_t intno; /*!< interrupt no */ 156 | uint32_t dw_apb_bus_freq; /*!< spi ip apb bus frequency */ 157 | uint32_t tx_fifo_len; /*!< transmit fifo length */ 158 | uint32_t rx_fifo_len; /*!< receive fifo length */ 159 | INT_HANDLER dw_spi_int_handler; /*!< spi interrupt handler */ 160 | /* Variables which always change during iic operation */ 161 | uint32_t int_status; /*!< iic interrupt status */ 162 | DW_SPI_TRANSFER dw_xfer; /*!< designware spi transfer */ 163 | } DW_SPI_CTRL, *DW_SPI_CTRL_PTR; 164 | 165 | #ifdef __cplusplus 166 | extern "C" { 167 | #endif 168 | 169 | /** 170 | * \defgroup DEVICE_DW_SPI_FUNCDLR DesignWare SPI Function Declaration 171 | * \ingroup DEVICE_DW_SPI 172 | * \brief contains declarations of designware spi functions. 173 | * \details This are only used in \ref dw_spi_obj.c 174 | * @{ 175 | */ 176 | extern int32_t dw_spi_open (DEV_SPI *spi_obj, uint32_t mode, uint32_t param); 177 | extern int32_t dw_spi_close (DEV_SPI *spi_obj); 178 | extern int32_t dw_spi_control (DEV_SPI *spi_obj, uint32_t ctrl_cmd, void *param); 179 | extern int32_t dw_spi_write (DEV_SPI *spi_obj, const void *data, uint32_t len); 180 | extern int32_t dw_spi_read (DEV_SPI *spi_obj, void *data, uint32_t len); 181 | extern void dw_spi_isr(DEV_SPI *spi_obj, void *ptr); 182 | /** @} */ 183 | 184 | #ifdef __cplusplus 185 | } 186 | #endif 187 | 188 | /** @} */ 189 | 190 | #endif /* _DEVICE_DW_SPI_H_ */ 191 | -------------------------------------------------------------------------------- /device/designware/uart/dw_uart_hal.h: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-06-20 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \file 36 | * \ingroup DEVICE_DW_IIC 37 | * \brief DesignWare UART driver hardware description related header file 38 | * \details detailed hardware related definitions of DesignWare UART driver 39 | */ 40 | 41 | #ifndef _DEVICE_DW_UART_HAL_H_ 42 | #define _DEVICE_DW_UART_HAL_H_ 43 | 44 | /* DW APB UART bit definitions */ 45 | 46 | /** 47 | * \name DesignWare UART HAL IER Marcos 48 | * \brief DesignWare UART hal IER related macros 49 | * @{ 50 | */ 51 | /* IER */ 52 | #define DW_UART_IER_DATA_AVAIL (0x01) 53 | #define DW_UART_IER_XMIT_EMPTY (0x02) 54 | #define DW_UART_IER_LINE_STATUS (0x04) 55 | #define DW_UART_IER_MDM_STATUS (0x08) 56 | #define DW_UART_IER_PTIME (0x80) 57 | /** @} */ 58 | 59 | /** 60 | * \name DesignWare UART HAL IIR Marcos 61 | * \brief DesignWare UART hal IIR related macros 62 | * @{ 63 | */ 64 | /* IIR */ 65 | /* IIR READ */ 66 | #define DW_UART_IIR_IP (0x01) 67 | #define DW_UART_IIR_MASK (0x0E) 68 | #define DW_UART_IIR_READ_FIFO_ENABLE (0xC0) 69 | 70 | /* Possible interrupt IIR_MASK values */ 71 | #define DW_UART_IIR_MDM_STATUS (0x00) 72 | #define DW_UART_IIR_XMIT_EMPTY (0x02) 73 | #define DW_UART_IIR_DATA_AVAIL (0x04) 74 | #define DW_UART_IIR_LINE_STATUS (0x06) 75 | #define DW_UART_IIR_RX_TIMEOUT (0x0C) 76 | #define DW_UART_IIR_INT_ID_MASK (0x0f) 77 | 78 | /* IIR WRITE */ 79 | #define DW_UART_IIR_FIFO_ENABLE (0x01) 80 | #define DW_UART_IIR_RCVR_FIFO_RESET (0x02) 81 | #define DW_UART_IIR_XMIT_FIFO_RESET (0x04) 82 | #define DW_UART_IIR_DMA_MODE_SELECT (0x08) 83 | #define DW_UART_IIR_RCV_TRIGGER_MASK (0xC0) 84 | 85 | /* Values for IIR receive trigger */ 86 | #define DW_UART_IIR_TRIGGER_LEVEL_1_CHAR (0x00) 87 | #define DW_UART_IIR_TRIGGER_LEVEL_1_4_FULL (0x40) 88 | #define DW_UART_IIR_TRIGGER_LEVEL_1_2_FULL (0x80) 89 | #define DW_UART_IIR_TRIGGER_LEVEL_2_LESS_FULL (0xC0) 90 | /** @} */ 91 | 92 | /** 93 | * \name DesignWare UART HAL LCR Marcos 94 | * \brief DesignWare UART hal LCR related macros 95 | * @{ 96 | */ 97 | /* LCR */ 98 | #define DW_UART_LCR_WORD_LEN_MASK (0x03) 99 | #define DW_UART_LCR_STOP_BIT_MASK (0x04) 100 | #define DW_UART_LCR_PARITY_MASK (0x38) 101 | #define DW_UART_LCR_DPS_MASK (0x3F) 102 | #define DW_UART_LCR_STICK_PARITY (0x20) 103 | #define DW_UART_LCR_BREAK (0x40) 104 | #define DW_UART_LCR_DLAB (0x80) 105 | 106 | /* Word length values */ 107 | #define DW_UART_LCR_WORD_LEN5 (0x00) 108 | #define DW_UART_LCR_WORD_LEN6 (0x01) 109 | #define DW_UART_LCR_WORD_LEN7 (0x02) 110 | #define DW_UART_LCR_WORD_LEN8 (0x03) 111 | 112 | /* stop bit values */ 113 | #define DW_UART_LCR_1_STOP_BIT (0x00) 114 | #define DW_UART_LCR_1D5_STOP_BIT (0x04) 115 | #define DW_UART_LCR_2_STOP_BIT (0x04) 116 | 117 | /* Parity bit values */ 118 | #define DW_UART_LCR_PARITY_NONE (0x00) 119 | #define DW_UART_LCR_PARITY_ODD (0x08) 120 | #define DW_UART_LCR_PARITY_EVEN (0x18) 121 | #define DW_UART_LCR_PARITY_MARK (0x28) 122 | #define DW_UART_LCR_PARITY_SPACE (0x38) 123 | 124 | /** @} */ 125 | 126 | /** 127 | * \name DesignWare UART HAL MCR Marcos 128 | * \brief DesignWare UART hal MCR related macros 129 | * @{ 130 | */ 131 | /* MCR */ 132 | #define DW_UART_MCR_DTR (0x01) 133 | #define DW_UART_MCR_RTS (0x02) 134 | #define DW_UART_MCR_LOOPBACK (0x10) 135 | #define DW_UART_MCR_AFCE (0x20) 136 | #define DW_UART_MCR_SIRE (0x40) 137 | /** @} */ 138 | 139 | /** 140 | * \name DesignWare UART HAL LSR Marcos 141 | * \brief DesignWare UART hal LSR related macros 142 | * @{ 143 | */ 144 | /* LSR */ 145 | #define DW_UART_LSR_DR (0x01) 146 | #define DW_UART_LSR_OVERRUN (0x02) 147 | #define DW_UART_LSR_PARITYERR (0x04) 148 | #define DW_UART_LSR_FRAMEERR (0x08) 149 | #define DW_UART_LSR_BREAKRCVD (0x10) 150 | #define DW_UART_LSR_TXD_EMPTY (0x20) 151 | #define DW_UART_LSR_TX_STATUS (0x40) 152 | #define DW_UART_LSR_RX_FIFOERR (0x80) 153 | /** @} */ 154 | 155 | /** 156 | * \name DesignWare UART HAL MSR Marcos 157 | * \brief DesignWare UART hal MSR related macros 158 | * @{ 159 | */ 160 | /* MSR */ 161 | #define DW_UART_MSR_DCTS (0x01) 162 | #define DW_UART_MSR_DDSR (0x02) 163 | #define DW_UART_MSR_TERI (0x04) 164 | #define DW_UART_MSR_DDCD (0x08) 165 | #define DW_UART_MSR_CTS (0x10) 166 | #define DW_UART_MSR_DSR (0x20) 167 | #define DW_UART_MSR_RIC (0x40) 168 | #define DW_UART_MSR_DCD (0x80) 169 | /** @} */ 170 | 171 | /** 172 | * \name DesignWare UART HAL FCR Marcos 173 | * \brief DesignWare UART hal FCR related macros 174 | * @{ 175 | */ 176 | /* FCR */ 177 | #define DW_UART_FCR_FEN (0x01) 178 | #define DW_UART_FCR_RFR (0x02) 179 | #define DW_UART_FCR_TFR (0x04) 180 | #define DW_UART_FCR_DMS (0x08) 181 | #define DW_UART_FCR_RTL (0xC0) 182 | /** @} */ 183 | 184 | /** 185 | * \name DesignWare UART HAL USR Marcos 186 | * \brief DesignWare UART hal USR related macros 187 | * @{ 188 | */ 189 | /* USR */ 190 | #define DW_UART_USR_BUSY (0x01) 191 | #define DW_UART_USR_TFNF (0x02) 192 | #define DW_UART_USR_TFE (0x04) 193 | #define DW_UART_USR_RFNE (0x08) 194 | #define DW_UART_USR_RFF (0x10) 195 | /** @} */ 196 | 197 | /** 198 | * \name DesignWare UART HAL SFE Marcos 199 | * \brief DesignWare UART hal SFE related macros 200 | * @{ 201 | */ 202 | /* SFE */ 203 | #define DW_UART_SFE_SHADOW_FIFO_ENABLE (0x01) 204 | /** @} */ 205 | 206 | /** 207 | * \name DesignWare UART HAL SRR Marcos 208 | * \brief DesignWare UART hal SRR related macros 209 | * @{ 210 | */ 211 | /* SRR */ 212 | #define DW_UART_SRR_UR (0x01) 213 | #define DW_UART_SRR_RFR (0x02) 214 | #define DW_UART_SRR_XFR (0x04) 215 | /** @} */ 216 | 217 | /** 218 | * \name DesignWare UART HAL SRT Marcos 219 | * \brief DesignWare UART hal SRT related macros 220 | * @{ 221 | */ 222 | /* SRT */ 223 | #define DW_UART_SRT_TRIGGER_LEVEL_1_CHAR (0x00) 224 | #define DW_UART_SRT_TRIGGER_LEVEL_1_4_FULL (0x01) 225 | #define DW_UART_SRT_TRIGGER_LEVEL_1_2_FULL (0x02) 226 | #define DW_UART_SRT_TRIGGER_LEVEL_2_LESS_FULL (0x03) 227 | /** @} */ 228 | 229 | /** 230 | * \name DesignWare UART HAL STET Marcos 231 | * \brief DesignWare UART hal STET related macros 232 | * @{ 233 | */ 234 | /* STET*/ 235 | #define DW_UART_STET_FIFO_EMPTY (0x00) 236 | #define DW_UART_STET_2_CHARS_IN_FIFO (0x01) 237 | #define DW_UART_STET_1_4_FULL (0x02) 238 | #define DW_UART_STET_1_2_FULL (0x03) 239 | /** @} */ 240 | 241 | /** 242 | * \name DesignWare UART HAL CPR Marcos 243 | * \brief DesignWare UART hal CPR related macros 244 | * @{ 245 | */ 246 | /* CPR*/ 247 | #define DW_UART_CPR_FIFO_STAT (1<<10) 248 | #define DW_UART_CPR_FIFO_MODE_OFS (16) 249 | #define DW_UART_CPR_FIFO_MODE_MASK (0xFF) 250 | #define DW_UART_CPR_FIFO_MODE (0xFF0000) 251 | /** @} */ 252 | 253 | #endif /* _DEVICE_DW_UART_HAL_H_ */ 254 | -------------------------------------------------------------------------------- /board/emsk/uart/dw_uart_obj.c: -------------------------------------------------------------------------------- 1 | /* ------------------------------------------ 2 | * Copyright (c) 2016, Synopsys, Inc. All rights reserved. 3 | 4 | * Redistribution and use in source and binary forms, with or without modification, 5 | * are permitted provided that the following conditions are met: 6 | 7 | * 1) Redistributions of source code must retain the above copyright notice, this 8 | * list of conditions and the following disclaimer. 9 | 10 | * 2) Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation and/or 12 | * other materials provided with the distribution. 13 | 14 | * 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may 15 | * be used to endorse or promote products derived from this software without 16 | * specific prior written permission. 17 | 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 20 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 21 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR 22 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | * 29 | * \version 2016.05 30 | * \date 2014-07-03 31 | * \author Huaqi Fang(Huaqi.Fang@synopsys.com) 32 | --------------------------------------------- */ 33 | 34 | /** 35 | * \defgroup BOARD_EMSK_DRV_DW_UART_OBJ EMSK DW UART Object 36 | * \ingroup BOARD_EMSK_DRIVER 37 | * \brief EMSK Designware UART Objects 38 | * \details 39 | * Realize the EMSK board uart object using Designware uart device driver, 40 | * only need to realize some Designware uart structures combine with EMSK uart 41 | * hardware resource. just like cpp class instantiation. 42 | */ 43 | 44 | /** 45 | * \file 46 | * \ingroup BOARD_EMSK_DRV_DW_UART_OBJ 47 | * \brief designware uart object instantiation on emsk 48 | */ 49 | 50 | /** 51 | * \addtogroup BOARD_EMSK_DRV_DW_UART_OBJ 52 | * @{ 53 | */ 54 | #include "inc/arc/arc.h" 55 | #include "inc/arc/arc_builtin.h" 56 | #include "inc/embARC_toolchain.h" 57 | #include "inc/embARC_error.h" 58 | 59 | #include "inc/arc/arc_exception.h" 60 | #include "device/designware/uart/dw_uart.h" 61 | #include "board/emsk/uart/dw_uart_obj.h" 62 | 63 | #include "board/emsk/emsk.h" 64 | 65 | #ifdef ARC_FEATURE_DMP_PERIPHERAL 66 | #define PERIPHERAL_BASE ARC_FEATURE_DMP_PERIPHERAL 67 | #else 68 | #define PERIPHERAL_BASE _arc_aux_read(AUX_DMP_PERIPHERAL) 69 | #endif 70 | 71 | #define DW_UART_FIFO_LEN 32 72 | 73 | /** 74 | * \name EMSK DesignWare UART 0 Object Instantiation 75 | * @{ 76 | */ 77 | #if (USE_DW_UART_0) 78 | static void dw_uart_0_isr(void *ptr); 79 | #define DW_UART_0_RELBASE (REL_REGBASE_UART0) /*!< designware uart 0 relative baseaddr */ 80 | #define DW_UART_0_INTNO (INTNO_UART0) /*!< designware uart 0 interrupt number */ 81 | 82 | DEV_UART dw_uart_0; /*!< designware uart object */ 83 | DW_UART_CTRL dw_uart_0_ctrl = { /*!< designware uart 0 ctrl */ 84 | 0, CLK_BUS_APB, DW_UART_0_INTNO, (INT_HANDLER)dw_uart_0_isr, 85 | DW_UART_FIFO_LEN, DW_UART_FIFO_LEN, 0 86 | }; 87 | 88 | /** designware uart 0 open */ 89 | static int32_t dw_uart_0_open (uint32_t baud) 90 | { 91 | return dw_uart_open(&dw_uart_0, baud); 92 | } 93 | /** designware uart 0 close */ 94 | static int32_t dw_uart_0_close (void) 95 | { 96 | return dw_uart_close(&dw_uart_0); 97 | } 98 | /** designware uart 0 control */ 99 | static int32_t dw_uart_0_control (uint32_t ctrl_cmd, void *param) 100 | { 101 | return dw_uart_control(&dw_uart_0, ctrl_cmd, param); 102 | } 103 | /** designware uart 0 write */ 104 | static int32_t dw_uart_0_write (const void *data, uint32_t len) 105 | { 106 | return dw_uart_write(&dw_uart_0, data, len); 107 | } 108 | /** designware uart 0 close */ 109 | static int32_t dw_uart_0_read (void *data, uint32_t len) 110 | { 111 | return dw_uart_read(&dw_uart_0, data, len); 112 | } 113 | /** designware uart 0 interrupt rountine */ 114 | static void dw_uart_0_isr(void *ptr) 115 | { 116 | dw_uart_isr(&dw_uart_0, ptr); 117 | } 118 | /** install designware uart 0 to system */ 119 | static void dw_uart_0_install(void) 120 | { 121 | uint32_t uart_abs_base = 0; 122 | DEV_UART *dw_uart_ptr = &dw_uart_0; 123 | DEV_UART_INFO *dw_uart_info_ptr = &(dw_uart_0.uart_info); 124 | DW_UART_CTRL *dw_uart_ctrl_ptr = &dw_uart_0_ctrl; 125 | 126 | /** 127 | * get absolute designware base address 128 | */ 129 | uart_abs_base = (uint32_t)PERIPHERAL_BASE + DW_UART_0_RELBASE; 130 | dw_uart_ctrl_ptr->dw_uart_regbase = uart_abs_base; 131 | 132 | /** uart info init */ 133 | dw_uart_info_ptr->uart_ctrl = (void *)dw_uart_ctrl_ptr; 134 | dw_uart_info_ptr->opn_cnt = 0; 135 | dw_uart_info_ptr->status = 0; 136 | dw_uart_info_ptr->baudrate = UART_BAUDRATE_115200; /* default 115200bps */ 137 | 138 | /** uart dev init */ 139 | dw_uart_ptr->uart_open = dw_uart_0_open; 140 | dw_uart_ptr->uart_close = dw_uart_0_close; 141 | dw_uart_ptr->uart_control = dw_uart_0_control; 142 | dw_uart_ptr->uart_write = dw_uart_0_write; 143 | dw_uart_ptr->uart_read = dw_uart_0_read; 144 | 145 | } 146 | #endif /* USE_DW_UART_0 */ 147 | /** @} end of name */ 148 | 149 | /** 150 | * \name EMSK DesignWare UART 1 Object Instantiation 151 | * @{ 152 | */ 153 | #if (USE_DW_UART_1) 154 | static void dw_uart_1_isr(void *ptr); 155 | #define DW_UART_1_RELBASE (REL_REGBASE_UART1) /*!< designware uart 1 relative baseaddr */ 156 | #define DW_UART_1_INTNO (INTNO_UART1) /*!< designware uart 1 interrupt number */ 157 | 158 | DEV_UART dw_uart_1; /*!< designware uart 1 object */ 159 | DW_UART_CTRL dw_uart_1_ctrl = { /*!< designware uart 1 ctrl */ 160 | 0, CLK_BUS_APB, DW_UART_1_INTNO, (INT_HANDLER)dw_uart_1_isr, 161 | DW_UART_FIFO_LEN, DW_UART_FIFO_LEN, 0 162 | }; 163 | 164 | /** designware uart 1 open */ 165 | static int32_t dw_uart_1_open (uint32_t baud) 166 | { 167 | return dw_uart_open(&dw_uart_1, baud); 168 | } 169 | /** designware uart 1 close */ 170 | static int32_t dw_uart_1_close (void) 171 | { 172 | return dw_uart_close(&dw_uart_1); 173 | } 174 | /** designware uart 1 control */ 175 | static int32_t dw_uart_1_control (uint32_t ctrl_cmd, void *param) 176 | { 177 | return dw_uart_control(&dw_uart_1, ctrl_cmd, param); 178 | } 179 | /** designware uart 1 write */ 180 | static int32_t dw_uart_1_write (const void *data, uint32_t len) 181 | { 182 | return dw_uart_write(&dw_uart_1, data, len); 183 | } 184 | /** designware uart 1 close */ 185 | static int32_t dw_uart_1_read (void *data, uint32_t len) 186 | { 187 | return dw_uart_read(&dw_uart_1, data, len); 188 | } 189 | /** designware uart 1 interrupt routine */ 190 | static void dw_uart_1_isr(void *ptr) 191 | { 192 | dw_uart_isr(&dw_uart_1, ptr); 193 | } 194 | /** install designware uart 1 to system */ 195 | static void dw_uart_1_install(void) 196 | { 197 | uint32_t uart_abs_base = 0; 198 | DEV_UART *dw_uart_ptr = &dw_uart_1; 199 | DEV_UART_INFO *dw_uart_info_ptr = &(dw_uart_1.uart_info); 200 | DW_UART_CTRL *dw_uart_ctrl_ptr = &dw_uart_1_ctrl; 201 | 202 | /** 203 | * get absolute designware base address 204 | */ 205 | uart_abs_base = (uint32_t)PERIPHERAL_BASE + DW_UART_1_RELBASE; 206 | dw_uart_ctrl_ptr->dw_uart_regbase = uart_abs_base; 207 | 208 | /** uart info init */ 209 | dw_uart_info_ptr->uart_ctrl = (void *)dw_uart_ctrl_ptr; 210 | dw_uart_info_ptr->opn_cnt = 0; 211 | dw_uart_info_ptr->status = 0; 212 | dw_uart_info_ptr->baudrate = UART_BAUDRATE_115200; /* default 115200bps */ 213 | 214 | /** uart dev init */ 215 | dw_uart_ptr->uart_open = dw_uart_1_open; 216 | dw_uart_ptr->uart_close = dw_uart_1_close; 217 | dw_uart_ptr->uart_control = dw_uart_1_control; 218 | dw_uart_ptr->uart_write = dw_uart_1_write; 219 | dw_uart_ptr->uart_read = dw_uart_1_read; 220 | } 221 | #endif /* USE_DW_UART_1 */ 222 | /** @} end of name */ 223 | 224 | /** get one designware device structure */ 225 | DEV_UART_PTR uart_get_dev(int32_t uart_id) 226 | { 227 | static uint32_t install_flag = 0; 228 | 229 | /* intall device objects */ 230 | if (install_flag == 0) { 231 | install_flag = 1; 232 | dw_uart_all_install(); 233 | } 234 | 235 | switch (uart_id) { 236 | #if (USE_DW_UART_0) 237 | case DW_UART_0_ID: 238 | return &dw_uart_0; 239 | break; 240 | #endif 241 | #if (USE_DW_UART_1) 242 | case DW_UART_1_ID: 243 | return &dw_uart_1; 244 | break; 245 | #endif 246 | default: 247 | break; 248 | } 249 | return NULL; 250 | } 251 | 252 | /** 253 | * \brief install all uart objects 254 | * \note \b MUST be called during system init 255 | */ 256 | void dw_uart_all_install(void) 257 | { 258 | #if (USE_DW_UART_0) 259 | dw_uart_0_install(); 260 | #endif 261 | #if (USE_DW_UART_1) 262 | dw_uart_1_install(); 263 | #endif 264 | } 265 | 266 | /** @} end of group BOARD_EMSK_DRV_DW_UART_OBJ */ 267 | --------------------------------------------------------------------------------