├── .gitignore ├── EmbeddedSw ├── README.md ├── ThirdParty │ └── sw_services │ │ ├── lwip211_v1_29 │ │ ├── data │ │ │ └── lwip211.mld │ │ └── src │ │ │ └── contrib │ │ │ └── ports │ │ │ └── xilinx │ │ │ ├── include │ │ │ └── netif │ │ │ │ └── xaxiemacif.h │ │ │ └── netif │ │ │ ├── xaxiemacif.c │ │ │ ├── xaxiemacif_physpeed.c │ │ │ ├── xemacpsif.c │ │ │ └── xemacpsif_physpeed.c │ │ └── lwip211_v1_39 │ │ ├── data │ │ └── lwip211.mld │ │ └── src │ │ └── contrib │ │ └── ports │ │ └── xilinx │ │ ├── include │ │ └── netif │ │ │ └── xaxiemacif.h │ │ └── netif │ │ ├── xaxiemacif.c │ │ ├── xaxiemacif_physpeed.c │ │ ├── xemacpsif.c │ │ └── xemacpsif_physpeed.c └── XilinxProcessorIPLib │ └── drivers │ ├── axiethernet_v5_119 │ ├── data │ │ └── axiethernet.mdd │ └── src │ │ ├── xaxiethernet.c │ │ └── xaxiethernet.h │ ├── axiethernet_v5_99 │ ├── data │ │ └── axiethernet.mdd │ └── src │ │ ├── xaxiethernet.c │ │ └── xaxiethernet.h │ ├── emacps_v3_119 │ ├── data │ │ └── emacps.mdd │ └── src │ │ ├── xemacps.h │ │ └── xemacps_control.c │ └── emacps_v3_129 │ ├── data │ └── emacps.mdd │ └── src │ ├── xemacps.h │ └── xemacps_control.c ├── LICENSE.txt ├── PetaLinux ├── README.md ├── build-petalinux └── src │ ├── ports-0123-axieth │ └── project-spec │ │ └── meta-user │ │ └── recipes-bsp │ │ └── device-tree │ │ └── files │ │ └── port-config.dtsi │ ├── ports-0123 │ └── project-spec │ │ └── meta-user │ │ └── recipes-bsp │ │ └── device-tree │ │ └── files │ │ └── port-config.dtsi │ ├── v1 │ └── project-spec │ │ ├── configs │ │ ├── busybox │ │ │ └── inetd.conf │ │ ├── config │ │ ├── init-ifupdown │ │ │ └── interfaces │ │ └── rootfs_config │ │ └── meta-user │ │ ├── conf │ │ ├── layer.conf │ │ ├── petalinuxbsp.conf │ │ └── user-rootfsconfig │ │ ├── recipes-apps │ │ ├── gpio-demo │ │ │ ├── files │ │ │ │ ├── Makefile │ │ │ │ └── gpio-demo.c │ │ │ └── gpio-demo.bb │ │ └── peekpoke │ │ │ ├── files │ │ │ ├── Makefile │ │ │ ├── peek.c │ │ │ └── poke.c │ │ │ └── peekpoke.bb │ │ ├── recipes-bsp │ │ ├── device-tree │ │ │ ├── device-tree.bbappend │ │ │ └── files │ │ │ │ ├── emacps.patch │ │ │ │ ├── pl-custom.dtsi │ │ │ │ └── system-user.dtsi │ │ ├── fsbl │ │ │ ├── files │ │ │ │ └── fsbl_hooks.patch │ │ │ └── fsbl_%.bbappend │ │ └── u-boot │ │ │ ├── files │ │ │ ├── platform-top.h │ │ │ └── uboot-axieth-could-not-get-phy.patch │ │ │ ├── u-boot-xlnx_%.bbappend │ │ │ ├── u-boot-zynq-scr.bbappend │ │ │ └── u-boot-zynq-scr │ │ │ ├── boot.cmd.default │ │ │ └── boot.cmd.default.initrd │ │ └── recipes-kernel │ │ └── linux │ │ ├── linux-xlnx │ │ ├── bsp.cfg │ │ └── dp83867_sgmii_clk_en.patch │ │ └── linux-xlnx_%.bbappend │ └── v2 │ └── project-spec │ ├── configs │ ├── busybox │ │ └── inetd.conf │ ├── config │ ├── init-ifupdown │ │ └── interfaces │ └── rootfs_config │ └── meta-user │ ├── conf │ ├── layer.conf │ ├── petalinuxbsp.conf │ └── user-rootfsconfig │ ├── recipes-apps │ ├── gpio-demo │ │ ├── files │ │ │ ├── Makefile │ │ │ └── gpio-demo.c │ │ └── gpio-demo.bb │ └── peekpoke │ │ ├── files │ │ ├── Makefile │ │ ├── peek.c │ │ └── poke.c │ │ └── peekpoke.bb │ ├── recipes-bsp │ ├── device-tree │ │ ├── device-tree.bbappend │ │ └── files │ │ │ ├── emacps.patch │ │ │ ├── pl-custom.dtsi │ │ │ └── system-user.dtsi │ ├── fsbl │ │ ├── files │ │ │ └── fsbl_hooks.patch │ │ └── fsbl_%.bbappend │ └── u-boot │ │ ├── files │ │ ├── platform-top.h │ │ └── uboot-axieth-could-not-get-phy.patch │ │ ├── u-boot-xlnx_%.bbappend │ │ ├── u-boot-zynq-scr.bbappend │ │ └── u-boot-zynq-scr │ │ ├── boot.cmd.default │ │ └── boot.cmd.default.initrd │ └── recipes-kernel │ └── linux │ ├── linux-xlnx │ ├── bsp.cfg │ ├── devtool-fragment.cfg │ ├── dp83867_sgmii_clk_en.patch │ └── fix_u96v2_pwrseq_simple.patch │ └── linux-xlnx_%.bbappend ├── README.md ├── Vitis ├── README.md ├── build-vitis.bat ├── build-vitis.tcl └── tcl │ └── workspace.tcl ├── Vivado ├── boards │ └── board_files │ │ ├── ultra96v1 │ │ └── 1.2 │ │ │ ├── board.xml │ │ │ ├── part0_pins.xml │ │ │ ├── preset.xml │ │ │ └── ultra96.jpg │ │ └── ultra96v2 │ │ ├── 1.0 │ │ ├── board.xml │ │ ├── part0_pins.xml │ │ ├── preset.xml │ │ └── ultra96v2.jpg │ │ └── 1.1 │ │ ├── board.xml │ │ ├── part0_pins.xml │ │ ├── preset.xml │ │ ├── ultra96v2.jpg │ │ └── ultra96v2_top.jpg ├── build-axi-eth.bat ├── build-axi-eth.tcl ├── build-ps-gem.bat ├── build-ps-gem.tcl └── src │ ├── bd │ ├── design_1-axi-eth.tcl │ └── design_1-ps-gem.tcl │ └── constraints │ ├── axi-eth.xdc │ └── ps-gem.xdc └── docs ├── Makefile ├── make.bat ├── requirements.txt └── source ├── board_setup.rst ├── conf.py ├── detailed_description.rst ├── getting_started.rst ├── images ├── 96b-quad-ethernet-bottom-labelled.jpg ├── 96b-quad-ethernet-clocks.jpg ├── 96b-quad-ethernet-high-speed.jpg ├── 96b-quad-ethernet-low-speed.jpg ├── 96b-quad-ethernet-mdio.jpg ├── 96b-quad-ethernet-mec-top.jpg ├── 96b-quad-ethernet-mezzanine-extender.jpg ├── 96b-quad-ethernet-mezzanine-med-3.jpg ├── 96b-quad-ethernet-mezzanine-sensors-front.jpg ├── 96b-quad-ethernet-mezzanine-sensors.jpg ├── 96b-quad-ethernet-power.jpg └── 96b-quad-ethernet-top-labelled.jpg ├── index.rst ├── mechanical_info.rst ├── pin_configuration.rst ├── programming_guide.rst ├── references.rst ├── revision_history.rst └── specifications.rst /.gitignore: -------------------------------------------------------------------------------- 1 | Vivado/.Xil/ 2 | Vivado/*.log 3 | Vivado/*.jou 4 | Vivado/axi_eth_*/ 5 | Vivado/ps_gem_*/ 6 | PetaLinux/axi_eth_*/ 7 | PetaLinux/ps_gem_*/ 8 | Vitis/.*/ 9 | Vitis/.* 10 | Vitis/embeddedsw/ 11 | Vitis/boot/ 12 | Vitis/axi_eth_*/ 13 | Vitis/ps_gem_*/ 14 | Vitis/RemoteSystemsTempFiles/ 15 | Vitis/*.log 16 | Vitis/*.jou 17 | docs/build/ 18 | docs/env/ 19 | -------------------------------------------------------------------------------- /EmbeddedSw/README.md: -------------------------------------------------------------------------------- 1 | Modified BSP files 2 | ================== 3 | 4 | ### lwIP modifications 5 | 6 | This project uses a modified version of the lwIP library. The modifications allow it to work for our MDIO 7 | bus architecture where a single master is connected to multiple slaves. 8 | 9 | ### AXI Ethernet driver modifications 10 | 11 | The AXI Ethernet driver is also modified to allow support of the common master MDIO architecture. To do this 12 | we add an extra pointer to the XAxiEthernet struct (AXI Ethernet driver instance data) that points to the 13 | base address of the XAxiEthernet that is master of the MDIO bus. The MDIO read and write functions are changed to 14 | refer to this base address rather than the base address of the instance passed. 15 | 16 | ### EMAC PS driver modifications 17 | 18 | The EMAC PS driver is also modified to allow support of the common master MDIO architecture. To do this 19 | we add an extra pointer to the XEmacPs struct (XEmacPs driver instance data) that points to the 20 | base address of the XEmacPs that is master of the MDIO bus. The MDIO read and write functions (XEmacPs_PhyRead, 21 | XEmacPs_PhyWrite) are changed to refer to this base address rather than the base address of the instance passed. 22 | -------------------------------------------------------------------------------- /EmbeddedSw/ThirdParty/sw_services/lwip211_v1_29/data/lwip211.mld: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # Copyright (c) 2007 - 2020 Xilinx, Inc. All rights reserved. 3 | # SPDX-License-Identifier: MIT 4 | ############################################################################### 5 | 6 | OPTION psf_version = 2.1; 7 | 8 | BEGIN LIBRARY lwip211 9 | 10 | OPTION drc = lwip_drc; 11 | OPTION copyfiles = all; 12 | OPTION desc = "lwip211 library: lwIP (light weight IP) is an open source TCP/IP stack configured for Xilinx hard and soft Ethernet MACs"; 13 | OPTION app_linker_flags = "-Wl,--start-group,-lxil,-llwip4,-lgcc,-lc,--end-group"; 14 | OPTION requires_os = (standalone xilkernel freertos10_xilinx); 15 | OPTION VERSION = 1.29; 16 | OPTION NAME = lwip211; 17 | 18 | PARAM name = api_mode, desc = "Mode of operation for lwIP (RAW API/Sockets API)", type = enum, values = ("RAW API" = RAW_API, "SOCKET API" = SOCKET_API), default = RAW_API; 19 | PARAM name = no_sys_no_timers, desc = "Drops support for sys_timeout when NO_SYS==1", type = bool, default = true; 20 | PARAM name = socket_mode_thread_prio, desc = "Priority of threads in socket mode", type = int, default = 2; 21 | PARAM name = use_axieth_on_zynq, desc = "Option if set to 1 ensures axiethernet adapter being used in Zynq. Valid only for Zynq", type = int, default = 1; 22 | PARAM name = use_emaclite_on_zynq, desc = "Option if set to 1 ensures emaclite adapter being used in Zynq. Valid only for Zynq", type = int, default = 1; 23 | PARAM name = lwip_tcp_keepalive, desc = "Enable keepalive processing with default interval", type = bool, default = false; 24 | 25 | BEGIN CATEGORY temac_adapter_options 26 | PARAM name = temac_adapter_options, desc = "Settings for xps-ll-temac/Axi-Ethernet/Gem lwIP adapter", type = bool, default = true, permit = none; 27 | PARAM name = n_tx_descriptors, desc = "Number of TX Buffer Descriptors to be used in SDMA mode", type = int, default = 64; 28 | PARAM name = n_rx_descriptors, desc = "Number of RX Buffer Descriptors to be used in SDMA mode", type = int, default = 64; 29 | PARAM name = n_tx_coalesce, desc = "Setting for TX Interrupt coalescing. Applicable only for Axi-Ethernet/xps-ll-temac.", type = int, default = 1; 30 | PARAM name = n_rx_coalesce, desc = "Setting for RX Interrupt coalescing.Applicable only for Axi-Ethernet/xps-ll-temac.", type = int, default = 1; 31 | PARAM name = tcp_rx_checksum_offload, desc = "Offload TCP Receive checksum calculation (hardware support required).Applicable only for Axi-Ethernet/xps-ll-temac.", type = bool, default = false; 32 | PARAM name = tcp_tx_checksum_offload, desc = "Offload TCP Transmit checksum calculation (hardware support required).Applicable only for Axi-Ethernet/xps-ll-temac.", type = bool, default = false; 33 | PARAM name = tcp_ip_rx_checksum_offload, desc = "Offload TCP and IP Receive checksum calculation (hardware support required).Applicable only for Axi-Ethernet.", type = bool, default = false; 34 | PARAM name = tcp_ip_tx_checksum_offload, desc = "Offload TCP and IP Transmit checksum calculation (hardware support required).Applicable only for Axi-Ethernet.", type = bool, default = false; 35 | PARAM name = phy_link_speed, desc = "link speed as negotiated by the PHY", type = enum, values = ("10 Mbps" = CONFIG_LINKSPEED10, "100 Mbps" = CONFIG_LINKSPEED100, "1000 Mbps" = CONFIG_LINKSPEED1000, "Autodetect" = CONFIG_LINKSPEED_AUTODETECT), default = CONFIG_LINKSPEED_AUTODETECT; 36 | PARAM name = temac_use_jumbo_frames, desc = "use jumbo frames", type = bool, default = false; 37 | PARAM name = emac_number, desc = "Zynq Ethernet Interface number", type = int, default = 0; 38 | END CATEGORY 39 | 40 | BEGIN CATEGORY lwip_memory_options 41 | PROPERTY desc = "lwIP memory options" 42 | PARAM name = lwip_memory_options, desc = "Options controlling lwIP memory usage" 43 | PARAM name = mem_size, desc = "Size of the heap memory (bytes).", type = int, default = 131072; 44 | PARAM name = memp_n_pbuf, desc = "Number of memp struct pbufs. Set this high if application sends lot of data out of ROM", type = int, default = 16; 45 | PARAM name = memp_n_udp_pcb, desc = "Number of active UDP PCBs. One per active UDP connection", type = int, default = 4; 46 | PARAM name = memp_n_tcp_pcb, desc = "Number of active TCP PCBs. One per active TCP connection", type = int, default = 32; 47 | PARAM name = memp_n_tcp_pcb_listen, desc = "Number of listening TCP connections", type = int, default = 8; 48 | PARAM name = memp_n_tcp_seg, desc = "Number of simultaneously queued TCP segments", type = int, default = 256; 49 | PARAM name = memp_n_sys_timeout, desc = "Number of simultaneously active timeouts", type = int, default = 8; 50 | PARAM name = memp_num_netbuf, desc = "Number of struct netbufs (socket mode only)", type = int, default = 8; 51 | PARAM name = memp_num_netconn, desc = "Number of struct netconns (socket mode only)", type = int, default = 16; 52 | PARAM name = memp_num_api_msg, desc = "Number of api msg structures (socket mode only)", type = int, default = 16; 53 | PARAM name = memp_num_tcpip_msg, desc = "Number of tcpip msg structures (socket mode only)", type = int, default = 64; 54 | END CATEGORY 55 | 56 | BEGIN CATEGORY pbuf_options 57 | PROPERTY desc = "Pbuf Related Options"; 58 | PARAM name = pbuf_options, desc = "Pbuf Options", type = bool, default = true, permit = none; 59 | PARAM name = pbuf_pool_size, desc = "Number of buffers in pbuf pool.", type = int, default = 256; 60 | PARAM name = pbuf_pool_bufsize, desc = "Size of each pbuf in pbuf pool.", type = int, default = 1700; 61 | PARAM name = pbuf_link_hlen, desc = "Number of bytes that should be allocated for a link level header.", type = int, default = 16, permit = none; 62 | END CATEGORY 63 | 64 | BEGIN CATEGORY mbox_options 65 | PROPERTY desc = "Mbox Related Options"; 66 | PARAM name = mbox_options, desc = "Mbox Options", type = bool, default = true, permit = none; 67 | PARAM name = lwip_tcpip_core_locking_input, desc = "TCPIP input core locking", type = bool, default = false; 68 | PARAM name = tcpip_mbox_size, desc = "Size of TCPIP mbox queue.", type = int, default = 200; 69 | PARAM name = default_tcp_recvmbox_size, desc = "Size of TCP receive mbox queue.", type = int, default = 200; 70 | PARAM name = default_udp_recvmbox_size, desc = "Size of UDP receive mbox queue.", type = int, default = 100; 71 | END CATEGORY 72 | 73 | BEGIN CATEGORY arp_options 74 | PROPERTY desc = "ARP Options"; 75 | PARAM name = arp_options, desc = "ARP Options", type = bool, default = true, permit = none; 76 | PARAM name = arp_table_size, desc = "Number of active hardware address IP address pairs cached.", type = int, default = 10; 77 | PARAM name = arp_queueing, desc = "If enabled outgoing packets are queued during hardware address resolution.", type = int, default = 1, range = (0, 1); 78 | END CATEGORY 79 | 80 | BEGIN CATEGORY lwip_ip_options 81 | PROPERTY desc = "IP Options"; 82 | PARAM name = lwip_ip_options, desc = "IP Options", type = bool, default = true, permit = none; 83 | PARAM name = ip_forward, desc = "Enable forwarding IP packets across network interfaces.", type = int, default = 0, range = (0, 1); 84 | PARAM name = ip_options, desc = "1 = IP options are allowed (but not parsed). 0 = packets with IP options are dropped", type = int, default = 0, range = (0, 1); 85 | PARAM name = ip_reassembly, desc = "Reassemble incoming fragmented IP packets", type = int, default = 1, range = (0, 1); 86 | PARAM name = ip_frag, desc = "Fragment outgoing IP packets if their size exceeds MTU", type = int, default = 1, range = (0, 1); 87 | PARAM name = ip_reass_max_pbufs, desc = "Reassembly PBUF Queue Length", type = int, default = 128; 88 | PARAM name = ip_frag_max_mtu, desc = "Assumed max MTU on any interface for IP frag buffer", type = int, default = 1500; 89 | PARAM name = ip_default_ttl, desc = "Global default TTL used by transport layers", type = int, default = 255; 90 | END CATEGORY 91 | 92 | BEGIN CATEGORY icmp_options 93 | PROPERTY desc = "ICMP Options"; 94 | PARAM name = icmp_options, desc = "ICMP Options", type = bool, default = true, permit = none; 95 | PARAM name = icmp_ttl, desc = "ICMP TTL value", type = int, default = 255; 96 | END CATEGORY 97 | 98 | BEGIN CATEGORY lwip_ipv6_options 99 | PROPERTY desc = "IPv6 Options"; 100 | PARAM name = ipv6_options, desc = "IPv6 Options", type = bool, default = true, permit = none; 101 | PARAM name = ipv6_enable, desc = "IPv6 enable value", type = bool, default = false; 102 | END CATEGORY 103 | 104 | BEGIN CATEGORY igmp_options 105 | PROPERTY desc = "IGMP Options"; 106 | PARAM name = igmp_options, desc = "IGMP Options", type = bool, default = false; 107 | END CATEGORY 108 | 109 | BEGIN CATEGORY udp_options 110 | PROPERTY desc = "UDP Options"; 111 | PARAM name = udp_options, desc = "Is UDP required ?", type = bool, default = true, permit = none; 112 | PARAM name = lwip_udp, desc = "Is UDP required ?", type = bool, default = true; 113 | PARAM name = udp_ttl, desc = "UDP TTL value", type = int, default = 255; 114 | END CATEGORY 115 | 116 | BEGIN CATEGORY tcp_options 117 | PROPERTY desc = "lwIP TCP options"; 118 | PARAM name = tcp_options, desc = "Is TCP required ?", type = bool, default = true, permit = none; 119 | PARAM name = lwip_tcp, desc = "Is TCP required ?", type = bool, default = true; 120 | PARAM name = tcp_wnd, desc = "TCP Window (bytes)", type = int, default = 2048; 121 | PARAM name = tcp_snd_buf, desc = "TCP sender buffer space (bytes)", type = int, default = 8192; 122 | PARAM name = tcp_mss, desc = "TCP Maximum segment size (bytes)", type = int, default = 1460; 123 | PARAM name = tcp_ttl, desc = "TCP TTL value", type = int, default = 255; 124 | PARAM name = tcp_maxrtx, desc = "TCP Maximum retransmission value", type = int, default = 12; 125 | PARAM name = tcp_synmaxrtx, desc = "TCP Maximum SYN retransmission value", type = int, default = 4; 126 | PARAM name = tcp_queue_ooseq, desc = "Should TCP queue segments arriving out of order. Set to 0 if your device is low on memory", type = int, default = 1, range = (0,1) 127 | END CATEGORY 128 | 129 | BEGIN CATEGORY dhcp_options 130 | PROPERTY desc = "lwIP DHCP options"; 131 | PARAM name = dhcp_options, desc = "Is DHCP required?", type = bool, default = true, permit = none; 132 | PARAM name = lwip_dhcp, desc = "Is DHCP required?", type = bool, default = false; 133 | PARAM name = dhcp_does_arp_check, desc = "ARP check on offered addresses?", type = bool, default = false; 134 | END CATEGORY 135 | 136 | BEGIN CATEGORY stats_options 137 | PARAM name = stats_options, desc = "Turn on lwIP statistics?", type = bool, default = true, permit = none; 138 | PARAM name = lwip_stats, desc = "Turn on lwIP statistics?", type = bool, default = false; 139 | END CATEGORY 140 | 141 | BEGIN CATEGORY debug_options 142 | PARAM name = debug_options, desc = "Turn on lwIP Debug?", type = bool, default = true, permit = none; 143 | PARAM name = lwip_debug, desc = "Turn on lwIP Debug?", type = bool, default = false; 144 | PARAM name = ip_debug, desc = "Debug IP layer", type = bool, default = false; 145 | PARAM name = tcp_debug, desc = "Debug TCP layer", type = bool, default = false; 146 | PARAM name = udp_debug, desc = "Debug UDP layer", type = bool, default = false; 147 | PARAM name = icmp_debug, desc = "Debug ICMP protocol", type = bool, default = false; 148 | PARAM name = igmp_debug, desc = "Debug IGMP protocol", type = bool, default = false; 149 | PARAM name = netif_debug, desc = "Debug network interface layer", type = bool, default = false; 150 | PARAM name = sys_debug, desc = "Debug sys arch layer", type = bool, default = false; 151 | PARAM name = pbuf_debug, desc = "Debug pbuf layer", type = bool, default = false; 152 | END CATEGORY 153 | 154 | END LIBRARY 155 | -------------------------------------------------------------------------------- /EmbeddedSw/ThirdParty/sw_services/lwip211_v1_29/src/contrib/ports/xilinx/include/netif/xaxiemacif.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2010 - 2019 Xilinx, Inc. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without modification, 6 | * are permitted provided that the following conditions are met: 7 | * 8 | * 1. Redistributions of source code must retain the above copyright notice, 9 | * this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation 12 | * and/or other materials provided with the distribution. 13 | * 3. The name of the author may not be used to endorse or promote products 14 | * derived from this software without specific prior written permission. 15 | * 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 19 | * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 20 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 21 | * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 25 | * OF SUCH DAMAGE. 26 | * 27 | * This file is part of the lwIP TCP/IP stack. 28 | * 29 | */ 30 | 31 | #ifndef __NETIF_XAXIEMACIF_H__ 32 | #define __NETIF_XAXIEMACIF_H__ 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | #include "xlwipconfig.h" 39 | #include "lwip/netif.h" 40 | #include "netif/etharp.h" 41 | #include "netif/xadapter.h" 42 | 43 | #include "xparameters.h" 44 | #include "xstatus.h" 45 | 46 | #include "xaxiethernet.h" 47 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 48 | #include "xllfifo.h" 49 | #elif XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA 50 | #include "xmcdma.h" 51 | #else 52 | #include "xaxidma.h" 53 | #include "xaxidma_hw.h" 54 | #endif 55 | 56 | #include "netif/xpqueue.h" 57 | #include "xlwipconfig.h" 58 | 59 | #if XLWIP_CONFIG_INCLUDE_AXIETH_ON_ZYNQ == 1 60 | #define AXIDMA_TX_INTR_PRIORITY_SET_IN_GIC 0xA0 61 | #define AXIDMA_RX_INTR_PRIORITY_SET_IN_GIC 0xA0 62 | #define AXIETH_INTR_PRIORITY_SET_IN_GIC 0xA0 63 | #define TRIG_TYPE_RISING_EDGE_SENSITIVE 0x3 64 | 65 | #define INTC_DIST_BASE_ADDR XPAR_SCUGIC_0_DIST_BASEADDR 66 | #endif 67 | 68 | void xaxiemacif_setmac(u32_t index, u8_t *addr); 69 | u8_t* xaxiemacif_getmac(u32_t index); 70 | err_t xaxiemacif_init(struct netif *netif); 71 | int xaxiemacif_input(struct netif *netif); 72 | 73 | unsigned get_IEEE_phy_speed(XAxiEthernet *xaxiemacp, u32 sgmii_phy_addr, u32 ext_phy_addr); 74 | unsigned configure_IEEE_phy_speed(XAxiEthernet *xaxiemacp, u32 sgmii_phy_addr, u32 ext_phy_addr, unsigned speed); 75 | unsigned phy_setup_axiemac (XAxiEthernet *xaxiemacp); 76 | 77 | /* xaxiemacif_hw.c */ 78 | void xaxiemac_error_handler(XAxiEthernet * Temac); 79 | 80 | /* structure within each netif, encapsulating all information required for 81 | * using a particular temac instance 82 | */ 83 | typedef struct { 84 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 85 | XLlFifo axififo; 86 | #elif defined(XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA) 87 | XMcdma aximcdma; 88 | #else 89 | XAxiDma axidma; 90 | #endif 91 | XAxiEthernet axi_ethernet; 92 | 93 | /* queue to store overflow packets */ 94 | pq_queue_t *recv_q; 95 | pq_queue_t *send_q; 96 | 97 | /* pointers to memory holding buffer descriptors (used only with SDMA) */ 98 | void *rx_bdspace; 99 | void *tx_bdspace; 100 | } xaxiemacif_s; 101 | 102 | extern xaxiemacif_s xaxiemacif; 103 | 104 | #ifndef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 105 | s32_t is_tx_space_available(xaxiemacif_s *emac); 106 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA 107 | s32_t process_sent_bds(XMcdma_ChanCtrl *Tx_Chan); 108 | #else 109 | s32_t process_sent_bds(XAxiDma_BdRing *txring); 110 | #endif 111 | #endif 112 | 113 | /* xaxiemacif_dma.c/xaxiemacif_mcdma.c */ 114 | #ifndef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 115 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA 116 | XStatus init_axi_mcdma(struct xemac_s *xemac); 117 | XStatus axi_mcdma_sgsend(xaxiemacif_s *xaxiemacif, struct pbuf *p); 118 | #else 119 | XStatus init_axi_dma(struct xemac_s *xemac); 120 | XStatus axidma_sgsend(xaxiemacif_s *xaxiemacif, struct pbuf *p); 121 | #endif 122 | #endif 123 | 124 | #ifdef __cplusplus 125 | } 126 | #endif 127 | 128 | #endif /* __NETIF_XAXIEMACIF_H__ */ 129 | -------------------------------------------------------------------------------- /EmbeddedSw/ThirdParty/sw_services/lwip211_v1_39/data/lwip211.mld: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # Copyright (c) 2007 - 2020 Xilinx, Inc. All rights reserved. 3 | # SPDX-License-Identifier: MIT 4 | ############################################################################### 5 | 6 | OPTION psf_version = 2.1; 7 | 8 | BEGIN LIBRARY lwip211 9 | 10 | OPTION drc = lwip_drc; 11 | OPTION copyfiles = all; 12 | OPTION desc = "lwip211 library: lwIP (light weight IP) is an open source TCP/IP stack configured for Xilinx hard and soft Ethernet MACs"; 13 | OPTION app_linker_flags = "-Wl,--start-group,-lxil,-llwip4,-lgcc,-lc,--end-group"; 14 | OPTION requires_os = (standalone xilkernel freertos10_xilinx); 15 | OPTION VERSION = 1.39; 16 | OPTION NAME = lwip211; 17 | 18 | PARAM name = api_mode, desc = "Mode of operation for lwIP (RAW API/Sockets API)", type = enum, values = ("RAW API" = RAW_API, "SOCKET API" = SOCKET_API), default = RAW_API; 19 | PARAM name = no_sys_no_timers, desc = "Drops support for sys_timeout when NO_SYS==1", type = bool, default = true; 20 | PARAM name = socket_mode_thread_prio, desc = "Priority of threads in socket mode", type = int, default = 2; 21 | PARAM name = use_axieth_on_zynq, desc = "Option if set to 1 ensures axiethernet adapter being used in Zynq. Valid only for Zynq", type = int, default = 1; 22 | PARAM name = use_emaclite_on_zynq, desc = "Option if set to 1 ensures emaclite adapter being used in Zynq. Valid only for Zynq", type = int, default = 1; 23 | PARAM name = lwip_tcp_keepalive, desc = "Enable keepalive processing with default interval", type = bool, default = false; 24 | 25 | BEGIN CATEGORY temac_adapter_options 26 | PARAM name = temac_adapter_options, desc = "Settings for xps-ll-temac/Axi-Ethernet/Gem lwIP adapter", type = bool, default = true, permit = none; 27 | PARAM name = n_tx_descriptors, desc = "Number of TX Buffer Descriptors to be used in SDMA mode", type = int, default = 64; 28 | PARAM name = n_rx_descriptors, desc = "Number of RX Buffer Descriptors to be used in SDMA mode", type = int, default = 64; 29 | PARAM name = n_tx_coalesce, desc = "Setting for TX Interrupt coalescing. Applicable only for Axi-Ethernet/xps-ll-temac.", type = int, default = 1; 30 | PARAM name = n_rx_coalesce, desc = "Setting for RX Interrupt coalescing.Applicable only for Axi-Ethernet/xps-ll-temac.", type = int, default = 1; 31 | PARAM name = tcp_rx_checksum_offload, desc = "Offload TCP Receive checksum calculation (hardware support required).Applicable only for Axi-Ethernet/xps-ll-temac.", type = bool, default = false; 32 | PARAM name = tcp_tx_checksum_offload, desc = "Offload TCP Transmit checksum calculation (hardware support required).Applicable only for Axi-Ethernet/xps-ll-temac.", type = bool, default = false; 33 | PARAM name = tcp_ip_rx_checksum_offload, desc = "Offload TCP and IP Receive checksum calculation (hardware support required).Applicable only for Axi-Ethernet.", type = bool, default = false; 34 | PARAM name = tcp_ip_tx_checksum_offload, desc = "Offload TCP and IP Transmit checksum calculation (hardware support required).Applicable only for Axi-Ethernet.", type = bool, default = false; 35 | PARAM name = phy_link_speed, desc = "link speed as negotiated by the PHY", type = enum, values = ("10 Mbps" = CONFIG_LINKSPEED10, "100 Mbps" = CONFIG_LINKSPEED100, "1000 Mbps" = CONFIG_LINKSPEED1000, "Autodetect" = CONFIG_LINKSPEED_AUTODETECT), default = CONFIG_LINKSPEED_AUTODETECT; 36 | PARAM name = temac_use_jumbo_frames, desc = "use jumbo frames", type = bool, default = false; 37 | PARAM name = emac_number, desc = "Zynq Ethernet Interface number", type = int, default = 0; 38 | END CATEGORY 39 | 40 | BEGIN CATEGORY lwip_memory_options 41 | PROPERTY desc = "lwIP memory options" 42 | PARAM name = lwip_memory_options, desc = "Options controlling lwIP memory usage" 43 | PARAM name = mem_size, desc = "Size of the heap memory (bytes).", type = int, default = 131072; 44 | PARAM name = memp_n_pbuf, desc = "Number of memp struct pbufs. Set this high if application sends lot of data out of ROM", type = int, default = 16; 45 | PARAM name = memp_n_udp_pcb, desc = "Number of active UDP PCBs. One per active UDP connection", type = int, default = 4; 46 | PARAM name = memp_n_tcp_pcb, desc = "Number of active TCP PCBs. One per active TCP connection", type = int, default = 32; 47 | PARAM name = memp_n_tcp_pcb_listen, desc = "Number of listening TCP connections", type = int, default = 8; 48 | PARAM name = memp_n_tcp_seg, desc = "Number of simultaneously queued TCP segments", type = int, default = 256; 49 | PARAM name = memp_n_sys_timeout, desc = "Number of simultaneously active timeouts", type = int, default = 8; 50 | PARAM name = memp_num_netbuf, desc = "Number of struct netbufs (socket mode only)", type = int, default = 8; 51 | PARAM name = memp_num_netconn, desc = "Number of struct netconns (socket mode only)", type = int, default = 16; 52 | PARAM name = memp_num_api_msg, desc = "Number of api msg structures (socket mode only)", type = int, default = 16; 53 | PARAM name = memp_num_tcpip_msg, desc = "Number of tcpip msg structures (socket mode only)", type = int, default = 64; 54 | END CATEGORY 55 | 56 | BEGIN CATEGORY pbuf_options 57 | PROPERTY desc = "Pbuf Related Options"; 58 | PARAM name = pbuf_options, desc = "Pbuf Options", type = bool, default = true, permit = none; 59 | PARAM name = pbuf_pool_size, desc = "Number of buffers in pbuf pool.", type = int, default = 256; 60 | PARAM name = pbuf_pool_bufsize, desc = "Size of each pbuf in pbuf pool.", type = int, default = 1700; 61 | PARAM name = pbuf_link_hlen, desc = "Number of bytes that should be allocated for a link level header.", type = int, default = 16, permit = none; 62 | END CATEGORY 63 | 64 | BEGIN CATEGORY mbox_options 65 | PROPERTY desc = "Mbox Related Options"; 66 | PARAM name = mbox_options, desc = "Mbox Options", type = bool, default = true, permit = none; 67 | PARAM name = lwip_tcpip_core_locking_input, desc = "TCPIP input core locking", type = bool, default = false; 68 | PARAM name = tcpip_mbox_size, desc = "Size of TCPIP mbox queue.", type = int, default = 200; 69 | PARAM name = default_tcp_recvmbox_size, desc = "Size of TCP receive mbox queue.", type = int, default = 200; 70 | PARAM name = default_udp_recvmbox_size, desc = "Size of UDP receive mbox queue.", type = int, default = 100; 71 | END CATEGORY 72 | 73 | BEGIN CATEGORY arp_options 74 | PROPERTY desc = "ARP Options"; 75 | PARAM name = arp_options, desc = "ARP Options", type = bool, default = true, permit = none; 76 | PARAM name = arp_table_size, desc = "Number of active hardware address IP address pairs cached.", type = int, default = 10; 77 | PARAM name = arp_queueing, desc = "If enabled outgoing packets are queued during hardware address resolution.", type = int, default = 1, range = (0, 1); 78 | END CATEGORY 79 | 80 | BEGIN CATEGORY lwip_ip_options 81 | PROPERTY desc = "IP Options"; 82 | PARAM name = lwip_ip_options, desc = "IP Options", type = bool, default = true, permit = none; 83 | PARAM name = ip_forward, desc = "Enable forwarding IP packets across network interfaces.", type = int, default = 0, range = (0, 1); 84 | PARAM name = ip_options, desc = "1 = IP options are allowed (but not parsed). 0 = packets with IP options are dropped", type = int, default = 0, range = (0, 1); 85 | PARAM name = ip_reassembly, desc = "Reassemble incoming fragmented IP packets", type = int, default = 1, range = (0, 1); 86 | PARAM name = ip_frag, desc = "Fragment outgoing IP packets if their size exceeds MTU", type = int, default = 1, range = (0, 1); 87 | PARAM name = ip_reass_max_pbufs, desc = "Reassembly PBUF Queue Length", type = int, default = 128; 88 | PARAM name = ip_frag_max_mtu, desc = "Assumed max MTU on any interface for IP frag buffer", type = int, default = 1500; 89 | PARAM name = ip_default_ttl, desc = "Global default TTL used by transport layers", type = int, default = 255; 90 | END CATEGORY 91 | 92 | BEGIN CATEGORY icmp_options 93 | PROPERTY desc = "ICMP Options"; 94 | PARAM name = icmp_options, desc = "ICMP Options", type = bool, default = true, permit = none; 95 | PARAM name = icmp_ttl, desc = "ICMP TTL value", type = int, default = 255; 96 | END CATEGORY 97 | 98 | BEGIN CATEGORY lwip_ipv6_options 99 | PROPERTY desc = "IPv6 Options"; 100 | PARAM name = ipv6_options, desc = "IPv6 Options", type = bool, default = true, permit = none; 101 | PARAM name = ipv6_enable, desc = "IPv6 enable value", type = bool, default = false; 102 | END CATEGORY 103 | 104 | BEGIN CATEGORY igmp_options 105 | PROPERTY desc = "IGMP Options"; 106 | PARAM name = igmp_options, desc = "IGMP Options", type = bool, default = false; 107 | END CATEGORY 108 | 109 | BEGIN CATEGORY udp_options 110 | PROPERTY desc = "UDP Options"; 111 | PARAM name = udp_options, desc = "Is UDP required ?", type = bool, default = true, permit = none; 112 | PARAM name = lwip_udp, desc = "Is UDP required ?", type = bool, default = true; 113 | PARAM name = udp_ttl, desc = "UDP TTL value", type = int, default = 255; 114 | END CATEGORY 115 | 116 | BEGIN CATEGORY tcp_options 117 | PROPERTY desc = "lwIP TCP options"; 118 | PARAM name = tcp_options, desc = "Is TCP required ?", type = bool, default = true, permit = none; 119 | PARAM name = lwip_tcp, desc = "Is TCP required ?", type = bool, default = true; 120 | PARAM name = tcp_wnd, desc = "TCP Window (bytes)", type = int, default = 2048; 121 | PARAM name = tcp_snd_buf, desc = "TCP sender buffer space (bytes)", type = int, default = 8192; 122 | PARAM name = tcp_mss, desc = "TCP Maximum segment size (bytes)", type = int, default = 1460; 123 | PARAM name = tcp_ttl, desc = "TCP TTL value", type = int, default = 255; 124 | PARAM name = tcp_maxrtx, desc = "TCP Maximum retransmission value", type = int, default = 12; 125 | PARAM name = tcp_synmaxrtx, desc = "TCP Maximum SYN retransmission value", type = int, default = 4; 126 | PARAM name = tcp_queue_ooseq, desc = "Should TCP queue segments arriving out of order. Set to 0 if your device is low on memory", type = int, default = 1, range = (0,1) 127 | END CATEGORY 128 | 129 | BEGIN CATEGORY dhcp_options 130 | PROPERTY desc = "lwIP DHCP options"; 131 | PARAM name = dhcp_options, desc = "Is DHCP required?", type = bool, default = true, permit = none; 132 | PARAM name = lwip_dhcp, desc = "Is DHCP required?", type = bool, default = false; 133 | PARAM name = dhcp_does_arp_check, desc = "ARP check on offered addresses?", type = bool, default = false; 134 | END CATEGORY 135 | 136 | BEGIN CATEGORY stats_options 137 | PARAM name = stats_options, desc = "Turn on lwIP statistics?", type = bool, default = true, permit = none; 138 | PARAM name = lwip_stats, desc = "Turn on lwIP statistics?", type = bool, default = false; 139 | END CATEGORY 140 | 141 | BEGIN CATEGORY debug_options 142 | PARAM name = debug_options, desc = "Turn on lwIP Debug?", type = bool, default = true, permit = none; 143 | PARAM name = lwip_debug, desc = "Turn on lwIP Debug?", type = bool, default = false; 144 | PARAM name = ip_debug, desc = "Debug IP layer", type = bool, default = false; 145 | PARAM name = tcp_debug, desc = "Debug TCP layer", type = bool, default = false; 146 | PARAM name = udp_debug, desc = "Debug UDP layer", type = bool, default = false; 147 | PARAM name = icmp_debug, desc = "Debug ICMP protocol", type = bool, default = false; 148 | PARAM name = igmp_debug, desc = "Debug IGMP protocol", type = bool, default = false; 149 | PARAM name = netif_debug, desc = "Debug network interface layer", type = bool, default = false; 150 | PARAM name = sys_debug, desc = "Debug sys arch layer", type = bool, default = false; 151 | PARAM name = pbuf_debug, desc = "Debug pbuf layer", type = bool, default = false; 152 | END CATEGORY 153 | 154 | END LIBRARY 155 | -------------------------------------------------------------------------------- /EmbeddedSw/ThirdParty/sw_services/lwip211_v1_39/src/contrib/ports/xilinx/include/netif/xaxiemacif.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2010 - 2020 Xilinx, Inc. 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without modification, 6 | * are permitted provided that the following conditions are met: 7 | * 8 | * 1. Redistributions of source code must retain the above copyright notice, 9 | * this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright notice, 11 | * this list of conditions and the following disclaimer in the documentation 12 | * and/or other materials provided with the distribution. 13 | * 3. The name of the author may not be used to endorse or promote products 14 | * derived from this software without specific prior written permission. 15 | * 16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 19 | * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 20 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 21 | * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 25 | * OF SUCH DAMAGE. 26 | * 27 | * This file is part of the lwIP TCP/IP stack. 28 | * 29 | */ 30 | 31 | #ifndef __NETIF_XAXIEMACIF_H__ 32 | #define __NETIF_XAXIEMACIF_H__ 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | #include "xlwipconfig.h" 39 | #include "lwip/netif.h" 40 | #include "netif/etharp.h" 41 | #include "netif/xadapter.h" 42 | 43 | #include "xparameters.h" 44 | #include "xstatus.h" 45 | 46 | #include "xaxiethernet.h" 47 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 48 | #include "xllfifo.h" 49 | #elif XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA 50 | #include "xmcdma.h" 51 | #else 52 | #include "xaxidma.h" 53 | #include "xaxidma_hw.h" 54 | #endif 55 | 56 | #include "netif/xpqueue.h" 57 | #include "xlwipconfig.h" 58 | 59 | #if XLWIP_CONFIG_INCLUDE_AXIETH_ON_ZYNQ == 1 60 | #define AXIDMA_TX_INTR_PRIORITY_SET_IN_GIC 0xA0 61 | #define AXIDMA_RX_INTR_PRIORITY_SET_IN_GIC 0xA0 62 | #define AXIETH_INTR_PRIORITY_SET_IN_GIC 0xA0 63 | #define TRIG_TYPE_RISING_EDGE_SENSITIVE 0x3 64 | 65 | #define INTC_DIST_BASE_ADDR XPAR_SCUGIC_0_DIST_BASEADDR 66 | #endif 67 | 68 | void xaxiemacif_setmac(u32_t index, u8_t *addr); 69 | u8_t* xaxiemacif_getmac(u32_t index); 70 | err_t xaxiemacif_init(struct netif *netif); 71 | int xaxiemacif_input(struct netif *netif); 72 | 73 | unsigned get_IEEE_phy_speed(XAxiEthernet *xaxiemacp, u32 sgmii_phy_addr, u32 ext_phy_addr); 74 | void enable_sgmii_clock(XAxiEthernet *xaxiemacp); 75 | unsigned configure_IEEE_phy_speed(XAxiEthernet *xaxiemacp, u32 sgmii_phy_addr, u32 ext_phy_addr, unsigned speed); 76 | unsigned phy_setup_axiemac (XAxiEthernet *xaxiemacp); 77 | 78 | /* xaxiemacif_hw.c */ 79 | void xaxiemac_error_handler(XAxiEthernet * Temac); 80 | 81 | /* structure within each netif, encapsulating all information required for 82 | * using a particular temac instance 83 | */ 84 | typedef struct { 85 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 86 | XLlFifo axififo; 87 | #elif defined(XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA) 88 | XMcdma aximcdma; 89 | #else 90 | XAxiDma axidma; 91 | #endif 92 | XAxiEthernet axi_ethernet; 93 | 94 | /* queue to store overflow packets */ 95 | pq_queue_t *recv_q; 96 | pq_queue_t *send_q; 97 | 98 | /* pointers to memory holding buffer descriptors (used only with SDMA) */ 99 | void *rx_bdspace; 100 | void *tx_bdspace; 101 | } xaxiemacif_s; 102 | 103 | extern xaxiemacif_s xaxiemacif; 104 | 105 | #ifndef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 106 | s32_t is_tx_space_available(xaxiemacif_s *emac); 107 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA 108 | s32_t process_sent_bds(XMcdma_ChanCtrl *Tx_Chan); 109 | #else 110 | s32_t process_sent_bds(XAxiDma_BdRing *txring); 111 | #endif 112 | #endif 113 | 114 | /* xaxiemacif_dma.c/xaxiemacif_mcdma.c */ 115 | #ifndef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_FIFO 116 | #ifdef XLWIP_CONFIG_INCLUDE_AXI_ETHERNET_MCDMA 117 | XStatus init_axi_mcdma(struct xemac_s *xemac); 118 | XStatus axi_mcdma_sgsend(xaxiemacif_s *xaxiemacif, struct pbuf *p); 119 | #else 120 | XStatus init_axi_dma(struct xemac_s *xemac); 121 | XStatus axidma_sgsend(xaxiemacif_s *xaxiemacif, struct pbuf *p); 122 | #endif 123 | #endif 124 | 125 | #ifdef __cplusplus 126 | } 127 | #endif 128 | 129 | #endif /* __NETIF_XAXIEMACIF_H__ */ 130 | -------------------------------------------------------------------------------- /EmbeddedSw/XilinxProcessorIPLib/drivers/axiethernet_v5_119/data/axiethernet.mdd: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # Copyright (C) 2010 - 2020 Xilinx, Inc. All rights reserved. 3 | # SPDX-License-Identifier: MIT 4 | # 5 | # MODIFICATION HISTORY: 6 | # 7 | # 05/12/10 asa First Release 8 | # 02/01/13 srt Added support for IPI designs (CR 698249) 9 | # 10 | ############################################################################### 11 | 12 | OPTION psf_version = 2.1; 13 | 14 | BEGIN driver axiethernet 15 | 16 | OPTION supported_peripherals = axi_ethernet_v[3-9]_[0-9]; 17 | OPTION driver_state = ACTIVE; 18 | OPTION copyfiles = all; 19 | OPTION VERSION = 5.119; 20 | OPTION NAME = axiethernet; 21 | 22 | END driver 23 | -------------------------------------------------------------------------------- /EmbeddedSw/XilinxProcessorIPLib/drivers/axiethernet_v5_99/data/axiethernet.mdd: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # 3 | # Copyright (C) 2010 - 2018 Xilinx, Inc. All rights reserved. 4 | # 5 | # Permission is hereby granted, free of charge, to any person obtaining a copy 6 | # of this software and associated documentation files (the "Software"), to deal 7 | # in the Software without restriction, including without limitation the rights 8 | # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | # copies of the Software, and to permit persons to whom the Software is 10 | # furnished to do so, subject to the following conditions: 11 | # 12 | # The above copyright notice and this permission notice shall be included in 13 | # all copies or substantial portions of the Software. 14 | # 15 | # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 | # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | # SOFTWARE. 22 | # 23 | # 24 | # 25 | # MODIFICATION HISTORY: 26 | # 27 | # 05/12/10 asa First Release 28 | # 02/01/13 srt Added support for IPI designs (CR 698249) 29 | # 30 | ############################################################################### 31 | 32 | OPTION psf_version = 2.1; 33 | 34 | BEGIN driver axiethernet 35 | 36 | OPTION supported_peripherals = (axi_ethernet_v[3-9]_[0-9][1-9]_[a-z] axi_ethernet_v[3-9]_[0-9]); 37 | OPTION driver_state = ACTIVE; 38 | OPTION copyfiles = all; 39 | OPTION VERSION = 5.99; 40 | OPTION NAME = axiethernet; 41 | 42 | END driver 43 | -------------------------------------------------------------------------------- /EmbeddedSw/XilinxProcessorIPLib/drivers/emacps_v3_119/data/emacps.mdd: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # Copyright (C) 2011 - 2020 Xilinx, Inc. All rights reserved. 3 | # SPDX-License-Identifier: MIT 4 | # 5 | ############################################################################### 6 | OPTION psf_version = 2.1; 7 | 8 | BEGIN driver emacps 9 | 10 | OPTION supported_peripherals = (ps7_ethernet psu_ethernet psv_ethernet); 11 | OPTION driver_state = ACTIVE; 12 | OPTION copyfiles = all; 13 | OPTION VERSION = 3.119; 14 | OPTION NAME = emacps; 15 | 16 | END driver 17 | -------------------------------------------------------------------------------- /EmbeddedSw/XilinxProcessorIPLib/drivers/emacps_v3_129/data/emacps.mdd: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # Copyright (C) 2011 - 2020 Xilinx, Inc. All rights reserved. 3 | # SPDX-License-Identifier: MIT 4 | # 5 | ############################################################################### 6 | OPTION psf_version = 2.1; 7 | 8 | BEGIN driver emacps 9 | 10 | OPTION supported_peripherals = (ps7_ethernet psu_ethernet psv_ethernet); 11 | OPTION driver_state = ACTIVE; 12 | OPTION copyfiles = all; 13 | OPTION VERSION = 3.129; 14 | OPTION NAME = emacps; 15 | 16 | END driver 17 | -------------------------------------------------------------------------------- /LICENSE.txt: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2019 Opsero Electronic Design Inc. 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. -------------------------------------------------------------------------------- /PetaLinux/README.md: -------------------------------------------------------------------------------- 1 | PetaLinux Project source files 2 | ============================== 3 | 4 | ### How to use the PetaLinux projects 5 | 6 | #### Requirements 7 | 8 | * Windows or Linux PC with Vivado installed 9 | * Linux PC or virtual machine with PetaLinux installed 10 | 11 | #### Build Instructions 12 | 13 | The complete build instructions can be found in the 14 | [Build instructions](https://docs.ethernet96.com/en/latest/getting_started.html#launch-on-hardware "Build instructions") 15 | section of the Getting Started guide. 16 | 17 | #### Launch PetaLinux on hardware 18 | 19 | To launch PetaLinux on the hardware, please read the 20 | [Launch on hardware](https://docs.ethernet96.com/en/latest/getting_started.html#launch-on-hardware "Launch on hardware") 21 | instructions in the Getting Started guide. 22 | 23 | #### Example port usage from Linux command line 24 | 25 | For example Linux usage instructions, please refer to the 26 | [PetaLinux Example Usage](https://docs.ethernet96.com/en/latest/getting_started.html#petalinux-example-usage "PetaLinux Example Usage") 27 | section of the Getting Started guide. 28 | 29 | ### Status of the PetaLinux projects 30 | 31 | #### PS GEM based design 32 | 33 | * All ports working for the ps_gem design 34 | * Port 0-2 will work at link speeds of 10Mbps, 100Mbps and 1000Mbps 35 | * Port 3 will only work at a link speed of 1000Mbps. It's hard coded to work at 1000Mbps only but we're working on a 36 | fix for this so that the PCS/PMA or SGMII IP will be configured according to the actual negotiated link speed 37 | 38 | #### AXI Ethernet based design 39 | 40 | * All ports working for the axi_eth design 41 | 42 | ### How the script works 43 | 44 | The PetaLinux directory contains a `build-petalinux` shell script which can be run in Linux to automatically 45 | generate a PetaLinux project for each of the generated/exported Vivado projects in the Vivado directory. 46 | 47 | When executed, the build script searches the Vivado directory for all projects containing `*.xsa` files 48 | (exported Vivado project files). Then for every exported project, the script 49 | does the following: 50 | 51 | 1. Verifies that the `.xsa` and the `.bit` files exist. 52 | 2. Creates a PetaLinux project, referencing the exported hardware design (.xsa). 53 | 3. Copies the relevant configuration files from the `src` directory into the created 54 | PetaLinux project. 55 | 4. Builds the PetaLinux project. 56 | 5. Generates a `BOOT.BIN`, `boot.scr` and `image.ub` file. 57 | 58 | For detailed information on the PetaLinux configuration files in the `src` directory, please read the 59 | [PetaLinux](https://docs.ethernet96.com/en/latest/programming_guide.html#petalinux "PetaLinux") 60 | section in the Programming guide. 61 | 62 | ### To do 63 | 64 | * AXI Ethernet design: U-Boot needs to be patched so that it works for a configuration of multiple PHYs 65 | on a single MDIO bus 66 | * Need to be using the PCS/PMA or SGMII core's TX and RX locked signals to ensure 67 | that the 625MHz clock has been properly enabled 68 | 69 | -------------------------------------------------------------------------------- /PetaLinux/build-petalinux: -------------------------------------------------------------------------------- 1 | # Before running this script, you must source the PetaLinux and Vivado settings: 2 | # source /settings.sh 3 | # source /settings64.sh 4 | 5 | # Get a list of all the exported projects 6 | 7 | filelist=(`find ../Vivado/ -name "*.xsa"`) 8 | 9 | # Iterate through all of those files 10 | 11 | for f in ${filelist[*]} 12 | do 13 | # Get the project name 14 | proj=$(echo $f | tr "/" "\n" | sed -n '3p') 15 | echo "INFO: Exported Vivado project found: $proj" 16 | echo "> Exported hardware spec [$f]" 17 | 18 | # Name of the BIT file 19 | runs=$(echo $f | sed -e "s/_wrapper.xsa/.runs/g") 20 | bit="$runs/impl_1/${proj}_wrapper.bit" 21 | if [ -f "$bit" ]; then 22 | echo "> BIT file exists [$bit]" 23 | else 24 | echo "> BIT file does not exist [$bit]" 25 | echo "> PetaLinux will not be built for this project" 26 | echo 27 | continue 28 | fi 29 | 30 | # Get Ultra96 board version (v1 or v2) from project name 31 | board_version=$(echo ${proj##*_}) 32 | 33 | # Get the port configuration 34 | if [[ $proj == "axi_eth"* ]]; then 35 | portconfig="ports-0123-axieth" 36 | else 37 | portconfig="ports-0123" 38 | fi 39 | 40 | # CPU type is ZynqMP 41 | cpu_type="zynqMP" 42 | fsbl_option="--fsbl ./images/linux/zynqmp_fsbl.elf" 43 | 44 | echo "> CPU_TYPE: $cpu_type" 45 | 46 | # Create PetaLinux project if it does not exists 47 | if [ -d "./$proj" ]; then 48 | echo "> PetaLinux project already exists" 49 | else 50 | echo "> Creating PetaLinux project" 51 | petalinux-create --type project --template $cpu_type --name $proj 52 | fi 53 | 54 | cd $proj 55 | 56 | # Configure PetaLinux project with hardware description if 'components' dir doesn't exist 57 | if [ -d "./components" ]; then 58 | echo "> PetaLinux project already configured with hardware description" 59 | else 60 | echo "> Configuring PetaLinux project with hardware description" 61 | petalinux-config --get-hw-description ../$(dirname "${f}") --silentconfig 62 | fi 63 | 64 | # Copy PetaLinux config files 65 | if [[ -f "configdone.txt" ]]; then 66 | echo "> PetaLinux config files already transferred" 67 | else 68 | echo "> Transferring PetaLinux config files" 69 | cp -R ../src/$portconfig/* . 70 | cp -R ../src/$board_version/* . 71 | # File to indicate that config files have been transferred 72 | touch configdone.txt 73 | # Run petalinux-config again to register the config files 74 | petalinux-config --silentconfig 75 | fi 76 | 77 | # Build PetaLinux project if not built already 78 | if [ -d "./images" ]; then 79 | echo "> PetaLinux project already built" 80 | else 81 | echo "> Building PetaLinux project" 82 | petalinux-build 83 | fi 84 | 85 | # Package PetaLinux project if not packaged 86 | if [[ -f "./images/linux/BOOT.BIN" && -f "./images/linux/image.ub" ]]; then 87 | echo "> PetaLinux project already packaged" 88 | else 89 | echo "> Packaging PetaLinux project" 90 | petalinux-package --boot $fsbl_option --fpga ../$bit --u-boot 91 | fi 92 | cd .. 93 | done 94 | 95 | echo "PetaLinux build script completed" 96 | 97 | -------------------------------------------------------------------------------- /PetaLinux/src/ports-0123-axieth/project-spec/meta-user/recipes-bsp/device-tree/files/port-config.dtsi: -------------------------------------------------------------------------------- 1 | 2 | &axi_ethernet_0 { 3 | local-mac-address = [00 0a 35 00 01 22]; 4 | phy-handle = <&phy0>; 5 | xlnx,has-mdio = <0x1>; 6 | phy-mode = "gmii"; 7 | mdio { 8 | #address-cells = <1>; 9 | #size-cells = <0>; 10 | phy0: phy@1 { 11 | device_type = "ethernet-phy"; 12 | xlnx,phy-type = <0x4>; 13 | reg = <1>; 14 | ti,rx-internal-delay = <0x8>; 15 | ti,tx-internal-delay = <0xa>; 16 | ti,fifo-depth = <0x1>; 17 | }; 18 | phy1: phy@3 { 19 | device_type = "ethernet-phy"; 20 | xlnx,phy-type = <0x4>; 21 | reg = <3>; 22 | ti,rx-internal-delay = <0x8>; 23 | ti,tx-internal-delay = <0xa>; 24 | ti,fifo-depth = <0x1>; 25 | }; 26 | phy2: phy@12 { 27 | device_type = "ethernet-phy"; 28 | xlnx,phy-type = <0x4>; 29 | reg = <12>; 30 | ti,rx-internal-delay = <0x8>; 31 | ti,tx-internal-delay = <0xa>; 32 | ti,fifo-depth = <0x1>; 33 | }; 34 | phy3: phy@15 { 35 | device_type = "ethernet-phy"; 36 | xlnx,phy-type = <0x4>; 37 | reg = <15>; 38 | ti,rx-internal-delay = <0x8>; 39 | ti,tx-internal-delay = <0xa>; 40 | ti,fifo-depth = <0x1>; 41 | ti,dp83867-sgmii-autoneg-dis; 42 | ti,sgmii-ref-clock-output-enable; 43 | }; 44 | }; 45 | }; 46 | 47 | &axi_ethernet_1 { 48 | local-mac-address = [00 0a 35 00 01 23]; 49 | phy-handle = <&phy1>; 50 | xlnx,has-mdio = <0x1>; 51 | phy-mode = "gmii"; 52 | mdio { 53 | #address-cells = <1>; 54 | #size-cells = <0>; 55 | }; 56 | }; 57 | 58 | &axi_ethernet_2 { 59 | local-mac-address = [00 0a 35 00 01 24]; 60 | phy-handle = <&phy2>; 61 | xlnx,has-mdio = <0x1>; 62 | phy-mode = "gmii"; 63 | mdio { 64 | #address-cells = <1>; 65 | #size-cells = <0>; 66 | }; 67 | }; 68 | 69 | &axi_ethernet_3 { 70 | local-mac-address = [00 0a 35 00 01 25]; 71 | phy-handle = <&phy3>; 72 | xlnx,has-mdio = <0x1>; 73 | phy-mode = "gmii"; 74 | mdio { 75 | #address-cells = <1>; 76 | #size-cells = <0>; 77 | }; 78 | }; 79 | 80 | -------------------------------------------------------------------------------- /PetaLinux/src/ports-0123/project-spec/meta-user/recipes-bsp/device-tree/files/port-config.dtsi: -------------------------------------------------------------------------------- 1 | 2 | &gem0 { 3 | local-mac-address = [00 0a 35 00 01 22]; 4 | phy-handle = <&phy0>; 5 | phy-mode = "gmii"; 6 | status = "okay"; 7 | phy-reset-gpio = <&gpio 416 1>; 8 | phy-reset-active-low; 9 | phy0: phy@1 { 10 | device_type = "ethernet-phy"; 11 | reg = <0x1>; 12 | ti,rx-internal-delay = <0x8>; 13 | ti,tx-internal-delay = <0xa>; 14 | ti,fifo-depth = <0x1>; 15 | }; 16 | phy1: phy@3 { 17 | device_type = "ethernet-phy"; 18 | reg = <0x3>; 19 | ti,rx-internal-delay = <0x8>; 20 | ti,tx-internal-delay = <0xa>; 21 | ti,fifo-depth = <0x1>; 22 | }; 23 | phy2: phy@12 { 24 | device_type = "ethernet-phy"; 25 | reg = <0xc>; 26 | ti,rx-internal-delay = <0x8>; 27 | ti,tx-internal-delay = <0xa>; 28 | ti,fifo-depth = <0x1>; 29 | }; 30 | phy3: phy@15 { 31 | device_type = "ethernet-phy"; 32 | reg = <0xf>; 33 | ti,rx-internal-delay = <0x8>; 34 | ti,tx-internal-delay = <0xa>; 35 | ti,fifo-depth = <0x1>; 36 | ti,dp83867-sgmii-autoneg-dis; 37 | ti,sgmii-ref-clock-output-enable; 38 | }; 39 | }; 40 | 41 | &gem1 { 42 | local-mac-address = [00 0a 35 00 01 23]; 43 | phy-handle = <&phy1>; 44 | phy-mode = "gmii"; 45 | status = "okay"; 46 | phy-reset-gpio = <&gpio 417 1>; 47 | phy-reset-active-low; 48 | }; 49 | 50 | &gem2 { 51 | local-mac-address = [00 0a 35 00 01 24]; 52 | phy-handle = <&phy2>; 53 | phy-mode = "gmii"; 54 | status = "okay"; 55 | phy-reset-gpio = <&gpio 418 1>; 56 | phy-reset-active-low; 57 | }; 58 | 59 | &gem3 { 60 | local-mac-address = [00 0a 35 00 01 25]; 61 | phy-handle = <&phy3>; 62 | phy-mode = "gmii"; 63 | status = "okay"; 64 | phy-reset-gpio = <&gpio 419 1>; 65 | phy-reset-active-low; 66 | }; 67 | 68 | 69 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/configs/busybox/inetd.conf: -------------------------------------------------------------------------------- 1 | #/etc/inetd.conf: see inetd(8) for further informations. 2 | # 3 | # Internet server configuration database 4 | # 5 | # If you want to disable an entry so it isn't touched during 6 | # package updates just comment it out with a single '#' character. 7 | # 8 | # 9 | # 10 | #:INTERNAL: Internal services 11 | #echo stream tcp nowait root internal 12 | #echo dgram udp wait root internal 13 | #chargen stream tcp nowait root internal 14 | #chargen dgram udp wait root internal 15 | #discard stream tcp nowait root internal 16 | #discard dgram udp wait root internal 17 | #daytime stream tcp nowait root internal 18 | #daytime dgram udp wait root internal 19 | #time stream tcp nowait root internal 20 | #time dgram udp wait root internal 21 | telnet stream tcp nowait root telnetd telnetd -i 22 | ftp stream tcp nowait root ftpd ftpd -w 23 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/configs/config: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file; DO NOT EDIT. 3 | # misc/config System Configuration 4 | # 5 | CONFIG_SUBSYSTEM_TYPE_LINUX=y 6 | CONFIG_SYSTEM_ZYNQMP=y 7 | 8 | # 9 | # Linux Components Selection 10 | # 11 | CONFIG_SUBSYSTEM_COMPONENT_DEVICE__TREE_NAME_DEVICE__TREE__GENERATOR=y 12 | CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_AUTO_FSBL=y 13 | CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_NAME_ZYNQMP_FSBL=y 14 | CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_AUTO_PS_INIT=y 15 | CONFIG_SUBSYSTEM_COMPONENT_PMU_FIRMWARE=y 16 | CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_U__BOOT__XLNX=y 17 | # CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_REMOTE is not set 18 | # CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_EXT__LOCAL__SRC is not set 19 | CONFIG_SUBSYSTEM_COMPONENT_ARM__TRUSTED__FIRMWARE_NAME_ARM__TRUSTED__FIRMWARE=y 20 | # CONFIG_SUBSYSTEM_COMPONENT_ARM__TRUSTED__FIRMWARE_NAME_REMOTE is not set 21 | # CONFIG_SUBSYSTEM_COMPONENT_ARM__TRUSTED__FIRMWARE_NAME_EXT__LOCAL__SRC is not set 22 | CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_LINUX__XLNX=y 23 | # CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_REMOTE is not set 24 | # CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_EXT__LOCAL__SRC is not set 25 | 26 | # 27 | # Auto Config Settings 28 | # 29 | CONFIG_SUBSYSTEM_AUTOCONFIG_DEVICE__TREE=y 30 | # CONFIG_SUBSYSTEM_DEVICE_TREE_MANUAL_INCLUDE is not set 31 | CONFIG_SUBSYSTEM_DEVICE_TREE_INCLUDE_DIR="${STAGING_KERNEL_DIR}/include" 32 | # CONFIG_SUBSYSTEM_AUTOCONFIG_KERNEL is not set 33 | # CONFIG_SUBSYSTEM_AUTOCONFIG_U__BOOT is not set 34 | CONFIG_SUBSYSTEM_HARDWARE_AUTO=y 35 | CONFIG_SUBSYSTEM_PROCESSOR0_IP_NAME="psu_cortexa53_0" 36 | CONFIG_SUBSYSTEM_PROCESSOR_psu_cortexa53_0_SELECT=y 37 | CONFIG_SUBSYSTEM_ARCH_AARCH64=y 38 | 39 | # 40 | # Memory Settings 41 | # 42 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_SELECT=y 43 | # CONFIG_SUBSYSTEM_MEMORY_SIMPLE_SELECT is not set 44 | # CONFIG_SUBSYSTEM_MEMORY_MANUAL_SELECT is not set 45 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_BASEADDR=0x0 46 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_SIZE=0x80000000 47 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_KERNEL_BASEADDR=0x0 48 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_U__BOOT_TEXTBASE_OFFSET=0x100000 49 | CONFIG_SUBSYSTEM_MEMORY_IP_NAME="PSU_DDR_0" 50 | 51 | # 52 | # Serial Settings 53 | # 54 | CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_1_SELECT=y 55 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_0_SELECT is not set 56 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_AXI_UART16550_0_SELECT is not set 57 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_AXI_UART16550_1_SELECT is not set 58 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_MANUAL_SELECT is not set 59 | CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_1_SELECT=y 60 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_0_SELECT is not set 61 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_AXI_UART16550_0_SELECT is not set 62 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_AXI_UART16550_1_SELECT is not set 63 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_MANUAL_SELECT is not set 64 | CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_1_SELECT=y 65 | # CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_0_SELECT is not set 66 | # CONFIG_SUBSYSTEM_ATF_SERIAL_AXI_UART16550_0_SELECT is not set 67 | # CONFIG_SUBSYSTEM_ATF_SERIAL_AXI_UART16550_1_SELECT is not set 68 | # CONFIG_SUBSYSTEM_ATF_SERIAL_MANUAL_SELECT is not set 69 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_SELECT=y 70 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_SELECT is not set 71 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_SELECT is not set 72 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_SELECT is not set 73 | # CONFIG_SUBSYSTEM_SERIAL_MANUAL_SELECT is not set 74 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_600 is not set 75 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_9600 is not set 76 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_28800 is not set 77 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_115200=y 78 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_230400 is not set 79 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_460800 is not set 80 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_921600 is not set 81 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_600 is not set 82 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_9600 is not set 83 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_28800 is not set 84 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_115200=y 85 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_230400 is not set 86 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_460800 is not set 87 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_921600 is not set 88 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_600 is not set 89 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_9600 is not set 90 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_28800 is not set 91 | CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_115200=y 92 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_230400 is not set 93 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_460800 is not set 94 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_921600 is not set 95 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_600 is not set 96 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_9600 is not set 97 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_28800 is not set 98 | CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_115200=y 99 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_230400 is not set 100 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_460800 is not set 101 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_921600 is not set 102 | CONFIG_SUBSYSTEM_SERIAL_PMUFW_IP_NAME="psu_uart_1" 103 | CONFIG_SUBSYSTEM_SERIAL_FSBL_IP_NAME="psu_uart_1" 104 | CONFIG_SUBSYSTEM_SERIAL_ATF_IP_NAME="cadence1" 105 | CONFIG_SUBSYSTEM_SERIAL_IP_NAME="psu_uart_1" 106 | 107 | # 108 | # Ethernet Settings 109 | # 110 | CONFIG_SUBSYSTEM_ETHERNET_MANUAL_SELECT=y 111 | 112 | # 113 | # Flash Settings 114 | # 115 | CONFIG_SUBSYSTEM_FLASH_MANUAL_SELECT=y 116 | 117 | # 118 | # SD/SDIO Settings 119 | # 120 | # CONFIG_SUBSYSTEM_PRIMARY_SD_PSU_SD_1_SELECT is not set 121 | CONFIG_SUBSYSTEM_PRIMARY_SD_PSU_SD_0_SELECT=y 122 | # CONFIG_SUBSYSTEM_PRIMARY_SD_MANUAL_SELECT is not set 123 | CONFIG_SUBSYSTEM_SD_PSU_SD_1_SELECT=y 124 | CONFIG_SUBSYSTEM_SD_PSU_SD_0_SELECT=y 125 | 126 | # 127 | # RTC Settings 128 | # 129 | CONFIG_SUBSYSTEM_RTC_PSU_RTC_SELECT=y 130 | # CONFIG_SUBSYSTEM_RTC_MANUAL_SELECT is not set 131 | CONFIG_SUBSYSTEM_I2C_PSU_I2C_1_SELECT=y 132 | CONFIG_SUBSYSTEM_USB_PSU_USB_1_SELECT=y 133 | CONFIG_SUBSYSTEM_USB_PSU_USB_0_SELECT=y 134 | CONFIG_SUBSYSTEM_DP_PSU_DP_SELECT=y 135 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG=y 136 | 137 | # 138 | # boot image settings 139 | # 140 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOT_MEDIA_SD_SELECT=y 141 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOT_MEDIA_MANUAL_SELECT is not set 142 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOT_IMAGE_NAME="BOOT.BIN" 143 | 144 | # 145 | # u-boot env partition settings 146 | # 147 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOTENV_MEDIA_SD_SELECT=y 148 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOTENV_MEDIA_MANUAL_SELECT is not set 149 | 150 | # 151 | # kernel image settings 152 | # 153 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_KERNEL_MEDIA_SD_SELECT=y 154 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_KERNEL_MEDIA_MANUAL_SELECT is not set 155 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_KERNEL_IMAGE_NAME="image.ub" 156 | 157 | # 158 | # jffs2 rootfs image settings 159 | # 160 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_JFFS2_MEDIA_MANUAL_SELECT=y 161 | 162 | # 163 | # dtb image settings 164 | # 165 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_MEDIA_BOOTIMAGE_SELECT=y 166 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_MEDIA_SD_SELECT is not set 167 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_MEDIA_MANUAL_SELECT is not set 168 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_IMAGE_NAME="system.dtb" 169 | CONFIG_SUBSYSTEM_ENDIAN_LITTLE=y 170 | 171 | # 172 | # DTG Settings 173 | # 174 | CONFIG_SUBSYSTEM_MACHINE_NAME="avnet-ultra96-rev1" 175 | 176 | # 177 | # Kernel Bootargs 178 | # 179 | CONFIG_SUBSYSTEM_BOOTARGS_AUTO=y 180 | CONFIG_SUBSYSTEM_BOOTARGS_EARLYPRINTK=y 181 | 182 | CONFIG_SUBSYSTEM_DEVICETREE_FLAGS="-@" 183 | # CONFIG_SUBSYSTEM_DTB_OVERLAY is not set 184 | # CONFIG_SUBSYSTEM_REMOVE_PL_DTB is not set 185 | 186 | # 187 | # PMUFW Configuration 188 | # 189 | CONFIG_SUBSYSTEM_PMUFW_COMPILER_EXTRA_FLAGS="" 190 | 191 | # 192 | # FSBL Configuration 193 | # 194 | CONFIG_SUBSYSTEM_FSBL_BSPCOMPILER_FLAGS="" 195 | CONFIG_SUBSYSTEM_FSBL_COMPILER_EXTRA_FLAGS="" 196 | 197 | # 198 | # ARM Trusted Firmware Configuration 199 | # 200 | # CONFIG_SUBSYSTEM_ATF_MEMORY_SETTINGS is not set 201 | CONFIG_SUBSYSTEM_ATF_COMPILE_EXTRA_SETTINGS="" 202 | CONFIG_SUBSYSTEM_PRELOADED_BL33_BASE=0x8000000 203 | # CONFIG_SUBSYSTEM_ATF_DEBUG is not set 204 | 205 | # 206 | # FPGA Manager 207 | # 208 | # CONFIG_SUBSYSTEM_FPGA_MANAGER is not set 209 | 210 | # 211 | # u-boot Configuration 212 | # 213 | # CONFIG_SUBSYSTEM_UBOOT_CONFIG_PETALINUX is not set 214 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_OTHER=y 215 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_TARGET="" 216 | 217 | # 218 | # Image Packaging Configuration 219 | # 220 | # CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS is not set 221 | # CONFIG_SUBSYSTEM_ROOTFS_INITRD is not set 222 | # CONFIG_SUBSYSTEM_ROOTFS_JFFS2 is not set 223 | # CONFIG_SUBSYSTEM_ROOTFS_NFS is not set 224 | CONFIG_SUBSYSTEM_ROOTFS_EXT4=y 225 | # CONFIG_SUBSYSTEM_ROOTFS_OTHER is not set 226 | CONFIG_SUBSYSTEM_SDROOT_DEV="/dev/mmcblk0p2" 227 | CONFIG_SUBSYSTEM_UIMAGE_NAME="image.ub" 228 | CONFIG_SUBSYSTEM_RFS_FORMATS="cpio cpio.gz cpio.gz.u-boot tar.gz jffs2" 229 | CONFIG_SUBSYSTEM_DTB_PADDING_SIZE=0x1000 230 | CONFIG_SUBSYSTEM_COPY_TO_TFTPBOOT=y 231 | CONFIG_SUBSYSTEM_TFTPBOOT_DIR="/tftpboot" 232 | 233 | # 234 | # Firmware Version Configuration 235 | # 236 | CONFIG_SUBSYSTEM_HOSTNAME="sensors96b" 237 | CONFIG_SUBSYSTEM_PRODUCT="sensors96b" 238 | CONFIG_SUBSYSTEM_FW_VERSION="1.00" 239 | 240 | # 241 | # Yocto Settings 242 | # 243 | CONFIG_YOCTO_MACHINE_NAME="ultra96-zynqmp" 244 | 245 | # 246 | # TMPDIR Location 247 | # 248 | CONFIG_TMP_DIR_LOCATION="${PROOT}/build/tmp" 249 | 250 | # 251 | # WORKSPACE Location 252 | # 253 | CONFIG_WORKSPACE_LOCATION="${PROOT}/components/yocto/workspace" 254 | CONFIG_BUILDTOOL_BITBAKE=y 255 | # CONFIG_BUILDTOOL_DEVTOOL is not set 256 | 257 | # 258 | # Parallel thread execution 259 | # 260 | CONFIG_YOCTO_BB_NUMBER_THREADS="" 261 | CONFIG_YOCTO_PARALLEL_MAKE="" 262 | 263 | # 264 | # Add pre-mirror url 265 | # 266 | CONFIG_PRE_MIRROR_URL="http://petalinux.xilinx.com/sswreleases/rel-v${PETALINUX_VER%%.*}/downloads" 267 | 268 | # 269 | # Local sstate feeds settings 270 | # 271 | CONFIG_YOCTO_LOCAL_SSTATE_FEEDS_URL="" 272 | CONFIG_YOCTO_NETWORK_SSTATE_FEEDS=y 273 | 274 | # 275 | # Network sstate feeds URL 276 | # 277 | CONFIG_YOCTO_NETWORK_SSTATE_FEEDS_URL="http://petalinux.xilinx.com/sswreleases/rel-v${PETALINUX_VER%%.*}/aarch64/sstate-cache" 278 | # CONFIG_YOCTO_BB_NO_NETWORK is not set 279 | 280 | # 281 | # User Layers 282 | # 283 | CONFIG_USER_LAYER_0="" 284 | CONFIG_SUBSYSTEM_BOOTARGS_GENERATED=" earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait" 285 | 286 | # Config for 96B Quad Ethernet 287 | 288 | # Auto Config Settings 289 | CONFIG_SUBSYSTEM_AUTOCONFIG_FSBL=y 290 | CONFIG_SUBSYSTEM_AUTOCONFIG_PMUFW=y 291 | CONFIG_SUBSYSTEM_AUTOCONFIG_DEVICE__TREE=y 292 | CONFIG_SUBSYSTEM_AUTOCONFIG_KERNEL=y 293 | CONFIG_SUBSYSTEM_AUTOCONFIG_U__BOOT=y 294 | 295 | # Use UART1 on the Ultra96 - pins accessible on back edge of board 296 | CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_1_SELECT=y 297 | CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_0_SELECT=n 298 | CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_1_SELECT=y 299 | CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_0_SELECT=n 300 | CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_1_SELECT=y 301 | CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_0_SELECT=n 302 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_SELECT=y 303 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_SELECT=n 304 | CONFIG_SUBSYSTEM_SERIAL_PMUFW_IP_NAME="psu_uart_1" 305 | CONFIG_SUBSYSTEM_SERIAL_FSBL_IP_NAME="psu_uart_1" 306 | CONFIG_SUBSYSTEM_SERIAL_IP_NAME="psu_uart_1" 307 | CONFIG_SUBSYSTEM_MACHINE_NAME="avnet-ultra96-rev1" 308 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_TARGET="" 309 | 310 | # u-boot Configuration 311 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_PETALINUX=n 312 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_OTHER=y 313 | 314 | # Boot from SD card 315 | CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS=n 316 | CONFIG_SUBSYSTEM_ROOTFS_INITRD=n 317 | CONFIG_SUBSYSTEM_ROOTFS_EXT4=y 318 | CONFIG_SUBSYSTEM_SDROOT_DEV="/dev/mmcblk0p2" 319 | 320 | CONFIG_YOCTO_MACHINE_NAME="ultra96-zynqmp" 321 | 322 | CONFIG_SUBSYSTEM_HOSTNAME="eth96_v1" 323 | CONFIG_SUBSYSTEM_PRODUCT="eth96_v1" 324 | 325 | # Ethernet port configs 326 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_3_SELECT=n 327 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_2_SELECT=n 328 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_1_SELECT=n 329 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_SELECT=y 330 | CONFIG_SUBSYSTEM_ETHERNET_MANUAL_SELECT=n 331 | #CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_MAC_AUTO=n 332 | #CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_MAC="00:0a:35:00:01:22" 333 | #CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_USE_DHCP=y 334 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/configs/init-ifupdown/interfaces: -------------------------------------------------------------------------------- 1 | # /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) 2 | 3 | # The loopback interface 4 | auto lo 5 | iface lo inet loopback 6 | 7 | # Wireless interfaces 8 | iface wlan0 inet dhcp 9 | wireless_mode managed 10 | wireless_essid any 11 | wpa-driver wext 12 | wpa-conf /etc/wpa_supplicant.conf 13 | 14 | iface atml0 inet dhcp 15 | 16 | # Wired or wireless interfaces 17 | auto eth0 18 | iface eth0 inet dhcp 19 | iface eth1 inet dhcp 20 | iface eth2 inet dhcp 21 | iface eth3 inet dhcp 22 | 23 | # Ethernet/RNDIS gadget (g_ether) 24 | # ... or on host side, usbnet and random hwaddr 25 | iface usb0 inet static 26 | address 192.168.7.2 27 | netmask 255.255.255.0 28 | network 192.168.7.0 29 | gateway 192.168.7.1 30 | 31 | # Bluetooth networking 32 | iface bnep0 inet dhcp 33 | 34 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/conf/layer.conf: -------------------------------------------------------------------------------- 1 | # We have a conf and classes directory, add to BBPATH 2 | BBPATH .= ":${LAYERDIR}" 3 | 4 | # We have recipes-* directories, add to BBFILES 5 | BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ 6 | ${LAYERDIR}/recipes-*/*/*.bbappend" 7 | 8 | BBFILE_COLLECTIONS += "meta-user" 9 | BBFILE_PATTERN_meta-user = "^${LAYERDIR}/" 10 | BBFILE_PRIORITY_meta-user = "6" 11 | LAYERSERIES_COMPAT_meta-user = "zeus" 12 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/conf/petalinuxbsp.conf: -------------------------------------------------------------------------------- 1 | #User Configuration 2 | 3 | #OE_TERMINAL = "tmux" 4 | MACHINE_FEATURES_remove_ultra96-zynqmp = "mipi" 5 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/conf/user-rootfsconfig: -------------------------------------------------------------------------------- 1 | #Note: Mention Each package in individual line 2 | #These packages will get added into rootfs menu entry 3 | 4 | CONFIG_gpio-demo 5 | CONFIG_peekpoke 6 | CONFIG_iperf3 7 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-apps/gpio-demo/files/Makefile: -------------------------------------------------------------------------------- 1 | APP = gpio-demo 2 | 3 | # Add any other object files to this list below 4 | APP_OBJS = gpio-demo.o 5 | 6 | all: $(APP) 7 | 8 | $(APP): $(APP_OBJS) 9 | $(CC) $(LDFLAGS) -o $@ $(APP_OBJS) $(LDLIBS) 10 | 11 | clean: 12 | -rm -f $(APP) *.elf *.gdb *.o 13 | 14 | 15 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-apps/gpio-demo/files/gpio-demo.c: -------------------------------------------------------------------------------- 1 | /* 2 | * 3 | * gpio-demo app 4 | * 5 | * Copyright (C) 2013 - 2016 Xilinx, Inc. All rights reserved. 6 | * 7 | * Permission is hereby granted, free of charge, to any person 8 | * obtaining a copy of this software and associated documentation 9 | * files (the "Software"), to deal in the Software without restriction, 10 | * including without limitation the rights to use, copy, modify, merge, 11 | * publish, distribute, sublicense, and/or sell copies of the Software, 12 | * and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included 16 | * in all copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 | * IN NO EVENT SHALL XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 22 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 | * 25 | * Except as contained in this notice, the name of the Xilinx shall not be used 26 | * in advertising or otherwise to promote the sale, use or other dealings in this 27 | * Software without prior written authorization from Xilinx. 28 | * 29 | */ 30 | 31 | #include 32 | #include 33 | #include 34 | #include 35 | #include 36 | #include 37 | #include 38 | 39 | #define GPIO_ROOT "/sys/class/gpio" 40 | #define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0])) 41 | 42 | static enum {NONE, IN, OUT, CYLON, KIT} gpio_opt = NONE; 43 | 44 | static const unsigned long cylon[] = { 45 | 0x00000080, 0x00000040, 0x00000020, 0x00000010, 46 | 0x00000008, 0x00000004, 0x00000002, 0x00000001, 47 | 0x00000002, 0x00000004, 0x00000008, 48 | 0x00000010, 0x00000020, 0x00000040, 0x00000080, 49 | }; 50 | 51 | static const unsigned long kit[] = { 52 | 0x000000e0, 0x00000070, 0x00000038, 0x0000001c, 53 | 0x0000000e, 0x00000007, 0x00000003, 0x00000001, 54 | 0x00000003, 0x00000007, 0x0000000e, 55 | 0x0000001c, 0x00000038, 0x00000070, 0x000000e0, 56 | }; 57 | 58 | static int gl_gpio_base = 0; 59 | 60 | static void usage (char *argv0) 61 | { 62 | char *basename = strrchr(argv0, '/'); 63 | if (!basename) 64 | basename = argv0; 65 | 66 | fprintf(stderr, 67 | "Usage: %s [-g GPIO_BASE] COMMAND\n" 68 | "\twhere COMMAND is one of:\n" 69 | "\t\t-i\t\tInput value from GPIO and print it\n" 70 | "\t\t-o\tVALUE\tOutput value to GPIO\n" 71 | "\t\t-c\t\tCylon test pattern\n" 72 | "\t\t-k\t\t KIT test pattern\n" 73 | "\tGPIO_BASE indicates which GPIO chip to talk to (The number can be \n" 74 | "\tfound at /sys/class/gpio/gpiochipN).\n" 75 | "\tThe highest gpiochipN is the first gpio listed in the dts file, \n" 76 | "\tand the lowest gpiochipN is the last gpio listed in the dts file.\n" 77 | "\tE.g.If the gpiochip240 is the LED_8bit gpio, and I want to output '1' \n" 78 | "\tto the LED_8bit gpio, the command should be:\n" 79 | "\t\tgpio-demo -g 240 -o 1\n" 80 | "\n" 81 | "\tgpio-demo written by Xilinx Inc.\n" 82 | "\n" 83 | , basename); 84 | exit(-2); 85 | } 86 | 87 | static int open_gpio_channel(int gpio_base) 88 | { 89 | char gpio_nchan_file[128]; 90 | int gpio_nchan_fd; 91 | int gpio_max; 92 | int nchannel; 93 | char nchannel_str[5]; 94 | char *cptr; 95 | int c; 96 | char channel_str[5]; 97 | 98 | char *gpio_export_file = "/sys/class/gpio/export"; 99 | int export_fd=0; 100 | 101 | /* Check how many channels the GPIO chip has */ 102 | sprintf(gpio_nchan_file, "%s/gpiochip%d/ngpio", GPIO_ROOT, gpio_base); 103 | gpio_nchan_fd = open(gpio_nchan_file, O_RDONLY); 104 | if (gpio_nchan_fd < 0) { 105 | fprintf(stderr, "Failed to open %s: %s\n", gpio_nchan_file, strerror(errno)); 106 | return -1; 107 | } 108 | read(gpio_nchan_fd, nchannel_str, sizeof(nchannel_str)); 109 | close(gpio_nchan_fd); 110 | nchannel=(int)strtoul(nchannel_str, &cptr, 0); 111 | if (cptr == nchannel_str) { 112 | fprintf(stderr, "Failed to change %s into GPIO channel number\n", nchannel_str); 113 | exit(1); 114 | } 115 | 116 | /* Open files for each GPIO channel */ 117 | export_fd=open(gpio_export_file, O_WRONLY); 118 | if (export_fd < 0) { 119 | fprintf(stderr, "Cannot open GPIO to export %d\n", gpio_base); 120 | return -1; 121 | } 122 | 123 | gpio_max = gpio_base + nchannel; 124 | for(c = gpio_base; c < gpio_max; c++) { 125 | sprintf(channel_str, "%d", c); 126 | write(export_fd, channel_str, (strlen(channel_str)+1)); 127 | } 128 | close(export_fd); 129 | return nchannel; 130 | } 131 | 132 | static int close_gpio_channel(int gpio_base) 133 | { 134 | char gpio_nchan_file[128]; 135 | int gpio_nchan_fd; 136 | int gpio_max; 137 | int nchannel; 138 | char nchannel_str[5]; 139 | char *cptr; 140 | int c; 141 | char channel_str[5]; 142 | 143 | char *gpio_unexport_file = "/sys/class/gpio/unexport"; 144 | int unexport_fd=0; 145 | 146 | /* Check how many channels the GPIO chip has */ 147 | sprintf(gpio_nchan_file, "%s/gpiochip%d/ngpio", GPIO_ROOT, gpio_base); 148 | gpio_nchan_fd = open(gpio_nchan_file, O_RDONLY); 149 | if (gpio_nchan_fd < 0) { 150 | fprintf(stderr, "Failed to open %s: %s\n", gpio_nchan_file, strerror(errno)); 151 | return -1; 152 | } 153 | read(gpio_nchan_fd, nchannel_str, sizeof(nchannel_str)); 154 | close(gpio_nchan_fd); 155 | nchannel=(int)strtoul(nchannel_str, &cptr, 0); 156 | if (cptr == nchannel_str) { 157 | fprintf(stderr, "Failed to change %s into GPIO channel number\n", nchannel_str); 158 | exit(1); 159 | } 160 | 161 | /* Close opened files for each GPIO channel */ 162 | unexport_fd=open(gpio_unexport_file, O_WRONLY); 163 | if (unexport_fd < 0) { 164 | fprintf(stderr, "Cannot close GPIO by writing unexport %d\n", gpio_base); 165 | return -1; 166 | } 167 | 168 | gpio_max = gpio_base + nchannel; 169 | for(c = gpio_base; c < gpio_max; c++) { 170 | sprintf(channel_str, "%d", c); 171 | write(unexport_fd, channel_str, (strlen(channel_str)+1)); 172 | } 173 | close(unexport_fd); 174 | return 0; 175 | } 176 | 177 | static int set_gpio_direction(int gpio_base, int nchannel, char *direction) 178 | { 179 | char gpio_dir_file[128]; 180 | int direction_fd=0; 181 | int gpio_max; 182 | int c; 183 | 184 | gpio_max = gpio_base + nchannel; 185 | for(c = gpio_base; c < gpio_max; c++) { 186 | sprintf(gpio_dir_file, "/sys/class/gpio/gpio%d/direction",c); 187 | direction_fd=open(gpio_dir_file, O_RDWR); 188 | if (direction_fd < 0) { 189 | fprintf(stderr, "Cannot open the direction file for GPIO %d\n", c); 190 | return 1; 191 | } 192 | write(direction_fd, direction, (strlen(direction)+1)); 193 | close(direction_fd); 194 | } 195 | return 0; 196 | } 197 | 198 | static int set_gpio_value(int gpio_base, int nchannel, int value) 199 | { 200 | char gpio_val_file[128]; 201 | int val_fd=0; 202 | int gpio_max; 203 | char val_str[2]; 204 | int c; 205 | 206 | gpio_max = gpio_base + nchannel; 207 | 208 | for(c = gpio_base; c < gpio_max; c++) { 209 | sprintf(gpio_val_file, "/sys/class/gpio/gpio%d/value",c); 210 | val_fd=open(gpio_val_file, O_RDWR); 211 | if (val_fd < 0) { 212 | fprintf(stderr, "Cannot open the value file of GPIO %d\n", c); 213 | return -1; 214 | } 215 | sprintf(val_str,"%d", (value & 1)); 216 | write(val_fd, val_str, sizeof(val_str)); 217 | close(val_fd); 218 | value >>= 1; 219 | } 220 | return 0; 221 | } 222 | 223 | static int get_gpio_value(int gpio_base, int nchannel) 224 | { 225 | char gpio_val_file[128]; 226 | int val_fd=0; 227 | int gpio_max; 228 | char val_str[2]; 229 | char *cptr; 230 | int value = 0; 231 | int c; 232 | 233 | gpio_max = gpio_base + nchannel; 234 | 235 | for(c = gpio_max-1; c >= gpio_base; c--) { 236 | sprintf(gpio_val_file, "/sys/class/gpio/gpio%d/value",c); 237 | val_fd=open(gpio_val_file, O_RDWR); 238 | if (val_fd < 0) { 239 | fprintf(stderr, "Cannot open GPIO to export %d\n", c); 240 | return -1; 241 | } 242 | read(val_fd, val_str, sizeof(val_str)); 243 | value <<= 1; 244 | value += (int)strtoul(val_str, &cptr, 0); 245 | if (cptr == optarg) { 246 | fprintf(stderr, "Failed to change %s into integer", val_str); 247 | } 248 | close(val_fd); 249 | } 250 | return value; 251 | } 252 | 253 | void signal_handler(int sig) 254 | { 255 | switch (sig) { 256 | case SIGTERM: 257 | case SIGHUP: 258 | case SIGQUIT: 259 | case SIGINT: 260 | close_gpio_channel(gl_gpio_base); 261 | exit(0) ; 262 | default: 263 | break; 264 | } 265 | } 266 | 267 | int main(int argc, char *argv[]) 268 | { 269 | extern char *optarg; 270 | char *cptr; 271 | int gpio_value = 0; 272 | int nchannel = 0; 273 | 274 | int c; 275 | int i; 276 | 277 | opterr = 0; 278 | 279 | while ((c = getopt(argc, argv, "g:io:ck")) != -1) { 280 | switch (c) { 281 | case 'g': 282 | gl_gpio_base = (int)strtoul(optarg, &cptr, 0); 283 | if (cptr == optarg) 284 | usage(argv[0]); 285 | break; 286 | case 'i': 287 | gpio_opt = IN; 288 | break; 289 | case 'o': 290 | gpio_opt = OUT; 291 | gpio_value = (int)strtoul(optarg, &cptr, 0); 292 | if (cptr == optarg) 293 | usage(argv[0]); 294 | break; 295 | case 'c': 296 | gpio_opt = CYLON; 297 | break; 298 | case 'k': 299 | gpio_opt = KIT; 300 | break; 301 | case '?': 302 | usage(argv[0]); 303 | default: 304 | usage(argv[0]); 305 | 306 | } 307 | } 308 | 309 | if (gl_gpio_base == 0) { 310 | usage(argv[0]); 311 | } 312 | 313 | nchannel = open_gpio_channel(gl_gpio_base); 314 | signal(SIGTERM, signal_handler); /* catch kill signal */ 315 | signal(SIGHUP, signal_handler); /* catch hang up signal */ 316 | signal(SIGQUIT, signal_handler); /* catch quit signal */ 317 | signal(SIGINT, signal_handler); /* catch a CTRL-c signal */ 318 | switch (gpio_opt) { 319 | case IN: 320 | set_gpio_direction(gl_gpio_base, nchannel, "in"); 321 | gpio_value=get_gpio_value(gl_gpio_base, nchannel); 322 | fprintf(stdout,"0x%08X\n", gpio_value); 323 | break; 324 | case OUT: 325 | set_gpio_direction(gl_gpio_base, nchannel, "out"); 326 | set_gpio_value(gl_gpio_base, nchannel, gpio_value); 327 | break; 328 | case CYLON: 329 | #define CYLON_DELAY_USECS (10000) 330 | set_gpio_direction(gl_gpio_base, nchannel, "out"); 331 | for (;;) { 332 | for(i=0; i < ARRAY_SIZE(cylon); i++) { 333 | gpio_value=(int)cylon[i]; 334 | set_gpio_value(gl_gpio_base, nchannel, gpio_value); 335 | } 336 | usleep(CYLON_DELAY_USECS); 337 | } 338 | case KIT: 339 | #define KIT_DELAY_USECS (10000) 340 | set_gpio_direction(gl_gpio_base, nchannel, "out"); 341 | for (;;) { 342 | for (i=0; i 32 | #include 33 | #include 34 | #include 35 | #include 36 | 37 | void usage(char *prog) 38 | { 39 | printf("usage: %s ADDR\n",prog); 40 | printf("\n"); 41 | printf("ADDR may be specified as hex values\n"); 42 | } 43 | 44 | 45 | int main(int argc, char *argv[]) 46 | { 47 | int fd; 48 | void *ptr; 49 | unsigned addr, page_addr, page_offset; 50 | unsigned page_size=sysconf(_SC_PAGESIZE); 51 | 52 | if(argc!=2) { 53 | usage(argv[0]); 54 | exit(-1); 55 | } 56 | 57 | fd=open("/dev/mem",O_RDONLY); 58 | if(fd<1) { 59 | perror(argv[0]); 60 | exit(-1); 61 | } 62 | 63 | addr=strtoul(argv[1],NULL,0); 64 | page_addr=(addr & ~(page_size-1)); 65 | page_offset=addr-page_addr; 66 | 67 | ptr=mmap(NULL,page_size,PROT_READ,MAP_SHARED,fd,(addr & ~(page_size-1))); 68 | if((int)ptr==-1) { 69 | perror(argv[0]); 70 | exit(-1); 71 | } 72 | 73 | printf("0x%08x\n",*((unsigned *)(ptr+page_offset))); 74 | return 0; 75 | } 76 | 77 | 78 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-apps/peekpoke/files/poke.c: -------------------------------------------------------------------------------- 1 | /* 2 | * poke utility - for those who remember the good old days! 3 | * 4 | 5 | * Copyright (C) 2013 - 2016 Xilinx, Inc. All rights reserved. 6 | * 7 | * Permission is hereby granted, free of charge, to any person 8 | * obtaining a copy of this software and associated documentation 9 | * files (the "Software"), to deal in the Software without restriction, 10 | * including without limitation the rights to use, copy, modify, merge, 11 | * publish, distribute, sublicense, and/or sell copies of the Software, 12 | * and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included 16 | * in all copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 | * IN NO EVENT SHALL XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 22 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 | * 25 | * Except as contained in this notice, the name of the Xilinx shall not be used 26 | * in advertising or otherwise to promote the sale, use or other dealings in this 27 | * Software without prior written authorization from Xilinx. 28 | * 29 | */ 30 | 31 | #include 32 | #include 33 | #include 34 | #include 35 | #include 36 | 37 | void usage(char *prog) 38 | { 39 | printf("usage: %s ADDR VAL\n",prog); 40 | printf("\n"); 41 | printf("ADDR and VAL may be specified as hex values\n"); 42 | } 43 | 44 | int main(int argc, char *argv[]) 45 | { 46 | int fd; 47 | void *ptr; 48 | unsigned val; 49 | unsigned addr, page_addr, page_offset; 50 | unsigned page_size=sysconf(_SC_PAGESIZE); 51 | 52 | fd=open("/dev/mem",O_RDWR); 53 | if(fd<1) { 54 | perror(argv[0]); 55 | exit(-1); 56 | } 57 | 58 | if(argc!=3) { 59 | usage(argv[0]); 60 | exit(-1); 61 | } 62 | 63 | addr=strtoul(argv[1],NULL,0); 64 | val=strtoul(argv[2],NULL,0); 65 | 66 | page_addr=(addr & ~(page_size-1)); 67 | page_offset=addr-page_addr; 68 | 69 | ptr=mmap(NULL,page_size,PROT_READ|PROT_WRITE,MAP_SHARED,fd,(addr & ~(page_size-1))); 70 | if((int)ptr==-1) { 71 | perror(argv[0]); 72 | exit(-1); 73 | } 74 | 75 | *((unsigned *)(ptr+page_offset))=val; 76 | return 0; 77 | } 78 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-apps/peekpoke/peekpoke.bb: -------------------------------------------------------------------------------- 1 | # 2 | # This is the peekpoke apllication recipe 3 | # 4 | # 5 | 6 | SUMMARY = "peekpoke application" 7 | SECTION = "PETALINUX/apps" 8 | LICENSE = "MIT" 9 | LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" 10 | SRC_URI = "file://peek.c \ 11 | file://poke.c \ 12 | file://Makefile \ 13 | " 14 | S = "${WORKDIR}" 15 | CFLAGS_prepend = "-I ${S}/include" 16 | do_compile() { 17 | oe_runmake 18 | } 19 | do_install() { 20 | install -d ${D}${bindir} 21 | install -m 0755 ${S}/peek ${D}${bindir} 22 | install -m 0755 ${S}/poke ${D}${bindir} 23 | 24 | } 25 | 26 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/device-tree/device-tree.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/files:" 2 | 3 | SRC_URI += "file://system-user.dtsi" 4 | SRC_URI += "file://port-config.dtsi" 5 | SRC_URI += "file://emacps.patch" 6 | 7 | python () { 8 | if d.getVar("CONFIG_DISABLE"): 9 | d.setVarFlag("do_configure", "noexec", "1") 10 | } 11 | 12 | export PETALINUX 13 | do_configure_append () { 14 | script="${PETALINUX}/etc/hsm/scripts/petalinux_hsm_bridge.tcl" 15 | data=${PETALINUX}/etc/hsm/data/ 16 | eval xsct -sdx -nodisp ${script} -c ${WORKDIR}/config \ 17 | -hdf ${DT_FILES_PATH}/hardware_description.${HDF_EXT} -repo ${S} \ 18 | -data ${data} -sw ${DT_FILES_PATH} -o ${DT_FILES_PATH} -a "soc_mapping" 19 | } 20 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/device-tree/files/emacps.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | EMACPS patch 2020.2 4 | =================== 5 | Initialize sink_periph to prevent build error when the variable 6 | is accessed later in the code. 7 | 8 | diff --git a/emacps/data/emacps.tcl b/emacps/data/emacps.tcl 9 | index e3fbded..c3318ad 100644 10 | --- a/emacps/data/emacps.tcl 11 | +++ b/emacps/data/emacps.tcl 12 | @@ -162,6 +162,7 @@ proc generate {drv_handle} { 13 | gen_phy_node $mdio_node $phy_name $phya 14 | } 15 | set ip_name " " 16 | + set sink_periph "" 17 | if {[string match -nocase $proc_type "psu_cortexa53"] } { 18 | if {[string match -nocase $node "&gem0"]} { 19 | set connected_ip [hsi::utils::get_connected_stream_ip $zynq_periph "MDIO_ENET0"] 20 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/device-tree/files/pl-custom.dtsi: -------------------------------------------------------------------------------- 1 | / { 2 | }; 3 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi: -------------------------------------------------------------------------------- 1 | /include/ "system-conf.dtsi" 2 | /include/ "port-config.dtsi" 3 | / { 4 | }; 5 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/fsbl/fsbl_%.bbappend: -------------------------------------------------------------------------------- 1 | SRC_URI_append += " \ 2 | file://fsbl_hooks.patch \ 3 | " 4 | 5 | FILESEXTRAPATHS_prepend := "${THISDIR}/files:" 6 | 7 | # Note: This is not required if you are using Yocto 8 | # CAUTION!: EXTERNALXSCTSRC and EXTERNALXSCTSRC_BUILD is required only for 2018.2 and below petalinux releases 9 | EXTERNALXSCTSRC = "" 10 | EXTERNALXSCTSRC_BUILD = "" 11 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/u-boot/files/platform-top.h: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/u-boot/files/uboot-axieth-could-not-get-phy.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | U-Boot for AXI Ethernet failed to find PHY patch 2020.2 4 | ======================================================= 5 | This patch fixes a bug in the AXI Ethernet driver for Xilinx U-Boot. The driver 6 | function axiemac_phy_init calls the phy_connect function from drivers/net/phy/phy.c 7 | which returns a phy_device struct when it successfully makes contact with the PHY, 8 | or NULL when it fails to contact the PHY. The axiemac_phy_init function does not 9 | check the return value before trying to assign some of its members. In the case 10 | that phy_connect returns NULL, this causes U-Boot to crash with the "Synchronous Abort" 11 | handler message. This patch adds the necessary checking of the phy_connect return value, 12 | preventing the crash. 13 | 14 | This patch is required in our case because we have a shared MDIO bus, which is not 15 | yet supported by the AXI Ethernet driver in Xilinx UBoot. This causes the driver to 16 | search for the PHYs from the wrong MDIO bus, hence causing phy_connect to fail and return 17 | NULL. 18 | 19 | diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c 20 | index cb99a25384..7a786a16cc 100644 21 | --- a/drivers/net/xilinx_axi_emac.c 22 | +++ b/drivers/net/xilinx_axi_emac.c 23 | @@ -275,6 +275,10 @@ static int axiemac_phy_init(struct udevice *dev) 24 | 25 | /* Interface - look at tsec */ 26 | phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); 27 | + if (!phydev) { 28 | + printf("%s: PHY not found\n", __func__); 29 | + return -ENODEV; 30 | + } 31 | 32 | phydev->supported &= supported; 33 | phydev->advertising = phydev->supported; 34 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/u-boot/u-boot-xlnx_%.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/files:" 2 | 3 | SRC_URI += "file://platform-top.h" 4 | SRC_URI += "file://uboot-axieth-could-not-get-phy.patch" 5 | 6 | do_configure_append () { 7 | if [ "${U_BOOT_AUTO_CONFIG}" = "1" ]; then 8 | install ${WORKDIR}/platform-auto.h ${S}/include/configs/ 9 | install ${WORKDIR}/platform-top.h ${S}/include/configs/ 10 | fi 11 | } 12 | 13 | do_configure_append_microblaze () { 14 | if [ "${U_BOOT_AUTO_CONFIG}" = "1" ]; then 15 | install -d ${B}/source/board/xilinx/microblaze-generic/ 16 | install ${WORKDIR}/config.mk ${B}/source/board/xilinx/microblaze-generic/ 17 | fi 18 | } 19 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/u-boot/u-boot-zynq-scr.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" 2 | 3 | SRC_URI += "file://boot.cmd.default.initrd \ 4 | file://boot.cmd.default" 5 | 6 | BOOTMODE = "default" 7 | BOOTFILE_EXT = ".initrd" 8 | #Make this value to "1" to skip appending base address to ddr offsets. 9 | SKIP_APPEND_BASEADDR = "0" 10 | 11 | RAMDISK_IMAGE_zynq = "rootfs.cpio.gz.u-boot" 12 | RAMDISK_IMAGE_zynqmp = "rootfs.cpio.gz.u-boot" 13 | RAMDISK_IMAGE_versal = "rootfs.cpio.gz.u-boot" 14 | 15 | KERNEL_IMAGE_zynq = "uImage" 16 | KERNEL_IMAGE_zynqmp = "Image" 17 | KERNEL_IMAGE_versal = "Image" 18 | 19 | KERNEL_BOOTCMD_zynq = "bootm" 20 | KERNEL_BOOTCMD_zynqmp = "booti" 21 | KERNEL_BOOTCMD_versal = "booti" 22 | 23 | DEVICETREE_ADDRESS_zynq = "${@append_baseaddr(d,"0x100000")}" 24 | DEVICETREE_ADDRESS_zynqmp = "${@append_baseaddr(d,"0x100000")}" 25 | DEVICETREE_ADDRESS_versal = "${@append_baseaddr(d,"0x1000")}" 26 | 27 | KERNEL_LOAD_ADDRESS_zynq = "${@append_baseaddr(d,"0x200000")}" 28 | KERNEL_LOAD_ADDRESS_zynqmp = "${@append_baseaddr(d,"0x200000")}" 29 | KERNEL_LOAD_ADDRESS_versal = "${@append_baseaddr(d,"0x80000")}" 30 | 31 | RAMDISK_IMAGE_ADDRESS_zynq = "${@append_baseaddr(d,"0x4000000")}" 32 | RAMDISK_IMAGE_ADDRESS_zynqmp = "${@append_baseaddr(d,"0x4000000")}" 33 | RAMDISK_IMAGE_ADDRESS_versal = "${@append_baseaddr(d,"0x4000000")}" 34 | 35 | ## Below offsets and sizes are based on 32MB QSPI Memory for zynq 36 | ## For zynq 37 | ## Load boot.scr at 0xFC0000 -> 15MB of QSPI/NAND Memory 38 | QSPI_KERNEL_OFFSET_zynq = "0x1000000" 39 | QSPI_RAMDISK_OFFSET_zynq = "0x1580000" 40 | 41 | NAND_KERNEL_OFFSET_zynq = "0x1000000" 42 | NAND_RAMDISK_OFFSET_zynq = "0x4600000" 43 | 44 | QSPI_KERNEL_SIZE_zynq = "0x500000" 45 | QSPI_RAMDISK_SIZE_zynq = "0xA00000" 46 | 47 | NAND_KERNEL_SIZE = "0x3200000" 48 | NAND_RAMDISK_SIZE = "0x3200000" 49 | 50 | ## Below offsets and sizes are based on 128MB QSPI Memory for zynqmp/versal 51 | ## For zynqMP 52 | ## Load boot.scr at 0x3E80000 -> 62MB of QSPI/NAND Memory 53 | QSPI_KERNEL_OFFSET = "0xF00000" 54 | QSPI_KERNEL_OFFSET_zynqmpdr = "0x3F00000" 55 | QSPI_RAMDISK_OFFSET = "0x4000000" 56 | QSPI_RAMDISK_OFFSET_zynqmpdr = "0x5D00000" 57 | 58 | NAND_KERNEL_OFFSET_zynqmp = "0x4100000" 59 | NAND_RAMDISK_OFFSET_zynqmp = "0x7800000" 60 | 61 | QSPI_KERNEL_SIZE_zynqmp = "0x1D00000" 62 | QSPI_RAMDISK_SIZE = "0x4000000" 63 | QSPI_RAMDISK_SIZE_zynqmpdr = "0x1D00000" 64 | 65 | ## For versal 66 | ## Load boot.scr at 0x7F80000 -> 127MB of QSPI/NAND Memory 67 | QSPI_KERNEL_OFFSET_versal = "0xF00000" 68 | QSPI_RAMDISK_OFFSET_versal = "0x2E00000" 69 | 70 | NAND_KERNEL_OFFSET_versal = "0x4100000" 71 | NAND_RAMDISK_OFFSET_versal = "0x8200000" 72 | 73 | QSPI_KERNEL_SIZE_versal = "0x1D00000" 74 | QSPI_RAMDISK_SIZE_versal = "0x4000000" 75 | 76 | QSPI_KERNEL_IMAGE_zynq = "image.ub" 77 | QSPI_KERNEL_IMAGE_zynqmp = "image.ub" 78 | QSPI_KERNEL_IMAGE_versal = "image.ub" 79 | 80 | NAND_KERNEL_IMAGE = "image.ub" 81 | 82 | FIT_IMAGE_LOAD_ADDRESS = "${@append_baseaddr(d,"0x10000000")}" 83 | 84 | QSPI_FIT_IMAGE_LOAD_ADDRESS = "${@append_baseaddr(d,"0x10000000")}" 85 | QSPI_FIT_IMAGE_SIZE = "0x6400000" 86 | QSPI_FIT_IMAGE_SIZE_zynqmpdr = "0x3F00000" 87 | QSPI_FIT_IMAGE_SIZE_zynq = "0xF00000" 88 | 89 | NAND_FIT_IMAGE_LOAD_ADDRESS = "${@append_baseaddr(d,"0x10000000")}" 90 | NAND_FIT_IMAGE_SIZE = "0x6400000" 91 | 92 | FIT_IMAGE = "image.ub" 93 | 94 | python () { 95 | baseaddr = d.getVar('DDR_BASEADDR') or "0x0" 96 | if baseaddr == "0x0": 97 | d.setVar('PRE_BOOTENV','') 98 | else: 99 | soc_family = d.getVar('SOC_FAMILY') or "" 100 | if soc_family == "zynqmp": 101 | fdt_high = "0x10000000" 102 | elif soc_family == "zynq": 103 | fdt_high = "0x20000000" 104 | elif soc_family == "versal": 105 | fdt_high = "0x70000000" 106 | 107 | if fdt_high: 108 | basefdt_high = append_baseaddr(d,fdt_high) 109 | bootenv = "setenv fdt_high " + basefdt_high 110 | d.setVar('PRE_BOOTENV',bootenv) 111 | } 112 | 113 | def append_baseaddr(d,offset): 114 | skip_append = d.getVar('SKIP_APPEND_BASEADDR') or "" 115 | if skip_append == "1": 116 | return offset 117 | import subprocess 118 | baseaddr = d.getVar('DDR_BASEADDR') or "0x0" 119 | subcmd = "$((%s+%s));" % (baseaddr,offset) 120 | cmd = "printf '0x%08x' " + str(subcmd) 121 | output = subprocess.check_output(cmd, shell=True).decode("utf-8") 122 | return output 123 | 124 | do_compile_prepend() { 125 | sed -e 's/@@QSPI_KERNEL_OFFSET@@/${QSPI_KERNEL_OFFSET}/' \ 126 | -e 's/@@NAND_KERNEL_OFFSET@@/${NAND_KERNEL_OFFSET}/' \ 127 | -e 's/@@QSPI_KERNEL_SIZE@@/${QSPI_KERNEL_SIZE}/' \ 128 | -e 's/@@NAND_KERNEL_SIZE@@/${NAND_KERNEL_SIZE}/' \ 129 | -e 's/@@QSPI_RAMDISK_OFFSET@@/${QSPI_RAMDISK_OFFSET}/' \ 130 | -e 's/@@NAND_RAMDISK_OFFSET@@/${NAND_RAMDISK_OFFSET}/' \ 131 | -e 's/@@QSPI_RAMDISK_SIZE@@/${QSPI_RAMDISK_SIZE}/' \ 132 | -e 's/@@NAND_RAMDISK_SIZE@@/${NAND_RAMDISK_SIZE}/' \ 133 | -e 's/@@KERNEL_IMAGE@@/${KERNEL_IMAGE}/' \ 134 | -e 's/@@QSPI_KERNEL_IMAGE@@/${QSPI_KERNEL_IMAGE}/' \ 135 | -e 's/@@NAND_KERNEL_IMAGE@@/${NAND_KERNEL_IMAGE}/' \ 136 | -e 's/@@QSPI_FIT_IMAGE_LOAD_ADDRESS@@/${QSPI_FIT_IMAGE_LOAD_ADDRESS}/' \ 137 | -e 's/@@FIT_IMAGE_LOAD_ADDRESS@@/${FIT_IMAGE_LOAD_ADDRESS}/' \ 138 | -e 's/@@QSPI_FIT_IMAGE_SIZE@@/${QSPI_FIT_IMAGE_SIZE}/' \ 139 | -e 's/@@NAND_FIT_IMAGE_LOAD_ADDRESS@@/${NAND_FIT_IMAGE_LOAD_ADDRESS}/' \ 140 | -e 's/@@NAND_FIT_IMAGE_SIZE@@/${NAND_FIT_IMAGE_SIZE}/' \ 141 | -e 's/@@FIT_IMAGE@@/${FIT_IMAGE}/' \ 142 | -e 's/@@PRE_BOOTENV@@/${PRE_BOOTENV}/' \ 143 | "${WORKDIR}/boot.cmd.${BOOTMODE}${BOOTFILE_EXT}" > "${WORKDIR}/boot.cmd.${BOOTMODE}.${SOC_FAMILY}" 144 | } 145 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.default: -------------------------------------------------------------------------------- 1 | # This is a boot script for U-Boot 2 | # Generate boot.scr: 3 | # mkimage -c none -A arm -T script -d boot.cmd.default boot.scr 4 | # 5 | ################ 6 | ## Please change the kernel_offset and kernel_size if the kernel image size more than 7 | ## the 100MB and BOOT.BIN size more than the 30MB 8 | ## kernel_offset --> is the address of qspi which you want load the kernel image 9 | ## kernel_size --> size of the kernel image in hex 10 | ############### 11 | fdt_addr=0x1000 12 | imageub_addr=0x10000000 13 | kernel_addr=0x80000 14 | kernel_offset=0x1E00200 15 | kernel_size=0x7800000 16 | kernel_type=image.ub 17 | 18 | for boot_target in ${boot_targets}; 19 | do 20 | if test "${boot_target}" = "jtag" ; then 21 | booti ${kernel_addr} - ${fdt_addr}; 22 | exit; 23 | fi 24 | if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" ; then 25 | if test -e ${devtype} ${devnum}:${distro_bootpart} /image.ub; then 26 | fatload ${devtype} ${devnum}:${distro_bootpart} ${imageub_addr} image.ub; 27 | bootm ${imageub_addr}; 28 | exit; 29 | fi 30 | if test -e ${devtype} ${devnum}:${distro_bootpart} /Image; then 31 | fatload ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr} Image; 32 | booti ${kernel_addr} - ${fdt_addr}; 33 | exit; 34 | fi 35 | booti ${kernel_addr} - ${fdt_addr}; 36 | exit; 37 | fi 38 | if test "${boot_target}" = "xspi0"; then 39 | sf probe 0 0 0; 40 | if test "${kernel_type}" = "image.ub"; then 41 | sf read ${imageub_addr} ${kernel_offset} ${kernel_size}; 42 | bootm ${imageub_addr}; 43 | exit; 44 | fi 45 | if test "${kernel_type}" = "Image"; then 46 | sf read ${kernel_addr} ${kernel_offset} ${kernel_size}; 47 | booti ${kernel_addr} - ${fdt_addr}; 48 | exit; 49 | fi 50 | exit; 51 | fi 52 | done 53 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.default.initrd: -------------------------------------------------------------------------------- 1 | # This is a boot script for U-Boot 2 | # Generate boot.scr: 3 | # mkimage -c none -A arm -T script -d boot.cmd.default boot.scr 4 | # 5 | ################ 6 | @@PRE_BOOTENV@@ 7 | 8 | for boot_target in ${boot_targets}; 9 | do 10 | if test "${boot_target}" = "jtag" ; then 11 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 12 | exit; 13 | fi 14 | if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" ; then 15 | if test -e ${devtype} ${devnum}:${distro_bootpart} /@@FIT_IMAGE@@; then 16 | fatload ${devtype} ${devnum}:${distro_bootpart} @@FIT_IMAGE_LOAD_ADDRESS@@ @@FIT_IMAGE@@; 17 | bootm @@FIT_IMAGE_LOAD_ADDRESS@@; 18 | exit; 19 | fi 20 | if test -e ${devtype} ${devnum}:${distro_bootpart} /@@KERNEL_IMAGE@@; then 21 | fatload ${devtype} ${devnum}:${distro_bootpart} @@KERNEL_LOAD_ADDRESS@@ @@KERNEL_IMAGE@@;; 22 | fi 23 | if test -e ${devtype} ${devnum}:${distro_bootpart} /system.dtb; then 24 | fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_ADDRESS@@ system.dtb; 25 | fi 26 | if test -e ${devtype} ${devnum}:${distro_bootpart} /@@RAMDISK_IMAGE@@; then 27 | fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ @@RAMDISK_IMAGE@@; 28 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 29 | exit; 30 | fi 31 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@ 32 | exit; 33 | fi 34 | if test "${boot_target}" = "xspi0" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then 35 | sf probe 0 0 0; 36 | if test "@@QSPI_KERNEL_IMAGE@@" = "@@FIT_IMAGE@@"; then 37 | sf read @@QSPI_FIT_IMAGE_LOAD_ADDRESS@@ @@QSPI_KERNEL_OFFSET@@ @@QSPI_FIT_IMAGE_SIZE@@; 38 | bootm @@QSPI_FIT_IMAGE_LOAD_ADDRESS@@; 39 | exit; 40 | fi 41 | if test "@@QSPI_KERNEL_IMAGE@@" = "@@KERNEL_IMAGE@@"; then 42 | sf read @@KERNEL_LOAD_ADDRESS@@ @@QSPI_KERNEL_OFFSET@@ @@QSPI_KERNEL_SIZE@@; 43 | sf read @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_OFFSET@@ @@QSPI_RAMDISK_SIZE@@ 44 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 45 | exit; 46 | fi 47 | exit; 48 | fi 49 | if test "${boot_target}" = "nand" || test "${boot_target}" = "nand0"; then 50 | nand info 51 | if test "@@NAND_KERNEL_IMAGE@@" = "@@FIT_IMAGE@@"; then 52 | nand read @@NAND_FIT_IMAGE_LOAD_ADDRESS@@ @@NAND_KERNEL_OFFSET@@ @@NAND_FIT_IMAGE_SIZE@@; 53 | bootm @@NAND_FIT_IMAGE_LOAD_ADDRESS@@; 54 | exit; 55 | fi 56 | if test "@@NAND_KERNEL_IMAGE@@" = "@@KERNEL_IMAGE@@"; then 57 | nand read @@KERNEL_LOAD_ADDRESS@@ @@NAND_KERNEL_OFFSET@@ @@NAND_KERNEL_SIZE@@; 58 | nand read @@RAMDISK_IMAGE_ADDRESS@@ @@NAND_RAMDISK_OFFSET@@ @@NAND_RAMDISK_SIZE@@; 59 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 60 | exit; 61 | fi 62 | fi 63 | done 64 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/bsp.cfg: -------------------------------------------------------------------------------- 1 | # Required by both v1 and v2 designs 2 | 3 | CONFIG_XILINX_DMA_ENGINES=y 4 | CONFIG_XILINX_DPDMA=y 5 | CONFIG_XILINX_ZYNQMP_DMA=y 6 | CONFIG_ETHERNET=y 7 | CONFIG_NET_VENDOR_XILINX=y 8 | CONFIG_XILINX_AXI_EMAC=y 9 | CONFIG_XILINX_PHY=y 10 | CONFIG_NET_CADENCE=y 11 | CONFIG_MACB=y 12 | CONFIG_NETDEVICES=y 13 | CONFIG_HAS_DMA=y 14 | CONFIG_CPU_IDLE=n 15 | 16 | # Below is required by v1 17 | 18 | # 19 | # Enable usb gadget 20 | # 21 | CONFIG_USB_NET_DRIVERS=y 22 | CONFIG_USB=y 23 | CONFIG_USB_GADGET=y 24 | CONFIG_USB_GADGET_VBUS_DRAW=2 25 | CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 26 | CONFIG_USB_GADGET_XILINX=y 27 | CONFIG_USB_LIBCOMPOSITE=y 28 | CONFIG_USB_F_ACM=y 29 | CONFIG_USB_F_SS_LB=y 30 | CONFIG_USB_U_SERIAL=y 31 | CONFIG_USB_U_ETHER=y 32 | CONFIG_USB_F_SERIAL=y 33 | CONFIG_USB_F_OBEX=y 34 | CONFIG_USB_F_NCM=y 35 | CONFIG_USB_F_ECM=y 36 | CONFIG_USB_F_EEM=y 37 | CONFIG_USB_F_SUBSET=y 38 | CONFIG_USB_F_RNDIS=y 39 | CONFIG_USB_F_MASS_STORAGE=y 40 | CONFIG_USB_F_FS=y 41 | CONFIG_USB_F_UAC1=y 42 | CONFIG_USB_F_UAC2=y 43 | CONFIG_USB_F_UVC=y 44 | CONFIG_USB_F_MIDI=y 45 | CONFIG_USB_F_HID=y 46 | CONFIG_USB_F_PRINTER=y 47 | CONFIG_USB_CONFIGFS=y 48 | CONFIG_USB_CONFIGFS_SERIAL=y 49 | CONFIG_USB_CONFIGFS_ACM=y 50 | CONFIG_USB_CONFIGFS_OBEX=y 51 | CONFIG_USB_CONFIGFS_NCM=y 52 | CONFIG_USB_CONFIGFS_ECM=y 53 | CONFIG_USB_CONFIGFS_ECM_SUBSET=y 54 | CONFIG_USB_CONFIGFS_RNDIS=y 55 | CONFIG_USB_CONFIGFS_EEM=y 56 | CONFIG_USB_CONFIGFS_MASS_STORAGE=y 57 | CONFIG_USB_CONFIGFS_F_LB_SS=y 58 | CONFIG_USB_CONFIGFS_F_FS=y 59 | CONFIG_USB_CONFIGFS_F_UAC1=y 60 | CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y 61 | CONFIG_USB_CONFIGFS_F_UAC2=y 62 | CONFIG_USB_CONFIGFS_F_MIDI=y 63 | CONFIG_USB_CONFIGFS_F_HID=y 64 | CONFIG_USB_CONFIGFS_F_UVC=y 65 | CONFIG_USB_CONFIGFS_F_PRINTER=y 66 | CONFIG_USB_GADGETFS=y 67 | CONFIG_USB_STORAGE=y 68 | CONFIG_USB_UAS=y 69 | 70 | # 71 | # Enable SPI user mode driver 72 | # 73 | CONFIG_SPI_SPIDEV=y 74 | 75 | # 76 | # Networking configurations 77 | # 78 | CONFIG_NF_TPROXY_IPV4=m 79 | CONFIG_NF_TPROXY_IPV6=m 80 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/dp83867_sgmii_clk_en.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | DP83867 SGMII CLK enable patch 2020.2 4 | ===================================== 5 | This patch modifies the driver for DP83867 Gigabit Ethernet PHY so that it will accept 6 | one extra property: 7 | * ti,dp83867-sgmii-autoneg-dis: When added to the GEM node, this will disable the SGMII 8 | autonegotiation feature when the PHY is configured (eg. ipconfig eth0 up) 9 | 10 | Since 2020.1, the DP83867 driver will only configure the PHY for SGMII if the phy-mode 11 | property (PHY interface) in the device tree is set to "sgmii". In earlier versions, 12 | it would assume SGMII if phy-mode was not set to "rgmii". In our case, we cannot set 13 | phy-mode to "sgmii" because that would cause the MACB driver to set the SGMIIEN and 14 | PCSSEL bits in the GEM. Instead, we keep using phy-mode="gmii" and we modify the DP83867 15 | driver such that it doesn't require phy-mode="sgmii" to configure for SGMII. 16 | 17 | diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c 18 | index 9c5acc611e4e..746b630418d7 100644 19 | --- a/drivers/net/phy/dp83867.c 20 | +++ b/drivers/net/phy/dp83867.c 21 | @@ -130,6 +130,7 @@ struct dp83867_private { 22 | bool set_clk_output; 23 | u32 clk_output_sel; 24 | bool sgmii_ref_clk_en; 25 | + bool sgmii_autoneg_dis; 26 | }; 27 | 28 | static int dp83867_ack_interrupt(struct phy_device *phydev) 29 | @@ -218,6 +219,9 @@ static int dp83867_of_init(struct phy_device *phydev) 30 | dp83867->rxctrl_strap_quirk = of_property_read_bool(of_node, 31 | "ti,dp83867-rxctrl-strap-quirk"); 32 | 33 | + dp83867->sgmii_autoneg_dis = of_property_read_bool(of_node, 34 | + "ti,dp83867-sgmii-autoneg-dis"); 35 | + 36 | dp83867->sgmii_ref_clk_en = of_property_read_bool(of_node, 37 | "ti,sgmii-ref-clock-output-enable"); 38 | 39 | @@ -388,7 +392,7 @@ static int dp83867_config_init(struct phy_device *phydev) 40 | DP83867_IO_MUX_CFG_IO_IMPEDANCE_MASK, 41 | dp83867->io_impedance); 42 | 43 | - if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 44 | + if (phy_interface_is_rgmii(phydev) == 0) { 45 | /* For support SPEED_10 in SGMII mode 46 | * DP83867_10M_SGMII_RATE_ADAPT bit 47 | * has to be cleared by software. That 48 | @@ -435,6 +439,15 @@ static int dp83867_config_init(struct phy_device *phydev) 49 | MII_DP83867_CFG2_SPEEDOPT_ENH | 50 | MII_DP83867_CFG2_SPEEDOPT_CNT | 51 | MII_DP83867_CFG2_SPEEDOPT_INTLOW); 52 | + 53 | + /* This disables the SGMII autoneg feature of the DP83867 54 | + * when the "ti,dp83867-sgmii-autoneg-dis" parameter is found 55 | + * in the phy node of the device tree. 56 | + */ 57 | + if (dp83867->sgmii_autoneg_dis) { 58 | + cfg2 &= ~MII_DP83867_CFG2_SGMII_AUTONEGEN; 59 | + } 60 | + 61 | phy_write(phydev, MII_DP83867_CFG2, cfg2); 62 | 63 | phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, 0x0); 64 | -------------------------------------------------------------------------------- /PetaLinux/src/v1/project-spec/meta-user/recipes-kernel/linux/linux-xlnx_%.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" 2 | 3 | SRC_URI += "file://bsp.cfg \ 4 | file://dp83867_sgmii_clk_en.patch \ 5 | " 6 | 7 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/configs/busybox/inetd.conf: -------------------------------------------------------------------------------- 1 | #/etc/inetd.conf: see inetd(8) for further informations. 2 | # 3 | # Internet server configuration database 4 | # 5 | # If you want to disable an entry so it isn't touched during 6 | # package updates just comment it out with a single '#' character. 7 | # 8 | # 9 | # 10 | #:INTERNAL: Internal services 11 | #echo stream tcp nowait root internal 12 | #echo dgram udp wait root internal 13 | #chargen stream tcp nowait root internal 14 | #chargen dgram udp wait root internal 15 | #discard stream tcp nowait root internal 16 | #discard dgram udp wait root internal 17 | #daytime stream tcp nowait root internal 18 | #daytime dgram udp wait root internal 19 | #time stream tcp nowait root internal 20 | #time dgram udp wait root internal 21 | telnet stream tcp nowait root telnetd telnetd -i 22 | ftp stream tcp nowait root ftpd ftpd -w 23 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/configs/config: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file; DO NOT EDIT. 3 | # misc/config System Configuration 4 | # 5 | CONFIG_SUBSYSTEM_TYPE_LINUX=y 6 | CONFIG_SYSTEM_ZYNQMP=y 7 | 8 | # 9 | # Linux Components Selection 10 | # 11 | CONFIG_SUBSYSTEM_COMPONENT_DEVICE__TREE_NAME_DEVICE__TREE__GENERATOR=y 12 | CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_AUTO_FSBL=y 13 | CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_NAME_ZYNQMP_FSBL=y 14 | CONFIG_SUBSYSTEM_COMPONENT_BOOTLOADER_AUTO_PS_INIT=y 15 | CONFIG_SUBSYSTEM_COMPONENT_PMU_FIRMWARE=y 16 | CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_U__BOOT__XLNX=y 17 | # CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_REMOTE is not set 18 | # CONFIG_SUBSYSTEM_COMPONENT_U__BOOT_NAME_EXT__LOCAL__SRC is not set 19 | CONFIG_SUBSYSTEM_COMPONENT_ARM__TRUSTED__FIRMWARE_NAME_ARM__TRUSTED__FIRMWARE=y 20 | # CONFIG_SUBSYSTEM_COMPONENT_ARM__TRUSTED__FIRMWARE_NAME_REMOTE is not set 21 | # CONFIG_SUBSYSTEM_COMPONENT_ARM__TRUSTED__FIRMWARE_NAME_EXT__LOCAL__SRC is not set 22 | CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_LINUX__XLNX=y 23 | # CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_REMOTE is not set 24 | # CONFIG_SUBSYSTEM_COMPONENT_LINUX__KERNEL_NAME_EXT__LOCAL__SRC is not set 25 | 26 | # 27 | # Auto Config Settings 28 | # 29 | CONFIG_SUBSYSTEM_AUTOCONFIG_DEVICE__TREE=y 30 | # CONFIG_SUBSYSTEM_DEVICE_TREE_MANUAL_INCLUDE is not set 31 | CONFIG_SUBSYSTEM_DEVICE_TREE_INCLUDE_DIR="${STAGING_KERNEL_DIR}/include" 32 | # CONFIG_SUBSYSTEM_AUTOCONFIG_KERNEL is not set 33 | # CONFIG_SUBSYSTEM_AUTOCONFIG_U__BOOT is not set 34 | CONFIG_SUBSYSTEM_HARDWARE_AUTO=y 35 | CONFIG_SUBSYSTEM_PROCESSOR0_IP_NAME="psu_cortexa53_0" 36 | CONFIG_SUBSYSTEM_PROCESSOR_psu_cortexa53_0_SELECT=y 37 | CONFIG_SUBSYSTEM_ARCH_AARCH64=y 38 | 39 | # 40 | # Memory Settings 41 | # 42 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_SELECT=y 43 | # CONFIG_SUBSYSTEM_MEMORY_SIMPLE_SELECT is not set 44 | # CONFIG_SUBSYSTEM_MEMORY_MANUAL_SELECT is not set 45 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_BASEADDR=0x0 46 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_SIZE=0x80000000 47 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_KERNEL_BASEADDR=0x0 48 | CONFIG_SUBSYSTEM_MEMORY_PSU_DDR_0_BANKLESS_U__BOOT_TEXTBASE_OFFSET=0x100000 49 | CONFIG_SUBSYSTEM_MEMORY_IP_NAME="PSU_DDR_0" 50 | 51 | # 52 | # Serial Settings 53 | # 54 | CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_1_SELECT=y 55 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_0_SELECT is not set 56 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_AXI_UART16550_0_SELECT is not set 57 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_AXI_UART16550_1_SELECT is not set 58 | # CONFIG_SUBSYSTEM_PMUFW_SERIAL_MANUAL_SELECT is not set 59 | CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_1_SELECT=y 60 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_0_SELECT is not set 61 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_AXI_UART16550_0_SELECT is not set 62 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_AXI_UART16550_1_SELECT is not set 63 | # CONFIG_SUBSYSTEM_FSBL_SERIAL_MANUAL_SELECT is not set 64 | CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_1_SELECT=y 65 | # CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_0_SELECT is not set 66 | # CONFIG_SUBSYSTEM_ATF_SERIAL_AXI_UART16550_0_SELECT is not set 67 | # CONFIG_SUBSYSTEM_ATF_SERIAL_AXI_UART16550_1_SELECT is not set 68 | # CONFIG_SUBSYSTEM_ATF_SERIAL_MANUAL_SELECT is not set 69 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_SELECT=y 70 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_SELECT is not set 71 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_SELECT is not set 72 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_SELECT is not set 73 | # CONFIG_SUBSYSTEM_SERIAL_MANUAL_SELECT is not set 74 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_600 is not set 75 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_9600 is not set 76 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_28800 is not set 77 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_115200=y 78 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_230400 is not set 79 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_460800 is not set 80 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_BAUDRATE_921600 is not set 81 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_600 is not set 82 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_9600 is not set 83 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_28800 is not set 84 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_115200=y 85 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_230400 is not set 86 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_460800 is not set 87 | # CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_BAUDRATE_921600 is not set 88 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_600 is not set 89 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_9600 is not set 90 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_28800 is not set 91 | CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_115200=y 92 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_230400 is not set 93 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_460800 is not set 94 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_0_BAUDRATE_921600 is not set 95 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_600 is not set 96 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_9600 is not set 97 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_28800 is not set 98 | CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_115200=y 99 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_230400 is not set 100 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_460800 is not set 101 | # CONFIG_SUBSYSTEM_SERIAL_AXI_UART16550_1_BAUDRATE_921600 is not set 102 | CONFIG_SUBSYSTEM_SERIAL_PMUFW_IP_NAME="psu_uart_1" 103 | CONFIG_SUBSYSTEM_SERIAL_FSBL_IP_NAME="psu_uart_1" 104 | CONFIG_SUBSYSTEM_SERIAL_ATF_IP_NAME="cadence1" 105 | CONFIG_SUBSYSTEM_SERIAL_IP_NAME="psu_uart_1" 106 | 107 | # 108 | # Ethernet Settings 109 | # 110 | CONFIG_SUBSYSTEM_ETHERNET_MANUAL_SELECT=y 111 | 112 | # 113 | # Flash Settings 114 | # 115 | CONFIG_SUBSYSTEM_FLASH_MANUAL_SELECT=y 116 | 117 | # 118 | # SD/SDIO Settings 119 | # 120 | # CONFIG_SUBSYSTEM_PRIMARY_SD_PSU_SD_1_SELECT is not set 121 | CONFIG_SUBSYSTEM_PRIMARY_SD_PSU_SD_0_SELECT=y 122 | # CONFIG_SUBSYSTEM_PRIMARY_SD_MANUAL_SELECT is not set 123 | CONFIG_SUBSYSTEM_SD_PSU_SD_1_SELECT=y 124 | CONFIG_SUBSYSTEM_SD_PSU_SD_0_SELECT=y 125 | 126 | # 127 | # RTC Settings 128 | # 129 | CONFIG_SUBSYSTEM_RTC_PSU_RTC_SELECT=y 130 | # CONFIG_SUBSYSTEM_RTC_MANUAL_SELECT is not set 131 | CONFIG_SUBSYSTEM_I2C_PSU_I2C_1_SELECT=y 132 | CONFIG_SUBSYSTEM_USB_PSU_USB_1_SELECT=y 133 | CONFIG_SUBSYSTEM_USB_PSU_USB_0_SELECT=y 134 | CONFIG_SUBSYSTEM_DP_PSU_DP_SELECT=y 135 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG=y 136 | 137 | # 138 | # boot image settings 139 | # 140 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOT_MEDIA_SD_SELECT=y 141 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOT_MEDIA_MANUAL_SELECT is not set 142 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOT_IMAGE_NAME="BOOT.BIN" 143 | 144 | # 145 | # u-boot env partition settings 146 | # 147 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOTENV_MEDIA_SD_SELECT=y 148 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_BOOTENV_MEDIA_MANUAL_SELECT is not set 149 | 150 | # 151 | # kernel image settings 152 | # 153 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_KERNEL_MEDIA_SD_SELECT=y 154 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_KERNEL_MEDIA_MANUAL_SELECT is not set 155 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_KERNEL_IMAGE_NAME="image.ub" 156 | 157 | # 158 | # jffs2 rootfs image settings 159 | # 160 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_JFFS2_MEDIA_MANUAL_SELECT=y 161 | 162 | # 163 | # dtb image settings 164 | # 165 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_MEDIA_BOOTIMAGE_SELECT=y 166 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_MEDIA_SD_SELECT is not set 167 | # CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_MEDIA_MANUAL_SELECT is not set 168 | CONFIG_SUBSYSTEM_IMAGES_ADVANCED_AUTOCONFIG_DTB_IMAGE_NAME="system.dtb" 169 | CONFIG_SUBSYSTEM_ENDIAN_LITTLE=y 170 | 171 | # 172 | # DTG Settings 173 | # 174 | CONFIG_SUBSYSTEM_MACHINE_NAME="avnet-ultra96-rev1" 175 | 176 | # 177 | # Kernel Bootargs 178 | # 179 | CONFIG_SUBSYSTEM_BOOTARGS_AUTO=y 180 | CONFIG_SUBSYSTEM_BOOTARGS_EARLYPRINTK=y 181 | 182 | CONFIG_SUBSYSTEM_DEVICETREE_FLAGS="-@" 183 | # CONFIG_SUBSYSTEM_DTB_OVERLAY is not set 184 | # CONFIG_SUBSYSTEM_REMOVE_PL_DTB is not set 185 | 186 | # 187 | # PMUFW Configuration 188 | # 189 | CONFIG_SUBSYSTEM_PMUFW_COMPILER_EXTRA_FLAGS="" 190 | 191 | # 192 | # FSBL Configuration 193 | # 194 | CONFIG_SUBSYSTEM_FSBL_BSPCOMPILER_FLAGS="" 195 | CONFIG_SUBSYSTEM_FSBL_COMPILER_EXTRA_FLAGS="" 196 | 197 | # 198 | # ARM Trusted Firmware Configuration 199 | # 200 | # CONFIG_SUBSYSTEM_ATF_MEMORY_SETTINGS is not set 201 | CONFIG_SUBSYSTEM_ATF_COMPILE_EXTRA_SETTINGS="" 202 | CONFIG_SUBSYSTEM_PRELOADED_BL33_BASE=0x8000000 203 | # CONFIG_SUBSYSTEM_ATF_DEBUG is not set 204 | 205 | # 206 | # FPGA Manager 207 | # 208 | # CONFIG_SUBSYSTEM_FPGA_MANAGER is not set 209 | 210 | # 211 | # u-boot Configuration 212 | # 213 | # CONFIG_SUBSYSTEM_UBOOT_CONFIG_PETALINUX is not set 214 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_OTHER=y 215 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_TARGET="" 216 | 217 | # 218 | # Image Packaging Configuration 219 | # 220 | # CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS is not set 221 | # CONFIG_SUBSYSTEM_ROOTFS_INITRD is not set 222 | # CONFIG_SUBSYSTEM_ROOTFS_JFFS2 is not set 223 | # CONFIG_SUBSYSTEM_ROOTFS_NFS is not set 224 | CONFIG_SUBSYSTEM_ROOTFS_EXT4=y 225 | # CONFIG_SUBSYSTEM_ROOTFS_OTHER is not set 226 | CONFIG_SUBSYSTEM_SDROOT_DEV="/dev/mmcblk0p2" 227 | CONFIG_SUBSYSTEM_UIMAGE_NAME="image.ub" 228 | CONFIG_SUBSYSTEM_RFS_FORMATS="cpio cpio.gz cpio.gz.u-boot tar.gz jffs2" 229 | CONFIG_SUBSYSTEM_DTB_PADDING_SIZE=0x1000 230 | CONFIG_SUBSYSTEM_COPY_TO_TFTPBOOT=y 231 | CONFIG_SUBSYSTEM_TFTPBOOT_DIR="/tftpboot" 232 | 233 | # 234 | # Firmware Version Configuration 235 | # 236 | CONFIG_SUBSYSTEM_HOSTNAME="sensors96b" 237 | CONFIG_SUBSYSTEM_PRODUCT="sensors96b" 238 | CONFIG_SUBSYSTEM_FW_VERSION="1.00" 239 | 240 | # 241 | # Yocto Settings 242 | # 243 | CONFIG_YOCTO_MACHINE_NAME="ultra96-zynqmp" 244 | 245 | # 246 | # TMPDIR Location 247 | # 248 | CONFIG_TMP_DIR_LOCATION="${PROOT}/build/tmp" 249 | 250 | # 251 | # WORKSPACE Location 252 | # 253 | CONFIG_WORKSPACE_LOCATION="${PROOT}/components/yocto/workspace" 254 | CONFIG_BUILDTOOL_BITBAKE=y 255 | # CONFIG_BUILDTOOL_DEVTOOL is not set 256 | 257 | # 258 | # Parallel thread execution 259 | # 260 | CONFIG_YOCTO_BB_NUMBER_THREADS="" 261 | CONFIG_YOCTO_PARALLEL_MAKE="" 262 | 263 | # 264 | # Add pre-mirror url 265 | # 266 | CONFIG_PRE_MIRROR_URL="http://petalinux.xilinx.com/sswreleases/rel-v${PETALINUX_VER%%.*}/downloads" 267 | 268 | # 269 | # Local sstate feeds settings 270 | # 271 | CONFIG_YOCTO_LOCAL_SSTATE_FEEDS_URL="" 272 | CONFIG_YOCTO_NETWORK_SSTATE_FEEDS=y 273 | 274 | # 275 | # Network sstate feeds URL 276 | # 277 | CONFIG_YOCTO_NETWORK_SSTATE_FEEDS_URL="http://petalinux.xilinx.com/sswreleases/rel-v${PETALINUX_VER%%.*}/aarch64/sstate-cache" 278 | # CONFIG_YOCTO_BB_NO_NETWORK is not set 279 | 280 | # 281 | # User Layers 282 | # 283 | CONFIG_USER_LAYER_0="" 284 | CONFIG_SUBSYSTEM_BOOTARGS_GENERATED=" earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait" 285 | 286 | # Config for 96B Quad Ethernet 287 | 288 | # Auto Config Settings 289 | CONFIG_SUBSYSTEM_AUTOCONFIG_FSBL=y 290 | CONFIG_SUBSYSTEM_AUTOCONFIG_PMUFW=y 291 | CONFIG_SUBSYSTEM_AUTOCONFIG_DEVICE__TREE=y 292 | CONFIG_SUBSYSTEM_AUTOCONFIG_KERNEL=y 293 | CONFIG_SUBSYSTEM_AUTOCONFIG_U__BOOT=y 294 | 295 | # Use UART1 on the Ultra96 - pins accessible on back edge of board 296 | CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_1_SELECT=y 297 | CONFIG_SUBSYSTEM_PMUFW_SERIAL_PSU_UART_0_SELECT=n 298 | CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_1_SELECT=y 299 | CONFIG_SUBSYSTEM_FSBL_SERIAL_PSU_UART_0_SELECT=n 300 | CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_1_SELECT=y 301 | CONFIG_SUBSYSTEM_ATF_SERIAL_PSU_UART_0_SELECT=n 302 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_1_SELECT=y 303 | CONFIG_SUBSYSTEM_SERIAL_PSU_UART_0_SELECT=n 304 | CONFIG_SUBSYSTEM_SERIAL_PMUFW_IP_NAME="psu_uart_1" 305 | CONFIG_SUBSYSTEM_SERIAL_FSBL_IP_NAME="psu_uart_1" 306 | CONFIG_SUBSYSTEM_SERIAL_IP_NAME="psu_uart_1" 307 | CONFIG_SUBSYSTEM_MACHINE_NAME="avnet-ultra96-rev1" 308 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_TARGET="" 309 | 310 | # u-boot Configuration 311 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_PETALINUX=n 312 | CONFIG_SUBSYSTEM_UBOOT_CONFIG_OTHER=y 313 | 314 | # Boot from SD card 315 | CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS=n 316 | CONFIG_SUBSYSTEM_ROOTFS_INITRD=n 317 | CONFIG_SUBSYSTEM_ROOTFS_EXT4=y 318 | CONFIG_SUBSYSTEM_SDROOT_DEV="/dev/mmcblk0p2" 319 | 320 | CONFIG_YOCTO_MACHINE_NAME="ultra96-zynqmp" 321 | 322 | CONFIG_SUBSYSTEM_HOSTNAME="eth96_v2" 323 | CONFIG_SUBSYSTEM_PRODUCT="eth96_v2" 324 | 325 | # Ethernet port configs 326 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_3_SELECT=n 327 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_2_SELECT=n 328 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_1_SELECT=n 329 | CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_SELECT=y 330 | CONFIG_SUBSYSTEM_ETHERNET_MANUAL_SELECT=n 331 | #CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_MAC_AUTO=n 332 | #CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_MAC="00:0a:35:00:01:22" 333 | #CONFIG_SUBSYSTEM_ETHERNET_PSU_ETHERNET_0_USE_DHCP=y 334 | 335 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/configs/init-ifupdown/interfaces: -------------------------------------------------------------------------------- 1 | # /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) 2 | 3 | # The loopback interface 4 | auto lo 5 | iface lo inet loopback 6 | 7 | # Wireless interfaces 8 | iface wlan0 inet dhcp 9 | wireless_mode managed 10 | wireless_essid any 11 | wpa-driver wext 12 | wpa-conf /etc/wpa_supplicant.conf 13 | 14 | iface atml0 inet dhcp 15 | 16 | # Wired or wireless interfaces 17 | auto eth0 18 | iface eth0 inet dhcp 19 | iface eth1 inet dhcp 20 | iface eth2 inet dhcp 21 | iface eth3 inet dhcp 22 | 23 | # Ethernet/RNDIS gadget (g_ether) 24 | # ... or on host side, usbnet and random hwaddr 25 | iface usb0 inet static 26 | address 192.168.7.2 27 | netmask 255.255.255.0 28 | network 192.168.7.0 29 | gateway 192.168.7.1 30 | 31 | # Bluetooth networking 32 | iface bnep0 inet dhcp 33 | 34 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/conf/layer.conf: -------------------------------------------------------------------------------- 1 | # We have a conf and classes directory, add to BBPATH 2 | BBPATH .= ":${LAYERDIR}" 3 | 4 | # We have recipes-* directories, add to BBFILES 5 | BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ 6 | ${LAYERDIR}/recipes-*/*/*.bbappend" 7 | 8 | BBFILE_COLLECTIONS += "meta-user" 9 | BBFILE_PATTERN_meta-user = "^${LAYERDIR}/" 10 | BBFILE_PRIORITY_meta-user = "6" 11 | LAYERSERIES_COMPAT_meta-user = "zeus" 12 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/conf/petalinuxbsp.conf: -------------------------------------------------------------------------------- 1 | #User Configuration 2 | 3 | #OE_TERMINAL = "tmux" 4 | MACHINE_FEATURES_remove_ultra96-zynqmp = "mipi" 5 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/conf/user-rootfsconfig: -------------------------------------------------------------------------------- 1 | #Note: Mention Each package in individual line 2 | #These packages will get added into rootfs menu entry 3 | 4 | CONFIG_gpio-demo 5 | CONFIG_peekpoke 6 | CONFIG_iperf3 7 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-apps/gpio-demo/files/Makefile: -------------------------------------------------------------------------------- 1 | APP = gpio-demo 2 | 3 | # Add any other object files to this list below 4 | APP_OBJS = gpio-demo.o 5 | 6 | all: $(APP) 7 | 8 | $(APP): $(APP_OBJS) 9 | $(CC) $(LDFLAGS) -o $@ $(APP_OBJS) $(LDLIBS) 10 | 11 | clean: 12 | -rm -f $(APP) *.elf *.gdb *.o 13 | 14 | 15 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-apps/gpio-demo/files/gpio-demo.c: -------------------------------------------------------------------------------- 1 | /* 2 | * 3 | * gpio-demo app 4 | * 5 | * Copyright (C) 2013 - 2016 Xilinx, Inc. All rights reserved. 6 | * 7 | * Permission is hereby granted, free of charge, to any person 8 | * obtaining a copy of this software and associated documentation 9 | * files (the "Software"), to deal in the Software without restriction, 10 | * including without limitation the rights to use, copy, modify, merge, 11 | * publish, distribute, sublicense, and/or sell copies of the Software, 12 | * and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included 16 | * in all copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 | * IN NO EVENT SHALL XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 22 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 | * 25 | * Except as contained in this notice, the name of the Xilinx shall not be used 26 | * in advertising or otherwise to promote the sale, use or other dealings in this 27 | * Software without prior written authorization from Xilinx. 28 | * 29 | */ 30 | 31 | #include 32 | #include 33 | #include 34 | #include 35 | #include 36 | #include 37 | #include 38 | 39 | #define GPIO_ROOT "/sys/class/gpio" 40 | #define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0])) 41 | 42 | static enum {NONE, IN, OUT, CYLON, KIT} gpio_opt = NONE; 43 | 44 | static const unsigned long cylon[] = { 45 | 0x00000080, 0x00000040, 0x00000020, 0x00000010, 46 | 0x00000008, 0x00000004, 0x00000002, 0x00000001, 47 | 0x00000002, 0x00000004, 0x00000008, 48 | 0x00000010, 0x00000020, 0x00000040, 0x00000080, 49 | }; 50 | 51 | static const unsigned long kit[] = { 52 | 0x000000e0, 0x00000070, 0x00000038, 0x0000001c, 53 | 0x0000000e, 0x00000007, 0x00000003, 0x00000001, 54 | 0x00000003, 0x00000007, 0x0000000e, 55 | 0x0000001c, 0x00000038, 0x00000070, 0x000000e0, 56 | }; 57 | 58 | static int gl_gpio_base = 0; 59 | 60 | static void usage (char *argv0) 61 | { 62 | char *basename = strrchr(argv0, '/'); 63 | if (!basename) 64 | basename = argv0; 65 | 66 | fprintf(stderr, 67 | "Usage: %s [-g GPIO_BASE] COMMAND\n" 68 | "\twhere COMMAND is one of:\n" 69 | "\t\t-i\t\tInput value from GPIO and print it\n" 70 | "\t\t-o\tVALUE\tOutput value to GPIO\n" 71 | "\t\t-c\t\tCylon test pattern\n" 72 | "\t\t-k\t\t KIT test pattern\n" 73 | "\tGPIO_BASE indicates which GPIO chip to talk to (The number can be \n" 74 | "\tfound at /sys/class/gpio/gpiochipN).\n" 75 | "\tThe highest gpiochipN is the first gpio listed in the dts file, \n" 76 | "\tand the lowest gpiochipN is the last gpio listed in the dts file.\n" 77 | "\tE.g.If the gpiochip240 is the LED_8bit gpio, and I want to output '1' \n" 78 | "\tto the LED_8bit gpio, the command should be:\n" 79 | "\t\tgpio-demo -g 240 -o 1\n" 80 | "\n" 81 | "\tgpio-demo written by Xilinx Inc.\n" 82 | "\n" 83 | , basename); 84 | exit(-2); 85 | } 86 | 87 | static int open_gpio_channel(int gpio_base) 88 | { 89 | char gpio_nchan_file[128]; 90 | int gpio_nchan_fd; 91 | int gpio_max; 92 | int nchannel; 93 | char nchannel_str[5]; 94 | char *cptr; 95 | int c; 96 | char channel_str[5]; 97 | 98 | char *gpio_export_file = "/sys/class/gpio/export"; 99 | int export_fd=0; 100 | 101 | /* Check how many channels the GPIO chip has */ 102 | sprintf(gpio_nchan_file, "%s/gpiochip%d/ngpio", GPIO_ROOT, gpio_base); 103 | gpio_nchan_fd = open(gpio_nchan_file, O_RDONLY); 104 | if (gpio_nchan_fd < 0) { 105 | fprintf(stderr, "Failed to open %s: %s\n", gpio_nchan_file, strerror(errno)); 106 | return -1; 107 | } 108 | read(gpio_nchan_fd, nchannel_str, sizeof(nchannel_str)); 109 | close(gpio_nchan_fd); 110 | nchannel=(int)strtoul(nchannel_str, &cptr, 0); 111 | if (cptr == nchannel_str) { 112 | fprintf(stderr, "Failed to change %s into GPIO channel number\n", nchannel_str); 113 | exit(1); 114 | } 115 | 116 | /* Open files for each GPIO channel */ 117 | export_fd=open(gpio_export_file, O_WRONLY); 118 | if (export_fd < 0) { 119 | fprintf(stderr, "Cannot open GPIO to export %d\n", gpio_base); 120 | return -1; 121 | } 122 | 123 | gpio_max = gpio_base + nchannel; 124 | for(c = gpio_base; c < gpio_max; c++) { 125 | sprintf(channel_str, "%d", c); 126 | write(export_fd, channel_str, (strlen(channel_str)+1)); 127 | } 128 | close(export_fd); 129 | return nchannel; 130 | } 131 | 132 | static int close_gpio_channel(int gpio_base) 133 | { 134 | char gpio_nchan_file[128]; 135 | int gpio_nchan_fd; 136 | int gpio_max; 137 | int nchannel; 138 | char nchannel_str[5]; 139 | char *cptr; 140 | int c; 141 | char channel_str[5]; 142 | 143 | char *gpio_unexport_file = "/sys/class/gpio/unexport"; 144 | int unexport_fd=0; 145 | 146 | /* Check how many channels the GPIO chip has */ 147 | sprintf(gpio_nchan_file, "%s/gpiochip%d/ngpio", GPIO_ROOT, gpio_base); 148 | gpio_nchan_fd = open(gpio_nchan_file, O_RDONLY); 149 | if (gpio_nchan_fd < 0) { 150 | fprintf(stderr, "Failed to open %s: %s\n", gpio_nchan_file, strerror(errno)); 151 | return -1; 152 | } 153 | read(gpio_nchan_fd, nchannel_str, sizeof(nchannel_str)); 154 | close(gpio_nchan_fd); 155 | nchannel=(int)strtoul(nchannel_str, &cptr, 0); 156 | if (cptr == nchannel_str) { 157 | fprintf(stderr, "Failed to change %s into GPIO channel number\n", nchannel_str); 158 | exit(1); 159 | } 160 | 161 | /* Close opened files for each GPIO channel */ 162 | unexport_fd=open(gpio_unexport_file, O_WRONLY); 163 | if (unexport_fd < 0) { 164 | fprintf(stderr, "Cannot close GPIO by writing unexport %d\n", gpio_base); 165 | return -1; 166 | } 167 | 168 | gpio_max = gpio_base + nchannel; 169 | for(c = gpio_base; c < gpio_max; c++) { 170 | sprintf(channel_str, "%d", c); 171 | write(unexport_fd, channel_str, (strlen(channel_str)+1)); 172 | } 173 | close(unexport_fd); 174 | return 0; 175 | } 176 | 177 | static int set_gpio_direction(int gpio_base, int nchannel, char *direction) 178 | { 179 | char gpio_dir_file[128]; 180 | int direction_fd=0; 181 | int gpio_max; 182 | int c; 183 | 184 | gpio_max = gpio_base + nchannel; 185 | for(c = gpio_base; c < gpio_max; c++) { 186 | sprintf(gpio_dir_file, "/sys/class/gpio/gpio%d/direction",c); 187 | direction_fd=open(gpio_dir_file, O_RDWR); 188 | if (direction_fd < 0) { 189 | fprintf(stderr, "Cannot open the direction file for GPIO %d\n", c); 190 | return 1; 191 | } 192 | write(direction_fd, direction, (strlen(direction)+1)); 193 | close(direction_fd); 194 | } 195 | return 0; 196 | } 197 | 198 | static int set_gpio_value(int gpio_base, int nchannel, int value) 199 | { 200 | char gpio_val_file[128]; 201 | int val_fd=0; 202 | int gpio_max; 203 | char val_str[2]; 204 | int c; 205 | 206 | gpio_max = gpio_base + nchannel; 207 | 208 | for(c = gpio_base; c < gpio_max; c++) { 209 | sprintf(gpio_val_file, "/sys/class/gpio/gpio%d/value",c); 210 | val_fd=open(gpio_val_file, O_RDWR); 211 | if (val_fd < 0) { 212 | fprintf(stderr, "Cannot open the value file of GPIO %d\n", c); 213 | return -1; 214 | } 215 | sprintf(val_str,"%d", (value & 1)); 216 | write(val_fd, val_str, sizeof(val_str)); 217 | close(val_fd); 218 | value >>= 1; 219 | } 220 | return 0; 221 | } 222 | 223 | static int get_gpio_value(int gpio_base, int nchannel) 224 | { 225 | char gpio_val_file[128]; 226 | int val_fd=0; 227 | int gpio_max; 228 | char val_str[2]; 229 | char *cptr; 230 | int value = 0; 231 | int c; 232 | 233 | gpio_max = gpio_base + nchannel; 234 | 235 | for(c = gpio_max-1; c >= gpio_base; c--) { 236 | sprintf(gpio_val_file, "/sys/class/gpio/gpio%d/value",c); 237 | val_fd=open(gpio_val_file, O_RDWR); 238 | if (val_fd < 0) { 239 | fprintf(stderr, "Cannot open GPIO to export %d\n", c); 240 | return -1; 241 | } 242 | read(val_fd, val_str, sizeof(val_str)); 243 | value <<= 1; 244 | value += (int)strtoul(val_str, &cptr, 0); 245 | if (cptr == optarg) { 246 | fprintf(stderr, "Failed to change %s into integer", val_str); 247 | } 248 | close(val_fd); 249 | } 250 | return value; 251 | } 252 | 253 | void signal_handler(int sig) 254 | { 255 | switch (sig) { 256 | case SIGTERM: 257 | case SIGHUP: 258 | case SIGQUIT: 259 | case SIGINT: 260 | close_gpio_channel(gl_gpio_base); 261 | exit(0) ; 262 | default: 263 | break; 264 | } 265 | } 266 | 267 | int main(int argc, char *argv[]) 268 | { 269 | extern char *optarg; 270 | char *cptr; 271 | int gpio_value = 0; 272 | int nchannel = 0; 273 | 274 | int c; 275 | int i; 276 | 277 | opterr = 0; 278 | 279 | while ((c = getopt(argc, argv, "g:io:ck")) != -1) { 280 | switch (c) { 281 | case 'g': 282 | gl_gpio_base = (int)strtoul(optarg, &cptr, 0); 283 | if (cptr == optarg) 284 | usage(argv[0]); 285 | break; 286 | case 'i': 287 | gpio_opt = IN; 288 | break; 289 | case 'o': 290 | gpio_opt = OUT; 291 | gpio_value = (int)strtoul(optarg, &cptr, 0); 292 | if (cptr == optarg) 293 | usage(argv[0]); 294 | break; 295 | case 'c': 296 | gpio_opt = CYLON; 297 | break; 298 | case 'k': 299 | gpio_opt = KIT; 300 | break; 301 | case '?': 302 | usage(argv[0]); 303 | default: 304 | usage(argv[0]); 305 | 306 | } 307 | } 308 | 309 | if (gl_gpio_base == 0) { 310 | usage(argv[0]); 311 | } 312 | 313 | nchannel = open_gpio_channel(gl_gpio_base); 314 | signal(SIGTERM, signal_handler); /* catch kill signal */ 315 | signal(SIGHUP, signal_handler); /* catch hang up signal */ 316 | signal(SIGQUIT, signal_handler); /* catch quit signal */ 317 | signal(SIGINT, signal_handler); /* catch a CTRL-c signal */ 318 | switch (gpio_opt) { 319 | case IN: 320 | set_gpio_direction(gl_gpio_base, nchannel, "in"); 321 | gpio_value=get_gpio_value(gl_gpio_base, nchannel); 322 | fprintf(stdout,"0x%08X\n", gpio_value); 323 | break; 324 | case OUT: 325 | set_gpio_direction(gl_gpio_base, nchannel, "out"); 326 | set_gpio_value(gl_gpio_base, nchannel, gpio_value); 327 | break; 328 | case CYLON: 329 | #define CYLON_DELAY_USECS (10000) 330 | set_gpio_direction(gl_gpio_base, nchannel, "out"); 331 | for (;;) { 332 | for(i=0; i < ARRAY_SIZE(cylon); i++) { 333 | gpio_value=(int)cylon[i]; 334 | set_gpio_value(gl_gpio_base, nchannel, gpio_value); 335 | } 336 | usleep(CYLON_DELAY_USECS); 337 | } 338 | case KIT: 339 | #define KIT_DELAY_USECS (10000) 340 | set_gpio_direction(gl_gpio_base, nchannel, "out"); 341 | for (;;) { 342 | for (i=0; i 32 | #include 33 | #include 34 | #include 35 | #include 36 | 37 | void usage(char *prog) 38 | { 39 | printf("usage: %s ADDR\n",prog); 40 | printf("\n"); 41 | printf("ADDR may be specified as hex values\n"); 42 | } 43 | 44 | 45 | int main(int argc, char *argv[]) 46 | { 47 | int fd; 48 | void *ptr; 49 | unsigned addr, page_addr, page_offset; 50 | unsigned page_size=sysconf(_SC_PAGESIZE); 51 | 52 | if(argc!=2) { 53 | usage(argv[0]); 54 | exit(-1); 55 | } 56 | 57 | fd=open("/dev/mem",O_RDONLY); 58 | if(fd<1) { 59 | perror(argv[0]); 60 | exit(-1); 61 | } 62 | 63 | addr=strtoul(argv[1],NULL,0); 64 | page_addr=(addr & ~(page_size-1)); 65 | page_offset=addr-page_addr; 66 | 67 | ptr=mmap(NULL,page_size,PROT_READ,MAP_SHARED,fd,(addr & ~(page_size-1))); 68 | if((int)ptr==-1) { 69 | perror(argv[0]); 70 | exit(-1); 71 | } 72 | 73 | printf("0x%08x\n",*((unsigned *)(ptr+page_offset))); 74 | return 0; 75 | } 76 | 77 | 78 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-apps/peekpoke/files/poke.c: -------------------------------------------------------------------------------- 1 | /* 2 | * poke utility - for those who remember the good old days! 3 | * 4 | 5 | * Copyright (C) 2013 - 2016 Xilinx, Inc. All rights reserved. 6 | * 7 | * Permission is hereby granted, free of charge, to any person 8 | * obtaining a copy of this software and associated documentation 9 | * files (the "Software"), to deal in the Software without restriction, 10 | * including without limitation the rights to use, copy, modify, merge, 11 | * publish, distribute, sublicense, and/or sell copies of the Software, 12 | * and to permit persons to whom the Software is furnished to do so, 13 | * subject to the following conditions: 14 | * 15 | * The above copyright notice and this permission notice shall be included 16 | * in all copies or substantial portions of the Software. 17 | * 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 | * IN NO EVENT SHALL XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 22 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 23 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 | * 25 | * Except as contained in this notice, the name of the Xilinx shall not be used 26 | * in advertising or otherwise to promote the sale, use or other dealings in this 27 | * Software without prior written authorization from Xilinx. 28 | * 29 | */ 30 | 31 | #include 32 | #include 33 | #include 34 | #include 35 | #include 36 | 37 | void usage(char *prog) 38 | { 39 | printf("usage: %s ADDR VAL\n",prog); 40 | printf("\n"); 41 | printf("ADDR and VAL may be specified as hex values\n"); 42 | } 43 | 44 | int main(int argc, char *argv[]) 45 | { 46 | int fd; 47 | void *ptr; 48 | unsigned val; 49 | unsigned addr, page_addr, page_offset; 50 | unsigned page_size=sysconf(_SC_PAGESIZE); 51 | 52 | fd=open("/dev/mem",O_RDWR); 53 | if(fd<1) { 54 | perror(argv[0]); 55 | exit(-1); 56 | } 57 | 58 | if(argc!=3) { 59 | usage(argv[0]); 60 | exit(-1); 61 | } 62 | 63 | addr=strtoul(argv[1],NULL,0); 64 | val=strtoul(argv[2],NULL,0); 65 | 66 | page_addr=(addr & ~(page_size-1)); 67 | page_offset=addr-page_addr; 68 | 69 | ptr=mmap(NULL,page_size,PROT_READ|PROT_WRITE,MAP_SHARED,fd,(addr & ~(page_size-1))); 70 | if((int)ptr==-1) { 71 | perror(argv[0]); 72 | exit(-1); 73 | } 74 | 75 | *((unsigned *)(ptr+page_offset))=val; 76 | return 0; 77 | } 78 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-apps/peekpoke/peekpoke.bb: -------------------------------------------------------------------------------- 1 | # 2 | # This is the peekpoke apllication recipe 3 | # 4 | # 5 | 6 | SUMMARY = "peekpoke application" 7 | SECTION = "PETALINUX/apps" 8 | LICENSE = "MIT" 9 | LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" 10 | SRC_URI = "file://peek.c \ 11 | file://poke.c \ 12 | file://Makefile \ 13 | " 14 | S = "${WORKDIR}" 15 | CFLAGS_prepend = "-I ${S}/include" 16 | do_compile() { 17 | oe_runmake 18 | } 19 | do_install() { 20 | install -d ${D}${bindir} 21 | install -m 0755 ${S}/peek ${D}${bindir} 22 | install -m 0755 ${S}/poke ${D}${bindir} 23 | 24 | } 25 | 26 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/device-tree/device-tree.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/files:" 2 | 3 | SRC_URI += "file://system-user.dtsi" 4 | SRC_URI += "file://port-config.dtsi" 5 | SRC_URI += "file://emacps.patch" 6 | 7 | python () { 8 | if d.getVar("CONFIG_DISABLE"): 9 | d.setVarFlag("do_configure", "noexec", "1") 10 | } 11 | 12 | export PETALINUX 13 | do_configure_append () { 14 | script="${PETALINUX}/etc/hsm/scripts/petalinux_hsm_bridge.tcl" 15 | data=${PETALINUX}/etc/hsm/data/ 16 | eval xsct -sdx -nodisp ${script} -c ${WORKDIR}/config \ 17 | -hdf ${DT_FILES_PATH}/hardware_description.${HDF_EXT} -repo ${S} \ 18 | -data ${data} -sw ${DT_FILES_PATH} -o ${DT_FILES_PATH} -a "soc_mapping" 19 | } 20 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/device-tree/files/emacps.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | EMACPS patch 2020.2 4 | =================== 5 | Initialize sink_periph to prevent build error when the variable 6 | is accessed later in the code. 7 | 8 | diff --git a/emacps/data/emacps.tcl b/emacps/data/emacps.tcl 9 | index e3fbded..c3318ad 100644 10 | --- a/emacps/data/emacps.tcl 11 | +++ b/emacps/data/emacps.tcl 12 | @@ -162,6 +162,7 @@ proc generate {drv_handle} { 13 | gen_phy_node $mdio_node $phy_name $phya 14 | } 15 | set ip_name " " 16 | + set sink_periph "" 17 | if {[string match -nocase $proc_type "psu_cortexa53"] } { 18 | if {[string match -nocase $node "&gem0"]} { 19 | set connected_ip [hsi::utils::get_connected_stream_ip $zynq_periph "MDIO_ENET0"] 20 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/device-tree/files/pl-custom.dtsi: -------------------------------------------------------------------------------- 1 | / { 2 | }; 3 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi: -------------------------------------------------------------------------------- 1 | /include/ "system-conf.dtsi" 2 | /include/ "port-config.dtsi" 3 | / { 4 | }; 5 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/fsbl/fsbl_%.bbappend: -------------------------------------------------------------------------------- 1 | SRC_URI_append += " \ 2 | file://fsbl_hooks.patch \ 3 | " 4 | 5 | FILESEXTRAPATHS_prepend := "${THISDIR}/files:" 6 | 7 | # Note: This is not required if you are using Yocto 8 | # CAUTION!: EXTERNALXSCTSRC and EXTERNALXSCTSRC_BUILD is required only for 2018.2 and below petalinux releases 9 | EXTERNALXSCTSRC = "" 10 | EXTERNALXSCTSRC_BUILD = "" 11 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/u-boot/files/platform-top.h: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/u-boot/files/uboot-axieth-could-not-get-phy.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | U-Boot for AXI Ethernet failed to find PHY patch 2020.2 4 | ======================================================= 5 | This patch fixes a bug in the AXI Ethernet driver for Xilinx U-Boot. The driver 6 | function axiemac_phy_init calls the phy_connect function from drivers/net/phy/phy.c 7 | which returns a phy_device struct when it successfully makes contact with the PHY, 8 | or NULL when it fails to contact the PHY. The axiemac_phy_init function does not 9 | check the return value before trying to assign some of its members. In the case 10 | that phy_connect returns NULL, this causes U-Boot to crash with the "Synchronous Abort" 11 | handler message. This patch adds the necessary checking of the phy_connect return value, 12 | preventing the crash. 13 | 14 | This patch is required in our case because we have a shared MDIO bus, which is not 15 | yet supported by the AXI Ethernet driver in Xilinx UBoot. This causes the driver to 16 | search for the PHYs from the wrong MDIO bus, hence causing phy_connect to fail and return 17 | NULL. 18 | 19 | diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c 20 | index cb99a25384..7a786a16cc 100644 21 | --- a/drivers/net/xilinx_axi_emac.c 22 | +++ b/drivers/net/xilinx_axi_emac.c 23 | @@ -275,6 +275,10 @@ static int axiemac_phy_init(struct udevice *dev) 24 | 25 | /* Interface - look at tsec */ 26 | phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); 27 | + if (!phydev) { 28 | + printf("%s: PHY not found\n", __func__); 29 | + return -ENODEV; 30 | + } 31 | 32 | phydev->supported &= supported; 33 | phydev->advertising = phydev->supported; 34 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/u-boot/u-boot-xlnx_%.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/files:" 2 | 3 | SRC_URI += "file://platform-top.h" 4 | SRC_URI += "file://uboot-axieth-could-not-get-phy.patch" 5 | 6 | do_configure_append () { 7 | if [ "${U_BOOT_AUTO_CONFIG}" = "1" ]; then 8 | install ${WORKDIR}/platform-auto.h ${S}/include/configs/ 9 | install ${WORKDIR}/platform-top.h ${S}/include/configs/ 10 | fi 11 | } 12 | 13 | do_configure_append_microblaze () { 14 | if [ "${U_BOOT_AUTO_CONFIG}" = "1" ]; then 15 | install -d ${B}/source/board/xilinx/microblaze-generic/ 16 | install ${WORKDIR}/config.mk ${B}/source/board/xilinx/microblaze-generic/ 17 | fi 18 | } 19 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/u-boot/u-boot-zynq-scr.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" 2 | 3 | SRC_URI += "file://boot.cmd.default.initrd \ 4 | file://boot.cmd.default" 5 | 6 | BOOTMODE = "default" 7 | BOOTFILE_EXT = ".initrd" 8 | #Make this value to "1" to skip appending base address to ddr offsets. 9 | SKIP_APPEND_BASEADDR = "0" 10 | 11 | RAMDISK_IMAGE_zynq = "rootfs.cpio.gz.u-boot" 12 | RAMDISK_IMAGE_zynqmp = "rootfs.cpio.gz.u-boot" 13 | RAMDISK_IMAGE_versal = "rootfs.cpio.gz.u-boot" 14 | 15 | KERNEL_IMAGE_zynq = "uImage" 16 | KERNEL_IMAGE_zynqmp = "Image" 17 | KERNEL_IMAGE_versal = "Image" 18 | 19 | KERNEL_BOOTCMD_zynq = "bootm" 20 | KERNEL_BOOTCMD_zynqmp = "booti" 21 | KERNEL_BOOTCMD_versal = "booti" 22 | 23 | DEVICETREE_ADDRESS_zynq = "${@append_baseaddr(d,"0x100000")}" 24 | DEVICETREE_ADDRESS_zynqmp = "${@append_baseaddr(d,"0x100000")}" 25 | DEVICETREE_ADDRESS_versal = "${@append_baseaddr(d,"0x1000")}" 26 | 27 | KERNEL_LOAD_ADDRESS_zynq = "${@append_baseaddr(d,"0x200000")}" 28 | KERNEL_LOAD_ADDRESS_zynqmp = "${@append_baseaddr(d,"0x200000")}" 29 | KERNEL_LOAD_ADDRESS_versal = "${@append_baseaddr(d,"0x80000")}" 30 | 31 | RAMDISK_IMAGE_ADDRESS_zynq = "${@append_baseaddr(d,"0x4000000")}" 32 | RAMDISK_IMAGE_ADDRESS_zynqmp = "${@append_baseaddr(d,"0x4000000")}" 33 | RAMDISK_IMAGE_ADDRESS_versal = "${@append_baseaddr(d,"0x4000000")}" 34 | 35 | ## Below offsets and sizes are based on 32MB QSPI Memory for zynq 36 | ## For zynq 37 | ## Load boot.scr at 0xFC0000 -> 15MB of QSPI/NAND Memory 38 | QSPI_KERNEL_OFFSET_zynq = "0x1000000" 39 | QSPI_RAMDISK_OFFSET_zynq = "0x1580000" 40 | 41 | NAND_KERNEL_OFFSET_zynq = "0x1000000" 42 | NAND_RAMDISK_OFFSET_zynq = "0x4600000" 43 | 44 | QSPI_KERNEL_SIZE_zynq = "0x500000" 45 | QSPI_RAMDISK_SIZE_zynq = "0xA00000" 46 | 47 | NAND_KERNEL_SIZE = "0x3200000" 48 | NAND_RAMDISK_SIZE = "0x3200000" 49 | 50 | ## Below offsets and sizes are based on 128MB QSPI Memory for zynqmp/versal 51 | ## For zynqMP 52 | ## Load boot.scr at 0x3E80000 -> 62MB of QSPI/NAND Memory 53 | QSPI_KERNEL_OFFSET = "0xF00000" 54 | QSPI_KERNEL_OFFSET_zynqmpdr = "0x3F00000" 55 | QSPI_RAMDISK_OFFSET = "0x4000000" 56 | QSPI_RAMDISK_OFFSET_zynqmpdr = "0x5D00000" 57 | 58 | NAND_KERNEL_OFFSET_zynqmp = "0x4100000" 59 | NAND_RAMDISK_OFFSET_zynqmp = "0x7800000" 60 | 61 | QSPI_KERNEL_SIZE_zynqmp = "0x1D00000" 62 | QSPI_RAMDISK_SIZE = "0x4000000" 63 | QSPI_RAMDISK_SIZE_zynqmpdr = "0x1D00000" 64 | 65 | ## For versal 66 | ## Load boot.scr at 0x7F80000 -> 127MB of QSPI/NAND Memory 67 | QSPI_KERNEL_OFFSET_versal = "0xF00000" 68 | QSPI_RAMDISK_OFFSET_versal = "0x2E00000" 69 | 70 | NAND_KERNEL_OFFSET_versal = "0x4100000" 71 | NAND_RAMDISK_OFFSET_versal = "0x8200000" 72 | 73 | QSPI_KERNEL_SIZE_versal = "0x1D00000" 74 | QSPI_RAMDISK_SIZE_versal = "0x4000000" 75 | 76 | QSPI_KERNEL_IMAGE_zynq = "image.ub" 77 | QSPI_KERNEL_IMAGE_zynqmp = "image.ub" 78 | QSPI_KERNEL_IMAGE_versal = "image.ub" 79 | 80 | NAND_KERNEL_IMAGE = "image.ub" 81 | 82 | FIT_IMAGE_LOAD_ADDRESS = "${@append_baseaddr(d,"0x10000000")}" 83 | 84 | QSPI_FIT_IMAGE_LOAD_ADDRESS = "${@append_baseaddr(d,"0x10000000")}" 85 | QSPI_FIT_IMAGE_SIZE = "0x6400000" 86 | QSPI_FIT_IMAGE_SIZE_zynqmpdr = "0x3F00000" 87 | QSPI_FIT_IMAGE_SIZE_zynq = "0xF00000" 88 | 89 | NAND_FIT_IMAGE_LOAD_ADDRESS = "${@append_baseaddr(d,"0x10000000")}" 90 | NAND_FIT_IMAGE_SIZE = "0x6400000" 91 | 92 | FIT_IMAGE = "image.ub" 93 | 94 | python () { 95 | baseaddr = d.getVar('DDR_BASEADDR') or "0x0" 96 | if baseaddr == "0x0": 97 | d.setVar('PRE_BOOTENV','') 98 | else: 99 | soc_family = d.getVar('SOC_FAMILY') or "" 100 | if soc_family == "zynqmp": 101 | fdt_high = "0x10000000" 102 | elif soc_family == "zynq": 103 | fdt_high = "0x20000000" 104 | elif soc_family == "versal": 105 | fdt_high = "0x70000000" 106 | 107 | if fdt_high: 108 | basefdt_high = append_baseaddr(d,fdt_high) 109 | bootenv = "setenv fdt_high " + basefdt_high 110 | d.setVar('PRE_BOOTENV',bootenv) 111 | } 112 | 113 | def append_baseaddr(d,offset): 114 | skip_append = d.getVar('SKIP_APPEND_BASEADDR') or "" 115 | if skip_append == "1": 116 | return offset 117 | import subprocess 118 | baseaddr = d.getVar('DDR_BASEADDR') or "0x0" 119 | subcmd = "$((%s+%s));" % (baseaddr,offset) 120 | cmd = "printf '0x%08x' " + str(subcmd) 121 | output = subprocess.check_output(cmd, shell=True).decode("utf-8") 122 | return output 123 | 124 | do_compile_prepend() { 125 | sed -e 's/@@QSPI_KERNEL_OFFSET@@/${QSPI_KERNEL_OFFSET}/' \ 126 | -e 's/@@NAND_KERNEL_OFFSET@@/${NAND_KERNEL_OFFSET}/' \ 127 | -e 's/@@QSPI_KERNEL_SIZE@@/${QSPI_KERNEL_SIZE}/' \ 128 | -e 's/@@NAND_KERNEL_SIZE@@/${NAND_KERNEL_SIZE}/' \ 129 | -e 's/@@QSPI_RAMDISK_OFFSET@@/${QSPI_RAMDISK_OFFSET}/' \ 130 | -e 's/@@NAND_RAMDISK_OFFSET@@/${NAND_RAMDISK_OFFSET}/' \ 131 | -e 's/@@QSPI_RAMDISK_SIZE@@/${QSPI_RAMDISK_SIZE}/' \ 132 | -e 's/@@NAND_RAMDISK_SIZE@@/${NAND_RAMDISK_SIZE}/' \ 133 | -e 's/@@KERNEL_IMAGE@@/${KERNEL_IMAGE}/' \ 134 | -e 's/@@QSPI_KERNEL_IMAGE@@/${QSPI_KERNEL_IMAGE}/' \ 135 | -e 's/@@NAND_KERNEL_IMAGE@@/${NAND_KERNEL_IMAGE}/' \ 136 | -e 's/@@QSPI_FIT_IMAGE_LOAD_ADDRESS@@/${QSPI_FIT_IMAGE_LOAD_ADDRESS}/' \ 137 | -e 's/@@FIT_IMAGE_LOAD_ADDRESS@@/${FIT_IMAGE_LOAD_ADDRESS}/' \ 138 | -e 's/@@QSPI_FIT_IMAGE_SIZE@@/${QSPI_FIT_IMAGE_SIZE}/' \ 139 | -e 's/@@NAND_FIT_IMAGE_LOAD_ADDRESS@@/${NAND_FIT_IMAGE_LOAD_ADDRESS}/' \ 140 | -e 's/@@NAND_FIT_IMAGE_SIZE@@/${NAND_FIT_IMAGE_SIZE}/' \ 141 | -e 's/@@FIT_IMAGE@@/${FIT_IMAGE}/' \ 142 | -e 's/@@PRE_BOOTENV@@/${PRE_BOOTENV}/' \ 143 | "${WORKDIR}/boot.cmd.${BOOTMODE}${BOOTFILE_EXT}" > "${WORKDIR}/boot.cmd.${BOOTMODE}.${SOC_FAMILY}" 144 | } 145 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.default: -------------------------------------------------------------------------------- 1 | # This is a boot script for U-Boot 2 | # Generate boot.scr: 3 | # mkimage -c none -A arm -T script -d boot.cmd.default boot.scr 4 | # 5 | ################ 6 | ## Please change the kernel_offset and kernel_size if the kernel image size more than 7 | ## the 100MB and BOOT.BIN size more than the 30MB 8 | ## kernel_offset --> is the address of qspi which you want load the kernel image 9 | ## kernel_size --> size of the kernel image in hex 10 | ############### 11 | fdt_addr=0x1000 12 | imageub_addr=0x10000000 13 | kernel_addr=0x80000 14 | kernel_offset=0x1E00200 15 | kernel_size=0x7800000 16 | kernel_type=image.ub 17 | 18 | for boot_target in ${boot_targets}; 19 | do 20 | if test "${boot_target}" = "jtag" ; then 21 | booti ${kernel_addr} - ${fdt_addr}; 22 | exit; 23 | fi 24 | if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" ; then 25 | if test -e ${devtype} ${devnum}:${distro_bootpart} /image.ub; then 26 | fatload ${devtype} ${devnum}:${distro_bootpart} ${imageub_addr} image.ub; 27 | bootm ${imageub_addr}; 28 | exit; 29 | fi 30 | if test -e ${devtype} ${devnum}:${distro_bootpart} /Image; then 31 | fatload ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr} Image; 32 | booti ${kernel_addr} - ${fdt_addr}; 33 | exit; 34 | fi 35 | booti ${kernel_addr} - ${fdt_addr}; 36 | exit; 37 | fi 38 | if test "${boot_target}" = "xspi0"; then 39 | sf probe 0 0 0; 40 | if test "${kernel_type}" = "image.ub"; then 41 | sf read ${imageub_addr} ${kernel_offset} ${kernel_size}; 42 | bootm ${imageub_addr}; 43 | exit; 44 | fi 45 | if test "${kernel_type}" = "Image"; then 46 | sf read ${kernel_addr} ${kernel_offset} ${kernel_size}; 47 | booti ${kernel_addr} - ${fdt_addr}; 48 | exit; 49 | fi 50 | exit; 51 | fi 52 | done 53 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-bsp/u-boot/u-boot-zynq-scr/boot.cmd.default.initrd: -------------------------------------------------------------------------------- 1 | # This is a boot script for U-Boot 2 | # Generate boot.scr: 3 | # mkimage -c none -A arm -T script -d boot.cmd.default boot.scr 4 | # 5 | ################ 6 | @@PRE_BOOTENV@@ 7 | 8 | for boot_target in ${boot_targets}; 9 | do 10 | if test "${boot_target}" = "jtag" ; then 11 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 12 | exit; 13 | fi 14 | if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" ; then 15 | if test -e ${devtype} ${devnum}:${distro_bootpart} /@@FIT_IMAGE@@; then 16 | fatload ${devtype} ${devnum}:${distro_bootpart} @@FIT_IMAGE_LOAD_ADDRESS@@ @@FIT_IMAGE@@; 17 | bootm @@FIT_IMAGE_LOAD_ADDRESS@@; 18 | exit; 19 | fi 20 | if test -e ${devtype} ${devnum}:${distro_bootpart} /@@KERNEL_IMAGE@@; then 21 | fatload ${devtype} ${devnum}:${distro_bootpart} @@KERNEL_LOAD_ADDRESS@@ @@KERNEL_IMAGE@@;; 22 | fi 23 | if test -e ${devtype} ${devnum}:${distro_bootpart} /system.dtb; then 24 | fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_ADDRESS@@ system.dtb; 25 | fi 26 | if test -e ${devtype} ${devnum}:${distro_bootpart} /@@RAMDISK_IMAGE@@; then 27 | fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ @@RAMDISK_IMAGE@@; 28 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 29 | exit; 30 | fi 31 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@ 32 | exit; 33 | fi 34 | if test "${boot_target}" = "xspi0" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then 35 | sf probe 0 0 0; 36 | if test "@@QSPI_KERNEL_IMAGE@@" = "@@FIT_IMAGE@@"; then 37 | sf read @@QSPI_FIT_IMAGE_LOAD_ADDRESS@@ @@QSPI_KERNEL_OFFSET@@ @@QSPI_FIT_IMAGE_SIZE@@; 38 | bootm @@QSPI_FIT_IMAGE_LOAD_ADDRESS@@; 39 | exit; 40 | fi 41 | if test "@@QSPI_KERNEL_IMAGE@@" = "@@KERNEL_IMAGE@@"; then 42 | sf read @@KERNEL_LOAD_ADDRESS@@ @@QSPI_KERNEL_OFFSET@@ @@QSPI_KERNEL_SIZE@@; 43 | sf read @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_OFFSET@@ @@QSPI_RAMDISK_SIZE@@ 44 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 45 | exit; 46 | fi 47 | exit; 48 | fi 49 | if test "${boot_target}" = "nand" || test "${boot_target}" = "nand0"; then 50 | nand info 51 | if test "@@NAND_KERNEL_IMAGE@@" = "@@FIT_IMAGE@@"; then 52 | nand read @@NAND_FIT_IMAGE_LOAD_ADDRESS@@ @@NAND_KERNEL_OFFSET@@ @@NAND_FIT_IMAGE_SIZE@@; 53 | bootm @@NAND_FIT_IMAGE_LOAD_ADDRESS@@; 54 | exit; 55 | fi 56 | if test "@@NAND_KERNEL_IMAGE@@" = "@@KERNEL_IMAGE@@"; then 57 | nand read @@KERNEL_LOAD_ADDRESS@@ @@NAND_KERNEL_OFFSET@@ @@NAND_KERNEL_SIZE@@; 58 | nand read @@RAMDISK_IMAGE_ADDRESS@@ @@NAND_RAMDISK_OFFSET@@ @@NAND_RAMDISK_SIZE@@; 59 | @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@ 60 | exit; 61 | fi 62 | fi 63 | done 64 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/bsp.cfg: -------------------------------------------------------------------------------- 1 | # Required by both v1 and v2 designs 2 | 3 | CONFIG_XILINX_DMA_ENGINES=y 4 | CONFIG_XILINX_DPDMA=y 5 | CONFIG_XILINX_ZYNQMP_DMA=y 6 | CONFIG_ETHERNET=y 7 | CONFIG_NET_VENDOR_XILINX=y 8 | CONFIG_XILINX_AXI_EMAC=y 9 | CONFIG_XILINX_PHY=y 10 | CONFIG_NET_CADENCE=y 11 | CONFIG_MACB=y 12 | CONFIG_NETDEVICES=y 13 | CONFIG_HAS_DMA=y 14 | CONFIG_CPU_IDLE=n 15 | 16 | # Below is required by v1 17 | 18 | # 19 | # Enable usb gadget 20 | # 21 | CONFIG_USB_NET_DRIVERS=y 22 | CONFIG_USB=y 23 | CONFIG_USB_GADGET=y 24 | CONFIG_USB_GADGET_VBUS_DRAW=2 25 | CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 26 | CONFIG_USB_GADGET_XILINX=y 27 | CONFIG_USB_LIBCOMPOSITE=y 28 | CONFIG_USB_F_ACM=y 29 | CONFIG_USB_F_SS_LB=y 30 | CONFIG_USB_U_SERIAL=y 31 | CONFIG_USB_U_ETHER=y 32 | CONFIG_USB_F_SERIAL=y 33 | CONFIG_USB_F_OBEX=y 34 | CONFIG_USB_F_NCM=y 35 | CONFIG_USB_F_ECM=y 36 | CONFIG_USB_F_EEM=y 37 | CONFIG_USB_F_SUBSET=y 38 | CONFIG_USB_F_RNDIS=y 39 | CONFIG_USB_F_MASS_STORAGE=y 40 | CONFIG_USB_F_FS=y 41 | CONFIG_USB_F_UAC1=y 42 | CONFIG_USB_F_UAC2=y 43 | CONFIG_USB_F_UVC=y 44 | CONFIG_USB_F_MIDI=y 45 | CONFIG_USB_F_HID=y 46 | CONFIG_USB_F_PRINTER=y 47 | CONFIG_USB_CONFIGFS=y 48 | CONFIG_USB_CONFIGFS_SERIAL=y 49 | CONFIG_USB_CONFIGFS_ACM=y 50 | CONFIG_USB_CONFIGFS_OBEX=y 51 | CONFIG_USB_CONFIGFS_NCM=y 52 | CONFIG_USB_CONFIGFS_ECM=y 53 | CONFIG_USB_CONFIGFS_ECM_SUBSET=y 54 | CONFIG_USB_CONFIGFS_RNDIS=y 55 | CONFIG_USB_CONFIGFS_EEM=y 56 | CONFIG_USB_CONFIGFS_MASS_STORAGE=y 57 | CONFIG_USB_CONFIGFS_F_LB_SS=y 58 | CONFIG_USB_CONFIGFS_F_FS=y 59 | CONFIG_USB_CONFIGFS_F_UAC1=y 60 | CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y 61 | CONFIG_USB_CONFIGFS_F_UAC2=y 62 | CONFIG_USB_CONFIGFS_F_MIDI=y 63 | CONFIG_USB_CONFIGFS_F_HID=y 64 | CONFIG_USB_CONFIGFS_F_UVC=y 65 | CONFIG_USB_CONFIGFS_F_PRINTER=y 66 | CONFIG_USB_GADGETFS=y 67 | CONFIG_USB_STORAGE=y 68 | CONFIG_USB_UAS=y 69 | 70 | # 71 | # Enable SPI user mode driver 72 | # 73 | CONFIG_SPI_SPIDEV=y 74 | 75 | # 76 | # Networking configurations 77 | # 78 | CONFIG_NF_TPROXY_IPV4=m 79 | CONFIG_NF_TPROXY_IPV6=m 80 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/devtool-fragment.cfg: -------------------------------------------------------------------------------- 1 | # CONFIG_WLAN_VENDOR_TI is not set 2 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/dp83867_sgmii_clk_en.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | DP83867 SGMII CLK enable patch 2020.2 4 | ===================================== 5 | This patch modifies the driver for DP83867 Gigabit Ethernet PHY so that it will accept 6 | one extra property: 7 | * ti,dp83867-sgmii-autoneg-dis: When added to the GEM node, this will disable the SGMII 8 | autonegotiation feature when the PHY is configured (eg. ipconfig eth0 up) 9 | 10 | Since 2020.1, the DP83867 driver will only configure the PHY for SGMII if the phy-mode 11 | property (PHY interface) in the device tree is set to "sgmii". In earlier versions, 12 | it would assume SGMII if phy-mode was not set to "rgmii". In our case, we cannot set 13 | phy-mode to "sgmii" because that would cause the MACB driver to set the SGMIIEN and 14 | PCSSEL bits in the GEM. Instead, we keep using phy-mode="gmii" and we modify the DP83867 15 | driver such that it doesn't require phy-mode="sgmii" to configure for SGMII. 16 | 17 | diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c 18 | index 9c5acc611e4e..746b630418d7 100644 19 | --- a/drivers/net/phy/dp83867.c 20 | +++ b/drivers/net/phy/dp83867.c 21 | @@ -130,6 +130,7 @@ struct dp83867_private { 22 | bool set_clk_output; 23 | u32 clk_output_sel; 24 | bool sgmii_ref_clk_en; 25 | + bool sgmii_autoneg_dis; 26 | }; 27 | 28 | static int dp83867_ack_interrupt(struct phy_device *phydev) 29 | @@ -218,6 +219,9 @@ static int dp83867_of_init(struct phy_device *phydev) 30 | dp83867->rxctrl_strap_quirk = of_property_read_bool(of_node, 31 | "ti,dp83867-rxctrl-strap-quirk"); 32 | 33 | + dp83867->sgmii_autoneg_dis = of_property_read_bool(of_node, 34 | + "ti,dp83867-sgmii-autoneg-dis"); 35 | + 36 | dp83867->sgmii_ref_clk_en = of_property_read_bool(of_node, 37 | "ti,sgmii-ref-clock-output-enable"); 38 | 39 | @@ -388,7 +392,7 @@ static int dp83867_config_init(struct phy_device *phydev) 40 | DP83867_IO_MUX_CFG_IO_IMPEDANCE_MASK, 41 | dp83867->io_impedance); 42 | 43 | - if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { 44 | + if (phy_interface_is_rgmii(phydev) == 0) { 45 | /* For support SPEED_10 in SGMII mode 46 | * DP83867_10M_SGMII_RATE_ADAPT bit 47 | * has to be cleared by software. That 48 | @@ -435,6 +439,15 @@ static int dp83867_config_init(struct phy_device *phydev) 49 | MII_DP83867_CFG2_SPEEDOPT_ENH | 50 | MII_DP83867_CFG2_SPEEDOPT_CNT | 51 | MII_DP83867_CFG2_SPEEDOPT_INTLOW); 52 | + 53 | + /* This disables the SGMII autoneg feature of the DP83867 54 | + * when the "ti,dp83867-sgmii-autoneg-dis" parameter is found 55 | + * in the phy node of the device tree. 56 | + */ 57 | + if (dp83867->sgmii_autoneg_dis) { 58 | + cfg2 &= ~MII_DP83867_CFG2_SGMII_AUTONEGEN; 59 | + } 60 | + 61 | phy_write(phydev, MII_DP83867_CFG2, cfg2); 62 | 63 | phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, 0x0); 64 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/fix_u96v2_pwrseq_simple.patch: -------------------------------------------------------------------------------- 1 | Opsero Electronic Design Inc. 2020 2 | Jeff Johnson 3 | Ultra96v2 patch to manipulate the wifi part's pins 2020.2 4 | ========================================================= 5 | Origin repo of the patch: https://github.com/Avnet/Ultra96-PYNQ 6 | From: Fred Kellerman 7 | Date: Tue, 24 Sep 2019 19:49:30 -0400 8 | Subject: [PATCH] Patch the kernel to manipulate the wifi part's pins 9 | diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c 10 | index ea4d3670560e..9afaf4e45b2b 100644 11 | --- a/drivers/mmc/core/pwrseq_simple.c 12 | +++ b/drivers/mmc/core/pwrseq_simple.c 13 | @@ -113,6 +113,34 @@ static int mmc_pwrseq_simple_probe(struct platform_device *pdev) 14 | struct mmc_pwrseq_simple *pwrseq; 15 | struct device *dev = &pdev->dev; 16 | 17 | + struct gpio_desc *gpio_chip_en; 18 | + struct gpio_desc *gpio_resetn; 19 | + 20 | + // Leave resetn low and let pwrseq take care of it 21 | + gpio_resetn = gpiod_get(dev, "reset", GPIOD_ASIS); 22 | + if (IS_ERR(gpio_resetn)) { 23 | + dev_warn(dev, 24 | + "mmc failed to get default resetn GPIO\n"); 25 | + } else { 26 | + dev_info(dev, "mmc succesfully got gpio_resetn\n"); 27 | + gpiod_direction_output(gpio_resetn, 1); // low 28 | + gpiod_put(gpio_resetn); 29 | + } 30 | + 31 | + // Turn power off then back on 32 | + gpio_chip_en = gpiod_get(dev, "chip_en", GPIOD_ASIS); 33 | + if (IS_ERR(gpio_chip_en)) { 34 | + dev_warn(dev, 35 | + "mmc failed to get default chip_en GPIO\n"); 36 | + } else { 37 | + dev_info(dev, "mmc succesfully got gpio_chip_en\n"); 38 | + gpiod_direction_output(gpio_chip_en, 1); // low (chip off) 39 | + mdelay(5); 40 | + gpiod_set_value(gpio_chip_en, 0); // high (chip on) 41 | + gpiod_put(gpio_chip_en); 42 | + mdelay(5); 43 | + } 44 | + 45 | pwrseq = devm_kzalloc(dev, sizeof(*pwrseq), GFP_KERNEL); 46 | if (!pwrseq) 47 | return -ENOMEM; 48 | -------------------------------------------------------------------------------- /PetaLinux/src/v2/project-spec/meta-user/recipes-kernel/linux/linux-xlnx_%.bbappend: -------------------------------------------------------------------------------- 1 | FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:" 2 | 3 | SRC_URI += "file://devtool-fragment.cfg \ 4 | file://bsp.cfg \ 5 | file://dp83867_sgmii_clk_en.patch \ 6 | file://fix_u96v2_pwrseq_simple.patch \ 7 | " 8 | 9 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # 96B Quad Ethernet Mezzanine 2 | 3 | ## Description 4 | 5 | This repo contains example designs for the Opsero 6 | [96B Quad Ethernet Mezzanine](https://docs.ethernet96.com "96B Quad Ethernet Mezzanine") board when used with the 7 | Avnet [Ultra96 v1 and v2](http://zedboard.org/product/ultra96 "Ultra96 v1 and v2"). 8 | 9 | ![96B Quad Ethernet Mezzanine](https://opsero.com/wp-content/uploads/2019/01/96b-quad-ethernet-mezzanine-med-3.jpg "96B Quad Ethernet Mezzanine") 10 | 11 | Important links: 12 | * Datasheet and user guide for this project is hosted here: [96B Quad Ethernet Mezzanine documentation](https://docs.ethernet96.com "96B Quad Ethernet Mezzanine docs"). 13 | * To report a bug: [Report an issue](https://github.com/fpgadeveloper/ethernet96/issues "Report an issue"). 14 | * For technical support: [Contact Opsero](https://opsero.com/contact-us "Contact Opsero"). 15 | * To purchase the mezzanine card: [96B Quad Ethernet Mezzanine order page](https://opsero.com/product/96b-quad-ethernet-mezzanine "96B Quad Ethernet Mezzanine order page"). 16 | 17 | ## Requirements 18 | 19 | This project is designed for Vivado 2020.2. If you are using an older version of the 20 | Xilinx tools, then refer to the [release tags](https://github.com/fpgadeveloper/ethernet96/releases "releases") 21 | to find the version of this repository that matches your version of the tools. 22 | 23 | * Vivado 2020.2 24 | * Vitis 2020.2 (for standalone lwIP echo server) 25 | * PetaLinux Tools 2020.2 26 | * [96B Quad Ethernet Mezzanine](https://opsero.com/product/96b-quad-ethernet-mezzanine "96B Quad Ethernet Mezzanine") 27 | * [Ultra96 v1 or v2](https://www.96boards.org/product/ultra96/ "Ultra96") 28 | * For designs containing AXI Ethernet Subsystem IP: [Xilinx Soft TEMAC license](http://ethernetfmc.com/getting-a-license-for-the-xilinx-tri-mode-ethernet-mac/ "Xilinx Soft TEMAC license") 29 | * [Ultra96 board files](https://github.com/Avnet/bdf "Ultra96 board files") (see [install instructions](https://docs.ethernet96.com/en/latest/getting_started.html#install-ultra96-board-definition-files "")) 30 | 31 | ## Projects in this repo 32 | 33 | These are the different projects in the repo at the moment. 34 | 35 | * AXI Ethernet (axi-eth): 36 | * Uses soft AXI Ethernet IP to implement the MAC 37 | * Uses PCS/PMA or SGMII IP to implement the SGMII over LVDS links 38 | * Uses 625MHz clock from port 3 PHY, shared logic in SGMII core for port 3 RX 39 | * All 4 ports have been tested on hardware with lwIP echo server and PetaLinux 40 | * PS GEM (ps-gem): 41 | * Uses PS integrated Gigabit Ethernet MACs (GEM) 42 | * Uses PCS/PMA or SGMII IP to implement the SGMII over LVDS links 43 | * Uses 625MHz clock from port 3 PHY, shared logic in SGMII core for ports 0 and 1 44 | * All 4 ports have been tested on hardware with lwIP echo server and PetaLinux 45 | 46 | ## Getting started 47 | 48 | For build and usage instructions, please refer to the Getting Started section of the user guide: 49 | 50 | [Getting started with the 96B Quad Ethernet Mezzanine](https://docs.ethernet96.com/en/latest/getting_started.html "Getting started") 51 | 52 | ## Technical support 53 | 54 | For questions or technical support, please contact Opsero or report an issue on the Github repo: 55 | 56 | * [Contact Opsero](https://opsero.com/contact-us "Contact Opsero") 57 | * [Report an issue](https://github.com/fpgadeveloper/ethernet96/issues "Report an issue") 58 | 59 | ## Contributions 60 | 61 | We welcome your contributions! If you would like to add something to the example designs, or you 62 | have fixed an issue, please make a pull request. 63 | -------------------------------------------------------------------------------- /Vitis/README.md: -------------------------------------------------------------------------------- 1 | Vitis Project files 2 | =================== 3 | 4 | ### How to build the Vitis workspace 5 | 6 | In order to make use of these source files, you must first generate 7 | the Vivado project hardware design (the bitstream) and export the hardware. 8 | Check the `Vivado` folder for instructions on doing this from Vivado. 9 | 10 | Once the bitstream is generated and exported, then you can build the 11 | Vitis workspace using the provided `build-vitis.tcl` script. 12 | 13 | ### Scripted build 14 | 15 | The Vitis directory contains a `build-vitis.tcl` script which can be run to automatically 16 | generate the Vitis workspace. Windows users can run the `build-vitis.bat` file which 17 | launches the Tcl script. Linux users must use the following commands to run the build 18 | script: 19 | ``` 20 | cd /Vitis 21 | //Vitis/2020.2/bin/xsct build-vitis.tcl 22 | ``` 23 | 24 | The build script does three things: 25 | 26 | 1. Prepares a local software repository containing a modified version of lwIP library, 27 | required by the echo server example application. This local software repository is 28 | a folder called `embeddedsw` that is created inside the `Vitis` folder/workspace. 29 | 2. Adds the modified sources from the Git repo's `EmbeddedSw` directory to the local 30 | software repository `Vitis/embeddedsw`. 31 | 3. Generates a lwIP Echo Server example application for each exported Vivado design 32 | that is found in the Git repo's `Vivado` directory. Most users will only have one exported 33 | Vivado design. 34 | 35 | ### Run the application 36 | 37 | 1. Open Xilinx Vitis. 38 | 2. Power up your hardware platform and ensure that the JTAG is 39 | connected properly. 40 | 3. Select Xilinx Tools->Program FPGA. You only have to do this 41 | once, each time you power up your hardware platform. 42 | 4. Click Run from the toolbar to run your application. You can modify the code 43 | and click Run as many times as you like, without going through 44 | the other steps. 45 | 46 | ### How to change the Ethernet port targetted by the application 47 | 48 | The echo server example design currently can only target one Ethernet port at a time. 49 | Selection of the Ethernet port can be changed by modifying the defines contained in the 50 | `platform_config.h` file in the application sources. Set `PLATFORM_EMAC_BASEADDR` 51 | to one of the following values: 52 | 53 | For designs using the GEMs: 54 | * Port 0: `XPAR_XEMACPS_0_BASEADDR` 55 | * Port 1: `XPAR_XEMACPS_1_BASEADDR` 56 | * Port 2: `XPAR_XEMACPS_2_BASEADDR` 57 | * Port 3: `XPAR_XEMACPS_3_BASEADDR` 58 | 59 | For designs using AXI Ethernet: 60 | * Port 0: `XPAR_AXIETHERNET_0_BASEADDR` 61 | * Port 1: `XPAR_AXIETHERNET_1_BASEADDR` 62 | * Port 2: `XPAR_AXIETHERNET_2_BASEADDR` 63 | * Port 3: `XPAR_AXIETHERNET_2_BASEADDR` 64 | 65 | -------------------------------------------------------------------------------- /Vitis/build-vitis.bat: -------------------------------------------------------------------------------- 1 | @ECHO OFF 2 | 3 | setlocal ENABLEDELAYEDEXPANSION 4 | SET vitis=C:\Xilinx\Vitis\2020.2\bin\xsct.bat 5 | cmd /c "%vitis% build-vitis.tcl" 6 | pause 7 | -------------------------------------------------------------------------------- /Vitis/build-vitis.tcl: -------------------------------------------------------------------------------- 1 | #!/usr/bin/tclsh 2 | 3 | # Description 4 | # ----------- 5 | # This Tcl script will create Vitis workspace with software applications for each of the 6 | # exported hardware designs in the ../Vivado directory. 7 | 8 | # Set the Vivado directories containing the Vivado projects 9 | set vivado_dirs_rel [list "../Vivado"] 10 | set vivado_dirs {} 11 | foreach d $vivado_dirs_rel { 12 | set d_abs [file join [pwd] $d] 13 | append vivado_dirs [file normalize $d_abs] " " 14 | } 15 | 16 | # Set the application postfix 17 | # Applications will be named using the app_postfix appended to the board name 18 | set app_postfix "_echo" 19 | 20 | # Specify the postfix on the Vivado projects so that the workspace builder can find them 21 | set vivado_postfix "" 22 | 23 | # Set the app template used to create the application 24 | set support_app "lwip_echo_server" 25 | set template_app "lwIP Echo Server" 26 | 27 | # Microblaze designs: Generate combined .bit and .elf file 28 | set mb_combine_bit_elf 0 29 | 30 | # ---------------------------------------------------------------------------------------------- 31 | # Custom modifications functions 32 | # ---------------------------------------------------------------------------------------------- 33 | # Use these functions to make custom changes to the platform or standard application template 34 | # such as modifying files or copying sources into the platform/application. 35 | # These functions are called after creating the platform/application and before build. 36 | 37 | proc custom_platform_mods {platform_name} { 38 | # Enable and configure the FSBL domain 39 | # STDIO must be set to psu_uart_1 on Ultra96 40 | domain active {zynqmp_fsbl} 41 | bsp config stdin psu_uart_1 42 | bsp config stdout psu_uart_1 43 | bsp regenerate 44 | # Enable and configure the Standalone domain 45 | # STDIO must be set to psu_uart_1 on Ultra96 46 | domain active {standalone_domain} 47 | bsp config stdin psu_uart_1 48 | bsp config stdout psu_uart_1 49 | bsp regenerate 50 | # Enable and configure the PMU FW domain 51 | # STDIO must be set to psu_uart_1 on Ultra96 52 | domain active {zynqmp_pmufw} 53 | bsp config stdin psu_uart_1 54 | bsp config stdout psu_uart_1 55 | bsp regenerate 56 | 57 | # Extra compiler flags are needed 58 | platform config -extra-compiler-flags fsbl "-MMD -MP -Wall -fmessage-length=0 -DARMA53_64 -Os -flto -ffat-lto-objects " 59 | platform config -extra-compiler-flags pmufw "-MMD -MP -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v9.2 -mxl-soft-mul -Os -flto -ffat-lto-objects " 60 | platform write 61 | } 62 | 63 | proc custom_app_mods {platform_name app_name} { 64 | # No custom mods required 65 | } 66 | 67 | # Call the workspace builder script 68 | source tcl/workspace.tcl 69 | 70 | -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v1/1.2/board.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | Ultra96v1 Board File Image 6 | 7 | 8 | 9 | Rev 1 10 | 11 | 1.2 12 | Ultra96v1 Evaluation Platform 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | FPGA part on the board 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v1/1.2/ultra96.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/fpgadeveloper/ethernet96/ad2a0137f24c4d8ba2413faef0f6ef9eb1fb6c7f/Vivado/boards/board_files/ultra96v1/1.2/ultra96.jpg -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v2/1.0/board.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | Ultra96v2 Board File Image 6 | 7 | 8 | 9 | Rev 1 10 | 11 | 1.0 12 | Ultra96v2 Evaluation Platform 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | FPGA part on the board 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v2/1.0/ultra96v2.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/fpgadeveloper/ethernet96/ad2a0137f24c4d8ba2413faef0f6ef9eb1fb6c7f/Vivado/boards/board_files/ultra96v2/1.0/ultra96v2.jpg -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v2/1.1/board.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | Ultra96v2 Board File Image 6 | 7 | 8 | 9 | Rev 1 10 | Rev 2 11 | 12 | 1.1 13 | Ultra96v2 Single Board Computer 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | FPGA part on the board 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v2/1.1/part0_pins.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v2/1.1/ultra96v2.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/fpgadeveloper/ethernet96/ad2a0137f24c4d8ba2413faef0f6ef9eb1fb6c7f/Vivado/boards/board_files/ultra96v2/1.1/ultra96v2.jpg -------------------------------------------------------------------------------- /Vivado/boards/board_files/ultra96v2/1.1/ultra96v2_top.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/fpgadeveloper/ethernet96/ad2a0137f24c4d8ba2413faef0f6ef9eb1fb6c7f/Vivado/boards/board_files/ultra96v2/1.1/ultra96v2_top.jpg -------------------------------------------------------------------------------- /Vivado/build-axi-eth.bat: -------------------------------------------------------------------------------- 1 | SET vivado=C:\Xilinx\Vivado\2020.2\bin\vivado.bat 2 | @ECHO OFF 3 | ECHO. 4 | ECHO ################################ 5 | ECHO ### Specify Ultra96 v1 or v2 ### 6 | ECHO ################################ 7 | ECHO. 8 | ECHO This script can generate a project for Ultra96 v1 or v2. 9 | ECHO Please specify your board version [1 or 2] and press ENTER. 10 | ECHO. 11 | SET /P ver=Enter board version [1 or 2]: 12 | if exist %vivado% ( 13 | %vivado% -mode batch -source build-axi-eth.tcl -tclargs {1} %ver% 14 | ) else ( 15 | ECHO. 16 | ECHO ############################### 17 | ECHO ### Failed to locate Vivado ### 18 | ECHO ############################### 19 | ECHO. 20 | ECHO This batch file "%~n0.bat" did not find Vivado installed in: 21 | ECHO. 22 | ECHO %vivado% 23 | ECHO. 24 | ECHO Fix the problem by doing one of the following: 25 | ECHO. 26 | ECHO 1. If you do not have this version of Vivado installed, 27 | ECHO please install it or download the project sources from 28 | ECHO a commit of the Git repository that was intended for 29 | ECHO your version of Vivado. 30 | ECHO. 31 | ECHO 2. If Vivado is installed in a different location on your 32 | ECHO PC, please modify the first line of this batch file 33 | ECHO to specify the correct location. 34 | ECHO. 35 | pause 36 | ) -------------------------------------------------------------------------------- /Vivado/build-axi-eth.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # build.tcl: Tcl script for re-creating project 'axi_eth' 3 | # 4 | #***************************************************************************************** 5 | 6 | # Check the version of Vivado used 7 | set version_required "2020.2" 8 | set ver [lindex [split $::env(XILINX_VIVADO) /] end] 9 | if {![string equal $ver $version_required]} { 10 | puts "###############################" 11 | puts "### Failed to build project ###" 12 | puts "###############################" 13 | puts "This project was designed for use with Vivado $version_required." 14 | puts "You are using Vivado $ver. Please install Vivado $version_required," 15 | puts "or download the project sources from a commit of the Git repository" 16 | puts "that was intended for your version of Vivado ($ver)." 17 | return 18 | } 19 | 20 | # Work out the board name from arguments 21 | set board_ver "[lindex $argv 1]" 22 | if {$board_ver == "1"} { 23 | set board_part "em.avnet.com:ultra96v1:part0:1.2" 24 | set design_name axi_eth_v1 25 | } elseif {$board_ver == "2"} { 26 | set board_part "em.avnet.com:ultra96v2:part0:1.0" 27 | set design_name axi_eth_v2 28 | } else { 29 | set board_part "em.avnet.com:ultra96v2:part0:1.0" 30 | set design_name axi_eth_v2 31 | puts "Board version incorrect or not specified - defaulting to v2." 32 | puts "You must specify a valid Ultra96 board version as an argument when" 33 | puts "running this script. The argument can be 1 or 2." 34 | } 35 | 36 | # Set the reference directory for source file relative paths (by default the value is script directory path) 37 | set origin_dir "." 38 | 39 | # Set the directory path for the original project from where this script was exported 40 | set orig_proj_dir "[file normalize "$origin_dir/$design_name"]" 41 | 42 | # Create project 43 | create_project $design_name $origin_dir/$design_name -part xczu3eg-sbva484-1-e 44 | 45 | # Set the directory path for the new project 46 | set proj_dir [get_property directory [current_project]] 47 | 48 | # Set project properties 49 | set obj [current_project] 50 | set_property -name "board_part" -value $board_part -objects $obj 51 | set_property -name "default_lib" -value "xil_defaultlib" -objects $obj 52 | set_property -name "ip_cache_permissions" -value "read write" -objects $obj 53 | set_property -name "ip_output_repo" -value "$proj_dir/$design_name.cache/ip" -objects $obj 54 | set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj 55 | set_property -name "simulator_language" -value "Mixed" -objects $obj 56 | 57 | # Create 'sources_1' fileset (if not found) 58 | if {[string equal [get_filesets -quiet sources_1] ""]} { 59 | create_fileset -srcset sources_1 60 | } 61 | 62 | # Set 'sources_1' fileset properties 63 | set obj [get_filesets sources_1] 64 | set_property "top" "${design_name}_wrapper" $obj 65 | 66 | # Create 'constrs_1' fileset (if not found) 67 | if {[string equal [get_filesets -quiet constrs_1] ""]} { 68 | create_fileset -constrset constrs_1 69 | } 70 | 71 | # Set 'constrs_1' fileset object 72 | set obj [get_filesets constrs_1] 73 | 74 | # Add/Import constrs file and set constrs file properties 75 | set file "[file normalize "$origin_dir/src/constraints/axi-eth.xdc"]" 76 | set file_added [add_files -norecurse -fileset $obj $file] 77 | set file "$origin_dir/src/constraints/axi-eth.xdc" 78 | set file [file normalize $file] 79 | set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] 80 | set_property "file_type" "XDC" $file_obj 81 | 82 | # Set 'constrs_1' fileset properties 83 | set obj [get_filesets constrs_1] 84 | set_property "target_constrs_file" "[file normalize "$origin_dir/src/constraints/axi-eth.xdc"]" $obj 85 | 86 | # Create 'sim_1' fileset (if not found) 87 | if {[string equal [get_filesets -quiet sim_1] ""]} { 88 | create_fileset -simset sim_1 89 | } 90 | 91 | # Set 'sim_1' fileset object 92 | set obj [get_filesets sim_1] 93 | # Empty (no sources present) 94 | 95 | # Set 'sim_1' fileset properties 96 | set obj [get_filesets sim_1] 97 | set_property "top" "${design_name}_wrapper" $obj 98 | 99 | # Create 'synth_1' run (if not found) 100 | if {[string equal [get_runs -quiet synth_1] ""]} { 101 | create_run -name synth_1 -part xczu3eg-sbva484-1-e -flow {Vivado Synthesis 2020} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 102 | } else { 103 | set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] 104 | set_property flow "Vivado Synthesis 2020" [get_runs synth_1] 105 | } 106 | set obj [get_runs synth_1] 107 | 108 | # set the current synth run 109 | current_run -synthesis [get_runs synth_1] 110 | 111 | # Create 'impl_1' run (if not found) 112 | if {[string equal [get_runs -quiet impl_1] ""]} { 113 | create_run -name impl_1 -part xczu3eg-sbva484-1-e -flow {Vivado Implementation 2020} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 114 | } else { 115 | set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] 116 | set_property flow "Vivado Implementation 2020" [get_runs impl_1] 117 | } 118 | set obj [get_runs impl_1] 119 | set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj 120 | set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj 121 | 122 | # set the current impl run 123 | current_run -implementation [get_runs impl_1] 124 | 125 | puts "INFO: Project created:${design_name}" 126 | 127 | # Input arguments for block design script 128 | set num_gems 4 129 | 130 | # Create block design 131 | source $origin_dir/src/bd/design_1-axi-eth.tcl 132 | 133 | # Generate the wrapper 134 | make_wrapper -files [get_files *${design_name}.bd] -top 135 | add_files -norecurse ${design_name}/${design_name}.srcs/sources_1/bd/${design_name}/hdl/${design_name}_wrapper.v 136 | 137 | # Update the compile order 138 | update_compile_order -fileset sources_1 139 | update_compile_order -fileset sim_1 140 | 141 | # Ensure parameter propagation has been performed 142 | close_bd_design [current_bd_design] 143 | open_bd_design [get_files ${design_name}.bd] 144 | validate_bd_design -force 145 | save_bd_design 146 | 147 | -------------------------------------------------------------------------------- /Vivado/build-ps-gem.bat: -------------------------------------------------------------------------------- 1 | SET vivado=C:\Xilinx\Vivado\2020.2\bin\vivado.bat 2 | @ECHO OFF 3 | ECHO. 4 | ECHO ################################ 5 | ECHO ### Specify Ultra96 v1 or v2 ### 6 | ECHO ################################ 7 | ECHO. 8 | ECHO This script can generate a project for Ultra96 v1 or v2. 9 | ECHO Please specify your board version [1 or 2] and press ENTER. 10 | ECHO. 11 | SET /P ver=Enter board version [1 or 2]: 12 | if exist %vivado% ( 13 | %vivado% -mode batch -source build-ps-gem.tcl -tclargs {1} %ver% 14 | ) else ( 15 | ECHO. 16 | ECHO ############################### 17 | ECHO ### Failed to locate Vivado ### 18 | ECHO ############################### 19 | ECHO. 20 | ECHO This batch file "%~n0.bat" did not find Vivado installed in: 21 | ECHO. 22 | ECHO %vivado% 23 | ECHO. 24 | ECHO Fix the problem by doing one of the following: 25 | ECHO. 26 | ECHO 1. If you do not have this version of Vivado installed, 27 | ECHO please install it or download the project sources from 28 | ECHO a commit of the Git repository that was intended for 29 | ECHO your version of Vivado. 30 | ECHO. 31 | ECHO 2. If Vivado is installed in a different location on your 32 | ECHO PC, please modify the first line of this batch file 33 | ECHO to specify the correct location. 34 | ECHO. 35 | pause 36 | ) 37 | -------------------------------------------------------------------------------- /Vivado/build-ps-gem.tcl: -------------------------------------------------------------------------------- 1 | # 2 | # build.tcl: Tcl script for re-creating project 'ps_gem' 3 | # 4 | #***************************************************************************************** 5 | 6 | # Check the version of Vivado used 7 | set version_required "2020.2" 8 | set ver [lindex [split $::env(XILINX_VIVADO) /] end] 9 | if {![string equal $ver $version_required]} { 10 | puts "###############################" 11 | puts "### Failed to build project ###" 12 | puts "###############################" 13 | puts "This project was designed for use with Vivado $version_required." 14 | puts "You are using Vivado $ver. Please install Vivado $version_required," 15 | puts "or download the project sources from a commit of the Git repository" 16 | puts "that was intended for your version of Vivado ($ver)." 17 | return 18 | } 19 | 20 | # Work out the board name from arguments 21 | set board_ver "[lindex $argv 1]" 22 | if {$board_ver == "1"} { 23 | set board_part "em.avnet.com:ultra96v1:part0:1.2" 24 | set design_name ps_gem_v1 25 | } elseif {$board_ver == "2"} { 26 | set board_part "em.avnet.com:ultra96v2:part0:1.0" 27 | set design_name ps_gem_v2 28 | } else { 29 | set board_part "em.avnet.com:ultra96v2:part0:1.0" 30 | set design_name ps_gem_v2 31 | puts "Board version incorrect or not specified - defaulting to v2." 32 | puts "You must specify a valid Ultra96 board version as an argument when" 33 | puts "running this script. The argument can be 1 or 2." 34 | } 35 | 36 | # Set the reference directory for source file relative paths (by default the value is script directory path) 37 | set origin_dir "." 38 | 39 | # Set the directory path for the original project from where this script was exported 40 | set orig_proj_dir "[file normalize "$origin_dir/$design_name"]" 41 | 42 | # Create project 43 | create_project $design_name $origin_dir/$design_name -part xczu3eg-sbva484-1-e 44 | 45 | # Set the directory path for the new project 46 | set proj_dir [get_property directory [current_project]] 47 | 48 | # Set project properties 49 | set obj [current_project] 50 | set_property -name "board_part" -value $board_part -objects $obj 51 | set_property -name "default_lib" -value "xil_defaultlib" -objects $obj 52 | set_property -name "ip_cache_permissions" -value "read write" -objects $obj 53 | set_property -name "ip_output_repo" -value "$proj_dir/$design_name.cache/ip" -objects $obj 54 | set_property -name "sim.ip.auto_export_scripts" -value "1" -objects $obj 55 | set_property -name "simulator_language" -value "Mixed" -objects $obj 56 | 57 | # Create 'sources_1' fileset (if not found) 58 | if {[string equal [get_filesets -quiet sources_1] ""]} { 59 | create_fileset -srcset sources_1 60 | } 61 | 62 | # Set 'sources_1' fileset properties 63 | set obj [get_filesets sources_1] 64 | set_property "top" "${design_name}_wrapper" $obj 65 | 66 | # Create 'constrs_1' fileset (if not found) 67 | if {[string equal [get_filesets -quiet constrs_1] ""]} { 68 | create_fileset -constrset constrs_1 69 | } 70 | 71 | # Set 'constrs_1' fileset object 72 | set obj [get_filesets constrs_1] 73 | 74 | # Add/Import constrs file and set constrs file properties 75 | set file "[file normalize "$origin_dir/src/constraints/ps-gem.xdc"]" 76 | set file_added [add_files -norecurse -fileset $obj $file] 77 | set file "$origin_dir/src/constraints/ps-gem.xdc" 78 | set file [file normalize $file] 79 | set file_obj [get_files -of_objects [get_filesets constrs_1] [list "*$file"]] 80 | set_property "file_type" "XDC" $file_obj 81 | 82 | # Set 'constrs_1' fileset properties 83 | set obj [get_filesets constrs_1] 84 | set_property "target_constrs_file" "[file normalize "$origin_dir/src/constraints/ps-gem.xdc"]" $obj 85 | 86 | # Create 'sim_1' fileset (if not found) 87 | if {[string equal [get_filesets -quiet sim_1] ""]} { 88 | create_fileset -simset sim_1 89 | } 90 | 91 | # Set 'sim_1' fileset object 92 | set obj [get_filesets sim_1] 93 | # Empty (no sources present) 94 | 95 | # Set 'sim_1' fileset properties 96 | set obj [get_filesets sim_1] 97 | set_property "top" "${design_name}_wrapper" $obj 98 | 99 | # Create 'synth_1' run (if not found) 100 | if {[string equal [get_runs -quiet synth_1] ""]} { 101 | create_run -name synth_1 -part xczu3eg-sbva484-1-e -flow {Vivado Synthesis 2020} -strategy "Vivado Synthesis Defaults" -report_strategy {No Reports} -constrset constrs_1 102 | } else { 103 | set_property strategy "Vivado Synthesis Defaults" [get_runs synth_1] 104 | set_property flow "Vivado Synthesis 2020" [get_runs synth_1] 105 | } 106 | set obj [get_runs synth_1] 107 | 108 | # set the current synth run 109 | current_run -synthesis [get_runs synth_1] 110 | 111 | # Create 'impl_1' run (if not found) 112 | if {[string equal [get_runs -quiet impl_1] ""]} { 113 | create_run -name impl_1 -part xczu3eg-sbva484-1-e -flow {Vivado Implementation 2020} -strategy "Vivado Implementation Defaults" -report_strategy {No Reports} -constrset constrs_1 -parent_run synth_1 114 | } else { 115 | set_property strategy "Vivado Implementation Defaults" [get_runs impl_1] 116 | set_property flow "Vivado Implementation 2020" [get_runs impl_1] 117 | } 118 | set obj [get_runs impl_1] 119 | set_property -name "steps.write_bitstream.args.readback_file" -value "0" -objects $obj 120 | set_property -name "steps.write_bitstream.args.verbose" -value "0" -objects $obj 121 | 122 | # set the current impl run 123 | current_run -implementation [get_runs impl_1] 124 | 125 | puts "INFO: Project created:${design_name}" 126 | 127 | # Input arguments for block design script 128 | set num_gems 4 129 | 130 | # Create block design 131 | source $origin_dir/src/bd/design_1-ps-gem.tcl 132 | 133 | # Generate the wrapper 134 | make_wrapper -files [get_files *${design_name}.bd] -top 135 | add_files -norecurse ${design_name}/${design_name}.srcs/sources_1/bd/${design_name}/hdl/${design_name}_wrapper.v 136 | 137 | # Update the compile order 138 | update_compile_order -fileset sources_1 139 | update_compile_order -fileset sim_1 140 | 141 | # Ensure parameter propagation has been performed 142 | close_bd_design [current_bd_design] 143 | open_bd_design [get_files ${design_name}.bd] 144 | validate_bd_design -force 145 | save_bd_design 146 | 147 | -------------------------------------------------------------------------------- /docs/Makefile: -------------------------------------------------------------------------------- 1 | # Minimal makefile for Sphinx documentation 2 | # 3 | 4 | # You can set these variables from the command line. 5 | SPHINXOPTS = 6 | SPHINXBUILD = sphinx-build 7 | SOURCEDIR = source 8 | BUILDDIR = build 9 | 10 | # Put it first so that "make" without argument is like "make help". 11 | help: 12 | @$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) 13 | 14 | .PHONY: help Makefile 15 | 16 | # Catch-all target: route all unknown targets to Sphinx using the new 17 | # "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS). 18 | %: Makefile 19 | @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) -------------------------------------------------------------------------------- /docs/make.bat: -------------------------------------------------------------------------------- 1 | @ECHO OFF 2 | 3 | pushd %~dp0 4 | 5 | REM Command file for Sphinx documentation 6 | 7 | if "%SPHINXBUILD%" == "" ( 8 | set SPHINXBUILD=sphinx-build 9 | ) 10 | set SOURCEDIR=source 11 | set BUILDDIR=build 12 | 13 | if "%1" == "" goto help 14 | 15 | %SPHINXBUILD% >NUL 2>NUL 16 | if errorlevel 9009 ( 17 | echo. 18 | echo.The 'sphinx-build' command was not found. Make sure you have Sphinx 19 | echo.installed, then set the SPHINXBUILD environment variable to point 20 | echo.to the full path of the 'sphinx-build' executable. Alternatively you 21 | echo.may add the Sphinx directory to PATH. 22 | echo. 23 | echo.If you don't have Sphinx installed, grab it from 24 | echo.http://sphinx-doc.org/ 25 | exit /b 1 26 | ) 27 | 28 | %SPHINXBUILD% -M %1 %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% 29 | goto end 30 | 31 | :help 32 | %SPHINXBUILD% -M help %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% 33 | 34 | :end 35 | popd 36 | -------------------------------------------------------------------------------- /docs/requirements.txt: -------------------------------------------------------------------------------- 1 | # How to create the Python virtual environment for this project 2 | # ------------------------------------------------------------- 3 | # 4 | # (1) Install Python 3.6 64-bit to path C:\Python36-64 5 | # 6 | # (2) Update pip: 7 | # $ cd \Python36-64\Scripts 8 | # $ pip install --upgrade pip 9 | # 10 | # (3) Install virtualenv to the base Python installation: 11 | # $ cd \Python36-64\Scripts 12 | # $ pip install virtualenv 13 | # 14 | # (4) Create the virtual environment: 15 | # $ cd \Python36-64\Scripts 16 | # $ virtualenv \env 17 | # 18 | # (5) Install the requirements: 19 | # $ cd 20 | # $ env\Scripts\activate 21 | # $ pip install --upgrade -r requirements.txt 22 | # 23 | alabaster==0.7.12 24 | Babel==2.9.1 25 | certifi==2023.7.22 26 | chardet==4.0.0 27 | colorama==0.4.4 28 | docutils==0.16 29 | idna==2.10 30 | imagesize==1.2.0 31 | Jinja2==2.11.3 32 | MarkupSafe==1.1.1 33 | packaging==20.9 34 | Pygments==2.15.0 35 | pyparsing==2.4.7 36 | pytz==2021.1 37 | requests==2.31.0 38 | six==1.16.0 39 | snowballstemmer==2.1.0 40 | Sphinx==4.0.1 41 | sphinx-rtd-theme==0.5.2 42 | sphinxcontrib-applehelp==1.0.2 43 | sphinxcontrib-devhelp==1.0.2 44 | sphinxcontrib-htmlhelp==1.0.3 45 | sphinxcontrib-jsmath==1.0.1 46 | sphinxcontrib-qthelp==1.0.3 47 | sphinxcontrib-serializinghtml==1.1.4 48 | urllib3==1.26.5 49 | -------------------------------------------------------------------------------- /docs/source/board_setup.rst: -------------------------------------------------------------------------------- 1 | =========== 2 | Board Setup 3 | =========== 4 | 5 | Mezzanine fastening hardware 6 | ============================ 7 | 8 | For typical development use, in a lab or on a desk, the mating force of the expansion connectors alone is 9 | enough to securly fix the mezzanine card to the carrier board. However, for applications requiring higher 10 | mechanical robustness, the mezzanine can be fixed to the carrier board using 7mm standoffs and M2.5 machine 11 | screws. We suggest the following part numbers, however equivalent parts can also be used: 12 | 13 | * | Hex standoff, Thread M2.5 x 0.45, Aluminium, Board-to-board length 7mm 14 | | **Part number:** M2102-2545-AL 15 | | **Manufacturer:** RAF Electronic Hardware 16 | 17 | * | Machine screw, Thread M2.5 x 0.45, Length (below head) 4mm, Stainless steel, Phillips head 18 | | **Part number:** 425-035 19 | | **Supplier:** Spaenaur 20 | 21 | Stacking a second mezzanine 22 | =========================== 23 | 24 | A second mezzanine card can be stacked on top of the 96B Quad Ethernet Mezzanine as shown in the image below. 25 | 26 | .. figure:: images/96b-quad-ethernet-mezzanine-sensors-front.jpg 27 | :align: center 28 | :name: 96b-quad-ethernet-mezzanine-sensors-front 29 | 30 | 96B Quad Ethernet Mezzanine with stacked Sensors mezzanine (front) 31 | 32 | The RJ45 connector (`0826-1X4T-23-F `_) 33 | has a height of 13.59mm, while the expansion socket has a height of 4.5mm as defined by the 96Boards spec. 34 | For this reason, an extender (see image below) is required for stacking most mezzanine cards onto the 96B Quad 35 | Ethernet Mezzanine. The extender is a 40-pin pin socket with 8mm long pins that is inserted into the 96B 36 | Quad Ethernet Mezzanine's low-speed expansion socket, effectively increasing it's height above that of the RJ45 37 | connector. The stacked mezzanine card is then plugged into the extender socket and sits comfortably above the 38 | RJ45 connector. We recommend that the following connector be used as the extender socket, however equivalent 39 | parts can also be used: 40 | 41 | * | 40-pin Pin socket with 8mm long pins 42 | | **Part number:** F263-1220A0BSYE1 43 | | **Manufacturer:** Yxcon 44 | 45 | .. figure:: images/96b-quad-ethernet-mezzanine-extender.jpg 46 | :align: center 47 | :name: 96b-quad-ethernet-mezzanine-extender 48 | 49 | Extender for stacking second mezzanine card 50 | 51 | When using the extender socket recommended above, the stacked mezzanine sits at a height of 16mm above the 52 | 96B Quad Ethernet Mezzanine, and it can be fixed to the mezzanine by using 16mm standoffs and M2.5 machine 53 | screws. We suggest the following part numbers, however equivalent parts can also be used: 54 | 55 | * | Hex standoff, Thread M2.5 x 0.45, Aluminium, Board-to-board length 16mm 56 | | **Part number:** M2111-2545-AL 57 | | **Manufacturer:** RAF Electronic Hardware 58 | 59 | * | Machine screw, Thread M2.5 x 0.45, Length (below head) 4mm, Stainless steel, Phillips head 60 | | **Part number:** 425-035 61 | | **Supplier:** Spaenaur 62 | 63 | The image below illustrates the use of the extender socket and 16mm standoffs. 64 | 65 | .. figure:: images/96b-quad-ethernet-mezzanine-sensors.jpg 66 | :align: center 67 | :name: 96b-quad-ethernet-mezzanine-sensors 68 | 69 | 96B Quad Ethernet Mezzanine with stacked Sensors mezzanine (back) 70 | 71 | -------------------------------------------------------------------------------- /docs/source/conf.py: -------------------------------------------------------------------------------- 1 | # Configuration file for the Sphinx documentation builder. 2 | # 3 | # This file only contains a selection of the most common options. For a full 4 | # list see the documentation: 5 | # http://www.sphinx-doc.org/en/master/config 6 | 7 | # -- Path setup -------------------------------------------------------------- 8 | 9 | # If extensions (or modules to document with autodoc) are in another directory, 10 | # add these directories to sys.path here. If the directory is relative to the 11 | # documentation root, use os.path.abspath to make it absolute, like shown here. 12 | # 13 | # import os 14 | # import sys 15 | # sys.path.insert(0, os.path.abspath('.')) 16 | import sys 17 | import os 18 | numfig = True 19 | 20 | # -- Project information ----------------------------------------------------- 21 | 22 | project = '96B Quad Ethernet Mezzanine' 23 | copyright = '2019, Opsero Electronic Design Inc.' 24 | author = 'Jeff Johnson' 25 | 26 | 27 | # -- General configuration --------------------------------------------------- 28 | 29 | # Add any Sphinx extension module names here, as strings. They can be 30 | # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom 31 | # ones. 32 | extensions = [ 33 | ] 34 | 35 | # Add any paths that contain templates here, relative to this directory. 36 | templates_path = ['_templates'] 37 | 38 | # List of patterns, relative to source directory, that match files and 39 | # directories to ignore when looking for source files. 40 | # This pattern also affects html_static_path and html_extra_path. 41 | exclude_patterns = [] 42 | 43 | 44 | # -- Options for HTML output ------------------------------------------------- 45 | 46 | # The theme to use for HTML and HTML Help pages. See the documentation for 47 | # a list of builtin themes. 48 | # 49 | html_theme = 'sphinx_rtd_theme' 50 | 51 | # Add any paths that contain custom static files (such as style sheets) here, 52 | # relative to this directory. They are copied after the builtin static files, 53 | # so a file named "default.css" will overwrite the builtin "default.css". 54 | html_static_path = ['_static'] 55 | -------------------------------------------------------------------------------- /docs/source/images/96b-quad-ethernet-bottom-labelled.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/fpgadeveloper/ethernet96/ad2a0137f24c4d8ba2413faef0f6ef9eb1fb6c7f/docs/source/images/96b-quad-ethernet-bottom-labelled.jpg -------------------------------------------------------------------------------- /docs/source/images/96b-quad-ethernet-clocks.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/fpgadeveloper/ethernet96/ad2a0137f24c4d8ba2413faef0f6ef9eb1fb6c7f/docs/source/images/96b-quad-ethernet-clocks.jpg -------------------------------------------------------------------------------- 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-------------------------------------------------------------------------------- 1 | .. 96B Quad Ethernet Mezzanine documentation master file, created by 2 | sphinx-quickstart on Sat Mar 30 14:26:08 2019. 3 | You can adapt this file completely to your liking, but it should at least 4 | contain the root `toctree` directive. 5 | 6 | 96B Quad Ethernet Mezzanine 7 | =========================== 8 | 9 | Description 10 | ----------- 11 | 12 | The 96B Quad Ethernet Mezzanine is an add-on/expansion board for SoC based development platforms designed to 13 | the 96Boards specification. The mezzanine card has 4x Texas Instruments DP83867 Gigabit Ethernet PHYs to provide 14 | 4 ports of gigabit Ethernet connectivity to the carrier development platform. 15 | 16 | .. figure:: images/96b-quad-ethernet-mezzanine-med-3.jpg 17 | :align: center 18 | :name: 96b-quad-ethernet-ultra96-photo 19 | 20 | 96B Quad Ethernet Mezzanine on the Ultra96 21 | 22 | Features 23 | -------- 24 | 25 | * 4x TI `DP83867 `_ Gigabit Ethernet PHYs 26 | * Quad Ethernet RJ45 with magnetics 27 | * Power and reset pushbuttons 28 | * Low-speed expansion connector for stacking 29 | * Supports the `Avnet Ultra96 v1 and v2 `_ dev platforms 30 | * Example designs for Vivado 31 | * Standalone and PetaLinux example designs 32 | 33 | Where to buy 34 | ------------ 35 | 36 | The mezzanine card can be purchased from Opsero's online shop at the link below: 37 | 38 | `96B Quad Ethernet Mezzanine order page `_ 39 | 40 | .. toctree:: 41 | :maxdepth: 2 42 | :caption: Datasheet 43 | 44 | pin_configuration 45 | specifications 46 | detailed_description 47 | mechanical_info 48 | 49 | .. toctree:: 50 | :maxdepth: 2 51 | :caption: User Guide 52 | 53 | getting_started 54 | board_setup 55 | programming_guide 56 | references 57 | -------------------------------------------------------------------------------- /docs/source/mechanical_info.rst: -------------------------------------------------------------------------------- 1 | ====================== 2 | Mechanical Information 3 | ====================== 4 | 5 | Dimensions 6 | ========== 7 | 8 | The mechanical dimensions of the 96B Quad Ethernet Mezzanine card are illustrated 9 | in the figure below. All dimensions are in millimeters (mm). 10 | 11 | .. figure:: images/96b-quad-ethernet-mec-top.jpg 12 | :align: center 13 | :name: 96b-quad-ethernet-mec-top 14 | 15 | 96B Quad Ethernet Mezzanine mechanical drawing 16 | 17 | The assembly drawing above is also available as a PDF at the link below: 18 | 19 | `96B Quad Ethernet Mezzanine Rev-A Assembly Drawing `_ 20 | 21 | 3D Model 22 | ======== 23 | 24 | The 3D model of the board is available as a STEP file at the link below: 25 | 26 | `96B Quad Ethernet Mezzanine Rev-A 3D STEP model `_ 27 | -------------------------------------------------------------------------------- /docs/source/references.rst: -------------------------------------------------------------------------------- 1 | ========== 2 | References 3 | ========== 4 | 5 | 96B Quad Ethernet Mezzanine Board Files 6 | ======================================= 7 | 8 | #. `96B Quad Ethernet Mezzanine Rev-A Schematics PDF `_ 9 | #. `96B Quad Ethernet Mezzanine Rev-A Assembly Drawing PDF `_ 10 | #. `96B Quad Ethernet Mezzanine Rev-A 3D STEP model `_ 11 | 12 | Ultra96 13 | ======= 14 | 15 | #. `Ultra96 product page `_ 16 | #. `Ultra96 documentation page `_ 17 | 18 | Part Datasheets 19 | =============== 20 | 21 | Use the links below to access the datasheets of the significant parts on the mezzanine card: 22 | 23 | #. `Gigabit Ethernet PHY, DP83867, Texas Instruments `_ 24 | #. `Quad RJ45 connector, 0826-1X4T-23-F, Bel Fuse Inc. `_ 25 | #. `Switching regulator, TPS82150SILT, Texas Instruments `_ 26 | #. `Non-inverting buffer, NC7WV16P6X, ON Semiconductor `_ 27 | #. `Crystal 25MHz, 8Z-25.000MAAJ-T, TXC `_ 28 | #. `Tactile switch, B3U-1000P, Omron `_ 29 | #. `40-pin Pin Socket 2mm, 55510-140LF, Amphenol FCI `_ 30 | #. `40-pin Pin Header 2mm, 57202-G52-20LF, Amphenol FCI `_ 31 | #. `60-pin Header 0.8mm, 61083-063402LF, Amphenol FCI `_ 32 | 33 | Accessories 34 | =========== 35 | 36 | Extender for stacking a second mezzanine card: 37 | 38 | #. `40-pin Pin socket with extended pins, F263-1220A0BSYE1, Yxcon `_ 39 | -------------------------------------------------------------------------------- /docs/source/revision_history.rst: -------------------------------------------------------------------------------- 1 | Revision History 2 | ================ 3 | 4 | This is the first version of the documentation. 5 | -------------------------------------------------------------------------------- /docs/source/specifications.rst: -------------------------------------------------------------------------------- 1 | ============== 2 | Specifications 3 | ============== 4 | 5 | Recommended Operating Conditions 6 | ================================ 7 | 8 | +-------------------+------------------------+------------+------------+-----------+--------+ 9 | | | MIN | TYP | MAX | UNIT | 10 | +===================+========================+============+============+===========+========+ 11 | | Supply voltage | SYS_DCIN | +8 | +12 | +17 | V | 12 | +-------------------+------------------------+------------+------------+-----------+--------+ 13 | | Output current | | +1V8 (pin 35) | 0 | | 200 | mA | 14 | | | | Low-speed | | | | | 15 | | | | expansion socket | | | | | 16 | +-------------------+------------------------+------------+------------+-----------+--------+ 17 | 18 | Power Consumption 19 | ================= 20 | 21 | The specifications below refer to the total power consumption of the mezzanine card 22 | and the carrier board combined. It is important to note that the use of the mezzanine 23 | will affect the power consumption of the SoC on the carrier board. This is due to the 24 | peripherals and IP that must be enabled on the SoC to interface with the 25 | Ethernet PHYs. Also note that the total power consumption is dependent on the ambient 26 | temperature and channel utilization. 27 | 28 | Ultra96-v1 29 | ---------- 30 | 31 | +-------------------+------------+-------------+------------+------------+-----------+--------+ 32 | | | SYS_DCIN | UTILIZATION | MIN | TYP | MAX | UNIT | 33 | +===================+============+=============+============+============+===========+========+ 34 | | Current draw | 16 VDC | 100% | | 510 | | mA | 35 | | +------------+-------------+------------+------------+-----------+--------+ 36 | | | 12 VDC | 100% | | 645 | | mA | 37 | | +------------+-------------+------------+------------+-----------+--------+ 38 | | | 8 VDC | 100% | | 935 | | mA | 39 | +-------------------+------------+-------------+------------+------------+-----------+--------+ 40 | 41 | * Tests performed at ambient temperature of 25 degrees C 42 | * Tests performed using IP in the FPGA to generate the Ethernet packets 43 | 44 | Ultra96-v2 45 | ---------- 46 | 47 | +-------------------+------------+-------------+------------+------------+-----------+--------+ 48 | | | SYS_DCIN | UTILIZATION | MIN | TYP | MAX | UNIT | 49 | +===================+============+=============+============+============+===========+========+ 50 | | Current draw | 16 VDC | 100% | | 550 | | mA | 51 | | +------------+-------------+------------+------------+-----------+--------+ 52 | | | 12 VDC | 100% | | 710 | | mA | 53 | | +------------+-------------+------------+------------+-----------+--------+ 54 | | | 8 VDC | 100% | | 1050 | | mA | 55 | +-------------------+------------+-------------+------------+------------+-----------+--------+ 56 | 57 | * Tests performed at ambient temperature of 25 degrees C 58 | * Tests performed using IP in the FPGA to generate the Ethernet packets 59 | 60 | Reset Timing 61 | ============ 62 | 63 | When hardware resetting the PHYs, we recommend using this timing: 64 | 65 | #. Hold the RESET_N signal LOW for 10ms 66 | #. Release the RESET_N signal (HIGH) and wait for 5ms 67 | 68 | 69 | MDIO Timing 70 | =========== 71 | 72 | * The maximum MDC frequency supported by the DP83867 PHY is 25MHz. 73 | 74 | DP83867 Electrical and Timing 75 | ============================= 76 | 77 | For electrical specs and timing related to the DP83867 signals listed below, please 78 | refer to the `DP83867 datasheet `_: 79 | 80 | * Reset 81 | * SGMII 82 | * GPIO0 and GPIO1 83 | * MDIO 84 | * Start-of-Frame detect 85 | 86 | Certifications 87 | ============== 88 | 89 | * RoHS 90 | * CE 91 | --------------------------------------------------------------------------------