├── code ├── owbc.creator ├── owbc.includes ├── owbc.config ├── common │ ├── common.mk │ ├── common.h │ ├── storage.h │ ├── link.ld │ ├── common.c │ ├── board.h │ ├── board.c │ ├── storage.c │ ├── stm32f30x_flash.h │ └── board_gpio.h ├── owbc.files ├── app │ ├── main.c │ ├── link.ld │ ├── mcuconf_community.h │ ├── halconf_community.h │ ├── Makefile │ ├── mcuconf.h │ ├── halconf.h │ └── chconf.h └── bootloader │ ├── main.c │ ├── link.ld │ ├── mcuconf_community.h │ ├── halconf_community.h │ ├── Makefile │ ├── mcuconf.h │ ├── halconf.h │ └── chconf.h ├── README.md ├── .gitmodules ├── board └── board.ioc └── LICENSE /code/owbc.creator: -------------------------------------------------------------------------------- 1 | [General] 2 | -------------------------------------------------------------------------------- /code/owbc.includes: -------------------------------------------------------------------------------- 1 | app 2 | bootloader 3 | common 4 | -------------------------------------------------------------------------------- /code/owbc.config: -------------------------------------------------------------------------------- 1 | // Add predefined macros for your project here. For example: 2 | // #define THE_ANSWER 42 3 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | View this project on [CADLAB.io](https://cadlab.io/node/809). 2 | 3 | # OWBC 4 | Open source/hardware LSU 4.9 wideband controller 5 | -------------------------------------------------------------------------------- /code/common/common.mk: -------------------------------------------------------------------------------- 1 | # List of all the board related files. 2 | BOARDSRC += ../common/common.c 3 | BOARDSRC += ../common/board.c 4 | BOARDSRC += ../common/stm32f30x_flash.c 5 | BOARDSRC += ../common/storage.c 6 | 7 | # Required include directories 8 | BOARDINC = ../common 9 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "code/ChibiOS-Contrib"] 2 | path = code/ChibiOS-Contrib 3 | url = https://github.com/ChibiOS/ChibiOS-Contrib.git 4 | [submodule "code/ChibiOS"] 5 | path = code/ChibiOS 6 | url = https://github.com/ChibiOS/ChibiOS.git 7 | branch = stable_16.1.x 8 | [submodule "code/uGFX"] 9 | path = code/uGFX 10 | url = https://git.ugfx.io/uGFX/uGFX.git 11 | branch = ugfx_release_2.7 12 | -------------------------------------------------------------------------------- /code/owbc.files: -------------------------------------------------------------------------------- 1 | app/link.ld 2 | bootloader/link.ld 3 | common/storage.h 4 | common/storage.c 5 | common/stm32f30x_flash.h 6 | common/stm32f30x_flash.c 7 | common/link.ld 8 | common/common.mk 9 | common/common.h 10 | common/common.c 11 | common/board.c 12 | common/board.h 13 | common/board_gpio.h 14 | bootloader/mcuconf.h 15 | bootloader/mcuconf_community.h 16 | bootloader/Makefile 17 | bootloader/main.c 18 | bootloader/halconf.h 19 | bootloader/halconf_community.h 20 | bootloader/chconf.h 21 | app/halconf_community.h 22 | app/mcuconf_community.h 23 | app/Makefile 24 | app/chconf.h 25 | app/halconf.h 26 | app/main.c 27 | app/mcuconf.h 28 | -------------------------------------------------------------------------------- /code/app/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | 3 | */ 4 | 5 | #include "ch.h" 6 | #include "hal.h" 7 | 8 | /* 9 | * Application entry point. 10 | */ 11 | int main(void) { 12 | 13 | /* 14 | * System initializations. 15 | * - HAL initialization, this also initializes the configured device drivers 16 | * and performs the board-specific initializations. 17 | * - Kernel initialization, the main() function becomes a thread and the 18 | * RTOS is active. 19 | */ 20 | halInit(); 21 | chSysInit(); 22 | 23 | /* 24 | * Normal main() thread activity, in this demo it does nothing. 25 | */ 26 | while (true) { 27 | chThdSleepMilliseconds(500); 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /code/bootloader/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | 3 | */ 4 | 5 | #include "ch.h" 6 | #include "hal.h" 7 | 8 | /* 9 | * Application entry point. 10 | */ 11 | int main(void) { 12 | 13 | /* 14 | * System initializations. 15 | * - HAL initialization, this also initializes the configured device drivers 16 | * and performs the board-specific initializations. 17 | * - Kernel initialization, the main() function becomes a thread and the 18 | * RTOS is active. 19 | */ 20 | halInit(); 21 | chSysInit(); 22 | 23 | /* 24 | * Normal main() thread activity, in this demo it does nothing. 25 | */ 26 | while (true) { 27 | chThdSleepMilliseconds(500); 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /code/common/common.h: -------------------------------------------------------------------------------- 1 | #ifndef COMMON_H 2 | #define COMMON_H 3 | 4 | #include "ch.h" 5 | #include "hal.h" 6 | #include 7 | 8 | #define CCM_FUNC __attribute__((section(".ram4_init.code"))) 9 | 10 | #ifdef SEMIHOSTING 11 | #define DEBUGEN(x) if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk) { x; } 12 | #else 13 | #define DEBUGEN(x) 14 | #endif 15 | 16 | #define DBG_STREAM ((BaseSequentialStream *)&SD1) 17 | #define MCU_UUID ((uint32_t*)0x1FFFF7AC) 18 | 19 | uint32_t getuuid32(void); 20 | uint16_t rand16(uint16_t min, uint16_t max); 21 | uint32_t rand32(uint32_t min, uint32_t max); 22 | uint32_t leToUInt32(uint8_t *ptr); 23 | uint16_t leToUInt16(uint8_t *ptr); 24 | uint32_t beToUInt32(uint8_t *ptr); 25 | uint16_t beToUInt16(uint8_t *ptr); 26 | uint8_t checksum(const uint8_t *data, uint8_t length); 27 | 28 | bool getSwitch1(void); 29 | int map(int x, int in_min, int in_max, int out_min, int out_max); 30 | 31 | 32 | #endif 33 | -------------------------------------------------------------------------------- /code/common/storage.h: -------------------------------------------------------------------------------- 1 | 2 | #ifndef _STORAGE_H_ 3 | #define _STORAGE_H_ 4 | 5 | #include "ch.h" 6 | #include "common.h" 7 | 8 | #define SETTINGS_START 0 9 | #define SETTINGS_END 999 10 | #define SETTINGS_LEN (SETTINGS_END-SETTINGS_START) 11 | #define VERSIONS_START 991 12 | #define VERSIONS_END 1023 13 | #define VERSIONS_LEN (VERSIONS_END-VERSIONS_START) 14 | 15 | #define VERSION_IDX_BL 0 16 | #define VERSION_IDX_APP 1 17 | 18 | extern uint32_t __user_settings_address__; 19 | #define SETTINGS_ADDR (__user_settings_address__ + SETTINGS_START) 20 | #define SETTINGS_PTR (uint32_t*)(SETTINGS_ADDR) 21 | #define VERSION_ADDR (__user_settings_address__ + VERSIONS_START) 22 | #define VERSION_PTR (uint32_t*)(VERSION_ADDR) 23 | 24 | typedef uint32_t crc_t; 25 | 26 | typedef struct { 27 | uint8_t api; 28 | uint8_t major; 29 | uint8_t minor; 30 | uint8_t patch; 31 | } version_t; 32 | 33 | /* 28 bytes data + 4 bytes crc */ 34 | typedef struct { 35 | uint32_t key; 36 | uint16_t cnt; 37 | version_t version; 38 | uint16_t functions; 39 | uint16_t canAddr; 40 | uint8_t outputMode; 41 | uint8_t refreshRate; 42 | uint8_t reserved[12]; 43 | crc_t crc; 44 | } settings_t; 45 | 46 | /* Public functions */ 47 | uint8_t readVersionFromFlash(uint8_t idx, version_t* dst); 48 | uint8_t writeVersionToFlash(uint8_t idx, const version_t* src); 49 | 50 | extern version_t versions[2]; 51 | extern settings_t settings; 52 | 53 | uint8_t readSettingsFromFlash(void); 54 | uint8_t writeSettingsToFlash(void); 55 | 56 | #endif 57 | -------------------------------------------------------------------------------- /code/app/link.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 3 | 2011,2012,2013 Giovanni Di Sirio. 4 | 5 | This file is part of ChibiOS/RT. 6 | 7 | ChibiOS/RT is free software; you can redistribute it and/or modify 8 | it under the terms of the GNU General Public License as published by 9 | the Free Software Foundation; either version 3 of the License, or 10 | (at your option) any later version. 11 | 12 | ChibiOS/RT is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | GNU General Public License for more details. 16 | 17 | You should have received a copy of the GNU General Public License 18 | along with this program. If not, see . 19 | */ 20 | 21 | /* 22 | * STM32F303xC memory setup. 23 | */ 24 | MEMORY 25 | { 26 | bflash : org = 0x08000000, len = 40k 27 | flash : org = 0x0800A000, len = 215k 28 | settings : org = 0x08009C00, len = 1k 29 | ram0 : org = 0x20000000, len = 40k 30 | ram1 : org = 0x00000000, len = 0 31 | ram2 : org = 0x00000000, len = 0 32 | ram3 : org = 0x00000000, len = 0 33 | ram4 : org = 0x10000000, len = 8k 34 | ram5 : org = 0x00000000, len = 0 35 | ram6 : org = 0x00000000, len = 0 36 | ram7 : org = 0x00000000, len = 0 37 | } 38 | 39 | __user_flash_address__ = ORIGIN(flash); 40 | __user_flash_length__ = LENGTH(flash); 41 | __user_settings_address__ = ORIGIN(settings); 42 | 43 | INCLUDE ../common/link.ld 44 | -------------------------------------------------------------------------------- /code/bootloader/link.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 3 | 2011,2012,2013 Giovanni Di Sirio. 4 | 5 | This file is part of ChibiOS/RT. 6 | 7 | ChibiOS/RT is free software; you can redistribute it and/or modify 8 | it under the terms of the GNU General Public License as published by 9 | the Free Software Foundation; either version 3 of the License, or 10 | (at your option) any later version. 11 | 12 | ChibiOS/RT is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | GNU General Public License for more details. 16 | 17 | You should have received a copy of the GNU General Public License 18 | along with this program. If not, see . 19 | */ 20 | 21 | /* 22 | * STM32F303xC memory setup. 23 | */ 24 | MEMORY 25 | { 26 | flash : org = 0x08000000, len = 40k 27 | uflash : org = 0x0800A000, len = 215k 28 | settings : org = 0x08009C00, len = 1k 29 | ram0 : org = 0x20000000, len = 40k 30 | ram1 : org = 0x00000000, len = 0 31 | ram2 : org = 0x00000000, len = 0 32 | ram3 : org = 0x00000000, len = 0 33 | ram4 : org = 0x10000000, len = 8k 34 | ram5 : org = 0x00000000, len = 0 35 | ram6 : org = 0x00000000, len = 0 36 | ram7 : org = 0x00000000, len = 0 37 | } 38 | 39 | __user_flash_address__ = ORIGIN(uflash); 40 | __user_flash_length__ = LENGTH(uflash); 41 | __user_settings_address__ = ORIGIN(settings); 42 | 43 | INCLUDE ../common/link.ld 44 | -------------------------------------------------------------------------------- /code/common/link.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, 3 | 2011,2012,2013 Giovanni Di Sirio. 4 | 5 | This file is part of ChibiOS/RT. 6 | 7 | ChibiOS/RT is free software; you can redistribute it and/or modify 8 | it under the terms of the GNU General Public License as published by 9 | the Free Software Foundation; either version 3 of the License, or 10 | (at your option) any later version. 11 | 12 | ChibiOS/RT is distributed in the hope that it will be useful, 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 | GNU General Public License for more details. 16 | 17 | You should have received a copy of the GNU General Public License 18 | along with this program. If not, see . 19 | */ 20 | 21 | __ram_start__ = ORIGIN(ram0); 22 | __ram_size__ = LENGTH(ram0); 23 | __ram_end__ = __ram_start__ + __ram_size__; 24 | 25 | __flash_page_size__ = 0x800; 26 | 27 | /* RAM region to be used for Main stack. This stack accommodates the processing 28 | of all exceptions and interrupts*/ 29 | REGION_ALIAS("MAIN_STACK_RAM", ram0); 30 | 31 | /* RAM region to be used for the process stack. This is the stack used by 32 | the main() function.*/ 33 | REGION_ALIAS("PROCESS_STACK_RAM", ram0); 34 | 35 | /* RAM region to be used for data segment.*/ 36 | REGION_ALIAS("DATA_RAM", ram0); 37 | 38 | /* RAM region to be used for BSS segment.*/ 39 | REGION_ALIAS("BSS_RAM", ram0); 40 | 41 | /* RAM region to be used for the default heap.*/ 42 | REGION_ALIAS("HEAP_RAM", ram0); 43 | 44 | INCLUDE rules.ld 45 | -------------------------------------------------------------------------------- /code/common/common.c: -------------------------------------------------------------------------------- 1 | 2 | #include "common.h" 3 | #include "string.h" 4 | #include "vectors.h" 5 | #include 6 | 7 | inline uint32_t getuuid32(void) { 8 | 9 | return MCU_UUID[0] * MCU_UUID[1] * MCU_UUID[2]; 10 | } 11 | 12 | uint16_t rand16(uint16_t min, uint16_t max) 13 | { 14 | uint16_t r; 15 | const uint16_t range = 1 + max - min; 16 | const uint16_t buckets = (RAND_MAX & 0xFFFF) / range; 17 | const uint16_t limit = buckets * range; 18 | 19 | /* Create equal size buckets all in a row, then fire randomly towards 20 | * the buckets until you land in one of them. All buckets are equally 21 | * likely. If you land off the end of the line of buckets, try again. */ 22 | do 23 | { 24 | r = (rand() & 0xFFFF); 25 | } while (r >= limit); 26 | 27 | return min + (r / buckets); 28 | } 29 | 30 | uint32_t rand32(uint32_t min, uint32_t max) 31 | { 32 | uint32_t r; 33 | const uint32_t range = 1 + max - min; 34 | const uint32_t buckets = RAND_MAX / range; 35 | const uint32_t limit = buckets * range; 36 | 37 | /* Create equal size buckets all in a row, then fire randomly towards 38 | * the buckets until you land in one of them. All buckets are equally 39 | * likely. If you land off the end of the line of buckets, try again. */ 40 | do 41 | { 42 | r = rand(); 43 | } while (r >= limit); 44 | 45 | return min + (r / buckets); 46 | } 47 | 48 | inline uint32_t leToUInt32(uint8_t *ptr) { 49 | 50 | return ((uint32_t)ptr[3] << 24) | 51 | ((uint32_t)ptr[2] << 16) | 52 | ((uint32_t)ptr[1] << 8) | 53 | (uint32_t)ptr[0]; 54 | } 55 | 56 | inline uint16_t leToUInt16(uint8_t *ptr) { 57 | 58 | return ((uint16_t)ptr[1] << 8) | (uint16_t)ptr[0]; 59 | } 60 | 61 | inline uint32_t beToUInt32(uint8_t *ptr) { 62 | 63 | return ((uint32_t)ptr[0] << 24) | 64 | ((uint32_t)ptr[1] << 16) | 65 | ((uint32_t)ptr[2] << 8) | 66 | (uint32_t)ptr[3]; 67 | } 68 | 69 | inline uint16_t beToUInt16(uint8_t *ptr) { 70 | 71 | return ((uint16_t)ptr[0] << 8) | (uint16_t)ptr[1]; 72 | } 73 | 74 | uint8_t checksum(const uint8_t *data, uint8_t length) 75 | { 76 | uint8_t i; 77 | uint8_t sum = 0; 78 | 79 | for (i = 0; i < length; i++) 80 | sum += data[i]; 81 | 82 | return sum; 83 | } 84 | 85 | inline bool getSwitch1(void) 86 | { 87 | return palReadPad(PORT_BUTTON1, PAD_BUTTON1) == PAL_LOW; 88 | } 89 | 90 | inline int map(int x, int in_min, int in_max, int out_min, int out_max) 91 | { 92 | return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min; 93 | } 94 | 95 | -------------------------------------------------------------------------------- /code/common/board.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _BOARD_H_ 18 | #define _BOARD_H_ 19 | 20 | /* 21 | * Setup for board. 22 | */ 23 | 24 | /* 25 | * Board identifier. 26 | */ 27 | #define BOARD_MOTOLINK_REV_B 28 | #define BOARD_NAME "Open Source Wideband Controller Revision A" 29 | 30 | /* 31 | * Board oscillators-related settings. 32 | * NOTE: LSE not fitted. 33 | */ 34 | #if !defined(STM32_LSECLK) 35 | #define STM32_LSECLK 0 36 | #endif 37 | 38 | #define STM32_LSEDRV (3 << 3) 39 | 40 | #if !defined(STM32_HSECLK) 41 | #define STM32_HSECLK 8000000 42 | #endif 43 | 44 | /* 45 | * MCU type as defined in the ST header. 46 | */ 47 | #define STM32F303xC 48 | #define STM32F30X //Fix 49 | 50 | /* 51 | * I/O ports initial setup, this configuration is established soon after reset 52 | * in the initialization code. 53 | * Please refer to the STM32 Reference Manual for details. 54 | */ 55 | #define PIN_MODE_INPUT(n) (0U << ((n) * 2)) 56 | #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) 57 | #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) 58 | #define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) 59 | #define PIN_ODR_LOW(n) (0U << (n)) 60 | #define PIN_ODR_HIGH(n) (1U << (n)) 61 | #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) 62 | #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) 63 | #define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2)) 64 | #define PIN_OSPEED_LOW(n) (1U << ((n) * 2)) 65 | #define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2)) 66 | #define PIN_OSPEED_HIGH(n) (3U << ((n) * 2)) 67 | #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2)) 68 | #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2)) 69 | #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2)) 70 | #define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) 71 | 72 | 73 | /* 74 | * IO pins assignments. 75 | */ 76 | #include "board_gpio.h" 77 | 78 | #if !defined(_FROM_ASM_) 79 | #ifdef __cplusplus 80 | extern "C" { 81 | #endif 82 | void boardInit(void); 83 | #ifdef __cplusplus 84 | } 85 | #endif 86 | #endif /* _FROM_ASM_ */ 87 | 88 | #endif /* _BOARD_H_ */ 89 | -------------------------------------------------------------------------------- /code/common/board.c: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #include "ch.h" 18 | #include "hal.h" 19 | #include "vectors.h" 20 | #include "common.h" 21 | #include 22 | 23 | extern void initialise_monitor_handles(void); 24 | 25 | #if defined(VECTORS_SECTION) 26 | typedef struct { 27 | uint32_t *init_stack; 28 | irq_vector_t reset_handler; 29 | } vectors_base_t; 30 | 31 | extern uint32_t __main_stack_end__; 32 | extern void Reset_Handler(void); 33 | 34 | __attribute__ ((used, aligned(128), section(".vectors"))) 35 | vectors_base_t _vectors_base = {&__main_stack_end__, Reset_Handler}; 36 | #endif 37 | 38 | #if HAL_USE_PAL || defined(__DOXYGEN__) 39 | /** 40 | * @brief PAL setup. 41 | * @details Digital I/O ports static configuration as defined in @p board.h. 42 | * This variable is used by the HAL when initializing the PAL driver. 43 | */ 44 | const PALConfig pal_default_config = 45 | { 46 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, 47 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, 48 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, 49 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, 50 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, 51 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, 52 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, 53 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, 54 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, 55 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, 56 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, 57 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH} 58 | }; 59 | #endif 60 | 61 | /** 62 | * @brief Early initialization code. 63 | * @details This initialization must be performed just after stack setup 64 | * and before any other initialization. 65 | */ 66 | void __early_init(void) { 67 | 68 | stm32_clock_init(); 69 | } 70 | 71 | /** 72 | * @brief Board-specific initialization code. 73 | * @todo Add your board-specific code, if any. 74 | */ 75 | void boardInit(void) { 76 | 77 | DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM2_STOP; 78 | DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_TIM3_STOP; 79 | DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_CAN_STOP; 80 | DBGMCU->APB2FZ |= DBGMCU_APB2_FZ_DBG_TIM1_STOP; 81 | 82 | DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_IWDG_STOP; 83 | DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_WWDG_STOP; 84 | 85 | DBGMCU->CR |= DBGMCU_CR_DBG_SLEEP; 86 | DBGMCU->CR |= DBGMCU_CR_DBG_STOP; 87 | 88 | /* Generate IRQ (PVD_IRQn) if VDD goes below 2.9v */ 89 | PWR->CR |= PWR_CR_PLS_LEV7; 90 | PWR->CR |= PWR_CR_PVDE; 91 | 92 | nvicEnableVector(PVD_IRQn, 0); /* Max priority */ 93 | srand(ch.tm.offset); 94 | } 95 | -------------------------------------------------------------------------------- /code/app/mcuconf_community.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /* 18 | * FSMC driver system settings. 19 | */ 20 | #define STM32_FSMC_USE_FSMC1 FALSE 21 | #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 22 | 23 | /* 24 | * FSMC NAND driver system settings. 25 | */ 26 | #define STM32_NAND_USE_FSMC_NAND1 FALSE 27 | #define STM32_NAND_USE_FSMC_NAND2 FALSE 28 | #define STM32_NAND_USE_EXT_INT FALSE 29 | #define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) 30 | #define STM32_NAND_DMA_PRIORITY 0 31 | #define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") 32 | 33 | /* 34 | * FSMC SRAM driver system settings. 35 | */ 36 | #define STM32_USE_FSMC_SRAM FALSE 37 | #define STM32_SRAM_USE_FSMC_SRAM1 FALSE 38 | #define STM32_SRAM_USE_FSMC_SRAM2 FALSE 39 | #define STM32_SRAM_USE_FSMC_SRAM3 FLASE 40 | #define STM32_SRAM_USE_FSMC_SRAM4 FALSE 41 | 42 | /* 43 | * FSMC PC card driver system settings. 44 | */ 45 | #define STM32_USE_FSMC_PCARD FALSE 46 | 47 | /* 48 | * FSMC SDRAM driver system settings. 49 | */ 50 | #define STM32_USE_FSMC_SDRAM FALSE 51 | 52 | /* 53 | * EICU driver system settings. 54 | */ 55 | #define STM32_EICU_USE_TIM1 FALSE 56 | #define STM32_EICU_USE_TIM2 FALSE 57 | #define STM32_EICU_USE_TIM3 FALSE 58 | #define STM32_EICU_USE_TIM4 FALSE 59 | #define STM32_EICU_USE_TIM5 FALSE 60 | #define STM32_EICU_USE_TIM8 FALSE 61 | #define STM32_EICU_USE_TIM9 FALSE 62 | #define STM32_EICU_USE_TIM10 FALSE 63 | #define STM32_EICU_USE_TIM11 FALSE 64 | #define STM32_EICU_USE_TIM12 FALSE 65 | #define STM32_EICU_USE_TIM13 FALSE 66 | #define STM32_EICU_USE_TIM14 FALSE 67 | #define STM32_EICU_TIM1_IRQ_PRIORITY 7 68 | #define STM32_EICU_TIM2_IRQ_PRIORITY 7 69 | #define STM32_EICU_TIM3_IRQ_PRIORITY 7 70 | #define STM32_EICU_TIM4_IRQ_PRIORITY 7 71 | #define STM32_EICU_TIM5_IRQ_PRIORITY 7 72 | #define STM32_EICU_TIM8_IRQ_PRIORITY 7 73 | #define STM32_EICU_TIM9_IRQ_PRIORITY 7 74 | #define STM32_EICU_TIM10_IRQ_PRIORITY 7 75 | #define STM32_EICU_TIM11_IRQ_PRIORITY 7 76 | #define STM32_EICU_TIM12_IRQ_PRIORITY 7 77 | #define STM32_EICU_TIM13_IRQ_PRIORITY 7 78 | #define STM32_EICU_TIM14_IRQ_PRIORITY 7 79 | 80 | /* 81 | * TIMCAP driver system settings. 82 | */ 83 | #define STM32_TIMCAP_USE_TIM1 FALSE 84 | #define STM32_TIMCAP_USE_TIM2 FALSE 85 | #define STM32_TIMCAP_USE_TIM3 FALSE 86 | #define STM32_TIMCAP_USE_TIM4 FALSE 87 | #define STM32_TIMCAP_USE_TIM5 FALSE 88 | #define STM32_TIMCAP_USE_TIM8 FALSE 89 | #define STM32_TIMCAP_USE_TIM9 FALSE 90 | #define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3 91 | #define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3 92 | #define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3 93 | #define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3 94 | #define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3 95 | #define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3 96 | #define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3 97 | 98 | /* 99 | * CRC driver system settings. 100 | */ 101 | #define STM32_CRC_USE_CRC1 TRUE 102 | #define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 5 103 | #define STM32_CRC_CRC1_DMA_PRIORITY 2 104 | #define STM32_CRC_CRC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) 105 | 106 | #define CRCSW_USE_CRC1 FALSE 107 | #define CRCSW_CRC32_TABLE TRUE 108 | #define CRCSW_CRC16_TABLE TRUE 109 | #define CRCSW_PROGRAMMABLE TRUE 110 | 111 | -------------------------------------------------------------------------------- /code/bootloader/mcuconf_community.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /* 18 | * FSMC driver system settings. 19 | */ 20 | #define STM32_FSMC_USE_FSMC1 FALSE 21 | #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 22 | 23 | /* 24 | * FSMC NAND driver system settings. 25 | */ 26 | #define STM32_NAND_USE_FSMC_NAND1 FALSE 27 | #define STM32_NAND_USE_FSMC_NAND2 FALSE 28 | #define STM32_NAND_USE_EXT_INT FALSE 29 | #define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) 30 | #define STM32_NAND_DMA_PRIORITY 0 31 | #define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") 32 | 33 | /* 34 | * FSMC SRAM driver system settings. 35 | */ 36 | #define STM32_USE_FSMC_SRAM FALSE 37 | #define STM32_SRAM_USE_FSMC_SRAM1 FALSE 38 | #define STM32_SRAM_USE_FSMC_SRAM2 FALSE 39 | #define STM32_SRAM_USE_FSMC_SRAM3 FLASE 40 | #define STM32_SRAM_USE_FSMC_SRAM4 FALSE 41 | 42 | /* 43 | * FSMC PC card driver system settings. 44 | */ 45 | #define STM32_USE_FSMC_PCARD FALSE 46 | 47 | /* 48 | * FSMC SDRAM driver system settings. 49 | */ 50 | #define STM32_USE_FSMC_SDRAM FALSE 51 | 52 | /* 53 | * EICU driver system settings. 54 | */ 55 | #define STM32_EICU_USE_TIM1 FALSE 56 | #define STM32_EICU_USE_TIM2 FALSE 57 | #define STM32_EICU_USE_TIM3 FALSE 58 | #define STM32_EICU_USE_TIM4 FALSE 59 | #define STM32_EICU_USE_TIM5 FALSE 60 | #define STM32_EICU_USE_TIM8 FALSE 61 | #define STM32_EICU_USE_TIM9 FALSE 62 | #define STM32_EICU_USE_TIM10 FALSE 63 | #define STM32_EICU_USE_TIM11 FALSE 64 | #define STM32_EICU_USE_TIM12 FALSE 65 | #define STM32_EICU_USE_TIM13 FALSE 66 | #define STM32_EICU_USE_TIM14 FALSE 67 | #define STM32_EICU_TIM1_IRQ_PRIORITY 7 68 | #define STM32_EICU_TIM2_IRQ_PRIORITY 7 69 | #define STM32_EICU_TIM3_IRQ_PRIORITY 7 70 | #define STM32_EICU_TIM4_IRQ_PRIORITY 7 71 | #define STM32_EICU_TIM5_IRQ_PRIORITY 7 72 | #define STM32_EICU_TIM8_IRQ_PRIORITY 7 73 | #define STM32_EICU_TIM9_IRQ_PRIORITY 7 74 | #define STM32_EICU_TIM10_IRQ_PRIORITY 7 75 | #define STM32_EICU_TIM11_IRQ_PRIORITY 7 76 | #define STM32_EICU_TIM12_IRQ_PRIORITY 7 77 | #define STM32_EICU_TIM13_IRQ_PRIORITY 7 78 | #define STM32_EICU_TIM14_IRQ_PRIORITY 7 79 | 80 | /* 81 | * TIMCAP driver system settings. 82 | */ 83 | #define STM32_TIMCAP_USE_TIM1 FALSE 84 | #define STM32_TIMCAP_USE_TIM2 FALSE 85 | #define STM32_TIMCAP_USE_TIM3 FALSE 86 | #define STM32_TIMCAP_USE_TIM4 FALSE 87 | #define STM32_TIMCAP_USE_TIM5 FALSE 88 | #define STM32_TIMCAP_USE_TIM8 FALSE 89 | #define STM32_TIMCAP_USE_TIM9 FALSE 90 | #define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3 91 | #define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3 92 | #define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3 93 | #define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3 94 | #define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3 95 | #define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3 96 | #define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3 97 | 98 | /* 99 | * CRC driver system settings. 100 | */ 101 | #define STM32_CRC_USE_CRC1 TRUE 102 | #define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 5 103 | #define STM32_CRC_CRC1_DMA_PRIORITY 2 104 | #define STM32_CRC_CRC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) 105 | 106 | #define CRCSW_USE_CRC1 FALSE 107 | #define CRCSW_CRC32_TABLE TRUE 108 | #define CRCSW_CRC16_TABLE TRUE 109 | #define CRCSW_PROGRAMMABLE TRUE 110 | 111 | -------------------------------------------------------------------------------- /code/app/halconf_community.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _HALCONF_COMMUNITY_H_ 18 | #define _HALCONF_COMMUNITY_H_ 19 | 20 | /** 21 | * @brief Enables the community overlay. 22 | */ 23 | #if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) 24 | #define HAL_USE_COMMUNITY TRUE 25 | #endif 26 | 27 | /** 28 | * @brief Enables the FSMC subsystem. 29 | */ 30 | #if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) 31 | #define HAL_USE_FSMC FALSE 32 | #endif 33 | 34 | /** 35 | * @brief Enables the NAND subsystem. 36 | */ 37 | #if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) 38 | #define HAL_USE_NAND FALSE 39 | #endif 40 | 41 | /** 42 | * @brief Enables the 1-wire subsystem. 43 | */ 44 | #if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) 45 | #define HAL_USE_ONEWIRE FALSE 46 | #endif 47 | 48 | /** 49 | * @brief Enables the EICU subsystem. 50 | */ 51 | #if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) 52 | #define HAL_USE_EICU FALSE 53 | #endif 54 | 55 | /** 56 | * @brief Enables the CRC subsystem. 57 | */ 58 | #if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) 59 | #define HAL_USE_CRC TRUE 60 | #endif 61 | 62 | /** 63 | * @brief Enables the USBH subsystem. 64 | */ 65 | #if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) 66 | #define HAL_USE_USBH FALSE 67 | #endif 68 | 69 | /** 70 | * @brief Enables the EEPROM subsystem. 71 | */ 72 | #if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) 73 | #define HAL_USE_EEPROM FALSE 74 | #endif 75 | 76 | /** 77 | * @brief Enables the TIMCAP subsystem. 78 | */ 79 | #if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) 80 | #define HAL_USE_TIMCAP FALSE 81 | #endif 82 | 83 | /*===========================================================================*/ 84 | /* FSMCNAND driver related settings. */ 85 | /*===========================================================================*/ 86 | 87 | /** 88 | * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. 89 | * @note Disabling this option saves both code and data space. 90 | */ 91 | #if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 92 | #define NAND_USE_MUTUAL_EXCLUSION TRUE 93 | #endif 94 | 95 | /*===========================================================================*/ 96 | /* 1-wire driver related settings. */ 97 | /*===========================================================================*/ 98 | /** 99 | * @brief Enables strong pull up feature. 100 | * @note Disabling this option saves both code and data space. 101 | */ 102 | #define ONEWIRE_USE_STRONG_PULLUP FALSE 103 | 104 | /** 105 | * @brief Enables search ROM feature. 106 | * @note Disabling this option saves both code and data space. 107 | */ 108 | #define ONEWIRE_USE_SEARCH_ROM FALSE 109 | 110 | 111 | /*===========================================================================*/ 112 | /* EEProm driver related settings. */ 113 | /*===========================================================================*/ 114 | 115 | #define EEPROM_USE_EE24XX FALSE 116 | #define EEPROM_USE_EE25XX TRUE 117 | 118 | /*===========================================================================*/ 119 | /* CRC driver settings. */ 120 | /*===========================================================================*/ 121 | 122 | #define rccEnableCRC(lp) rccEnableAHB(RCC_AHBENR_CRCEN, lp) 123 | #define rccDisableCRC(lp) rccDisableAHB(RCC_AHBENR_CRCEN, lp) 124 | 125 | /** 126 | * @brief Enables DMA engine when performing CRC transactions. 127 | * @note Enabling this option also enables asynchronous API. 128 | */ 129 | #if !defined(CRC_USE_DMA) || defined(__DOXYGEN__) 130 | #define CRC_USE_DMA FALSE 131 | #endif 132 | 133 | /** 134 | * @brief Enables the @p crcAcquireUnit() and @p crcReleaseUnit() APIs. 135 | * @note Disabling this option saves both code and data space. 136 | */ 137 | #if !defined(CRC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 138 | #define CRC_USE_MUTUAL_EXCLUSION TRUE 139 | #endif 140 | 141 | 142 | #endif /* _HALCONF_COMMUNITY_H_ */ 143 | 144 | /** @} */ 145 | -------------------------------------------------------------------------------- /code/bootloader/halconf_community.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _HALCONF_COMMUNITY_H_ 18 | #define _HALCONF_COMMUNITY_H_ 19 | 20 | /** 21 | * @brief Enables the community overlay. 22 | */ 23 | #if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) 24 | #define HAL_USE_COMMUNITY TRUE 25 | #endif 26 | 27 | /** 28 | * @brief Enables the FSMC subsystem. 29 | */ 30 | #if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) 31 | #define HAL_USE_FSMC FALSE 32 | #endif 33 | 34 | /** 35 | * @brief Enables the NAND subsystem. 36 | */ 37 | #if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) 38 | #define HAL_USE_NAND FALSE 39 | #endif 40 | 41 | /** 42 | * @brief Enables the 1-wire subsystem. 43 | */ 44 | #if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) 45 | #define HAL_USE_ONEWIRE FALSE 46 | #endif 47 | 48 | /** 49 | * @brief Enables the EICU subsystem. 50 | */ 51 | #if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) 52 | #define HAL_USE_EICU FALSE 53 | #endif 54 | 55 | /** 56 | * @brief Enables the CRC subsystem. 57 | */ 58 | #if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) 59 | #define HAL_USE_CRC TRUE 60 | #endif 61 | 62 | /** 63 | * @brief Enables the USBH subsystem. 64 | */ 65 | #if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) 66 | #define HAL_USE_USBH FALSE 67 | #endif 68 | 69 | /** 70 | * @brief Enables the EEPROM subsystem. 71 | */ 72 | #if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) 73 | #define HAL_USE_EEPROM FALSE 74 | #endif 75 | 76 | /** 77 | * @brief Enables the TIMCAP subsystem. 78 | */ 79 | #if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) 80 | #define HAL_USE_TIMCAP FALSE 81 | #endif 82 | 83 | /*===========================================================================*/ 84 | /* FSMCNAND driver related settings. */ 85 | /*===========================================================================*/ 86 | 87 | /** 88 | * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. 89 | * @note Disabling this option saves both code and data space. 90 | */ 91 | #if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 92 | #define NAND_USE_MUTUAL_EXCLUSION TRUE 93 | #endif 94 | 95 | /*===========================================================================*/ 96 | /* 1-wire driver related settings. */ 97 | /*===========================================================================*/ 98 | /** 99 | * @brief Enables strong pull up feature. 100 | * @note Disabling this option saves both code and data space. 101 | */ 102 | #define ONEWIRE_USE_STRONG_PULLUP FALSE 103 | 104 | /** 105 | * @brief Enables search ROM feature. 106 | * @note Disabling this option saves both code and data space. 107 | */ 108 | #define ONEWIRE_USE_SEARCH_ROM FALSE 109 | 110 | 111 | /*===========================================================================*/ 112 | /* EEProm driver related settings. */ 113 | /*===========================================================================*/ 114 | 115 | #define EEPROM_USE_EE24XX FALSE 116 | #define EEPROM_USE_EE25XX TRUE 117 | 118 | /*===========================================================================*/ 119 | /* CRC driver settings. */ 120 | /*===========================================================================*/ 121 | 122 | #define rccEnableCRC(lp) rccEnableAHB(RCC_AHBENR_CRCEN, lp) 123 | #define rccDisableCRC(lp) rccDisableAHB(RCC_AHBENR_CRCEN, lp) 124 | 125 | /** 126 | * @brief Enables DMA engine when performing CRC transactions. 127 | * @note Enabling this option also enables asynchronous API. 128 | */ 129 | #if !defined(CRC_USE_DMA) || defined(__DOXYGEN__) 130 | #define CRC_USE_DMA FALSE 131 | #endif 132 | 133 | /** 134 | * @brief Enables the @p crcAcquireUnit() and @p crcReleaseUnit() APIs. 135 | * @note Disabling this option saves both code and data space. 136 | */ 137 | #if !defined(CRC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 138 | #define CRC_USE_MUTUAL_EXCLUSION TRUE 139 | #endif 140 | 141 | 142 | #endif /* _HALCONF_COMMUNITY_H_ */ 143 | 144 | /** @} */ 145 | -------------------------------------------------------------------------------- /code/common/storage.c: -------------------------------------------------------------------------------- 1 | #include "storage.h" 2 | #include "stm32f30x_flash.h" 3 | #include 4 | 5 | static const uint32_t magic_key = 0xABEF1289; 6 | static settings_t settings_buf; 7 | 8 | // Default settings 9 | settings_t settings = {}; 10 | 11 | #if defined(MODE_APP) 12 | version_t versions[2] = {{0, 0, 0, 0}, 13 | {VERSION_API, VERSION_MAJOR, VERSION_MINOR, VERSION_PATCH}}; 14 | #else 15 | version_t versions[2] = {{VERSION_API, VERSION_MAJOR, VERSION_MINOR, VERSION_PATCH}, 16 | {0, 0, 0, 0}}; 17 | #endif 18 | 19 | 20 | static const CRCConfig crc32_config = { 21 | .poly_size = 32, 22 | .poly = 0x04C11DB7, 23 | .initial_val = 0xFFFFFFFF, 24 | .final_val = 0xFFFFFFFF, 25 | .reflect_data = 1, 26 | .reflect_remainder = 1 27 | }; 28 | 29 | CCM_FUNC static crc_t getCrc(const CRCConfig *config, uint8_t *data, uint16_t len) 30 | { 31 | crc_t crc; 32 | 33 | crcAcquireUnit(&CRCD1); /* Acquire ownership of the bus. */ 34 | crcStart(&CRCD1, config); /* Activate CRC driver */ 35 | crcReset(&CRCD1); 36 | crc = crcCalc(&CRCD1, len, data); 37 | crcStop(&CRCD1); /* Deactive CRC driver); */ 38 | crcReleaseUnit(&CRCD1); /* Acquire ownership of the bus. */ 39 | 40 | return crc; 41 | } 42 | 43 | CCM_FUNC static uint32_t findCurrentPageAddr(void) 44 | { 45 | uint32_t addr; 46 | const uint32_t from = SETTINGS_ADDR; 47 | const uint32_t to = from + SETTINGS_LEN; 48 | settings_t * st; 49 | 50 | // Find highest counter 51 | for (addr = from; addr < to; addr += sizeof(settings_t)) 52 | { 53 | 54 | st = (settings_t*)addr; 55 | if (st->key != magic_key) 56 | { 57 | // Return last good 'page' 58 | return addr - sizeof(settings_t); 59 | } 60 | } 61 | 62 | return from; 63 | } 64 | 65 | CCM_FUNC static uint32_t findNextPageAddr(void) 66 | { 67 | uint32_t addr = findCurrentPageAddr(); 68 | 69 | /* Check if at last page */ 70 | if(addr >= SETTINGS_ADDR + SETTINGS_LEN - sizeof(settings_t)) 71 | { 72 | addr = SETTINGS_ADDR; 73 | } 74 | else 75 | { 76 | addr += sizeof(settings_t); 77 | } 78 | 79 | return addr; 80 | } 81 | 82 | CCM_FUNC static uint32_t findPrevPageAddr(void) 83 | { 84 | uint32_t addr = findCurrentPageAddr(); 85 | 86 | /* Check if at first page */ 87 | if(addr == SETTINGS_ADDR) 88 | { 89 | addr = SETTINGS_ADDR + SETTINGS_LEN; 90 | } 91 | addr -= sizeof(settings_t); 92 | 93 | return addr; 94 | } 95 | 96 | CCM_FUNC static uint8_t readFlash(int32_t addr, uint8_t *buffer, crc_t *crc, uint32_t len) 97 | { 98 | // Check min length 99 | if (len < 8) 100 | return 1; 101 | 102 | *crc = getCrc(&crc32_config, (uint8_t *)addr, len - 4); // Minus crc itself 103 | memcpy(buffer, (uint8_t *)addr, len); 104 | 105 | return 0; 106 | } 107 | 108 | CCM_FUNC static uint8_t writeFlash(int32_t addr, uint8_t *buffer, crc_t *crc, uint32_t len) 109 | { 110 | // Check min length 111 | if (len < 8) 112 | return 1; 113 | 114 | uint8_t i; 115 | *crc = getCrc(&crc32_config, (uint8_t*)buffer, len - 4); // Minus crc itself 116 | 117 | FLASH_Unlock(); 118 | if (addr == SETTINGS_START) { 119 | FLASH_ErasePage(SETTINGS_START); 120 | } 121 | for (i = 0; i < len - 4; i += 2) { 122 | 123 | if (FLASH_ProgramHalfWord(addr, *((uint32_t*)(buffer + i))) != FLASH_COMPLETE) 124 | { 125 | FLASH_Lock(); 126 | return 2; 127 | } 128 | addr += 2; 129 | } 130 | FLASH_ProgramWord(addr + 4, *crc); 131 | FLASH_Lock(); 132 | return 0; 133 | } 134 | 135 | CCM_FUNC uint8_t readSettingsFromFlash(void) 136 | { 137 | crc_t crc1; 138 | size_t len = sizeof(settings_t); 139 | 140 | if (readFlash(findCurrentPageAddr(), (uint8_t*)&settings_buf, &crc1, len) != 0) 141 | return 1; 142 | 143 | if (crc1 != settings_buf.crc) 144 | { 145 | // Try previous page 146 | if (readFlash(findPrevPageAddr(), (uint8_t*)&settings_buf, &crc1, len) != 0) 147 | return 2; 148 | if (crc1 != settings_buf.crc) 149 | return 3; 150 | } 151 | 152 | if (settings_buf.key != magic_key) 153 | return 4; 154 | 155 | memcpy(&settings, &settings_buf, sizeof(settings_buf)); 156 | 157 | return 0; 158 | } 159 | 160 | CCM_FUNC uint8_t writeSettingsToFlash(void) 161 | { 162 | crc_t crc1, crc2; 163 | uint8_t res1, res2; 164 | size_t len = sizeof(settings_buf); 165 | memcpy(&settings_buf, &settings, sizeof(settings_buf)); 166 | 167 | settings_buf.key = magic_key; 168 | settings_buf.cnt++; 169 | 170 | res1 = writeFlash(findNextPageAddr(), (uint8_t*)&settings_buf, &crc1, len); 171 | res2 = readFlash(findCurrentPageAddr(), (uint8_t*)&settings_buf, &crc2, len); 172 | 173 | // return 0 if write, read and crc comparison are successful 174 | if (res1 == 0 && res2 == 0 && crc1 == crc2) 175 | return 0; 176 | 177 | return 1; 178 | } 179 | 180 | CCM_FUNC uint8_t readVersionFromFlash(uint8_t idx, version_t* dst) 181 | { 182 | const size_t len = sizeof(version_t); 183 | memcpy(dst, VERSION_PTR + (idx * len), len); 184 | 185 | return 0; 186 | } 187 | 188 | CCM_FUNC uint8_t writeVersionToFlash(uint8_t idx, const version_t* src) 189 | { 190 | const size_t len = sizeof(version_t); 191 | uint32_t ver_buf; 192 | 193 | /* Copy to buffer */ 194 | memcpy(&ver_buf, src + (idx * len), len); 195 | 196 | /* Unlock flash */ 197 | FLASH_Unlock(); 198 | 199 | /* Erase page and Write - We will loose settings */ 200 | FLASH_ErasePage(SETTINGS_ADDR); 201 | FLASH_ProgramWord(VERSION_ADDR, ver_buf); 202 | 203 | /* Lock flash */ 204 | FLASH_Lock(); 205 | 206 | return 0; 207 | } 208 | -------------------------------------------------------------------------------- /code/app/Makefile: -------------------------------------------------------------------------------- 1 | ############################################################################## 2 | # Build global options 3 | # NOTE: Can be overridden externally. 4 | # 5 | 6 | # Compiler options here. 7 | ifeq ($(USE_OPT),) 8 | USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 9 | endif 10 | 11 | # C specific options here (added to USE_OPT). 12 | ifeq ($(USE_COPT),) 13 | USE_COPT = 14 | endif 15 | 16 | # C++ specific options here (added to USE_OPT). 17 | ifeq ($(USE_CPPOPT),) 18 | USE_CPPOPT = -fno-rtti 19 | endif 20 | 21 | # Enable this if you want the linker to remove unused code and data 22 | ifeq ($(USE_LINK_GC),) 23 | USE_LINK_GC = yes 24 | endif 25 | 26 | # Linker extra options here. 27 | ifeq ($(USE_LDOPT),) 28 | USE_LDOPT = 29 | endif 30 | 31 | # Enable this if you want link time optimizations (LTO) 32 | ifeq ($(USE_LTO),) 33 | USE_LTO = no 34 | endif 35 | 36 | # If enabled, this option allows to compile the application in THUMB mode. 37 | ifeq ($(USE_THUMB),) 38 | USE_THUMB = yes 39 | endif 40 | 41 | # Enable this if you want to see the full log while compiling. 42 | ifeq ($(USE_VERBOSE_COMPILE),) 43 | USE_VERBOSE_COMPILE = no 44 | endif 45 | 46 | # If enabled, this option makes the build process faster by not compiling 47 | # modules not used in the current configuration. 48 | ifeq ($(USE_SMART_BUILD),) 49 | USE_SMART_BUILD = yes 50 | endif 51 | 52 | # 53 | # Build global options 54 | ############################################################################## 55 | 56 | ############################################################################## 57 | # Architecture or project specific options 58 | # 59 | 60 | # Stack size to be allocated to the Cortex-M process stack. This stack is 61 | # the stack used by the main() thread. 62 | ifeq ($(USE_PROCESS_STACKSIZE),) 63 | USE_PROCESS_STACKSIZE = 0x400 64 | endif 65 | 66 | # Stack size to the allocated to the Cortex-M main/exceptions stack. This 67 | # stack is used for processing interrupts and exceptions. 68 | ifeq ($(USE_EXCEPTIONS_STACKSIZE),) 69 | USE_EXCEPTIONS_STACKSIZE = 0x400 70 | endif 71 | 72 | # Enables the use of FPU on Cortex-M4 (no, softfp, hard). 73 | ifeq ($(USE_FPU),) 74 | USE_FPU = hard 75 | endif 76 | 77 | # 78 | # Architecture or project specific options 79 | ############################################################################## 80 | 81 | ############################################################################## 82 | # Project, sources and paths 83 | # 84 | 85 | # Define project name here 86 | PROJECT = owbc 87 | 88 | # Imported source files and paths 89 | CHIBIOS = ../ChibiOS 90 | CHIBIOS_CONTRIB = ../ChibiOS-Contrib 91 | # Startup files. 92 | include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk 93 | # HAL-OSAL files (optional). 94 | include $(CHIBIOS_CONTRIB)/os/hal/hal.mk 95 | include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk 96 | include $(CHIBIOS)/os/hal/osal/rt/osal.mk 97 | # RTOS files (optional). 98 | include $(CHIBIOS)/os/rt/rt.mk 99 | include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk 100 | # Other files (optional). 101 | include ../common/common.mk 102 | 103 | # Define linker script file here 104 | LDSCRIPT= link.ld 105 | 106 | # C sources that can be compiled in ARM or THUMB mode depending on the global 107 | # setting. 108 | CSRC = $(STARTUPSRC) \ 109 | $(KERNSRC) \ 110 | $(PORTSRC) \ 111 | $(OSALSRC) \ 112 | $(HALSRC) \ 113 | $(PLATFORMSRC) \ 114 | $(BOARDSRC) \ 115 | $(CHIBIOS_CONTRIB)/os/various/crcsw.c \ 116 | main.c 117 | 118 | # C++ sources that can be compiled in ARM or THUMB mode depending on the global 119 | # setting. 120 | CPPSRC = 121 | 122 | # C sources to be compiled in ARM mode regardless of the global setting. 123 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 124 | # option that results in lower performance and larger code size. 125 | ACSRC = 126 | 127 | # C++ sources to be compiled in ARM mode regardless of the global setting. 128 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 129 | # option that results in lower performance and larger code size. 130 | ACPPSRC = 131 | 132 | # C sources to be compiled in THUMB mode regardless of the global setting. 133 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 134 | # option that results in lower performance and larger code size. 135 | TCSRC = 136 | 137 | # C sources to be compiled in THUMB mode regardless of the global setting. 138 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 139 | # option that results in lower performance and larger code size. 140 | TCPPSRC = 141 | 142 | # List ASM source files here 143 | ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) 144 | 145 | INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ 146 | $(HALINC) $(PLATFORMINC) $(BOARDINC) \ 147 | $(CHIBIOS)/os/various \ 148 | $(CHIBIOS_CONTRIB)/os/various 149 | 150 | # 151 | # Project, sources and paths 152 | ############################################################################## 153 | 154 | ############################################################################## 155 | # Compiler settings 156 | # 157 | 158 | MCU = cortex-m4 159 | 160 | #TRGT = arm-elf- 161 | TRGT = arm-none-eabi- 162 | CC = $(TRGT)gcc 163 | CPPC = $(TRGT)g++ 164 | # Enable loading with g++ only if you need C++ runtime support. 165 | # NOTE: You can use C++ even without C++ support if you are careful. C++ 166 | # runtime support makes code size explode. 167 | LD = $(TRGT)gcc 168 | #LD = $(TRGT)g++ 169 | CP = $(TRGT)objcopy 170 | AS = $(TRGT)gcc -x assembler-with-cpp 171 | AR = $(TRGT)ar 172 | OD = $(TRGT)objdump 173 | SZ = $(TRGT)size 174 | HEX = $(CP) -O ihex 175 | BIN = $(CP) -O binary 176 | 177 | # ARM-specific options here 178 | AOPT = 179 | 180 | # THUMB-specific options here 181 | TOPT = -mthumb -DTHUMB 182 | 183 | # Define C warning options here 184 | CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes 185 | 186 | # Define C++ warning options here 187 | CPPWARN = -Wall -Wextra -Wundef 188 | 189 | # 190 | # Compiler settings 191 | ############################################################################## 192 | 193 | ############################################################################## 194 | # Start of user section 195 | # 196 | 197 | # List all user C define here, like -D_DEBUG=1 198 | UDEFS = -DMODE_APP 199 | 200 | # Define ASM defines here 201 | UADEFS = 202 | 203 | # List all user directories here 204 | UINCDIR = 205 | 206 | # List the user directory to look for the libraries here 207 | ULIBDIR = 208 | 209 | # List all user libraries here 210 | ULIBS = 211 | 212 | # 213 | # End of user defines 214 | ############################################################################## 215 | 216 | RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC 217 | include $(RULESPATH)/rules.mk 218 | -------------------------------------------------------------------------------- /code/bootloader/Makefile: -------------------------------------------------------------------------------- 1 | ############################################################################## 2 | # Build global options 3 | # NOTE: Can be overridden externally. 4 | # 5 | 6 | # Compiler options here. 7 | ifeq ($(USE_OPT),) 8 | USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 9 | endif 10 | 11 | # C specific options here (added to USE_OPT). 12 | ifeq ($(USE_COPT),) 13 | USE_COPT = 14 | endif 15 | 16 | # C++ specific options here (added to USE_OPT). 17 | ifeq ($(USE_CPPOPT),) 18 | USE_CPPOPT = -fno-rtti 19 | endif 20 | 21 | # Enable this if you want the linker to remove unused code and data 22 | ifeq ($(USE_LINK_GC),) 23 | USE_LINK_GC = yes 24 | endif 25 | 26 | # Linker extra options here. 27 | ifeq ($(USE_LDOPT),) 28 | USE_LDOPT = 29 | endif 30 | 31 | # Enable this if you want link time optimizations (LTO) 32 | ifeq ($(USE_LTO),) 33 | USE_LTO = no 34 | endif 35 | 36 | # If enabled, this option allows to compile the application in THUMB mode. 37 | ifeq ($(USE_THUMB),) 38 | USE_THUMB = yes 39 | endif 40 | 41 | # Enable this if you want to see the full log while compiling. 42 | ifeq ($(USE_VERBOSE_COMPILE),) 43 | USE_VERBOSE_COMPILE = no 44 | endif 45 | 46 | # If enabled, this option makes the build process faster by not compiling 47 | # modules not used in the current configuration. 48 | ifeq ($(USE_SMART_BUILD),) 49 | USE_SMART_BUILD = yes 50 | endif 51 | 52 | # 53 | # Build global options 54 | ############################################################################## 55 | 56 | ############################################################################## 57 | # Architecture or project specific options 58 | # 59 | 60 | # Stack size to be allocated to the Cortex-M process stack. This stack is 61 | # the stack used by the main() thread. 62 | ifeq ($(USE_PROCESS_STACKSIZE),) 63 | USE_PROCESS_STACKSIZE = 0x400 64 | endif 65 | 66 | # Stack size to the allocated to the Cortex-M main/exceptions stack. This 67 | # stack is used for processing interrupts and exceptions. 68 | ifeq ($(USE_EXCEPTIONS_STACKSIZE),) 69 | USE_EXCEPTIONS_STACKSIZE = 0x400 70 | endif 71 | 72 | # Enables the use of FPU on Cortex-M4 (no, softfp, hard). 73 | ifeq ($(USE_FPU),) 74 | USE_FPU = hard 75 | endif 76 | 77 | # 78 | # Architecture or project specific options 79 | ############################################################################## 80 | 81 | ############################################################################## 82 | # Project, sources and paths 83 | # 84 | 85 | # Define project name here 86 | PROJECT = bootloader 87 | 88 | # Imported source files and paths 89 | CHIBIOS = ../ChibiOS 90 | CHIBIOS_CONTRIB = ../ChibiOS-Contrib 91 | # Startup files. 92 | include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk 93 | # HAL-OSAL files (optional). 94 | include $(CHIBIOS_CONTRIB)/os/hal/hal.mk 95 | include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk 96 | include $(CHIBIOS)/os/hal/osal/rt/osal.mk 97 | # RTOS files (optional). 98 | include $(CHIBIOS)/os/rt/rt.mk 99 | include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk 100 | # Other files (optional). 101 | include ../common/common.mk 102 | 103 | # Define linker script file here 104 | LDSCRIPT= link.ld 105 | 106 | # C sources that can be compiled in ARM or THUMB mode depending on the global 107 | # setting. 108 | CSRC = $(STARTUPSRC) \ 109 | $(KERNSRC) \ 110 | $(PORTSRC) \ 111 | $(OSALSRC) \ 112 | $(HALSRC) \ 113 | $(PLATFORMSRC) \ 114 | $(BOARDSRC) \ 115 | $(CHIBIOS_CONTRIB)/os/various/crcsw.c \ 116 | main.c 117 | 118 | # C++ sources that can be compiled in ARM or THUMB mode depending on the global 119 | # setting. 120 | CPPSRC = 121 | 122 | # C sources to be compiled in ARM mode regardless of the global setting. 123 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 124 | # option that results in lower performance and larger code size. 125 | ACSRC = 126 | 127 | # C++ sources to be compiled in ARM mode regardless of the global setting. 128 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 129 | # option that results in lower performance and larger code size. 130 | ACPPSRC = 131 | 132 | # C sources to be compiled in THUMB mode regardless of the global setting. 133 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 134 | # option that results in lower performance and larger code size. 135 | TCSRC = 136 | 137 | # C sources to be compiled in THUMB mode regardless of the global setting. 138 | # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler 139 | # option that results in lower performance and larger code size. 140 | TCPPSRC = 141 | 142 | # List ASM source files here 143 | ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) 144 | 145 | INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ 146 | $(HALINC) $(PLATFORMINC) $(BOARDINC) \ 147 | $(CHIBIOS)/os/various \ 148 | $(CHIBIOS_CONTRIB)/os/various 149 | 150 | # 151 | # Project, sources and paths 152 | ############################################################################## 153 | 154 | ############################################################################## 155 | # Compiler settings 156 | # 157 | 158 | MCU = cortex-m4 159 | 160 | #TRGT = arm-elf- 161 | TRGT = arm-none-eabi- 162 | CC = $(TRGT)gcc 163 | CPPC = $(TRGT)g++ 164 | # Enable loading with g++ only if you need C++ runtime support. 165 | # NOTE: You can use C++ even without C++ support if you are careful. C++ 166 | # runtime support makes code size explode. 167 | LD = $(TRGT)gcc 168 | #LD = $(TRGT)g++ 169 | CP = $(TRGT)objcopy 170 | AS = $(TRGT)gcc -x assembler-with-cpp 171 | AR = $(TRGT)ar 172 | OD = $(TRGT)objdump 173 | SZ = $(TRGT)size 174 | HEX = $(CP) -O ihex 175 | BIN = $(CP) -O binary 176 | 177 | # ARM-specific options here 178 | AOPT = 179 | 180 | # THUMB-specific options here 181 | TOPT = -mthumb -DTHUMB 182 | 183 | # Define C warning options here 184 | CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes 185 | 186 | # Define C++ warning options here 187 | CPPWARN = -Wall -Wextra -Wundef 188 | 189 | # 190 | # Compiler settings 191 | ############################################################################## 192 | 193 | ############################################################################## 194 | # Start of user section 195 | # 196 | 197 | # List all user C define here, like -D_DEBUG=1 198 | UDEFS = -DMODE_BL 199 | 200 | # Define ASM defines here 201 | UADEFS = 202 | 203 | # List all user directories here 204 | UINCDIR = 205 | 206 | # List the user directory to look for the libraries here 207 | ULIBDIR = 208 | 209 | # List all user libraries here 210 | ULIBS = 211 | 212 | # 213 | # End of user defines 214 | ############################################################################## 215 | 216 | RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC 217 | include $(RULESPATH)/rules.mk 218 | -------------------------------------------------------------------------------- /board/board.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | ADC1.Channel-19\#ChannelRegularConversion=ADC_CHANNEL_1 3 | ADC1.IPParameters=Rank-19\#ChannelRegularConversion,Channel-19\#ChannelRegularConversion,SamplingTime-19\#ChannelRegularConversion,OffsetNumber-19\#ChannelRegularConversion,Offset-19\#ChannelRegularConversion,NbrOfConversionFlag,master 4 | ADC1.NbrOfConversionFlag=1 5 | ADC1.Offset-19\#ChannelRegularConversion=0 6 | ADC1.OffsetNumber-19\#ChannelRegularConversion=ADC_OFFSET_NONE 7 | ADC1.Rank-19\#ChannelRegularConversion=1 8 | ADC1.SamplingTime-19\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 9 | ADC1.master=1 10 | ADC3.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_1 11 | ADC3.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,Offset-0\#ChannelRegularConversion,NbrOfConversionFlag,master 12 | ADC3.NbrOfConversionFlag=1 13 | ADC3.Offset-0\#ChannelRegularConversion=0 14 | ADC3.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE 15 | ADC3.Rank-0\#ChannelRegularConversion=1 16 | ADC3.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 17 | ADC3.master=1 18 | ADC4.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_3 19 | ADC4.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,Offset-0\#ChannelRegularConversion,NbrOfConversionFlag 20 | ADC4.NbrOfConversionFlag=1 21 | ADC4.Offset-0\#ChannelRegularConversion=0 22 | ADC4.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE 23 | ADC4.Rank-0\#ChannelRegularConversion=1 24 | ADC4.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 25 | CAN.CalculateTimeBit=6000 26 | CAN.CalculateTimeQuantum=2000.0 27 | CAN.IPParameters=CalculateTimeQuantum,CalculateTimeBit 28 | File.Version=6 29 | KeepUserPlacement=false 30 | Mcu.Family=STM32F3 31 | Mcu.IP0=ADC1 32 | Mcu.IP1=ADC3 33 | Mcu.IP10=SYS 34 | Mcu.IP11=TIM1 35 | Mcu.IP12=TIM4 36 | Mcu.IP13=TIM15 37 | Mcu.IP14=USART1 38 | Mcu.IP2=ADC4 39 | Mcu.IP3=CAN 40 | Mcu.IP4=CRC 41 | Mcu.IP5=DAC 42 | Mcu.IP6=IWDG 43 | Mcu.IP7=NVIC 44 | Mcu.IP8=RCC 45 | Mcu.IP9=SPI1 46 | Mcu.IPNb=15 47 | Mcu.Name=STM32F303C(B-C)Tx 48 | Mcu.Package=LQFP48 49 | Mcu.Pin0=PC13 50 | Mcu.Pin1=PC14-OSC32_IN 51 | Mcu.Pin10=PA9 52 | Mcu.Pin11=PA10 53 | Mcu.Pin12=PA11 54 | Mcu.Pin13=PA12 55 | Mcu.Pin14=PA13 56 | Mcu.Pin15=PA14 57 | Mcu.Pin16=PA15 58 | Mcu.Pin17=PB3 59 | Mcu.Pin18=PB4 60 | Mcu.Pin19=PB5 61 | Mcu.Pin2=PA0 62 | Mcu.Pin20=PB8 63 | Mcu.Pin21=PB9 64 | Mcu.Pin22=VP_CRC_VS_CRC 65 | Mcu.Pin23=VP_IWDG_VS_IWDG 66 | Mcu.Pin24=VP_SYS_VS_Systick 67 | Mcu.Pin3=PA2 68 | Mcu.Pin4=PA4 69 | Mcu.Pin5=PA5 70 | Mcu.Pin6=PB1 71 | Mcu.Pin7=PB12 72 | Mcu.Pin8=PB14 73 | Mcu.Pin9=PA8 74 | Mcu.PinsNb=25 75 | Mcu.UserConstants= 76 | Mcu.UserName=STM32F303CBTx 77 | MxCube.Version=4.20.1 78 | MxDb.Version=DB.4.0.200 79 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true 80 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true 81 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true 82 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true 83 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true 84 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true 85 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 86 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true 87 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true 88 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true 89 | PA0.Mode=IN1-Single-Ended 90 | PA0.Signal=ADC1_IN1 91 | PA10.GPIOParameters=GPIO_Speed 92 | PA10.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM 93 | PA10.Mode=Asynchronous 94 | PA10.Signal=USART1_RX 95 | PA11.Mode=Master 96 | PA11.Signal=CAN_RX 97 | PA12.Mode=Master 98 | PA12.Signal=CAN_TX 99 | PA13.Mode=Serial_Wire 100 | PA13.Signal=SYS_JTMS-SWDIO 101 | PA14.Mode=Serial_Wire 102 | PA14.Signal=SYS_JTCK-SWCLK 103 | PA15.Locked=true 104 | PA15.Mode=NSS_Signal_Hard_Output 105 | PA15.Signal=SPI1_NSS 106 | PA2.Mode=IN3-Single-Ended 107 | PA2.Signal=ADC1_IN3 108 | PA4.Signal=COMP_DAC1_group 109 | PA5.Signal=COMP_DAC2_group 110 | PA8.Locked=true 111 | PA8.Signal=S_TIM1_CH1 112 | PA9.GPIOParameters=GPIO_Speed 113 | PA9.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM 114 | PA9.Mode=Asynchronous 115 | PA9.Signal=USART1_TX 116 | PB1.Locked=true 117 | PB1.Mode=IN1-Single-Ended 118 | PB1.Signal=ADC3_IN1 119 | PB12.Locked=true 120 | PB12.Mode=IN3-Single-Ended 121 | PB12.Signal=ADC4_IN3 122 | PB14.GPIOParameters=GPIO_Label 123 | PB14.GPIO_Label=HEATER_PWM 124 | PB14.Signal=S_TIM15_CH1 125 | PB3.Locked=true 126 | PB3.Mode=Full_Duplex_Master 127 | PB3.Signal=SPI1_SCK 128 | PB4.Locked=true 129 | PB4.Mode=Full_Duplex_Master 130 | PB4.Signal=SPI1_MISO 131 | PB5.Locked=true 132 | PB5.Mode=Full_Duplex_Master 133 | PB5.Signal=SPI1_MOSI 134 | PB8.Locked=true 135 | PB8.Signal=S_TIM4_CH3 136 | PB9.Locked=true 137 | PB9.Signal=S_TIM4_CH4 138 | PC13.GPIOParameters=GPIO_PuPd,GPIO_Label 139 | PC13.GPIO_Label=BUTTON1 140 | PC13.GPIO_PuPd=GPIO_PULLUP 141 | PC13.Locked=true 142 | PC13.Signal=GPIO_Input 143 | PC14-OSC32_IN.GPIOParameters=GPIO_Label,GPIO_ModeDefaultOutputPP 144 | PC14-OSC32_IN.GPIO_Label=CAN_RS 145 | PC14-OSC32_IN.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 146 | PC14-OSC32_IN.Locked=true 147 | PC14-OSC32_IN.Signal=GPIO_Output 148 | PCC.Checker=false 149 | PCC.Line=STM32F303 150 | PCC.MCU=STM32F303C(B-C)Tx 151 | PCC.MXVersion=4.20.1 152 | PCC.PartNumber=STM32F303CBTx 153 | PCC.Seq0=0 154 | PCC.Series=STM32F3 155 | PCC.Temperature=25 156 | PCC.Vdd=3.6 157 | RCC.AHBFreq_Value=8000000 158 | RCC.APB1Freq_Value=8000000 159 | RCC.APB2Freq_Value=8000000 160 | RCC.CortexFreq_Value=8000000 161 | RCC.FamilyName=M 162 | RCC.HSEPLLFreq_Value=8000000 163 | RCC.HSE_VALUE=8000000 164 | RCC.HSIPLLFreq_Value=4000000 165 | RCC.HSI_VALUE=8000000 166 | RCC.I2C1Freq_Value=8000000 167 | RCC.I2C2Freq_Value=8000000 168 | RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB2Freq_Value,CortexFreq_Value,FamilyName,HSEPLLFreq_Value,HSE_VALUE,HSIPLLFreq_Value,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLMCOFreq_Value,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,TIM2Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOOutput2Freq_Value 169 | RCC.LSE_VALUE=32768 170 | RCC.LSI_VALUE=40000 171 | RCC.PLLCLKFreq_Value=8000000 172 | RCC.PLLMCOFreq_Value=4000000 173 | RCC.RTCFreq_Value=40000 174 | RCC.RTCHSEDivFreq_Value=250000 175 | RCC.SYSCLKFreq_VALUE=8000000 176 | RCC.TIM2Freq_Value=8000000 177 | RCC.USART1Freq_Value=8000000 178 | RCC.USART2Freq_Value=8000000 179 | RCC.USART3Freq_Value=8000000 180 | RCC.VCOOutput2Freq_Value=4000000 181 | SH.COMP_DAC1_group.0=DAC_OUT1,DAC_OUT1 182 | SH.COMP_DAC1_group.ConfNb=1 183 | SH.COMP_DAC2_group.0=DAC_OUT2,Enable_DAC_OUT2 184 | SH.COMP_DAC2_group.ConfNb=1 185 | SH.S_TIM15_CH1.0=TIM15_CH1,PWM Generation1 CH1 186 | SH.S_TIM15_CH1.ConfNb=1 187 | SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1 188 | SH.S_TIM1_CH1.ConfNb=1 189 | SH.S_TIM4_CH3.0=TIM4_CH3,PWM Generation3 CH3 190 | SH.S_TIM4_CH3.ConfNb=1 191 | SH.S_TIM4_CH4.0=TIM4_CH4,PWM Generation4 CH4 192 | SH.S_TIM4_CH4.ConfNb=1 193 | SPI1.CalculateBaudRate=4.0 MBits/s 194 | SPI1.Direction=SPI_DIRECTION_2LINES 195 | SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS 196 | SPI1.Mode=SPI_MODE_MASTER 197 | SPI1.VirtualNSS=VM_NSSHARD 198 | SPI1.VirtualType=VM_MASTER 199 | TIM1.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 200 | TIM1.IPParameters=Channel-PWM Generation1 CH1 201 | TIM15.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 202 | TIM15.IPParameters=Channel-PWM Generation1 CH1 203 | TIM4.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 204 | TIM4.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4 205 | TIM4.IPParameters=Channel-PWM Generation4 CH4,Channel-PWM Generation3 CH3 206 | USART1.IPParameters=VirtualMode-Asynchronous 207 | USART1.VirtualMode-Asynchronous=VM_ASYNC 208 | VP_CRC_VS_CRC.Mode=CRC_Activate 209 | VP_CRC_VS_CRC.Signal=CRC_VS_CRC 210 | VP_IWDG_VS_IWDG.Mode=IWDG_Activate 211 | VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG 212 | VP_SYS_VS_Systick.Mode=SysTick 213 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 214 | -------------------------------------------------------------------------------- /code/app/mcuconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _MCUCONF_H_ 18 | #define _MCUCONF_H_ 19 | 20 | /* 21 | * STM32F3xx drivers configuration. 22 | * The following settings override the default settings present in 23 | * the various device driver implementation headers. 24 | * Note that the settings for each driver only have effect if the whole 25 | * driver is enabled in halconf.h. 26 | * 27 | * IRQ priorities: 28 | * 15...0 Lowest...Highest. 29 | * 30 | * DMA priorities: 31 | * 0...3 Lowest...Highest. 32 | */ 33 | 34 | #define STM32F3xx_MCUCONF 35 | 36 | /* 37 | * HAL driver system settings. 38 | */ 39 | #define STM32_NO_INIT FALSE 40 | #define STM32_PVD_ENABLE FALSE 41 | #define STM32_PLS STM32_PLS_LEV0 42 | #define STM32_HSI_ENABLED TRUE 43 | #define STM32_LSI_ENABLED TRUE 44 | #define STM32_HSE_ENABLED TRUE 45 | #define STM32_LSE_ENABLED FALSE 46 | #define STM32_SW STM32_SW_PLL 47 | #define STM32_PLLSRC STM32_PLLSRC_HSE 48 | #define STM32_PREDIV_VALUE 1 49 | #define STM32_PLLMUL_VALUE 9 50 | #define STM32_HPRE STM32_HPRE_DIV1 51 | #define STM32_PPRE1 STM32_PPRE1_DIV2 52 | #define STM32_PPRE2 STM32_PPRE2_DIV2 53 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK 54 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 55 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 56 | #define STM32_USART1SW STM32_USART1SW_PCLK 57 | #define STM32_USART2SW STM32_USART2SW_PCLK 58 | #define STM32_USART3SW STM32_USART3SW_PCLK 59 | #define STM32_UART4SW STM32_UART4SW_PCLK 60 | #define STM32_UART5SW STM32_UART5SW_PCLK 61 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK 62 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK 63 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 64 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 65 | #define STM32_RTCSEL STM32_RTCSEL_LSI 66 | #define STM32_USB_CLOCK_REQUIRED TRUE 67 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 68 | 69 | /* 70 | * ADC driver system settings. 71 | */ 72 | #define STM32_ADC_DUAL_MODE FALSE 73 | #define STM32_ADC_COMPACT_SAMPLES FALSE 74 | #define STM32_ADC_USE_ADC1 TRUE 75 | #define STM32_ADC_USE_ADC2 FALSE 76 | #define STM32_ADC_USE_ADC3 FALSE 77 | #define STM32_ADC_USE_ADC4 FALSE 78 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) 79 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) 80 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) 81 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) 82 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 83 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 84 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 85 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 86 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 87 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 88 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 89 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 90 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 91 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 92 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 93 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 94 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 95 | 96 | /* 97 | * CAN driver system settings. 98 | */ 99 | #define STM32_CAN_USE_CAN1 TRUE 100 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 101 | 102 | /* 103 | * DAC driver system settings. 104 | */ 105 | #define STM32_DAC_DUAL_MODE FALSE 106 | #define STM32_DAC_USE_DAC1_CH1 TRUE 107 | #define STM32_DAC_USE_DAC1_CH2 TRUE 108 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 109 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 110 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 111 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 112 | 113 | /* 114 | * EXT driver system settings. 115 | */ 116 | #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 117 | #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 118 | #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 119 | #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 120 | #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 121 | #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 122 | #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 123 | #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 124 | #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 125 | #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 126 | #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 127 | #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 128 | #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 129 | #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 130 | #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 131 | 132 | /* 133 | * GPT driver system settings. 134 | */ 135 | #define STM32_GPT_USE_TIM1 FALSE 136 | #define STM32_GPT_USE_TIM2 FALSE 137 | #define STM32_GPT_USE_TIM3 FALSE 138 | #define STM32_GPT_USE_TIM4 FALSE 139 | #define STM32_GPT_USE_TIM6 FALSE 140 | #define STM32_GPT_USE_TIM7 FALSE 141 | #define STM32_GPT_USE_TIM8 FALSE 142 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 143 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 144 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 145 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 146 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 147 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 148 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 149 | 150 | /* 151 | * I2C driver system settings. 152 | */ 153 | #define STM32_I2C_USE_I2C1 FALSE 154 | #define STM32_I2C_USE_I2C2 FALSE 155 | #define STM32_I2C_BUSY_TIMEOUT 50 156 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 157 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 158 | #define STM32_I2C_USE_DMA TRUE 159 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 160 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 161 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") 162 | 163 | /* 164 | * ICU driver system settings. 165 | */ 166 | #define STM32_ICU_USE_TIM1 FALSE 167 | #define STM32_ICU_USE_TIM2 FALSE 168 | #define STM32_ICU_USE_TIM3 FALSE 169 | #define STM32_ICU_USE_TIM4 FALSE 170 | #define STM32_ICU_USE_TIM8 FALSE 171 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 172 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 173 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 174 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 175 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 176 | 177 | /* 178 | * PWM driver system settings. 179 | */ 180 | #define STM32_PWM_USE_ADVANCED FALSE 181 | #define STM32_PWM_USE_TIM1 FALSE 182 | #define STM32_PWM_USE_TIM2 FALSE 183 | #define STM32_PWM_USE_TIM3 FALSE 184 | #define STM32_PWM_USE_TIM4 TRUE 185 | #define STM32_PWM_USE_TIM8 FALSE 186 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 187 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 188 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 189 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 190 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 191 | 192 | /* 193 | * SERIAL driver system settings. 194 | */ 195 | #define STM32_SERIAL_USE_USART1 TRUE 196 | #define STM32_SERIAL_USE_USART2 FALSE 197 | #define STM32_SERIAL_USE_USART3 FALSE 198 | #define STM32_SERIAL_USE_UART4 FALSE 199 | #define STM32_SERIAL_USE_UART5 FALSE 200 | #define STM32_SERIAL_USART1_PRIORITY 12 201 | #define STM32_SERIAL_USART2_PRIORITY 12 202 | #define STM32_SERIAL_USART3_PRIORITY 12 203 | #define STM32_SERIAL_UART4_PRIORITY 12 204 | #define STM32_SERIAL_UART5_PRIORITY 12 205 | 206 | /* 207 | * SPI driver system settings. 208 | */ 209 | #define STM32_SPI_USE_SPI1 FALSE 210 | #define STM32_SPI_USE_SPI2 FALSE 211 | #define STM32_SPI_USE_SPI3 FALSE 212 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 213 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 214 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 215 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 216 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 217 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 218 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") 219 | 220 | /* 221 | * ST driver system settings. 222 | */ 223 | #define STM32_ST_IRQ_PRIORITY 8 224 | #define STM32_ST_USE_TIMER 2 225 | 226 | /* 227 | * UART driver system settings. 228 | */ 229 | #define STM32_UART_USE_USART1 FALSE 230 | #define STM32_UART_USE_USART2 FALSE 231 | #define STM32_UART_USE_USART3 FALSE 232 | #define STM32_UART_USART1_IRQ_PRIORITY 12 233 | #define STM32_UART_USART2_IRQ_PRIORITY 12 234 | #define STM32_UART_USART3_IRQ_PRIORITY 12 235 | #define STM32_UART_USART1_DMA_PRIORITY 0 236 | #define STM32_UART_USART2_DMA_PRIORITY 0 237 | #define STM32_UART_USART3_DMA_PRIORITY 0 238 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") 239 | 240 | /* 241 | * USB driver system settings. 242 | */ 243 | #define STM32_USB_USE_USB1 FALSE 244 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE 245 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 246 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 247 | 248 | /* 249 | * WDG driver system settings. 250 | */ 251 | #define STM32_WDG_USE_IWDG TRUE 252 | 253 | #include "mcuconf_community.h" 254 | 255 | #endif /* _MCUCONF_H_ */ 256 | -------------------------------------------------------------------------------- /code/bootloader/mcuconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | #ifndef _MCUCONF_H_ 18 | #define _MCUCONF_H_ 19 | 20 | /* 21 | * STM32F3xx drivers configuration. 22 | * The following settings override the default settings present in 23 | * the various device driver implementation headers. 24 | * Note that the settings for each driver only have effect if the whole 25 | * driver is enabled in halconf.h. 26 | * 27 | * IRQ priorities: 28 | * 15...0 Lowest...Highest. 29 | * 30 | * DMA priorities: 31 | * 0...3 Lowest...Highest. 32 | */ 33 | 34 | #define STM32F3xx_MCUCONF 35 | 36 | /* 37 | * HAL driver system settings. 38 | */ 39 | #define STM32_NO_INIT FALSE 40 | #define STM32_PVD_ENABLE FALSE 41 | #define STM32_PLS STM32_PLS_LEV7 42 | #define STM32_HSI_ENABLED TRUE 43 | #define STM32_LSI_ENABLED TRUE 44 | #define STM32_HSE_ENABLED FALSE 45 | #define STM32_LSE_ENABLED FALSE 46 | #define STM32_SW STM32_SW_PLL 47 | #define STM32_PLLSRC STM32_PLLSRC_HSI 48 | #define STM32_PREDIV_VALUE 1 49 | #define STM32_PLLMUL_VALUE 9 50 | #define STM32_HPRE STM32_HPRE_DIV1 51 | #define STM32_PPRE1 STM32_PPRE1_DIV2 52 | #define STM32_PPRE2 STM32_PPRE2_DIV2 53 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK 54 | #define STM32_ADC12PRES STM32_ADC12PRES_DIV1 55 | #define STM32_ADC34PRES STM32_ADC34PRES_DIV1 56 | #define STM32_USART1SW STM32_USART1SW_PCLK 57 | #define STM32_USART2SW STM32_USART2SW_PCLK 58 | #define STM32_USART3SW STM32_USART3SW_PCLK 59 | #define STM32_UART4SW STM32_UART4SW_PCLK 60 | #define STM32_UART5SW STM32_UART5SW_PCLK 61 | #define STM32_I2C1SW STM32_I2C1SW_SYSCLK 62 | #define STM32_I2C2SW STM32_I2C2SW_SYSCLK 63 | #define STM32_TIM1SW STM32_TIM1SW_PCLK2 64 | #define STM32_TIM8SW STM32_TIM8SW_PCLK2 65 | #define STM32_RTCSEL STM32_RTCSEL_LSI 66 | #define STM32_USB_CLOCK_REQUIRED TRUE 67 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 68 | 69 | /* 70 | * ADC driver system settings. 71 | */ 72 | #define STM32_ADC_DUAL_MODE FALSE 73 | #define STM32_ADC_COMPACT_SAMPLES FALSE 74 | #define STM32_ADC_USE_ADC1 TRUE 75 | #define STM32_ADC_USE_ADC2 FALSE 76 | #define STM32_ADC_USE_ADC3 FALSE 77 | #define STM32_ADC_USE_ADC4 FALSE 78 | #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) 79 | #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) 80 | #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) 81 | #define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) 82 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 83 | #define STM32_ADC_ADC2_DMA_PRIORITY 2 84 | #define STM32_ADC_ADC3_DMA_PRIORITY 2 85 | #define STM32_ADC_ADC4_DMA_PRIORITY 2 86 | #define STM32_ADC_ADC12_IRQ_PRIORITY 5 87 | #define STM32_ADC_ADC3_IRQ_PRIORITY 5 88 | #define STM32_ADC_ADC4_IRQ_PRIORITY 5 89 | #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 90 | #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 91 | #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 92 | #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5 93 | #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 94 | #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 95 | 96 | /* 97 | * CAN driver system settings. 98 | */ 99 | #define STM32_CAN_USE_CAN1 TRUE 100 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 101 | 102 | /* 103 | * DAC driver system settings. 104 | */ 105 | #define STM32_DAC_DUAL_MODE FALSE 106 | #define STM32_DAC_USE_DAC1_CH1 TRUE 107 | #define STM32_DAC_USE_DAC1_CH2 TRUE 108 | #define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 109 | #define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 110 | #define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 111 | #define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 112 | 113 | /* 114 | * EXT driver system settings. 115 | */ 116 | #define STM32_EXT_EXTI0_IRQ_PRIORITY 6 117 | #define STM32_EXT_EXTI1_IRQ_PRIORITY 6 118 | #define STM32_EXT_EXTI2_IRQ_PRIORITY 6 119 | #define STM32_EXT_EXTI3_IRQ_PRIORITY 6 120 | #define STM32_EXT_EXTI4_IRQ_PRIORITY 6 121 | #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 122 | #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 123 | #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 124 | #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 125 | #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 126 | #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 127 | #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 128 | #define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 129 | #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 130 | #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 131 | 132 | /* 133 | * GPT driver system settings. 134 | */ 135 | #define STM32_GPT_USE_TIM1 FALSE 136 | #define STM32_GPT_USE_TIM2 FALSE 137 | #define STM32_GPT_USE_TIM3 FALSE 138 | #define STM32_GPT_USE_TIM4 FALSE 139 | #define STM32_GPT_USE_TIM6 FALSE 140 | #define STM32_GPT_USE_TIM7 FALSE 141 | #define STM32_GPT_USE_TIM8 FALSE 142 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 143 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 144 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 145 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 146 | #define STM32_GPT_TIM6_IRQ_PRIORITY 7 147 | #define STM32_GPT_TIM7_IRQ_PRIORITY 7 148 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 149 | 150 | /* 151 | * I2C driver system settings. 152 | */ 153 | #define STM32_I2C_USE_I2C1 FALSE 154 | #define STM32_I2C_USE_I2C2 FALSE 155 | #define STM32_I2C_BUSY_TIMEOUT 50 156 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 157 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 158 | #define STM32_I2C_USE_DMA TRUE 159 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 160 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 161 | #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") 162 | 163 | /* 164 | * ICU driver system settings. 165 | */ 166 | #define STM32_ICU_USE_TIM1 FALSE 167 | #define STM32_ICU_USE_TIM2 FALSE 168 | #define STM32_ICU_USE_TIM3 FALSE 169 | #define STM32_ICU_USE_TIM4 FALSE 170 | #define STM32_ICU_USE_TIM8 FALSE 171 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 172 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 173 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 174 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 175 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 176 | 177 | /* 178 | * PWM driver system settings. 179 | */ 180 | #define STM32_PWM_USE_ADVANCED FALSE 181 | #define STM32_PWM_USE_TIM1 FALSE 182 | #define STM32_PWM_USE_TIM2 FALSE 183 | #define STM32_PWM_USE_TIM3 FALSE 184 | #define STM32_PWM_USE_TIM4 TRUE 185 | #define STM32_PWM_USE_TIM8 FALSE 186 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 187 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 188 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 189 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 190 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 191 | 192 | /* 193 | * SERIAL driver system settings. 194 | */ 195 | #define STM32_SERIAL_USE_USART1 TRUE 196 | #define STM32_SERIAL_USE_USART2 FALSE 197 | #define STM32_SERIAL_USE_USART3 FALSE 198 | #define STM32_SERIAL_USE_UART4 FALSE 199 | #define STM32_SERIAL_USE_UART5 FALSE 200 | #define STM32_SERIAL_USART1_PRIORITY 12 201 | #define STM32_SERIAL_USART2_PRIORITY 12 202 | #define STM32_SERIAL_USART3_PRIORITY 12 203 | #define STM32_SERIAL_UART4_PRIORITY 12 204 | #define STM32_SERIAL_UART5_PRIORITY 12 205 | 206 | /* 207 | * SPI driver system settings. 208 | */ 209 | #define STM32_SPI_USE_SPI1 FALSE 210 | #define STM32_SPI_USE_SPI2 FALSE 211 | #define STM32_SPI_USE_SPI3 TRUE 212 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 213 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 214 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 215 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 216 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 217 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 218 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") 219 | 220 | /* 221 | * ST driver system settings. 222 | */ 223 | #define STM32_ST_IRQ_PRIORITY 8 224 | #define STM32_ST_USE_TIMER 2 225 | 226 | /* 227 | * UART driver system settings. 228 | */ 229 | #define STM32_UART_USE_USART1 FALSE 230 | #define STM32_UART_USE_USART2 FALSE 231 | #define STM32_UART_USE_USART3 FALSE 232 | #define STM32_UART_USART1_IRQ_PRIORITY 12 233 | #define STM32_UART_USART2_IRQ_PRIORITY 12 234 | #define STM32_UART_USART3_IRQ_PRIORITY 12 235 | #define STM32_UART_USART1_DMA_PRIORITY 0 236 | #define STM32_UART_USART2_DMA_PRIORITY 0 237 | #define STM32_UART_USART3_DMA_PRIORITY 0 238 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") 239 | 240 | /* 241 | * USB driver system settings. 242 | */ 243 | #define STM32_USB_USE_USB1 FALSE 244 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE 245 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 246 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 247 | 248 | /* 249 | * WDG driver system settings. 250 | */ 251 | #define STM32_WDG_USE_IWDG TRUE 252 | 253 | #include "mcuconf_community.h" 254 | 255 | #endif /* _MCUCONF_H_ */ 256 | -------------------------------------------------------------------------------- /code/app/halconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/halconf.h 19 | * @brief HAL configuration header. 20 | * @details HAL configuration file, this file allows to enable or disable the 21 | * various device drivers from your application. You may also use 22 | * this file in order to override the device drivers default settings. 23 | * 24 | * @addtogroup HAL_CONF 25 | * @{ 26 | */ 27 | 28 | #ifndef _HALCONF_H_ 29 | #define _HALCONF_H_ 30 | 31 | #include "mcuconf.h" 32 | 33 | /** 34 | * @brief Enables the PAL subsystem. 35 | */ 36 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) 37 | #define HAL_USE_PAL TRUE 38 | #endif 39 | 40 | /** 41 | * @brief Enables the ADC subsystem. 42 | */ 43 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) 44 | #define HAL_USE_ADC TRUE 45 | #endif 46 | 47 | /** 48 | * @brief Enables the CAN subsystem. 49 | */ 50 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) 51 | #define HAL_USE_CAN TRUE 52 | #endif 53 | 54 | /** 55 | * @brief Enables the DAC subsystem. 56 | */ 57 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) 58 | #define HAL_USE_DAC TRUE 59 | #endif 60 | 61 | /** 62 | * @brief Enables the EXT subsystem. 63 | */ 64 | #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) 65 | #define HAL_USE_EXT FALSE 66 | #endif 67 | 68 | /** 69 | * @brief Enables the GPT subsystem. 70 | */ 71 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) 72 | #define HAL_USE_GPT FALSE 73 | #endif 74 | 75 | /** 76 | * @brief Enables the I2C subsystem. 77 | */ 78 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) 79 | #define HAL_USE_I2C FALSE 80 | #endif 81 | 82 | /** 83 | * @brief Enables the I2S subsystem. 84 | */ 85 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) 86 | #define HAL_USE_I2S FALSE 87 | #endif 88 | 89 | /** 90 | * @brief Enables the ICU subsystem. 91 | */ 92 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) 93 | #define HAL_USE_ICU FALSE 94 | #endif 95 | 96 | /** 97 | * @brief Enables the MAC subsystem. 98 | */ 99 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) 100 | #define HAL_USE_MAC FALSE 101 | #endif 102 | 103 | /** 104 | * @brief Enables the MMC_SPI subsystem. 105 | */ 106 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) 107 | #define HAL_USE_MMC_SPI FALSE 108 | #endif 109 | 110 | /** 111 | * @brief Enables the PWM subsystem. 112 | */ 113 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) 114 | #define HAL_USE_PWM TRUE 115 | #endif 116 | 117 | /** 118 | * @brief Enables the RTC subsystem. 119 | */ 120 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) 121 | #define HAL_USE_RTC FALSE 122 | #endif 123 | 124 | /** 125 | * @brief Enables the SDC subsystem. 126 | */ 127 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) 128 | #define HAL_USE_SDC FALSE 129 | #endif 130 | 131 | /** 132 | * @brief Enables the SERIAL subsystem. 133 | */ 134 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) 135 | #define HAL_USE_SERIAL TRUE 136 | #endif 137 | 138 | /** 139 | * @brief Enables the SERIAL over USB subsystem. 140 | */ 141 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) 142 | #define HAL_USE_SERIAL_USB FALSE 143 | #endif 144 | 145 | /** 146 | * @brief Enables the SPI subsystem. 147 | */ 148 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 149 | #define HAL_USE_SPI FALSE 150 | #endif 151 | 152 | /** 153 | * @brief Enables the UART subsystem. 154 | */ 155 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) 156 | #define HAL_USE_UART FALSE 157 | #endif 158 | 159 | /** 160 | * @brief Enables the USB subsystem. 161 | */ 162 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) 163 | #define HAL_USE_USB FALSE 164 | #endif 165 | 166 | /** 167 | * @brief Enables the WDG subsystem. 168 | */ 169 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) 170 | #define HAL_USE_WDG TRUE 171 | #endif 172 | 173 | /*===========================================================================*/ 174 | /* ADC driver related settings. */ 175 | /*===========================================================================*/ 176 | 177 | /** 178 | * @brief Enables synchronous APIs. 179 | * @note Disabling this option saves both code and data space. 180 | */ 181 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) 182 | #define ADC_USE_WAIT TRUE 183 | #endif 184 | 185 | /** 186 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. 187 | * @note Disabling this option saves both code and data space. 188 | */ 189 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 190 | #define ADC_USE_MUTUAL_EXCLUSION TRUE 191 | #endif 192 | 193 | /*===========================================================================*/ 194 | /* CAN driver related settings. */ 195 | /*===========================================================================*/ 196 | 197 | /** 198 | * @brief Sleep mode related APIs inclusion switch. 199 | */ 200 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) 201 | #define CAN_USE_SLEEP_MODE TRUE 202 | #endif 203 | 204 | /*===========================================================================*/ 205 | /* I2C driver related settings. */ 206 | /*===========================================================================*/ 207 | 208 | /** 209 | * @brief Enables the mutual exclusion APIs on the I2C bus. 210 | */ 211 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 212 | #define I2C_USE_MUTUAL_EXCLUSION TRUE 213 | #endif 214 | 215 | /*===========================================================================*/ 216 | /* MAC driver related settings. */ 217 | /*===========================================================================*/ 218 | 219 | /** 220 | * @brief Enables an event sources for incoming packets. 221 | */ 222 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) 223 | #define MAC_USE_ZERO_COPY FALSE 224 | #endif 225 | 226 | /** 227 | * @brief Enables an event sources for incoming packets. 228 | */ 229 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) 230 | #define MAC_USE_EVENTS TRUE 231 | #endif 232 | 233 | /*===========================================================================*/ 234 | /* MMC_SPI driver related settings. */ 235 | /*===========================================================================*/ 236 | 237 | /** 238 | * @brief Delays insertions. 239 | * @details If enabled this options inserts delays into the MMC waiting 240 | * routines releasing some extra CPU time for the threads with 241 | * lower priority, this may slow down the driver a bit however. 242 | * This option is recommended also if the SPI driver does not 243 | * use a DMA channel and heavily loads the CPU. 244 | */ 245 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) 246 | #define MMC_NICE_WAITING TRUE 247 | #endif 248 | 249 | /*===========================================================================*/ 250 | /* SDC driver related settings. */ 251 | /*===========================================================================*/ 252 | 253 | /** 254 | * @brief Number of initialization attempts before rejecting the card. 255 | * @note Attempts are performed at 10mS intervals. 256 | */ 257 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) 258 | #define SDC_INIT_RETRY 100 259 | #endif 260 | 261 | /** 262 | * @brief Include support for MMC cards. 263 | * @note MMC support is not yet implemented so this option must be kept 264 | * at @p FALSE. 265 | */ 266 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) 267 | #define SDC_MMC_SUPPORT FALSE 268 | #endif 269 | 270 | /** 271 | * @brief Delays insertions. 272 | * @details If enabled this options inserts delays into the MMC waiting 273 | * routines releasing some extra CPU time for the threads with 274 | * lower priority, this may slow down the driver a bit however. 275 | */ 276 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) 277 | #define SDC_NICE_WAITING TRUE 278 | #endif 279 | 280 | /*===========================================================================*/ 281 | /* SERIAL driver related settings. */ 282 | /*===========================================================================*/ 283 | 284 | /** 285 | * @brief Default bit rate. 286 | * @details Configuration parameter, this is the baud rate selected for the 287 | * default configuration. 288 | */ 289 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) 290 | #define SERIAL_DEFAULT_BITRATE 38400 291 | #endif 292 | 293 | /** 294 | * @brief Serial buffers size. 295 | * @details Configuration parameter, you can change the depth of the queue 296 | * buffers depending on the requirements of your application. 297 | * @note The default is 16 bytes for both the transmission and receive 298 | * buffers. 299 | */ 300 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) 301 | #define SERIAL_BUFFERS_SIZE 16 302 | #endif 303 | 304 | /*===========================================================================*/ 305 | /* SERIAL_USB driver related setting. */ 306 | /*===========================================================================*/ 307 | 308 | /** 309 | * @brief Serial over USB buffers size. 310 | * @details Configuration parameter, the buffer size must be a multiple of 311 | * the USB data endpoint maximum packet size. 312 | * @note The default is 256 bytes for both the transmission and receive 313 | * buffers. 314 | */ 315 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) 316 | #define SERIAL_USB_BUFFERS_SIZE 256 317 | #endif 318 | 319 | /** 320 | * @brief Serial over USB number of buffers. 321 | * @note The default is 2 buffers. 322 | */ 323 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) 324 | #define SERIAL_USB_BUFFERS_NUMBER 2 325 | #endif 326 | 327 | /*===========================================================================*/ 328 | /* SPI driver related settings. */ 329 | /*===========================================================================*/ 330 | 331 | /** 332 | * @brief Enables synchronous APIs. 333 | * @note Disabling this option saves both code and data space. 334 | */ 335 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) 336 | #define SPI_USE_WAIT TRUE 337 | #endif 338 | 339 | /** 340 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. 341 | * @note Disabling this option saves both code and data space. 342 | */ 343 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 344 | #define SPI_USE_MUTUAL_EXCLUSION TRUE 345 | #endif 346 | 347 | /*===========================================================================*/ 348 | /* UART driver related settings. */ 349 | /*===========================================================================*/ 350 | 351 | /** 352 | * @brief Enables synchronous APIs. 353 | * @note Disabling this option saves both code and data space. 354 | */ 355 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) 356 | #define UART_USE_WAIT FALSE 357 | #endif 358 | 359 | /** 360 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. 361 | * @note Disabling this option saves both code and data space. 362 | */ 363 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 364 | #define UART_USE_MUTUAL_EXCLUSION FALSE 365 | #endif 366 | 367 | /*===========================================================================*/ 368 | /* USB driver related settings. */ 369 | /*===========================================================================*/ 370 | 371 | /** 372 | * @brief Enables synchronous APIs. 373 | * @note Disabling this option saves both code and data space. 374 | */ 375 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) 376 | #define USB_USE_WAIT FALSE 377 | #endif 378 | 379 | #include "halconf_community.h" 380 | 381 | #endif /* _HALCONF_H_ */ 382 | 383 | /** @} */ 384 | -------------------------------------------------------------------------------- /code/bootloader/halconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/halconf.h 19 | * @brief HAL configuration header. 20 | * @details HAL configuration file, this file allows to enable or disable the 21 | * various device drivers from your application. You may also use 22 | * this file in order to override the device drivers default settings. 23 | * 24 | * @addtogroup HAL_CONF 25 | * @{ 26 | */ 27 | 28 | #ifndef _HALCONF_H_ 29 | #define _HALCONF_H_ 30 | 31 | #include "mcuconf.h" 32 | 33 | /** 34 | * @brief Enables the PAL subsystem. 35 | */ 36 | #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) 37 | #define HAL_USE_PAL TRUE 38 | #endif 39 | 40 | /** 41 | * @brief Enables the ADC subsystem. 42 | */ 43 | #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) 44 | #define HAL_USE_ADC TRUE 45 | #endif 46 | 47 | /** 48 | * @brief Enables the CAN subsystem. 49 | */ 50 | #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) 51 | #define HAL_USE_CAN FALSE 52 | #endif 53 | 54 | /** 55 | * @brief Enables the DAC subsystem. 56 | */ 57 | #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) 58 | #define HAL_USE_DAC FALSE 59 | #endif 60 | 61 | /** 62 | * @brief Enables the EXT subsystem. 63 | */ 64 | #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) 65 | #define HAL_USE_EXT FALSE 66 | #endif 67 | 68 | /** 69 | * @brief Enables the GPT subsystem. 70 | */ 71 | #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) 72 | #define HAL_USE_GPT FALSE 73 | #endif 74 | 75 | /** 76 | * @brief Enables the I2C subsystem. 77 | */ 78 | #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) 79 | #define HAL_USE_I2C FALSE 80 | #endif 81 | 82 | /** 83 | * @brief Enables the I2S subsystem. 84 | */ 85 | #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) 86 | #define HAL_USE_I2S FALSE 87 | #endif 88 | 89 | /** 90 | * @brief Enables the ICU subsystem. 91 | */ 92 | #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) 93 | #define HAL_USE_ICU FALSE 94 | #endif 95 | 96 | /** 97 | * @brief Enables the MAC subsystem. 98 | */ 99 | #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) 100 | #define HAL_USE_MAC FALSE 101 | #endif 102 | 103 | /** 104 | * @brief Enables the MMC_SPI subsystem. 105 | */ 106 | #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) 107 | #define HAL_USE_MMC_SPI FALSE 108 | #endif 109 | 110 | /** 111 | * @brief Enables the PWM subsystem. 112 | */ 113 | #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) 114 | #define HAL_USE_PWM TRUE 115 | #endif 116 | 117 | /** 118 | * @brief Enables the RTC subsystem. 119 | */ 120 | #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) 121 | #define HAL_USE_RTC FALSE 122 | #endif 123 | 124 | /** 125 | * @brief Enables the SDC subsystem. 126 | */ 127 | #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) 128 | #define HAL_USE_SDC FALSE 129 | #endif 130 | 131 | /** 132 | * @brief Enables the SERIAL subsystem. 133 | */ 134 | #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) 135 | #define HAL_USE_SERIAL TRUE 136 | #endif 137 | 138 | /** 139 | * @brief Enables the SERIAL over USB subsystem. 140 | */ 141 | #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) 142 | #define HAL_USE_SERIAL_USB FALSE 143 | #endif 144 | 145 | /** 146 | * @brief Enables the SPI subsystem. 147 | */ 148 | #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) 149 | #define HAL_USE_SPI TRUE 150 | #endif 151 | 152 | /** 153 | * @brief Enables the UART subsystem. 154 | */ 155 | #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) 156 | #define HAL_USE_UART FALSE 157 | #endif 158 | 159 | /** 160 | * @brief Enables the USB subsystem. 161 | */ 162 | #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) 163 | #define HAL_USE_USB FALSE 164 | #endif 165 | 166 | /** 167 | * @brief Enables the WDG subsystem. 168 | */ 169 | #if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) 170 | #define HAL_USE_WDG TRUE 171 | #endif 172 | 173 | /*===========================================================================*/ 174 | /* ADC driver related settings. */ 175 | /*===========================================================================*/ 176 | 177 | /** 178 | * @brief Enables synchronous APIs. 179 | * @note Disabling this option saves both code and data space. 180 | */ 181 | #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) 182 | #define ADC_USE_WAIT TRUE 183 | #endif 184 | 185 | /** 186 | * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. 187 | * @note Disabling this option saves both code and data space. 188 | */ 189 | #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 190 | #define ADC_USE_MUTUAL_EXCLUSION TRUE 191 | #endif 192 | 193 | /*===========================================================================*/ 194 | /* CAN driver related settings. */ 195 | /*===========================================================================*/ 196 | 197 | /** 198 | * @brief Sleep mode related APIs inclusion switch. 199 | */ 200 | #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) 201 | #define CAN_USE_SLEEP_MODE TRUE 202 | #endif 203 | 204 | /*===========================================================================*/ 205 | /* I2C driver related settings. */ 206 | /*===========================================================================*/ 207 | 208 | /** 209 | * @brief Enables the mutual exclusion APIs on the I2C bus. 210 | */ 211 | #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 212 | #define I2C_USE_MUTUAL_EXCLUSION TRUE 213 | #endif 214 | 215 | /*===========================================================================*/ 216 | /* MAC driver related settings. */ 217 | /*===========================================================================*/ 218 | 219 | /** 220 | * @brief Enables an event sources for incoming packets. 221 | */ 222 | #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) 223 | #define MAC_USE_ZERO_COPY FALSE 224 | #endif 225 | 226 | /** 227 | * @brief Enables an event sources for incoming packets. 228 | */ 229 | #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) 230 | #define MAC_USE_EVENTS TRUE 231 | #endif 232 | 233 | /*===========================================================================*/ 234 | /* MMC_SPI driver related settings. */ 235 | /*===========================================================================*/ 236 | 237 | /** 238 | * @brief Delays insertions. 239 | * @details If enabled this options inserts delays into the MMC waiting 240 | * routines releasing some extra CPU time for the threads with 241 | * lower priority, this may slow down the driver a bit however. 242 | * This option is recommended also if the SPI driver does not 243 | * use a DMA channel and heavily loads the CPU. 244 | */ 245 | #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) 246 | #define MMC_NICE_WAITING TRUE 247 | #endif 248 | 249 | /*===========================================================================*/ 250 | /* SDC driver related settings. */ 251 | /*===========================================================================*/ 252 | 253 | /** 254 | * @brief Number of initialization attempts before rejecting the card. 255 | * @note Attempts are performed at 10mS intervals. 256 | */ 257 | #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) 258 | #define SDC_INIT_RETRY 100 259 | #endif 260 | 261 | /** 262 | * @brief Include support for MMC cards. 263 | * @note MMC support is not yet implemented so this option must be kept 264 | * at @p FALSE. 265 | */ 266 | #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) 267 | #define SDC_MMC_SUPPORT FALSE 268 | #endif 269 | 270 | /** 271 | * @brief Delays insertions. 272 | * @details If enabled this options inserts delays into the MMC waiting 273 | * routines releasing some extra CPU time for the threads with 274 | * lower priority, this may slow down the driver a bit however. 275 | */ 276 | #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) 277 | #define SDC_NICE_WAITING TRUE 278 | #endif 279 | 280 | /*===========================================================================*/ 281 | /* SERIAL driver related settings. */ 282 | /*===========================================================================*/ 283 | 284 | /** 285 | * @brief Default bit rate. 286 | * @details Configuration parameter, this is the baud rate selected for the 287 | * default configuration. 288 | */ 289 | #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) 290 | #define SERIAL_DEFAULT_BITRATE 38400 291 | #endif 292 | 293 | /** 294 | * @brief Serial buffers size. 295 | * @details Configuration parameter, you can change the depth of the queue 296 | * buffers depending on the requirements of your application. 297 | * @note The default is 16 bytes for both the transmission and receive 298 | * buffers. 299 | */ 300 | #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) 301 | #define SERIAL_BUFFERS_SIZE 16 302 | #endif 303 | 304 | /*===========================================================================*/ 305 | /* SERIAL_USB driver related setting. */ 306 | /*===========================================================================*/ 307 | 308 | /** 309 | * @brief Serial over USB buffers size. 310 | * @details Configuration parameter, the buffer size must be a multiple of 311 | * the USB data endpoint maximum packet size. 312 | * @note The default is 256 bytes for both the transmission and receive 313 | * buffers. 314 | */ 315 | #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) 316 | #define SERIAL_USB_BUFFERS_SIZE 256 317 | #endif 318 | 319 | /** 320 | * @brief Serial over USB number of buffers. 321 | * @note The default is 2 buffers. 322 | */ 323 | #if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) 324 | #define SERIAL_USB_BUFFERS_NUMBER 2 325 | #endif 326 | 327 | /*===========================================================================*/ 328 | /* SPI driver related settings. */ 329 | /*===========================================================================*/ 330 | 331 | /** 332 | * @brief Enables synchronous APIs. 333 | * @note Disabling this option saves both code and data space. 334 | */ 335 | #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) 336 | #define SPI_USE_WAIT TRUE 337 | #endif 338 | 339 | /** 340 | * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. 341 | * @note Disabling this option saves both code and data space. 342 | */ 343 | #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 344 | #define SPI_USE_MUTUAL_EXCLUSION TRUE 345 | #endif 346 | 347 | /*===========================================================================*/ 348 | /* UART driver related settings. */ 349 | /*===========================================================================*/ 350 | 351 | /** 352 | * @brief Enables synchronous APIs. 353 | * @note Disabling this option saves both code and data space. 354 | */ 355 | #if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) 356 | #define UART_USE_WAIT FALSE 357 | #endif 358 | 359 | /** 360 | * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. 361 | * @note Disabling this option saves both code and data space. 362 | */ 363 | #if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) 364 | #define UART_USE_MUTUAL_EXCLUSION FALSE 365 | #endif 366 | 367 | /*===========================================================================*/ 368 | /* USB driver related settings. */ 369 | /*===========================================================================*/ 370 | 371 | /** 372 | * @brief Enables synchronous APIs. 373 | * @note Disabling this option saves both code and data space. 374 | */ 375 | #if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) 376 | #define USB_USE_WAIT FALSE 377 | #endif 378 | 379 | #include "halconf_community.h" 380 | 381 | #endif /* _HALCONF_H_ */ 382 | 383 | /** @} */ 384 | -------------------------------------------------------------------------------- /code/common/stm32f30x_flash.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f30x_flash.h 4 | * @author MCD Application Team 5 | * @version V1.0.1 6 | * @date 23-October-2012 7 | * @brief This file contains all the functions prototypes for the FLASH 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT 2012 STMicroelectronics

13 | * 14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); 15 | * You may not use this file except in compliance with the License. 16 | * You may obtain a copy of the License at: 17 | * 18 | * http://www.st.com/software_license_agreement_liberty_v2 19 | * 20 | * Unless required by applicable law or agreed to in writing, software 21 | * distributed under the License is distributed on an "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 | * See the License for the specific language governing permissions and 24 | * limitations under the License. 25 | * 26 | ****************************************************************************** 27 | */ 28 | 29 | /* Define to prevent recursive inclusion -------------------------------------*/ 30 | #ifndef __STM32F30x_FLASH_H 31 | #define __STM32F30x_FLASH_H 32 | 33 | #define assert_param(x) 34 | 35 | #ifdef __cplusplus 36 | extern "C" { 37 | #endif 38 | 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "board.h" 41 | #include "stm32f3xx.h" 42 | 43 | /** @addtogroup STM32F30x_StdPeriph_Driver 44 | * @{ 45 | */ 46 | 47 | /** @addtogroup FLASH 48 | * @{ 49 | */ 50 | 51 | /* Exported types ------------------------------------------------------------*/ 52 | /** 53 | * @brief FLASH Status 54 | */ 55 | typedef enum 56 | { 57 | FLASH_BUSY = 1, 58 | FLASH_ERROR_WRP, 59 | FLASH_ERROR_PROGRAM, 60 | FLASH_COMPLETE, 61 | FLASH_TIMEOUT 62 | }FLASH_Status; 63 | 64 | /* Exported constants --------------------------------------------------------*/ 65 | 66 | /** @defgroup FLASH_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** @defgroup Flash_Latency 71 | * @{ 72 | */ 73 | #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */ 74 | #define FLASH_Latency_1 FLASH_ACR_LATENCY_0 /*!< FLASH One Latency cycle */ 75 | #define FLASH_Latency_2 FLASH_ACR_LATENCY_1 /*!< FLASH Two Latency cycles */ 76 | 77 | #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ 78 | ((LATENCY) == FLASH_Latency_1) || \ 79 | ((LATENCY) == FLASH_Latency_2)) 80 | /** 81 | * @} 82 | */ 83 | 84 | /** @defgroup FLASH_Interrupts 85 | * @{ 86 | */ 87 | 88 | #define FLASH_IT_EOP FLASH_CR_EOPIE /*!< End of programming interrupt source */ 89 | #define FLASH_IT_ERR FLASH_CR_ERRIE /*!< Error interrupt source */ 90 | #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) 91 | /** 92 | * @} 93 | */ 94 | /** @defgroup FLASH_Address 95 | * @{ 96 | */ 97 | 98 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @defgroup FLASH_OB_DATA_ADDRESS 105 | * @{ 106 | */ 107 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806)) 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** @defgroup Option_Bytes_Write_Protection 114 | * @{ 115 | */ 116 | 117 | #define OB_WRP_Pages0to1 ((uint32_t)0x00000001) /* Write protection of page 0 to 1 */ 118 | #define OB_WRP_Pages2to3 ((uint32_t)0x00000002) /* Write protection of page 2 to 3 */ 119 | #define OB_WRP_Pages4to5 ((uint32_t)0x00000004) /* Write protection of page 4 to 5 */ 120 | #define OB_WRP_Pages6to7 ((uint32_t)0x00000008) /* Write protection of page 6 to 7 */ 121 | #define OB_WRP_Pages8to9 ((uint32_t)0x00000010) /* Write protection of page 8 to 9 */ 122 | #define OB_WRP_Pages10to11 ((uint32_t)0x00000020) /* Write protection of page 10 to 11 */ 123 | #define OB_WRP_Pages12to13 ((uint32_t)0x00000040) /* Write protection of page 12 to 13 */ 124 | #define OB_WRP_Pages14to15 ((uint32_t)0x00000080) /* Write protection of page 14 to 15 */ 125 | #define OB_WRP_Pages16to17 ((uint32_t)0x00000100) /* Write protection of page 16 to 17 */ 126 | #define OB_WRP_Pages18to19 ((uint32_t)0x00000200) /* Write protection of page 18 to 19 */ 127 | #define OB_WRP_Pages20to21 ((uint32_t)0x00000400) /* Write protection of page 20 to 21 */ 128 | #define OB_WRP_Pages22to23 ((uint32_t)0x00000800) /* Write protection of page 22 to 23 */ 129 | #define OB_WRP_Pages24to25 ((uint32_t)0x00001000) /* Write protection of page 24 to 25 */ 130 | #define OB_WRP_Pages26to27 ((uint32_t)0x00002000) /* Write protection of page 26 to 27 */ 131 | #define OB_WRP_Pages28to29 ((uint32_t)0x00004000) /* Write protection of page 28 to 29 */ 132 | #define OB_WRP_Pages30to31 ((uint32_t)0x00008000) /* Write protection of page 30 to 31 */ 133 | #define OB_WRP_Pages32to33 ((uint32_t)0x00010000) /* Write protection of page 32 to 33 */ 134 | #define OB_WRP_Pages34to35 ((uint32_t)0x00020000) /* Write protection of page 34 to 35 */ 135 | #define OB_WRP_Pages36to37 ((uint32_t)0x00040000) /* Write protection of page 36 to 37 */ 136 | #define OB_WRP_Pages38to39 ((uint32_t)0x00080000) /* Write protection of page 38 to 39 */ 137 | #define OB_WRP_Pages40to41 ((uint32_t)0x00100000) /* Write protection of page 40 to 41 */ 138 | #define OB_WRP_Pages42to43 ((uint32_t)0x00200000) /* Write protection of page 42 to 43 */ 139 | #define OB_WRP_Pages44to45 ((uint32_t)0x00400000) /* Write protection of page 44 to 45 */ 140 | #define OB_WRP_Pages46to47 ((uint32_t)0x00800000) /* Write protection of page 46 to 47 */ 141 | #define OB_WRP_Pages48to49 ((uint32_t)0x01000000) /* Write protection of page 48 to 49 */ 142 | #define OB_WRP_Pages50to51 ((uint32_t)0x02000000) /* Write protection of page 50 to 51 */ 143 | #define OB_WRP_Pages52to53 ((uint32_t)0x04000000) /* Write protection of page 52 to 53 */ 144 | #define OB_WRP_Pages54to55 ((uint32_t)0x08000000) /* Write protection of page 54 to 55 */ 145 | #define OB_WRP_Pages56to57 ((uint32_t)0x10000000) /* Write protection of page 56 to 57 */ 146 | #define OB_WRP_Pages58to59 ((uint32_t)0x20000000) /* Write protection of page 58 to 59 */ 147 | #define OB_WRP_Pages60to61 ((uint32_t)0x40000000) /* Write protection of page 60 to 61 */ 148 | #define OB_WRP_Pages62to127 ((uint32_t)0x80000000) /* Write protection of page 62 to 127 */ 149 | 150 | #define OB_WRP_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */ 151 | 152 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000)) 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /** @defgroup Option_Bytes_Read_Protection 159 | * @{ 160 | */ 161 | 162 | /** 163 | * @brief Read Protection Level 164 | */ 165 | #define OB_RDP_Level_0 ((uint8_t)0xAA) 166 | #define OB_RDP_Level_1 ((uint8_t)0xBB) 167 | /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /* Warning: When enabling read protection level 2 168 | it's no more possible to go back to level 1 or 0 */ 169 | 170 | #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\ 171 | ((LEVEL) == OB_RDP_Level_1))/*||\ 172 | ((LEVEL) == OB_RDP_Level_2))*/ 173 | /** 174 | * @} 175 | */ 176 | 177 | /** @defgroup Option_Bytes_IWatchdog 178 | * @{ 179 | */ 180 | 181 | #define OB_IWDG_SW ((uint8_t)0x01) /*!< Software IWDG selected */ 182 | #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */ 183 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | /** @defgroup Option_Bytes_nRST_STOP 190 | * @{ 191 | */ 192 | 193 | #define OB_STOP_NoRST ((uint8_t)0x02) /*!< No reset generated when entering in STOP */ 194 | #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */ 195 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) 196 | 197 | /** 198 | * @} 199 | */ 200 | 201 | /** @defgroup Option_Bytes_nRST_STDBY 202 | * @{ 203 | */ 204 | 205 | #define OB_STDBY_NoRST ((uint8_t)0x04) /*!< No reset generated when entering in STANDBY */ 206 | #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */ 207 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) 208 | 209 | /** 210 | * @} 211 | */ 212 | /** @defgroup Option_Bytes_BOOT1 213 | * @{ 214 | */ 215 | 216 | #define OB_BOOT1_RESET ((uint8_t)0x00) /*!< BOOT1 Reset */ 217 | #define OB_BOOT1_SET ((uint8_t)0x10) /*!< BOOT1 Set */ 218 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) 219 | 220 | /** 221 | * @} 222 | */ 223 | /** @defgroup Option_Bytes_VDDA_Analog_Monitoring 224 | * @{ 225 | */ 226 | 227 | #define OB_VDDA_ANALOG_ON ((uint8_t)0x20) /*!< Analog monitoring on VDDA Power source ON */ 228 | #define OB_VDDA_ANALOG_OFF ((uint8_t)0x00) /*!< Analog monitoring on VDDA Power source OFF */ 229 | 230 | #define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF)) 231 | 232 | /** 233 | * @} 234 | */ 235 | 236 | /** @defgroup FLASH_Option_Bytes_SRAM_Parity_Enable 237 | * @{ 238 | */ 239 | 240 | #define OB_SRAM_PARITY_SET ((uint8_t)0x00) /*!< SRAM parity enable Set */ 241 | #define OB_SRAM_PARITY_RESET ((uint8_t)0x40) /*!< SRAM parity enable reset */ 242 | 243 | #define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) || ((PARITY) == OB_SRAM_PARITY_RESET)) 244 | 245 | /** 246 | * @} 247 | */ 248 | 249 | /** @defgroup FLASH_Flags 250 | * @{ 251 | */ 252 | 253 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ 254 | #define FLASH_FLAG_PGERR FLASH_SR_PGERR /*!< FLASH Programming error flag */ 255 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */ 256 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Programming flag */ 257 | 258 | #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFC3) == 0x00000000) && ((FLAG) != 0x00000000)) 259 | 260 | #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_PGERR) || \ 261 | ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_EOP)) 262 | /** 263 | * @} 264 | */ 265 | /** @defgroup Timeout_definition 266 | * @{ 267 | */ 268 | #define FLASH_ER_PRG_TIMEOUT ((uint32_t)0x000B0000) 269 | 270 | /** 271 | * @} 272 | */ 273 | 274 | /** 275 | * @} 276 | */ 277 | 278 | /* Exported macro ------------------------------------------------------------*/ 279 | /* Exported functions --------------------------------------------------------*/ 280 | 281 | /* FLASH Interface configuration functions ************************************/ 282 | void FLASH_SetLatency(uint32_t FLASH_Latency); 283 | void FLASH_HalfCycleAccessCmd(FunctionalState NewState); 284 | void FLASH_PrefetchBufferCmd(FunctionalState NewState); 285 | 286 | /* FLASH Memory Programming functions *****************************************/ 287 | void FLASH_Unlock(void); 288 | void FLASH_Lock(void); 289 | FLASH_Status FLASH_ErasePage(uint32_t Page_Address); 290 | FLASH_Status FLASH_EraseAllPages(void); 291 | FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); 292 | FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); 293 | 294 | /* Option Bytes Programming functions *****************************************/ 295 | void FLASH_OB_Unlock(void); 296 | void FLASH_OB_Lock(void); 297 | void FLASH_OB_Launch(void); 298 | FLASH_Status FLASH_OB_Erase(void); 299 | FLASH_Status FLASH_OB_EnableWRP(uint32_t OB_WRP); 300 | FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP); 301 | FLASH_Status FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY); 302 | FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1); 303 | FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG); 304 | FLASH_Status FLASH_OB_SRAMParityConfig(uint8_t OB_SRAM_Parity); 305 | FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER); 306 | FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); 307 | uint8_t FLASH_OB_GetUser(void); 308 | uint32_t FLASH_OB_GetWRP(void); 309 | FlagStatus FLASH_OB_GetRDP(void); 310 | 311 | /* Interrupts and flags management functions **********************************/ 312 | void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); 313 | FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); 314 | void FLASH_ClearFlag(uint32_t FLASH_FLAG); 315 | FLASH_Status FLASH_GetStatus(void); 316 | FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); 317 | 318 | #ifdef __cplusplus 319 | } 320 | #endif 321 | 322 | #endif /* __STM32F30x_FLASH_H */ 323 | 324 | /** 325 | * @} 326 | */ 327 | 328 | /** 329 | * @} 330 | */ 331 | 332 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 333 | -------------------------------------------------------------------------------- /code/app/chconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/chconf.h 19 | * @brief Configuration file template. 20 | * @details A copy of this file must be placed in each project directory, it 21 | * contains the application specific kernel settings. 22 | * 23 | * @addtogroup config 24 | * @details Kernel related settings and hooks. 25 | * @{ 26 | */ 27 | 28 | #ifndef _CHCONF_H_ 29 | #define _CHCONF_H_ 30 | 31 | #define VERSION_API 1 32 | #define VERSION_MAJOR 0 33 | #define VERSION_MINOR 1 34 | #define VERSION_PATCH 0 35 | 36 | /*===========================================================================*/ 37 | /** 38 | * @name System timers settings 39 | * @{ 40 | */ 41 | /*===========================================================================*/ 42 | 43 | /** 44 | * @brief System time counter resolution. 45 | * @note Allowed values are 16 or 32 bits. 46 | */ 47 | #define CH_CFG_ST_RESOLUTION 32 48 | 49 | /** 50 | * @brief System tick frequency. 51 | * @details Frequency of the system timer that drives the system ticks. This 52 | * setting also defines the system tick time unit. 53 | */ 54 | #define CH_CFG_ST_FREQUENCY 10000 55 | 56 | /** 57 | * @brief Time delta constant for the tick-less mode. 58 | * @note If this value is zero then the system uses the classic 59 | * periodic tick. This value represents the minimum number 60 | * of ticks that is safe to specify in a timeout directive. 61 | * The value one is not valid, timeouts are rounded up to 62 | * this value. 63 | */ 64 | #define CH_CFG_ST_TIMEDELTA 2 65 | 66 | /** @} */ 67 | 68 | /*===========================================================================*/ 69 | /** 70 | * @name Kernel parameters and options 71 | * @{ 72 | */ 73 | /*===========================================================================*/ 74 | 75 | /** 76 | * @brief Round robin interval. 77 | * @details This constant is the number of system ticks allowed for the 78 | * threads before preemption occurs. Setting this value to zero 79 | * disables the preemption for threads with equal priority and the 80 | * round robin becomes cooperative. Note that higher priority 81 | * threads can still preempt, the kernel is always preemptive. 82 | * @note Disabling the round robin preemption makes the kernel more compact 83 | * and generally faster. 84 | * @note The round robin preemption is not supported in tickless mode and 85 | * must be set to zero in that case. 86 | */ 87 | #define CH_CFG_TIME_QUANTUM 0 88 | 89 | /** 90 | * @brief Managed RAM size. 91 | * @details Size of the RAM area to be managed by the OS. If set to zero 92 | * then the whole available RAM is used. The core memory is made 93 | * available to the heap allocator and/or can be used directly through 94 | * the simplified core memory allocator. 95 | * 96 | * @note In order to let the OS manage the whole RAM the linker script must 97 | * provide the @p __heap_base__ and @p __heap_end__ symbols. 98 | * @note Requires @p CH_CFG_USE_MEMCORE. 99 | */ 100 | #define CH_CFG_MEMCORE_SIZE 0 101 | 102 | /** 103 | * @brief Idle thread automatic spawn suppression. 104 | * @details When this option is activated the function @p chSysInit() 105 | * does not spawn the idle thread. The application @p main() 106 | * function becomes the idle thread and must implement an 107 | * infinite loop. 108 | */ 109 | #define CH_CFG_NO_IDLE_THREAD FALSE 110 | 111 | /** @} */ 112 | 113 | /*===========================================================================*/ 114 | /** 115 | * @name Performance options 116 | * @{ 117 | */ 118 | /*===========================================================================*/ 119 | 120 | /** 121 | * @brief OS optimization. 122 | * @details If enabled then time efficient rather than space efficient code 123 | * is used when two possible implementations exist. 124 | * 125 | * @note This is not related to the compiler optimization options. 126 | * @note The default is @p TRUE. 127 | */ 128 | #define CH_CFG_OPTIMIZE_SPEED TRUE 129 | 130 | /** @} */ 131 | 132 | /*===========================================================================*/ 133 | /** 134 | * @name Subsystem options 135 | * @{ 136 | */ 137 | /*===========================================================================*/ 138 | 139 | /** 140 | * @brief Time Measurement APIs. 141 | * @details If enabled then the time measurement APIs are included in 142 | * the kernel. 143 | * 144 | * @note The default is @p TRUE. 145 | */ 146 | #define CH_CFG_USE_TM TRUE 147 | 148 | /** 149 | * @brief Threads registry APIs. 150 | * @details If enabled then the registry APIs are included in the kernel. 151 | * 152 | * @note The default is @p TRUE. 153 | */ 154 | #define CH_CFG_USE_REGISTRY TRUE 155 | 156 | /** 157 | * @brief Threads synchronization APIs. 158 | * @details If enabled then the @p chThdWait() function is included in 159 | * the kernel. 160 | * 161 | * @note The default is @p TRUE. 162 | */ 163 | #define CH_CFG_USE_WAITEXIT TRUE 164 | 165 | /** 166 | * @brief Semaphores APIs. 167 | * @details If enabled then the Semaphores APIs are included in the kernel. 168 | * 169 | * @note The default is @p TRUE. 170 | */ 171 | #define CH_CFG_USE_SEMAPHORES TRUE 172 | 173 | /** 174 | * @brief Semaphores queuing mode. 175 | * @details If enabled then the threads are enqueued on semaphores by 176 | * priority rather than in FIFO order. 177 | * 178 | * @note The default is @p FALSE. Enable this if you have special 179 | * requirements. 180 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 181 | */ 182 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE 183 | 184 | /** 185 | * @brief Mutexes APIs. 186 | * @details If enabled then the mutexes APIs are included in the kernel. 187 | * 188 | * @note The default is @p TRUE. 189 | */ 190 | #define CH_CFG_USE_MUTEXES TRUE 191 | 192 | /** 193 | * @brief Enables recursive behavior on mutexes. 194 | * @note Recursive mutexes are heavier and have an increased 195 | * memory footprint. 196 | * 197 | * @note The default is @p FALSE. 198 | * @note Requires @p CH_CFG_USE_MUTEXES. 199 | */ 200 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE 201 | 202 | /** 203 | * @brief Conditional Variables APIs. 204 | * @details If enabled then the conditional variables APIs are included 205 | * in the kernel. 206 | * 207 | * @note The default is @p TRUE. 208 | * @note Requires @p CH_CFG_USE_MUTEXES. 209 | */ 210 | #define CH_CFG_USE_CONDVARS TRUE 211 | 212 | /** 213 | * @brief Conditional Variables APIs with timeout. 214 | * @details If enabled then the conditional variables APIs with timeout 215 | * specification are included in the kernel. 216 | * 217 | * @note The default is @p TRUE. 218 | * @note Requires @p CH_CFG_USE_CONDVARS. 219 | */ 220 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE 221 | 222 | /** 223 | * @brief Events Flags APIs. 224 | * @details If enabled then the event flags APIs are included in the kernel. 225 | * 226 | * @note The default is @p TRUE. 227 | */ 228 | #define CH_CFG_USE_EVENTS TRUE 229 | 230 | /** 231 | * @brief Events Flags APIs with timeout. 232 | * @details If enabled then the events APIs with timeout specification 233 | * are included in the kernel. 234 | * 235 | * @note The default is @p TRUE. 236 | * @note Requires @p CH_CFG_USE_EVENTS. 237 | */ 238 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE 239 | 240 | /** 241 | * @brief Synchronous Messages APIs. 242 | * @details If enabled then the synchronous messages APIs are included 243 | * in the kernel. 244 | * 245 | * @note The default is @p TRUE. 246 | */ 247 | #define CH_CFG_USE_MESSAGES TRUE 248 | 249 | /** 250 | * @brief Synchronous Messages queuing mode. 251 | * @details If enabled then messages are served by priority rather than in 252 | * FIFO order. 253 | * 254 | * @note The default is @p FALSE. Enable this if you have special 255 | * requirements. 256 | * @note Requires @p CH_CFG_USE_MESSAGES. 257 | */ 258 | #define CH_CFG_USE_MESSAGES_PRIORITY FALSE 259 | 260 | /** 261 | * @brief Mailboxes APIs. 262 | * @details If enabled then the asynchronous messages (mailboxes) APIs are 263 | * included in the kernel. 264 | * 265 | * @note The default is @p TRUE. 266 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 267 | */ 268 | #define CH_CFG_USE_MAILBOXES TRUE 269 | 270 | /** 271 | * @brief I/O Queues APIs. 272 | * @details If enabled then the I/O queues APIs are included in the kernel. 273 | * 274 | * @note The default is @p TRUE. 275 | */ 276 | #define CH_CFG_USE_QUEUES TRUE 277 | 278 | /** 279 | * @brief Core Memory Manager APIs. 280 | * @details If enabled then the core memory manager APIs are included 281 | * in the kernel. 282 | * 283 | * @note The default is @p TRUE. 284 | */ 285 | #define CH_CFG_USE_MEMCORE TRUE 286 | 287 | /** 288 | * @brief Heap Allocator APIs. 289 | * @details If enabled then the memory heap allocator APIs are included 290 | * in the kernel. 291 | * 292 | * @note The default is @p TRUE. 293 | * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or 294 | * @p CH_CFG_USE_SEMAPHORES. 295 | * @note Mutexes are recommended. 296 | */ 297 | #define CH_CFG_USE_HEAP TRUE 298 | 299 | /** 300 | * @brief Memory Pools Allocator APIs. 301 | * @details If enabled then the memory pools allocator APIs are included 302 | * in the kernel. 303 | * 304 | * @note The default is @p TRUE. 305 | */ 306 | #define CH_CFG_USE_MEMPOOLS TRUE 307 | 308 | /** 309 | * @brief Dynamic Threads APIs. 310 | * @details If enabled then the dynamic threads creation APIs are included 311 | * in the kernel. 312 | * 313 | * @note The default is @p TRUE. 314 | * @note Requires @p CH_CFG_USE_WAITEXIT. 315 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. 316 | */ 317 | #define CH_CFG_USE_DYNAMIC TRUE 318 | 319 | /** @} */ 320 | 321 | /*===========================================================================*/ 322 | /** 323 | * @name Debug options 324 | * @{ 325 | */ 326 | /*===========================================================================*/ 327 | 328 | /** 329 | * @brief Debug option, kernel statistics. 330 | * 331 | * @note The default is @p FALSE. 332 | */ 333 | #define CH_DBG_STATISTICS TRUE 334 | 335 | /** 336 | * @brief Debug option, system state check. 337 | * @details If enabled the correct call protocol for system APIs is checked 338 | * at runtime. 339 | * 340 | * @note The default is @p FALSE. 341 | */ 342 | #define CH_DBG_SYSTEM_STATE_CHECK TRUE 343 | 344 | /** 345 | * @brief Debug option, parameters checks. 346 | * @details If enabled then the checks on the API functions input 347 | * parameters are activated. 348 | * 349 | * @note The default is @p FALSE. 350 | */ 351 | #define CH_DBG_ENABLE_CHECKS TRUE 352 | 353 | /** 354 | * @brief Debug option, consistency checks. 355 | * @details If enabled then all the assertions in the kernel code are 356 | * activated. This includes consistency checks inside the kernel, 357 | * runtime anomalies and port-defined checks. 358 | * 359 | * @note The default is @p FALSE. 360 | */ 361 | #define CH_DBG_ENABLE_ASSERTS TRUE 362 | 363 | /** 364 | * @brief Debug option, trace buffer. 365 | * @details If enabled then the context switch circular trace buffer is 366 | * activated. 367 | * 368 | * @note The default is @p FALSE. 369 | */ 370 | #define CH_DBG_ENABLE_TRACE TRUE 371 | 372 | /** 373 | * @brief Debug option, stack checks. 374 | * @details If enabled then a runtime stack check is performed. 375 | * 376 | * @note The default is @p FALSE. 377 | * @note The stack check is performed in a architecture/port dependent way. 378 | * It may not be implemented or some ports. 379 | * @note The default failure mode is to halt the system with the global 380 | * @p panic_msg variable set to @p NULL. 381 | */ 382 | #define CH_DBG_ENABLE_STACK_CHECK TRUE 383 | 384 | /** 385 | * @brief Debug option, stacks initialization. 386 | * @details If enabled then the threads working area is filled with a byte 387 | * value when a thread is created. This can be useful for the 388 | * runtime measurement of the used stack. 389 | * 390 | * @note The default is @p FALSE. 391 | */ 392 | #define CH_DBG_FILL_THREADS TRUE 393 | 394 | /** 395 | * @brief Debug option, threads profiling. 396 | * @details If enabled then a field is added to the @p thread_t structure that 397 | * counts the system ticks occurred while executing the thread. 398 | * 399 | * @note The default is @p FALSE. 400 | * @note This debug option is not currently compatible with the 401 | * tickless mode. 402 | */ 403 | #define CH_DBG_THREADS_PROFILING FALSE 404 | 405 | /** @} */ 406 | 407 | /*===========================================================================*/ 408 | /** 409 | * @name Kernel hooks 410 | * @{ 411 | */ 412 | /*===========================================================================*/ 413 | 414 | /** 415 | * @brief Threads descriptor structure extension. 416 | * @details User fields added to the end of the @p thread_t structure. 417 | */ 418 | #define CH_CFG_THREAD_EXTRA_FIELDS \ 419 | /* Add threads custom fields here.*/ 420 | 421 | /** 422 | * @brief Threads initialization hook. 423 | * @details User initialization code added to the @p chThdInit() API. 424 | * 425 | * @note It is invoked from within @p chThdInit() and implicitly from all 426 | * the threads creation APIs. 427 | */ 428 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ 429 | /* Add threads initialization code here.*/ \ 430 | } 431 | 432 | /** 433 | * @brief Threads finalization hook. 434 | * @details User finalization code added to the @p chThdExit() API. 435 | * 436 | * @note It is inserted into lock zone. 437 | * @note It is also invoked when the threads simply return in order to 438 | * terminate. 439 | */ 440 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ 441 | /* Add threads finalization code here.*/ \ 442 | } 443 | 444 | /** 445 | * @brief Context switch hook. 446 | * @details This hook is invoked just before switching between threads. 447 | */ 448 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ 449 | /* Context switch code here.*/ \ 450 | } 451 | 452 | /** 453 | * @brief Idle thread enter hook. 454 | * @note This hook is invoked within a critical zone, no OS functions 455 | * should be invoked from here. 456 | * @note This macro can be used to activate a power saving mode. 457 | */ 458 | #define CH_CFG_IDLE_ENTER_HOOK() { \ 459 | } 460 | 461 | /** 462 | * @brief Idle thread leave hook. 463 | * @note This hook is invoked within a critical zone, no OS functions 464 | * should be invoked from here. 465 | * @note This macro can be used to deactivate a power saving mode. 466 | */ 467 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ 468 | } 469 | 470 | /** 471 | * @brief Idle Loop hook. 472 | * @details This hook is continuously invoked by the idle thread loop. 473 | */ 474 | #define CH_CFG_IDLE_LOOP_HOOK() { \ 475 | /* Idle loop code here.*/ \ 476 | } 477 | 478 | /** 479 | * @brief System tick event hook. 480 | * @details This hook is invoked in the system tick handler immediately 481 | * after processing the virtual timers queue. 482 | */ 483 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ 484 | /* System tick event code here.*/ \ 485 | } 486 | 487 | /** 488 | * @brief System halt hook. 489 | * @details This hook is invoked in case to a system halting error before 490 | * the system is halted. 491 | */ 492 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ 493 | /* System halt code here.*/ \ 494 | } 495 | 496 | /** @} */ 497 | 498 | /*===========================================================================*/ 499 | /* Port-specific settings (override port settings defaulted in chcore.h). */ 500 | /*===========================================================================*/ 501 | 502 | #endif /* _CHCONF_H_ */ 503 | 504 | /** @} */ 505 | -------------------------------------------------------------------------------- /code/bootloader/chconf.h: -------------------------------------------------------------------------------- 1 | /* 2 | ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio 3 | 4 | Licensed under the Apache License, Version 2.0 (the "License"); 5 | you may not use this file except in compliance with the License. 6 | You may obtain a copy of the License at 7 | 8 | http://www.apache.org/licenses/LICENSE-2.0 9 | 10 | Unless required by applicable law or agreed to in writing, software 11 | distributed under the License is distributed on an "AS IS" BASIS, 12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 | See the License for the specific language governing permissions and 14 | limitations under the License. 15 | */ 16 | 17 | /** 18 | * @file templates/chconf.h 19 | * @brief Configuration file template. 20 | * @details A copy of this file must be placed in each project directory, it 21 | * contains the application specific kernel settings. 22 | * 23 | * @addtogroup config 24 | * @details Kernel related settings and hooks. 25 | * @{ 26 | */ 27 | 28 | #ifndef _CHCONF_H_ 29 | #define _CHCONF_H_ 30 | 31 | #define VERSION_API 1 32 | #define VERSION_MAJOR 0 33 | #define VERSION_MINOR 1 34 | #define VERSION_PATCH 0 35 | 36 | /*===========================================================================*/ 37 | /** 38 | * @name System timers settings 39 | * @{ 40 | */ 41 | /*===========================================================================*/ 42 | 43 | /** 44 | * @brief System time counter resolution. 45 | * @note Allowed values are 16 or 32 bits. 46 | */ 47 | #define CH_CFG_ST_RESOLUTION 32 48 | 49 | /** 50 | * @brief System tick frequency. 51 | * @details Frequency of the system timer that drives the system ticks. This 52 | * setting also defines the system tick time unit. 53 | */ 54 | #define CH_CFG_ST_FREQUENCY 10000 55 | 56 | /** 57 | * @brief Time delta constant for the tick-less mode. 58 | * @note If this value is zero then the system uses the classic 59 | * periodic tick. This value represents the minimum number 60 | * of ticks that is safe to specify in a timeout directive. 61 | * The value one is not valid, timeouts are rounded up to 62 | * this value. 63 | */ 64 | #define CH_CFG_ST_TIMEDELTA 2 65 | 66 | /** @} */ 67 | 68 | /*===========================================================================*/ 69 | /** 70 | * @name Kernel parameters and options 71 | * @{ 72 | */ 73 | /*===========================================================================*/ 74 | 75 | /** 76 | * @brief Round robin interval. 77 | * @details This constant is the number of system ticks allowed for the 78 | * threads before preemption occurs. Setting this value to zero 79 | * disables the preemption for threads with equal priority and the 80 | * round robin becomes cooperative. Note that higher priority 81 | * threads can still preempt, the kernel is always preemptive. 82 | * @note Disabling the round robin preemption makes the kernel more compact 83 | * and generally faster. 84 | * @note The round robin preemption is not supported in tickless mode and 85 | * must be set to zero in that case. 86 | */ 87 | #define CH_CFG_TIME_QUANTUM 0 88 | 89 | /** 90 | * @brief Managed RAM size. 91 | * @details Size of the RAM area to be managed by the OS. If set to zero 92 | * then the whole available RAM is used. The core memory is made 93 | * available to the heap allocator and/or can be used directly through 94 | * the simplified core memory allocator. 95 | * 96 | * @note In order to let the OS manage the whole RAM the linker script must 97 | * provide the @p __heap_base__ and @p __heap_end__ symbols. 98 | * @note Requires @p CH_CFG_USE_MEMCORE. 99 | */ 100 | #define CH_CFG_MEMCORE_SIZE 0 101 | 102 | /** 103 | * @brief Idle thread automatic spawn suppression. 104 | * @details When this option is activated the function @p chSysInit() 105 | * does not spawn the idle thread. The application @p main() 106 | * function becomes the idle thread and must implement an 107 | * infinite loop. 108 | */ 109 | #define CH_CFG_NO_IDLE_THREAD FALSE 110 | 111 | /** @} */ 112 | 113 | /*===========================================================================*/ 114 | /** 115 | * @name Performance options 116 | * @{ 117 | */ 118 | /*===========================================================================*/ 119 | 120 | /** 121 | * @brief OS optimization. 122 | * @details If enabled then time efficient rather than space efficient code 123 | * is used when two possible implementations exist. 124 | * 125 | * @note This is not related to the compiler optimization options. 126 | * @note The default is @p TRUE. 127 | */ 128 | #define CH_CFG_OPTIMIZE_SPEED TRUE 129 | 130 | /** @} */ 131 | 132 | /*===========================================================================*/ 133 | /** 134 | * @name Subsystem options 135 | * @{ 136 | */ 137 | /*===========================================================================*/ 138 | 139 | /** 140 | * @brief Time Measurement APIs. 141 | * @details If enabled then the time measurement APIs are included in 142 | * the kernel. 143 | * 144 | * @note The default is @p TRUE. 145 | */ 146 | #define CH_CFG_USE_TM TRUE 147 | 148 | /** 149 | * @brief Threads registry APIs. 150 | * @details If enabled then the registry APIs are included in the kernel. 151 | * 152 | * @note The default is @p TRUE. 153 | */ 154 | #define CH_CFG_USE_REGISTRY TRUE 155 | 156 | /** 157 | * @brief Threads synchronization APIs. 158 | * @details If enabled then the @p chThdWait() function is included in 159 | * the kernel. 160 | * 161 | * @note The default is @p TRUE. 162 | */ 163 | #define CH_CFG_USE_WAITEXIT TRUE 164 | 165 | /** 166 | * @brief Semaphores APIs. 167 | * @details If enabled then the Semaphores APIs are included in the kernel. 168 | * 169 | * @note The default is @p TRUE. 170 | */ 171 | #define CH_CFG_USE_SEMAPHORES TRUE 172 | 173 | /** 174 | * @brief Semaphores queuing mode. 175 | * @details If enabled then the threads are enqueued on semaphores by 176 | * priority rather than in FIFO order. 177 | * 178 | * @note The default is @p FALSE. Enable this if you have special 179 | * requirements. 180 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 181 | */ 182 | #define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE 183 | 184 | /** 185 | * @brief Mutexes APIs. 186 | * @details If enabled then the mutexes APIs are included in the kernel. 187 | * 188 | * @note The default is @p TRUE. 189 | */ 190 | #define CH_CFG_USE_MUTEXES TRUE 191 | 192 | /** 193 | * @brief Enables recursive behavior on mutexes. 194 | * @note Recursive mutexes are heavier and have an increased 195 | * memory footprint. 196 | * 197 | * @note The default is @p FALSE. 198 | * @note Requires @p CH_CFG_USE_MUTEXES. 199 | */ 200 | #define CH_CFG_USE_MUTEXES_RECURSIVE FALSE 201 | 202 | /** 203 | * @brief Conditional Variables APIs. 204 | * @details If enabled then the conditional variables APIs are included 205 | * in the kernel. 206 | * 207 | * @note The default is @p TRUE. 208 | * @note Requires @p CH_CFG_USE_MUTEXES. 209 | */ 210 | #define CH_CFG_USE_CONDVARS TRUE 211 | 212 | /** 213 | * @brief Conditional Variables APIs with timeout. 214 | * @details If enabled then the conditional variables APIs with timeout 215 | * specification are included in the kernel. 216 | * 217 | * @note The default is @p TRUE. 218 | * @note Requires @p CH_CFG_USE_CONDVARS. 219 | */ 220 | #define CH_CFG_USE_CONDVARS_TIMEOUT TRUE 221 | 222 | /** 223 | * @brief Events Flags APIs. 224 | * @details If enabled then the event flags APIs are included in the kernel. 225 | * 226 | * @note The default is @p TRUE. 227 | */ 228 | #define CH_CFG_USE_EVENTS TRUE 229 | 230 | /** 231 | * @brief Events Flags APIs with timeout. 232 | * @details If enabled then the events APIs with timeout specification 233 | * are included in the kernel. 234 | * 235 | * @note The default is @p TRUE. 236 | * @note Requires @p CH_CFG_USE_EVENTS. 237 | */ 238 | #define CH_CFG_USE_EVENTS_TIMEOUT TRUE 239 | 240 | /** 241 | * @brief Synchronous Messages APIs. 242 | * @details If enabled then the synchronous messages APIs are included 243 | * in the kernel. 244 | * 245 | * @note The default is @p TRUE. 246 | */ 247 | #define CH_CFG_USE_MESSAGES TRUE 248 | 249 | /** 250 | * @brief Synchronous Messages queuing mode. 251 | * @details If enabled then messages are served by priority rather than in 252 | * FIFO order. 253 | * 254 | * @note The default is @p FALSE. Enable this if you have special 255 | * requirements. 256 | * @note Requires @p CH_CFG_USE_MESSAGES. 257 | */ 258 | #define CH_CFG_USE_MESSAGES_PRIORITY FALSE 259 | 260 | /** 261 | * @brief Mailboxes APIs. 262 | * @details If enabled then the asynchronous messages (mailboxes) APIs are 263 | * included in the kernel. 264 | * 265 | * @note The default is @p TRUE. 266 | * @note Requires @p CH_CFG_USE_SEMAPHORES. 267 | */ 268 | #define CH_CFG_USE_MAILBOXES TRUE 269 | 270 | /** 271 | * @brief I/O Queues APIs. 272 | * @details If enabled then the I/O queues APIs are included in the kernel. 273 | * 274 | * @note The default is @p TRUE. 275 | */ 276 | #define CH_CFG_USE_QUEUES TRUE 277 | 278 | /** 279 | * @brief Core Memory Manager APIs. 280 | * @details If enabled then the core memory manager APIs are included 281 | * in the kernel. 282 | * 283 | * @note The default is @p TRUE. 284 | */ 285 | #define CH_CFG_USE_MEMCORE TRUE 286 | 287 | /** 288 | * @brief Heap Allocator APIs. 289 | * @details If enabled then the memory heap allocator APIs are included 290 | * in the kernel. 291 | * 292 | * @note The default is @p TRUE. 293 | * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or 294 | * @p CH_CFG_USE_SEMAPHORES. 295 | * @note Mutexes are recommended. 296 | */ 297 | #define CH_CFG_USE_HEAP TRUE 298 | 299 | /** 300 | * @brief Memory Pools Allocator APIs. 301 | * @details If enabled then the memory pools allocator APIs are included 302 | * in the kernel. 303 | * 304 | * @note The default is @p TRUE. 305 | */ 306 | #define CH_CFG_USE_MEMPOOLS TRUE 307 | 308 | /** 309 | * @brief Dynamic Threads APIs. 310 | * @details If enabled then the dynamic threads creation APIs are included 311 | * in the kernel. 312 | * 313 | * @note The default is @p TRUE. 314 | * @note Requires @p CH_CFG_USE_WAITEXIT. 315 | * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. 316 | */ 317 | #define CH_CFG_USE_DYNAMIC TRUE 318 | 319 | /** @} */ 320 | 321 | /*===========================================================================*/ 322 | /** 323 | * @name Debug options 324 | * @{ 325 | */ 326 | /*===========================================================================*/ 327 | 328 | /** 329 | * @brief Debug option, kernel statistics. 330 | * 331 | * @note The default is @p FALSE. 332 | */ 333 | #define CH_DBG_STATISTICS TRUE 334 | 335 | /** 336 | * @brief Debug option, system state check. 337 | * @details If enabled the correct call protocol for system APIs is checked 338 | * at runtime. 339 | * 340 | * @note The default is @p FALSE. 341 | */ 342 | #define CH_DBG_SYSTEM_STATE_CHECK TRUE 343 | 344 | /** 345 | * @brief Debug option, parameters checks. 346 | * @details If enabled then the checks on the API functions input 347 | * parameters are activated. 348 | * 349 | * @note The default is @p FALSE. 350 | */ 351 | #define CH_DBG_ENABLE_CHECKS TRUE 352 | 353 | /** 354 | * @brief Debug option, consistency checks. 355 | * @details If enabled then all the assertions in the kernel code are 356 | * activated. This includes consistency checks inside the kernel, 357 | * runtime anomalies and port-defined checks. 358 | * 359 | * @note The default is @p FALSE. 360 | */ 361 | #define CH_DBG_ENABLE_ASSERTS TRUE 362 | 363 | /** 364 | * @brief Debug option, trace buffer. 365 | * @details If enabled then the context switch circular trace buffer is 366 | * activated. 367 | * 368 | * @note The default is @p FALSE. 369 | */ 370 | #define CH_DBG_ENABLE_TRACE TRUE 371 | 372 | /** 373 | * @brief Debug option, stack checks. 374 | * @details If enabled then a runtime stack check is performed. 375 | * 376 | * @note The default is @p FALSE. 377 | * @note The stack check is performed in a architecture/port dependent way. 378 | * It may not be implemented or some ports. 379 | * @note The default failure mode is to halt the system with the global 380 | * @p panic_msg variable set to @p NULL. 381 | */ 382 | #define CH_DBG_ENABLE_STACK_CHECK TRUE 383 | 384 | /** 385 | * @brief Debug option, stacks initialization. 386 | * @details If enabled then the threads working area is filled with a byte 387 | * value when a thread is created. This can be useful for the 388 | * runtime measurement of the used stack. 389 | * 390 | * @note The default is @p FALSE. 391 | */ 392 | #define CH_DBG_FILL_THREADS TRUE 393 | 394 | /** 395 | * @brief Debug option, threads profiling. 396 | * @details If enabled then a field is added to the @p thread_t structure that 397 | * counts the system ticks occurred while executing the thread. 398 | * 399 | * @note The default is @p FALSE. 400 | * @note This debug option is not currently compatible with the 401 | * tickless mode. 402 | */ 403 | #define CH_DBG_THREADS_PROFILING FALSE 404 | 405 | /** @} */ 406 | 407 | /*===========================================================================*/ 408 | /** 409 | * @name Kernel hooks 410 | * @{ 411 | */ 412 | /*===========================================================================*/ 413 | 414 | /** 415 | * @brief Threads descriptor structure extension. 416 | * @details User fields added to the end of the @p thread_t structure. 417 | */ 418 | #define CH_CFG_THREAD_EXTRA_FIELDS \ 419 | /* Add threads custom fields here.*/ 420 | 421 | /** 422 | * @brief Threads initialization hook. 423 | * @details User initialization code added to the @p chThdInit() API. 424 | * 425 | * @note It is invoked from within @p chThdInit() and implicitly from all 426 | * the threads creation APIs. 427 | */ 428 | #define CH_CFG_THREAD_INIT_HOOK(tp) { \ 429 | /* Add threads initialization code here.*/ \ 430 | } 431 | 432 | /** 433 | * @brief Threads finalization hook. 434 | * @details User finalization code added to the @p chThdExit() API. 435 | * 436 | * @note It is inserted into lock zone. 437 | * @note It is also invoked when the threads simply return in order to 438 | * terminate. 439 | */ 440 | #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ 441 | /* Add threads finalization code here.*/ \ 442 | } 443 | 444 | /** 445 | * @brief Context switch hook. 446 | * @details This hook is invoked just before switching between threads. 447 | */ 448 | #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ 449 | /* Context switch code here.*/ \ 450 | } 451 | 452 | /** 453 | * @brief Idle thread enter hook. 454 | * @note This hook is invoked within a critical zone, no OS functions 455 | * should be invoked from here. 456 | * @note This macro can be used to activate a power saving mode. 457 | */ 458 | #define CH_CFG_IDLE_ENTER_HOOK() { \ 459 | } 460 | 461 | /** 462 | * @brief Idle thread leave hook. 463 | * @note This hook is invoked within a critical zone, no OS functions 464 | * should be invoked from here. 465 | * @note This macro can be used to deactivate a power saving mode. 466 | */ 467 | #define CH_CFG_IDLE_LEAVE_HOOK() { \ 468 | } 469 | 470 | /** 471 | * @brief Idle Loop hook. 472 | * @details This hook is continuously invoked by the idle thread loop. 473 | */ 474 | #define CH_CFG_IDLE_LOOP_HOOK() { \ 475 | /* Idle loop code here.*/ \ 476 | } 477 | 478 | /** 479 | * @brief System tick event hook. 480 | * @details This hook is invoked in the system tick handler immediately 481 | * after processing the virtual timers queue. 482 | */ 483 | #define CH_CFG_SYSTEM_TICK_HOOK() { \ 484 | /* System tick event code here.*/ \ 485 | } 486 | 487 | /** 488 | * @brief System halt hook. 489 | * @details This hook is invoked in case to a system halting error before 490 | * the system is halted. 491 | */ 492 | #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ 493 | /* System halt code here.*/ \ 494 | } 495 | 496 | /** @} */ 497 | 498 | /*===========================================================================*/ 499 | /* Port-specific settings (override port settings defaulted in chcore.h). */ 500 | /*===========================================================================*/ 501 | 502 | #endif /* _CHCONF_H_ */ 503 | 504 | /** @} */ 505 | -------------------------------------------------------------------------------- /code/common/board_gpio.h: -------------------------------------------------------------------------------- 1 | #ifndef _BOARD_GPIO_H_ 2 | #define _BOARD_GPIO_H_ 3 | 4 | /* Generated by mx2board.py */ 5 | 6 | 7 | #define CCR_TIM1_CH1 CCR1 8 | #define CCR_TIM4_CH3 CCR4 9 | #define CCR_TIM4_CH4 CCR4 10 | #define CHN_TIM1_CH1 0 11 | #define CHN_TIM4_CH3 2 12 | #define CHN_TIM4_CH4 3 13 | #define ICUD_TIM1_CH1 ICUD1 14 | #define ICUD_TIM4_CH3 ICUD4 15 | #define ICUD_TIM4_CH4 ICUD4 16 | #define PAD_BUTTON1 13 17 | #define PAD_CAN_RS 14 18 | #define PAD_CAN_RX 11 19 | #define PAD_CAN_TX 12 20 | #define PAD_HEATER_PWM 14 21 | #define PAD_I2C1_SCL 6 22 | #define PAD_I2C1_SDA 7 23 | #define PAD_OPAMP3_VINM 2 24 | #define PAD_OPAMP3_VINP 0 25 | #define PAD_OPAMP3_VOUT 1 26 | #define PAD_OPAMP4_VINP 11 27 | #define PAD_OPAMP4_VOUT 12 28 | #define PAD_SYS_JTCK_SWCLK 14 29 | #define PAD_SYS_JTMS_SWDIO 13 30 | #define PAD_TIM1_CH1 8 31 | #define PAD_TIM4_CH3 8 32 | #define PAD_TIM4_CH4 9 33 | #define PAD_USART1_RX 10 34 | #define PAD_USART1_TX 9 35 | #define PORT_BUTTON1 GPIOC 36 | #define PORT_CAN_RS GPIOC 37 | #define PORT_CAN_RX GPIOA 38 | #define PORT_CAN_TX GPIOA 39 | #define PORT_HEATER_PWM GPIOB 40 | #define PORT_I2C1_SCL GPIOB 41 | #define PORT_I2C1_SDA GPIOB 42 | #define PORT_OPAMP3_VINM GPIOB 43 | #define PORT_OPAMP3_VINP GPIOB 44 | #define PORT_OPAMP3_VOUT GPIOB 45 | #define PORT_OPAMP4_VINP GPIOB 46 | #define PORT_OPAMP4_VOUT GPIOB 47 | #define PORT_SYS_JTCK_SWCLK GPIOA 48 | #define PORT_SYS_JTMS_SWDIO GPIOA 49 | #define PORT_TIM1_CH1 GPIOA 50 | #define PORT_TIM4_CH3 GPIOB 51 | #define PORT_TIM4_CH4 GPIOB 52 | #define PORT_USART1_RX GPIOA 53 | #define PORT_USART1_TX GPIOA 54 | #define PWMD_TIM1_CH1 PWMD1 55 | #define PWMD_TIM4_CH3 PWMD4 56 | #define PWMD_TIM4_CH4 PWMD4 57 | #define TIM_TIM1_CH1 TIM1 58 | #define TIM_TIM4_CH3 TIM4 59 | #define TIM_TIM4_CH4 TIM4 60 | 61 | 62 | /* PORT A */ 63 | #define VAL_GPIOA_MODER ( \ 64 | PIN_MODE_ANALOG(0) | \ 65 | PIN_MODE_ANALOG(1) | \ 66 | PIN_MODE_ANALOG(2) | \ 67 | PIN_MODE_ANALOG(3) | \ 68 | PIN_MODE_ANALOG(4) | \ 69 | PIN_MODE_ANALOG(5) | \ 70 | PIN_MODE_ANALOG(6) | \ 71 | PIN_MODE_ANALOG(7) | \ 72 | PIN_MODE_ALTERNATE(8) | \ 73 | PIN_MODE_ALTERNATE(9) | \ 74 | PIN_MODE_ALTERNATE(10) | \ 75 | PIN_MODE_ALTERNATE(11) | \ 76 | PIN_MODE_ALTERNATE(12) | \ 77 | PIN_MODE_ALTERNATE(13) | \ 78 | PIN_MODE_ALTERNATE(14) | \ 79 | PIN_MODE_ANALOG(15) | \ 80 | 0) 81 | 82 | #define VAL_GPIOA_OTYPER ( \ 83 | PIN_OTYPE_PUSHPULL(0) | \ 84 | PIN_OTYPE_PUSHPULL(1) | \ 85 | PIN_OTYPE_PUSHPULL(2) | \ 86 | PIN_OTYPE_PUSHPULL(3) | \ 87 | PIN_OTYPE_PUSHPULL(4) | \ 88 | PIN_OTYPE_PUSHPULL(5) | \ 89 | PIN_OTYPE_PUSHPULL(6) | \ 90 | PIN_OTYPE_PUSHPULL(7) | \ 91 | PIN_OTYPE_PUSHPULL(8) | \ 92 | PIN_OTYPE_PUSHPULL(9) | \ 93 | PIN_OTYPE_PUSHPULL(10) | \ 94 | PIN_OTYPE_PUSHPULL(11) | \ 95 | PIN_OTYPE_PUSHPULL(12) | \ 96 | PIN_OTYPE_PUSHPULL(13) | \ 97 | PIN_OTYPE_PUSHPULL(14) | \ 98 | PIN_OTYPE_PUSHPULL(15) | \ 99 | 0) 100 | 101 | #define VAL_GPIOA_OSPEEDR ( \ 102 | PIN_OSPEED_VERYLOW(0) | \ 103 | PIN_OSPEED_VERYLOW(1) | \ 104 | PIN_OSPEED_VERYLOW(2) | \ 105 | PIN_OSPEED_VERYLOW(3) | \ 106 | PIN_OSPEED_VERYLOW(4) | \ 107 | PIN_OSPEED_VERYLOW(5) | \ 108 | PIN_OSPEED_VERYLOW(6) | \ 109 | PIN_OSPEED_VERYLOW(7) | \ 110 | PIN_OSPEED_MEDIUM(8) | \ 111 | PIN_OSPEED_MEDIUM(9) | \ 112 | PIN_OSPEED_MEDIUM(10) | \ 113 | PIN_OSPEED_MEDIUM(11) | \ 114 | PIN_OSPEED_MEDIUM(12) | \ 115 | PIN_OSPEED_MEDIUM(13) | \ 116 | PIN_OSPEED_MEDIUM(14) | \ 117 | PIN_OSPEED_VERYLOW(15) | \ 118 | 0) 119 | 120 | #define VAL_GPIOA_PUPDR ( \ 121 | PIN_PUPDR_PULLUP(0) | \ 122 | PIN_PUPDR_PULLUP(1) | \ 123 | PIN_PUPDR_PULLUP(2) | \ 124 | PIN_PUPDR_PULLUP(3) | \ 125 | PIN_PUPDR_PULLUP(4) | \ 126 | PIN_PUPDR_PULLUP(5) | \ 127 | PIN_PUPDR_PULLUP(6) | \ 128 | PIN_PUPDR_PULLUP(7) | \ 129 | PIN_PUPDR_PULLUP(8) | \ 130 | PIN_PUPDR_PULLUP(9) | \ 131 | PIN_PUPDR_PULLUP(10) | \ 132 | PIN_PUPDR_PULLUP(11) | \ 133 | PIN_PUPDR_PULLUP(12) | \ 134 | PIN_PUPDR_PULLUP(13) | \ 135 | PIN_PUPDR_PULLUP(14) | \ 136 | PIN_PUPDR_PULLUP(15) | \ 137 | 0) 138 | 139 | #define VAL_GPIOA_ODR ( \ 140 | PIN_ODR_HIGH(0) | \ 141 | PIN_ODR_HIGH(1) | \ 142 | PIN_ODR_HIGH(2) | \ 143 | PIN_ODR_HIGH(3) | \ 144 | PIN_ODR_HIGH(4) | \ 145 | PIN_ODR_HIGH(5) | \ 146 | PIN_ODR_HIGH(6) | \ 147 | PIN_ODR_HIGH(7) | \ 148 | PIN_ODR_HIGH(8) | \ 149 | PIN_ODR_HIGH(9) | \ 150 | PIN_ODR_HIGH(10) | \ 151 | PIN_ODR_HIGH(11) | \ 152 | PIN_ODR_HIGH(12) | \ 153 | PIN_ODR_HIGH(13) | \ 154 | PIN_ODR_HIGH(14) | \ 155 | PIN_ODR_HIGH(15) | \ 156 | 0) 157 | 158 | #define VAL_GPIOA_AFRL ( \ 159 | PIN_AFIO_AF(0, 0) | \ 160 | PIN_AFIO_AF(1, 0) | \ 161 | PIN_AFIO_AF(2, 0) | \ 162 | PIN_AFIO_AF(3, 0) | \ 163 | PIN_AFIO_AF(4, 0) | \ 164 | PIN_AFIO_AF(5, 0) | \ 165 | PIN_AFIO_AF(6, 0) | \ 166 | PIN_AFIO_AF(7, 0) | \ 167 | 0) 168 | 169 | #define VAL_GPIOA_AFRH ( \ 170 | PIN_AFIO_AF(8, 6) | \ 171 | PIN_AFIO_AF(9, 7) | \ 172 | PIN_AFIO_AF(10, 7) | \ 173 | PIN_AFIO_AF(11, 9) | \ 174 | PIN_AFIO_AF(12, 9) | \ 175 | PIN_AFIO_AF(13, 0) | \ 176 | PIN_AFIO_AF(14, 0) | \ 177 | PIN_AFIO_AF(15, 0) | \ 178 | 0) 179 | 180 | /* PORT B */ 181 | #define VAL_GPIOB_MODER ( \ 182 | PIN_MODE_ALTERNATE(0) | \ 183 | PIN_MODE_ALTERNATE(1) | \ 184 | PIN_MODE_ALTERNATE(2) | \ 185 | PIN_MODE_ANALOG(3) | \ 186 | PIN_MODE_ANALOG(4) | \ 187 | PIN_MODE_ANALOG(5) | \ 188 | PIN_MODE_ALTERNATE(6) | \ 189 | PIN_MODE_ALTERNATE(7) | \ 190 | PIN_MODE_ALTERNATE(8) | \ 191 | PIN_MODE_ALTERNATE(9) | \ 192 | PIN_MODE_ANALOG(10) | \ 193 | PIN_MODE_ALTERNATE(11) | \ 194 | PIN_MODE_ALTERNATE(12) | \ 195 | PIN_MODE_ANALOG(13) | \ 196 | PIN_MODE_ALTERNATE(14) | \ 197 | PIN_MODE_ANALOG(15) | \ 198 | 0) 199 | 200 | #define VAL_GPIOB_OTYPER ( \ 201 | PIN_OTYPE_PUSHPULL(0) | \ 202 | PIN_OTYPE_PUSHPULL(1) | \ 203 | PIN_OTYPE_PUSHPULL(2) | \ 204 | PIN_OTYPE_PUSHPULL(3) | \ 205 | PIN_OTYPE_PUSHPULL(4) | \ 206 | PIN_OTYPE_PUSHPULL(5) | \ 207 | PIN_OTYPE_PUSHPULL(6) | \ 208 | PIN_OTYPE_PUSHPULL(7) | \ 209 | PIN_OTYPE_PUSHPULL(8) | \ 210 | PIN_OTYPE_PUSHPULL(9) | \ 211 | PIN_OTYPE_PUSHPULL(10) | \ 212 | PIN_OTYPE_PUSHPULL(11) | \ 213 | PIN_OTYPE_PUSHPULL(12) | \ 214 | PIN_OTYPE_PUSHPULL(13) | \ 215 | PIN_OTYPE_PUSHPULL(14) | \ 216 | PIN_OTYPE_PUSHPULL(15) | \ 217 | 0) 218 | 219 | #define VAL_GPIOB_OSPEEDR ( \ 220 | PIN_OSPEED_MEDIUM(0) | \ 221 | PIN_OSPEED_MEDIUM(1) | \ 222 | PIN_OSPEED_MEDIUM(2) | \ 223 | PIN_OSPEED_VERYLOW(3) | \ 224 | PIN_OSPEED_VERYLOW(4) | \ 225 | PIN_OSPEED_VERYLOW(5) | \ 226 | PIN_OSPEED_MEDIUM(6) | \ 227 | PIN_OSPEED_MEDIUM(7) | \ 228 | PIN_OSPEED_MEDIUM(8) | \ 229 | PIN_OSPEED_MEDIUM(9) | \ 230 | PIN_OSPEED_VERYLOW(10) | \ 231 | PIN_OSPEED_MEDIUM(11) | \ 232 | PIN_OSPEED_MEDIUM(12) | \ 233 | PIN_OSPEED_VERYLOW(13) | \ 234 | PIN_OSPEED_MEDIUM(14) | \ 235 | PIN_OSPEED_VERYLOW(15) | \ 236 | 0) 237 | 238 | #define VAL_GPIOB_PUPDR ( \ 239 | PIN_PUPDR_PULLUP(0) | \ 240 | PIN_PUPDR_PULLUP(1) | \ 241 | PIN_PUPDR_PULLUP(2) | \ 242 | PIN_PUPDR_PULLUP(3) | \ 243 | PIN_PUPDR_PULLUP(4) | \ 244 | PIN_PUPDR_PULLUP(5) | \ 245 | PIN_PUPDR_PULLUP(6) | \ 246 | PIN_PUPDR_PULLUP(7) | \ 247 | PIN_PUPDR_PULLUP(8) | \ 248 | PIN_PUPDR_PULLUP(9) | \ 249 | PIN_PUPDR_PULLUP(10) | \ 250 | PIN_PUPDR_PULLUP(11) | \ 251 | PIN_PUPDR_PULLUP(12) | \ 252 | PIN_PUPDR_PULLUP(13) | \ 253 | PIN_PUPDR_PULLUP(14) | \ 254 | PIN_PUPDR_PULLUP(15) | \ 255 | 0) 256 | 257 | #define VAL_GPIOB_ODR ( \ 258 | PIN_ODR_HIGH(0) | \ 259 | PIN_ODR_HIGH(1) | \ 260 | PIN_ODR_HIGH(2) | \ 261 | PIN_ODR_HIGH(3) | \ 262 | PIN_ODR_HIGH(4) | \ 263 | PIN_ODR_HIGH(5) | \ 264 | PIN_ODR_HIGH(6) | \ 265 | PIN_ODR_HIGH(7) | \ 266 | PIN_ODR_HIGH(8) | \ 267 | PIN_ODR_HIGH(9) | \ 268 | PIN_ODR_HIGH(10) | \ 269 | PIN_ODR_HIGH(11) | \ 270 | PIN_ODR_HIGH(12) | \ 271 | PIN_ODR_HIGH(13) | \ 272 | PIN_ODR_HIGH(14) | \ 273 | PIN_ODR_HIGH(15) | \ 274 | 0) 275 | 276 | #define VAL_GPIOB_AFRL ( \ 277 | PIN_AFIO_AF(0, 0) | \ 278 | PIN_AFIO_AF(1, 0) | \ 279 | PIN_AFIO_AF(2, 0) | \ 280 | PIN_AFIO_AF(3, 0) | \ 281 | PIN_AFIO_AF(4, 0) | \ 282 | PIN_AFIO_AF(5, 0) | \ 283 | PIN_AFIO_AF(6, 4) | \ 284 | PIN_AFIO_AF(7, 4) | \ 285 | 0) 286 | 287 | #define VAL_GPIOB_AFRH ( \ 288 | PIN_AFIO_AF(8, 2) | \ 289 | PIN_AFIO_AF(9, 2) | \ 290 | PIN_AFIO_AF(10, 0) | \ 291 | PIN_AFIO_AF(11, 0) | \ 292 | PIN_AFIO_AF(12, 0) | \ 293 | PIN_AFIO_AF(13, 0) | \ 294 | PIN_AFIO_AF(14, 1) | \ 295 | PIN_AFIO_AF(15, 0) | \ 296 | 0) 297 | 298 | /* PORT C */ 299 | #define VAL_GPIOC_MODER ( \ 300 | PIN_MODE_ANALOG(0) | \ 301 | PIN_MODE_ANALOG(1) | \ 302 | PIN_MODE_ANALOG(2) | \ 303 | PIN_MODE_ANALOG(3) | \ 304 | PIN_MODE_ANALOG(4) | \ 305 | PIN_MODE_ANALOG(5) | \ 306 | PIN_MODE_ANALOG(6) | \ 307 | PIN_MODE_ANALOG(7) | \ 308 | PIN_MODE_ANALOG(8) | \ 309 | PIN_MODE_ANALOG(9) | \ 310 | PIN_MODE_ANALOG(10) | \ 311 | PIN_MODE_ANALOG(11) | \ 312 | PIN_MODE_ANALOG(12) | \ 313 | PIN_MODE_INPUT(13) | \ 314 | PIN_MODE_OUTPUT(14) | \ 315 | PIN_MODE_ANALOG(15) | \ 316 | 0) 317 | 318 | #define VAL_GPIOC_OTYPER ( \ 319 | PIN_OTYPE_PUSHPULL(0) | \ 320 | PIN_OTYPE_PUSHPULL(1) | \ 321 | PIN_OTYPE_PUSHPULL(2) | \ 322 | PIN_OTYPE_PUSHPULL(3) | \ 323 | PIN_OTYPE_PUSHPULL(4) | \ 324 | PIN_OTYPE_PUSHPULL(5) | \ 325 | PIN_OTYPE_PUSHPULL(6) | \ 326 | PIN_OTYPE_PUSHPULL(7) | \ 327 | PIN_OTYPE_PUSHPULL(8) | \ 328 | PIN_OTYPE_PUSHPULL(9) | \ 329 | PIN_OTYPE_PUSHPULL(10) | \ 330 | PIN_OTYPE_PUSHPULL(11) | \ 331 | PIN_OTYPE_PUSHPULL(12) | \ 332 | PIN_OTYPE_PUSHPULL(13) | \ 333 | PIN_OTYPE_OPENDRAIN(14) | \ 334 | PIN_OTYPE_PUSHPULL(15) | \ 335 | 0) 336 | 337 | #define VAL_GPIOC_OSPEEDR ( \ 338 | PIN_OSPEED_VERYLOW(0) | \ 339 | PIN_OSPEED_VERYLOW(1) | \ 340 | PIN_OSPEED_VERYLOW(2) | \ 341 | PIN_OSPEED_VERYLOW(3) | \ 342 | PIN_OSPEED_VERYLOW(4) | \ 343 | PIN_OSPEED_VERYLOW(5) | \ 344 | PIN_OSPEED_VERYLOW(6) | \ 345 | PIN_OSPEED_VERYLOW(7) | \ 346 | PIN_OSPEED_VERYLOW(8) | \ 347 | PIN_OSPEED_VERYLOW(9) | \ 348 | PIN_OSPEED_VERYLOW(10) | \ 349 | PIN_OSPEED_VERYLOW(11) | \ 350 | PIN_OSPEED_VERYLOW(12) | \ 351 | PIN_OSPEED_VERYLOW(13) | \ 352 | PIN_OSPEED_VERYLOW(14) | \ 353 | PIN_OSPEED_VERYLOW(15) | \ 354 | 0) 355 | 356 | #define VAL_GPIOC_PUPDR ( \ 357 | PIN_PUPDR_PULLUP(0) | \ 358 | PIN_PUPDR_PULLUP(1) | \ 359 | PIN_PUPDR_PULLUP(2) | \ 360 | PIN_PUPDR_PULLUP(3) | \ 361 | PIN_PUPDR_PULLUP(4) | \ 362 | PIN_PUPDR_PULLUP(5) | \ 363 | PIN_PUPDR_PULLUP(6) | \ 364 | PIN_PUPDR_PULLUP(7) | \ 365 | PIN_PUPDR_PULLUP(8) | \ 366 | PIN_PUPDR_PULLUP(9) | \ 367 | PIN_PUPDR_PULLUP(10) | \ 368 | PIN_PUPDR_PULLUP(11) | \ 369 | PIN_PUPDR_PULLUP(12) | \ 370 | PIN_PUPDR_PULLUP(13) | \ 371 | PIN_PUPDR_PULLUP(14) | \ 372 | PIN_PUPDR_PULLUP(15) | \ 373 | 0) 374 | 375 | #define VAL_GPIOC_ODR ( \ 376 | PIN_ODR_HIGH(0) | \ 377 | PIN_ODR_HIGH(1) | \ 378 | PIN_ODR_HIGH(2) | \ 379 | PIN_ODR_HIGH(3) | \ 380 | PIN_ODR_HIGH(4) | \ 381 | PIN_ODR_HIGH(5) | \ 382 | PIN_ODR_HIGH(6) | \ 383 | PIN_ODR_HIGH(7) | \ 384 | PIN_ODR_HIGH(8) | \ 385 | PIN_ODR_HIGH(9) | \ 386 | PIN_ODR_HIGH(10) | \ 387 | PIN_ODR_HIGH(11) | \ 388 | PIN_ODR_HIGH(12) | \ 389 | PIN_ODR_HIGH(13) | \ 390 | PIN_ODR_HIGH(14) | \ 391 | PIN_ODR_HIGH(15) | \ 392 | 0) 393 | 394 | #define VAL_GPIOC_AFRL ( \ 395 | PIN_AFIO_AF(0, 0) | \ 396 | PIN_AFIO_AF(1, 0) | \ 397 | PIN_AFIO_AF(2, 0) | \ 398 | PIN_AFIO_AF(3, 0) | \ 399 | PIN_AFIO_AF(4, 0) | \ 400 | PIN_AFIO_AF(5, 0) | \ 401 | PIN_AFIO_AF(6, 0) | \ 402 | PIN_AFIO_AF(7, 0) | \ 403 | 0) 404 | 405 | #define VAL_GPIOC_AFRH ( \ 406 | PIN_AFIO_AF(8, 0) | \ 407 | PIN_AFIO_AF(9, 0) | \ 408 | PIN_AFIO_AF(10, 0) | \ 409 | PIN_AFIO_AF(11, 0) | \ 410 | PIN_AFIO_AF(12, 0) | \ 411 | PIN_AFIO_AF(13, 0) | \ 412 | PIN_AFIO_AF(14, 0) | \ 413 | PIN_AFIO_AF(15, 0) | \ 414 | 0) 415 | 416 | /* PORT D */ 417 | #define VAL_GPIOD_MODER ( \ 418 | PIN_MODE_ANALOG(0) | \ 419 | PIN_MODE_ANALOG(1) | \ 420 | PIN_MODE_ANALOG(2) | \ 421 | PIN_MODE_ANALOG(3) | \ 422 | PIN_MODE_ANALOG(4) | \ 423 | PIN_MODE_ANALOG(5) | \ 424 | PIN_MODE_ANALOG(6) | \ 425 | PIN_MODE_ANALOG(7) | \ 426 | PIN_MODE_ANALOG(8) | \ 427 | PIN_MODE_ANALOG(9) | \ 428 | PIN_MODE_ANALOG(10) | \ 429 | PIN_MODE_ANALOG(11) | \ 430 | PIN_MODE_ANALOG(12) | \ 431 | PIN_MODE_ANALOG(13) | \ 432 | PIN_MODE_ANALOG(14) | \ 433 | PIN_MODE_ANALOG(15) | \ 434 | 0) 435 | 436 | #define VAL_GPIOD_OTYPER ( \ 437 | PIN_OTYPE_PUSHPULL(0) | \ 438 | PIN_OTYPE_PUSHPULL(1) | \ 439 | PIN_OTYPE_PUSHPULL(2) | \ 440 | PIN_OTYPE_PUSHPULL(3) | \ 441 | PIN_OTYPE_PUSHPULL(4) | \ 442 | PIN_OTYPE_PUSHPULL(5) | \ 443 | PIN_OTYPE_PUSHPULL(6) | \ 444 | PIN_OTYPE_PUSHPULL(7) | \ 445 | PIN_OTYPE_PUSHPULL(8) | \ 446 | PIN_OTYPE_PUSHPULL(9) | \ 447 | PIN_OTYPE_PUSHPULL(10) | \ 448 | PIN_OTYPE_PUSHPULL(11) | \ 449 | PIN_OTYPE_PUSHPULL(12) | \ 450 | PIN_OTYPE_PUSHPULL(13) | \ 451 | PIN_OTYPE_PUSHPULL(14) | \ 452 | PIN_OTYPE_PUSHPULL(15) | \ 453 | 0) 454 | 455 | #define VAL_GPIOD_OSPEEDR ( \ 456 | PIN_OSPEED_VERYLOW(0) | \ 457 | PIN_OSPEED_VERYLOW(1) | \ 458 | PIN_OSPEED_VERYLOW(2) | \ 459 | PIN_OSPEED_VERYLOW(3) | \ 460 | PIN_OSPEED_VERYLOW(4) | \ 461 | PIN_OSPEED_VERYLOW(5) | \ 462 | PIN_OSPEED_VERYLOW(6) | \ 463 | PIN_OSPEED_VERYLOW(7) | \ 464 | PIN_OSPEED_VERYLOW(8) | \ 465 | PIN_OSPEED_VERYLOW(9) | \ 466 | PIN_OSPEED_VERYLOW(10) | \ 467 | PIN_OSPEED_VERYLOW(11) | \ 468 | PIN_OSPEED_VERYLOW(12) | \ 469 | PIN_OSPEED_VERYLOW(13) | \ 470 | PIN_OSPEED_VERYLOW(14) | \ 471 | PIN_OSPEED_VERYLOW(15) | \ 472 | 0) 473 | 474 | #define VAL_GPIOD_PUPDR ( \ 475 | PIN_PUPDR_PULLUP(0) | \ 476 | PIN_PUPDR_PULLUP(1) | \ 477 | PIN_PUPDR_PULLUP(2) | \ 478 | PIN_PUPDR_PULLUP(3) | \ 479 | PIN_PUPDR_PULLUP(4) | \ 480 | PIN_PUPDR_PULLUP(5) | \ 481 | PIN_PUPDR_PULLUP(6) | \ 482 | PIN_PUPDR_PULLUP(7) | \ 483 | PIN_PUPDR_PULLUP(8) | \ 484 | PIN_PUPDR_PULLUP(9) | \ 485 | PIN_PUPDR_PULLUP(10) | \ 486 | PIN_PUPDR_PULLUP(11) | \ 487 | PIN_PUPDR_PULLUP(12) | \ 488 | PIN_PUPDR_PULLUP(13) | \ 489 | PIN_PUPDR_PULLUP(14) | \ 490 | PIN_PUPDR_PULLUP(15) | \ 491 | 0) 492 | 493 | #define VAL_GPIOD_ODR ( \ 494 | PIN_ODR_HIGH(0) | \ 495 | PIN_ODR_HIGH(1) | \ 496 | PIN_ODR_HIGH(2) | \ 497 | PIN_ODR_HIGH(3) | \ 498 | PIN_ODR_HIGH(4) | \ 499 | PIN_ODR_HIGH(5) | \ 500 | PIN_ODR_HIGH(6) | \ 501 | PIN_ODR_HIGH(7) | \ 502 | PIN_ODR_HIGH(8) | \ 503 | PIN_ODR_HIGH(9) | \ 504 | PIN_ODR_HIGH(10) | \ 505 | PIN_ODR_HIGH(11) | \ 506 | PIN_ODR_HIGH(12) | \ 507 | PIN_ODR_HIGH(13) | \ 508 | PIN_ODR_HIGH(14) | \ 509 | PIN_ODR_HIGH(15) | \ 510 | 0) 511 | 512 | #define VAL_GPIOD_AFRL ( \ 513 | PIN_AFIO_AF(0, 0) | \ 514 | PIN_AFIO_AF(1, 0) | \ 515 | PIN_AFIO_AF(2, 0) | \ 516 | PIN_AFIO_AF(3, 0) | \ 517 | PIN_AFIO_AF(4, 0) | \ 518 | PIN_AFIO_AF(5, 0) | \ 519 | PIN_AFIO_AF(6, 0) | \ 520 | PIN_AFIO_AF(7, 0) | \ 521 | 0) 522 | 523 | #define VAL_GPIOD_AFRH ( \ 524 | PIN_AFIO_AF(8, 0) | \ 525 | PIN_AFIO_AF(9, 0) | \ 526 | PIN_AFIO_AF(10, 0) | \ 527 | PIN_AFIO_AF(11, 0) | \ 528 | PIN_AFIO_AF(12, 0) | \ 529 | PIN_AFIO_AF(13, 0) | \ 530 | PIN_AFIO_AF(14, 0) | \ 531 | PIN_AFIO_AF(15, 0) | \ 532 | 0) 533 | 534 | /* PORT E */ 535 | #define VAL_GPIOE_MODER ( \ 536 | PIN_MODE_ANALOG(0) | \ 537 | PIN_MODE_ANALOG(1) | \ 538 | PIN_MODE_ANALOG(2) | \ 539 | PIN_MODE_ANALOG(3) | \ 540 | PIN_MODE_ANALOG(4) | \ 541 | PIN_MODE_ANALOG(5) | \ 542 | PIN_MODE_ANALOG(6) | \ 543 | PIN_MODE_ANALOG(7) | \ 544 | PIN_MODE_ANALOG(8) | \ 545 | PIN_MODE_ANALOG(9) | \ 546 | PIN_MODE_ANALOG(10) | \ 547 | PIN_MODE_ANALOG(11) | \ 548 | PIN_MODE_ANALOG(12) | \ 549 | PIN_MODE_ANALOG(13) | \ 550 | PIN_MODE_ANALOG(14) | \ 551 | PIN_MODE_ANALOG(15) | \ 552 | 0) 553 | 554 | #define VAL_GPIOE_OTYPER ( \ 555 | PIN_OTYPE_PUSHPULL(0) | \ 556 | PIN_OTYPE_PUSHPULL(1) | \ 557 | PIN_OTYPE_PUSHPULL(2) | \ 558 | PIN_OTYPE_PUSHPULL(3) | \ 559 | PIN_OTYPE_PUSHPULL(4) | \ 560 | PIN_OTYPE_PUSHPULL(5) | \ 561 | PIN_OTYPE_PUSHPULL(6) | \ 562 | PIN_OTYPE_PUSHPULL(7) | \ 563 | PIN_OTYPE_PUSHPULL(8) | \ 564 | PIN_OTYPE_PUSHPULL(9) | \ 565 | PIN_OTYPE_PUSHPULL(10) | \ 566 | PIN_OTYPE_PUSHPULL(11) | \ 567 | PIN_OTYPE_PUSHPULL(12) | \ 568 | PIN_OTYPE_PUSHPULL(13) | \ 569 | PIN_OTYPE_PUSHPULL(14) | \ 570 | PIN_OTYPE_PUSHPULL(15) | \ 571 | 0) 572 | 573 | #define VAL_GPIOE_OSPEEDR ( \ 574 | PIN_OSPEED_VERYLOW(0) | \ 575 | PIN_OSPEED_VERYLOW(1) | \ 576 | PIN_OSPEED_VERYLOW(2) | \ 577 | PIN_OSPEED_VERYLOW(3) | \ 578 | PIN_OSPEED_VERYLOW(4) | \ 579 | PIN_OSPEED_VERYLOW(5) | \ 580 | PIN_OSPEED_VERYLOW(6) | \ 581 | PIN_OSPEED_VERYLOW(7) | \ 582 | PIN_OSPEED_VERYLOW(8) | \ 583 | PIN_OSPEED_VERYLOW(9) | \ 584 | PIN_OSPEED_VERYLOW(10) | \ 585 | PIN_OSPEED_VERYLOW(11) | \ 586 | PIN_OSPEED_VERYLOW(12) | \ 587 | PIN_OSPEED_VERYLOW(13) | \ 588 | PIN_OSPEED_VERYLOW(14) | \ 589 | PIN_OSPEED_VERYLOW(15) | \ 590 | 0) 591 | 592 | #define VAL_GPIOE_PUPDR ( \ 593 | PIN_PUPDR_PULLUP(0) | \ 594 | PIN_PUPDR_PULLUP(1) | \ 595 | PIN_PUPDR_PULLUP(2) | \ 596 | PIN_PUPDR_PULLUP(3) | \ 597 | PIN_PUPDR_PULLUP(4) | \ 598 | PIN_PUPDR_PULLUP(5) | \ 599 | PIN_PUPDR_PULLUP(6) | \ 600 | PIN_PUPDR_PULLUP(7) | \ 601 | PIN_PUPDR_PULLUP(8) | \ 602 | PIN_PUPDR_PULLUP(9) | \ 603 | PIN_PUPDR_PULLUP(10) | \ 604 | PIN_PUPDR_PULLUP(11) | \ 605 | PIN_PUPDR_PULLUP(12) | \ 606 | PIN_PUPDR_PULLUP(13) | \ 607 | PIN_PUPDR_PULLUP(14) | \ 608 | PIN_PUPDR_PULLUP(15) | \ 609 | 0) 610 | 611 | #define VAL_GPIOE_ODR ( \ 612 | PIN_ODR_HIGH(0) | \ 613 | PIN_ODR_HIGH(1) | \ 614 | PIN_ODR_HIGH(2) | \ 615 | PIN_ODR_HIGH(3) | \ 616 | PIN_ODR_HIGH(4) | \ 617 | PIN_ODR_HIGH(5) | \ 618 | PIN_ODR_HIGH(6) | \ 619 | PIN_ODR_HIGH(7) | \ 620 | PIN_ODR_HIGH(8) | \ 621 | PIN_ODR_HIGH(9) | \ 622 | PIN_ODR_HIGH(10) | \ 623 | PIN_ODR_HIGH(11) | \ 624 | PIN_ODR_HIGH(12) | \ 625 | PIN_ODR_HIGH(13) | \ 626 | PIN_ODR_HIGH(14) | \ 627 | PIN_ODR_HIGH(15) | \ 628 | 0) 629 | 630 | #define VAL_GPIOE_AFRL ( \ 631 | PIN_AFIO_AF(0, 0) | \ 632 | PIN_AFIO_AF(1, 0) | \ 633 | PIN_AFIO_AF(2, 0) | \ 634 | PIN_AFIO_AF(3, 0) | \ 635 | PIN_AFIO_AF(4, 0) | \ 636 | PIN_AFIO_AF(5, 0) | \ 637 | PIN_AFIO_AF(6, 0) | \ 638 | PIN_AFIO_AF(7, 0) | \ 639 | 0) 640 | 641 | #define VAL_GPIOE_AFRH ( \ 642 | PIN_AFIO_AF(8, 0) | \ 643 | PIN_AFIO_AF(9, 0) | \ 644 | PIN_AFIO_AF(10, 0) | \ 645 | PIN_AFIO_AF(11, 0) | \ 646 | PIN_AFIO_AF(12, 0) | \ 647 | PIN_AFIO_AF(13, 0) | \ 648 | PIN_AFIO_AF(14, 0) | \ 649 | PIN_AFIO_AF(15, 0) | \ 650 | 0) 651 | 652 | /* PORT F */ 653 | #define VAL_GPIOF_MODER ( \ 654 | PIN_MODE_ANALOG(0) | \ 655 | PIN_MODE_ANALOG(1) | \ 656 | PIN_MODE_ANALOG(2) | \ 657 | PIN_MODE_ANALOG(3) | \ 658 | PIN_MODE_ANALOG(4) | \ 659 | PIN_MODE_ANALOG(5) | \ 660 | PIN_MODE_ANALOG(6) | \ 661 | PIN_MODE_ANALOG(7) | \ 662 | PIN_MODE_ANALOG(8) | \ 663 | PIN_MODE_ANALOG(9) | \ 664 | PIN_MODE_ANALOG(10) | \ 665 | PIN_MODE_ANALOG(11) | \ 666 | PIN_MODE_ANALOG(12) | \ 667 | PIN_MODE_ANALOG(13) | \ 668 | PIN_MODE_ANALOG(14) | \ 669 | PIN_MODE_ANALOG(15) | \ 670 | 0) 671 | 672 | #define VAL_GPIOF_OTYPER ( \ 673 | PIN_OTYPE_PUSHPULL(0) | \ 674 | PIN_OTYPE_PUSHPULL(1) | \ 675 | PIN_OTYPE_PUSHPULL(2) | \ 676 | PIN_OTYPE_PUSHPULL(3) | \ 677 | PIN_OTYPE_PUSHPULL(4) | \ 678 | PIN_OTYPE_PUSHPULL(5) | \ 679 | PIN_OTYPE_PUSHPULL(6) | \ 680 | PIN_OTYPE_PUSHPULL(7) | \ 681 | PIN_OTYPE_PUSHPULL(8) | \ 682 | PIN_OTYPE_PUSHPULL(9) | \ 683 | PIN_OTYPE_PUSHPULL(10) | \ 684 | PIN_OTYPE_PUSHPULL(11) | \ 685 | PIN_OTYPE_PUSHPULL(12) | \ 686 | PIN_OTYPE_PUSHPULL(13) | \ 687 | PIN_OTYPE_PUSHPULL(14) | \ 688 | PIN_OTYPE_PUSHPULL(15) | \ 689 | 0) 690 | 691 | #define VAL_GPIOF_OSPEEDR ( \ 692 | PIN_OSPEED_VERYLOW(0) | \ 693 | PIN_OSPEED_VERYLOW(1) | \ 694 | PIN_OSPEED_VERYLOW(2) | \ 695 | PIN_OSPEED_VERYLOW(3) | \ 696 | PIN_OSPEED_VERYLOW(4) | \ 697 | PIN_OSPEED_VERYLOW(5) | \ 698 | PIN_OSPEED_VERYLOW(6) | \ 699 | PIN_OSPEED_VERYLOW(7) | \ 700 | PIN_OSPEED_VERYLOW(8) | \ 701 | PIN_OSPEED_VERYLOW(9) | \ 702 | PIN_OSPEED_VERYLOW(10) | \ 703 | PIN_OSPEED_VERYLOW(11) | \ 704 | PIN_OSPEED_VERYLOW(12) | \ 705 | PIN_OSPEED_VERYLOW(13) | \ 706 | PIN_OSPEED_VERYLOW(14) | \ 707 | PIN_OSPEED_VERYLOW(15) | \ 708 | 0) 709 | 710 | #define VAL_GPIOF_PUPDR ( \ 711 | PIN_PUPDR_PULLUP(0) | \ 712 | PIN_PUPDR_PULLUP(1) | \ 713 | PIN_PUPDR_PULLUP(2) | \ 714 | PIN_PUPDR_PULLUP(3) | \ 715 | PIN_PUPDR_PULLUP(4) | \ 716 | PIN_PUPDR_PULLUP(5) | \ 717 | PIN_PUPDR_PULLUP(6) | \ 718 | PIN_PUPDR_PULLUP(7) | \ 719 | PIN_PUPDR_PULLUP(8) | \ 720 | PIN_PUPDR_PULLUP(9) | \ 721 | PIN_PUPDR_PULLUP(10) | \ 722 | PIN_PUPDR_PULLUP(11) | \ 723 | PIN_PUPDR_PULLUP(12) | \ 724 | PIN_PUPDR_PULLUP(13) | \ 725 | PIN_PUPDR_PULLUP(14) | \ 726 | PIN_PUPDR_PULLUP(15) | \ 727 | 0) 728 | 729 | #define VAL_GPIOF_ODR ( \ 730 | PIN_ODR_HIGH(0) | \ 731 | PIN_ODR_HIGH(1) | \ 732 | PIN_ODR_HIGH(2) | \ 733 | PIN_ODR_HIGH(3) | \ 734 | PIN_ODR_HIGH(4) | \ 735 | PIN_ODR_HIGH(5) | \ 736 | PIN_ODR_HIGH(6) | \ 737 | PIN_ODR_HIGH(7) | \ 738 | PIN_ODR_HIGH(8) | \ 739 | PIN_ODR_HIGH(9) | \ 740 | PIN_ODR_HIGH(10) | \ 741 | PIN_ODR_HIGH(11) | \ 742 | PIN_ODR_HIGH(12) | \ 743 | PIN_ODR_HIGH(13) | \ 744 | PIN_ODR_HIGH(14) | \ 745 | PIN_ODR_HIGH(15) | \ 746 | 0) 747 | 748 | #define VAL_GPIOF_AFRL ( \ 749 | PIN_AFIO_AF(0, 0) | \ 750 | PIN_AFIO_AF(1, 0) | \ 751 | PIN_AFIO_AF(2, 0) | \ 752 | PIN_AFIO_AF(3, 0) | \ 753 | PIN_AFIO_AF(4, 0) | \ 754 | PIN_AFIO_AF(5, 0) | \ 755 | PIN_AFIO_AF(6, 0) | \ 756 | PIN_AFIO_AF(7, 0) | \ 757 | 0) 758 | 759 | #define VAL_GPIOF_AFRH ( \ 760 | PIN_AFIO_AF(8, 0) | \ 761 | PIN_AFIO_AF(9, 0) | \ 762 | PIN_AFIO_AF(10, 0) | \ 763 | PIN_AFIO_AF(11, 0) | \ 764 | PIN_AFIO_AF(12, 0) | \ 765 | PIN_AFIO_AF(13, 0) | \ 766 | PIN_AFIO_AF(14, 0) | \ 767 | PIN_AFIO_AF(15, 0) | \ 768 | 0) 769 | 770 | 771 | #endif -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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Patents. 472 | 473 | A "contributor" is a copyright holder who authorizes use under this 474 | License of the Program or a work on which the Program is based. The 475 | work thus licensed is called the contributor's "contributor version". 476 | 477 | A contributor's "essential patent claims" are all patent claims 478 | owned or controlled by the contributor, whether already acquired or 479 | hereafter acquired, that would be infringed by some manner, permitted 480 | by this License, of making, using, or selling its contributor version, 481 | but do not include claims that would be infringed only as a 482 | consequence of further modification of the contributor version. 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You may not convey a covered 525 | work if you are a party to an arrangement with a third party that is 526 | in the business of distributing software, under which you make payment 527 | to the third party based on the extent of your activity of conveying 528 | the work, and under which the third party grants, to any of the 529 | parties who would receive the covered work from you, a discriminatory 530 | patent license (a) in connection with copies of the covered work 531 | conveyed by you (or copies made from those copies), or (b) primarily 532 | for and in connection with specific products or compilations that 533 | contain the covered work, unless you entered into that arrangement, 534 | or that patent license was granted, prior to 28 March 2007. 535 | 536 | Nothing in this License shall be construed as excluding or limiting 537 | any implied license or other defenses to infringement that may 538 | otherwise be available to you under applicable patent law. 539 | 540 | 12. No Surrender of Others' Freedom. 541 | 542 | If conditions are imposed on you (whether by court order, agreement or 543 | otherwise) that contradict the conditions of this License, they do not 544 | excuse you from the conditions of this License. If you cannot convey a 545 | covered work so as to satisfy simultaneously your obligations under this 546 | License and any other pertinent obligations, then as a consequence you may 547 | not convey it at all. For example, if you agree to terms that obligate you 548 | to collect a royalty for further conveying from those to whom you convey 549 | the Program, the only way you could satisfy both those terms and this 550 | License would be to refrain entirely from conveying the Program. 551 | 552 | 13. Use with the GNU Affero General Public License. 553 | 554 | Notwithstanding any other provision of this License, you have 555 | permission to link or combine any covered work with a work licensed 556 | under version 3 of the GNU Affero General Public License into a single 557 | combined work, and to convey the resulting work. The terms of this 558 | License will continue to apply to the part which is the covered work, 559 | but the special requirements of the GNU Affero General Public License, 560 | section 13, concerning interaction through a network will apply to the 561 | combination as such. 562 | 563 | 14. Revised Versions of this License. 564 | 565 | The Free Software Foundation may publish revised and/or new versions of 566 | the GNU General Public License from time to time. Such new versions will 567 | be similar in spirit to the present version, but may differ in detail to 568 | address new problems or concerns. 569 | 570 | Each version is given a distinguishing version number. If the 571 | Program specifies that a certain numbered version of the GNU General 572 | Public License "or any later version" applies to it, you have the 573 | option of following the terms and conditions either of that numbered 574 | version or of any later version published by the Free Software 575 | Foundation. If the Program does not specify a version number of the 576 | GNU General Public License, you may choose any version ever published 577 | by the Free Software Foundation. 578 | 579 | If the Program specifies that a proxy can decide which future 580 | versions of the GNU General Public License can be used, that proxy's 581 | public statement of acceptance of a version permanently authorizes you 582 | to choose that version for the Program. 583 | 584 | Later license versions may give you additional or different 585 | permissions. However, no additional obligations are imposed on any 586 | author or copyright holder as a result of your choosing to follow a 587 | later version. 588 | 589 | 15. Disclaimer of Warranty. 590 | 591 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY 592 | APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT 593 | HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY 594 | OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, 595 | THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 596 | PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM 597 | IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF 598 | ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 599 | 600 | 16. Limitation of Liability. 601 | 602 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 603 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS 604 | THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY 605 | GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE 606 | USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF 607 | DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD 608 | PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), 609 | EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF 610 | SUCH DAMAGES. 611 | 612 | 17. Interpretation of Sections 15 and 16. 613 | 614 | If the disclaimer of warranty and limitation of liability provided 615 | above cannot be given local legal effect according to their terms, 616 | reviewing courts shall apply local law that most closely approximates 617 | an absolute waiver of all civil liability in connection with the 618 | Program, unless a warranty or assumption of liability accompanies a 619 | copy of the Program in return for a fee. 620 | 621 | END OF TERMS AND CONDITIONS 622 | 623 | How to Apply These Terms to Your New Programs 624 | 625 | If you develop a new program, and you want it to be of the greatest 626 | possible use to the public, the best way to achieve this is to make it 627 | free software which everyone can redistribute and change under these terms. 628 | 629 | To do so, attach the following notices to the program. It is safest 630 | to attach them to the start of each source file to most effectively 631 | state the exclusion of warranty; and each file should have at least 632 | the "copyright" line and a pointer to where the full notice is found. 633 | 634 | {one line to give the program's name and a brief idea of what it does.} 635 | Copyright (C) {year} {name of author} 636 | 637 | This program is free software: you can redistribute it and/or modify 638 | it under the terms of the GNU General Public License as published by 639 | the Free Software Foundation, either version 3 of the License, or 640 | (at your option) any later version. 641 | 642 | This program is distributed in the hope that it will be useful, 643 | but WITHOUT ANY WARRANTY; without even the implied warranty of 644 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 645 | GNU General Public License for more details. 646 | 647 | You should have received a copy of the GNU General Public License 648 | along with this program. If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | {project} Copyright (C) {year} {fullname} 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | --------------------------------------------------------------------------------