├── packages ├── sdr5_2.gsch2pcb ├── adc_module.gsch2pcb ├── zynq_som_2.gsch2pcb ├── sd_breakout.gsch2pcb ├── adc_amp3.asc ├── zynq_som_2.png ├── sdr5_2_photo.jpg ├── hdl_websdr ├── sdr5.sdk │ └── top.hdf ├── sdr5.srcs │ └── sources_1 │ │ ├── bd │ │ └── design_1 │ │ │ ├── .gitignore │ │ │ └── design_1_ooc.xdc │ │ ├── ip │ │ └── clk_wiz_0.xcix │ │ └── new │ │ ├── my_addr_perm.vhd │ │ ├── axi_word_splitter.vhd │ │ ├── sdr5_mipmap.vhd │ │ └── fm_channelizer.vhd └── .gitignore ├── .gitignore ├── sw ├── program_remote ├── platform_xilinx │ ├── run.tcl │ ├── parameters.h │ ├── platform.h │ ├── adc_core.h │ └── dac_core.h ├── Makefile.linux ├── Makefile.generic ├── README.Build.txt ├── platform_generic │ ├── parameters.h │ └── platform.h ├── platform_altera │ ├── parameters.h │ ├── platform.h │ ├── adc_core.h │ └── dac_core.h ├── config.h ├── console_commands │ ├── console.h │ └── command.h ├── platform_linux │ ├── filter.h │ ├── parameters.h │ ├── platform.h │ ├── adc_core.h │ ├── filter.c │ └── dac_core.h ├── common.h └── util.h ├── websdr ├── common.H ├── protocol.H ├── Makefile ├── simple_epoll.H ├── hw.H ├── buffer_pool.H ├── hw_data_format.H ├── index.html ├── mipmap_reader.H └── server.C ├── README.md ├── adc_amp.asc ├── zynq_som_2.mapping.csv ├── sd_breakout.sch ├── sdr5_data_order.xml ├── adc_amp2.asc └── zynq_som_2.bom.csv /packages: -------------------------------------------------------------------------------- 1 | ../packages2 -------------------------------------------------------------------------------- /sdr5_2.gsch2pcb: -------------------------------------------------------------------------------- 1 | schematics sdr5_2.sch 2 | output-name sdr5_2 3 | -------------------------------------------------------------------------------- /adc_module.gsch2pcb: -------------------------------------------------------------------------------- 1 | schematics adc_module.sch 2 | output-name adc_module 3 | -------------------------------------------------------------------------------- /zynq_som_2.gsch2pcb: -------------------------------------------------------------------------------- 1 | schematics zynq_som_2.sch 2 | output-name zynq_som_2 3 | -------------------------------------------------------------------------------- /sd_breakout.gsch2pcb: -------------------------------------------------------------------------------- 1 | schematics sd_breakout.sch 2 | output-name sd_breakout 3 | -------------------------------------------------------------------------------- /adc_amp3.asc: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gabriel-tenma-white/sdr5/HEAD/adc_amp3.asc -------------------------------------------------------------------------------- /zynq_som_2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gabriel-tenma-white/sdr5/HEAD/zynq_som_2.png -------------------------------------------------------------------------------- /sdr5_2_photo.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gabriel-tenma-white/sdr5/HEAD/sdr5_2_photo.jpg -------------------------------------------------------------------------------- /hdl_websdr/sdr5.sdk/top.hdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gabriel-tenma-white/sdr5/HEAD/hdl_websdr/sdr5.sdk/top.hdf -------------------------------------------------------------------------------- /hdl_websdr/sdr5.srcs/sources_1/bd/design_1/.gitignore: -------------------------------------------------------------------------------- 1 | hw_handoff/ 2 | ip/ 3 | ipshared/ 4 | sim/ 5 | synth/ 6 | ui/ 7 | hdl/ 8 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | *- 2 | *-1 3 | *-2 4 | *-3 5 | *.bak* 6 | *~ 7 | *.net 8 | *.pcb.txt 9 | *.sch.txt 10 | *.raw 11 | *.fft 12 | *.log 13 | /*.csv 14 | -------------------------------------------------------------------------------- /hdl_websdr/sdr5.srcs/sources_1/ip/clk_wiz_0.xcix: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gabriel-tenma-white/sdr5/HEAD/hdl_websdr/sdr5.srcs/sources_1/ip/clk_wiz_0.xcix -------------------------------------------------------------------------------- /sw/program_remote: -------------------------------------------------------------------------------- 1 | 2 | rsync -a ../sw root@192.168.0.20:sdr5-sw/ --progress; ssh root@192.168.0.20 'cd sdr5-sw/sw; make -f Makefile.generic && ./ad9361_generic' 3 | 4 | -------------------------------------------------------------------------------- /sw/platform_xilinx/run.tcl: -------------------------------------------------------------------------------- 1 | connect arm hw 2 | rst 3 | fpga -f hw_platform_0/system_top.bit 4 | source hw_platform_0/ps7_init.tcl 5 | ps7_init 6 | init_user 7 | dow [lindex $argv 0] 8 | con 9 | -------------------------------------------------------------------------------- /hdl_websdr/.gitignore: -------------------------------------------------------------------------------- 1 | *.cache/ 2 | *.hw/ 3 | *.ip_user_files/ 4 | *.runs/ 5 | *.sim/ 6 | *.srcs/sim_1/imports 7 | *.srcs/sources_1/bd/mref 8 | *.lock 9 | *.bxml 10 | *.tsm 11 | /*.csv 12 | -------------------------------------------------------------------------------- /sw/Makefile.linux: -------------------------------------------------------------------------------- 1 | 2 | EXEC = ad9361_linux 3 | PLATFORM = platform_linux 4 | SYMBOLS = -DLINUX_PLATFORM -DDMA_UIO 5 | 6 | LIBS = -lmatio 7 | CFLAGS = -Wall -Wextra -I$(PLATFORM) $(SYMBOLS) -Os -ffunction-sections -fdata-sections 8 | 9 | LIB_C_SOURCES := $(filter-out main.c, $(wildcard *.c)) $(wildcard $(PLATFORM)/*.c) 10 | LIB_SOURCES := $(patsubst %.c, %.o, $(LIB_C_SOURCES)) 11 | 12 | all: $(EXEC) 13 | 14 | lib_objects: $(LIB_C_SOURCES) 15 | $(CC) $(CFLAGS) $(LIBS) -c $(LIB_C_SOURCES) 16 | 17 | libad9361.a: $(LIB_SOURCES) 18 | $(AR) rvs libad9361.a $+ 19 | 20 | $(EXEC): libad9361.a main.c 21 | $(CC) $(CFLAGS) $(LIBS) main.c -lad9361 -Wl,--gc-sections -L. -o $@ 22 | 23 | clean: 24 | -rm -f *.o 25 | -rm -f $(PLATFORM)/*.o 26 | -rm -f $(EXEC) 27 | -rm -f $(EXEC) 28 | -rm -f libad9361.a -------------------------------------------------------------------------------- /websdr/common.H: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include 3 | 4 | static inline uint32_t expandBits(uint32_t val) { 5 | uint32_t tmp = (val & 0b1); 6 | tmp |= (val & 0b10) << 1; 7 | tmp |= (val & 0b100) << 2; 8 | tmp |= (val & 0b1000) << 3; 9 | tmp |= (val & 0b10000) << 4; 10 | tmp |= (val & 0b100000) << 5; 11 | tmp |= (val & 0b1000000) << 6; 12 | tmp |= (val & 0b10000000) << 7; 13 | tmp |= (val & 0b100000000) << 8; 14 | tmp |= (val & 0b1000000000) << 9; 15 | return tmp; 16 | } 17 | 18 | static inline double spectrumValue(int32_t re, int32_t im) { 19 | double tmp = double(re)*re + double(im)*im; 20 | double db; 21 | if(tmp < 1) db = -10; 22 | else db = log10(tmp)*10; 23 | return round((db - 60)); 24 | } 25 | 26 | static inline double clamp(double v, double lower, double upper) { 27 | if(v <= lower) v = lower; 28 | if(v >= upper) v = upper; 29 | return v; 30 | } 31 | -------------------------------------------------------------------------------- /hdl_websdr/sdr5.srcs/sources_1/bd/design_1/design_1_ooc.xdc: -------------------------------------------------------------------------------- 1 | ################################################################################ 2 | 3 | # This XDC is used only for OOC mode of synthesis, implementation 4 | # This constraints file contains default clock frequencies to be used during 5 | # out-of-context flows such as OOC Synthesis and Hierarchical Designs. 6 | # This constraints file is not used in normal top-down synthesis (default flow 7 | # of Vivado) 8 | ################################################################################ 9 | create_clock -name streamClk -period 10 [get_ports streamClk] 10 | create_clock -name axiPipeClk -period 4.975 [get_ports axiPipeClk] 11 | create_clock -name channelizerClk -period 10 [get_ports channelizerClk] 12 | create_clock -name processing_system7_0_FCLK_CLK0 -period 20 [get_pins processing_system7_0/FCLK_CLK0] 13 | create_clock -name processing_system7_0_FCLK_CLK1 -period 5 [get_pins processing_system7_0/FCLK_CLK1] 14 | 15 | ################################################################################ -------------------------------------------------------------------------------- /websdr/protocol.H: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | // sdr5 websocket protocol data structures 4 | 5 | namespace sdr5proto { 6 | // server => client data chunk header 7 | struct dataChunkHeader { 8 | // the total length of the waveform in hw samples 9 | uint32_t waveSizeSamples; 10 | 11 | // the start of the subview in hw samples 12 | uint32_t startSamples; 13 | 14 | // how many hw samples each mipmap sample covers 15 | uint32_t compressionFactor; 16 | 17 | // the original Y value corresponding to the lowest possible received number (0) 18 | float yLower; 19 | 20 | // the original Y value corresponding to the highest possible received number (255) 21 | float yUpper; 22 | 23 | // which display this chunk is for 24 | uint8_t displayIndex; 25 | 26 | uint8_t flags; 27 | enum:uint8_t { 28 | // if set, each sample consists of two bytes, lower and upper 29 | FLAG_IS_MIPMAP = 1, 30 | 31 | // if set, there is only one channel; if unset, there 32 | // are two interleaved channels (real & imaginary) 33 | FLAG_IS_SPECTRUM = 2 34 | }; 35 | } __attribute__ ((packed)); 36 | } 37 | -------------------------------------------------------------------------------- /websdr/Makefile: -------------------------------------------------------------------------------- 1 | 2 | CXX := clang++-7 3 | AXI_UTIL_PATH ?= ../../axi-util/sw 4 | FPGA_FFT_PATH ?= ../../fpga-fft/sw 5 | CPPSP_PATH ?= ../../cppsp-ng 6 | CPOLL_PATH ?= ../../cpoll-ng 7 | CFLAGS ?= -g2 8 | 9 | INCLUDES ?= -I$(AXI_UTIL_PATH)/include -I$(FPGA_FFT_PATH)/include -I$(CPPSP_PATH)/include -I$(CPOLL_PATH)/include 10 | LIBS ?= -lcryptopp -lpthread 11 | 12 | REQUIRED_CXXFLAGS := --std=c++17 -finput-charset=UTF-8 -fextended-identifiers -fwrapv 13 | 14 | CXXFLAGS2 := $(REQUIRED_CXXFLAGS) $(INCLUDES) $(CFLAGS) $(CXXFLAGS) 15 | 16 | 17 | all: server 18 | 19 | %.o: %.C 20 | $(CXX) -c $(CXXFLAGS2) $< -o $@ 21 | 22 | $(CPPSP_PATH)/libcppsp-ng.a: FORCE 23 | $(MAKE) -C $(CPPSP_PATH) libcppsp-ng.a 24 | 25 | $(FPGA_FFT_PATH)/libaxi_fft.a: FORCE 26 | $(MAKE) -C $(FPGA_FFT_PATH) libaxi_fft.a 27 | 28 | $(AXI_UTIL_PATH)/libaxi_pipe.a: FORCE 29 | $(MAKE) -C $(AXI_UTIL_PATH) libaxi_pipe.a 30 | 31 | FORCE: 32 | 33 | 34 | server: server.o hw.o $(FPGA_FFT_PATH)/libaxi_fft.a $(AXI_UTIL_PATH)/libaxi_pipe.a $(CPPSP_PATH)/libcppsp-ng.a 35 | $(CXX) $(LIBS) $^ -o $@ 36 | 37 | clean: 38 | rm -f server *.o 39 | 40 | clean_all: clean 41 | $(MAKE) -C $(FPGA_FFT_PATH) clean 42 | $(MAKE) -C $(AXI_UTIL_PATH) clean 43 | 44 | 45 | -------------------------------------------------------------------------------- /sw/Makefile.generic: -------------------------------------------------------------------------------- 1 | PLATFORM=platform_generic 2 | 3 | CFLAGS=-Wall -I$(PLATFORM) -g3 -ffunction-sections -fdata-sections -Iconsole_commands --std=c++0x #-DCONSOLE_COMMANDS 4 | 5 | LIB_C_SOURCES := $(filter-out main.c, $(wildcard *.c)) $(wildcard $(PLATFORM)/*.c) 6 | LIB_SOURCES := $(patsubst %.c, %.o, $(LIB_C_SOURCES)) 7 | LIB_INCLUDES := $(wildcard *.h) $(wildcard $(PLATFORM)/*.h) 8 | 9 | MAIN_SOURCES := main.c #console_commands/command.c console_commands/console.c 10 | 11 | EXEC=ad9361_generic 12 | 13 | all: $(SOURCES) $(EXEC) 14 | 15 | $(EXEC): libad9361.a $(MAIN_SOURCES) 16 | $(CXX) $(CFLAGS) $(LDFLAGS) $(MAIN_SOURCES) -o $@ -I$(PLATFORM) -lad9361 -L. -Wl,--gc-sections 17 | 18 | libad9361.a: $(LIB_SOURCES) 19 | $(AR) rvs libad9361.a $+ 20 | 21 | ad9361_api.o: ad9361_api.c ad9361.h common.h ad9361_api.h util.h \ 22 | $(PLATFORM)/platform.h util.h 23 | 24 | ad9361.o: ad9361.c ad9361.h common.h $(PLATFORM)/platform.h util.h ad9361.h \ 25 | common.h util.h 26 | 27 | util.o: util.c util.h ad9361.h common.h 28 | 29 | $(PLATFORM)/platform.o: $(PLATFORM)/platform.c util.h ad9361.h common.h \ 30 | $(PLATFORM)/parameters.h 31 | 32 | .c.o: 33 | $(CXX) -c $(CFLAGS) $< -o $@ 34 | 35 | clean: 36 | rm -rf *.a *.o */*.o 37 | rm -f $(EXEC) 38 | -------------------------------------------------------------------------------- /sw/README.Build.txt: -------------------------------------------------------------------------------- 1 | ********************************************************************************* 2 | There are three supported Platforms: 3 | 4 | Xilinx : Zynq, Microblaze 5 | Linux : Userspace using UIO, spidev, and sysfs GPIO 6 | Generic : Skeleton 7 | 8 | ********************************************************************************* 9 | 10 | To build for Xilinx: 11 | 12 | 13 | Export your SDK_Export folder: 14 | 15 | On Linux: 16 | dave@HAL9000:~/devel/git/ad9361/sw$ export SDK_EXPORT=path_to_your/SDK/SDK_Export/hw 17 | 18 | On Windows: (SDK->Xilinx Tools->Launch Shell) 19 | C:\tmp\ad9361\sw>set SDK_EXPORT=path_to_your\SDK\SDK_Export\hw 20 | 21 | Build for ZYNQ: 22 | Linux: 23 | dave@HAL9000:~/devel/git/ad9361/sw$ make -f Makefile.zynq [clean] 24 | 25 | Windows: 26 | C:\tmp\ad9361\sw>make -f Makefile.zynq [clean] 27 | 28 | Build for Microblaze: 29 | 30 | Linux: 31 | dave@HAL9000:~/devel/git/ad9361/sw$ make -f Makefile.microblaze [clean] 32 | 33 | Windows: 34 | C:\tmp\ad9361\sw>make -f Makefile.microblaze [clean] 35 | 36 | ********************************************************************************* 37 | 38 | To build for Linux: 39 | dave@HAL9000:~/devel/git/ad9361/sw$ make -f Makefile.linux [clean] 40 | 41 | ********************************************************************************* 42 | 43 | To build the skeleton: 44 | dave@HAL9000:~/devel/git/ad9361/sw$ make -f Makefile.generic [clean] 45 | -------------------------------------------------------------------------------- /websdr/simple_epoll.H: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | using namespace std; 10 | 11 | class SimpleEPoll { 12 | public: 13 | typedef function CB; 14 | 15 | int epfd = -1; 16 | SimpleEPoll() { 17 | epfd = epoll_create1(EPOLL_CLOEXEC); 18 | if(epfd < 0) 19 | throw runtime_error(strerror(errno)); 20 | } 21 | ~SimpleEPoll() { 22 | close(epfd); 23 | } 24 | void add(int fd, const CB& cb) { 25 | auto* cbCopy = new CB(cb); 26 | epoll_event evt = {}; 27 | evt.events = EPOLLIN | EPOLLOUT | EPOLLET; 28 | evt.data.u64 = 0; 29 | evt.data.ptr = cbCopy; 30 | int ret = epoll_ctl(epfd, EPOLL_CTL_ADD, fd, &evt); 31 | if(ret < 0) 32 | throw runtime_error(strerror(errno)); 33 | } 34 | void remove(int fd) { 35 | int ret = epoll_ctl(epfd, EPOLL_CTL_DEL, fd, nullptr); 36 | if(ret < 0) 37 | throw runtime_error(strerror(errno)); 38 | } 39 | void loop() { 40 | static constexpr int MAXEVENTS = 32; 41 | epoll_event events[MAXEVENTS]; 42 | while(true) { 43 | int nEvents = epoll_wait(epfd, events, MAXEVENTS, -1); 44 | if(nEvents < 0) 45 | throw runtime_error(strerror(errno)); 46 | if(nEvents == 0) break; 47 | 48 | for(int i=0; i 3 | #include 4 | using namespace std; 5 | 6 | /***************************** 7 | * SHARED VARIABLES 8 | *****************************/ 9 | 10 | // a chunk of received data, for display only 11 | struct hw_streamViewChunk { 12 | volatile uint8_t* original = nullptr; 13 | volatile uint64_t* mipmap = nullptr; 14 | volatile uint64_t* spectrum = nullptr; 15 | volatile uint64_t* spectrumMipmap = nullptr; 16 | bool noFree = false; 17 | operator bool() { 18 | return (original != nullptr) || (mipmap != nullptr); 19 | } 20 | }; 21 | 22 | struct hw_streamView { 23 | // if nonzero, serves as a hint to the user application what the spectrum center frequency is 24 | double centerFreqHz = 0; 25 | 26 | // if nonzero, serves as a hint to the user application what the spectrum physical bandwidth is 27 | double bandwidthHz = 0; 28 | 29 | // samples per chunk 30 | int length; 31 | 32 | // if true, samples are 32 bits each (16 bit real and 16 bit imag) (only applies to .original) 33 | bool halfWidth; 34 | 35 | // currently resident in memory chunks 36 | vector chunks; 37 | 38 | // which index in .chunks is the latest one 39 | volatile int currChunk = 0; 40 | 41 | volatile int totalChunksCounter = 0; 42 | 43 | // gets a snapshot of the current chunks, in order from oldest to most recent. 44 | // this does not lock the chunks in memory, and all returned chunks may become 45 | // invalid after one chunk period (except for the oldest chunk which may become 46 | // invalid right away). 47 | vector snapshot() { 48 | vector ret; 49 | ret.resize(chunks.size()); 50 | int startIndex = currChunk; 51 | __sync_synchronize(); 52 | startIndex++; 53 | for(int i=0; i<(int)ret.size(); i++) { 54 | int index = (i + startIndex) % ret.size(); 55 | ret[i] = chunks[index]; 56 | } 57 | return ret; 58 | } 59 | }; 60 | 61 | 62 | // these are automatically populated by the implementation after hw_init() 63 | 64 | extern int hw_mipmapSteps[4]; // the compression factor of each mipmap step 65 | extern vector hw_streamViews; 66 | 67 | void hw_init(); 68 | void hw_doLoop(); 69 | 70 | // locks the latest chunk in memory indefinitely until hw_freeChunk is called 71 | hw_streamViewChunk hw_reserveChunk(hw_streamView& sv); 72 | void hw_freeChunk(hw_streamViewChunk& chunk); 73 | 74 | -------------------------------------------------------------------------------- /websdr/buffer_pool.H: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | 4 | class BufferPool { 5 | public: 6 | std::vector availableBuffers; 7 | volatile uint8_t* reservedMem = nullptr; 8 | volatile uint8_t* reservedMemEnd = nullptr; 9 | int bufSize = 0; 10 | int nBuffers = 0; 11 | 12 | void init(volatile void* reservedMem, int reservedMemBytes, int bufSize) { 13 | this->reservedMem = (volatile uint8_t*)reservedMem; 14 | this->reservedMemEnd = this->reservedMem + reservedMemBytes; 15 | this->bufSize = bufSize; 16 | this->nBuffers = reservedMemBytes/bufSize; 17 | 18 | availableBuffers.resize(nBuffers); 19 | for(int i=0; i= reservedMem); 34 | assert(buf < reservedMemEnd); 35 | 36 | int tmp = (buf-reservedMem)/bufSize; 37 | assert(buf == (reservedMem + tmp*bufSize)); 38 | availableBuffers.push_back(tmp); 39 | } 40 | }; 41 | 42 | // a collection of buffer pools for allocating several buffer sizes 43 | class MultiBufferPool { 44 | public: 45 | vector pools; 46 | volatile uint8_t* reservedMem = nullptr; 47 | int reservedMemBytes = 0; 48 | 49 | void init(volatile void* reservedMem, int reservedMemBytes) { 50 | this->reservedMem = (volatile uint8_t*) reservedMem; 51 | this->reservedMemBytes = reservedMemBytes; 52 | } 53 | // always add larger buffer pools first to keep buffer addresses aligned to its size 54 | void addPool(int bufSize, int nBuffers) { 55 | int totalSize = bufSize * nBuffers; 56 | if(totalSize > reservedMemBytes) 57 | throw length_error("MultiBufferPool::addPool(): not enough unpooled memory remaining"); 58 | pools.push_back({}); 59 | pools.back().init(reservedMem, totalSize, bufSize); 60 | reservedMem += totalSize; 61 | reservedMemBytes -= totalSize; 62 | } 63 | 64 | volatile uint8_t* get(int size) { 65 | for(auto& pool: pools) { 66 | if(pool.bufSize == size) { 67 | return pool.get(); 68 | } 69 | } 70 | throw logic_error("no BufferPool for bufSize " + std::to_string(size)); 71 | } 72 | void put(volatile void* buf) { 73 | for(auto& pool: pools) { 74 | if(buf >= pool.reservedMem && buf < pool.reservedMemEnd) { 75 | pool.put(buf); 76 | return; 77 | } 78 | } 79 | char tmp[128]; 80 | snprintf(tmp, sizeof(tmp), "MultiBufferPool::put(): address %p does not belong to any pool", buf); 81 | throw runtime_error(tmp); 82 | } 83 | }; 84 | -------------------------------------------------------------------------------- /zynq_som_2.mapping.csv: -------------------------------------------------------------------------------- 1 | device footprint value expression priority 2 | BGS14GA14 * * 'BGS14GA14E6327XTSA1' 3 | INDUCTOR 0603_0805 fb ('fb', device, '0805', '') 4 | INDUCTOR 0603 rffb 'FBMH1608HM601-T' 5 | INDUCTOR 0805 15n 'CE201210-15NJ' 6 | INDUCTOR 0805 2.2u 'CV201210-2R2K' 7 | INDUCTOR 0805 4.7u 'CV201210-4R7K' 8 | RESISTOR 0402 1.8 '1R' 9 | RESISTOR 0402 1.8k '2kR' 10 | RESISTOR * 50 '49.9R' 11 | RESISTOR 0402 82 '75R' 12 | RESISTOR 0603 1.8 '2.2R' 13 | RESISTOR 0603 36 '33R' 14 | RESISTOR 0603 39 '47R' 15 | CAPACITOR 0603 300p ('330pF',device,footprint,'') 16 | CAPACITOR 0603_0805 * (value+'F', device, '0805', '') 17 | CAPACITOR 0402_l * (value+'F', device, '0402', '') 18 | CAPACITOR 0402_2 * (value+'F', device, '0402', '') 19 | CAPACITOR 0805_s * (value+'F', device, '0805', '') 20 | CAPACITOR 0603 100n ('220nF', device, footprint, '') 21 | CAPACITOR 0402 3n ('3.3nF', device, footprint, '') 22 | LED 0603 blue 'blue' 23 | LED 0603 green 'green' 24 | LED 0603 red 'red' 25 | LP0603A0947 lp0603 * 'LP0603A0947ANTR' 26 | LP0603A2140 lp0603 * 'LP0603A2140ANTR' 27 | LT1819 SO8 * 'LT1819CS8#PBF' 28 | USB3343 QFN24_4_EP * 'USB3343-CP-TR' 29 | W25Q32FV custom_so8 * ('W25Q32JVSSIQ', 'W25Q32JV', 'SO8', value) 30 | XC6SLX9 LQFP144_20 * 'XC6SLX9-2TQG144C' 31 | ad9200 SSOP28 * 'AD9200JRSZ' 32 | adf4350 custom_qfn32 * ('ADF4350BCPZ', 'adf4350', 'QFN32_EP', value) 33 | ap3419 SOT26 * 'AP3429KTTR-G1' 34 | cmy210 custom_cmy211 * ('CMY210', 'cmy210', 'SOT23-6', value) 35 | ad8342 * * 'AD8342ACPZ' 36 | nc7s04 SC70_5 * 'NC7S04P5X' 37 | pe4312 QFN20_4_EP * 'PE4312MLBA-Z' 38 | si53365 TSSOP16 * 'SI53365-B-GT' 39 | tcxo3225 tcxo3225 * ('ASVTX-11-121-19.200MHZ-T', 'tcxo', '3225', value) 40 | trf37a75 trf37a75 * 'TRF37A75IDSGR' 41 | ao3400 * * ('AO3400A',device,'SOT-23-3L','') 42 | dw01 * * ('DW01+G',device,'SOT-23-6','') 43 | xc6206 * * ('XC6206P332MR',device,'SOT-23-3L','') 44 | NPN_TRANSISTOR * 2sc3356 ('2SC3356-T1B-A',device,'SOT-23','') 45 | INDUCTOR mcw-0630 10uH ('06030 (0630) 10uH 20% 4A', 'INDUCTOR', '06030', '10u') 46 | CONNECTOR_5 custom_microusb1 * ('10118193-0001LF', 'CONNECTOR', 'micro usb', '') 47 | * custom_sma4 * ('CON-SMA-EDGE-S', 'CONNECTOR', 'SMA','') 48 | CAPACITOR * * (value+'F', device, footprint, '') 49 | RESISTOR * * (value+'Ω 1%', device, footprint, '') 50 | INDUCTOR * * (value+'H', device, footprint, '') 51 | * * * (device,device,footprint,value) 52 | CONNECTOR * * 'DNI' 53 | BNC * * 'DNI' 54 | CONNECTOR_11 * * 'DNI' 55 | CONNECTOR_12 * * 'DNI' 56 | CONNECTOR_2 * * 'DNI' 57 | CONNECTOR_5 * * 'DNI' 58 | CONNECTOR_3 * * 'DNI' 59 | CONNECTOR_9 * * 'DNI' 60 | edgepads * * 'DNI' 61 | CONNECTOR 1 2 * * 'DNI' 62 | connector9 * * 'DNI' 63 | oled_0.91 * * 'DNI' 64 | sd_breakout * * 'DNI' 65 | HEADER3 * * 'DNI' 66 | SPDT * * 'DNI' 67 | terminal * * 'DNI' 68 | * custom_pot_3362 * 'DNI' 69 | * dfplayer * 'DNI' 70 | -------------------------------------------------------------------------------- /sd_breakout.sch: -------------------------------------------------------------------------------- 1 | v 20130925 2 2 | N 43500 47300 45500 47300 4 3 | { 4 | T 43700 47300 5 10 1 1 0 0 1 5 | netname=SD-CD 6 | } 7 | N 43500 46900 45500 46900 4 8 | { 9 | T 43700 46900 5 10 1 1 0 0 1 10 | netname=SD-D1 11 | } 12 | N 43500 46500 45500 46500 4 13 | { 14 | T 43700 46500 5 10 1 1 0 0 1 15 | netname=SD-D0 16 | } 17 | N 43500 45700 45500 45700 4 18 | { 19 | T 43700 45700 5 10 1 1 0 0 1 20 | netname=SD-CLK 21 | } 22 | N 43500 45300 46600 45300 4 23 | { 24 | T 43700 45300 5 10 1 1 0 0 1 25 | netname=SD-VDD 26 | } 27 | N 43500 44900 45500 44900 4 28 | { 29 | T 43700 44900 5 10 1 1 0 0 1 30 | netname=SD-CMD 31 | } 32 | N 43500 44500 45500 44500 4 33 | { 34 | T 43700 44500 5 10 1 1 0 0 1 35 | netname=SD-D3 36 | } 37 | N 43500 44100 45500 44100 4 38 | { 39 | T 43700 44100 5 10 1 1 0 0 1 40 | netname=SD-D2 41 | } 42 | N 43500 46100 45500 46100 4 43 | { 44 | T 43700 46100 5 10 1 1 0 0 1 45 | netname=SD-VSS 46 | } 47 | C 45800 46000 1 90 0 gnd-1.sym 48 | N 46300 45300 46300 46100 4 49 | { 50 | T 46500 45400 5 10 1 1 90 0 1 51 | netname=VCC3P3 52 | } 53 | C 46500 44400 1 90 0 capacitor-1.sym 54 | { 55 | T 45800 44600 5 10 0 0 90 0 1 56 | device=CAPACITOR 57 | T 45600 44600 5 10 0 0 90 0 1 58 | symversion=0.1 59 | T 46200 45000 5 10 1 1 90 0 1 60 | refdes=C1 61 | T 46400 44700 5 10 1 1 270 0 1 62 | footprint=0402 63 | T 46100 44700 5 10 1 1 270 0 1 64 | value=470n 65 | } 66 | C 46200 44100 1 0 0 gnd-1.sym 67 | C 43500 47700 1 180 0 connector9-2.sym 68 | { 69 | T 43200 43650 5 10 0 0 180 0 1 70 | device=sd_breakout 71 | T 42800 43600 5 10 1 1 180 6 1 72 | refdes=CONN1 73 | T 42550 45400 5 10 1 1 90 0 1 74 | footprint=sd_breakout 75 | } 76 | C 49100 47600 1 180 0 connector9-2.sym 77 | { 78 | T 48800 43550 5 10 0 0 180 0 1 79 | device=CONNECTOR_9 80 | T 48400 43500 5 10 1 1 180 6 1 81 | refdes=CONN2 82 | T 48150 45300 5 10 1 1 90 0 1 83 | footprint=microsd 84 | } 85 | N 49100 47200 51100 47200 4 86 | { 87 | T 49300 47200 5 10 1 1 0 0 1 88 | netname=SD-CD 89 | } 90 | N 49100 46800 51100 46800 4 91 | { 92 | T 49300 46800 5 10 1 1 0 0 1 93 | netname=SD-D1 94 | } 95 | N 49100 46400 51100 46400 4 96 | { 97 | T 49300 46400 5 10 1 1 0 0 1 98 | netname=SD-D0 99 | } 100 | N 49100 45600 51100 45600 4 101 | { 102 | T 49300 45600 5 10 1 1 0 0 1 103 | netname=SD-CLK 104 | } 105 | N 49100 45200 52200 45200 4 106 | { 107 | T 49300 45200 5 10 1 1 0 0 1 108 | netname=SD-VDD 109 | } 110 | N 49100 44800 51100 44800 4 111 | { 112 | T 49300 44800 5 10 1 1 0 0 1 113 | netname=SD-CMD 114 | } 115 | N 49100 44400 51100 44400 4 116 | { 117 | T 49300 44400 5 10 1 1 0 0 1 118 | netname=SD-D3 119 | } 120 | N 49100 44000 51100 44000 4 121 | { 122 | T 49300 44000 5 10 1 1 0 0 1 123 | netname=SD-D2 124 | } 125 | N 49100 46000 51100 46000 4 126 | { 127 | T 49300 46000 5 10 1 1 0 0 1 128 | netname=SD-VSS 129 | } 130 | C 51400 45900 1 90 0 gnd-1.sym 131 | N 51900 45200 51900 46000 4 132 | { 133 | T 52100 45300 5 10 1 1 90 0 1 134 | netname=VCC3P3 135 | } 136 | -------------------------------------------------------------------------------- /sw/platform_generic/parameters.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file parameters.h 3 | * @brief Parameters Definitions. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __PARAMETERS_H__ 40 | #define __PARAMETERS_H__ 41 | 42 | /******************************************************************************/ 43 | /********************** Macros and Constants Definitions **********************/ 44 | /******************************************************************************/ 45 | #define CF_AD9361_RX_BASEADDR 0 46 | #define CF_AD9361_TX_BASEADDR 0 47 | #define CF_AD9361_RX_DMA_BASEADDR 0 48 | #define CF_AD9361_TX_DMA_BASEADDR 0 49 | 50 | #define ADC_DDR_BASEADDR 0 51 | #define DAC_DDR_BASEADDR 0 52 | 53 | #define GPIO_DEVICE_ID 0 54 | #define GPIO_RESET_PIN 4 55 | #define SPI_DEVICE_ID 0 56 | 57 | #endif // __PARAMETERS_H__ 58 | -------------------------------------------------------------------------------- /sw/platform_altera/parameters.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file parameters.h 3 | * @brief Parameters Definitions. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __PARAMETERS_H__ 40 | #define __PARAMETERS_H__ 41 | 42 | /******************************************************************************/ 43 | /********************** Macros and Constants Definitions **********************/ 44 | /******************************************************************************/ 45 | #define CF_AD9361_RX_BASEADDR 0xFF320000 46 | #define CF_AD9361_TX_BASEADDR 0xFF320000 + 0x4000 47 | 48 | #define CF_AD9361_RX_DMA_BASEADDR 0xFF300000 49 | #define CF_AD9361_TX_DMA_BASEADDR 0xFF304000 50 | 51 | #define ADC_DDR_BASEADDR 0x20000000 52 | #define DAC_DDR_BASEADDR 0x30000000 53 | 54 | #define SPI_BASEADDR 0xFF308000 55 | #define GPIO_BASEADDR 0xFF309000 56 | 57 | #define GPIO_DEVICE_ID 0 58 | #define GPIO_RESET_PIN 4 59 | #define SPI_DEVICE_ID 0 60 | 61 | #endif // __PARAMETERS_H__ 62 | -------------------------------------------------------------------------------- /sw/config.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file config.h 3 | * @brief Config file of AD9361/API Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2015(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef CONFIG_H_ 40 | #define CONFIG_H_ 41 | 42 | #define HAVE_VERBOSE_MESSAGES /* Recommended during development prints errors and warnings */ 43 | //#define HAVE_DEBUG_MESSAGES /* For Debug purposes only */ 44 | 45 | /* 46 | * In case memory footprint is a concern these options allow 47 | * to disable unused functionality which may free up a few kb 48 | */ 49 | 50 | #define HAVE_SPLIT_GAIN_TABLE 1 /* only set to 0 in case split_gain_table_mode_enable = 0*/ 51 | #define HAVE_TDD_SYNTH_TABLE 1 /* only set to 0 in case split_gain_table_mode_enable = 0*/ 52 | 53 | #define AD9361_DEVICE 1 /* set it 1 if AD9361 device is used, 0 otherwise */ 54 | #define AD9364_DEVICE 0 /* set it 1 if AD9364 device is used, 0 otherwise */ 55 | #define AD9363A_DEVICE 0 /* set it 1 if AD9363A device is used, 0 otherwise */ 56 | 57 | //#define CONSOLE_COMMANDS 58 | //#define XILINX_PLATFORM 59 | //#define ALTERA_PLATFORM 60 | //#define FMCOMMS5 61 | //#define ADI_RF_SOM 62 | //#define ADI_RF_SOM_CMOS 63 | //#define ADC_DMA_EXAMPLE 64 | //#define DAC_DMA_EXAMPLE 65 | //#define AXI_ADC_NOT_PRESENT 66 | //#define TDD_SWITCH_STATE_EXAMPLE 67 | 68 | #endif 69 | -------------------------------------------------------------------------------- /sw/console_commands/console.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file console.h 3 | * @brief Header file of Console Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __CONSOLE_H__ 40 | #define __CONSOLE_H__ 41 | 42 | /******************************************************************************/ 43 | /******************** Macros and Constants Definitions ************************/ 44 | /******************************************************************************/ 45 | #define UNKNOWN_CMD -1 46 | #define DO_CMD 0 47 | #define READ_CMD 1 48 | #define WRITE_CMD 2 49 | 50 | /******************************************************************************/ 51 | /************************ Functions Declarations ******************************/ 52 | /******************************************************************************/ 53 | /* Initializes the serial console. */ 54 | char console_init(unsigned long baud_rate); 55 | 56 | /* Prints formatted data to console. */ 57 | void console_print(char* str, ...); 58 | 59 | /* Reads one command from console. */ 60 | void console_get_command(char* command); 61 | 62 | /* Compares two commands and returns the type of the command. */ 63 | int console_check_commands(char* received_cmd, 64 | const char* expected_cmd, 65 | double* param, 66 | char* param_no); 67 | 68 | #endif /*__CONSOLE_H__*/ 69 | -------------------------------------------------------------------------------- /sw/platform_linux/filter.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file filter.h 3 | * @brief Header file of Filter Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2015(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef FILTER_H_ 40 | #define FILTER_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "../ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /*************************** Types Declarations *******************************/ 49 | /******************************************************************************/ 50 | typedef struct 51 | { 52 | uint32_t ch; 53 | int32_t gain; 54 | uint32_t dec_int; 55 | int16_t coef[128]; 56 | uint8_t coef_size; 57 | }FIRConfig; 58 | 59 | /******************************************************************************/ 60 | /************************ Functions Declarations ******************************/ 61 | /******************************************************************************/ 62 | int32_t parse_mat_fir_file(char *mat_fir_filename, 63 | uint8_t *fir_type, 64 | FIRConfig *fir_config, 65 | uint32_t *bandwidth, 66 | uint32_t *path_clks); 67 | int32_t load_enable_fir_files(struct ad9361_rf_phy *phy, 68 | char *tx_mat_fir_filename, 69 | char *rx_mat_fir_filename); 70 | #endif 71 | -------------------------------------------------------------------------------- /websdr/hw_data_format.H: -------------------------------------------------------------------------------- 1 | #pragma once 2 | #include "hw.H" 3 | #include "common.H" 4 | #include 5 | 6 | using namespace OwOComm; 7 | 8 | 9 | // dst must be an array of size (end-start)*2 10 | template 11 | void copyOriginal(volatile void* src, INTTYPE* dst, int start, int end, double yLower, double yUpper, bool halfWidth) { 12 | INTTYPE valMin = numeric_limits::min(); 13 | INTTYPE valMax = numeric_limits::max(); 14 | double A = (double(valMax) - double(valMin)) / (yUpper - yLower); 15 | double B = double(valMin); 16 | 17 | if(halfWidth) { 18 | auto srcArray = (volatile uint32_t*) src; 19 | int w=4, h=2, W=256, H=512; 20 | int burstLength = w*h; 21 | int Imask = (W>H) ? (H-1) : (W-1); 22 | int Ibits = ((W>H) ? myLog2(H) : myLog2(W)) - 1; 23 | for(int i=start; i> 16); 35 | lower = clamp(lower, yLower, yUpper); 36 | upper = clamp(upper, yLower, yUpper); 37 | dst[0] = INTTYPE(round((lower - yLower)*A + B)); 38 | dst[1] = INTTYPE(round((upper - yLower)*A + B)); 39 | dst += 2; 40 | } 41 | } 42 | } 43 | 44 | 45 | // dst must be an array of size (end-start) 46 | template 47 | void copySpectrum(volatile void* src, INTTYPE* dst, int start, int end, double yLower, double yUpper) { 48 | INTTYPE valMin = numeric_limits::min(); 49 | INTTYPE valMax = numeric_limits::max(); 50 | double A = (double(valMax) - double(valMin)) / (yUpper - yLower); 51 | double B = double(valMin); 52 | 53 | auto srcArray = (volatile uint64_t*) src; 54 | auto dstEnd = dst + (end-start); 55 | int w=2, h=2, W=512, H=512; 56 | int len = W*H*w*h; 57 | int burstLength = w*h; 58 | start += len/2; end += len/2; 59 | if(start >= len) start -= len; 60 | if(end >= len) end -= len; 61 | 62 | 63 | for(int i=start; dst != dstEnd; i = (i+1) % len) { 64 | uint32_t X = (i % 1024) / w, Y = (i / 1024) / h; 65 | uint32_t x = (i % 1024) % w, y = (i / 1024) % h; 66 | uint32_t X1 = expandBits(X); 67 | uint32_t Y1 = expandBits(Y) << 1; 68 | uint32_t addr = (X1 | Y1) * burstLength; 69 | addr += x; 70 | addr += y * 2; 71 | uint64_t element = srcArray[addr]; 72 | int32_t re = int(element & 0xffffffff); 73 | int32_t im = int(element >> 32); 74 | double tmp = spectrumValue(re, im); 75 | tmp = clamp(tmp, yLower, yUpper); 76 | *dst = INTTYPE(round((tmp - yLower)*A + B)); 77 | dst++; 78 | } 79 | } 80 | 81 | 82 | 83 | template 84 | void copyOriginal_(volatile void* src, INTTYPE* dst, int start, int end, bool halfWidth) { 85 | if(halfWidth) { 86 | auto srcArray = (volatile uint32_t*) src; 87 | for(int i=start; i> 16); 91 | dst[0] = INTTYPE(lower); 92 | dst[1] = INTTYPE(upper); 93 | dst += 2; 94 | } 95 | } else { 96 | auto srcArray = (volatile uint64_t*) src; 97 | for(int i=start; i> 32); 101 | dst[0] = INTTYPE(lower); 102 | dst[1] = INTTYPE(upper); 103 | dst += 2; 104 | } 105 | } 106 | } 107 | 108 | -------------------------------------------------------------------------------- /hdl_websdr/sdr5.srcs/sources_1/new/axi_word_splitter.vhd: -------------------------------------------------------------------------------- 1 | library ieee; 2 | library work; 3 | use ieee.numeric_std.all; 4 | use ieee.std_logic_1164.all; 5 | 6 | -- if enabled, treat each 64-bit input word as two 32-bit complex numbers 7 | -- (16 bit real/imag), and output each complex number separately as a 8 | -- 64 bit complex (32 bit real/imag). 9 | -- enableFlagNum sets which bit of din_tuser controls enable. 10 | entity axiWordSplitter is 11 | generic(outWidth: integer := 32; 12 | tuserWidth: integer := 1; 13 | enableFlagNum: integer := 0); 14 | port(aclk: in std_logic; 15 | din_tvalid: in std_logic; 16 | din_tready: out std_logic; 17 | din_tdata: in std_logic_vector(outWidth*2-1 downto 0); 18 | din_tuser: in std_logic_vector(tuserWidth-1 downto 0); 19 | din_tlast: in std_logic; 20 | 21 | dout_tvalid: out std_logic; 22 | dout_tready: in std_logic; 23 | dout_tdata: out std_logic_vector(outWidth*2-1 downto 0); 24 | dout_tuser: out std_logic_vector(tuserWidth-1 downto 0); 25 | dout_tlast: out std_logic); 26 | end entity; 27 | architecture a of axiWordSplitter is 28 | attribute X_INTERFACE_PARAMETER : string; 29 | attribute X_INTERFACE_PARAMETER of aclk: signal is "ASSOCIATED_BUSIF din:dout"; 30 | attribute X_INTERFACE_INFO : string; 31 | attribute X_INTERFACE_INFO of din_tvalid: signal is "xilinx.com:interface:axis_rtl:1.0 din tvalid"; 32 | attribute X_INTERFACE_INFO of din_tready: signal is "xilinx.com:interface:axis_rtl:1.0 din tready"; 33 | attribute X_INTERFACE_INFO of din_tdata: signal is "xilinx.com:interface:axis_rtl:1.0 din tdata"; 34 | attribute X_INTERFACE_INFO of din_tuser: signal is "xilinx.com:interface:axis_rtl:1.0 din tuser"; 35 | attribute X_INTERFACE_INFO of din_tlast: signal is "xilinx.com:interface:axis_rtl:1.0 din tlast"; 36 | attribute X_INTERFACE_INFO of dout_tvalid: signal is "xilinx.com:interface:axis_rtl:1.0 dout tvalid"; 37 | attribute X_INTERFACE_INFO of dout_tready: signal is "xilinx.com:interface:axis_rtl:1.0 dout tready"; 38 | attribute X_INTERFACE_INFO of dout_tdata: signal is "xilinx.com:interface:axis_rtl:1.0 dout tdata"; 39 | attribute X_INTERFACE_INFO of dout_tuser: signal is "xilinx.com:interface:axis_rtl:1.0 dout tuser"; 40 | attribute X_INTERFACE_INFO of dout_tlast: signal is "xilinx.com:interface:axis_rtl:1.0 dout tlast"; 41 | 42 | signal din_tdata0: signed(outWidth*2-1 downto 0); 43 | signal dinA0, dinB0: signed(outWidth-1 downto 0); 44 | signal dinA, dinB: signed(outWidth*2-1 downto 0); 45 | 46 | signal reg_tvalid, reg_tlast: std_logic; 47 | signal reg_tdataA, reg_tdataB, reg_tdataC: signed(outWidth*2-1 downto 0); 48 | signal reg_ce: std_logic; 49 | 50 | signal muxOut: signed(outWidth*2-1 downto 0); 51 | 52 | signal out_advance, counter, intern_tready: std_logic; 53 | signal enable: std_logic; 54 | begin 55 | din_tdata0 <= signed(din_tdata); 56 | dinA0 <= din_tdata0(dinA0'range); 57 | dinB0 <= din_tdata0(din_tdata0'left downto dinA0'length); 58 | 59 | dinA <= resize(dinA0(outWidth-1 downto outWidth/2), outWidth) & 60 | resize(dinA0(outWidth/2-1 downto 0), outWidth); 61 | dinB <= resize(dinB0(outWidth-1 downto outWidth/2), outWidth) & 62 | resize(dinB0(outWidth/2-1 downto 0), outWidth); 63 | 64 | -- input axi data register 65 | reg_tvalid <= din_tvalid when reg_ce='1' and rising_edge(aclk); 66 | reg_tdataA <= dinA when reg_ce='1' and rising_edge(aclk); 67 | reg_tdataB <= dinB when reg_ce='1' and rising_edge(aclk); 68 | reg_tdataC <= din_tdata0 when reg_ce='1' and rising_edge(aclk); 69 | reg_tlast <= din_tlast when reg_ce='1' and rising_edge(aclk); 70 | enable <= din_tuser(enableFlagNum) when reg_ce='1' and rising_edge(aclk); 71 | 72 | dout_tvalid <= reg_tvalid; 73 | 74 | -- mux 75 | muxOut <= reg_tdataC when enable='0' else 76 | reg_tdataA when counter='0' else 77 | reg_tdataB; 78 | dout_tdata <= std_logic_vector(muxOut); 79 | 80 | out_advance <= reg_tvalid and dout_tready; 81 | counter <= not counter when out_advance='1' and rising_edge(aclk); 82 | intern_tready <= dout_tready when enable='0' else 83 | counter and out_advance; 84 | 85 | reg_ce <= intern_tready or (not reg_tvalid); 86 | din_tready <= reg_ce; 87 | 88 | dout_tuser <= din_tuser when reg_ce='1' and rising_edge(aclk); 89 | dout_tlast <= reg_tlast and counter; 90 | end a; 91 | -------------------------------------------------------------------------------- /sw/common.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file common.h 3 | * @brief Header file of Common Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef COMMON_H_ 40 | #define COMMON_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | #define EIO 5 /* I/O error */ 51 | #define EAGAIN 11 /* Try again */ 52 | #define ENOMEM 12 /* Out of memory */ 53 | #define EFAULT 14 /* Bad address */ 54 | #define ENODEV 19 /* No such device */ 55 | #define EINVAL 22 /* Invalid argument */ 56 | #define EOPNOTSUPP 45 /* Operation not supported on transport endpoint */ 57 | #define ETIMEDOUT 110 /* Connection timed out */ 58 | 59 | /******************************************************************************/ 60 | /*************************** Types Declarations *******************************/ 61 | /******************************************************************************/ 62 | #if defined (__STDC__) && (__STDC_VERSION__ >= 199901L) 63 | #include 64 | #elif defined(__cplusplus) 65 | #else 66 | typedef enum { false, true } bool; 67 | #endif 68 | 69 | struct clk { 70 | const char *name; 71 | uint32_t rate; 72 | }; 73 | 74 | struct clk_hw { 75 | struct clk *clk; 76 | }; 77 | 78 | struct clk_init_data { 79 | const char *name; 80 | const struct clk_ops *ops; 81 | const char **parent_names; 82 | uint8_t num_parents; 83 | uint32_t flags; 84 | }; 85 | 86 | struct clk_onecell_data { 87 | struct clk **clks; 88 | uint32_t clk_num; 89 | }; 90 | 91 | #endif 92 | -------------------------------------------------------------------------------- /hdl_websdr/sdr5.srcs/sources_1/new/sdr5_mipmap.vhd: -------------------------------------------------------------------------------- 1 | library ieee; 2 | library work; 3 | use ieee.numeric_std.all; 4 | use ieee.std_logic_1164.all; 5 | use work.axiMipmap_types.all; 6 | use work.axiMipmap_generator; 7 | use work.dcfifo2; 8 | 9 | entity sdr5_mipmap is 10 | port( 11 | din_clk, reset: in std_logic; 12 | -- complex number, two 32 bit signed values 13 | din_tdata: in std_logic_vector(63 downto 0); 14 | din_tvalid: in std_logic; 15 | din_tready: out std_logic; 16 | din_tlast: in std_logic := '0'; 17 | 18 | dout_clk: in std_logic; 19 | dout_tdata: out std_logic_vector(63 downto 0); 20 | dout_tvalid: out std_logic; 21 | dout_tready: in std_logic; 22 | dout_tlast: out std_logic); 23 | end entity; 24 | architecture a of sdr5_mipmap is 25 | attribute X_INTERFACE_INFO : string; 26 | attribute X_INTERFACE_PARAMETER : string; 27 | 28 | attribute X_INTERFACE_INFO of din_clk : signal is "xilinx.com:signal:clock:1.0 din_clk CLK"; 29 | attribute X_INTERFACE_PARAMETER of din_clk: signal is "ASSOCIATED_BUSIF din"; 30 | attribute X_INTERFACE_INFO of dout_clk : signal is "xilinx.com:signal:clock:1.0 dout_clk CLK"; 31 | attribute X_INTERFACE_PARAMETER of dout_clk: signal is "ASSOCIATED_BUSIF dout"; 32 | 33 | attribute X_INTERFACE_INFO of din_tvalid: signal is "xilinx.com:interface:axis_rtl:1.0 din tvalid"; 34 | attribute X_INTERFACE_INFO of din_tready: signal is "xilinx.com:interface:axis_rtl:1.0 din tready"; 35 | attribute X_INTERFACE_INFO of din_tdata: signal is "xilinx.com:interface:axis_rtl:1.0 din tdata"; 36 | attribute X_INTERFACE_INFO of din_tlast: signal is "xilinx.com:interface:axis_rtl:1.0 din tlast"; 37 | attribute X_INTERFACE_INFO of dout_tvalid: signal is "xilinx.com:interface:axis_rtl:1.0 dout tvalid"; 38 | attribute X_INTERFACE_INFO of dout_tready: signal is "xilinx.com:interface:axis_rtl:1.0 dout tready"; 39 | attribute X_INTERFACE_INFO of dout_tdata: signal is "xilinx.com:interface:axis_rtl:1.0 dout tdata"; 40 | attribute X_INTERFACE_INFO of dout_tlast: signal is "xilinx.com:interface:axis_rtl:1.0 dout tlast"; 41 | 42 | constant fifoDepthIn: integer := 9; 43 | 44 | signal i_tstrobe, i_tready, i_tlast, i_tready1: std_logic; 45 | signal i_tdata: std_logic_vector(63 downto 0); 46 | signal dinA, dinB: signed(31 downto 0); 47 | signal mipmapIn: minMaxArray(1 downto 0); 48 | signal mipmapOut: minMaxArray(1 downto 0); 49 | signal mipmapOutStrobe, mipmapOutReady, mipmapOutLast: std_logic; 50 | 51 | signal fifoIn: std_logic_vector(129 downto 0); 52 | signal fifoOut: std_logic_vector(64 downto 0); 53 | signal fifoWrroom: unsigned(fifoDepthIn-1 downto 0); 54 | signal fifoReady, fifoReady0: std_logic; 55 | begin 56 | -- convert axi to oxi 57 | i_tdata <= din_tdata when rising_edge(din_clk); 58 | i_tlast <= din_tlast when rising_edge(din_clk); 59 | i_tstrobe <= din_tvalid and i_tready1 when rising_edge(din_clk); 60 | i_tready1 <= i_tready when rising_edge(din_clk); 61 | din_tready <= i_tready1; 62 | 63 | i_tready <= mipmapOutReady; 64 | 65 | dinA <= signed(i_tdata(31 downto 0)); 66 | dinB <= signed(i_tdata(63 downto 32)); 67 | mipmapIn <= (to_minMax(dinB, dinB), to_minMax(dinA, dinA)); 68 | 69 | mipmapGen: entity axiMipmap_generator 70 | generic map(channels=>2) 71 | port map(aclk=>din_clk, reset=>reset, 72 | in_tdata=>mipmapIn, in_tstrobe=>i_tstrobe, in_tlast=>i_tlast, 73 | out_tdata=>mipmapOut, out_tstrobe=>mipmapOutStrobe, out_tready=>mipmapOutReady, out_tlast=>mipmapOutLast); 74 | 75 | fifoIn <= mipmapOutLast & 76 | std_logic_vector(mipmapOut(1).upper) & 77 | std_logic_vector(mipmapOut(1).lower) & 78 | '0' & 79 | std_logic_vector(mipmapOut(0).upper) & 80 | std_logic_vector(mipmapOut(0).lower); 81 | 82 | outFifo: entity dcfifo2 83 | generic map(widthIn=>130, widthOut=>65, depthOrderIn=>fifoDepthIn, outputRegisters=>2) 84 | port map(rdclk=>dout_clk, wrclk=>din_clk, 85 | rdvalid=>dout_tvalid, rdready=>dout_tready, rddata=>fifoOut, 86 | wrvalid=>mipmapOutStrobe, wrready=>open, wrdata=>fifoIn, 87 | wrroom=>fifoWrroom); 88 | 89 | dout_tdata <= fifoOut(63 downto 0); 90 | dout_tlast <= fifoOut(64); 91 | 92 | fifoReady0 <= '1' when fifoWrroom >= 16 else '0'; 93 | fifoReady <= fifoReady0 when rising_edge(din_clk); 94 | mipmapOutReady <= fifoReady when rising_edge(din_clk); 95 | end a; 96 | 97 | -------------------------------------------------------------------------------- /sw/platform_linux/parameters.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file parameters.h 3 | * @brief Parameters Definitions. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __PARAMETERS_H__ 40 | #define __PARAMETERS_H__ 41 | 42 | /******************************************************************************/ 43 | /********************** Macros and Constants Definitions **********************/ 44 | /******************************************************************************/ 45 | #define CF_AD9361_RX_BASEADDR 0 46 | #define CF_AD9361_TX_BASEADDR 0 47 | #define CF_AD9361_RX_DMA_BASEADDR 0 48 | #define CF_AD9361_TX_DMA_BASEADDR 0 49 | 50 | #define ADC_DDR_BASEADDR 0 51 | #define DAC_DDR_BASEADDR 0 52 | 53 | #define GPIO_DEVICE_ID 0 54 | #define GPIO_CHIP_BASE 906 55 | #define GPIO_RESET_PIN (GPIO_CHIP_BASE + 100) 56 | #define GPIO_RESET_PIN_2 (GPIO_CHIP_BASE + 113) 57 | #define GPIO_SYNC_PIN (GPIO_CHIP_BASE + 99) 58 | #define GPIO_CAL_SW1_PIN (GPIO_CHIP_BASE + 107) 59 | #define GPIO_CAL_SW2_PIN (GPIO_CHIP_BASE + 108) 60 | #define SPI_DEVICE_ID 0 61 | 62 | #define AD9361_UIO_DEV "/dev/uio0" 63 | #define AD9361_UIO_SIZE "/sys/class/uio/uio0/maps/map0/size" 64 | #define AD9361_UIO_ADDR "/sys/class/uio/uio0/maps/map0/addr" 65 | #define RX_DMA_UIO_DEV "/dev/uio1" 66 | #define RX_DMA_UIO_SIZE "/sys/class/uio/uio1/maps/map0/size" 67 | #define RX_DMA_UIO_ADDR "/sys/class/uio/uio1/maps/map0/addr" 68 | #define RX_BUFF_MEM_SIZE "/sys/class/uio/uio1/maps/map1/size" 69 | #define RX_BUFF_MEM_ADDR "/sys/class/uio/uio1/maps/map1/addr" 70 | #define TX_DMA_UIO_DEV "/dev/uio2" 71 | #define TX_DMA_UIO_SIZE "/sys/class/uio/uio2/maps/map0/size" 72 | #define TX_DMA_UIO_ADDR "/sys/class/uio/uio2/maps/map0/addr" 73 | #define TX_BUFF_MEM_SIZE "/sys/class/uio/uio2/maps/map1/size" 74 | #define TX_BUFF_MEM_ADDR "/sys/class/uio/uio2/maps/map1/addr" 75 | #define SPIDEV_DEV "/dev/spidev32766.0" 76 | #define AD9361_B_UIO_DEV "/dev/uio3" 77 | #define AD9361_B_UIO_SIZE "/sys/class/uio/uio3/maps/map0/size" 78 | #define AD9361_B_UIO_ADDR "/sys/class/uio/uio3/maps/map0/addr" 79 | #define SPIDEV_B_DEV "/dev/spidev32766.1" 80 | 81 | #endif // __PARAMETERS_H__ 82 | -------------------------------------------------------------------------------- /sdr5_data_order.xml: -------------------------------------------------------------------------------- 1 | 7V1dc5u6Fv01eUwGEB/2Y5P2NPfce870tOejNy8dYrDNLTYeTOq0v/5CAo6tpdiYAtoSTmc6iWzL9lrS0l57C3HBbhaP71N/Nf8tCcL4wjKCxwv29sKyLMPI/y8avj83mObouWGWRkHZ9NLwKfoRlo3l62YPURCu956YJUmcRav9xkmyXIaTbK/NT9Nks/+0aRLvv+vKn4XQ8Gnix9j6TxRk87J1VH2v4oHbMJrNy7dmRvXIwq+eXTas536QbHaa2LsLdpMmSfb82+LxJowL8Cpgnl/3yyuPbj9ZGi6zOi+4teLN4/vkXeR6d79k9+HyerG+tJjz3M83P34ov3P5cbPvFQhp8rAMwqIb44Jdb+ZRFn5a+ZPi0U3Oet42zxZx/peZ/zqN4vgmiZP06bUs8MPRdJK3r7M0+RruPOJORuH9NH8Ev0j53b6FaRY+7jSVX+x9mCzCLP2eP6V8lFUgl8OMueXfmxfS7LJpvkPXqGzzy2Ey2/b8AmT+S4mlGNePH/+aWfH074cvDx/Y8t+fna9ff71kI4B1Fa3C2yhM/XQy/w4Y51802wdyH7Blsgw5dMsmP45my/zPSQ5fmLdfF7BF+RB+Uz6wiIKgeBshc/vcTpNl9qn8UIIBdjIv2/lf8uI5xpUDzIwEzNidMTMGZhbRauGvdrhx44KL+zT/bVb8loZ+kL8k9TcFaf5iFeeaNAwGWS0GTatPCt0amhUugzeF/hewxv56HU32uXkVmjDYWxEQmJ2v7Qi+ddWWhrGfRd/21xERFOU7fEii/JO8zBw2rnDeapqz38k6eUgnYfm6XeE/3tWY6yrz01mYQVdP7Gy/+k8Q5gJhWeov16tkHdaYR2m4jn74909PKMb4qvicT5/cub5w3p40g2L/Poyv/cnX2dO82VmPpk8/wqFxeBTyc2kbjZQfeW+9F82xS+PKdl3v58ZNSa21/4JkOl2HP8vpuzfs/d2Xz4vbjfXrH39+Xv3+159vLk1c4Qzgkn7kYHGRw3Yx2pnmInGzWhA3Ma64PjEVQ7Kt/FMBtup4B1glceVDXUs2ribgymwVgbWpAWsBsKaKuPID1pCNK8MBy1QElh+w0oG1EVgVceUHrC0bV/Q7VdpGLWD5ASsdWPQlAKvyRpID3bab2ki+I68zEykmywOyNkkaPNmtxX20VMJJHh6G2jtJYQ7awfV4Os3O6TgRwTa3NvWcjhPyZzryawhBlObTJEoKenJBK4BoY8Vy3H24nZp1hTZWLDHWLpoCTbB2DXJYozBpgjWMa0Fypmes0TtogjWMa+lYO5hiPJS6NU8Du1pF00lZzs9tIbuOFruV8qcmPfUZ18JDSRvC2BLUY7Rrh0SCMLYE9Rfd1aHcDWFs6emti6UygFb1NAOg7jRMM0BHVmdphlfYwtXx/iFdFx9RqaL1kbFIKtdwyXHcXbLB9LAMeEDnVAo0+UXFli58HpYGNcGaVykCWGubGIBgSVDn6hlrbRMDsPrKxxoTA5qYVQKagWZVUUNFUI/RrCqaCCCov/qaVfnYDtCsQim7qVmF4nrXZtVDs1rwooVV9YZuVas1TL8wE0Ih6bI3Go5VlY/1YKzqdruGPKwHY1UJYK2vVZWvGdrWVQlgK7CqrprgEhRg9Kqmpya4BBUXzWrdi7mn0yKoz5ej1UMGdOi5edThdnCT2Dw6Om0zEtlrG2qoelfXNoiBHaN71OHyMQLAolXsPaZuA1j+eg75wKIvVPL6sRrBc8/AoglU8grdGvFHz8Ci41PywjxeY+UDi3bvkCMhCyyvsfKBRa93yI2QBbaGz+sZWPR5fePaUaINZFd6bX1co0apKNa8YMjHGv2ZLlhTq71vP5CGWNvksEYXp2iynpw+WwYaOUWT9eT02DLQyx0SCcrY0tPf0w6woYwtPb3V9pAA/vBhAhpR41wbRbGmtofaMrT1ffy4JqAh2vo+flwTwFqbQwLo6XN1dwP142N6emyeVp2jjC05/TXR1ykaH9PTW7PGRk3Vr7sAV8Jf29/0LEI4baDj6y4sE52iPocEvIxFUldeWPsv6O7CC8vU1qtCzkX2oT7bnaYaYs2LlHystfWqMK7lx6HaelUY1/Kx1sar0tPnE2+bQRlbcnpsoVdVNA9AT3+rUaq+V6Wnt4I7aGiytkHORb5GaHswLuRg5GOtre+DcS1fQ7T1fTCu5WONvk/R+JigPqPPUzQ+JqjH6OsUjY/p6S9DX6dofExPb5k2e0ub3li9Q2zR12miCUz+uNVmbyns+ZBe32Xa7C0FbGUfA5GrEmB7AFqq17Tx61hdrR11h6vg7BJFD4ZpCm6HgxaNg6oHwwC48lcygXMY6QGu/KWserddcMeagCt9LbPROwC0qu8DA8fW9GYx0FHPN4vJxwuwpdE+MPu1+TSQE3gtewCbMkECmx6GDR31fBh2/obAli6HYb+MxMFORW1rcza5fSm2fD/dFdYjclhruycTxrV0V2hruycTxrV8rLXZk0lPn6vIT/08PT09drTZk0lPfx10y4rWQOjprVMjZlPdqgLqTfNG0FHfeSMHo75NkgYFXas4qnMgOVGfuh2GQ/WpDsaYh+IeqsVIfvEQXdjf6wGblnPaZjCywNY4MaFfYF2MJlU8HZrXdALAYiip4unQTo3zBXsGFuPI3o18BxorOoSiZ2Cx3qHiCfy8xhIAFksTKp5nDnGzfGCxLKDieea8xhIAdoB+snHpEzrqu/Tpop/UaB+CO3RT6WpqKuWrHJpKJSNJarccsjxNTaV8YNFUqhhJgqmUDyyaSiXzS9RuOWR5eppKAsDqcfcx0Fj5wOppKgkAO0BTycYtmUrm9mwqPTSV2uyn9YZuKT09LSWTr3F61inlA1vJoepenZd1+cCipVQxQOfDHQLAoqVkSg5ZXmRt6cgKPKWKYxZUVj6ygnMqdMjcEUAWXSVT0a+DzspHdgC2Es5YcOyr8e7PfodNL9pkfe+EHem6E3Y0dIc50sNh8scdWfLlTg+HyWxqwI7RYSoZr/OiTgBZgcVUMV5nI3LIosdUcsjyKiu4ELBnYPUoW4LKygdWE4cJKisfWU0cJqisfGTRYSo5ZHmVlX4pxxjtn5IjlldZ+cCi+2IqbhQDlZWPLNovpuL2EFBZ2ciyKrGo+N5GONhb9t5GZqD9UnLE8nUo+cCi+2KHzpkliyyfBpaPrMB+HTpkliyyfB1KPrI17iimW7Vk64N+tj5iGVzZxd7vt+NyCTPQ4umyJ+9lYA60YsIMdJk6VExM2RtxmHHijQzIImuTQ1ZgM3E5UQBZlxyyaDNtJUPLETVkTbSZStZPeZmVXYtiJtrMg7c0IYssL7PykRX4TCWrUbzMykcWfaatg88kgCz6TCUjA15mZRejmIke8ODNjcgiy8usfGTRgGlRmiaArKDOp6S35WVWPrICB6YisLzMSq9GmWjADt7mjCyyvMxKR7bqWfl9KrzMykcWHZijpLflZbZHZP8eT6bm5ePvX779kf7rjt3cr6O7S8QVUN2pmZRH0StUMDE5wD2bQ7JuwcR1oaOrzi4pWcTmf+/+d/vj43zt3Fr26u7tOLlEqwxU7RBTFTb+U9QxPiTrqLw5y32SZcmiXoGDL45kSTGH1nM/eBoNxSQL/PV8O+Oep84/JbHm83NXxWdbPM7yCTi/ipK19xBdRZNk+T4tvi0/DSdG8S9vn+UPl/c7yAOBm9F2rAmqKDD8Xp1/FneNlytwkyPBaGzjXsRCUlu4EV/+eAkUE8mX8fSzhY+bl7XA62eqWpX/23LTsLbJd+SZ/U7UFurQ2nBqtMWpIZfTGnfpGwynVlucWnI5beHqWm04ZW1xyuRyWuOug8c4fZ3Fdf7hs5JvF9gnz/ExCW26vsJg6ZjjGnc7HCzHx0KfptrcN8eYozpzXHfZbKrVfXMs2K8AJJ8d7Yn5ZemOVrBZ4uSpq0tYxdoKq/iO+g6rBPs0hktqW/6H76h3Us/Jp51iUluk2pJJPWefXrhw2iLVkUxqC+knXcPhoyradI3tPRxuIR+lLcnH4p+m8tw7yecEVe01uDnJx3S/a5JrZKjOxvaIseUP55VvbFvISekSWdltRVZ8R31HVoItW8MltS0PxHfUO6nnFNTOSdxtkepKJtU6k7rlwmuLVE8yqS2koHQNh4+qaNM1tu9wuDpS7kxyg/inqTz3TvI5RVV7DW5O8jHd75rkGikqvY1tEKXhpPwam3CdteN1HZeY12Wdzma1Zq/TVgTtSk4ws04TzGqRepSLuqTC6HB6JrXThLJapB7lovFM7ZvUTrc4qkXqUS4az9Tu7jsrJrXTPY1qkXqUi8YztWdS7Rbyx7qQepSLxjPV65nUFvLHupB6lIvGM7U1UvM/0yTJdp9eGL3fkiAsnvF/ -------------------------------------------------------------------------------- /adc_amp2.asc: -------------------------------------------------------------------------------- 1 | Version 4 2 | SHEET 1 880 680 3 | WIRE -704 -192 -928 -192 4 | WIRE -560 -192 -704 -192 5 | WIRE -352 -192 -560 -192 6 | WIRE -160 -192 -352 -192 7 | WIRE 80 -192 -160 -192 8 | WIRE 272 -192 80 -192 9 | WIRE 512 -192 272 -192 10 | WIRE -704 -160 -704 -192 11 | WIRE -560 -160 -560 -192 12 | WIRE -352 -144 -352 -192 13 | WIRE 80 -144 80 -192 14 | WIRE -704 -48 -704 -80 15 | WIRE -560 -48 -560 -80 16 | WIRE -352 -48 -352 -64 17 | WIRE -320 -48 -352 -48 18 | WIRE -160 -48 -160 -112 19 | WIRE -160 -48 -176 -48 20 | WIRE -48 -48 -160 -48 21 | WIRE 80 -48 80 -64 22 | WIRE 112 -48 80 -48 23 | WIRE 272 -48 272 -112 24 | WIRE 272 -48 256 -48 25 | WIRE -1184 0 -1248 0 26 | WIRE -800 0 -1104 0 27 | WIRE -560 0 -560 -48 28 | WIRE -480 0 -560 0 29 | WIRE -160 0 -160 -48 30 | WIRE 272 0 272 -48 31 | WIRE -560 16 -560 0 32 | WIRE -560 32 -560 16 33 | WIRE -800 48 -800 0 34 | WIRE -768 48 -800 48 35 | WIRE -704 48 -704 -48 36 | WIRE -400 48 -400 0 37 | WIRE -320 48 -320 -48 38 | WIRE -320 48 -336 48 39 | WIRE -224 48 -320 48 40 | WIRE -48 48 -48 -48 41 | WIRE 112 48 112 -48 42 | WIRE 112 48 96 48 43 | WIRE 208 48 112 48 44 | WIRE 512 48 512 -192 45 | WIRE -704 64 -704 48 46 | WIRE -624 64 -704 64 47 | WIRE -1248 96 -1248 80 48 | WIRE -560 176 -560 112 49 | WIRE -560 176 -1248 176 50 | WIRE -160 176 -160 96 51 | WIRE -160 176 -560 176 52 | WIRE 272 176 272 96 53 | WIRE 272 176 -160 176 54 | WIRE 512 176 512 128 55 | WIRE 512 176 272 176 56 | FLAG 512 176 0 57 | SYMBOL voltage 512 32 R0 58 | WINDOW 123 0 0 Left 2 59 | WINDOW 39 0 0 Left 2 60 | SYMATTR InstName V1 61 | SYMATTR Value 5 62 | SYMBOL res 256 -208 R0 63 | SYMATTR InstName R1 64 | SYMATTR Value 100 65 | SYMBOL res 64 -160 R0 66 | SYMATTR InstName R2 67 | SYMATTR Value 22k 68 | SYMBOL cap 176 -64 R90 69 | WINDOW 0 0 32 VBottom 2 70 | WINDOW 3 32 32 VTop 2 71 | SYMATTR InstName C1 72 | SYMATTR Value 100n 73 | SYMBOL res 272 -64 R90 74 | WINDOW 0 0 56 VBottom 2 75 | WINDOW 3 32 56 VTop 2 76 | SYMATTR InstName R3 77 | SYMATTR Value 330 78 | SYMBOL voltage -1248 80 R0 79 | WINDOW 0 36 45 Left 2 80 | WINDOW 3 -276 62 Left 2 81 | WINDOW 123 0 0 Left 2 82 | WINDOW 39 0 0 Left 2 83 | SYMATTR InstName V2 84 | SYMATTR Value SINE(0 0.003 80000k) 85 | SYMBOL cap 96 32 R90 86 | WINDOW 0 0 32 VBottom 2 87 | WINDOW 3 32 32 VTop 2 88 | SYMATTR InstName C2 89 | SYMATTR Value 100n 90 | SYMBOL res 48 32 R90 91 | WINDOW 0 0 56 VBottom 2 92 | WINDOW 3 32 56 VTop 2 93 | SYMATTR InstName R4 94 | SYMATTR Value 100 95 | SYMBOL voltage -1248 -16 R0 96 | WINDOW 3 -271 73 Left 2 97 | WINDOW 123 -271 101 Left 2 98 | WINDOW 39 0 0 Left 2 99 | SYMATTR Value SINE(0 0.003 81000k) 100 | SYMATTR Value2 AC 2 101 | SYMATTR InstName V3 102 | SYMBOL 2sc3357 208 0 R0 103 | SYMATTR InstName U1 104 | SYMBOL res -368 -160 R0 105 | SYMATTR InstName R6 106 | SYMATTR Value 22k 107 | SYMBOL cap -256 -64 R90 108 | WINDOW 0 0 32 VBottom 2 109 | WINDOW 3 32 32 VTop 2 110 | SYMATTR InstName C3 111 | SYMATTR Value 100n 112 | SYMBOL res -160 -64 R90 113 | WINDOW 0 0 56 VBottom 2 114 | WINDOW 3 32 56 VTop 2 115 | SYMATTR InstName R7 116 | SYMATTR Value 470 117 | SYMBOL cap -336 32 R90 118 | WINDOW 0 0 32 VBottom 2 119 | WINDOW 3 32 32 VTop 2 120 | SYMATTR InstName C4 121 | SYMATTR Value 100n 122 | SYMBOL 2sc3357 -224 0 R0 123 | WINDOW 3 -5 114 Left 2 124 | SYMATTR InstName U2 125 | SYMBOL 2sc3357 -624 16 R0 126 | WINDOW 3 -5 114 Left 2 127 | SYMATTR InstName U3 128 | SYMBOL res -720 -176 R0 129 | SYMATTR InstName R5 130 | SYMATTR Value 22k 131 | SYMBOL cap -704 32 R90 132 | WINDOW 0 0 32 VBottom 2 133 | WINDOW 3 32 32 VTop 2 134 | SYMATTR InstName C5 135 | SYMATTR Value 100n 136 | SYMBOL res -544 -64 R90 137 | WINDOW 0 0 56 VBottom 2 138 | WINDOW 3 32 56 VTop 2 139 | SYMATTR InstName R10 140 | SYMATTR Value 470 141 | SYMBOL cap -640 -64 R90 142 | WINDOW 0 0 32 VBottom 2 143 | WINDOW 3 32 32 VTop 2 144 | SYMATTR InstName C6 145 | SYMATTR Value 100n 146 | SYMBOL res -384 -16 R90 147 | WINDOW 0 0 56 VBottom 2 148 | WINDOW 3 32 56 VTop 2 149 | SYMATTR InstName R8 150 | SYMATTR Value 100 151 | SYMBOL res -1088 -16 R90 152 | WINDOW 0 0 56 VBottom 2 153 | WINDOW 3 32 56 VTop 2 154 | SYMATTR InstName R12 155 | SYMATTR Value 100 156 | SYMBOL res -576 -176 R0 157 | SYMATTR InstName R9 158 | SYMATTR Value 100 159 | SYMBOL res -176 -208 R0 160 | SYMATTR InstName R11 161 | SYMATTR Value 100 162 | TEXT -104 288 Left 2 !.inc C:\\Program Files\\LTC\\LTspiceIV\\lib\\sub\\2sc3357.sub 163 | TEXT -408 312 Left 2 !.tran 0 20u 0 100p 164 | TEXT -112 248 Left 2 !.inc C:\\Program Files\\LTC\\LTspiceIV\\lib\\sub\\bfg591.sub 165 | TEXT -976 296 Left 2 !;ac oct 10 1000k 500000k 166 | -------------------------------------------------------------------------------- /hdl_websdr/sdr5.srcs/sources_1/new/fm_channelizer.vhd: -------------------------------------------------------------------------------- 1 | library ieee; 2 | library work; 3 | use ieee.numeric_std.all; 4 | use ieee.std_logic_1164.all; 5 | use work.fft_types.all; 6 | use work.dcram; 7 | use work.channelSelector; 8 | use work.channelizer1024_16; 9 | use work.axiRamWriter; 10 | 11 | entity fmChannelizer is 12 | generic(inBits, outBits, ramDepthOrder: integer; 13 | outWidth: integer := 32); 14 | port(inClk, outClk, outClk_unbuffered: in std_logic; 15 | din_tdata: in std_logic_vector(inBits*2-1 downto 0); 16 | din_tvalid: in std_logic := '1'; 17 | din_tready: out std_logic; 18 | 19 | dout_tdata: out std_logic_vector(outWidth*2-1 downto 0); 20 | dout_tvalid: out std_logic; 21 | dout_tlast: out std_logic; 22 | 23 | -- channels ram access 24 | 25 | --axi memory mapped slave, read side 26 | ctrl_aclk,ctrl_rst: in std_logic; 27 | ctrl_arready: out std_logic; 28 | ctrl_arvalid: in std_logic; 29 | ctrl_araddr: in std_logic_vector(ramDepthOrder-1 downto 0); 30 | ctrl_arprot: in std_logic_vector(2 downto 0); 31 | 32 | ctrl_rvalid: out std_logic; 33 | ctrl_rready: in std_logic; 34 | ctrl_rdata: out std_logic_vector(32-1 downto 0); 35 | 36 | --axi memory mapped slave, write side 37 | ctrl_awaddr: in std_logic_vector(ramDepthOrder-1 downto 0); 38 | ctrl_awprot: in std_logic_vector(2 downto 0); 39 | ctrl_awvalid: in std_logic; 40 | ctrl_awready: out std_logic; 41 | ctrl_wdata: in std_logic_vector(32-1 downto 0); 42 | ctrl_wvalid: in std_logic; 43 | ctrl_wready: out std_logic; 44 | 45 | ctrl_bvalid: out std_logic; 46 | ctrl_bready: in std_logic; 47 | ctrl_bresp: out std_logic_vector(1 downto 0) 48 | ); 49 | end entity; 50 | architecture a of fmChannelizer is 51 | constant channelBits: integer := 10; 52 | signal din, chOut, dout: complex; 53 | signal chChannel: unsigned(channelBits-1 downto 0); 54 | signal chValid, chSelValid, chSelLast: std_logic; 55 | signal tlast0, tlast: std_logic; 56 | 57 | -- 8192 counts * 16 channels * 8 bytes = 1MiB 58 | signal tlastCounter: unsigned(12 downto 0) := (others=>'0'); 59 | 60 | signal ramWClk: std_logic; 61 | signal ramWEn: std_logic; 62 | signal ramWAddr: unsigned(ramDepthOrder-1 downto 0); 63 | signal ramWData: unsigned(channelBits downto 0); 64 | signal ramWData0: std_logic_vector(31 downto 0); 65 | 66 | attribute X_INTERFACE_INFO : string; 67 | attribute X_INTERFACE_PARAMETER : string; 68 | 69 | attribute X_INTERFACE_INFO of inClk : signal is "xilinx.com:signal:clock:1.0 inClk CLK"; 70 | attribute X_INTERFACE_PARAMETER of inClk: signal is "ASSOCIATED_BUSIF din"; 71 | attribute X_INTERFACE_INFO of outClk : signal is "xilinx.com:signal:clock:1.0 outClk CLK"; 72 | attribute X_INTERFACE_PARAMETER of outClk: signal is "ASSOCIATED_BUSIF dout"; 73 | attribute X_INTERFACE_INFO of ctrl_aclk : signal is "xilinx.com:signal:clock:1.0 ctrl_aclk CLK"; 74 | attribute X_INTERFACE_PARAMETER of ctrl_aclk: signal is "ASSOCIATED_BUSIF ctrl"; 75 | 76 | attribute X_INTERFACE_INFO of din_tvalid: signal is "xilinx.com:interface:axis_rtl:1.0 din tvalid"; 77 | attribute X_INTERFACE_INFO of din_tready: signal is "xilinx.com:interface:axis_rtl:1.0 din tready"; 78 | attribute X_INTERFACE_INFO of din_tdata: signal is "xilinx.com:interface:axis_rtl:1.0 din tdata"; 79 | attribute X_INTERFACE_INFO of dout_tvalid: signal is "xilinx.com:interface:axis_rtl:1.0 dout tvalid"; 80 | attribute X_INTERFACE_INFO of dout_tdata: signal is "xilinx.com:interface:axis_rtl:1.0 dout tdata"; 81 | attribute X_INTERFACE_INFO of dout_tlast: signal is "xilinx.com:interface:axis_rtl:1.0 dout tlast"; 82 | begin 83 | din <= complex_unpack(din_tdata); 84 | din_tready <= '1'; 85 | 86 | ch: entity channelizer1024_16 87 | generic map(inBits=>inBits, outBits=>outBits) 88 | port map(inClk=>inClk, outClk=>outClk, outClk_unbuffered=>outClk_unbuffered, 89 | din=>din, dinValid=>din_tvalid, 90 | dout=>chOut, doutChannel=>chChannel, doutValid=>chValid); 91 | 92 | chSel: entity channelSelector 93 | generic map(dataBits=>outBits, channelBits=>channelBits, ramDepthOrder=>ramDepthOrder) 94 | port map(clk=>outClk, din=>chOut, dinChannel=>chChannel, dinValid=>chValid, 95 | dout=>dout, doutValid=>chSelValid, doutLast=>chSelLast, 96 | ramWClk=>ramWClk, ramWEn=>ramWEn, ramWAddr=>ramWAddr, ramWData=>ramWData); 97 | ramWClk <= ctrl_aclk; 98 | 99 | dout_tvalid <= chSelValid; 100 | 101 | -- assert tlast every time tlastCounter overflows 102 | tlastCounter <= tlastCounter+1 when chSelLast='1' and chSelValid='1' and rising_edge(outClk); 103 | tlast0 <= '1' when tlastCounter=(tlastCounter'range=>'1') else '0'; 104 | tlast <= tlast0 when rising_edge(outClk); 105 | dout_tlast <= chSelLast and tlast; 106 | 107 | axiRam: entity axiRamWriter 108 | generic map(memAddrWidth=>ramDepthOrder, wordWidth=>32) 109 | port map(ctrl_aclk,ctrl_rst,ctrl_arready,ctrl_arvalid,ctrl_araddr,ctrl_arprot, 110 | ctrl_rvalid,ctrl_rready,ctrl_rdata, 111 | ctrl_awaddr,ctrl_awprot,ctrl_awvalid,ctrl_awready, 112 | ctrl_wdata,ctrl_wvalid,ctrl_wready, 113 | ctrl_bvalid,ctrl_bready,ctrl_bresp, 114 | ramWAddr, ramWData0, ramWEn); 115 | ramWData <= unsigned(ramWData0(ramWData'range)); 116 | 117 | dout_tdata <= complex_pack(dout, outWidth); 118 | end a; 119 | -------------------------------------------------------------------------------- /sw/platform_xilinx/parameters.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file parameters.h 3 | * @brief Parameters Definitions. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __PARAMETERS_H__ 40 | #define __PARAMETERS_H__ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | #ifdef XPAR_AXI_AD9361_0_BASEADDR 51 | #define AD9361_RX_0_BASEADDR XPAR_AXI_AD9361_0_BASEADDR 52 | #define AD9361_TX_0_BASEADDR XPAR_AXI_AD9361_0_BASEADDR + 0x4000 53 | #else 54 | #define AD9361_RX_0_BASEADDR XPAR_AXI_AD9361_BASEADDR 55 | #define AD9361_TX_0_BASEADDR XPAR_AXI_AD9361_BASEADDR + 0x4000 56 | #endif 57 | #ifdef XPAR_AXI_AD9361_1_BASEADDR 58 | #define AD9361_RX_1_BASEADDR XPAR_AXI_AD9361_1_BASEADDR 59 | #define AD9361_TX_1_BASEADDR XPAR_AXI_AD9361_1_BASEADDR + 0x4000 60 | #else 61 | #ifdef XPAR_AXI_AD9361_0_BASEADDR 62 | #define AD9361_RX_1_BASEADDR XPAR_AXI_AD9361_0_BASEADDR 63 | #define AD9361_TX_1_BASEADDR XPAR_AXI_AD9361_0_BASEADDR + 0x4000 64 | #else 65 | #define AD9361_RX_1_BASEADDR XPAR_AXI_AD9361_BASEADDR 66 | #define AD9361_TX_1_BASEADDR XPAR_AXI_AD9361_BASEADDR + 0x4000 67 | #endif 68 | #endif 69 | #ifdef XPAR_AXI_DMAC_0_BASEADDR 70 | #define CF_AD9361_RX_DMA_BASEADDR XPAR_AXI_DMAC_0_BASEADDR 71 | #else 72 | #define CF_AD9361_RX_DMA_BASEADDR XPAR_AXI_AD9361_ADC_DMA_BASEADDR 73 | #endif 74 | #ifdef XPAR_AXI_DMAC_1_BASEADDR 75 | #define CF_AD9361_TX_DMA_BASEADDR XPAR_AXI_DMAC_1_BASEADDR 76 | #else 77 | #define CF_AD9361_TX_DMA_BASEADDR XPAR_AXI_AD9361_DAC_DMA_BASEADDR 78 | #endif 79 | #ifdef _XPARAMETERS_PS_H_ 80 | #define ADC_DDR_BASEADDR XPAR_DDR_MEM_BASEADDR + 0x800000 81 | #define DAC_DDR_BASEADDR XPAR_DDR_MEM_BASEADDR + 0xA000000 82 | 83 | #ifdef XPS_BOARD_ZCU102 84 | #define GPIO_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID 85 | #define GPIO_RESET_PIN 124 86 | #define GPIO_SYNC_PIN 123 87 | #define GPIO_ENABLE_PIN 125 88 | #define GPIO_TXNRX_PIN 126 89 | #define SPI_DEVICE_ID XPAR_PSU_SPI_0_DEVICE_ID 90 | #else 91 | #define GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID 92 | #define GPIO_RESET_PIN 100 93 | #define GPIO_SYNC_PIN 99 94 | #define GPIO_ENABLE_PIN 101 95 | #define GPIO_TXNRX_PIN 102 96 | #define SPI_DEVICE_ID XPAR_PS7_SPI_0_DEVICE_ID 97 | #endif 98 | #define GPIO_RESET_PIN_ZC702 84 99 | #define GPIO_RESET_PIN_ZC706 83 100 | #define GPIO_RESET_PIN_ZED 100 101 | #define GPIO_RESET_PIN_2 113 102 | #define GPIO_CAL_SW1_PIN 107 103 | #define GPIO_CAL_SW2_PIN 108 104 | #define GPIO_CTL0_PIN 94 105 | #define GPIO_CTL1_PIN 95 106 | #define GPIO_CTL2_PIN 96 107 | #define GPIO_CTL3_PIN 97 108 | 109 | #else 110 | #ifdef XPAR_DDR3_SDRAM_S_AXI_BASEADDR 111 | #define ADC_DDR_BASEADDR XPAR_DDR3_SDRAM_S_AXI_BASEADDR + 0x800000 112 | #define DAC_DDR_BASEADDR XPAR_DDR3_SDRAM_S_AXI_BASEADDR + 0xA000000 113 | #else 114 | #define ADC_DDR_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR + 0x800000 115 | #define DAC_DDR_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR + 0xA000000 116 | #endif 117 | #define GPIO_DEVICE_ID 0 118 | #define GPIO_RESET_PIN 46 119 | #ifdef XPAR_AXI_SPI_0_DEVICE_ID 120 | #define SPI_DEVICE_ID XPAR_AXI_SPI_0_DEVICE_ID 121 | #else 122 | #define SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID 123 | #endif 124 | #endif 125 | 126 | #endif // __PARAMETERS_H__ 127 | -------------------------------------------------------------------------------- /sw/util.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file util.h 3 | * @brief Header file of Util driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __NO_OS_PORT_H__ 40 | #define __NO_OS_PORT_H__ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include 46 | #include 47 | #include 48 | #include 49 | #include "ad9361.h" 50 | #include "common.h" 51 | #include "config.h" 52 | 53 | 54 | /******************************************************************************/ 55 | /********************** Macros and Constants Definitions **********************/ 56 | /******************************************************************************/ 57 | #define SUCCESS 0 58 | #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) 59 | #define min(x, y) (((x) < (y)) ? (x) : (y)) 60 | #define min_t(type, x, y) (type)min((type)(x), (type)(y)) 61 | #define max(x, y) (((x) > (y)) ? (x) : (y)) 62 | #define max_t(type, x, y) (type)max((type)(x), (type)(y)) 63 | #define clamp(val, min_val, max_val) (max(min((val), (max_val)), (min_val))) 64 | #define clamp_t(type, val, min_val, max_val) (type)clamp((type)(val), (type)(min_val), (type)(max_val)) 65 | #define DIV_ROUND_UP(x, y) (((x) + (y) - 1) / (y)) 66 | #define DIV_ROUND_CLOSEST(x, divisor) (((x) + (divisor) / 2) / (divisor)) 67 | #define BIT(x) (1 << (x)) 68 | #define CLK_IGNORE_UNUSED BIT(3) 69 | #define CLK_GET_RATE_NOCACHE BIT(6) 70 | 71 | #if defined(HAVE_VERBOSE_MESSAGES) 72 | #define dev_err(dev, format, ...) ({printf(format, ## __VA_ARGS__);printf("\n"); }) 73 | #define dev_warn(dev, format, ...) ({printf(format, ## __VA_ARGS__);printf("\n"); }) 74 | #if defined(HAVE_DEBUG_MESSAGES) 75 | #define dev_dbg(dev, format, ...) ({printf(format, ## __VA_ARGS__);printf("\n"); }) 76 | #else 77 | #define dev_dbg(dev, format, ...) ({ if (0) printf(format, ## __VA_ARGS__); }) 78 | #endif 79 | #define printk(format, ...) printf(format, ## __VA_ARGS__) 80 | #else 81 | #define dev_err(dev, format, ...) ({ if (0) printf(format, ## __VA_ARGS__); }) 82 | #define dev_warn(dev, format, ...) ({ if (0) printf(format, ## __VA_ARGS__); }) 83 | #define dev_dbg(dev, format, ...) ({ if (0) printf(format, ## __VA_ARGS__); }) 84 | #define printk(format, ...) ({ if (0) printf(format, ## __VA_ARGS__); }) 85 | #endif 86 | 87 | struct device { 88 | }; 89 | 90 | struct spi_device { 91 | struct device dev; 92 | uint8_t id_no; 93 | }; 94 | 95 | struct axiadc_state { 96 | struct ad9361_rf_phy *phy; 97 | uint32_t pcore_version; 98 | }; 99 | 100 | struct axiadc_chip_info { 101 | char *name; 102 | int32_t num_channels; 103 | }; 104 | 105 | struct axiadc_converter { 106 | struct axiadc_chip_info *chip_info; 107 | uint32_t scratch_reg[16]; 108 | }; 109 | 110 | #ifdef WIN32 111 | #include "basetsd.h" 112 | typedef SSIZE_T ssize_t; 113 | #define strsep(s, ct) 0 114 | #define snprintf(s, n, format, ...) 0 115 | #define __func__ __FUNCTION__ 116 | #endif 117 | 118 | /******************************************************************************/ 119 | /************************ Functions Declarations ******************************/ 120 | /******************************************************************************/ 121 | int32_t clk_prepare_enable(struct clk *clk); 122 | uint32_t clk_get_rate(struct ad9361_rf_phy *phy, 123 | struct refclk_scale *clk_priv); 124 | int32_t clk_set_rate(struct ad9361_rf_phy *phy, 125 | struct refclk_scale *clk_priv, 126 | uint32_t rate); 127 | uint32_t int_sqrt(uint32_t x); 128 | int32_t ilog2(int32_t x); 129 | uint64_t do_div(uint64_t* n, 130 | uint64_t base); 131 | uint32_t find_first_bit(uint32_t word); 132 | void * ERR_PTR(long error); 133 | void *zmalloc(size_t size); 134 | 135 | #endif 136 | -------------------------------------------------------------------------------- /sw/platform_linux/platform.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file platform.h 3 | * @brief Header file of Platform driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2014(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef PLATFORM_H_ 40 | #define PLATFORM_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "stdint.h" 46 | #include "../util.h" 47 | 48 | /******************************************************************************/ 49 | /********************** Macros and Constants Definitions **********************/ 50 | /******************************************************************************/ 51 | #define ADI_REG_VERSION 0x0000 52 | 53 | #define ADI_REG_ID 0x0004 54 | 55 | #define ADI_REG_RSTN 0x0040 56 | #define ADI_RSTN (1 << 0) 57 | #define ADI_MMCM_RSTN (1 << 1) 58 | 59 | #define ADI_REG_CNTRL 0x0044 60 | #define ADI_R1_MODE (1 << 2) 61 | #define ADI_DDR_EDGESEL (1 << 1) 62 | #define ADI_PIN_MODE (1 << 0) 63 | 64 | #define ADI_REG_STATUS 0x005C 65 | #define ADI_MUX_PN_ERR (1 << 3) 66 | #define ADI_MUX_PN_OOS (1 << 2) 67 | #define ADI_MUX_OVER_RANGE (1 << 1) 68 | #define ADI_STATUS (1 << 0) 69 | 70 | #define ADI_REG_DELAY_CNTRL 0x0060 /* <= v8.0 */ 71 | #define ADI_DELAY_SEL (1 << 17) 72 | #define ADI_DELAY_RWN (1 << 16) 73 | #define ADI_DELAY_ADDRESS(x) (((x) & 0xFF) << 8) 74 | #define ADI_TO_DELAY_ADDRESS(x) (((x) >> 8) & 0xFF) 75 | #define ADI_DELAY_WDATA(x) (((x) & 0x1F) << 0) 76 | #define ADI_TO_DELAY_WDATA(x) (((x) >> 0) & 0x1F) 77 | 78 | #define ADI_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 79 | #define ADI_PN_SEL (1 << 10) /* !v8.0 */ 80 | #define ADI_IQCOR_ENB (1 << 9) 81 | #define ADI_DCFILT_ENB (1 << 8) 82 | #define ADI_FORMAT_SIGNEXT (1 << 6) 83 | #define ADI_FORMAT_TYPE (1 << 5) 84 | #define ADI_FORMAT_ENABLE (1 << 4) 85 | #define ADI_PN23_TYPE (1 << 1) /* !v8.0 */ 86 | #define ADI_ENABLE (1 << 0) 87 | 88 | #define ADI_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 89 | #define ADI_PN_ERR (1 << 2) 90 | #define ADI_PN_OOS (1 << 1) 91 | #define ADI_OVER_RANGE (1 << 0) 92 | 93 | #define ADI_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 94 | #define ADI_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 95 | #define ADI_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 96 | #define ADI_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 97 | #define ADI_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 98 | 99 | #define ADI_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 100 | #define ADI_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 101 | #define ADI_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 102 | #define ADI_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 103 | #define ADI_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define PCORE_VERSION(major, minor, letter) ((major << 16) | (minor << 8) | letter) 106 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 107 | #define PCORE_VERSION_MINOR(version) ((version >> 8) & 0xff) 108 | #define PCORE_VERSION_LETTER(version) (version & 0xff) 109 | 110 | #define ADI_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 111 | #define ADI_ADC_PN_SEL(x) (((x) & 0xF) << 16) 112 | #define ADI_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 113 | #define ADI_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 114 | #define ADI_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 115 | 116 | /* PCORE Version > 8.00 */ 117 | #define ADI_REG_DELAY(l) (0x0800 + (l) * 0x4) 118 | 119 | enum adc_pn_sel { 120 | ADC_PN9 = 0, 121 | ADC_PN23A = 1, 122 | ADC_PN7 = 4, 123 | ADC_PN15 = 5, 124 | ADC_PN23 = 6, 125 | ADC_PN31 = 7, 126 | ADC_PN_CUSTOM = 9, 127 | ADC_PN_END = 10, 128 | }; 129 | 130 | enum adc_data_sel { 131 | ADC_DATA_SEL_NORM, 132 | ADC_DATA_SEL_LB, /* DAC loopback */ 133 | ADC_DATA_SEL_RAMP, /* TBD */ 134 | }; 135 | 136 | /******************************************************************************/ 137 | /************************ Functions Declarations ******************************/ 138 | /******************************************************************************/ 139 | int32_t spi_init(uint32_t device_id, 140 | uint8_t clk_pha, 141 | uint8_t clk_pol); 142 | int spi_write_then_read(struct spi_device *spi, 143 | const unsigned char *txbuf, unsigned n_tx, 144 | unsigned char *rxbuf, unsigned n_rx); 145 | void gpio_init(uint32_t device_id); 146 | void gpio_direction(uint16_t pin, uint8_t direction); 147 | bool gpio_is_valid(int number); 148 | void gpio_set_value(unsigned gpio, int value); 149 | void udelay(unsigned long usecs); 150 | void mdelay(unsigned long msecs); 151 | unsigned long msleep_interruptible(unsigned int msecs); 152 | void axiadc_init(struct ad9361_rf_phy *phy); 153 | int axiadc_post_setup(struct ad9361_rf_phy *phy); 154 | unsigned int axiadc_read(struct axiadc_state *st, unsigned long reg); 155 | void axiadc_write(struct axiadc_state *st, unsigned reg, unsigned val); 156 | int axiadc_set_pnsel(struct axiadc_state *st, int channel, enum adc_pn_sel sel); 157 | void axiadc_idelay_set(struct axiadc_state *st, unsigned lane, unsigned val); 158 | #endif 159 | -------------------------------------------------------------------------------- /sw/platform_generic/platform.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file platform.h 3 | * @brief Header file of Platform driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2014(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef PLATFORM_H_ 40 | #define PLATFORM_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "stdint.h" 46 | #include "../util.h" 47 | 48 | /******************************************************************************/ 49 | /********************** Macros and Constants Definitions **********************/ 50 | /******************************************************************************/ 51 | #define ADI_REG_VERSION 0x0000 52 | 53 | #define ADI_REG_ID 0x0004 54 | 55 | #define ADI_REG_RSTN 0x0040 56 | #define ADI_RSTN (1 << 0) 57 | #define ADI_MMCM_RSTN (1 << 1) 58 | 59 | #define ADI_REG_CNTRL 0x0044 60 | #define ADI_R1_MODE (1 << 2) 61 | #define ADI_DDR_EDGESEL (1 << 1) 62 | #define ADI_PIN_MODE (1 << 0) 63 | 64 | #define ADI_REG_STATUS 0x005C 65 | #define ADI_MUX_PN_ERR (1 << 3) 66 | #define ADI_MUX_PN_OOS (1 << 2) 67 | #define ADI_MUX_OVER_RANGE (1 << 1) 68 | #define ADI_STATUS (1 << 0) 69 | 70 | #define ADI_REG_DELAY_CNTRL 0x0060 /* <= v8.0 */ 71 | #define ADI_DELAY_SEL (1 << 17) 72 | #define ADI_DELAY_RWN (1 << 16) 73 | #define ADI_DELAY_ADDRESS(x) (((x) & 0xFF) << 8) 74 | #define ADI_TO_DELAY_ADDRESS(x) (((x) >> 8) & 0xFF) 75 | #define ADI_DELAY_WDATA(x) (((x) & 0x1F) << 0) 76 | #define ADI_TO_DELAY_WDATA(x) (((x) >> 0) & 0x1F) 77 | 78 | #define ADI_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 79 | #define ADI_PN_SEL (1 << 10) /* !v8.0 */ 80 | #define ADI_IQCOR_ENB (1 << 9) 81 | #define ADI_DCFILT_ENB (1 << 8) 82 | #define ADI_FORMAT_SIGNEXT (1 << 6) 83 | #define ADI_FORMAT_TYPE (1 << 5) 84 | #define ADI_FORMAT_ENABLE (1 << 4) 85 | #define ADI_PN23_TYPE (1 << 1) /* !v8.0 */ 86 | #define ADI_ENABLE (1 << 0) 87 | 88 | #define ADI_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 89 | #define ADI_PN_ERR (1 << 2) 90 | #define ADI_PN_OOS (1 << 1) 91 | #define ADI_OVER_RANGE (1 << 0) 92 | 93 | #define ADI_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 94 | #define ADI_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 95 | #define ADI_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 96 | #define ADI_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 97 | #define ADI_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 98 | 99 | #define ADI_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 100 | #define ADI_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 101 | #define ADI_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 102 | #define ADI_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 103 | #define ADI_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define PCORE_VERSION(major, minor, letter) ((major << 16) | (minor << 8) | letter) 106 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 107 | #define PCORE_VERSION_MINOR(version) ((version >> 8) & 0xff) 108 | #define PCORE_VERSION_LETTER(version) (version & 0xff) 109 | 110 | #define ADI_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 111 | #define ADI_ADC_PN_SEL(x) (((x) & 0xF) << 16) 112 | #define ADI_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 113 | #define ADI_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 114 | #define ADI_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 115 | 116 | /* PCORE Version > 8.00 */ 117 | #define ADI_REG_DELAY(l) (0x0800 + (l) * 0x4) 118 | 119 | enum adc_pn_sel { 120 | ADC_PN9 = 0, 121 | ADC_PN23A = 1, 122 | ADC_PN7 = 4, 123 | ADC_PN15 = 5, 124 | ADC_PN23 = 6, 125 | ADC_PN31 = 7, 126 | ADC_PN_CUSTOM = 9, 127 | ADC_PN_END = 10, 128 | }; 129 | 130 | enum adc_data_sel { 131 | ADC_DATA_SEL_NORM, 132 | ADC_DATA_SEL_LB, /* DAC loopback */ 133 | ADC_DATA_SEL_RAMP, /* TBD */ 134 | }; 135 | 136 | /******************************************************************************/ 137 | /************************ Functions Declarations ******************************/ 138 | /******************************************************************************/ 139 | int32_t spi_init(uint32_t device_id, 140 | uint8_t clk_pha, 141 | uint8_t clk_pol); 142 | int32_t spi_read(uint8_t *data, 143 | uint8_t bytes_number); 144 | int spi_write_then_read(struct spi_device *spi, 145 | const unsigned char *txbuf, unsigned n_tx, 146 | unsigned char *rxbuf, unsigned n_rx); 147 | void gpio_init(uint32_t device_id); 148 | void gpio_direction(uint8_t pin, uint8_t direction); 149 | bool gpio_is_valid(int number); 150 | void gpio_set_value(unsigned gpio, int value); 151 | void udelay(unsigned long usecs); 152 | void mdelay(unsigned long msecs); 153 | unsigned long msleep_interruptible(unsigned int msecs); 154 | void axiadc_init(struct ad9361_rf_phy *phy); 155 | int axiadc_post_setup(struct ad9361_rf_phy *phy); 156 | unsigned int axiadc_read(struct axiadc_state *st, unsigned long reg); 157 | void axiadc_write(struct axiadc_state *st, unsigned reg, unsigned val); 158 | int axiadc_set_pnsel(struct axiadc_state *st, int channel, enum adc_pn_sel sel); 159 | void axiadc_idelay_set(struct axiadc_state *st, unsigned lane, unsigned val); 160 | #endif 161 | -------------------------------------------------------------------------------- /sw/platform_xilinx/platform.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file platform.h 3 | * @brief Header file of Platform driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2014(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef PLATFORM_H_ 40 | #define PLATFORM_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include 46 | #include "util.h" 47 | 48 | /******************************************************************************/ 49 | /********************** Macros and Constants Definitions **********************/ 50 | /******************************************************************************/ 51 | #define ADI_REG_VERSION 0x0000 52 | 53 | #define ADI_REG_ID 0x0004 54 | 55 | #define ADI_REG_RSTN 0x0040 56 | #define ADI_RSTN (1 << 0) 57 | #define ADI_MMCM_RSTN (1 << 1) 58 | 59 | #define ADI_REG_CNTRL 0x0044 60 | #define ADI_R1_MODE (1 << 2) 61 | #define ADI_DDR_EDGESEL (1 << 1) 62 | #define ADI_PIN_MODE (1 << 0) 63 | 64 | #define ADI_REG_STATUS 0x005C 65 | #define ADI_MUX_PN_ERR (1 << 3) 66 | #define ADI_MUX_PN_OOS (1 << 2) 67 | #define ADI_MUX_OVER_RANGE (1 << 1) 68 | #define ADI_STATUS (1 << 0) 69 | 70 | #define ADI_REG_DELAY_CNTRL 0x0060 /* <= v8.0 */ 71 | #define ADI_DELAY_SEL (1 << 17) 72 | #define ADI_DELAY_RWN (1 << 16) 73 | #define ADI_DELAY_ADDRESS(x) (((x) & 0xFF) << 8) 74 | #define ADI_TO_DELAY_ADDRESS(x) (((x) >> 8) & 0xFF) 75 | #define ADI_DELAY_WDATA(x) (((x) & 0x1F) << 0) 76 | #define ADI_TO_DELAY_WDATA(x) (((x) >> 0) & 0x1F) 77 | 78 | #define ADI_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 79 | #define ADI_PN_SEL (1 << 10) /* !v8.0 */ 80 | #define ADI_IQCOR_ENB (1 << 9) 81 | #define ADI_DCFILT_ENB (1 << 8) 82 | #define ADI_FORMAT_SIGNEXT (1 << 6) 83 | #define ADI_FORMAT_TYPE (1 << 5) 84 | #define ADI_FORMAT_ENABLE (1 << 4) 85 | #define ADI_PN23_TYPE (1 << 1) /* !v8.0 */ 86 | #define ADI_ENABLE (1 << 0) 87 | 88 | #define ADI_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 89 | #define ADI_PN_ERR (1 << 2) 90 | #define ADI_PN_OOS (1 << 1) 91 | #define ADI_OVER_RANGE (1 << 0) 92 | 93 | #define ADI_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 94 | #define ADI_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 95 | #define ADI_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 96 | #define ADI_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 97 | #define ADI_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 98 | 99 | #define ADI_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 100 | #define ADI_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 101 | #define ADI_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 102 | #define ADI_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 103 | #define ADI_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define PCORE_VERSION(major, minor, letter) ((major << 16) | (minor << 8) | letter) 106 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 107 | #define PCORE_VERSION_MINOR(version) ((version >> 8) & 0xff) 108 | #define PCORE_VERSION_LETTER(version) (version & 0xff) 109 | 110 | #define ADI_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 111 | #define ADI_ADC_PN_SEL(x) (((x) & 0xF) << 16) 112 | #define ADI_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 113 | #define ADI_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 114 | #define ADI_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 115 | 116 | /* PCORE Version > 8.00 */ 117 | #define ADI_REG_DELAY(l) (0x0800 + (l) * 0x4) 118 | 119 | enum adc_pn_sel { 120 | ADC_PN9 = 0, 121 | ADC_PN23A = 1, 122 | ADC_PN7 = 4, 123 | ADC_PN15 = 5, 124 | ADC_PN23 = 6, 125 | ADC_PN31 = 7, 126 | ADC_PN_CUSTOM = 9, 127 | ADC_PN_END = 10, 128 | }; 129 | 130 | enum adc_data_sel { 131 | ADC_DATA_SEL_NORM, 132 | ADC_DATA_SEL_LB, /* DAC loopback */ 133 | ADC_DATA_SEL_RAMP, /* TBD */ 134 | }; 135 | 136 | /******************************************************************************/ 137 | /************************ Functions Declarations ******************************/ 138 | /******************************************************************************/ 139 | int32_t spi_init(uint32_t device_id, 140 | uint8_t clk_pha, 141 | uint8_t clk_pol); 142 | int32_t spi_read(struct spi_device *spi, 143 | uint8_t *data, 144 | uint8_t bytes_number); 145 | int spi_write_then_read(struct spi_device *spi, 146 | const unsigned char *txbuf, unsigned n_tx, 147 | unsigned char *rxbuf, unsigned n_rx); 148 | void gpio_init(uint32_t device_id); 149 | void gpio_direction(uint8_t pin, uint8_t direction); 150 | bool gpio_is_valid(int number); 151 | void gpio_set_value(unsigned gpio, int value); 152 | void udelay(unsigned long usecs); 153 | void mdelay(unsigned long msecs); 154 | unsigned long msleep_interruptible(unsigned int msecs); 155 | void axiadc_init(struct ad9361_rf_phy *phy); 156 | int axiadc_post_setup(struct ad9361_rf_phy *phy); 157 | unsigned int axiadc_read(struct axiadc_state *st, unsigned long reg); 158 | void axiadc_write(struct axiadc_state *st, unsigned reg, unsigned val); 159 | int axiadc_set_pnsel(struct axiadc_state *st, int channel, enum adc_pn_sel sel); 160 | void axiadc_idelay_set(struct axiadc_state *st, unsigned lane, unsigned val); 161 | #endif 162 | -------------------------------------------------------------------------------- /sw/platform_altera/platform.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file platform.h 3 | * @brief Header file of Platform driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2014(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef PLATFORM_H_ 40 | #define PLATFORM_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include 46 | #include "util.h" 47 | 48 | /******************************************************************************/ 49 | /********************** Macros and Constants Definitions **********************/ 50 | /******************************************************************************/ 51 | #define ADI_REG_VERSION 0x0000 52 | 53 | #define ADI_REG_ID 0x0004 54 | 55 | #define ADI_REG_RSTN 0x0040 56 | #define ADI_RSTN (1 << 0) 57 | #define ADI_MMCM_RSTN (1 << 1) 58 | 59 | #define ADI_REG_CNTRL 0x0044 60 | #define ADI_R1_MODE (1 << 2) 61 | #define ADI_DDR_EDGESEL (1 << 1) 62 | #define ADI_PIN_MODE (1 << 0) 63 | 64 | #define ADI_REG_STATUS 0x005C 65 | #define ADI_MUX_PN_ERR (1 << 3) 66 | #define ADI_MUX_PN_OOS (1 << 2) 67 | #define ADI_MUX_OVER_RANGE (1 << 1) 68 | #define ADI_STATUS (1 << 0) 69 | 70 | #define ADI_REG_DELAY_CNTRL 0x0060 /* <= v8.0 */ 71 | #define ADI_DELAY_SEL (1 << 17) 72 | #define ADI_DELAY_RWN (1 << 16) 73 | #define ADI_DELAY_ADDRESS(x) (((x) & 0xFF) << 8) 74 | #define ADI_TO_DELAY_ADDRESS(x) (((x) >> 8) & 0xFF) 75 | #define ADI_DELAY_WDATA(x) (((x) & 0x1F) << 0) 76 | #define ADI_TO_DELAY_WDATA(x) (((x) >> 0) & 0x1F) 77 | 78 | #define ADI_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 79 | #define ADI_PN_SEL (1 << 10) /* !v8.0 */ 80 | #define ADI_IQCOR_ENB (1 << 9) 81 | #define ADI_DCFILT_ENB (1 << 8) 82 | #define ADI_FORMAT_SIGNEXT (1 << 6) 83 | #define ADI_FORMAT_TYPE (1 << 5) 84 | #define ADI_FORMAT_ENABLE (1 << 4) 85 | #define ADI_PN23_TYPE (1 << 1) /* !v8.0 */ 86 | #define ADI_ENABLE (1 << 0) 87 | 88 | #define ADI_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 89 | #define ADI_PN_ERR (1 << 2) 90 | #define ADI_PN_OOS (1 << 1) 91 | #define ADI_OVER_RANGE (1 << 0) 92 | 93 | #define ADI_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 94 | #define ADI_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 95 | #define ADI_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 96 | #define ADI_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 97 | #define ADI_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 98 | 99 | #define ADI_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 100 | #define ADI_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 101 | #define ADI_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 102 | #define ADI_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 103 | #define ADI_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define PCORE_VERSION(major, minor, letter) ((major << 16) | (minor << 8) | letter) 106 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 107 | #define PCORE_VERSION_MINOR(version) ((version >> 8) & 0xff) 108 | #define PCORE_VERSION_LETTER(version) (version & 0xff) 109 | 110 | #define ADI_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 111 | #define ADI_ADC_PN_SEL(x) (((x) & 0xF) << 16) 112 | #define ADI_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 113 | #define ADI_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 114 | #define ADI_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 115 | 116 | /* PCORE Version > 8.00 */ 117 | #define ADI_REG_DELAY(l) (0x0800 + (l) * 0x4) 118 | 119 | enum adc_pn_sel { 120 | ADC_PN9 = 0, 121 | ADC_PN23A = 1, 122 | ADC_PN7 = 4, 123 | ADC_PN15 = 5, 124 | ADC_PN23 = 6, 125 | ADC_PN31 = 7, 126 | ADC_PN_CUSTOM = 9, 127 | ADC_PN_END = 10, 128 | }; 129 | 130 | enum adc_data_sel { 131 | ADC_DATA_SEL_NORM, 132 | ADC_DATA_SEL_LB, /* DAC loopback */ 133 | ADC_DATA_SEL_RAMP, /* TBD */ 134 | }; 135 | 136 | /******************************************************************************/ 137 | /************************ Functions Declarations ******************************/ 138 | /******************************************************************************/ 139 | int32_t spi_init(uint32_t device_id, 140 | uint8_t clk_pha, 141 | uint8_t clk_pol); 142 | int32_t spi_read(uint8_t *data, 143 | uint8_t bytes_number); 144 | int spi_write_then_read(struct spi_device *spi, 145 | const unsigned char *txbuf, unsigned n_tx, 146 | unsigned char *rxbuf, unsigned n_rx); 147 | void gpio_init(uint32_t device_id); 148 | void gpio_direction(uint8_t pin, uint8_t direction); 149 | bool gpio_is_valid(int number); 150 | void gpio_set_value(unsigned gpio, int value); 151 | void udelay(unsigned long usecs); 152 | void mdelay(unsigned long msecs); 153 | unsigned long msleep_interruptible(unsigned int msecs); 154 | void axiadc_init(struct ad9361_rf_phy *phy); 155 | int axiadc_post_setup(struct ad9361_rf_phy *phy); 156 | unsigned int axiadc_read(struct axiadc_state *st, unsigned long reg); 157 | void axiadc_write(struct axiadc_state *st, unsigned reg, unsigned val); 158 | int axiadc_set_pnsel(struct axiadc_state *st, int channel, enum adc_pn_sel sel); 159 | void axiadc_idelay_set(struct axiadc_state *st, unsigned lane, unsigned val); 160 | int32_t altera_bridge_init(void); 161 | int32_t altera_bridge_uninit(void); 162 | #endif 163 | -------------------------------------------------------------------------------- /sw/platform_altera/adc_core.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file adc_core.h 3 | * @brief Header file of ADC Core Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2014(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef ADC_CORE_API_H_ 40 | #define ADC_CORE_API_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | /* ADC COMMON */ 51 | #define ADC_REG_RSTN 0x0040 52 | #define ADC_RSTN (1 << 0) 53 | #define ADC_MMCM_RSTN (1 << 1) 54 | 55 | #define ADC_REG_CNTRL 0x0044 56 | #define ADC_R1_MODE (1 << 2) 57 | #define ADC_DDR_EDGESEL (1 << 1) 58 | #define ADC_PIN_MODE (1 << 0) 59 | 60 | #define ADC_REG_STATUS 0x005C 61 | #define ADC_MUX_PN_ERR (1 << 3) 62 | #define ADC_MUX_PN_OOS (1 << 2) 63 | #define ADC_MUX_OVER_RANGE (1 << 1) 64 | #define ADC_STATUS (1 << 0) 65 | 66 | #define ADC_REG_DMA_CNTRL 0x0080 67 | #define ADC_DMA_STREAM (1 << 1) 68 | #define ADC_DMA_START (1 << 0) 69 | 70 | #define ADC_REG_DMA_COUNT 0x0084 71 | #define ADC_DMA_COUNT(x) (((x) & 0xFFFFFFFF) << 0) 72 | #define ADC_TO_DMA_COUNT(x) (((x) >> 0) & 0xFFFFFFFF) 73 | 74 | #define ADC_REG_DMA_STATUS 0x0088 75 | #define ADC_DMA_OVF (1 << 2) 76 | #define ADC_DMA_UNF (1 << 1) 77 | #define ADC_DMA_STATUS (1 << 0) 78 | 79 | #define ADC_REG_DMA_BUSWIDTH 0x008C 80 | #define ADC_DMA_BUSWIDTH(x) (((x) & 0xFFFFFFFF) << 0) 81 | #define ADC_TO_DMA_BUSWIDTH(x) (((x) >> 0) & 0xFFFFFFFF) 82 | 83 | /* ADC CHANNEL */ 84 | #define ADC_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 85 | #define ADC_LB_EN (1 << 11) 86 | #define ADC_PN_SEL (1 << 10) 87 | #define ADC_IQCOR_ENB (1 << 9) 88 | #define ADC_DCFILT_ENB (1 << 8) 89 | #define ADC_FORMAT_SIGNEXT (1 << 6) 90 | #define ADC_FORMAT_TYPE (1 << 5) 91 | #define ADC_FORMAT_ENABLE (1 << 4) 92 | #define ADC_PN23_TYPE (1 << 1) 93 | #define ADC_ENABLE (1 << 0) 94 | 95 | #define ADC_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 96 | #define ADC_PN_ERR (1 << 2) 97 | #define ADC_PN_OOS (1 << 1) 98 | #define ADC_OVER_RANGE (1 << 0) 99 | 100 | #define ADC_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 101 | #define ADC_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 102 | #define ADC_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 103 | #define ADC_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 104 | #define ADC_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 105 | 106 | #define ADC_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 107 | #define ADC_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 108 | #define ADC_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 109 | #define ADC_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 110 | #define ADC_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 111 | 112 | #define ADC_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 113 | #define ADC_ADC_PN_SEL(x) (((x) & 0xF) << 16) 114 | #define ADC_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 115 | #define ADC_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 116 | #define ADC_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 117 | 118 | #define AXI_DMAC_REG_IRQ_MASK 0x80 119 | #define AXI_DMAC_REG_IRQ_PENDING 0x84 120 | #define AXI_DMAC_REG_IRQ_SOURCE 0x88 121 | 122 | #define AXI_DMAC_REG_CTRL 0x400 123 | #define AXI_DMAC_REG_TRANSFER_ID 0x404 124 | #define AXI_DMAC_REG_START_TRANSFER 0x408 125 | #define AXI_DMAC_REG_FLAGS 0x40c 126 | #define AXI_DMAC_REG_DEST_ADDRESS 0x410 127 | #define AXI_DMAC_REG_SRC_ADDRESS 0x414 128 | #define AXI_DMAC_REG_X_LENGTH 0x418 129 | #define AXI_DMAC_REG_Y_LENGTH 0x41c 130 | #define AXI_DMAC_REG_DEST_STRIDE 0x420 131 | #define AXI_DMAC_REG_SRC_STRIDE 0x424 132 | #define AXI_DMAC_REG_TRANSFER_DONE 0x428 133 | #define AXI_DMAC_REG_ACTIVE_TRANSFER_ID 0x42c 134 | #define AXI_DMAC_REG_STATUS 0x430 135 | #define AXI_DMAC_REG_CURRENT_DEST_ADDR 0x434 136 | #define AXI_DMAC_REG_CURRENT_SRC_ADDR 0x438 137 | #define AXI_DMAC_REG_DBG0 0x43c 138 | #define AXI_DMAC_REG_DBG1 0x440 139 | 140 | #define AXI_DMAC_CTRL_ENABLE (1 << 0) 141 | #define AXI_DMAC_CTRL_PAUSE (1 << 1) 142 | 143 | #define AXI_DMAC_IRQ_SOT (1 << 0) 144 | #define AXI_DMAC_IRQ_EOT (1 << 1) 145 | 146 | struct adc_state 147 | { 148 | bool rx2tx2; 149 | }; 150 | 151 | /******************************************************************************/ 152 | /************************ Functions Declarations ******************************/ 153 | /******************************************************************************/ 154 | void adc_init(struct ad9361_rf_phy *phy); 155 | int32_t adc_capture(uint32_t size, uint32_t start_address); 156 | void adc_read(struct ad9361_rf_phy *phy, uint32_t regAddr, uint32_t *data); 157 | void adc_write(struct ad9361_rf_phy *phy, uint32_t regAddr, uint32_t data); 158 | int32_t adc_set_calib_scale(struct ad9361_rf_phy *phy, 159 | uint32_t chan, 160 | int32_t val, 161 | int32_t val2); 162 | int32_t adc_get_calib_scale(struct ad9361_rf_phy *phy, 163 | uint32_t chan, 164 | int32_t *val, 165 | int32_t *val2); 166 | int32_t adc_set_calib_phase(struct ad9361_rf_phy *phy, 167 | uint32_t chan, 168 | int32_t val, 169 | int32_t val2); 170 | int32_t adc_get_calib_phase(struct ad9361_rf_phy *phy, 171 | uint32_t chan, 172 | int32_t *val, 173 | int32_t *val2); 174 | #endif 175 | -------------------------------------------------------------------------------- /sw/platform_xilinx/adc_core.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file adc_core.h 3 | * @brief Header file of ADC Core Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef ADC_CORE_API_H_ 40 | #define ADC_CORE_API_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | /* ADC COMMON */ 51 | #define ADC_REG_RSTN 0x0040 52 | #define ADC_RSTN (1 << 0) 53 | #define ADC_MMCM_RSTN (1 << 1) 54 | 55 | #define ADC_REG_CNTRL 0x0044 56 | #define ADC_R1_MODE (1 << 2) 57 | #define ADC_DDR_EDGESEL (1 << 1) 58 | #define ADC_PIN_MODE (1 << 0) 59 | 60 | #define ADC_REG_STATUS 0x005C 61 | #define ADC_MUX_PN_ERR (1 << 3) 62 | #define ADC_MUX_PN_OOS (1 << 2) 63 | #define ADC_MUX_OVER_RANGE (1 << 1) 64 | #define ADC_STATUS (1 << 0) 65 | 66 | #define ADC_REG_DMA_CNTRL 0x0080 67 | #define ADC_DMA_STREAM (1 << 1) 68 | #define ADC_DMA_START (1 << 0) 69 | 70 | #define ADC_REG_DMA_COUNT 0x0084 71 | #define ADC_DMA_COUNT(x) (((x) & 0xFFFFFFFF) << 0) 72 | #define ADC_TO_DMA_COUNT(x) (((x) >> 0) & 0xFFFFFFFF) 73 | 74 | #define ADC_REG_DMA_STATUS 0x0088 75 | #define ADC_DMA_OVF (1 << 2) 76 | #define ADC_DMA_UNF (1 << 1) 77 | #define ADC_DMA_STATUS (1 << 0) 78 | 79 | #define ADC_REG_DMA_BUSWIDTH 0x008C 80 | #define ADC_DMA_BUSWIDTH(x) (((x) & 0xFFFFFFFF) << 0) 81 | #define ADC_TO_DMA_BUSWIDTH(x) (((x) >> 0) & 0xFFFFFFFF) 82 | 83 | /* ADC CHANNEL */ 84 | #define ADC_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 85 | #define ADC_LB_EN (1 << 11) 86 | #define ADC_PN_SEL (1 << 10) 87 | #define ADC_IQCOR_ENB (1 << 9) 88 | #define ADC_DCFILT_ENB (1 << 8) 89 | #define ADC_FORMAT_SIGNEXT (1 << 6) 90 | #define ADC_FORMAT_TYPE (1 << 5) 91 | #define ADC_FORMAT_ENABLE (1 << 4) 92 | #define ADC_PN23_TYPE (1 << 1) 93 | #define ADC_ENABLE (1 << 0) 94 | 95 | #define ADC_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 96 | #define ADC_PN_ERR (1 << 2) 97 | #define ADC_PN_OOS (1 << 1) 98 | #define ADC_OVER_RANGE (1 << 0) 99 | 100 | #define ADC_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 101 | #define ADC_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 102 | #define ADC_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 103 | #define ADC_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 104 | #define ADC_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 105 | 106 | #define ADC_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 107 | #define ADC_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 108 | #define ADC_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 109 | #define ADC_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 110 | #define ADC_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 111 | 112 | #define ADC_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 113 | #define ADC_ADC_PN_SEL(x) (((x) & 0xF) << 16) 114 | #define ADC_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 115 | #define ADC_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 116 | #define ADC_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 117 | 118 | #define AXI_DMAC_REG_IRQ_MASK 0x80 119 | #define AXI_DMAC_REG_IRQ_PENDING 0x84 120 | #define AXI_DMAC_REG_IRQ_SOURCE 0x88 121 | 122 | #define AXI_DMAC_REG_CTRL 0x400 123 | #define AXI_DMAC_REG_TRANSFER_ID 0x404 124 | #define AXI_DMAC_REG_START_TRANSFER 0x408 125 | #define AXI_DMAC_REG_FLAGS 0x40c 126 | #define AXI_DMAC_REG_DEST_ADDRESS 0x410 127 | #define AXI_DMAC_REG_SRC_ADDRESS 0x414 128 | #define AXI_DMAC_REG_X_LENGTH 0x418 129 | #define AXI_DMAC_REG_Y_LENGTH 0x41c 130 | #define AXI_DMAC_REG_DEST_STRIDE 0x420 131 | #define AXI_DMAC_REG_SRC_STRIDE 0x424 132 | #define AXI_DMAC_REG_TRANSFER_DONE 0x428 133 | #define AXI_DMAC_REG_ACTIVE_TRANSFER_ID 0x42c 134 | #define AXI_DMAC_REG_STATUS 0x430 135 | #define AXI_DMAC_REG_CURRENT_DEST_ADDR 0x434 136 | #define AXI_DMAC_REG_CURRENT_SRC_ADDR 0x438 137 | #define AXI_DMAC_REG_DBG0 0x43c 138 | #define AXI_DMAC_REG_DBG1 0x440 139 | 140 | #define AXI_DMAC_CTRL_ENABLE (1 << 0) 141 | #define AXI_DMAC_CTRL_PAUSE (1 << 1) 142 | 143 | #define IRQ_TRANSFER_QUEUED (1 << 0) 144 | #define IRQ_TRANSFER_COMPLETED (1 << 1) 145 | 146 | struct adc_state 147 | { 148 | bool rx2tx2; 149 | }; 150 | 151 | /******************************************************************************/ 152 | /************************ Functions Declarations ******************************/ 153 | /******************************************************************************/ 154 | void adc_init(struct ad9361_rf_phy *phy); 155 | int32_t adc_capture(uint32_t size, uint32_t start_address); 156 | void adc_read(struct ad9361_rf_phy *phy, uint32_t regAddr, uint32_t *data); 157 | void adc_write(struct ad9361_rf_phy *phy, uint32_t regAddr, uint32_t data); 158 | int32_t adc_set_calib_scale(struct ad9361_rf_phy *phy, 159 | uint32_t chan, 160 | int32_t val, 161 | int32_t val2); 162 | int32_t adc_get_calib_scale(struct ad9361_rf_phy *phy, 163 | uint32_t chan, 164 | int32_t *val, 165 | int32_t *val2); 166 | int32_t adc_set_calib_phase(struct ad9361_rf_phy *phy, 167 | uint32_t chan, 168 | int32_t val, 169 | int32_t val2); 170 | int32_t adc_get_calib_phase(struct ad9361_rf_phy *phy, 171 | uint32_t chan, 172 | int32_t *val, 173 | int32_t *val2); 174 | #endif 175 | -------------------------------------------------------------------------------- /zynq_som_2.bom.csv: -------------------------------------------------------------------------------- 1 | refdes dni device footprint value 2 | R30 unknown RESISTOR 0402 120 3 | C78 unknown CAPACITOR 0402 470n 4 | R29 unknown RESISTOR 0402 4.7k 5 | LED2 unknown LED 0603 blue 6 | R28 unknown RESISTOR 0402 4.7k 7 | LED1 unknown LED 0603 red 8 | R22 unknown RESISTOR 0402 1k 9 | R21 unknown RESISTOR 0402 220 10 | C37 unknown CAPACITOR 0603 22u 11 | R20 unknown RESISTOR 0402 47 12 | U7 unknown 3225 oscillator 3.3V 33MHz tcxo3225 unknown 13 | C25 unknown CAPACITOR 0402 470n 14 | U6 unknown edgepads edgepads45 unknown 15 | G4 unknown terminal adhoc unknown 16 | G3 unknown terminal adhoc unknown 17 | G1 unknown terminal adhoc unknown 18 | G2 unknown terminal adhoc unknown 19 | B2 unknown SPDT custom_bead unknown 20 | C91 unknown CAPACITOR 0402 470n 21 | R32 unknown RESISTOR 0402 22k 22 | R31 unknown RESISTOR 0402 22k 23 | U9 unknown sgm2028 SOT25 unknown 24 | CONN5 unknown CONNECTOR 1 2 CONNECTOR 1 2 unknown 25 | C45 unknown CAPACITOR 0603 22u 26 | C43 unknown CAPACITOR 0603 22u 27 | C86 unknown CAPACITOR 0402_s 470n 28 | C85 unknown CAPACITOR 0402 1u 29 | R27 unknown RESISTOR 0402 8.06k 30 | R26 unknown RESISTOR 0402 22k 31 | C82 unknown CAPACITOR 0402 1u 32 | R25 unknown RESISTOR 0402 22 33 | C81 unknown CAPACITOR 0603 10u 34 | U8 unknown 3225 oscillator 3.3V 26MHz tcxo3225 unknown 35 | R24 unknown RESISTOR 0603 240 36 | R23 unknown RESISTOR 0603 240 37 | C84 unknown CAPACITOR 0402_m 470n 38 | C83 unknown CAPACITOR 0402_s 470n 39 | C77 unknown CAPACITOR 0603 22u 40 | R19 unknown RESISTOR 0402 47 41 | R183 unknown RESISTOR 0402 10 42 | R182 unknown RESISTOR 0402 22 43 | C183 unknown CAPACITOR 0603 10u 44 | C182 unknown CAPACITOR 0402 470n 45 | R181 unknown RESISTOR 0402 2.2k 46 | R180 unknown RESISTOR 0402 2.2k 47 | C181 unknown CAPACITOR 0402 100n 48 | C180 unknown CAPACITOR 0402 100n 49 | U180 unknown lmv321 SOT26 unknown 50 | C131 unknown CAPACITOR 0805 22u 51 | C133 unknown CAPACITOR 0402 1n 52 | R131 unknown RESISTOR 0402 22k 53 | R132 unknown RESISTOR 0402 33k 54 | C132 unknown CAPACITOR 0805 22u 55 | L131 unknown INDUCTOR 1008 4.7uh 56 | U131 unknown ap3419 SOT26 unknown 57 | B7 unknown SPDT custom_bead unknown 58 | B8 unknown SPDT custom_bead unknown 59 | B9 unknown SPDT custom_bead unknown 60 | B10 unknown SPDT custom_bead unknown 61 | B11 unknown SPDT custom_bead unknown 62 | R9 unknown RESISTOR 0402_m 22k 63 | R8 unknown RESISTOR 0402_m 22k 64 | R7 unknown RESISTOR 0402_m 22k 65 | R6 unknown RESISTOR 0402_m 22k 66 | R5 unknown RESISTOR 0402_m 22k 67 | CONN3 unknown CONNECTOR_5 connector5 unknown 68 | B14 unknown SPDT custom_bead unknown 69 | U5 unknown 3225 oscillator 3.3V 33MHz tcxo3225 unknown 70 | C170 unknown CAPACITOR 0402 470n 71 | C171 unknown CAPACITOR 0603 4.7u 72 | C172 unknown CAPACITOR 0402 470n 73 | CONN170 unknown CONNECTOR_5 custom_microusb1 unknown 74 | U170 unknown cp2102 QFN28_5_EP_CP2102 unknown 75 | R150 unknown RESISTOR 0603 10 76 | D150 unknown B5819W SOD123 unknown 77 | C150 unknown CAPACITOR 0805 22u 78 | R155 unknown RESISTOR 0402 22k 79 | C151 unknown CAPACITOR 0402 470n 80 | R152 unknown RESISTOR 0402 100k 81 | R157 unknown RESISTOR 0402 33k 82 | R156 unknown RESISTOR 0402 47k 83 | R151 unknown RESISTOR 0402 22k 84 | R154 unknown RESISTOR 0402 22k 85 | R153 unknown RESISTOR 0402 8.2k 86 | U150 unknown ref3012 SOT23 unknown 87 | U151 unknown lm239 SO14 unknown 88 | C75 unknown CAPACITOR 0402 470n 89 | C76 unknown CAPACITOR 0402 470n 90 | C73 unknown CAPACITOR 0402 470n 91 | C74 unknown CAPACITOR 0402 470n 92 | C66 unknown CAPACITOR 0402 470n 93 | C67 unknown CAPACITOR 0402 470n 94 | C68 unknown CAPACITOR 0402 470n 95 | C69 unknown CAPACITOR 0402 470n 96 | C51 unknown CAPACITOR 0402 470n 97 | C52 unknown CAPACITOR 0402 470n 98 | R18 unknown RESISTOR 0402 4.7k 99 | R17 unknown RESISTOR 0402_s 82 100 | R16 unknown RESISTOR 0402_s 82 101 | C121 unknown CAPACITOR 0805 22u 102 | C123 unknown CAPACITOR 0402 1n 103 | R121 unknown RESISTOR 0402 10k 104 | R122 unknown RESISTOR 0402 20k 105 | C122 unknown CAPACITOR 0805 22u 106 | L121 unknown INDUCTOR 1008 4.7uh 107 | U121 unknown ap3419 SOT26 unknown 108 | C111 unknown CAPACITOR 0805 22u 109 | C113 unknown CAPACITOR 0402 1n 110 | R111 unknown RESISTOR 0402 2.2k 111 | R112 unknown RESISTOR 0402 10k 112 | C112 unknown CAPACITOR 0805 22u 113 | L111 unknown INDUCTOR 1008 4.7uh 114 | U111 unknown ap3419 SOT26 unknown 115 | R15 unknown RESISTOR 0402_m 22k 116 | B13 unknown SPDT custom_bead unknown 117 | B12 unknown SPDT custom_bead unknown 118 | CONN2 unknown CONNECTOR_5 custom_microusb1 unknown 119 | C42 unknown CAPACITOR 0402_m 470n 120 | U4 unknown USB3343 QFN24_4_EP unknown 121 | R14 unknown RESISTOR 0402 470 122 | C71 unknown CAPACITOR 0603 10u 123 | CONN1 unknown sd_breakout sd_breakout unknown 124 | C70 unknown CAPACITOR 0402_m 4.7u 125 | C72 unknown CAPACITOR 0402_m 4.7u 126 | L1 unknown INDUCTOR 0805_s fb 127 | C64 unknown CAPACITOR 0402_m 470n 128 | C63 unknown CAPACITOR 0402_m 470n 129 | C65 unknown CAPACITOR 0402_m 4.7u 130 | C62 unknown CAPACITOR 0402_m 470n 131 | C61 unknown CAPACITOR 0402_m 470n 132 | C58 unknown CAPACITOR 0402_m 470n 133 | C59 unknown CAPACITOR 0603 4.7u 134 | C57 unknown CAPACITOR 0402_m 470n 135 | C56 unknown CAPACITOR 0402_s 470n 136 | C55 unknown CAPACITOR 0402_m 470n 137 | C54 unknown CAPACITOR 0402_m 470n 138 | C53 unknown CAPACITOR 0402_m 470n 139 | C60 unknown CAPACITOR 0603 4.7u 140 | C50 unknown CAPACITOR 0402_m 470n 141 | C49 unknown CAPACITOR 0402_m 4.7u 142 | C48 unknown CAPACITOR 0402_m 470n 143 | C47 unknown CAPACITOR 0402_m 4.7u 144 | C46 unknown CAPACITOR 0603 22u 145 | C44 unknown CAPACITOR 0603 22u 146 | C41 unknown CAPACITOR 0402_m 470n 147 | C40 unknown CAPACITOR 0402_s 470n 148 | C39 unknown CAPACITOR 0402_m 470n 149 | C38 unknown CAPACITOR 0402_m 470n 150 | C33 unknown CAPACITOR 0603 22u 151 | C34 unknown CAPACITOR 0603 22u 152 | C35 unknown CAPACITOR 0603 22u 153 | C36 unknown CAPACITOR 0603 22u 154 | C29 unknown CAPACITOR 0402_m 470n 155 | C30 unknown CAPACITOR 0402_s 470n 156 | C31 unknown CAPACITOR 0402_m 470n 157 | C32 unknown CAPACITOR 0402_s 470n 158 | C101 unknown CAPACITOR 0805 22u 159 | C103 unknown CAPACITOR 0402 1n 160 | R101 unknown RESISTOR 0402 47k 161 | R102 unknown RESISTOR 0402 33k 162 | C102 unknown CAPACITOR 0603 22u 163 | L101 unknown INDUCTOR 1008 4.7uh 164 | U101 unknown ap3419 SOT26 unknown 165 | S2 unknown SPST custom_button3 unknown 166 | R13 unknown RESISTOR 0402 22k 167 | R11 unknown RESISTOR 0402 22k 168 | R10 unknown RESISTOR 0402 22k 169 | R12 unknown RESISTOR 0402 50 170 | B1 unknown SPDT custom_bead unknown 171 | R4 unknown RESISTOR 0402 1k 172 | LED99 unknown LED 0603 green 173 | R1 unknown RESISTOR 0402 4.7k 174 | R3 unknown RESISTOR 0402 4.7k 175 | R2 unknown RESISTOR 0402 4.7k 176 | C28 unknown CAPACITOR 0402 470n 177 | C27 unknown CAPACITOR 0402 470n 178 | C26 unknown CAPACITOR 0402 470n 179 | C24 unknown CAPACITOR 0402 470n 180 | C23 unknown CAPACITOR 0402 470n 181 | C22 unknown CAPACITOR 0402 470n 182 | C21 unknown CAPACITOR 0402 470n 183 | C20 unknown CAPACITOR 0402 470n 184 | C19 unknown CAPACITOR 0402 470n 185 | C18 unknown CAPACITOR 0402 470n 186 | C17 unknown CAPACITOR 0402 470n 187 | C16 unknown CAPACITOR 0402 470n 188 | C15 unknown CAPACITOR 0402 470n 189 | C14 unknown CAPACITOR 0402 470n 190 | C13 unknown CAPACITOR 0402 470n 191 | C12 unknown CAPACITOR 0402 470n 192 | C11 unknown CAPACITOR 0402 470n 193 | C10 unknown CAPACITOR 0402 470n 194 | C9 unknown CAPACITOR 0402 470n 195 | C8 unknown CAPACITOR 0402 470n 196 | C7 unknown CAPACITOR 0402 470n 197 | C6 unknown CAPACITOR 0402 470n 198 | C5 unknown CAPACITOR 0402 470n 199 | C4 unknown CAPACITOR 0402 470n 200 | C3 unknown CAPACITOR 0402 470n 201 | C2 unknown CAPACITOR 0402 470n 202 | C1 unknown CAPACITOR 0402 470n 203 | U3 unknown ddr3 96pin ddr3_96 unknown 204 | U2 unknown ddr3 96pin ddr3_96 unknown 205 | U1 unknown xc7z010 bga_0.8_400 unknown 206 | -------------------------------------------------------------------------------- /sw/platform_linux/adc_core.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file adc_core.h 3 | * @brief Header file of ADC Core Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef ADC_CORE_API_H_ 40 | #define ADC_CORE_API_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "../ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | /* ADC COMMON */ 51 | #define ADC_REG_RSTN 0x0040 52 | #define ADC_RSTN (1 << 0) 53 | #define ADC_MMCM_RSTN (1 << 1) 54 | 55 | #define ADC_REG_CNTRL 0x0044 56 | #define ADC_R1_MODE (1 << 2) 57 | #define ADC_DDR_EDGESEL (1 << 1) 58 | #define ADC_PIN_MODE (1 << 0) 59 | 60 | #define ADC_REG_STATUS 0x005C 61 | #define ADC_MUX_PN_ERR (1 << 3) 62 | #define ADC_MUX_PN_OOS (1 << 2) 63 | #define ADC_MUX_OVER_RANGE (1 << 1) 64 | #define ADC_STATUS (1 << 0) 65 | 66 | #define ADC_REG_DMA_CNTRL 0x0080 67 | #define ADC_DMA_STREAM (1 << 1) 68 | #define ADC_DMA_START (1 << 0) 69 | 70 | #define ADC_REG_DMA_COUNT 0x0084 71 | #define ADC_DMA_COUNT(x) (((x) & 0xFFFFFFFF) << 0) 72 | #define ADC_TO_DMA_COUNT(x) (((x) >> 0) & 0xFFFFFFFF) 73 | 74 | #define ADC_REG_DMA_STATUS 0x0088 75 | #define ADC_DMA_OVF (1 << 2) 76 | #define ADC_DMA_UNF (1 << 1) 77 | #define ADC_DMA_STATUS (1 << 0) 78 | 79 | #define ADC_REG_DMA_BUSWIDTH 0x008C 80 | #define ADC_DMA_BUSWIDTH(x) (((x) & 0xFFFFFFFF) << 0) 81 | #define ADC_TO_DMA_BUSWIDTH(x) (((x) >> 0) & 0xFFFFFFFF) 82 | 83 | /* ADC CHANNEL */ 84 | #define ADC_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40) 85 | #define ADC_LB_EN (1 << 11) 86 | #define ADC_PN_SEL (1 << 10) 87 | #define ADC_IQCOR_ENB (1 << 9) 88 | #define ADC_DCFILT_ENB (1 << 8) 89 | #define ADC_FORMAT_SIGNEXT (1 << 6) 90 | #define ADC_FORMAT_TYPE (1 << 5) 91 | #define ADC_FORMAT_ENABLE (1 << 4) 92 | #define ADC_PN23_TYPE (1 << 1) 93 | #define ADC_ENABLE (1 << 0) 94 | 95 | #define ADC_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40) 96 | #define ADC_PN_ERR (1 << 2) 97 | #define ADC_PN_OOS (1 << 1) 98 | #define ADC_OVER_RANGE (1 << 0) 99 | 100 | #define ADC_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40) 101 | #define ADC_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16) 102 | #define ADC_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF) 103 | #define ADC_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0) 104 | #define ADC_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF) 105 | 106 | #define ADC_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40) 107 | #define ADC_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 108 | #define ADC_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 109 | #define ADC_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 110 | #define ADC_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 111 | 112 | #define ADC_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */ 113 | #define ADC_ADC_PN_SEL(x) (((x) & 0xF) << 16) 114 | #define ADC_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF) 115 | #define ADC_ADC_DATA_SEL(x) (((x) & 0xF) << 0) 116 | #define ADC_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF) 117 | 118 | #define AXI_DMAC_REG_IRQ_MASK 0x80 119 | #define AXI_DMAC_REG_IRQ_PENDING 0x84 120 | #define AXI_DMAC_REG_IRQ_SOURCE 0x88 121 | 122 | #define AXI_DMAC_REG_CTRL 0x400 123 | #define AXI_DMAC_REG_TRANSFER_ID 0x404 124 | #define AXI_DMAC_REG_START_TRANSFER 0x408 125 | #define AXI_DMAC_REG_FLAGS 0x40c 126 | #define AXI_DMAC_REG_DEST_ADDRESS 0x410 127 | #define AXI_DMAC_REG_SRC_ADDRESS 0x414 128 | #define AXI_DMAC_REG_X_LENGTH 0x418 129 | #define AXI_DMAC_REG_Y_LENGTH 0x41c 130 | #define AXI_DMAC_REG_DEST_STRIDE 0x420 131 | #define AXI_DMAC_REG_SRC_STRIDE 0x424 132 | #define AXI_DMAC_REG_TRANSFER_DONE 0x428 133 | #define AXI_DMAC_REG_ACTIVE_TRANSFER_ID 0x42c 134 | #define AXI_DMAC_REG_STATUS 0x430 135 | #define AXI_DMAC_REG_CURRENT_DEST_ADDR 0x434 136 | #define AXI_DMAC_REG_CURRENT_SRC_ADDR 0x438 137 | #define AXI_DMAC_REG_DBG0 0x43c 138 | #define AXI_DMAC_REG_DBG1 0x440 139 | 140 | #define AXI_DMAC_CTRL_ENABLE (1 << 0) 141 | #define AXI_DMAC_CTRL_PAUSE (1 << 1) 142 | 143 | #define AXI_DMAC_IRQ_SOT (1 << 0) 144 | #define AXI_DMAC_IRQ_EOT (1 << 1) 145 | 146 | struct adc_state 147 | { 148 | bool rx2tx2; 149 | }; 150 | 151 | /******************************************************************************/ 152 | /************************ Functions Declarations ******************************/ 153 | /******************************************************************************/ 154 | void adc_init(struct ad9361_rf_phy *phy); 155 | int32_t adc_capture(uint32_t size, uint32_t start_address); 156 | void adc_read(struct ad9361_rf_phy *phy, uint32_t regAddr, uint32_t *data); 157 | void adc_write(struct ad9361_rf_phy *phy, uint32_t regAddr, uint32_t data); 158 | int32_t adc_capture_save_file(uint32_t size, uint32_t start_address, 159 | const char * filename, uint8_t bin_file, 160 | uint8_t ch_no); 161 | int32_t get_file_info(const char *filename, uint32_t *info); 162 | int32_t adc_set_calib_scale(struct ad9361_rf_phy *phy, 163 | uint32_t chan, 164 | int32_t val, 165 | int32_t val2); 166 | int32_t adc_get_calib_scale(struct ad9361_rf_phy *phy, 167 | uint32_t chan, 168 | int32_t *val, 169 | int32_t *val2); 170 | int32_t adc_set_calib_phase(struct ad9361_rf_phy *phy, 171 | uint32_t chan, 172 | int32_t val, 173 | int32_t val2); 174 | int32_t adc_get_calib_phase(struct ad9361_rf_phy *phy, 175 | uint32_t chan, 176 | int32_t *val, 177 | int32_t *val2); 178 | #endif 179 | -------------------------------------------------------------------------------- /websdr/index.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 20 | 21 | 22 | 23 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35 | 223 | 224 | 225 | -------------------------------------------------------------------------------- /sw/platform_linux/filter.c: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file filter.c 3 | * @brief Implementation of Filter Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2015(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | 40 | /******************************************************************************/ 41 | /***************************** Include Files **********************************/ 42 | /******************************************************************************/ 43 | #include 44 | #include "filter.h" 45 | #include "../ad9361_api.h" 46 | 47 | /******************************************************************************/ 48 | /************************ Variables Definitions *******************************/ 49 | /******************************************************************************/ 50 | char rx_fields[11][16] = {"BBPLL", "ADC", "R2", "R1", 51 | "RF", "RXSAMP", "Coefficient", "CoefficientSize", 52 | "Decimation", "Gain", "RFBandwidth"}; 53 | char tx_fields[11][16] = {"BBPLL", "DAC", "T2", "T1", 54 | "TF", "TXSAMP", "Coefficient", "CoefficientSize", 55 | "Interp", "Gain", "RFBandwidth"}; 56 | 57 | /***************************************************************************//** 58 | * @brief parse_mat_fir_file 59 | *******************************************************************************/ 60 | int32_t parse_mat_fir_file(char *mat_fir_filename, 61 | uint8_t *fir_type, 62 | FIRConfig *fir_config, 63 | uint32_t *bandwidth, 64 | uint32_t *path_clks) 65 | { 66 | mat_t *matfp; 67 | matvar_t *matvar; 68 | matvar_t *struct_field; 69 | char (*fields)[16]; 70 | uint8_t field_index; 71 | uint8_t coeff_index; 72 | int32_t ret = 0; 73 | 74 | matfp = Mat_Open(mat_fir_filename, MAT_ACC_RDONLY); 75 | if(matfp == NULL) 76 | { 77 | printf("Error opening MAT file \"%s\".\n", mat_fir_filename); 78 | return -1; 79 | } 80 | else 81 | { 82 | matvar = Mat_VarRead(matfp,"tohwrx"); 83 | if(matvar == NULL) 84 | { 85 | matvar = Mat_VarRead(matfp,"tohwtx"); 86 | if(matvar != NULL) 87 | { 88 | fields = tx_fields; 89 | *fir_type = 1; 90 | } 91 | else 92 | { 93 | printf("Invalid MAT file.\n"); 94 | return -1; 95 | } 96 | } 97 | else 98 | { 99 | fields = rx_fields; 100 | *fir_type = 0; 101 | } 102 | for(field_index = 0; field_index < 11; field_index++) 103 | { 104 | struct_field = Mat_VarGetStructField(matvar, fields[field_index], 105 | 1, 0); 106 | switch (field_index) 107 | { 108 | case 0 ... 5: 109 | path_clks[field_index] = *(double*) struct_field->data; 110 | break; 111 | case 6: 112 | for(coeff_index = 0; coeff_index < 128; coeff_index++) 113 | { 114 | fir_config->coef[coeff_index] = 115 | (int16_t)(*(double*) (struct_field->data + 116 | coeff_index * sizeof(double))); 117 | } 118 | break; 119 | case 7: 120 | fir_config->coef_size = 121 | (uint8_t)(*(double*) struct_field->data); 122 | 123 | break; 124 | case 8: 125 | fir_config->dec_int = 126 | (uint32_t)(*(double*) struct_field->data); 127 | break; 128 | case 9: 129 | fir_config->gain = (int32_t)(*(double*) struct_field->data); 130 | 131 | break; 132 | case 10: 133 | *bandwidth = (uint32_t)(*(double*) struct_field->data); 134 | break; 135 | default: 136 | ret = -1; 137 | goto error; 138 | } 139 | } 140 | } 141 | 142 | fir_config->ch = 3; 143 | 144 | error: 145 | Mat_VarFree(matvar); 146 | Mat_Close(matfp); 147 | 148 | return ret; 149 | } 150 | 151 | /***************************************************************************//** 152 | * @brief load_fir_files 153 | *******************************************************************************/ 154 | int32_t load_enable_fir_files(struct ad9361_rf_phy *phy, 155 | char *tx_mat_fir_filename, 156 | char *rx_mat_fir_filename) 157 | { 158 | #ifdef DEBUG 159 | uint8_t index; 160 | #endif 161 | uint8_t fir_type; 162 | uint32_t tx_bandwidth; 163 | uint32_t rx_bandwidth; 164 | uint32_t tx_path_clks[6]; 165 | uint32_t rx_path_clks[6]; 166 | AD9361_RXFIRConfig rx_fir; 167 | AD9361_TXFIRConfig tx_fir; 168 | 169 | parse_mat_fir_file(tx_mat_fir_filename, &fir_type, (FIRConfig*)&tx_fir, &tx_bandwidth, tx_path_clks); 170 | 171 | if (!fir_type) { 172 | printf("Invalid TX filter configuration.\n"); 173 | return -1; 174 | } 175 | #ifdef DEBUG 176 | printf("channels_selection: %d\n", tx_fir.tx); 177 | 178 | printf("gain = %d\n", tx_fir.tx_gain); 179 | 180 | printf("int = %d\n", tx_fir.tx_int); 181 | 182 | for (index = 0; index < tx_fir.tx_coef_size; index ++) { 183 | if (index == 0) 184 | printf("coeff = "); 185 | printf("%d", tx_fir.tx_coef[index]); 186 | if (index == (tx_fir.tx_coef_size - 1)) 187 | printf("\n"); 188 | else 189 | printf(", "); 190 | } 191 | 192 | printf("coeff_size = %d\n", tx_fir.tx_coef_size); 193 | 194 | printf("bandwidth = %d\n", tx_bandwidth); 195 | 196 | for (index = 0; index < 6; index ++) { 197 | if (index == 0) 198 | printf("path_clks = "); 199 | printf("%d", tx_path_clks[index]); 200 | if (index == 5) 201 | printf("\n"); 202 | else 203 | printf(", "); 204 | } 205 | #endif 206 | parse_mat_fir_file(rx_mat_fir_filename, &fir_type, (FIRConfig *)&rx_fir, &rx_bandwidth, rx_path_clks); 207 | 208 | if (fir_type) { 209 | printf("Invalid RX filter configuration.\n"); 210 | return -1; 211 | } 212 | #ifdef DEBUG 213 | printf("channels_selection: %d\n", rx_fir.rx); 214 | 215 | printf("gain = %d\n", rx_fir.rx_gain); 216 | 217 | printf("dec = %d\n", rx_fir.rx_dec); 218 | 219 | for (index = 0; index < rx_fir.rx_coef_size; index ++) { 220 | if (index == 0) 221 | printf("coeff = "); 222 | printf("%d", rx_fir.rx_coef[index]); 223 | if (index == (rx_fir.rx_coef_size - 1)) 224 | printf("\n"); 225 | else 226 | printf(", "); 227 | } 228 | 229 | printf("coeff_size = %d\n", rx_fir.rx_coef_size); 230 | 231 | printf("bandwidth = %d\n", rx_bandwidth); 232 | 233 | for (index = 0; index < 6; index ++) { 234 | if (index == 0) 235 | printf("path_clks = "); 236 | printf("%d", rx_path_clks[index]); 237 | if (index == 5) 238 | printf("\n"); 239 | else 240 | printf(", "); 241 | } 242 | #endif 243 | ad9361_set_tx_fir_config(phy, tx_fir); 244 | ad9361_set_rx_fir_config(phy, rx_fir); 245 | ad9361_set_tx_fir_en_dis(phy, 1); 246 | ad9361_set_rx_fir_en_dis(phy, 1); 247 | ad9361_set_tx_rf_bandwidth(phy, tx_bandwidth); 248 | ad9361_set_rx_rf_bandwidth(phy, rx_bandwidth); 249 | ad9361_set_trx_path_clks(phy, rx_path_clks, tx_path_clks); 250 | 251 | return 0; 252 | } 253 | -------------------------------------------------------------------------------- /sw/platform_linux/dac_core.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file dac_core.h 3 | * @brief Header file of DAC Core Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef DAC_CORE_API_H_ 40 | #define DAC_CORE_API_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "../ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | #define DAC_REG_VERSION 0x0000 51 | #define DAC_VERSION(x) (((x) & 0xffffffff) << 0) 52 | #define VERSION_IS(x,y,z) ((x) << 16 | (y) << 8 | (z)) 53 | #define DAC_REG_ID 0x0004 54 | #define DAC_ID(x) (((x) & 0xffffffff) << 0) 55 | #define DAC_REG_SCRATCH 0x0008 56 | #define DAC_SCRATCH(x) (((x) & 0xffffffff) << 0) 57 | 58 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 59 | 60 | #define DAC_REG_RSTN 0x0040 61 | #define DAC_RSTN (1 << 0) 62 | #define DAC_MMCM_RSTN (1 << 1) 63 | 64 | #define DAC_REG_RATECNTRL 0x004C 65 | #define DAC_RATE(x) (((x) & 0xFF) << 0) 66 | #define DAC_TO_RATE(x) (((x) >> 0) & 0xFF) 67 | 68 | #define DAC_REG_CNTRL_1 0x0044 69 | #define DAC_ENABLE (1 << 0) /* v7.0 */ 70 | #define DAC_SYNC (1 << 0) /* v8.0 */ 71 | 72 | #define DAC_REG_CNTRL_2 0x0048 73 | #define DAC_PAR_TYPE (1 << 7) 74 | #define DAC_PAR_ENB (1 << 6) 75 | #define DAC_R1_MODE (1 << 5) 76 | #define DAC_DATA_FORMAT (1 << 4) 77 | #define DAC_DATA_SEL(x) (((x) & 0xF) << 0) /* v7.0 */ 78 | #define DAC_TO_DATA_SEL(x) (((x) >> 0) & 0xF) /* v7.0 */ 79 | 80 | #define DAC_REG_VDMA_FRMCNT 0x0084 81 | #define DAC_VDMA_FRMCNT(x) (((x) & 0xFFFFFFFF) << 0) 82 | #define DAC_TO_VDMA_FRMCNT(x) (((x) >> 0) & 0xFFFFFFFF) 83 | 84 | #define DAC_REG_VDMA_STATUS 0x0088 85 | #define DAC_VDMA_OVF (1 << 1) 86 | #define DAC_VDMA_UNF (1 << 0) 87 | 88 | enum dds_data_select { 89 | DATA_SEL_DDS, 90 | DATA_SEL_SED, 91 | DATA_SEL_DMA, 92 | DATA_SEL_ZERO, /* OUTPUT 0 */ 93 | DATA_SEL_PN7, 94 | DATA_SEL_PN15, 95 | DATA_SEL_PN23, 96 | DATA_SEL_PN31, 97 | DATA_SEL_LB, /* loopback data (ADC) */ 98 | DATA_SEL_PNXX, /* (Device specific) */ 99 | }; 100 | 101 | #define DAC_REG_CHAN_CNTRL_1_IIOCHAN(x) (0x0400 + ((x) >> 1) * 0x40 + ((x) & 1) * 0x8) 102 | #define DAC_DDS_SCALE(x) (((x) & 0xFFFF) << 0) 103 | #define DAC_TO_DDS_SCALE(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define DAC_REG_CHAN_CNTRL_2_IIOCHAN(x) (0x0404 + ((x) >> 1) * 0x40 + ((x) & 1) * 0x8) 106 | #define DAC_DDS_INIT(x) (((x) & 0xFFFF) << 16) 107 | #define DAC_TO_DDS_INIT(x) (((x) >> 16) & 0xFFFF) 108 | #define DAC_DDS_INCR(x) (((x) & 0xFFFF) << 0) 109 | #define DAC_TO_DDS_INCR(x) (((x) >> 0) & 0xFFFF) 110 | 111 | #define DDS_CHAN_TX1_I_F1 0 112 | #define DDS_CHAN_TX1_I_F2 1 113 | #define DDS_CHAN_TX1_Q_F1 2 114 | #define DDS_CHAN_TX1_Q_F2 3 115 | #define DDS_CHAN_TX2_I_F1 4 116 | #define DDS_CHAN_TX2_I_F2 5 117 | #define DDS_CHAN_TX2_Q_F1 6 118 | #define DDS_CHAN_TX2_Q_F2 7 119 | 120 | #define AXI_DMAC_REG_IRQ_MASK 0x80 121 | #define AXI_DMAC_REG_IRQ_PENDING 0x84 122 | #define AXI_DMAC_REG_IRQ_SOURCE 0x88 123 | 124 | #define AXI_DMAC_REG_CTRL 0x400 125 | #define AXI_DMAC_REG_TRANSFER_ID 0x404 126 | #define AXI_DMAC_REG_START_TRANSFER 0x408 127 | #define AXI_DMAC_REG_FLAGS 0x40c 128 | #define AXI_DMAC_REG_DEST_ADDRESS 0x410 129 | #define AXI_DMAC_REG_SRC_ADDRESS 0x414 130 | #define AXI_DMAC_REG_X_LENGTH 0x418 131 | #define AXI_DMAC_REG_Y_LENGTH 0x41c 132 | #define AXI_DMAC_REG_DEST_STRIDE 0x420 133 | #define AXI_DMAC_REG_SRC_STRIDE 0x424 134 | #define AXI_DMAC_REG_TRANSFER_DONE 0x428 135 | #define AXI_DMAC_REG_ACTIVE_TRANSFER_ID 0x42c 136 | #define AXI_DMAC_REG_STATUS 0x430 137 | #define AXI_DMAC_REG_CURRENT_DEST_ADDR 0x434 138 | #define AXI_DMAC_REG_CURRENT_SRC_ADDR 0x438 139 | #define AXI_DMAC_REG_DBG0 0x43c 140 | #define AXI_DMAC_REG_DBG1 0x440 141 | 142 | #define AXI_DMAC_CTRL_ENABLE (1 << 0) 143 | #define AXI_DMAC_CTRL_PAUSE (1 << 1) 144 | 145 | #define AXI_DMAC_IRQ_SOT (1 << 0) 146 | #define AXI_DMAC_IRQ_EOT (1 << 1) 147 | 148 | #define DMAC_FLAGS_CYCLIC (1 << 0) 149 | #define DMAC_FLAGS_TLAST (1 << 1) 150 | 151 | struct dds_state 152 | { 153 | uint32_t cached_freq[8]; 154 | uint32_t cached_phase[8]; 155 | int32_t cached_scale[8]; 156 | uint32_t *dac_clk; 157 | uint32_t pcore_version; 158 | uint32_t num_dds_channels; 159 | bool enable; 160 | bool rx2tx2; 161 | }; 162 | 163 | #define DAC_REG_CHAN_CNTRL_6(c) (0x0414 + (c) * 0x40) 164 | #define DAC_IQCOR_ENB (1 << 2) /* v8.0 */ 165 | 166 | #define DAC_REG_CHAN_CNTRL_7(c) (0x0418 + (c) * 0x40) /* v8.0 */ 167 | #define DAC_DAC_DDS_SEL(x) (((x) & 0xF) << 0) 168 | #define DAC_TO_DAC_DDS_SEL(x) (((x) >> 0) & 0xF) 169 | 170 | #define DAC_REG_CHAN_CNTRL_8(c) (0x041C + (c) * 0x40) /* v8.0 */ 171 | #define DAC_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 172 | #define DAC_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 173 | #define DAC_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 174 | #define DAC_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 175 | 176 | /******************************************************************************/ 177 | /************************ Functions Declarations ******************************/ 178 | /******************************************************************************/ 179 | void dac_init(struct ad9361_rf_phy *phy, uint8_t data_sel, uint8_t config_dma); 180 | void dds_set_frequency(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t freq); 181 | void dds_set_phase(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t phase); 182 | void dds_set_scale(struct ad9361_rf_phy *phy, uint32_t chan, int32_t scale_micro_units); 183 | void dds_update(struct ad9361_rf_phy *phy); 184 | int dac_datasel(struct ad9361_rf_phy *phy, int32_t chan, enum dds_data_select sel); 185 | int32_t dds_set_calib_scale(struct ad9361_rf_phy *phy, 186 | uint32_t chan, 187 | int32_t val, 188 | int32_t val2); 189 | int32_t dds_get_calib_scale(struct ad9361_rf_phy *phy, 190 | uint32_t chan, 191 | int32_t *val, 192 | int32_t *val2); 193 | int32_t dds_set_calib_phase(struct ad9361_rf_phy *phy, 194 | uint32_t chan, 195 | int32_t val, 196 | int32_t val2); 197 | int32_t dds_get_calib_phase(struct ad9361_rf_phy *phy, 198 | uint32_t chan, 199 | int32_t *val, 200 | int32_t *val2); 201 | #endif 202 | -------------------------------------------------------------------------------- /sw/platform_altera/dac_core.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file dac_core.h 3 | * @brief Header file of DAC Core Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2014(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef DAC_CORE_API_H_ 40 | #define DAC_CORE_API_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | #define DAC_REG_VERSION 0x0000 51 | #define DAC_VERSION(x) (((x) & 0xffffffff) << 0) 52 | #define VERSION_IS(x,y,z) ((x) << 16 | (y) << 8 | (z)) 53 | #define DAC_REG_ID 0x0004 54 | #define DAC_ID(x) (((x) & 0xffffffff) << 0) 55 | #define DAC_REG_SCRATCH 0x0008 56 | #define DAC_SCRATCH(x) (((x) & 0xffffffff) << 0) 57 | 58 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 59 | 60 | #define DAC_REG_RSTN 0x0040 61 | #define DAC_RSTN (1 << 0) 62 | #define DAC_MMCM_RSTN (1 << 1) 63 | 64 | #define DAC_REG_RATECNTRL 0x004C 65 | #define DAC_RATE(x) (((x) & 0xFF) << 0) 66 | #define DAC_TO_RATE(x) (((x) >> 0) & 0xFF) 67 | 68 | #define DAC_REG_CNTRL_1 0x0044 69 | #define DAC_ENABLE (1 << 0) /* v7.0 */ 70 | #define DAC_SYNC (1 << 0) /* v8.0 */ 71 | 72 | #define DAC_REG_CNTRL_2 0x0048 73 | #define DAC_PAR_TYPE (1 << 7) 74 | #define DAC_PAR_ENB (1 << 6) 75 | #define DAC_R1_MODE (1 << 5) 76 | #define DAC_DATA_FORMAT (1 << 4) 77 | #define DAC_DATA_SEL(x) (((x) & 0xF) << 0) /* v7.0 */ 78 | #define DAC_TO_DATA_SEL(x) (((x) >> 0) & 0xF) /* v7.0 */ 79 | 80 | #define DAC_REG_VDMA_FRMCNT 0x0084 81 | #define DAC_VDMA_FRMCNT(x) (((x) & 0xFFFFFFFF) << 0) 82 | #define DAC_TO_VDMA_FRMCNT(x) (((x) >> 0) & 0xFFFFFFFF) 83 | 84 | #define DAC_REG_VDMA_STATUS 0x0088 85 | #define DAC_VDMA_OVF (1 << 1) 86 | #define DAC_VDMA_UNF (1 << 0) 87 | 88 | enum dds_data_select { 89 | DATA_SEL_DDS, 90 | DATA_SEL_SED, 91 | DATA_SEL_DMA, 92 | DATA_SEL_ZERO, /* OUTPUT 0 */ 93 | DATA_SEL_PN7, 94 | DATA_SEL_PN15, 95 | DATA_SEL_PN23, 96 | DATA_SEL_PN31, 97 | DATA_SEL_LB, /* loopback data (ADC) */ 98 | DATA_SEL_PNXX, /* (Device specific) */ 99 | }; 100 | 101 | #define DAC_REG_CHAN_CNTRL_1_IIOCHAN(x) (0x0400 + ((x) >> 1) * 0x40 + ((x) & 1) * 0x8) 102 | #define DAC_DDS_SCALE(x) (((x) & 0xFFFF) << 0) 103 | #define DAC_TO_DDS_SCALE(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define DAC_REG_CHAN_CNTRL_2_IIOCHAN(x) (0x0404 + ((x) >> 1) * 0x40 + ((x) & 1) * 0x8) 106 | #define DAC_DDS_INIT(x) (((x) & 0xFFFF) << 16) 107 | #define DAC_TO_DDS_INIT(x) (((x) >> 16) & 0xFFFF) 108 | #define DAC_DDS_INCR(x) (((x) & 0xFFFF) << 0) 109 | #define DAC_TO_DDS_INCR(x) (((x) >> 0) & 0xFFFF) 110 | 111 | #define DDS_CHAN_TX1_I_F1 0 112 | #define DDS_CHAN_TX1_I_F2 1 113 | #define DDS_CHAN_TX1_Q_F1 2 114 | #define DDS_CHAN_TX1_Q_F2 3 115 | #define DDS_CHAN_TX2_I_F1 4 116 | #define DDS_CHAN_TX2_I_F2 5 117 | #define DDS_CHAN_TX2_Q_F1 6 118 | #define DDS_CHAN_TX2_Q_F2 7 119 | 120 | #define AXI_DMAC_REG_IRQ_MASK 0x80 121 | #define AXI_DMAC_REG_IRQ_PENDING 0x84 122 | #define AXI_DMAC_REG_IRQ_SOURCE 0x88 123 | 124 | #define AXI_DMAC_REG_CTRL 0x400 125 | #define AXI_DMAC_REG_TRANSFER_ID 0x404 126 | #define AXI_DMAC_REG_START_TRANSFER 0x408 127 | #define AXI_DMAC_REG_FLAGS 0x40c 128 | #define AXI_DMAC_REG_DEST_ADDRESS 0x410 129 | #define AXI_DMAC_REG_SRC_ADDRESS 0x414 130 | #define AXI_DMAC_REG_X_LENGTH 0x418 131 | #define AXI_DMAC_REG_Y_LENGTH 0x41c 132 | #define AXI_DMAC_REG_DEST_STRIDE 0x420 133 | #define AXI_DMAC_REG_SRC_STRIDE 0x424 134 | #define AXI_DMAC_REG_TRANSFER_DONE 0x428 135 | #define AXI_DMAC_REG_ACTIVE_TRANSFER_ID 0x42c 136 | #define AXI_DMAC_REG_STATUS 0x430 137 | #define AXI_DMAC_REG_CURRENT_DEST_ADDR 0x434 138 | #define AXI_DMAC_REG_CURRENT_SRC_ADDR 0x438 139 | #define AXI_DMAC_REG_DBG0 0x43c 140 | #define AXI_DMAC_REG_DBG1 0x440 141 | 142 | #define AXI_DMAC_CTRL_ENABLE (1 << 0) 143 | #define AXI_DMAC_CTRL_PAUSE (1 << 1) 144 | 145 | #define AXI_DMAC_IRQ_SOT (1 << 0) 146 | #define AXI_DMAC_IRQ_EOT (1 << 1) 147 | 148 | #define DMAC_FLAGS_CYCLIC (1 << 0) 149 | #define DMAC_FLAGS_TLAST (1 << 1) 150 | 151 | struct dds_state 152 | { 153 | uint32_t cached_freq[8]; 154 | uint32_t cached_phase[8]; 155 | int32_t cached_scale[8]; 156 | enum dds_data_select cached_datasel[8]; 157 | uint32_t *dac_clk; 158 | uint32_t pcore_version; 159 | uint32_t num_buf_channels; 160 | bool enable; 161 | bool rx2tx2; 162 | }; 163 | 164 | #define DAC_REG_CHAN_CNTRL_6(c) (0x0414 + (c) * 0x40) 165 | #define DAC_IQCOR_ENB (1 << 2) /* v8.0 */ 166 | 167 | #define DAC_REG_CHAN_CNTRL_7(c) (0x0418 + (c) * 0x40) /* v8.0 */ 168 | #define DAC_DAC_DDS_SEL(x) (((x) & 0xF) << 0) 169 | #define DAC_TO_DAC_DDS_SEL(x) (((x) >> 0) & 0xF) 170 | 171 | #define DAC_REG_CHAN_CNTRL_8(c) (0x041C + (c) * 0x40) /* v8.0 */ 172 | #define DAC_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 173 | #define DAC_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 174 | #define DAC_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 175 | #define DAC_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 176 | 177 | /******************************************************************************/ 178 | /************************ Functions Declarations ******************************/ 179 | /******************************************************************************/ 180 | void dac_init(struct ad9361_rf_phy *phy, uint8_t data_sel, uint8_t config_dma); 181 | void dds_set_frequency(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t freq); 182 | void dds_get_frequency(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t *freq); 183 | void dds_set_phase(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t phase); 184 | void dds_get_phase(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t *phase); 185 | void dds_set_scale(struct ad9361_rf_phy *phy, uint32_t chan, int32_t scale_micro_units); 186 | void dds_get_scale(struct ad9361_rf_phy *phy, uint32_t chan, int32_t *scale_micro_units); 187 | void dds_update(struct ad9361_rf_phy *phy); 188 | int32_t dac_datasel(struct ad9361_rf_phy *phy, int32_t chan, enum dds_data_select sel); 189 | void dac_get_datasel(struct ad9361_rf_phy *phy, int32_t chan, enum dds_data_select *sel); 190 | int32_t dds_set_calib_scale(struct ad9361_rf_phy *phy, 191 | uint32_t chan, 192 | int32_t val, 193 | int32_t val2); 194 | int32_t dds_get_calib_scale(struct ad9361_rf_phy *phy, 195 | uint32_t chan, 196 | int32_t *val, 197 | int32_t *val2); 198 | int32_t dds_set_calib_phase(struct ad9361_rf_phy *phy, 199 | uint32_t chan, 200 | int32_t val, 201 | int32_t val2); 202 | int32_t dds_get_calib_phase(struct ad9361_rf_phy *phy, 203 | uint32_t chan, 204 | int32_t *val, 205 | int32_t *val2); 206 | #endif 207 | -------------------------------------------------------------------------------- /sw/platform_xilinx/dac_core.h: -------------------------------------------------------------------------------- 1 | /***************************************************************************//** 2 | * @file dac_core.h 3 | * @brief Header file of DAC Core Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************** 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef DAC_CORE_API_H_ 40 | #define DAC_CORE_API_H_ 41 | 42 | /******************************************************************************/ 43 | /***************************** Include Files **********************************/ 44 | /******************************************************************************/ 45 | #include "ad9361.h" 46 | 47 | /******************************************************************************/ 48 | /********************** Macros and Constants Definitions **********************/ 49 | /******************************************************************************/ 50 | #define DAC_REG_VERSION 0x0000 51 | #define DAC_VERSION(x) (((x) & 0xffffffff) << 0) 52 | #define VERSION_IS(x,y,z) ((x) << 16 | (y) << 8 | (z)) 53 | #define DAC_REG_ID 0x0004 54 | #define DAC_ID(x) (((x) & 0xffffffff) << 0) 55 | #define DAC_REG_SCRATCH 0x0008 56 | #define DAC_SCRATCH(x) (((x) & 0xffffffff) << 0) 57 | 58 | #define PCORE_VERSION_MAJOR(version) (version >> 16) 59 | 60 | #define DAC_REG_RSTN 0x0040 61 | #define DAC_RSTN (1 << 0) 62 | #define DAC_MMCM_RSTN (1 << 1) 63 | 64 | #define DAC_REG_RATECNTRL 0x004C 65 | #define DAC_RATE(x) (((x) & 0xFF) << 0) 66 | #define DAC_TO_RATE(x) (((x) >> 0) & 0xFF) 67 | 68 | #define DAC_REG_CNTRL_1 0x0044 69 | #define DAC_ENABLE (1 << 0) /* v7.0 */ 70 | #define DAC_SYNC (1 << 0) /* v8.0 */ 71 | 72 | #define DAC_REG_CNTRL_2 0x0048 73 | #define DAC_PAR_TYPE (1 << 7) 74 | #define DAC_PAR_ENB (1 << 6) 75 | #define DAC_R1_MODE (1 << 5) 76 | #define DAC_DATA_FORMAT (1 << 4) 77 | #define DAC_DATA_SEL(x) (((x) & 0xF) << 0) /* v7.0 */ 78 | #define DAC_TO_DATA_SEL(x) (((x) >> 0) & 0xF) /* v7.0 */ 79 | 80 | #define DAC_REG_VDMA_FRMCNT 0x0084 81 | #define DAC_VDMA_FRMCNT(x) (((x) & 0xFFFFFFFF) << 0) 82 | #define DAC_TO_VDMA_FRMCNT(x) (((x) >> 0) & 0xFFFFFFFF) 83 | 84 | #define DAC_REG_VDMA_STATUS 0x0088 85 | #define DAC_VDMA_OVF (1 << 1) 86 | #define DAC_VDMA_UNF (1 << 0) 87 | 88 | enum dds_data_select { 89 | DATA_SEL_DDS, 90 | DATA_SEL_SED, 91 | DATA_SEL_DMA, 92 | DATA_SEL_ZERO, /* OUTPUT 0 */ 93 | DATA_SEL_PN7, 94 | DATA_SEL_PN15, 95 | DATA_SEL_PN23, 96 | DATA_SEL_PN31, 97 | DATA_SEL_LB, /* loopback data (ADC) */ 98 | DATA_SEL_PNXX, /* (Device specific) */ 99 | }; 100 | 101 | #define DAC_REG_CHAN_CNTRL_1_IIOCHAN(x) (0x0400 + ((x) >> 1) * 0x40 + ((x) & 1) * 0x8) 102 | #define DAC_DDS_SCALE(x) (((x) & 0xFFFF) << 0) 103 | #define DAC_TO_DDS_SCALE(x) (((x) >> 0) & 0xFFFF) 104 | 105 | #define DAC_REG_CHAN_CNTRL_2_IIOCHAN(x) (0x0404 + ((x) >> 1) * 0x40 + ((x) & 1) * 0x8) 106 | #define DAC_DDS_INIT(x) (((x) & 0xFFFF) << 16) 107 | #define DAC_TO_DDS_INIT(x) (((x) >> 16) & 0xFFFF) 108 | #define DAC_DDS_INCR(x) (((x) & 0xFFFF) << 0) 109 | #define DAC_TO_DDS_INCR(x) (((x) >> 0) & 0xFFFF) 110 | 111 | #define DDS_CHAN_TX1_I_F1 0 112 | #define DDS_CHAN_TX1_I_F2 1 113 | #define DDS_CHAN_TX1_Q_F1 2 114 | #define DDS_CHAN_TX1_Q_F2 3 115 | #define DDS_CHAN_TX2_I_F1 4 116 | #define DDS_CHAN_TX2_I_F2 5 117 | #define DDS_CHAN_TX2_Q_F1 6 118 | #define DDS_CHAN_TX2_Q_F2 7 119 | 120 | #define AXI_DMAC_REG_IRQ_MASK 0x80 121 | #define AXI_DMAC_REG_IRQ_PENDING 0x84 122 | #define AXI_DMAC_REG_IRQ_SOURCE 0x88 123 | 124 | #define AXI_DMAC_REG_CTRL 0x400 125 | #define AXI_DMAC_REG_TRANSFER_ID 0x404 126 | #define AXI_DMAC_REG_START_TRANSFER 0x408 127 | #define AXI_DMAC_REG_FLAGS 0x40c 128 | #define AXI_DMAC_REG_DEST_ADDRESS 0x410 129 | #define AXI_DMAC_REG_SRC_ADDRESS 0x414 130 | #define AXI_DMAC_REG_X_LENGTH 0x418 131 | #define AXI_DMAC_REG_Y_LENGTH 0x41c 132 | #define AXI_DMAC_REG_DEST_STRIDE 0x420 133 | #define AXI_DMAC_REG_SRC_STRIDE 0x424 134 | #define AXI_DMAC_REG_TRANSFER_DONE 0x428 135 | #define AXI_DMAC_REG_ACTIVE_TRANSFER_ID 0x42c 136 | #define AXI_DMAC_REG_STATUS 0x430 137 | #define AXI_DMAC_REG_CURRENT_DEST_ADDR 0x434 138 | #define AXI_DMAC_REG_CURRENT_SRC_ADDR 0x438 139 | #define AXI_DMAC_REG_DBG0 0x43c 140 | #define AXI_DMAC_REG_DBG1 0x440 141 | 142 | #define AXI_DMAC_CTRL_ENABLE (1 << 0) 143 | #define AXI_DMAC_CTRL_PAUSE (1 << 1) 144 | 145 | #define AXI_DMAC_IRQ_SOT (1 << 0) 146 | #define AXI_DMAC_IRQ_EOT (1 << 1) 147 | 148 | #define DMAC_FLAGS_CYCLIC (1 << 0) 149 | #define DMAC_FLAGS_TLAST (1 << 1) 150 | 151 | struct dds_state 152 | { 153 | uint32_t cached_freq[8]; 154 | uint32_t cached_phase[8]; 155 | int32_t cached_scale[8]; 156 | enum dds_data_select cached_datasel[8]; 157 | uint32_t *dac_clk; 158 | uint32_t pcore_version; 159 | uint32_t num_buf_channels; 160 | bool enable; 161 | bool rx2tx2; 162 | }; 163 | 164 | #define DAC_REG_CHAN_CNTRL_6(c) (0x0414 + (c) * 0x40) 165 | #define DAC_IQCOR_ENB (1 << 2) /* v8.0 */ 166 | 167 | #define DAC_REG_CHAN_CNTRL_7(c) (0x0418 + (c) * 0x40) /* v8.0 */ 168 | #define DAC_DAC_DDS_SEL(x) (((x) & 0xF) << 0) 169 | #define DAC_TO_DAC_DDS_SEL(x) (((x) >> 0) & 0xF) 170 | 171 | #define DAC_REG_CHAN_CNTRL_8(c) (0x041C + (c) * 0x40) /* v8.0 */ 172 | #define DAC_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16) 173 | #define DAC_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF) 174 | #define DAC_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0) 175 | #define DAC_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF) 176 | 177 | /******************************************************************************/ 178 | /************************ Functions Declarations ******************************/ 179 | /******************************************************************************/ 180 | void dac_init(struct ad9361_rf_phy *phy, uint8_t data_sel, uint8_t config_dma); 181 | void dds_set_frequency(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t freq); 182 | void dds_get_frequency(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t *freq); 183 | void dds_set_phase(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t phase); 184 | void dds_get_phase(struct ad9361_rf_phy *phy, uint32_t chan, uint32_t *phase); 185 | void dds_set_scale(struct ad9361_rf_phy *phy, uint32_t chan, int32_t scale_micro_units); 186 | void dds_get_scale(struct ad9361_rf_phy *phy, uint32_t chan, int32_t *scale_micro_units); 187 | void dds_update(struct ad9361_rf_phy *phy); 188 | int32_t dac_datasel(struct ad9361_rf_phy *phy, int32_t chan, enum dds_data_select sel); 189 | void dac_get_datasel(struct ad9361_rf_phy *phy, int32_t chan, enum dds_data_select *sel); 190 | int32_t dds_set_calib_scale(struct ad9361_rf_phy *phy, 191 | uint32_t chan, 192 | int32_t val, 193 | int32_t val2); 194 | int32_t dds_get_calib_scale(struct ad9361_rf_phy *phy, 195 | uint32_t chan, 196 | int32_t *val, 197 | int32_t *val2); 198 | int32_t dds_set_calib_phase(struct ad9361_rf_phy *phy, 199 | uint32_t chan, 200 | int32_t val, 201 | int32_t val2); 202 | int32_t dds_get_calib_phase(struct ad9361_rf_phy *phy, 203 | uint32_t chan, 204 | int32_t *val, 205 | int32_t *val2); 206 | #endif 207 | -------------------------------------------------------------------------------- /sw/console_commands/command.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file command.h 3 | * @brief Header file of AD9361 Command Driver. 4 | * @author DBogdan (dragos.bogdan@analog.com) 5 | ******************************************************************************* 6 | * Copyright 2013(c) Analog Devices, Inc. 7 | * 8 | * All rights reserved. 9 | * 10 | * Redistribution and use in source and binary forms, with or without 11 | * modification, are permitted provided that the following conditions are met: 12 | * - Redistributions of source code must retain the above copyright 13 | * notice, this list of conditions and the following disclaimer. 14 | * - Redistributions in binary form must reproduce the above copyright 15 | * notice, this list of conditions and the following disclaimer in 16 | * the documentation and/or other materials provided with the 17 | * distribution. 18 | * - Neither the name of Analog Devices, Inc. nor the names of its 19 | * contributors may be used to endorse or promote products derived 20 | * from this software without specific prior written permission. 21 | * - The use of this software may or may not infringe the patent rights 22 | * of one or more patent holders. This license does not release you 23 | * from the requirement that you obtain separate licenses from these 24 | * patent holders to use this software. 25 | * - Use of the software either in source or binary form, must be run 26 | * on or directly connected to an Analog Devices Inc. component. 27 | * 28 | * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR 29 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, 30 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 31 | * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33 | * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38 | *******************************************************************************/ 39 | #ifndef __COMMAND_H__ 40 | #define __COMMAND_H__ 41 | 42 | /******************************************************************************/ 43 | /********************** Macros and Constants Definitions **********************/ 44 | /******************************************************************************/ 45 | #define NULL ((void *)0) 46 | #define SUCCESS 0 47 | #define ERROR -1 48 | 49 | /******************************************************************************/ 50 | /*************************** Types Declarations *******************************/ 51 | /******************************************************************************/ 52 | typedef void (*cmd_function)(double* param, char param_no); 53 | typedef struct 54 | { 55 | const char* name; 56 | const char* description; 57 | const char* example; 58 | cmd_function function; 59 | }command; 60 | 61 | /******************************************************************************/ 62 | /************************ Functions Declarations ******************************/ 63 | /******************************************************************************/ 64 | 65 | /* Displays all available commands. */ 66 | void get_help(double* param, char param_no); 67 | 68 | /* Gets the specified register value. */ 69 | void get_register(double* param, char param_no); 70 | 71 | /* Gets current TX LO frequency. */ 72 | void get_tx_lo_freq(double* param, char param_no); 73 | 74 | /* Sets the TX LO frequency. */ 75 | void set_tx_lo_freq(double* param, char param_no); 76 | 77 | /* Gets current TX sampling frequency. */ 78 | void get_tx_samp_freq(double* param, char param_no); 79 | 80 | /* Sets the TX sampling frequency. */ 81 | void set_tx_samp_freq(double* param, char param_no); 82 | 83 | /* Gets current TX RF bandwidth. */ 84 | void get_tx_rf_bandwidth(double* param, char param_no); 85 | 86 | /* Sets the TX RF bandwidth. */ 87 | void set_tx_rf_bandwidth(double* param, char param_no); 88 | 89 | /* Gets current TX1 attenuation. */ 90 | void get_tx1_attenuation(double* param, char param_no); 91 | 92 | /* Sets the TX1 attenuation. */ 93 | void set_tx1_attenuation(double* param, char param_no); 94 | 95 | /* Gets current TX2 attenuation. */ 96 | void get_tx2_attenuation(double* param, char param_no); 97 | 98 | /* Sets the TX2 attenuation. */ 99 | void set_tx2_attenuation(double* param, char param_no); 100 | 101 | /* Gets current TX FIR state. */ 102 | void get_tx_fir_en(double* param, char param_no); 103 | 104 | /* Sets the TX FIR state. */ 105 | void set_tx_fir_en(double* param, char param_no); 106 | 107 | /* Gets current RX LO frequency. */ 108 | void get_rx_lo_freq(double* param, char param_no); 109 | 110 | /* Sets the RX LO frequency. */ 111 | void set_rx_lo_freq(double* param, char param_no); 112 | 113 | /* Gets current RX sampling frequency. */ 114 | void get_rx_samp_freq(double* param, char param_no); 115 | 116 | /* Sets the RX sampling frequency. */ 117 | void set_rx_samp_freq(double* param, char param_no); 118 | 119 | /* Gets current RX RF bandwidth. */ 120 | void get_rx_rf_bandwidth(double* param, char param_no); 121 | 122 | /* Sets the RX RF bandwidth. */ 123 | void set_rx_rf_bandwidth(double* param, char param_no); 124 | 125 | /* Gets current RX1 GC mode. */ 126 | void get_rx1_gc_mode(double* param, char param_no); 127 | 128 | /* Sets the RX1 GC mode. */ 129 | void set_rx1_gc_mode(double* param, char param_no); 130 | 131 | /* Gets current RX2 GC mode. */ 132 | void get_rx2_gc_mode(double* param, char param_no); 133 | 134 | /* Sets the RX2 GC mode. */ 135 | void set_rx2_gc_mode(double* param, char param_no); 136 | 137 | /* Gets current RX1 RF gain. */ 138 | void get_rx1_rf_gain(double* param, char param_no); 139 | 140 | /* Sets the RX1 RF gain. */ 141 | void set_rx1_rf_gain(double* param, char param_no); 142 | 143 | /* Gets current RX2 RF gain. */ 144 | void get_rx2_rf_gain(double* param, char param_no); 145 | 146 | /* Sets the RX2 RF gain. */ 147 | void set_rx2_rf_gain(double* param, char param_no); 148 | 149 | /* Gets current RX FIR state. */ 150 | void get_rx_fir_en(double* param, char param_no); 151 | 152 | /* Sets the RX FIR state. */ 153 | void set_rx_fir_en(double* param, char param_no); 154 | 155 | /* Gets current DDS TX1 Tone 1 frequency [Hz]. */ 156 | void get_dds_tx1_tone1_freq(double* param, char param_no); 157 | 158 | /* Sets the DDS TX1 Tone 1 frequency [Hz]. */ 159 | void set_dds_tx1_tone1_freq(double* param, char param_no); 160 | 161 | /* Gets current DDS TX1 Tone 2 frequency [Hz]. */ 162 | void get_dds_tx1_tone2_freq(double* param, char param_no); 163 | 164 | /* Sets the DDS TX1 Tone 2 frequency [Hz]. */ 165 | void set_dds_tx1_tone2_freq(double* param, char param_no); 166 | 167 | /* Gets current DDS TX1 Tone 1 phase [degrees]. */ 168 | void get_dds_tx1_tone1_phase(double* param, char param_no); 169 | 170 | /* Sets the DDS TX1 Tone 1 phase [degrees]. */ 171 | void set_dds_tx1_tone1_phase(double* param, char param_no); 172 | 173 | /* Gets current DDS TX1 Tone 2 phase [degrees]. */ 174 | void get_dds_tx1_tone2_phase(double* param, char param_no); 175 | 176 | /* Sets the DDS TX1 Tone 2 phase [degrees]. */ 177 | void set_dds_tx1_tone2_phase(double* param, char param_no); 178 | 179 | /* Gets current DDS TX1 Tone 1 scale. */ 180 | void get_dds_tx1_tone1_scale(double* param, char param_no); 181 | 182 | /* Sets the DDS TX1 Tone 1 scale. */ 183 | void set_dds_tx1_tone1_scale(double* param, char param_no); 184 | 185 | /* Gets current DDS TX1 Tone 2 scale. */ 186 | void get_dds_tx1_tone2_scale(double* param, char param_no); 187 | 188 | /* Sets the DDS TX1 Tone 2 scale. */ 189 | void set_dds_tx1_tone2_scale(double* param, char param_no); 190 | 191 | /* Gets current DDS TX2 Tone 1 frequency [Hz]. */ 192 | void get_dds_tx2_tone1_freq(double* param, char param_no); 193 | 194 | /* Sets the DDS TX2 Tone 1 frequency [Hz]. */ 195 | void set_dds_tx2_tone1_freq(double* param, char param_no); 196 | 197 | /* Gets current DDS TX2 Tone 2 frequency [Hz]. */ 198 | void get_dds_tx2_tone2_freq(double* param, char param_no); 199 | 200 | /* Sets the DDS TX2 Tone 2 frequency [Hz]. */ 201 | void set_dds_tx2_tone2_freq(double* param, char param_no); 202 | 203 | /* Gets current DDS TX2 Tone 1 phase [degrees]. */ 204 | void get_dds_tx2_tone1_phase(double* param, char param_no); 205 | 206 | /* Sets the DDS TX2 Tone 1 phase [degrees]. */ 207 | void set_dds_tx2_tone1_phase(double* param, char param_no); 208 | 209 | /* Gets current DDS TX2 Tone 2 phase [degrees]. */ 210 | void get_dds_tx2_tone2_phase(double* param, char param_no); 211 | 212 | /* Sets the DDS TX2 Tone 2 phase [degrees]. */ 213 | void set_dds_tx2_tone2_phase(double* param, char param_no); 214 | 215 | /* Gets current DDS TX2 Tone 1 scale. */ 216 | void get_dds_tx2_tone1_scale(double* param, char param_no); 217 | 218 | /* Sets the DDS TX2 Tone 1 scale. */ 219 | void set_dds_tx2_tone1_scale(double* param, char param_no); 220 | 221 | /* Gets current DDS TX2 Tone 2 scale. */ 222 | void dds_tx2_tone2_scale(double* param, char param_no); 223 | 224 | /* Sets the DDS TX2 Tone 2 scale. */ 225 | void set_dds_tx2_tone2_scale(double* param, char param_no); 226 | 227 | #endif // __COMMAND_H__ 228 | -------------------------------------------------------------------------------- /websdr/mipmap_reader.H: -------------------------------------------------------------------------------- 1 | #include "common.H" 2 | 3 | // the data returned by the mipmap hardware is a depth first listing of the 4 | // chunk tree. we need to calculate the chunk number (index into the array) given 5 | // the level in the tree (0 being leaf level) and the index among that level. 6 | 7 | // mipmapChunkFinder calculates the absolute chunk array index given 8 | // the mipmap level and the logical chunk index (offset) within that level. 9 | // usage: 10 | // 1. fill out levelSteps with the compression factor of each mipmap level of the hardware 11 | // 2. call init() 12 | // 3. use goToChunk() and/or advanceChunk() as needed, which both set currIndex to the 13 | // absolute chunk index of the requested chunk. 14 | // 4. repeat (3) as needed 15 | template 16 | struct mipmapChunkFinder { 17 | int levelSteps[LEVELS] = {}; 18 | int levelSizes[LEVELS] = {}; 19 | int levelIndex[LEVELS] = {}; 20 | int totalChunkCount = 0; 21 | int currLevel = 0; 22 | int currIndex = 0; 23 | 24 | void init() { 25 | // calculate the total chunk count of each level's nodes, including of its children 26 | levelSizes[0] = 1; 27 | for(int i=1; i 0) 53 | currIndex += levelSteps[level-1] * levelSizes[level-1]; 54 | } 55 | 56 | // move to the next chunk in the same level 57 | void advanceChunk() { 58 | int level = currLevel; 59 | currIndex += levelSizes[level]; 60 | if(levelIndex[level] == (levelSteps[level]-1)) { 61 | for(int i=level+1; i= totalChunkCount) 74 | currIndex -= totalChunkCount; 75 | } 76 | }; 77 | 78 | // represents a view into array data 79 | struct mipmapReaderView { 80 | // startSamples is inclusive and endSamples is exclusive 81 | int startSamples, endSamples; 82 | // number of samples of resolution 83 | int resolution; 84 | int compression() { 85 | return (endSamples - startSamples) / resolution; 86 | } 87 | }; 88 | template 89 | class mipmapReader { 90 | public: 91 | mipmapChunkFinder finder; 92 | volatile uint64_t* mipmap; 93 | int levelCompression[LEVELS]; 94 | 95 | // sample groups (samples/channels) 96 | int length; 97 | 98 | // how many sample groups are in each mipmap chunk 99 | int chunkSize = 16; 100 | 101 | // the compression factor of the "pre-stage" of the mipmap hw 102 | int baseLevelStep = 4; 103 | 104 | // whether to allow views to the original data rather than a mipmap 105 | bool allowOriginal = true; 106 | 107 | void init(int* levelSteps) { 108 | for(int i=0; i= 0 && requested.startSamples < length); 119 | assert(requested.endSamples > requested.startSamples && requested.endSamples <= length); 120 | int reqViewSpan = requested.endSamples - requested.startSamples; 121 | double compression = double(reqViewSpan) / requested.resolution; 122 | // find nearest mipmap level that is at least as detailed as requested 123 | int i = LEVELS-1; 124 | for(; i >= 0; i--) { 125 | if(levelCompression[i] <= compression) 126 | break; 127 | } 128 | if(i < 0) { 129 | if(allowOriginal) { 130 | returned = requested; 131 | returned.resolution = returned.endSamples - returned.startSamples; 132 | goto ret; 133 | } else { 134 | i = 0; 135 | } 136 | } 137 | { 138 | int c = levelCompression[i]; 139 | int roundTo = c * chunkSize; 140 | returned.startSamples = requested.startSamples/roundTo; 141 | returned.startSamples *= roundTo; 142 | returned.endSamples = (requested.endSamples + roundTo - 1)/roundTo; 143 | returned.endSamples *= roundTo; 144 | returned.resolution = (returned.endSamples - returned.startSamples) / c; 145 | } 146 | ret: 147 | assert(returned.endSamples <= length); 148 | fprintf(stderr, "requested view: %d - %d, %d points; got: %d - %d, %d points (level %d)\n", 149 | requested.startSamples, requested.endSamples, requested.resolution, 150 | returned.startSamples, returned.endSamples, returned.resolution, i); 151 | } 152 | 153 | // only supports reading mipmaps!!! if view.compression() is 1, you need to use your own 154 | // function for copying the raw data to the dst array. 155 | // dst should be an array of size view.resolution*CHANNELS*2 (each point has a lower and upper value) 156 | template 157 | void read(const mipmapReaderView& view, INTTYPE* dst, double yLower, double yUpper) { 158 | INTTYPE valMin = numeric_limits::min(); 159 | INTTYPE valMax = numeric_limits::max(); 160 | double A = (double(valMax) - double(valMin)) / (yUpper - yLower); 161 | double B = double(valMin); 162 | 163 | int viewSpan = view.endSamples - view.startSamples; 164 | int compression = viewSpan / view.resolution; 165 | int i = 0; 166 | for(; i> 32) & 0xffffffff); 183 | lower = clamp(lower, yLower, yUpper); 184 | upper = clamp(upper, yLower, yUpper); 185 | dst[(dstOffs + x) * 2] = INTTYPE(round((lower - yLower)*A + B)); 186 | dst[(dstOffs + x) * 2 + 1] = INTTYPE(round((upper - yLower)*A + B)); 187 | } 188 | dstOffs += chunkElements; 189 | if(dstOffs >= dstElements) break; 190 | finder.advanceChunk(); 191 | } 192 | } 193 | 194 | // only supports reading mipmaps!!! if view.compression() is 1, you need to use your own 195 | // function for copying the raw data to the dst array. 196 | // dst should be an array of size view.resolution*2 (each point has a lower and upper value) 197 | template 198 | void readSpectrum(const mipmapReaderView& view, INTTYPE* dst, double yLower, double yUpper) { 199 | static_assert(CHANNELS == 2); 200 | INTTYPE valMin = numeric_limits::min(); 201 | INTTYPE valMax = numeric_limits::max(); 202 | double A = (double(valMax) - double(valMin)) / (yUpper - yLower); 203 | double B = double(valMin); 204 | 205 | int viewSpan = view.endSamples - view.startSamples; 206 | int compression = viewSpan / view.resolution; 207 | int i = 0; 208 | for(; i= totalChunks) 218 | chunkIndex -= totalChunks; 219 | finder.goToChunk(i, chunkIndex); 220 | 221 | int chunkElements = chunkSize; 222 | int dstElements = view.resolution; 223 | int dstOffs = 0; 224 | while(true) { 225 | int offs = finder.currIndex * CHANNELS * chunkElements; 226 | for(int x=0; x> 32) & 0xffffffff); 231 | int32_t lowerIm = int(elementIm & 0xffffffff); 232 | int32_t upperIm = int((elementIm >> 32) & 0xffffffff); 233 | if((-lowerRe) > upperRe) upperRe = -lowerRe; 234 | if((-lowerIm) > upperIm) upperIm = -lowerIm; 235 | double tmp = spectrumValue(upperRe, upperIm); 236 | tmp = clamp(tmp, yLower, yUpper); 237 | dst[(dstOffs + x) * 2] = INTTYPE(round((tmp - yLower)*A + B)); 238 | dst[(dstOffs + x) * 2 + 1] = INTTYPE(round((tmp - yLower)*A + B)); 239 | } 240 | dstOffs += chunkElements; 241 | if(dstOffs >= dstElements) break; 242 | finder.advanceChunk(); 243 | } 244 | } 245 | }; 246 | -------------------------------------------------------------------------------- /websdr/server.C: -------------------------------------------------------------------------------- 1 | /* 2 | This program is free software: you can redistribute it and/or modify 3 | it under the terms of the GNU General Public License as published by 4 | the Free Software Foundation, either version 2 of the License, or 5 | (at your option) any later version. 6 | 7 | This program is distributed in the hope that it will be useful, 8 | but WITHOUT ANY WARRANTY; without even the implied warranty of 9 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 | GNU General Public License for more details. 11 | 12 | You should have received a copy of the GNU General Public License 13 | along with this program. If not, see . 14 | * */ 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include 20 | #include 21 | #include "hw.H" 22 | #include "hw_data_format.H" 23 | #include "mipmap_reader.H" 24 | #include "protocol.H" 25 | using namespace CP; 26 | using namespace cppsp; 27 | 28 | /* 29 | * Websocket server for websdr; all communication with hardware is done through 30 | * the API defined in hw.H. 31 | * */ 32 | 33 | Worker worker; 34 | Socket srvsock; 35 | 36 | // per-request state machine 37 | class MyHandler { 38 | public: 39 | ConnectionHandler& ch; 40 | WebSocketParser wsp; 41 | FrameWriter wsw; 42 | Timer timer; 43 | 44 | MyHandler(ConnectionHandler& ch): ch(ch) {} 45 | 46 | void handle100() { 47 | ch.response.write("XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX"); 48 | finish(true); 49 | } 50 | 51 | // handler for /points 52 | void handlePoints() { 53 | if(ws_iswebsocket(ch.request)) { 54 | // switch to websocket mode 55 | ws_init(ch, [this](int r) { 56 | if(r <= 0) { 57 | abort(); 58 | return; 59 | } 60 | wsStart(); 61 | }); 62 | } else { 63 | ch.response.status = "400 Bad Request"; 64 | ch.response.write("only websocket requests supported on this endpoint"); 65 | finish(true); 66 | } 67 | } 68 | static constexpr int displays = 2; 69 | mipmapReader<4, 2> mReader; 70 | 71 | // the client x view extents 72 | array mView; 73 | 74 | // the client y view extents 75 | array, displays> yRange; 76 | 77 | // if the client waveform display is paused, the chunk is pinned in memory 78 | hw_streamViewChunk reservedChunk; 79 | 80 | void wsStart() { 81 | mipmapReaderView mViewReq = {0, 131072, 1024}; 82 | mReader.length = hw_streamViews.at(0).length; 83 | mReader.init(hw_mipmapSteps); 84 | for(int d=0; d(buf), get<1>(buf), [this](int r) { 111 | if(r <= 0) { 112 | wsEnd(); 113 | return; 114 | } 115 | wsp.endAddData(r); 116 | WebSocketParser::WSFrame f; 117 | while(wsp.process(f)) { 118 | handleFrame(f); 119 | } 120 | wsRead(); 121 | }); 122 | } 123 | void timerCB(int i) { 124 | // skip a frame if there are still data waiting to be sent 125 | if(wsw.writing) { 126 | return; 127 | } 128 | auto& sv = hw_streamViews[0]; 129 | volatile void* original; 130 | hw_streamViewChunk chunk; 131 | if(reservedChunk) { 132 | chunk = reservedChunk; 133 | } else { 134 | auto chunks = sv.snapshot(); 135 | chunk = chunks.back(); 136 | } 137 | for(int d=0; dmView[d]; 143 | bool useOriginal = (mView.compression() == 1); 144 | double yLower = get<0>(yRange.at(d)); 145 | double yUpper = get<1>(yRange.at(d)); 146 | int sampleGroups = mView.resolution; 147 | int channels = isSpectrum ? 1 : 2; 148 | int wordBytes = 1; 149 | int bytes = useOriginal ? (sampleGroups*channels*wordBytes) : (sampleGroups*channels*wordBytes*2); 150 | 151 | int headerBytes = sizeof(sdr5proto::dataChunkHeader); 152 | uint8_t* s = wsw.beginAppend(headerBytes + bytes); 153 | auto* header = (sdr5proto::dataChunkHeader*) s; 154 | 155 | header->waveSizeSamples = mReader.length; 156 | header->startSamples = mView.startSamples; 157 | header->compressionFactor = mView.compression(); 158 | header->yLower = yLower; 159 | header->yUpper = yUpper; 160 | header->displayIndex = d; 161 | header->flags = 0; 162 | if(!useOriginal) 163 | header->flags |= sdr5proto::dataChunkHeader::FLAG_IS_MIPMAP; 164 | if(isSpectrum) 165 | header->flags |= sdr5proto::dataChunkHeader::FLAG_IS_SPECTRUM; 166 | 167 | 168 | //memcpy(s + headerBytes, (void*)subBuffer, bytes); 169 | uint8_t* dst = (uint8_t*) (s + headerBytes); 170 | if(useOriginal) { 171 | if(isSpectrum) 172 | copySpectrum(chunk.spectrum, dst, mView.startSamples, mView.endSamples, yLower, yUpper); 173 | else copyOriginal(original, dst, mView.startSamples, mView.endSamples, yLower, yUpper, sv.halfWidth); 174 | } else { 175 | if(isSpectrum) 176 | mReader.readSpectrum(mView, dst, yLower, yUpper); 177 | else mReader.read(mView, dst, yLower, yUpper); 178 | } 179 | 180 | //write(3, s.data(), 1024); 181 | wsw.endAppend(2); // opcode=2 182 | } 183 | wsw.flush(); 184 | } 185 | 186 | void handleFrame(WebSocketParser::WSFrame f) { 187 | auto buf = wsw.beginAppend(f.data.length()); 188 | memcpy(buf, f.data.data(), f.data.length()); 189 | wsw.endAppend(f.opcode); 190 | wsw.flush(); 191 | 192 | if(f.opcode == 1) { 193 | auto s = f.data; 194 | // TODO: "stop" should be restricted to privileged clients because 195 | // it pins a buffer in memory. 196 | if(s == "start") { 197 | if(reservedChunk) hw_freeChunk(reservedChunk); 198 | return; 199 | } 200 | if(s == "stop") { 201 | if(reservedChunk) hw_freeChunk(reservedChunk); 202 | auto tmp = hw_reserveChunk(hw_streamViews[0]); 203 | if(tmp) reservedChunk = tmp; 204 | return; 205 | } 206 | int i1 = s.find(' '); 207 | if(i1 == s.npos) return; 208 | int i2 = s.find(' ', i1 + 1); 209 | if(i2 == s.npos) return; 210 | int i3 = s.find(' ', i2 + 1); 211 | if(i3 == s.npos) return; 212 | int i4 = s.find(' ', i3 + 1); 213 | if(i4 == s.npos) return; 214 | int i5 = s.find(' ', i4 + 1); 215 | if(i5 == s.npos) return; 216 | if(s.substr(0, i1) == "setview") { 217 | int d = stoi(string(s.substr(i1 + 1, i2 - i1 - 1))); 218 | if(d < 0 || d >= displays) return; 219 | double start = stod(string(s.substr(i2 + 1, i3 - i2 - 1))); 220 | double end = stod(string(s.substr(i3 + 1, i4 - i3 - 1))); 221 | double lower = stod(string(s.substr(i4 + 1, i5 - i4 - 1))); 222 | double upper = stod(string(s.substr(i5 + 1))); 223 | start *= mReader.length; 224 | end *= mReader.length; 225 | 226 | // set x extents 227 | if(start < 0) start = 0; 228 | if(start > mReader.length - 128) start = mReader.length - 128; 229 | if(end < start + 64) end = start + 64; 230 | if(end > mReader.length) end = mReader.length; 231 | mipmapReaderView mViewReq = {int(start), int(end), 1024}; 232 | mReader.requestView(mViewReq, mView.at(d)); 233 | 234 | // set y extents 235 | yRange.at(d) = {(float) lower, (float) upper}; 236 | } 237 | } 238 | } 239 | void wsEnd() { 240 | worker.epoll.remove(timer); 241 | abort(); 242 | } 243 | ~MyHandler() { 244 | if(reservedChunk) hw_freeChunk(reservedChunk); 245 | } 246 | void finish(bool flush) { 247 | this->~MyHandler(); 248 | ch.finish(flush); 249 | } 250 | void abort() { 251 | this->~MyHandler(); 252 | ch.abort(); 253 | } 254 | }; 255 | 256 | // given a type and a member function, create a handler that 257 | // will instantiate the type and call the member function. 258 | template 259 | HandleRequestCB createMyHandler() { 260 | return [](ConnectionHandler& ch) { 261 | auto* tmp = ch.allocateHandlerState(ch); 262 | (tmp->*FUNC)(); 263 | }; 264 | } 265 | 266 | bool ends_with(string_view a, string_view b) { 267 | if(b.length() > a.length()) return false; 268 | return a.substr(a.length() - b.length()) == b; 269 | } 270 | void runWorker() { 271 | StaticFileManager sfm("."); 272 | 273 | // request router; given a http path return a HandleRequestCB 274 | auto router = [&](string_view host, string_view path) { 275 | string tmp(path); 276 | //printf("%s\n", tmp.c_str()); 277 | if(path.compare("/points") == 0) 278 | return createMyHandler(); 279 | if(path.compare("/100") == 0) 280 | return createMyHandler(); 281 | 282 | // serve html and js files from disk 283 | if(ends_with(path, ".html") || ends_with(path, ".js")) 284 | return sfm.createHandler(path); 285 | 286 | // unhandled paths 287 | HandleRequestCB h = [](ConnectionHandler& ch) { 288 | ch.response.status = "418 I'm a teapot"; 289 | ch.response.write("418"); 290 | ch.finish(); 291 | }; 292 | return h; 293 | }; 294 | 295 | worker.router = router; 296 | worker.addListenSocket(srvsock); 297 | 298 | Timer timer((uint64_t) 1000); 299 | timer.setCallback([&](int r) { 300 | worker.timerCB(); 301 | sfm.timerCB(); 302 | }); 303 | worker.epoll.add(timer); 304 | worker.loop(); 305 | } 306 | 307 | void* thread1(void*) { 308 | hw_doLoop(); 309 | return NULL; 310 | } 311 | int main(int argc, char** argv) { 312 | if(argc<3) { 313 | printf("usage: %s bind_host bind_port\n", argv[0]); 314 | return 1; 315 | } 316 | hw_init(); 317 | pthread_t pth; 318 | assert(pthread_create(&pth, nullptr, &thread1, nullptr) == 0); 319 | 320 | srvsock.bind(argv[1], argv[2]); 321 | srvsock.listen(); 322 | 323 | runWorker(); 324 | } 325 | --------------------------------------------------------------------------------