├── hdl
    ├── auto_project.ipf
    ├── Nu6510.gise
    ├── Nu6510.ucf
    ├── Nu6510.v
    ├── iseconfig
    │   └── Nu6510.projectmgr
    └── Nu6510.xise
├── README.md
├── .gitignore
├── LICENSE_CC_BY_SA_4.0.txt
└── pcb
    └── Nu6510.brd


/hdl/auto_project.ipf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/go4retro/Nu6510/HEAD/hdl/auto_project.ipf


--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
 1 | # 6510/8500 to 6502 Adapter Schematic and Printed Circuit Board
 2 | This PCB will allow a 65(c)02 CPU to emulate a CSG/MOS 6510/8500 CPU.
 3 | 
 4 | ## Theory
 5 | The 6502 address, data, and r/w lines are fed through the CPLD so they can be optionally tri-stated, and the on-board PIO port lines 0-5 are emulated.
 6 | 
 7 | ## License
 8 | Copyright (C) 2019  Jim Brain, RETRO Innovations
 9 | 
10 | These files are free designs; you can redistribute them and/or modify
11 | them under the terms of the Creative Commons Attribution-ShareAlike 
12 | 4.0 International License.
13 | 
14 | You should have received a copy of the license along with this
15 | work. If not, see <http://creativecommons.org/licenses/by-sa/4.0/>.
16 | 
17 | These files are distributed in the hope that they will be useful,
18 | but WITHOUT ANY WARRANTY; without even the implied warranty of
19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20 | license for more details.
21 | 
22 | 
23 | 


--------------------------------------------------------------------------------
/hdl/Nu6510.gise:
--------------------------------------------------------------------------------
 1 | <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
 2 | <generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
 3 | 
 4 |   <!--                                                          -->
 5 | 
 6 |   <!--             For tool use only. Do not edit.              -->
 7 | 
 8 |   <!--                                                          -->
 9 | 
10 |   <!-- ProjectNavigator created generated project file.         -->
11 | 
12 |   <!-- For use in tracking generated file and other information -->
13 | 
14 |   <!-- allowing preservation of process status.                 -->
15 | 
16 |   <!--                                                          -->
17 | 
18 |   <!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved. -->
19 | 
20 |   <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
21 | 
22 |   <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="Nu6510.xise"/>
23 | 
24 |   <files xmlns="http://www.xilinx.com/XMLSchema"/>
25 | 
26 |   <transforms xmlns="http://www.xilinx.com/XMLSchema"/>
27 | 
28 | </generated_project>
29 | 


--------------------------------------------------------------------------------
/hdl/Nu6510.ucf:
--------------------------------------------------------------------------------
 1 | #NET "_rdy"  LOC = "P28"  ;
 2 | #PACE: Start of Constraints generated by PACE
 3 | 
 4 | #PACE: Start of PACE I/O Pin Assignments
 5 | NET "_reset"  LOC = "P99"  ; 
 6 | NET "address_6502<0>"  LOC = "P20"  ; 
 7 | NET "address_6502<10>"  LOC = "P56"  ; 
 8 | NET "address_6502<11>"  LOC = "P59"  ; 
 9 | NET "address_6502<12>"  LOC = "P71"  ; 
10 | NET "address_6502<13>"  LOC = "P74"  ; 
11 | NET "address_6502<14>"  LOC = "P77"  ; 
12 | NET "address_6502<15>"  LOC = "P79"  ; 
13 | NET "address_6502<1>"  LOC = "P17"  ; 
14 | NET "address_6502<2>"  LOC = "P15"  ; 
15 | NET "address_6502<3>"  LOC = "P33"  ; 
16 | NET "address_6502<4>"  LOC = "P36"  ; 
17 | NET "address_6502<5>"  LOC = "P39"  ; 
18 | NET "address_6502<6>"  LOC = "P41"  ; 
19 | NET "address_6502<7>"  LOC = "P49"  ; 
20 | NET "address_6502<8>"  LOC = "P52"  ; 
21 | NET "address_6502<9>"  LOC = "P54"  ; 
22 | NET "address_6510<0>"  LOC = "P23"  ; 
23 | NET "address_6510<10>"  LOC = "P53"  ; 
24 | NET "address_6510<11>"  LOC = "P55"  ; 
25 | NET "address_6510<12>"  LOC = "P58"  ; 
26 | NET "address_6510<13>"  LOC = "P60"  ; 
27 | NET "address_6510<14>"  LOC = "P72"  ; 
28 | NET "address_6510<15>"  LOC = "P76"  ; 
29 | NET "address_6510<1>"  LOC = "P22"  ; 
30 | NET "address_6510<2>"  LOC = "P18"  ; 
31 | NET "address_6510<3>"  LOC = "P16"  ; 
32 | NET "address_6510<4>"  LOC = "P14"  ; 
33 | NET "address_6510<5>"  LOC = "P35"  ; 
34 | NET "address_6510<6>"  LOC = "P37"  ; 
35 | NET "address_6510<7>"  LOC = "P40"  ; 
36 | NET "address_6510<8>"  LOC = "P42"  ; 
37 | NET "address_6510<9>"  LOC = "P50"  ; 
38 | NET "aec"  LOC = "P25"  ; 
39 | NET "clock"  LOC = "P27"  ; 
40 | NET "data_6502<0>"  LOC = "P8"  ; 
41 | NET "data_6502<1>"  LOC = "P10"  ; 
42 | NET "data_6502<2>"  LOC = "P12"  ; 
43 | NET "data_6502<3>"  LOC = "P93"  ; 
44 | NET "data_6502<4>"  LOC = "P91"  ; 
45 | NET "data_6502<5>"  LOC = "P89"  ; 
46 | NET "data_6502<6>"  LOC = "P86"  ; 
47 | NET "data_6502<7>"  LOC = "P82"  ; 
48 | NET "data_6510<0>"  LOC = "P95"  ; 
49 | NET "data_6510<1>"  LOC = "P94"  ; 
50 | NET "data_6510<2>"  LOC = "P1"  ; 
51 | NET "data_6510<3>"  LOC = "P3"  ; 
52 | NET "data_6510<4>"  LOC = "P6"  ; 
53 | NET "data_6510<5>"  LOC = "P9"  ; 
54 | NET "data_6510<6>"  LOC = "P11"  ; 
55 | NET "data_6510<7>"  LOC = "P13"  ; 
56 | NET "pio<0>"  LOC = "P92"  ; 
57 | NET "pio<1>"  LOC = "P90"  ; 
58 | NET "pio<2>"  LOC = "P87"  ; 
59 | NET "pio<3>"  LOC = "P85"  ; 
60 | NET "pio<4>"  LOC = "P81"  ; 
61 | NET "pio<5>"  LOC = "P78"  ; 
62 | NET "r_w_6502"  LOC = "P4"  ;
63 | NET "r_w_6510"  LOC = "P96"  ;
64 | 
65 | #PACE: Start of PACE Area Constraints
66 | 
67 | #PACE: Start of PACE Prohibit Constraints
68 | 
69 | #PACE: End of Constraints generated by PACE
70 | 


--------------------------------------------------------------------------------
/.gitignore:
--------------------------------------------------------------------------------
  1 | #################
  2 | ## Eclipse
  3 | #################
  4 | 
  5 | *.pydevproject
  6 | .project
  7 | .metadata
  8 | bin/
  9 | tmp/
 10 | *.tmp
 11 | *.bak
 12 | *.swp
 13 | *~.nib
 14 | local.properties
 15 | .classpath
 16 | .settings/
 17 | .loadpath
 18 | 
 19 | # External tool builders
 20 | .externalToolBuilders/
 21 | 
 22 | # Locally stored "Eclipse launch configurations"
 23 | *.launch
 24 | 
 25 | # CDT-specific
 26 | .cproject
 27 | 
 28 | # PDT-specific
 29 | .buildpath
 30 | 
 31 | 
 32 | #################
 33 | ## Visual Studio
 34 | #################
 35 | 
 36 | ## Ignore Visual Studio temporary files, build results, and
 37 | ## files generated by popular Visual Studio add-ons.
 38 | 
 39 | # User-specific files
 40 | *.suo
 41 | *.user
 42 | *.sln.docstates
 43 | 
 44 | # Build results
 45 | [Dd]ebug/
 46 | [Rr]elease/
 47 | *_i.c
 48 | *_p.c
 49 | *.ilk
 50 | *.meta
 51 | *.obj
 52 | *.pch
 53 | *.pdb
 54 | *.pgc
 55 | *.pgd
 56 | *.rsp
 57 | *.sbr
 58 | *.tlb
 59 | *.tli
 60 | *.tlh
 61 | *.tmp
 62 | *.vspscc
 63 | .builds
 64 | *.dotCover
 65 | 
 66 | ## TODO: If you have NuGet Package Restore enabled, uncomment this
 67 | #packages/
 68 | 
 69 | # Visual C++ cache files
 70 | ipch/
 71 | *.aps
 72 | *.ncb
 73 | *.opensdf
 74 | *.sdf
 75 | 
 76 | # Visual Studio profiler
 77 | *.psess
 78 | *.vsp
 79 | 
 80 | # ReSharper is a .NET coding add-in
 81 | _ReSharper*
 82 | 
 83 | # Installshield output folder
 84 | [Ee]xpress
 85 | 
 86 | # DocProject is a documentation generator add-in
 87 | DocProject/buildhelp/
 88 | DocProject/Help/*.HxT
 89 | DocProject/Help/*.HxC
 90 | DocProject/Help/*.hhc
 91 | DocProject/Help/*.hhk
 92 | DocProject/Help/*.hhp
 93 | DocProject/Help/Html2
 94 | DocProject/Help/html
 95 | 
 96 | # Click-Once directory
 97 | publish
 98 | 
 99 | # Others
100 | [Bb]in
101 | [Oo]bj
102 | sql
103 | TestResults
104 | *.Cache
105 | ClientBin
106 | stylecop.*
107 | ~$*
108 | *.dbmdl
109 | Generated_Code #added for RIA/Silverlight projects
110 | 
111 | # Backup & report files from converting an old project file to a newer
112 | # Visual Studio version. Backup files are not needed, because we have git ;-)
113 | _UpgradeReport_Files/
114 | Backup*/
115 | UpgradeLog*.XML
116 | 
117 | 
118 | 
119 | ############
120 | ## Windows
121 | ############
122 | 
123 | # Windows image file caches
124 | Thumbs.db
125 | 
126 | # Folder config file
127 | Desktop.ini
128 | 
129 | 
130 | #############
131 | ## Python
132 | #############
133 | 
134 | *.py[co]
135 | 
136 | # Packages
137 | *.egg
138 | *.egg-info
139 | dist
140 | build
141 | eggs
142 | parts
143 | bin
144 | var
145 | sdist
146 | develop-eggs
147 | .installed.cfg
148 | 
149 | # Installer logs
150 | pip-log.txt
151 | 
152 | # Unit test / coverage reports
153 | .coverage
154 | .tox
155 | 
156 | #Translations
157 | *.mo
158 | 
159 | #Mr Developer
160 | .mr.developer.cfg
161 | 
162 | # Mac crap
163 | .DS_Store
164 | 
165 | #SVN
166 | .svn
167 | 
168 | #Project Stuff
169 | .dep
170 | obj-*
171 | *.xmsgs
172 | /hdl/*.err
173 | /pcb/*.lck
174 | /hdl/iseconfig/*.filter
175 | *.tim
176 | *.tspec
177 | archive
178 | *.err
179 | _xmsgs
180 | 


--------------------------------------------------------------------------------
/hdl/Nu6510.v:
--------------------------------------------------------------------------------
  1 | `timescale 1ns / 1ps
  2 | //////////////////////////////////////////////////////////////////////////////////
  3 | // Company: 
  4 | // Engineer: 
  5 | // 
  6 | // Create Date:    11:25:29 06/17/2018 
  7 | // Design Name: 
  8 | // Module Name:    Fake6510 
  9 | // Project Name: 
 10 | // Target Devices: 
 11 | // Tool versions: 
 12 | // Description: 
 13 | //
 14 | // Dependencies: 
 15 | //
 16 | // Revision: 
 17 | // Revision 0.01 - File Created
 18 | // Additional Comments: 
 19 | //
 20 | //////////////////////////////////////////////////////////////////////////////////
 21 | module Nu6510(input _reset,
 22 |               input clock,
 23 |               input r_w_6502,
 24 |               output r_w_6510,
 25 |               input [15:0]address_6502,
 26 |               output [15:0]address_6510,
 27 |               inout [7:0]data_6502,
 28 |               inout [7:0]data_6510,
 29 |               input aec,
 30 |               //input _rdy,
 31 |               inout [5:0]pio
 32 |              );
 33 | wire ce_pio;
 34 | wire ce_0000;
 35 | wire ce_0001;
 36 | reg [7:0]data_pio;
 37 | reg [7:0]ddr_pio;
 38 | wire [7:0]pio_out;
 39 | reg [7:0]data_6502_out;
 40 | reg [7:0]data_6510_out;
 41 | 
 42 | assign ce_pio =            (address_6502[15:1] == 0);
 43 | assign ce_0000 =           ce_pio & !address_6502[0];
 44 | assign ce_0001 =           ce_pio & address_6502[0];
 45 | 
 46 | assign address_6510 =      (aec & clock ? address_6502 : 16'bz);
 47 | assign r_w_6510 =          (aec & clock ? r_w_6502 : 'bz);
 48 | assign data_6502 =         data_6502_out;
 49 | assign data_6510 =         data_6510_out;
 50 | assign pio =               pio_out[5:0];
 51 | 
 52 | assign pio_out[7] =        (ddr_pio[7] ? data_pio[7] : 'bz);
 53 | assign pio_out[6] =        (ddr_pio[6] ? data_pio[6] : 'bz);
 54 | assign pio_out[5] =        (ddr_pio[5] ? data_pio[5] : 'bz);
 55 | assign pio_out[4] =        (ddr_pio[4] ? data_pio[4] : 'bz);
 56 | assign pio_out[3] =        (ddr_pio[3] ? data_pio[3] : 'bz);
 57 | assign pio_out[2] =        (ddr_pio[2] ? data_pio[2] : 'bz);
 58 | assign pio_out[1] =        (ddr_pio[1] ? data_pio[1] : 'bz);
 59 | assign pio_out[0] =        (ddr_pio[0] ? data_pio[0] : 'bz);
 60 | 
 61 | always @(*)
 62 | begin
 63 |    if(aec & !ce_pio & clock & !r_w_6502) // write cycle
 64 |    begin
 65 |       data_6510_out = data_6502;
 66 |       data_6502_out = 8'bz;
 67 |    end
 68 |    else if (aec & ce_pio & clock & !r_w_6502) // emulate no data on PIO write
 69 |    begin
 70 |       data_6510_out = 8'bz;
 71 |       data_6502_out = 8'bz;
 72 |    end
 73 |    else if (aec & ce_0000 & clock & r_w_6502) // read PIO
 74 |    begin
 75 |       data_6510_out = 8'bz;
 76 |       data_6502_out = pio_out;
 77 |    end
 78 |    else if (aec & ce_0001 & clock & r_w_6502) // read ddr
 79 |    begin
 80 |       data_6510_out = 8'bz;
 81 |       data_6502_out = ddr_pio;
 82 |    end
 83 |    else
 84 |    begin
 85 |       data_6510_out = 8'bz;
 86 |       data_6502_out = data_6510;
 87 |    end
 88 | end
 89 | 
 90 | always @(negedge clock, negedge _reset)
 91 | begin
 92 |    if(!_reset)
 93 |    begin
 94 |       ddr_pio <= 0;
 95 |       data_pio <= 0;
 96 |    end
 97 |    else if(!r_w_6502 & ce_0000)
 98 |    begin
 99 |       ddr_pio <= data_6502;
100 |    end
101 |    else if(!r_w_6502 & ce_0001)
102 |    begin
103 |       data_pio <= data_6502;
104 |    end
105 | end
106 | 
107 | endmodule
108 | 


--------------------------------------------------------------------------------
/hdl/iseconfig/Nu6510.projectmgr:
--------------------------------------------------------------------------------
 1 | <?xml version='1.0' encoding='utf-8'?>
 2 | <!--This is an ISE project configuration file.-->
 3 | <!--It holds project specific layout data for the projectmgr plugin.-->
 4 | <!--Copyright (c) 1995-2009 Xilinx, Inc.  All rights reserved.-->
 5 | <Project version="2" owner="projectmgr" name="Nu6510" >
 6 |    <!--This is an ISE project configuration file.-->
 7 |    <ItemView engineview="SynthesisOnly" guiview="Source" compilemode="AutoCompile" >
 8 |       <ClosedNodes>
 9 |          <ClosedNodesVersion>2</ClosedNodesVersion>
10 |          <ClosedNode>/Nu6510 C:|Users|brain|projects|Nu6510|hdl|Nu6510.v</ClosedNode>
11 |       </ClosedNodes>
12 |       <SelectedItems>
13 |          <SelectedItem>Nu6510 (C:/Users/brain/projects/Nu6510/hdl/Nu6510.v)</SelectedItem>
14 |       </SelectedItems>
15 |       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
16 |       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
17 |       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000000b8000000020000000000000000000000000200000064ffffffff000000810000000300000002000000b80000000100000003000000000000000100000003</ViewHeaderState>
18 |       <UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
19 |       <CurrentItem>Nu6510 (C:/Users/brain/projects/Nu6510/hdl/Nu6510.v)</CurrentItem>
20 |    </ItemView>
21 |    <ItemView engineview="SynthesisOnly" sourcetype="" guiview="Process" >
22 |       <ClosedNodes>
23 |          <ClosedNodesVersion>1</ClosedNodesVersion>
24 |          <ClosedNode>Design Utilities</ClosedNode>
25 |       </ClosedNodes>
26 |       <SelectedItems>
27 |          <SelectedItem/>
28 |       </SelectedItems>
29 |       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
30 |       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
31 |       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000</ViewHeaderState>
32 |       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
33 |       <CurrentItem/>
34 |    </ItemView>
35 |    <ItemView guiview="File" >
36 |       <ClosedNodes>
37 |          <ClosedNodesVersion>1</ClosedNodesVersion>
38 |       </ClosedNodes>
39 |       <SelectedItems/>
40 |       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
41 |       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
42 |       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000000000000000100000000000000000000000000000000000003a3000000040101000100000000000000000000000064ffffffff000000810000000000000004000000420000000100000000000000240000000100000000000000660000000100000000000002d70000000100000000</ViewHeaderState>
43 |       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
44 |       <CurrentItem>Nu6510.ucf</CurrentItem>
45 |    </ItemView>
46 |    <ItemView guiview="Library" >
47 |       <ClosedNodes>
48 |          <ClosedNodesVersion>1</ClosedNodesVersion>
49 |          <ClosedNode>work</ClosedNode>
50 |       </ClosedNodes>
51 |       <SelectedItems/>
52 |       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
53 |       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
54 |       <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000109000000010001000100000000000000000000000064ffffffff000000810000000000000001000001090000000100000000</ViewHeaderState>
55 |       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
56 |       <CurrentItem>work</CurrentItem>
57 |    </ItemView>
58 |    <ItemView engineview="SynthesisOnly" sourcetype="DESUT_VERILOG" guiview="Process" >
59 |       <ClosedNodes>
60 |          <ClosedNodesVersion>1</ClosedNodesVersion>
61 |          <ClosedNode>Design Utilities</ClosedNode>
62 |          <ClosedNode>Implement Design/Optional Implementation Tools</ClosedNode>
63 |          <ClosedNode>Implement Design/Synthesize - XST</ClosedNode>
64 |       </ClosedNodes>
65 |       <SelectedItems>
66 |          <SelectedItem>Manage Configuration Project (iMPACT)</SelectedItem>
67 |       </SelectedItems>
68 |       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
69 |       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
70 |       <ViewHeaderState orientation="horizontal" >000000ff0000000000000001000000010000000000000000000000000000000000000000000000012e000000010000000100000000000000000000000064ffffffff0000008100000000000000010000012e0000000100000000</ViewHeaderState>
71 |       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
72 |       <CurrentItem>Manage Configuration Project (iMPACT)</CurrentItem>
73 |    </ItemView>
74 |    <ItemView engineview="SynthesisOnly" sourcetype="DESUT_UCF" guiview="Process" >
75 |       <ClosedNodes>
76 |          <ClosedNodesVersion>1</ClosedNodesVersion>
77 |          <ClosedNode>User Constraints</ClosedNode>
78 |       </ClosedNodes>
79 |       <SelectedItems>
80 |          <SelectedItem/>
81 |       </SelectedItems>
82 |       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
83 |       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
84 |       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000</ViewHeaderState>
85 |       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
86 |       <CurrentItem/>
87 |    </ItemView>
88 |    <SourceProcessView>000000ff00000000000000020000011b0000011b01000000050100000002</SourceProcessView>
89 |    <CurrentView>Implementation</CurrentView>
90 | </Project>
91 | 


--------------------------------------------------------------------------------
/LICENSE_CC_BY_SA_4.0.txt:
--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
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107 |     <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
108 |     <property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
109 |     <property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
110 |     <property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
111 |     <property xil_pn:name="Other Compiler Options Map" xil_pn:value="" xil_pn:valueState="default"/>
112 |     <property xil_pn:name="Other Compiler Options Par" xil_pn:value="" xil_pn:valueState="default"/>
113 |     <property xil_pn:name="Other Compiler Options Translate" xil_pn:value="" xil_pn:valueState="default"/>
114 |     <property xil_pn:name="Other Compxlib Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
115 |     <property xil_pn:name="Other NETGEN Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
116 |     <property xil_pn:name="Other Ngdbuild Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
117 |     <property xil_pn:name="Other Programming Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
118 |     <property xil_pn:name="Other Simulator Commands Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
119 |     <property xil_pn:name="Other Simulator Commands Fit" xil_pn:value="" xil_pn:valueState="default"/>
120 |     <property xil_pn:name="Other Timing Report Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
121 |     <property xil_pn:name="Other XPWR Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
122 |     <property xil_pn:name="Other XST Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
123 |     <property xil_pn:name="Output Extended Identifiers" xil_pn:value="false" xil_pn:valueState="default"/>
124 |     <property xil_pn:name="Output File Name" xil_pn:value="Nu6510" xil_pn:valueState="default"/>
125 |     <property xil_pn:name="Output Slew Rate" xil_pn:value="Fast" xil_pn:valueState="default"/>
126 |     <property xil_pn:name="Overwrite Compiled Libraries" xil_pn:value="false" xil_pn:valueState="default"/>
127 |     <property xil_pn:name="Package" xil_pn:value="TQ100" xil_pn:valueState="non-default"/>
128 |     <property xil_pn:name="Port to be used" xil_pn:value="Auto - default" xil_pn:valueState="default"/>
129 |     <property xil_pn:name="Post Map Simulation Model Name" xil_pn:value="Nu6510_map.v" xil_pn:valueState="default"/>
130 |     <property xil_pn:name="Post Place &amp; Route Simulation Model Name" xil_pn:value="Nu6510_timesim.v" xil_pn:valueState="default"/>
131 |     <property xil_pn:name="Post Synthesis Simulation Model Name" xil_pn:value="Nu6510_synthesis.v" xil_pn:valueState="default"/>
132 |     <property xil_pn:name="Post Translate Simulation Model Name" xil_pn:value="Nu6510_translate.v" xil_pn:valueState="default"/>
133 |     <property xil_pn:name="Preferred Language" xil_pn:value="Verilog" xil_pn:valueState="default"/>
134 |     <property xil_pn:name="Preserve Unused Inputs" xil_pn:value="false" xil_pn:valueState="default"/>
135 |     <property xil_pn:name="Produce Verbose Report" xil_pn:value="false" xil_pn:valueState="default"/>
136 |     <property xil_pn:name="Project Description" xil_pn:value="" xil_pn:valueState="default"/>
137 |     <property xil_pn:name="Property Specification in Project File" xil_pn:value="Store all values" xil_pn:valueState="default"/>
138 |     <property xil_pn:name="Regenerate Core" xil_pn:value="Under Current Project Setting" xil_pn:valueState="default"/>
139 |     <property xil_pn:name="Rename Design Instance in Testbench File to" xil_pn:value="UUT" xil_pn:valueState="default"/>
140 |     <property xil_pn:name="Rename Top Level Architecture To" xil_pn:value="Structure" xil_pn:valueState="default"/>
141 |     <property xil_pn:name="Rename Top Level Entity to" xil_pn:value="" xil_pn:valueState="default"/>
142 |     <property xil_pn:name="Rename Top Level Module To" xil_pn:value="" xil_pn:valueState="default"/>
143 |     <property xil_pn:name="Reset On Configuration Pulse Width" xil_pn:value="100" xil_pn:valueState="default"/>
144 |     <property xil_pn:name="Resource Sharing" xil_pn:value="true" xil_pn:valueState="default"/>
145 |     <property xil_pn:name="Retain Hierarchy" xil_pn:value="true" xil_pn:valueState="default"/>
146 |     <property xil_pn:name="Run for Specified Time" xil_pn:value="true" xil_pn:valueState="default"/>
147 |     <property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
148 |     <property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
149 |     <property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
150 |     <property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
151 |     <property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
152 |     <property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
153 |     <property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
154 |     <property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
155 |     <property xil_pn:name="Selected Simulation Source Node" xil_pn:value="UUT" xil_pn:valueState="default"/>
156 |     <property xil_pn:name="Show All Models" xil_pn:value="false" xil_pn:valueState="default"/>
157 |     <property xil_pn:name="Signature /User Code" xil_pn:value="" xil_pn:valueState="default"/>
158 |     <property xil_pn:name="Simulation Model Target" xil_pn:value="Verilog" xil_pn:valueState="default"/>
159 |     <property xil_pn:name="Simulation Run Time ISim" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
160 |     <property xil_pn:name="Simulation Run Time Map" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
161 |     <property xil_pn:name="Simulation Run Time Par" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
162 |     <property xil_pn:name="Simulation Run Time Translate" xil_pn:value="1000 ns" xil_pn:valueState="default"/>
163 |     <property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
164 |     <property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
165 |     <property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="Default" xil_pn:valueState="default"/>
166 |     <property xil_pn:name="Specify Top Level Instance Names Fit" xil_pn:value="Default" xil_pn:valueState="default"/>
167 |     <property xil_pn:name="Speed Grade" xil_pn:value="-10" xil_pn:valueState="non-default"/>
168 |     <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
169 |     <property xil_pn:name="Target Simulator" xil_pn:value="Please Specify" xil_pn:valueState="default"/>
170 |     <property xil_pn:name="Timing Report Format" xil_pn:value="Summary" xil_pn:valueState="default"/>
171 |     <property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
172 |     <property xil_pn:name="Tristate On Configuration Pulse Width" xil_pn:value="0" xil_pn:valueState="default"/>
173 |     <property xil_pn:name="Use 64-bit PlanAhead on 64-bit Systems" xil_pn:value="true" xil_pn:valueState="default"/>
174 |     <property xil_pn:name="Use Custom Project File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
175 |     <property xil_pn:name="Use Custom Project File Fit" xil_pn:value="false" xil_pn:valueState="default"/>
176 |     <property xil_pn:name="Use Custom Simulation Command File Behavioral" xil_pn:value="false" xil_pn:valueState="default"/>
177 |     <property xil_pn:name="Use Custom Simulation Command File Map" xil_pn:value="false" xil_pn:valueState="default"/>
178 |     <property xil_pn:name="Use Custom Simulation Command File Par" xil_pn:value="false" xil_pn:valueState="default"/>
179 |     <property xil_pn:name="Use Custom Simulation Command File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
180 |     <property xil_pn:name="Use Custom Waveform Configuration File Behav" xil_pn:value="false" xil_pn:valueState="default"/>
181 |     <property xil_pn:name="Use Custom Waveform Configuration File Fit" xil_pn:value="false" xil_pn:valueState="default"/>
182 |     <property xil_pn:name="Use Custom Waveform Configuration File Map" xil_pn:value="false" xil_pn:valueState="default"/>
183 |     <property xil_pn:name="Use Custom Waveform Configuration File Par" xil_pn:value="false" xil_pn:valueState="default"/>
184 |     <property xil_pn:name="Use Custom Waveform Configuration File Translate" xil_pn:value="false" xil_pn:valueState="default"/>
185 |     <property xil_pn:name="Use Global Clocks" xil_pn:value="true" xil_pn:valueState="default"/>
186 |     <property xil_pn:name="Use Global Output Enables" xil_pn:value="true" xil_pn:valueState="default"/>
187 |     <property xil_pn:name="Use Global Set/Reset" xil_pn:value="true" xil_pn:valueState="default"/>
188 |     <property xil_pn:name="Use Location Constraints" xil_pn:value="Always" xil_pn:valueState="default"/>
189 |     <property xil_pn:name="Use Multi-level Logic Optimization" xil_pn:value="true" xil_pn:valueState="default"/>
190 |     <property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
191 |     <property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
192 |     <property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
193 |     <property xil_pn:name="VCCIO Reference Voltage" xil_pn:value="LVTTL" xil_pn:valueState="default"/>
194 |     <property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
195 |     <property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
196 |     <property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>
197 |     <property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/>
198 |     <property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/>
199 |     <property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
200 |     <property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
201 |     <property xil_pn:name="iMPACT Project File" xil_pn:value="auto_project.ipf" xil_pn:valueState="non-default"/>
202 |     <!--                                                                                  -->
203 |     <!-- The following properties are for internal use only. These should not be modified.-->
204 |     <!--                                                                                  -->
205 |     <property xil_pn:name="PROP_BehavioralSimTop" xil_pn:value="" xil_pn:valueState="default"/>
206 |     <property xil_pn:name="PROP_DesignName" xil_pn:value="Nu6510" xil_pn:valueState="non-default"/>
207 |     <property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="xc9500xl" xil_pn:valueState="default"/>
208 |     <property xil_pn:name="PROP_FPGAConfiguration" xil_pn:value="FPGAConfiguration" xil_pn:valueState="default"/>
209 |     <property xil_pn:name="PROP_PostFitSimTop" xil_pn:value="" xil_pn:valueState="default"/>
210 |     <property xil_pn:name="PROP_PostMapSimTop" xil_pn:value="" xil_pn:valueState="default"/>
211 |     <property xil_pn:name="PROP_PostParSimTop" xil_pn:value="" xil_pn:valueState="default"/>
212 |     <property xil_pn:name="PROP_PostSynthSimTop" xil_pn:value="" xil_pn:valueState="default"/>
213 |     <property xil_pn:name="PROP_PostXlateSimTop" xil_pn:value="" xil_pn:valueState="default"/>
214 |     <property xil_pn:name="PROP_PreSynthesis" xil_pn:value="PreSynthesis" xil_pn:valueState="default"/>
215 |     <property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2018-08-19T23:23:05" xil_pn:valueState="non-default"/>
216 |     <property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="68809D17A88B491B91869B3D860C2EAC" xil_pn:valueState="non-default"/>
217 |     <property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
218 |     <property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
219 |   </properties>
220 | 
221 |   <bindings/>
222 | 
223 |   <libraries/>
224 | 
225 |   <autoManagedFiles>
226 |     <!-- The following files are identified by `include statements in verilog -->
227 |     <!-- source files and are automatically managed by Project Navigator.     -->
228 |     <!--                                                                      -->
229 |     <!-- Do not hand-edit this section, as it will be overwritten when the    -->
230 |     <!-- project is analyzed based on files automatically identified as       -->
231 |     <!-- include files.                                                       -->
232 |   </autoManagedFiles>
233 | 
234 | </project>
235 | 


--------------------------------------------------------------------------------
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 115 | <wire x1="0" y1="20.32" x2="0" y2="0.635" width="0" layer="20"/>
 116 | <wire x1="0" y1="0.635" x2="0.635" y2="0" width="0" layer="20" curve="90"/>
 117 | <wire x1="0.635" y1="0" x2="69.215" y2="0" width="0" layer="20"/>
 118 | <wire x1="69.215" y1="0" x2="69.85" y2="0.635" width="0" layer="20" curve="90"/>
 119 | <wire x1="69.85" y1="0.635" x2="69.85" y2="20.32" width="0" layer="20"/>
 120 | <wire x1="69.85" y1="20.32" x2="69.215" y2="20.955" width="0" layer="20" curve="90"/>
 121 | <wire x1="69.215" y1="20.955" x2="0.635" y2="20.955" width="0" layer="20"/>
 122 | <wire x1="0.635" y1="20.955" x2="0" y2="20.32" width="0" layer="20" curve="90"/>
 123 | </plain>
 124 | <libraries>
 125 | <library name="rcl">
 126 | <description>&lt;b&gt;Resistors, Capacitors, Inductors&lt;/b&gt;&lt;p&gt;
 127 | Based on the previous libraries:
 128 | &lt;ul&gt;
 129 | &lt;li&gt;r.lbr
 130 | &lt;li&gt;cap.lbr 
 131 | &lt;li&gt;cap-fe.lbr
 132 | &lt;li&gt;captant.lbr
 133 | &lt;li&gt;polcap.lbr
 134 | &lt;li&gt;ipc-smd.lbr
 135 | &lt;/ul&gt;
 136 | All SMD packages are defined according to the IPC specifications and  CECC&lt;p&gt;
 137 | &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;&lt;p&gt;
 138 | &lt;p&gt;
 139 | for Electrolyt Capacitors see also :&lt;p&gt;
 140 | www.bccomponents.com &lt;p&gt;
 141 | www.panasonic.com&lt;p&gt;
 142 | www.kemet.com&lt;p&gt;
 143 | http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf &lt;b&gt;(SANYO)&lt;/b&gt;
 144 | &lt;p&gt;
 145 | for trimmer refence see : &lt;u&gt;www.electrospec-inc.com/cross_references/trimpotcrossref.asp&lt;/u&gt;&lt;p&gt;
 146 | 
 147 | &lt;table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0&gt;
 148 | &lt;tr valign="top"&gt;
 149 | 
 150 | &lt;! &lt;td width="10"&gt;&amp;nbsp;&lt;/td&gt;
 151 | &lt;td width="90%"&gt;
 152 | 
 153 | &lt;b&gt;&lt;font color="#0000FF" size="4"&gt;TRIM-POT CROSS REFERENCE&lt;/font&gt;&lt;/b&gt;
 154 | &lt;P&gt;
 155 | &lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2&gt;
 156 |   &lt;TR&gt;
 157 |     &lt;TD COLSPAN=8&gt;
 158 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;RECTANGULAR MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
 159 |     &lt;/TD&gt;
 160 |   &lt;/TR&gt;
 161 |   &lt;TR&gt;
 162 |     &lt;TD ALIGN=CENTER&gt;
 163 |       &lt;B&gt;
 164 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BOURNS&lt;/FONT&gt;
 165 |       &lt;/B&gt;
 166 |     &lt;/TD&gt;
 167 |     &lt;TD ALIGN=CENTER&gt;
 168 |       &lt;B&gt;
 169 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;BI&amp;nbsp;TECH&lt;/FONT&gt;
 170 |       &lt;/B&gt;
 171 |     &lt;/TD&gt;
 172 |     &lt;TD ALIGN=CENTER&gt;
 173 |       &lt;B&gt;
 174 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;DALE-VISHAY&lt;/FONT&gt;
 175 |       &lt;/B&gt;
 176 |     &lt;/TD&gt;
 177 |     &lt;TD ALIGN=CENTER&gt;
 178 |       &lt;B&gt;
 179 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PHILIPS/MEPCO&lt;/FONT&gt;
 180 |       &lt;/B&gt;
 181 |     &lt;/TD&gt;
 182 |     &lt;TD ALIGN=CENTER&gt;
 183 |       &lt;B&gt;
 184 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MURATA&lt;/FONT&gt;
 185 |       &lt;/B&gt;
 186 |     &lt;/TD&gt;
 187 |     &lt;TD ALIGN=CENTER&gt;
 188 |       &lt;B&gt;
 189 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;PANASONIC&lt;/FONT&gt;
 190 |       &lt;/B&gt;
 191 |     &lt;/TD&gt;
 192 |     &lt;TD ALIGN=CENTER&gt;
 193 |       &lt;B&gt;
 194 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;SPECTROL&lt;/FONT&gt;
 195 |       &lt;/B&gt;
 196 |     &lt;/TD&gt;
 197 |     &lt;TD ALIGN=CENTER&gt;
 198 |       &lt;B&gt;
 199 |       &lt;FONT SIZE=3 FACE=ARIAL color="#FF0000"&gt;MILSPEC&lt;/FONT&gt;
 200 |       &lt;/B&gt;
 201 |     &lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;
 202 |   &lt;/TR&gt;
 203 |   &lt;TR&gt;
 204 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3 &gt;
 205 |       3005P&lt;BR&gt;
 206 |       3006P&lt;BR&gt;
 207 |       3006W&lt;BR&gt;
 208 |       3006Y&lt;BR&gt;
 209 |       3009P&lt;BR&gt;
 210 |       3009W&lt;BR&gt;
 211 |       3009Y&lt;BR&gt;
 212 |       3057J&lt;BR&gt;
 213 |       3057L&lt;BR&gt;
 214 |       3057P&lt;BR&gt;
 215 |       3057Y&lt;BR&gt;
 216 |       3059J&lt;BR&gt;
 217 |       3059L&lt;BR&gt;
 218 |       3059P&lt;BR&gt;
 219 |       3059Y&lt;BR&gt;&lt;/FONT&gt;
 220 |     &lt;/TD&gt;
 221 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 222 |       -&lt;BR&gt;
 223 |       89P&lt;BR&gt;
 224 |       89W&lt;BR&gt;
 225 |       89X&lt;BR&gt;
 226 |       89PH&lt;BR&gt;
 227 |       76P&lt;BR&gt;
 228 |       89XH&lt;BR&gt;
 229 |       78SLT&lt;BR&gt;
 230 |       78L&amp;nbsp;ALT&lt;BR&gt;
 231 |       56P&amp;nbsp;ALT&lt;BR&gt;
 232 |       78P&amp;nbsp;ALT&lt;BR&gt;
 233 |       T8S&lt;BR&gt;
 234 |       78L&lt;BR&gt;
 235 |       56P&lt;BR&gt;
 236 |       78P&lt;BR&gt;&lt;/FONT&gt;
 237 |     &lt;/TD&gt;
 238 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 239 |       -&lt;BR&gt;
 240 |       T18/784&lt;BR&gt;
 241 |       783&lt;BR&gt;
 242 |       781&lt;BR&gt;
 243 |       -&lt;BR&gt;
 244 |       -&lt;BR&gt;
 245 |       -&lt;BR&gt;
 246 |       2199&lt;BR&gt;
 247 |       1697/1897&lt;BR&gt;
 248 |       1680/1880&lt;BR&gt;
 249 |       2187&lt;BR&gt;
 250 |       -&lt;BR&gt;
 251 |       -&lt;BR&gt;
 252 |       -&lt;BR&gt;
 253 |       -&lt;BR&gt;&lt;/FONT&gt;
 254 |     &lt;/TD&gt;
 255 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 256 |       -&lt;BR&gt;
 257 |       8035EKP/CT20/RJ-20P&lt;BR&gt;
 258 |       -&lt;BR&gt;
 259 |       RJ-20X&lt;BR&gt;
 260 |       -&lt;BR&gt;
 261 |       -&lt;BR&gt;
 262 |       -&lt;BR&gt;
 263 |       1211L&lt;BR&gt;
 264 |       8012EKQ&amp;nbsp;ALT&lt;BR&gt;
 265 |       8012EKR&amp;nbsp;ALT&lt;BR&gt;
 266 |       1211P&lt;BR&gt;
 267 |       8012EKJ&lt;BR&gt;
 268 |       8012EKL&lt;BR&gt;
 269 |       8012EKQ&lt;BR&gt;
 270 |       8012EKR&lt;BR&gt;&lt;/FONT&gt;
 271 |     &lt;/TD&gt;
 272 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 273 |       -&lt;BR&gt;
 274 |       2101P&lt;BR&gt;
 275 |       2101W&lt;BR&gt;
 276 |       2101Y&lt;BR&gt;
 277 |       -&lt;BR&gt;
 278 |       -&lt;BR&gt;
 279 |       -&lt;BR&gt;
 280 |       -&lt;BR&gt;
 281 |       -&lt;BR&gt;
 282 |       -&lt;BR&gt;
 283 |       -&lt;BR&gt;
 284 |       -&lt;BR&gt;
 285 |       2102L&lt;BR&gt;
 286 |       2102S&lt;BR&gt;
 287 |       2102Y&lt;BR&gt;&lt;/FONT&gt;
 288 |     &lt;/TD&gt;
 289 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 290 |       -&lt;BR&gt;
 291 |       EVMCOG&lt;BR&gt;
 292 |       -&lt;BR&gt;
 293 |       -&lt;BR&gt;
 294 |       -&lt;BR&gt;
 295 |       -&lt;BR&gt;
 296 |       -&lt;BR&gt;
 297 |       -&lt;BR&gt;
 298 |       -&lt;BR&gt;
 299 |       -&lt;BR&gt;
 300 |       -&lt;BR&gt;
 301 |       -&lt;BR&gt;
 302 |       -&lt;BR&gt;
 303 |       -&lt;BR&gt;
 304 |       -&lt;BR&gt;&lt;/FONT&gt;
 305 |     &lt;/TD&gt;
 306 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 307 |       -&lt;BR&gt;
 308 |       43P&lt;BR&gt;
 309 |       43W&lt;BR&gt;
 310 |       43Y&lt;BR&gt;
 311 |       -&lt;BR&gt;
 312 |       -&lt;BR&gt;
 313 |       -&lt;BR&gt;
 314 |       -&lt;BR&gt;
 315 |       40L&lt;BR&gt;
 316 |       40P&lt;BR&gt;
 317 |       40Y&lt;BR&gt;
 318 |       70Y-T602&lt;BR&gt;
 319 |       70L&lt;BR&gt;
 320 |       70P&lt;BR&gt;
 321 |       70Y&lt;BR&gt;&lt;/FONT&gt;
 322 |     &lt;/TD&gt;
 323 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 324 |       -&lt;BR&gt;
 325 |       -&lt;BR&gt;
 326 |       -&lt;BR&gt;
 327 |       -&lt;BR&gt;
 328 |       -&lt;BR&gt;
 329 |       -&lt;BR&gt;
 330 |       -&lt;BR&gt;
 331 |       -&lt;BR&gt;
 332 |       RT/RTR12&lt;BR&gt;
 333 |       RT/RTR12&lt;BR&gt;
 334 |       RT/RTR12&lt;BR&gt;
 335 |       -&lt;BR&gt;
 336 |       RJ/RJR12&lt;BR&gt;
 337 |       RJ/RJR12&lt;BR&gt;
 338 |       RJ/RJR12&lt;BR&gt;&lt;/FONT&gt;
 339 |     &lt;/TD&gt;
 340 |   &lt;/TR&gt;
 341 |   &lt;TR&gt;
 342 |     &lt;TD COLSPAN=8&gt;&amp;nbsp;
 343 |     &lt;/TD&gt;
 344 |   &lt;/TR&gt;
 345 |   &lt;TR&gt;
 346 |     &lt;TD COLSPAN=8&gt;
 347 |       &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SQUARE MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
 348 |     &lt;/TD&gt;
 349 |   &lt;/TR&gt;
 350 |   &lt;TR&gt;
 351 |    &lt;TD ALIGN=CENTER&gt;
 352 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;
 353 |     &lt;/TD&gt;
 354 |     &lt;TD ALIGN=CENTER&gt;
 355 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
 356 |     &lt;/TD&gt;
 357 |     &lt;TD ALIGN=CENTER&gt;
 358 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
 359 |     &lt;/TD&gt;
 360 |     &lt;TD ALIGN=CENTER&gt;
 361 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
 362 |     &lt;/TD&gt;
 363 |     &lt;TD ALIGN=CENTER&gt;
 364 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;
 365 |     &lt;/TD&gt;
 366 |     &lt;TD ALIGN=CENTER&gt;
 367 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;
 368 |     &lt;/TD&gt;
 369 |     &lt;TD ALIGN=CENTER&gt;
 370 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;
 371 |     &lt;/TD&gt;
 372 |     &lt;TD ALIGN=CENTER&gt;
 373 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;
 374 |     &lt;/TD&gt;
 375 |   &lt;/TR&gt;
 376 |   &lt;TR&gt;
 377 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 378 |       3250L&lt;BR&gt;
 379 |       3250P&lt;BR&gt;
 380 |       3250W&lt;BR&gt;
 381 |       3250X&lt;BR&gt;
 382 |       3252P&lt;BR&gt;
 383 |       3252W&lt;BR&gt;
 384 |       3252X&lt;BR&gt;
 385 |       3260P&lt;BR&gt;
 386 |       3260W&lt;BR&gt;
 387 |       3260X&lt;BR&gt;
 388 |       3262P&lt;BR&gt;
 389 |       3262W&lt;BR&gt;
 390 |       3262X&lt;BR&gt;
 391 |       3266P&lt;BR&gt;
 392 |       3266W&lt;BR&gt;
 393 |       3266X&lt;BR&gt;
 394 |       3290H&lt;BR&gt;
 395 |       3290P&lt;BR&gt;
 396 |       3290W&lt;BR&gt;
 397 |       3292P&lt;BR&gt;
 398 |       3292W&lt;BR&gt;
 399 |       3292X&lt;BR&gt;
 400 |       3296P&lt;BR&gt;
 401 |       3296W&lt;BR&gt;
 402 |       3296X&lt;BR&gt;
 403 |       3296Y&lt;BR&gt;
 404 |       3296Z&lt;BR&gt;
 405 |       3299P&lt;BR&gt;
 406 |       3299W&lt;BR&gt;
 407 |       3299X&lt;BR&gt;
 408 |       3299Y&lt;BR&gt;
 409 |       3299Z&lt;BR&gt;&lt;/FONT&gt;
 410 |     &lt;/TD&gt;
 411 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 412 |       -&lt;BR&gt;
 413 |       66P&amp;nbsp;ALT&lt;BR&gt;
 414 |       66W&amp;nbsp;ALT&lt;BR&gt;
 415 |       66X&amp;nbsp;ALT&lt;BR&gt;
 416 |       66P&amp;nbsp;ALT&lt;BR&gt;
 417 |       66W&amp;nbsp;ALT&lt;BR&gt;
 418 |       66X&amp;nbsp;ALT&lt;BR&gt;
 419 |       -&lt;BR&gt;
 420 |       64W&amp;nbsp;ALT&lt;BR&gt;
 421 |       -&lt;BR&gt;
 422 |       64P&amp;nbsp;ALT&lt;BR&gt;
 423 |       64W&amp;nbsp;ALT&lt;BR&gt;
 424 |       64X&amp;nbsp;ALT&lt;BR&gt;
 425 |       64P&lt;BR&gt;
 426 |       64W&lt;BR&gt;
 427 |       64X&lt;BR&gt;
 428 |       66X&amp;nbsp;ALT&lt;BR&gt;
 429 |       66P&amp;nbsp;ALT&lt;BR&gt;
 430 |       66W&amp;nbsp;ALT&lt;BR&gt;
 431 |       66P&lt;BR&gt;
 432 |       66W&lt;BR&gt;
 433 |       66X&lt;BR&gt;
 434 |       67P&lt;BR&gt;
 435 |       67W&lt;BR&gt;
 436 |       67X&lt;BR&gt;
 437 |       67Y&lt;BR&gt;
 438 |       67Z&lt;BR&gt;
 439 |       68P&lt;BR&gt;
 440 |       68W&lt;BR&gt;
 441 |       68X&lt;BR&gt;
 442 |       67Y&amp;nbsp;ALT&lt;BR&gt;
 443 |       67Z&amp;nbsp;ALT&lt;BR&gt;&lt;/FONT&gt;
 444 |     &lt;/TD&gt;
 445 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 446 |       5050&lt;BR&gt;
 447 |       5091&lt;BR&gt;
 448 |       5080&lt;BR&gt;
 449 |       5087&lt;BR&gt;
 450 |       -&lt;BR&gt;
 451 |       -&lt;BR&gt;
 452 |       -&lt;BR&gt;
 453 |       -&lt;BR&gt;
 454 |       -&lt;BR&gt;
 455 |       -&lt;BR&gt;
 456 |       -&lt;BR&gt;
 457 |       T63YB&lt;BR&gt;
 458 |       T63XB&lt;BR&gt;
 459 |       -&lt;BR&gt;
 460 |       -&lt;BR&gt;
 461 |       -&lt;BR&gt;
 462 |       5887&lt;BR&gt;
 463 |       5891&lt;BR&gt;
 464 |       5880&lt;BR&gt;
 465 |       -&lt;BR&gt;
 466 |       -&lt;BR&gt;
 467 |       -&lt;BR&gt;
 468 |       T93Z&lt;BR&gt;
 469 |       T93YA&lt;BR&gt;
 470 |       T93XA&lt;BR&gt;
 471 |       T93YB&lt;BR&gt;
 472 |       T93XB&lt;BR&gt;
 473 |       -&lt;BR&gt;
 474 |       -&lt;BR&gt;
 475 |       -&lt;BR&gt;
 476 |       -&lt;BR&gt;
 477 |       -&lt;BR&gt;&lt;/FONT&gt;
 478 |     &lt;/TD&gt;
 479 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 480 |       -&lt;BR&gt;
 481 |       -&lt;BR&gt;
 482 |       -&lt;BR&gt;
 483 |       -&lt;BR&gt;
 484 |       -&lt;BR&gt;
 485 |       -&lt;BR&gt;
 486 |       -&lt;BR&gt;
 487 |       -&lt;BR&gt;
 488 |       -&lt;BR&gt;
 489 |       -&lt;BR&gt;
 490 |       8026EKP&lt;BR&gt;
 491 |       8026EKW&lt;BR&gt;
 492 |       8026EKM&lt;BR&gt;
 493 |       8026EKP&lt;BR&gt;
 494 |       8026EKB&lt;BR&gt;
 495 |       8026EKM&lt;BR&gt;
 496 |       1309X&lt;BR&gt;
 497 |       1309P&lt;BR&gt;
 498 |       1309W&lt;BR&gt;
 499 |       8024EKP&lt;BR&gt;
 500 |       8024EKW&lt;BR&gt;
 501 |       8024EKN&lt;BR&gt;
 502 |       RJ-9P/CT9P&lt;BR&gt;
 503 |       RJ-9W&lt;BR&gt;
 504 |       RJ-9X&lt;BR&gt;
 505 |       -&lt;BR&gt;
 506 |       -&lt;BR&gt;
 507 |       -&lt;BR&gt;
 508 |       -&lt;BR&gt;
 509 |       -&lt;BR&gt;
 510 |       -&lt;BR&gt;
 511 |       -&lt;BR&gt;&lt;/FONT&gt;
 512 |     &lt;/TD&gt;
 513 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 514 |       -&lt;BR&gt;
 515 |       -&lt;BR&gt;
 516 |       -&lt;BR&gt;
 517 |       -&lt;BR&gt;
 518 |       -&lt;BR&gt;
 519 |       -&lt;BR&gt;
 520 |       -&lt;BR&gt;
 521 |       -&lt;BR&gt;
 522 |       -&lt;BR&gt;
 523 |       -&lt;BR&gt;
 524 |       3103P&lt;BR&gt;
 525 |       3103Y&lt;BR&gt;
 526 |       3103Z&lt;BR&gt;
 527 |       3103P&lt;BR&gt;
 528 |       3103Y&lt;BR&gt;
 529 |       3103Z&lt;BR&gt;
 530 |       -&lt;BR&gt;
 531 |       -&lt;BR&gt;
 532 |       -&lt;BR&gt;
 533 |       -&lt;BR&gt;
 534 |       -&lt;BR&gt;
 535 |       -&lt;BR&gt;
 536 |       3105P/3106P&lt;BR&gt;
 537 |       3105W/3106W&lt;BR&gt;
 538 |       3105X/3106X&lt;BR&gt;
 539 |       3105Y/3106Y&lt;BR&gt;
 540 |       3105Z/3105Z&lt;BR&gt;
 541 |       3102P&lt;BR&gt;
 542 |       3102W&lt;BR&gt;
 543 |       3102X&lt;BR&gt;
 544 |       3102Y&lt;BR&gt;
 545 |       3102Z&lt;BR&gt;&lt;/FONT&gt;
 546 |     &lt;/TD&gt;
 547 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 548 |       -&lt;BR&gt;
 549 |       -&lt;BR&gt;
 550 |       -&lt;BR&gt;
 551 |       -&lt;BR&gt;
 552 |       -&lt;BR&gt;
 553 |       -&lt;BR&gt;
 554 |       -&lt;BR&gt;
 555 |       -&lt;BR&gt;
 556 |       -&lt;BR&gt;
 557 |       -&lt;BR&gt;
 558 |       -&lt;BR&gt;
 559 |       -&lt;BR&gt;
 560 |       -&lt;BR&gt;
 561 |       -&lt;BR&gt;
 562 |       -&lt;BR&gt;
 563 |       -&lt;BR&gt;
 564 |       -&lt;BR&gt;
 565 |       -&lt;BR&gt;
 566 |       -&lt;BR&gt;
 567 |       -&lt;BR&gt;
 568 |       -&lt;BR&gt;
 569 |       -&lt;BR&gt;
 570 |       EVMCBG&lt;BR&gt;
 571 |       EVMCCG&lt;BR&gt;
 572 |       -&lt;BR&gt;
 573 |       -&lt;BR&gt;
 574 |       -&lt;BR&gt;
 575 |       -&lt;BR&gt;
 576 |       -&lt;BR&gt;
 577 |       -&lt;BR&gt;
 578 |       -&lt;BR&gt;
 579 |       -&lt;BR&gt;&lt;/FONT&gt;
 580 |     &lt;/TD&gt;
 581 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 582 |       55-1-X&lt;BR&gt;
 583 |       55-4-X&lt;BR&gt;
 584 |       55-3-X&lt;BR&gt;
 585 |       55-2-X&lt;BR&gt;
 586 |       -&lt;BR&gt;
 587 |       -&lt;BR&gt;
 588 |       -&lt;BR&gt;
 589 |       -&lt;BR&gt;
 590 |       -&lt;BR&gt;
 591 |       -&lt;BR&gt;
 592 |       -&lt;BR&gt;
 593 |       -&lt;BR&gt;
 594 |       -&lt;BR&gt;
 595 |       -&lt;BR&gt;
 596 |       -&lt;BR&gt;
 597 |       -&lt;BR&gt;
 598 |       50-2-X&lt;BR&gt;
 599 |       50-4-X&lt;BR&gt;
 600 |       50-3-X&lt;BR&gt;
 601 |       -&lt;BR&gt;
 602 |       -&lt;BR&gt;
 603 |       -&lt;BR&gt;
 604 |       64P&lt;BR&gt;
 605 |       64W&lt;BR&gt;
 606 |       64X&lt;BR&gt;
 607 |       64Y&lt;BR&gt;
 608 |       64Z&lt;BR&gt;
 609 |       -&lt;BR&gt;
 610 |       -&lt;BR&gt;
 611 |       -&lt;BR&gt;
 612 |       -&lt;BR&gt;
 613 |       -&lt;BR&gt;&lt;/FONT&gt;
 614 |     &lt;/TD&gt;
 615 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 616 |       RT/RTR22&lt;BR&gt;
 617 |       RT/RTR22&lt;BR&gt;
 618 |       RT/RTR22&lt;BR&gt;
 619 |       RT/RTR22&lt;BR&gt;
 620 |       RJ/RJR22&lt;BR&gt;
 621 |       RJ/RJR22&lt;BR&gt;
 622 |       RJ/RJR22&lt;BR&gt;
 623 |       RT/RTR26&lt;BR&gt;
 624 |       RT/RTR26&lt;BR&gt;
 625 |       RT/RTR26&lt;BR&gt;
 626 |       RJ/RJR26&lt;BR&gt;
 627 |       RJ/RJR26&lt;BR&gt;
 628 |       RJ/RJR26&lt;BR&gt;
 629 |       RJ/RJR26&lt;BR&gt;
 630 |       RJ/RJR26&lt;BR&gt;
 631 |       RJ/RJR26&lt;BR&gt;
 632 |       RT/RTR24&lt;BR&gt;
 633 |       RT/RTR24&lt;BR&gt;
 634 |       RT/RTR24&lt;BR&gt;
 635 |       RJ/RJR24&lt;BR&gt;
 636 |       RJ/RJR24&lt;BR&gt;
 637 |       RJ/RJR24&lt;BR&gt;
 638 |       RJ/RJR24&lt;BR&gt;
 639 |       RJ/RJR24&lt;BR&gt;
 640 |       RJ/RJR24&lt;BR&gt;
 641 |       -&lt;BR&gt;
 642 |       -&lt;BR&gt;
 643 |       -&lt;BR&gt;
 644 |       -&lt;BR&gt;
 645 |       -&lt;BR&gt;
 646 |       -&lt;BR&gt;
 647 |       -&lt;BR&gt;&lt;/FONT&gt;
 648 |     &lt;/TD&gt;
 649 |   &lt;/TR&gt;
 650 |   &lt;TR&gt;
 651 |     &lt;TD COLSPAN=8&gt;&amp;nbsp;
 652 |     &lt;/TD&gt;
 653 |   &lt;/TR&gt;
 654 |   &lt;TR&gt;
 655 |     &lt;TD COLSPAN=8&gt;
 656 |       &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;
 657 |     &lt;/TD&gt;
 658 |   &lt;/TR&gt;
 659 |   &lt;TR&gt;
 660 |     &lt;TD ALIGN=CENTER&gt;
 661 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURN&lt;/B&gt;&lt;/FONT&gt;
 662 |     &lt;/TD&gt;
 663 |     &lt;TD ALIGN=CENTER&gt;
 664 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
 665 |     &lt;/TD&gt;
 666 |     &lt;TD ALIGN=CENTER&gt;
 667 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
 668 |     &lt;/TD&gt;
 669 |     &lt;TD ALIGN=CENTER&gt;
 670 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
 671 |     &lt;/TD&gt;
 672 |     &lt;TD ALIGN=CENTER&gt;
 673 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MURATA&lt;/B&gt;&lt;/FONT&gt;
 674 |     &lt;/TD&gt;
 675 |     &lt;TD ALIGN=CENTER&gt;
 676 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;
 677 |     &lt;/TD&gt;
 678 |     &lt;TD ALIGN=CENTER&gt;
 679 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;SPECTROL&lt;/B&gt;&lt;/FONT&gt;
 680 |     &lt;/TD&gt;
 681 |     &lt;TD ALIGN=CENTER&gt;
 682 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;MILSPEC&lt;/B&gt;&lt;/FONT&gt;
 683 |     &lt;/TD&gt;
 684 |   &lt;/TR&gt;
 685 |   &lt;TR&gt;
 686 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 687 |       3323P&lt;BR&gt;
 688 |       3323S&lt;BR&gt;
 689 |       3323W&lt;BR&gt;
 690 |       3329H&lt;BR&gt;
 691 |       3329P&lt;BR&gt;
 692 |       3329W&lt;BR&gt;
 693 |       3339H&lt;BR&gt;
 694 |       3339P&lt;BR&gt;
 695 |       3339W&lt;BR&gt;
 696 |       3352E&lt;BR&gt;
 697 |       3352H&lt;BR&gt;
 698 |       3352K&lt;BR&gt;
 699 |       3352P&lt;BR&gt;
 700 |       3352T&lt;BR&gt;
 701 |       3352V&lt;BR&gt;
 702 |       3352W&lt;BR&gt;
 703 |       3362H&lt;BR&gt;
 704 |       3362M&lt;BR&gt;
 705 |       3362P&lt;BR&gt;
 706 |       3362R&lt;BR&gt;
 707 |       3362S&lt;BR&gt;
 708 |       3362U&lt;BR&gt;
 709 |       3362W&lt;BR&gt;
 710 |       3362X&lt;BR&gt;
 711 |       3386B&lt;BR&gt;
 712 |       3386C&lt;BR&gt;
 713 |       3386F&lt;BR&gt;
 714 |       3386H&lt;BR&gt;
 715 |       3386K&lt;BR&gt;
 716 |       3386M&lt;BR&gt;
 717 |       3386P&lt;BR&gt;
 718 |       3386S&lt;BR&gt;
 719 |       3386W&lt;BR&gt;
 720 |       3386X&lt;BR&gt;&lt;/FONT&gt;
 721 |     &lt;/TD&gt;
 722 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 723 |       25P&lt;BR&gt;
 724 |       25S&lt;BR&gt;
 725 |       25RX&lt;BR&gt;
 726 |       82P&lt;BR&gt;
 727 |       82M&lt;BR&gt;
 728 |       82PA&lt;BR&gt;
 729 |       -&lt;BR&gt;
 730 |       -&lt;BR&gt;
 731 |       -&lt;BR&gt;
 732 |       91E&lt;BR&gt;
 733 |       91X&lt;BR&gt;
 734 |       91T&lt;BR&gt;
 735 |       91B&lt;BR&gt;
 736 |       91A&lt;BR&gt;
 737 |       91V&lt;BR&gt;
 738 |       91W&lt;BR&gt;
 739 |       25W&lt;BR&gt;
 740 |       25V&lt;BR&gt;
 741 |       25P&lt;BR&gt;
 742 |       -&lt;BR&gt;
 743 |       25S&lt;BR&gt;
 744 |       25U&lt;BR&gt;
 745 |       25RX&lt;BR&gt;
 746 |       25X&lt;BR&gt;
 747 |       72XW&lt;BR&gt;
 748 |       72XL&lt;BR&gt;
 749 |       72PM&lt;BR&gt;
 750 |       72RX&lt;BR&gt;
 751 |       -&lt;BR&gt;
 752 |       72PX&lt;BR&gt;
 753 |       72P&lt;BR&gt;
 754 |       72RXW&lt;BR&gt;
 755 |       72RXL&lt;BR&gt;
 756 |       72X&lt;BR&gt;&lt;/FONT&gt;
 757 |     &lt;/TD&gt;
 758 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 759 |       -&lt;BR&gt;
 760 |       -&lt;BR&gt;
 761 |       -&lt;BR&gt;
 762 |       T7YB&lt;BR&gt;
 763 |       T7YA&lt;BR&gt;
 764 |       -&lt;BR&gt;
 765 |       -&lt;BR&gt;
 766 |       -&lt;BR&gt;
 767 |       -&lt;BR&gt;
 768 |       -&lt;BR&gt;
 769 |       -&lt;BR&gt;
 770 |       -&lt;BR&gt;
 771 |       -&lt;BR&gt;
 772 |       -&lt;BR&gt;
 773 |       -&lt;BR&gt;
 774 |       -&lt;BR&gt;
 775 |       -&lt;BR&gt;
 776 |       TXD&lt;BR&gt;
 777 |       TYA&lt;BR&gt;
 778 |       TYP&lt;BR&gt;
 779 |       -&lt;BR&gt;
 780 |       TYD&lt;BR&gt;
 781 |       TX&lt;BR&gt;
 782 |       -&lt;BR&gt;
 783 |       150SX&lt;BR&gt;
 784 |       100SX&lt;BR&gt;
 785 |       102T&lt;BR&gt;
 786 |       101S&lt;BR&gt;
 787 |       190T&lt;BR&gt;
 788 |       150TX&lt;BR&gt;
 789 |       101&lt;BR&gt;
 790 |       -&lt;BR&gt;
 791 |       -&lt;BR&gt;
 792 |       101SX&lt;BR&gt;&lt;/FONT&gt;
 793 |     &lt;/TD&gt;
 794 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 795 |       ET6P&lt;BR&gt;
 796 |       ET6S&lt;BR&gt;
 797 |       ET6X&lt;BR&gt;
 798 |       RJ-6W/8014EMW&lt;BR&gt;
 799 |       RJ-6P/8014EMP&lt;BR&gt;
 800 |       RJ-6X/8014EMX&lt;BR&gt;
 801 |       TM7W&lt;BR&gt;
 802 |       TM7P&lt;BR&gt;
 803 |       TM7X&lt;BR&gt;
 804 |       -&lt;BR&gt;
 805 |       8017SMS&lt;BR&gt;
 806 |       -&lt;BR&gt;
 807 |       8017SMB&lt;BR&gt;
 808 |       8017SMA&lt;BR&gt;
 809 |       -&lt;BR&gt;
 810 |       -&lt;BR&gt;
 811 |       CT-6W&lt;BR&gt;
 812 |       CT-6H&lt;BR&gt;
 813 |       CT-6P&lt;BR&gt;
 814 |       CT-6R&lt;BR&gt;
 815 |       -&lt;BR&gt;
 816 |       CT-6V&lt;BR&gt;
 817 |       CT-6X&lt;BR&gt;
 818 |       -&lt;BR&gt;
 819 |       -&lt;BR&gt;
 820 |       8038EKV&lt;BR&gt;
 821 |       -&lt;BR&gt;
 822 |       8038EKX&lt;BR&gt;
 823 |       -&lt;BR&gt;
 824 |       -&lt;BR&gt;
 825 |       8038EKP&lt;BR&gt;
 826 |       8038EKZ&lt;BR&gt;
 827 |       8038EKW&lt;BR&gt;
 828 |       -&lt;BR&gt;&lt;/FONT&gt;
 829 |     &lt;/TD&gt;
 830 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 831 |       -&lt;BR&gt;
 832 |       -&lt;BR&gt;
 833 |       -&lt;BR&gt;
 834 |       3321H&lt;BR&gt;
 835 |       3321P&lt;BR&gt;
 836 |       3321N&lt;BR&gt;
 837 |       1102H&lt;BR&gt;
 838 |       1102P&lt;BR&gt;
 839 |       1102T&lt;BR&gt;
 840 |       RVA0911V304A&lt;BR&gt;
 841 |       -&lt;BR&gt;
 842 |       RVA0911H413A&lt;BR&gt;
 843 |       RVG0707V100A&lt;BR&gt;
 844 |       RVA0607V(H)306A&lt;BR&gt;
 845 |       RVA1214H213A&lt;BR&gt;
 846 |       -&lt;BR&gt;
 847 |       -&lt;BR&gt;
 848 |       -&lt;BR&gt;
 849 |       -&lt;BR&gt;
 850 |       -&lt;BR&gt;
 851 |       -&lt;BR&gt;
 852 |       -&lt;BR&gt;
 853 |       -&lt;BR&gt;
 854 |       -&lt;BR&gt;
 855 |       3104B&lt;BR&gt;
 856 |       3104C&lt;BR&gt;
 857 |       3104F&lt;BR&gt;
 858 |       3104H&lt;BR&gt;
 859 |       -&lt;BR&gt;
 860 |       3104M&lt;BR&gt;
 861 |       3104P&lt;BR&gt;
 862 |       3104S&lt;BR&gt;
 863 |       3104W&lt;BR&gt;
 864 |       3104X&lt;BR&gt;&lt;/FONT&gt;
 865 |     &lt;/TD&gt;
 866 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 867 |       EVMQ0G&lt;BR&gt;
 868 |       EVMQIG&lt;BR&gt;
 869 |       EVMQ3G&lt;BR&gt;
 870 |       EVMS0G&lt;BR&gt;
 871 |       EVMQ0G&lt;BR&gt;
 872 |       EVMG0G&lt;BR&gt;
 873 |       -&lt;BR&gt;
 874 |       -&lt;BR&gt;
 875 |       -&lt;BR&gt;
 876 |       EVMK4GA00B&lt;BR&gt;
 877 |       EVM30GA00B&lt;BR&gt;
 878 |       EVMK0GA00B&lt;BR&gt;
 879 |       EVM38GA00B&lt;BR&gt;
 880 |       EVMB6&lt;BR&gt;
 881 |       EVLQ0&lt;BR&gt;
 882 |       -&lt;BR&gt;
 883 |       EVMMSG&lt;BR&gt;
 884 |       EVMMBG&lt;BR&gt;
 885 |       EVMMAG&lt;BR&gt;
 886 |       -&lt;BR&gt;
 887 |       -&lt;BR&gt;
 888 |       EVMMCS&lt;BR&gt;
 889 |       -&lt;BR&gt;
 890 |       -&lt;BR&gt;
 891 |       -&lt;BR&gt;
 892 |       -&lt;BR&gt;
 893 |       -&lt;BR&gt;
 894 |       EVMM1&lt;BR&gt;
 895 |       -&lt;BR&gt;
 896 |       -&lt;BR&gt;
 897 |       EVMM0&lt;BR&gt;
 898 |       -&lt;BR&gt;
 899 |       -&lt;BR&gt;
 900 |       EVMM3&lt;BR&gt;&lt;/FONT&gt;
 901 |     &lt;/TD&gt;
 902 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 903 |       -&lt;BR&gt;
 904 |       -&lt;BR&gt;
 905 |       -&lt;BR&gt;
 906 |       62-3-1&lt;BR&gt;
 907 |       62-1-2&lt;BR&gt;
 908 |       -&lt;BR&gt;
 909 |       -&lt;BR&gt;
 910 |       -&lt;BR&gt;
 911 |       -&lt;BR&gt;
 912 |       -&lt;BR&gt;
 913 |       -&lt;BR&gt;
 914 |       -&lt;BR&gt;
 915 |       -&lt;BR&gt;
 916 |       -&lt;BR&gt;
 917 |       -&lt;BR&gt;
 918 |       -&lt;BR&gt;
 919 |       67R&lt;BR&gt;
 920 |       -&lt;BR&gt;
 921 |       67P&lt;BR&gt;
 922 |       -&lt;BR&gt;
 923 |       -&lt;BR&gt;
 924 |       -&lt;BR&gt;
 925 |       -&lt;BR&gt;
 926 |       67X&lt;BR&gt;
 927 |       63V&lt;BR&gt;
 928 |       63S&lt;BR&gt;
 929 |       63M&lt;BR&gt;
 930 |       -&lt;BR&gt;
 931 |       -&lt;BR&gt;
 932 |       63H&lt;BR&gt;
 933 |       63P&lt;BR&gt;
 934 |       -&lt;BR&gt;
 935 |       -&lt;BR&gt;
 936 |       63X&lt;BR&gt;&lt;/FONT&gt;
 937 |     &lt;/TD&gt;
 938 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
 939 |       -&lt;BR&gt;
 940 |       -&lt;BR&gt;
 941 |       -&lt;BR&gt;
 942 |       RJ/RJR50&lt;BR&gt;
 943 |       RJ/RJR50&lt;BR&gt;
 944 |       RJ/RJR50&lt;BR&gt;
 945 |       -&lt;BR&gt;
 946 |       -&lt;BR&gt;
 947 |       -&lt;BR&gt;
 948 |       -&lt;BR&gt;
 949 |       -&lt;BR&gt;
 950 |       -&lt;BR&gt;
 951 |       -&lt;BR&gt;
 952 |       -&lt;BR&gt;
 953 |       -&lt;BR&gt;
 954 |       -&lt;BR&gt;
 955 |       -&lt;BR&gt;
 956 |       -&lt;BR&gt;
 957 |       -&lt;BR&gt;
 958 |       -&lt;BR&gt;
 959 |       -&lt;BR&gt;
 960 |       -&lt;BR&gt;
 961 |       -&lt;BR&gt;
 962 |       -&lt;BR&gt;
 963 |       -&lt;BR&gt;
 964 |       -&lt;BR&gt;
 965 |       -&lt;BR&gt;
 966 |       -&lt;BR&gt;
 967 |       -&lt;BR&gt;
 968 |       -&lt;BR&gt;
 969 |       -&lt;BR&gt;
 970 |       -&lt;BR&gt;
 971 |       -&lt;BR&gt;
 972 |       -&lt;BR&gt;&lt;/FONT&gt;
 973 |     &lt;/TD&gt;
 974 |   &lt;/TR&gt;
 975 | &lt;/TABLE&gt;
 976 | &lt;P&gt;&amp;nbsp;&lt;P&gt;
 977 | &lt;TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3&gt;
 978 |   &lt;TR&gt;
 979 |     &lt;TD COLSPAN=7&gt;
 980 |       &lt;FONT color="#0000FF" SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SMD TRIM-POT CROSS REFERENCE&lt;/B&gt;&lt;/FONT&gt;
 981 |       &lt;P&gt;
 982 |       &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;MULTI-TURN&lt;/B&gt;&lt;/FONT&gt;
 983 |     &lt;/TD&gt;
 984 |   &lt;/TR&gt;
 985 |   &lt;TR&gt;
 986 |     &lt;TD&gt;
 987 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;
 988 |     &lt;/TD&gt;
 989 |     &lt;TD&gt;
 990 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
 991 |     &lt;/TD&gt;
 992 |     &lt;TD&gt;
 993 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
 994 |     &lt;/TD&gt;
 995 |     &lt;TD&gt;
 996 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
 997 |     &lt;/TD&gt;
 998 |     &lt;TD&gt;
 999 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;
1000 |     &lt;/TD&gt;
1001 |     &lt;TD&gt;
1002 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;
1003 |     &lt;/TD&gt;
1004 |     &lt;TD&gt;
1005 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;
1006 |     &lt;/TD&gt;
1007 |   &lt;/TR&gt;
1008 |   &lt;TR&gt;
1009 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1010 |       3224G&lt;BR&gt;
1011 |       3224J&lt;BR&gt;
1012 |       3224W&lt;BR&gt;
1013 |       3269P&lt;BR&gt;
1014 |       3269W&lt;BR&gt;
1015 |       3269X&lt;BR&gt;&lt;/FONT&gt;
1016 |     &lt;/TD&gt;
1017 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1018 |       44G&lt;BR&gt;
1019 |       44J&lt;BR&gt;
1020 |       44W&lt;BR&gt;
1021 |       84P&lt;BR&gt;
1022 |       84W&lt;BR&gt;
1023 |       84X&lt;BR&gt;&lt;/FONT&gt;
1024 |     &lt;/TD&gt;
1025 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1026 |       -&lt;BR&gt;
1027 |       -&lt;BR&gt;
1028 |       -&lt;BR&gt;
1029 |       ST63Z&lt;BR&gt;
1030 |       ST63Y&lt;BR&gt;
1031 |       -&lt;BR&gt;&lt;/FONT&gt;
1032 |     &lt;/TD&gt;
1033 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1034 |       -&lt;BR&gt;
1035 |       -&lt;BR&gt;
1036 |       -&lt;BR&gt;
1037 |       ST5P&lt;BR&gt;
1038 |       ST5W&lt;BR&gt;
1039 |       ST5X&lt;BR&gt;&lt;/FONT&gt;
1040 |     &lt;/TD&gt;
1041 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1042 |       -&lt;BR&gt;
1043 |       -&lt;BR&gt;
1044 |       -&lt;BR&gt;
1045 |       -&lt;BR&gt;
1046 |       -&lt;BR&gt;
1047 |       -&lt;BR&gt;&lt;/FONT&gt;
1048 |     &lt;/TD&gt;
1049 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1050 |       -&lt;BR&gt;
1051 |       -&lt;BR&gt;
1052 |       -&lt;BR&gt;
1053 |       -&lt;BR&gt;
1054 |       -&lt;BR&gt;
1055 |       -&lt;BR&gt;&lt;/FONT&gt;
1056 |     &lt;/TD&gt;
1057 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1058 |       -&lt;BR&gt;
1059 |       -&lt;BR&gt;
1060 |       -&lt;BR&gt;
1061 |       -&lt;BR&gt;
1062 |       -&lt;BR&gt;
1063 |       -&lt;BR&gt;&lt;/FONT&gt;
1064 |     &lt;/TD&gt;
1065 |   &lt;/TR&gt;
1066 |   &lt;TR&gt;
1067 |     &lt;TD COLSPAN=7&gt;&amp;nbsp;
1068 |     &lt;/TD&gt;
1069 |   &lt;/TR&gt;
1070 |   &lt;TR&gt;
1071 |     &lt;TD COLSPAN=7&gt;
1072 |       &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;SINGLE TURN&lt;/B&gt;&lt;/FONT&gt;
1073 |     &lt;/TD&gt;
1074 |   &lt;/TR&gt;
1075 |   &lt;TR&gt;
1076 |     &lt;TD&gt;
1077 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BOURNS&lt;/B&gt;&lt;/FONT&gt;
1078 |     &lt;/TD&gt;
1079 |     &lt;TD&gt;
1080 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;BI&amp;nbsp;TECH&lt;/B&gt;&lt;/FONT&gt;
1081 |     &lt;/TD&gt;
1082 |     &lt;TD&gt;
1083 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;DALE-VISHAY&lt;/B&gt;&lt;/FONT&gt;
1084 |     &lt;/TD&gt;
1085 |     &lt;TD&gt;
1086 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PHILIPS/MEPCO&lt;/B&gt;&lt;/FONT&gt;
1087 |     &lt;/TD&gt;
1088 |     &lt;TD&gt;
1089 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;PANASONIC&lt;/B&gt;&lt;/FONT&gt;
1090 |     &lt;/TD&gt;
1091 |     &lt;TD&gt;
1092 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;TOCOS&lt;/B&gt;&lt;/FONT&gt;
1093 |     &lt;/TD&gt;
1094 |     &lt;TD&gt;
1095 |       &lt;FONT SIZE=3 FACE=ARIAL&gt;&lt;B&gt;AUX/KYOCERA&lt;/B&gt;&lt;/FONT&gt;
1096 |     &lt;/TD&gt;
1097 |   &lt;/TR&gt;
1098 |   &lt;TR&gt;
1099 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1100 |       3314G&lt;BR&gt;
1101 |       3314J&lt;BR&gt;
1102 |       3364A/B&lt;BR&gt;
1103 |       3364C/D&lt;BR&gt;
1104 |       3364W/X&lt;BR&gt;
1105 |       3313G&lt;BR&gt;
1106 |       3313J&lt;BR&gt;&lt;/FONT&gt;
1107 |     &lt;/TD&gt;
1108 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1109 |       23B&lt;BR&gt;
1110 |       23A&lt;BR&gt;
1111 |       21X&lt;BR&gt;
1112 |       21W&lt;BR&gt;
1113 |       -&lt;BR&gt;
1114 |       22B&lt;BR&gt;
1115 |       22A&lt;BR&gt;&lt;/FONT&gt;
1116 |     &lt;/TD&gt;
1117 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1118 |       ST5YL/ST53YL&lt;BR&gt;
1119 |       ST5YJ/5T53YJ&lt;BR&gt;
1120 |       ST-23A&lt;BR&gt;
1121 |       ST-22B&lt;BR&gt;
1122 |       ST-22&lt;BR&gt;
1123 |       -&lt;BR&gt;
1124 |       -&lt;BR&gt;&lt;/FONT&gt;
1125 |     &lt;/TD&gt;
1126 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1127 |       ST-4B&lt;BR&gt;
1128 |       ST-4A&lt;BR&gt;
1129 |       -&lt;BR&gt;
1130 |       -&lt;BR&gt;
1131 |       -&lt;BR&gt;
1132 |       ST-3B&lt;BR&gt;
1133 |       ST-3A&lt;BR&gt;&lt;/FONT&gt;
1134 |     &lt;/TD&gt;
1135 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1136 |       -&lt;BR&gt;
1137 |       EVM-6YS&lt;BR&gt;
1138 |       EVM-1E&lt;BR&gt;
1139 |       EVM-1G&lt;BR&gt;
1140 |       EVM-1D&lt;BR&gt;
1141 |       -&lt;BR&gt;
1142 |       -&lt;BR&gt;&lt;/FONT&gt;
1143 |     &lt;/TD&gt;
1144 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1145 |       G4B&lt;BR&gt;
1146 |       G4A&lt;BR&gt;
1147 |       TR04-3S1&lt;BR&gt;
1148 |       TRG04-2S1&lt;BR&gt;
1149 |       -&lt;BR&gt;
1150 |       -&lt;BR&gt;
1151 |       -&lt;BR&gt;&lt;/FONT&gt;
1152 |     &lt;/TD&gt;
1153 |     &lt;TD BGCOLOR="#cccccc" ALIGN=CENTER&gt;&lt;FONT FACE=ARIAL SIZE=3&gt;
1154 |       -&lt;BR&gt;
1155 |       -&lt;BR&gt;
1156 |       DVR-43A&lt;BR&gt;
1157 |       CVR-42C&lt;BR&gt;
1158 |       CVR-42A/C&lt;BR&gt;
1159 |       -&lt;BR&gt;
1160 |       -&lt;BR&gt;&lt;/FONT&gt;
1161 |     &lt;/TD&gt;
1162 |   &lt;/TR&gt;
1163 | &lt;/TABLE&gt;
1164 | &lt;P&gt;
1165 | &lt;FONT SIZE=4 FACE=ARIAL&gt;&lt;B&gt;ALT =&amp;nbsp;ALTERNATE&lt;/B&gt;&lt;/FONT&gt;
1166 | &lt;P&gt;
1167 | 
1168 | &amp;nbsp;
1169 | &lt;P&gt;
1170 | &lt;/td&gt;
1171 | &lt;/tr&gt;
1172 | &lt;/table&gt;</description>
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1206 | </packages>
1207 | </library>
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1422 | </package>
1423 | </packages>
1424 | </library>
1425 | <library name="SparkFun">
1426 | <description>&lt;h3&gt;SparkFun Electronics' preferred foot prints&lt;/h3&gt;
1427 | We've spent an enormous amount of time creating and checking these footprints and parts. If you enjoy using this library, please buy one of our products at www.sparkfun.com.
1428 | &lt;br&gt;&lt;br&gt;
1429 | &lt;b&gt;Licensing:&lt;/b&gt; CC v3.0 Share-Alike You are welcome to use this library for commercial purposes. For attribution, we ask that when you begin to sell your device using our footprint, you email us with a link to the product being sold. We want bragging rights that we helped (in a very small part) to create your 8th world wonder. We would like the opportunity to feature your device on our homepage.</description>
1430 | <packages>
1431 | <package name="SOT223">
1432 | <description>&lt;b&gt;SOT-223&lt;/b&gt;</description>
1433 | <wire x1="3.2766" y1="1.651" x2="3.2766" y2="-1.651" width="0.2032" layer="21"/>
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1436 | <wire x1="-3.2766" y1="1.651" x2="3.2766" y2="1.651" width="0.2032" layer="21"/>
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1438 | <smd name="2" x="0" y="-3.0988" dx="1.2192" dy="2.2352" layer="1"/>
1439 | <smd name="3" x="2.3114" y="-3.0988" dx="1.2192" dy="2.2352" layer="1"/>
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1442 | <text x="-1.0795" y="-0.1905" size="0.4064" layer="27">&gt;VALUE</text>
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1451 | </package>
1452 | </packages>
1453 | </library>
1454 | <library name="testpad">
1455 | <description>&lt;b&gt;Test Pins/Pads&lt;/b&gt;&lt;p&gt;
1456 | Cream on SMD OFF.&lt;br&gt;
1457 | new: Attribute TP_SIGNAL_NAME&lt;br&gt;
1458 | &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
1459 | <packages>
1460 | <package name="TP10SQ">
1461 | <description>&lt;b&gt;TEST PAD&lt;/b&gt;</description>
1462 | <smd name="TP" x="0" y="0" dx="1" dy="1" layer="1" cream="no"/>
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1464 | <text x="-0.508" y="-0.635" size="0.0254" layer="27">&gt;VALUE</text>
1465 | <text x="0" y="-1.905" size="1" layer="37">&gt;TP_SIGNAL_NAME</text>
1466 | </package>
1467 | </packages>
1468 | </library>
1469 | <library name="commodore">
1470 | <packages>
1471 | <package name="DIL40-ROUNDPAD">
1472 | <description>&lt;b&gt;Dual In Line Package&lt;/b&gt;</description>
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1478 | <wire x1="-25.4" y1="0.889" x2="-25.4" y2="-1.143" width="0.1524" layer="21" curve="-180"/>
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1498 | <pad name="20" x="24.13" y="-7.62" drill="0.8128" rot="R90"/>
1499 | <pad name="21" x="24.13" y="7.62" drill="0.8128" rot="R90"/>
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1510 | <pad name="32" x="-3.81" y="7.62" drill="0.8128" rot="R90"/>
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1513 | <pad name="35" x="-11.43" y="7.62" drill="0.8128" rot="R90"/>
1514 | <pad name="36" x="-13.97" y="7.62" drill="0.8128" rot="R90"/>
1515 | <pad name="37" x="-16.51" y="7.62" drill="0.8128" rot="R90"/>
1516 | <pad name="38" x="-19.05" y="7.62" drill="0.8128" rot="R90"/>
1517 | <pad name="39" x="-21.59" y="7.62" drill="0.8128" rot="R90"/>
1518 | <pad name="40" x="-24.13" y="7.62" drill="0.8128" rot="R90"/>
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1520 | <text x="-4.445" y="-0.635" size="1.778" layer="27">&gt;VALUE</text>
1521 | </package>
1522 | </packages>
1523 | </library>
1524 | <library name="jumper">
1525 | <description>&lt;b&gt;Jumpers&lt;/b&gt;&lt;p&gt;
1526 | &lt;author&gt;Created by librarian@cadsoft.de&lt;/author&gt;</description>
1527 | <packages>
1528 | <package name="SJ">
1529 | <description>&lt;b&gt;Solder jumper&lt;/b&gt;</description>
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1541 | <wire x1="0.254" y1="0.127" x2="0.254" y2="-0.127" width="1.27" layer="51" curve="-180" cap="flat"/>
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1543 | <smd name="2" x="0.762" y="0" dx="1.1684" dy="1.6002" layer="1"/>
1544 | <text x="-1.651" y="1.143" size="1.27" layer="25" ratio="10">&gt;NAME</text>
1545 | <text x="0.4001" y="0" size="0.02" layer="27">&gt;VALUE</text>
1546 | <rectangle x1="-0.0762" y1="-0.9144" x2="0.0762" y2="0.9144" layer="29"/>
1547 | </package>
1548 | </packages>
1549 | </library>
1550 | </libraries>
1551 | <attributes>
1552 | </attributes>
1553 | <variantdefs>
1554 | </variantdefs>
1555 | <classes>
1556 | <class number="0" name="default" width="0" drill="0">
1557 | </class>
1558 | </classes>
1559 | <designrules name="hackvana *">
1560 | <description language="de">&lt;b&gt;EAGLE Design Rules für Hackvana&lt;/b&gt;
1561 | &lt;p&gt;
1562 | Die Standard-Design-Rules sind so gewählt, dass sie für 
1563 | die meisten Anwendungen passen. Sollte ihre Platine 
1564 | besondere Anforderungen haben, treffen Sie die erforderlichen
1565 | Einstellungen hier und speichern die Design Rules unter 
1566 | einem neuen Namen ab.</description>
1567 | <description language="en">&lt;b&gt;EAGLE Design Rules for Hackvana&lt;/b&gt;
1568 | &lt;p&gt;
1569 | The default Design Rules have been set to cover
1570 | a wide range of applications. Your particular design
1571 | may have different requirements, so please make the
1572 | necessary adjustments and save your customized
1573 | design rules under a new name.</description>
1574 | <description language="zh">&lt;b&gt;EAGLE Design Rules for Hackvana&lt;/b&gt;
1575 | </description>
1576 | <param name="layerSetup" value="(1*16)"/>
1577 | <param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
1578 | <param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
1579 | <param name="mdWireWire" value="6mil"/>
1580 | <param name="mdWirePad" value="6mil"/>
1581 | <param name="mdWireVia" value="6mil"/>
1582 | <param name="mdPadPad" value="6mil"/>
1583 | <param name="mdPadVia" value="6mil"/>
1584 | <param name="mdViaVia" value="6mil"/>
1585 | <param name="mdSmdPad" value="0mil"/>
1586 | <param name="mdSmdVia" value="0mil"/>
1587 | <param name="mdSmdSmd" value="0mil"/>
1588 | <param name="mdViaViaSameLayer" value="8mil"/>
1589 | <param name="mnLayersViaInSmd" value="2"/>
1590 | <param name="mdCopperDimension" value="6mil"/>
1591 | <param name="mdDrill" value="6mil"/>
1592 | <param name="mdSmdStop" value="0mil"/>
1593 | <param name="msWidth" value="6mil"/>
1594 | <param name="msDrill" value="0.3mm"/>
1595 | <param name="msMicroVia" value="0.25mm"/>
1596 | <param name="msBlindViaRatio" value="0.5"/>
1597 | <param name="rvPadTop" value="0.25"/>
1598 | <param name="rvPadInner" value="0.25"/>
1599 | <param name="rvPadBottom" value="0.25"/>
1600 | <param name="rvViaOuter" value="0.25"/>
1601 | <param name="rvViaInner" value="0.25"/>
1602 | <param name="rvMicroViaOuter" value="0.25"/>
1603 | <param name="rvMicroViaInner" value="0.25"/>
1604 | <param name="rlMinPadTop" value="10mil"/>
1605 | <param name="rlMaxPadTop" value="20mil"/>
1606 | <param name="rlMinPadInner" value="10mil"/>
1607 | <param name="rlMaxPadInner" value="20mil"/>
1608 | <param name="rlMinPadBottom" value="10mil"/>
1609 | <param name="rlMaxPadBottom" value="20mil"/>
1610 | <param name="rlMinViaOuter" value="6mil"/>
1611 | <param name="rlMaxViaOuter" value="20mil"/>
1612 | <param name="rlMinViaInner" value="6mil"/>
1613 | <param name="rlMaxViaInner" value="20mil"/>
1614 | <param name="rlMinMicroViaOuter" value="4mil"/>
1615 | <param name="rlMaxMicroViaOuter" value="20mil"/>
1616 | <param name="rlMinMicroViaInner" value="4mil"/>
1617 | <param name="rlMaxMicroViaInner" value="20mil"/>
1618 | <param name="psTop" value="-1"/>
1619 | <param name="psBottom" value="-1"/>
1620 | <param name="psFirst" value="0"/>
1621 | <param name="psElongationLong" value="100"/>
1622 | <param name="psElongationOffset" value="100"/>
1623 | <param name="mvStopFrame" value="1"/>
1624 | <param name="mvCreamFrame" value="0"/>
1625 | <param name="mlMinStopFrame" value="2mil"/>
1626 | <param name="mlMaxStopFrame" value="2mil"/>
1627 | <param name="mlMinCreamFrame" value="0mil"/>
1628 | <param name="mlMaxCreamFrame" value="0mil"/>
1629 | <param name="mlViaStopLimit" value="100mil"/>
1630 | <param name="srRoundness" value="0"/>
1631 | <param name="srMinRoundness" value="0mil"/>
1632 | <param name="srMaxRoundness" value="0mil"/>
1633 | <param name="slThermalIsolate" value="10mil"/>
1634 | <param name="slThermalsForVias" value="0"/>
1635 | <param name="dpMaxLengthDifference" value="10mm"/>
1636 | <param name="dpGapFactor" value="2.5"/>
1637 | <param name="checkGrid" value="0"/>
1638 | <param name="checkAngle" value="1"/>
1639 | <param name="checkFont" value="1"/>
1640 | <param name="checkRestrict" value="0"/>
1641 | <param name="useDiameter" value="13"/>
1642 | <param name="maxErrors" value="50"/>
1643 | </designrules>
1644 | <autorouter>
1645 | <pass name="Default">
1646 | <param name="RoutingGrid" value="50mil"/>
1647 | <param name="AutoGrid" value="1"/>
1648 | <param name="Efforts" value="0"/>
1649 | <param name="TopRouterVariant" value="1"/>
1650 | <param name="tpViaShape" value="round"/>
1651 | <param name="PrefDir.1" value="a"/>
1652 | <param name="PrefDir.2" value="0"/>
1653 | <param name="PrefDir.3" value="0"/>
1654 | <param name="PrefDir.4" value="0"/>
1655 | <param name="PrefDir.5" value="0"/>
1656 | <param name="PrefDir.6" value="0"/>
1657 | <param name="PrefDir.7" value="0"/>
1658 | <param name="PrefDir.8" value="0"/>
1659 | <param name="PrefDir.9" value="0"/>
1660 | <param name="PrefDir.10" value="0"/>
1661 | <param name="PrefDir.11" value="0"/>
1662 | <param name="PrefDir.12" value="0"/>
1663 | <param name="PrefDir.13" value="0"/>
1664 | <param name="PrefDir.14" value="0"/>
1665 | <param name="PrefDir.15" value="0"/>
1666 | <param name="PrefDir.16" value="a"/>
1667 | <param name="cfVia" value="8"/>
1668 | <param name="cfNonPref" value="5"/>
1669 | <param name="cfChangeDir" value="2"/>
1670 | <param name="cfOrthStep" value="2"/>
1671 | <param name="cfDiagStep" value="3"/>
1672 | <param name="cfExtdStep" value="0"/>
1673 | <param name="cfBonusStep" value="1"/>
1674 | <param name="cfMalusStep" value="1"/>
1675 | <param name="cfPadImpact" value="4"/>
1676 | <param name="cfSmdImpact" value="4"/>
1677 | <param name="cfBusImpact" value="0"/>
1678 | <param name="cfHugging" value="3"/>
1679 | <param name="cfAvoid" value="4"/>
1680 | <param name="cfPolygon" value="10"/>
1681 | <param name="cfBase.1" value="0"/>
1682 | <param name="cfBase.2" value="1"/>
1683 | <param name="cfBase.3" value="1"/>
1684 | <param name="cfBase.4" value="1"/>
1685 | <param name="cfBase.5" value="1"/>
1686 | <param name="cfBase.6" value="1"/>
1687 | <param name="cfBase.7" value="1"/>
1688 | <param name="cfBase.8" value="1"/>
1689 | <param name="cfBase.9" value="1"/>
1690 | <param name="cfBase.10" value="1"/>
1691 | <param name="cfBase.11" value="1"/>
1692 | <param name="cfBase.12" value="1"/>
1693 | <param name="cfBase.13" value="1"/>
1694 | <param name="cfBase.14" value="1"/>
1695 | <param name="cfBase.15" value="1"/>
1696 | <param name="cfBase.16" value="0"/>
1697 | <param name="mnVias" value="20"/>
1698 | <param name="mnSegments" value="9999"/>
1699 | <param name="mnExtdSteps" value="9999"/>
1700 | <param name="mnRipupLevel" value="10"/>
1701 | <param name="mnRipupSteps" value="100"/>
1702 | <param name="mnRipupTotal" value="100"/>
1703 | </pass>
1704 | <pass name="Follow-me" refer="Default" active="yes">
1705 | </pass>
1706 | <pass name="Busses" refer="Default" active="yes">
1707 | <param name="cfNonPref" value="4"/>
1708 | <param name="cfBusImpact" value="4"/>
1709 | <param name="cfHugging" value="0"/>
1710 | <param name="mnVias" value="0"/>
1711 | </pass>
1712 | <pass name="Route" refer="Default" active="yes">
1713 | </pass>
1714 | <pass name="Optimize1" refer="Default" active="yes">
1715 | <param name="cfVia" value="99"/>
1716 | <param name="cfExtdStep" value="10"/>
1717 | <param name="cfHugging" value="1"/>
1718 | <param name="mnExtdSteps" value="1"/>
1719 | <param name="mnRipupLevel" value="0"/>
1720 | </pass>
1721 | <pass name="Optimize2" refer="Optimize1" active="yes">
1722 | <param name="cfNonPref" value="0"/>
1723 | <param name="cfChangeDir" value="6"/>
1724 | <param name="cfExtdStep" value="0"/>
1725 | <param name="cfBonusStep" value="2"/>
1726 | <param name="cfMalusStep" value="2"/>
1727 | <param name="cfPadImpact" value="2"/>
1728 | <param name="cfSmdImpact" value="2"/>
1729 | <param name="cfHugging" value="0"/>
1730 | </pass>
1731 | <pass name="Optimize3" refer="Optimize2" active="yes">
1732 | <param name="cfChangeDir" value="8"/>
1733 | <param name="cfPadImpact" value="0"/>
1734 | <param name="cfSmdImpact" value="0"/>
1735 | </pass>
1736 | <pass name="Optimize4" refer="Optimize3" active="yes">
1737 | <param name="cfChangeDir" value="25"/>
1738 | </pass>
1739 | </autorouter>
1740 | <elements>
1741 | <element name="C3.1" library="rcl" package="C0402" value="" x="10.16" y="18.89125" smashed="yes" rot="R270">
1742 | <attribute name="NAME" x="12.065" y="17.30375" size="1.016" layer="25" ratio="10" rot="R90"/>
1743 | <attribute name="VALUE" x="7.62" y="20.16125" size="1.27" layer="27" rot="R270"/>
1744 | </element>
1745 | <element name="C3.2" library="rcl" package="C0402" value="" x="10.16" y="2.06375" smashed="yes" rot="R90">
1746 | <attribute name="NAME" x="9.2075" y="0.79375" size="1.016" layer="25" ratio="10" rot="R90"/>
1747 | <attribute name="VALUE" x="12.7" y="0.79375" size="1.27" layer="27" rot="R90"/>
1748 | </element>
1749 | <element name="C3.3" library="rcl" package="C0402" value="" x="14.12875" y="2.06375" smashed="yes" rot="R90">
1750 | <attribute name="NAME" x="13.17625" y="0.47625" size="1.016" layer="25" ratio="10" rot="R90"/>
1751 | <attribute name="VALUE" x="16.66875" y="0.79375" size="1.27" layer="27" rot="R90"/>
1752 | </element>
1753 | <element name="C34" library="rcl" package="C0402" value="" x="15.24" y="18.89125" smashed="yes" rot="R90">
1754 | <attribute name="NAME" x="13.335" y="20.47875" size="1.016" layer="25" ratio="10" rot="R270"/>
1755 | <attribute name="VALUE" x="17.78" y="17.62125" size="1.27" layer="27" rot="R90"/>
1756 | </element>
1757 | <element name="VR1" library="SparkFun" package="SOT223" value="" x="61.9125" y="10.4775" smashed="yes" rot="MR270">
1758 | <attribute name="NAME" x="57.404" y="11.6205" size="1.27" layer="26" ratio="10" rot="MR270"/>
1759 | <attribute name="VALUE" x="62.103" y="11.557" size="0.4064" layer="28" rot="MR270"/>
1760 | </element>
1761 | <element name="C2" library="rcl" package="C0805" value="" x="65.7225" y="6.0325" smashed="yes" rot="MR180">
1762 | <attribute name="NAME" x="64.4525" y="4.7625" size="1.27" layer="26" ratio="10" rot="MR180"/>
1763 | <attribute name="VALUE" x="64.4525" y="8.5725" size="1.27" layer="28" rot="MR180"/>
1764 | </element>
1765 | <element name="C3" library="rcl" package="C0805" value="" x="65.7225" y="14.9225" smashed="yes" rot="MR180">
1766 | <attribute name="NAME" x="64.4525" y="13.6525" size="1.27" layer="26" ratio="10" rot="MR180"/>
1767 | <attribute name="VALUE" x="64.4525" y="17.4625" size="1.27" layer="28" rot="MR180"/>
1768 | </element>
1769 | <element name="TDO" library="testpad" package="TP10SQ" value="TPTP10SQ" x="3.175" y="0.635" smashed="yes" rot="MR180">
1770 | <attribute name="TP_SIGNAL_NAME" value="" x="3.175" y="2.54" size="1" layer="38" rot="MR180"/>
1771 | <attribute name="NAME" x="3.81" y="0" size="1.016" layer="26" ratio="10" rot="MR270"/>
1772 | </element>
1773 | <element name="TDI" library="testpad" package="TP10SQ" value="TPTP10SQ" x="6.985" y="0.635" smashed="yes" rot="MR180">
1774 | <attribute name="TP_SIGNAL_NAME" value="" x="6.985" y="2.54" size="1" layer="38" rot="MR180"/>
1775 | <attribute name="NAME" x="7.62" y="0" size="1.016" layer="26" ratio="10" rot="MR270"/>
1776 | </element>
1777 | <element name="TMS" library="testpad" package="TP10SQ" value="TPTP10SQ" x="5.715" y="0.635" smashed="yes" rot="MR180">
1778 | <attribute name="TP_SIGNAL_NAME" value="" x="5.715" y="2.54" size="1" layer="38" rot="MR180"/>
1779 | <attribute name="NAME" x="6.35" y="0" size="1.016" layer="26" ratio="10" rot="MR270"/>
1780 | </element>
1781 | <element name="TCK" library="testpad" package="TP10SQ" value="TPTP10SQ" x="4.445" y="0.635" smashed="yes" rot="MR180">
1782 | <attribute name="TP_SIGNAL_NAME" value="" x="4.445" y="2.54" size="1" layer="38" rot="MR180"/>
1783 | <attribute name="NAME" x="5.08" y="0" size="1.016" layer="26" ratio="10" rot="MR270"/>
1784 | </element>
1785 | <element name="GND" library="testpad" package="TP10SQ" value="TPTP10SQ" x="1.905" y="0.635" smashed="yes" rot="MR180">
1786 | <attribute name="TP_SIGNAL_NAME" value="" x="1.905" y="2.54" size="1" layer="38" rot="MR180"/>
1787 | <attribute name="NAME" x="2.54" y="0" size="1.016" layer="26" ratio="10" rot="MR270"/>
1788 | </element>
1789 | <element name="3V3" library="testpad" package="TP10SQ" value="TPTP10SQ" x="0.635" y="0.635" smashed="yes" rot="MR180">
1790 | <attribute name="TP_SIGNAL_NAME" value="" x="0.635" y="2.54" size="1" layer="38" rot="MR180"/>
1791 | <attribute name="NAME" x="1.27" y="0" size="1.016" layer="26" ratio="10" rot="MR270"/>
1792 | </element>
1793 | <element name="IC3" library="xilinx_xc95XXXxl" package="TQFP100" value="XC9572XLTQG100" x="10.16" y="10.4775" smashed="yes" rot="MR0">
1794 | <attribute name="NAME" x="19.57125" y="17.5001" size="1.27" layer="26" ratio="10" rot="MR0"/>
1795 | <attribute name="VALUE" x="18.26135" y="19.46885" size="1.27" layer="28" ratio="10" rot="MR0"/>
1796 | </element>
1797 | <element name="IC1" library="commodore" package="DIL40-ROUNDPAD" value="W65C02SP" x="44.45" y="9.525" smashed="yes">
1798 | <attribute name="NAME" x="18.89125" y="4.7625" size="1.27" layer="25" ratio="10" rot="R90"/>
1799 | <attribute name="VALUE" x="21.59" y="4.92125" size="1.27" layer="27" ratio="10"/>
1800 | </element>
1801 | <element name="SJ1" library="jumper" package="SJ" value="" x="17.62125" y="1.42875" smashed="yes">
1802 | <attribute name="NAME" x="15.8115" y="2.7305" size="1.27" layer="25" ratio="10"/>
1803 | <attribute name="VALUE" x="18.02135" y="1.42875" size="0.02" layer="27"/>
1804 | </element>
1805 | <element name="IC2" library="commodore" package="DIL40-ROUNDPAD" value="6510-RP" x="44.45" y="11.43" smashed="yes">
1806 | <attribute name="NAME" x="18.89125" y="13.335" size="1.27" layer="25" ratio="10" rot="R90"/>
1807 | <attribute name="VALUE" x="21.59" y="14.76375" size="1.27" layer="27" ratio="10"/>
1808 | </element>
1809 | </elements>
1810 | <signals>
1811 | <signal name="VCC">
1812 | <contactref element="VR1" pad="3"/>
1813 | <contactref element="C2" pad="1"/>
1814 | <wire x1="33.02" y1="3.81" x2="34.29" y2="3.81" width="0.6096" layer="1"/>
1815 | <wire x1="34.29" y1="3.81" x2="34.29" y2="0.47625" width="0.6096" layer="1"/>
1816 | <wire x1="34.29" y1="0.47625" x2="38.1" y2="0.47625" width="0.6096" layer="1"/>
1817 | <wire x1="38.1" y1="0.47625" x2="38.1" y2="1.905" width="0.6096" layer="1"/>
1818 | <wire x1="64.7725" y1="6.0325" x2="64.7725" y2="0.47625" width="0.6096" layer="16"/>
1819 | <wire x1="64.7725" y1="0.47625" x2="64.77" y2="0.47625" width="0.6096" layer="16"/>
1820 | <via x="64.77" y="0.47625" extent="1-16" drill="0.3048"/>
1821 | <wire x1="64.77" y1="0.47625" x2="38.1" y2="0.47625" width="0.6096" layer="1"/>
1822 | <wire x1="65.0113" y1="8.1661" x2="64.7725" y2="8.1661" width="0.6096" layer="16"/>
1823 | <wire x1="64.7725" y1="8.1661" x2="64.7725" y2="6.0325" width="0.6096" layer="16"/>
1824 | <contactref element="IC1" pad="8"/>
1825 | <contactref element="IC1" pad="38"/>
1826 | <wire x1="25.4" y1="17.145" x2="26.67" y2="18.415" width="0.1524" layer="1"/>
1827 | <wire x1="26.67" y1="18.415" x2="26.67" y2="19.52625" width="0.1524" layer="1"/>
1828 | <wire x1="26.67" y1="19.52625" x2="27.46375" y2="20.32" width="0.1524" layer="1"/>
1829 | <wire x1="27.46375" y1="20.32" x2="66.675" y2="20.32" width="0.1524" layer="1"/>
1830 | <wire x1="66.675" y1="20.32" x2="67.31" y2="19.685" width="0.1524" layer="1"/>
1831 | <wire x1="67.31" y1="19.685" x2="67.31" y2="9.8425" width="0.1524" layer="1"/>
1832 | <wire x1="67.31" y1="9.8425" x2="65.7225" y2="8.255" width="0.1524" layer="1"/>
1833 | <via x="65.7225" y="8.255" extent="1-16" drill="0.3048"/>
1834 | <wire x1="65.7225" y1="8.255" x2="65.1002" y2="8.255" width="0.1524" layer="16"/>
1835 | <wire x1="65.1002" y1="8.255" x2="65.0113" y2="8.1661" width="0.1524" layer="16"/>
1836 | <contactref element="IC2" pad="6"/>
1837 | </signal>
1838 | <signal name="GND">
1839 | <contactref element="C3.2" pad="2"/>
1840 | <contactref element="C3.1" pad="2"/>
1841 | <contactref element="C3.3" pad="2"/>
1842 | <polygon width="0.1524" layer="16" rank="2">
1843 | <vertex x="0.635" y="20.955"/>
1844 | <vertex x="69.215" y="20.955" curve="-90"/>
1845 | <vertex x="69.85" y="20.32"/>
1846 | <vertex x="69.85" y="0.635" curve="-90"/>
1847 | <vertex x="69.215" y="0"/>
1848 | <vertex x="0.635" y="0" curve="-90"/>
1849 | <vertex x="0" y="0.635"/>
1850 | <vertex x="0" y="20.32" curve="-90"/>
1851 | </polygon>
1852 | <polygon width="0.1524" layer="1">
1853 | <vertex x="0.635" y="20.955"/>
1854 | <vertex x="69.215" y="20.955" curve="-90"/>
1855 | <vertex x="69.85" y="20.32"/>
1856 | <vertex x="69.85" y="0.635" curve="-90"/>
1857 | <vertex x="69.215" y="0"/>
1858 | <vertex x="0.635" y="0" curve="-90"/>
1859 | <vertex x="0" y="0.635"/>
1860 | <vertex x="0" y="20.32" curve="-90"/>
1861 | </polygon>
1862 | <contactref element="C34" pad="2"/>
1863 | <contactref element="C2" pad="2"/>
1864 | <contactref element="VR1" pad="1"/>
1865 | <contactref element="C3" pad="2"/>
1866 | <contactref element="GND" pad="TP"/>
1867 | <contactref element="IC3" pad="31"/>
1868 | <contactref element="IC3" pad="44"/>
1869 | <contactref element="IC3" pad="84"/>
1870 | <contactref element="IC3" pad="75"/>
1871 | <contactref element="IC3" pad="69"/>
1872 | <contactref element="IC3" pad="62"/>
1873 | <contactref element="IC3" pad="100"/>
1874 | <contactref element="IC3" pad="21"/>
1875 | <via x="3.4925" y="17.145" extent="1-16" drill="0.3048"/>
1876 | <via x="16.51" y="16.8275" extent="1-16" drill="0.3048"/>
1877 | <via x="17.78" y="18.0975" extent="1-16" drill="0.3048"/>
1878 | <via x="3.4925" y="3.81" extent="1-16" drill="0.3048"/>
1879 | <via x="16.35125" y="4.1275" extent="1-16" drill="0.3048"/>
1880 | <via x="17.78" y="2.8575" extent="1-16" drill="0.3048"/>
1881 | <via x="1.905" y="0.635" extent="1-16" drill="0.3556"/>
1882 | <via x="7.62" y="3.81" extent="1-16" drill="0.3556"/>
1883 | <contactref element="IC1" pad="21"/>
1884 | <contactref element="SJ1" pad="1"/>
1885 | <contactref element="IC2" pad="21"/>
1886 | </signal>
1887 | <signal name="!RESET">
1888 | <wire x1="20.32" y1="17.145" x2="19.52625" y2="17.145" width="0.1524" layer="16"/>
1889 | <contactref element="IC3" pad="99"/>
1890 | <wire x1="15.6601" y1="18.4775" x2="15.6601" y2="17.6774" width="0.1524" layer="16"/>
1891 | <wire x1="15.6601" y1="17.6774" x2="15.875" y2="17.4625" width="0.1524" layer="16"/>
1892 | <wire x1="15.875" y1="17.4625" x2="19.20875" y2="17.4625" width="0.1524" layer="16"/>
1893 | <wire x1="19.20875" y1="17.4625" x2="19.52625" y2="17.145" width="0.1524" layer="16"/>
1894 | <wire x1="20.32" y1="17.145" x2="20.32" y2="19.05" width="0.1524" layer="1"/>
1895 | <contactref element="IC1" pad="40"/>
1896 | <contactref element="IC2" pad="40"/>
1897 | </signal>
1898 | <signal name="!NMI">
1899 | <wire x1="27.94" y1="3.81" x2="29.21" y2="2.54" width="0.1524" layer="16"/>
1900 | <wire x1="33.02" y1="1.905" x2="31.75" y2="0.635" width="0.1524" layer="16"/>
1901 | <wire x1="31.75" y1="0.635" x2="29.21" y2="0.635" width="0.1524" layer="16"/>
1902 | <wire x1="29.21" y1="0.635" x2="14.12875" y2="0.635" width="0.1524" layer="16"/>
1903 | <contactref element="IC3" pad="32"/>
1904 | <wire x1="13.16" y1="2.4775" x2="13.16" y2="1.60375" width="0.1524" layer="16"/>
1905 | <wire x1="13.16" y1="1.60375" x2="14.12875" y2="0.635" width="0.1524" layer="16"/>
1906 | <wire x1="29.21" y1="2.54" x2="29.21" y2="0.635" width="0.1524" layer="16"/>
1907 | <contactref element="IC1" pad="6"/>
1908 | <contactref element="IC2" pad="4"/>
1909 | </signal>
1910 | <signal name="!IRQ">
1911 | <wire x1="23.1775" y1="0.9525" x2="14.76375" y2="0.9525" width="0.1524" layer="16"/>
1912 | <wire x1="25.4" y1="3.81" x2="26.3525" y2="2.8575" width="0.1524" layer="16"/>
1913 | <wire x1="26.3525" y1="2.8575" x2="26.9875" y2="2.8575" width="0.1524" layer="16"/>
1914 | <wire x1="26.9875" y1="2.8575" x2="27.94" y2="1.905" width="0.1524" layer="16"/>
1915 | <contactref element="IC3" pad="30"/>
1916 | <wire x1="14.16" y1="2.4775" x2="14.16" y2="1.715" width="0.1524" layer="16"/>
1917 | <wire x1="14.16" y1="1.715" x2="14.76375" y2="0.9525" width="0.1524" layer="16"/>
1918 | <contactref element="IC1" pad="4"/>
1919 | <wire x1="23.1775" y1="0.9525" x2="24.13" y2="1.905" width="0.1524" layer="16"/>
1920 | <wire x1="24.13" y1="1.905" x2="24.13" y2="2.54" width="0.1524" layer="16"/>
1921 | <wire x1="24.13" y1="2.54" x2="25.4" y2="3.81" width="0.1524" layer="16"/>
1922 | <contactref element="IC2" pad="3"/>
1923 | </signal>
1924 | <signal name="A0">
1925 | <contactref element="IC3" pad="23"/>
1926 | <wire x1="18.16" y1="5.4775" x2="33.8925" y2="5.4775" width="0.1524" layer="16"/>
1927 | <wire x1="33.8925" y1="5.4775" x2="35.56" y2="3.81" width="0.1524" layer="16"/>
1928 | <contactref element="IC2" pad="7"/>
1929 | </signal>
1930 | <signal name="A1">
1931 | <contactref element="IC3" pad="22"/>
1932 | <wire x1="18.16" y1="5.9774" x2="35.9326" y2="5.9774" width="0.1524" layer="16"/>
1933 | <wire x1="35.9326" y1="5.9774" x2="38.1" y2="3.81" width="0.1524" layer="16"/>
1934 | <contactref element="IC2" pad="8"/>
1935 | </signal>
1936 | <signal name="A2">
1937 | <wire x1="40.64" y1="3.81" x2="36.4726" y2="7.9774" width="0.1524" layer="16"/>
1938 | <wire x1="18.16" y1="7.9774" x2="36.4726" y2="7.9774" width="0.1524" layer="16"/>
1939 | <contactref element="IC3" pad="18"/>
1940 | <contactref element="IC2" pad="9"/>
1941 | </signal>
1942 | <signal name="A3">
1943 | <wire x1="43.18" y1="3.81" x2="38.0126" y2="8.9774" width="0.1524" layer="16"/>
1944 | <wire x1="18.16" y1="8.9774" x2="38.0126" y2="8.9774" width="0.1524" layer="16"/>
1945 | <contactref element="IC3" pad="16"/>
1946 | <contactref element="IC2" pad="10"/>
1947 | </signal>
1948 | <signal name="A4">
1949 | <wire x1="45.72" y1="3.81" x2="39.5526" y2="9.9774" width="0.1524" layer="16"/>
1950 | <wire x1="18.16" y1="9.9774" x2="39.5526" y2="9.9774" width="0.1524" layer="16"/>
1951 | <contactref element="IC3" pad="14"/>
1952 | <contactref element="IC2" pad="11"/>
1953 | </signal>
1954 | <signal name="A5">
1955 | <wire x1="48.26" y1="3.81" x2="46.99" y2="5.08" width="0.1524" layer="1"/>
1956 | <via x="12.22375" y="3.81" extent="1-16" drill="0.3048"/>
1957 | <wire x1="12.22375" y1="3.81" x2="13.49375" y2="5.08" width="0.1524" layer="1"/>
1958 | <wire x1="13.49375" y1="5.08" x2="46.99" y2="5.08" width="0.1524" layer="1"/>
1959 | <contactref element="IC3" pad="35"/>
1960 | <wire x1="11.6601" y1="2.4775" x2="11.6601" y2="3.24635" width="0.1524" layer="16"/>
1961 | <wire x1="11.6601" y1="3.24635" x2="12.22375" y2="3.81" width="0.1524" layer="16"/>
1962 | <contactref element="IC2" pad="12"/>
1963 | </signal>
1964 | <signal name="A6">
1965 | <wire x1="50.8" y1="3.81" x2="48.895" y2="5.715" width="0.1524" layer="1"/>
1966 | <via x="11.43" y="4.60375" extent="1-16" drill="0.3048"/>
1967 | <wire x1="11.43" y1="4.60375" x2="12.54125" y2="5.715" width="0.1524" layer="1"/>
1968 | <wire x1="12.54125" y1="5.715" x2="48.895" y2="5.715" width="0.1524" layer="1"/>
1969 | <contactref element="IC3" pad="37"/>
1970 | <wire x1="10.6601" y1="3.83385" x2="11.43" y2="4.60375" width="0.1524" layer="16"/>
1971 | <wire x1="10.6601" y1="2.4775" x2="10.6601" y2="3.83385" width="0.1524" layer="16"/>
1972 | <contactref element="IC2" pad="13"/>
1973 | </signal>
1974 | <signal name="A7">
1975 | <wire x1="53.34" y1="3.81" x2="50.8" y2="6.35" width="0.1524" layer="1"/>
1976 | <via x="9.8425" y="4.60375" extent="1-16" drill="0.3048"/>
1977 | <wire x1="9.8425" y1="4.60375" x2="11.58875" y2="6.35" width="0.1524" layer="1"/>
1978 | <wire x1="11.58875" y1="6.35" x2="50.8" y2="6.35" width="0.1524" layer="1"/>
1979 | <contactref element="IC3" pad="40"/>
1980 | <wire x1="9.16" y1="2.4775" x2="9.16" y2="3.92125" width="0.1524" layer="16"/>
1981 | <wire x1="9.16" y1="3.92125" x2="9.8425" y2="4.60375" width="0.1524" layer="16"/>
1982 | <contactref element="IC2" pad="14"/>
1983 | </signal>
1984 | <signal name="A8">
1985 | <wire x1="55.88" y1="3.81" x2="52.705" y2="6.985" width="0.1524" layer="1"/>
1986 | <via x="9.04875" y="5.3975" extent="1-16" drill="0.3048"/>
1987 | <wire x1="9.04875" y1="5.3975" x2="10.63625" y2="6.985" width="0.1524" layer="1"/>
1988 | <wire x1="52.705" y1="6.985" x2="10.63625" y2="6.985" width="0.1524" layer="1"/>
1989 | <contactref element="IC3" pad="42"/>
1990 | <wire x1="8.16" y1="2.4775" x2="8.16" y2="3.23875" width="0.1524" layer="16"/>
1991 | <wire x1="8.16" y1="3.23875" x2="8.255" y2="3.33375" width="0.1524" layer="16"/>
1992 | <wire x1="8.255" y1="3.33375" x2="8.255" y2="4.60375" width="0.1524" layer="16"/>
1993 | <wire x1="8.255" y1="4.60375" x2="9.04875" y2="5.3975" width="0.1524" layer="16"/>
1994 | <contactref element="IC2" pad="15"/>
1995 | </signal>
1996 | <signal name="A9">
1997 | <wire x1="58.42" y1="3.81" x2="54.61" y2="7.62" width="0.1524" layer="1"/>
1998 | <via x="8.255" y="6.19125" extent="1-16" drill="0.3048"/>
1999 | <wire x1="8.255" y1="6.19125" x2="9.68375" y2="7.62" width="0.1524" layer="1"/>
2000 | <wire x1="54.61" y1="7.62" x2="9.68375" y2="7.62" width="0.1524" layer="1"/>
2001 | <contactref element="IC3" pad="50"/>
2002 | <wire x1="4.16" y1="2.4775" x2="4.16" y2="3.36625" width="0.1524" layer="16"/>
2003 | <wire x1="4.16" y1="3.36625" x2="5.08" y2="4.28625" width="0.1524" layer="16"/>
2004 | <wire x1="5.08" y1="4.28625" x2="6.35" y2="4.28625" width="0.1524" layer="16"/>
2005 | <wire x1="6.35" y1="4.28625" x2="8.255" y2="6.19125" width="0.1524" layer="16"/>
2006 | <contactref element="IC2" pad="16"/>
2007 | </signal>
2008 | <signal name="A10">
2009 | <wire x1="60.96" y1="3.81" x2="56.515" y2="8.255" width="0.1524" layer="1"/>
2010 | <via x="6.6675" y="6.19125" extent="1-16" drill="0.3048"/>
2011 | <wire x1="6.6675" y1="6.19125" x2="8.73125" y2="8.255" width="0.1524" layer="1"/>
2012 | <wire x1="56.515" y1="8.255" x2="8.73125" y2="8.255" width="0.1524" layer="1"/>
2013 | <contactref element="IC3" pad="53"/>
2014 | <wire x1="2.16" y1="5.4775" x2="5.95375" y2="5.4775" width="0.1524" layer="16"/>
2015 | <wire x1="5.95375" y1="5.4775" x2="6.6675" y2="6.19125" width="0.1524" layer="16"/>
2016 | <contactref element="IC2" pad="17"/>
2017 | </signal>
2018 | <signal name="A11">
2019 | <wire x1="63.5" y1="3.81" x2="58.42" y2="8.89" width="0.1524" layer="1"/>
2020 | <via x="5.87375" y="6.985" extent="1-16" drill="0.3048"/>
2021 | <wire x1="5.87375" y1="6.985" x2="7.77875" y2="8.89" width="0.1524" layer="1"/>
2022 | <wire x1="7.77875" y1="8.89" x2="58.42" y2="8.89" width="0.1524" layer="1"/>
2023 | <contactref element="IC3" pad="55"/>
2024 | <wire x1="2.16" y1="6.4775" x2="3.0475" y2="6.4775" width="0.1524" layer="16"/>
2025 | <wire x1="3.0475" y1="6.4775" x2="3.175" y2="6.35" width="0.1524" layer="16"/>
2026 | <wire x1="3.175" y1="6.35" x2="5.23875" y2="6.35" width="0.1524" layer="16"/>
2027 | <wire x1="5.23875" y1="6.35" x2="5.87375" y2="6.985" width="0.1524" layer="16"/>
2028 | <contactref element="IC2" pad="18"/>
2029 | </signal>
2030 | <signal name="A12">
2031 | <wire x1="66.04" y1="3.81" x2="60.325" y2="9.525" width="0.1524" layer="1"/>
2032 | <via x="5.08" y="7.77875" extent="1-16" drill="0.3048"/>
2033 | <wire x1="5.08" y1="7.77875" x2="6.82625" y2="9.525" width="0.1524" layer="1"/>
2034 | <wire x1="6.82625" y1="9.525" x2="60.325" y2="9.525" width="0.1524" layer="1"/>
2035 | <contactref element="IC3" pad="58"/>
2036 | <wire x1="2.16" y1="7.9774" x2="4.88135" y2="7.9774" width="0.1524" layer="16"/>
2037 | <wire x1="4.88135" y1="7.9774" x2="5.08" y2="7.77875" width="0.1524" layer="16"/>
2038 | <contactref element="IC2" pad="19"/>
2039 | </signal>
2040 | <signal name="A13">
2041 | <wire x1="68.58" y1="3.81" x2="62.23" y2="10.16" width="0.1524" layer="1"/>
2042 | <via x="5.08" y="9.36625" extent="1-16" drill="0.3048"/>
2043 | <wire x1="5.08" y1="9.36625" x2="5.87375" y2="10.16" width="0.1524" layer="1"/>
2044 | <wire x1="5.87375" y1="10.16" x2="62.23" y2="10.16" width="0.1524" layer="1"/>
2045 | <contactref element="IC3" pad="60"/>
2046 | <wire x1="2.16" y1="8.9774" x2="4.69115" y2="8.9774" width="0.1524" layer="16"/>
2047 | <wire x1="4.69115" y1="8.9774" x2="5.08" y2="9.36625" width="0.1524" layer="16"/>
2048 | <contactref element="IC2" pad="20"/>
2049 | </signal>
2050 | <signal name="A14">
2051 | <wire x1="66.04" y1="19.05" x2="64.77" y2="17.78" width="0.1524" layer="1"/>
2052 | <wire x1="64.77" y1="17.78" x2="64.77" y2="17.145" width="0.1524" layer="1"/>
2053 | <wire x1="64.77" y1="17.145" x2="59.055" y2="11.43" width="0.1524" layer="1"/>
2054 | <wire x1="59.055" y1="11.43" x2="6.985" y2="11.43" width="0.1524" layer="1"/>
2055 | <via x="5.23875" y="13.17625" extent="1-16" drill="0.3048"/>
2056 | <wire x1="5.23875" y1="13.17625" x2="6.985" y2="11.43" width="0.1524" layer="1"/>
2057 | <contactref element="IC3" pad="72"/>
2058 | <wire x1="2.16" y1="14.9776" x2="3.4374" y2="14.9776" width="0.1524" layer="16"/>
2059 | <wire x1="3.4374" y1="14.9776" x2="5.23875" y2="13.17625" width="0.1524" layer="16"/>
2060 | <contactref element="IC2" pad="22"/>
2061 | </signal>
2062 | <signal name="A15">
2063 | <wire x1="63.5" y1="19.05" x2="62.23" y2="17.78" width="0.1524" layer="1"/>
2064 | <wire x1="62.23" y1="17.78" x2="62.23" y2="17.145" width="0.1524" layer="1"/>
2065 | <wire x1="62.23" y1="17.145" x2="57.15" y2="12.065" width="0.1524" layer="1"/>
2066 | <wire x1="57.15" y1="12.065" x2="7.9375" y2="12.065" width="0.1524" layer="1"/>
2067 | <via x="6.0325" y="13.97" extent="1-16" drill="0.3048"/>
2068 | <wire x1="6.0325" y1="13.97" x2="7.9375" y2="12.065" width="0.1524" layer="1"/>
2069 | <contactref element="IC3" pad="76"/>
2070 | <wire x1="4.16" y1="18.4775" x2="4.16" y2="15.8425" width="0.1524" layer="16"/>
2071 | <wire x1="4.16" y1="15.8425" x2="6.0325" y2="13.97" width="0.1524" layer="16"/>
2072 | <contactref element="IC2" pad="23"/>
2073 | </signal>
2074 | <signal name="PHI2_OUT">
2075 | <contactref element="IC2" pad="39"/>
2076 | <contactref element="IC1" pad="39"/>
2077 | <wire x1="22.86" y1="17.145" x2="22.86" y2="19.05" width="0.1524" layer="1"/>
2078 | </signal>
2079 | <signal name="R/!W'">
2080 | <wire x1="35.56" y1="17.145" x2="33.3926" y2="14.9776" width="0.1524" layer="16"/>
2081 | <wire x1="18.16" y1="14.9776" x2="33.3926" y2="14.9776" width="0.1524" layer="16"/>
2082 | <contactref element="IC3" pad="4"/>
2083 | <contactref element="IC1" pad="34"/>
2084 | </signal>
2085 | <signal name="A'0">
2086 | <wire x1="40.64" y1="1.905" x2="39.37" y2="3.175" width="0.1524" layer="16"/>
2087 | <wire x1="39.37" y1="3.175" x2="39.37" y2="3.81" width="0.1524" layer="16"/>
2088 | <wire x1="39.37" y1="3.81" x2="36.2026" y2="6.9774" width="0.1524" layer="16"/>
2089 | <wire x1="18.16" y1="6.9774" x2="36.2026" y2="6.9774" width="0.1524" layer="16"/>
2090 | <contactref element="IC3" pad="20"/>
2091 | <contactref element="IC1" pad="9"/>
2092 | </signal>
2093 | <signal name="A'1">
2094 | <wire x1="43.18" y1="1.905" x2="41.91" y2="3.175" width="0.1524" layer="16"/>
2095 | <wire x1="41.91" y1="3.175" x2="41.91" y2="3.81" width="0.1524" layer="16"/>
2096 | <wire x1="41.91" y1="3.81" x2="37.2425" y2="8.4775" width="0.1524" layer="16"/>
2097 | <wire x1="18.16" y1="8.4775" x2="37.2425" y2="8.4775" width="0.1524" layer="16"/>
2098 | <contactref element="IC3" pad="17"/>
2099 | <contactref element="IC1" pad="10"/>
2100 | </signal>
2101 | <signal name="A'2">
2102 | <wire x1="45.72" y1="1.905" x2="44.45" y2="3.175" width="0.1524" layer="16"/>
2103 | <wire x1="44.45" y1="3.175" x2="44.45" y2="3.81" width="0.1524" layer="16"/>
2104 | <wire x1="44.45" y1="3.81" x2="38.7825" y2="9.4775" width="0.1524" layer="16"/>
2105 | <wire x1="18.16" y1="9.4775" x2="38.7825" y2="9.4775" width="0.1524" layer="16"/>
2106 | <contactref element="IC3" pad="15"/>
2107 | <contactref element="IC1" pad="11"/>
2108 | </signal>
2109 | <signal name="A'3">
2110 | <wire x1="48.26" y1="1.905" x2="46.99" y2="3.175" width="0.1524" layer="1"/>
2111 | <wire x1="46.99" y1="3.175" x2="46.99" y2="3.81" width="0.1524" layer="1"/>
2112 | <wire x1="46.99" y1="3.81" x2="46.0375" y2="4.7625" width="0.1524" layer="1"/>
2113 | <via x="13.0175" y="3.81" extent="1-16" drill="0.3048"/>
2114 | <wire x1="13.0175" y1="3.81" x2="13.97" y2="4.7625" width="0.1524" layer="1"/>
2115 | <wire x1="13.97" y1="4.7625" x2="46.0375" y2="4.7625" width="0.1524" layer="1"/>
2116 | <contactref element="IC3" pad="33"/>
2117 | <wire x1="12.6601" y1="2.4775" x2="12.6601" y2="3.4526" width="0.1524" layer="16"/>
2118 | <wire x1="12.6601" y1="3.4526" x2="13.0175" y2="3.81" width="0.1524" layer="16"/>
2119 | <contactref element="IC1" pad="12"/>
2120 | </signal>
2121 | <signal name="A'4">
2122 | <wire x1="50.8" y1="1.905" x2="49.53" y2="3.175" width="0.1524" layer="1"/>
2123 | <wire x1="49.53" y1="3.175" x2="49.53" y2="3.81" width="0.1524" layer="1"/>
2124 | <wire x1="49.53" y1="3.81" x2="47.9425" y2="5.3975" width="0.1524" layer="1"/>
2125 | <via x="11.43" y="3.81" extent="1-16" drill="0.3048"/>
2126 | <wire x1="11.43" y1="3.81" x2="13.0175" y2="5.3975" width="0.1524" layer="1"/>
2127 | <wire x1="13.0175" y1="5.3975" x2="47.9425" y2="5.3975" width="0.1524" layer="1"/>
2128 | <contactref element="IC3" pad="36"/>
2129 | <wire x1="11.16" y1="2.4775" x2="11.16" y2="3.54" width="0.1524" layer="16"/>
2130 | <wire x1="11.16" y1="3.54" x2="11.43" y2="3.81" width="0.1524" layer="16"/>
2131 | <contactref element="IC1" pad="13"/>
2132 | </signal>
2133 | <signal name="A'5">
2134 | <wire x1="53.34" y1="1.905" x2="52.07" y2="3.175" width="0.1524" layer="1"/>
2135 | <wire x1="52.07" y1="3.175" x2="52.07" y2="3.81" width="0.1524" layer="1"/>
2136 | <wire x1="52.07" y1="3.81" x2="49.8475" y2="6.0325" width="0.1524" layer="1"/>
2137 | <via x="10.63625" y="4.60375" extent="1-16" drill="0.3048"/>
2138 | <wire x1="10.63625" y1="4.60375" x2="12.065" y2="6.0325" width="0.1524" layer="1"/>
2139 | <wire x1="49.8475" y1="6.0325" x2="12.065" y2="6.0325" width="0.1524" layer="1"/>
2140 | <contactref element="IC3" pad="39"/>
2141 | <wire x1="9.6599" y1="3.6274" x2="10.63625" y2="4.60375" width="0.1524" layer="16"/>
2142 | <wire x1="9.6599" y1="2.4775" x2="9.6599" y2="3.6274" width="0.1524" layer="16"/>
2143 | <contactref element="IC1" pad="14"/>
2144 | </signal>
2145 | <signal name="A'6">
2146 | <wire x1="55.88" y1="1.905" x2="54.61" y2="3.175" width="0.1524" layer="1"/>
2147 | <wire x1="54.61" y1="3.175" x2="54.61" y2="3.81" width="0.1524" layer="1"/>
2148 | <wire x1="54.61" y1="3.81" x2="51.7525" y2="6.6675" width="0.1524" layer="1"/>
2149 | <via x="9.8425" y="5.3975" extent="1-16" drill="0.3048"/>
2150 | <wire x1="9.8425" y1="5.3975" x2="11.1125" y2="6.6675" width="0.1524" layer="1"/>
2151 | <wire x1="11.1125" y1="6.6675" x2="51.7525" y2="6.6675" width="0.1524" layer="1"/>
2152 | <contactref element="IC3" pad="41"/>
2153 | <wire x1="8.6599" y1="2.4775" x2="8.6599" y2="4.2149" width="0.1524" layer="16"/>
2154 | <wire x1="8.6599" y1="4.2149" x2="9.8425" y2="5.3975" width="0.1524" layer="16"/>
2155 | <contactref element="IC1" pad="15"/>
2156 | </signal>
2157 | <signal name="A'7">
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3077 | </eagle>
3078 | 


--------------------------------------------------------------------------------