├── .cargo └── config.toml ├── .gitignore ├── .vscode └── settings.json ├── Cargo.toml ├── LICENSE ├── README.md ├── Xtask.md ├── build.rs ├── debug ├── cm32m4xxr │ ├── build.sh │ ├── cm32m4xxr.cfg │ ├── openocd.cfg │ ├── openocd.gdb │ ├── openocd.sh │ ├── run.sh │ ├── screenlog.0 │ └── sys.log ├── gd32vf103 │ ├── ._longan_nano_pinout_v1.1.0_w5676_h4000_large.png │ ├── build.sh │ ├── debug1.png │ ├── debug2.png │ ├── longan_nano_pinout_v1.1.0_w5676_h4000_large.png │ ├── memory-cb.x │ ├── openocd-jlink.cfg │ ├── openocd-sipeed.cfg │ ├── openocd.cfg │ ├── openocd.gdb │ ├── openocd.sh │ ├── run.sh │ ├── screenlog.0 │ └── sipeed-jtag.cfg ├── stm32f103 │ ├── openocd.cfg │ ├── openocd.gdb │ └── stm32f103c8t6-large.jpg └── stm32f4 │ ├── 20190812191101436.png │ ├── openocd.cfg │ ├── openocd.gdb │ └── openocd.sh ├── examples ├── broadcast.rs ├── cm32m4xxr.rs ├── evbus.rs ├── gd32vf103.rs ├── led.rs ├── multitask.rs ├── multitask_bluepill.rs ├── multitask_greenpill.rs ├── multitask_rp_pico.rs ├── multitask_stm32f411.rs ├── multitask_stm32h7.rs ├── notify.rs ├── queue.rs ├── semaphore.rs └── timer.rs ├── hal2 ├── cm32m4xxr-hal │ ├── .cargo │ │ └── config.toml │ ├── .vscode │ │ └── settings.json │ ├── Cargo.toml │ └── src │ │ ├── eclic.rs │ │ └── lib.rs ├── cm32m4xxr-pac │ ├── .cargo │ │ └── config.toml │ ├── .vscode │ │ └── settings.json │ ├── CM32M4xxR.svd │ ├── Cargo.toml │ ├── build.rs │ ├── device.x │ └── src │ │ ├── adc1.rs │ │ ├── adc1 │ │ ├── adc_calfact.rs │ │ ├── adc_ctrl1.rs │ │ ├── adc_ctrl2.rs │ │ ├── adc_ctrl3.rs │ │ ├── adc_difsel.rs │ │ ├── adc_iptst.rs │ │ ├── adc_jdat.rs │ │ ├── adc_jdat1.rs │ │ ├── adc_jdat2.rs │ │ ├── adc_jdat3.rs │ │ ├── adc_jdat4.rs │ │ ├── adc_joffset1.rs │ │ ├── adc_joffset2.rs │ │ ├── adc_joffset3.rs │ │ ├── adc_joffset4.rs │ │ ├── adc_jseq.rs │ │ ├── adc_rseq1.rs │ │ ├── adc_rseq2.rs │ │ ├── adc_rseq3.rs │ │ ├── adc_sampt3.rs │ │ ├── adc_smpr1.rs │ │ ├── adc_smpr2.rs │ │ ├── adc_sts.rs │ │ ├── adc_wdghigh.rs │ │ └── adc_wdglow.rs │ │ ├── adc2.rs │ │ ├── adc2 │ │ ├── adc_calfact.rs │ │ ├── adc_ctrl1.rs │ │ ├── adc_ctrl2.rs │ │ ├── adc_ctrl3.rs │ │ ├── adc_difsel.rs │ │ ├── adc_iptst.rs │ │ ├── adc_jdat.rs │ │ ├── adc_jdat1.rs │ │ ├── adc_jdat2.rs │ │ ├── adc_jdat3.rs │ │ ├── adc_jdat4.rs │ │ ├── adc_joffset1.rs │ │ ├── adc_joffset2.rs │ │ ├── adc_joffset3.rs │ │ ├── adc_joffset4.rs │ │ ├── adc_jseq.rs │ │ ├── adc_rseq1.rs │ │ ├── adc_rseq2.rs │ │ ├── adc_rseq3.rs │ │ ├── adc_sampt3.rs │ │ ├── adc_smpr1.rs │ │ ├── adc_smpr2.rs │ │ ├── adc_sts.rs │ │ ├── adc_wdghigh.rs │ │ └── adc_wdglow.rs │ │ ├── adc3.rs │ │ ├── adc3 │ │ ├── adc_calfact.rs │ │ ├── adc_ctrl1.rs │ │ ├── adc_ctrl2.rs │ │ ├── adc_ctrl3.rs │ │ ├── adc_difsel.rs │ │ ├── adc_iptst.rs │ │ ├── adc_jdat.rs │ │ ├── adc_jdat1.rs │ │ ├── adc_jdat2.rs │ │ ├── adc_jdat3.rs │ │ ├── adc_jdat4.rs │ │ ├── adc_joffset1.rs │ │ ├── adc_joffset2.rs │ │ ├── adc_joffset3.rs │ │ ├── adc_joffset4.rs │ │ ├── adc_jseq.rs │ │ ├── adc_rseq1.rs │ │ ├── adc_rseq2.rs │ │ ├── adc_rseq3.rs │ │ ├── adc_sampt3.rs │ │ ├── adc_smpr1.rs │ │ ├── adc_smpr2.rs │ │ ├── adc_sts.rs │ │ ├── adc_wdghigh.rs │ │ └── adc_wdglow.rs │ │ ├── adc4.rs │ │ ├── adc4 │ │ ├── adc_calfact.rs │ │ ├── adc_ctrl1.rs │ │ ├── adc_ctrl2.rs │ │ ├── adc_ctrl3.rs │ │ ├── adc_difsel.rs │ │ ├── adc_iptst.rs │ │ ├── adc_jdat.rs │ │ ├── adc_jdat1.rs │ │ ├── adc_jdat2.rs │ │ ├── adc_jdat3.rs │ │ ├── adc_jdat4.rs │ │ ├── adc_joffset1.rs │ │ ├── adc_joffset2.rs │ │ ├── adc_joffset3.rs │ │ ├── adc_joffset4.rs │ │ ├── adc_jseq.rs │ │ ├── adc_rseq1.rs │ │ ├── adc_rseq2.rs │ │ ├── adc_rseq3.rs │ │ ├── adc_sampt3.rs │ │ ├── adc_smpr1.rs │ │ ├── adc_smpr2.rs │ │ ├── adc_sts.rs │ │ ├── adc_wdghigh.rs │ │ └── adc_wdglow.rs │ │ ├── afio.rs │ │ ├── afio │ │ ├── afio_ectrl.rs │ │ ├── afio_exti_cfg1.rs │ │ ├── afio_exti_cfg2.rs │ │ ├── afio_exti_cfg3.rs │ │ ├── afio_exti_cfg4.rs │ │ ├── afio_rmp_cfg.rs │ │ ├── afio_rmp_cfg3.rs │ │ ├── afio_rmp_cfg4.rs │ │ └── afio_rmp_cfg5.rs │ │ ├── bkp.rs │ │ ├── bkp │ │ ├── bkp_csts.rs │ │ ├── bkp_ctrl.rs │ │ ├── bkp_dat1.rs │ │ ├── bkp_dat10.rs │ │ ├── bkp_dat11.rs │ │ ├── bkp_dat12.rs │ │ ├── bkp_dat13.rs │ │ ├── bkp_dat14.rs │ │ ├── bkp_dat15.rs │ │ ├── bkp_dat16.rs │ │ ├── bkp_dat17.rs │ │ ├── bkp_dat18.rs │ │ ├── bkp_dat19.rs │ │ ├── bkp_dat2.rs │ │ ├── bkp_dat20.rs │ │ ├── bkp_dat21.rs │ │ ├── bkp_dat22.rs │ │ ├── bkp_dat23.rs │ │ ├── bkp_dat24.rs │ │ ├── bkp_dat25.rs │ │ ├── bkp_dat26.rs │ │ ├── bkp_dat27.rs │ │ ├── bkp_dat28.rs │ │ ├── bkp_dat29.rs │ │ ├── bkp_dat3.rs │ │ ├── bkp_dat30.rs │ │ ├── bkp_dat31.rs │ │ ├── bkp_dat32.rs │ │ ├── bkp_dat33.rs │ │ ├── bkp_dat34.rs │ │ ├── bkp_dat35.rs │ │ ├── bkp_dat36.rs │ │ ├── bkp_dat37.rs │ │ ├── bkp_dat38.rs │ │ ├── bkp_dat39.rs │ │ ├── bkp_dat4.rs │ │ ├── bkp_dat40.rs │ │ ├── bkp_dat41.rs │ │ ├── bkp_dat42.rs │ │ ├── bkp_dat5.rs │ │ ├── bkp_dat6.rs │ │ ├── bkp_dat7.rs │ │ ├── bkp_dat8.rs │ │ └── bkp_dat9.rs │ │ ├── can1.rs │ │ ├── can1 │ │ ├── can_btim.rs │ │ ├── can_ests.rs │ │ ├── can_f0b1.rs │ │ ├── can_f0b2.rs │ │ ├── can_f13b1.rs │ │ ├── can_f13b2.rs │ │ ├── can_f1b1.rs │ │ ├── can_f1b2.rs │ │ ├── can_fa1.rs │ │ ├── can_ffa1.rs │ │ ├── can_fm1.rs │ │ ├── can_fmc.rs │ │ ├── can_fs1.rs │ │ ├── can_inte.rs │ │ ├── can_mctrl.rs │ │ ├── can_msts.rs │ │ ├── can_rff0.rs │ │ ├── can_rff1.rs │ │ ├── can_rmdh0.rs │ │ ├── can_rmdh1.rs │ │ ├── can_rmdl0.rs │ │ ├── can_rmdl1.rs │ │ ├── can_rmdt0.rs │ │ ├── can_rmdt1.rs │ │ ├── can_rmi0.rs │ │ ├── can_rmi1.rs │ │ ├── can_tmdh0.rs │ │ ├── can_tmdh1.rs │ │ ├── can_tmdh2.rs │ │ ├── can_tmdl0.rs │ │ ├── can_tmdl1.rs │ │ ├── can_tmdl2.rs │ │ ├── can_tmdt0.rs │ │ ├── can_tmdt1.rs │ │ ├── can_tmdt2.rs │ │ ├── can_tmi0.rs │ │ ├── can_tmi1.rs │ │ ├── can_tmi2.rs │ │ └── can_tsts.rs │ │ ├── comp.rs │ │ ├── comp │ │ ├── comp1_ctrl.rs │ │ ├── comp1_filc.rs │ │ ├── comp1_filp.rs │ │ ├── comp2_ctrl.rs │ │ ├── comp2_filc.rs │ │ ├── comp2_filp.rs │ │ ├── comp3_ctrl.rs │ │ ├── comp3_filc.rs │ │ ├── comp3_filp.rs │ │ ├── comp4_ctrl.rs │ │ ├── comp4_filc.rs │ │ ├── comp4_filp.rs │ │ ├── comp5_ctrl.rs │ │ ├── comp5_filc.rs │ │ ├── comp5_filp.rs │ │ ├── comp6_ctrl.rs │ │ ├── comp6_filc.rs │ │ ├── comp6_filp.rs │ │ ├── comp7_ctrl.rs │ │ ├── comp7_filc.rs │ │ ├── comp7_filp.rs │ │ ├── comp_inten.rs │ │ ├── comp_intsts.rs │ │ ├── comp_lock.rs │ │ ├── comp_vrefscl.rs │ │ └── comp_winmode.rs │ │ ├── crc.rs │ │ ├── crc │ │ ├── crc16ctrl.rs │ │ ├── crc16d.rs │ │ ├── crc16dat.rs │ │ ├── crc32ctrl.rs │ │ ├── crc32dat.rs │ │ ├── crc32idat.rs │ │ └── lrc.rs │ │ ├── dac.rs │ │ ├── dac │ │ ├── dac_ctrl.rs │ │ ├── dac_dato1.rs │ │ ├── dac_dato2.rs │ │ ├── dac_dl12ch1.rs │ │ ├── dac_dl12ch2.rs │ │ ├── dac_dl12dch.rs │ │ ├── dac_dr12ch1.rs │ │ ├── dac_dr12ch2.rs │ │ ├── dac_dr12dch.rs │ │ ├── dac_dr8ch1.rs │ │ ├── dac_dr8ch2.rs │ │ ├── dac_dr8dch.rs │ │ └── dac_sottr.rs │ │ ├── dbg.rs │ │ ├── dbg │ │ ├── dbg_ctrl.rs │ │ └── dbg_id.rs │ │ ├── dma1.rs │ │ ├── dma1 │ │ ├── dma_chcfg1.rs │ │ ├── dma_chcfg2.rs │ │ ├── dma_chcfg3.rs │ │ ├── dma_chcfg4.rs │ │ ├── dma_chcfg5.rs │ │ ├── dma_chcfg6.rs │ │ ├── dma_chcfg7.rs │ │ ├── dma_chcfg8.rs │ │ ├── dma_chmapen.rs │ │ ├── dma_chsel1.rs │ │ ├── dma_chsel2.rs │ │ ├── dma_chsel3.rs │ │ ├── dma_chsel4.rs │ │ ├── dma_chsel5.rs │ │ ├── dma_chsel6.rs │ │ ├── dma_chsel7.rs │ │ ├── dma_chsel8.rs │ │ ├── dma_intclr.rs │ │ ├── dma_intsts.rs │ │ ├── dma_maddr1.rs │ │ ├── dma_maddr2.rs │ │ ├── dma_maddr3.rs │ │ ├── dma_maddr4.rs │ │ ├── dma_maddr5.rs │ │ ├── dma_maddr6.rs │ │ ├── dma_maddr7.rs │ │ ├── dma_maddr8.rs │ │ ├── dma_paddr1.rs │ │ ├── dma_paddr2.rs │ │ ├── dma_paddr3.rs │ │ ├── dma_paddr4.rs │ │ ├── dma_paddr5.rs │ │ ├── dma_paddr6.rs │ │ ├── dma_paddr7.rs │ │ ├── dma_paddr8.rs │ │ ├── dma_txnum1.rs │ │ ├── dma_txnum2.rs │ │ ├── dma_txnum3.rs │ │ ├── dma_txnum4.rs │ │ ├── dma_txnum5.rs │ │ ├── dma_txnum6.rs │ │ ├── dma_txnum7.rs │ │ └── dma_txnum8.rs │ │ ├── dma2.rs │ │ ├── dma2 │ │ ├── dma_chcfg1.rs │ │ ├── dma_chcfg2.rs │ │ ├── dma_chcfg3.rs │ │ ├── dma_chcfg4.rs │ │ ├── dma_chcfg5.rs │ │ ├── dma_chcfg6.rs │ │ ├── dma_chcfg7.rs │ │ ├── dma_chcfg8.rs │ │ ├── dma_chmapen.rs │ │ ├── dma_chsel1.rs │ │ ├── dma_chsel2.rs │ │ ├── dma_chsel3.rs │ │ ├── dma_chsel4.rs │ │ ├── dma_chsel5.rs │ │ ├── dma_chsel6.rs │ │ ├── dma_chsel7.rs │ │ ├── dma_chsel8.rs │ │ ├── dma_intclr.rs │ │ ├── dma_intsts.rs │ │ ├── dma_maddr1.rs │ │ ├── dma_maddr2.rs │ │ ├── dma_maddr3.rs │ │ ├── dma_maddr4.rs │ │ ├── dma_maddr5.rs │ │ ├── dma_maddr6.rs │ │ ├── dma_maddr7.rs │ │ ├── dma_maddr8.rs │ │ ├── dma_paddr1.rs │ │ ├── dma_paddr2.rs │ │ ├── dma_paddr3.rs │ │ ├── dma_paddr4.rs │ │ ├── dma_paddr5.rs │ │ ├── dma_paddr6.rs │ │ ├── dma_paddr7.rs │ │ ├── dma_paddr8.rs │ │ ├── dma_txnum1.rs │ │ ├── dma_txnum2.rs │ │ ├── dma_txnum3.rs │ │ ├── dma_txnum4.rs │ │ ├── dma_txnum5.rs │ │ ├── dma_txnum6.rs │ │ ├── dma_txnum7.rs │ │ └── dma_txnum8.rs │ │ ├── eclic.rs │ │ ├── eclic │ │ ├── cliccfg.rs │ │ ├── clicinfo.rs │ │ ├── clicint1.rs │ │ ├── clicint10.rs │ │ ├── clicint100.rs │ │ ├── clicint101.rs │ │ ├── clicint102.rs │ │ ├── clicint103.rs │ │ ├── clicint104.rs │ │ ├── clicint11.rs │ │ ├── clicint12.rs │ │ ├── clicint13.rs │ │ ├── clicint14.rs │ │ ├── clicint15.rs │ │ ├── clicint16.rs │ │ ├── clicint17.rs │ │ ├── clicint18.rs │ │ ├── clicint19.rs │ │ ├── clicint2.rs │ │ ├── clicint20.rs │ │ ├── clicint21.rs │ │ ├── clicint22.rs │ │ ├── clicint23.rs │ │ ├── clicint24.rs │ │ ├── clicint25.rs │ │ ├── clicint26.rs │ │ ├── clicint27.rs │ │ ├── clicint28.rs │ │ ├── clicint29.rs │ │ ├── clicint3.rs │ │ ├── clicint30.rs │ │ ├── clicint31.rs │ │ ├── clicint32.rs │ │ ├── clicint33.rs │ │ ├── clicint34.rs │ │ ├── clicint35.rs │ │ ├── clicint36.rs │ │ ├── clicint37.rs │ │ ├── clicint38.rs │ │ ├── clicint39.rs │ │ ├── clicint4.rs │ │ ├── clicint40.rs │ │ ├── clicint41.rs │ │ ├── clicint42.rs │ │ ├── clicint43.rs │ │ ├── clicint44.rs │ │ ├── clicint45.rs │ │ ├── clicint46.rs │ │ ├── clicint47.rs │ │ ├── clicint48.rs │ │ ├── clicint49.rs │ │ ├── clicint5.rs │ │ ├── clicint50.rs │ │ ├── clicint51.rs │ │ ├── clicint52.rs │ │ ├── clicint53.rs │ │ ├── clicint54.rs │ │ ├── clicint55.rs │ │ ├── clicint56.rs │ │ ├── clicint57.rs │ │ ├── clicint58.rs │ │ ├── clicint59.rs │ │ ├── clicint6.rs │ │ ├── clicint60.rs │ │ ├── clicint61.rs │ │ ├── clicint62.rs │ │ ├── clicint63.rs │ │ ├── clicint64.rs │ │ ├── clicint65.rs │ │ ├── clicint66.rs │ │ ├── clicint67.rs │ │ ├── clicint68.rs │ │ ├── clicint69.rs │ │ ├── clicint7.rs │ │ ├── clicint70.rs │ │ ├── clicint71.rs │ │ ├── clicint72.rs │ │ ├── clicint73.rs │ │ ├── clicint74.rs │ │ ├── clicint75.rs │ │ ├── clicint76.rs │ │ ├── clicint77.rs │ │ ├── clicint78.rs │ │ ├── clicint79.rs │ │ ├── clicint8.rs │ │ ├── clicint80.rs │ │ ├── clicint81.rs │ │ ├── clicint82.rs │ │ ├── clicint83.rs │ │ ├── clicint84.rs │ │ ├── clicint85.rs │ │ ├── clicint86.rs │ │ ├── clicint87.rs │ │ ├── clicint88.rs │ │ ├── clicint89.rs │ │ ├── clicint9.rs │ │ ├── clicint90.rs │ │ ├── clicint91.rs │ │ ├── clicint92.rs │ │ ├── clicint93.rs │ │ ├── clicint94.rs │ │ ├── clicint95.rs │ │ ├── clicint96.rs │ │ ├── clicint97.rs │ │ ├── clicint98.rs │ │ ├── clicint99.rs │ │ └── mth.rs │ │ ├── exti.rs │ │ ├── exti │ │ ├── exti_emask.rs │ │ ├── exti_ft_cfg.rs │ │ ├── exti_imask.rs │ │ ├── exti_pend.rs │ │ ├── exti_rt_cfg.rs │ │ ├── exti_swie.rs │ │ └── exti_ts_sel.rs │ │ ├── flash.rs │ │ ├── flash │ │ ├── flash_ac.rs │ │ ├── flash_add.rs │ │ ├── flash_cahr.rs │ │ ├── flash_ctrl.rs │ │ ├── flash_eccr.rs │ │ ├── flash_key.rs │ │ ├── flash_ob.rs │ │ ├── flash_optkey.rs │ │ ├── flash_rdn.rs │ │ ├── flash_sts.rs │ │ └── flash_wrp.rs │ │ ├── generic.rs │ │ ├── gpioa.rs │ │ ├── gpioa │ │ ├── gpiox_ds_cfg.rs │ │ ├── gpiox_pbc.rs │ │ ├── gpiox_pbsc.rs │ │ ├── gpiox_ph_cfg.rs │ │ ├── gpiox_pid.rs │ │ ├── gpiox_pl_cfg.rs │ │ ├── gpiox_plock_cfg.rs │ │ ├── gpiox_pod.rs │ │ └── gpiox_sr_cfg.rs │ │ ├── i2c1.rs │ │ ├── i2c1 │ │ ├── i2c_clkctrl.rs │ │ ├── i2c_ctrl1.rs │ │ ├── i2c_ctrl2.rs │ │ ├── i2c_dat.rs │ │ ├── i2c_oaddr1.rs │ │ ├── i2c_oaddr2.rs │ │ ├── i2c_sts1.rs │ │ ├── i2c_sts2.rs │ │ └── i2c_tmrise.rs │ │ ├── i2c2.rs │ │ ├── i2c2 │ │ ├── i2c_clkctrl.rs │ │ ├── i2c_ctrl1.rs │ │ ├── i2c_ctrl2.rs │ │ ├── i2c_dat.rs │ │ ├── i2c_oaddr1.rs │ │ ├── i2c_oaddr2.rs │ │ ├── i2c_sts1.rs │ │ ├── i2c_sts2.rs │ │ └── i2c_tmrise.rs │ │ ├── i2c3.rs │ │ ├── i2c3 │ │ ├── i2c_clkctrl.rs │ │ ├── i2c_ctrl1.rs │ │ ├── i2c_ctrl2.rs │ │ ├── i2c_dat.rs │ │ ├── i2c_oaddr1.rs │ │ ├── i2c_oaddr2.rs │ │ ├── i2c_sts1.rs │ │ ├── i2c_sts2.rs │ │ └── i2c_tmrise.rs │ │ ├── i2c4.rs │ │ ├── i2c4 │ │ ├── i2c_clkctrl.rs │ │ ├── i2c_ctrl1.rs │ │ ├── i2c_ctrl2.rs │ │ ├── i2c_dat.rs │ │ ├── i2c_oaddr1.rs │ │ ├── i2c_oaddr2.rs │ │ ├── i2c_sts1.rs │ │ ├── i2c_sts2.rs │ │ └── i2c_tmrise.rs │ │ ├── interrupt.rs │ │ ├── iwdg.rs │ │ ├── iwdg │ │ ├── iwdg_key.rs │ │ ├── iwdg_prediv.rs │ │ ├── iwdg_relv.rs │ │ └── iwdg_sts.rs │ │ ├── lib.rs │ │ ├── opamp.rs │ │ ├── opamp │ │ ├── opa_cs1.rs │ │ ├── opa_cs2.rs │ │ ├── opa_cs3.rs │ │ ├── opa_cs4.rs │ │ └── opa_lock.rs │ │ ├── pwr.rs │ │ ├── pwr │ │ ├── pwr_ctrl1.rs │ │ ├── pwr_ctrl2.rs │ │ ├── pwr_ctrl3.rs │ │ ├── pwr_ctrl4.rs │ │ ├── pwr_ctrl5.rs │ │ ├── pwr_ctrl6.rs │ │ ├── pwr_ctrl7.rs │ │ └── pwr_ctrlsts.rs │ │ ├── qspi.rs │ │ ├── qspi │ │ ├── qspi_baud.rs │ │ ├── qspi_ctrl0.rs │ │ ├── qspi_ctrl1.rs │ │ ├── qspi_datx.rs │ │ ├── qspi_ddr_txde.rs │ │ ├── qspi_dma_ctrl.rs │ │ ├── qspi_dmardl_ctrl.rs │ │ ├── qspi_dmatdl_ctrl.rs │ │ ├── qspi_en.rs │ │ ├── qspi_enh_ctrl0.rs │ │ ├── qspi_iclr.rs │ │ ├── qspi_idcode.rs │ │ ├── qspi_imask.rs │ │ ├── qspi_ists.rs │ │ ├── qspi_mmc_clr.rs │ │ ├── qspi_mw_ctrl.rs │ │ ├── qspi_rists.rs │ │ ├── qspi_rs_delay.rs │ │ ├── qspi_rxfn.rs │ │ ├── qspi_rxfoi_clr.rs │ │ ├── qspi_rxft.rs │ │ ├── qspi_rxfui_clr.rs │ │ ├── qspi_slave_en.rs │ │ ├── qspi_sts.rs │ │ ├── qspi_txfn.rs │ │ ├── qspi_txfoi_clr.rs │ │ ├── qspi_txft.rs │ │ ├── xip_ctrl.rs │ │ ├── xip_incr_toc.rs │ │ ├── xip_mode.rs │ │ ├── xip_rxfoi_clr.rs │ │ ├── xip_slave_en.rs │ │ ├── xip_tout.rs │ │ └── xip_wrap_toc.rs │ │ ├── rcc.rs │ │ ├── rcc │ │ ├── rcc_ahbpclken.rs │ │ ├── rcc_ahbprst.rs │ │ ├── rcc_apb1pclken.rs │ │ ├── rcc_apb1prst.rs │ │ ├── rcc_apb2pclken.rs │ │ ├── rcc_apb2prst.rs │ │ ├── rcc_bdctrl.rs │ │ ├── rcc_cfg.rs │ │ ├── rcc_cfg2.rs │ │ ├── rcc_cfg3.rs │ │ ├── rcc_clkint.rs │ │ ├── rcc_ctrl.rs │ │ └── rcc_ctrlsts.rs │ │ ├── rngc.rs │ │ ├── rngc │ │ ├── rng_con.rs │ │ ├── rng_con_wr_ready.rs │ │ ├── rng_data.rs │ │ └── rng_ready.rs │ │ ├── rtc.rs │ │ ├── rtc │ │ ├── rtc_alarma.rs │ │ ├── rtc_alarmb.rs │ │ ├── rtc_alrmass.rs │ │ ├── rtc_alrmbss.rs │ │ ├── rtc_calib.rs │ │ ├── rtc_ctrl.rs │ │ ├── rtc_date.rs │ │ ├── rtc_initsts.rs │ │ ├── rtc_opt.rs │ │ ├── rtc_pre.rs │ │ ├── rtc_sctrl.rs │ │ ├── rtc_subs.rs │ │ ├── rtc_tscwkupcnt.rs │ │ ├── rtc_tscwkupctrl.rs │ │ ├── rtc_tsd.rs │ │ ├── rtc_tsh.rs │ │ ├── rtc_tsss.rs │ │ ├── rtc_tst.rs │ │ ├── rtc_wkupt.rs │ │ └── rtc_wrp.rs │ │ ├── spi1.rs │ │ ├── spi1 │ │ ├── spi_crcpoly.rs │ │ ├── spi_crcrdat.rs │ │ ├── spi_crctdat.rs │ │ ├── spi_ctrl1.rs │ │ ├── spi_ctrl2.rs │ │ ├── spi_dat.rs │ │ ├── spi_i2scfg.rs │ │ ├── spi_i2sprediv.rs │ │ └── spi_sts.rs │ │ ├── spi2.rs │ │ ├── spi2 │ │ ├── spi_crcpoly.rs │ │ ├── spi_crcrdat.rs │ │ ├── spi_crctdat.rs │ │ ├── spi_ctrl1.rs │ │ ├── spi_ctrl2.rs │ │ ├── spi_dat.rs │ │ ├── spi_i2scfg.rs │ │ ├── spi_i2sprediv.rs │ │ └── spi_sts.rs │ │ ├── spi3.rs │ │ ├── spi3 │ │ ├── spi_crcpoly.rs │ │ ├── spi_crcrdat.rs │ │ ├── spi_crctdat.rs │ │ ├── spi_ctrl1.rs │ │ ├── spi_ctrl2.rs │ │ ├── spi_dat.rs │ │ ├── spi_i2scfg.rs │ │ ├── spi_i2sprediv.rs │ │ └── spi_sts.rs │ │ ├── tim1.rs │ │ ├── tim1 │ │ ├── timx_ar.rs │ │ ├── timx_bkdt.rs │ │ ├── timx_ccdat1.rs │ │ ├── timx_ccdat2.rs │ │ ├── timx_ccdat3.rs │ │ ├── timx_ccdat4.rs │ │ ├── timx_ccdat6.rs │ │ ├── timx_ccen.rs │ │ ├── timx_ccmod1.rs │ │ ├── timx_ccmod2.rs │ │ ├── timx_ccmod3.rs │ │ ├── timx_cnt.rs │ │ ├── timx_ctrl1.rs │ │ ├── timx_ctrl2.rs │ │ ├── timx_daddr.rs │ │ ├── timx_dctrl.rs │ │ ├── timx_dinten.rs │ │ ├── timx_evtgen.rs │ │ ├── timx_psc.rs │ │ ├── timx_repcnt.rs │ │ ├── timx_smctrl.rs │ │ └── timx_sts.rs │ │ ├── tim2.rs │ │ ├── tim2 │ │ ├── timx_ar.rs │ │ ├── timx_bkdt.rs │ │ ├── timx_ccdat1.rs │ │ ├── timx_ccdat2.rs │ │ ├── timx_ccdat3.rs │ │ ├── timx_ccdat4.rs │ │ ├── timx_ccdat6.rs │ │ ├── timx_ccen.rs │ │ ├── timx_ccmod1.rs │ │ ├── timx_ccmod2.rs │ │ ├── timx_ccmod3.rs │ │ ├── timx_cnt.rs │ │ ├── timx_ctrl1.rs │ │ ├── timx_ctrl2.rs │ │ ├── timx_daddr.rs │ │ ├── timx_dctrl.rs │ │ ├── timx_dinten.rs │ │ ├── timx_evtgen.rs │ │ ├── timx_psc.rs │ │ ├── timx_repcnt.rs │ │ ├── timx_smctrl.rs │ │ └── timx_sts.rs │ │ ├── tim6.rs │ │ ├── tim6 │ │ ├── timx_ar.rs │ │ ├── timx_bkdt.rs │ │ ├── timx_ccdat1.rs │ │ ├── timx_ccdat2.rs │ │ ├── timx_ccdat3.rs │ │ ├── timx_ccdat4.rs │ │ ├── timx_ccdat6.rs │ │ ├── timx_ccen.rs │ │ ├── timx_ccmod1.rs │ │ ├── timx_ccmod2.rs │ │ ├── timx_ccmod3.rs │ │ ├── timx_cnt.rs │ │ ├── timx_ctrl1.rs │ │ ├── timx_ctrl2.rs │ │ ├── timx_daddr.rs │ │ ├── timx_dctrl.rs │ │ ├── timx_dinten.rs │ │ ├── timx_evtgen.rs │ │ ├── timx_psc.rs │ │ ├── timx_repcnt.rs │ │ ├── timx_smctrl.rs │ │ └── timx_sts.rs │ │ ├── tim8.rs │ │ ├── tim8 │ │ ├── timx_ar.rs │ │ ├── timx_bkdt.rs │ │ ├── timx_ccdat1.rs │ │ ├── timx_ccdat2.rs │ │ ├── timx_ccdat3.rs │ │ ├── timx_ccdat4.rs │ │ ├── timx_ccdat6.rs │ │ ├── timx_ccen.rs │ │ ├── timx_ccmod1.rs │ │ ├── timx_ccmod2.rs │ │ ├── timx_ccmod3.rs │ │ ├── timx_cnt.rs │ │ ├── timx_ctrl1.rs │ │ ├── timx_ctrl2.rs │ │ ├── timx_daddr.rs │ │ ├── timx_dctrl.rs │ │ ├── timx_dinten.rs │ │ ├── timx_evtgen.rs │ │ ├── timx_psc.rs │ │ ├── timx_repcnt.rs │ │ ├── timx_smctrl.rs │ │ └── timx_sts.rs │ │ ├── tsc.rs │ │ ├── tsc │ │ ├── tsc_ana_ctrl.rs │ │ ├── tsc_ana_sel.rs │ │ ├── tsc_chnen.rs │ │ ├── tsc_ctrl.rs │ │ ├── tsc_resr0.rs │ │ ├── tsc_resr1.rs │ │ ├── tsc_resr2.rs │ │ ├── tsc_sts.rs │ │ ├── tsc_thrhd0.rs │ │ ├── tsc_thrhd1.rs │ │ ├── tsc_thrhd10.rs │ │ ├── tsc_thrhd11.rs │ │ ├── tsc_thrhd12.rs │ │ ├── tsc_thrhd13.rs │ │ ├── tsc_thrhd14.rs │ │ ├── tsc_thrhd15.rs │ │ ├── tsc_thrhd16.rs │ │ ├── tsc_thrhd17.rs │ │ ├── tsc_thrhd18.rs │ │ ├── tsc_thrhd19.rs │ │ ├── tsc_thrhd2.rs │ │ ├── tsc_thrhd20.rs │ │ ├── tsc_thrhd21.rs │ │ ├── tsc_thrhd22.rs │ │ ├── tsc_thrhd23.rs │ │ ├── tsc_thrhd3.rs │ │ ├── tsc_thrhd4.rs │ │ ├── tsc_thrhd5.rs │ │ ├── tsc_thrhd6.rs │ │ ├── tsc_thrhd7.rs │ │ ├── tsc_thrhd8.rs │ │ └── tsc_thrhd9.rs │ │ ├── uart4.rs │ │ ├── uart4 │ │ ├── usart_brcf.rs │ │ ├── usart_ctrl1.rs │ │ ├── usart_ctrl2.rs │ │ ├── usart_ctrl3.rs │ │ ├── usart_dat.rs │ │ ├── usart_gtp.rs │ │ └── usart_sts.rs │ │ ├── usart1.rs │ │ ├── usart1 │ │ ├── usart_brcf.rs │ │ ├── usart_ctrl1.rs │ │ ├── usart_ctrl2.rs │ │ ├── usart_ctrl3.rs │ │ ├── usart_dat.rs │ │ ├── usart_gtp.rs │ │ └── usart_sts.rs │ │ ├── wwdg.rs │ │ └── wwdg │ │ ├── wwdg_cfg.rs │ │ ├── wwdg_ctrl.rs │ │ └── wwdg_sts.rs ├── gd32vf103-pac │ ├── CODE_OF_CONDUCT.md │ ├── Cargo.toml │ ├── GD32VF103.svd │ ├── README.md │ ├── librs-patch │ ├── patches │ │ └── gd32vf103.yaml │ ├── src │ │ ├── adc0.rs │ │ ├── adc0 │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── idata0.rs │ │ │ ├── idata1.rs │ │ │ ├── idata2.rs │ │ │ ├── idata3.rs │ │ │ ├── ioff0.rs │ │ │ ├── ioff1.rs │ │ │ ├── ioff2.rs │ │ │ ├── ioff3.rs │ │ │ ├── isq.rs │ │ │ ├── ovsampctl.rs │ │ │ ├── rdata.rs │ │ │ ├── rsq0.rs │ │ │ ├── rsq1.rs │ │ │ ├── rsq2.rs │ │ │ ├── sampt0.rs │ │ │ ├── sampt1.rs │ │ │ ├── stat.rs │ │ │ ├── wdht.rs │ │ │ └── wdlt.rs │ │ ├── adc1.rs │ │ ├── adc1 │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── idata0.rs │ │ │ ├── idata1.rs │ │ │ ├── idata2.rs │ │ │ ├── idata3.rs │ │ │ ├── ioff0.rs │ │ │ ├── ioff1.rs │ │ │ ├── ioff2.rs │ │ │ ├── ioff3.rs │ │ │ ├── isq.rs │ │ │ ├── rdata.rs │ │ │ ├── rsq0.rs │ │ │ ├── rsq1.rs │ │ │ ├── rsq2.rs │ │ │ ├── sampt0.rs │ │ │ ├── sampt1.rs │ │ │ ├── stat.rs │ │ │ ├── wdht.rs │ │ │ └── wdlt.rs │ │ ├── afio.rs │ │ ├── afio │ │ │ ├── ec.rs │ │ │ ├── extiss0.rs │ │ │ ├── extiss1.rs │ │ │ ├── extiss2.rs │ │ │ ├── extiss3.rs │ │ │ ├── pcf0.rs │ │ │ └── pcf1.rs │ │ ├── bkp.rs │ │ ├── bkp │ │ │ ├── data0.rs │ │ │ ├── data1.rs │ │ │ ├── data10.rs │ │ │ ├── data11.rs │ │ │ ├── data12.rs │ │ │ ├── data13.rs │ │ │ ├── data14.rs │ │ │ ├── data15.rs │ │ │ ├── data16.rs │ │ │ ├── data17.rs │ │ │ ├── data18.rs │ │ │ ├── data19.rs │ │ │ ├── data2.rs │ │ │ ├── data20.rs │ │ │ ├── data21.rs │ │ │ ├── data22.rs │ │ │ ├── data23.rs │ │ │ ├── data24.rs │ │ │ ├── data25.rs │ │ │ ├── data26.rs │ │ │ ├── data27.rs │ │ │ ├── data28.rs │ │ │ ├── data29.rs │ │ │ ├── data3.rs │ │ │ ├── data30.rs │ │ │ ├── data31.rs │ │ │ ├── data32.rs │ │ │ ├── data33.rs │ │ │ ├── data34.rs │ │ │ ├── data35.rs │ │ │ ├── data36.rs │ │ │ ├── data37.rs │ │ │ ├── data38.rs │ │ │ ├── data39.rs │ │ │ ├── data4.rs │ │ │ ├── data40.rs │ │ │ ├── data41.rs │ │ │ ├── data5.rs │ │ │ ├── data6.rs │ │ │ ├── data7.rs │ │ │ ├── data8.rs │ │ │ ├── data9.rs │ │ │ ├── octl.rs │ │ │ ├── tpcs.rs │ │ │ └── tpctl.rs │ │ ├── can0.rs │ │ ├── can0 │ │ │ ├── bt.rs │ │ │ ├── ctl.rs │ │ │ ├── err.rs │ │ │ ├── f0data0.rs │ │ │ ├── f0data1.rs │ │ │ ├── f10data0.rs │ │ │ ├── f10data1.rs │ │ │ ├── f11data0.rs │ │ │ ├── f11data1.rs │ │ │ ├── f12data0.rs │ │ │ ├── f12data1.rs │ │ │ ├── f13data0.rs │ │ │ ├── f13data1.rs │ │ │ ├── f14data0.rs │ │ │ ├── f14data1.rs │ │ │ ├── f15data0.rs │ │ │ ├── f15data1.rs │ │ │ ├── f16data0.rs │ │ │ ├── f16data1.rs │ │ │ ├── f17data0.rs │ │ │ ├── f17data1.rs │ │ │ ├── f18data0.rs │ │ │ ├── f18data1.rs │ │ │ ├── f19data0.rs │ │ │ ├── f19data1.rs │ │ │ ├── f1data0.rs │ │ │ ├── f1data1.rs │ │ │ ├── f20data0.rs │ │ │ ├── f20data1.rs │ │ │ ├── f21data0.rs │ │ │ ├── f21data1.rs │ │ │ ├── f22data0.rs │ │ │ ├── f22data1.rs │ │ │ ├── f23data0.rs │ │ │ ├── f23data1.rs │ │ │ ├── f24data0.rs │ │ │ ├── f24data1.rs │ │ │ ├── f25data0.rs │ │ │ ├── f25data1.rs │ │ │ ├── f26data0.rs │ │ │ ├── f26data1.rs │ │ │ ├── f27data0.rs │ │ │ ├── f27data1.rs │ │ │ ├── f2data0.rs │ │ │ ├── f2data1.rs │ │ │ ├── f3data0.rs │ │ │ ├── f3data1.rs │ │ │ ├── f4data0.rs │ │ │ ├── f4data1.rs │ │ │ ├── f5data0.rs │ │ │ ├── f5data1.rs │ │ │ ├── f6data0.rs │ │ │ ├── f6data1.rs │ │ │ ├── f7data0.rs │ │ │ ├── f7data1.rs │ │ │ ├── f8data0.rs │ │ │ ├── f8data1.rs │ │ │ ├── f9data0.rs │ │ │ ├── f9data1.rs │ │ │ ├── fafifo.rs │ │ │ ├── fctl.rs │ │ │ ├── fmcfg.rs │ │ │ ├── fscfg.rs │ │ │ ├── fw.rs │ │ │ ├── inten.rs │ │ │ ├── rfifo0.rs │ │ │ ├── rfifo1.rs │ │ │ ├── rfifomdata00.rs │ │ │ ├── rfifomdata01.rs │ │ │ ├── rfifomdata10.rs │ │ │ ├── rfifomdata11.rs │ │ │ ├── rfifomi0.rs │ │ │ ├── rfifomi1.rs │ │ │ ├── rfifomp0.rs │ │ │ ├── rfifomp1.rs │ │ │ ├── stat.rs │ │ │ ├── tmdata00.rs │ │ │ ├── tmdata01.rs │ │ │ ├── tmdata02.rs │ │ │ ├── tmdata10.rs │ │ │ ├── tmdata11.rs │ │ │ ├── tmdata12.rs │ │ │ ├── tmi0.rs │ │ │ ├── tmi1.rs │ │ │ ├── tmi2.rs │ │ │ ├── tmp0.rs │ │ │ ├── tmp1.rs │ │ │ ├── tmp2.rs │ │ │ └── tstat.rs │ │ ├── crc.rs │ │ ├── crc │ │ │ ├── ctl.rs │ │ │ ├── data.rs │ │ │ └── fdata.rs │ │ ├── ctimer.rs │ │ ├── ctimer │ │ │ ├── msip.rs │ │ │ ├── mstop.rs │ │ │ ├── mtime_hi.rs │ │ │ ├── mtime_lo.rs │ │ │ ├── mtimecmp_hi.rs │ │ │ └── mtimecmp_lo.rs │ │ ├── dac.rs │ │ ├── dac │ │ │ ├── ctl.rs │ │ │ ├── dac0_do.rs │ │ │ ├── dac0_l12dh.rs │ │ │ ├── dac0_r12dh.rs │ │ │ ├── dac0_r8dh.rs │ │ │ ├── dac1_do.rs │ │ │ ├── dac1_l12dh.rs │ │ │ ├── dac1_r12dh.rs │ │ │ ├── dac1_r8dh.rs │ │ │ ├── dacc_l12dh.rs │ │ │ ├── dacc_r12dh.rs │ │ │ ├── dacc_r8dh.rs │ │ │ └── swt.rs │ │ ├── dbg.rs │ │ ├── dbg │ │ │ ├── ctl.rs │ │ │ └── id.rs │ │ ├── dma0.rs │ │ ├── dma0 │ │ │ ├── ch0cnt.rs │ │ │ ├── ch0ctl.rs │ │ │ ├── ch0maddr.rs │ │ │ ├── ch0paddr.rs │ │ │ ├── ch1cnt.rs │ │ │ ├── ch1ctl.rs │ │ │ ├── ch1maddr.rs │ │ │ ├── ch1paddr.rs │ │ │ ├── ch2cnt.rs │ │ │ ├── ch2ctl.rs │ │ │ ├── ch2maddr.rs │ │ │ ├── ch2paddr.rs │ │ │ ├── ch3cnt.rs │ │ │ ├── ch3ctl.rs │ │ │ ├── ch3maddr.rs │ │ │ ├── ch3paddr.rs │ │ │ ├── ch4cnt.rs │ │ │ ├── ch4ctl.rs │ │ │ ├── ch4maddr.rs │ │ │ ├── ch4paddr.rs │ │ │ ├── ch5cnt.rs │ │ │ ├── ch5ctl.rs │ │ │ ├── ch5maddr.rs │ │ │ ├── ch5paddr.rs │ │ │ ├── ch6cnt.rs │ │ │ ├── ch6ctl.rs │ │ │ ├── ch6maddr.rs │ │ │ ├── ch6paddr.rs │ │ │ ├── intc.rs │ │ │ └── intf.rs │ │ ├── dma1.rs │ │ ├── dma1 │ │ │ ├── ch0cnt.rs │ │ │ ├── ch0ctl.rs │ │ │ ├── ch0maddr.rs │ │ │ ├── ch0paddr.rs │ │ │ ├── ch1cnt.rs │ │ │ ├── ch1ctl.rs │ │ │ ├── ch1maddr.rs │ │ │ ├── ch1paddr.rs │ │ │ ├── ch2cnt.rs │ │ │ ├── ch2ctl.rs │ │ │ ├── ch2maddr.rs │ │ │ ├── ch2paddr.rs │ │ │ ├── ch3cnt.rs │ │ │ ├── ch3ctl.rs │ │ │ ├── ch3maddr.rs │ │ │ ├── ch3paddr.rs │ │ │ ├── ch4cnt.rs │ │ │ ├── ch4ctl.rs │ │ │ ├── ch4maddr.rs │ │ │ ├── ch4paddr.rs │ │ │ ├── intc.rs │ │ │ └── intf.rs │ │ ├── eclic.rs │ │ ├── eclic │ │ │ ├── cliccfg.rs │ │ │ ├── clicinfo.rs │ │ │ ├── clicints.rs │ │ │ ├── clicints │ │ │ │ ├── clicintattr.rs │ │ │ │ ├── clicintctl.rs │ │ │ │ ├── clicintie.rs │ │ │ │ └── clicintip.rs │ │ │ └── mth.rs │ │ ├── exmc.rs │ │ ├── exmc │ │ │ ├── snctl0.rs │ │ │ ├── snctl1.rs │ │ │ └── sntcfg0.rs │ │ ├── exti.rs │ │ ├── exti │ │ │ ├── even.rs │ │ │ ├── ften.rs │ │ │ ├── inten.rs │ │ │ ├── pd.rs │ │ │ ├── rten.rs │ │ │ └── swiev.rs │ │ ├── fmc.rs │ │ ├── fmc │ │ │ ├── addr0.rs │ │ │ ├── ctl0.rs │ │ │ ├── key0.rs │ │ │ ├── obkey.rs │ │ │ ├── obstat.rs │ │ │ ├── pid.rs │ │ │ ├── stat0.rs │ │ │ ├── wp.rs │ │ │ └── ws.rs │ │ ├── fwdgt.rs │ │ ├── fwdgt │ │ │ ├── ctl.rs │ │ │ ├── psc.rs │ │ │ ├── rld.rs │ │ │ └── stat.rs │ │ ├── generic.rs │ │ ├── gpioa.rs │ │ ├── gpioa │ │ │ ├── bc.rs │ │ │ ├── bop.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── istat.rs │ │ │ ├── lock.rs │ │ │ └── octl.rs │ │ ├── i2c0.rs │ │ ├── i2c0 │ │ │ ├── ckcfg.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── data.rs │ │ │ ├── fmpcfg.rs │ │ │ ├── rt.rs │ │ │ ├── saddr0.rs │ │ │ ├── saddr1.rs │ │ │ ├── stat0.rs │ │ │ └── stat1.rs │ │ ├── interrupt.rs │ │ ├── lib.rs │ │ ├── pmu.rs │ │ ├── pmu │ │ │ ├── cs.rs │ │ │ └── ctl.rs │ │ ├── rcu.rs │ │ ├── rcu │ │ │ ├── ahben.rs │ │ │ ├── ahbrst.rs │ │ │ ├── apb1en.rs │ │ │ ├── apb1rst.rs │ │ │ ├── apb2en.rs │ │ │ ├── apb2rst.rs │ │ │ ├── bdctl.rs │ │ │ ├── cfg0.rs │ │ │ ├── cfg1.rs │ │ │ ├── ctl.rs │ │ │ ├── dsv.rs │ │ │ ├── int.rs │ │ │ └── rstsck.rs │ │ ├── rtc.rs │ │ ├── rtc │ │ │ ├── alrmh.rs │ │ │ ├── alrml.rs │ │ │ ├── cnth.rs │ │ │ ├── cntl.rs │ │ │ ├── ctl.rs │ │ │ ├── divh.rs │ │ │ ├── divl.rs │ │ │ ├── inten.rs │ │ │ ├── psch.rs │ │ │ └── pscl.rs │ │ ├── spi0.rs │ │ ├── spi0 │ │ │ ├── crcpoly.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── data.rs │ │ │ ├── i2sctl.rs │ │ │ ├── i2spsc.rs │ │ │ ├── rcrc.rs │ │ │ ├── stat.rs │ │ │ └── tcrc.rs │ │ ├── timer0.rs │ │ ├── timer0 │ │ │ ├── car.rs │ │ │ ├── cchp.rs │ │ │ ├── ch0cv.rs │ │ │ ├── ch1cv.rs │ │ │ ├── ch2cv.rs │ │ │ ├── ch3cv.rs │ │ │ ├── chctl0_input.rs │ │ │ ├── chctl0_output.rs │ │ │ ├── chctl1_input.rs │ │ │ ├── chctl1_output.rs │ │ │ ├── chctl2.rs │ │ │ ├── cnt.rs │ │ │ ├── crep.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── dmacfg.rs │ │ │ ├── dmainten.rs │ │ │ ├── dmatb.rs │ │ │ ├── intf.rs │ │ │ ├── psc.rs │ │ │ ├── smcfg.rs │ │ │ └── swevg.rs │ │ ├── timer1.rs │ │ ├── timer1 │ │ │ ├── car.rs │ │ │ ├── ch0cv.rs │ │ │ ├── ch1cv.rs │ │ │ ├── ch2cv.rs │ │ │ ├── ch3cv.rs │ │ │ ├── chctl0_input.rs │ │ │ ├── chctl0_output.rs │ │ │ ├── chctl1_input.rs │ │ │ ├── chctl1_output.rs │ │ │ ├── chctl2.rs │ │ │ ├── cnt.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── dmacfg.rs │ │ │ ├── dmainten.rs │ │ │ ├── dmatb.rs │ │ │ ├── intf.rs │ │ │ ├── psc.rs │ │ │ ├── smcfg.rs │ │ │ └── swevg.rs │ │ ├── timer5.rs │ │ ├── timer5 │ │ │ ├── car.rs │ │ │ ├── cnt.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── dmainten.rs │ │ │ ├── intf.rs │ │ │ ├── psc.rs │ │ │ └── swevg.rs │ │ ├── uart3.rs │ │ ├── uart3 │ │ │ ├── baud.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── ctl2.rs │ │ │ ├── data.rs │ │ │ ├── gp.rs │ │ │ └── stat.rs │ │ ├── usart0.rs │ │ ├── usart0 │ │ │ ├── baud.rs │ │ │ ├── ctl0.rs │ │ │ ├── ctl1.rs │ │ │ ├── ctl2.rs │ │ │ ├── data.rs │ │ │ ├── gp.rs │ │ │ └── stat.rs │ │ ├── usbfs_device.rs │ │ ├── usbfs_device │ │ │ ├── daepint.rs │ │ │ ├── daepinten.rs │ │ │ ├── dcfg.rs │ │ │ ├── dctl.rs │ │ │ ├── diep0ctl.rs │ │ │ ├── diep0intf.rs │ │ │ ├── diep0len.rs │ │ │ ├── diep0tfstat.rs │ │ │ ├── diep1ctl.rs │ │ │ ├── diep1intf.rs │ │ │ ├── diep1len.rs │ │ │ ├── diep1tfstat.rs │ │ │ ├── diep2ctl.rs │ │ │ ├── diep2intf.rs │ │ │ ├── diep2len.rs │ │ │ ├── diep2tfstat.rs │ │ │ ├── diep3ctl.rs │ │ │ ├── diep3intf.rs │ │ │ ├── diep3len.rs │ │ │ ├── diep3tfstat.rs │ │ │ ├── diepfeinten.rs │ │ │ ├── diepinten.rs │ │ │ ├── doep0ctl.rs │ │ │ ├── doep0intf.rs │ │ │ ├── doep0len.rs │ │ │ ├── doep1ctl.rs │ │ │ ├── doep1intf.rs │ │ │ ├── doep1len.rs │ │ │ ├── doep2ctl.rs │ │ │ ├── doep2intf.rs │ │ │ ├── doep2len.rs │ │ │ ├── doep3ctl.rs │ │ │ ├── doep3intf.rs │ │ │ ├── doep3len.rs │ │ │ ├── doepinten.rs │ │ │ ├── dstat.rs │ │ │ ├── dvbusdt.rs │ │ │ └── dvbuspt.rs │ │ ├── usbfs_global.rs │ │ ├── usbfs_global │ │ │ ├── cid.rs │ │ │ ├── diep0tflen.rs │ │ │ ├── diep1tflen.rs │ │ │ ├── diep2tflen.rs │ │ │ ├── diep3tflen.rs │ │ │ ├── gahbcs.rs │ │ │ ├── gccfg.rs │ │ │ ├── ginten.rs │ │ │ ├── gintf.rs │ │ │ ├── gotgcs.rs │ │ │ ├── gotgintf.rs │ │ │ ├── grflen.rs │ │ │ ├── grstatp_device.rs │ │ │ ├── grstatp_host.rs │ │ │ ├── grstatr_device.rs │ │ │ ├── grstatr_host.rs │ │ │ ├── grstctl.rs │ │ │ ├── gusbcs.rs │ │ │ ├── hnptflen.rs │ │ │ ├── hnptfqstat.rs │ │ │ └── hptflen.rs │ │ ├── usbfs_host.rs │ │ ├── usbfs_host │ │ │ ├── hachint.rs │ │ │ ├── hachinten.rs │ │ │ ├── hch0ctl.rs │ │ │ ├── hch0inten.rs │ │ │ ├── hch0intf.rs │ │ │ ├── hch0len.rs │ │ │ ├── hch1ctl.rs │ │ │ ├── hch1inten.rs │ │ │ ├── hch1intf.rs │ │ │ ├── hch1len.rs │ │ │ ├── hch2ctl.rs │ │ │ ├── hch2inten.rs │ │ │ ├── hch2intf.rs │ │ │ ├── hch2len.rs │ │ │ ├── hch3ctl.rs │ │ │ ├── hch3inten.rs │ │ │ ├── hch3intf.rs │ │ │ ├── hch3len.rs │ │ │ ├── hch4ctl.rs │ │ │ ├── hch4inten.rs │ │ │ ├── hch4intf.rs │ │ │ ├── hch4len.rs │ │ │ ├── hch5ctl.rs │ │ │ ├── hch5inten.rs │ │ │ ├── hch5intf.rs │ │ │ ├── hch5len.rs │ │ │ ├── hch6ctl.rs │ │ │ ├── hch6inten.rs │ │ │ ├── hch6intf.rs │ │ │ ├── hch6len.rs │ │ │ ├── hch7ctl.rs │ │ │ ├── hch7inten.rs │ │ │ ├── hch7intf.rs │ │ │ ├── hch7len.rs │ │ │ ├── hctl.rs │ │ │ ├── hfinfr.rs │ │ │ ├── hft.rs │ │ │ ├── hpcs.rs │ │ │ └── hptfqstat.rs │ │ ├── usbfs_pwrclk.rs │ │ ├── usbfs_pwrclk │ │ │ └── pwrclkctl.rs │ │ ├── wwdgt.rs │ │ └── wwdgt │ │ │ ├── cfg.rs │ │ │ ├── ctl.rs │ │ │ └── stat.rs │ └── update.sh └── gd32vf103xx-hal │ ├── CHANGELOG.md │ ├── CODE_OF_CONDUCT.md │ ├── Cargo.toml │ ├── README.md │ ├── assemble.sh │ ├── bin │ └── gd32vf103xx-hal.a │ ├── build.rs │ ├── eclic-mode-hack-xtask.S │ ├── eclic-mode-hack.S │ └── src │ ├── adc.rs │ ├── afio.rs │ ├── backup_domain.rs │ ├── delay.rs │ ├── dma.rs │ ├── eclic.rs │ ├── exmc.rs │ ├── exti.rs │ ├── gpio.rs │ ├── i2c.rs │ ├── lib.rs │ ├── prelude.rs │ ├── pwm.rs │ ├── rcu.rs │ ├── rtc.rs │ ├── serial.rs │ ├── signature.rs │ ├── spi.rs │ ├── time.rs │ ├── timer.rs │ └── watchdog.rs ├── rust-toolchain └── src ├── allocator.rs ├── arch ├── cortex_m │ └── mod.rs ├── mod.rs ├── riscv │ └── mod.rs └── x86_64 │ └── mod.rs ├── bsp ├── bluepill │ ├── led.rs │ ├── mod.rs │ └── stdout.rs ├── greenpill │ ├── led.rs │ ├── mod.rs │ └── stdout.rs ├── longan_nano │ ├── delay.rs │ ├── epd27b.rs │ ├── hcsr04.rs │ ├── kalman.rs │ ├── lcd.rs │ ├── led.rs │ ├── mod.rs │ └── stdout.rs ├── mod.rs └── rp_pico │ ├── led.rs │ ├── mod.rs │ └── stdout.rs ├── bus.rs ├── chip ├── cm32m4 │ ├── core_feature_eclic.h │ ├── eclic.rs │ ├── memory.x │ ├── mod.rs │ ├── port.S │ ├── port.rs │ ├── restore_ctx.S │ └── stdout.rs ├── env.rs ├── gd32vf103 │ ├── memory.x │ ├── mod.rs │ ├── port.S │ ├── port.rs │ ├── restore_ctx.S │ └── stdout.rs ├── mod.rs ├── rp2040 │ ├── memory.x │ ├── mod.rs │ ├── port.S │ ├── port.rs │ └── startup.S ├── stm32f1 │ ├── memory.x │ ├── mod.rs │ └── port.rs ├── stm32f4 │ ├── memory.x │ ├── mod.rs │ └── port.rs └── stm32h7 │ ├── memory.x │ ├── mod.rs │ └── port.rs ├── fs └── mod.rs ├── fsm.rs ├── lib.rs ├── logger.rs ├── net └── mod.rs ├── port.rs ├── prelude.rs ├── sync ├── arc.rs ├── broadcast.rs ├── free_queue.rs ├── mod.rs ├── mutex.rs ├── notify.rs ├── queue.rs └── semaphore.rs ├── task.rs ├── task ├── executor.rs ├── scheduler.rs └── scheduler │ ├── debug.rs │ ├── idle.rs │ ├── xtask.rs │ └── xworker.rs ├── time.rs └── timer.rs /.gitignore: -------------------------------------------------------------------------------- 1 | target 2 | Cargo.lock 3 | -------------------------------------------------------------------------------- /.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "editor.fontSize": 16, 3 | "window.zoomLevel": 2, 4 | "editor.formatOnSave": true, 5 | //"rust-analyzer.cargo.target": "thumbv7em-none-eabi", 6 | "rust-analyzer.cargo.target": "thumbv7em-none-eabihf", 7 | //"rust-analyzer.cargo.target": "riscv32imac-unknown-none-elf", 8 | //"rust-analyzer.cargo.target": "thumbv6m-none-eabi", 9 | "rust-analyzer.checkOnSave.allTargets": false, 10 | "rust-analyzer.lru.capacity": 1000, 11 | "files.associations": { 12 | "string.h": "c", 13 | "corecrt.h": "c", 14 | "vcruntime.h": "c", 15 | "corecrt_memory.h": "c", 16 | "vcruntime_string.h": "c" 17 | }, // 分析器最大缓存深度 18 | } -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2022 高庆丰 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /build.rs: -------------------------------------------------------------------------------- 1 | use std::path::PathBuf; 2 | use std::{env, fs}; 3 | 4 | fn main() { 5 | let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap()); 6 | println!("cargo:rustc-link-search={}", out_dir.display()); 7 | 8 | #[cfg(feature = "gd32vf103")] 9 | fs::copy("src/chip/gd32vf103/memory.x", out_dir.join("memory.x")).unwrap(); 10 | 11 | #[cfg(feature = "stm32f4")] 12 | fs::copy("src/chip/stm32f4/memory.x", out_dir.join("memory.x")).unwrap(); 13 | 14 | #[cfg(feature = "stm32f1")] 15 | fs::copy("src/chip/stm32f1/memory.x", out_dir.join("memory.x")).unwrap(); 16 | 17 | #[cfg(feature = "rp2040")] 18 | fs::copy("src/chip/rp2040/memory.x", out_dir.join("memory.x")).unwrap(); 19 | 20 | #[cfg(feature = "stm32h7")] 21 | fs::copy("src/chip/stm32h7/memory.x", out_dir.join("memory.x")).unwrap(); 22 | 23 | #[cfg(feature = "cm32m4")] 24 | fs::copy("src/chip/cm32m4/memory.x", out_dir.join("memory.x")).unwrap(); 25 | 26 | println!("cargo:rerun-if-changed=memory.x"); 27 | } 28 | -------------------------------------------------------------------------------- /debug/cm32m4xxr/build.sh: -------------------------------------------------------------------------------- 1 | cargo build --example sche --release --all-features 2 | riscv64-unknown-elf-objcopy -O binary ./target/riscv32imac-unknown-none-elf/release/examples/sche sche.bin -------------------------------------------------------------------------------- /debug/cm32m4xxr/cm32m4xxr.cfg: -------------------------------------------------------------------------------- 1 | telnet_port 9999 2 | tcl_port 8888 3 | gdb_port 7777 4 | 5 | adapter_khz 1000 6 | 7 | interface ftdi 8 | #If you use the cJTAG interface, you should set the following options to on 9 | ftdi_oscan1_mode off 10 | ftdi_vid_pid 0x0403 0x6010 11 | 12 | ftdi_layout_init 0x0030 0x001b 13 | ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020 14 | 15 | ftdi_layout_signal TCK -data 0x0001 16 | ftdi_layout_signal TDI -data 0x0002 17 | ftdi_layout_signal TDO -input 0x0004 18 | ftdi_layout_signal TMS -data 0x0008 19 | ftdi_layout_signal JTAG_SEL -data 0x0100 -oe 0x0100 20 | transport select jtag 21 | 22 | set _CHIPNAME riscv 23 | jtag newtap $_CHIPNAME cpu -irlen 5 24 | 25 | set _TARGETNAME $_CHIPNAME.cpu 26 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME 27 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 10000 -work-area-backup 1 28 | 29 | set _FLASHNAME $_CHIPNAME.flash 30 | flash bank $_FLASHNAME cm32m4xxr 0x08000000 0 0 0 $_TARGETNAME 31 | 32 | init 33 | #reset 34 | if {[ info exists pulse_srst]} { 35 | ftdi_set_signal nSRST 0 36 | ftdi_set_signal nSRST z 37 | } 38 | halt 39 | -------------------------------------------------------------------------------- /debug/cm32m4xxr/openocd.cfg: -------------------------------------------------------------------------------- 1 | # autoexit true 2 | telnet_port 9999 3 | tcl_port 8888 4 | gdb_port 7777 5 | 6 | set _CHIPNAME riscv 7 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1e200a6d 8 | 9 | set _TARGETNAME $_CHIPNAME.cpu 10 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME 11 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0 12 | 13 | 14 | # Work-area is a space in RAM used for flash programming 15 | if { [info exists WORKAREASIZE] } { 16 | set _WORKAREASIZE $WORKAREASIZE 17 | } else { 18 | set _WORKAREASIZE 0x5000 19 | } 20 | 21 | # Allow overriding the Flash bank size 22 | if { [info exists FLASH_SIZE] } { 23 | set _FLASH_SIZE $FLASH_SIZE 24 | } else { 25 | # autodetect size 26 | set _FLASH_SIZE 0 27 | } 28 | 29 | # flash size will be probed 30 | set _FLASHNAME $_CHIPNAME.flash 31 | 32 | flash bank $_FLASHNAME gd32vf103 0x08000000 0 0 0 $_TARGETNAME 33 | riscv set_reset_timeout_sec 1 34 | init 35 | 36 | halt 37 | -------------------------------------------------------------------------------- /debug/cm32m4xxr/openocd.gdb: -------------------------------------------------------------------------------- 1 | target extended-remote :3333 2 | 3 | # print demangled symbols 4 | set print asm-demangle on 5 | 6 | set confirm off 7 | 8 | # set backtrace limit to not have infinite backtrace loops 9 | set backtrace limit 32 10 | 11 | load 12 | continue 13 | -------------------------------------------------------------------------------- /debug/cm32m4xxr/openocd.sh: -------------------------------------------------------------------------------- 1 | D:\NucleiStudio\toolchain\openocd\bin\cmlink_gdbserver.exe -f cm32m4xxr.cfg -------------------------------------------------------------------------------- /debug/cm32m4xxr/run.sh: -------------------------------------------------------------------------------- 1 | cargo run --example gd32vf103 --release --all-features -------------------------------------------------------------------------------- /debug/cm32m4xxr/screenlog.0: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/cm32m4xxr/screenlog.0 -------------------------------------------------------------------------------- /debug/gd32vf103/._longan_nano_pinout_v1.1.0_w5676_h4000_large.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/gd32vf103/._longan_nano_pinout_v1.1.0_w5676_h4000_large.png -------------------------------------------------------------------------------- /debug/gd32vf103/build.sh: -------------------------------------------------------------------------------- 1 | cargo build --example sche --release --all-features 2 | riscv64-unknown-elf-objcopy -O binary ./target/riscv32imac-unknown-none-elf/release/examples/sche sche.bin -------------------------------------------------------------------------------- /debug/gd32vf103/debug1.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/gd32vf103/debug1.png -------------------------------------------------------------------------------- /debug/gd32vf103/debug2.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/gd32vf103/debug2.png -------------------------------------------------------------------------------- /debug/gd32vf103/longan_nano_pinout_v1.1.0_w5676_h4000_large.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/gd32vf103/longan_nano_pinout_v1.1.0_w5676_h4000_large.png -------------------------------------------------------------------------------- /debug/gd32vf103/memory-cb.x: -------------------------------------------------------------------------------- 1 | /* GD32VF103CB */ 2 | MEMORY 3 | { 4 | FLASH : ORIGIN = 0x08000000, LENGTH = 128k 5 | RAM : ORIGIN = 0x20000000, LENGTH = 32k 6 | } 7 | 8 | REGION_ALIAS("REGION_TEXT", FLASH); 9 | REGION_ALIAS("REGION_RODATA", FLASH); 10 | REGION_ALIAS("REGION_DATA", RAM); 11 | REGION_ALIAS("REGION_BSS", RAM); 12 | REGION_ALIAS("REGION_HEAP", RAM); 13 | REGION_ALIAS("REGION_STACK", RAM); 14 | -------------------------------------------------------------------------------- /debug/gd32vf103/openocd-jlink.cfg: -------------------------------------------------------------------------------- 1 | adapter_khz 1000 2 | reset_config srst_only 3 | adapter_nsrst_assert_width 100 4 | 5 | interface jlink 6 | jlink usb 0 7 | 8 | transport select jtag 9 | 10 | set _CHIPNAME riscv 11 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d 12 | 13 | set _TARGETNAME $_CHIPNAME.cpu 14 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME 15 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0 16 | 17 | 18 | # Work-area is a space in RAM used for flash programming 19 | if { [info exists WORKAREASIZE] } { 20 | set _WORKAREASIZE $WORKAREASIZE 21 | } else { 22 | set _WORKAREASIZE 0x5000 23 | } 24 | 25 | # Allow overriding the Flash bank size 26 | if { [info exists FLASH_SIZE] } { 27 | set _FLASH_SIZE $FLASH_SIZE 28 | } else { 29 | # autodetect size 30 | set _FLASH_SIZE 0 31 | } 32 | 33 | # flash size will be probed 34 | set _FLASHNAME $_CHIPNAME.flash 35 | 36 | flash bank $_FLASHNAME gd32vf103 0x08000000 0 0 0 $_TARGETNAME 37 | riscv set_reset_timeout_sec 1 38 | init 39 | 40 | halt 41 | 42 | -------------------------------------------------------------------------------- /debug/gd32vf103/openocd-sipeed.cfg: -------------------------------------------------------------------------------- 1 | adapter driver ftdi 2 | ftdi_vid_pid 0x0403 0x6010 3 | 4 | ftdi_layout_init 0xfff8 0xfffb 5 | ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100 6 | ftdi_layout_signal nSRST -data 0x0200 -oe 0x0200 7 | 8 | transport select jtag 9 | adapter speed 10000 10 | 11 | telnet_port 9999 12 | tcl_port 8888 13 | gdb_port 7777 14 | 15 | set _CHIPNAME riscv 16 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d -------------------------------------------------------------------------------- /debug/gd32vf103/openocd.cfg: -------------------------------------------------------------------------------- 1 | # autoexit true 2 | telnet_port 9999 3 | tcl_port 8888 4 | gdb_port 7777 5 | 6 | set _CHIPNAME riscv 7 | jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1e200a6d 8 | 9 | set _TARGETNAME $_CHIPNAME.cpu 10 | target create $_TARGETNAME riscv -chain-position $_TARGETNAME 11 | $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 20480 -work-area-backup 0 12 | 13 | 14 | # Work-area is a space in RAM used for flash programming 15 | if { [info exists WORKAREASIZE] } { 16 | set _WORKAREASIZE $WORKAREASIZE 17 | } else { 18 | set _WORKAREASIZE 0x5000 19 | } 20 | 21 | # Allow overriding the Flash bank size 22 | if { [info exists FLASH_SIZE] } { 23 | set _FLASH_SIZE $FLASH_SIZE 24 | } else { 25 | # autodetect size 26 | set _FLASH_SIZE 0 27 | } 28 | 29 | # flash size will be probed 30 | set _FLASHNAME $_CHIPNAME.flash 31 | 32 | flash bank $_FLASHNAME gd32vf103 0x08000000 0 0 0 $_TARGETNAME 33 | riscv set_reset_timeout_sec 1 34 | init 35 | 36 | halt 37 | -------------------------------------------------------------------------------- /debug/gd32vf103/openocd.gdb: -------------------------------------------------------------------------------- 1 | target extended-remote :7777 2 | 3 | # print demangled symbols 4 | set print asm-demangle on 5 | 6 | set confirm off 7 | 8 | # set backtrace limit to not have infinite backtrace loops 9 | set backtrace limit 32 10 | 11 | load 12 | continue 13 | -------------------------------------------------------------------------------- /debug/gd32vf103/openocd.sh: -------------------------------------------------------------------------------- 1 | ~/toolchain/riscv-openocd/bin/openocd -f sipeed-jtag.cfg -f openocd.cfg -------------------------------------------------------------------------------- /debug/gd32vf103/run.sh: -------------------------------------------------------------------------------- 1 | cargo run --example gd32vf103 --release --all-features -------------------------------------------------------------------------------- /debug/gd32vf103/screenlog.0: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/gd32vf103/screenlog.0 -------------------------------------------------------------------------------- /debug/gd32vf103/sipeed-jtag.cfg: -------------------------------------------------------------------------------- 1 | # 2 | # Sipeed USB-JTAG Debugger 3 | # 4 | # https://www.seeedstudio.com/Sipeed-USB-JTAG-TTL-RISC-V-Debugger-p-2910.html 5 | # 6 | 7 | interface ftdi 8 | ftdi_vid_pid 0x0403 0x6010 9 | ftdi_channel 0 10 | 11 | ftdi_layout_init 0x00e8 0x00eb 12 | 13 | transport select jtag 14 | adapter_khz 8000 15 | -------------------------------------------------------------------------------- /debug/stm32f103/openocd.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink.cfg] 2 | source [find target/stm32f1x.cfg] 3 | # source [find target/ch32f1x.cfg] 4 | -------------------------------------------------------------------------------- /debug/stm32f103/openocd.gdb: -------------------------------------------------------------------------------- 1 | target remote :3333 2 | 3 | # print demangled symbols 4 | set print asm-demangle on 5 | 6 | # set backtrace limit to not have infinite backtrace loops 7 | set backtrace limit 32 8 | 9 | # detect unhandled exceptions, hard faults and panics 10 | break DefaultHandler 11 | break HardFault 12 | break rust_begin_unwind 13 | 14 | monitor arm semihosting enable 15 | 16 | #monitor reset halt 17 | 18 | load 19 | 20 | continue -------------------------------------------------------------------------------- /debug/stm32f103/stm32f103c8t6-large.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/stm32f103/stm32f103c8t6-large.jpg -------------------------------------------------------------------------------- /debug/stm32f4/20190812191101436.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/debug/stm32f4/20190812191101436.png -------------------------------------------------------------------------------- /debug/stm32f4/openocd.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink.cfg] 2 | source [find target/stm32f4x.cfg] 3 | # source [find target/ch32f1x.cfg] 4 | -------------------------------------------------------------------------------- /debug/stm32f4/openocd.gdb: -------------------------------------------------------------------------------- 1 | target remote :3333 2 | 3 | # print demangled symbols 4 | set print asm-demangle on 5 | 6 | # set backtrace limit to not have infinite backtrace loops 7 | set backtrace limit 32 8 | 9 | # detect unhandled exceptions, hard faults and panics 10 | break DefaultHandler 11 | break HardFault 12 | break rust_begin_unwind 13 | 14 | monitor arm semihosting enable 15 | 16 | #monitor reset halt 17 | 18 | load 19 | 20 | continue -------------------------------------------------------------------------------- /debug/stm32f4/openocd.sh: -------------------------------------------------------------------------------- 1 | ~/toolchain/openocd/bin/openocd -f openocd.cfg 2 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-hal/.cargo/config.toml: -------------------------------------------------------------------------------- 1 | [build] 2 | target = "riscv32imac-unknown-none-elf" 3 | 4 | [target.riscv32imac-unknown-none-elf] 5 | rustflags = [ 6 | "-Clink-arg=-Tdevice.x", 7 | ] 8 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-hal/.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "editor.fontSize": 16, 3 | "window.zoomLevel": 2, 4 | "editor.formatOnSave": true, 5 | "rust-analyzer.cargo.target": "riscv32imac-unknown-none-elf", 6 | "rust-analyzer.checkOnSave.allTargets": false, 7 | "rust-analyzer.lru.capacity": 1000, 8 | "files.associations": { 9 | "string.h": "c", 10 | "corecrt.h": "c", 11 | "vcruntime.h": "c", 12 | "corecrt_memory.h": "c", 13 | "vcruntime_string.h": "c" 14 | }, 15 | } -------------------------------------------------------------------------------- /hal2/cm32m4xxr-hal/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "cm32m4xxr-hal" 3 | version = "0.1.0" 4 | edition = "2021" 5 | 6 | # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html 7 | 8 | [dependencies] 9 | cast = {version = "0.3.0", default-features = false} 10 | embedded-dma = "0.2.0" 11 | cm32m4xxr-pac = {path = "../cm32m4xxr-pac"} 12 | nb = "1.0.0" 13 | riscv = "0.8.0" 14 | vcell = "0.1.2" 15 | void = {version = "1.0.2", default-features = false} 16 | 17 | [dependencies.embedded-hal] 18 | features = ["unproven"] 19 | version = "0.2.3" -------------------------------------------------------------------------------- /hal2/cm32m4xxr-hal/src/lib.rs: -------------------------------------------------------------------------------- 1 | #![no_std] 2 | 3 | pub use cm32m4xxr_pac as pac; 4 | 5 | use embedded_hal as hal; 6 | 7 | pub mod eclic; 8 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/.cargo/config.toml: -------------------------------------------------------------------------------- 1 | [build] 2 | target = "riscv32imac-unknown-none-elf" 3 | 4 | [target.riscv32imac-unknown-none-elf] 5 | rustflags = [ 6 | "-Clink-arg=-Tdevice.x", 7 | ] 8 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/.vscode/settings.json: -------------------------------------------------------------------------------- 1 | { 2 | "editor.fontSize": 16, 3 | "window.zoomLevel": 2, 4 | "editor.formatOnSave": true, 5 | "rust-analyzer.cargo.target": "riscv32imac-unknown-none-elf", 6 | "rust-analyzer.checkOnSave.allTargets": false, 7 | "rust-analyzer.lru.capacity": 1000, 8 | "files.associations": { 9 | "string.h": "c", 10 | "corecrt.h": "c", 11 | "vcruntime.h": "c", 12 | "corecrt_memory.h": "c", 13 | "vcruntime_string.h": "c" 14 | }, 15 | } -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "cm32m4xxr-pac" 3 | version = "0.1.0" 4 | edition = "2021" 5 | 6 | # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html 7 | 8 | [dependencies] 9 | bare-metal = "1.0.0" 10 | vcell = "0.1.3" 11 | riscv = "0.8.0" 12 | 13 | [dependencies.riscv-rt] 14 | optional = true 15 | version = "0.8.1" 16 | 17 | [features] 18 | rt = ["riscv-rt"] -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/build.rs: -------------------------------------------------------------------------------- 1 | use std::env; 2 | use std::fs::File; 3 | use std::io::Write; 4 | use std::path::PathBuf; 5 | fn main() { 6 | if env::var_os("CARGO_FEATURE_RT").is_some() { 7 | let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); 8 | File::create(out.join("device.x")) 9 | .unwrap() 10 | .write_all(include_bytes!("device.x")) 11 | .unwrap(); 12 | println!("cargo:rustc-link-search={}", out.display()); 13 | println!("cargo:rerun-if-changed=device.x"); 14 | } 15 | println!("cargo:rerun-if-changed=build.rs"); 16 | } 17 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/src/dbg.rs: -------------------------------------------------------------------------------- 1 | #[doc = r"Register block"] 2 | #[repr(C)] 3 | pub struct RegisterBlock { 4 | #[doc = "0x00 - DBG_ID"] 5 | pub dbg_id: crate::Reg, 6 | #[doc = "0x04 - DBG_CTRL"] 7 | pub dbg_ctrl: crate::Reg, 8 | } 9 | #[doc = "DBG_ID register accessor: an alias for `Reg`"] 10 | pub type DBG_ID = crate::Reg; 11 | #[doc = "DBG_ID"] 12 | pub mod dbg_id; 13 | #[doc = "DBG_CTRL register accessor: an alias for `Reg`"] 14 | pub type DBG_CTRL = crate::Reg; 15 | #[doc = "DBG_CTRL"] 16 | pub mod dbg_ctrl; 17 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/src/iwdg.rs: -------------------------------------------------------------------------------- 1 | #[doc = r"Register block"] 2 | #[repr(C)] 3 | pub struct RegisterBlock { 4 | #[doc = "0x00 - IWDG_KEY"] 5 | pub iwdg_key: crate::Reg, 6 | #[doc = "0x04 - IWDG_PREDIV"] 7 | pub iwdg_prediv: crate::Reg, 8 | #[doc = "0x08 - IWDG_RELV"] 9 | pub iwdg_relv: crate::Reg, 10 | #[doc = "0x0c - IWDG_STS"] 11 | pub iwdg_sts: crate::Reg, 12 | } 13 | #[doc = "IWDG_KEY register accessor: an alias for `Reg`"] 14 | pub type IWDG_KEY = crate::Reg; 15 | #[doc = "IWDG_KEY"] 16 | pub mod iwdg_key; 17 | #[doc = "IWDG_PREDIV register accessor: an alias for `Reg`"] 18 | pub type IWDG_PREDIV = crate::Reg; 19 | #[doc = "IWDG_PREDIV"] 20 | pub mod iwdg_prediv; 21 | #[doc = "IWDG_RELV register accessor: an alias for `Reg`"] 22 | pub type IWDG_RELV = crate::Reg; 23 | #[doc = "IWDG_RELV"] 24 | pub mod iwdg_relv; 25 | #[doc = "IWDG_STS register accessor: an alias for `Reg`"] 26 | pub type IWDG_STS = crate::Reg; 27 | #[doc = "IWDG_STS"] 28 | pub mod iwdg_sts; 29 | -------------------------------------------------------------------------------- /hal2/cm32m4xxr-pac/src/wwdg.rs: -------------------------------------------------------------------------------- 1 | #[doc = r"Register block"] 2 | #[repr(C)] 3 | pub struct RegisterBlock { 4 | #[doc = "0x00 - WWDG_CTRL"] 5 | pub wwdg_ctrl: crate::Reg, 6 | #[doc = "0x04 - WWDG_CFG"] 7 | pub wwdg_cfg: crate::Reg, 8 | #[doc = "0x08 - WWDG_STS"] 9 | pub wwdg_sts: crate::Reg, 10 | } 11 | #[doc = "WWDG_CTRL register accessor: an alias for `Reg`"] 12 | pub type WWDG_CTRL = crate::Reg; 13 | #[doc = "WWDG_CTRL"] 14 | pub mod wwdg_ctrl; 15 | #[doc = "WWDG_CFG register accessor: an alias for `Reg`"] 16 | pub type WWDG_CFG = crate::Reg; 17 | #[doc = "WWDG_CFG"] 18 | pub mod wwdg_cfg; 19 | #[doc = "WWDG_STS register accessor: an alias for `Reg`"] 20 | pub type WWDG_STS = crate::Reg; 21 | #[doc = "WWDG_STS"] 22 | pub mod wwdg_sts; 23 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | authors = ["The RISC-V Team "] 3 | categories = ["embedded", "hardware-support", "no-std"] 4 | description = "Peripheral access API for GD32VF103 chips" 5 | edition = "2018" 6 | keywords = ["riscv", "gd32", "register", "peripheral"] 7 | license = "ISC" 8 | name = "gd32vf103-pac" 9 | repository = "https://github.com/riscv-rust/gd32vf103-pac" 10 | version = "0.4.0" 11 | 12 | [dependencies] 13 | riscv = "0.8.0" 14 | vcell = "0.1.2" 15 | 16 | [features] 17 | rt = [] 18 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/librs-patch: -------------------------------------------------------------------------------- 1 | #[cfg(feature = "rt")] 2 | extern crate riscv_rt; 3 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/idata0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA0"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/idata1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA1"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/idata2.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA2"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/idata3.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA3"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/ioff0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF0"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF0"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF0 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF0 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 0"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 0"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/ioff1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF1"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF1"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF1 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF1 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 1"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 1"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/ioff2.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF2"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF2"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF2 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF2 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 2"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 2"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/ioff3.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF3"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF3"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF3 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF3 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 3"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 3"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/rdata.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RDATA"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `ADC1RDTR`"] 4 | pub type ADC1RDTR_R = crate::R; 5 | #[doc = "Reader of field `RDATA`"] 6 | pub type RDATA_R = crate::R; 7 | impl R { 8 | #[doc = "Bits 16:31 - ADC regular channel data"] 9 | #[inline(always)] 10 | pub fn adc1rdtr(&self) -> ADC1RDTR_R { 11 | ADC1RDTR_R::new(((self.bits >> 16) & 0xffff) as u16) 12 | } 13 | #[doc = "Bits 0:15 - Regular channel data"] 14 | #[inline(always)] 15 | pub fn rdata(&self) -> RDATA_R { 16 | RDATA_R::new((self.bits & 0xffff) as u16) 17 | } 18 | } 19 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/wdht.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register WDHT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register WDHT"] 4 | pub type W = crate::W; 5 | #[doc = "Register WDHT `reset()`'s with value 0x0fff"] 6 | impl crate::ResetValue for super::WDHT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0x0fff 11 | } 12 | } 13 | #[doc = "Reader of field `WDHT`"] 14 | pub type WDHT_R = crate::R; 15 | #[doc = "Write proxy for field `WDHT`"] 16 | pub struct WDHT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> WDHT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Analog watchdog higher threshold"] 29 | #[inline(always)] 30 | pub fn wdht(&self) -> WDHT_R { 31 | WDHT_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Analog watchdog higher threshold"] 36 | #[inline(always)] 37 | pub fn wdht(&mut self) -> WDHT_W { 38 | WDHT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc0/wdlt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register WDLT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register WDLT"] 4 | pub type W = crate::W; 5 | #[doc = "Register WDLT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::WDLT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `WDLT`"] 14 | pub type WDLT_R = crate::R; 15 | #[doc = "Write proxy for field `WDLT`"] 16 | pub struct WDLT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> WDLT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Analog watchdog lower threshold"] 29 | #[inline(always)] 30 | pub fn wdlt(&self) -> WDLT_R { 31 | WDLT_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Analog watchdog lower threshold"] 36 | #[inline(always)] 37 | pub fn wdlt(&mut self) -> WDLT_W { 38 | WDLT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/idata0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA0"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/idata1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA1"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/idata2.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA2"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/idata3.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IDATA3"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IDATAn`"] 4 | pub type IDATAN_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Inserted number n conversion data"] 7 | #[inline(always)] 8 | pub fn idatan(&self) -> IDATAN_R { 9 | IDATAN_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/ioff0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF0"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF0"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF0 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF0 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 0"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 0"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/ioff1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF1"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF1"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF1 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF1 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 1"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 1"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/ioff2.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF2"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF2"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF2 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF2 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 2"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 2"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/ioff3.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register IOFF3"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register IOFF3"] 4 | pub type W = crate::W; 5 | #[doc = "Register IOFF3 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::IOFF3 { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `IOFF`"] 14 | pub type IOFF_R = crate::R; 15 | #[doc = "Write proxy for field `IOFF`"] 16 | pub struct IOFF_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> IOFF_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Data offset for inserted channel 3"] 29 | #[inline(always)] 30 | pub fn ioff(&self) -> IOFF_R { 31 | IOFF_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Data offset for inserted channel 3"] 36 | #[inline(always)] 37 | pub fn ioff(&mut self) -> IOFF_W { 38 | IOFF_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/rdata.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RDATA"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `RDATA`"] 4 | pub type RDATA_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Regular channel data"] 7 | #[inline(always)] 8 | pub fn rdata(&self) -> RDATA_R { 9 | RDATA_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/wdht.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register WDHT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register WDHT"] 4 | pub type W = crate::W; 5 | #[doc = "Register WDHT `reset()`'s with value 0x0fff"] 6 | impl crate::ResetValue for super::WDHT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0x0fff 11 | } 12 | } 13 | #[doc = "Reader of field `WDHT`"] 14 | pub type WDHT_R = crate::R; 15 | #[doc = "Write proxy for field `WDHT`"] 16 | pub struct WDHT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> WDHT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Analog watchdog higher threshold"] 29 | #[inline(always)] 30 | pub fn wdht(&self) -> WDHT_R { 31 | WDHT_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Analog watchdog higher threshold"] 36 | #[inline(always)] 37 | pub fn wdht(&mut self) -> WDHT_W { 38 | WDHT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/adc1/wdlt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register WDLT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register WDLT"] 4 | pub type W = crate::W; 5 | #[doc = "Register WDLT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::WDLT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `WDLT`"] 14 | pub type WDLT_R = crate::R; 15 | #[doc = "Write proxy for field `WDLT`"] 16 | pub struct WDLT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> WDLT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Analog watchdog lower threshold"] 29 | #[inline(always)] 30 | pub fn wdlt(&self) -> WDLT_R { 31 | WDLT_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Analog watchdog lower threshold"] 36 | #[inline(always)] 37 | pub fn wdlt(&mut self) -> WDLT_W { 38 | WDLT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA0"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA0"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA0 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA0 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA1"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA1"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA1 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA1 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data10.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA10"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA10"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA10 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA10 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data11.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA11"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA11"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA11 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA11 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data12.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA12"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA12"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA12 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA12 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data13.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA13"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA13"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA13 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA13 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data14.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA14"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA14"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA14 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA14 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data15.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA15"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA15"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA15 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA15 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data16.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA16"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA16"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA16 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA16 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data17.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA17"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA17"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA17 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA17 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data18.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA18"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA18"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA18 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA18 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data19.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA19"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA19"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA19 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA19 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data2.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA2"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA2"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA2 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA2 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data20.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA20"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA20"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA20 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA20 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data21.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA21"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA21"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA21 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA21 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data22.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA22"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA22"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA22 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA22 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data23.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA23"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA23"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA23 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA23 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data24.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA24"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA24"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA24 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA24 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data25.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA25"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA25"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA25 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA25 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data26.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA26"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA26"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA26 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA26 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data27.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA27"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA27"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA27 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA27 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data28.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA28"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA28"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA28 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA28 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data29.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA29"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA29"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA29 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA29 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data3.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA3"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA3"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA3 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA3 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data30.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA30"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA30"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA30 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA30 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data31.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA31"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA31"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA31 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA31 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data32.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA32"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA32"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA32 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA32 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data33.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA33"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA33"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA33 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA33 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data34.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA34"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA34"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA34 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA34 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data35.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA35"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA35"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA35 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA35 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data36.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA36"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA36"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA36 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA36 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data37.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA37"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA37"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA37 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA37 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data38.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA38"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA38"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA38 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA38 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data39.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA39"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA39"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA39 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA39 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data4.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA4"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA4"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA4 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA4 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data40.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA40"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA40"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA40 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA40 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data41.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA41"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA41"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA41 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA41 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data5.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA5"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA5"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA5 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA5 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data6.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA6"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA6"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA6 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA6 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data7.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA7"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA7"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA7 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA7 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data8.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA8"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA8"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA8 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA8 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/bkp/data9.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA9"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA9"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA9 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA9 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Backup data"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Backup data"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomdata00.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMDATA00"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DB3`"] 4 | pub type DB3_R = crate::R; 5 | #[doc = "Reader of field `DB2`"] 6 | pub type DB2_R = crate::R; 7 | #[doc = "Reader of field `DB1`"] 8 | pub type DB1_R = crate::R; 9 | #[doc = "Reader of field `DB0`"] 10 | pub type DB0_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 24:31 - Data byte 3"] 13 | #[inline(always)] 14 | pub fn db3(&self) -> DB3_R { 15 | DB3_R::new(((self.bits >> 24) & 0xff) as u8) 16 | } 17 | #[doc = "Bits 16:23 - Data byte 2"] 18 | #[inline(always)] 19 | pub fn db2(&self) -> DB2_R { 20 | DB2_R::new(((self.bits >> 16) & 0xff) as u8) 21 | } 22 | #[doc = "Bits 8:15 - Data byte 1"] 23 | #[inline(always)] 24 | pub fn db1(&self) -> DB1_R { 25 | DB1_R::new(((self.bits >> 8) & 0xff) as u8) 26 | } 27 | #[doc = "Bits 0:7 - Data byte 0"] 28 | #[inline(always)] 29 | pub fn db0(&self) -> DB0_R { 30 | DB0_R::new((self.bits & 0xff) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomdata01.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMDATA01"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DB3`"] 4 | pub type DB3_R = crate::R; 5 | #[doc = "Reader of field `DB2`"] 6 | pub type DB2_R = crate::R; 7 | #[doc = "Reader of field `DB1`"] 8 | pub type DB1_R = crate::R; 9 | #[doc = "Reader of field `DB0`"] 10 | pub type DB0_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 24:31 - Data byte 3"] 13 | #[inline(always)] 14 | pub fn db3(&self) -> DB3_R { 15 | DB3_R::new(((self.bits >> 24) & 0xff) as u8) 16 | } 17 | #[doc = "Bits 16:23 - Data byte 2"] 18 | #[inline(always)] 19 | pub fn db2(&self) -> DB2_R { 20 | DB2_R::new(((self.bits >> 16) & 0xff) as u8) 21 | } 22 | #[doc = "Bits 8:15 - Data byte 1"] 23 | #[inline(always)] 24 | pub fn db1(&self) -> DB1_R { 25 | DB1_R::new(((self.bits >> 8) & 0xff) as u8) 26 | } 27 | #[doc = "Bits 0:7 - Data byte 0"] 28 | #[inline(always)] 29 | pub fn db0(&self) -> DB0_R { 30 | DB0_R::new((self.bits & 0xff) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomdata10.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMDATA10"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DB7`"] 4 | pub type DB7_R = crate::R; 5 | #[doc = "Reader of field `DB6`"] 6 | pub type DB6_R = crate::R; 7 | #[doc = "Reader of field `DB5`"] 8 | pub type DB5_R = crate::R; 9 | #[doc = "Reader of field `DB4`"] 10 | pub type DB4_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 24:31 - Data byte 7"] 13 | #[inline(always)] 14 | pub fn db7(&self) -> DB7_R { 15 | DB7_R::new(((self.bits >> 24) & 0xff) as u8) 16 | } 17 | #[doc = "Bits 16:23 - Data byte 6"] 18 | #[inline(always)] 19 | pub fn db6(&self) -> DB6_R { 20 | DB6_R::new(((self.bits >> 16) & 0xff) as u8) 21 | } 22 | #[doc = "Bits 8:15 - Data byte 5"] 23 | #[inline(always)] 24 | pub fn db5(&self) -> DB5_R { 25 | DB5_R::new(((self.bits >> 8) & 0xff) as u8) 26 | } 27 | #[doc = "Bits 0:7 - Data byte 4"] 28 | #[inline(always)] 29 | pub fn db4(&self) -> DB4_R { 30 | DB4_R::new((self.bits & 0xff) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomdata11.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMDATA11"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DB7`"] 4 | pub type DB7_R = crate::R; 5 | #[doc = "Reader of field `DB6`"] 6 | pub type DB6_R = crate::R; 7 | #[doc = "Reader of field `DB5`"] 8 | pub type DB5_R = crate::R; 9 | #[doc = "Reader of field `DB4`"] 10 | pub type DB4_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 24:31 - Data byte 7"] 13 | #[inline(always)] 14 | pub fn db7(&self) -> DB7_R { 15 | DB7_R::new(((self.bits >> 24) & 0xff) as u8) 16 | } 17 | #[doc = "Bits 16:23 - Data byte 6"] 18 | #[inline(always)] 19 | pub fn db6(&self) -> DB6_R { 20 | DB6_R::new(((self.bits >> 16) & 0xff) as u8) 21 | } 22 | #[doc = "Bits 8:15 - Data byte 5"] 23 | #[inline(always)] 24 | pub fn db5(&self) -> DB5_R { 25 | DB5_R::new(((self.bits >> 8) & 0xff) as u8) 26 | } 27 | #[doc = "Bits 0:7 - Data byte 4"] 28 | #[inline(always)] 29 | pub fn db4(&self) -> DB4_R { 30 | DB4_R::new((self.bits & 0xff) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomi0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMI0"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `SFID_EFID`"] 4 | pub type SFID_EFID_R = crate::R; 5 | #[doc = "Reader of field `EFID`"] 6 | pub type EFID_R = crate::R; 7 | #[doc = "Reader of field `FF`"] 8 | pub type FF_R = crate::R; 9 | #[doc = "Reader of field `FT`"] 10 | pub type FT_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 21:31 - The frame identifier"] 13 | #[inline(always)] 14 | pub fn sfid_efid(&self) -> SFID_EFID_R { 15 | SFID_EFID_R::new(((self.bits >> 21) & 0x07ff) as u16) 16 | } 17 | #[doc = "Bits 3:20 - The frame identifier"] 18 | #[inline(always)] 19 | pub fn efid(&self) -> EFID_R { 20 | EFID_R::new(((self.bits >> 3) & 0x0003_ffff) as u32) 21 | } 22 | #[doc = "Bit 2 - Frame format"] 23 | #[inline(always)] 24 | pub fn ff(&self) -> FF_R { 25 | FF_R::new(((self.bits >> 2) & 0x01) != 0) 26 | } 27 | #[doc = "Bit 1 - Frame type"] 28 | #[inline(always)] 29 | pub fn ft(&self) -> FT_R { 30 | FT_R::new(((self.bits >> 1) & 0x01) != 0) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomi1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMI1"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `SFID_EFID`"] 4 | pub type SFID_EFID_R = crate::R; 5 | #[doc = "Reader of field `EFID`"] 6 | pub type EFID_R = crate::R; 7 | #[doc = "Reader of field `FF`"] 8 | pub type FF_R = crate::R; 9 | #[doc = "Reader of field `FT`"] 10 | pub type FT_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 21:31 - The frame identifier"] 13 | #[inline(always)] 14 | pub fn sfid_efid(&self) -> SFID_EFID_R { 15 | SFID_EFID_R::new(((self.bits >> 21) & 0x07ff) as u16) 16 | } 17 | #[doc = "Bits 3:20 - The frame identifier"] 18 | #[inline(always)] 19 | pub fn efid(&self) -> EFID_R { 20 | EFID_R::new(((self.bits >> 3) & 0x0003_ffff) as u32) 21 | } 22 | #[doc = "Bit 2 - Frame format"] 23 | #[inline(always)] 24 | pub fn ff(&self) -> FF_R { 25 | FF_R::new(((self.bits >> 2) & 0x01) != 0) 26 | } 27 | #[doc = "Bit 1 - Frame type"] 28 | #[inline(always)] 29 | pub fn ft(&self) -> FT_R { 30 | FT_R::new(((self.bits >> 1) & 0x01) != 0) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomp0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMP0"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `TS`"] 4 | pub type TS_R = crate::R; 5 | #[doc = "Reader of field `FI`"] 6 | pub type FI_R = crate::R; 7 | #[doc = "Reader of field `DLENC`"] 8 | pub type DLENC_R = crate::R; 9 | impl R { 10 | #[doc = "Bits 16:31 - Time stamp"] 11 | #[inline(always)] 12 | pub fn ts(&self) -> TS_R { 13 | TS_R::new(((self.bits >> 16) & 0xffff) as u16) 14 | } 15 | #[doc = "Bits 8:15 - Filtering index"] 16 | #[inline(always)] 17 | pub fn fi(&self) -> FI_R { 18 | FI_R::new(((self.bits >> 8) & 0xff) as u8) 19 | } 20 | #[doc = "Bits 0:3 - Data length code"] 21 | #[inline(always)] 22 | pub fn dlenc(&self) -> DLENC_R { 23 | DLENC_R::new((self.bits & 0x0f) as u8) 24 | } 25 | } 26 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/can0/rfifomp1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RFIFOMP1"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `TS`"] 4 | pub type TS_R = crate::R; 5 | #[doc = "Reader of field `FI`"] 6 | pub type FI_R = crate::R; 7 | #[doc = "Reader of field `DLENC`"] 8 | pub type DLENC_R = crate::R; 9 | impl R { 10 | #[doc = "Bits 16:31 - Time stamp"] 11 | #[inline(always)] 12 | pub fn ts(&self) -> TS_R { 13 | TS_R::new(((self.bits >> 16) & 0xffff) as u16) 14 | } 15 | #[doc = "Bits 8:15 - Filtering index"] 16 | #[inline(always)] 17 | pub fn fi(&self) -> FI_R { 18 | FI_R::new(((self.bits >> 8) & 0xff) as u8) 19 | } 20 | #[doc = "Bits 0:3 - Data length code"] 21 | #[inline(always)] 22 | pub fn dlenc(&self) -> DLENC_R { 23 | DLENC_R::new((self.bits & 0x0f) as u8) 24 | } 25 | } 26 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/crc/fdata.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register FDATA"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register FDATA"] 4 | pub type W = crate::W; 5 | #[doc = "Register FDATA `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::FDATA { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `FDATA`"] 14 | pub type FDATA_R = crate::R; 15 | #[doc = "Write proxy for field `FDATA`"] 16 | pub struct FDATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> FDATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:7 - Free Data Register bits"] 29 | #[inline(always)] 30 | pub fn fdata(&self) -> FDATA_R { 31 | FDATA_R::new((self.bits & 0xff) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:7 - Free Data Register bits"] 36 | #[inline(always)] 37 | pub fn fdata(&mut self) -> FDATA_W { 38 | FDATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/ctimer/mtime_hi.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register mtime_hi"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register mtime_hi"] 4 | pub type W = crate::W; 5 | #[doc = "Register mtime_hi `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::MTIME_HI { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | impl R {} 14 | impl W {} 15 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/ctimer/mtime_lo.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register mtime_lo"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register mtime_lo"] 4 | pub type W = crate::W; 5 | #[doc = "Register mtime_lo `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::MTIME_LO { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | impl R {} 14 | impl W {} 15 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/ctimer/mtimecmp_hi.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register mtimecmp_hi"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register mtimecmp_hi"] 4 | pub type W = crate::W; 5 | #[doc = "Register mtimecmp_hi `reset()`'s with value 0xffff_ffff"] 6 | impl crate::ResetValue for super::MTIMECMP_HI { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0xffff_ffff 11 | } 12 | } 13 | impl R {} 14 | impl W {} 15 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/ctimer/mtimecmp_lo.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register mtimecmp_lo"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register mtimecmp_lo"] 4 | pub type W = crate::W; 5 | #[doc = "Register mtimecmp_lo `reset()`'s with value 0xffff_ffff"] 6 | impl crate::ResetValue for super::MTIMECMP_LO { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0xffff_ffff 11 | } 12 | } 13 | impl R {} 14 | impl W {} 15 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dac/dac0_do.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DAC0_DO"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DAC0_DO`"] 4 | pub type DAC0_DO_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:11 - DAC0 data output"] 7 | #[inline(always)] 8 | pub fn dac0_do(&self) -> DAC0_DO_R { 9 | DAC0_DO_R::new((self.bits & 0x0fff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dac/dac1_do.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DAC1_DO"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DAC1_DO`"] 4 | pub type DAC1_DO_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:11 - DAC1 data output"] 7 | #[inline(always)] 8 | pub fn dac1_do(&self) -> DAC1_DO_R { 9 | DAC1_DO_R::new((self.bits & 0x0fff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dbg/id.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register ID"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `ID_CODE`"] 4 | pub type ID_CODE_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:31 - DBG ID code register"] 7 | #[inline(always)] 8 | pub fn id_code(&self) -> ID_CODE_R { 9 | ID_CODE_R::new((self.bits & 0xffff_ffff) as u32) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch0cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH0CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH0CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH0CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH0CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch1cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH1CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH1CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH1CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH1CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch2cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH2CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH2CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH2CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH2CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch3cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH3CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH3CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH3CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH3CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch4cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH4CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH4CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH4CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH4CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch5cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH5CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH5CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH5CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH5CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma0/ch6cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH6CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH6CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH6CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH6CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma1/ch0cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH0CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH0CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH0CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH0CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma1/ch1cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH1CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH1CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH1CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH1CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma1/ch2cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH2CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH2CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH2CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH2CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma1/ch3cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH3CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH3CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH3CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH3CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/dma1/ch4cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CH4CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CH4CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CH4CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CH4CNT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Transfer counter"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Transfer counter"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/eclic/cliccfg.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CLICCFG"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CLICCFG"] 4 | pub type W = crate::W; 5 | #[doc = "Register CLICCFG `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CLICCFG { 7 | type Type = u8; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `NLBITS`"] 14 | pub type NLBITS_R = crate::R; 15 | #[doc = "Write proxy for field `NLBITS`"] 16 | pub struct NLBITS_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> NLBITS_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !(0x0f << 1)) | (((value as u8) & 0x0f) << 1); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 1:4 - NLBITS"] 29 | #[inline(always)] 30 | pub fn nlbits(&self) -> NLBITS_R { 31 | NLBITS_R::new(((self.bits >> 1) & 0x0f) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 1:4 - NLBITS"] 36 | #[inline(always)] 37 | pub fn nlbits(&mut self) -> NLBITS_W { 38 | NLBITS_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/eclic/clicinfo.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CLICINFO"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `NUM_INTERRUPT`"] 4 | pub type NUM_INTERRUPT_R = crate::R; 5 | #[doc = "Reader of field `VERSION`"] 6 | pub type VERSION_R = crate::R; 7 | #[doc = "Reader of field `CLICINTCTLBITS`"] 8 | pub type CLICINTCTLBITS_R = crate::R; 9 | impl R { 10 | #[doc = "Bits 0:12 - NUM_INTERRUPT"] 11 | #[inline(always)] 12 | pub fn num_interrupt(&self) -> NUM_INTERRUPT_R { 13 | NUM_INTERRUPT_R::new((self.bits & 0x1fff) as u16) 14 | } 15 | #[doc = "Bits 13:20 - VERSION"] 16 | #[inline(always)] 17 | pub fn version(&self) -> VERSION_R { 18 | VERSION_R::new(((self.bits >> 13) & 0xff) as u8) 19 | } 20 | #[doc = "Bits 21:24 - CLICINTCTLBITS"] 21 | #[inline(always)] 22 | pub fn clicintctlbits(&self) -> CLICINTCTLBITS_R { 23 | CLICINTCTLBITS_R::new(((self.bits >> 21) & 0x0f) as u8) 24 | } 25 | } 26 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/eclic/mth.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register MTH"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register MTH"] 4 | pub type W = crate::W; 5 | #[doc = "Register MTH `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::MTH { 7 | type Type = u8; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `MTH`"] 14 | pub type MTH_R = crate::R; 15 | #[doc = "Write proxy for field `MTH`"] 16 | pub struct MTH_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> MTH_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xff) | ((value as u8) & 0xff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:7 - MTH"] 29 | #[inline(always)] 30 | pub fn mth(&self) -> MTH_R { 31 | MTH_R::new((self.bits & 0xff) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:7 - MTH"] 36 | #[inline(always)] 37 | pub fn mth(&mut self) -> MTH_W { 38 | MTH_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/addr0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register ADDR0"] 2 | pub type W = crate::W; 3 | #[doc = "Register ADDR0 `reset()`'s with value 0"] 4 | impl crate::ResetValue for super::ADDR0 { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0 9 | } 10 | } 11 | #[doc = "Write proxy for field `ADDR`"] 12 | pub struct ADDR_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> ADDR_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u32) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:31 - Flash erase/program command address bits"] 25 | #[inline(always)] 26 | pub fn addr(&mut self) -> ADDR_W { 27 | ADDR_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/key0.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register KEY0"] 2 | pub type W = crate::W; 3 | #[doc = "Register KEY0 `reset()`'s with value 0"] 4 | impl crate::ResetValue for super::KEY0 { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0 9 | } 10 | } 11 | #[doc = "Write proxy for field `KEY`"] 12 | pub struct KEY_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> KEY_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u32) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:31 - FMC_CTL0 unlock key"] 25 | #[inline(always)] 26 | pub fn key(&mut self) -> KEY_W { 27 | KEY_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/obkey.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register OBKEY"] 2 | pub type W = crate::W; 3 | #[doc = "Register OBKEY `reset()`'s with value 0"] 4 | impl crate::ResetValue for super::OBKEY { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0 9 | } 10 | } 11 | #[doc = "Write proxy for field `OBKEY`"] 12 | pub struct OBKEY_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> OBKEY_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u32) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:31 - FMC_ CTL0 option byte operation unlock register"] 25 | #[inline(always)] 26 | pub fn obkey(&mut self) -> OBKEY_W { 27 | OBKEY_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/obstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register OBSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `OBERR`"] 4 | pub type OBERR_R = crate::R; 5 | #[doc = "Reader of field `SPC`"] 6 | pub type SPC_R = crate::R; 7 | #[doc = "Reader of field `USER`"] 8 | pub type USER_R = crate::R; 9 | #[doc = "Reader of field `DATA`"] 10 | pub type DATA_R = crate::R; 11 | impl R { 12 | #[doc = "Bit 0 - Option bytes read error bit"] 13 | #[inline(always)] 14 | pub fn oberr(&self) -> OBERR_R { 15 | OBERR_R::new((self.bits & 0x01) != 0) 16 | } 17 | #[doc = "Bit 1 - Option bytes security protection code"] 18 | #[inline(always)] 19 | pub fn spc(&self) -> SPC_R { 20 | SPC_R::new(((self.bits >> 1) & 0x01) != 0) 21 | } 22 | #[doc = "Bits 2:9 - Store USER of option bytes block after system reset"] 23 | #[inline(always)] 24 | pub fn user(&self) -> USER_R { 25 | USER_R::new(((self.bits >> 2) & 0xff) as u8) 26 | } 27 | #[doc = "Bits 10:25 - Store DATA\\[15:0\\] 28 | of option bytes block after system reset"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new(((self.bits >> 10) & 0xffff) as u16) 32 | } 33 | } 34 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/pid.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register PID"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `PID`"] 4 | pub type PID_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:31 - Product reserved ID code register"] 7 | #[inline(always)] 8 | pub fn pid(&self) -> PID_R { 9 | PID_R::new((self.bits & 0xffff_ffff) as u32) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/wp.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register WP"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `WP`"] 4 | pub type WP_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:31 - Store WP\\[31:0\\] 7 | of option bytes block after system reset"] 8 | #[inline(always)] 9 | pub fn wp(&self) -> WP_R { 10 | WP_R::new((self.bits & 0xffff_ffff) as u32) 11 | } 12 | } 13 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fmc/ws.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register WS"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register WS"] 4 | pub type W = crate::W; 5 | #[doc = "Register WS `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::WS { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `WSCNT`"] 14 | pub type WSCNT_R = crate::R; 15 | #[doc = "Write proxy for field `WSCNT`"] 16 | pub struct WSCNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> WSCNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:2 - wait state counter register"] 29 | #[inline(always)] 30 | pub fn wscnt(&self) -> WSCNT_R { 31 | WSCNT_R::new((self.bits & 0x07) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:2 - wait state counter register"] 36 | #[inline(always)] 37 | pub fn wscnt(&mut self) -> WSCNT_W { 38 | WSCNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fwdgt/ctl.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register CTL"] 2 | pub type W = crate::W; 3 | #[doc = "Register CTL `reset()`'s with value 0"] 4 | impl crate::ResetValue for super::CTL { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0 9 | } 10 | } 11 | #[doc = "Write proxy for field `CMD`"] 12 | pub struct CMD_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> CMD_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:15 - Key value"] 25 | #[inline(always)] 26 | pub fn cmd(&mut self) -> CMD_W { 27 | CMD_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fwdgt/psc.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register PSC"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register PSC"] 4 | pub type W = crate::W; 5 | #[doc = "Register PSC `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::PSC { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `PSC`"] 14 | pub type PSC_R = crate::R; 15 | #[doc = "Write proxy for field `PSC`"] 16 | pub struct PSC_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> PSC_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:2 - Free watchdog timer prescaler selection"] 29 | #[inline(always)] 30 | pub fn psc(&self) -> PSC_R { 31 | PSC_R::new((self.bits & 0x07) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:2 - Free watchdog timer prescaler selection"] 36 | #[inline(always)] 37 | pub fn psc(&mut self) -> PSC_W { 38 | PSC_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fwdgt/rld.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RLD"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register RLD"] 4 | pub type W = crate::W; 5 | #[doc = "Register RLD `reset()`'s with value 0x0fff"] 6 | impl crate::ResetValue for super::RLD { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0x0fff 11 | } 12 | } 13 | #[doc = "Reader of field `RLD`"] 14 | pub type RLD_R = crate::R; 15 | #[doc = "Write proxy for field `RLD`"] 16 | pub struct RLD_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> RLD_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x0fff) | ((value as u32) & 0x0fff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:11 - Free watchdog timer counter reload value"] 29 | #[inline(always)] 30 | pub fn rld(&self) -> RLD_R { 31 | RLD_R::new((self.bits & 0x0fff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:11 - Free watchdog timer counter reload value"] 36 | #[inline(always)] 37 | pub fn rld(&mut self) -> RLD_W { 38 | RLD_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/fwdgt/stat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register STAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `PUD`"] 4 | pub type PUD_R = crate::R; 5 | #[doc = "Reader of field `RUD`"] 6 | pub type RUD_R = crate::R; 7 | impl R { 8 | #[doc = "Bit 0 - Free watchdog timer prescaler value update"] 9 | #[inline(always)] 10 | pub fn pud(&self) -> PUD_R { 11 | PUD_R::new((self.bits & 0x01) != 0) 12 | } 13 | #[doc = "Bit 1 - Free watchdog timer counter reload value update"] 14 | #[inline(always)] 15 | pub fn rud(&self) -> RUD_R { 16 | RUD_R::new(((self.bits >> 1) & 0x01) != 0) 17 | } 18 | } 19 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/i2c0/data.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `TRB`"] 14 | pub type TRB_R = crate::R; 15 | #[doc = "Write proxy for field `TRB`"] 16 | pub struct TRB_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> TRB_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xff) | ((value as u16) & 0xff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:7 - Transmission or reception data buffer register"] 29 | #[inline(always)] 30 | pub fn trb(&self) -> TRB_R { 31 | TRB_R::new((self.bits & 0xff) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:7 - Transmission or reception data buffer register"] 36 | #[inline(always)] 37 | pub fn trb(&mut self) -> TRB_W { 38 | TRB_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rcu/dsv.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DSV"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DSV"] 4 | pub type W = crate::W; 5 | #[doc = "Register DSV `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DSV { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DSLPVS`"] 14 | pub type DSLPVS_R = crate::R; 15 | #[doc = "Write proxy for field `DSLPVS`"] 16 | pub struct DSLPVS_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DSLPVS_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:1 - Deep-sleep mode voltage select"] 29 | #[inline(always)] 30 | pub fn dslpvs(&self) -> DSLPVS_R { 31 | DSLPVS_R::new((self.bits & 0x03) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:1 - Deep-sleep mode voltage select"] 36 | #[inline(always)] 37 | pub fn dslpvs(&mut self) -> DSLPVS_W { 38 | DSLPVS_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/alrmh.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register ALRMH"] 2 | pub type W = crate::W; 3 | #[doc = "Register ALRMH `reset()`'s with value 0xffff"] 4 | impl crate::ResetValue for super::ALRMH { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0xffff 9 | } 10 | } 11 | #[doc = "Write proxy for field `ALRM`"] 12 | pub struct ALRM_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> ALRM_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:15 - Alarm value high"] 25 | #[inline(always)] 26 | pub fn alrm(&mut self) -> ALRM_W { 27 | ALRM_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/alrml.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register ALRML"] 2 | pub type W = crate::W; 3 | #[doc = "Register ALRML `reset()`'s with value 0xffff"] 4 | impl crate::ResetValue for super::ALRML { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0xffff 9 | } 10 | } 11 | #[doc = "Write proxy for field `ALRM`"] 12 | pub struct ALRM_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> ALRM_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:15 - alarm value low"] 25 | #[inline(always)] 26 | pub fn alrm(&mut self) -> ALRM_W { 27 | ALRM_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/cnth.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CNTH"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CNTH"] 4 | pub type W = crate::W; 5 | #[doc = "Register CNTH `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CNTH { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - RTC counter value high"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - RTC counter value high"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/cntl.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CNTL"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CNTL"] 4 | pub type W = crate::W; 5 | #[doc = "Register CNTL `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CNTL { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - RTC counter value low"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - RTC counter value low"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/divh.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DIVH"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DIV`"] 4 | pub type DIV_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:3 - RTC divider value high"] 7 | #[inline(always)] 8 | pub fn div(&self) -> DIV_R { 9 | DIV_R::new((self.bits & 0x0f) as u8) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/divl.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DIVL"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `DIV`"] 4 | pub type DIV_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - RTC divider value low"] 7 | #[inline(always)] 8 | pub fn div(&self) -> DIV_R { 9 | DIV_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/psch.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register PSCH"] 2 | pub type W = crate::W; 3 | #[doc = "Register PSCH `reset()`'s with value 0"] 4 | impl crate::ResetValue for super::PSCH { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0 9 | } 10 | } 11 | #[doc = "Write proxy for field `PSC`"] 12 | pub struct PSC_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> PSC_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:3 - RTC prescaler value high"] 25 | #[inline(always)] 26 | pub fn psc(&mut self) -> PSC_W { 27 | PSC_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/rtc/pscl.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register PSCL"] 2 | pub type W = crate::W; 3 | #[doc = "Register PSCL `reset()`'s with value 0x8000"] 4 | impl crate::ResetValue for super::PSCL { 5 | type Type = u32; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0x8000 9 | } 10 | } 11 | #[doc = "Write proxy for field `PSC`"] 12 | pub struct PSC_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> PSC_W<'a> { 16 | #[doc = r"Writes raw bits to the field"] 17 | #[inline(always)] 18 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 19 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 20 | self.w 21 | } 22 | } 23 | impl W { 24 | #[doc = "Bits 0:15 - RTC prescaler value low"] 25 | #[inline(always)] 26 | pub fn psc(&mut self) -> PSC_W { 27 | PSC_W { w: self } 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/spi0/rcrc.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register RCRC"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `RCRC`"] 4 | pub type RCRC_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - RX CRC value"] 7 | #[inline(always)] 8 | pub fn rcrc(&self) -> RCRC_R { 9 | RCRC_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/spi0/tcrc.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register TCRC"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `TCRC`"] 4 | pub type TCRC_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - Tx CRC value"] 7 | #[inline(always)] 8 | pub fn tcrc(&self) -> TCRC_R { 9 | TCRC_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer0/car.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CAR"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CAR"] 4 | pub type W = crate::W; 5 | #[doc = "Register CAR `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CAR { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CARL`"] 14 | pub type CARL_R = crate::R; 15 | #[doc = "Write proxy for field `CARL`"] 16 | pub struct CARL_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CARL_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Counter auto reload value"] 29 | #[inline(always)] 30 | pub fn carl(&self) -> CARL_R { 31 | CARL_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Counter auto reload value"] 36 | #[inline(always)] 37 | pub fn carl(&mut self) -> CARL_W { 38 | CARL_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer0/cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CNT { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - current counter value"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - current counter value"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer0/crep.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CREP"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CREP"] 4 | pub type W = crate::W; 5 | #[doc = "Register CREP `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CREP { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CREP`"] 14 | pub type CREP_R = crate::R; 15 | #[doc = "Write proxy for field `CREP`"] 16 | pub struct CREP_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CREP_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xff) | ((value as u16) & 0xff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:7 - Counter repetition value"] 29 | #[inline(always)] 30 | pub fn crep(&self) -> CREP_R { 31 | CREP_R::new((self.bits & 0xff) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:7 - Counter repetition value"] 36 | #[inline(always)] 37 | pub fn crep(&mut self) -> CREP_W { 38 | CREP_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer0/dmatb.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DMATB"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DMATB"] 4 | pub type W = crate::W; 5 | #[doc = "Register DMATB `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DMATB { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DMATB`"] 14 | pub type DMATB_R = crate::R; 15 | #[doc = "Write proxy for field `DMATB`"] 16 | pub struct DMATB_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DMATB_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - DMA transfer buffer"] 29 | #[inline(always)] 30 | pub fn dmatb(&self) -> DMATB_R { 31 | DMATB_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - DMA transfer buffer"] 36 | #[inline(always)] 37 | pub fn dmatb(&mut self) -> DMATB_W { 38 | DMATB_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer0/psc.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register PSC"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register PSC"] 4 | pub type W = crate::W; 5 | #[doc = "Register PSC `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::PSC { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `PSC`"] 14 | pub type PSC_R = crate::R; 15 | #[doc = "Write proxy for field `PSC`"] 16 | pub struct PSC_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> PSC_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Prescaler value of the counter clock"] 29 | #[inline(always)] 30 | pub fn psc(&self) -> PSC_R { 31 | PSC_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Prescaler value of the counter clock"] 36 | #[inline(always)] 37 | pub fn psc(&mut self) -> PSC_W { 38 | PSC_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer1/car.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CAR"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CAR"] 4 | pub type W = crate::W; 5 | #[doc = "Register CAR `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CAR { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CARL`"] 14 | pub type CARL_R = crate::R; 15 | #[doc = "Write proxy for field `CARL`"] 16 | pub struct CARL_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CARL_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Counter auto reload value"] 29 | #[inline(always)] 30 | pub fn carl(&self) -> CARL_R { 31 | CARL_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Counter auto reload value"] 36 | #[inline(always)] 37 | pub fn carl(&mut self) -> CARL_W { 38 | CARL_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer1/cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CNT { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - counter value"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - counter value"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer1/dmatb.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DMATB"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DMATB"] 4 | pub type W = crate::W; 5 | #[doc = "Register DMATB `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DMATB { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DMATB`"] 14 | pub type DMATB_R = crate::R; 15 | #[doc = "Write proxy for field `DMATB`"] 16 | pub struct DMATB_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DMATB_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - DMA transfer buffer"] 29 | #[inline(always)] 30 | pub fn dmatb(&self) -> DMATB_R { 31 | DMATB_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - DMA transfer buffer"] 36 | #[inline(always)] 37 | pub fn dmatb(&mut self) -> DMATB_W { 38 | DMATB_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer1/psc.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register PSC"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register PSC"] 4 | pub type W = crate::W; 5 | #[doc = "Register PSC `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::PSC { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `PSC`"] 14 | pub type PSC_R = crate::R; 15 | #[doc = "Write proxy for field `PSC`"] 16 | pub struct PSC_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> PSC_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Prescaler value of the counter clock"] 29 | #[inline(always)] 30 | pub fn psc(&self) -> PSC_R { 31 | PSC_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Prescaler value of the counter clock"] 36 | #[inline(always)] 37 | pub fn psc(&mut self) -> PSC_W { 38 | PSC_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer5/car.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CAR"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CAR"] 4 | pub type W = crate::W; 5 | #[doc = "Register CAR `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CAR { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CARL`"] 14 | pub type CARL_R = crate::R; 15 | #[doc = "Write proxy for field `CARL`"] 16 | pub struct CARL_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CARL_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Counter auto reload value"] 29 | #[inline(always)] 30 | pub fn carl(&self) -> CARL_R { 31 | CARL_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Counter auto reload value"] 36 | #[inline(always)] 37 | pub fn carl(&mut self) -> CARL_W { 38 | CARL_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer5/cnt.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CNT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CNT"] 4 | pub type W = crate::W; 5 | #[doc = "Register CNT `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CNT { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CNT`"] 14 | pub type CNT_R = crate::R; 15 | #[doc = "Write proxy for field `CNT`"] 16 | pub struct CNT_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CNT_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Low counter value"] 29 | #[inline(always)] 30 | pub fn cnt(&self) -> CNT_R { 31 | CNT_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Low counter value"] 36 | #[inline(always)] 37 | pub fn cnt(&mut self) -> CNT_W { 38 | CNT_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer5/ctl1.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CTL1"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CTL1"] 4 | pub type W = crate::W; 5 | #[doc = "Register CTL1 `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::CTL1 { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `MMC`"] 14 | pub type MMC_R = crate::R; 15 | #[doc = "Write proxy for field `MMC`"] 16 | pub struct MMC_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> MMC_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u16) & 0x07) << 4); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 4:6 - Master mode control"] 29 | #[inline(always)] 30 | pub fn mmc(&self) -> MMC_R { 31 | MMC_R::new(((self.bits >> 4) & 0x07) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 4:6 - Master mode control"] 36 | #[inline(always)] 37 | pub fn mmc(&mut self) -> MMC_W { 38 | MMC_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer5/psc.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register PSC"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register PSC"] 4 | pub type W = crate::W; 5 | #[doc = "Register PSC `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::PSC { 7 | type Type = u16; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `PSC`"] 14 | pub type PSC_R = crate::R; 15 | #[doc = "Write proxy for field `PSC`"] 16 | pub struct PSC_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> PSC_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u16) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Prescaler value of the counter clock"] 29 | #[inline(always)] 30 | pub fn psc(&self) -> PSC_R { 31 | PSC_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Prescaler value of the counter clock"] 36 | #[inline(always)] 37 | pub fn psc(&mut self) -> PSC_W { 38 | PSC_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/timer5/swevg.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Writer for register SWEVG"] 2 | pub type W = crate::W; 3 | #[doc = "Register SWEVG `reset()`'s with value 0"] 4 | impl crate::ResetValue for super::SWEVG { 5 | type Type = u16; 6 | #[inline(always)] 7 | fn reset_value() -> Self::Type { 8 | 0 9 | } 10 | } 11 | #[doc = "Write proxy for field `UPG`"] 12 | pub struct UPG_W<'a> { 13 | w: &'a mut W, 14 | } 15 | impl<'a> UPG_W<'a> { 16 | #[doc = r"Sets the field bit"] 17 | #[inline(always)] 18 | pub fn set_bit(self) -> &'a mut W { 19 | self.bit(true) 20 | } 21 | #[doc = r"Clears the field bit"] 22 | #[inline(always)] 23 | pub fn clear_bit(self) -> &'a mut W { 24 | self.bit(false) 25 | } 26 | #[doc = r"Writes raw bits to the field"] 27 | #[inline(always)] 28 | pub fn bit(self, value: bool) -> &'a mut W { 29 | self.w.bits = (self.w.bits & !0x01) | ((value as u16) & 0x01); 30 | self.w 31 | } 32 | } 33 | impl W { 34 | #[doc = "Bit 0 - Update generation"] 35 | #[inline(always)] 36 | pub fn upg(&mut self) -> UPG_W { 37 | UPG_W { w: self } 38 | } 39 | } 40 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/uart3/data.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x01ff) | ((value as u32) & 0x01ff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:8 - Transmit or read data value"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0x01ff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:8 - Transmit or read data value"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/uart3/gp.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register GP"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register GP"] 4 | pub type W = crate::W; 5 | #[doc = "Register GP `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::GP { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `PSC`"] 14 | pub type PSC_R = crate::R; 15 | #[doc = "Write proxy for field `PSC`"] 16 | pub struct PSC_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> PSC_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:7 - Prescaler value"] 29 | #[inline(always)] 30 | pub fn psc(&self) -> PSC_R { 31 | PSC_R::new((self.bits & 0xff) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:7 - Prescaler value"] 36 | #[inline(always)] 37 | pub fn psc(&mut self) -> PSC_W { 38 | PSC_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usart0/data.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DATA"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register DATA"] 4 | pub type W = crate::W; 5 | #[doc = "Register DATA `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::DATA { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `DATA`"] 14 | pub type DATA_R = crate::R; 15 | #[doc = "Write proxy for field `DATA`"] 16 | pub struct DATA_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> DATA_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x01ff) | ((value as u32) & 0x01ff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:8 - Transmit or read data value"] 29 | #[inline(always)] 30 | pub fn data(&self) -> DATA_R { 31 | DATA_R::new((self.bits & 0x01ff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:8 - Transmit or read data value"] 36 | #[inline(always)] 37 | pub fn data(&mut self) -> DATA_W { 38 | DATA_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_device/daepint.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DAEPINT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IEPITB`"] 4 | pub type IEPITB_R = crate::R; 5 | #[doc = "Reader of field `OEPITB`"] 6 | pub type OEPITB_R = crate::R; 7 | impl R { 8 | #[doc = "Bits 0:3 - Device all IN endpoint interrupt bits"] 9 | #[inline(always)] 10 | pub fn iepitb(&self) -> IEPITB_R { 11 | IEPITB_R::new((self.bits & 0x0f) as u8) 12 | } 13 | #[doc = "Bits 16:19 - Device all OUT endpoint interrupt bits"] 14 | #[inline(always)] 15 | pub fn oepitb(&self) -> OEPITB_R { 16 | OEPITB_R::new(((self.bits >> 16) & 0x0f) as u8) 17 | } 18 | } 19 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_device/diep0tfstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DIEP0TFSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IEPTFS`"] 4 | pub type IEPTFS_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] 7 | #[inline(always)] 8 | pub fn ieptfs(&self) -> IEPTFS_R { 9 | IEPTFS_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_device/diep1tfstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DIEP1TFSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IEPTFS`"] 4 | pub type IEPTFS_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] 7 | #[inline(always)] 8 | pub fn ieptfs(&self) -> IEPTFS_R { 9 | IEPTFS_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_device/diep2tfstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DIEP2TFSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IEPTFS`"] 4 | pub type IEPTFS_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] 7 | #[inline(always)] 8 | pub fn ieptfs(&self) -> IEPTFS_R { 9 | IEPTFS_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_device/diep3tfstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DIEP3TFSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `IEPTFS`"] 4 | pub type IEPTFS_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] 7 | #[inline(always)] 8 | pub fn ieptfs(&self) -> IEPTFS_R { 9 | IEPTFS_R::new((self.bits & 0xffff) as u16) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_device/dstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register DSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `SPST`"] 4 | pub type SPST_R = crate::R; 5 | #[doc = "Reader of field `ES`"] 6 | pub type ES_R = crate::R; 7 | #[doc = "Reader of field `FNRSOF`"] 8 | pub type FNRSOF_R = crate::R; 9 | impl R { 10 | #[doc = "Bit 0 - Suspend status"] 11 | #[inline(always)] 12 | pub fn spst(&self) -> SPST_R { 13 | SPST_R::new((self.bits & 0x01) != 0) 14 | } 15 | #[doc = "Bits 1:2 - Enumerated speed"] 16 | #[inline(always)] 17 | pub fn es(&self) -> ES_R { 18 | ES_R::new(((self.bits >> 1) & 0x03) as u8) 19 | } 20 | #[doc = "Bits 8:21 - Frame number of the received SOF"] 21 | #[inline(always)] 22 | pub fn fnrsof(&self) -> FNRSOF_R { 23 | FNRSOF_R::new(((self.bits >> 8) & 0x3fff) as u16) 24 | } 25 | } 26 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/cid.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register CID"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register CID"] 4 | pub type W = crate::W; 5 | #[doc = "Register CID `reset()`'s with value 0x1000"] 6 | impl crate::ResetValue for super::CID { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0x1000 11 | } 12 | } 13 | #[doc = "Reader of field `CID`"] 14 | pub type CID_R = crate::R; 15 | #[doc = "Write proxy for field `CID`"] 16 | pub struct CID_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CID_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u32) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff_ffff) | ((value as u32) & 0xffff_ffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:31 - Core ID"] 29 | #[inline(always)] 30 | pub fn cid(&self) -> CID_R { 31 | CID_R::new((self.bits & 0xffff_ffff) as u32) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:31 - Core ID"] 36 | #[inline(always)] 37 | pub fn cid(&mut self) -> CID_W { 38 | CID_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/grflen.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register GRFLEN"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register GRFLEN"] 4 | pub type W = crate::W; 5 | #[doc = "Register GRFLEN `reset()`'s with value 0x0200"] 6 | impl crate::ResetValue for super::GRFLEN { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0x0200 11 | } 12 | } 13 | #[doc = "Reader of field `RXFD`"] 14 | pub type RXFD_R = crate::R; 15 | #[doc = "Write proxy for field `RXFD`"] 16 | pub struct RXFD_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> RXFD_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Rx FIFO depth"] 29 | #[inline(always)] 30 | pub fn rxfd(&self) -> RXFD_R { 31 | RXFD_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Rx FIFO depth"] 36 | #[inline(always)] 37 | pub fn rxfd(&mut self) -> RXFD_W { 38 | RXFD_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/grstatp_device.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register GRSTATP_Device"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `EPNUM`"] 4 | pub type EPNUM_R = crate::R; 5 | #[doc = "Reader of field `BCOUNT`"] 6 | pub type BCOUNT_R = crate::R; 7 | #[doc = "Reader of field `DPID`"] 8 | pub type DPID_R = crate::R; 9 | #[doc = "Reader of field `RPCKST`"] 10 | pub type RPCKST_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 0:3 - Endpoint number"] 13 | #[inline(always)] 14 | pub fn epnum(&self) -> EPNUM_R { 15 | EPNUM_R::new((self.bits & 0x0f) as u8) 16 | } 17 | #[doc = "Bits 4:14 - Byte count"] 18 | #[inline(always)] 19 | pub fn bcount(&self) -> BCOUNT_R { 20 | BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) 21 | } 22 | #[doc = "Bits 15:16 - Data PID"] 23 | #[inline(always)] 24 | pub fn dpid(&self) -> DPID_R { 25 | DPID_R::new(((self.bits >> 15) & 0x03) as u8) 26 | } 27 | #[doc = "Bits 17:20 - Recieve packet status"] 28 | #[inline(always)] 29 | pub fn rpckst(&self) -> RPCKST_R { 30 | RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/grstatp_host.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register GRSTATP_Host"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `CNUM`"] 4 | pub type CNUM_R = crate::R; 5 | #[doc = "Reader of field `BCOUNT`"] 6 | pub type BCOUNT_R = crate::R; 7 | #[doc = "Reader of field `DPID`"] 8 | pub type DPID_R = crate::R; 9 | #[doc = "Reader of field `RPCKST`"] 10 | pub type RPCKST_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 0:3 - Channel number"] 13 | #[inline(always)] 14 | pub fn cnum(&self) -> CNUM_R { 15 | CNUM_R::new((self.bits & 0x0f) as u8) 16 | } 17 | #[doc = "Bits 4:14 - Byte count"] 18 | #[inline(always)] 19 | pub fn bcount(&self) -> BCOUNT_R { 20 | BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) 21 | } 22 | #[doc = "Bits 15:16 - Data PID"] 23 | #[inline(always)] 24 | pub fn dpid(&self) -> DPID_R { 25 | DPID_R::new(((self.bits >> 15) & 0x03) as u8) 26 | } 27 | #[doc = "Bits 17:20 - Reivece packet status"] 28 | #[inline(always)] 29 | pub fn rpckst(&self) -> RPCKST_R { 30 | RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/grstatr_device.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register GRSTATR_Device"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `EPNUM`"] 4 | pub type EPNUM_R = crate::R; 5 | #[doc = "Reader of field `BCOUNT`"] 6 | pub type BCOUNT_R = crate::R; 7 | #[doc = "Reader of field `DPID`"] 8 | pub type DPID_R = crate::R; 9 | #[doc = "Reader of field `RPCKST`"] 10 | pub type RPCKST_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 0:3 - Endpoint number"] 13 | #[inline(always)] 14 | pub fn epnum(&self) -> EPNUM_R { 15 | EPNUM_R::new((self.bits & 0x0f) as u8) 16 | } 17 | #[doc = "Bits 4:14 - Byte count"] 18 | #[inline(always)] 19 | pub fn bcount(&self) -> BCOUNT_R { 20 | BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) 21 | } 22 | #[doc = "Bits 15:16 - Data PID"] 23 | #[inline(always)] 24 | pub fn dpid(&self) -> DPID_R { 25 | DPID_R::new(((self.bits >> 15) & 0x03) as u8) 26 | } 27 | #[doc = "Bits 17:20 - Recieve packet status"] 28 | #[inline(always)] 29 | pub fn rpckst(&self) -> RPCKST_R { 30 | RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/grstatr_host.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register GRSTATR_Host"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `CNUM`"] 4 | pub type CNUM_R = crate::R; 5 | #[doc = "Reader of field `BCOUNT`"] 6 | pub type BCOUNT_R = crate::R; 7 | #[doc = "Reader of field `DPID`"] 8 | pub type DPID_R = crate::R; 9 | #[doc = "Reader of field `RPCKST`"] 10 | pub type RPCKST_R = crate::R; 11 | impl R { 12 | #[doc = "Bits 0:3 - Channel number"] 13 | #[inline(always)] 14 | pub fn cnum(&self) -> CNUM_R { 15 | CNUM_R::new((self.bits & 0x0f) as u8) 16 | } 17 | #[doc = "Bits 4:14 - Byte count"] 18 | #[inline(always)] 19 | pub fn bcount(&self) -> BCOUNT_R { 20 | BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) 21 | } 22 | #[doc = "Bits 15:16 - Data PID"] 23 | #[inline(always)] 24 | pub fn dpid(&self) -> DPID_R { 25 | DPID_R::new(((self.bits >> 15) & 0x03) as u8) 26 | } 27 | #[doc = "Bits 17:20 - Reivece packet status"] 28 | #[inline(always)] 29 | pub fn rpckst(&self) -> RPCKST_R { 30 | RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) 31 | } 32 | } 33 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_global/hnptfqstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register HNPTFQSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `NPTXFS`"] 4 | pub type NPTXFS_R = crate::R; 5 | #[doc = "Reader of field `NPTXRQS`"] 6 | pub type NPTXRQS_R = crate::R; 7 | #[doc = "Reader of field `NPTXRQTOP`"] 8 | pub type NPTXRQTOP_R = crate::R; 9 | impl R { 10 | #[doc = "Bits 0:15 - Non-periodic TxFIFO space"] 11 | #[inline(always)] 12 | pub fn nptxfs(&self) -> NPTXFS_R { 13 | NPTXFS_R::new((self.bits & 0xffff) as u16) 14 | } 15 | #[doc = "Bits 16:23 - Non-periodic transmit request queue space"] 16 | #[inline(always)] 17 | pub fn nptxrqs(&self) -> NPTXRQS_R { 18 | NPTXRQS_R::new(((self.bits >> 16) & 0xff) as u8) 19 | } 20 | #[doc = "Bits 24:30 - Top of the non-periodic transmit request queue"] 21 | #[inline(always)] 22 | pub fn nptxrqtop(&self) -> NPTXRQTOP_R { 23 | NPTXRQTOP_R::new(((self.bits >> 24) & 0x7f) as u8) 24 | } 25 | } 26 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_host/hachint.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register HACHINT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `HACHINT`"] 4 | pub type HACHINT_R = crate::R; 5 | impl R { 6 | #[doc = "Bits 0:7 - Host all channel interrupts"] 7 | #[inline(always)] 8 | pub fn hachint(&self) -> HACHINT_R { 9 | HACHINT_R::new((self.bits & 0xff) as u8) 10 | } 11 | } 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_host/hctl.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register HCTL"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register HCTL"] 4 | pub type W = crate::W; 5 | #[doc = "Register HCTL `reset()`'s with value 0"] 6 | impl crate::ResetValue for super::HCTL { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0 11 | } 12 | } 13 | #[doc = "Reader of field `CLKSEL`"] 14 | pub type CLKSEL_R = crate::R; 15 | #[doc = "Write proxy for field `CLKSEL`"] 16 | pub struct CLKSEL_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> CLKSEL_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u8) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:1 - clock select for USB clock"] 29 | #[inline(always)] 30 | pub fn clksel(&self) -> CLKSEL_R { 31 | CLKSEL_R::new((self.bits & 0x03) as u8) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:1 - clock select for USB clock"] 36 | #[inline(always)] 37 | pub fn clksel(&mut self) -> CLKSEL_W { 38 | CLKSEL_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_host/hfinfr.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register HFINFR"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `FRNUM`"] 4 | pub type FRNUM_R = crate::R; 5 | #[doc = "Reader of field `FRT`"] 6 | pub type FRT_R = crate::R; 7 | impl R { 8 | #[doc = "Bits 0:15 - Frame number"] 9 | #[inline(always)] 10 | pub fn frnum(&self) -> FRNUM_R { 11 | FRNUM_R::new((self.bits & 0xffff) as u16) 12 | } 13 | #[doc = "Bits 16:31 - Frame remaining time"] 14 | #[inline(always)] 15 | pub fn frt(&self) -> FRT_R { 16 | FRT_R::new(((self.bits >> 16) & 0xffff) as u16) 17 | } 18 | } 19 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_host/hft.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register HFT"] 2 | pub type R = crate::R; 3 | #[doc = "Writer for register HFT"] 4 | pub type W = crate::W; 5 | #[doc = "Register HFT `reset()`'s with value 0xbb80"] 6 | impl crate::ResetValue for super::HFT { 7 | type Type = u32; 8 | #[inline(always)] 9 | fn reset_value() -> Self::Type { 10 | 0xbb80 11 | } 12 | } 13 | #[doc = "Reader of field `FRI`"] 14 | pub type FRI_R = crate::R; 15 | #[doc = "Write proxy for field `FRI`"] 16 | pub struct FRI_W<'a> { 17 | w: &'a mut W, 18 | } 19 | impl<'a> FRI_W<'a> { 20 | #[doc = r"Writes raw bits to the field"] 21 | #[inline(always)] 22 | pub unsafe fn bits(self, value: u16) -> &'a mut W { 23 | self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff); 24 | self.w 25 | } 26 | } 27 | impl R { 28 | #[doc = "Bits 0:15 - Frame interval"] 29 | #[inline(always)] 30 | pub fn fri(&self) -> FRI_R { 31 | FRI_R::new((self.bits & 0xffff) as u16) 32 | } 33 | } 34 | impl W { 35 | #[doc = "Bits 0:15 - Frame interval"] 36 | #[inline(always)] 37 | pub fn fri(&mut self) -> FRI_W { 38 | FRI_W { w: self } 39 | } 40 | } 41 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_host/hptfqstat.rs: -------------------------------------------------------------------------------- 1 | #[doc = "Reader of register HPTFQSTAT"] 2 | pub type R = crate::R; 3 | #[doc = "Reader of field `PTXFS`"] 4 | pub type PTXFS_R = crate::R; 5 | #[doc = "Reader of field `PTXREQS`"] 6 | pub type PTXREQS_R = crate::R; 7 | #[doc = "Reader of field `PTXREQT`"] 8 | pub type PTXREQT_R = crate::R; 9 | impl R { 10 | #[doc = "Bits 0:15 - Periodic transmit data FIFO space available"] 11 | #[inline(always)] 12 | pub fn ptxfs(&self) -> PTXFS_R { 13 | PTXFS_R::new((self.bits & 0xffff) as u16) 14 | } 15 | #[doc = "Bits 16:23 - Periodic transmit request queue space available"] 16 | #[inline(always)] 17 | pub fn ptxreqs(&self) -> PTXREQS_R { 18 | PTXREQS_R::new(((self.bits >> 16) & 0xff) as u8) 19 | } 20 | #[doc = "Bits 24:31 - Top of the periodic transmit request queue"] 21 | #[inline(always)] 22 | pub fn ptxreqt(&self) -> PTXREQT_R { 23 | PTXREQT_R::new(((self.bits >> 24) & 0xff) as u8) 24 | } 25 | } 26 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/src/usbfs_pwrclk.rs: -------------------------------------------------------------------------------- 1 | #[doc = r"Register block"] 2 | #[repr(C)] 3 | pub struct RegisterBlock { 4 | #[doc = "0x00 - power and clock gating control register (PWRCLKCTL)"] 5 | pub pwrclkctl: PWRCLKCTL, 6 | } 7 | #[doc = "power and clock gating control register (PWRCLKCTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwrclkctl](pwrclkctl) module"] 8 | pub type PWRCLKCTL = crate::Reg; 9 | #[allow(missing_docs)] 10 | #[doc(hidden)] 11 | pub struct _PWRCLKCTL; 12 | #[doc = "`read()` method returns [pwrclkctl::R](pwrclkctl::R) reader structure"] 13 | impl crate::Readable for PWRCLKCTL {} 14 | #[doc = "`write(|w| ..)` method takes [pwrclkctl::W](pwrclkctl::W) writer structure"] 15 | impl crate::Writable for PWRCLKCTL {} 16 | #[doc = "power and clock gating control register (PWRCLKCTL)"] 17 | pub mod pwrclkctl; 18 | -------------------------------------------------------------------------------- /hal2/gd32vf103-pac/update.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | # Before running this script, install the required software: 4 | # cargo install svd2rust --version=0.17.0 5 | # cargo install form --version=0.7.0 6 | # pip3 install --upgrade --user svdtools 7 | 8 | set -x 9 | set -e 10 | 11 | rm -rf src 12 | mkdir src 13 | svd patch patches/gd32vf103.yaml 14 | svd2rust --target riscv -i GD32VF103.svd.patched 15 | form -i lib.rs -o src 16 | rm lib.rs 17 | cargo fmt 18 | grep -E 'feature = "rt"|extern crate riscv_rt' src/lib.rs | tee librs-patch 19 | grep -Ev 'feature = "rt"|extern crate riscv_rt' src/lib.rs > librs-temp && mv librs-temp src/lib.rs 20 | -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | authors = ["The RISC-V Team "] 3 | categories = ["embedded", "hardware-support", "no-std"] 4 | description = "HAL for GD32VF103 microcontrollers" 5 | edition = "2018" 6 | keywords = ["riscv", "gd32", "hal"] 7 | license = "ISC" 8 | name = "gd32vf103xx-hal" 9 | repository = "https://github.com/riscv-rust/gd32vf103xx-hal" 10 | version = "0.5.0" 11 | 12 | [dependencies] 13 | cast = {version = "0.2.3", default-features = false} 14 | embedded-dma = "0.1.2" 15 | gd32vf103-pac = {path = "../gd32vf103-pac"} 16 | nb = "0.1.2" 17 | riscv = "0.8.0" 18 | vcell = "0.1.2" 19 | void = {version = "1.0.2", default-features = false} 20 | 21 | [dependencies.embedded-hal] 22 | features = ["unproven"] 23 | version = "0.2.3" 24 | -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/assemble.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | set -euxo pipefail 4 | 5 | # remove existing blobs because otherwise this will append object files to the old blobs 6 | rm -f bin/*.a 7 | 8 | riscv64-unknown-elf-gcc -c -mabi=ilp32 -march=rv32imac eclic-mode-hack.S -o bin/eclic-mode-hack.o 9 | ar crs bin/gd32vf103xx-hal.a bin/eclic-mode-hack.o 10 | 11 | rm bin/eclic-mode-hack.o 12 | -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/bin/gd32vf103xx-hal.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/gqf2008/Xtask/65e41fb352b395db096442cf8ccde9deb53ac617/hal2/gd32vf103xx-hal/bin/gd32vf103xx-hal.a -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/build.rs: -------------------------------------------------------------------------------- 1 | use std::env; 2 | use std::fs; 3 | use std::path::PathBuf; 4 | 5 | fn main() { 6 | let target = env::var("TARGET").unwrap(); 7 | let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap()); 8 | let name = env::var("CARGO_PKG_NAME").unwrap(); 9 | 10 | if target.starts_with("riscv") { 11 | fs::copy( 12 | format!("bin/{}.a", name), 13 | out_dir.join(format!("lib{}.a", name)), 14 | ).unwrap(); 15 | 16 | println!("cargo:rustc-link-lib=static={}", name); 17 | println!("cargo:rustc-link-search={}", out_dir.display()); 18 | } 19 | 20 | println!("cargo:rerun-if-changed=bin/{}.a", name); 21 | 22 | 23 | 24 | } 25 | -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/src/lib.rs: -------------------------------------------------------------------------------- 1 | //! HAL for the GD32VF103xx family 2 | //! 3 | //! This is an implementation of the [`embedded-hal`] traits for the GD32VF103xx family 4 | 5 | //#![deny(missing_docs)] 6 | #![no_std] 7 | 8 | pub use gd32vf103_pac as pac; 9 | 10 | use embedded_hal as hal; 11 | 12 | pub mod adc; 13 | pub mod afio; 14 | pub mod backup_domain; 15 | pub mod delay; 16 | pub mod dma; 17 | pub mod eclic; 18 | pub mod exmc; 19 | pub mod exti; 20 | pub mod gpio; 21 | pub mod i2c; 22 | pub mod prelude; 23 | pub mod pwm; 24 | pub mod rcu; 25 | pub mod rtc; 26 | pub mod serial; 27 | pub mod signature; 28 | pub mod spi; 29 | pub mod time; 30 | pub mod timer; 31 | pub mod watchdog; 32 | -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/src/prelude.rs: -------------------------------------------------------------------------------- 1 | //! Prelude 2 | 3 | pub use crate::hal::prelude::*; 4 | 5 | pub use crate::afio::AfioExt as _gd32vf103xx_hal_afio_AfioExt; 6 | pub use crate::backup_domain::BkpExt as _gd32vf103xx_hal_backup_domain_BkpExt; 7 | pub use crate::exmc::ExmcExt as _gd32vf103xx_hal_exmc_ExmcExt; 8 | pub use crate::gpio::GpioExt as _gd32vf103xx_hal_gpio_GpioExt; 9 | pub use crate::rcu::RcuExt as _gd32vf103xx_hal_rcu_RcuExt; 10 | pub use crate::time::U32Ext as _gd32vf103xx_hal_time_U32Ext; 11 | -------------------------------------------------------------------------------- /hal2/gd32vf103xx-hal/src/signature.rs: -------------------------------------------------------------------------------- 1 | //! Device electronic signature 2 | //! 3 | //! Section 1.5, GD32VF103 User Manual 4 | 5 | const FLASH_SIZE_PTR: *const u16 = 0x1FFF_F7E0 as *const _; 6 | const SRAM_SIZE_PTR: *const u16 = 0x1FFF_F7E2 as *const _; 7 | const DEVICE_ID_PTR: *const [u32; 3] = 0x1FFF_F7E8 as *const _; 8 | 9 | /// Flash memory size in KBytes. 10 | #[inline] 11 | pub fn flash_size_kb() -> u16 { 12 | unsafe { *FLASH_SIZE_PTR } 13 | } 14 | 15 | /// On-chip SRAM size in KBytes. 16 | #[inline] 17 | pub fn sram_size_kb() -> u16 { 18 | unsafe { *SRAM_SIZE_PTR } 19 | } 20 | 21 | /// Factory programed unique device id. 22 | #[inline] 23 | pub fn device_id() -> &'static [u32; 3] { 24 | unsafe { &*DEVICE_ID_PTR } 25 | } 26 | -------------------------------------------------------------------------------- /rust-toolchain: -------------------------------------------------------------------------------- 1 | nightly -------------------------------------------------------------------------------- /src/arch/cortex_m/mod.rs: -------------------------------------------------------------------------------- 1 | //! Cortex®-Mx ARM指令集架构，重新导出 2 | //! https://github.com/rust-embedded/cortex-m 3 | 4 | pub use cortex_m::*; 5 | pub use cortex_m_rt as rt; 6 | -------------------------------------------------------------------------------- /src/arch/mod.rs: -------------------------------------------------------------------------------- 1 | //! 这个包是RUST官方嵌入式工作组项目的导出 2 | 3 | #[cfg(all(any(target_arch = "riscv32", target_arch = "riscv64")))] 4 | pub mod riscv; 5 | 6 | #[cfg(target_arch = "arm")] 7 | pub mod cortex_m; 8 | 9 | #[cfg(target_arch = "x86_64")] 10 | pub mod x86_64; 11 | -------------------------------------------------------------------------------- /src/arch/riscv/mod.rs: -------------------------------------------------------------------------------- 1 | //! riscv指令集架构，重新导出 2 | //! https://github.com/rust-embedded/riscv-rt 3 | //! https://github.com/rust-embedded/riscv 4 | 5 | pub use riscv::*; 6 | pub use riscv_rt as rt; 7 | 8 | /// 异常处理函数 9 | #[allow(non_snake_case)] 10 | #[no_mangle] 11 | fn ExceptionHandler(_: &rt::TrapFrame) { 12 | let _cause = register::mcause::Exception::from(register::mcause::read().code() & 0xFFF); 13 | 14 | unsafe { 15 | asm::nop(); 16 | } 17 | } 18 | 19 | /// 默认异常处理函数 20 | #[allow(non_snake_case)] 21 | #[no_mangle] 22 | fn DefaultHandler() { 23 | let code = register::mcause::read().code() & 0xFFF; 24 | let _cause = register::mcause::Exception::from(code); 25 | 26 | unsafe { 27 | asm::wfi(); 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /src/arch/x86_64/mod.rs: -------------------------------------------------------------------------------- 1 | //! x86_64指令集架构，重新导出 2 | //! https://github.com/rust-osdev/x86_64 3 | 4 | pub use x86_64::*; 5 | -------------------------------------------------------------------------------- /src/bsp/bluepill/led.rs: -------------------------------------------------------------------------------- 1 | use stm32f1xx_hal::gpio::{Output, Pin, PushPull, CRH}; 2 | 3 | pub struct Led(pub Pin, CRH, 'C', 13>); 4 | 5 | impl Led { 6 | pub fn new(pin: Pin, CRH, 'C', 13>) -> Self { 7 | Self(pin) 8 | } 9 | 10 | pub fn off(&mut self) { 11 | self.0.set_high() 12 | } 13 | 14 | pub fn on(&mut self) { 15 | self.0.set_low() 16 | } 17 | 18 | pub fn is_on(&mut self) -> bool { 19 | self.0.is_set_low() 20 | } 21 | 22 | pub fn is_off(&mut self) -> bool { 23 | self.0.is_set_high() 24 | } 25 | 26 | pub fn toggle(&mut self) { 27 | self.0.toggle() 28 | } 29 | } 30 | -------------------------------------------------------------------------------- /src/bsp/bluepill/mod.rs: -------------------------------------------------------------------------------- 1 | pub use stm32f1xx_hal as hal; 2 | pub mod led; 3 | pub mod stdout; 4 | -------------------------------------------------------------------------------- /src/bsp/greenpill/led.rs: -------------------------------------------------------------------------------- 1 | use stm32f4xx_hal::gpio::{Output, Pin, PushPull}; 2 | 3 | pub struct Led { 4 | port: Pin<'C', 13, Output>, 5 | } 6 | 7 | impl Led { 8 | pub fn new(port: Pin<'C', 13>) -> Self { 9 | Self { 10 | port: port.into_push_pull_output(), 11 | } 12 | } 13 | pub fn off(&mut self) { 14 | self.port.set_high(); 15 | } 16 | 17 | pub fn on(&mut self) { 18 | self.port.set_low(); 19 | } 20 | 21 | pub fn toggle(&mut self) { 22 | self.port.toggle(); 23 | } 24 | } 25 | -------------------------------------------------------------------------------- /src/bsp/greenpill/mod.rs: -------------------------------------------------------------------------------- 1 | pub use stm32f4xx_hal as hal; 2 | 3 | pub mod led; 4 | pub mod stdout; 5 | 6 | static mut TAKEN: bool = false; 7 | 8 | pub fn take() -> Option<(cortex_m::Peripherals, stm32f4xx_hal::pac::Peripherals)> { 9 | cortex_m::interrupt::free(|_| { 10 | if unsafe { TAKEN } { 11 | None 12 | } else { 13 | unsafe { TAKEN = true }; 14 | let cp = cortex_m::Peripherals::take().unwrap(); 15 | let dp = stm32f4xx_hal::pac::Peripherals::take().unwrap(); 16 | Some((cp, dp)) 17 | } 18 | }) 19 | } 20 | pub fn enable_interrupt(interrupt: hal::pac::Interrupt) { 21 | unsafe { 22 | cortex_m::peripheral::NVIC::unmask(interrupt); 23 | } 24 | } 25 | 26 | pub fn disable_interrupt(interrupt: hal::pac::Interrupt) { 27 | cortex_m::peripheral::NVIC::mask(interrupt); 28 | } 29 | -------------------------------------------------------------------------------- /src/bsp/longan_nano/delay.rs: -------------------------------------------------------------------------------- 1 | use embedded_hal::blocking::delay::{DelayMs, DelayUs}; 2 | use embedded_hal::timer::CountDown; 3 | use gd32vf103xx_hal::delay::Delay; 4 | use gd32vf103xx_hal::rcu::Rcu; 5 | use gd32vf103xx_hal::time::*; 6 | use gd32vf103xx_hal::{pac::TIMER0, timer::Timer}; 7 | 8 | pub fn time1(timer0: TIMER0, hz: u32, rcu: &mut Rcu) { 9 | let timer: Timer = Timer::timer0(timer0, hz.hz(), rcu); 10 | let delay = Delay::timer0(timer); 11 | } 12 | -------------------------------------------------------------------------------- /src/bsp/longan_nano/mod.rs: -------------------------------------------------------------------------------- 1 | // pub mod hcsr04; 2 | // pub mod kalman; 3 | // pub mod delay; 4 | pub mod lcd; 5 | pub mod led; 6 | pub mod stdout; 7 | pub use gd32vf103xx_hal as hal; 8 | -------------------------------------------------------------------------------- /src/bsp/mod.rs: -------------------------------------------------------------------------------- 1 | //! 板级支持包实现部分 2 | 3 | #[cfg(all(feature = "gd32vf103", feature = "longan_nano"))] 4 | pub mod longan_nano; 5 | 6 | #[cfg(all(feature = "stm32f4", feature = "greenpill"))] 7 | pub mod greenpill; 8 | 9 | #[cfg(all(feature = "stm32f1", feature = "bluepill"))] 10 | pub mod bluepill; 11 | 12 | #[cfg(all(feature = "rp2040", feature = "rp-pico"))] 13 | pub mod rp_pico; 14 | -------------------------------------------------------------------------------- /src/bsp/rp_pico/led.rs: -------------------------------------------------------------------------------- 1 | use embedded_hal::digital::v2::OutputPin; 2 | use rp2040_hal::gpio::{bank0::Gpio25, Output, Pin, PushPull}; 3 | pub struct Led { 4 | port: Pin>, 5 | } 6 | 7 | impl Led { 8 | pub fn new(pin: Pin>) -> Self { 9 | Self { 10 | port: pin.into_push_pull_output(), 11 | } 12 | } 13 | pub fn off(&mut self) { 14 | self.port.set_high().ok(); 15 | } 16 | 17 | pub fn on(&mut self) { 18 | self.port.set_low().ok(); 19 | } 20 | } 21 | -------------------------------------------------------------------------------- /src/chip/cm32m4/memory.x: -------------------------------------------------------------------------------- 1 | /* CM32M4xxR */ 2 | MEMORY 3 | { 4 | FLASH : ORIGIN = 0x08000000, LENGTH = 512k 5 | RAM : ORIGIN = 0x20000000, LENGTH = 128k 6 | } 7 | 8 | /*代码段进FLASH，就地执行*/ 9 | REGION_ALIAS("REGION_TEXT", FLASH); 10 | /*只读数据段进FLASH*/ 11 | REGION_ALIAS("REGION_RODATA", FLASH); 12 | /*变量段进RAM*/ 13 | REGION_ALIAS("REGION_DATA", RAM); 14 | /*未初始化变量段进RAM*/ 15 | REGION_ALIAS("REGION_BSS", RAM); 16 | REGION_ALIAS("REGION_HEAP", RAM); 17 | REGION_ALIAS("REGION_STACK", RAM); 18 | -------------------------------------------------------------------------------- /src/chip/gd32vf103/memory.x: -------------------------------------------------------------------------------- 1 | /* GD32VF103CB */ 2 | MEMORY 3 | { 4 | FLASH : ORIGIN = 0x08000000, LENGTH = 128k 5 | RAM : ORIGIN = 0x20000000, LENGTH = 32k 6 | } 7 | 8 | REGION_ALIAS("REGION_TEXT", FLASH); 9 | REGION_ALIAS("REGION_RODATA", FLASH); 10 | REGION_ALIAS("REGION_DATA", RAM); 11 | REGION_ALIAS("REGION_BSS", RAM); 12 | REGION_ALIAS("REGION_HEAP", RAM); 13 | REGION_ALIAS("REGION_STACK", RAM); 14 | -------------------------------------------------------------------------------- /src/chip/mod.rs: -------------------------------------------------------------------------------- 1 | //! 芯片移植模块 2 | 3 | include!("env.rs"); 4 | #[cfg(feature = "cm32m4")] 5 | pub mod cm32m4; 6 | #[cfg(feature = "gd32vf103")] 7 | pub mod gd32vf103; 8 | #[cfg(feature = "rp2040")] 9 | pub mod rp2040; 10 | #[cfg(feature = "stm32f1")] 11 | pub mod stm32f1; 12 | #[cfg(feature = "stm32f4")] 13 | pub mod stm32f4; 14 | #[cfg(feature = "stm32h7")] 15 | pub mod stm32h7; 16 | -------------------------------------------------------------------------------- /src/chip/rp2040/memory.x: -------------------------------------------------------------------------------- 1 | MEMORY { 2 | BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100 3 | FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100 4 | RAM : ORIGIN = 0x20000000, LENGTH = 256K 5 | } 6 | 7 | EXTERN(BOOT2_FIRMWARE) 8 | 9 | SECTIONS { 10 | /* ### Boot loader */ 11 | .boot2 ORIGIN(BOOT2) : 12 | { 13 | KEEP(*(.boot2)); 14 | } > BOOT2 15 | } INSERT BEFORE .text; -------------------------------------------------------------------------------- /src/chip/rp2040/port.S: -------------------------------------------------------------------------------- 1 | 2 | .extern CURRENT_TASK_PTR 3 | .extern switch_context 4 | # .section .text.exception 5 | # .align 3 6 | # .global SVCall 7 | # SVCall 8 | # ldr r3, =CURRENT_TASK_PTR 9 | # ldr r1, [r3] 10 | # ldr r0, [r1] 11 | # ldmia r0!, {{r4-r11}} 12 | # msr psp, r0 13 | # isb 14 | # mov r14, #0xfffffffd 15 | # bx r14 16 | 17 | .section .text.exception 18 | .align 3 19 | .global PendSV 20 | PendSV: 21 | mrs r0, psp 22 | ldr r3, =CURRENT_TASK_PTR 23 | ldr r2, [r3] 24 | subs r0, #32 25 | str r0, [r2] 26 | stmia r0!, {r4-r7} 27 | mov r4, r8 28 | mov r5, r9 29 | mov r6, r10 30 | mov r7, r11 31 | stmia r0!, {r4-r7} 32 | push {r3,r14} 33 | cpsid i 34 | bl switch_context 35 | cpsie i 36 | pop {r2, r3} 37 | ldr r1, [r2] 38 | ldr r0, [r1] 39 | adds r0, #16 40 | ldmia r0!, {r4-r7} 41 | mov r8, r4 42 | mov r9, r5 43 | mov r10, r6 44 | mov r11, r7 45 | msr psp, r0 46 | subs r0, #32 47 | ldmia r0!, {r4-r7} 48 | 49 | ldr r0, =0xE000ED08 // 向量表地址，将 0xE000ED08 加载到 R0 50 | ldr r0, [r0] //将 0xE000ED08 中的值，也就是向量表的实际地址加载到 R0 51 | ldr r0, [r0] //根据向量表实际存储地址，取出向量表中的第一项,向量表第一项存储主堆栈指针MSP的初始值 52 | msr msp, r0 //将堆栈地址写入主堆栈指针 53 | bx r3 54 | -------------------------------------------------------------------------------- /src/chip/rp2040/port.rs: -------------------------------------------------------------------------------- 1 | use core::arch::global_asm; 2 | use cortex_m::interrupt; 3 | 4 | use super::{SYSTICK_CLOCK_HZ, TICK_CLOCK_HZ}; 5 | use crate::{isr_sprintln, task::scheduler}; 6 | // use crate::{isr_sprint, isr_sprintln, sprintln}; 7 | use cortex_m_rt::exception; 8 | pub(crate) static mut SYSTICKS: u64 = 0; 9 | 10 | global_asm!(include_str!("port.S"), options(raw)); 11 | 12 | /// 系统节拍器中断 13 | #[exception] 14 | unsafe fn SysTick() { 15 | isr_sprintln!("SysTick"); 16 | const TICKS: u32 = SYSTICK_CLOCK_HZ as u32 / TICK_CLOCK_HZ as u32; 17 | interrupt::free(|_| { 18 | let tick = core::ptr::read_volatile(&SYSTICKS); 19 | core::ptr::write_volatile(&mut SYSTICKS, tick + TICKS as u64); 20 | if scheduler::systick() { 21 | cortex_m::peripheral::SCB::set_pendsv(); 22 | } 23 | }); 24 | } 25 | 26 | /// 软中断切换任务 27 | #[export_name = "switch_context"] 28 | unsafe extern "C" fn switch_context() { 29 | scheduler::schedule(); 30 | } 31 | 32 | /// 所有任务的退出函数，调用exit函数即可 33 | pub(crate) unsafe extern "C" fn task_exit() { 34 | scheduler::exit_current_task(); 35 | } 36 | -------------------------------------------------------------------------------- /src/chip/rp2040/startup.S: -------------------------------------------------------------------------------- 1 | ldr r3, = CURRENT_TASK_PTR /* Obtain location of pxCurrentTCB. */ 2 | ldr r1, [ r3 ] 3 | ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ 4 | adds r0, #32 /* Discard everything up to r0. */ 5 | msr psp, r0 /* This is now the new top of stack to use in the task. */ 6 | movs r0, #2 /* Switch to the psp stack. */ 7 | msr CONTROL, r0 8 | isb 9 | pop {r0-r5} /* Pop the registers that are saved automatically. */ 10 | mov lr, r5 /* lr is now in r5. */ 11 | pop {r3} /* The return address is now in r3. */ 12 | pop {r2} /* Pop and discard the XPSR. */ 13 | cpsie i /* The first task has its context and interrupts can be enabled. */ 14 | cpsie f 15 | bx r3 /* Finally, jump to the user defined task code. */ -------------------------------------------------------------------------------- /src/chip/stm32f1/memory.x: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | FLASH : ORIGIN = 0x08000000, LENGTH = 64K 4 | RAM : ORIGIN = 0x20000000, LENGTH = 20K 5 | } -------------------------------------------------------------------------------- /src/chip/stm32f4/memory.x: -------------------------------------------------------------------------------- 1 | MEMORY 2 | { 3 | /* NOTE K = KiBi = 1024 bytes */ 4 | /* STM32F401CCU6 */ 5 | /* FLASH : ORIGIN = 0x08000000, LENGTH = 256K */ 6 | /* RAM : ORIGIN = 0x20000000, LENGTH = 64K */ 7 | /* STM32F427VIT6 */ 8 | /* FLASH : ORIGIN = 0x08000000, LENGTH = 2048K */ 9 | /* RAM : ORIGIN = 0x20000000, LENGTH = 192K */ 10 | 11 | /* STM32F411CEU6 */ 12 | FLASH : ORIGIN = 0x08000000, LENGTH = 512K 13 | RAM : ORIGIN = 0x20000000, LENGTH = 128K 14 | } 15 | 16 | /* This is where the call stack will be allocated. */ 17 | /* The stack is of the full descending type. */ 18 | /* NOTE Do NOT modify `_stack_start` unless you know what you are doing */ 19 | _stack_start = ORIGIN(RAM) + LENGTH(RAM); 20 | -------------------------------------------------------------------------------- /src/fs/mod.rs: -------------------------------------------------------------------------------- 1 | pub use fatfs::*; 2 | -------------------------------------------------------------------------------- /src/net/mod.rs: -------------------------------------------------------------------------------- 1 | pub use smoltcp::*; 2 | -------------------------------------------------------------------------------- /src/prelude.rs: -------------------------------------------------------------------------------- 1 | pub use crate::allocator::{free as free_memory, used as used_memory}; 2 | pub use crate::sync::{broadcast::*, mutex::*, notify::*, queue::*, semaphore::*}; 3 | 4 | pub use crate::bus::*; 5 | pub use crate::sync::*; 6 | pub use crate::task::scheduler::start; 7 | pub use crate::task::*; 8 | pub use crate::time::*; 9 | #[cfg(feature = "timer")] 10 | pub use crate::timer; 11 | #[cfg(any(feature = "gd32vf103", feature = "stm32f1", feature = "stm32f4",))] 12 | pub use crate::{sprint, sprintln}; 13 | pub use bare_metal::*; 14 | pub use log; 15 | -------------------------------------------------------------------------------- /src/sync/mod.rs: -------------------------------------------------------------------------------- 1 | pub mod arc; 2 | pub mod broadcast; 3 | pub mod free_queue; 4 | pub mod mutex; 5 | pub mod notify; 6 | pub mod queue; 7 | pub mod semaphore; 8 | 9 | pub use mutex::free; 10 | 11 | #[derive(Debug)] 12 | pub enum Error { 13 | /// 信号量满了 14 | SemaphoreFull, 15 | /// 队列满了 16 | QueueFull, 17 | } 18 | -------------------------------------------------------------------------------- /src/sync/mutex.rs: -------------------------------------------------------------------------------- 1 | //! 互斥锁，互斥锁只能持有锁的任务自己释放，二值信号量可以由另外一个任务释放 2 | //! TODO ,可以先用临界区函数sync::free(||{$同步代码}); 3 | 4 | use crate::port::{Portable, Porting}; 5 | use bare_metal::CriticalSection; 6 | 7 | /// 临界区保护 8 | #[inline] 9 | pub fn free(f: F) -> R 10 | where 11 | F: FnOnce(&CriticalSection) -> R, 12 | { 13 | Porting::free(f) 14 | } 15 | -------------------------------------------------------------------------------- /src/task/executor.rs: -------------------------------------------------------------------------------- 1 | //! 硬件工作线程抽象以及单线程默认实现 2 | //! 这里参考FreeRTOS实现，一个全局指针指向正在执行的任务 3 | 4 | #[cfg(feature = "xtask_executor")] 5 | use crate::task::scheduler::xworker::XTaskExecutor; 6 | use crate::task::Task; 7 | 8 | /// 如果移植层提供了更好的实现，那么请在这里替换它 9 | /// 否则采用默认实现 10 | #[allow(non_upper_case_globals)] 11 | pub(crate) static xworker: XTaskExecutor = (); 12 | 13 | /// 硬件工作线程抽象 14 | pub trait Executor { 15 | /// 硬件线程数 16 | fn threads() -> u16; 17 | fn current(&self) -> &'static mut Task; 18 | fn execute(&self, task: *mut Task) -> Option<*mut Task>; 19 | fn halt(&self); 20 | } 21 | -------------------------------------------------------------------------------- /src/task/scheduler/idle.rs: -------------------------------------------------------------------------------- 1 | use core::ffi::c_void; 2 | 3 | use crate::task::executor::{xworker, Executor}; 4 | use crate::task::scheduler::xtask::IDLE_TASK; 5 | use crate::{Task, IDLE_TASK_NAME}; 6 | 7 | pub(crate) fn start_idle_task() { 8 | fn idle_task(_args: *mut c_void) { 9 | loop {} 10 | } 11 | 12 | let task = Task::new(IDLE_TASK_NAME, 128, 16, idle_task, core::ptr::null_mut()); 13 | unsafe { 14 | let _ = xworker.execute(task); 15 | let _ = core::mem::replace(&mut IDLE_TASK, task); 16 | } 17 | } 18 | -------------------------------------------------------------------------------- /src/task/scheduler/xworker.rs: -------------------------------------------------------------------------------- 1 | use crate::task::executor::Executor; 2 | use crate::task::Task; 3 | 4 | /// 全局任务指针，指向当前正在运行的任务 5 | #[cfg(feature = "xtask_executor")] 6 | #[export_name = "CURRENT_TASK_PTR"] 7 | static mut CURRENT_TASK: *mut Task = core::ptr::null_mut(); 8 | 9 | /// 单硬件线程默认实现 10 | #[cfg(feature = "xtask_executor")] 11 | pub(crate) type XTaskExecutor = (); 12 | 13 | impl Executor for XTaskExecutor { 14 | fn threads() -> u16 { 15 | 1 16 | } 17 | fn current(&self) -> &'static mut Task { 18 | unsafe { CURRENT_TASK.as_mut().unwrap() } 19 | } 20 | fn execute(&self, task: *mut Task) -> Option<*mut Task> { 21 | unsafe { 22 | if let Some(task) = task.as_mut() { 23 | task.run(); 24 | Some(core::mem::replace(&mut CURRENT_TASK, task)) 25 | } else { 26 | None 27 | } 28 | } 29 | } 30 | fn halt(&self) { 31 | panic!("halt") 32 | } 33 | } 34 | --------------------------------------------------------------------------------