├── .github ├── ISSUE_TEMPLATE │ ├── logical-level-modelling-template.md │ ├── physical-architecture-modelling-template.md │ └── system-level-modelling-template.md └── workflows │ ├── build.yml │ └── deploy.yml ├── .gitignore ├── CONTRIBUTING.md ├── Dockerfile ├── README.md ├── ValidationFiles ├── Validation.py ├── ValidationUnitTests.py └── testFiles │ ├── fail1.html │ ├── fail2.html │ ├── fail3.html │ └── pass1.html ├── entrypoint.sh └── obc-model ├── .project ├── obc-model.afm ├── obc-model.aird └── obc-model.capella /.github/ISSUE_TEMPLATE/logical-level-modelling-template.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Logical Level Modelling Template 3 | about: Template for issues describing modelling tasks at the Logical level. 4 | title: 'Logical Architecture: {...}' 5 | labels: obc 6 | assignees: '' 7 | 8 | --- 9 | 10 | Existing diagrams to extend: 11 | - [ ] [LFBD] Root Logical Function Breakdown 12 | - [ ] [LAB] Root Logical Architecture 13 | 14 | New diagrams to create: 15 | - [ ] [ES] {...} Scenario: 16 | - steps ... 17 | - go ... 18 | - here ... 19 | - [ ] (Optional) [LDFB] Functional Dataflow View of {...} 20 | - [ ] (Optional) [LAB] Logical Architecture View of {...} 21 | 22 | Next steps: 23 | when closing this issue, make a new issue out of the checkbox below: 24 | - [ ] Physical Architecture: {...} 25 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/physical-architecture-modelling-template.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: Physical Architecture Modelling Template 3 | about: Template for issues describing modelling tasks at the Physical level. 4 | title: 'Physical Architecture: {...}' 5 | labels: obc 6 | assignees: '' 7 | 8 | --- 9 | 10 | Existing diagrams to extend: 11 | - [ ] [PFBD] Root Physical Function Breakdown 12 | - [ ] [PCBD] Root Physical Component Breakdown 13 | - [ ] [PAB] Root Physical Architecture 14 | 15 | New diagrams to create: 16 | - [ ] [ES] {...} Scenario: 17 | - steps ... 18 | - go ... 19 | - here ... 20 | - [ ] (Optional) [PDFB] Functional Dataflow View of {...} 21 | - [ ] (Optional) [PAB] Physical Architecture View of {...} 22 | -------------------------------------------------------------------------------- /.github/ISSUE_TEMPLATE/system-level-modelling-template.md: -------------------------------------------------------------------------------- 1 | --- 2 | name: System Level Modelling Template 3 | about: Template for issues describing modelling tasks at the System level. 4 | title: 'System Analysis: {...}' 5 | labels: obc 6 | assignees: '' 7 | 8 | --- 9 | 10 | Existing diagrams to extend: 11 | - [ ] [MCB] System Capabilities 12 | - [ ] [CSA] System Actors 13 | - [ ] [SFBD] Root System Function Breakdown 14 | - [ ] [SAB] System Architecture 15 | 16 | New diagrams to create: 17 | - [ ] [ES] {...} Scenario: 18 | - steps ... 19 | - go ... 20 | - here ... 21 | - [ ] (Optional) [SDFB] Functional Dataflow View of {...} 22 | - [ ] (Optional) [SAB] System Architecture View of {...} 23 | 24 | Next steps: 25 | when closing this issue, make a new issue out of the checkbox below: 26 | - [ ] Logical Architecture: {...} 27 | -------------------------------------------------------------------------------- /.github/workflows/build.yml: -------------------------------------------------------------------------------- 1 | name: CI 2 | 3 | on: 4 | # triggered when refereneced in another workflow 5 | workflow_call: 6 | # automatically triggered by push events on all branches except for main 7 | push: 8 | branches: 9 | - 'model/*' # run on model branches 10 | 11 | jobs: 12 | # build and run the Docker container to validate the model and generate the documentation 13 | build: 14 | # run on Linux to use Docker 15 | runs-on: ubuntu-latest 16 | 17 | steps: 18 | # checkout in GitHub workspace 19 | - name: Checkout repository 20 | uses: actions/checkout@v3 21 | 22 | - name: Make entrypoint.sh executable 23 | run: chmod +x entrypoint.sh 24 | 25 | - name: Build Docker container 26 | run: docker build -t capella-html-exporter . 27 | 28 | # run with bind mount of Capella model directory 29 | # arguments are passed to entrypoint.sh: 30 | # - results_folder = artifacts (directory under GitHub workspace in host) 31 | - name: Run Docker container 32 | run: docker run --init -v `pwd`:/workdir capella-html-exporter artifacts 33 | 34 | # upload from GitHub workspace 35 | - name: Upload artifacts 36 | uses: actions/upload-artifact@v3 37 | with: 38 | name: Documentation 39 | path: artifacts 40 | 41 | # Setup python with BS 42 | - name: Setup python 43 | uses: actions/setup-python@v4 44 | with: 45 | python-version: '3.x' 46 | - name: Install dependencies 47 | run: python -m pip install beautifulsoup4 48 | 49 | # Check with validation script 50 | - name: Check validation 51 | run: python ValidationFiles/Validation.py artifacts/validation/obc-model/obc-model.aird/validation-results.html; exit $? 52 | -------------------------------------------------------------------------------- /.github/workflows/deploy.yml: -------------------------------------------------------------------------------- 1 | name: CD 2 | 3 | on: 4 | # can be manually triggered 5 | workflow_dispatch: 6 | # automatically triggered by push events on main only or with cloudview tags 7 | push: 8 | branches: 9 | - 'main' 10 | tags: 11 | - 'cloudview-*' 12 | jobs: 13 | # build and run the Docker container to validate the model and generate the documentation 14 | # then publish the HTML artifacts to GitHub Pages 15 | build: 16 | # validate the model 17 | uses: ./.github/workflows/build.yml 18 | 19 | # publish from GitHub workspace 20 | deploy: 21 | needs: build 22 | runs-on: ubuntu-latest 23 | steps: 24 | # Download from GitHub workspace 25 | - name: Download artifacts 26 | uses: actions/download-artifact@v3 27 | with: 28 | name: Documentation 29 | path: artifacts 30 | - name: Deploy HTML to GitHub Pages 31 | uses: peaceiris/actions-gh-pages@v3 32 | with: 33 | github_token: ${{ secrets.GITHUB_TOKEN }} 34 | publish_dir: artifacts 35 | destination_dir: ${{ github.REF_NAME }} 36 | 37 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Session logs 2 | MDEReport.html 3 | 4 | # Plugin configs and logs 5 | .metadata/ 6 | .settings/ 7 | 8 | # Generated documentation 9 | docs/ 10 | 11 | /.project 12 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | # Contribution Guidelines and Workflows 2 | 3 | ## Git Workflow 4 | 5 | 1. Pick your issue 6 | 2. Checkout a new branch 7 | 3. Complete at most 1 step in the Capella Workflow below 8 | - Committing smaller changes is fine 9 | - Please don't sit on uncommitted bigger changes 10 | 4. Commit and push 11 | 5. Create a new issue 12 | 6. Start over :) 13 | 14 | ### Pick Your Issue 15 | 16 | Go to the **[Issues](https://github.com/guorbit/obc-model/issues)** tab on GitHub, select the unassigned issue that you'd like to work on the most, and assign it to yourself. 17 | 18 | You can also move the issue to the **To-Do** or **In Progress** column in the **[Project](https://github.com/orgs/guorbit/projects/2)**, and tick the checkboxes within the issue as you get work done. 19 | 20 | ### Checkout a new Branch 21 | 22 | #### Local Checkout 23 | 24 | This option creates a local branch first, then uploads it to the remote repository whenever its first new commit is pushed. 25 | 26 | To do so, ensure you're up to date with the `main` branch by executing: 27 | 28 | - `git checkout main` 29 | - `git pull` 30 | 31 | You can then create a new branch extending out from the main trunk at its latest revision by executing `git checkout -b {branch-name}`. 32 | Check the Branch Naming Convention section below for its argument `{branch-name}`. 33 | 34 | #### Remote Checkout 35 | 36 | This option creates a remote branch first, then downloads it to the local repository ahead of committing to it. 37 | 38 | To do so: 39 | 40 | - Go under the **Code** tab on GitHub 41 | - Press the branch icon button 42 | - Select **View all branches** 43 | - Press the **New branch** button 44 | - Select `main` as the source 45 | - Check the Branch Naming Convention section below for the branch name 46 | 47 | Then, retrieve and move to the newly created branch by executing: 48 | 49 | - `git fetch --all` 50 | - `git checkout {branch-name}` 51 | 52 | #### Branch Naming Convention 53 | 54 | It's good practice to assign meaningful names to branches but, more importantly, branch protection rules are in place to prevent unintended changes. 55 | Please refer to the following format, substituting the curly braces `{}` with the appropriate contents and taking care of separating them with dashes `-`: 56 | 57 | ```git 58 | model/{your-name}-{scenario-name(s)} 59 | ``` 60 | 61 | ### Commit and Push 62 | 63 | `git add obc-model.aird obc-model.capella` 64 | 65 | Execute `git commit` and enter your commit message. 66 | 67 | Due to the limited graphical capabilities of EMF Diff/Merge in Capella, it's particularly important that commit messages include a detailed description of the changes being pushed to the repository. 68 | Please refer to the following format, substituting the curly braces `{}` with the appropriate contents: 69 | 70 | ```git 71 | [FEATURE] {SCENARIO NAME} @ {LEVEL} 72 | 73 | {summary} 74 | 75 | Add: 76 | - [{DIAG_ID1}] {title of new diagram 1} 77 | - [{DIAG_ID2}] {title of new diagram 2} 78 | - ... 79 | 80 | Change: 81 | - [{DIAG_ID3}] {title of changed diagram 3} {detail of changes} 82 | - [{DIAG_ID4}] {title of changed diagram 4} {detail of changes} 83 | - ... 84 | 85 | resolve #{ISSUE_ID1} 86 | resolve #{ISSUE_ID2} 87 | ... 88 | ``` 89 | 90 | After this, execute `git push` to upload your changes to the shared repository on GitHub. 91 | 92 | ### Create a New Issue 93 | 94 | Under the original issue, press the **Convert to issue** button to the right of the final checkbox to make it into a new issue. 95 | 96 | ## Capella Workflow 97 | 98 | 1. System Analysis 99 | 2. Logical Architecture 100 | 3. Physical Architecture 101 | 102 | ### System Analysis 103 | 104 | At this stage, the system and system actors are completely opaque and can only be analysed as black-boxes; what is defined are the boundaries between them. 105 | For this reason, the focus at this stage is on functions which are either part of an exchange that crosses the boundaries of the system, or a generalised placeholder for more detailed functions at the Logical level. 106 | 107 | ### Logical Architecture 108 | 109 | At this stage, the system is partially transparent, allowing the definition of boundaries between the subsystems inside it. 110 | Again, the focus at this stage is on functions which are either part of an exchange that crosses the boundaries of a subsystem, or a generalised placeholder for more detailed functions at the Physical level. 111 | 112 | ### Physical Architecture 113 | 114 | At this stage, the system is completely transparent, allowing the identification of its constituting components. 115 | Components at this level come in two kinds: *behaviours* are the subroutines realising the subsystems at the Logical level, and *nodes* are the devices running the subroutines. 116 | Functions are allocated to behaviours, and behaviours are allocated to nodes. 117 | Unlike the previous stages, the focus at this stage is on elaborating functions to the maximum detail, grouping them in nested subroutines if necessary. 118 | -------------------------------------------------------------------------------- /Dockerfile: -------------------------------------------------------------------------------- 1 | FROM ubuntu 2 | 3 | ARG DEBIAN_FRONTEND=noninteractive 4 | RUN apt-get update -qq && apt-get install -qq \ 5 | wget unzip libgtk-3-dev xvfb dbus-x11 && \ 6 | rm -rf /var/lib/apt/lists/* 7 | 8 | # This x11 stuff we apparently don't need: 9 | #RUN apt-get install -qq x11vnc x11-xkb-utils xfonts-100dpi xfonts-75dpi xfonts-scalable xfonts-cyrillic x11-apps 10 | 11 | ARG CAPELLA_VER=6.0.0 12 | ARG CAPELLA_TAR=https://download.eclipse.org/capella/core/products/releases/6.0.0/capella-6.0.0.202209090800-linux-gtk-x86_64.tar.gz 13 | ARG HTML_EX_ZIP=https://download.eclipse.org/capella/addons/xhtmldocgen/dropins/releases/6.0.0/CapellaXHTMLDocGen-dropins-6.0.0.202208241534.zip 14 | ARG REQT_VP_ZIP=https://download.eclipse.org/capella/addons/requirements/dropins/releases/0.13.0/Requirements-dropins-0.13.0.202208241053.zip 15 | 16 | # download and install Capella 17 | WORKDIR /opt/capella-${CAPELLA_VER} 18 | RUN wget -nv -c ${CAPELLA_TAR} -O capella.tar.gz 19 | RUN tar -xzf capella.tar.gz && rm capella.tar.gz 20 | 21 | # download and install the HTML Export drop-in 22 | WORKDIR /opt/capella-${CAPELLA_VER}/capella/dropins 23 | RUN wget -nv -c ${HTML_EX_ZIP} -O capella-html-export.zip 24 | RUN unzip capella-html-export.zip && rm capella-html-export.zip 25 | 26 | # download and install the Requirements VP drop-in 27 | WORKDIR /opt/capella-${CAPELLA_VER}/capella/dropins 28 | RUN wget -nv -c ${REQT_VP_ZIP} -O capella-requirements-vp.zip 29 | RUN unzip capella-requirements-vp.zip && rm capella-requirements-vp.zip 30 | 31 | ENV PATH="/opt/capella-${CAPELLA_VER}/capella/:${PATH}" 32 | 33 | WORKDIR /workdir 34 | ENTRYPOINT ["./entrypoint.sh"] 35 | 36 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # OBC Model 2 | 3 | Capella MBSE model for the On-Board Computer subsystem. 4 | 5 | -------------------------------------------------------------------------------- /ValidationFiles/Validation.py: -------------------------------------------------------------------------------- 1 | from bs4 import BeautifulSoup 2 | import sys 3 | 4 | def validate(path): 5 | with open(path) as html: 6 | valid_errors = [ 7 | "TJ_SA_04", 8 | "TC_DF_15", 9 | ] 10 | table = BeautifulSoup(html, "html.parser").find("table") 11 | headers = [header.text.strip() for header in table.find_all("th")] 12 | results = [{headers[i]: cell for i, cell in enumerate(row.find_all("td"))} for row in table.find_all("tr")[1:]] 13 | invalid_rows = [row for row in results if row["Level"].text == "Error" and row["Rule id"].text not in valid_errors] 14 | if len(invalid_rows) > 0: 15 | print("\nFailed due to:") 16 | for row in invalid_rows: 17 | print("\tError " + row["Rule id"].text + " : " + row["Message"].text) 18 | sys.exit(len(invalid_rows)) 19 | # return len(invalid_rows) == 0 20 | 21 | if __name__ == "__main__": 22 | validate(sys.argv[1]) -------------------------------------------------------------------------------- /ValidationFiles/ValidationUnitTests.py: -------------------------------------------------------------------------------- 1 | import unittest 2 | from Validate import validate 3 | 4 | class TestHTMLParse(unittest.TestCase): 5 | def test_fail1(self): 6 | self.assertFalse(validate("testFiles/fail1.html")) 7 | def test_fail2(self): 8 | self.assertFalse(validate("testFiles/fail2.html")) 9 | def test_fail3(self): 10 | self.assertFalse(validate("testFiles/fail3.html")) 11 | def test_pass1(self): 12 | self.assertTrue(validate("testFiles/pass1.html")) 13 | 14 | if __name__ == "__main__": 15 | unittest.main() -------------------------------------------------------------------------------- /ValidationFiles/testFiles/fail1.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | Problems saved on Fri Nov 18 21:09:47 GMT 2022 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /ValidationFiles/testFiles/fail2.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | Problems saved on Mon Nov 14 17:21:41 GMT 2022 4 | 5 | 6 |
Message Level Rule id Origin Resource Time
System Analysis (SystemAnalysis) does not realize Operational Analysis (Operational Analysis does not exist).ErrorTJ_SA_04Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis 14 | 9:09:47 PM
Root "Root System Function"(System Function) does not realize the Operational Analysis (Not Found), Please create Operational Analysis.ErrorTC_DF_15Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function 15 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Receive mode change outcome telemetry/FIP 1 16 | 9:09:47 PM
Mode change telemetry transmission (Functional Exchange) in System Analysis is not realized by any other Functional Exchange in Logical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/System Analysis/System Functions/Root System Function/Mode change telemetry transmission 17 | 9:09:47 PM
Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 18 | 9:09:47 PM
Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 19 | 9:09:47 PM
Commanded Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change 20 | 9:09:47 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 21 | 9:09:47 PM
Autonomous Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 22 | 9:09:47 PM
Autonomous Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 23 | 9:09:47 PM
Ground Station (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station 24 | 9:09:47 PM
Ground Station Operator (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station Operator 25 | 9:09:47 PM
Commanded Mode Change (FunctionalChain) is not well formedWarningDWF_DF_03Capella/Design/Well-Formedness/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Commanded Mode Change 26 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Send mode change packet bundle/FOP 1 27 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Receive mode change packet bundle/FIP 1 28 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Receive mode change packet bundle/FOP 1 29 | 9:09:47 PM
FOP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Send mode change outcome telemetry/FOP 1 30 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Receive mode change outcome telemetry/FIP 2 31 | 9:09:47 PM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Receive mode change outcome telemetry/FIP 3 32 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Receive mode change outcome telemetry/FOP 1 33 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Display mode change outcome telemetry/FIP 1 34 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Change mode/Relay mode change packet bundle/FIP 1 35 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Change mode/Propagate mode change packet bundle/FOP 1 36 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Change mode/Propagate mode change packet bundle/FOP 2 37 | 9:09:47 PM
Mode change packet bundle transmission (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change packet bundle transmission 38 | 9:09:47 PM
Mode change full telemetry transmission (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change full telemetry transmission 39 | 9:09:47 PM
Mode change minimal telemetry transmission (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change minimal telemetry transmission 40 | 9:09:47 PM
Mode change packet bundle dump (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change packet bundle dump 41 | 9:09:47 PM
The target of "Mode change packet bundle dump" (Functional Exchange) is not delegated to a leaf Logical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change packet bundle dump 42 | 9:09:47 PM
Mode change packet bundle dump (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change packet bundle dump 43 | 9:09:47 PM
Both source and target of "Mode change telemetry collection" (Functional Exchange) are not delegated to leaf Logical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change telemetry collection 44 | 9:09:47 PM
Human-readable mode change outcome telemetry (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Human-readable mode change outcome telemetry 45 | 9:09:47 PM
Mode change packet bundle dump (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change packet bundle dump 46 | 9:09:47 PM
Unsuccessful direct dump (Functional Exchange) in Logical Architecture is not realized by any other Functional Exchange in Physical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Unsuccessful direct dump 47 | 9:09:47 PM
Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Mode Change 48 | 9:09:47 PM
Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Mode Change 49 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 50 | 9:09:47 PM
Commanded Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 51 | 9:09:47 PM
Commanded Mode Change (Capability Realization) has Ground Station Operator (Logical Component) [Actor] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 52 | /obc-model/obc-model/Logical Architecture/Structure/Ground Station Operator 53 | 9:09:47 PM
Commanded Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 54 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 55 | 9:09:47 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 56 | 9:09:47 PM
[ES] Commanded, OBC-Bypassing Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Bypassing Mode Change Scenario 57 | 9:09:47 PM
Autonomous Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Autonomous Mode Change 58 | 9:09:47 PM
Autonomous Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Autonomous Mode Change 59 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 60 | 9:09:47 PM
FIP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/FIP 1 61 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/FIP 1 62 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/FOP 1 63 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/FOP 1 64 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Listen for mode change packet bundle/FIP 1 65 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Listen for mode change packet bundle/FOP 1 66 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Buffer mode change packet bundle/FIP 1 67 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Buffer mode change packet bundle/FOP 1 68 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Re-propagate mode change packet bundle/FIP 1 69 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Re-propagate mode change packet bundle/FOP 1 70 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FIP 1 71 | 9:09:47 PM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 3 72 | 9:09:47 PM
FOP 4 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 4 73 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Issue mode change telecommand/FOP 2 74 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change telecommand/FIP 2 75 | 9:09:47 PM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change packet bundle/FOP 3 76 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FIP 1 77 | 9:09:47 PM
FOP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FOP 1 78 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FOP 1 79 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FIP 1 80 | 9:09:47 PM
FOP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FOP 1 81 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FOP 1 82 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Listen for communicated telemetry/FIP 2 83 | 9:09:47 PM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Listen for communicated telemetry/FIP 3 84 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Listen for communicated telemetry/FOP 2 85 | 9:09:47 PM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Listen for communicated telemetry/FOP 3 86 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Collect sensor data/FIP 2 87 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Collect sensor data/FOP 1 88 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Write to disk/FIP 1 89 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Write to disk/FOP 1 90 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Read from disk/FIP 2 91 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Read from disk/FOP 2 92 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Read telemetry history/FIP 2 93 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Read telemetry history/FOP 2 94 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Write telemetry history/FIP 2 95 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Write telemetry history/FOP 1 96 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Bundle full telemetry/FIP 1 97 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Bundle full telemetry/FOP 2 98 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Report full telemetry/FIP 1 99 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Report full telemetry/FOP 1 100 | 9:09:47 PM
FIP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FIP 1 101 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FIP 1 102 | 9:09:47 PM
FOP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FOP 1 103 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FOP 1 104 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/Accept communicated telemetry/FIP 2 105 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/Accept communicated telemetry/FOP 1 106 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Transmit telemetry/FIP 2 107 | 9:09:47 PM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Transmit telemetry/FIP 3 108 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 1 109 | 9:09:47 PM
FIP 2 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 2 110 | 9:09:47 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 2 111 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FOP 1 112 | 9:09:47 PM
FOP 2 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FOP 2 113 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FOP 2 114 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against sensor data/FIP 1 115 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against sensor data/FOP 1 116 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against telemetry history/FIP 1 117 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against telemetry history/FOP 1 118 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Display mode change outcome telemetry/FOP 1 119 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Interpret mode change telemetry/FIP 1 120 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Provide measurement of physical quantity/FIP 1 121 | 9:09:47 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Provide measurement of physical quantity/FOP 2 122 | 9:09:47 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Expand mode change telecommand/FIP 1 123 | 9:09:47 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Expand mode change telecommand/FOP 1 124 | 9:09:47 PM
Both source and target of "Mode change signal outcome report" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal outcome report 125 | 9:09:47 PM
Both source and target of "Mode change signal relayed execution" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relayed execution 126 | 9:09:47 PM
Mode change signal relayed execution (Functional Exchange) is defined between Relay mode change packet bundle and Validate outcome of mode change signal, but there is no exchange defined between the corresponding source and target elements in the previous phase.WarningTJ_G_04Capella/Transition/Justification/Generic/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relayed execution 127 | 9:09:47 PM
Both source and target of "Mode change telemetry collection" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change telemetry collection 128 | 9:09:47 PM
CapabilityRealization 1 (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 129 | 9:09:47 PM
CapabilityRealization 1 (Capability Realization) has On-Board Computer Subsystem Process (Physical Component) [Behavior] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 130 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 131 | 9:09:47 PM
CapabilityRealization 1 (Capability Realization) has Comms Radio (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 132 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio 133 | 9:09:47 PM
CapabilityRealization 1 (Capability Realization) has Non-Volatile memory unit (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 134 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 135 | 9:09:47 PM
CapabilityRealization 1 (Capability Realization) has Ground Station (Physical Component) [Actor][Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 136 | /obc-model/obc-model/Physical Architecture/Structure/Ground Station 137 | 9:09:47 PM
CapabilityRealization 1 (Capability Realization) has OBC MCU (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 138 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 139 | 9:09:47 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Relayed Mode Change Scenario 140 | 9:09:47 PM
The Cancel Timer cancel timer message must be within an arm timer message.ErrorDWF_DS_14Capella/Design/Well-Formedness/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Relayed Mode Change Scenario/Cancel Timer 141 | 9:09:47 PM
[ES] Commanded, OBC-Bypassing Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Bypassing Mode Change Scenario 142 | 9:09:47 PM
CAN 1 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/CAN 1 143 | 9:09:47 PM
CAN 2 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/CAN 2 144 | 9:09:47 PM
Analogue Link (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Analogue Link 145 | 9:09:47 PM
I2C (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/I2C 146 | 9:09:47 PM
QSPI (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/QSPI 147 | 9:09:47 PM
Communications Subsystem Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 148 | 9:09:47 PM
On-Board Computer Subsystem Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 149 | 9:09:47 PM
Mode change packet bundle relay routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change packet bundle relay routine 150 | 9:09:47 PM
Mode change packet bundle relay routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change packet bundle relay routine 151 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 152 | 9:09:47 PM
Mode change packet bundle relay routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change packet bundle relay routine 153 | 9:09:47 PM
Full telemetry collection routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 154 | 9:09:47 PM
Full telemetry collection routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 155 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 156 | 9:09:47 PM
Full telemetry collection routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 157 | 9:09:47 PM
Telemetry history storage (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry history storage 158 | 9:09:47 PM
Telemetry history storage (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry history storage 159 | 9:09:47 PM
Telemetry validation routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 160 | 9:09:47 PM
Telemetry validation routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 161 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 162 | 9:09:47 PM
Telemetry validation routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 163 | 9:09:47 PM
OBC MCU (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 164 | 9:09:47 PM
OBC MCU (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 165 | 9:09:47 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 1 166 | 9:09:47 PM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 2 167 | 9:09:47 PM
PP 3 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 3 168 | 9:09:47 PM
PP 4 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 4 169 | 9:09:47 PM
PP 5 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 5 170 | 9:09:47 PM
Comms Radio (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio 171 | 9:09:47 PM
Comms Radio (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio 172 | 9:09:47 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio/PP 1 173 | 9:09:47 PM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio/PP 2 174 | 9:09:47 PM
Non-Volatile memory unit (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 175 | 9:09:47 PM
Non-Volatile memory unit (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 176 | 9:09:47 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit/PP 1 177 | 9:09:47 PM
Sensors (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors 178 | 9:09:47 PM
Sensors (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors 179 | 9:09:47 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors/PP 1 180 | 9:09:47 PM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors/PP 2 181 | 9:09:47 PM
Parameter Sensing Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Parameter Sensing Process 182 | 9:09:47 PM
Parameter Sensing Process (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Parameter Sensing Process 183 | 9:09:47 PM
7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /ValidationFiles/testFiles/fail3.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | Problems saved on Tue Nov 22 00:21:55 GMT 2022 4 | 5 | 6 |
Message Level Rule id Origin Resource Time
System Analysis (SystemAnalysis) does not realize Operational Analysis (Operational Analysis does not exist).ErrorTJ_SA_04Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis 14 | 5:21:41 PM
Root "Root System Function"(System Function) does not realize the Operational Analysis (Not Found), Please create Operational Analysis.ErrorTC_DF_15Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function 15 | 5:21:41 PM
Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 16 | 5:21:41 PM
Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 17 | 5:21:41 PM
Commanded Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change 18 | 5:21:41 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 19 | 5:21:41 PM
Autonomous Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 20 | 5:21:41 PM
Autonomous Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 21 | 5:21:41 PM
Ground Station (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station 22 | 5:21:41 PM
Ground Station Operator (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station Operator 23 | 5:21:41 PM
Leaf Function Allocation Consistency error for Change mode.ErrorDWF_DC_15Capella/Design/Well-Formedness/Components/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Change mode 24 | 5:21:41 PM
The source of "Mode change telemetry transmission" (Functional Exchange) is not delegated to a leaf Logical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change telemetry transmission 25 | 5:21:41 PM
Mode change telemetry parse (Functional Exchange) is defined between Receive mode change outcome telemetry and Display mode change outcome telemetry, but there is no exchange defined between the corresponding source and target elements in the previous phase.WarningTJ_G_04Capella/Transition/Justification/Generic/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change telemetry parse 26 | 5:21:41 PM
Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Mode Change 27 | 5:21:41 PM
Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Mode Change 28 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 29 | 5:21:41 PM
Commanded Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 30 | 5:21:41 PM
Commanded Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 31 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 32 | 5:21:41 PM
Commanded Mode Change (Capability Realization) has Ground Station Operator (Logical Component) [Actor] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 33 | /obc-model/obc-model/Logical Architecture/Structure/Ground Station Operator 34 | 5:21:41 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 35 | 5:21:41 PM
[ES] Commanded, OBC-Bypassing Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Bypassing Mode Change Scenario 36 | 5:21:41 PM
Autonomous Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Autonomous Mode Change 37 | 5:21:41 PM
Autonomous Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Autonomous Mode Change 38 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 39 | 5:21:41 PM
On-Board Computer Subsystem (Logical Component) allocates the non leaf function Change mode.ErrorDWF_DC_09Capella/Design/Well-Formedness/Components/obc-model/obc-model/Logical Architecture/Structure/Logical System/On-Board Computer Subsystem 40 | 5:21:41 PM
Root Physical Function contains 2 elements with conflicting names: Commanded, OBC-Relayed Mode Change, Commanded, OBC-Relayed Mode ChangeErrorI_19Capella/Integrity/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function 41 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Commanded, OBC-Relayed Mode Change 42 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Commanded, OBC-Relayed Mode Change 43 | 5:21:41 PM
Root Physical Function contains 2 elements with conflicting names: Commanded, OBC-Bypassing Mode Change, Commanded, OBC-Bypassing Mode ChangeErrorI_19Capella/Integrity/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function 44 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Commanded, OBC-Bypassing Mode Change 45 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Commanded, OBC-Relayed Mode Change 46 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Commanded, OBC-Bypassing Mode Change 47 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Commanded, OBC-Relayed Mode Change 48 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/FIP 1 49 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/FOP 1 50 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/Signal mode change upon request/FIP 1 51 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/Signal mode change upon request/FOP 1 52 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/Send mode change signal relay request/FOP 1 53 | 5:21:41 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/Send mode change signal relay request/FOP 2 54 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/Receive mode change signal relay request/FIP 1 55 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay-issue mode change signal/Receive mode change signal relay request/FOP 1 56 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Direct-issue mode change signal/FIP 1 57 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Direct-issue mode change signal/FOP 1 58 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Direct-issue mode change signal/Signal mode change directly/FIP 1 59 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Direct-issue mode change signal/Signal mode change directly/FOP 1 60 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Issue mode change telecommand/FOP 1 61 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change telecommand/FIP 1 62 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change telecommand/FOP 1 63 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change telecommand/FIP 1 64 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change telecommand/FOP 1 65 | 5:21:41 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change telecommand/FOP 2 66 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FOP 1 67 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FIP 1 68 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FOP 1 69 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Listen for communicated telemetry/FIP 1 70 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Listen for communicated telemetry/FOP 1 71 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Collect sensor data/FIP 1 72 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Collect sensor data/FOP 1 73 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Write to disk/FIP 1 74 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Write to disk/FOP 1 75 | 5:21:41 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Read from disk/FIP 2 76 | 5:21:41 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Store telemetry history/Read from disk/FOP 2 77 | 5:21:41 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Read telemetry history/FIP 2 78 | 5:21:41 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Read telemetry history/FOP 2 79 | 5:21:41 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Write telemetry history/FIP 2 80 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Write telemetry history/FOP 1 81 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Bundle full telemetry/FIP 1 82 | 5:21:41 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Bundle full telemetry/FOP 2 83 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Report full telemetry/FIP 1 84 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/Report full telemetry/FOP 1 85 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FIP 1 86 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FOP 1 87 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/Listen for communicated telemetry/FIP 1 88 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/Listen for communicated telemetry/FOP 1 89 | 5:21:41 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Transmit telemetry/FIP 2 90 | 5:21:41 PM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Transmit telemetry/FIP 3 91 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FIP 1 92 | 5:21:41 PM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FIP 2 93 | 5:21:41 PM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FIP 3 94 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FOP 1 95 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 1 96 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FOP 1 97 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against sensor data/FIP 1 98 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against sensor data/FOP 1 99 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against telemetry history/FIP 1 100 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against telemetry history/FOP 1 101 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Display mode change outcome telemetry/FIP 1 102 | 5:21:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Display mode change outcome telemetry/FOP 1 103 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Interpret mode change telemetry/FIP 1 104 | 5:21:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Provide measurement of physical quantity/FIP 1 105 | 5:21:41 PM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Provide measurement of physical quantity/FOP 2 106 | 5:21:41 PM
The target of "Mode change signal relay request" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relay request 107 | 5:21:41 PM
The target of "Mode change signal relay request timeout" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relay request timeout 108 | 5:21:41 PM
Both source and target of "Mode change signal outcome report" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal outcome report 109 | 5:21:41 PM
The source of "Mode change minimal telemetry transmission" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change minimal telemetry transmission 110 | 5:21:41 PM
Both source and target of "Mode change signal relayed execution" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relayed execution 111 | 5:21:41 PM
Both source and target of "Mode change signal direct execution" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal direct execution 112 | 5:21:41 PM
The source of "Mode change telemetry transmission" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change telemetry transmission 113 | 5:21:41 PM
The source of "Mode change full telemetry transmission" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change full telemetry transmission 114 | 5:21:41 PM
CapabilityRealization 1 (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 115 | 5:21:41 PM
CapabilityRealization 1 (Capability Realization) has Communications Subsystem Process (Physical Component) [Behavior] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 116 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 117 | 5:21:41 PM
CapabilityRealization 1 (Capability Realization) has Ground Station (Physical Component) [Actor][Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 118 | /obc-model/obc-model/Physical Architecture/Structure/Ground Station 119 | 5:21:41 PM
CapabilityRealization 1 (Capability Realization) has On-Board Computer Subsystem Process (Physical Component) [Behavior] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 120 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 121 | 5:21:41 PM
CapabilityRealization 1 (Capability Realization) has OBC MCU (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 122 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 123 | 5:21:41 PM
CapabilityRealization 1 (Capability Realization) has Non-Volatile memory unit (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 124 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 125 | 5:21:41 PM
CapabilityRealization 1 (Capability Realization) has Comms MCU (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 126 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms MCU 127 | 5:21:41 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Relayed Mode Change Scenario 128 | 5:21:41 PM
[ES] Commanded, OBC-Bypassing Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Bypassing Mode Change Scenario 129 | 5:21:41 PM
CAN 1 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/CAN 1 130 | 5:21:41 PM
CAN 2 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/CAN 2 131 | 5:21:41 PM
Analogue Link (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Analogue Link 132 | 5:21:41 PM
I2C (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/I2C 133 | 5:21:41 PM
QSPI (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/QSPI 134 | 5:21:41 PM
Communications Subsystem Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 135 | 5:21:41 PM
Mode change signal relay request routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Mode change signal relay request routine 136 | 5:21:41 PM
Mode change signal relay request routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent Communications Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Mode change signal relay request routine 137 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 138 | 5:21:41 PM
Mode change signal relay request routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Mode change signal relay request routine 139 | 5:21:41 PM
Mode change signal issue routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Mode change signal issue routine 140 | 5:21:41 PM
Mode change signal issue routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent Communications Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Mode change signal issue routine 141 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 142 | 5:21:41 PM
Mode change signal issue routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Mode change signal issue routine 143 | 5:21:41 PM
Minimal telemetry collection routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Minimal telemetry collection routine 144 | 5:21:41 PM
Minimal telemetry collection routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent Communications Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Minimal telemetry collection routine 145 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 146 | 5:21:41 PM
Minimal telemetry collection routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Minimal telemetry collection routine 147 | 5:21:41 PM
Telemetry transmission routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Telemetry transmission routine 148 | 5:21:41 PM
Telemetry transmission routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent Communications Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Telemetry transmission routine 149 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 150 | 5:21:41 PM
Telemetry transmission routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process/Telemetry transmission routine 151 | 5:21:41 PM
On-Board Computer Subsystem Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 152 | 5:21:41 PM
Mode change signal relay routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change signal relay routine 153 | 5:21:41 PM
Mode change signal relay routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change signal relay routine 154 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 155 | 5:21:41 PM
Mode change signal relay routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change signal relay routine 156 | 5:21:41 PM
Full telemetry collection routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 157 | 5:21:41 PM
Full telemetry collection routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 158 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 159 | 5:21:41 PM
Full telemetry collection routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 160 | 5:21:41 PM
Telemetry history storage (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry history storage 161 | 5:21:41 PM
Telemetry history storage (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry history storage 162 | 5:21:41 PM
Telemetry validation routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 163 | 5:21:41 PM
Telemetry validation routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 164 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 165 | 5:21:41 PM
Telemetry validation routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 166 | 5:21:41 PM
OBC MCU (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 167 | 5:21:41 PM
OBC MCU (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 168 | 5:21:41 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 1 169 | 5:21:41 PM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 2 170 | 5:21:41 PM
PP 3 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 3 171 | 5:21:41 PM
PP 4 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 4 172 | 5:21:41 PM
PP 5 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 5 173 | 5:21:41 PM
Comms MCU (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms MCU 174 | 5:21:41 PM
Comms MCU (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms MCU 175 | 5:21:41 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms MCU/PP 1 176 | 5:21:41 PM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms MCU/PP 2 177 | 5:21:41 PM
Non-Volatile memory unit (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 178 | 5:21:41 PM
Non-Volatile memory unit (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 179 | 5:21:41 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit/PP 1 180 | 5:21:41 PM
Sensors (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors 181 | 5:21:41 PM
Sensors (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors 182 | 5:21:41 PM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors/PP 1 183 | 5:21:41 PM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors/PP 2 184 | 5:21:41 PM
Parameter Sensing Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Parameter Sensing Process 185 | 5:21:41 PM
Parameter Sensing Process (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Parameter Sensing Process 186 | 5:21:41 PM
7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /ValidationFiles/testFiles/pass1.html: -------------------------------------------------------------------------------- 1 | 2 | 3 | Problems saved on Mon Oct 31 15:35:41 GMT 2022 4 | 5 | 6 |
Message Level Rule id Origin Resource Time
System Analysis (SystemAnalysis) does not realize Operational Analysis (Operational Analysis does not exist).ErrorTJ_SA_04Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis 14 | 12:21:55 AM
Root "Root System Function"(System Function) does not realize the Operational Analysis (Not Found), Please create Operational Analysis.ErrorTC_DF_15Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function 15 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Receive mode change outcome telemetry/FIP 1 16 | 12:21:55 AM
Mode change telemetry transmission (Functional Exchange) in System Analysis is not realized by any other Functional Exchange in Logical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/System Analysis/System Functions/Root System Function/Mode change telemetry transmission 17 | 12:21:55 AM
Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 18 | 12:21:55 AM
Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 19 | 12:21:55 AM
Commanded Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change 20 | 12:21:55 AM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 21 | 12:21:55 AM
Autonomous Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 22 | 12:21:55 AM
Autonomous Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 23 | 12:21:55 AM
Ground Station (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station 24 | 12:21:55 AM
Ground Station Operator (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station Operator 25 | 12:21:55 AM
FOP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Send mode change outcome telemetry/FOP 1 26 | 12:21:55 AM
The target of "Mode change packet bundle dump" (Functional Exchange) is not delegated to a leaf Logical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change packet bundle dump 27 | 12:21:55 AM
Both source and target of "Mode change telemetry collection" (Functional Exchange) are not delegated to leaf Logical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Logical Architecture/Logical Functions/Root Logical Function/Mode change telemetry collection 28 | 12:21:55 AM
Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Mode Change 29 | 12:21:55 AM
Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Mode Change 30 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 31 | 12:21:55 AM
Commanded Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 32 | 12:21:55 AM
Commanded Mode Change (Capability Realization) has Ground Station Operator (Logical Component) [Actor] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 33 | /obc-model/obc-model/Logical Architecture/Structure/Ground Station Operator 34 | 12:21:55 AM
Commanded Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change 35 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 36 | 12:21:55 AM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 37 | 12:21:55 AM
[ES] Commanded, OBC-Bypassing Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Logical Architecture/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Bypassing Mode Change Scenario 38 | 12:21:55 AM
Autonomous Mode Change (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Logical Architecture/Capabilities/Autonomous Mode Change 39 | 12:21:55 AM
Autonomous Mode Change (Capability Realization) has Logical System (Logical Component) that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Logical Architecture/Capabilities/Autonomous Mode Change 40 | /obc-model/obc-model/Logical Architecture/Structure/Logical System 41 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/FIP 1 42 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/FOP 1 43 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/FIP 1 44 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/FOP 1 45 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Listen for mode change packet bundle/FIP 1 46 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Listen for mode change packet bundle/FOP 1 47 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Buffer mode change packet bundle/FIP 1 48 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Buffer mode change packet bundle/FOP 1 49 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Re-propagate mode change packet bundle/FIP 1 50 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Relay mode change packet bundle/Re-propagate mode change packet bundle/FOP 1 51 | 12:21:55 AM
Propagate mode change packet bundle contains 2 elements with conflicting names: FOP 3, FOP 3ErrorI_19Capella/Integrity/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle 52 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 3 53 | /obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 3 54 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FIP 1 55 | 12:21:55 AM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 3 56 | 12:21:55 AM
FOP 4 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 4 57 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 1 58 | 12:21:55 AM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Change mode/Propagate mode change packet bundle/FOP 3 59 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Issue mode change telecommand/FOP 2 60 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change telecommand/FIP 2 61 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change telecommand/FOP 1 62 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change packet bundle/FIP 1 63 | 12:21:55 AM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change packet bundle/FOP 3 64 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change packet bundle/FOP 1 65 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FIP 1 66 | 12:21:55 AM
FOP 1 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FOP 1 67 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/FOP 1 68 | 12:21:55 AM
The leaf "Send mode change outcome full telemetry"(PhysicalFunction) is not allocated by any Component.WarningDCOM_03Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry 69 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FIP 1 70 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome full telemetry/FOP 1 71 | 12:21:55 AM
The leaf "Send mode change outcome minimal telemetry"(PhysicalFunction) is not allocated by any Component.WarningDCOM_03Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry 72 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FIP 1 73 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Send mode change outcome minimal telemetry/FOP 1 74 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Transmit telemetry/FIP 2 75 | 12:21:55 AM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Transmit telemetry/FIP 3 76 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/FIP 1 77 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/FOP 1 78 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Listen for communicated telemetry/FIP 2 79 | 12:21:55 AM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Listen for communicated telemetry/FIP 3 80 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Listen for communicated telemetry/FOP 2 81 | 12:21:55 AM
FOP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Listen for communicated telemetry/FOP 3 82 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Collect sensor data/FIP 2 83 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Collect sensor data/FOP 1 84 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Bundle full telemetry/FIP 1 85 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Bundle full telemetry/FOP 2 86 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Read telemetry history/FIP 2 87 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Read telemetry history/FOP 2 88 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Write telemetry history/FIP 2 89 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Write telemetry history/FOP 1 90 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Store telemetry history/Write to disk/FIP 1 91 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Store telemetry history/Write to disk/FOP 1 92 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Store telemetry history/Read from disk/FIP 2 93 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Store telemetry history/Read from disk/FOP 2 94 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Provide measurement of physical quantity/FIP 1 95 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Gather telemetry/Provide measurement of physical quantity/FOP 2 96 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Accept communicated telemetry/FIP 2 97 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Accept communicated telemetry/FOP 1 98 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Report full telemetry/FIP 1 99 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Send mode change outcome telemetry/Report full telemetry/FOP 1 100 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FIP 2 101 | 12:21:55 AM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FIP 3 102 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Receive mode change outcome telemetry/FOP 1 103 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 1 104 | 12:21:55 AM
FIP 2 (Function Port) is not used by any functional exchangeWarningDCOV_10Capella/Design/Coverage/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 2 105 | 12:21:55 AM
FIP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 2 106 | 12:21:55 AM
FIP 3 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FIP 3 107 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FOP 1 108 | 12:21:55 AM
FOP 2 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/FOP 2 109 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against sensor data/FIP 1 110 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against sensor data/FOP 1 111 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against telemetry history/FIP 1 112 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Validate outcome of mode change signal/Validate communicated telemetry against telemetry history/FOP 1 113 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Display mode change outcome telemetry/FIP 1 114 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Display mode change outcome telemetry/FOP 1 115 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Interpret mode change telemetry/FIP 1 116 | 12:21:55 AM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Expand mode change telecommand/FIP 1 117 | 12:21:55 AM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Expand mode change telecommand/FOP 1 118 | 12:21:55 AM
The source of "Mode change signal outcome report" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal outcome report 119 | 12:21:55 AM
Both source and target of "Mode change signal relayed execution" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relayed execution 120 | 12:21:55 AM
Mode change signal relayed execution (Functional Exchange) is defined between Relay mode change packet bundle and Validate outcome of mode change signal, but there is no exchange defined between the corresponding source and target elements in the previous phase.WarningTJ_G_04Capella/Transition/Justification/Generic/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change signal relayed execution 121 | 12:21:55 AM
The target of "Mode change packet bundle dump" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change packet bundle dump 122 | 12:21:55 AM
Both source and target of "Mode change telemetry collection" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change telemetry collection 123 | 12:21:55 AM
Both source and target of "Unsuccessful direct dump" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Unsuccessful direct dump 124 | 12:21:55 AM
The target of "Mode change packet bundle dump" (Functional Exchange) is not delegated to a leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change packet bundle dump 125 | 12:21:55 AM
Both source and target of "Mode change evaluation telemetry" (Functional Exchange) are not delegated to leaf Physical FunctionWarningDCOM_20Capella/Design/Completeness/obc-model/obc-model/Physical Architecture/Physical Functions/Root Physical Function/Mode change evaluation telemetry 126 | 12:21:55 AM
CapabilityRealization 1 (CapabilityRealization) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 127 | 12:21:55 AM
CapabilityRealization 1 (Capability Realization) has On-Board Computer Subsystem Process (Physical Component) [Behavior] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 128 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 129 | 12:21:55 AM
CapabilityRealization 1 (Capability Realization) has OBC MCU (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 130 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 131 | 12:21:55 AM
CapabilityRealization 1 (Capability Realization) has Comms Radio (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 132 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio 133 | 12:21:55 AM
CapabilityRealization 1 (Capability Realization) has Non-Volatile memory unit (Physical Component) [Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 134 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 135 | 12:21:55 AM
CapabilityRealization 1 (Capability Realization) has Ground Station (Physical Component) [Actor][Node] that is not present in any Functional Chains or ScenariosWarningDWF_CA_07Capella/Design/Well-Formedness/Capabilities/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1 136 | /obc-model/obc-model/Physical Architecture/Structure/Ground Station 137 | 12:21:55 AM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Relayed Mode Change Scenario 138 | 12:21:55 AM
[ES] Commanded, OBC-Bypassing Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/Physical Architecture/Capabilities/CapabilityRealization 1/[ES] Commanded, OBC-Bypassing Mode Change Scenario 139 | 12:21:55 AM
I2C 1 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/I2C 1 140 | 12:21:55 AM
I2C 2 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/I2C 2 141 | 12:21:55 AM
Analogue Link (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Analogue Link 142 | 12:21:55 AM
I2C 1 (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/I2C 1 143 | 12:21:55 AM
QSPI (PhysicalLink) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/QSPI 144 | 12:21:55 AM
Communications Subsystem Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Communications Subsystem Process 145 | 12:21:55 AM
On-Board Computer Subsystem Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 146 | 12:21:55 AM
Mode change packet bundle relay routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change packet bundle relay routine 147 | 12:21:55 AM
Mode change packet bundle relay routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change packet bundle relay routine 148 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 149 | 12:21:55 AM
Mode change packet bundle relay routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Mode change packet bundle relay routine 150 | 12:21:55 AM
Full telemetry collection routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 151 | 12:21:55 AM
Full telemetry collection routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 152 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 153 | 12:21:55 AM
Full telemetry collection routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Full telemetry collection routine 154 | 12:21:55 AM
Telemetry history storage (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry history storage 155 | 12:21:55 AM
Telemetry history storage (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry history storage 156 | 12:21:55 AM
Telemetry validation routine (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 157 | 12:21:55 AM
Telemetry validation routine (PhysicalComponent) of Nature BEHAVIOR should not be contained and deployed in the same parent On-Board Computer Subsystem Process (PhysicalComponent)WarningDWF_DC_44Capella/Design/Well-Formedness/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 158 | /obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process 159 | 12:21:55 AM
Telemetry validation routine (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/On-Board Computer Subsystem Process/Telemetry validation routine 160 | 12:21:55 AM
OBC MCU (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 161 | 12:21:55 AM
OBC MCU (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU 162 | 12:21:55 AM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 1 163 | 12:21:55 AM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 2 164 | 12:21:55 AM
PP 3 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 3 165 | 12:21:55 AM
PP 4 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 4 166 | 12:21:55 AM
PP 5 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/OBC MCU/PP 5 167 | 12:21:55 AM
Comms Radio (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio 168 | 12:21:55 AM
Comms Radio (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio 169 | 12:21:55 AM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio/PP 1 170 | 12:21:55 AM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Comms Radio/PP 2 171 | 12:21:55 AM
Non-Volatile memory unit (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 172 | 12:21:55 AM
Non-Volatile memory unit (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit 173 | 12:21:55 AM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Non-Volatile memory unit/PP 1 174 | 12:21:55 AM
Sensors (Physical Component) [Node] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors 175 | 12:21:55 AM
Sensors (Physical Component) [Node] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors 176 | 12:21:55 AM
PP 1 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors/PP 1 177 | 12:21:55 AM
PP 2 (PhysicalPort) is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Sensors/PP 2 178 | 12:21:55 AM
Parameter Sensing Process (Physical Component) [Behavior] is not realized by any Configuration Item.WarningTJ_PA_09Capella/Transition/Justification/Physical Architecture/obc-model/obc-model/Physical Architecture/Structure/Physical System/Parameter Sensing Process 179 | 12:21:55 AM
Parameter Sensing Process (Physical Component) [Behavior] does not realize any Logical Component.WarningTC_DC_09Capella/Transition/Consistency/Components/obc-model/obc-model/Physical Architecture/Structure/Physical System/Parameter Sensing Process 180 | 12:21:55 AM
7 | 8 | 9 | 10 | 11 | 12 | 13 | -------------------------------------------------------------------------------- /entrypoint.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | CAPELLA_VER=6.0.0 4 | 5 | # The first commandline argument contains the folder which shall have the 6 | # outputs of the export. 7 | results_folder=${1:-/workdir} 8 | mkdir -p ${results_folder} 9 | 10 | # Import the project into the workspace and validate it 11 | xvfb-run -s "-screen 0 1280x720x24" \ 12 | capella -nosplash -consoleLog \ 13 | -application org.polarsys.capella.core.commandline.core \ 14 | -appid org.polarsys.capella.core.validation.commandline \ 15 | -data /capella-workspace \ 16 | -import "/workdir/obc-model" \ 17 | -input "/obc-model/obc-model.aird" \ 18 | -outputfolder "/obc-model/validation" \ 19 | -logfile ${results_folder}/log.html \ 20 | -forceoutputfoldercreation 21 | 22 | # Export the model as HTML 23 | # Note: It seems that Capella has a bug in this function that does not allow 24 | # to use the import flag here. 25 | xvfb-run -s "-screen 0 1280x720x24" \ 26 | capella -nosplash -consoleLog \ 27 | -application org.polarsys.capella.core.commandline.core \ 28 | -appid org.polarsys.kitalpha.doc.gen.business.capella.commandline \ 29 | -data /capella-workspace \ 30 | -input "/obc-model/obc-model.aird" \ 31 | -outputfolder "/obc-model/html" \ 32 | -logfile ${results_folder}/log.html \ 33 | -forceoutputfoldercreation 34 | 35 | # Copy the validation and html output to the ${results_folder}/ that is mapped as a volume 36 | cp -r "/workdir/obc-model/html" ${results_folder}/html_export 37 | cp -r "/workdir/obc-model/validation" ${results_folder}/validation 38 | -------------------------------------------------------------------------------- /obc-model/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | obc-model 4 | 5 | 6 | 7 | 8 | 9 | 10 | org.polarsys.capella.project.nature 11 | 12 | 13 | -------------------------------------------------------------------------------- /obc-model/obc-model.afm: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | --------------------------------------------------------------------------------
Message Level Rule id Origin Resource Time
System Analysis (SystemAnalysis) does not realize Operational Analysis (Operational Analysis does not exist).ErrorTJ_SA_04Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis 14 | 3:35:41 PM
Root "Root System Function"(System Function) does not realize the Operational Analysis (Not Found), Please create Operational Analysis.ErrorTC_DF_15Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function 15 | 3:35:41 PM
Issue mode change telecommand (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Issue mode change telecommand 16 | 3:35:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Issue mode change telecommand/FOP 1 17 | 3:35:41 PM
Send mode change telecommand (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Send mode change telecommand 18 | 3:35:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Send mode change telecommand/FIP 1 19 | 3:35:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Send mode change telecommand/FOP 1 20 | 3:35:41 PM
Receive mode change telecommand (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Receive mode change telecommand 21 | 3:35:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Receive mode change telecommand/FIP 1 22 | 3:35:41 PM
Send mode change outcome telemetry (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Send mode change outcome telemetry 23 | 3:35:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Send mode change outcome telemetry/FOP 1 24 | 3:35:41 PM
Receive mode change outcome telemetry (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Receive mode change outcome telemetry 25 | 3:35:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Receive mode change outcome telemetry/FIP 1 26 | 3:35:41 PM
Display mode change outcome telemetry (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Display mode change outcome telemetry 27 | 3:35:41 PM
FOP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Display mode change outcome telemetry/FOP 1 28 | 3:35:41 PM
Change mode (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Change mode 29 | 3:35:41 PM
Interpret mode change telemetry (System Function) is not realized by any Logical Function.WarningTJ_LA_03Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/System Functions/Root System Function/Interpret mode change telemetry 30 | 3:35:41 PM
FIP 1 (Function Port) shall be realized by a lower level function port.WarningTC_DF_10Capella/Transition/Consistency/Dataflows/obc-model/obc-model/System Analysis/System Functions/Root System Function/Interpret mode change telemetry/FIP 1 31 | 3:35:41 PM
Mode change decision (Functional Exchange) in System Analysis is not realized by any other Functional Exchange in Logical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/System Analysis/System Functions/Root System Function/Mode change decision 32 | 3:35:41 PM
Mode change telecommand transmission (Functional Exchange) in System Analysis is not realized by any other Functional Exchange in Logical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/System Analysis/System Functions/Root System Function/Mode change telecommand transmission 33 | 3:35:41 PM
Mode change telemetry transmission (Functional Exchange) in System Analysis is not realized by any other Functional Exchange in Logical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/System Analysis/System Functions/Root System Function/Mode change telemetry transmission 34 | 3:35:41 PM
Mode change outcome telemetry display (Functional Exchange) in System Analysis is not realized by any other Functional Exchange in Logical Architecture.WarningTJ_G_03Capella/Transition/Justification/Generic/obc-model/obc-model/System Analysis/System Functions/Root System Function/Mode change outcome telemetry display 35 | 3:35:41 PM
Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 36 | 3:35:41 PM
Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Mode Change 37 | 3:35:41 PM
Mode Change (Capability) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/System Analysis/Capabilities/Mode Change 38 | 3:35:41 PM
Commanded Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change 39 | 3:35:41 PM
Commanded Mode Change (Capability) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change 40 | 3:35:41 PM
[ES] Commanded, OBC-Relayed Mode Change Scenario (Scenario) is not realized by any ScenarioWarningTC_DS_03Capella/Transition/Consistency/Scenarios/obc-model/obc-model/System Analysis/Capabilities/Commanded Mode Change/[ES] Commanded, OBC-Relayed Mode Change Scenario 41 | 3:35:41 PM
Autonomous Mode Change (Capability) is not exploited by any Mission.WarningDCOV_02Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 42 | 3:35:41 PM
Autonomous Mode Change (Capability) does not involve any Actor.WarningDCOV_07Capella/Design/Coverage/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 43 | 3:35:41 PM
Autonomous Mode Change (Capability) is not realized by any CapabilityRealizationWarningDWF_UC_02Capella/Design/Well-Formedness/Use Cases/obc-model/obc-model/System Analysis/Capabilities/Autonomous Mode Change 44 | 3:35:41 PM
Ground Station (System Component) [Actor] is not realized by any Logical Component.WarningTJ_LA_06Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/Structure/Ground Station 45 | 3:35:41 PM
Ground Station (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station 46 | 3:35:41 PM
Ground Station Operator (System Component) [Actor] is not realized by any Logical Component.WarningTJ_LA_06Capella/Transition/Justification/Logical Architecture/obc-model/obc-model/System Analysis/Structure/Ground Station Operator 47 | 3:35:41 PM
Ground Station Operator (System Component) [Actor] does not realize any Entity.WarningTJ_SA_02Capella/Transition/Justification/System Analysis/obc-model/obc-model/System Analysis/Structure/Ground Station Operator 48 | 3:35:41 PM