├── .editorconfig ├── .github └── workflows │ └── arrduino.yml ├── .gitignore ├── README.md ├── YM2151.cpp ├── YM2151.h ├── assets ├── arduino-ym2151-01.jpg ├── arduino-ym2151-02.jpg ├── arduino-ym2151-03.png ├── mame-emurate-work-in-progress01.png ├── vgmsample.gwi └── vgmsample.vgm ├── bin ├── README.md ├── kanon2151.vgm ├── optiboot_atmega328.asm ├── optiboot_atmega328.bin ├── optiboot_atmega328.hex ├── vgmduino.asm ├── vgmduino.bin └── vgmduino.hex ├── mame ├── README.md ├── copy-from.sh ├── copy-to.sh ├── roms │ └── kanon.zip ├── scripts │ └── target │ │ └── mame │ │ └── arcade.lua └── src │ ├── devices │ └── cpu │ │ └── avr8 │ │ ├── avr8.cpp │ │ ├── avr8.h │ │ ├── avr8dasm.cpp │ │ ├── avr8dasm.h │ │ └── avr8ops.hxx │ └── mame │ ├── arcade.flt │ ├── drivers │ └── vgmduino.cpp │ └── mame.lst ├── music └── vgmsample.h └── vgmduino.ino /.editorconfig: -------------------------------------------------------------------------------- 1 | root = true 2 | 3 | [*] 4 | indent_style = space 5 | indent_size = 4 6 | end_of_line = lf 7 | charset = utf-8 8 | trim_trailing_whitespace = true 9 | insert_final_newline = true 10 | -------------------------------------------------------------------------------- /.github/workflows/arrduino.yml: -------------------------------------------------------------------------------- 1 | name: Arduino CI 2 | 3 | on: [push] 4 | 5 | jobs: 6 | build: 7 | runs-on: ubuntu-latest 8 | steps: 9 | - uses: actions/checkout@v1 10 | - name: Build Sketches 11 | uses: Legion2/arduino-builder-action@v2.0.0 12 | with: 13 | sketchDirectory: ./ 14 | board: "arduino:avr:uno" 15 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | .vscode/ 2 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # arduino-vgmplayer 2 | 3 | ![](https://github.com/h1romas4/arduino-vgmplayer/workflows/Arduino%20CI/badge.svg) 4 | 5 | Play back the VGM format file with Arduino. (only YM2151) 6 | 7 | ## Demo 8 | 9 | [![arduino-ym2151](assets/arduino-ym2151-03.png)](https://youtu.be/8WIUi7Xq4dI) 10 | 11 | ## Schematic 12 | 13 | ### Arduino-YM2151 Block 14 | 15 | @see YM2151.h 16 | 17 | ```c 18 | static const uint8_t YM_PIN_D0=2; 19 | static const uint8_t YM_PIN_D1=3; 20 | static const uint8_t YM_PIN_D2=4; 21 | static const uint8_t YM_PIN_D3=5; 22 | static const uint8_t YM_PIN_D4=6; 23 | static const uint8_t YM_PIN_D5=7; 24 | static const uint8_t YM_PIN_D6=8; 25 | static const uint8_t YM_PIN_D7=9; 26 | 27 | static const uint8_t YM_PIN_RD=10; 28 | static const uint8_t YM_PIN_WR=11; 29 | static const uint8_t YM_PIN_A0=12; 30 | static const uint8_t YM_PIN_IC=13; 31 | ``` 32 | 33 | ``` 34 | YM_PIN_VSS(1/11) GND 35 | YM_PIN_CS(7) GND 36 | YM_PIN_VDD(22) 5V (with 0.1uF bypass capacitor) 37 | ``` 38 | 39 | ### YM2151-YM3012-Audio Block 40 | 41 | @see https://www.slideshare.net/nanase_t/ym2151fm (page-28) 42 | 43 | ## Thanks 44 | 45 | * [Web::ooISHoo YM2151Shield](http://www.ooishoo.org/wordpress/project/ym2151shield/) 46 | * [YM2151.cpp](https://github.com/ooISHoo/Arduino_YM2151/blob/develop/SketchMDXPlayer/YM2151.cpp) 47 | * [YM2151でFM音源演奏](https://www.slideshare.net/nanase_t/ym2151fm) 48 | * Create VGM file [mml2vgm](https://github.com/kuma4649/mml2vgm) 49 | 50 | ## Enjoy 51 | 52 | * Add EEPROM version 53 | 54 | ![arduino-ym2151](assets/arduino-ym2151-01.jpg) 55 | 56 | ![arduino-ym2151](assets/arduino-ym2151-02.jpg) 57 | 58 | * [https://www.youtube.com/watch?v=pdUrtxhG2Cw](https://www.youtube.com/watch?v=pdUrtxhG2Cw) 59 | -------------------------------------------------------------------------------- /YM2151.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | YM2151 library v0.13 3 | author:ISH 4 | */ 5 | #include 6 | #include 7 | 8 | #include "YM2151.h" 9 | 10 | #define DIRECT_IO 11 | 12 | YM2151_Class YM2151; 13 | 14 | YM2151_Class::YM2151_Class() 15 | { 16 | } 17 | 18 | /*! IOの初期設定を行いYM2151/YM3012をハードリセットする、必ず呼ぶ必要あり 19 | */ 20 | void YM2151_Class::begin() 21 | { 22 | digitalWrite(YM_PIN_IC, HIGH); 23 | digitalWrite(YM_PIN_A0, HIGH); 24 | digitalWrite(YM_PIN_WR, HIGH); 25 | digitalWrite(YM_PIN_RD, HIGH); 26 | 27 | pinMode(YM_PIN_A0, OUTPUT); 28 | pinMode(YM_PIN_WR, OUTPUT); 29 | pinMode(YM_PIN_RD, OUTPUT); 30 | pinMode(YM_PIN_IC, OUTPUT); 31 | digitalWrite(YM_PIN_IC, LOW); 32 | delay(200); 33 | digitalWrite(YM_PIN_IC, HIGH); 34 | delay(200); 35 | return; 36 | } 37 | 38 | // 39 | #define RD_HIGH (PORTB = PORTB | 0x4) 40 | #define RD_LOW (PORTB = PORTB & ~0x4) 41 | #define WR_HIGH (PORTB = PORTB | 0x8) 42 | #define WR_LOW (PORTB = PORTB & ~0x8) 43 | #define A0_HIGH (PORTB = PORTB | 0x10) 44 | #define A0_LOW (PORTB = PORTB & ~0x10) 45 | 46 | #define BUS_READ DDRD=0x02;DDRB=0x3c; 47 | #define BUS_WRITE DDRD=0xfe;DDRB=0x3f; 48 | 49 | #ifdef DIRECT_IO 50 | 51 | static uint8_t last_write_addr=0x00; 52 | 53 | /*! 指定アドレスのレジスタに書き込みを行う 54 | \param addr アドレス 55 | \param data データ 56 | */ 57 | void YM2151_Class::write(uint8_t addr,uint8_t data) 58 | { 59 | uint8_t i,wi; 60 | volatile uint8_t *ddrD=&DDRD; 61 | volatile uint8_t *ddrB=&DDRB; 62 | volatile uint8_t *portD=&PORTD; 63 | volatile uint8_t *portB=&PORTB; 64 | 65 | if(last_write_addr != 0x20){ 66 | // addr 0x20へのアクセスの後busyフラグが落ちなくなる病 '86の石だと発生 67 | // 他のレジスタに書くまで落ちないので、強引だが0x20アクセス後ならチェックしない 68 | *ddrD &= ~(_BV(2) | _BV(3) | _BV(4) | _BV(5) | _BV(6) | _BV(7)); 69 | *ddrB &= ~(_BV(0) | _BV(1)); 70 | wait(8); 71 | A0_LOW; 72 | wait(4); 73 | for(i=0;i<32;i++){ 74 | RD_LOW; 75 | wait(4); 76 | if((*portB & _BV(1))==0){ // Read Status 77 | RD_HIGH; 78 | wait(4); 79 | break; 80 | } 81 | RD_HIGH; 82 | wait(8); 83 | if(i>16){ 84 | delayMicroseconds(1); 85 | } 86 | } 87 | } 88 | wait(4); 89 | 90 | *ddrD |= (_BV(2) | _BV(3) | _BV(4) | _BV(5) | _BV(6) | _BV(7)); 91 | *ddrB |= (_BV(0) | _BV(1)); 92 | wait(8); 93 | A0_LOW; 94 | *portD = (addr << 2) | (*portD & 0x03); 95 | *portB = (addr >> 6) | (*portB & 0xfc); 96 | wait(4); 97 | WR_LOW; // Write Address 98 | wait(4); 99 | WR_HIGH; 100 | wait(2); 101 | A0_HIGH; 102 | wait(2); 103 | *portD = (data << 2) | (*portD & 0x03); 104 | *portB = (data >> 6) | (*portB & 0xfc); 105 | 106 | wait(4); 107 | WR_LOW; // Write Data 108 | wait(4); 109 | WR_HIGH; 110 | wait(2); 111 | last_write_addr = addr; 112 | } 113 | 114 | /*! ステータスを読み込む、bit0のみ有効 115 | */ 116 | uint8_t YM2151_Class::read() 117 | { 118 | uint8_t i,wi,data; 119 | volatile uint8_t *ddrD=&DDRD; 120 | volatile uint8_t *ddrB=&DDRB; 121 | volatile uint8_t *portD=&PORTD; 122 | volatile uint8_t *portB=&PORTB; 123 | *ddrD &= ~(_BV(2) | _BV(3) | _BV(4) | _BV(5) | _BV(6) | _BV(7)); 124 | *ddrB &= ~(_BV(0) | _BV(1)); 125 | A0_HIGH; 126 | wait(4); 127 | RD_LOW; // Read Data 128 | wait(4); 129 | data = 0; 130 | data |= (*portD)>>2; 131 | data |= (*portB)<<6; 132 | RD_HIGH; 133 | wait(4); 134 | } 135 | 136 | /*! 約300nSec x loop分だけ待つ、あまり正確でない。 137 | \param loop ループ数 138 | */ 139 | void YM2151_Class::wait(uint8_t loop) 140 | { 141 | uint8_t wi; 142 | for(wi=0;wi15)ASSERT("Illegal volume."); 294 | tl = volume_tbl[volume]; 295 | } 296 | tl += offset>>8; 297 | for(int i=0;i<4;i++){ 298 | if(CarrierSlot[ch] & (1< 0x7f || att < 0) att=0x7f; 304 | write(0x60 + i*8 + ch,att); 305 | } 306 | } 307 | 308 | /*! ノートオンする 309 | \param ch オンするチャンネル 310 | */ 311 | void YM2151_Class::noteOn(uint8_t ch) 312 | { 313 | write(0x08,(RegSLOTMASK[ch] << 3) + ch); 314 | } 315 | 316 | /*! ノートオフする 317 | \param ch オフするチャンネル 318 | */ 319 | void YM2151_Class::noteOff(uint8_t ch) 320 | { 321 | write(0x08,0x00 + ch); 322 | } 323 | 324 | const char KeyCodeTable[] PROGMEM = { 325 | 0x00,0x01,0x02,0x04,0x05,0x06,0x08,0x09, 326 | 0x0a,0x0c,0x0d,0x0e,0x10,0x11,0x12,0x14, 327 | 0x15,0x16,0x18,0x19,0x1a,0x1c,0x1d,0x1e, 328 | 0x20,0x21,0x22,0x24,0x25,0x26,0x28,0x29, 329 | 0x2a,0x2c,0x2d,0x2e,0x30,0x31,0x32,0x34, 330 | 0x35,0x36,0x38,0x39,0x3a,0x3c,0x3d,0x3e, 331 | 0x40,0x41,0x42,0x44,0x45,0x46,0x48,0x49, 332 | 0x4a,0x4c,0x4d,0x4e,0x50,0x51,0x52,0x54, 333 | 0x55,0x56,0x58,0x59,0x5a,0x5c,0x5d,0x5e, 334 | 0x60,0x61,0x62,0x64,0x65,0x66,0x68,0x69, 335 | 0x6a,0x6c,0x6d,0x6e,0x70,0x71,0x72,0x74, 336 | 0x75,0x76,0x78,0x79,0x7a,0x7c,0x7d,0x7e, 337 | }; 338 | 339 | /*! 音程を設定する 340 | \param ch 設定するチャンネル 341 | \param keycode オクターブ0のD#を0とした音階、D# E F F# G G# A A# B (オクターブ1) C C# D....と並ぶ 342 | \param kf 音階微調整、64で1音分上がる。 343 | */ 344 | void YM2151_Class::setTone(uint8_t ch,uint8_t keycode,int16_t kf){ 345 | int16_t offset_kf = (kf & 0x3f); 346 | int16_t offset_note = keycode + (kf >> 6); 347 | if(offset_note < 0)offset_note=0; 348 | if(offset_note > 0xbf)offset_note=0xbf; 349 | 350 | write(0x30 + ch, offset_kf<<2); 351 | write(0x28 + ch, pgm_read_byte_near(KeyCodeTable + offset_note)); 352 | } 353 | /*! パンポットを設定する 354 | \param ch 設定するチャンネル 355 | \param pan パン設定、0:出力なし 1:左 2:右 3:両出力 356 | */ 357 | void YM2151_Class::setPanpot(uint8_t ch,uint8_t pan){ 358 | write(0x20+ch, 359 | (pan<<6) | (RegFLCON[ch] )); 360 | 361 | } 362 | -------------------------------------------------------------------------------- /YM2151.h: -------------------------------------------------------------------------------- 1 | #if !defined( YM2151_H_INCLUDED ) 2 | #define YM2151_H_INCLUDED 3 | #include "Arduino.h" 4 | #include 5 | 6 | class YM2151_Class{ 7 | public: 8 | YM2151_Class(); 9 | void begin(); 10 | void initLFO(); 11 | uint8_t read(); 12 | void write(uint8_t addr,uint8_t data); 13 | 14 | void setTone(uint8_t ch,uint8_t keycode,int16_t kf); 15 | void setVolume(uint8_t ch,uint8_t volume,uint16_t offset); 16 | void noteOn(uint8_t ch); 17 | void noteOff(uint8_t ch); 18 | void loadTimbre(uint8_t ch,uint16_t prog_addr); 19 | void loadSeparationTimbre(uint8_t ch,uint16_t prog_addr); 20 | void dumpTimbre(uint16_t prog_addr); 21 | void setPanpot(uint8_t ch,uint8_t pan); 22 | private: 23 | static const uint8_t YM_PIN_D0=2; 24 | static const uint8_t YM_PIN_D1=3; 25 | static const uint8_t YM_PIN_D2=4; 26 | static const uint8_t YM_PIN_D3=5; 27 | static const uint8_t YM_PIN_D4=6; 28 | static const uint8_t YM_PIN_D5=7; 29 | static const uint8_t YM_PIN_D6=8; 30 | static const uint8_t YM_PIN_D7=9; 31 | 32 | static const uint8_t YM_PIN_RD=10; 33 | static const uint8_t YM_PIN_WR=11; 34 | static const uint8_t YM_PIN_A0=12; 35 | static const uint8_t YM_PIN_IC=13; 36 | 37 | uint8_t RegFLCON[8]; 38 | uint8_t RegSLOTMASK[8]; 39 | uint8_t CarrierSlot[8]; 40 | uint8_t RegTL[8][4]; 41 | 42 | void wait(uint8_t loop); 43 | }; 44 | extern YM2151_Class YM2151; 45 | #endif //YM2151H_INCLUDED 46 | -------------------------------------------------------------------------------- /assets/arduino-ym2151-01.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/assets/arduino-ym2151-01.jpg -------------------------------------------------------------------------------- /assets/arduino-ym2151-02.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/assets/arduino-ym2151-02.jpg -------------------------------------------------------------------------------- /assets/arduino-ym2151-03.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/assets/arduino-ym2151-03.png -------------------------------------------------------------------------------- /assets/mame-emurate-work-in-progress01.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/assets/mame-emurate-work-in-progress01.png -------------------------------------------------------------------------------- /assets/vgmsample.gwi: -------------------------------------------------------------------------------- 1 | '{ 2 | TitleName =vgmsample 3 | TitleNameJ =vgmsample 4 | GameName = 5 | GameNameJ = 6 | SystemName =arduino-vgmplayer 7 | SystemNameJ =arduino-vgmplayer 8 | Composer = 9 | ComposerJ = 10 | ReleaseDate =2018/06/01 11 | Converted = 12 | Notes = 13 | 14 | ClockCount =192 15 | } 16 | 17 | '@ M 110 18 | AR DR SR RR SL TL KS ML DT1 DT2 AME 19 | '@ 022,005,000,004,005,041,000,001,005,000,000 20 | '@ 016,008,008,008,002,000,001,002,005,000,000 21 | '@ 031,018,000,004,010,044,000,008,009,000,000 22 | '@ 031,009,007,008,002,003,001,001,009,000,000 23 | ALG FB 24 | '@ 004,007 25 | 26 | 'X6 T160@110l4 r1r1r1r1 cdefedcrefgagfercrcrcrcrc8c8d8d8e8e8f8f8edc 27 | 'X7 T160@110l4 r1r1 cdefedcrefgagfercrcrcrcrc8c8d8d8e8e8f8f8edc 28 | 'X8 T160@110l4 cdefedcrefgagfercrcrcrcrc8c8d8d8e8e8f8f8edc 29 | -------------------------------------------------------------------------------- /assets/vgmsample.vgm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/assets/vgmsample.vgm -------------------------------------------------------------------------------- /bin/README.md: -------------------------------------------------------------------------------- 1 | # arduino-vgmplayer 2 | 3 | ## install hex2bin 4 | 5 | https://github.com/bradgrantham/hex2bin 6 | 7 | ``` 8 | git clone https://github.com/bradgrantham/hex2bin 9 | make 10 | ``` 11 | 12 | ## Arduino build (Intel HEX) 13 | 14 | https://github.com/arduino/arduino-cli 15 | 16 | ``` 17 | arduino-cli --fqbn arduino:avr:uno compile vgmduino.ino 18 | # for Debug (but, not release) 19 | # arduino-cli compile --fqbn arduino:avr:uno --optimize-for-debug vgmduino.ino 20 | ``` 21 | 22 | ## convert hex to binary 23 | 24 | ``` 25 | # program binary (0x0000) 26 | hex2bin -r 32256 0 vgmduino.hex vgmduino.bin 27 | # bootloader (0x7e00) 28 | # Arduino UNO HIGH FUSE BIT 0b11011110 29 | wget https://raw.githubusercontent.com/arduino/ArduinoCore-avr/master/bootloaders/optiboot/optiboot_atmega328.hex 30 | hex2bin -r 512 0x7E00 optiboot_atmega328.hex optiboot_atmega328.bin 31 | ``` 32 | 33 | ## disasseble 34 | 35 | ``` 36 | sudo apt install gcc-avr 37 | # information 38 | avr-objdump -s -m avr5 optiboot_atmega328.hex 39 | avr-objdump -s -m avr5 vgmduino.hex 40 | # disassemble 41 | avr-objdump -D -m avr5 optiboot_atmega328.hex 42 | # disassemble set start address and show dwarf 43 | avr-objdump -D --start-address=0x6d68 --debugging --demangle -m avr5 vgmduino.hex > vgmduino.asm 44 | ``` 45 | 46 | ## hash 47 | 48 | ``` 49 | sudo apt install libarchive-zip-perl 50 | crc32 vgmduino.hex 51 | sha1sum vgmduino.hex 52 | ``` 53 | -------------------------------------------------------------------------------- /bin/kanon2151.vgm: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/bin/kanon2151.vgm -------------------------------------------------------------------------------- /bin/optiboot_atmega328.asm: -------------------------------------------------------------------------------- 1 | 2 | optiboot_atmega328.hex: ファイル形式 ihex 3 | 4 | 5 | セクション .sec1 の逆アセンブル: 6 | 7 | 00007e00 <.sec1>: 8 | 7e00: 11 24 eor r1, r1 9 | 7e02: 84 b7 in r24, 0x34 ; 52 10 | 7e04: 14 be out 0x34, r1 ; 52 11 | 7e06: 81 ff sbrs r24, 1 12 | 7e08: f0 d0 rcall .+480 ; 0x7fea 13 | 7e0a: 85 e0 ldi r24, 0x05 ; 5 14 | 7e0c: 80 93 81 00 sts 0x0081, r24 ; 0x800081 15 | 7e10: 82 e0 ldi r24, 0x02 ; 2 16 | 7e12: 80 93 c0 00 sts 0x00C0, r24 ; 0x8000c0 17 | 7e16: 88 e1 ldi r24, 0x18 ; 24 18 | 7e18: 80 93 c1 00 sts 0x00C1, r24 ; 0x8000c1 19 | 7e1c: 86 e0 ldi r24, 0x06 ; 6 20 | 7e1e: 80 93 c2 00 sts 0x00C2, r24 ; 0x8000c2 21 | 7e22: 80 e1 ldi r24, 0x10 ; 16 22 | 7e24: 80 93 c4 00 sts 0x00C4, r24 ; 0x8000c4 23 | 7e28: 8e e0 ldi r24, 0x0E ; 14 24 | 7e2a: c9 d0 rcall .+402 ; 0x7fbe 25 | 7e2c: 25 9a sbi 0x04, 5 ; 4 26 | 7e2e: 86 e0 ldi r24, 0x06 ; 6 27 | 7e30: 20 e3 ldi r18, 0x30 ; 48 28 | 7e32: 3c ef ldi r19, 0xFC ; 252 29 | 7e34: 91 e0 ldi r25, 0x01 ; 1 30 | 7e36: 30 93 85 00 sts 0x0085, r19 ; 0x800085 31 | 7e3a: 20 93 84 00 sts 0x0084, r18 ; 0x800084 32 | 7e3e: 96 bb out 0x16, r25 ; 22 33 | 7e40: b0 9b sbis 0x16, 0 ; 22 34 | 7e42: fe cf rjmp .-4 ; 0x7e40 35 | 7e44: 1d 9a sbi 0x03, 5 ; 3 36 | 7e46: a8 95 wdr 37 | 7e48: 81 50 subi r24, 0x01 ; 1 38 | 7e4a: a9 f7 brne .-22 ; 0x7e36 39 | 7e4c: cc 24 eor r12, r12 40 | 7e4e: dd 24 eor r13, r13 41 | 7e50: 88 24 eor r8, r8 42 | 7e52: 83 94 inc r8 43 | 7e54: b5 e0 ldi r27, 0x05 ; 5 44 | 7e56: ab 2e mov r10, r27 45 | 7e58: a1 e1 ldi r26, 0x11 ; 17 46 | 7e5a: 9a 2e mov r9, r26 47 | 7e5c: f3 e0 ldi r31, 0x03 ; 3 48 | 7e5e: bf 2e mov r11, r31 49 | 7e60: a2 d0 rcall .+324 ; 0x7fa6 50 | 7e62: 81 34 cpi r24, 0x41 ; 65 51 | 7e64: 61 f4 brne .+24 ; 0x7e7e 52 | 7e66: 9f d0 rcall .+318 ; 0x7fa6 53 | 7e68: 08 2f mov r16, r24 54 | 7e6a: af d0 rcall .+350 ; 0x7fca 55 | 7e6c: 02 38 cpi r16, 0x82 ; 130 56 | 7e6e: 11 f0 breq .+4 ; 0x7e74 57 | 7e70: 01 38 cpi r16, 0x81 ; 129 58 | 7e72: 11 f4 brne .+4 ; 0x7e78 59 | 7e74: 84 e0 ldi r24, 0x04 ; 4 60 | 7e76: 01 c0 rjmp .+2 ; 0x7e7a 61 | 7e78: 83 e0 ldi r24, 0x03 ; 3 62 | 7e7a: 8d d0 rcall .+282 ; 0x7f96 63 | 7e7c: 89 c0 rjmp .+274 ; 0x7f90 64 | 7e7e: 82 34 cpi r24, 0x42 ; 66 65 | 7e80: 11 f4 brne .+4 ; 0x7e86 66 | 7e82: 84 e1 ldi r24, 0x14 ; 20 67 | 7e84: 03 c0 rjmp .+6 ; 0x7e8c 68 | 7e86: 85 34 cpi r24, 0x45 ; 69 69 | 7e88: 19 f4 brne .+6 ; 0x7e90 70 | 7e8a: 85 e0 ldi r24, 0x05 ; 5 71 | 7e8c: a6 d0 rcall .+332 ; 0x7fda 72 | 7e8e: 80 c0 rjmp .+256 ; 0x7f90 73 | 7e90: 85 35 cpi r24, 0x55 ; 85 74 | 7e92: 79 f4 brne .+30 ; 0x7eb2 75 | 7e94: 88 d0 rcall .+272 ; 0x7fa6 76 | 7e96: e8 2e mov r14, r24 77 | 7e98: ff 24 eor r15, r15 78 | 7e9a: 85 d0 rcall .+266 ; 0x7fa6 79 | 7e9c: 08 2f mov r16, r24 80 | 7e9e: 10 e0 ldi r17, 0x00 ; 0 81 | 7ea0: 10 2f mov r17, r16 82 | 7ea2: 00 27 eor r16, r16 83 | 7ea4: 0e 29 or r16, r14 84 | 7ea6: 1f 29 or r17, r15 85 | 7ea8: 00 0f add r16, r16 86 | 7eaa: 11 1f adc r17, r17 87 | 7eac: 8e d0 rcall .+284 ; 0x7fca 88 | 7eae: 68 01 movw r12, r16 89 | 7eb0: 6f c0 rjmp .+222 ; 0x7f90 90 | 7eb2: 86 35 cpi r24, 0x56 ; 86 91 | 7eb4: 21 f4 brne .+8 ; 0x7ebe 92 | 7eb6: 84 e0 ldi r24, 0x04 ; 4 93 | 7eb8: 90 d0 rcall .+288 ; 0x7fda 94 | 7eba: 80 e0 ldi r24, 0x00 ; 0 95 | 7ebc: de cf rjmp .-68 ; 0x7e7a 96 | 7ebe: 84 36 cpi r24, 0x64 ; 100 97 | 7ec0: 09 f0 breq .+2 ; 0x7ec4 98 | 7ec2: 40 c0 rjmp .+128 ; 0x7f44 99 | 7ec4: 70 d0 rcall .+224 ; 0x7fa6 100 | 7ec6: 6f d0 rcall .+222 ; 0x7fa6 101 | 7ec8: 08 2f mov r16, r24 102 | 7eca: 6d d0 rcall .+218 ; 0x7fa6 103 | 7ecc: 80 e0 ldi r24, 0x00 ; 0 104 | 7ece: c8 16 cp r12, r24 105 | 7ed0: 80 e7 ldi r24, 0x70 ; 112 106 | 7ed2: d8 06 cpc r13, r24 107 | 7ed4: 18 f4 brcc .+6 ; 0x7edc 108 | 7ed6: f6 01 movw r30, r12 109 | 7ed8: b7 be out 0x37, r11 ; 55 110 | 7eda: e8 95 spm 111 | 7edc: c0 e0 ldi r28, 0x00 ; 0 112 | 7ede: d1 e0 ldi r29, 0x01 ; 1 113 | 7ee0: 62 d0 rcall .+196 ; 0x7fa6 114 | 7ee2: 89 93 st Y+, r24 115 | 7ee4: 0c 17 cp r16, r28 116 | 7ee6: e1 f7 brne .-8 ; 0x7ee0 117 | 7ee8: f0 e0 ldi r31, 0x00 ; 0 118 | 7eea: cf 16 cp r12, r31 119 | 7eec: f0 e7 ldi r31, 0x70 ; 112 120 | 7eee: df 06 cpc r13, r31 121 | 7ef0: 18 f0 brcs .+6 ; 0x7ef8 122 | 7ef2: f6 01 movw r30, r12 123 | 7ef4: b7 be out 0x37, r11 ; 55 124 | 7ef6: e8 95 spm 125 | 7ef8: 68 d0 rcall .+208 ; 0x7fca 126 | 7efa: 07 b6 in r0, 0x37 ; 55 127 | 7efc: 00 fc sbrc r0, 0 128 | 7efe: fd cf rjmp .-6 ; 0x7efa 129 | 7f00: a6 01 movw r20, r12 130 | 7f02: a0 e0 ldi r26, 0x00 ; 0 131 | 7f04: b1 e0 ldi r27, 0x01 ; 1 132 | 7f06: 2c 91 ld r18, X 133 | 7f08: 30 e0 ldi r19, 0x00 ; 0 134 | 7f0a: 11 96 adiw r26, 0x01 ; 1 135 | 7f0c: 8c 91 ld r24, X 136 | 7f0e: 11 97 sbiw r26, 0x01 ; 1 137 | 7f10: 90 e0 ldi r25, 0x00 ; 0 138 | 7f12: 98 2f mov r25, r24 139 | 7f14: 88 27 eor r24, r24 140 | 7f16: 82 2b or r24, r18 141 | 7f18: 93 2b or r25, r19 142 | 7f1a: 12 96 adiw r26, 0x02 ; 2 143 | 7f1c: fa 01 movw r30, r20 144 | 7f1e: 0c 01 movw r0, r24 145 | 7f20: 87 be out 0x37, r8 ; 55 146 | 7f22: e8 95 spm 147 | 7f24: 11 24 eor r1, r1 148 | 7f26: 4e 5f subi r20, 0xFE ; 254 149 | 7f28: 5f 4f sbci r21, 0xFF ; 255 150 | 7f2a: f1 e0 ldi r31, 0x01 ; 1 151 | 7f2c: a0 38 cpi r26, 0x80 ; 128 152 | 7f2e: bf 07 cpc r27, r31 153 | 7f30: 51 f7 brne .-44 ; 0x7f06 154 | 7f32: f6 01 movw r30, r12 155 | 7f34: a7 be out 0x37, r10 ; 55 156 | 7f36: e8 95 spm 157 | 7f38: 07 b6 in r0, 0x37 ; 55 158 | 7f3a: 00 fc sbrc r0, 0 159 | 7f3c: fd cf rjmp .-6 ; 0x7f38 160 | 7f3e: 97 be out 0x37, r9 ; 55 161 | 7f40: e8 95 spm 162 | 7f42: 26 c0 rjmp .+76 ; 0x7f90 163 | 7f44: 84 37 cpi r24, 0x74 ; 116 164 | 7f46: b1 f4 brne .+44 ; 0x7f74 165 | 7f48: 2e d0 rcall .+92 ; 0x7fa6 166 | 7f4a: 2d d0 rcall .+90 ; 0x7fa6 167 | 7f4c: f8 2e mov r15, r24 168 | 7f4e: 2b d0 rcall .+86 ; 0x7fa6 169 | 7f50: 3c d0 rcall .+120 ; 0x7fca 170 | 7f52: f6 01 movw r30, r12 171 | 7f54: ef 2c mov r14, r15 172 | 7f56: 8f 01 movw r16, r30 173 | 7f58: 0f 5f subi r16, 0xFF ; 255 174 | 7f5a: 1f 4f sbci r17, 0xFF ; 255 175 | 7f5c: 84 91 lpm r24, Z 176 | 7f5e: 1b d0 rcall .+54 ; 0x7f96 177 | 7f60: ea 94 dec r14 178 | 7f62: f8 01 movw r30, r16 179 | 7f64: c1 f7 brne .-16 ; 0x7f56 180 | 7f66: 08 94 sec 181 | 7f68: c1 1c adc r12, r1 182 | 7f6a: d1 1c adc r13, r1 183 | 7f6c: fa 94 dec r15 184 | 7f6e: cf 0c add r12, r15 185 | 7f70: d1 1c adc r13, r1 186 | 7f72: 0e c0 rjmp .+28 ; 0x7f90 187 | 7f74: 85 37 cpi r24, 0x75 ; 117 188 | 7f76: 39 f4 brne .+14 ; 0x7f86 189 | 7f78: 28 d0 rcall .+80 ; 0x7fca 190 | 7f7a: 8e e1 ldi r24, 0x1E ; 30 191 | 7f7c: 0c d0 rcall .+24 ; 0x7f96 192 | 7f7e: 85 e9 ldi r24, 0x95 ; 149 193 | 7f80: 0a d0 rcall .+20 ; 0x7f96 194 | 7f82: 8f e0 ldi r24, 0x0F ; 15 195 | 7f84: 7a cf rjmp .-268 ; 0x7e7a 196 | 7f86: 81 35 cpi r24, 0x51 ; 81 197 | 7f88: 11 f4 brne .+4 ; 0x7f8e 198 | 7f8a: 88 e0 ldi r24, 0x08 ; 8 199 | 7f8c: 18 d0 rcall .+48 ; 0x7fbe 200 | 7f8e: 1d d0 rcall .+58 ; 0x7fca 201 | 7f90: 80 e1 ldi r24, 0x10 ; 16 202 | 7f92: 01 d0 rcall .+2 ; 0x7f96 203 | 7f94: 65 cf rjmp .-310 ; 0x7e60 204 | 7f96: 98 2f mov r25, r24 205 | 7f98: 80 91 c0 00 lds r24, 0x00C0 ; 0x8000c0 206 | 7f9c: 85 ff sbrs r24, 5 207 | 7f9e: fc cf rjmp .-8 ; 0x7f98 208 | 7fa0: 90 93 c6 00 sts 0x00C6, r25 ; 0x8000c6 209 | 7fa4: 08 95 ret 210 | 7fa6: 80 91 c0 00 lds r24, 0x00C0 ; 0x8000c0 211 | 7faa: 87 ff sbrs r24, 7 212 | 7fac: fc cf rjmp .-8 ; 0x7fa6 213 | 7fae: 80 91 c0 00 lds r24, 0x00C0 ; 0x8000c0 214 | 7fb2: 84 fd sbrc r24, 4 215 | 7fb4: 01 c0 rjmp .+2 ; 0x7fb8 216 | 7fb6: a8 95 wdr 217 | 7fb8: 80 91 c6 00 lds r24, 0x00C6 ; 0x8000c6 218 | 7fbc: 08 95 ret 219 | 7fbe: e0 e6 ldi r30, 0x60 ; 96 220 | 7fc0: f0 e0 ldi r31, 0x00 ; 0 221 | 7fc2: 98 e1 ldi r25, 0x18 ; 24 222 | 7fc4: 90 83 st Z, r25 223 | 7fc6: 80 83 st Z, r24 224 | 7fc8: 08 95 ret 225 | 7fca: ed df rcall .-38 ; 0x7fa6 226 | 7fcc: 80 32 cpi r24, 0x20 ; 32 227 | 7fce: 19 f0 breq .+6 ; 0x7fd6 228 | 7fd0: 88 e0 ldi r24, 0x08 ; 8 229 | 7fd2: f5 df rcall .-22 ; 0x7fbe 230 | 7fd4: ff cf rjmp .-2 ; 0x7fd4 231 | 7fd6: 84 e1 ldi r24, 0x14 ; 20 232 | 7fd8: de cf rjmp .-68 ; 0x7f96 233 | 7fda: 1f 93 push r17 234 | 7fdc: 18 2f mov r17, r24 235 | 7fde: e3 df rcall .-58 ; 0x7fa6 236 | 7fe0: 11 50 subi r17, 0x01 ; 1 237 | 7fe2: e9 f7 brne .-6 ; 0x7fde 238 | 7fe4: f2 df rcall .-28 ; 0x7fca 239 | 7fe6: 1f 91 pop r17 240 | 7fe8: 08 95 ret 241 | 7fea: 80 e0 ldi r24, 0x00 ; 0 242 | 7fec: e8 df rcall .-48 ; 0x7fbe 243 | 7fee: ee 27 eor r30, r30 244 | 7ff0: ff 27 eor r31, r31 245 | 7ff2: 09 94 ijmp 246 | 247 | セクション .sec2 の逆アセンブル: 248 | 249 | 00007ffe <.sec2>: 250 | 7ffe: 04 04 cpc r0, r4 251 | -------------------------------------------------------------------------------- /bin/optiboot_atmega328.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/bin/optiboot_atmega328.bin -------------------------------------------------------------------------------- /bin/optiboot_atmega328.hex: -------------------------------------------------------------------------------- 1 | :107E0000112484B714BE81FFF0D085E080938100F7 2 | :107E100082E08093C00088E18093C10086E0809377 3 | :107E2000C20080E18093C4008EE0C9D0259A86E02C 4 | :107E300020E33CEF91E0309385002093840096BBD3 5 | :107E4000B09BFECF1D9AA8958150A9F7CC24DD24C4 6 | :107E500088248394B5E0AB2EA1E19A2EF3E0BF2EE7 7 | :107E6000A2D0813461F49FD0082FAFD0023811F036 8 | :107E7000013811F484E001C083E08DD089C08234E0 9 | :107E800011F484E103C0853419F485E0A6D080C0E4 10 | :107E9000853579F488D0E82EFF2485D0082F10E0AE 11 | :107EA000102F00270E291F29000F111F8ED06801E7 12 | :107EB0006FC0863521F484E090D080E0DECF843638 13 | :107EC00009F040C070D06FD0082F6DD080E0C81688 14 | :107ED00080E7D80618F4F601B7BEE895C0E0D1E017 15 | :107EE00062D089930C17E1F7F0E0CF16F0E7DF06D8 16 | :107EF00018F0F601B7BEE89568D007B600FCFDCFD4 17 | :107F0000A601A0E0B1E02C9130E011968C91119780 18 | :107F100090E0982F8827822B932B1296FA010C0160 19 | :107F200087BEE89511244E5F5F4FF1E0A038BF0790 20 | :107F300051F7F601A7BEE89507B600FCFDCF97BE46 21 | :107F4000E89526C08437B1F42ED02DD0F82E2BD052 22 | :107F50003CD0F601EF2C8F010F5F1F4F84911BD097 23 | :107F6000EA94F801C1F70894C11CD11CFA94CF0C13 24 | :107F7000D11C0EC0853739F428D08EE10CD085E9AC 25 | :107F80000AD08FE07ACF813511F488E018D01DD067 26 | :107F900080E101D065CF982F8091C00085FFFCCF94 27 | :107FA0009093C60008958091C00087FFFCCF809118 28 | :107FB000C00084FD01C0A8958091C6000895E0E648 29 | :107FC000F0E098E1908380830895EDDF803219F02E 30 | :107FD00088E0F5DFFFCF84E1DECF1F93182FE3DFCA 31 | :107FE0001150E9F7F2DF1F91089580E0E8DFEE27F6 32 | :047FF000FF270994CA 33 | :027FFE00040479 34 | :0400000300007E007B 35 | :00000001FF 36 | -------------------------------------------------------------------------------- /bin/vgmduino.asm: -------------------------------------------------------------------------------- 1 | 2 | vgmduino.hex: ファイル形式 ihex 3 | 4 | 5 | セクション .sec1 の逆アセンブル: 6 | 7 | 00006d68 <.sec1+0x6d68>: 8 | 6d68: 11 24 eor r1, r1 9 | 6d6a: 1f be out 0x3f, r1 ; 63 10 | 6d6c: cf ef ldi r28, 0xFF ; 255 11 | 6d6e: d8 e0 ldi r29, 0x08 ; 8 12 | 6d70: de bf out 0x3e, r29 ; 62 13 | 6d72: cd bf out 0x3d, r28 ; 61 14 | 6d74: 11 e0 ldi r17, 0x01 ; 1 15 | 6d76: a0 e0 ldi r26, 0x00 ; 0 16 | 6d78: b1 e0 ldi r27, 0x01 ; 1 17 | 6d7a: e4 e4 ldi r30, 0x44 ; 68 18 | 6d7c: f6 e7 ldi r31, 0x76 ; 118 19 | 6d7e: 02 c0 rjmp .+4 ; 0x6d84 20 | 6d80: 05 90 lpm r0, Z+ 21 | 6d82: 0d 92 st X+, r0 22 | 6d84: a2 30 cpi r26, 0x02 ; 2 23 | 6d86: b1 07 cpc r27, r17 24 | 6d88: d9 f7 brne .-10 ; 0x6d80 25 | 6d8a: 21 e0 ldi r18, 0x01 ; 1 26 | 6d8c: a2 e0 ldi r26, 0x02 ; 2 27 | 6d8e: b1 e0 ldi r27, 0x01 ; 1 28 | 6d90: 01 c0 rjmp .+2 ; 0x6d94 29 | 6d92: 1d 92 st X+, r1 30 | 6d94: a5 31 cpi r26, 0x15 ; 21 31 | 6d96: b2 07 cpc r27, r18 32 | 6d98: e1 f7 brne .-8 ; 0x6d92 33 | 6d9a: 0e 94 24 38 call 0x7048 ; 0x7048 34 | 6d9e: 0c 94 20 3b jmp 0x7640 ; 0x7640 35 | 6da2: 0c 94 00 00 jmp 0 ; 0x0 36 | 6da6: 90 e0 ldi r25, 0x00 ; 0 37 | 6da8: fc 01 movw r30, r24 38 | 6daa: ed 5a subi r30, 0xAD ; 173 39 | 6dac: f2 49 sbci r31, 0x92 ; 146 40 | 6dae: 24 91 lpm r18, Z 41 | 6db0: 81 5c subi r24, 0xC1 ; 193 42 | 6db2: 92 49 sbci r25, 0x92 ; 146 43 | 6db4: fc 01 movw r30, r24 44 | 6db6: 84 91 lpm r24, Z 45 | 6db8: 88 23 and r24, r24 46 | 6dba: 99 f0 breq .+38 ; 0x6de2 47 | 6dbc: 90 e0 ldi r25, 0x00 ; 0 48 | 6dbe: 88 0f add r24, r24 49 | 6dc0: 99 1f adc r25, r25 50 | 6dc2: fc 01 movw r30, r24 51 | 6dc4: eb 5c subi r30, 0xCB ; 203 52 | 6dc6: f2 49 sbci r31, 0x92 ; 146 53 | 6dc8: a5 91 lpm r26, Z+ 54 | 6dca: b4 91 lpm r27, Z 55 | 6dcc: fc 01 movw r30, r24 56 | 6dce: e5 5d subi r30, 0xD5 ; 213 57 | 6dd0: f2 49 sbci r31, 0x92 ; 146 58 | 6dd2: 85 91 lpm r24, Z+ 59 | 6dd4: 94 91 lpm r25, Z 60 | 6dd6: 8f b7 in r24, 0x3f ; 63 61 | 6dd8: f8 94 cli 62 | 6dda: ec 91 ld r30, X 63 | 6ddc: e2 2b or r30, r18 64 | 6dde: ec 93 st X, r30 65 | 6de0: 8f bf out 0x3f, r24 ; 63 66 | 6de2: 08 95 ret 67 | 6de4: 90 e0 ldi r25, 0x00 ; 0 68 | ... 69 | 6dee: 9f 5f subi r25, 0xFF ; 255 70 | 6df0: 89 13 cpse r24, r25 71 | 6df2: f9 cf rjmp .-14 ; 0x6de6 72 | 6df4: 08 95 ret 73 | 6df6: 90 e0 ldi r25, 0x00 ; 0 74 | 6df8: fc 01 movw r30, r24 75 | 6dfa: e9 5e subi r30, 0xE9 ; 233 76 | 6dfc: f2 49 sbci r31, 0x92 ; 146 77 | 6dfe: 24 91 lpm r18, Z 78 | 6e00: fc 01 movw r30, r24 79 | 6e02: ed 5a subi r30, 0xAD ; 173 80 | 6e04: f2 49 sbci r31, 0x92 ; 146 81 | 6e06: 34 91 lpm r19, Z 82 | 6e08: fc 01 movw r30, r24 83 | 6e0a: e1 5c subi r30, 0xC1 ; 193 84 | 6e0c: f2 49 sbci r31, 0x92 ; 146 85 | 6e0e: e4 91 lpm r30, Z 86 | 6e10: ee 23 and r30, r30 87 | 6e12: c9 f0 breq .+50 ; 0x6e46 88 | 6e14: 22 23 and r18, r18 89 | 6e16: 39 f0 breq .+14 ; 0x6e26 90 | 6e18: 23 30 cpi r18, 0x03 ; 3 91 | 6e1a: 01 f1 breq .+64 ; 0x6e5c 92 | 6e1c: a8 f4 brcc .+42 ; 0x6e48 93 | 6e1e: 21 30 cpi r18, 0x01 ; 1 94 | 6e20: 19 f1 breq .+70 ; 0x6e68 95 | 6e22: 22 30 cpi r18, 0x02 ; 2 96 | 6e24: 29 f1 breq .+74 ; 0x6e70 97 | 6e26: f0 e0 ldi r31, 0x00 ; 0 98 | 6e28: ee 0f add r30, r30 99 | 6e2a: ff 1f adc r31, r31 100 | 6e2c: e5 5d subi r30, 0xD5 ; 213 101 | 6e2e: f2 49 sbci r31, 0x92 ; 146 102 | 6e30: a5 91 lpm r26, Z+ 103 | 6e32: b4 91 lpm r27, Z 104 | 6e34: 8f b7 in r24, 0x3f ; 63 105 | 6e36: f8 94 cli 106 | 6e38: ec 91 ld r30, X 107 | 6e3a: 61 11 cpse r22, r1 108 | 6e3c: 26 c0 rjmp .+76 ; 0x6e8a 109 | 6e3e: 30 95 com r19 110 | 6e40: 3e 23 and r19, r30 111 | 6e42: 3c 93 st X, r19 112 | 6e44: 8f bf out 0x3f, r24 ; 63 113 | 6e46: 08 95 ret 114 | 6e48: 27 30 cpi r18, 0x07 ; 7 115 | 6e4a: a9 f0 breq .+42 ; 0x6e76 116 | 6e4c: 28 30 cpi r18, 0x08 ; 8 117 | 6e4e: c9 f0 breq .+50 ; 0x6e82 118 | 6e50: 24 30 cpi r18, 0x04 ; 4 119 | 6e52: 49 f7 brne .-46 ; 0x6e26 120 | 6e54: 80 91 80 00 lds r24, 0x0080 ; 0x800080 121 | 6e58: 8f 7d andi r24, 0xDF ; 223 122 | 6e5a: 03 c0 rjmp .+6 ; 0x6e62 123 | 6e5c: 80 91 80 00 lds r24, 0x0080 ; 0x800080 124 | 6e60: 8f 77 andi r24, 0x7F ; 127 125 | 6e62: 80 93 80 00 sts 0x0080, r24 ; 0x800080 126 | 6e66: df cf rjmp .-66 ; 0x6e26 127 | 6e68: 84 b5 in r24, 0x24 ; 36 128 | 6e6a: 8f 77 andi r24, 0x7F ; 127 129 | 6e6c: 84 bd out 0x24, r24 ; 36 130 | 6e6e: db cf rjmp .-74 ; 0x6e26 131 | 6e70: 84 b5 in r24, 0x24 ; 36 132 | 6e72: 8f 7d andi r24, 0xDF ; 223 133 | 6e74: fb cf rjmp .-10 ; 0x6e6c 134 | 6e76: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 135 | 6e7a: 8f 77 andi r24, 0x7F ; 127 136 | 6e7c: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 137 | 6e80: d2 cf rjmp .-92 ; 0x6e26 138 | 6e82: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 139 | 6e86: 8f 7d andi r24, 0xDF ; 223 140 | 6e88: f9 cf rjmp .-14 ; 0x6e7c 141 | 6e8a: 3e 2b or r19, r30 142 | 6e8c: da cf rjmp .-76 ; 0x6e42 143 | 6e8e: 3f b7 in r19, 0x3f ; 63 144 | 6e90: f8 94 cli 145 | 6e92: 80 91 07 01 lds r24, 0x0107 ; 0x800107 146 | 6e96: 90 91 08 01 lds r25, 0x0108 ; 0x800108 147 | 6e9a: a0 91 09 01 lds r26, 0x0109 ; 0x800109 148 | 6e9e: b0 91 0a 01 lds r27, 0x010A ; 0x80010a 149 | 6ea2: 26 b5 in r18, 0x26 ; 38 150 | 6ea4: a8 9b sbis 0x15, 0 ; 21 151 | 6ea6: 05 c0 rjmp .+10 ; 0x6eb2 152 | 6ea8: 2f 3f cpi r18, 0xFF ; 255 153 | 6eaa: 19 f0 breq .+6 ; 0x6eb2 154 | 6eac: 01 96 adiw r24, 0x01 ; 1 155 | 6eae: a1 1d adc r26, r1 156 | 6eb0: b1 1d adc r27, r1 157 | 6eb2: 3f bf out 0x3f, r19 ; 63 158 | 6eb4: ba 2f mov r27, r26 159 | 6eb6: a9 2f mov r26, r25 160 | 6eb8: 98 2f mov r25, r24 161 | 6eba: 88 27 eor r24, r24 162 | 6ebc: bc 01 movw r22, r24 163 | 6ebe: cd 01 movw r24, r26 164 | 6ec0: 62 0f add r22, r18 165 | 6ec2: 71 1d adc r23, r1 166 | 6ec4: 81 1d adc r24, r1 167 | 6ec6: 91 1d adc r25, r1 168 | 6ec8: 42 e0 ldi r20, 0x02 ; 2 169 | 6eca: 66 0f add r22, r22 170 | 6ecc: 77 1f adc r23, r23 171 | 6ece: 88 1f adc r24, r24 172 | 6ed0: 99 1f adc r25, r25 173 | 6ed2: 4a 95 dec r20 174 | 6ed4: d1 f7 brne .-12 ; 0x6eca 175 | 6ed6: 08 95 ret 176 | 6ed8: 8f 92 push r8 177 | 6eda: 9f 92 push r9 178 | 6edc: af 92 push r10 179 | 6ede: bf 92 push r11 180 | 6ee0: cf 92 push r12 181 | 6ee2: df 92 push r13 182 | 6ee4: ef 92 push r14 183 | 6ee6: ff 92 push r15 184 | 6ee8: 4b 01 movw r8, r22 185 | 6eea: 5c 01 movw r10, r24 186 | 6eec: 0e 94 47 37 call 0x6e8e ; 0x6e8e 187 | 6ef0: 6b 01 movw r12, r22 188 | 6ef2: 7c 01 movw r14, r24 189 | 6ef4: 0e 94 47 37 call 0x6e8e ; 0x6e8e 190 | 6ef8: 6c 19 sub r22, r12 191 | 6efa: 7d 09 sbc r23, r13 192 | 6efc: 8e 09 sbc r24, r14 193 | 6efe: 9f 09 sbc r25, r15 194 | 6f00: 68 3e cpi r22, 0xE8 ; 232 195 | 6f02: 73 40 sbci r23, 0x03 ; 3 196 | 6f04: 81 05 cpc r24, r1 197 | 6f06: 91 05 cpc r25, r1 198 | 6f08: a8 f3 brcs .-22 ; 0x6ef4 199 | 6f0a: 21 e0 ldi r18, 0x01 ; 1 200 | 6f0c: 82 1a sub r8, r18 201 | 6f0e: 91 08 sbc r9, r1 202 | 6f10: a1 08 sbc r10, r1 203 | 6f12: b1 08 sbc r11, r1 204 | 6f14: 88 ee ldi r24, 0xE8 ; 232 205 | 6f16: c8 0e add r12, r24 206 | 6f18: 83 e0 ldi r24, 0x03 ; 3 207 | 6f1a: d8 1e adc r13, r24 208 | 6f1c: e1 1c adc r14, r1 209 | 6f1e: f1 1c adc r15, r1 210 | 6f20: 81 14 cp r8, r1 211 | 6f22: 91 04 cpc r9, r1 212 | 6f24: a1 04 cpc r10, r1 213 | 6f26: b1 04 cpc r11, r1 214 | 6f28: 29 f7 brne .-54 ; 0x6ef4 215 | 6f2a: ff 90 pop r15 216 | 6f2c: ef 90 pop r14 217 | 6f2e: df 90 pop r13 218 | 6f30: cf 90 pop r12 219 | 6f32: bf 90 pop r11 220 | 6f34: af 90 pop r10 221 | 6f36: 9f 90 pop r9 222 | 6f38: 8f 90 pop r8 223 | 6f3a: 08 95 ret 224 | 6f3c: 0e 94 27 3a call 0x744e ; 0x744e 225 | 6f40: 9b 01 movw r18, r22 226 | 6f42: ac 01 movw r20, r24 227 | 6f44: 60 e0 ldi r22, 0x00 ; 0 228 | 6f46: 74 e4 ldi r23, 0x44 ; 68 229 | 6f48: 8c e2 ldi r24, 0x2C ; 44 230 | 6f4a: 97 e4 ldi r25, 0x47 ; 71 231 | 6f4c: 0e 94 84 39 call 0x7308 ; 0x7308 232 | 6f50: 9b 01 movw r18, r22 233 | 6f52: ac 01 movw r20, r24 234 | 6f54: 60 e0 ldi r22, 0x00 ; 0 235 | 6f56: 70 e0 ldi r23, 0x00 ; 0 236 | 6f58: 8a e7 ldi r24, 0x7A ; 122 237 | 6f5a: 94 e4 ldi r25, 0x44 ; 68 238 | 6f5c: 0e 94 84 39 call 0x7308 ; 0x7308 239 | 6f60: 20 e0 ldi r18, 0x00 ; 0 240 | 6f62: 30 e0 ldi r19, 0x00 ; 0 241 | 6f64: 4a e7 ldi r20, 0x7A ; 122 242 | 6f66: 54 e4 ldi r21, 0x44 ; 68 243 | 6f68: 0e 94 b3 3a call 0x7566 ; 0x7566 244 | 6f6c: 0e 94 f6 39 call 0x73ec ; 0x73ec 245 | 6f70: 60 93 0c 01 sts 0x010C, r22 ; 0x80010c 246 | 6f74: 70 93 0d 01 sts 0x010D, r23 ; 0x80010d 247 | 6f78: 80 93 0e 01 sts 0x010E, r24 ; 0x80010e 248 | 6f7c: 90 93 0f 01 sts 0x010F, r25 ; 0x80010f 249 | 6f80: 0e 94 47 37 call 0x6e8e ; 0x6e8e 250 | 6f84: 60 93 10 01 sts 0x0110, r22 ; 0x800110 251 | 6f88: 70 93 11 01 sts 0x0111, r23 ; 0x800111 252 | 6f8c: 80 93 12 01 sts 0x0112, r24 ; 0x800112 253 | 6f90: 90 93 13 01 sts 0x0113, r25 ; 0x800113 254 | 6f94: 08 95 ret 255 | 6f96: 20 91 00 01 lds r18, 0x0100 ; 0x800100 256 | 6f9a: 30 91 01 01 lds r19, 0x0101 ; 0x800101 257 | 6f9e: f9 01 movw r30, r18 258 | 6fa0: e8 59 subi r30, 0x98 ; 152 259 | 6fa2: ff 4f sbci r31, 0xFF ; 255 260 | 6fa4: 84 91 lpm r24, Z 261 | 6fa6: 2f 5f subi r18, 0xFF ; 255 262 | 6fa8: 3f 4f sbci r19, 0xFF ; 255 263 | 6faa: 30 93 01 01 sts 0x0101, r19 ; 0x800101 264 | 6fae: 20 93 00 01 sts 0x0100, r18 ; 0x800100 265 | 6fb2: 08 95 ret 266 | 6fb4: 1f 92 push r1 267 | 6fb6: 0f 92 push r0 268 | 6fb8: 0f b6 in r0, 0x3f ; 63 269 | 6fba: 0f 92 push r0 270 | 6fbc: 11 24 eor r1, r1 271 | 6fbe: 2f 93 push r18 272 | 6fc0: 3f 93 push r19 273 | 6fc2: 8f 93 push r24 274 | 6fc4: 9f 93 push r25 275 | 6fc6: af 93 push r26 276 | 6fc8: bf 93 push r27 277 | 6fca: 80 91 03 01 lds r24, 0x0103 ; 0x800103 278 | 6fce: 90 91 04 01 lds r25, 0x0104 ; 0x800104 279 | 6fd2: a0 91 05 01 lds r26, 0x0105 ; 0x800105 280 | 6fd6: b0 91 06 01 lds r27, 0x0106 ; 0x800106 281 | 6fda: 30 91 02 01 lds r19, 0x0102 ; 0x800102 282 | 6fde: 23 e0 ldi r18, 0x03 ; 3 283 | 6fe0: 23 0f add r18, r19 284 | 6fe2: 2d 37 cpi r18, 0x7D ; 125 285 | 6fe4: 58 f5 brcc .+86 ; 0x703c 286 | 6fe6: 01 96 adiw r24, 0x01 ; 1 287 | 6fe8: a1 1d adc r26, r1 288 | 6fea: b1 1d adc r27, r1 289 | 6fec: 20 93 02 01 sts 0x0102, r18 ; 0x800102 290 | 6ff0: 80 93 03 01 sts 0x0103, r24 ; 0x800103 291 | 6ff4: 90 93 04 01 sts 0x0104, r25 ; 0x800104 292 | 6ff8: a0 93 05 01 sts 0x0105, r26 ; 0x800105 293 | 6ffc: b0 93 06 01 sts 0x0106, r27 ; 0x800106 294 | 7000: 80 91 07 01 lds r24, 0x0107 ; 0x800107 295 | 7004: 90 91 08 01 lds r25, 0x0108 ; 0x800108 296 | 7008: a0 91 09 01 lds r26, 0x0109 ; 0x800109 297 | 700c: b0 91 0a 01 lds r27, 0x010A ; 0x80010a 298 | 7010: 01 96 adiw r24, 0x01 ; 1 299 | 7012: a1 1d adc r26, r1 300 | 7014: b1 1d adc r27, r1 301 | 7016: 80 93 07 01 sts 0x0107, r24 ; 0x800107 302 | 701a: 90 93 08 01 sts 0x0108, r25 ; 0x800108 303 | 701e: a0 93 09 01 sts 0x0109, r26 ; 0x800109 304 | 7022: b0 93 0a 01 sts 0x010A, r27 ; 0x80010a 305 | 7026: bf 91 pop r27 306 | 7028: af 91 pop r26 307 | 702a: 9f 91 pop r25 308 | 702c: 8f 91 pop r24 309 | 702e: 3f 91 pop r19 310 | 7030: 2f 91 pop r18 311 | 7032: 0f 90 pop r0 312 | 7034: 0f be out 0x3f, r0 ; 63 313 | 7036: 0f 90 pop r0 314 | 7038: 1f 90 pop r1 315 | 703a: 18 95 reti 316 | 703c: 26 e8 ldi r18, 0x86 ; 134 317 | 703e: 23 0f add r18, r19 318 | 7040: 02 96 adiw r24, 0x02 ; 2 319 | 7042: a1 1d adc r26, r1 320 | 7044: b1 1d adc r27, r1 321 | 7046: d2 cf rjmp .-92 ; 0x6fec 322 | 7048: 78 94 sei 323 | 704a: 84 b5 in r24, 0x24 ; 36 324 | 704c: 82 60 ori r24, 0x02 ; 2 325 | 704e: 84 bd out 0x24, r24 ; 36 326 | 7050: 84 b5 in r24, 0x24 ; 36 327 | 7052: 81 60 ori r24, 0x01 ; 1 328 | 7054: 84 bd out 0x24, r24 ; 36 329 | 7056: 85 b5 in r24, 0x25 ; 37 330 | 7058: 82 60 ori r24, 0x02 ; 2 331 | 705a: 85 bd out 0x25, r24 ; 37 332 | 705c: 85 b5 in r24, 0x25 ; 37 333 | 705e: 81 60 ori r24, 0x01 ; 1 334 | 7060: 85 bd out 0x25, r24 ; 37 335 | 7062: 80 91 6e 00 lds r24, 0x006E ; 0x80006e 336 | 7066: 81 60 ori r24, 0x01 ; 1 337 | 7068: 80 93 6e 00 sts 0x006E, r24 ; 0x80006e 338 | 706c: 10 92 81 00 sts 0x0081, r1 ; 0x800081 339 | 7070: 80 91 81 00 lds r24, 0x0081 ; 0x800081 340 | 7074: 82 60 ori r24, 0x02 ; 2 341 | 7076: 80 93 81 00 sts 0x0081, r24 ; 0x800081 342 | 707a: 80 91 81 00 lds r24, 0x0081 ; 0x800081 343 | 707e: 81 60 ori r24, 0x01 ; 1 344 | 7080: 80 93 81 00 sts 0x0081, r24 ; 0x800081 345 | 7084: 80 91 80 00 lds r24, 0x0080 ; 0x800080 346 | 7088: 81 60 ori r24, 0x01 ; 1 347 | 708a: 80 93 80 00 sts 0x0080, r24 ; 0x800080 348 | 708e: 80 91 b1 00 lds r24, 0x00B1 ; 0x8000b1 349 | 7092: 84 60 ori r24, 0x04 ; 4 350 | 7094: 80 93 b1 00 sts 0x00B1, r24 ; 0x8000b1 351 | 7098: 80 91 b0 00 lds r24, 0x00B0 ; 0x8000b0 352 | 709c: 81 60 ori r24, 0x01 ; 1 353 | 709e: 80 93 b0 00 sts 0x00B0, r24 ; 0x8000b0 354 | 70a2: 80 91 7a 00 lds r24, 0x007A ; 0x80007a 355 | 70a6: 84 60 ori r24, 0x04 ; 4 356 | 70a8: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a 357 | 70ac: 80 91 7a 00 lds r24, 0x007A ; 0x80007a 358 | 70b0: 82 60 ori r24, 0x02 ; 2 359 | 70b2: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a 360 | 70b6: 80 91 7a 00 lds r24, 0x007A ; 0x80007a 361 | 70ba: 81 60 ori r24, 0x01 ; 1 362 | 70bc: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a 363 | 70c0: 80 91 7a 00 lds r24, 0x007A ; 0x80007a 364 | 70c4: 80 68 ori r24, 0x80 ; 128 365 | 70c6: 80 93 7a 00 sts 0x007A, r24 ; 0x80007a 366 | 70ca: 10 92 c1 00 sts 0x00C1, r1 ; 0x8000c1 367 | 70ce: 61 e0 ldi r22, 0x01 ; 1 368 | 70d0: 8d e0 ldi r24, 0x0D ; 13 369 | 70d2: 0e 94 fb 36 call 0x6df6 ; 0x6df6 370 | 70d6: 61 e0 ldi r22, 0x01 ; 1 371 | 70d8: 8c e0 ldi r24, 0x0C ; 12 372 | 70da: 0e 94 fb 36 call 0x6df6 ; 0x6df6 373 | 70de: 61 e0 ldi r22, 0x01 ; 1 374 | 70e0: 8b e0 ldi r24, 0x0B ; 11 375 | 70e2: 0e 94 fb 36 call 0x6df6 ; 0x6df6 376 | 70e6: 61 e0 ldi r22, 0x01 ; 1 377 | 70e8: 8a e0 ldi r24, 0x0A ; 10 378 | 70ea: 0e 94 fb 36 call 0x6df6 ; 0x6df6 379 | 70ee: 8c e0 ldi r24, 0x0C ; 12 380 | 70f0: 0e 94 d3 36 call 0x6da6 ; 0x6da6 381 | 70f4: 8b e0 ldi r24, 0x0B ; 11 382 | 70f6: 0e 94 d3 36 call 0x6da6 ; 0x6da6 383 | 70fa: 8a e0 ldi r24, 0x0A ; 10 384 | 70fc: 0e 94 d3 36 call 0x6da6 ; 0x6da6 385 | 7100: 8d e0 ldi r24, 0x0D ; 13 386 | 7102: 0e 94 d3 36 call 0x6da6 ; 0x6da6 387 | 7106: 60 e0 ldi r22, 0x00 ; 0 388 | 7108: 8d e0 ldi r24, 0x0D ; 13 389 | 710a: 0e 94 fb 36 call 0x6df6 ; 0x6df6 390 | 710e: 68 ec ldi r22, 0xC8 ; 200 391 | 7110: 70 e0 ldi r23, 0x00 ; 0 392 | 7112: 80 e0 ldi r24, 0x00 ; 0 393 | 7114: 90 e0 ldi r25, 0x00 ; 0 394 | 7116: 0e 94 6c 37 call 0x6ed8 ; 0x6ed8 395 | 711a: 61 e0 ldi r22, 0x01 ; 1 396 | 711c: 8d e0 ldi r24, 0x0D ; 13 397 | 711e: 0e 94 fb 36 call 0x6df6 ; 0x6df6 398 | 7122: 68 ec ldi r22, 0xC8 ; 200 399 | 7124: 70 e0 ldi r23, 0x00 ; 0 400 | 7126: 80 e0 ldi r24, 0x00 ; 0 401 | 7128: 90 e0 ldi r25, 0x00 ; 0 402 | 712a: 0e 94 6c 37 call 0x6ed8 ; 0x6ed8 403 | 712e: 60 e9 ldi r22, 0x90 ; 144 404 | 7130: 71 e0 ldi r23, 0x01 ; 1 405 | 7132: 80 e0 ldi r24, 0x00 ; 0 406 | 7134: 90 e0 ldi r25, 0x00 ; 0 407 | 7136: 0e 94 6c 37 call 0x6ed8 ; 0x6ed8 408 | 713a: c0 e0 ldi r28, 0x00 ; 0 409 | 713c: d0 e0 ldi r29, 0x00 ; 0 410 | 713e: 01 e0 ldi r16, 0x01 ; 1 411 | 7140: 80 91 14 01 lds r24, 0x0114 ; 0x800114 412 | 7144: 81 11 cpse r24, r1 413 | 7146: d6 c0 rjmp .+428 ; 0x72f4 414 | 7148: 0e 94 47 37 call 0x6e8e ; 0x6e8e 415 | 714c: c0 90 10 01 lds r12, 0x0110 ; 0x800110 416 | 7150: d0 90 11 01 lds r13, 0x0111 ; 0x800111 417 | 7154: e0 90 12 01 lds r14, 0x0112 ; 0x800112 418 | 7158: f0 90 13 01 lds r15, 0x0113 ; 0x800113 419 | 715c: 6c 19 sub r22, r12 420 | 715e: 7d 09 sbc r23, r13 421 | 7160: 8e 09 sbc r24, r14 422 | 7162: 9f 09 sbc r25, r15 423 | 7164: c0 90 0c 01 lds r12, 0x010C ; 0x80010c 424 | 7168: d0 90 0d 01 lds r13, 0x010D ; 0x80010d 425 | 716c: e0 90 0e 01 lds r14, 0x010E ; 0x80010e 426 | 7170: f0 90 0f 01 lds r15, 0x010F ; 0x80010f 427 | 7174: c6 16 cp r12, r22 428 | 7176: d7 06 cpc r13, r23 429 | 7178: e8 06 cpc r14, r24 430 | 717a: f9 06 cpc r15, r25 431 | 717c: 08 f7 brcc .-62 ; 0x7140 432 | 717e: 0e 94 cb 37 call 0x6f96 ; 0x6f96 433 | 7182: 83 36 cpi r24, 0x63 ; 99 434 | 7184: 09 f4 brne .+2 ; 0x7188 435 | 7186: ae c0 rjmp .+348 ; 0x72e4 436 | 7188: 08 f0 brcs .+2 ; 0x718c 437 | 718a: 7c c0 rjmp .+248 ; 0x7284 438 | 718c: 81 36 cpi r24, 0x61 ; 97 439 | 718e: 09 f4 brne .+2 ; 0x7192 440 | 7190: 94 c0 rjmp .+296 ; 0x72ba 441 | 7192: 08 f0 brcs .+2 ; 0x7196 442 | 7194: a2 c0 rjmp .+324 ; 0x72da 443 | 7196: 84 35 cpi r24, 0x54 ; 84 444 | 7198: 99 f6 brne .-90 ; 0x7140 445 | 719a: 0e 94 cb 37 call 0x6f96 ; 0x6f96 446 | 719e: f8 2e mov r15, r24 447 | 71a0: 0e 94 cb 37 call 0x6f96 ; 0x6f96 448 | 71a4: 18 2f mov r17, r24 449 | 71a6: 80 91 0b 01 lds r24, 0x010B ; 0x80010b 450 | 71aa: 80 32 cpi r24, 0x20 ; 32 451 | 71ac: c9 f0 breq .+50 ; 0x71e0 452 | 71ae: 8a b1 in r24, 0x0a ; 10 453 | 71b0: 83 70 andi r24, 0x03 ; 3 454 | 71b2: 8a b9 out 0x0a, r24 ; 10 455 | 71b4: 84 b1 in r24, 0x04 ; 4 456 | 71b6: 8c 7f andi r24, 0xFC ; 252 457 | 71b8: 84 b9 out 0x04, r24 ; 4 458 | 71ba: 88 e0 ldi r24, 0x08 ; 8 459 | 71bc: 0e 94 f2 36 call 0x6de4 ; 0x6de4 460 | 71c0: 2c 98 cbi 0x05, 4 ; 5 461 | 71c2: 84 e0 ldi r24, 0x04 ; 4 462 | 71c4: 0e 94 f2 36 call 0x6de4 ; 0x6de4 463 | 71c8: a0 e2 ldi r26, 0x20 ; 32 464 | 71ca: ea 2e mov r14, r26 465 | 71cc: 2a 98 cbi 0x05, 2 ; 5 466 | 71ce: 84 e0 ldi r24, 0x04 ; 4 467 | 71d0: 0e 94 f2 36 call 0x6de4 ; 0x6de4 468 | 71d4: 29 99 sbic 0x05, 1 ; 5 469 | 71d6: 69 c0 rjmp .+210 ; 0x72aa 470 | 71d8: 2a 9a sbi 0x05, 2 ; 5 471 | 71da: 84 e0 ldi r24, 0x04 ; 4 472 | 71dc: 0e 94 f2 36 call 0x6de4 ; 0x6de4 473 | 71e0: 84 e0 ldi r24, 0x04 ; 4 474 | 71e2: 0e 94 f2 36 call 0x6de4 ; 0x6de4 475 | 71e6: 8a b1 in r24, 0x0a ; 10 476 | 71e8: 8c 6f ori r24, 0xFC ; 252 477 | 71ea: 8a b9 out 0x0a, r24 ; 10 478 | 71ec: 84 b1 in r24, 0x04 ; 4 479 | 71ee: 83 60 ori r24, 0x03 ; 3 480 | 71f0: 84 b9 out 0x04, r24 ; 4 481 | 71f2: 88 e0 ldi r24, 0x08 ; 8 482 | 71f4: 0e 94 f2 36 call 0x6de4 ; 0x6de4 483 | 71f8: 2c 98 cbi 0x05, 4 ; 5 484 | 71fa: 2f 2d mov r18, r15 485 | 71fc: 30 e0 ldi r19, 0x00 ; 0 486 | 71fe: 9b b1 in r25, 0x0b ; 11 487 | 7200: a9 01 movw r20, r18 488 | 7202: 44 0f add r20, r20 489 | 7204: 55 1f adc r21, r21 490 | 7206: 44 0f add r20, r20 491 | 7208: 55 1f adc r21, r21 492 | 720a: 93 70 andi r25, 0x03 ; 3 493 | 720c: 94 2b or r25, r20 494 | 720e: 9b b9 out 0x0b, r25 ; 11 495 | 7210: 85 b1 in r24, 0x05 ; 5 496 | 7212: 76 e0 ldi r23, 0x06 ; 6 497 | 7214: 35 95 asr r19 498 | 7216: 27 95 ror r18 499 | 7218: 7a 95 dec r23 500 | 721a: e1 f7 brne .-8 ; 0x7214 501 | 721c: 8c 7f andi r24, 0xFC ; 252 502 | 721e: 82 2b or r24, r18 503 | 7220: 85 b9 out 0x05, r24 ; 5 504 | 7222: 84 e0 ldi r24, 0x04 ; 4 505 | 7224: 0e 94 f2 36 call 0x6de4 ; 0x6de4 506 | 7228: 2b 98 cbi 0x05, 3 ; 5 507 | 722a: 84 e0 ldi r24, 0x04 ; 4 508 | 722c: 0e 94 f2 36 call 0x6de4 ; 0x6de4 509 | 7230: 2b 9a sbi 0x05, 3 ; 5 510 | 7232: 82 e0 ldi r24, 0x02 ; 2 511 | 7234: 0e 94 f2 36 call 0x6de4 ; 0x6de4 512 | 7238: 2c 9a sbi 0x05, 4 ; 5 513 | 723a: 82 e0 ldi r24, 0x02 ; 2 514 | 723c: 0e 94 f2 36 call 0x6de4 ; 0x6de4 515 | 7240: 81 2f mov r24, r17 516 | 7242: 90 e0 ldi r25, 0x00 ; 0 517 | 7244: 2b b1 in r18, 0x0b ; 11 518 | 7246: ac 01 movw r20, r24 519 | 7248: 44 0f add r20, r20 520 | 724a: 55 1f adc r21, r21 521 | 724c: 44 0f add r20, r20 522 | 724e: 55 1f adc r21, r21 523 | 7250: 23 70 andi r18, 0x03 ; 3 524 | 7252: 24 2b or r18, r20 525 | 7254: 2b b9 out 0x0b, r18 ; 11 526 | 7256: 25 b1 in r18, 0x05 ; 5 527 | 7258: f6 e0 ldi r31, 0x06 ; 6 528 | 725a: 95 95 asr r25 529 | 725c: 87 95 ror r24 530 | 725e: fa 95 dec r31 531 | 7260: e1 f7 brne .-8 ; 0x725a 532 | 7262: 2c 7f andi r18, 0xFC ; 252 533 | 7264: 82 2b or r24, r18 534 | 7266: 85 b9 out 0x05, r24 ; 5 535 | 7268: 84 e0 ldi r24, 0x04 ; 4 536 | 726a: 0e 94 f2 36 call 0x6de4 ; 0x6de4 537 | 726e: 2b 98 cbi 0x05, 3 ; 5 538 | 7270: 84 e0 ldi r24, 0x04 ; 4 539 | 7272: 0e 94 f2 36 call 0x6de4 ; 0x6de4 540 | 7276: 2b 9a sbi 0x05, 3 ; 5 541 | 7278: 82 e0 ldi r24, 0x02 ; 2 542 | 727a: 0e 94 f2 36 call 0x6de4 ; 0x6de4 543 | 727e: f0 92 0b 01 sts 0x010B, r15 ; 0x80010b 544 | 7282: 5e cf rjmp .-324 ; 0x7140 545 | 7284: 86 36 cpi r24, 0x66 ; 102 546 | 7286: 99 f1 breq .+102 ; 0x72ee 547 | 7288: 08 f4 brcc .+2 ; 0x728c 548 | 728a: 5a cf rjmp .-332 ; 0x7140 549 | 728c: 90 e9 ldi r25, 0x90 ; 144 550 | 728e: 98 0f add r25, r24 551 | 7290: 90 31 cpi r25, 0x10 ; 16 552 | 7292: 08 f0 brcs .+2 ; 0x7296 553 | 7294: 55 cf rjmp .-342 ; 0x7140 554 | 7296: 8f 70 andi r24, 0x0F ; 15 555 | 7298: 68 2f mov r22, r24 556 | 729a: 70 e0 ldi r23, 0x00 ; 0 557 | 729c: 6f 5f subi r22, 0xFF ; 255 558 | 729e: 7f 4f sbci r23, 0xFF ; 255 559 | 72a0: 07 2e mov r0, r23 560 | 72a2: 00 0c add r0, r0 561 | 72a4: 88 0b sbc r24, r24 562 | 72a6: 99 0b sbc r25, r25 563 | 72a8: 15 c0 rjmp .+42 ; 0x72d4 564 | 72aa: 2a 9a sbi 0x05, 2 ; 5 565 | 72ac: 88 e0 ldi r24, 0x08 ; 8 566 | 72ae: 0e 94 f2 36 call 0x6de4 ; 0x6de4 567 | 72b2: ea 94 dec r14 568 | 72b4: e1 10 cpse r14, r1 569 | 72b6: 8a cf rjmp .-236 ; 0x71cc 570 | 72b8: 93 cf rjmp .-218 ; 0x71e0 571 | 72ba: 0e 94 cb 37 call 0x6f96 ; 0x6f96 572 | 72be: 18 2f mov r17, r24 573 | 72c0: 0e 94 cb 37 call 0x6f96 ; 0x6f96 574 | 72c4: 68 2f mov r22, r24 575 | 72c6: 70 e0 ldi r23, 0x00 ; 0 576 | 72c8: 76 2f mov r23, r22 577 | 72ca: 66 27 eor r22, r22 578 | 72cc: 61 0f add r22, r17 579 | 72ce: 71 1d adc r23, r1 580 | 72d0: 90 e0 ldi r25, 0x00 ; 0 581 | 72d2: 80 e0 ldi r24, 0x00 ; 0 582 | 72d4: 0e 94 9e 37 call 0x6f3c ; 0x6f3c 583 | 72d8: 33 cf rjmp .-410 ; 0x7140 584 | 72da: 6f ed ldi r22, 0xDF ; 223 585 | 72dc: 72 e0 ldi r23, 0x02 ; 2 586 | 72de: 80 e0 ldi r24, 0x00 ; 0 587 | 72e0: 90 e0 ldi r25, 0x00 ; 0 588 | 72e2: f8 cf rjmp .-16 ; 0x72d4 589 | 72e4: 62 e7 ldi r22, 0x72 ; 114 590 | 72e6: 73 e0 ldi r23, 0x03 ; 3 591 | 72e8: 80 e0 ldi r24, 0x00 ; 0 592 | 72ea: 90 e0 ldi r25, 0x00 ; 0 593 | 72ec: f3 cf rjmp .-26 ; 0x72d4 594 | 72ee: 00 93 14 01 sts 0x0114, r16 ; 0x800114 595 | 72f2: 26 cf rjmp .-436 ; 0x7140 596 | ... 597 | 72fc: 20 97 sbiw r28, 0x00 ; 0 598 | 72fe: 09 f4 brne .+2 ; 0x7302 599 | 7300: 1f cf rjmp .-450 ; 0x7140 600 | 7302: 0e 94 00 00 call 0 ; 0x0 601 | 7306: 1c cf rjmp .-456 ; 0x7140 602 | 7308: 0e 94 98 39 call 0x7330 ; 0x7330 603 | 730c: 0c 94 79 3a jmp 0x74f2 ; 0x74f2 604 | 7310: 0e 94 72 3a call 0x74e4 ; 0x74e4 605 | 7314: 58 f0 brcs .+22 ; 0x732c 606 | 7316: 0e 94 6b 3a call 0x74d6 ; 0x74d6 607 | 731a: 40 f0 brcs .+16 ; 0x732c 608 | 731c: 29 f4 brne .+10 ; 0x7328 609 | 731e: 5f 3f cpi r21, 0xFF ; 255 610 | 7320: 29 f0 breq .+10 ; 0x732c 611 | 7322: 0c 94 62 3a jmp 0x74c4 ; 0x74c4 612 | 7326: 51 11 cpse r21, r1 613 | 7328: 0c 94 ad 3a jmp 0x755a ; 0x755a 614 | 732c: 0c 94 68 3a jmp 0x74d0 ; 0x74d0 615 | 7330: 0e 94 8a 3a call 0x7514 ; 0x7514 616 | 7334: 68 f3 brcs .-38 ; 0x7310 617 | 7336: 99 23 and r25, r25 618 | 7338: b1 f3 breq .-20 ; 0x7326 619 | 733a: 55 23 and r21, r21 620 | 733c: 91 f3 breq .-28 ; 0x7322 621 | 733e: 95 1b sub r25, r21 622 | 7340: 55 0b sbc r21, r21 623 | 7342: bb 27 eor r27, r27 624 | 7344: aa 27 eor r26, r26 625 | 7346: 62 17 cp r22, r18 626 | 7348: 73 07 cpc r23, r19 627 | 734a: 84 07 cpc r24, r20 628 | 734c: 38 f0 brcs .+14 ; 0x735c 629 | 734e: 9f 5f subi r25, 0xFF ; 255 630 | 7350: 5f 4f sbci r21, 0xFF ; 255 631 | 7352: 22 0f add r18, r18 632 | 7354: 33 1f adc r19, r19 633 | 7356: 44 1f adc r20, r20 634 | 7358: aa 1f adc r26, r26 635 | 735a: a9 f3 breq .-22 ; 0x7346 636 | 735c: 35 d0 rcall .+106 ; 0x73c8 637 | 735e: 0e 2e mov r0, r30 638 | 7360: 3a f0 brmi .+14 ; 0x7370 639 | 7362: e0 e8 ldi r30, 0x80 ; 128 640 | 7364: 32 d0 rcall .+100 ; 0x73ca 641 | 7366: 91 50 subi r25, 0x01 ; 1 642 | 7368: 50 40 sbci r21, 0x00 ; 0 643 | 736a: e6 95 lsr r30 644 | 736c: 00 1c adc r0, r0 645 | 736e: ca f7 brpl .-14 ; 0x7362 646 | 7370: 2b d0 rcall .+86 ; 0x73c8 647 | 7372: fe 2f mov r31, r30 648 | 7374: 29 d0 rcall .+82 ; 0x73c8 649 | 7376: 66 0f add r22, r22 650 | 7378: 77 1f adc r23, r23 651 | 737a: 88 1f adc r24, r24 652 | 737c: bb 1f adc r27, r27 653 | 737e: 26 17 cp r18, r22 654 | 7380: 37 07 cpc r19, r23 655 | 7382: 48 07 cpc r20, r24 656 | 7384: ab 07 cpc r26, r27 657 | 7386: b0 e8 ldi r27, 0x80 ; 128 658 | 7388: 09 f0 breq .+2 ; 0x738c 659 | 738a: bb 0b sbc r27, r27 660 | 738c: 80 2d mov r24, r0 661 | 738e: bf 01 movw r22, r30 662 | 7390: ff 27 eor r31, r31 663 | 7392: 93 58 subi r25, 0x83 ; 131 664 | 7394: 5f 4f sbci r21, 0xFF ; 255 665 | 7396: 3a f0 brmi .+14 ; 0x73a6 666 | 7398: 9e 3f cpi r25, 0xFE ; 254 667 | 739a: 51 05 cpc r21, r1 668 | 739c: 78 f0 brcs .+30 ; 0x73bc 669 | 739e: 0c 94 62 3a jmp 0x74c4 ; 0x74c4 670 | 73a2: 0c 94 ad 3a jmp 0x755a ; 0x755a 671 | 73a6: 5f 3f cpi r21, 0xFF ; 255 672 | 73a8: e4 f3 brlt .-8 ; 0x73a2 673 | 73aa: 98 3e cpi r25, 0xE8 ; 232 674 | 73ac: d4 f3 brlt .-12 ; 0x73a2 675 | 73ae: 86 95 lsr r24 676 | 73b0: 77 95 ror r23 677 | 73b2: 67 95 ror r22 678 | 73b4: b7 95 ror r27 679 | 73b6: f7 95 ror r31 680 | 73b8: 9f 5f subi r25, 0xFF ; 255 681 | 73ba: c9 f7 brne .-14 ; 0x73ae 682 | 73bc: 88 0f add r24, r24 683 | 73be: 91 1d adc r25, r1 684 | 73c0: 96 95 lsr r25 685 | 73c2: 87 95 ror r24 686 | 73c4: 97 f9 bld r25, 7 687 | 73c6: 08 95 ret 688 | 73c8: e1 e0 ldi r30, 0x01 ; 1 689 | 73ca: 66 0f add r22, r22 690 | 73cc: 77 1f adc r23, r23 691 | 73ce: 88 1f adc r24, r24 692 | 73d0: bb 1f adc r27, r27 693 | 73d2: 62 17 cp r22, r18 694 | 73d4: 73 07 cpc r23, r19 695 | 73d6: 84 07 cpc r24, r20 696 | 73d8: ba 07 cpc r27, r26 697 | 73da: 20 f0 brcs .+8 ; 0x73e4 698 | 73dc: 62 1b sub r22, r18 699 | 73de: 73 0b sbc r23, r19 700 | 73e0: 84 0b sbc r24, r20 701 | 73e2: ba 0b sbc r27, r26 702 | 73e4: ee 1f adc r30, r30 703 | 73e6: 88 f7 brcc .-30 ; 0x73ca 704 | 73e8: e0 95 com r30 705 | 73ea: 08 95 ret 706 | 73ec: 0e 94 92 3a call 0x7524 ; 0x7524 707 | 73f0: 88 f0 brcs .+34 ; 0x7414 708 | 73f2: 9f 57 subi r25, 0x7F ; 127 709 | 73f4: 98 f0 brcs .+38 ; 0x741c 710 | 73f6: b9 2f mov r27, r25 711 | 73f8: 99 27 eor r25, r25 712 | 73fa: b7 51 subi r27, 0x17 ; 23 713 | 73fc: b0 f0 brcs .+44 ; 0x742a 714 | 73fe: e1 f0 breq .+56 ; 0x7438 715 | 7400: 66 0f add r22, r22 716 | 7402: 77 1f adc r23, r23 717 | 7404: 88 1f adc r24, r24 718 | 7406: 99 1f adc r25, r25 719 | 7408: 1a f0 brmi .+6 ; 0x7410 720 | 740a: ba 95 dec r27 721 | 740c: c9 f7 brne .-14 ; 0x7400 722 | 740e: 14 c0 rjmp .+40 ; 0x7438 723 | 7410: b1 30 cpi r27, 0x01 ; 1 724 | 7412: 91 f0 breq .+36 ; 0x7438 725 | 7414: 0e 94 ac 3a call 0x7558 ; 0x7558 726 | 7418: b1 e0 ldi r27, 0x01 ; 1 727 | 741a: 08 95 ret 728 | 741c: 0c 94 ac 3a jmp 0x7558 ; 0x7558 729 | 7420: 67 2f mov r22, r23 730 | 7422: 78 2f mov r23, r24 731 | 7424: 88 27 eor r24, r24 732 | 7426: b8 5f subi r27, 0xF8 ; 248 733 | 7428: 39 f0 breq .+14 ; 0x7438 734 | 742a: b9 3f cpi r27, 0xF9 ; 249 735 | 742c: cc f3 brlt .-14 ; 0x7420 736 | 742e: 86 95 lsr r24 737 | 7430: 77 95 ror r23 738 | 7432: 67 95 ror r22 739 | 7434: b3 95 inc r27 740 | 7436: d9 f7 brne .-10 ; 0x742e 741 | 7438: 3e f4 brtc .+14 ; 0x7448 742 | 743a: 90 95 com r25 743 | 743c: 80 95 com r24 744 | 743e: 70 95 com r23 745 | 7440: 61 95 neg r22 746 | 7442: 7f 4f sbci r23, 0xFF ; 255 747 | 7444: 8f 4f sbci r24, 0xFF ; 255 748 | 7446: 9f 4f sbci r25, 0xFF ; 255 749 | 7448: 08 95 ret 750 | 744a: e8 94 clt 751 | 744c: 09 c0 rjmp .+18 ; 0x7460 752 | 744e: 97 fb bst r25, 7 753 | 7450: 3e f4 brtc .+14 ; 0x7460 754 | 7452: 90 95 com r25 755 | 7454: 80 95 com r24 756 | 7456: 70 95 com r23 757 | 7458: 61 95 neg r22 758 | 745a: 7f 4f sbci r23, 0xFF ; 255 759 | 745c: 8f 4f sbci r24, 0xFF ; 255 760 | 745e: 9f 4f sbci r25, 0xFF ; 255 761 | 7460: 99 23 and r25, r25 762 | 7462: a9 f0 breq .+42 ; 0x748e 763 | 7464: f9 2f mov r31, r25 764 | 7466: 96 e9 ldi r25, 0x96 ; 150 765 | 7468: bb 27 eor r27, r27 766 | 746a: 93 95 inc r25 767 | 746c: f6 95 lsr r31 768 | 746e: 87 95 ror r24 769 | 7470: 77 95 ror r23 770 | 7472: 67 95 ror r22 771 | 7474: b7 95 ror r27 772 | 7476: f1 11 cpse r31, r1 773 | 7478: f8 cf rjmp .-16 ; 0x746a 774 | 747a: fa f4 brpl .+62 ; 0x74ba 775 | 747c: bb 0f add r27, r27 776 | 747e: 11 f4 brne .+4 ; 0x7484 777 | 7480: 60 ff sbrs r22, 0 778 | 7482: 1b c0 rjmp .+54 ; 0x74ba 779 | 7484: 6f 5f subi r22, 0xFF ; 255 780 | 7486: 7f 4f sbci r23, 0xFF ; 255 781 | 7488: 8f 4f sbci r24, 0xFF ; 255 782 | 748a: 9f 4f sbci r25, 0xFF ; 255 783 | 748c: 16 c0 rjmp .+44 ; 0x74ba 784 | 748e: 88 23 and r24, r24 785 | 7490: 11 f0 breq .+4 ; 0x7496 786 | 7492: 96 e9 ldi r25, 0x96 ; 150 787 | 7494: 11 c0 rjmp .+34 ; 0x74b8 788 | 7496: 77 23 and r23, r23 789 | 7498: 21 f0 breq .+8 ; 0x74a2 790 | 749a: 9e e8 ldi r25, 0x8E ; 142 791 | 749c: 87 2f mov r24, r23 792 | 749e: 76 2f mov r23, r22 793 | 74a0: 05 c0 rjmp .+10 ; 0x74ac 794 | 74a2: 66 23 and r22, r22 795 | 74a4: 71 f0 breq .+28 ; 0x74c2 796 | 74a6: 96 e8 ldi r25, 0x86 ; 134 797 | 74a8: 86 2f mov r24, r22 798 | 74aa: 70 e0 ldi r23, 0x00 ; 0 799 | 74ac: 60 e0 ldi r22, 0x00 ; 0 800 | 74ae: 2a f0 brmi .+10 ; 0x74ba 801 | 74b0: 9a 95 dec r25 802 | 74b2: 66 0f add r22, r22 803 | 74b4: 77 1f adc r23, r23 804 | 74b6: 88 1f adc r24, r24 805 | 74b8: da f7 brpl .-10 ; 0x74b0 806 | 74ba: 88 0f add r24, r24 807 | 74bc: 96 95 lsr r25 808 | 74be: 87 95 ror r24 809 | 74c0: 97 f9 bld r25, 7 810 | 74c2: 08 95 ret 811 | 74c4: 97 f9 bld r25, 7 812 | 74c6: 9f 67 ori r25, 0x7F ; 127 813 | 74c8: 80 e8 ldi r24, 0x80 ; 128 814 | 74ca: 70 e0 ldi r23, 0x00 ; 0 815 | 74cc: 60 e0 ldi r22, 0x00 ; 0 816 | 74ce: 08 95 ret 817 | 74d0: 9f ef ldi r25, 0xFF ; 255 818 | 74d2: 80 ec ldi r24, 0xC0 ; 192 819 | 74d4: 08 95 ret 820 | 74d6: 00 24 eor r0, r0 821 | 74d8: 0a 94 dec r0 822 | 74da: 16 16 cp r1, r22 823 | 74dc: 17 06 cpc r1, r23 824 | 74de: 18 06 cpc r1, r24 825 | 74e0: 09 06 cpc r0, r25 826 | 74e2: 08 95 ret 827 | 74e4: 00 24 eor r0, r0 828 | 74e6: 0a 94 dec r0 829 | 74e8: 12 16 cp r1, r18 830 | 74ea: 13 06 cpc r1, r19 831 | 74ec: 14 06 cpc r1, r20 832 | 74ee: 05 06 cpc r0, r21 833 | 74f0: 08 95 ret 834 | 74f2: 09 2e mov r0, r25 835 | 74f4: 03 94 inc r0 836 | 74f6: 00 0c add r0, r0 837 | 74f8: 11 f4 brne .+4 ; 0x74fe 838 | 74fa: 88 23 and r24, r24 839 | 74fc: 52 f0 brmi .+20 ; 0x7512 840 | 74fe: bb 0f add r27, r27 841 | 7500: 40 f4 brcc .+16 ; 0x7512 842 | 7502: bf 2b or r27, r31 843 | 7504: 11 f4 brne .+4 ; 0x750a 844 | 7506: 60 ff sbrs r22, 0 845 | 7508: 04 c0 rjmp .+8 ; 0x7512 846 | 750a: 6f 5f subi r22, 0xFF ; 255 847 | 750c: 7f 4f sbci r23, 0xFF ; 255 848 | 750e: 8f 4f sbci r24, 0xFF ; 255 849 | 7510: 9f 4f sbci r25, 0xFF ; 255 850 | 7512: 08 95 ret 851 | 7514: 57 fd sbrc r21, 7 852 | 7516: 90 58 subi r25, 0x80 ; 128 853 | 7518: 44 0f add r20, r20 854 | 751a: 55 1f adc r21, r21 855 | 751c: 59 f0 breq .+22 ; 0x7534 856 | 751e: 5f 3f cpi r21, 0xFF ; 255 857 | 7520: 71 f0 breq .+28 ; 0x753e 858 | 7522: 47 95 ror r20 859 | 7524: 88 0f add r24, r24 860 | 7526: 97 fb bst r25, 7 861 | 7528: 99 1f adc r25, r25 862 | 752a: 61 f0 breq .+24 ; 0x7544 863 | 752c: 9f 3f cpi r25, 0xFF ; 255 864 | 752e: 79 f0 breq .+30 ; 0x754e 865 | 7530: 87 95 ror r24 866 | 7532: 08 95 ret 867 | 7534: 12 16 cp r1, r18 868 | 7536: 13 06 cpc r1, r19 869 | 7538: 14 06 cpc r1, r20 870 | 753a: 55 1f adc r21, r21 871 | 753c: f2 cf rjmp .-28 ; 0x7522 872 | 753e: 46 95 lsr r20 873 | 7540: f1 df rcall .-30 ; 0x7524 874 | 7542: 08 c0 rjmp .+16 ; 0x7554 875 | 7544: 16 16 cp r1, r22 876 | 7546: 17 06 cpc r1, r23 877 | 7548: 18 06 cpc r1, r24 878 | 754a: 99 1f adc r25, r25 879 | 754c: f1 cf rjmp .-30 ; 0x7530 880 | 754e: 86 95 lsr r24 881 | 7550: 71 05 cpc r23, r1 882 | 7552: 61 05 cpc r22, r1 883 | 7554: 08 94 sec 884 | 7556: 08 95 ret 885 | 7558: e8 94 clt 886 | 755a: bb 27 eor r27, r27 887 | 755c: 66 27 eor r22, r22 888 | 755e: 77 27 eor r23, r23 889 | 7560: cb 01 movw r24, r22 890 | 7562: 97 f9 bld r25, 7 891 | 7564: 08 95 ret 892 | 7566: 0e 94 c6 3a call 0x758c ; 0x758c 893 | 756a: 0c 94 79 3a jmp 0x74f2 ; 0x74f2 894 | 756e: 0e 94 6b 3a call 0x74d6 ; 0x74d6 895 | 7572: 38 f0 brcs .+14 ; 0x7582 896 | 7574: 0e 94 72 3a call 0x74e4 ; 0x74e4 897 | 7578: 20 f0 brcs .+8 ; 0x7582 898 | 757a: 95 23 and r25, r21 899 | 757c: 11 f0 breq .+4 ; 0x7582 900 | 757e: 0c 94 62 3a jmp 0x74c4 ; 0x74c4 901 | 7582: 0c 94 68 3a jmp 0x74d0 ; 0x74d0 902 | 7586: 11 24 eor r1, r1 903 | 7588: 0c 94 ad 3a jmp 0x755a ; 0x755a 904 | 758c: 0e 94 8a 3a call 0x7514 ; 0x7514 905 | 7590: 70 f3 brcs .-36 ; 0x756e 906 | 7592: 95 9f mul r25, r21 907 | 7594: c1 f3 breq .-16 ; 0x7586 908 | 7596: 95 0f add r25, r21 909 | 7598: 50 e0 ldi r21, 0x00 ; 0 910 | 759a: 55 1f adc r21, r21 911 | 759c: 62 9f mul r22, r18 912 | 759e: f0 01 movw r30, r0 913 | 75a0: 72 9f mul r23, r18 914 | 75a2: bb 27 eor r27, r27 915 | 75a4: f0 0d add r31, r0 916 | 75a6: b1 1d adc r27, r1 917 | 75a8: 63 9f mul r22, r19 918 | 75aa: aa 27 eor r26, r26 919 | 75ac: f0 0d add r31, r0 920 | 75ae: b1 1d adc r27, r1 921 | 75b0: aa 1f adc r26, r26 922 | 75b2: 64 9f mul r22, r20 923 | 75b4: 66 27 eor r22, r22 924 | 75b6: b0 0d add r27, r0 925 | 75b8: a1 1d adc r26, r1 926 | 75ba: 66 1f adc r22, r22 927 | 75bc: 82 9f mul r24, r18 928 | 75be: 22 27 eor r18, r18 929 | 75c0: b0 0d add r27, r0 930 | 75c2: a1 1d adc r26, r1 931 | 75c4: 62 1f adc r22, r18 932 | 75c6: 73 9f mul r23, r19 933 | 75c8: b0 0d add r27, r0 934 | 75ca: a1 1d adc r26, r1 935 | 75cc: 62 1f adc r22, r18 936 | 75ce: 83 9f mul r24, r19 937 | 75d0: a0 0d add r26, r0 938 | 75d2: 61 1d adc r22, r1 939 | 75d4: 22 1f adc r18, r18 940 | 75d6: 74 9f mul r23, r20 941 | 75d8: 33 27 eor r19, r19 942 | 75da: a0 0d add r26, r0 943 | 75dc: 61 1d adc r22, r1 944 | 75de: 23 1f adc r18, r19 945 | 75e0: 84 9f mul r24, r20 946 | 75e2: 60 0d add r22, r0 947 | 75e4: 21 1d adc r18, r1 948 | 75e6: 82 2f mov r24, r18 949 | 75e8: 76 2f mov r23, r22 950 | 75ea: 6a 2f mov r22, r26 951 | 75ec: 11 24 eor r1, r1 952 | 75ee: 9f 57 subi r25, 0x7F ; 127 953 | 75f0: 50 40 sbci r21, 0x00 ; 0 954 | 75f2: 9a f0 brmi .+38 ; 0x761a 955 | 75f4: f1 f0 breq .+60 ; 0x7632 956 | 75f6: 88 23 and r24, r24 957 | 75f8: 4a f0 brmi .+18 ; 0x760c 958 | 75fa: ee 0f add r30, r30 959 | 75fc: ff 1f adc r31, r31 960 | 75fe: bb 1f adc r27, r27 961 | 7600: 66 1f adc r22, r22 962 | 7602: 77 1f adc r23, r23 963 | 7604: 88 1f adc r24, r24 964 | 7606: 91 50 subi r25, 0x01 ; 1 965 | 7608: 50 40 sbci r21, 0x00 ; 0 966 | 760a: a9 f7 brne .-22 ; 0x75f6 967 | 760c: 9e 3f cpi r25, 0xFE ; 254 968 | 760e: 51 05 cpc r21, r1 969 | 7610: 80 f0 brcs .+32 ; 0x7632 970 | 7612: 0c 94 62 3a jmp 0x74c4 ; 0x74c4 971 | 7616: 0c 94 ad 3a jmp 0x755a ; 0x755a 972 | 761a: 5f 3f cpi r21, 0xFF ; 255 973 | 761c: e4 f3 brlt .-8 ; 0x7616 974 | 761e: 98 3e cpi r25, 0xE8 ; 232 975 | 7620: d4 f3 brlt .-12 ; 0x7616 976 | 7622: 86 95 lsr r24 977 | 7624: 77 95 ror r23 978 | 7626: 67 95 ror r22 979 | 7628: b7 95 ror r27 980 | 762a: f7 95 ror r31 981 | 762c: e7 95 ror r30 982 | 762e: 9f 5f subi r25, 0xFF ; 255 983 | 7630: c1 f7 brne .-16 ; 0x7622 984 | 7632: fe 2b or r31, r30 985 | 7634: 88 0f add r24, r24 986 | 7636: 91 1d adc r25, r1 987 | 7638: 96 95 lsr r25 988 | 763a: 87 95 ror r24 989 | 763c: 97 f9 bld r25, 7 990 | 763e: 08 95 ret 991 | 7640: f8 94 cli 992 | 7642: ff cf rjmp .-2 ; 0x7642 993 | 7644: b0 00 .word 0x00b0 ; ???? 994 | -------------------------------------------------------------------------------- /bin/vgmduino.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/bin/vgmduino.bin -------------------------------------------------------------------------------- /mame/README.md: -------------------------------------------------------------------------------- 1 | # arduino-vgmplayer MAME emulation test 2 | 3 | ## Work in progress... 4 | 5 | [![mame-arduino-ym2151](https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/master/assets/mame-emurate-work-in-progress01.png 6 | )](https://youtu.be/7sPtBW2uDG8) 7 | 8 | @see [MAME ドライバーつくりかたメモ](https://maple4estry.netlify.com/mame-arduino/) 9 | -------------------------------------------------------------------------------- /mame/copy-from.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | # from mame 1daa2a1f24b2854f33924d9610c0775e61618be9 4 | MAME_HOME=~/clang/mame 5 | 6 | cp -p ${MAME_HOME}/roms/kanon.zip ./roms 7 | cp -p ${MAME_HOME}/scripts/target/mame/arcade.lua ./scripts/target/mame 8 | cp -rp ${MAME_HOME}/src/devices/cpu/avr8 ./src/devices/cpu 9 | cp -p ${MAME_HOME}/src/mame/arcade.flt ./src/mame 10 | cp -p ${MAME_HOME}/src/mame/mame.lst ./src/mame 11 | cp -p ${MAME_HOME}/src/mame/drivers/vgmduino.cpp ./src/mame/drivers 12 | 13 | exit 0 14 | -------------------------------------------------------------------------------- /mame/copy-to.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | # from mame 1daa2a1f24b2854f33924d9610c0775e61618be9 4 | MAME_HOME=~/clang/mame 5 | 6 | cp -p ./roms/kanon.zip ${MAME_HOME}/roms/ 7 | cp -p ./scripts/target/mame/arcade.lua ${MAME_HOME}/scripts/target/mame/ 8 | cp -rp ./src/devices/cpu/avr8/* ${MAME_HOME}/src/devices/cpu/avr8 9 | cp -p ./src/mame/arcade.flt ${MAME_HOME}/src/mame/ 10 | cp -p ./src/mame/mame.lst ${MAME_HOME}/src/mame/ 11 | cp -p ./src/mame/drivers/vgmduino.cpp ${MAME_HOME}/src/mame/drivers/ 12 | 13 | exit 0 14 | -------------------------------------------------------------------------------- /mame/roms/kanon.zip: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/h1romas4/arduino-vgmplayer/7896ffce42261060b3d5bd468c16a93f1cbdfc43/mame/roms/kanon.zip -------------------------------------------------------------------------------- /mame/src/devices/cpu/avr8/avr8.h: -------------------------------------------------------------------------------- 1 | // license:BSD-3-Clause 2 | // copyright-holders:Ryan Holtz 3 | /* 4 | Atmel 8-bit AVR simulator 5 | 6 | - Notes - 7 | Cycle counts are generally considered to be 100% accurate per-instruction, does not support mid-instruction 8 | interrupts although no software has been encountered yet that requires it. Evidence of cycle accuracy is given 9 | in the form of the demoscene 'wild' demo, Craft, by [lft], which uses an ATmega88 to write video out a 6-bit 10 | RGB DAC pixel-by-pixel, synchronously with the frame timing. Intentionally modifying the timing of any of 11 | the existing opcodes has been shown to wildly corrupt the video output in Craft, so one can assume that the 12 | existing timing is 100% correct. 13 | 14 | Unimplemented opcodes: SPM, SPM Z+, SLEEP, BREAK, WDR, EICALL, JMP, CALL 15 | 16 | - Changelist - 17 | 23 Dec. 2012 [Sandro Ronco] 18 | - Added CPSE, LD Z+, ST -Z/-Y/-X and ICALL opcodes 19 | - Fixed Z flag in CPC, SBC and SBCI opcodes 20 | - Fixed V and C flags in SBIW opcode 21 | 22 | 30 Oct. 2012 23 | - Added FMUL, FMULS, FMULSU opcodes [Ryan Holtz] 24 | - Fixed incorrect flag calculation in ROR opcode [Ryan Holtz] 25 | - Fixed incorrect bit testing in SBIC/SBIS opcodes [Ryan Holtz] 26 | 27 | 25 Oct. 2012 28 | - Added MULS, ANDI, STI Z+, LD -Z, LD -Y, LD -X, LD Y+q, LD Z+q, SWAP, ASR, ROR and SBIS opcodes [Ryan Holtz] 29 | - Corrected cycle counts for LD and ST opcodes [Ryan Holtz] 30 | - Moved opcycles init into inner while loop, fixes 2-cycle and 3-cycle opcodes effectively forcing 31 | all subsequent 1-cycle opcodes to be 2 or 3 cycles [Ryan Holtz] 32 | - Fixed register behavior in MULSU, LD -Z, and LD -Y opcodes [Ryan Holtz] 33 | 34 | 18 Oct. 2012 35 | - Added OR, SBCI, ORI, ST Y+, ADIQ opcodes [Ryan Holtz] 36 | - Fixed COM, NEG, LSR opcodes [Ryan Holtz] 37 | 38 | */ 39 | 40 | #ifndef MAME_CPU_AVR8_AVR8_H 41 | #define MAME_CPU_AVR8_AVR8_H 42 | 43 | #pragma once 44 | 45 | 46 | //************************************************************************** 47 | // TYPE DEFINITIONS 48 | //************************************************************************** 49 | 50 | class avr8_device; 51 | 52 | // ======================> avr8_device 53 | 54 | // Used by core CPU interface 55 | class avr8_device : public cpu_device 56 | { 57 | public: 58 | // inline configuration helpers 59 | void set_eeprom_tag(const char *tag) { m_eeprom.set_tag(tag); } 60 | 61 | // fuse configs 62 | void set_low_fuses(uint8_t byte); 63 | void set_high_fuses(uint8_t byte); 64 | void set_extended_fuses(uint8_t byte); 65 | void set_lock_bits(uint8_t byte); 66 | 67 | // public interfaces 68 | virtual void update_interrupt(int source); 69 | 70 | // register handling 71 | void regs_w(offs_t offset, uint8_t data); 72 | uint8_t regs_r(offs_t offset); 73 | uint32_t m_shifted_pc; 74 | 75 | protected: 76 | avr8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, uint32_t address_mask, address_map_constructor internal_map, int32_t num_timers); 77 | 78 | typedef void (avr8_device::*op_func) (uint16_t op); 79 | 80 | op_func m_op_funcs[0x10000]; 81 | int m_op_cycles[0x10000]; 82 | int m_opcycles; 83 | std::unique_ptr m_add_flag_cache; 84 | std::unique_ptr m_adc_flag_cache; 85 | std::unique_ptr m_sub_flag_cache; 86 | std::unique_ptr m_sbc_flag_cache; 87 | std::unique_ptr m_bool_flag_cache; 88 | std::unique_ptr m_shift_flag_cache; 89 | 90 | // device-level overrides 91 | virtual void device_start() override; 92 | virtual void device_reset() override; 93 | 94 | // device_execute_interface overrides 95 | virtual uint32_t execute_min_cycles() const noexcept override; 96 | virtual uint32_t execute_max_cycles() const noexcept override; 97 | virtual uint32_t execute_input_lines() const noexcept override; 98 | virtual void execute_run() override; 99 | virtual void execute_set_input(int inputnum, int state) override; 100 | 101 | // device_memory_interface overrides 102 | virtual space_config_vector memory_space_config() const override; 103 | 104 | // device_disasm_interface overrides 105 | virtual std::unique_ptr create_disassembler() override; 106 | 107 | // device_state_interface overrides 108 | virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; 109 | 110 | // address spaces 111 | const address_space_config m_program_config; 112 | const address_space_config m_data_config; 113 | const address_space_config m_io_config; 114 | required_region_ptr m_eeprom; 115 | 116 | // bootloader 117 | uint16_t m_boot_size; 118 | 119 | // Fuses 120 | uint8_t m_lfuses; 121 | uint8_t m_hfuses; 122 | uint8_t m_efuses; 123 | uint8_t m_lock_bits; 124 | 125 | // CPU registers 126 | uint32_t m_pc; 127 | uint8_t m_r[0x200]; 128 | 129 | // internal timers 130 | int32_t m_num_timers; 131 | int32_t m_timer_top[6]; 132 | uint8_t m_timer_increment[6]; 133 | uint16_t m_timer_prescale[6]; 134 | uint16_t m_timer_prescale_count[6]; 135 | int32_t m_wgm1; 136 | int32_t m_timer1_compare_mode[2]; 137 | uint16_t m_ocr1[3]; 138 | uint16_t m_timer1_count; 139 | bool m_ocr2_not_reached_yet; 140 | 141 | // SPI 142 | bool m_spi_active; 143 | uint8_t m_spi_prescale; 144 | uint8_t m_spi_prescale_count; 145 | int8_t m_spi_prescale_countdown; 146 | void enable_spi(); 147 | void disable_spi(); 148 | void spi_update_masterslave_select(); 149 | void spi_update_clock_polarity(); 150 | void spi_update_clock_phase(); 151 | void spi_update_clock_rate(); 152 | void change_spcr(uint8_t data); 153 | void change_spsr(uint8_t data); 154 | 155 | // internal CPU state 156 | uint32_t m_addr_mask; 157 | bool m_interrupt_pending; 158 | 159 | // other internal states 160 | int m_icount; 161 | 162 | // memory access 163 | inline void push(uint8_t val); 164 | inline uint8_t pop(); 165 | inline bool is_long_opcode(uint16_t op); 166 | 167 | // utility 168 | void unimplemented_opcode(uint32_t op); 169 | 170 | // interrupts 171 | void set_irq_line(uint16_t vector, int state); 172 | 173 | // timers 174 | void timer_tick(); 175 | void update_timer_clock_source(uint8_t timer, uint8_t selection); 176 | void update_timer_waveform_gen_mode(uint8_t timer, uint8_t mode); 177 | 178 | // timer 0 179 | void timer0_tick(); 180 | void changed_tccr0a(uint8_t data); 181 | void changed_tccr0b(uint8_t data); 182 | void update_ocr0(uint8_t newval, uint8_t reg); 183 | void timer0_force_output_compare(int reg); 184 | 185 | // timer 1 186 | inline void timer1_tick(); 187 | void changed_tccr1a(uint8_t data); 188 | void changed_tccr1b(uint8_t data); 189 | void update_timer1_input_noise_canceler(); 190 | void update_timer1_input_edge_select(); 191 | void update_ocr1(uint16_t newval, uint8_t reg); 192 | 193 | // timer 2 194 | void timer2_tick(); 195 | void changed_tccr2a(uint8_t data); 196 | void changed_tccr2b(uint8_t data); 197 | void update_ocr2(uint8_t newval, uint8_t reg); 198 | void timer2_force_output_compare(int reg); 199 | 200 | // timer 3 201 | void timer3_tick(); 202 | void changed_tccr3a(uint8_t data); 203 | void changed_tccr3b(uint8_t data); 204 | void changed_tccr3c(uint8_t data); 205 | // void update_ocr3(uint8_t newval, uint8_t reg); 206 | // void timer3_force_output_compare(int reg); 207 | 208 | // timer 4 209 | void timer4_tick(); 210 | void changed_tccr4a(uint8_t data); 211 | void changed_tccr4b(uint8_t data); 212 | void changed_tccr4c(uint8_t data); 213 | //void update_ocr4(uint8_t newval, uint8_t reg); 214 | //void timer4_force_output_compare(int reg); 215 | 216 | // timer 5 217 | void timer5_tick(); 218 | void changed_tccr5a(uint8_t data); 219 | void changed_tccr5b(uint8_t data); 220 | // void update_ocr5(uint8_t newval, uint8_t reg); 221 | // void timer5_force_output_compare(int reg); 222 | 223 | // ops 224 | void populate_ops(); 225 | void populate_add_flag_cache(); 226 | void populate_adc_flag_cache(); 227 | void populate_sub_flag_cache(); 228 | void populate_sbc_flag_cache(); 229 | void populate_bool_flag_cache(); 230 | void populate_shift_flag_cache(); 231 | void op_nop(uint16_t op); 232 | void op_movw(uint16_t op); 233 | void op_muls(uint16_t op); 234 | void op_mulsu(uint16_t op); 235 | void op_fmul(uint16_t op); 236 | void op_fmuls(uint16_t op); 237 | void op_fmulsu(uint16_t op); 238 | void op_cpc(uint16_t op); 239 | void op_sbc(uint16_t op); 240 | void op_add(uint16_t op); 241 | void op_cpse(uint16_t op); 242 | void op_cp(uint16_t op); 243 | void op_sub(uint16_t op); 244 | void op_adc(uint16_t op); 245 | void op_and(uint16_t op); 246 | void op_eor(uint16_t op); 247 | void op_or(uint16_t op); 248 | void op_mov(uint16_t op); 249 | void op_cpi(uint16_t op); 250 | void op_sbci(uint16_t op); 251 | void op_subi(uint16_t op); 252 | void op_ori(uint16_t op); 253 | void op_andi(uint16_t op); 254 | void op_lddz(uint16_t op); 255 | void op_lddy(uint16_t op); 256 | void op_stdz(uint16_t op); 257 | void op_stdy(uint16_t op); 258 | void op_lds(uint16_t op); 259 | void op_ldzi(uint16_t op); 260 | void op_ldzd(uint16_t op); 261 | void op_lpmz(uint16_t op); 262 | void op_lpmzi(uint16_t op); 263 | void op_elpmz(uint16_t op); 264 | void op_elpmzi(uint16_t op); 265 | void op_ldyi(uint16_t op); 266 | void op_ldyd(uint16_t op); 267 | void op_ldx(uint16_t op); 268 | void op_ldxi(uint16_t op); 269 | void op_ldxd(uint16_t op); 270 | void op_pop(uint16_t op); 271 | void op_sts(uint16_t op); 272 | void op_stzi(uint16_t op); 273 | void op_stzd(uint16_t op); 274 | void op_styi(uint16_t op); 275 | void op_styd(uint16_t op); 276 | void op_stx(uint16_t op); 277 | void op_stxi(uint16_t op); 278 | void op_stxd(uint16_t op); 279 | void op_push(uint16_t op); 280 | void op_com(uint16_t op); 281 | void op_neg(uint16_t op); 282 | void op_swap(uint16_t op); 283 | void op_inc(uint16_t op); 284 | void op_asr(uint16_t op); 285 | void op_lsr(uint16_t op); 286 | void op_ror(uint16_t op); 287 | void op_setf(uint16_t op); 288 | void op_clrf(uint16_t op); 289 | void op_ijmp(uint16_t op); 290 | void op_eijmp(uint16_t op); 291 | void op_dec(uint16_t op); 292 | void op_jmp(uint16_t op); 293 | void op_call(uint16_t op); 294 | void op_ret(uint16_t op); 295 | void op_reti(uint16_t op); 296 | void op_sleep(uint16_t op); 297 | void op_break(uint16_t op); 298 | void op_wdr(uint16_t op); 299 | void op_lpm(uint16_t op); 300 | void op_elpm(uint16_t op); 301 | void op_spm(uint16_t op); 302 | void op_spmzi(uint16_t op); 303 | void op_icall(uint16_t op); 304 | void op_eicall(uint16_t op); 305 | void op_adiw(uint16_t op); 306 | void op_sbiw(uint16_t op); 307 | void op_cbi(uint16_t op); 308 | void op_sbic(uint16_t op); 309 | void op_sbi(uint16_t op); 310 | void op_sbis(uint16_t op); 311 | void op_mul(uint16_t op); 312 | void op_out(uint16_t op); 313 | void op_in(uint16_t op); 314 | void op_rjmp(uint16_t op); 315 | void op_rcall(uint16_t op); 316 | void op_ldi(uint16_t op); 317 | void op_brset(uint16_t op); 318 | void op_brclr(uint16_t op); 319 | void op_bst(uint16_t op); 320 | void op_bld(uint16_t op); 321 | void op_sbrs(uint16_t op); 322 | void op_sbrc(uint16_t op); 323 | void op_unimpl(uint16_t op); 324 | 325 | // address spaces 326 | address_space *m_program; 327 | address_space *m_data; 328 | address_space *m_io; 329 | }; 330 | 331 | // device type definition 332 | DECLARE_DEVICE_TYPE(ATMEGA88, atmega88_device) 333 | DECLARE_DEVICE_TYPE(ATMEGA328, atmega328_device) 334 | DECLARE_DEVICE_TYPE(ATMEGA644, atmega644_device) 335 | DECLARE_DEVICE_TYPE(ATMEGA1280, atmega1280_device) 336 | DECLARE_DEVICE_TYPE(ATMEGA2560, atmega2560_device) 337 | DECLARE_DEVICE_TYPE(ATTINY15, attiny15_device) 338 | 339 | // ======================> atmega88_device 340 | 341 | class atmega88_device : public avr8_device 342 | { 343 | public: 344 | // construction/destruction 345 | atmega88_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 346 | void atmega88_internal_map(address_map &map); 347 | }; 348 | 349 | // ======================> atmega328_device 350 | 351 | class atmega328_device : public avr8_device 352 | { 353 | public: 354 | // construction/destruction 355 | atmega328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 356 | 357 | virtual void update_interrupt(int source) override; 358 | void atmega328_internal_map(address_map &map); 359 | }; 360 | 361 | // ======================> atmega644_device 362 | 363 | class atmega644_device : public avr8_device 364 | { 365 | public: 366 | // construction/destruction 367 | atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 368 | 369 | virtual void update_interrupt(int source) override; 370 | void atmega644_internal_map(address_map &map); 371 | }; 372 | 373 | // ======================> atmega1280_device 374 | 375 | class atmega1280_device : public avr8_device 376 | { 377 | public: 378 | // construction/destruction 379 | atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 380 | 381 | virtual void update_interrupt(int source) override; 382 | void atmega1280_internal_map(address_map &map); 383 | }; 384 | 385 | // ======================> atmega2560_device 386 | 387 | class atmega2560_device : public avr8_device 388 | { 389 | public: 390 | // construction/destruction 391 | atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 392 | 393 | virtual void update_interrupt(int source) override; 394 | void atmega2560_internal_map(address_map &map); 395 | }; 396 | 397 | // ======================> atmega88_device 398 | 399 | class attiny15_device : public avr8_device 400 | { 401 | public: 402 | // construction/destruction 403 | attiny15_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 404 | void attiny15_internal_map(address_map &map); 405 | }; 406 | 407 | /*************************************************************************** 408 | REGISTER ENUMERATION 409 | ***************************************************************************/ 410 | 411 | enum 412 | { 413 | AVR8_SREG = 1, 414 | AVR8_PC, 415 | AVR8_R0, 416 | AVR8_R1, 417 | AVR8_R2, 418 | AVR8_R3, 419 | AVR8_R4, 420 | AVR8_R5, 421 | AVR8_R6, 422 | AVR8_R7, 423 | AVR8_R8, 424 | AVR8_R9, 425 | AVR8_R10, 426 | AVR8_R11, 427 | AVR8_R12, 428 | AVR8_R13, 429 | AVR8_R14, 430 | AVR8_R15, 431 | AVR8_R16, 432 | AVR8_R17, 433 | AVR8_R18, 434 | AVR8_R19, 435 | AVR8_R20, 436 | AVR8_R21, 437 | AVR8_R22, 438 | AVR8_R23, 439 | AVR8_R24, 440 | AVR8_R25, 441 | AVR8_R26, 442 | AVR8_R27, 443 | AVR8_R28, 444 | AVR8_R29, 445 | AVR8_R30, 446 | AVR8_R31, 447 | AVR8_X, 448 | AVR8_Y, 449 | AVR8_Z, 450 | AVR8_SPH, 451 | AVR8_SPL 452 | }; 453 | 454 | enum 455 | { 456 | AVR8_INT_RESET = 0, 457 | AVR8_INT_INT0, 458 | AVR8_INT_INT1, 459 | AVR8_INT_PCINT0, 460 | AVR8_INT_PCINT1, 461 | AVR8_INT_PCINT2, 462 | AVR8_INT_WDT, 463 | AVR8_INT_T2COMPA, 464 | AVR8_INT_T2COMPB, 465 | AVR8_INT_T2OVF, 466 | AVR8_INT_T1CAPT, 467 | AVR8_INT_T1COMPA, 468 | AVR8_INT_T1COMPB, 469 | AVR8_INT_T1OVF, 470 | AVR8_INT_T0COMPA, 471 | AVR8_INT_T0COMPB, 472 | AVR8_INT_T0OVF, 473 | AVR8_INT_SPI_STC, 474 | AVR8_INT_USART_RX, 475 | AVR8_INT_USART_UDRE, 476 | AVR8_INT_USART_TX, 477 | AVR8_INT_ADC, 478 | AVR8_INT_EE_RDY, 479 | AVR8_INT_ANALOG_COMP, 480 | AVR8_INT_TWI, 481 | AVR8_INT_SPM_RDY, 482 | 483 | // ATMEGA644 484 | ATMEGA644_INT_RESET = 0, 485 | ATMEGA644_INT_INT0, 486 | ATMEGA644_INT_INT1, 487 | ATMEGA644_INT_INT2, 488 | ATMEGA644_INT_PCINT0, 489 | ATMEGA644_INT_PCINT1, 490 | ATMEGA644_INT_PCINT2, 491 | ATMEGA644_INT_PCINT3, 492 | ATMEGA644_INT_WDT, 493 | ATMEGA644_INT_T2COMPA, 494 | ATMEGA644_INT_T2COMPB, 495 | ATMEGA644_INT_T2OVF, 496 | ATMEGA644_INT_T1CAPT, 497 | ATMEGA644_INT_T1COMPA, 498 | ATMEGA644_INT_T1COMPB, 499 | ATMEGA644_INT_T1OVF, 500 | ATMEGA644_INT_T0COMPA, 501 | ATMEGA644_INT_T0COMPB, 502 | ATMEGA644_INT_T0OVF, 503 | ATMEGA644_INT_SPI_STC, 504 | ATMEGA644_INT_USART_RX, 505 | ATMEGA644_INT_USART_UDRE, 506 | ATMEGA644_INT_USART_TX, 507 | ATMEGA644_INT_ADC, 508 | ATMEGA644_INT_EE_RDY, 509 | ATMEGA644_INT_ANALOG_COMP, 510 | ATMEGA644_INT_TWI, 511 | ATMEGA644_INT_SPM_RDY 512 | }; 513 | 514 | // Used by I/O register handling 515 | enum 516 | { 517 | AVR8_REGIDX_R0 = 0x00, 518 | AVR8_REGIDX_R1, 519 | AVR8_REGIDX_R2, 520 | AVR8_REGIDX_R3, 521 | AVR8_REGIDX_R4, 522 | AVR8_REGIDX_R5, 523 | AVR8_REGIDX_R6, 524 | AVR8_REGIDX_R7, 525 | AVR8_REGIDX_R8, 526 | AVR8_REGIDX_R9, 527 | AVR8_REGIDX_R10, 528 | AVR8_REGIDX_R11, 529 | AVR8_REGIDX_R12, 530 | AVR8_REGIDX_R13, 531 | AVR8_REGIDX_R14, 532 | AVR8_REGIDX_R15, 533 | AVR8_REGIDX_R16, 534 | AVR8_REGIDX_R17, 535 | AVR8_REGIDX_R18, 536 | AVR8_REGIDX_R19, 537 | AVR8_REGIDX_R20, 538 | AVR8_REGIDX_R21, 539 | AVR8_REGIDX_R22, 540 | AVR8_REGIDX_R23, 541 | AVR8_REGIDX_R24, 542 | AVR8_REGIDX_R25, 543 | AVR8_REGIDX_R26, 544 | AVR8_REGIDX_R27, 545 | AVR8_REGIDX_R28, 546 | AVR8_REGIDX_R29, 547 | AVR8_REGIDX_R30, 548 | AVR8_REGIDX_R31, 549 | AVR8_REGIDX_PINA = 0x20, 550 | AVR8_REGIDX_DDRA, 551 | AVR8_REGIDX_PORTA, 552 | AVR8_REGIDX_PINB, 553 | AVR8_REGIDX_DDRB, 554 | AVR8_REGIDX_PORTB, 555 | AVR8_REGIDX_PINC, 556 | AVR8_REGIDX_DDRC, 557 | AVR8_REGIDX_PORTC, 558 | AVR8_REGIDX_PIND, 559 | AVR8_REGIDX_DDRD, 560 | AVR8_REGIDX_PORTD, 561 | AVR8_REGIDX_PINE, 562 | AVR8_REGIDX_DDRE, 563 | AVR8_REGIDX_PORTE, 564 | AVR8_REGIDX_PINF, 565 | AVR8_REGIDX_DDRF, 566 | AVR8_REGIDX_PORTF, 567 | AVR8_REGIDX_PING, 568 | AVR8_REGIDX_DDRG, 569 | AVR8_REGIDX_PORTG, 570 | AVR8_REGIDX_TIFR0 = 0x35, 571 | AVR8_REGIDX_TIFR1, 572 | AVR8_REGIDX_TIFR2, 573 | AVR8_REGIDX_TIFR3, 574 | AVR8_REGIDX_TIFR4, 575 | AVR8_REGIDX_TIFR5, 576 | AVR8_REGIDX_PCIFR = 0x3B, 577 | AVR8_REGIDX_EIFR, 578 | AVR8_REGIDX_EIMSK, 579 | AVR8_REGIDX_GPIOR0, 580 | AVR8_REGIDX_EECR, 581 | AVR8_REGIDX_EEDR, 582 | AVR8_REGIDX_EEARL, 583 | AVR8_REGIDX_EEARH, 584 | AVR8_REGIDX_GTCCR, 585 | AVR8_REGIDX_TCCR0A, 586 | AVR8_REGIDX_TCCR0B, 587 | AVR8_REGIDX_TCNT0, 588 | AVR8_REGIDX_OCR0A, 589 | AVR8_REGIDX_OCR0B, 590 | //0x49: Reserved 591 | AVR8_REGIDX_GPIOR1 = 0x4A, 592 | AVR8_REGIDX_GPIOR2, 593 | AVR8_REGIDX_SPCR, 594 | AVR8_REGIDX_SPSR, 595 | AVR8_REGIDX_SPDR, 596 | //0x4F: Reserved 597 | AVR8_REGIDX_ACSR = 0x50, 598 | AVR8_REGIDX_OCDR, 599 | //0x52: Reserved 600 | AVR8_REGIDX_SMCR = 0x53, 601 | AVR8_REGIDX_MCUSR, 602 | AVR8_REGIDX_MCUCR, 603 | //0x56: Reserved 604 | AVR8_REGIDX_SPMCSR = 0x57, 605 | //0x58: Reserved 606 | //0x59: Reserved 607 | //0x5A: Reserved 608 | AVR8_REGIDX_RAMPZ = 0x5B, 609 | AVR8_REGIDX_EIND, 610 | AVR8_REGIDX_SPL, 611 | AVR8_REGIDX_SPH, 612 | AVR8_REGIDX_SREG, 613 | //-------------------------- 614 | AVR8_REGIDX_WDTCSR = 0x60, 615 | AVR8_REGIDX_CLKPR, 616 | //0x62: Reserved 617 | //0x63: Reserved 618 | AVR8_REGIDX_PRR0 = 0x64, 619 | AVR8_REGIDX_PRR1, 620 | AVR8_REGIDX_OSCCAL, 621 | //0x67: Reserved 622 | AVR8_REGIDX_PCICR = 0x68, 623 | AVR8_REGIDX_EICRA, 624 | AVR8_REGIDX_EICRB, 625 | AVR8_REGIDX_PCMSK0, 626 | AVR8_REGIDX_PCMSK1, 627 | AVR8_REGIDX_PCMSK2, 628 | AVR8_REGIDX_TIMSK0, 629 | AVR8_REGIDX_TIMSK1, 630 | AVR8_REGIDX_TIMSK2, 631 | AVR8_REGIDX_TIMSK3, 632 | AVR8_REGIDX_TIMSK4, 633 | AVR8_REGIDX_TIMSK5, 634 | AVR8_REGIDX_XMCRA, 635 | AVR8_REGIDX_XMCRB, 636 | //0x76: Reserved 637 | //0x77: Reserved 638 | AVR8_REGIDX_ADCL = 0x78, 639 | AVR8_REGIDX_ADCH, 640 | AVR8_REGIDX_ADCSRA, 641 | AVR8_REGIDX_ADCSRB, 642 | AVR8_REGIDX_ADMUX, 643 | AVR8_REGIDX_DIDR2, 644 | AVR8_REGIDX_DIDR0, 645 | AVR8_REGIDX_DIDR1, 646 | AVR8_REGIDX_TCCR1A, 647 | AVR8_REGIDX_TCCR1B, 648 | AVR8_REGIDX_TCCR1C, 649 | //0x83: Reserved 650 | AVR8_REGIDX_TCNT1L = 0x84, 651 | AVR8_REGIDX_TCNT1H, 652 | AVR8_REGIDX_ICR1L, 653 | AVR8_REGIDX_ICR1H, 654 | AVR8_REGIDX_OCR1AL, 655 | AVR8_REGIDX_OCR1AH, 656 | AVR8_REGIDX_OCR1BL, 657 | AVR8_REGIDX_OCR1BH, 658 | AVR8_REGIDX_OCR1CL, 659 | AVR8_REGIDX_OCR1CH, 660 | //0x8E: Reserved 661 | //0x8F: Reserved 662 | AVR8_REGIDX_TCCR3A = 0x90, 663 | AVR8_REGIDX_TCCR3B, 664 | AVR8_REGIDX_TCCR3C, 665 | //0x93: Reserved 666 | AVR8_REGIDX_TCNT3L = 0x94, 667 | AVR8_REGIDX_TCNT3H, 668 | AVR8_REGIDX_ICR3L, 669 | AVR8_REGIDX_ICR3H, 670 | AVR8_REGIDX_OCR3AL, 671 | AVR8_REGIDX_OCR3AH, 672 | AVR8_REGIDX_OCR3BL, 673 | AVR8_REGIDX_OCR3BH, 674 | AVR8_REGIDX_OCR3CL, 675 | AVR8_REGIDX_OCR3CH, 676 | //0x9E: Reserved 677 | //0x9F: Reserved 678 | AVR8_REGIDX_TCCR4A = 0xA0, 679 | AVR8_REGIDX_TCCR4B, 680 | AVR8_REGIDX_TCCR4C, 681 | //0xA3: Reserved 682 | AVR8_REGIDX_TCNT4L = 0xA4, 683 | AVR8_REGIDX_TCNT4H, 684 | AVR8_REGIDX_ICR4L, 685 | AVR8_REGIDX_ICR4H, 686 | AVR8_REGIDX_OCR4AL, 687 | AVR8_REGIDX_OCR4AH, 688 | AVR8_REGIDX_OCR4BL, 689 | AVR8_REGIDX_OCR4BH, 690 | AVR8_REGIDX_OCR4CL, 691 | AVR8_REGIDX_OCR4CH, 692 | //0xAE: Reserved 693 | //0xAF: Reserved 694 | AVR8_REGIDX_TCCR2A = 0xB0, 695 | AVR8_REGIDX_TCCR2B, 696 | AVR8_REGIDX_TCNT2, 697 | AVR8_REGIDX_OCR2A, 698 | AVR8_REGIDX_OCR2B, 699 | //0xB5: Reserved 700 | AVR8_REGIDX_ASSR = 0xB6, 701 | //0xB7: Reserved 702 | AVR8_REGIDX_TWBR = 0xB8, 703 | AVR8_REGIDX_TWSR, 704 | AVR8_REGIDX_TWAR, 705 | AVR8_REGIDX_TWDR, 706 | AVR8_REGIDX_TWCR, 707 | AVR8_REGIDX_TWAMR, 708 | //0xBE: Reserved 709 | //0xBF: Reserved 710 | AVR8_REGIDX_UCSR0A = 0xC0, 711 | AVR8_REGIDX_UCSR0B, 712 | AVR8_REGIDX_UCSR0C, 713 | //0xC3: Reserved 714 | AVR8_REGIDX_UBRR0L = 0xC4, 715 | AVR8_REGIDX_UBRR0H, 716 | AVR8_REGIDX_UDR0, 717 | //0xC7: Reserved 718 | AVR8_REGIDX_UCSR1A = 0xC8, 719 | AVR8_REGIDX_UCSR1B, 720 | AVR8_REGIDX_UCSR1C, 721 | //0xCB: Reserved 722 | AVR8_REGIDX_UBRR1L = 0xCC, 723 | AVR8_REGIDX_UBRR1H, 724 | AVR8_REGIDX_UDR1, 725 | //0xCF: Reserved 726 | AVR8_REGIDX_UCSR2A = 0xD0, 727 | AVR8_REGIDX_UCSR2B, 728 | AVR8_REGIDX_UCSR2C, 729 | //0xD3: Reserved 730 | AVR8_REGIDX_UBRR2L = 0xD4, 731 | AVR8_REGIDX_UBRR2H, 732 | AVR8_REGIDX_UDR2, 733 | //0xD7: Reserved 734 | //0xD8: Reserved 735 | //0xD9: Reserved 736 | //0xDA: Reserved 737 | //0xDB: Reserved 738 | //0xDC: Reserved 739 | //0xDD: Reserved 740 | //0xDE: Reserved 741 | //0xDF: Reserved 742 | //0xE0: Reserved 743 | //0xE1: Reserved 744 | //0xE2: Reserved 745 | //0xE3: Reserved 746 | //0xE4: Reserved 747 | //0xE5: Reserved 748 | //0xE6: Reserved 749 | //0xE7: Reserved 750 | //0xE8: Reserved 751 | //0xE9: Reserved 752 | //0xEA: Reserved 753 | //0xEB: Reserved 754 | //0xEC: Reserved 755 | //0xED: Reserved 756 | //0xEE: Reserved 757 | //0xEF: Reserved 758 | //0xF0: Reserved 759 | //0xF1: Reserved 760 | //0xF2: Reserved 761 | //0xF3: Reserved 762 | //0xF4: Reserved 763 | //0xF5: Reserved 764 | //0xF6: Reserved 765 | //0xF7: Reserved 766 | //0xF8: Reserved 767 | //0xF9: Reserved 768 | //0xFA: Reserved 769 | //0xFB: Reserved 770 | //0xFC: Reserved 771 | //0xFD: Reserved 772 | //0xFE: Reserved 773 | //0xFF: Reserved 774 | AVR8_REGIDX_PINH = 0x100, 775 | AVR8_REGIDX_DDRH, 776 | AVR8_REGIDX_PORTH, 777 | AVR8_REGIDX_PINJ, 778 | AVR8_REGIDX_DDRJ, 779 | AVR8_REGIDX_PORTJ, 780 | AVR8_REGIDX_PINK, 781 | AVR8_REGIDX_DDRK, 782 | AVR8_REGIDX_PORTK, 783 | AVR8_REGIDX_PINL, 784 | AVR8_REGIDX_DDRL, 785 | AVR8_REGIDX_PORTL, 786 | //0x10C: Reserved 787 | //0x10D: Reserved 788 | //0x10E: Reserved 789 | //0x10F: Reserved 790 | //0x110: Reserved 791 | //0x111: Reserved 792 | //0x112: Reserved 793 | //0x113: Reserved 794 | //0x114: Reserved 795 | //0x115: Reserved 796 | //0x116: Reserved 797 | //0x117: Reserved 798 | //0x118: Reserved 799 | //0x119: Reserved 800 | //0x11A: Reserved 801 | //0x11B: Reserved 802 | //0x11C: Reserved 803 | //0x11D: Reserved 804 | //0x11E: Reserved 805 | //0x11F: Reserved 806 | AVR8_REGIDX_TCCR5A = 0x120, 807 | AVR8_REGIDX_TCCR5B, 808 | AVR8_REGIDX_TCCR5C, 809 | //0x123: Reserved 810 | AVR8_REGIDX_TCNT5L = 0x124, 811 | AVR8_REGIDX_TCNT5H, 812 | AVR8_REGIDX_ICR5L, 813 | AVR8_REGIDX_ICR5H, 814 | AVR8_REGIDX_OCR5AL, 815 | AVR8_REGIDX_OCR5AH, 816 | AVR8_REGIDX_OCR5BL, 817 | AVR8_REGIDX_OCR5BH, 818 | AVR8_REGIDX_OCR5CL, 819 | AVR8_REGIDX_OCR5CH, 820 | //0x12E: Reserved 821 | //0x12F: Reserved 822 | AVR8_REGIDX_UCSR3A = 0x130, 823 | AVR8_REGIDX_UCSR3B, 824 | AVR8_REGIDX_UCSR3C, 825 | //0x133: Reserved 826 | AVR8_REGIDX_UBRR3L = 0x134, 827 | AVR8_REGIDX_UBRR3H, 828 | AVR8_REGIDX_UDR3 829 | //0x137: Reserved 830 | // . 831 | // . up to 832 | // . 833 | //0x1FF: Reserved 834 | }; 835 | 836 | enum { 837 | AVR8_IO_PORTA = 0, 838 | AVR8_IO_PORTB, 839 | AVR8_IO_PORTC, 840 | AVR8_IO_PORTD, 841 | AVR8_IO_PORTE, 842 | AVR8_IO_PORTF, 843 | AVR8_IO_PORTG, 844 | AVR8_IO_PORTH, 845 | AVR8_IO_PORTJ, 846 | AVR8_IO_PORTK, 847 | AVR8_IO_PORTL 848 | }; 849 | 850 | //TODO: AVR8_REG_* and AVR8_IO_PORT* seem to serve the same purpose and thus should be unified. Verify this! 851 | enum 852 | { 853 | AVR8_REG_A = 0, 854 | AVR8_REG_B, 855 | AVR8_REG_C, 856 | AVR8_REG_D, 857 | AVR8_REG_E, 858 | AVR8_REG_F, 859 | AVR8_REG_G, 860 | AVR8_REG_H, 861 | AVR8_REG_J, 862 | AVR8_REG_K, 863 | AVR8_REG_L 864 | }; 865 | 866 | enum 867 | { 868 | AVR8_INTIDX_SPI, 869 | 870 | AVR8_INTIDX_OCF0B, 871 | AVR8_INTIDX_OCF0A, 872 | AVR8_INTIDX_TOV0, 873 | 874 | AVR8_INTIDX_ICF1, 875 | 876 | AVR8_INTIDX_OCF1B, 877 | AVR8_INTIDX_OCF1A, 878 | AVR8_INTIDX_TOV1, 879 | 880 | AVR8_INTIDX_OCF2B, 881 | AVR8_INTIDX_OCF2A, 882 | AVR8_INTIDX_TOV2, 883 | 884 | //------ TODO: review this -------- 885 | AVR8_INTIDX_OCF3B, 886 | AVR8_INTIDX_OCF3A, 887 | AVR8_INTIDX_TOV3, 888 | 889 | AVR8_INTIDX_OCF4B, 890 | AVR8_INTIDX_OCF4A, 891 | AVR8_INTIDX_TOV4, 892 | 893 | AVR8_INTIDX_OCF5B, 894 | AVR8_INTIDX_OCF5A, 895 | AVR8_INTIDX_TOV5, 896 | //--------------------------------- 897 | 898 | AVR8_INTIDX_COUNT 899 | }; 900 | 901 | //lock bit masks 902 | enum 903 | { 904 | LB1 = (1 << 0), 905 | LB2 = (1 << 1), 906 | BLB01 = (1 << 2), 907 | BLB02 = (1 << 3), 908 | BLB11 = (1 << 4), 909 | BLB12 = (1 << 5) 910 | }; 911 | 912 | //extended fuses bit masks 913 | enum 914 | { 915 | BODLEVEL0 = (1 << 0), 916 | BODLEVEL1 = (1 << 1), 917 | BODLEVEL2 = (1 << 2) 918 | }; 919 | 920 | //high fuses bit masks 921 | enum 922 | { 923 | BOOTRST = (1 << 0), 924 | BOOTSZ0 = (1 << 1), 925 | BOOTSZ1 = (1 << 2), 926 | EESAVE = (1 << 3), 927 | WDTON = (1 << 4), 928 | SPIEN = (1 << 5), 929 | JTAGEN = (1 << 6), 930 | OCDEN = (1 << 7) 931 | }; 932 | 933 | //low fuses bit masks 934 | enum 935 | { 936 | CKSEL0 = (1 << 0), 937 | CKSEL1 = (1 << 1), 938 | CKSEL2 = (1 << 2), 939 | CKSEL3 = (1 << 3), 940 | SUT0 = (1 << 4), 941 | SUT1 = (1 << 5), 942 | CKOUT = (1 << 6), 943 | CKDIV8 = (1 << 7) 944 | }; 945 | 946 | #define AVR8_EEARH_MASK 0x01 947 | 948 | #define AVR8_SPSR_SPIF_MASK 0x80 949 | #define AVR8_SPSR_SPIF_SHIFT 7 950 | #define AVR8_SPSR_SPR2X_MASK 0x01 951 | 952 | #define AVR8_SPCR_SPIE_MASK 0x80 953 | #define AVR8_SPCR_SPE_MASK 0x40 954 | #define AVR8_SPCR_DORD_MASK 0x20 955 | #define AVR8_SPCR_MSTR_MASK 0x10 956 | #define AVR8_SPCR_CPOL_MASK 0x08 957 | #define AVR8_SPCR_CPHA_MASK 0x04 958 | #define AVR8_SPCR_SPR_MASK 0x03 959 | 960 | #endif /* MAME_CPU_AVR8_AVR8_H */ 961 | -------------------------------------------------------------------------------- /mame/src/devices/cpu/avr8/avr8dasm.cpp: -------------------------------------------------------------------------------- 1 | // license:BSD-3-Clause 2 | // copyright-holders:Ryan Holtz 3 | /* 4 | Atmel 8-bit AVR disassembler 5 | 6 | Written by Ryan Holtz 7 | */ 8 | 9 | #include "emu.h" 10 | #include "avr8dasm.h" 11 | 12 | #define RD2(op) (((op) >> 4) & 0x0003) 13 | #define RD3(op) (((op) >> 4) & 0x0007) 14 | #define RD4(op) (((op) >> 4) & 0x000f) 15 | #define RD5(op) (((op) >> 4) & 0x001f) 16 | #define RR3(op) ((op) & 0x0007) 17 | #define RR4(op) ((op) & 0x000f) 18 | #define RR5(op) ((((op) >> 5) & 0x0010) | ((op) & 0x000f)) 19 | #define KCONST6(op) ((((op) >> 2) & 0x0030) | ((op) & 0x000f)) 20 | #define KCONST7(op) (((op) >> 3) & 0x007f) 21 | #define KCONST8(op) ((((op) >> 4) & 0x00f0) | ((op) & 0x000f)) 22 | #define KCONST22(op) (((((uint32_t)(op) >> 3) & 0x003e) | ((uint32_t)(op) & 0x0001)) << 16) 23 | #define QCONST6(op) ((((op) >> 8) & 0x0020) | (((op) >> 7) & 0x0018) | ((op) & 0x0007)) 24 | #define ACONST5(op) (((op) >> 3) & 0x001f) 25 | #define ACONST6(op) ((((op) >> 5) & 0x0030) | ((op) & 0x000f)) 26 | #define MULCONST2(op) ((((op) >> 6) & 0x0002) | (((op) >> 3) & 0x0001)) 27 | 28 | u32 avr8_disassembler::opcode_alignment() const 29 | { 30 | return 2; 31 | } 32 | 33 | offs_t avr8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) 34 | { 35 | offs_t base_pc = pc; 36 | uint32_t op = opcodes.r16(pc); 37 | pc += 2; 38 | uint32_t addr; 39 | const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"}; 40 | 41 | const char* register_bit_names[0x40][8] = { 42 | /* PINA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 43 | /* DDRA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 44 | /* PORTA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 45 | /* PINB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 46 | /* DDRB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 47 | /* PORTB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 48 | /* PINC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 49 | /* DDRC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 50 | /* PORTC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 51 | /* PIND */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 52 | /* DDRD */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 53 | /* PORTD */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 54 | /* PINE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 55 | /* DDRE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 56 | /* PORTE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 57 | /* PINF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 58 | /* DDRF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 59 | /* PORTF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 60 | /* PING */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 61 | /* DDRG */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 62 | /* PORTG */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 63 | /* TIFR0 */ { "TOV0", "OCF0A", "OCF0B", "3", "4", "5", "6", "7"}, 64 | /* TIFR1 */ { "TOV1", "OCF1A", "OCF1B", "OCF1C", "4", "ICF1", "6", "7"}, 65 | /* TIFR2 */ { "TOV2", "OCF2A", "OCF2B", "3", "4", "5", "6", "7"}, 66 | /* TIFR3 */ { "TOV3", "OCF3A", "OCF3B", "OCF3C", "4", "ICF3", "6", "7"}, 67 | /* TIFR4 */ { "TOV4", "OCF4A", "OCF4B", "OCF4C", "4", "ICF4", "6", "7"}, 68 | /* TIFR5 */ { "TOV5", "OCF5A", "OCF5B", "OCF5C", "4", "ICF5", "6", "7"}, 69 | /* PCIFR */ {"PCIF0", "PCIF1", "PCIF2", "3", "4", "5", "6", "7"}, 70 | /* EIFR */ {"INTF0", "INTF1", "INTF2", "INTF3", "INTF4", "INTF5", "INTF6", "INTF7"}, 71 | /* EIMSK */ { "INT0", "INT1", "INT2", "INT3", "INT4", "INT5", "INT6", "INT7"}, 72 | /* GPIOR0 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 73 | /* EECR */ { "EERE", "EEPE", "EEMPE", "EERIE", "EEPM0", "EEPM1", "6", "7"}, 74 | /* EEDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 75 | /* EEARL */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 76 | /* EEARH */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 77 | /* GTCCR */ {"PSRSYNC", "PSRASY", "2", "3", "4", "5", "6", "TSM"}, 78 | /* TCCR0A */ {"WGM00", "WGM01", "2", "3","COM0B0","COM0B1","COM0A0","COM0A1"}, 79 | /* TCCR0B */ { "CS0", "CS1", "CS2", "WGM02", "4", "5", "FOC0B", "FOC0A"}, 80 | /* TCNT0 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 81 | /* OCR0A */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 82 | /* OCR0B */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 83 | /* 0x29 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 84 | /* GPIOR1 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 85 | /* GPIOR2 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 86 | /* SPCR */ { "SPR0", "SPR1", "CPHA", "CPOL", "MSTR", "DORD", "SPE", "SPIE"}, 87 | /* SPSR */ {"SPI2X", "1", "2", "3", "4", "5", "WCOL", "SPIF"}, 88 | /* SPDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 89 | /* 0x2F */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 90 | /* ACSR */ {"ACIS0", "ACIS1", "ACIC", "ACIE", "ACI", "ACO", "ACBG", "ACD"}, 91 | /* OCDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 92 | /* 0x32 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 93 | /* SMCR */ { "SE", "SM0", "SM1", "SM2", "4", "5", "6", "7"}, 94 | /* MCUSR */ { "PORF", "EXTRF", "BORF", "WDRF", "JTRF", "5", "6", "7"}, 95 | /* MCUCR */ { "IVCE", "IVSEL", "2", "3", "PUD", "5", "6", "JTD"}, 96 | /* 0x36 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 97 | /* SPMCSR */ {"SPMEN", "PGERS", "PGWRT","BLBSET","RWWSRE", "SIGRD", "RWWSB", "SPMIE"}, 98 | /* 0x38 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 99 | /* 0x39 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 100 | /* 0x3A */ { "0", "1", "2", "3", "4", "5", "6", "7"}, 101 | /* RAMPZ */ {"RAMPZ0","RAMPZ1", "2", "3", "4", "5", "6", "7"}, 102 | /* EIND */ {"EIND0", "1", "2", "3", "4", "5", "6", "7"}, 103 | /* SPL */ { "SP0", "SP1", "SP2", "SP3", "SP4", "SP5", "SP6", "SP7"}, 104 | /* SPH */ { "SP8", "SP9", "SP10", "SP11", "SP12", "SP13", "SP14", "SP15"}, 105 | /* SREG */ { "C", "Z", "N", "V", "S", "H", "T", "I"}}; 106 | 107 | switch(op & 0xf000) 108 | { 109 | case 0x0000: 110 | switch(op & 0x0f00) 111 | { 112 | case 0x0000: 113 | util::stream_format(stream, "NOP"); 114 | break; 115 | case 0x0100: 116 | util::stream_format(stream, "MOVW R%d:R%d, R%d:R%d", (RD4(op) << 1)+1, RD4(op) << 1, (RR4(op) << 1)+1, RR4(op) << 1); 117 | break; 118 | case 0x0200: 119 | util::stream_format(stream, "MULS R%d, R%d", 16+RD4(op), 16+RR4(op)); 120 | break; 121 | case 0x0300: 122 | switch(MULCONST2(op)) 123 | { 124 | case 0: 125 | util::stream_format(stream, "MULSU R%d, R%d", 16+RD3(op), 16+RR3(op)); 126 | break; 127 | case 1: 128 | util::stream_format(stream, "FMUL R%d, R%d", 16+RD3(op), 16+RR3(op)); 129 | break; 130 | case 2: 131 | util::stream_format(stream, "FMULS R%d, R%d", 16+RD3(op), 16+RR3(op)); 132 | break; 133 | case 3: 134 | util::stream_format(stream, "FMULSU R%d, R%d", 16+RD3(op), 16+RR3(op)); 135 | break; 136 | } 137 | break; 138 | case 0x0400: 139 | case 0x0500: 140 | case 0x0600: 141 | case 0x0700: 142 | util::stream_format(stream, "CPC R%d, R%d", RD5(op), RR5(op)); 143 | break; 144 | case 0x0800: 145 | case 0x0900: 146 | case 0x0a00: 147 | case 0x0b00: 148 | util::stream_format(stream, "SBC R%d, R%d", RD5(op), RR5(op)); 149 | break; 150 | case 0x0c00: 151 | case 0x0d00: 152 | case 0x0e00: 153 | case 0x0f00: 154 | util::stream_format(stream, "ADD R%d, R%d", RD5(op), RR5(op)); 155 | break; 156 | } 157 | break; 158 | case 0x1000: 159 | switch(op & 0x0c00) 160 | { 161 | case 0x0000: 162 | util::stream_format(stream, "CPSE R%d, R%d", RD5(op), RR5(op)); 163 | break; 164 | case 0x0400: 165 | util::stream_format(stream, "CP R%d, R%d", RD5(op), RR5(op)); 166 | break; 167 | case 0x0800: 168 | util::stream_format(stream, "SUB R%d, R%d", RD5(op), RR5(op)); 169 | break; 170 | case 0x0c00: 171 | util::stream_format(stream, "ADC R%d, R%d", RD5(op), RR5(op)); 172 | break; 173 | } 174 | break; 175 | case 0x2000: 176 | switch(op & 0x0c00) 177 | { 178 | case 0x0000: 179 | util::stream_format(stream, "AND R%d, R%d", RD5(op), RR5(op)); 180 | break; 181 | case 0x0400: 182 | util::stream_format(stream, "EOR R%d, R%d", RD5(op), RR5(op)); 183 | break; 184 | case 0x0800: 185 | util::stream_format(stream, "OR R%d, R%d", RD5(op), RR5(op)); 186 | break; 187 | case 0x0c00: 188 | util::stream_format(stream, "MOV R%d, R%d", RD5(op), RR5(op)); 189 | break; 190 | } 191 | break; 192 | case 0x3000: 193 | util::stream_format(stream, "CPI R%d, 0x%02x", 16+RD4(op), KCONST8(op)); 194 | break; 195 | case 0x4000: 196 | util::stream_format(stream, "SBCI R%d, 0x%02x", 16+RD4(op), KCONST8(op)); 197 | break; 198 | case 0x5000: 199 | util::stream_format(stream, "SUBI R%d, 0x%02x", 16+RD4(op), KCONST8(op)); 200 | break; 201 | case 0x6000: 202 | util::stream_format(stream, "ORI R%d, 0x%02x", 16+RD4(op), KCONST8(op)); 203 | break; 204 | case 0x7000: 205 | util::stream_format(stream, "ANDI R%d, 0x%02x", 16+RD4(op), KCONST8(op)); 206 | break; 207 | case 0x8000: 208 | case 0xa000: 209 | switch(op & 0x0208) 210 | { 211 | case 0x0000: 212 | util::stream_format(stream, "LD(D) R%d, Z+%02x", RD5(op), QCONST6(op)); 213 | break; 214 | case 0x0008: 215 | util::stream_format(stream, "LD(D) R%d, Y+%02x", RD5(op), QCONST6(op)); 216 | break; 217 | case 0x0200: 218 | util::stream_format(stream, "ST(D) Z+%02x, R%d", QCONST6(op), RD5(op)); 219 | break; 220 | case 0x0208: 221 | util::stream_format(stream, "ST(D) Y+%02x, R%d", QCONST6(op), RD5(op)); 222 | break; 223 | } 224 | break; 225 | case 0x9000: 226 | switch(op & 0x0f00) 227 | { 228 | case 0x0000: 229 | case 0x0100: 230 | switch(op & 0x000f) 231 | { 232 | case 0x0000: 233 | op <<= 16; 234 | op |= opcodes.r16(pc); 235 | pc += 2; 236 | util::stream_format(stream, "LDS R%d, (0x%04x)", RD5(op >> 16), op & 0x0000ffff); 237 | break; 238 | case 0x0001: 239 | util::stream_format(stream, "LD R%d, Z+", RD5(op)); 240 | break; 241 | case 0x0002: 242 | util::stream_format(stream, "LD R%d,-Z", RD5(op)); 243 | break; 244 | case 0x0004: 245 | util::stream_format(stream, "LPM R%d, Z", RD5(op)); 246 | break; 247 | case 0x0005: 248 | util::stream_format(stream, "LPM R%d, Z+", RD5(op)); 249 | break; 250 | case 0x0006: 251 | util::stream_format(stream, "ELPM R%d, Z", RD5(op)); 252 | break; 253 | case 0x0007: 254 | util::stream_format(stream, "ELPM R%d, Z+", RD5(op)); 255 | break; 256 | case 0x0009: 257 | util::stream_format(stream, "LD R%d, Y+", RD5(op)); 258 | break; 259 | case 0x000a: 260 | util::stream_format(stream, "LD R%d,-Y", RD5(op)); 261 | break; 262 | case 0x000c: 263 | util::stream_format(stream, "LD R%d, X", RD5(op)); 264 | break; 265 | case 0x000d: 266 | util::stream_format(stream, "LD R%d, X+", RD5(op)); 267 | break; 268 | case 0x000e: 269 | util::stream_format(stream, "LD R%d,-X", RD5(op)); 270 | break; 271 | case 0x000f: 272 | util::stream_format(stream, "POP R%d", RD5(op)); 273 | break; 274 | default: 275 | util::stream_format(stream, "Undefined (%08x)", op); 276 | break; 277 | } 278 | break; 279 | case 0x0200: 280 | case 0x0300: 281 | switch(op & 0x000f) 282 | { 283 | case 0x0000: 284 | op <<= 16; 285 | op |= opcodes.r16(pc); 286 | pc += 2; 287 | util::stream_format(stream, "STS (0x%04x), R%d", op & 0x0000ffff, RD5(op >> 16)); 288 | break; 289 | case 0x0001: 290 | util::stream_format(stream, "ST Z+, R%d", RD5(op)); 291 | break; 292 | case 0x0002: 293 | util::stream_format(stream, "ST -Z , R%d", RD5(op)); 294 | break; 295 | case 0x0009: 296 | util::stream_format(stream, "ST Y+, R%d", RD5(op)); 297 | break; 298 | case 0x000a: 299 | util::stream_format(stream, "ST -Y , R%d", RD5(op)); 300 | break; 301 | case 0x000c: 302 | util::stream_format(stream, "ST X , R%d", RD5(op)); 303 | break; 304 | case 0x000d: 305 | util::stream_format(stream, "ST X+, R%d", RD5(op)); 306 | break; 307 | case 0x000e: 308 | util::stream_format(stream, "ST -X , R%d", RD5(op)); 309 | break; 310 | case 0x000f: 311 | util::stream_format(stream, "PUSH R%d", RD5(op)); 312 | break; 313 | default: 314 | util::stream_format(stream, "Undefined (%08x)", op); 315 | break; 316 | } 317 | break; 318 | case 0x0400: 319 | switch(op & 0x000f) 320 | { 321 | case 0x0000: 322 | util::stream_format(stream, "COM R%d", RD5(op)); 323 | break; 324 | case 0x0001: 325 | util::stream_format(stream, "NEG R%d", RD5(op)); 326 | break; 327 | case 0x0002: 328 | util::stream_format(stream, "SWAP R%d", RD5(op)); 329 | break; 330 | case 0x0003: 331 | util::stream_format(stream, "INC R%d", RD5(op)); 332 | break; 333 | case 0x0005: 334 | util::stream_format(stream, "ASR R%d", RD5(op)); 335 | break; 336 | case 0x0006: 337 | util::stream_format(stream, "LSR R%d", RD5(op)); 338 | break; 339 | case 0x0007: 340 | util::stream_format(stream, "ROR R%d", RD5(op)); 341 | break; 342 | case 0x0008: 343 | switch(op & 0x00f0) 344 | { 345 | case 0x0000: 346 | util::stream_format(stream, "SEC"); 347 | break; 348 | case 0x0010: 349 | util::stream_format(stream, "SEZ"); 350 | break; 351 | case 0x0020: 352 | util::stream_format(stream, "SEN"); 353 | break; 354 | case 0x0030: 355 | util::stream_format(stream, "SEV"); 356 | break; 357 | case 0x0040: 358 | util::stream_format(stream, "SES"); 359 | break; 360 | case 0x0050: 361 | util::stream_format(stream, "SEH"); 362 | break; 363 | case 0x0060: 364 | util::stream_format(stream, "SET"); 365 | break; 366 | case 0x0070: 367 | util::stream_format(stream, "SEI"); 368 | break; 369 | case 0x0080: 370 | util::stream_format(stream, "CLC"); 371 | break; 372 | case 0x0090: 373 | util::stream_format(stream, "CLZ"); 374 | break; 375 | case 0x00a0: 376 | util::stream_format(stream, "CLN"); 377 | break; 378 | case 0x00b0: 379 | util::stream_format(stream, "CLV"); 380 | break; 381 | case 0x00c0: 382 | util::stream_format(stream, "CLS"); 383 | break; 384 | case 0x00d0: 385 | util::stream_format(stream, "CLH"); 386 | break; 387 | case 0x00e0: 388 | util::stream_format(stream, "CLT"); 389 | break; 390 | case 0x00f0: 391 | util::stream_format(stream, "CLI"); 392 | break; 393 | default: 394 | util::stream_format(stream, "Undefined (%08x)", op); 395 | break; 396 | } 397 | break; 398 | case 0x0009: 399 | switch(op & 0x00f0) 400 | { 401 | case 0x0000: 402 | util::stream_format(stream, "IJMP"); 403 | break; 404 | case 0x0010: 405 | util::stream_format(stream, "EIJMP"); 406 | break; 407 | default: 408 | util::stream_format(stream, "Undefined (%08x)", op); 409 | break; 410 | } 411 | break; 412 | case 0x000a: 413 | util::stream_format(stream, "DEC R%d", RD5(op)); 414 | break; 415 | case 0x000c: 416 | case 0x000d: 417 | addr = KCONST22(op) << 16; 418 | addr |= opcodes.r16(pc); 419 | pc += 2; 420 | util::stream_format(stream, "JMP 0x%06x", addr << 1); 421 | break; 422 | case 0x000e: 423 | case 0x000f: 424 | addr = KCONST22(op) << 16; 425 | addr |= opcodes.r16(pc); 426 | pc += 2; 427 | util::stream_format(stream, "CALL 0x%06x", addr << 1); 428 | break; 429 | default: 430 | util::stream_format(stream, "Undefined (%08x)", op); 431 | break; 432 | } 433 | break; 434 | case 0x0500: 435 | switch(op & 0x000f) 436 | { 437 | case 0x0000: 438 | util::stream_format(stream, "COM R%d", RD5(op)); 439 | break; 440 | case 0x0001: 441 | util::stream_format(stream, "NEG R%d", RD5(op)); 442 | break; 443 | case 0x0002: 444 | util::stream_format(stream, "SWAP R%d", RD5(op)); 445 | break; 446 | case 0x0003: 447 | util::stream_format(stream, "INC R%d", RD5(op)); 448 | break; 449 | case 0x0005: 450 | util::stream_format(stream, "ASR R%d", RD5(op)); 451 | break; 452 | case 0x0006: 453 | util::stream_format(stream, "LSR R%d", RD5(op)); 454 | break; 455 | case 0x0007: 456 | util::stream_format(stream, "ROR R%d", RD5(op)); 457 | break; 458 | case 0x0008: 459 | switch(op & 0x00f0) 460 | { 461 | case 0x0000: 462 | util::stream_format(stream, "RET"); 463 | break; 464 | case 0x0010: 465 | util::stream_format(stream, "RETI"); 466 | break; 467 | case 0x0080: 468 | util::stream_format(stream, "SLEEP"); 469 | break; 470 | case 0x0090: 471 | util::stream_format(stream, "BREAK"); 472 | break; 473 | case 0x00a0: 474 | util::stream_format(stream, "WDR"); 475 | break; 476 | case 0x00c0: 477 | util::stream_format(stream, "LPM"); 478 | break; 479 | case 0x00d0: 480 | util::stream_format(stream, "ELPM"); 481 | break; 482 | case 0x00e0: 483 | util::stream_format(stream, "SPM"); 484 | break; 485 | case 0x00f0: 486 | util::stream_format(stream, "SPM Z+"); 487 | break; 488 | default: 489 | util::stream_format(stream, "Undefined (%08x)", op); 490 | break; 491 | } 492 | break; 493 | case 0x0009: 494 | switch(op & 0x00f0) 495 | { 496 | case 0x0000: 497 | util::stream_format(stream, "ICALL"); 498 | break; 499 | case 0x0010: 500 | util::stream_format(stream, "EICALL"); 501 | break; 502 | default: 503 | util::stream_format(stream, "Undefined (%08x)", op); 504 | break; 505 | } 506 | break; 507 | case 0x000a: 508 | util::stream_format(stream, "DEC R%d", RD5(op)); 509 | break; 510 | case 0x000c: 511 | case 0x000d: 512 | op <<= 16; 513 | op |= opcodes.r16(pc); 514 | pc += 2; 515 | util::stream_format(stream, "JMP 0x%06x", KCONST22(op) << 1); 516 | break; 517 | case 0x000e: 518 | case 0x000f: 519 | op <<= 16; 520 | op |= opcodes.r16(pc); 521 | pc += 2; 522 | util::stream_format(stream, "CALL 0x%06x", KCONST22(op) << 1); 523 | break; 524 | } 525 | break; 526 | case 0x0600: 527 | util::stream_format(stream, "ADIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op)); 528 | break; 529 | case 0x0700: 530 | util::stream_format(stream, "SBIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op)); 531 | break; 532 | case 0x0800: 533 | if (ACONST5(op) < 0x20) 534 | util::stream_format(stream, "CBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)]); 535 | else 536 | util::stream_format(stream, "CBI 0x%02x, %d", ACONST5(op), RR3(op)); 537 | break; 538 | case 0x0900: 539 | if (ACONST5(op) < 0x20) 540 | util::stream_format(stream, "SBIC %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)]); 541 | else 542 | util::stream_format(stream, "SBIC 0x%02x, %d", ACONST5(op), RR3(op)); 543 | break; 544 | case 0x0a00: 545 | if (ACONST5(op) < 0x20) 546 | util::stream_format(stream, "SBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)]); 547 | else 548 | util::stream_format(stream, "SBI 0x%02x, %d", ACONST5(op), RR3(op)); 549 | break; 550 | case 0x0b00: 551 | if (ACONST5(op) < 0x20) 552 | util::stream_format(stream, "SBIS %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)]); 553 | else 554 | util::stream_format(stream, "SBIS 0x%02x, %d", ACONST5(op), RR3(op)); 555 | break; 556 | case 0x0c00: 557 | case 0x0d00: 558 | case 0x0e00: 559 | case 0x0f00: 560 | util::stream_format(stream, "MUL R%d, R%d", RD5(op), RR5(op)); 561 | break; 562 | } 563 | break; 564 | case 0xb000: 565 | if(op & 0x0800) 566 | { 567 | if (ACONST6(op) < 0x40 ) { 568 | util::stream_format(stream, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op)); 569 | } else { 570 | util::stream_format(stream, "OUT 0x%02x, R%d", ACONST6(op), RD5(op)); 571 | } 572 | } 573 | else 574 | { 575 | if (ACONST6(op) < 0x40 ) { 576 | util::stream_format(stream, "IN R%d, %s", RD5(op), register_names[ACONST6(op)]); 577 | } else { 578 | util::stream_format(stream, "IN R%d, 0x%02x", RD5(op), ACONST6(op)); 579 | } 580 | } 581 | break; 582 | case 0xc000: 583 | //I'm not sure if this is correct. why pc + ... : pc + 8 + ... ? 584 | util::stream_format(stream, "RJMP %08x", (((op & 0x0800) ? pc + ((op & 0x0fff) | 0xfffff000) : pc + 8 + (op & 0x0fff)) << 0)); 585 | break; 586 | case 0xd000: 587 | util::stream_format(stream, "RCALL %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1)); 588 | break; 589 | case 0xe000: 590 | util::stream_format(stream, "LDI R%d, 0x%02x", 16 + RD4(op), KCONST8(op)); 591 | break; 592 | case 0xf000: 593 | switch(op & 0x0c00) 594 | { 595 | case 0x0000: 596 | switch(op & 0x0007) 597 | { 598 | case 0x0000: 599 | util::stream_format(stream, "BRLO %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 600 | break; 601 | case 0x0001: 602 | util::stream_format(stream, "BREQ %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 603 | break; 604 | case 0x0002: 605 | util::stream_format(stream, "BRMI %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 606 | break; 607 | case 0x0003: 608 | util::stream_format(stream, "BRVS %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 609 | break; 610 | case 0x0004: 611 | util::stream_format(stream, "BRLT %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 612 | break; 613 | case 0x0005: 614 | util::stream_format(stream, "BRHS %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 615 | break; 616 | case 0x0006: 617 | util::stream_format(stream, "BRTS %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 618 | break; 619 | case 0x0007: 620 | util::stream_format(stream, "BRIE %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 621 | break; 622 | } 623 | break; 624 | case 0x0400: 625 | switch(op & 0x0007) 626 | { 627 | case 0x0000: 628 | util::stream_format(stream, "BRSH %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 629 | break; 630 | case 0x0001: 631 | util::stream_format(stream, "BRNE %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 632 | break; 633 | case 0x0002: 634 | util::stream_format(stream, "BRPL %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 635 | break; 636 | case 0x0003: 637 | util::stream_format(stream, "BRVC %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 638 | break; 639 | case 0x0004: 640 | util::stream_format(stream, "BRGE %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 641 | break; 642 | case 0x0005: 643 | util::stream_format(stream, "BRHC %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 644 | break; 645 | case 0x0006: 646 | util::stream_format(stream, "BRTC %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 647 | break; 648 | case 0x0007: 649 | util::stream_format(stream, "BRID %08x", (((op & 0x0200) ? (KCONST7(op) | 0xff80) : KCONST7(op)) << 1)); 650 | break; 651 | } 652 | break; 653 | case 0x0800: 654 | if(op & 0x0200) 655 | { 656 | util::stream_format(stream, "BST R%d, %d", RD5(op), RR3(op)); 657 | } 658 | else 659 | { 660 | util::stream_format(stream, "BLD R%d, %d", RD5(op), RR3(op)); 661 | } 662 | break; 663 | case 0x0c00: 664 | if(op & 0x0200) 665 | { 666 | util::stream_format(stream, "SBRS R%d, %d", RD5(op), RR3(op)); 667 | } 668 | else 669 | { 670 | util::stream_format(stream, "SBRC R%d, %d", RD5(op), RR3(op)); 671 | } 672 | break; 673 | } 674 | break; 675 | } 676 | 677 | return (pc - base_pc) | SUPPORTED; 678 | } 679 | -------------------------------------------------------------------------------- /mame/src/devices/cpu/avr8/avr8dasm.h: -------------------------------------------------------------------------------- 1 | // license:BSD-3-Clause 2 | // copyright-holders:Ryan Holtz 3 | /* 4 | Atmel 8-bit AVR disassembler 5 | 6 | Written by Ryan Holtz 7 | */ 8 | 9 | #ifndef MAME_CPU_AVR8_AVR8DASM_H 10 | #define MAME_CPU_AVR8_AVR8DASM_H 11 | 12 | #pragma once 13 | 14 | class avr8_disassembler : public util::disasm_interface 15 | { 16 | public: 17 | avr8_disassembler() = default; 18 | virtual ~avr8_disassembler() = default; 19 | 20 | virtual u32 opcode_alignment() const override; 21 | virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; 22 | }; 23 | 24 | #endif 25 | -------------------------------------------------------------------------------- /mame/src/devices/cpu/avr8/avr8ops.hxx: -------------------------------------------------------------------------------- 1 | // license:BSD-3-Clause 2 | // copyright-holders:Ryan Holtz, Sandro Ronco, Felipe Sanches 3 | /*************************************************************************** 4 | 5 | Atmel 8-bit AVR simulator 6 | 7 | Opcode implementations 8 | 9 | ***************************************************************************/ 10 | 11 | void avr8_device::populate_ops() 12 | { 13 | for (uint32_t op = 0; op < 0x10000; op++) 14 | { 15 | m_op_cycles[op] = 1; 16 | 17 | switch (op & 0xf000) 18 | { 19 | case 0x0000: 20 | switch (op & 0x0f00) 21 | { 22 | case 0x0000: // NOP 23 | m_op_funcs[op] = &avr8_device::op_nop; 24 | break; 25 | case 0x0100: // MOVW Rd+1:Rd,Rr+1:Rd 26 | m_op_funcs[op] = &avr8_device::op_movw; 27 | break; 28 | case 0x0200: // MULS Rd,Rr 29 | m_op_funcs[op] = &avr8_device::op_muls; 30 | m_op_cycles[op] = 2; 31 | break; 32 | case 0x0300: // Multiplication 33 | switch (MULCONST2(op)) 34 | { 35 | case 0x0000: // MULSU Rd,Rr 36 | m_op_funcs[op] = &avr8_device::op_mulsu; 37 | m_op_cycles[op] = 2; 38 | break; 39 | case 0x0001: // FMUL Rd,Rr 40 | m_op_funcs[op] = &avr8_device::op_fmul; 41 | m_op_cycles[op] = 2; 42 | break; 43 | case 0x0002: // FMULS Rd,Rr 44 | m_op_funcs[op] = &avr8_device::op_fmuls; 45 | m_op_cycles[op] = 2; 46 | break; 47 | case 0x0003: // FMULSU Rd,Rr 48 | m_op_funcs[op] = &avr8_device::op_fmulsu; 49 | m_op_cycles[op] = 2; 50 | break; 51 | } 52 | break; 53 | case 0x0400: 54 | case 0x0500: 55 | case 0x0600: 56 | case 0x0700: // CPC Rd,Rr 57 | m_op_funcs[op] = &avr8_device::op_cpc; 58 | break; 59 | case 0x0800: 60 | case 0x0900: 61 | case 0x0a00: 62 | case 0x0b00: // SBC Rd,Rr 63 | m_op_funcs[op] = &avr8_device::op_sbc; 64 | break; 65 | case 0x0c00: 66 | case 0x0d00: 67 | case 0x0e00: 68 | case 0x0f00: // ADD Rd,Rr 69 | m_op_funcs[op] = &avr8_device::op_add; 70 | break; 71 | } 72 | break; 73 | case 0x1000: 74 | switch (op & 0x0c00) 75 | { 76 | case 0x0000: // CPSE Rd,Rr 77 | m_op_funcs[op] = &avr8_device::op_cpse; 78 | break; 79 | case 0x0400: // CP Rd,Rr 80 | m_op_funcs[op] = &avr8_device::op_cp; 81 | break; 82 | case 0x0800: // SUB Rd,Rr 83 | m_op_funcs[op] = &avr8_device::op_sub; 84 | break; 85 | case 0x0c00: // ADC Rd,Rr 86 | m_op_funcs[op] = &avr8_device::op_adc; 87 | break; 88 | } 89 | break; 90 | case 0x2000: 91 | switch (op & 0x0c00) 92 | { 93 | case 0x0000: // AND Rd,Rr 94 | m_op_funcs[op] = &avr8_device::op_and; 95 | break; 96 | case 0x0400: // EOR Rd,Rr 97 | m_op_funcs[op] = &avr8_device::op_eor; 98 | break; 99 | case 0x0800: // OR Rd,Rr 100 | m_op_funcs[op] = &avr8_device::op_or; 101 | break; 102 | case 0x0c00: // MOV Rd,Rr 103 | m_op_funcs[op] = &avr8_device::op_mov; 104 | break; 105 | } 106 | break; 107 | case 0x3000: // CPI Rd,K 108 | m_op_funcs[op] = &avr8_device::op_cpi; 109 | break; 110 | case 0x4000: // SBCI Rd,K 111 | m_op_funcs[op] = &avr8_device::op_sbci; 112 | break; 113 | case 0x5000: // SUBI Rd,K 114 | m_op_funcs[op] = &avr8_device::op_subi; 115 | break; 116 | case 0x6000: // ORI Rd,K 117 | m_op_funcs[op] = &avr8_device::op_ori; 118 | break; 119 | case 0x7000: // ANDI Rd,K 120 | m_op_funcs[op] = &avr8_device::op_andi; 121 | break; 122 | case 0x8000: 123 | case 0xa000: 124 | switch (op & 0x0208) 125 | { 126 | case 0x0000: // LDD Rd,Z+q 127 | m_op_funcs[op] = &avr8_device::op_lddz; 128 | m_op_cycles[op] = 2; 129 | break; 130 | case 0x0008: // LDD Rd,Y+q 131 | m_op_funcs[op] = &avr8_device::op_lddy; 132 | m_op_cycles[op] = 2; 133 | break; 134 | case 0x0200: // STD Z+q,Rr 135 | m_op_funcs[op] = &avr8_device::op_stdz; 136 | m_op_cycles[op] = 2; 137 | break; 138 | case 0x0208: // STD Y+q,Rr 139 | m_op_funcs[op] = &avr8_device::op_stdy; 140 | m_op_cycles[op] = 2; 141 | break; 142 | } 143 | break; 144 | case 0x9000: 145 | switch (op & 0x0f00) 146 | { 147 | case 0x0000: 148 | case 0x0100: 149 | switch (op & 0x000f) 150 | { 151 | case 0x0000: // LDS Rd,k 152 | m_op_funcs[op] = &avr8_device::op_lds; 153 | m_op_cycles[op] = 2; 154 | break; 155 | case 0x0001: // LD Rd,Z+ 156 | m_op_funcs[op] = &avr8_device::op_ldzi; 157 | m_op_cycles[op] = 2; 158 | break; 159 | case 0x0002: // LD Rd,-Z 160 | m_op_funcs[op] = &avr8_device::op_ldzd; 161 | m_op_cycles[op] = 2; 162 | break; 163 | case 0x0004: // LPM Rd,Z 164 | m_op_funcs[op] = &avr8_device::op_lpmz; 165 | m_op_cycles[op] = 3; 166 | break; 167 | case 0x0005: // LPM Rd,Z+ 168 | m_op_funcs[op] = &avr8_device::op_lpmzi; 169 | m_op_cycles[op] = 3; 170 | break; 171 | case 0x0006: // ELPM Rd,Z 172 | m_op_funcs[op] = &avr8_device::op_elpmz; 173 | m_op_cycles[op] = 3; 174 | break; 175 | case 0x0007: // ELPM Rd,Z+ 176 | m_op_funcs[op] = &avr8_device::op_elpmzi; 177 | m_op_cycles[op] = 3; 178 | break; 179 | case 0x0009: // LD Rd,Y+ 180 | m_op_funcs[op] = &avr8_device::op_ldyi; 181 | m_op_cycles[op] = 2; 182 | break; 183 | case 0x000a: // LD Rd,-Y 184 | m_op_funcs[op] = &avr8_device::op_ldyd; 185 | m_op_cycles[op] = 2; 186 | break; 187 | case 0x000c: // LD Rd,X 188 | m_op_funcs[op] = &avr8_device::op_ldx; 189 | m_op_cycles[op] = 2; 190 | break; 191 | case 0x000d: // LD Rd,X+ 192 | m_op_funcs[op] = &avr8_device::op_ldxi; 193 | m_op_cycles[op] = 2; 194 | break; 195 | case 0x000e: // LD Rd,-X 196 | m_op_funcs[op] = &avr8_device::op_ldxd; 197 | m_op_cycles[op] = 2; 198 | break; 199 | case 0x000f: // POP Rd 200 | m_op_funcs[op] = &avr8_device::op_pop; 201 | m_op_cycles[op] = 2; 202 | break; 203 | default: 204 | m_op_funcs[op] = &avr8_device::op_unimpl; 205 | break; 206 | } 207 | break; 208 | case 0x0200: 209 | case 0x0300: 210 | switch (op & 0x000f) 211 | { 212 | case 0x0000: // STS k,Rr 213 | m_op_funcs[op] = &avr8_device::op_sts; 214 | m_op_cycles[op] = 2; 215 | break; 216 | case 0x0001: // ST Z+,Rd 217 | m_op_funcs[op] = &avr8_device::op_stzi; 218 | m_op_cycles[op] = 2; 219 | break; 220 | case 0x0002: // ST -Z,Rd 221 | m_op_funcs[op] = &avr8_device::op_stzd; 222 | m_op_cycles[op] = 2; 223 | break; 224 | case 0x0009: // ST Y+,Rd 225 | m_op_funcs[op] = &avr8_device::op_styi; 226 | m_op_cycles[op] = 2; 227 | break; 228 | case 0x000a: // ST -Y,Rd 229 | m_op_funcs[op] = &avr8_device::op_styd; 230 | m_op_cycles[op] = 2; 231 | break; 232 | case 0x000c: // ST X,Rd 233 | m_op_funcs[op] = &avr8_device::op_stx; 234 | break; 235 | case 0x000d: // ST X+,Rd 236 | m_op_funcs[op] = &avr8_device::op_stxi; 237 | m_op_cycles[op] = 2; 238 | break; 239 | case 0x000e: // ST -X,Rd 240 | m_op_funcs[op] = &avr8_device::op_stxd; 241 | m_op_cycles[op] = 2; 242 | break; 243 | case 0x000f: // PUSH Rd 244 | m_op_funcs[op] = &avr8_device::op_push; 245 | m_op_cycles[op] = 2; 246 | break; 247 | default: 248 | m_op_funcs[op] = &avr8_device::op_unimpl; 249 | break; 250 | } 251 | break; 252 | case 0x0400: 253 | switch (op & 0x000f) 254 | { 255 | case 0x0000: // COM Rd 256 | m_op_funcs[op] = &avr8_device::op_com; 257 | break; 258 | case 0x0001: // NEG Rd 259 | m_op_funcs[op] = &avr8_device::op_neg; 260 | break; 261 | case 0x0002: // SWAP Rd 262 | m_op_funcs[op] = &avr8_device::op_swap; 263 | break; 264 | case 0x0003: // INC Rd 265 | m_op_funcs[op] = &avr8_device::op_inc; 266 | break; 267 | case 0x0005: // ASR Rd 268 | m_op_funcs[op] = &avr8_device::op_asr; 269 | break; 270 | case 0x0006: // LSR Rd 271 | m_op_funcs[op] = &avr8_device::op_lsr; 272 | break; 273 | case 0x0007: // ROR Rd 274 | m_op_funcs[op] = &avr8_device::op_ror; 275 | break; 276 | case 0x0008: 277 | switch (op & 0x00f0) 278 | { 279 | case 0x0000: // SEC 280 | case 0x0010: // SEZ 281 | case 0x0020: // SEN 282 | case 0x0030: // SEV 283 | case 0x0040: // SES 284 | case 0x0050: // SEH 285 | case 0x0060: // SET 286 | case 0x0070: // SEI 287 | m_op_funcs[op] = &avr8_device::op_setf; 288 | break; 289 | case 0x0080: // CLC 290 | case 0x0090: // CLZ 291 | case 0x00a0: // CLN 292 | case 0x00b0: // CLV 293 | case 0x00c0: // CLS 294 | case 0x00d0: // CLH 295 | case 0x00e0: // CLT 296 | case 0x00f0: // CLI 297 | m_op_funcs[op] = &avr8_device::op_clrf; 298 | break; 299 | } 300 | break; 301 | case 0x0009: 302 | switch (op & 0x00f0) 303 | { 304 | case 0x0000: // IJMP 305 | m_op_funcs[op] = &avr8_device::op_ijmp; 306 | m_op_cycles[op] = 2; 307 | break; 308 | case 0x0010: // EIJMP 309 | m_op_funcs[op] = &avr8_device::op_eijmp; 310 | m_op_cycles[op] = 2; 311 | break; 312 | default: 313 | m_op_funcs[op] = &avr8_device::op_unimpl; 314 | break; 315 | } 316 | break; 317 | case 0x000a: // DEC Rd 318 | m_op_funcs[op] = &avr8_device::op_dec; 319 | break; 320 | case 0x000c: 321 | case 0x000d: // JMP k 322 | m_op_funcs[op] = &avr8_device::op_jmp; 323 | m_op_cycles[op] = 3; 324 | break; 325 | case 0x000e: // CALL k 326 | case 0x000f: 327 | m_op_funcs[op] = &avr8_device::op_call; 328 | m_op_cycles[op] = 4; 329 | break; 330 | default: 331 | m_op_funcs[op] = &avr8_device::op_unimpl; 332 | break; 333 | } 334 | break; 335 | case 0x0500: 336 | switch (op & 0x000f) 337 | { 338 | case 0x0000: // COM Rd 339 | m_op_funcs[op] = &avr8_device::op_com; 340 | break; 341 | case 0x0001: // NEG Rd 342 | m_op_funcs[op] = &avr8_device::op_neg; 343 | break; 344 | case 0x0002: // SWAP Rd 345 | m_op_funcs[op] = &avr8_device::op_swap; 346 | break; 347 | case 0x0003: // INC Rd 348 | m_op_funcs[op] = &avr8_device::op_inc; 349 | break; 350 | case 0x0005: // ASR Rd 351 | m_op_funcs[op] = &avr8_device::op_asr; 352 | break; 353 | case 0x0006: // LSR Rd 354 | m_op_funcs[op] = &avr8_device::op_lsr; 355 | break; 356 | case 0x0007: // ROR Rd 357 | m_op_funcs[op] = &avr8_device::op_ror; 358 | break; 359 | case 0x0008: 360 | switch (op & 0x00f0) 361 | { 362 | case 0x0000: // RET 363 | m_op_funcs[op] = &avr8_device::op_ret; 364 | m_op_cycles[op] = 4; 365 | break; 366 | case 0x0010: // RETI 367 | m_op_funcs[op] = &avr8_device::op_reti; 368 | m_op_cycles[op] = 4; 369 | break; 370 | case 0x0080: // SLEEP 371 | m_op_funcs[op] = &avr8_device::op_sleep; 372 | m_op_cycles[op] = 1; 373 | break; 374 | case 0x0090: // BREAK 375 | m_op_funcs[op] = &avr8_device::op_unimpl; 376 | break; 377 | case 0x00a0: // WDR 378 | m_op_funcs[op] = &avr8_device::op_wdr; 379 | break; 380 | case 0x00c0: // LPM 381 | m_op_funcs[op] = &avr8_device::op_lpm; 382 | m_op_cycles[op] = 3; 383 | break; 384 | case 0x00d0: // ELPM 385 | m_op_funcs[op] = &avr8_device::op_elpm; 386 | break; 387 | case 0x00e0: // SPM 388 | m_op_funcs[op] = &avr8_device::op_spm; 389 | break; 390 | case 0x00f0: // SPM Z+ 391 | m_op_funcs[op] = &avr8_device::op_spmzi; 392 | break; 393 | default: 394 | m_op_funcs[op] = &avr8_device::op_unimpl; 395 | break; 396 | } 397 | break; 398 | case 0x0009: 399 | switch (op & 0x00f0) 400 | { 401 | case 0x0000: // ICALL 402 | m_op_funcs[op] = &avr8_device::op_icall; 403 | m_op_cycles[op] = 3; 404 | break; 405 | case 0x0010: // EICALL 406 | m_op_funcs[op] = &avr8_device::op_eicall; 407 | break; 408 | default: 409 | m_op_funcs[op] = &avr8_device::op_unimpl; 410 | break; 411 | } 412 | break; 413 | case 0x000a: // DEC Rd 414 | m_op_funcs[op] = &avr8_device::op_dec; 415 | break; 416 | case 0x000c: 417 | case 0x000d: // JMP k 418 | m_op_funcs[op] = &avr8_device::op_jmp; 419 | m_op_cycles[op] = 3; 420 | break; 421 | case 0x000e: 422 | case 0x000f: // CALL k 423 | m_op_funcs[op] = &avr8_device::op_call; 424 | m_op_cycles[op] = 4; 425 | break; 426 | } 427 | break; 428 | case 0x0600: // ADIW Rd+1:Rd,K 429 | m_op_funcs[op] = &avr8_device::op_adiw; 430 | m_op_cycles[op] = 2; 431 | break; 432 | case 0x0700: // SBIW Rd+1:Rd,K 433 | m_op_funcs[op] = &avr8_device::op_sbiw; 434 | m_op_cycles[op] = 2; 435 | break; 436 | case 0x0800: // CBI A,b 437 | m_op_funcs[op] = &avr8_device::op_cbi; 438 | m_op_cycles[op] = 2; 439 | break; 440 | case 0x0900: // SBIC A,b 441 | m_op_funcs[op] = &avr8_device::op_sbic; 442 | break; 443 | case 0x0a00: // SBI A,b 444 | m_op_funcs[op] = &avr8_device::op_sbi; 445 | m_op_cycles[op] = 2; 446 | break; 447 | case 0x0b00: // SBIS A,b 448 | m_op_funcs[op] = &avr8_device::op_sbis; 449 | break; 450 | case 0x0c00: 451 | case 0x0d00: 452 | case 0x0e00: 453 | case 0x0f00: // MUL Rd,Rr 454 | m_op_funcs[op] = &avr8_device::op_mul; 455 | m_op_cycles[op] = 2; 456 | break; 457 | } 458 | break; 459 | case 0xb000: 460 | if (op & 0x0800) // OUT A,Rr 461 | { 462 | m_op_funcs[op] = &avr8_device::op_out; 463 | } 464 | else // IN Rd,A 465 | { 466 | m_op_funcs[op] = &avr8_device::op_in; 467 | } 468 | break; 469 | case 0xc000: // RJMP k 470 | m_op_funcs[op] = &avr8_device::op_rjmp; 471 | m_op_cycles[op] = 2; 472 | break; 473 | case 0xd000: // RCALL k 474 | m_op_funcs[op] = &avr8_device::op_rcall; 475 | m_op_cycles[op] = 3; 476 | break; 477 | case 0xe000: // LDI Rd,K 478 | m_op_funcs[op] = &avr8_device::op_ldi; 479 | break; 480 | case 0xf000: 481 | switch (op & 0x0c00) 482 | { 483 | case 0x0000: // BRLO through BRIE 484 | m_op_funcs[op] = &avr8_device::op_brset; 485 | break; 486 | case 0x0400: // BRSH through BRID 487 | m_op_funcs[op] = &avr8_device::op_brclr; 488 | break; 489 | case 0x0800: 490 | if (op & 0x0200) // BST Rd, b 491 | { 492 | m_op_funcs[op] = &avr8_device::op_bst; 493 | } 494 | else // BLD Rd, b 495 | { 496 | m_op_funcs[op] = &avr8_device::op_bld; 497 | } 498 | break; 499 | case 0x0c00: 500 | if (op & 0x0200) // SBRS Rd, b 501 | { 502 | m_op_funcs[op] = &avr8_device::op_sbrs; 503 | } 504 | else // SBRC Rd, b 505 | { 506 | m_op_funcs[op] = &avr8_device::op_sbrc; 507 | } 508 | break; 509 | } 510 | break; 511 | } 512 | } 513 | } 514 | 515 | void avr8_device::populate_add_flag_cache() 516 | { 517 | for (uint16_t rd = 0; rd < 0x100; rd++) 518 | { 519 | for (uint16_t rr = 0; rr < 0x100; rr++) 520 | { 521 | const uint8_t res = rd + rr; 522 | uint8_t flags = 0; 523 | flags |= (((rd & 8) && (rr & 8)) || ((rr & 8) && !(res & 8)) || (!(res & 8) && (rd & 8))) ? AVR8_SREG_MASK_H : 0; 524 | flags |= (((rd & 0x80) && (rr & 0x80) && !(res & 0x80)) | (!(rd & 0x80) & !(rr & 0x80) & (res & 0x80))) ? AVR8_SREG_MASK_V : 0; 525 | flags |= (res & 0x80) ? AVR8_SREG_MASK_N : 0; 526 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_V)) ? AVR8_SREG_MASK_S : 0; 527 | flags |= (res == 0) ? AVR8_SREG_MASK_Z : 0; 528 | flags |= (((rd & 0x80) && (rr & 0x80)) || ((rr & 0x80) && !(res & 0x80)) || (!(res & 0x80) && (rd & 0x80))) ? AVR8_SREG_MASK_C : 0; 529 | m_add_flag_cache[(rd << 8) | rr] = flags; 530 | } 531 | } 532 | } 533 | 534 | void avr8_device::populate_adc_flag_cache() 535 | { 536 | for (uint16_t rd = 0; rd < 0x100; rd++) 537 | { 538 | for (uint16_t rr = 0; rr < 0x100; rr++) 539 | { 540 | for (uint8_t c = 0; c < 2; c++) 541 | { 542 | const uint8_t res = rd + rr + c; 543 | uint8_t flags = 0; 544 | flags |= (((rd & 8) && (rr & 8)) || ((rr & 8) && !(res & 8)) || (!(res & 8) && (rd & 8))) ? AVR8_SREG_MASK_H : 0; 545 | flags |= (((rd & 0x80) && (rr & 0x80) && !(res & 0x80)) | (!(rd & 0x80) & !(rr & 0x80) & (res & 0x80))) ? AVR8_SREG_MASK_V : 0; 546 | flags |= (res & 0x80) ? AVR8_SREG_MASK_N : 0; 547 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_V)) ? AVR8_SREG_MASK_S : 0; 548 | flags |= (res == 0) ? AVR8_SREG_MASK_Z : 0; 549 | flags |= (((rd & 0x80) && (rr & 0x80)) || ((rr & 0x80) && !(res & 0x80)) || (!(res & 0x80) && (rd & 0x80))) ? AVR8_SREG_MASK_C : 0; 550 | m_adc_flag_cache[(c << 16) | (rd << 8) | rr] = flags; 551 | } 552 | } 553 | } 554 | } 555 | 556 | void avr8_device::populate_sub_flag_cache() 557 | { 558 | for (uint16_t rd = 0; rd < 0x100; rd++) 559 | { 560 | for (uint16_t rr = 0; rr < 0x100; rr++) 561 | { 562 | const uint8_t res = rd - rr; 563 | uint8_t flags = 0; 564 | flags |= ((!(rd & 8) && (rr & 8)) || ((rr & 8) && (res & 8)) || ((res & 8) && !(rd & 8))) ? AVR8_SREG_MASK_H : 0; 565 | flags |= (((rd & 0x80) && !(rr & 0x80) && !(res & 0x80)) || (!(rd & 0x80) && (rr & 0x80) && (res & 0x80))) ? AVR8_SREG_MASK_V : 0; 566 | flags |= (res & 0x80) ? AVR8_SREG_MASK_N : 0; 567 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_V)) ? AVR8_SREG_MASK_S : 0; 568 | flags |= (res == 0) ? AVR8_SREG_MASK_Z : 0; 569 | flags |= ((!(rd & 0x80) && (rr & 0x80)) || ((rr & 0x80) && (res & 0x80)) || ((res & 0x80) && !(rd & 0x80))) ? AVR8_SREG_MASK_C : 0; 570 | m_sub_flag_cache[(rd << 8) | rr] = flags; 571 | } 572 | } 573 | } 574 | 575 | void avr8_device::populate_sbc_flag_cache() 576 | { 577 | for (uint16_t rd = 0; rd < 0x100; rd++) 578 | { 579 | for (uint16_t rr = 0; rr < 0x100; rr++) 580 | { 581 | for (uint8_t c = 0; c < 2; c++) 582 | { 583 | for (uint8_t z = 0; z < 2; z++) 584 | { 585 | const uint8_t res = rd - (rr + c); 586 | uint8_t flags = 0; 587 | flags |= ((!(rd & 8) && (rr & 8)) || ((rr & 8) && (res & 8)) || ((res & 8) && !(rd & 8))) ? AVR8_SREG_MASK_H : 0; 588 | flags |= (((rd & 0x80) && !(rr & 0x80) && !(res & 0x80)) || (!(rd & 0x80) && (rr & 0x80) && (res & 0x80))) ? AVR8_SREG_MASK_V : 0; 589 | flags |= (res & 0x80) ? AVR8_SREG_MASK_N : 0; 590 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_V)) ? AVR8_SREG_MASK_S : 0; 591 | flags |= (res == 0) ? (z ? AVR8_SREG_MASK_Z : 0) : 0; 592 | flags |= ((!(rd & 0x80) && (rr & 0x80)) || ((rr & 0x80) && (res & 0x80)) || ((res & 0x80) && !(rd & 0x80))) ? AVR8_SREG_MASK_C : 0; 593 | m_sbc_flag_cache[(z << 17) | (c << 16) | (rd << 8) | rr] = flags; 594 | } 595 | } 596 | } 597 | } 598 | } 599 | 600 | void avr8_device::populate_bool_flag_cache() 601 | { 602 | for (uint16_t res = 0; res < 0x100; res++) 603 | { 604 | uint8_t flags = 0; 605 | flags |= (res & 0x80) ? AVR8_SREG_MASK_N : 0; 606 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_V)) ? AVR8_SREG_MASK_S : 0; 607 | flags |= (res == 0) ? AVR8_SREG_MASK_Z : 0; 608 | m_bool_flag_cache[res] = flags; 609 | } 610 | } 611 | 612 | void avr8_device::populate_shift_flag_cache() 613 | { 614 | for (uint16_t rd = 0; rd < 0x100; rd++) 615 | { 616 | for (uint16_t res = 0; res < 0x100; res++) 617 | { 618 | uint8_t flags = 0; 619 | flags |= (rd & 1) ? AVR8_SREG_MASK_C : 0; 620 | flags |= (res == 0) ? AVR8_SREG_MASK_Z : 0; 621 | flags |= (rd & 0x80) ? AVR8_SREG_MASK_N : 0; 622 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_C)) ? AVR8_SREG_MASK_V : 0; 623 | flags |= ((SREG & AVR8_SREG_MASK_N) != (SREG & AVR8_SREG_MASK_V)) ? AVR8_SREG_MASK_S : 0; 624 | m_shift_flag_cache[(rd << 8) | res] = flags; 625 | } 626 | } 627 | } 628 | 629 | void avr8_device::op_nop(uint16_t op) 630 | { 631 | } 632 | 633 | void avr8_device::op_movw(uint16_t op) 634 | { 635 | m_r[(RD4(op) << 1) + 1] = m_r[(RR4(op) << 1) + 1]; 636 | m_r[RD4(op) << 1] = m_r[RR4(op) << 1]; 637 | } 638 | 639 | void avr8_device::op_muls(uint16_t op) 640 | { 641 | const int16_t sd = (int8_t)m_r[16 + RD4(op)] * (int8_t)m_r[16 + RR4(op)]; 642 | m_r[1] = (sd >> 8) & 0x00ff; 643 | m_r[0] = sd & 0x00ff; 644 | SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0); 645 | SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0); 646 | } 647 | 648 | void avr8_device::op_mulsu(uint16_t op) 649 | { 650 | const int16_t sd = (int8_t)m_r[16 + RD3(op)] * (uint8_t)m_r[16 + RR3(op)]; 651 | m_r[1] = (sd >> 8) & 0x00ff; 652 | m_r[0] = sd & 0x00ff; 653 | SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0); 654 | SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0); 655 | } 656 | 657 | void avr8_device::op_fmul(uint16_t op) 658 | { 659 | const int16_t sd = ((uint8_t)m_r[16 + RD3(op)] * (uint8_t)m_r[16 + RR3(op)]) << 1; 660 | m_r[1] = (sd >> 8) & 0x00ff; 661 | m_r[0] = sd & 0x00ff; 662 | SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0); 663 | SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0); 664 | } 665 | 666 | void avr8_device::op_fmuls(uint16_t op) 667 | { 668 | const int16_t sd = ((int8_t)m_r[16 + RD3(op)] * (int8_t)m_r[16 + RR3(op)]) << 1; 669 | m_r[1] = (sd >> 8) & 0x00ff; 670 | m_r[0] = sd & 0x00ff; 671 | SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0); 672 | SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0); 673 | } 674 | 675 | void avr8_device::op_fmulsu(uint16_t op) 676 | { 677 | const int16_t sd = ((int8_t)m_r[16 + RD3(op)] * (uint8_t)m_r[16 + RR3(op)]) << 1; 678 | m_r[1] = (sd >> 8) & 0x00ff; 679 | m_r[0] = sd & 0x00ff; 680 | SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0); 681 | SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0); 682 | } 683 | 684 | void avr8_device::op_cpc(uint16_t op) 685 | { 686 | const uint8_t rd = m_r[RD5(op)]; 687 | const uint8_t rr = m_r[RR5(op)]; 688 | const uint8_t c = SREG & AVR8_SREG_MASK_C; 689 | const uint32_t z = (SREG & AVR8_SREG_MASK_Z) ? (1 << 17) : 0; 690 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 691 | SREG |= m_sbc_flag_cache[z | (c << 16) | (rd << 8) | rr]; 692 | } 693 | 694 | void avr8_device::op_sbc(uint16_t op) 695 | { 696 | const uint8_t rd = m_r[RD5(op)]; 697 | const uint8_t rr = m_r[RR5(op)]; 698 | const uint8_t c = SREG & AVR8_SREG_MASK_C; 699 | const uint8_t res = rd - (rr + c); 700 | m_r[RD5(op)] = res; 701 | const uint32_t z = (SREG & AVR8_SREG_MASK_Z) ? (1 << 17) : 0; 702 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 703 | SREG |= m_sbc_flag_cache[z | (c << 16) | (rd << 8) | rr]; 704 | } 705 | 706 | void avr8_device::op_add(uint16_t op) 707 | { 708 | const uint8_t rd = m_r[RD5(op)]; 709 | const uint8_t rr = m_r[RR5(op)]; 710 | const uint8_t res = rd + rr; 711 | m_r[RD5(op)] = res; 712 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 713 | SREG |= m_add_flag_cache[(rd << 8) | rr]; 714 | } 715 | 716 | void avr8_device::op_cpse(uint16_t op) 717 | { 718 | const uint8_t rd = m_r[RD5(op)]; 719 | const uint8_t rr = m_r[RR5(op)]; 720 | if (rd == rr) 721 | { 722 | const uint16_t data = (uint32_t)m_program->read_word(m_shifted_pc + 2); 723 | m_opcycles += is_long_opcode(data) ? 2 : 1; 724 | m_pc += is_long_opcode(data) ? 2 : 1; 725 | } 726 | } 727 | 728 | void avr8_device::op_cp(uint16_t op) 729 | { 730 | const uint8_t rd = m_r[RD5(op)]; 731 | const uint8_t rr = m_r[RR5(op)]; 732 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 733 | SREG |= m_sub_flag_cache[(rd << 8) | rr]; 734 | } 735 | 736 | void avr8_device::op_sub(uint16_t op) 737 | { 738 | const uint8_t rd = m_r[RD5(op)]; 739 | const uint8_t rr = m_r[RR5(op)]; 740 | const uint8_t res = rd - rr; 741 | m_r[RD5(op)] = res; 742 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 743 | SREG |= m_sub_flag_cache[(rd << 8) | rr]; 744 | } 745 | 746 | void avr8_device::op_adc(uint16_t op) 747 | { 748 | const uint8_t rd = m_r[RD5(op)]; 749 | const uint8_t rr = m_r[RR5(op)]; 750 | const uint8_t c = SREG & AVR8_SREG_MASK_C; 751 | const uint8_t res = rd + rr + c; 752 | m_r[RD5(op)] = res; 753 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 754 | SREG |= m_adc_flag_cache[(c << 16) | (rd << 8) | rr]; 755 | } 756 | 757 | void avr8_device::op_and(uint16_t op) 758 | { 759 | const uint8_t res = m_r[RD5(op)] & m_r[RR5(op)]; 760 | m_r[RD5(op)] = res; 761 | SREG &= ~(AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z); 762 | SREG |= m_bool_flag_cache[res]; 763 | } 764 | 765 | void avr8_device::op_eor(uint16_t op) 766 | { 767 | const uint8_t res = m_r[RD5(op)] ^ m_r[RR5(op)]; 768 | m_r[RD5(op)] = res; 769 | SREG &= ~(AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z); 770 | SREG |= m_bool_flag_cache[res]; 771 | } 772 | 773 | void avr8_device::op_or(uint16_t op) 774 | { 775 | const uint8_t res = m_r[RD5(op)] | m_r[RR5(op)]; 776 | m_r[RD5(op)] = res; 777 | SREG &= ~(AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z); 778 | SREG |= m_bool_flag_cache[res]; 779 | } 780 | 781 | void avr8_device::op_mov(uint16_t op) 782 | { 783 | m_r[RD5(op)] = m_r[RR5(op)]; 784 | } 785 | 786 | void avr8_device::op_cpi(uint16_t op) 787 | { 788 | const uint8_t rd = m_r[16 + RD4(op)]; 789 | const uint8_t rr = KCONST8(op); 790 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 791 | SREG |= m_sub_flag_cache[(rd << 8) | rr]; 792 | } 793 | 794 | void avr8_device::op_sbci(uint16_t op) 795 | { 796 | const uint8_t rd = m_r[16 + RD4(op)]; 797 | const uint8_t rr = KCONST8(op); 798 | const uint8_t c = SREG & AVR8_SREG_MASK_C; 799 | const uint8_t res = rd - (rr + c); 800 | m_r[16 + RD4(op)] = res; 801 | const uint32_t z = (SREG & AVR8_SREG_MASK_Z) ? (1 << 17) : 0; 802 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 803 | SREG |= m_sbc_flag_cache[z | (c << 16) | (rd << 8) | rr]; 804 | } 805 | 806 | void avr8_device::op_subi(uint16_t op) 807 | { 808 | const uint8_t rd = m_r[16 + RD4(op)]; 809 | const uint8_t rr = KCONST8(op); 810 | const uint8_t res = rd - rr; 811 | m_r[16 + RD4(op)] = res; 812 | SREG &= ~(AVR8_SREG_MASK_H | AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_C); 813 | SREG |= m_sub_flag_cache[(rd << 8) | rr]; 814 | } 815 | 816 | void avr8_device::op_ori(uint16_t op) 817 | { 818 | const uint8_t res = m_r[16 + RD4(op)] | KCONST8(op); 819 | m_r[16 + RD4(op)] = res; 820 | SREG &= ~(AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z); 821 | SREG |= m_bool_flag_cache[res]; 822 | } 823 | 824 | void avr8_device::op_andi(uint16_t op) 825 | { 826 | const uint8_t res = m_r[16 + RD4(op)] & KCONST8(op); 827 | m_r[16 + RD4(op)] = res; 828 | SREG &= ~(AVR8_SREG_MASK_V | AVR8_SREG_MASK_N | AVR8_SREG_MASK_S | AVR8_SREG_MASK_Z); 829 | SREG |= m_bool_flag_cache[res]; 830 | } 831 | 832 | void avr8_device::op_lddz(uint16_t op) 833 | { 834 | m_r[RD5(op)] = m_data->read_byte(ZREG + QCONST6(op)); 835 | } 836 | 837 | void avr8_device::op_lddy(uint16_t op) 838 | { 839 | m_r[RD5(op)] = m_data->read_byte(YREG + QCONST6(op)); 840 | } 841 | 842 | void avr8_device::op_stdz(uint16_t op) 843 | { 844 | m_data->write_byte(ZREG + QCONST6(op), m_r[RD5(op)]); 845 | } 846 | 847 | void avr8_device::op_stdy(uint16_t op) 848 | { 849 | m_data->write_byte(YREG + QCONST6(op), m_r[RD5(op)]); 850 | } 851 | 852 | void avr8_device::op_lds(uint16_t op) 853 | { 854 | m_pc++; 855 | m_shifted_pc += 2; 856 | const uint16_t addr = m_program->read_word(m_shifted_pc); 857 | m_r[RD5(op)] = m_data->read_byte(addr); 858 | } 859 | 860 | void avr8_device::op_ldzi(uint16_t op) 861 | { 862 | uint16_t pd = ZREG; 863 | m_r[RD5(op)] = m_data->read_byte(pd); 864 | pd++; 865 | m_r[31] = (pd >> 8) & 0x00ff; 866 | m_r[30] = pd & 0x00ff; 867 | } 868 | 869 | void avr8_device::op_ldzd(uint16_t op) 870 | { 871 | const uint16_t pd = ZREG - 1; 872 | m_r[RD5(op)] = m_data->read_byte(pd); 873 | m_r[31] = (pd >> 8) & 0x00ff; 874 | m_r[30] = pd & 0x00ff; 875 | } 876 | 877 | void avr8_device::op_lpmz(uint16_t op) 878 | { 879 | m_r[RD5(op)] = m_program->read_byte(ZREG); 880 | } 881 | 882 | void avr8_device::op_lpmzi(uint16_t op) 883 | { 884 | uint16_t pd = ZREG; 885 | m_r[RD5(op)] = m_program->read_byte(pd); 886 | pd++; 887 | m_r[31] = (pd >> 8) & 0x00ff; 888 | m_r[30] = pd & 0x00ff; 889 | } 890 | 891 | void avr8_device::op_elpmz(uint16_t op) 892 | { 893 | m_r[RD5(op)] = m_program->read_byte((m_r[AVR8_REGIDX_RAMPZ] << 16) | ZREG); 894 | } 895 | 896 | void avr8_device::op_elpmzi(uint16_t op) 897 | { 898 | uint32_t pd32 = (m_r[AVR8_REGIDX_RAMPZ] << 16) | ZREG; 899 | m_r[RD5(op)] = m_program->read_byte(pd32); 900 | pd32++; 901 | m_r[AVR8_REGIDX_RAMPZ] = (pd32 >> 16) & 0x00ff; 902 | m_r[31] = (pd32 >> 8) & 0x00ff; 903 | m_r[30] = pd32 & 0x00ff; 904 | } 905 | 906 | void avr8_device::op_ldyi(uint16_t op) 907 | { 908 | uint16_t pd = YREG; 909 | m_r[RD5(op)] = m_data->read_byte(pd); 910 | pd++; 911 | m_r[29] = (pd >> 8) & 0x00ff; 912 | m_r[28] = pd & 0x00ff; 913 | } 914 | 915 | void avr8_device::op_ldyd(uint16_t op) 916 | { 917 | const uint16_t pd = YREG - 1; 918 | m_r[RD5(op)] = m_data->read_byte(pd); 919 | m_r[29] = (pd >> 8) & 0x00ff; 920 | m_r[28] = pd & 0x00ff; 921 | } 922 | 923 | void avr8_device::op_ldx(uint16_t op) 924 | { 925 | m_r[RD5(op)] = m_data->read_byte(XREG); 926 | } 927 | 928 | void avr8_device::op_ldxi(uint16_t op) 929 | { 930 | uint16_t pd = XREG; 931 | m_r[RD5(op)] = m_data->read_byte(pd); 932 | pd++; 933 | m_r[27] = (pd >> 8) & 0x00ff; 934 | m_r[26] = pd & 0x00ff; 935 | } 936 | 937 | void avr8_device::op_ldxd(uint16_t op) 938 | { 939 | const uint16_t pd = XREG - 1; 940 | m_r[RD5(op)] = m_data->read_byte(pd); 941 | m_r[27] = (pd >> 8) & 0x00ff; 942 | m_r[26] = pd & 0x00ff; 943 | } 944 | 945 | void avr8_device::op_pop(uint16_t op) 946 | { 947 | m_r[RD5(op)] = pop(); 948 | } 949 | 950 | void avr8_device::op_sts(uint16_t op) 951 | { 952 | m_pc++; 953 | m_shifted_pc += 2; 954 | const uint16_t addr = m_program->read_word(m_shifted_pc); 955 | m_data->write_byte(addr, m_r[RD5(op)]); 956 | } 957 | 958 | void avr8_device::op_stzi(uint16_t op) 959 | { 960 | uint16_t pd = ZREG; 961 | m_data->write_byte(pd, m_r[RD5(op)]); 962 | pd++; 963 | m_r[31] = (pd >> 8) & 0x00ff; 964 | m_r[30] = pd & 0x00ff; 965 | } 966 | 967 | void avr8_device::op_stzd(uint16_t op) 968 | { 969 | const uint16_t pd = ZREG - 1; 970 | m_data->write_byte(pd, m_r[RD5(op)]); 971 | m_r[31] = (pd >> 8) & 0x00ff; 972 | m_r[30] = pd & 0x00ff; 973 | } 974 | 975 | void avr8_device::op_styi(uint16_t op) 976 | { 977 | uint16_t pd = YREG; 978 | m_data->write_byte(pd, m_r[RD5(op)]); 979 | pd++; 980 | m_r[29] = (pd >> 8) & 0x00ff; 981 | m_r[28] = pd & 0x00ff; 982 | } 983 | 984 | void avr8_device::op_styd(uint16_t op) 985 | { 986 | const uint16_t pd = YREG - 1; 987 | m_data->write_byte(pd, m_r[RD5(op)]); 988 | m_r[29] = (pd >> 8) & 0x00ff; 989 | m_r[28] = pd & 0x00ff; 990 | } 991 | 992 | void avr8_device::op_stx(uint16_t op) 993 | { 994 | m_data->write_byte(XREG, m_r[RD5(op)]); 995 | } 996 | 997 | void avr8_device::op_stxi(uint16_t op) 998 | { 999 | uint16_t pd = XREG; 1000 | m_data->write_byte(pd, m_r[RD5(op)]); 1001 | pd++; 1002 | m_r[27] = (pd >> 8) & 0x00ff; 1003 | m_r[26] = pd & 0x00ff; 1004 | } 1005 | 1006 | void avr8_device::op_stxd(uint16_t op) 1007 | { 1008 | const uint16_t pd = XREG - 1; 1009 | m_data->write_byte(pd, m_r[RD5(op)]); 1010 | m_r[27] = (pd >> 8) & 0x00ff; 1011 | m_r[26] = pd & 0x00ff; 1012 | } 1013 | 1014 | void avr8_device::op_push(uint16_t op) 1015 | { 1016 | push(m_r[RD5(op)]); 1017 | } 1018 | 1019 | void avr8_device::op_com(uint16_t op) 1020 | { 1021 | const uint8_t res = ~m_r[RD5(op)]; 1022 | SREG_W(AVR8_SREG_C, 1); 1023 | SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0); 1024 | SREG_W(AVR8_SREG_N, BIT(res,7)); 1025 | SREG_W(AVR8_SREG_V, 0); 1026 | SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V)); 1027 | m_r[RD5(op)] = res; 1028 | } 1029 | 1030 | void avr8_device::op_neg(uint16_t op) 1031 | { 1032 | const uint8_t rd = m_r[RD5(op)]; 1033 | const uint8_t res = 0 - rd; 1034 | SREG_W(AVR8_SREG_C, (res == 0) ? 0 : 1); 1035 | SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0); 1036 | SREG_W(AVR8_SREG_N, BIT(res,7)); 1037 | SREG_W(AVR8_SREG_V, (res == 0x80) ? 1 : 0); 1038 | SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V)); 1039 | SREG_W(AVR8_SREG_H, BIT(res,3) | BIT(rd,3)); 1040 | m_r[RD5(op)] = res; 1041 | } 1042 | 1043 | void avr8_device::op_swap(uint16_t op) 1044 | { 1045 | const uint8_t rd = m_r[RD5(op)]; 1046 | m_r[RD5(op)] = (rd >> 4) | (rd << 4); 1047 | } 1048 | 1049 | void avr8_device::op_inc(uint16_t op) 1050 | { 1051 | const uint8_t rd = m_r[RD5(op)]; 1052 | const uint8_t res = rd + 1; 1053 | SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0); 1054 | SREG_W(AVR8_SREG_N, BIT(res,7)); 1055 | SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V)); 1056 | SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0); 1057 | m_r[RD5(op)] = res; 1058 | } 1059 | 1060 | void avr8_device::op_asr(uint16_t op) 1061 | { 1062 | const uint8_t rd = m_r[RD5(op)]; 1063 | const uint8_t res = (rd & 0x80) | (rd >> 1); 1064 | SREG &= ~(AVR8_SREG_MASK_C | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_N | AVR8_SREG_MASK_V | AVR8_SREG_MASK_S); 1065 | SREG |= m_shift_flag_cache[(rd << 8) | res]; 1066 | m_r[RD5(op)] = res; 1067 | } 1068 | 1069 | void avr8_device::op_lsr(uint16_t op) 1070 | { 1071 | const uint8_t rd = m_r[RD5(op)]; 1072 | const uint8_t res = rd >> 1; 1073 | SREG &= ~(AVR8_SREG_MASK_C | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_N | AVR8_SREG_MASK_V | AVR8_SREG_MASK_S); 1074 | SREG |= m_shift_flag_cache[(rd << 8) | res]; 1075 | m_r[RD5(op)] = res; 1076 | } 1077 | 1078 | void avr8_device::op_ror(uint16_t op) 1079 | { 1080 | const uint8_t rd = m_r[RD5(op)]; 1081 | const uint8_t res = (rd >> 1) | (SREG_R(AVR8_SREG_C) << 7); 1082 | SREG &= ~(AVR8_SREG_MASK_C | AVR8_SREG_MASK_Z | AVR8_SREG_MASK_N | AVR8_SREG_MASK_V | AVR8_SREG_MASK_S); 1083 | SREG |= m_shift_flag_cache[(rd << 8) | res]; 1084 | m_r[RD5(op)] = res; 1085 | } 1086 | 1087 | void avr8_device::op_setf(uint16_t op) 1088 | { 1089 | SREG_W((op >> 4) & 0x07, 1); 1090 | } 1091 | 1092 | void avr8_device::op_clrf(uint16_t op) 1093 | { 1094 | SREG_W((op >> 4) & 0x07, 0); 1095 | } 1096 | 1097 | void avr8_device::op_ijmp(uint16_t op) 1098 | { 1099 | m_pc = ZREG - 1; 1100 | } 1101 | 1102 | void avr8_device::op_eijmp(uint16_t op) 1103 | { 1104 | m_pc = (m_r[AVR8_REGIDX_EIND] << 16 | ZREG) - 1; 1105 | } 1106 | 1107 | void avr8_device::op_dec(uint16_t op) 1108 | { 1109 | const uint8_t rd = m_r[RD5(op)]; 1110 | const uint8_t res = rd - 1; 1111 | SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0); 1112 | SREG_W(AVR8_SREG_N, BIT(res,7)); 1113 | SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V)); 1114 | SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0); 1115 | m_r[RD5(op)] = res; 1116 | } 1117 | 1118 | void avr8_device::op_jmp(uint16_t op) 1119 | { 1120 | uint32_t offs = KCONST22(op) << 16; 1121 | m_pc++; 1122 | m_shifted_pc += 2; 1123 | offs |= m_program->read_word(m_shifted_pc); 1124 | m_pc = offs; 1125 | m_pc--; 1126 | } 1127 | 1128 | void avr8_device::op_call(uint16_t op) 1129 | { 1130 | push((m_pc + 2) & 0x00ff); 1131 | push(((m_pc + 2) >> 8) & 0x00ff); 1132 | uint32_t offs = KCONST22(op) << 16; 1133 | m_pc++; 1134 | m_shifted_pc += 2; 1135 | offs |= m_program->read_word(m_shifted_pc); 1136 | m_pc = offs; 1137 | m_pc--; 1138 | } 1139 | 1140 | void avr8_device::op_ret(uint16_t op) 1141 | { 1142 | m_pc = pop() << 8; 1143 | m_pc |= pop(); 1144 | m_pc--; 1145 | } 1146 | 1147 | void avr8_device::op_reti(uint16_t op) 1148 | { 1149 | m_pc = pop() << 8; 1150 | m_pc |= pop(); 1151 | m_pc--; 1152 | SREG_W(AVR8_SREG_I, 1); 1153 | } 1154 | 1155 | void avr8_device::op_sleep(uint16_t op) 1156 | { 1157 | m_pc--; 1158 | } 1159 | 1160 | void avr8_device::op_break(uint16_t op) 1161 | { 1162 | op_unimpl(op); 1163 | } 1164 | 1165 | void avr8_device::op_wdr(uint16_t op) 1166 | { 1167 | LOGMASKED(LOG_WDOG, "%s: Watchdog reset opcode\n", machine().describe_context()); 1168 | op_unimpl(op); 1169 | } 1170 | 1171 | void avr8_device::op_lpm(uint16_t op) 1172 | { 1173 | m_r[0] = m_program->read_byte(ZREG); 1174 | } 1175 | 1176 | void avr8_device::op_elpm(uint16_t op) 1177 | { 1178 | op_unimpl(op); 1179 | } 1180 | 1181 | void avr8_device::op_spm(uint16_t op) 1182 | { 1183 | op_unimpl(op); 1184 | } 1185 | 1186 | void avr8_device::op_spmzi(uint16_t op) 1187 | { 1188 | op_unimpl(op); 1189 | } 1190 | 1191 | void avr8_device::op_icall(uint16_t op) 1192 | { 1193 | push((m_pc + 1) & 0x00ff); 1194 | push(((m_pc + 1) >> 8) & 0x00ff); 1195 | m_pc = ZREG; 1196 | m_pc--; 1197 | } 1198 | 1199 | void avr8_device::op_eicall(uint16_t op) 1200 | { 1201 | op_unimpl(op); 1202 | } 1203 | 1204 | void avr8_device::op_adiw(uint16_t op) 1205 | { 1206 | const uint8_t rd = m_r[24 + (DCONST(op) << 1)]; 1207 | const uint8_t rr = m_r[25 + (DCONST(op) << 1)]; 1208 | const uint16_t pd = ((rr << 8) | rd) + KCONST6(op); 1209 | SREG_W(AVR8_SREG_V, BIT(pd,15) & NOT(BIT(rr,7))); 1210 | SREG_W(AVR8_SREG_N, BIT(pd,15)); 1211 | SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V)); 1212 | SREG_W(AVR8_SREG_Z, (pd == 0) ? 1 : 0); 1213 | SREG_W(AVR8_SREG_C, NOT(BIT(pd,15)) & BIT(rr,7)); 1214 | m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff; 1215 | m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff; 1216 | } 1217 | 1218 | void avr8_device::op_sbiw(uint16_t op) 1219 | { 1220 | const uint8_t rd = m_r[24 + (DCONST(op) << 1)]; 1221 | const uint8_t rr = m_r[25 + (DCONST(op) << 1)]; 1222 | const uint16_t pd = ((rr << 8) | rd) - KCONST6(op); 1223 | SREG_W(AVR8_SREG_V, NOT(BIT(pd,15)) & BIT(rr,7)); 1224 | SREG_W(AVR8_SREG_N, BIT(pd,15)); 1225 | SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V)); 1226 | SREG_W(AVR8_SREG_Z, (pd == 0) ? 1 : 0); 1227 | SREG_W(AVR8_SREG_C, BIT(pd,15) & NOT(BIT(rr,7))); 1228 | m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff; 1229 | m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff; 1230 | } 1231 | 1232 | void avr8_device::op_cbi(uint16_t op) 1233 | { 1234 | m_data->write_byte(32 + ACONST5(op), m_data->read_byte(32 + ACONST5(op)) &~ (1 << RR3(op))); 1235 | } 1236 | 1237 | void avr8_device::op_sbic(uint16_t op) 1238 | { 1239 | if (!BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op))) 1240 | { 1241 | const uint16_t data = (uint32_t)m_program->read_word(m_shifted_pc + 2); 1242 | m_opcycles += is_long_opcode(data) ? 2 : 1; 1243 | m_pc += is_long_opcode(data) ? 2 : 1; 1244 | } 1245 | } 1246 | 1247 | void avr8_device::op_sbi(uint16_t op) 1248 | { 1249 | m_data->write_byte(32 + ACONST5(op), m_data->read_byte(32 + ACONST5(op)) | (1 << RR3(op))); 1250 | } 1251 | 1252 | void avr8_device::op_sbis(uint16_t op) 1253 | { 1254 | if (BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op))) 1255 | { 1256 | const uint16_t data = (uint32_t)m_program->read_word(m_shifted_pc + 2); 1257 | m_opcycles += is_long_opcode(data) ? 2 : 1; 1258 | m_pc += is_long_opcode(data) ? 2 : 1; 1259 | } 1260 | } 1261 | 1262 | void avr8_device::op_mul(uint16_t op) 1263 | { 1264 | const int16_t sd = (uint8_t)m_r[RD5(op)] * (uint8_t)m_r[RR5(op)]; 1265 | m_r[1] = (sd >> 8) & 0x00ff; 1266 | m_r[0] = sd & 0x00ff; 1267 | SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0); 1268 | SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0); 1269 | } 1270 | 1271 | void avr8_device::op_out(uint16_t op) 1272 | { 1273 | m_data->write_byte(32 + ACONST6(op), m_r[RD5(op)]); 1274 | } 1275 | 1276 | void avr8_device::op_in(uint16_t op) 1277 | { 1278 | m_r[RD5(op)] = m_data->read_byte(0x20 + ACONST6(op)); 1279 | } 1280 | 1281 | void avr8_device::op_rjmp(uint16_t op) 1282 | { 1283 | m_pc += (int32_t)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)); 1284 | } 1285 | 1286 | void avr8_device::op_rcall(uint16_t op) 1287 | { 1288 | const int32_t offs = (int32_t)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)); 1289 | push((m_pc + 1) & 0x00ff); 1290 | push(((m_pc + 1) >> 8) & 0x00ff); 1291 | m_pc += offs; 1292 | } 1293 | 1294 | void avr8_device::op_ldi(uint16_t op) 1295 | { 1296 | m_r[16 + RD4(op)] = KCONST8(op); 1297 | } 1298 | 1299 | void avr8_device::op_brset(uint16_t op) 1300 | { 1301 | if (SREG_R(op & 0x0007)) 1302 | { 1303 | m_pc += (((int32_t)(KCONST7(op)) << 25) >> 25); 1304 | m_opcycles++; 1305 | } 1306 | } 1307 | 1308 | void avr8_device::op_brclr(uint16_t op) 1309 | { 1310 | if (SREG_R(op & 0x0007) == 0) 1311 | { 1312 | m_pc += (((int32_t)(KCONST7(op)) << 25) >> 25); 1313 | m_opcycles++; 1314 | } 1315 | } 1316 | 1317 | void avr8_device::op_bst(uint16_t op) 1318 | { 1319 | SREG_W(AVR8_SREG_T, (BIT(m_r[RD5(op)], RR3(op))) ? 1 : 0); 1320 | } 1321 | 1322 | void avr8_device::op_bld(uint16_t op) 1323 | { 1324 | if (SREG_R(AVR8_SREG_T)) 1325 | { 1326 | m_r[RD5(op)] |= (1 << RR3(op)); 1327 | } 1328 | else 1329 | { 1330 | m_r[RD5(op)] &= ~(1 << RR3(op)); 1331 | } 1332 | } 1333 | 1334 | void avr8_device::op_sbrs(uint16_t op) 1335 | { 1336 | if (BIT(m_r[RD5(op)], RR3(op))) 1337 | { 1338 | const uint16_t data = (uint32_t)m_program->read_word(m_shifted_pc + 2); 1339 | m_opcycles += is_long_opcode(data) ? 2 : 1; 1340 | m_pc += is_long_opcode(data) ? 2 : 1; 1341 | } 1342 | } 1343 | 1344 | void avr8_device::op_sbrc(uint16_t op) 1345 | { 1346 | if (!BIT(m_r[RD5(op)], RR3(op))) 1347 | { 1348 | const uint16_t data = (uint32_t)m_program->read_word(m_shifted_pc + 2); 1349 | m_opcycles += is_long_opcode(data) ? 2 : 1; 1350 | m_pc += is_long_opcode(data) ? 2 : 1; 1351 | } 1352 | } 1353 | 1354 | void avr8_device::op_unimpl(uint16_t op) 1355 | { 1356 | unimplemented_opcode(op); 1357 | } 1358 | -------------------------------------------------------------------------------- /mame/src/mame/arcade.flt: -------------------------------------------------------------------------------- 1 | 1942.cpp 2 | 1943.cpp 3 | 1945kiii.cpp 4 | 20pacgal.cpp 5 | 24cdjuke.cpp 6 | 2mindril.cpp 7 | 30test.cpp 8 | 39in1.cpp 9 | 3do.cpp 10 | 3x3puzzl.cpp 11 | 40love.cpp 12 | 4enlinea.cpp 13 | 4enraya.cpp 14 | 4roses.cpp 15 | 5clown.cpp 16 | 8080bw.cpp 17 | 88games.cpp 18 | a1supply.cpp 19 | ace.cpp 20 | acefruit.cpp 21 | aces1.cpp 22 | acesp.cpp 23 | acommand.cpp 24 | actfancr.cpp 25 | adp.cpp 26 | aeroboto.cpp 27 | aerofgt.cpp 28 | age_candy.cpp 29 | airbustr.cpp 30 | airraid.cpp 31 | ajax.cpp 32 | akkaarrh.cpp 33 | albazc.cpp 34 | albazg.cpp 35 | aleck64.cpp 36 | aleisttl.cpp 37 | alg.cpp 38 | alien.cpp 39 | aliens.cpp 40 | alinvade.cpp 41 | allied.cpp 42 | alpha68k.cpp 43 | alpha68k_i.cpp 44 | alpha68k_n.cpp 45 | alvg.cpp 46 | amaticmg.cpp 47 | ambush.cpp 48 | amerihok.cpp 49 | ampoker2.cpp 50 | amspdwy.cpp 51 | amusco.cpp 52 | anes.cpp 53 | angelkds.cpp 54 | appoooh.cpp 55 | aquarium.cpp 56 | arabian.cpp 57 | arachnid.cpp 58 | arcadecl.cpp 59 | argus.cpp 60 | aristmk4.cpp 61 | aristmk5.cpp 62 | aristmk6.cpp 63 | arkanoid.cpp 64 | armedf.cpp 65 | arsystems.cpp 66 | artmagic.cpp 67 | ashnojoe.cpp 68 | asterix.cpp 69 | asteroid.cpp 70 | astinvad.cpp 71 | astrafr.cpp 72 | astrcorp.cpp 73 | astrocde.cpp 74 | astrof.cpp 75 | astropc.cpp 76 | asuka.cpp 77 | atarifb.cpp 78 | atarig1.cpp 79 | atarig42.cpp 80 | atarigt.cpp 81 | atarigx2.cpp 82 | atarisy1.cpp 83 | atarisy2.cpp 84 | atarisy4.cpp 85 | atarittl.cpp 86 | atari_s1.cpp 87 | atari_s2.cpp 88 | atetris.cpp 89 | atlantis.cpp 90 | atronic.cpp 91 | attckufo.cpp 92 | atvtrack.cpp 93 | avalnche.cpp 94 | avt.cpp 95 | aztarac.cpp 96 | backfire.cpp 97 | badlands.cpp 98 | badlandsbl.cpp 99 | bagman.cpp 100 | bailey.cpp 101 | balsente.cpp 102 | bankp.cpp 103 | baraduke.cpp 104 | barata.cpp 105 | barni.cpp 106 | bartop52.cpp 107 | batman.cpp 108 | battlane.cpp 109 | battlera.cpp 110 | battlex.cpp 111 | battlnts.cpp 112 | bbusters.cpp 113 | beaminv.cpp 114 | beathead.cpp 115 | beezer.cpp 116 | belatra.cpp 117 | berzerk.cpp 118 | bestleag.cpp 119 | bfcobra.cpp 120 | bfmsys83.cpp 121 | bfmsys85.cpp 122 | bfm_ad5sw.cpp 123 | bfm_sc1.cpp 124 | bfm_sc2.cpp 125 | bfm_sc4.cpp 126 | bfm_sc5sw.cpp 127 | bfm_swp.cpp 128 | bgt.cpp 129 | big10.cpp 130 | bigevglf.cpp 131 | bigkarnk_ms.cpp 132 | bigstrkb.cpp 133 | bingo.cpp 134 | bingoc.cpp 135 | bingoman.cpp 136 | bingor.cpp 137 | bingowav.cpp 138 | bionicc.cpp 139 | bishi.cpp 140 | bking.cpp 141 | blackt96.cpp 142 | bladestl.cpp 143 | blitz68k.cpp 144 | blktiger.cpp 145 | blktiger_ms.cpp 146 | blmbycar.cpp 147 | blockade.cpp 148 | blockhl.cpp 149 | blockout.cpp 150 | blocktax.cpp 151 | bloodbro.cpp 152 | bloodbro_ms.cpp 153 | blstroid.cpp 154 | blueprnt.cpp 155 | bmcbowl.cpp 156 | bmcpokr.cpp 157 | bnstars.cpp 158 | bntyhunt.cpp 159 | bogeyman.cpp 160 | bombjack.cpp 161 | boogwing.cpp 162 | bottom9.cpp 163 | bowltry.cpp 164 | boxer.cpp 165 | brkthru.cpp 166 | bsktball.cpp 167 | btime.cpp 168 | btoads.cpp 169 | bublbobl.cpp 170 | buggychl.cpp 171 | buster.cpp 172 | bwidow.cpp 173 | bwing.cpp 174 | by17.cpp 175 | by35.cpp 176 | by6803.cpp 177 | by68701.cpp 178 | byvid.cpp 179 | bzone.cpp 180 | cabal.cpp 181 | cabaret.cpp 182 | calchase.cpp 183 | calcune.cpp 184 | calomega.cpp 185 | calorie.cpp 186 | canyon.cpp 187 | capbowl.cpp 188 | capcom.cpp 189 | capr1.cpp 190 | caprcyc.cpp 191 | cardline.cpp 192 | carjmbre.cpp 193 | carpolo.cpp 194 | carrera.cpp 195 | castle.cpp 196 | caswin.cpp 197 | cave.cpp 198 | cavepc.cpp 199 | cb2001.cpp 200 | cball.cpp 201 | cbasebal.cpp 202 | cbuster.cpp 203 | ccastles.cpp 204 | cchance.cpp 205 | cchasm.cpp 206 | cclimber.cpp 207 | cdi.cpp 208 | cedar_magnet.cpp 209 | centiped.cpp 210 | cesclass.cpp 211 | cgang.cpp 212 | chaknpop.cpp 213 | cham24.cpp 214 | chameleonrx1.cpp 215 | champbas.cpp 216 | champbwl.cpp 217 | chanbara.cpp 218 | chance32.cpp 219 | changela.cpp 220 | changyu.cpp 221 | cheekyms.cpp 222 | chexx.cpp 223 | chicago.cpp 224 | chihiro.cpp 225 | chinagat.cpp 226 | chinsan.cpp 227 | chqflag.cpp 228 | chsuper.cpp 229 | cidelsa.cpp 230 | cinemat.cpp 231 | circus.cpp 232 | circusc.cpp 233 | cischeat.cpp 234 | citycon.cpp 235 | clayshoo.cpp 236 | cliffhgr.cpp 237 | cloak.cpp 238 | cloud9.cpp 239 | clowndwn.cpp 240 | clpoker.cpp 241 | clshroad.cpp 242 | cmmb.cpp 243 | cninja.cpp 244 | cntsteer.cpp 245 | cobra.cpp 246 | cocoloco.cpp 247 | coinmstr.cpp 248 | coinmvga.cpp 249 | combatsc.cpp 250 | comebaby.cpp 251 | commando.cpp 252 | compgolf.cpp 253 | contra.cpp 254 | coolpool.cpp 255 | coolridr.cpp 256 | cop01.cpp 257 | cops.cpp 258 | copsnrob.cpp 259 | corona.cpp 260 | cosmic.cpp 261 | cps1.cpp 262 | cps1bl_5205.cpp 263 | cps1bl_pic.cpp 264 | cps2.cpp 265 | cps3.cpp 266 | cpzodiac.cpp 267 | crbaloon.cpp 268 | crgolf.cpp 269 | crimfght.cpp 270 | cromptons.cpp 271 | crospang.cpp 272 | crospuzl.cpp 273 | crshrace.cpp 274 | crystal.cpp 275 | csplayh5.cpp 276 | cswat.cpp 277 | cubeqst.cpp 278 | cubo.cpp 279 | cultures.cpp 280 | cupidon.cpp 281 | cv1k.cpp 282 | cvs.cpp 283 | cwheel.cpp 284 | cyberbal.cpp 285 | cybertnk.cpp 286 | cybstorm.cpp 287 | cyclemb.cpp 288 | d9final.cpp 289 | dacholer.cpp 290 | dai3wksi.cpp 291 | dambustr.cpp 292 | darius.cpp 293 | darkmist.cpp 294 | darkseal.cpp 295 | daryde.cpp 296 | dassault.cpp 297 | dblcrown.cpp 298 | dblewing.cpp 299 | dbz.cpp 300 | dcheese.cpp 301 | dcon.cpp 302 | dday.cpp 303 | ddayjlc.cpp 304 | ddealer.cpp 305 | ddenlovr.cpp 306 | ddragon.cpp 307 | ddragon3.cpp 308 | ddribble.cpp 309 | ddz.cpp 310 | deadang.cpp 311 | dec0.cpp 312 | dec8.cpp 313 | deco156.cpp 314 | deco32.cpp 315 | decocass.cpp 316 | deco_ld.cpp 317 | deco_mlc.cpp 318 | deniam.cpp 319 | deshoros.cpp 320 | destroyr.cpp 321 | de_2.cpp 322 | de_3.cpp 323 | de_3b.cpp 324 | dfruit.cpp 325 | dgpix.cpp 326 | dietgo.cpp 327 | dinoking.cpp 328 | discoboy.cpp 329 | divebomb.cpp 330 | diverboy.cpp 331 | djboy.cpp 332 | djmain.cpp 333 | dkmb.cpp 334 | dkong.cpp 335 | dlair.cpp 336 | dlair2.cpp 337 | dmndrby.cpp 338 | docastle.cpp 339 | dogfgt.cpp 340 | dominob.cpp 341 | dooyong.cpp 342 | dorachan.cpp 343 | dotrikun.cpp 344 | dragrace.cpp 345 | drdmania.cpp 346 | dreambal.cpp 347 | dreamwld.cpp 348 | drgnmst.cpp 349 | dribling.cpp 350 | drmicro.cpp 351 | drtomy.cpp 352 | drw80pkr.cpp 353 | dunhuang.cpp 354 | dwarfd.cpp 355 | dynadice.cpp 356 | dynamoah.cpp 357 | dynax.cpp 358 | dynduke.cpp 359 | ecoinf1.cpp 360 | ecoinf2.cpp 361 | ecoinf3.cpp 362 | ecoinfr.cpp 363 | efdt.cpp 364 | egghunt.cpp 365 | electra.cpp 366 | embargo.cpp 367 | enigma2.cpp 368 | eolith.cpp 369 | eolith16.cpp 370 | epos.cpp 371 | eprom.cpp 372 | equites.cpp 373 | ertictac.cpp 374 | esd16.cpp 375 | esh.cpp 376 | espial.cpp 377 | esripsys.cpp 378 | ettrivia.cpp 379 | exedexes.cpp 380 | exerion.cpp 381 | exidy.cpp 382 | exidy440.cpp 383 | exidyttl.cpp 384 | expro02.cpp 385 | exprraid.cpp 386 | exterm.cpp 387 | extrema.cpp 388 | exzisus.cpp 389 | ez2d.cpp 390 | f-32.cpp 391 | f1gp.cpp 392 | famibox.cpp 393 | fantland.cpp 394 | fastfred.cpp 395 | fastinvaders.cpp 396 | fastlane.cpp 397 | fcombat.cpp 398 | fcrash.cpp 399 | feversoc.cpp 400 | ffantasy_ms.cpp 401 | fgoal.cpp 402 | finalizr.cpp 403 | fireball.cpp 404 | firebeat.cpp 405 | firefox.cpp 406 | firetrap.cpp 407 | firetrk.cpp 408 | fitfight.cpp 409 | flashbeats.cpp 410 | flicker.cpp 411 | flipjack.cpp 412 | flkatck.cpp 413 | flower.cpp 414 | flstory.cpp 415 | flyball.cpp 416 | foodf.cpp 417 | forte2.cpp 418 | fortecar.cpp 419 | freekick.cpp 420 | freeway.cpp 421 | fresh.cpp 422 | fromanc2.cpp 423 | fromance.cpp 424 | fruitpc.cpp 425 | fungames.cpp 426 | funkball.cpp 427 | funkybee.cpp 428 | funkyjet.cpp 429 | funtech.cpp 430 | funworld.cpp 431 | funybubl.cpp 432 | fuukifg2.cpp 433 | fuukifg3.cpp 434 | g627.cpp 435 | gaelco.cpp 436 | gaelco2.cpp 437 | gaelco3d.cpp 438 | gaelcopc.cpp 439 | gaiden.cpp 440 | gal3.cpp 441 | galaga.cpp 442 | galastrm.cpp 443 | galaxi.cpp 444 | galaxia.cpp 445 | galaxian.cpp 446 | galaxold.cpp 447 | galgame.cpp 448 | galgames.cpp 449 | galivan.cpp 450 | galpani2.cpp 451 | galpani3.cpp 452 | galpanic.cpp 453 | galpanic_ms.cpp 454 | galspnbl.cpp 455 | gambl186.cpp 456 | gamecstl.cpp 457 | gamemasters.cpp 458 | gameplan.cpp 459 | gammagic.cpp 460 | gamtor.cpp 461 | gaplus.cpp 462 | gatron.cpp 463 | gauntlet.cpp 464 | gberet.cpp 465 | gcpinbal.cpp 466 | gei.cpp 467 | ggconnie.cpp 468 | ghosteo.cpp 469 | giclassic.cpp 470 | gijoe.cpp 471 | ginganin.cpp 472 | gkigt.cpp 473 | gladiatr.cpp 474 | glass.cpp 475 | globalfr.cpp 476 | globalvr.cpp 477 | gluck2.cpp 478 | gng.cpp 479 | go2000.cpp 480 | goal92.cpp 481 | goindol.cpp 482 | gokidetor.cpp 483 | goldart.cpp 484 | goldngam.cpp 485 | goldnpkr.cpp 486 | goldstar.cpp 487 | gomoku.cpp 488 | good.cpp 489 | goodejan.cpp 490 | goori.cpp 491 | gotcha.cpp 492 | gottlieb.cpp 493 | gotya.cpp 494 | gpworld.cpp 495 | gp_1.cpp 496 | gp_2.cpp 497 | gradius3.cpp 498 | grchamp.cpp 499 | gridlee.cpp 500 | groundfx.cpp 501 | gsspade.cpp 502 | gstream.cpp 503 | gstriker.cpp 504 | gsword.cpp 505 | gticlub.cpp 506 | gts1.cpp 507 | gts3.cpp 508 | gts3a.cpp 509 | gts80.cpp 510 | gts80a.cpp 511 | gts80b.cpp 512 | guab.cpp 513 | gumbo.cpp 514 | gunbustr.cpp 515 | gundealr.cpp 516 | gunpey.cpp 517 | gunsmoke.cpp 518 | gyruss.cpp 519 | halleys.cpp 520 | hanaawas.cpp 521 | hankin.cpp 522 | hapyfish.cpp 523 | harddriv.cpp 524 | hazelgr.cpp 525 | hcastle.cpp 526 | headonb.cpp 527 | hexion.cpp 528 | hideseek.cpp 529 | higemaru.cpp 530 | highvdeo.cpp 531 | hikaru.cpp 532 | himesiki.cpp 533 | hitme.cpp 534 | hitpoker.cpp 535 | hnayayoi.cpp 536 | hng64.cpp 537 | holeland.cpp 538 | homedata.cpp 539 | homerun.cpp 540 | hornet.cpp 541 | hotblock.cpp 542 | hotstuff.cpp 543 | hshavoc.cpp 544 | hvyunit.cpp 545 | hyhoo.cpp 546 | hyperspt.cpp 547 | hyprduel.cpp 548 | icecold.cpp 549 | ice_bozopail.cpp 550 | ice_tbd.cpp 551 | ichiban.cpp 552 | idsa.cpp 553 | igs009.cpp 554 | igs011.cpp 555 | igs017.cpp 556 | igspc.cpp 557 | igspoker.cpp 558 | igs_fear.cpp 559 | igs_m027.cpp 560 | igs_m036.cpp 561 | ikki.cpp 562 | imolagp.cpp 563 | inder.cpp 564 | inderp.cpp 565 | instantm.cpp 566 | intrscti.cpp 567 | inufuku.cpp 568 | invqix.cpp 569 | iqblock.cpp 570 | irobot.cpp 571 | ironhors.cpp 572 | island.cpp 573 | istellar.cpp 574 | istrebiteli.cpp 575 | iteagle.cpp 576 | itech32.cpp 577 | itech8.cpp 578 | itgambl2.cpp 579 | itgambl3.cpp 580 | itgamble.cpp 581 | jack.cpp 582 | jackal.cpp 583 | jackie.cpp 584 | jackpool.cpp 585 | jaguar.cpp 586 | jailbrek.cpp 587 | jalmah.cpp 588 | jangou.cpp 589 | jankenmn.cpp 590 | jantotsu.cpp 591 | jchan.cpp 592 | jclub2.cpp 593 | jedi.cpp 594 | jeutel.cpp 595 | joctronic.cpp 596 | jokrwild.cpp 597 | jollyjgr.cpp 598 | jongkyo.cpp 599 | joystand.cpp 600 | jp.cpp 601 | jpmimpct.cpp 602 | jpmimpctsw.cpp 603 | jpmmps.cpp 604 | jpms80.cpp 605 | jpmsru.cpp 606 | jpmsys5.cpp 607 | jpmsys5sw.cpp 608 | jpmsys7.cpp 609 | jrpacman.cpp 610 | jubilee.cpp 611 | jungleyo.cpp 612 | junofrst.cpp 613 | jvh.cpp 614 | kaneko16.cpp 615 | kangaroo.cpp 616 | karnov.cpp 617 | kas89.cpp 618 | kchamp.cpp 619 | kenseim.cpp 620 | kickgoal.cpp 621 | kikikai.cpp 622 | kingdrby.cpp 623 | kingobox.cpp 624 | kingpin.cpp 625 | kinst.cpp 626 | kissproto.cpp 627 | klax.cpp 628 | kncljoe.cpp 629 | koftball.cpp 630 | koikoi.cpp 631 | konamigq.cpp 632 | konamigs.cpp 633 | konamigv.cpp 634 | konamigx.cpp 635 | konamim2.cpp 636 | konblands.cpp 637 | konendev.cpp 638 | konmedal.cpp 639 | konmedal68k.cpp 640 | kontest.cpp 641 | kopunch.cpp 642 | ksayakyu.cpp 643 | ksys573.cpp 644 | kungfur.cpp 645 | kurukuru.cpp 646 | kyugo.cpp 647 | labyrunr.cpp 648 | ladybug.cpp 649 | ladyfrog.cpp 650 | laserbas.cpp 651 | laserbat.cpp 652 | lasso.cpp 653 | lastbank.cpp 654 | lastduel.cpp 655 | lastfght.cpp 656 | lazercmd.cpp 657 | laz_aftrshok.cpp 658 | laz_ribrac.cpp 659 | lbeach.cpp 660 | lckydraw.cpp 661 | legionna.cpp 662 | leland.cpp 663 | lemmings.cpp 664 | lethal.cpp 665 | lethalj.cpp 666 | lgp.cpp 667 | liberate.cpp 668 | liberatr.cpp 669 | limenko.cpp 670 | lindbergh.cpp 671 | littlerb.cpp 672 | lkage.cpp 673 | lockon.cpp 674 | looping.cpp 675 | lordgun.cpp 676 | lsasquad.cpp 677 | ltcasino.cpp 678 | ltd.cpp 679 | luckgrln.cpp 680 | lucky37.cpp 681 | lucky74.cpp 682 | luckybal.cpp 683 | lvcards.cpp 684 | lwings.cpp 685 | m10.cpp 686 | m107.cpp 687 | m14.cpp 688 | m52.cpp 689 | m57.cpp 690 | m58.cpp 691 | m62.cpp 692 | m63.cpp 693 | m72.cpp 694 | m79amb.cpp 695 | m90.cpp 696 | m92.cpp 697 | macp.cpp 698 | macrossp.cpp 699 | macs.cpp 700 | madalien.cpp 701 | madmotor.cpp 702 | magic10.cpp 703 | magicard.cpp 704 | magicfly.cpp 705 | magictg.cpp 706 | magmax.cpp 707 | magreel.cpp 708 | magtouch.cpp 709 | mainevt.cpp 710 | mainsnk.cpp 711 | majorpkr.cpp 712 | malzak.cpp 713 | manohman.cpp 714 | mappy.cpp 715 | marineb.cpp 716 | marinedt.cpp 717 | mario.cpp 718 | markham.cpp 719 | marywu.cpp 720 | mastboy.cpp 721 | mastboyo.cpp 722 | matmania.cpp 723 | maxaflex.cpp 724 | maygay1bsw.cpp 725 | maygayep.cpp 726 | maygayew.cpp 727 | maygayv1.cpp 728 | mazerbla.cpp 729 | mcatadv.cpp 730 | mcr.cpp 731 | mcr3.cpp 732 | mcr68.cpp 733 | meadows.cpp 734 | meadwttl.cpp 735 | mediagx.cpp 736 | megadriv_acbl.cpp 737 | megaphx.cpp 738 | megaplay.cpp 739 | megasys1.cpp 740 | megatech.cpp 741 | megazone.cpp 742 | meijinsn.cpp 743 | menghong.cpp 744 | mephistp.cpp 745 | merit.cpp 746 | merit3xx.cpp 747 | meritm.cpp 748 | merits.cpp 749 | meritsdx.cpp 750 | mermaid.cpp 751 | metalmx.cpp 752 | metlclsh.cpp 753 | metlfrzr.cpp 754 | metro.cpp 755 | meyc8080.cpp 756 | meyc8088.cpp 757 | mgames.cpp 758 | mgavegas.cpp 759 | mgolf.cpp 760 | mhavoc.cpp 761 | micro3d.cpp 762 | microdar.cpp 763 | micropin.cpp 764 | midas.cpp 765 | midqslvr.cpp 766 | midtunit.cpp 767 | midvunit.cpp 768 | midwunit.cpp 769 | midxunit.cpp 770 | midyunit.cpp 771 | midzeus.cpp 772 | mikie.cpp 773 | mil4000.cpp 774 | miniboy7.cpp 775 | minivadr.cpp 776 | minivideo.cpp 777 | mirage.cpp 778 | mirax.cpp 779 | missb2.cpp 780 | missbamby.cpp 781 | missile.cpp 782 | mitchell.cpp 783 | mjkjidai.cpp 784 | mjsenpu.cpp 785 | mjsister.cpp 786 | mlanding.cpp 787 | mmagic.cpp 788 | mmm.cpp 789 | model1.cpp 790 | model2.cpp 791 | model3.cpp 792 | mogura.cpp 793 | mole.cpp 794 | momoko.cpp 795 | monacogp.cpp 796 | monzagp.cpp 797 | moo.cpp 798 | mosaic.cpp 799 | mouser.cpp 800 | mpu12wbk.cpp 801 | mpu2.cpp 802 | mpu3.cpp 803 | mpu4.cpp 804 | mpu4avan.cpp 805 | mpu4bwb.cpp 806 | mpu4concept.cpp 807 | mpu4crystal.cpp 808 | mpu4dealem.cpp 809 | mpu4empire.cpp 810 | mpu4mdm.cpp 811 | mpu4misc.cpp 812 | mpu4mod2sw.cpp 813 | mpu4mod4yam.cpp 814 | mpu4plasma.cpp 815 | mpu4sw.cpp 816 | mpu4union.cpp 817 | mpu4vid.cpp 818 | mpu5sw.cpp 819 | mquake.cpp 820 | mrdo.cpp 821 | mrflea.cpp 822 | mrgame.cpp 823 | mrjong.cpp 824 | ms32.cpp 825 | msisaac.cpp 826 | mtouchxl.cpp 827 | mugsmash.cpp 828 | multfish.cpp 829 | multfish_boot.cpp 830 | multigam.cpp 831 | munchmo.cpp 832 | murogem.cpp 833 | murogmbl.cpp 834 | mustache.cpp 835 | mw18w.cpp 836 | mw8080bw.cpp 837 | mwarr.cpp 838 | mwsub.cpp 839 | mystston.cpp 840 | mystwarr.cpp 841 | n8080.cpp 842 | namcofl.cpp 843 | namcona1.cpp 844 | namconb1.cpp 845 | namcond1.cpp 846 | namcops2.cpp 847 | namcos1.cpp 848 | namcos10.cpp 849 | namcos11.cpp 850 | namcos12.cpp 851 | namcos1b.cpp 852 | namcos2.cpp 853 | namcos21.cpp 854 | namcos21_c67.cpp 855 | namcos21_de.cpp 856 | namcos22.cpp 857 | namcos23.cpp 858 | namcos86.cpp 859 | naomi.cpp 860 | naughtyb.cpp 861 | nbmj8688.cpp 862 | nbmj8891.cpp 863 | nbmj8900.cpp 864 | nbmj8991.cpp 865 | nbmj9195.cpp 866 | nemesis.cpp 867 | neogeo.cpp 868 | neopcb.cpp 869 | neoprint.cpp 870 | neptunp2.cpp 871 | news.cpp 872 | nexus3d.cpp 873 | nibble.cpp 874 | nichild.cpp 875 | nightgal.cpp 876 | nightmare.cpp 877 | ninjakd2.cpp 878 | ninjaw.cpp 879 | nitedrvr.cpp 880 | niyanpai.cpp 881 | nmg5.cpp 882 | nmk16.cpp 883 | nmkmedal.cpp 884 | norautp.cpp 885 | notechan.cpp 886 | nova2001.cpp 887 | nsg6809.cpp 888 | nsm.cpp 889 | nsmpoker.cpp 890 | nss.cpp 891 | nwk-tr.cpp 892 | nycaptor.cpp 893 | nyny.cpp 894 | odyssey.cpp 895 | offtwall.cpp 896 | ohmygod.cpp 897 | ojankohs.cpp 898 | olibochu.cpp 899 | omegrace.cpp 900 | oneshot.cpp 901 | onetwo.cpp 902 | opwolf.cpp 903 | orbit.cpp 904 | othello.cpp 905 | othunder.cpp 906 | otomedius.cpp 907 | overdriv.cpp 908 | pachifev.cpp 909 | pacland.cpp 910 | pacman.cpp 911 | pandoras.cpp 912 | pangofun.cpp 913 | panicr.cpp 914 | paradise.cpp 915 | paranoia.cpp 916 | parodius.cpp 917 | pasha2.cpp 918 | pass.cpp 919 | pastelg.cpp 920 | patapata.cpp 921 | pbaction.cpp 922 | pcat_dyn.cpp 923 | pcat_nit.cpp 924 | pcktgal.cpp 925 | pcxt.cpp 926 | pengadvb.cpp 927 | pengo.cpp 928 | peplus.cpp 929 | peyper.cpp 930 | pgm.cpp 931 | pgm2.cpp 932 | pgm3.cpp 933 | phoenix.cpp 934 | photon.cpp 935 | photon2.cpp 936 | photoply.cpp 937 | piggypas.cpp 938 | pinball2k.cpp 939 | pingpong.cpp 940 | pinkiri8.cpp 941 | pipedrm.cpp 942 | pipeline.cpp 943 | pirates.cpp 944 | piratesh.cpp 945 | pitnrun.cpp 946 | pkscram.cpp 947 | pktgaldx.cpp 948 | playch10.cpp 949 | playmark.cpp 950 | play_1.cpp 951 | play_2.cpp 952 | play_3.cpp 953 | pluto5.cpp 954 | plygonet.cpp 955 | pntnpuzl.cpp 956 | pokechmp.cpp 957 | poker72.cpp 958 | pokerout.cpp 959 | polepos.cpp 960 | policetr.cpp 961 | polyplay.cpp 962 | pong.cpp 963 | poolshrk.cpp 964 | pooyan.cpp 965 | popeye.cpp 966 | popobear.cpp 967 | popper.cpp 968 | portrait.cpp 969 | potgoldu.cpp 970 | powerbal.cpp 971 | powerins.cpp 972 | ppmast93.cpp 973 | prehisle.cpp 974 | proconn.cpp 975 | progolf.cpp 976 | psattack.cpp 977 | pse.cpp 978 | psikyo.cpp 979 | psikyo4.cpp 980 | psikyosh.cpp 981 | psychic5.cpp 982 | pturn.cpp 983 | pubtimed.cpp 984 | puckpkmn.cpp 985 | punchout.cpp 986 | pyson.cpp 987 | pzletime.cpp 988 | qdrmfgp.cpp 989 | qix.cpp 990 | quakeat.cpp 991 | quantum.cpp 992 | quasar.cpp 993 | queen.cpp 994 | quickpick5.cpp 995 | quizdna.cpp 996 | quizo.cpp 997 | quizpani.cpp 998 | quizpun2.cpp 999 | quizshow.cpp 1000 | r2dtank.cpp 1001 | r2dx_v33.cpp 1002 | rabbit.cpp 1003 | raiden.cpp 1004 | raiden2.cpp 1005 | raiden_ms.cpp 1006 | rallyx.cpp 1007 | rampart.cpp 1008 | ramtek.cpp 1009 | rastan.cpp 1010 | rastersp.cpp 1011 | rbisland.cpp 1012 | rbmk.cpp 1013 | rcorsair.cpp 1014 | re900.cpp 1015 | realbrk.cpp 1016 | redalert.cpp 1017 | redclash.cpp 1018 | relief.cpp 1019 | renegade.cpp 1020 | retofinv.cpp 1021 | rfslots8085.cpp 1022 | rgum.cpp 1023 | rltennis.cpp 1024 | rmhaihai.cpp 1025 | rockrage.cpp 1026 | rocnrope.cpp 1027 | rohga.cpp 1028 | rollerg.cpp 1029 | rollext.cpp 1030 | rollrace.cpp 1031 | ron.cpp 1032 | rotaryf.cpp 1033 | roul.cpp 1034 | route16.cpp 1035 | rowamet.cpp 1036 | royalmah.cpp 1037 | rpunch.cpp 1038 | rulechan.cpp 1039 | runaway.cpp 1040 | rungun.cpp 1041 | s11.cpp 1042 | s11a.cpp 1043 | s11b.cpp 1044 | s11c.cpp 1045 | s3.cpp 1046 | s4.cpp 1047 | s6.cpp 1048 | s6a.cpp 1049 | s7.cpp 1050 | s8.cpp 1051 | s8a.cpp 1052 | s9.cpp 1053 | safarir.cpp 1054 | sam.cpp 1055 | sandscrp.cpp 1056 | sangho.cpp 1057 | sanremmg.cpp 1058 | sanremo.cpp 1059 | saturn.cpp 1060 | sauro.cpp 1061 | savquest.cpp 1062 | sbasketb.cpp 1063 | sbowling.cpp 1064 | sbrkout.cpp 1065 | sbugger.cpp 1066 | scm_500.cpp 1067 | scobra.cpp 1068 | scotrsht.cpp 1069 | scramble.cpp 1070 | scregg.cpp 1071 | scyclone.cpp 1072 | sderby.cpp 1073 | sderby2.cpp 1074 | seabattl.cpp 1075 | sealy.cpp 1076 | sealy_fr.cpp 1077 | seattle.cpp 1078 | segaatom.cpp 1079 | segac2.cpp 1080 | segacoin.cpp 1081 | segae.cpp 1082 | segag80r.cpp 1083 | segag80v.cpp 1084 | segahang.cpp 1085 | segajw.cpp 1086 | segald.cpp 1087 | segam1.cpp 1088 | segaorun.cpp 1089 | segas16a.cpp 1090 | segas16b.cpp 1091 | segas18.cpp 1092 | segas24.cpp 1093 | segas32.cpp 1094 | segasp.cpp 1095 | segattl.cpp 1096 | segaufo.cpp 1097 | segaxbd.cpp 1098 | segaybd.cpp 1099 | seibucats.cpp 1100 | seibuspi.cpp 1101 | seicross.cpp 1102 | seicupbl.cpp 1103 | sengokmj.cpp 1104 | senjyo.cpp 1105 | seta.cpp 1106 | seta2.cpp 1107 | sf.cpp 1108 | sfbonus.cpp 1109 | sfcbox.cpp 1110 | sfkick.cpp 1111 | sg1000a.cpp 1112 | shadfrce.cpp 1113 | shangha3.cpp 1114 | shanghai.cpp 1115 | shangkid.cpp 1116 | shaolins.cpp 1117 | shisen.cpp 1118 | shootaway2.cpp 1119 | shootout.cpp 1120 | shougi.cpp 1121 | shtzone.cpp 1122 | shuuz.cpp 1123 | sidearms.cpp 1124 | sidepckt.cpp 1125 | sigma21.cpp 1126 | sigmab52.cpp 1127 | sigmab98.cpp 1128 | silkroad.cpp 1129 | silvmil.cpp 1130 | simpl156.cpp 1131 | simple_st0016.cpp 1132 | simpsons.cpp 1133 | skeetsht.cpp 1134 | skimaxx.cpp 1135 | skopro.cpp 1136 | skullxbo.cpp 1137 | skyarmy.cpp 1138 | skydiver.cpp 1139 | skyfox.cpp 1140 | skykid.cpp 1141 | skylncr.cpp 1142 | skyraid.cpp 1143 | slapfght.cpp 1144 | slapshot.cpp 1145 | sleic.cpp 1146 | sliver.cpp 1147 | slotcarn.cpp 1148 | smsmcorp.cpp 1149 | sms_bootleg.cpp 1150 | snesb.cpp 1151 | snesb51.cpp 1152 | snk.cpp 1153 | snk6502.cpp 1154 | snk68.cpp 1155 | snookr10.cpp 1156 | snowbros.cpp 1157 | solomon.cpp 1158 | sonson.cpp 1159 | sothello.cpp 1160 | spacefb.cpp 1161 | spaceg.cpp 1162 | spartanxtec.cpp 1163 | spbactn.cpp 1164 | spcforce.cpp 1165 | spdheat.cpp 1166 | spdodgeb.cpp 1167 | spectra.cpp 1168 | speedatk.cpp 1169 | speedbal.cpp 1170 | speedspn.cpp 1171 | speglsht.cpp 1172 | spiders.cpp 1173 | spinb.cpp 1174 | spirit76.cpp 1175 | splash.cpp 1176 | splus.cpp 1177 | spoker.cpp 1178 | spool99.cpp 1179 | sprcros2.cpp 1180 | sprint2.cpp 1181 | sprint4.cpp 1182 | sprint8.cpp 1183 | spy.cpp 1184 | spyhuntertec.cpp 1185 | srmp2.cpp 1186 | srmp5.cpp 1187 | srmp6.cpp 1188 | srumbler.cpp 1189 | ssfindo.cpp 1190 | sshangha.cpp 1191 | sshot.cpp 1192 | ssingles.cpp 1193 | sslam.cpp 1194 | ssozumo.cpp 1195 | sspeedr.cpp 1196 | ssrj.cpp 1197 | sstrangr.cpp 1198 | ssv.cpp 1199 | stactics.cpp 1200 | stadhero.cpp 1201 | starcrus.cpp 1202 | starfire.cpp 1203 | stargame.cpp 1204 | starrider.cpp 1205 | starshp1.cpp 1206 | startouch.cpp 1207 | starwars.cpp 1208 | statriv2.cpp 1209 | stellafr.cpp 1210 | stfight.cpp 1211 | stlforce.cpp 1212 | strkzn.cpp 1213 | stuntair.cpp 1214 | stv.cpp 1215 | st_mp100.cpp 1216 | st_mp200.cpp 1217 | su2000.cpp 1218 | sub.cpp 1219 | subhuntr.cpp 1220 | subs.cpp 1221 | subsino.cpp 1222 | subsino2.cpp 1223 | summit.cpp 1224 | sumt8035.cpp 1225 | suna16.cpp 1226 | suna8.cpp 1227 | supbtime.cpp 1228 | supdrapo.cpp 1229 | supduck.cpp 1230 | superchs.cpp 1231 | supercrd.cpp 1232 | superdq.cpp 1233 | superqix.cpp 1234 | supertnk.cpp 1235 | superwng.cpp 1236 | suprgolf.cpp 1237 | suprloco.cpp 1238 | suprnova.cpp 1239 | suprridr.cpp 1240 | suprslam.cpp 1241 | supstarf.cpp 1242 | surpratk.cpp 1243 | sweetland.cpp 1244 | system1.cpp 1245 | system16.cpp 1246 | tagteam.cpp 1247 | tail2nos.cpp 1248 | taito.cpp 1249 | taitoair.cpp 1250 | taitogn.cpp 1251 | taitojc.cpp 1252 | taitopjc.cpp 1253 | taitosj.cpp 1254 | taitottl.cpp 1255 | taitotx.cpp 1256 | taitotz.cpp 1257 | taitowlf.cpp 1258 | taito_b.cpp 1259 | taito_f2.cpp 1260 | taito_f3.cpp 1261 | taito_h.cpp 1262 | taito_l.cpp 1263 | taito_o.cpp 1264 | taito_x.cpp 1265 | taito_z.cpp 1266 | tank8.cpp 1267 | tankbatt.cpp 1268 | tankbust.cpp 1269 | taotaido.cpp 1270 | tapatune.cpp 1271 | targeth.cpp 1272 | tasman.cpp 1273 | tatsumi.cpp 1274 | tattack.cpp 1275 | taxidriv.cpp 1276 | tbowl.cpp 1277 | tceptor.cpp 1278 | teamjocs.cpp 1279 | techno.cpp 1280 | tecmo.cpp 1281 | tecmo16.cpp 1282 | tecmosys.cpp 1283 | tehkanwc.cpp 1284 | tempest.cpp 1285 | terracre.cpp 1286 | tetrisp2.cpp 1287 | tgtpanic.cpp 1288 | thayers.cpp 1289 | thedealr.cpp 1290 | thedeep.cpp 1291 | thepit.cpp 1292 | thief.cpp 1293 | thoop2.cpp 1294 | thunderj.cpp 1295 | thunderx.cpp 1296 | tiamc1.cpp 1297 | tickee.cpp 1298 | tigeroad.cpp 1299 | timelimt.cpp 1300 | timeplt.cpp 1301 | timetrv.cpp 1302 | tmaster.cpp 1303 | tmmjprd.cpp 1304 | tmnt.cpp 1305 | tmspoker.cpp 1306 | tnzs.cpp 1307 | toaplan1.cpp 1308 | toaplan2.cpp 1309 | toki.cpp 1310 | toki_ms.cpp 1311 | tomcat.cpp 1312 | tonton.cpp 1313 | toobin.cpp 1314 | topspeed.cpp 1315 | toratora.cpp 1316 | tourtabl.cpp 1317 | tourvis.cpp 1318 | toypop.cpp 1319 | tp84.cpp 1320 | trackfld.cpp 1321 | travrusa.cpp 1322 | triforce.cpp 1323 | triplhnt.cpp 1324 | triviaquiz.cpp 1325 | trivrus.cpp 1326 | truco.cpp 1327 | trucocl.cpp 1328 | trvmadns.cpp 1329 | trvquest.cpp 1330 | tryout.cpp 1331 | tsamurai.cpp 1332 | ttchamp.cpp 1333 | tubep.cpp 1334 | tugboat.cpp 1335 | tumbleb.cpp 1336 | tunhunt.cpp 1337 | turbo.cpp 1338 | turrett.cpp 1339 | tutankhm.cpp 1340 | tvcapcom.cpp 1341 | tvg01.cpp 1342 | twin16.cpp 1343 | twincobr.cpp 1344 | twinkle.cpp 1345 | twins.cpp 1346 | tx1.cpp 1347 | uapce.cpp 1348 | ultraman.cpp 1349 | ultratnk.cpp 1350 | ultrsprt.cpp 1351 | umipoker.cpp 1352 | undrfire.cpp 1353 | unianapc.cpp 1354 | unico.cpp 1355 | unkfr.cpp 1356 | unkhorse.cpp 1357 | unkpoker.cpp 1358 | upscope.cpp 1359 | usbilliards.cpp 1360 | usgames.cpp 1361 | v0bowl.cpp 1362 | vamphalf.cpp 1363 | vaportra.cpp 1364 | vastar.cpp 1365 | vball.cpp 1366 | vcombat.cpp 1367 | vd.cpp 1368 | vectrex.cpp 1369 | vega.cpp 1370 | vegaeo.cpp 1371 | vegas.cpp 1372 | vendetta.cpp 1373 | vertigo.cpp 1374 | vgmduino.cpp 1375 | vicdual.cpp 1376 | victory.cpp 1377 | video21.cpp 1378 | videopin.cpp 1379 | videopkr.cpp 1380 | videosaa.cpp 1381 | vigilant.cpp 1382 | vindictr.cpp 1383 | viper.cpp 1384 | vlc.cpp 1385 | volfied.cpp 1386 | voyager.cpp 1387 | vp101.cpp 1388 | vpoker.cpp 1389 | vroulet.cpp 1390 | vsnes.cpp 1391 | vulgus.cpp 1392 | wacky_gator.cpp 1393 | wallc.cpp 1394 | wardner.cpp 1395 | warpsped.cpp 1396 | warpwarp.cpp 1397 | warriorb.cpp 1398 | wc90.cpp 1399 | wc90b.cpp 1400 | wecleman.cpp 1401 | welltris.cpp 1402 | wgp.cpp 1403 | wheelfir.cpp 1404 | whitestar.cpp 1405 | white_mod.cpp 1406 | wico.cpp 1407 | wildpkr.cpp 1408 | williams.cpp 1409 | wink.cpp 1410 | wiping.cpp 1411 | witch.cpp 1412 | wiz.cpp 1413 | wmg.cpp 1414 | wms.cpp 1415 | wolfpack.cpp 1416 | wpc_95.cpp 1417 | wpc_an.cpp 1418 | wpc_dcs.cpp 1419 | wpc_dot.cpp 1420 | wpc_flip1.cpp 1421 | wpc_flip2.cpp 1422 | wpc_s.cpp 1423 | wrally.cpp 1424 | wwfsstar.cpp 1425 | wyvernf0.cpp 1426 | xain.cpp 1427 | xexex.cpp 1428 | xmen.cpp 1429 | xorworld.cpp 1430 | xtheball.cpp 1431 | xtom3d.cpp 1432 | xxmissio.cpp 1433 | xybots.cpp 1434 | xyonix.cpp 1435 | y2.cpp 1436 | yiear.cpp 1437 | yunsun16.cpp 1438 | yunsung8.cpp 1439 | yuvomz80.cpp 1440 | zac2650.cpp 1441 | zaccaria.cpp 1442 | zac_1.cpp 1443 | zac_2.cpp 1444 | zac_proto.cpp 1445 | zaxxon.cpp 1446 | zerozone.cpp 1447 | zn.cpp 1448 | zodiack.cpp 1449 | zpinball.cpp 1450 | zr107.cpp 1451 | zwackery.cpp 1452 | //exceptions + to add - to remove from imported list 1453 | //3do.cpp 1454 | -3do 1455 | -3do_m2 1456 | -3do_pal 1457 | //cdi.cpp 1458 | -cdi490a 1459 | -cdi910 1460 | -cdimono1 1461 | -cdimono2 1462 | //cps1.cpp 1463 | -sfach 1464 | -sfzbch 1465 | -sfzch 1466 | -wofch 1467 | //jaguar.cpp 1468 | -jaguar 1469 | -jaguarcd 1470 | //neogeo.cpp 1471 | -aes 1472 | -ng_mv1 1473 | -ng_mv1f 1474 | -ng_mv1fz 1475 | -ng_mv2f 1476 | -ng_mv4f 1477 | //saturn.cpp 1478 | -saturn 1479 | -saturnjp 1480 | -saturneu 1481 | -vsaturn 1482 | -hisaturn 1483 | //vectrex.cpp 1484 | -vectrex 1485 | -------------------------------------------------------------------------------- /mame/src/mame/drivers/vgmduino.cpp: -------------------------------------------------------------------------------- 1 | // license:BSD-3-Clause 2 | // copyright-holders: h1romas4 3 | #include "emu.h" 4 | #include "cpu/avr8/avr8.h" 5 | #include "sound/ym2151.h" 6 | #include "speaker.h" 7 | 8 | class vgmduino_state : public driver_device 9 | { 10 | public: 11 | vgmduino_state(const machine_config &mconfig, device_type type, const char *tag) 12 | : driver_device(mconfig, type, tag) 13 | , m_maincpu(*this, "maincpu") 14 | , m_lspeaker(*this, "lspeaker") 15 | , m_rspeaker(*this, "rspeaker") 16 | , m_ym2151(*this, "ym2151") 17 | { 18 | } 19 | 20 | void vgmduino(machine_config &config); 21 | 22 | void init_vgmduino(); 23 | 24 | private: 25 | required_device m_maincpu; 26 | required_device m_lspeaker; 27 | required_device m_rspeaker; 28 | required_device m_ym2151; 29 | 30 | /* ATmega328 PORTA-PORTD (PORTA not exist) */ 31 | uint8_t m_port_a; 32 | uint8_t m_port_b; 33 | uint8_t m_port_c; 34 | uint8_t m_port_d; 35 | 36 | DECLARE_READ8_MEMBER(port_r); 37 | DECLARE_WRITE8_MEMBER(port_w); 38 | 39 | virtual void machine_start() override; 40 | virtual void machine_reset() override; 41 | 42 | void vgmduino_data_map(address_map &map); 43 | void vgmduino_io_map(address_map &map); 44 | void vgmduino_prg_map(address_map &map); 45 | }; 46 | 47 | void vgmduino_state::machine_start() 48 | { 49 | } 50 | 51 | READ8_MEMBER(vgmduino_state::port_r) 52 | { 53 | switch( offset ) 54 | { 55 | case AVR8_IO_PORTA: 56 | { 57 | return m_port_a; 58 | } 59 | case AVR8_IO_PORTB: 60 | { 61 | return m_port_b; 62 | } 63 | case AVR8_IO_PORTC: 64 | { 65 | return m_port_c; 66 | } 67 | case AVR8_IO_PORTD: 68 | { 69 | return m_port_d; 70 | } 71 | default: 72 | break; 73 | } 74 | return 0; 75 | } 76 | 77 | WRITE8_MEMBER(vgmduino_state::port_w) 78 | { 79 | /* YM2151 ATMEGA328 PORT_REG 80 | D0 2 AVR8_IO_PORTD 2 81 | D1 3 AVR8_IO_PORTD 3 82 | D2 4 AVR8_IO_PORTD 4 83 | D3 5 AVR8_IO_PORTD 5 84 | D4 6 AVR8_IO_PORTD 6 85 | D5 7 AVR8_IO_PORTD 7 86 | D6 8 AVR8_IO_PORTB 0 87 | D7 9 AVR8_IO_PORTB 1 88 | RD 10 AVR8_IO_PORTB 2 89 | WR 11 AVR8_IO_PORTB 3 90 | A0 12 AVR8_IO_PORTB 4 91 | IC 13 AVR8_IO_PORTB 5 92 | */ 93 | switch( offset ) 94 | { 95 | case AVR8_IO_PORTA: 96 | { 97 | if (data == m_port_a) break; 98 | m_port_a = data; 99 | break; 100 | } 101 | case AVR8_IO_PORTB: 102 | { 103 | if (data == m_port_b) break; 104 | /* YM2151 IC 1->0 */ 105 | if (BIT(m_port_b, 5) && !BIT(data, 5)) 106 | { 107 | m_port_b = data; 108 | /* YM2151 RESET */ 109 | m_ym2151->reset(); 110 | printf("VGMDUINO: m_ym2151->reset()\n"); 111 | break; 112 | } 113 | /* YM2151 WR 1->0 */ 114 | if (BIT(m_port_b, 3) && !BIT(data, 3)) 115 | { 116 | m_port_b = data; 117 | /* YM2151 A0, D0-D7 */ 118 | uint8_t adr = BIT(m_port_b, 4); 119 | // D6 8 AVR8_IO_PORTB 0 120 | // D7 9 AVR8_IO_PORTB 1 121 | uint8_t dat = (0b11111100 & m_port_d) >> 2 | BIT(m_port_b, 0) << 6 | BIT(m_port_b, 1) << 7; 122 | m_ym2151->write(adr, dat); 123 | // printf("VGMDUINO: m_ym2151->write(0x%02X, 0x%02X)\n", adr, dat); 124 | break; 125 | } 126 | /* YM2151 RD 1->0 */ 127 | if (BIT(m_port_b, 2) && !BIT(data, 2)) 128 | { 129 | m_port_b = data; 130 | /* YM2151 A0 */ 131 | uint8_t adr = BIT(m_port_b, 4); 132 | uint8_t state = m_ym2151->read(adr); 133 | // printf("VGMDUINO: m_ym2151->read(0x%02X) = 0x%02X\n", adr, state); 134 | /* YM2151 D0-D7 */ 135 | m_port_d |= (state & 0b0011111) << 2; 136 | m_port_b |= (state & 0b1100000) >> 5; 137 | break; 138 | } 139 | m_port_b = data; 140 | break; 141 | } 142 | case AVR8_IO_PORTC: 143 | { 144 | if (data == m_port_c) break; 145 | m_port_c = data; 146 | break; 147 | } 148 | case AVR8_IO_PORTD: 149 | { 150 | if (data == m_port_d) break; 151 | m_port_d = data; 152 | break; 153 | } 154 | default: 155 | break; 156 | } 157 | } 158 | 159 | void vgmduino_state::vgmduino_prg_map(address_map &map) 160 | { 161 | /* ATmega328 32KB(0x0 - 0x7fff) internal flash */ 162 | map(0x0000, 0x7fff).rom(); 163 | } 164 | 165 | void vgmduino_state::vgmduino_data_map(address_map &map) 166 | { 167 | /* ATmega328 2KB SRAM */ 168 | map(0x0100, 0x08ff).ram(); 169 | } 170 | 171 | void vgmduino_state::vgmduino_io_map(address_map &map) 172 | { 173 | /* ATmega328 PORTA-PORTD (PORTA not exist) */ 174 | map(AVR8_IO_PORTA, AVR8_IO_PORTD).rw(FUNC(vgmduino_state::port_r), FUNC(vgmduino_state::port_w)); 175 | } 176 | 177 | void vgmduino_state::init_vgmduino() 178 | { 179 | } 180 | 181 | void vgmduino_state::machine_reset() 182 | { 183 | m_port_a = 0; 184 | m_port_b = 0; 185 | m_port_c = 0; 186 | m_port_d = 0; 187 | } 188 | 189 | void vgmduino_state::vgmduino(machine_config &config) 190 | { 191 | /* ATmega328 16MHz clock */ 192 | ATMEGA328(config, m_maincpu, XTAL(16'000'000)); 193 | 194 | /* ATmega328 32KB(0x0 - 0x7fff) internal flash */ 195 | m_maincpu->set_addrmap(AS_PROGRAM, &vgmduino_state::vgmduino_prg_map); 196 | /* ATmega328 2KB SRAM */ 197 | m_maincpu->set_addrmap(AS_DATA, &vgmduino_state::vgmduino_data_map); 198 | /* ATmega328 PORTA-PORTD (PORTA not exist) */ 199 | m_maincpu->set_addrmap(AS_IO, &vgmduino_state::vgmduino_io_map); 200 | 201 | /* ATmega328 EEPROM */ 202 | m_maincpu->set_eeprom_tag("eeprom"); 203 | 204 | /* Arduino UNO setting */ 205 | m_maincpu->set_low_fuses(0xff); 206 | m_maincpu->set_high_fuses(0xde); 207 | m_maincpu->set_extended_fuses(0xfd); 208 | m_maincpu->set_lock_bits(0x0f); 209 | 210 | /* Stereo speaker */ 211 | SPEAKER(config, m_lspeaker).front_left(); 212 | SPEAKER(config, m_rspeaker).front_right(); 213 | 214 | /* YM2151 3.579545MHz clock */ 215 | YM2151(config, m_ym2151, XTAL(3'579'545)); 216 | m_ym2151->add_route(0, m_lspeaker, 1); 217 | m_ym2151->add_route(1, m_rspeaker, 1); 218 | } 219 | 220 | ROM_START( kanon ) 221 | ROM_REGION( 0x8000, "maincpu", 0 ) 222 | /* Arduino UNO user program */ 223 | ROM_LOAD( "vgmduino.bin", 0x0000, 0x7e00, CRC(d895a7ae) SHA1(0e7c0abd674af52afe25293fe6cdff8e337b2330) ) 224 | /* Arduino UNO bootloader 0x7e00 */ 225 | ROM_LOAD( "optiboot_atmega328.bin", 0x7e00, 0x200, CRC(388b1a0e) SHA1(529a4a966913261f0bc467ef80424bb74bd2cc03) ) 226 | /* on-die 1kbyte eeprom */ 227 | ROM_REGION( 0x400, "eeprom", ROMREGION_ERASEFF ) 228 | ROM_END 229 | 230 | // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS 231 | COMP(2020, kanon, 0, 0, vgmduino, 0, vgmduino_state, init_vgmduino, "vgmduino", "vgmduino", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) 232 | -------------------------------------------------------------------------------- /vgmduino.ino: -------------------------------------------------------------------------------- 1 | // https://github.com/zenmai/portableMDXPlayer/blob/master/YM2151.cpp 2 | #include "YM2151.h" 3 | 4 | #include 5 | #include "music/vgmsample.h" 6 | 7 | // https://en.wikipedia.org/wiki/VGM_(file_format) 8 | unsigned int vgmpos = 0xb0; 9 | 10 | bool vgmend = false; 11 | unsigned long startTime; 12 | unsigned long duration; 13 | 14 | uint8_t getByte() { 15 | uint8_t ret = pgm_read_byte_near(vgmdata + vgmpos); 16 | vgmpos++; 17 | return ret; 18 | } 19 | 20 | unsigned int read16() { 21 | return getByte() + (getByte() << 8); 22 | } 23 | 24 | void pause(long samples){ 25 | duration = ((1000.0 / (44100.0 / (float)samples)) * 1000); 26 | startTime = micros(); 27 | } 28 | 29 | void vgmplay() { 30 | if((micros() - startTime) <= duration) { 31 | return; 32 | } 33 | 34 | byte command = getByte(); 35 | uint8_t reg; 36 | uint8_t dat; 37 | 38 | switch (command) { 39 | case 0x54: 40 | // YM2151 41 | reg = getByte(); 42 | dat = getByte(); 43 | YM2151.write(reg, dat); 44 | break; 45 | case 0x61: 46 | pause(read16()); 47 | break; 48 | case 0x62: 49 | pause(735); 50 | break; 51 | case 0x63: 52 | pause(882); 53 | break; 54 | case 0x66: 55 | vgmend = true; 56 | break; 57 | case 0x70: 58 | case 0x71: 59 | case 0x72: 60 | case 0x73: 61 | case 0x74: 62 | case 0x75: 63 | case 0x76: 64 | case 0x77: 65 | case 0x78: 66 | case 0x79: 67 | case 0x7A: 68 | case 0x7B: 69 | case 0x7C: 70 | case 0x7D: 71 | case 0x7E: 72 | case 0x7F: 73 | pause((command & 0x0f) + 1); 74 | break; 75 | default: 76 | break; 77 | } 78 | } 79 | 80 | void setup() { 81 | YM2151.begin(); 82 | delay(400); 83 | } 84 | 85 | void loop() { 86 | while(!vgmend) { 87 | vgmplay(); 88 | } 89 | 90 | asm volatile("nop\n\t nop\n\t nop\n\t nop\n\t"); 91 | } 92 | --------------------------------------------------------------------------------