├── CORE
├── core_cm4.h
├── core_cm4_simd.h
├── core_cmFunc.h
├── core_cmInstr.h
└── startup_stm32f40_41xxx.s
├── FWLIB
├── inc
│ ├── misc.h
│ ├── stm32f4xx_adc.h
│ ├── stm32f4xx_adc.h~RF100b95f.TMP
│ ├── stm32f4xx_can.h
│ ├── stm32f4xx_crc.h
│ ├── stm32f4xx_cryp.h
│ ├── stm32f4xx_dac.h
│ ├── stm32f4xx_dbgmcu.h
│ ├── stm32f4xx_dcmi.h
│ ├── stm32f4xx_dma.h
│ ├── stm32f4xx_dma2d.h
│ ├── stm32f4xx_exti.h
│ ├── stm32f4xx_flash.h
│ ├── stm32f4xx_flash_ramfunc.h
│ ├── stm32f4xx_fmc.h
│ ├── stm32f4xx_fsmc.h
│ ├── stm32f4xx_gpio.h
│ ├── stm32f4xx_hash.h
│ ├── stm32f4xx_i2c.h
│ ├── stm32f4xx_iwdg.h
│ ├── stm32f4xx_ltdc.h
│ ├── stm32f4xx_pwr.h
│ ├── stm32f4xx_rcc.h
│ ├── stm32f4xx_rng.h
│ ├── stm32f4xx_rtc.h
│ ├── stm32f4xx_sai.h
│ ├── stm32f4xx_sdio.h
│ ├── stm32f4xx_spi.h
│ ├── stm32f4xx_syscfg.h
│ ├── stm32f4xx_tim.h
│ ├── stm32f4xx_usart.h
│ └── stm32f4xx_wwdg.h
└── src
│ ├── misc.c
│ ├── stm32f4xx_adc.c
│ ├── stm32f4xx_can.c
│ ├── stm32f4xx_crc.c
│ ├── stm32f4xx_cryp.c
│ ├── stm32f4xx_cryp_aes.c
│ ├── stm32f4xx_cryp_des.c
│ ├── stm32f4xx_cryp_tdes.c
│ ├── stm32f4xx_dac.c
│ ├── stm32f4xx_dbgmcu.c
│ ├── stm32f4xx_dcmi.c
│ ├── stm32f4xx_dma.c
│ ├── stm32f4xx_dma2d.c
│ ├── stm32f4xx_exti.c
│ ├── stm32f4xx_flash.c
│ ├── stm32f4xx_flash_ramfunc.c
│ ├── stm32f4xx_fmc.c
│ ├── stm32f4xx_fsmc.c
│ ├── stm32f4xx_gpio.c
│ ├── stm32f4xx_hash.c
│ ├── stm32f4xx_hash_md5.c
│ ├── stm32f4xx_hash_sha1.c
│ ├── stm32f4xx_i2c.c
│ ├── stm32f4xx_iwdg.c
│ ├── stm32f4xx_ltdc.c
│ ├── stm32f4xx_pwr.c
│ ├── stm32f4xx_rcc.c
│ ├── stm32f4xx_rng.c
│ ├── stm32f4xx_rtc.c
│ ├── stm32f4xx_sai.c
│ ├── stm32f4xx_sdio.c
│ ├── stm32f4xx_spi.c
│ ├── stm32f4xx_syscfg.c
│ ├── stm32f4xx_tim.c
│ ├── stm32f4xx_usart.c
│ └── stm32f4xx_wwdg.c
├── HARDWARE
├── ADC
│ ├── adc.c
│ └── adc.h
├── BLDCTIM_Init
│ └── BLDCTIM_Init.h
├── BSP
│ ├── bsp.c
│ └── bsp.h
├── CAN
│ ├── can.c
│ └── can.h
├── CURRENT
│ ├── current.c
│ └── current.h
├── DS18B20
│ ├── ds18b20.c
│ └── ds18b20.h
├── GPIO_Init
│ ├── GPIO_Init.c
│ └── GPIO_Init.h
├── KEY
│ ├── key.c
│ └── key.h
├── LED
│ ├── led.c
│ └── led.h
├── MPU6500
│ ├── mpu6500.c
│ └── mpu6500.h
├── PWM
│ ├── pwm.c
│ └── pwm.h
├── TIM3
│ ├── time3.c
│ └── time3.h
├── config
│ └── config.h
└── time2
│ ├── time2.c
│ └── time2.h
├── OBJ
├── ExtDll.iex
├── PWM.axf
├── PWM.build_log.htm
├── PWM.hex
├── PWM.htm
├── PWM.lnp
├── PWM.map
├── PWM.sct
├── PWM_PWM.dep
├── PWM_sct.Bak
├── adc.crf
├── adc.d
├── adc.o
├── bsp.crf
├── bsp.d
├── bsp.o
├── can.crf
├── can.d
├── can.o
├── current.crf
├── current.d
├── current.o
├── delay.crf
├── delay.d
├── delay.o
├── ds18b20.crf
├── ds18b20.d
├── ds18b20.o
├── gpio_init.crf
├── gpio_init.d
├── gpio_init.o
├── key.crf
├── key.d
├── key.o
├── led.crf
├── led.d
├── led.o
├── main.crf
├── main.d
├── main.o
├── misc.crf
├── misc.d
├── misc.o
├── mpu6500.crf
├── mpu6500.d
├── mpu6500.o
├── pwm.crf
├── pwm.d
├── pwm.o
├── startup_stm32f40_41xxx.d
├── startup_stm32f40_41xxx.lst
├── startup_stm32f40_41xxx.o
├── stm32f4xx_adc.crf
├── stm32f4xx_adc.d
├── stm32f4xx_adc.o
├── stm32f4xx_can.crf
├── stm32f4xx_can.d
├── stm32f4xx_can.o
├── stm32f4xx_dma.crf
├── stm32f4xx_dma.d
├── stm32f4xx_dma.o
├── stm32f4xx_exti.crf
├── stm32f4xx_exti.d
├── stm32f4xx_exti.o
├── stm32f4xx_gpio.crf
├── stm32f4xx_gpio.d
├── stm32f4xx_gpio.o
├── stm32f4xx_it.crf
├── stm32f4xx_it.d
├── stm32f4xx_it.o
├── stm32f4xx_rcc.crf
├── stm32f4xx_rcc.d
├── stm32f4xx_rcc.o
├── stm32f4xx_spi.crf
├── stm32f4xx_spi.d
├── stm32f4xx_spi.o
├── stm32f4xx_syscfg.crf
├── stm32f4xx_syscfg.d
├── stm32f4xx_syscfg.o
├── stm32f4xx_tim.crf
├── stm32f4xx_tim.d
├── stm32f4xx_tim.o
├── stm32f4xx_usart.crf
├── stm32f4xx_usart.d
├── stm32f4xx_usart.o
├── sys.crf
├── sys.d
├── sys.o
├── system_stm32f4xx.crf
├── system_stm32f4xx.d
├── system_stm32f4xx.o
├── time2.crf
├── time2.d
├── time2.o
├── time3.crf
├── time3.d
├── time3.o
├── timer.crf
├── timer.d
├── timer.o
├── usart.crf
├── usart.d
└── usart.o
├── README.md
├── SYSTEM
├── delay
│ ├── delay.c
│ └── delay.h
├── sys
│ ├── sys.c
│ └── sys.h
└── usart
│ ├── usart.c
│ └── usart.h
├── USER
├── JLinkLog.txt
├── JLinkSettings.ini
├── PWM.uvguix.Administrator
├── PWM.uvguix.T480
├── PWM.uvoptx
├── PWM.uvprojx
├── main.c
├── stm32f4xx.h
├── stm32f4xx.h~RF31f4a2.TMP
├── stm32f4xx.h~RF31f6b5.TMP
├── stm32f4xx.h~RF720506.TMP
├── stm32f4xx.h~RFa8e156.TMP
├── stm32f4xx_conf.h
├── stm32f4xx_it.c
├── stm32f4xx_it.h
├── system_stm32f4xx.c
└── system_stm32f4xx.h
├── keilkilll.bat
└── readme.txt
/FWLIB/inc/misc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file misc.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the miscellaneous
8 | * firmware library functions (add-on to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __MISC_H
31 | #define __MISC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup MISC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief NVIC Init Structure definition
52 | */
53 |
54 | typedef struct
55 | {
56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
57 | This parameter can be an enumerator of @ref IRQn_Type
58 | enumeration (For the complete STM32 Devices IRQ Channels
59 | list, please refer to stm32f4xx.h file) */
60 |
61 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
62 | specified in NVIC_IRQChannel. This parameter can be a value
63 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
64 | A lower priority value indicates a higher priority */
65 |
66 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
67 | in NVIC_IRQChannel. This parameter can be a value
68 | between 0 and 15 as described in the table @ref MISC_NVIC_Priority_Table
69 | A lower priority value indicates a higher priority */
70 |
71 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
72 | will be enabled or disabled.
73 | This parameter can be set either to ENABLE or DISABLE */
74 | } NVIC_InitTypeDef;
75 |
76 | /* Exported constants --------------------------------------------------------*/
77 |
78 | /** @defgroup MISC_Exported_Constants
79 | * @{
80 | */
81 |
82 | /** @defgroup MISC_Vector_Table_Base
83 | * @{
84 | */
85 |
86 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000)
87 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
88 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
89 | ((VECTTAB) == NVIC_VectTab_FLASH))
90 | /**
91 | * @}
92 | */
93 |
94 | /** @defgroup MISC_System_Low_Power
95 | * @{
96 | */
97 |
98 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
99 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
100 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
101 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
102 | ((LP) == NVIC_LP_SLEEPDEEP) || \
103 | ((LP) == NVIC_LP_SLEEPONEXIT))
104 | /**
105 | * @}
106 | */
107 |
108 | /** @defgroup MISC_Preemption_Priority_Group
109 | * @{
110 | */
111 |
112 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
113 | 4 bits for subpriority */
114 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
115 | 3 bits for subpriority */
116 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
117 | 2 bits for subpriority */
118 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
119 | 1 bits for subpriority */
120 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
121 | 0 bits for subpriority */
122 |
123 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
124 | ((GROUP) == NVIC_PriorityGroup_1) || \
125 | ((GROUP) == NVIC_PriorityGroup_2) || \
126 | ((GROUP) == NVIC_PriorityGroup_3) || \
127 | ((GROUP) == NVIC_PriorityGroup_4))
128 |
129 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
130 |
131 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
132 |
133 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
134 |
135 | /**
136 | * @}
137 | */
138 |
139 | /** @defgroup MISC_SysTick_clock_source
140 | * @{
141 | */
142 |
143 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
144 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
145 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
146 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
147 | /**
148 | * @}
149 | */
150 |
151 | /**
152 | * @}
153 | */
154 |
155 | /* Exported macro ------------------------------------------------------------*/
156 | /* Exported functions --------------------------------------------------------*/
157 |
158 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
159 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
160 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
161 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
162 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
163 |
164 | #ifdef __cplusplus
165 | }
166 | #endif
167 |
168 | #endif /* __MISC_H */
169 |
170 | /**
171 | * @}
172 | */
173 |
174 | /**
175 | * @}
176 | */
177 |
178 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
179 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_CRC_H
31 | #define __STM32F4xx_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_Exported_Constants
52 | * @{
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 |
62 | void CRC_ResetDR(void);
63 | uint32_t CRC_CalcCRC(uint32_t Data);
64 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
65 | uint32_t CRC_GetCRC(void);
66 | void CRC_SetIDRegister(uint8_t IDValue);
67 | uint8_t CRC_GetIDRegister(void);
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* __STM32F4xx_CRC_H */
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware library.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_DBGMCU_H
30 | #define __STM32F4xx_DBGMCU_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /* Includes ------------------------------------------------------------------*/
37 | #include "stm32f4xx.h"
38 |
39 | /** @addtogroup STM32F4xx_StdPeriph_Driver
40 | * @{
41 | */
42 |
43 | /** @addtogroup DBGMCU
44 | * @{
45 | */
46 |
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 |
50 | /** @defgroup DBGMCU_Exported_Constants
51 | * @{
52 | */
53 | #define DBGMCU_SLEEP ((uint32_t)0x00000001)
54 | #define DBGMCU_STOP ((uint32_t)0x00000002)
55 | #define DBGMCU_STANDBY ((uint32_t)0x00000004)
56 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF8) == 0x00) && ((PERIPH) != 0x00))
57 |
58 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000001)
59 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00000002)
60 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00000004)
61 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00000008)
62 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00000010)
63 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00000020)
64 | #define DBGMCU_TIM12_STOP ((uint32_t)0x00000040)
65 | #define DBGMCU_TIM13_STOP ((uint32_t)0x00000080)
66 | #define DBGMCU_TIM14_STOP ((uint32_t)0x00000100)
67 | #define DBGMCU_RTC_STOP ((uint32_t)0x00000400)
68 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000800)
69 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00001000)
70 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00200000)
71 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00400000)
72 | #define DBGMCU_I2C3_SMBUS_TIMEOUT ((uint32_t)0x00800000)
73 | #define DBGMCU_CAN1_STOP ((uint32_t)0x02000000)
74 | #define DBGMCU_CAN2_STOP ((uint32_t)0x04000000)
75 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xF91FE200) == 0x00) && ((PERIPH) != 0x00))
76 |
77 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000001)
78 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00000002)
79 | #define DBGMCU_TIM9_STOP ((uint32_t)0x00010000)
80 | #define DBGMCU_TIM10_STOP ((uint32_t)0x00020000)
81 | #define DBGMCU_TIM11_STOP ((uint32_t)0x00040000)
82 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8FFFC) == 0x00) && ((PERIPH) != 0x00))
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 | uint32_t DBGMCU_GetREVID(void);
90 | uint32_t DBGMCU_GetDEVID(void);
91 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
92 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
93 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
94 |
95 | #ifdef __cplusplus
96 | }
97 | #endif
98 |
99 | #endif /* __STM32F4xx_DBGMCU_H */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_exti.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the EXTI firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_EXTI_H
31 | #define __STM32F4xx_EXTI_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup EXTI
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief EXTI mode enumeration
52 | */
53 |
54 | typedef enum
55 | {
56 | EXTI_Mode_Interrupt = 0x00,
57 | EXTI_Mode_Event = 0x04
58 | }EXTIMode_TypeDef;
59 |
60 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
61 |
62 | /**
63 | * @brief EXTI Trigger enumeration
64 | */
65 |
66 | typedef enum
67 | {
68 | EXTI_Trigger_Rising = 0x08,
69 | EXTI_Trigger_Falling = 0x0C,
70 | EXTI_Trigger_Rising_Falling = 0x10
71 | }EXTITrigger_TypeDef;
72 |
73 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
74 | ((TRIGGER) == EXTI_Trigger_Falling) || \
75 | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
76 | /**
77 | * @brief EXTI Init Structure definition
78 | */
79 |
80 | typedef struct
81 | {
82 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
83 | This parameter can be any combination value of @ref EXTI_Lines */
84 |
85 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
86 | This parameter can be a value of @ref EXTIMode_TypeDef */
87 |
88 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
89 | This parameter can be a value of @ref EXTITrigger_TypeDef */
90 |
91 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
92 | This parameter can be set either to ENABLE or DISABLE */
93 | }EXTI_InitTypeDef;
94 |
95 | /* Exported constants --------------------------------------------------------*/
96 |
97 | /** @defgroup EXTI_Exported_Constants
98 | * @{
99 | */
100 |
101 | /** @defgroup EXTI_Lines
102 | * @{
103 | */
104 |
105 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */
106 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */
107 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */
108 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */
109 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */
110 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */
111 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */
112 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */
113 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */
114 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */
115 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */
116 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */
117 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */
118 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */
119 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */
120 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */
121 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */
122 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */
123 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
124 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
125 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
126 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
127 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< External interrupt line 22 Connected to the RTC Wakeup event */
128 |
129 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFF800000) == 0x00) && ((LINE) != (uint16_t)0x00))
130 |
131 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
132 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
133 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
134 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
135 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
136 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
137 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
138 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
139 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
140 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
141 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) ||\
142 | ((LINE) == EXTI_Line22))
143 |
144 | /**
145 | * @}
146 | */
147 |
148 | /**
149 | * @}
150 | */
151 |
152 | /* Exported macro ------------------------------------------------------------*/
153 | /* Exported functions --------------------------------------------------------*/
154 |
155 | /* Function used to set the EXTI configuration to the default reset state *****/
156 | void EXTI_DeInit(void);
157 |
158 | /* Initialization and Configuration functions *********************************/
159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
162 |
163 | /* Interrupts and flags management functions **********************************/
164 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
165 | void EXTI_ClearFlag(uint32_t EXTI_Line);
166 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
167 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
168 |
169 | #ifdef __cplusplus
170 | }
171 | #endif
172 |
173 | #endif /* __STM32F4xx_EXTI_H */
174 |
175 | /**
176 | * @}
177 | */
178 |
179 | /**
180 | * @}
181 | */
182 |
183 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
184 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_flash_ramfunc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_flash_ramfunc.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief Header file of FLASH RAMFUNC driver.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H
31 | #define __STM32F4xx_FLASH_RAMFUNC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup FLASH RAMFUNC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Private define ------------------------------------------------------------*/
50 | /**
51 | * @brief __RAM_FUNC definition
52 | */
53 | #if defined ( __CC_ARM )
54 | /* ARM Compiler
55 | ------------
56 | RAM functions are defined using the toolchain options.
57 | Functions that are executed in RAM should reside in a separate source module.
58 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
59 | area of a module to a memory space in physical RAM.
60 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
61 | dialog.
62 | */
63 | #define __RAM_FUNC void
64 |
65 | #elif defined ( __ICCARM__ )
66 | /* ICCARM Compiler
67 | ---------------
68 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
69 | */
70 | #define __RAM_FUNC __ramfunc void
71 |
72 | #elif defined ( __GNUC__ )
73 | /* GNU Compiler
74 | ------------
75 | RAM functions are defined using a specific toolchain attribute
76 | "__attribute__((section(".RamFunc")))".
77 | */
78 | #define __RAM_FUNC void __attribute__((section(".RamFunc")))
79 |
80 | #endif
81 | /* Exported constants --------------------------------------------------------*/
82 | /* Exported macro ------------------------------------------------------------*/
83 | /* Exported functions --------------------------------------------------------*/
84 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState);
85 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState);
86 |
87 |
88 | #ifdef __cplusplus
89 | }
90 | #endif
91 |
92 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
103 |
104 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_iwdg.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_IWDG_H
31 | #define __STM32F4xx_IWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup IWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup IWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup IWDG_WriteAccess
56 | * @{
57 | */
58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
61 | ((ACCESS) == IWDG_WriteAccess_Disable))
62 | /**
63 | * @}
64 | */
65 |
66 | /** @defgroup IWDG_prescaler
67 | * @{
68 | */
69 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
70 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
71 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
72 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
73 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
74 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
75 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
77 | ((PRESCALER) == IWDG_Prescaler_8) || \
78 | ((PRESCALER) == IWDG_Prescaler_16) || \
79 | ((PRESCALER) == IWDG_Prescaler_32) || \
80 | ((PRESCALER) == IWDG_Prescaler_64) || \
81 | ((PRESCALER) == IWDG_Prescaler_128)|| \
82 | ((PRESCALER) == IWDG_Prescaler_256))
83 | /**
84 | * @}
85 | */
86 |
87 | /** @defgroup IWDG_Flag
88 | * @{
89 | */
90 | #define IWDG_FLAG_PVU ((uint16_t)0x0001)
91 | #define IWDG_FLAG_RVU ((uint16_t)0x0002)
92 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
93 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
94 | /**
95 | * @}
96 | */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /* Exported macro ------------------------------------------------------------*/
103 | /* Exported functions --------------------------------------------------------*/
104 |
105 | /* Prescaler and Counter configuration functions ******************************/
106 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
107 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
108 | void IWDG_SetReload(uint16_t Reload);
109 | void IWDG_ReloadCounter(void);
110 |
111 | /* IWDG activation function ***************************************************/
112 | void IWDG_Enable(void);
113 |
114 | /* Flag management function ***************************************************/
115 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
116 |
117 | #ifdef __cplusplus
118 | }
119 | #endif
120 |
121 | #endif /* __STM32F4xx_IWDG_H */
122 |
123 | /**
124 | * @}
125 | */
126 |
127 | /**
128 | * @}
129 | */
130 |
131 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
132 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_pwr.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_PWR_H
31 | #define __STM32F4xx_PWR_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup PWR
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup PWR_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup PWR_PVD_detection_level
56 | * @{
57 | */
58 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
59 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
60 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
61 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
62 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
63 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
64 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
65 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7
66 |
67 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
68 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
69 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
70 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
71 | /**
72 | * @}
73 | */
74 |
75 |
76 | /** @defgroup PWR_Regulator_state_in_STOP_mode
77 | * @{
78 | */
79 | #define PWR_MainRegulator_ON ((uint32_t)0x00000000)
80 | #define PWR_LowPowerRegulator_ON PWR_CR_LPDS
81 |
82 | /* --- PWR_Legacy ---*/
83 | #define PWR_Regulator_ON PWR_MainRegulator_ON
84 | #define PWR_Regulator_LowPower PWR_LowPowerRegulator_ON
85 |
86 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MainRegulator_ON) || \
87 | ((REGULATOR) == PWR_LowPowerRegulator_ON))
88 |
89 | /**
90 | * @}
91 | */
92 |
93 | /** @defgroup PWR_Regulator_state_in_UnderDrive_mode
94 | * @{
95 | */
96 | #define PWR_MainRegulator_UnderDrive_ON PWR_CR_MRUDS
97 | #define PWR_LowPowerRegulator_UnderDrive_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
98 |
99 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MainRegulator_UnderDrive_ON) || \
100 | ((REGULATOR) == PWR_LowPowerRegulator_UnderDrive_ON))
101 |
102 | /**
103 | * @}
104 | */
105 |
106 | /** @defgroup PWR_STOP_mode_entry
107 | * @{
108 | */
109 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
110 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
111 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
112 | /**
113 | * @}
114 | */
115 |
116 | /** @defgroup PWR_Regulator_Voltage_Scale
117 | * @{
118 | */
119 | #define PWR_Regulator_Voltage_Scale1 ((uint32_t)0x0000C000)
120 | #define PWR_Regulator_Voltage_Scale2 ((uint32_t)0x00008000)
121 | #define PWR_Regulator_Voltage_Scale3 ((uint32_t)0x00004000)
122 | #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_Regulator_Voltage_Scale1) || \
123 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale2) || \
124 | ((VOLTAGE) == PWR_Regulator_Voltage_Scale3))
125 | /**
126 | * @}
127 | */
128 |
129 | /** @defgroup PWR_Flag
130 | * @{
131 | */
132 | #define PWR_FLAG_WU PWR_CSR_WUF
133 | #define PWR_FLAG_SB PWR_CSR_SBF
134 | #define PWR_FLAG_PVDO PWR_CSR_PVDO
135 | #define PWR_FLAG_BRR PWR_CSR_BRR
136 | #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
137 | #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
138 | #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
139 | #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
140 |
141 | /* --- FLAG Legacy ---*/
142 | #define PWR_FLAG_REGRDY PWR_FLAG_VOSRDY
143 |
144 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
145 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_BRR) || \
146 | ((FLAG) == PWR_FLAG_VOSRDY) || ((FLAG) == PWR_FLAG_ODRDY) || \
147 | ((FLAG) == PWR_FLAG_ODSWRDY) || ((FLAG) == PWR_FLAG_UDRDY))
148 |
149 |
150 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
151 | ((FLAG) == PWR_FLAG_UDRDY))
152 |
153 | /**
154 | * @}
155 | */
156 |
157 | /**
158 | * @}
159 | */
160 |
161 | /* Exported macro ------------------------------------------------------------*/
162 | /* Exported functions --------------------------------------------------------*/
163 |
164 | /* Function used to set the PWR configuration to the default reset state ******/
165 | void PWR_DeInit(void);
166 |
167 | /* Backup Domain Access function **********************************************/
168 | void PWR_BackupAccessCmd(FunctionalState NewState);
169 |
170 | /* PVD configuration functions ************************************************/
171 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
172 | void PWR_PVDCmd(FunctionalState NewState);
173 |
174 | /* WakeUp pins configuration functions ****************************************/
175 | void PWR_WakeUpPinCmd(FunctionalState NewState);
176 |
177 | /* Main and Backup Regulators configuration functions *************************/
178 | void PWR_BackupRegulatorCmd(FunctionalState NewState);
179 | void PWR_MainRegulatorModeConfig(uint32_t PWR_Regulator_Voltage);
180 | void PWR_OverDriveCmd(FunctionalState NewState);
181 | void PWR_OverDriveSWCmd(FunctionalState NewState);
182 | void PWR_UnderDriveCmd(FunctionalState NewState);
183 | void PWR_MainRegulatorLowVoltageCmd(FunctionalState NewState);
184 | void PWR_LowRegulatorLowVoltageCmd(FunctionalState NewState);
185 |
186 | /* FLASH Power Down configuration functions ***********************************/
187 | void PWR_FlashPowerDownCmd(FunctionalState NewState);
188 |
189 | /* Low Power modes configuration functions ************************************/
190 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
191 | void PWR_EnterUnderDriveSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
192 | void PWR_EnterSTANDBYMode(void);
193 |
194 | /* Flags management functions *************************************************/
195 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
196 | void PWR_ClearFlag(uint32_t PWR_FLAG);
197 |
198 | #ifdef __cplusplus
199 | }
200 | #endif
201 |
202 | #endif /* __STM32F4xx_PWR_H */
203 |
204 | /**
205 | * @}
206 | */
207 |
208 | /**
209 | * @}
210 | */
211 |
212 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
213 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_rng.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_rng.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the Random
8 | * Number Generator(RNG) firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_RNG_H
31 | #define __STM32F4xx_RNG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup RNG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup RNG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup RNG_flags_definition
56 | * @{
57 | */
58 | #define RNG_FLAG_DRDY ((uint8_t)0x0001) /*!< Data ready */
59 | #define RNG_FLAG_CECS ((uint8_t)0x0002) /*!< Clock error current status */
60 | #define RNG_FLAG_SECS ((uint8_t)0x0004) /*!< Seed error current status */
61 |
62 | #define IS_RNG_GET_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_DRDY) || \
63 | ((RNG_FLAG) == RNG_FLAG_CECS) || \
64 | ((RNG_FLAG) == RNG_FLAG_SECS))
65 | #define IS_RNG_CLEAR_FLAG(RNG_FLAG) (((RNG_FLAG) == RNG_FLAG_CECS) || \
66 | ((RNG_FLAG) == RNG_FLAG_SECS))
67 | /**
68 | * @}
69 | */
70 |
71 | /** @defgroup RNG_interrupts_definition
72 | * @{
73 | */
74 | #define RNG_IT_CEI ((uint8_t)0x20) /*!< Clock error interrupt */
75 | #define RNG_IT_SEI ((uint8_t)0x40) /*!< Seed error interrupt */
76 |
77 | #define IS_RNG_IT(IT) ((((IT) & (uint8_t)0x9F) == 0x00) && ((IT) != 0x00))
78 | #define IS_RNG_GET_IT(RNG_IT) (((RNG_IT) == RNG_IT_CEI) || ((RNG_IT) == RNG_IT_SEI))
79 | /**
80 | * @}
81 | */
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /* Exported macro ------------------------------------------------------------*/
88 | /* Exported functions --------------------------------------------------------*/
89 |
90 | /* Function used to set the RNG configuration to the default reset state *****/
91 | void RNG_DeInit(void);
92 |
93 | /* Configuration function *****************************************************/
94 | void RNG_Cmd(FunctionalState NewState);
95 |
96 | /* Get 32 bit Random number function ******************************************/
97 | uint32_t RNG_GetRandomNumber(void);
98 |
99 | /* Interrupts and flags management functions **********************************/
100 | void RNG_ITConfig(FunctionalState NewState);
101 | FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG);
102 | void RNG_ClearFlag(uint8_t RNG_FLAG);
103 | ITStatus RNG_GetITStatus(uint8_t RNG_IT);
104 | void RNG_ClearITPendingBit(uint8_t RNG_IT);
105 |
106 | #ifdef __cplusplus
107 | }
108 | #endif
109 |
110 | #endif /*__STM32F4xx_RNG_H */
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
121 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_syscfg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_syscfg.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the SYSCFG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_SYSCFG_H
31 | #define __STM32F4xx_SYSCFG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup SYSCFG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup SYSCFG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup SYSCFG_EXTI_Port_Sources
56 | * @{
57 | */
58 | #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
59 | #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
60 | #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
61 | #define EXTI_PortSourceGPIOD ((uint8_t)0x03)
62 | #define EXTI_PortSourceGPIOE ((uint8_t)0x04)
63 | #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
64 | #define EXTI_PortSourceGPIOG ((uint8_t)0x06)
65 | #define EXTI_PortSourceGPIOH ((uint8_t)0x07)
66 | #define EXTI_PortSourceGPIOI ((uint8_t)0x08)
67 | #define EXTI_PortSourceGPIOJ ((uint8_t)0x09)
68 | #define EXTI_PortSourceGPIOK ((uint8_t)0x0A)
69 |
70 | #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
71 | ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
72 | ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
73 | ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
74 | ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
75 | ((PORTSOURCE) == EXTI_PortSourceGPIOF) || \
76 | ((PORTSOURCE) == EXTI_PortSourceGPIOG) || \
77 | ((PORTSOURCE) == EXTI_PortSourceGPIOH) || \
78 | ((PORTSOURCE) == EXTI_PortSourceGPIOI) || \
79 | ((PORTSOURCE) == EXTI_PortSourceGPIOJ) || \
80 | ((PORTSOURCE) == EXTI_PortSourceGPIOK))
81 |
82 | /**
83 | * @}
84 | */
85 |
86 |
87 | /** @defgroup SYSCFG_EXTI_Pin_Sources
88 | * @{
89 | */
90 | #define EXTI_PinSource0 ((uint8_t)0x00)
91 | #define EXTI_PinSource1 ((uint8_t)0x01)
92 | #define EXTI_PinSource2 ((uint8_t)0x02)
93 | #define EXTI_PinSource3 ((uint8_t)0x03)
94 | #define EXTI_PinSource4 ((uint8_t)0x04)
95 | #define EXTI_PinSource5 ((uint8_t)0x05)
96 | #define EXTI_PinSource6 ((uint8_t)0x06)
97 | #define EXTI_PinSource7 ((uint8_t)0x07)
98 | #define EXTI_PinSource8 ((uint8_t)0x08)
99 | #define EXTI_PinSource9 ((uint8_t)0x09)
100 | #define EXTI_PinSource10 ((uint8_t)0x0A)
101 | #define EXTI_PinSource11 ((uint8_t)0x0B)
102 | #define EXTI_PinSource12 ((uint8_t)0x0C)
103 | #define EXTI_PinSource13 ((uint8_t)0x0D)
104 | #define EXTI_PinSource14 ((uint8_t)0x0E)
105 | #define EXTI_PinSource15 ((uint8_t)0x0F)
106 | #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
107 | ((PINSOURCE) == EXTI_PinSource1) || \
108 | ((PINSOURCE) == EXTI_PinSource2) || \
109 | ((PINSOURCE) == EXTI_PinSource3) || \
110 | ((PINSOURCE) == EXTI_PinSource4) || \
111 | ((PINSOURCE) == EXTI_PinSource5) || \
112 | ((PINSOURCE) == EXTI_PinSource6) || \
113 | ((PINSOURCE) == EXTI_PinSource7) || \
114 | ((PINSOURCE) == EXTI_PinSource8) || \
115 | ((PINSOURCE) == EXTI_PinSource9) || \
116 | ((PINSOURCE) == EXTI_PinSource10) || \
117 | ((PINSOURCE) == EXTI_PinSource11) || \
118 | ((PINSOURCE) == EXTI_PinSource12) || \
119 | ((PINSOURCE) == EXTI_PinSource13) || \
120 | ((PINSOURCE) == EXTI_PinSource14) || \
121 | ((PINSOURCE) == EXTI_PinSource15))
122 | /**
123 | * @}
124 | */
125 |
126 |
127 | /** @defgroup SYSCFG_Memory_Remap_Config
128 | * @{
129 | */
130 | #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
131 | #define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
132 | #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
133 | #define SYSCFG_MemoryRemap_SDRAM ((uint8_t)0x04)
134 |
135 | #if defined (STM32F40_41xxx)
136 | #define SYSCFG_MemoryRemap_FSMC ((uint8_t)0x02)
137 | #endif /* STM32F40_41xxx */
138 |
139 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
140 | #define SYSCFG_MemoryRemap_FMC ((uint8_t)0x02)
141 | #endif /* STM32F427_437xx || STM32F429_439xx */
142 |
143 | #if defined (STM32F40_41xxx)
144 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
145 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
146 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
147 | ((REMAP) == SYSCFG_MemoryRemap_FSMC))
148 | #endif /* STM32F40_41xxx */
149 |
150 | #if defined (STM32F401xx) || defined (STM32F411xE)
151 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
152 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
153 | ((REMAP) == SYSCFG_MemoryRemap_SRAM))
154 | #endif /* STM32F401xx || STM32F411xE */
155 |
156 | #if defined (STM32F427_437xx) || defined (STM32F429_439xx)
157 | #define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
158 | ((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
159 | ((REMAP) == SYSCFG_MemoryRemap_SRAM) || \
160 | ((REMAP) == SYSCFG_MemoryRemap_SDRAM) || \
161 | ((REMAP) == SYSCFG_MemoryRemap_FMC))
162 | #endif /* STM32F427_437xx || STM32F429_439xx */
163 |
164 | /**
165 | * @}
166 | */
167 |
168 |
169 | /** @defgroup SYSCFG_ETHERNET_Media_Interface
170 | * @{
171 | */
172 | #define SYSCFG_ETH_MediaInterface_MII ((uint32_t)0x00000000)
173 | #define SYSCFG_ETH_MediaInterface_RMII ((uint32_t)0x00000001)
174 |
175 | #define IS_SYSCFG_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == SYSCFG_ETH_MediaInterface_MII) || \
176 | ((INTERFACE) == SYSCFG_ETH_MediaInterface_RMII))
177 | /**
178 | * @}
179 | */
180 |
181 | /**
182 | * @}
183 | */
184 |
185 | /* Exported macro ------------------------------------------------------------*/
186 | /* Exported functions --------------------------------------------------------*/
187 |
188 | void SYSCFG_DeInit(void);
189 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
190 | void SYSCFG_MemorySwappingBank(FunctionalState NewState);
191 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
192 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface);
193 | void SYSCFG_CompensationCellCmd(FunctionalState NewState);
194 | FlagStatus SYSCFG_GetCompensationCellStatus(void);
195 |
196 | #ifdef __cplusplus
197 | }
198 | #endif
199 |
200 | #endif /*__STM32F4xx_SYSCFG_H */
201 |
202 | /**
203 | * @}
204 | */
205 |
206 | /**
207 | * @}
208 | */
209 |
210 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
211 |
--------------------------------------------------------------------------------
/FWLIB/inc/stm32f4xx_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_wwdg.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains all the functions prototypes for the WWDG firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F4xx_WWDG_H
31 | #define __STM32F4xx_WWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f4xx.h"
39 |
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup WWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup WWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup WWDG_Prescaler
56 | * @{
57 | */
58 |
59 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
60 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
61 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
62 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
63 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
64 | ((PRESCALER) == WWDG_Prescaler_2) || \
65 | ((PRESCALER) == WWDG_Prescaler_4) || \
66 | ((PRESCALER) == WWDG_Prescaler_8))
67 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
68 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /**
75 | * @}
76 | */
77 |
78 | /* Exported macro ------------------------------------------------------------*/
79 | /* Exported functions --------------------------------------------------------*/
80 |
81 | /* Function used to set the WWDG configuration to the default reset state ****/
82 | void WWDG_DeInit(void);
83 |
84 | /* Prescaler, Refresh window and Counter configuration functions **************/
85 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
86 | void WWDG_SetWindowValue(uint8_t WindowValue);
87 | void WWDG_EnableIT(void);
88 | void WWDG_SetCounter(uint8_t Counter);
89 |
90 | /* WWDG activation function ***************************************************/
91 | void WWDG_Enable(uint8_t Counter);
92 |
93 | /* Interrupts and flags management functions **********************************/
94 | FlagStatus WWDG_GetFlagStatus(void);
95 | void WWDG_ClearFlag(void);
96 |
97 | #ifdef __cplusplus
98 | }
99 | #endif
100 |
101 | #endif /* __STM32F4xx_WWDG_H */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /**
108 | * @}
109 | */
110 |
111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
112 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_crc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_crc.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides all the CRC firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_crc.h"
30 |
31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup CRC
36 | * @brief CRC driver modules
37 | * @{
38 | */
39 |
40 | /* Private typedef -----------------------------------------------------------*/
41 | /* Private define ------------------------------------------------------------*/
42 | /* Private macro -------------------------------------------------------------*/
43 | /* Private variables ---------------------------------------------------------*/
44 | /* Private function prototypes -----------------------------------------------*/
45 | /* Private functions ---------------------------------------------------------*/
46 |
47 | /** @defgroup CRC_Private_Functions
48 | * @{
49 | */
50 |
51 | /**
52 | * @brief Resets the CRC Data register (DR).
53 | * @param None
54 | * @retval None
55 | */
56 | void CRC_ResetDR(void)
57 | {
58 | /* Reset CRC generator */
59 | CRC->CR = CRC_CR_RESET;
60 | }
61 |
62 | /**
63 | * @brief Computes the 32-bit CRC of a given data word(32-bit).
64 | * @param Data: data word(32-bit) to compute its CRC
65 | * @retval 32-bit CRC
66 | */
67 | uint32_t CRC_CalcCRC(uint32_t Data)
68 | {
69 | CRC->DR = Data;
70 |
71 | return (CRC->DR);
72 | }
73 |
74 | /**
75 | * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit).
76 | * @param pBuffer: pointer to the buffer containing the data to be computed
77 | * @param BufferLength: length of the buffer to be computed
78 | * @retval 32-bit CRC
79 | */
80 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
81 | {
82 | uint32_t index = 0;
83 |
84 | for(index = 0; index < BufferLength; index++)
85 | {
86 | CRC->DR = pBuffer[index];
87 | }
88 | return (CRC->DR);
89 | }
90 |
91 | /**
92 | * @brief Returns the current CRC value.
93 | * @param None
94 | * @retval 32-bit CRC
95 | */
96 | uint32_t CRC_GetCRC(void)
97 | {
98 | return (CRC->DR);
99 | }
100 |
101 | /**
102 | * @brief Stores a 8-bit data in the Independent Data(ID) register.
103 | * @param IDValue: 8-bit value to be stored in the ID register
104 | * @retval None
105 | */
106 | void CRC_SetIDRegister(uint8_t IDValue)
107 | {
108 | CRC->IDR = IDValue;
109 | }
110 |
111 | /**
112 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register
113 | * @param None
114 | * @retval 8-bit value of the ID register
115 | */
116 | uint8_t CRC_GetIDRegister(void)
117 | {
118 | return (CRC->IDR);
119 | }
120 |
121 | /**
122 | * @}
123 | */
124 |
125 | /**
126 | * @}
127 | */
128 |
129 | /**
130 | * @}
131 | */
132 |
133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
134 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_dbgmcu.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_dbgmcu.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides all the DBGMCU firmware functions.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_dbgmcu.h"
30 |
31 | /** @addtogroup STM32F4xx_StdPeriph_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup DBGMCU
36 | * @brief DBGMCU driver modules
37 | * @{
38 | */
39 |
40 | /* Private typedef -----------------------------------------------------------*/
41 | /* Private define ------------------------------------------------------------*/
42 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
43 |
44 | /* Private macro -------------------------------------------------------------*/
45 | /* Private variables ---------------------------------------------------------*/
46 | /* Private function prototypes -----------------------------------------------*/
47 | /* Private functions ---------------------------------------------------------*/
48 |
49 | /** @defgroup DBGMCU_Private_Functions
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Returns the device revision identifier.
55 | * @param None
56 | * @retval Device revision identifier
57 | */
58 | uint32_t DBGMCU_GetREVID(void)
59 | {
60 | return(DBGMCU->IDCODE >> 16);
61 | }
62 |
63 | /**
64 | * @brief Returns the device identifier.
65 | * @param None
66 | * @retval Device identifier
67 | */
68 | uint32_t DBGMCU_GetDEVID(void)
69 | {
70 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
71 | }
72 |
73 | /**
74 | * @brief Configures low power mode behavior when the MCU is in Debug mode.
75 | * @param DBGMCU_Periph: specifies the low power mode.
76 | * This parameter can be any combination of the following values:
77 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode
78 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
79 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
80 | * @param NewState: new state of the specified low power mode in Debug mode.
81 | * This parameter can be: ENABLE or DISABLE.
82 | * @retval None
83 | */
84 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
85 | {
86 | /* Check the parameters */
87 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
88 | assert_param(IS_FUNCTIONAL_STATE(NewState));
89 | if (NewState != DISABLE)
90 | {
91 | DBGMCU->CR |= DBGMCU_Periph;
92 | }
93 | else
94 | {
95 | DBGMCU->CR &= ~DBGMCU_Periph;
96 | }
97 | }
98 |
99 | /**
100 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
101 | * @param DBGMCU_Periph: specifies the APB1 peripheral.
102 | * This parameter can be any combination of the following values:
103 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted
104 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
105 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted
106 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted
107 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
108 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted
109 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
110 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
111 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
112 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped when Core is halted.
113 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
114 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
115 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
116 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
117 | * @arg DBGMCU_I2C3_SMBUS_TIMEOUT: I2C3 SMBUS timeout mode stopped when Core is halted
118 | * @arg DBGMCU_CAN2_STOP: Debug CAN1 stopped when Core is halted
119 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted
120 | * This parameter can be: ENABLE or DISABLE.
121 | * @retval None
122 | */
123 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
124 | {
125 | /* Check the parameters */
126 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
127 | assert_param(IS_FUNCTIONAL_STATE(NewState));
128 |
129 | if (NewState != DISABLE)
130 | {
131 | DBGMCU->APB1FZ |= DBGMCU_Periph;
132 | }
133 | else
134 | {
135 | DBGMCU->APB1FZ &= ~DBGMCU_Periph;
136 | }
137 | }
138 |
139 | /**
140 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode.
141 | * @param DBGMCU_Periph: specifies the APB2 peripheral.
142 | * This parameter can be any combination of the following values:
143 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
144 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
145 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
146 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
147 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
148 | * @param NewState: new state of the specified peripheral in Debug mode.
149 | * This parameter can be: ENABLE or DISABLE.
150 | * @retval None
151 | */
152 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
153 | {
154 | /* Check the parameters */
155 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
156 | assert_param(IS_FUNCTIONAL_STATE(NewState));
157 |
158 | if (NewState != DISABLE)
159 | {
160 | DBGMCU->APB2FZ |= DBGMCU_Periph;
161 | }
162 | else
163 | {
164 | DBGMCU->APB2FZ &= ~DBGMCU_Periph;
165 | }
166 | }
167 |
168 | /**
169 | * @}
170 | */
171 |
172 | /**
173 | * @}
174 | */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
181 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_flash_ramfunc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_flash_ramfunc.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief FLASH RAMFUNC module driver.
8 | * This file provides a FLASH firmware functions which should be
9 | * executed from internal SRAM
10 | * + Stop/Start the flash interface while System Run
11 | * + Enable/Disable the flash sleep while System Run
12 | *
13 | @verbatim
14 | ==============================================================================
15 | ##### APIs executed from Internal RAM #####
16 | ==============================================================================
17 | [..]
18 | *** ARM Compiler ***
19 | --------------------
20 | [..] RAM functions are defined using the toolchain options.
21 | Functions that are be executed in RAM should reside in a separate
22 | source module. Using the 'Options for File' dialog you can simply change
23 | the 'Code / Const' area of a module to a memory space in physical RAM.
24 | Available memory areas are declared in the 'Target' tab of the
25 | Options for Target' dialog.
26 |
27 | *** ICCARM Compiler ***
28 | -----------------------
29 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
30 |
31 | *** GNU Compiler ***
32 | --------------------
33 | [..] RAM functions are defined using a specific toolchain attribute
34 | "__attribute__((section(".RamFunc")))".
35 |
36 | @endverbatim
37 | ******************************************************************************
38 | * @attention
39 | *
40 | * © COPYRIGHT 2014 STMicroelectronics
41 | *
42 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
43 | * You may not use this file except in compliance with the License.
44 | * You may obtain a copy of the License at:
45 | *
46 | * http://www.st.com/software_license_agreement_liberty_v2
47 | *
48 | * Unless required by applicable law or agreed to in writing, software
49 | * distributed under the License is distributed on an "AS IS" BASIS,
50 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
51 | * See the License for the specific language governing permissions and
52 | * limitations under the License.
53 | *
54 | ******************************************************************************
55 | */
56 |
57 | /* Includes ------------------------------------------------------------------*/
58 | #include "stm32f4xx_flash_ramfunc.h"
59 |
60 | /** @addtogroup STM32F4xx_StdPeriph_Driver
61 | * @{
62 | */
63 |
64 | /** @defgroup FLASH RAMFUNC
65 | * @brief FLASH RAMFUNC driver modules
66 | * @{
67 | */
68 |
69 | /* Private typedef -----------------------------------------------------------*/
70 | /* Private define ------------------------------------------------------------*/
71 | /* Private macro -------------------------------------------------------------*/
72 | /* Private variables ---------------------------------------------------------*/
73 | /* Private function prototypes -----------------------------------------------*/
74 | /* Private functions ---------------------------------------------------------*/
75 |
76 | /** @defgroup FLASH_RAMFUNC_Private_Functions
77 | * @{
78 | */
79 |
80 | /** @defgroup FLASH_RAMFUNC_Group1 Peripheral features functions executed from internal RAM
81 | * @brief Peripheral Extended features functions
82 | *
83 | @verbatim
84 |
85 | ===============================================================================
86 | ##### ramfunc functions #####
87 | ===============================================================================
88 | [..]
89 | This subsection provides a set of functions that should be executed from RAM
90 | transfers.
91 |
92 | @endverbatim
93 | * @{
94 | */
95 |
96 | /**
97 | * @brief Start/Stop the flash interface while System Run
98 | * @note This mode is only available for STM32F411xx devices.
99 | * @note This mode could n't be set while executing with the flash itself.
100 | * It should be done with specific routine executed from RAM.
101 | * @param NewState: new state of the Smart Card mode.
102 | * This parameter can be: ENABLE or DISABLE.
103 | * @retval None
104 | */
105 | __RAM_FUNC FLASH_FlashInterfaceCmd(FunctionalState NewState)
106 | {
107 | if (NewState != DISABLE)
108 | {
109 | /* Start the flash interface while System Run */
110 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
111 | }
112 | else
113 | {
114 | /* Stop the flash interface while System Run */
115 | SET_BIT(PWR->CR, PWR_CR_FISSR);
116 | }
117 | }
118 |
119 | /**
120 | * @brief Enable/Disable the flash sleep while System Run
121 | * @note This mode is only available for STM32F411xx devices.
122 | * @note This mode could n't be set while executing with the flash itself.
123 | * It should be done with specific routine executed from RAM.
124 | * @param NewState: new state of the Smart Card mode.
125 | * This parameter can be: ENABLE or DISABLE.
126 | * @retval None
127 | */
128 | __RAM_FUNC FLASH_FlashSleepModeCmd(FunctionalState NewState)
129 | {
130 | if (NewState != DISABLE)
131 | {
132 | /* Enable the flash sleep while System Run */
133 | SET_BIT(PWR->CR, PWR_CR_FMSSR);
134 | }
135 | else
136 | {
137 | /* Disable the flash sleep while System Run */
138 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
139 | }
140 | }
141 |
142 | /**
143 | * @}
144 | */
145 |
146 | /**
147 | * @}
148 | */
149 |
150 | /**
151 | * @}
152 | */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
159 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_iwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_iwdg.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Independent watchdog (IWDG) peripheral:
9 | * + Prescaler and Counter configuration
10 | * + IWDG activation
11 | * + Flag management
12 | *
13 | @verbatim
14 | ===============================================================================
15 | ##### IWDG features #####
16 | ===============================================================================
17 | [..]
18 | The IWDG can be started by either software or hardware (configurable
19 | through option byte).
20 |
21 | The IWDG is clocked by its own dedicated low-speed clock (LSI) and
22 | thus stays active even if the main clock fails.
23 | Once the IWDG is started, the LSI is forced ON and cannot be disabled
24 | (LSI cannot be disabled too), and the counter starts counting down from
25 | the reset value of 0xFFF. When it reaches the end of count value (0x000)
26 | a system reset is generated.
27 | The IWDG counter should be reloaded at regular intervals to prevent
28 | an MCU reset.
29 |
30 | The IWDG is implemented in the VDD voltage domain that is still functional
31 | in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
32 |
33 | IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
34 | reset occurs.
35 |
36 | Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
37 | The IWDG timeout may vary due to LSI frequency dispersion. STM32F4xx
38 | devices provide the capability to measure the LSI frequency (LSI clock
39 | connected internally to TIM5 CH4 input capture). The measured value
40 | can be used to have an IWDG timeout with an acceptable accuracy.
41 | For more information, please refer to the STM32F4xx Reference manual
42 |
43 | ##### How to use this driver #####
44 | ===============================================================================
45 | [..]
46 | (#) Enable write access to IWDG_PR and IWDG_RLR registers using
47 | IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function
48 |
49 | (#) Configure the IWDG prescaler using IWDG_SetPrescaler() function
50 |
51 | (#) Configure the IWDG counter value using IWDG_SetReload() function.
52 | This value will be loaded in the IWDG counter each time the counter
53 | is reloaded, then the IWDG will start counting down from this value.
54 |
55 | (#) Start the IWDG using IWDG_Enable() function, when the IWDG is used
56 | in software mode (no need to enable the LSI, it will be enabled
57 | by hardware)
58 |
59 | (#) Then the application program must reload the IWDG counter at regular
60 | intervals during normal operation to prevent an MCU reset, using
61 | IWDG_ReloadCounter() function.
62 |
63 | @endverbatim
64 | ******************************************************************************
65 | * @attention
66 | *
67 | * © COPYRIGHT 2014 STMicroelectronics
68 | *
69 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
70 | * You may not use this file except in compliance with the License.
71 | * You may obtain a copy of the License at:
72 | *
73 | * http://www.st.com/software_license_agreement_liberty_v2
74 | *
75 | * Unless required by applicable law or agreed to in writing, software
76 | * distributed under the License is distributed on an "AS IS" BASIS,
77 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
78 | * See the License for the specific language governing permissions and
79 | * limitations under the License.
80 | *
81 | ******************************************************************************
82 | */
83 |
84 | /* Includes ------------------------------------------------------------------*/
85 | #include "stm32f4xx_iwdg.h"
86 |
87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
88 | * @{
89 | */
90 |
91 | /** @defgroup IWDG
92 | * @brief IWDG driver modules
93 | * @{
94 | */
95 |
96 | /* Private typedef -----------------------------------------------------------*/
97 | /* Private define ------------------------------------------------------------*/
98 |
99 | /* KR register bit mask */
100 | #define KR_KEY_RELOAD ((uint16_t)0xAAAA)
101 | #define KR_KEY_ENABLE ((uint16_t)0xCCCC)
102 |
103 | /* Private macro -------------------------------------------------------------*/
104 | /* Private variables ---------------------------------------------------------*/
105 | /* Private function prototypes -----------------------------------------------*/
106 | /* Private functions ---------------------------------------------------------*/
107 |
108 | /** @defgroup IWDG_Private_Functions
109 | * @{
110 | */
111 |
112 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
113 | * @brief Prescaler and Counter configuration functions
114 | *
115 | @verbatim
116 | ===============================================================================
117 | ##### Prescaler and Counter configuration functions #####
118 | ===============================================================================
119 |
120 | @endverbatim
121 | * @{
122 | */
123 |
124 | /**
125 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
126 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
127 | * This parameter can be one of the following values:
128 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
129 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
130 | * @retval None
131 | */
132 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
133 | {
134 | /* Check the parameters */
135 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
136 | IWDG->KR = IWDG_WriteAccess;
137 | }
138 |
139 | /**
140 | * @brief Sets IWDG Prescaler value.
141 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
142 | * This parameter can be one of the following values:
143 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
144 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
145 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
146 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
147 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
148 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
149 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
150 | * @retval None
151 | */
152 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
153 | {
154 | /* Check the parameters */
155 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
156 | IWDG->PR = IWDG_Prescaler;
157 | }
158 |
159 | /**
160 | * @brief Sets IWDG Reload value.
161 | * @param Reload: specifies the IWDG Reload value.
162 | * This parameter must be a number between 0 and 0x0FFF.
163 | * @retval None
164 | */
165 | void IWDG_SetReload(uint16_t Reload)
166 | {
167 | /* Check the parameters */
168 | assert_param(IS_IWDG_RELOAD(Reload));
169 | IWDG->RLR = Reload;
170 | }
171 |
172 | /**
173 | * @brief Reloads IWDG counter with value defined in the reload register
174 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
175 | * @param None
176 | * @retval None
177 | */
178 | void IWDG_ReloadCounter(void)
179 | {
180 | IWDG->KR = KR_KEY_RELOAD;
181 | }
182 |
183 | /**
184 | * @}
185 | */
186 |
187 | /** @defgroup IWDG_Group2 IWDG activation function
188 | * @brief IWDG activation function
189 | *
190 | @verbatim
191 | ===============================================================================
192 | ##### IWDG activation function #####
193 | ===============================================================================
194 |
195 | @endverbatim
196 | * @{
197 | */
198 |
199 | /**
200 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
201 | * @param None
202 | * @retval None
203 | */
204 | void IWDG_Enable(void)
205 | {
206 | IWDG->KR = KR_KEY_ENABLE;
207 | }
208 |
209 | /**
210 | * @}
211 | */
212 |
213 | /** @defgroup IWDG_Group3 Flag management function
214 | * @brief Flag management function
215 | *
216 | @verbatim
217 | ===============================================================================
218 | ##### Flag management function #####
219 | ===============================================================================
220 |
221 | @endverbatim
222 | * @{
223 | */
224 |
225 | /**
226 | * @brief Checks whether the specified IWDG flag is set or not.
227 | * @param IWDG_FLAG: specifies the flag to check.
228 | * This parameter can be one of the following values:
229 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
230 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
231 | * @retval The new state of IWDG_FLAG (SET or RESET).
232 | */
233 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
234 | {
235 | FlagStatus bitstatus = RESET;
236 | /* Check the parameters */
237 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
238 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
239 | {
240 | bitstatus = SET;
241 | }
242 | else
243 | {
244 | bitstatus = RESET;
245 | }
246 | /* Return the flag status */
247 | return bitstatus;
248 | }
249 |
250 | /**
251 | * @}
252 | */
253 |
254 | /**
255 | * @}
256 | */
257 |
258 | /**
259 | * @}
260 | */
261 |
262 | /**
263 | * @}
264 | */
265 |
266 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
267 |
--------------------------------------------------------------------------------
/FWLIB/src/stm32f4xx_syscfg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_syscfg.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file provides firmware functions to manage the SYSCFG peripheral.
8 | *
9 | @verbatim
10 |
11 | ===============================================================================
12 | ##### How to use this driver #####
13 | ===============================================================================
14 | [..] This driver provides functions for:
15 |
16 | (#) Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
17 |
18 | (#) Swapping the internal flash Bank1 and Bank2 this features is only visible for
19 | STM32F42xxx/43xxx devices Devices.
20 |
21 | (#) Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
22 |
23 | (#) Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
24 |
25 | -@- SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
26 | using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
27 |
28 | @endverbatim
29 | ******************************************************************************
30 | * @attention
31 | *
32 | * © COPYRIGHT 2014 STMicroelectronics
33 | *
34 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
35 | * You may not use this file except in compliance with the License.
36 | * You may obtain a copy of the License at:
37 | *
38 | * http://www.st.com/software_license_agreement_liberty_v2
39 | *
40 | * Unless required by applicable law or agreed to in writing, software
41 | * distributed under the License is distributed on an "AS IS" BASIS,
42 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
43 | * See the License for the specific language governing permissions and
44 | * limitations under the License.
45 | *
46 | ******************************************************************************
47 | */
48 |
49 | /* Includes ------------------------------------------------------------------*/
50 | #include "stm32f4xx_syscfg.h"
51 | #include "stm32f4xx_rcc.h"
52 |
53 | /** @addtogroup STM32F4xx_StdPeriph_Driver
54 | * @{
55 | */
56 |
57 | /** @defgroup SYSCFG
58 | * @brief SYSCFG driver modules
59 | * @{
60 | */
61 |
62 | /* Private typedef -----------------------------------------------------------*/
63 | /* Private define ------------------------------------------------------------*/
64 | /* ------------ RCC registers bit address in the alias region ----------- */
65 | #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
66 | /* --- MEMRMP Register ---*/
67 | /* Alias word address of UFB_MODE bit */
68 | #define MEMRMP_OFFSET SYSCFG_OFFSET
69 | #define UFB_MODE_BitNumber ((uint8_t)0x8)
70 | #define UFB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (UFB_MODE_BitNumber * 4))
71 |
72 |
73 | /* --- PMC Register ---*/
74 | /* Alias word address of MII_RMII_SEL bit */
75 | #define PMC_OFFSET (SYSCFG_OFFSET + 0x04)
76 | #define MII_RMII_SEL_BitNumber ((uint8_t)0x17)
77 | #define PMC_MII_RMII_SEL_BB (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
78 |
79 | /* --- CMPCR Register ---*/
80 | /* Alias word address of CMP_PD bit */
81 | #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20)
82 | #define CMP_PD_BitNumber ((uint8_t)0x00)
83 | #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4))
84 |
85 | /* Private macro -------------------------------------------------------------*/
86 | /* Private variables ---------------------------------------------------------*/
87 | /* Private function prototypes -----------------------------------------------*/
88 | /* Private functions ---------------------------------------------------------*/
89 |
90 | /** @defgroup SYSCFG_Private_Functions
91 | * @{
92 | */
93 |
94 | /**
95 | * @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
96 | * registers to their default reset values.
97 | * @param None
98 | * @retval None
99 | */
100 | void SYSCFG_DeInit(void)
101 | {
102 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
103 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
104 | }
105 |
106 | /**
107 | * @brief Changes the mapping of the specified pin.
108 | * @param SYSCFG_Memory: selects the memory remapping.
109 | * This parameter can be one of the following values:
110 | * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
111 | * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
112 | * @arg SYSCFG_MemoryRemap_FSMC: FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F405xx/407xx and STM32F415xx/417xx devices.
113 | * @arg SYSCFG_MemoryRemap_FMC: FMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 for STM32F42xxx/43xxx devices.
114 | * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (112kB) mapped at 0x00000000
115 | * @arg SYSCFG_MemoryRemap_SDRAM: FMC (External SDRAM) mapped at 0x00000000 for STM32F42xxx/43xxx devices.
116 | * @retval None
117 | */
118 | void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
119 | {
120 | /* Check the parameters */
121 | assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
122 |
123 | SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
124 | }
125 |
126 | /**
127 | * @brief Enables or disables the Interal FLASH Bank Swapping.
128 | *
129 | * @note This function can be used only for STM32F42xxx/43xxx devices.
130 | *
131 | * @param NewState: new state of Interal FLASH Bank swapping.
132 | * This parameter can be one of the following values:
133 | * @arg ENABLE: Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
134 | * and Flash Bank1 mapped at 0x08100000 (and aliased at 0x00100000)
135 | * @arg DISABLE:(the default state) Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
136 | and Flash Bank2 mapped at 0x08100000 (and aliased at 0x00100000)
137 | * @retval None
138 | */
139 | void SYSCFG_MemorySwappingBank(FunctionalState NewState)
140 | {
141 | /* Check the parameters */
142 | assert_param(IS_FUNCTIONAL_STATE(NewState));
143 |
144 | *(__IO uint32_t *) UFB_MODE_BB = (uint32_t)NewState;
145 | }
146 |
147 | /**
148 | * @brief Selects the GPIO pin used as EXTI Line.
149 | * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
150 | * EXTI lines where x can be (A..K) for STM32F42xxx/43xxx devices, (A..I)
151 | * for STM32F405xx/407xx and STM32F415xx/417xx devices or (A, B, C, D and H)
152 | * for STM32401xx devices.
153 | *
154 | * @param EXTI_PinSourcex: specifies the EXTI line to be configured.
155 | * This parameter can be EXTI_PinSourcex where x can be (0..15, except
156 | * for EXTI_PortSourceGPIOI x can be (0..11) for STM32F405xx/407xx
157 | * and STM32F405xx/407xx devices and for EXTI_PortSourceGPIOK x can
158 | * be (0..7) for STM32F42xxx/43xxx devices.
159 | *
160 | * @retval None
161 | */
162 | void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
163 | {
164 | uint32_t tmp = 0x00;
165 |
166 | /* Check the parameters */
167 | assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
168 | assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
169 |
170 | tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
171 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
172 | SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
173 | }
174 |
175 | /**
176 | * @brief Selects the ETHERNET media interface
177 | * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode.
178 | * This parameter can be one of the following values:
179 | * @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
180 | * @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected
181 | * @retval None
182 | */
183 | void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface)
184 | {
185 | assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface));
186 | /* Configure MII_RMII selection bit */
187 | *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface;
188 | }
189 |
190 | /**
191 | * @brief Enables or disables the I/O Compensation Cell.
192 | * @note The I/O compensation cell can be used only when the device supply
193 | * voltage ranges from 2.4 to 3.6 V.
194 | * @param NewState: new state of the I/O Compensation Cell.
195 | * This parameter can be one of the following values:
196 | * @arg ENABLE: I/O compensation cell enabled
197 | * @arg DISABLE: I/O compensation cell power-down mode
198 | * @retval None
199 | */
200 | void SYSCFG_CompensationCellCmd(FunctionalState NewState)
201 | {
202 | /* Check the parameters */
203 | assert_param(IS_FUNCTIONAL_STATE(NewState));
204 |
205 | *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
206 | }
207 |
208 | /**
209 | * @brief Checks whether the I/O Compensation Cell ready flag is set or not.
210 | * @param None
211 | * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
212 | */
213 | FlagStatus SYSCFG_GetCompensationCellStatus(void)
214 | {
215 | FlagStatus bitstatus = RESET;
216 |
217 | if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
218 | {
219 | bitstatus = SET;
220 | }
221 | else
222 | {
223 | bitstatus = RESET;
224 | }
225 | return bitstatus;
226 | }
227 |
228 | /**
229 | * @}
230 | */
231 |
232 | /**
233 | * @}
234 | */
235 |
236 | /**
237 | * @}
238 | */
239 |
240 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
241 |
--------------------------------------------------------------------------------
/HARDWARE/ADC/adc.c:
--------------------------------------------------------------------------------
1 | #include "adc.h"
2 | #include "delay.h"
3 | uint16_t ADCPrimevalValue[6];
4 | /****************************************************************************
5 | * 名 称：void AD1_GPIO_Init(void)
6 | * 功 能：串口引脚初始化
7 | * 入口参数：无
8 | * 出口参数：无
9 | * 说 明：无
10 | ****************************************************************************/
11 | void AD1_GPIO_Init(void) //串口引脚初始化
12 | {
13 | GPIO_InitTypeDef GPIO_InitStructure; //串口引脚结构
14 |
15 | //串口引脚分配时钟
16 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
17 |
18 | /*配置PC0 1 2 3 4 5 为模拟输入(ADC Channel 10 11 12 13 14 15 */
19 | GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 ; //ADC测试试用
20 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; //端口模式为模拟输入方式
21 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;//上拉
22 | GPIO_Init(GPIOC, &GPIO_InitStructure); //用以上几个参数初始化PC口
23 |
24 |
25 | }
26 | /*******************************************************************************
27 | * Function Name : ADC_Configuration
28 | * Description : Configures the different GPIO ports.
29 | * Input : None
30 | * Output : None
31 | * Return : None
32 | *******************************************************************************/
33 | void ADC_Configuration(void)
34 | {
35 | ADC_InitTypeDef ADC_InitStructure;
36 | ADC_CommonInitTypeDef ADC_CommonInitStructure;
37 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 , ENABLE);//ADC1复位
38 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1,DISABLE); //复位结束
39 | ADC_TempSensorVrefintCmd(ENABLE);//使能内部温度传感器
40 |
41 | ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; //独立的转换模式
42 | ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
43 | ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; //DMAʧÄÜ
44 | ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div4; //ADCCLK=PCLK2/4=84/4=21Mhz,ADCʱÖÓ×îºÃ²»Òª³¬¹ý36Mhz
45 | ADC_CommonInit(&ADC_CommonInitStructure);
46 | ADC_InitStructure.ADC_ScanConvMode = ENABLE; //开启扫描模式
47 | ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; //开启连续转换模式
48 | ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;//禁止触发检测，使用软件检测
49 | ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; //对齐方式,ADC为12位中，右对齐方式
50 | ADC_InitStructure.ADC_NbrOfConversion = 3;//开启通道数3
51 | ADC_Init(ADC1, &ADC_InitStructure);
52 |
53 |
54 | ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 1, ADC_SampleTime_480Cycles); //ADC通道组， 第10个通道 采样顺序1，转换时间
55 | ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 2, ADC_SampleTime_480Cycles); //ADC通道组， 第11个通道 采样顺序2，转换时间
56 | // ADC_RegularChannelConfig(ADC1, ADC_Channel_12, 3, ADC_SampleTime_55Cycles5); //ADC通道组， 第12个通道 采样顺序3，转换时间
57 | // ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 4, ADC_SampleTime_55Cycles5); //ADC通道组， 第13个通道 采样顺序4，转换时间
58 | // ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 6, ADC_SampleTime_55Cycles5); //ADC通道组， 第14个通道 采样顺序5，转换时间
59 | // ADC_RegularChannelConfig(ADC1, ADC_Channel_13, 6, ADC_SampleTime_55Cycles5); //ADC通道组， 第15个通道 采样顺序6，转换时间
60 | //常规转换序列2：通道16（内部温度传感器），采样时间>2.2us,(239cycles)
61 | ADC_RegularChannelConfig(ADC1, ADC_Channel_16, 3, ADC_SampleTime_480Cycles);
62 | ADC_DMACmd(ADC1, ENABLE); //使能ADC1 DMA
63 | ADC_Cmd(ADC1, ENABLE); //使能ADC1
64 | ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
65 | }
66 |
67 | /*******************************************************************************
68 | * Function Name : DMA_Configuration(void)
69 | * Description : Configures the different GPIO ports.
70 | * Input : None
71 | * Output : None
72 | * Return : None
73 | *******************************************************************************/
74 | void DMA_Configuration(void)
75 | {
76 | DMA_InitTypeDef DMA_InitStructure; //DMA初始化结构体声明
77 |
78 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1 , ENABLE);
79 |
80 | DMA_DeInit(DMA1_Stream1);
81 | DMA_InitStructure.DMA_Channel = DMA_Channel_4; //开启DMA1的第一通道
82 | DMA_InitStructure.DMA_PeripheralBaseAddr = DR_ADDRESS; //DMA对应的外设ADC基地址
83 | DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADCPrimevalValue; //内存存储基地址用户定义
84 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; //DMA的转换模式为SRC模式，由外设搬移到内存
85 | DMA_InitStructure.DMA_BufferSize = 5; //DMA缓存大小，5个
86 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //接收一次数据后，设备地址禁止后移
87 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //关闭接收一次数据后，目标内存地址后移
88 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //定义外设数据宽度为16位
89 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; //DMA搬移数据尺寸，HalfWord就是为16位
90 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //转换模式，循环缓存模式。
91 | DMA_InitStructure.DMA_Priority = DMA_Priority_High; //DMA优先级高
92 | DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
93 | DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
94 | DMA_Init(DMA1_Stream1, &DMA_InitStructure);
95 | /* Enable DMA1 channel1 */
96 | DMA_Cmd(DMA1_Stream1, ENABLE);
97 | }
98 |
99 | /****************************************************************************
100 | * 名 称：void AD1_Config(void)
101 | * 功 能：AD设置
102 | * 入口参数：无
103 | * 出口参数：无
104 | * 说 明：默认为包数据接收
105 | ****************************************************************************/
106 | void AD1_Config(void)
107 | {
108 | ADC_Configuration(); //AD初始化
109 | AD1_GPIO_Init(); //AD引脚初始化
110 | DMA_Configuration();
111 | }
112 |
113 | //采样数据与实际电压/温度转换：
114 | //u16 GetTemp(u16 advalue)
115 | //{
116 | // u32 Vtemp_sensor;
117 | // s32 Current_Temp;
118 | //
119 | //// ADC转换结束以后，读取ADC_DR寄存器中的结果，转换温度值计算公式如下：
120 | //// V25 - VSENSE
121 | //// T(℃) = ------------ + 25
122 | //// Avg_Slope
123 | //// V25： 温度传感器在25℃时 的输出电压，典型值1.43 V。
124 | //// VSENSE：温度传感器的当前输出电压，与ADC_DR 寄存器中的结果ADC_ConvertedValue之间的转换关系为：
125 | //// ADC_ConvertedValue * Vdd
126 | //// VSENSE = --------------------------
127 | //// Vdd_convert_value(0xFFF)
128 | //// Avg_Slope：温度传感器输出电压和温度的关联参数，典型值4.3 mV/℃。
129 | //
130 | // Vtemp_sensor = advalue * 330 / 4096;
131 | // Current_Temp = (s32)(143 - Vtemp_sensor)*10000/43 + 2500;
132 | // return (s16)Current_Temp;
133 | //}
134 |
135 | /*******************************************************************************
136 | * Function Name : GetTemp
137 | * Description : 根据ADC结果计算温度
138 | * Input : u16 advalue
139 | * Output :
140 | * Return : u16 temp
141 | *******************************************************************************/
142 | //获得ADC值
143 | //返回值:转换结果
144 | u16 Get_Adc(void)
145 | {
146 | ADC_RegularChannelConfig(ADC1, ADC_Channel_16, 1, ADC_SampleTime_480Cycles); //ADC1,ADC通道16，480个周期，提高采样周期可以提高精确度
147 | ADC_SoftwareStartConv(ADC1); //使能指定的ADC1的软件转化启用功能
148 |
149 | while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC ));//等待转化结束
150 |
151 | return ADC_GetConversionValue(ADC1); //返回最近一次的ADC1规则组的转换结果
152 | }
153 | //获取通道16的转换值,取times次然后平均
154 | //times:获取次数
155 | //返回值：通道16的times次转换结果平均值
156 | u16 Get_Adc_Average(u8 times)
157 | {
158 | u32 temp_val=0;
159 | u8 t;
160 | for(t=0;t© COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_CONF_H
30 | #define __STM32F4xx_CONF_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | /* Uncomment the line below to enable peripheral header file inclusion */
34 | #include "stm32f4xx_adc.h"
35 | #include "stm32f4xx_crc.h"
36 | #include "stm32f4xx_dbgmcu.h"
37 | #include "stm32f4xx_dma.h"
38 | #include "stm32f4xx_exti.h"
39 | #include "stm32f4xx_flash.h"
40 | #include "stm32f4xx_gpio.h"
41 | #include "stm32f4xx_i2c.h"
42 | #include "stm32f4xx_iwdg.h"
43 | #include "stm32f4xx_pwr.h"
44 | #include "stm32f4xx_rcc.h"
45 | #include "stm32f4xx_rtc.h"
46 | #include "stm32f4xx_sdio.h"
47 | #include "stm32f4xx_spi.h"
48 | #include "stm32f4xx_syscfg.h"
49 | #include "stm32f4xx_tim.h"
50 | #include "stm32f4xx_usart.h"
51 | #include "stm32f4xx_wwdg.h"
52 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
53 |
54 | #if defined (STM32F429_439xx)
55 | #include "stm32f4xx_cryp.h"
56 | #include "stm32f4xx_hash.h"
57 | #include "stm32f4xx_rng.h"
58 | #include "stm32f4xx_can.h"
59 | #include "stm32f4xx_dac.h"
60 | #include "stm32f4xx_dcmi.h"
61 | #include "stm32f4xx_dma2d.h"
62 | #include "stm32f4xx_fmc.h"
63 | #include "stm32f4xx_ltdc.h"
64 | #include "stm32f4xx_sai.h"
65 | #endif /* STM32F429_439xx */
66 |
67 | #if defined (STM32F427_437xx)
68 | #include "stm32f4xx_cryp.h"
69 | #include "stm32f4xx_hash.h"
70 | #include "stm32f4xx_rng.h"
71 | #include "stm32f4xx_can.h"
72 | #include "stm32f4xx_dac.h"
73 | #include "stm32f4xx_dcmi.h"
74 | #include "stm32f4xx_dma2d.h"
75 | #include "stm32f4xx_fmc.h"
76 | #include "stm32f4xx_sai.h"
77 | #endif /* STM32F427_437xx */
78 |
79 | #if defined (STM32F40_41xxx)
80 | #include "stm32f4xx_cryp.h"
81 | #include "stm32f4xx_hash.h"
82 | #include "stm32f4xx_rng.h"
83 | #include "stm32f4xx_can.h"
84 | #include "stm32f4xx_dac.h"
85 | #include "stm32f4xx_dcmi.h"
86 | #include "stm32f4xx_fsmc.h"
87 | #endif /* STM32F40_41xxx */
88 |
89 | #if defined (STM32F411xE)
90 | #include "stm32f4xx_flash_ramfunc.h"
91 | #endif /* STM32F411xE */
92 | /* Exported types ------------------------------------------------------------*/
93 | /* Exported constants --------------------------------------------------------*/
94 |
95 | /* If an external clock source is used, then the value of the following define
96 | should be set to the value of the external clock source, else, if no external
97 | clock is used, keep this define commented */
98 | /*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
99 |
100 |
101 | /* Uncomment the line below to expanse the "assert_param" macro in the
102 | Standard Peripheral Library drivers code */
103 | /* #define USE_FULL_ASSERT 1 */
104 |
105 | /* Exported macro ------------------------------------------------------------*/
106 | #ifdef USE_FULL_ASSERT
107 |
108 | /**
109 | * @brief The assert_param macro is used for function's parameters check.
110 | * @param expr: If expr is false, it calls assert_failed function
111 | * which reports the name of the source file and the source
112 | * line number of the call that failed.
113 | * If expr is true, it returns no value.
114 | * @retval None
115 | */
116 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
117 | /* Exported functions ------------------------------------------------------- */
118 | void assert_failed(uint8_t* file, uint32_t line);
119 | #else
120 | #define assert_param(expr) ((void)0)
121 | #endif /* USE_FULL_ASSERT */
122 |
123 | #endif /* __STM32F4xx_CONF_H */
124 |
125 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
126 |
--------------------------------------------------------------------------------
/USER/stm32f4xx_it.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.c
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief Main Interrupt Service Routines.
8 | * This file provides template for all exceptions handler and
9 | * peripherals interrupt service routine.
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © COPYRIGHT 2014 STMicroelectronics
14 | *
15 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
16 | * You may not use this file except in compliance with the License.
17 | * You may obtain a copy of the License at:
18 | *
19 | * http://www.st.com/software_license_agreement_liberty_v2
20 | *
21 | * Unless required by applicable law or agreed to in writing, software
22 | * distributed under the License is distributed on an "AS IS" BASIS,
23 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
24 | * See the License for the specific language governing permissions and
25 | * limitations under the License.
26 | *
27 | ******************************************************************************
28 | */
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f4xx_it.h"
32 |
33 |
34 | /** @addtogroup Template_Project
35 | * @{
36 | */
37 |
38 | /* Private typedef -----------------------------------------------------------*/
39 | /* Private define ------------------------------------------------------------*/
40 | /* Private macro -------------------------------------------------------------*/
41 | /* Private variables ---------------------------------------------------------*/
42 | /* Private function prototypes -----------------------------------------------*/
43 | /* Private functions ---------------------------------------------------------*/
44 |
45 | /******************************************************************************/
46 | /* Cortex-M4 Processor Exceptions Handlers */
47 | /******************************************************************************/
48 |
49 | /**
50 | * @brief This function handles NMI exception.
51 | * @param None
52 | * @retval None
53 | */
54 | void NMI_Handler(void)
55 | {
56 | }
57 |
58 | /**
59 | * @brief This function handles Hard Fault exception.
60 | * @param None
61 | * @retval None
62 | */
63 | void HardFault_Handler(void)
64 | {
65 | /* Go to infinite loop when Hard Fault exception occurs */
66 | while (1)
67 | {
68 | }
69 | }
70 |
71 | /**
72 | * @brief This function handles Memory Manage exception.
73 | * @param None
74 | * @retval None
75 | */
76 | void MemManage_Handler(void)
77 | {
78 | /* Go to infinite loop when Memory Manage exception occurs */
79 | while (1)
80 | {
81 | }
82 | }
83 |
84 | /**
85 | * @brief This function handles Bus Fault exception.
86 | * @param None
87 | * @retval None
88 | */
89 | void BusFault_Handler(void)
90 | {
91 | /* Go to infinite loop when Bus Fault exception occurs */
92 | while (1)
93 | {
94 | }
95 | }
96 |
97 | /**
98 | * @brief This function handles Usage Fault exception.
99 | * @param None
100 | * @retval None
101 | */
102 | void UsageFault_Handler(void)
103 | {
104 | /* Go to infinite loop when Usage Fault exception occurs */
105 | while (1)
106 | {
107 | }
108 | }
109 |
110 | /**
111 | * @brief This function handles SVCall exception.
112 | * @param None
113 | * @retval None
114 | */
115 | void SVC_Handler(void)
116 | {
117 | }
118 |
119 | /**
120 | * @brief This function handles Debug Monitor exception.
121 | * @param None
122 | * @retval None
123 | */
124 | void DebugMon_Handler(void)
125 | {
126 | }
127 |
128 | /**
129 | * @brief This function handles PendSVC exception.
130 | * @param None
131 | * @retval None
132 | */
133 | void PendSV_Handler(void)
134 | {
135 | }
136 |
137 | /**
138 | * @brief This function handles SysTick Handler.
139 | * @param None
140 | * @retval None
141 | */
142 | void SysTick_Handler(void)
143 | {
144 |
145 | }
146 |
147 | /******************************************************************************/
148 | /* STM32F4xx Peripherals Interrupt Handlers */
149 | /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
150 | /* available peripheral interrupt handler's name please refer to the startup */
151 | /* file (startup_stm32f4xx.s). */
152 | /******************************************************************************/
153 |
154 | /**
155 | * @brief This function handles PPP interrupt request.
156 | * @param None
157 | * @retval None
158 | */
159 | /*void PPP_IRQHandler(void)
160 | {
161 | }*/
162 |
163 | /**
164 | * @}
165 | */
166 |
167 |
168 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
169 |
--------------------------------------------------------------------------------
/USER/stm32f4xx_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F4xx_StdPeriph_Templates/stm32f4xx_it.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief This file contains the headers of the interrupt handlers.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F4xx_IT_H
30 | #define __STM32F4xx_IT_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /* Includes ------------------------------------------------------------------*/
37 | #include "stm32f4xx.h"
38 |
39 | /* Exported types ------------------------------------------------------------*/
40 | /* Exported constants --------------------------------------------------------*/
41 | /* Exported macro ------------------------------------------------------------*/
42 | /* Exported functions ------------------------------------------------------- */
43 |
44 | void NMI_Handler(void);
45 | void HardFault_Handler(void);
46 | void MemManage_Handler(void);
47 | void BusFault_Handler(void);
48 | void UsageFault_Handler(void);
49 | void SVC_Handler(void);
50 | void DebugMon_Handler(void);
51 | void PendSV_Handler(void);
52 | void SysTick_Handler(void);
53 |
54 | #ifdef __cplusplus
55 | }
56 | #endif
57 |
58 | #endif /* __STM32F4xx_IT_H */
59 |
60 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
61 |
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/USER/system_stm32f4xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @version V1.4.0
6 | * @date 04-August-2014
7 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f4xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F4XX_H
40 | #define __SYSTEM_STM32F4XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F4xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F4xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /** @addtogroup STM32F4xx_System_Exported_Constants
67 | * @{
68 | */
69 |
70 | /**
71 | * @}
72 | */
73 |
74 | /** @addtogroup STM32F4xx_System_Exported_Macros
75 | * @{
76 | */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F4xx_System_Exported_Functions
83 | * @{
84 | */
85 |
86 | extern void SystemInit(void);
87 | extern void SystemCoreClockUpdate(void);
88 | /**
89 | * @}
90 | */
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /*__SYSTEM_STM32F4XX_H */
97 |
98 | /**
99 | * @}
100 | */
101 |
102 | /**
103 | * @}
104 | */
105 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
106 |
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/readme.txt:
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https://raw.githubusercontent.com/hanxu614834507/BLCD_stm32-MPU6500/3c9c9eab9ecf73fe9386214d16a9a7d7df7d212f/readme.txt
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