├── .gitignore
├── LICENSE
├── PROGRAM-MDK
    ├── DRIVERS
    │   ├── ADC
    │   │   ├── ADC.c
    │   │   └── ADC.h
    │   ├── BMP180
    │   │   ├── BMP180.c
    │   │   └── BMP180.h
    │   ├── DS3231
    │   │   ├── DS3231.c
    │   │   └── DS3231.h
    │   ├── FLASH
    │   │   ├── EEPROM_POS.h
    │   │   ├── FLASH.c
    │   │   └── FLASH.h
    │   ├── I2C
    │   │   ├── I2C.c
    │   │   └── I2C.h
    │   ├── KEY
    │   │   ├── KEY.c
    │   │   └── KEY.h
    │   ├── SHT20
    │   │   ├── SHT20.c
    │   │   └── SHT20.h
    │   ├── SW3518
    │   │   ├── SW3518.c
    │   │   └── SW3518.h
    │   ├── USART
    │   │   ├── USART.c
    │   │   └── USART.h
    │   └── VFD
    │   │   ├── VFD.c
    │   │   └── VFD.h
    ├── Libraries
    │   ├── CMSIS
    │   │   └── CM3
    │   │   │   ├── CoreSupport
    │   │   │       ├── core_cm3.c
    │   │   │       └── core_cm3.h
    │   │   │   └── DeviceSupport
    │   │   │       └── ST
    │   │   │           └── STM32F10x
    │   │   │               ├── startup
    │   │   │                   ├── TrueSTUDIO
    │   │   │                   │   ├── startup_stm32f10x_cl.s
    │   │   │                   │   ├── startup_stm32f10x_hd.s
    │   │   │                   │   ├── startup_stm32f10x_hd_vl.s
    │   │   │                   │   ├── startup_stm32f10x_ld.s
    │   │   │                   │   ├── startup_stm32f10x_ld_vl.s
    │   │   │                   │   ├── startup_stm32f10x_md.s
    │   │   │                   │   ├── startup_stm32f10x_md_vl.s
    │   │   │                   │   └── startup_stm32f10x_xl.s
    │   │   │                   ├── arm
    │   │   │                   │   ├── startup_stm32f10x_cl.s
    │   │   │                   │   ├── startup_stm32f10x_hd.s
    │   │   │                   │   ├── startup_stm32f10x_hd_vl.s
    │   │   │                   │   ├── startup_stm32f10x_ld.s
    │   │   │                   │   ├── startup_stm32f10x_ld_vl.s
    │   │   │                   │   ├── startup_stm32f10x_md.s
    │   │   │                   │   ├── startup_stm32f10x_md_vl.s
    │   │   │                   │   └── startup_stm32f10x_xl.s
    │   │   │                   ├── gcc_ride7
    │   │   │                   │   ├── startup_stm32f10x_cl.s
    │   │   │                   │   ├── startup_stm32f10x_hd.s
    │   │   │                   │   ├── startup_stm32f10x_hd_vl.s
    │   │   │                   │   ├── startup_stm32f10x_ld.s
    │   │   │                   │   ├── startup_stm32f10x_ld_vl.s
    │   │   │                   │   ├── startup_stm32f10x_md.s
    │   │   │                   │   ├── startup_stm32f10x_md_vl.s
    │   │   │                   │   └── startup_stm32f10x_xl.s
    │   │   │                   └── iar
    │   │   │                   │   ├── startup_stm32f10x_cl.s
    │   │   │                   │   ├── startup_stm32f10x_hd.s
    │   │   │                   │   ├── startup_stm32f10x_hd_vl.s
    │   │   │                   │   ├── startup_stm32f10x_ld.s
    │   │   │                   │   ├── startup_stm32f10x_ld_vl.s
    │   │   │                   │   ├── startup_stm32f10x_md.s
    │   │   │                   │   ├── startup_stm32f10x_md_vl.s
    │   │   │                   │   └── startup_stm32f10x_xl.s
    │   │   │               ├── stm32f10x.h
    │   │   │               └── system_stm32f10x.h
    │   └── STM32F10x_StdPeriph_Driver
    │   │   ├── inc
    │   │       ├── misc.h
    │   │       ├── stm32f10x_adc.h
    │   │       ├── stm32f10x_bkp.h
    │   │       ├── stm32f10x_can.h
    │   │       ├── stm32f10x_cec.h
    │   │       ├── stm32f10x_crc.h
    │   │       ├── stm32f10x_dac.h
    │   │       ├── stm32f10x_dbgmcu.h
    │   │       ├── stm32f10x_dma.h
    │   │       ├── stm32f10x_exti.h
    │   │       ├── stm32f10x_flash.h
    │   │       ├── stm32f10x_fsmc.h
    │   │       ├── stm32f10x_gpio.h
    │   │       ├── stm32f10x_i2c.h
    │   │       ├── stm32f10x_iwdg.h
    │   │       ├── stm32f10x_pwr.h
    │   │       ├── stm32f10x_rcc.h
    │   │       ├── stm32f10x_rtc.h
    │   │       ├── stm32f10x_sdio.h
    │   │       ├── stm32f10x_spi.h
    │   │       ├── stm32f10x_tim.h
    │   │       ├── stm32f10x_usart.h
    │   │       └── stm32f10x_wwdg.h
    │   │   └── src
    │   │       ├── misc.c
    │   │       ├── stm32f10x_adc.c
    │   │       ├── stm32f10x_bkp.c
    │   │       ├── stm32f10x_can.c
    │   │       ├── stm32f10x_cec.c
    │   │       ├── stm32f10x_crc.c
    │   │       ├── stm32f10x_dac.c
    │   │       ├── stm32f10x_dbgmcu.c
    │   │       ├── stm32f10x_dma.c
    │   │       ├── stm32f10x_exti.c
    │   │       ├── stm32f10x_flash.c
    │   │       ├── stm32f10x_fsmc.c
    │   │       ├── stm32f10x_gpio.c
    │   │       ├── stm32f10x_i2c.c
    │   │       ├── stm32f10x_iwdg.c
    │   │       ├── stm32f10x_pwr.c
    │   │       ├── stm32f10x_rcc.c
    │   │       ├── stm32f10x_rtc.c
    │   │       ├── stm32f10x_sdio.c
    │   │       ├── stm32f10x_spi.c
    │   │       ├── stm32f10x_tim.c
    │   │       ├── stm32f10x_usart.c
    │   │       └── stm32f10x_wwdg.c
    ├── MDK-ARM
    │   ├── DebugConfig
    │   │   ├── LED_STM32F103C8_1.0.0.dbgconf
    │   │   └── LED_STM32F103CB_1.0.0.dbgconf
    │   ├── EventRecorderStub.scvd
    │   ├── JLinkSettings.ini
    │   ├── LED.BAT
    │   ├── Obj
    │   │   └── Project.hex
    │   ├── Project.uvgui.Administrator
    │   ├── Project.uvgui.avrman
    │   ├── Project.uvguix.Administrator
    │   ├── Project.uvguix.hbc
    │   ├── Project.uvguix.huang
    │   ├── Project.uvopt
    │   ├── Project.uvoptx
    │   └── Project.uvprojx
    ├── PAGE
    │   ├── alarm.c
    │   ├── page.h
    │   ├── pressure.c
    │   ├── screen.c
    │   ├── th.c
    │   └── time.c
    ├── USER
    │   ├── i2c.c
    │   ├── main.c
    │   ├── stm32f10x_conf.h
    │   ├── stm32f10x_it.c
    │   ├── stm32f10x_it.h
    │   └── system_stm32f10x.c
    ├── keilkill.bat
    ├── sys
    │   ├── HBC_MISC.c
    │   ├── HBC_MISC.h
    │   ├── stm32f10x.h
    │   ├── sys.c
    │   ├── sys.h
    │   └── system_stm32f10x.h
    └── usart
    │   ├── usart.c
    │   └── usart.h
└── README.md


/.gitignore:
--------------------------------------------------------------------------------
 1 | # Prerequisites
 2 | *.d
 3 | 
 4 | # Object files
 5 | *.o
 6 | *.ko
 7 | *.obj
 8 | *.elf
 9 | 
10 | # Linker output
11 | *.ilk
12 | *.map
13 | *.exp
14 | 
15 | # Precompiled Headers
16 | *.gch
17 | *.pch
18 | 
19 | # Libraries
20 | *.lib
21 | *.a
22 | *.la
23 | *.lo
24 | 
25 | # Shared objects (inc. Windows DLLs)
26 | *.dll
27 | *.so
28 | *.so.*
29 | *.dylib
30 | 
31 | # Executables
32 | *.exe
33 | *.out
34 | *.app
35 | *.i*86
36 | *.x86_64
37 | *.hex
38 | 
39 | # Debug files
40 | *.dSYM/
41 | *.su
42 | *.idb
43 | *.pdb
44 | 
45 | # Kernel Module Compile Results
46 | *.mod*
47 | *.cmd
48 | .tmp_versions/
49 | modules.order
50 | Module.symvers
51 | Mkfile.old
52 | dkms.conf
53 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/ADC/ADC.c:
--------------------------------------------------------------------------------
 1 | #include "ADC.h"
 2 | #define ADC1_DR_Address    ((u32)0x4001244C)
 3 | __IO u16 ADC_ConvertedValue[3][3];  
 4 | 
 5 | void ADC_Configuration(){
 6 | 	
 7 | 	GPIO_InitTypeDef GPIO_InitStructure;
 8 | 	DMA_InitTypeDef DMA_InitStructure;
 9 | 	ADC_InitTypeDef ADC_InitStructure;
10 | 	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
11 | 	GPIO_InitStructure.GPIO_Pin=GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6;
12 | 	GPIO_Init(GPIOA,&GPIO_InitStructure);
13 | 	
14 |   
15 |   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); //??MDA1??
16 | 	/* DMA channel1 configuration */
17 |   DMA_DeInit(DMA1_Channel1);  //??DMA??
18 |   DMA_InitStructure.DMA_PeripheralBaseAddr = ADC1_DR_Address;////ADC1??---??ADC1?????????
19 |   DMA_InitStructure.DMA_MemoryBaseAddr = (u32)&ADC_ConvertedValue;	//??DMA????,ADC???????????
20 |   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; //?????????????
21 |   DMA_InitStructure.DMA_BufferSize = 3 * 3;	//?????---2??????2???
22 |   DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //??????
23 |   DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //??????---?????????ADC1?????---???????????????---
24 |   DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; //????????---??16?
25 |   DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
26 |   DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;//????---2????????????ADC1?????ADC?---
27 |   DMA_InitStructure.DMA_Priority = DMA_Priority_High;
28 |   DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
29 |   DMA_Init(DMA1_Channel1, &DMA_InitStructure);
30 |   
31 |   /* Enable DMA channel1 */
32 |   DMA_Cmd(DMA1_Channel1, ENABLE);  //??DMA??
33 | 
34 |   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);	//??ADC1??
35 |      
36 |   /* ADC1 configuration */
37 |   ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; //??????,????
38 |   ADC_InitStructure.ADC_ScanConvMode = ENABLE; //???????????
39 |   ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; //???????
40 |   ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; //???????
41 |   ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
42 |   ADC_InitStructure.ADC_NbrOfChannel =3;  // ADC??????
43 |   ADC_Init(ADC1, &ADC_InitStructure);
44 | 
45 |   /* ADC1 regular channel11 configuration */ 
46 |   ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 1, ADC_SampleTime_55Cycles5); //??1????55.5?????
47 | 	ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 2, ADC_SampleTime_55Cycles5); 
48 | 	ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 3, ADC_SampleTime_55Cycles5);
49 |   /* Enable ADC1 DMA */
50 |   ADC_DMACmd(ADC1, ENABLE);	 //??ADC?DMA
51 |   
52 |   /* Enable ADC1 */
53 |   ADC_Cmd(ADC1, ENABLE); //??ADC1
54 | 
55 |   /* Enable ADC1 reset calibaration register */   
56 |   ADC_ResetCalibration(ADC1);
57 |   /* Check the end of ADC1 reset calibration register */
58 |   while(ADC_GetResetCalibrationStatus(ADC1));
59 | 
60 |   /* Start ADC1 calibaration */
61 |   ADC_StartCalibration(ADC1);
62 |   /* Check the end of ADC1 calibration */
63 |   while(ADC_GetCalibrationStatus(ADC1));
64 |      
65 |   /* Start ADC1 Software Conversion */ 
66 |   ADC_SoftwareStartConvCmd(ADC1, ENABLE);  //????
67 | 
68 | }
69 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/ADC/ADC.h:
--------------------------------------------------------------------------------
 1 | #ifndef __ADC_H
 2 | #define __ADC_H
 3 | 
 4 | #include "stm32f10x.h"
 5 | #include "stm32f10x_adc.h"
 6 | #include "stm32f10x_dma.h"
 7 | 
 8 | #define Channel_Num  5
 9 | #define Sample_Num  5
10 | 
11 | void ADC_Configuration(void);
12 | 
13 | #endif
14 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/BMP180/BMP180.c:
--------------------------------------------------------------------------------
  1 | #include "BMP180.h"
  2 | #include "HBC_MISC.h"
  3 | #include "math.h"
  4 | #include "USART.h"
  5 | extern BMP180 bmp180;
  6 | u8 BMP180_Check(void){
  7 | u8 STATUS;
  8 |  STATUS=I2C_Check(BMP180_ADDR);
  9 | 	return STATUS;
 10 | }
 11 | 
 12 | void BMP_ReadCalibrationData(void)
 13 | {
 14 |     bmp180.AC1 = I2C_ReadTwoByte(BMP180_ADDR,0xAA);
 15 |     bmp180.AC2 = I2C_ReadTwoByte(BMP180_ADDR,0xAC);
 16 |     bmp180.AC3 = I2C_ReadTwoByte(BMP180_ADDR,0xAE);
 17 |     bmp180.AC4 = I2C_ReadTwoByte(BMP180_ADDR,0xB0);
 18 |     bmp180.AC5 = I2C_ReadTwoByte(BMP180_ADDR,0xB2);
 19 |     bmp180.AC6 = I2C_ReadTwoByte(BMP180_ADDR,0xB4);
 20 |     bmp180.B1  = I2C_ReadTwoByte(BMP180_ADDR,0xB6);
 21 |     bmp180.B2  = I2C_ReadTwoByte(BMP180_ADDR,0xB8);
 22 |     bmp180.MB  = I2C_ReadTwoByte(BMP180_ADDR,0xBA);
 23 |     bmp180.MC  = I2C_ReadTwoByte(BMP180_ADDR,0xBC);
 24 |     bmp180.MD  = I2C_ReadTwoByte(BMP180_ADDR,0xBE);
 25 | }
 26 | 
 27 | //从BMP180读取未修正的温度
 28 | long BMP_Read_UT(void)
 29 | {
 30 | 	char sendbuf[20];
 31 | 		long temp = 0;
 32 | 		Delay(500000);
 33 |     
 34 |     I2C_WriteByte(BMP180_ADDR,0xF4,0x2E);
 35 | 		Delay(500000);
 36 |     Delay(500);
 37 |     temp = (long)I2C_ReadTwoByte(BMP180_ADDR,0xF6);
 38 | 	sprintf(sendbuf,"UT:%ld\r\n",temp);
 39 | 	UART1_Send(sendbuf);
 40 |     return temp;
 41 | 	
 42 | }
 43 | 
 44 | //从BMP180读取未修正的大气压
 45 | long BMP_Read_UP(void)
 46 | {
 47 | 	char sendbuf[20];
 48 |     long pressure = 0;
 49 | 		Delay(500000);
 50 |     I2C_WriteByte(BMP180_ADDR,0xF4,0x34);
 51 |     Delay(500000);
 52 | 
 53 |     pressure = (long)I2C_ReadTwoByte(BMP180_ADDR,0xF6);
 54 |     //pressure = pressure + BMP_ReadOneByte(0xf8);
 55 |     pressure &= 0x0000FFFF;
 56 | 		sprintf(sendbuf,"UP:%ld\r\n",pressure);
 57 | 	UART1_Send(sendbuf);
 58 |     return pressure;
 59 | }
 60 | 
 61 | //用获取的参数对温度和大气压进行修正，并计算海拔
 62 | void BMP_UncompemstatedToTrue(void)
 63 | {
 64 |     //bmp180.UT = BMP_Read_UT();//第一次读取错误
 65 |     bmp180.UT = BMP_Read_UT();//进行第二次读取修正参数
 66 |     bmp180.UP = BMP_Read_UP();
 67 | 
 68 |     bmp180.X1 = (bmp180.UT - bmp180.AC6) * bmp180.AC5 / 32768;
 69 |     bmp180.X2 = (((long)bmp180.MC) *2048) / (bmp180.X1 + bmp180.MD);
 70 |     bmp180.B5 = bmp180.X1 + bmp180.X2;
 71 |     bmp180.Temp  = (bmp180.B5 + 8) /16.0;
 72 | 
 73 |     bmp180.B6 = bmp180.B5 - 4000;
 74 |     bmp180.X1 = ((long)bmp180.B2 * (bmp180.B6 * bmp180.B6 >> 12)) >> 11;
 75 |     bmp180.X2 = ((long)bmp180.AC2) * bmp180.B6 >> 11;
 76 |     bmp180.X3 = bmp180.X1 + bmp180.X2;
 77 | 
 78 |     bmp180.B3 = ((((long)bmp180.AC1) * 4 + bmp180.X3) + 2) /4;
 79 |     bmp180.X1 = ((long)bmp180.AC3) * bmp180.B6 >> 13;
 80 |     bmp180.X2 = (((long)bmp180.B1) *(bmp180.B6*bmp180.B6 >> 12)) >>16;
 81 |     bmp180.X3 = ((bmp180.X1 + bmp180.X2) + 2) >> 2;
 82 |     bmp180.B4 = ((long)bmp180.AC4) * (unsigned long)(bmp180.X3 + 32768) >> 15;
 83 |     bmp180.B7 = ((unsigned long)bmp180.UP - bmp180.B3) * 50000;
 84 | 
 85 |     if(bmp180.B7 < 0x80000000)
 86 |     {
 87 |         bmp180.p = (bmp180.B7 * 2) / bmp180.B4;     
 88 |     }
 89 |     else
 90 |     {
 91 |         bmp180.p = (bmp180.B7 / bmp180.B4) * 2;
 92 |     }
 93 | 
 94 |     bmp180.X1 = (bmp180.p >> 8) * (bmp180.p >>8);
 95 |     bmp180.X1 = (((long)bmp180.X1) * 3038) >> 16;
 96 |     bmp180.X2 = (-7357 * bmp180.p) >> 16;
 97 | 
 98 |     bmp180.p = bmp180.p + ((bmp180.X1 + bmp180.X2 + 3791) >> 4);
 99 | 
100 |     bmp180.altitude = 44330 * (1-pow(((bmp180.p) / 101325.0),(1.0/5.255)));  
101 | }
102 | 
103 | /*
104 | u16 getVoltage(u8 P){
105 | 	u8 MSB=0,LSB=0;
106 | 	u16 vbuf=0,voltage=0;
107 | 		I2C_WriteByte(SW3518_I2C_CTRL,0x02);
108 | 		I2C_WriteByte(SW3518_ADC_DATA_TYPE,0x01);
109 | 		MSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_H);
110 | 		LSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_L);
111 | 		vbuf=(MSB<<4)+LSB;
112 | 		voltage=vbuf*10;
113 | 		return voltage;
114 | }*/
115 | 
116 | 
117 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/BMP180/BMP180.h:
--------------------------------------------------------------------------------
 1 | #ifndef __BMP180_H
 2 | #define __BMP180_H
 3 | 
 4 | #include "I2C.h"
 5 | #include "USART.h"
 6 | 
 7 | #define BMP180_ADDR 0x77
 8 | 
 9 | 
10 | u8 BMP180_Check(void);
11 | void BMP_ReadCalibrationData(void);
12 | long BMP_Read_UT(void);
13 | long BMP_Read_UP(void);
14 | void BMP_UncompemstatedToTrue(void);
15 | 
16 | typedef struct BMP180{
17 | 	short AC1;
18 |     short AC2;
19 |     short AC3;
20 |     unsigned short AC4;
21 |     unsigned short AC5;
22 |     unsigned short AC6;
23 |     short B1;
24 |     short B2;
25 |     short MB;
26 |     short MC;
27 |     short MD;
28 |     long UT;
29 |     long UP;
30 |     long X1;
31 |     long X2;
32 |     long X3;
33 |     long B3;
34 |     unsigned long B4;
35 |     long B5;
36 |     long B6;
37 |     long B7;
38 |     long p;
39 |     float Temp;
40 |     float altitude;
41 | }BMP180;
42 | #endif
43 | 
44 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/DS3231/DS3231.c:
--------------------------------------------------------------------------------
 1 | #include "DS3231.h"
 2 | u8 BCD2HEX(u8 BCD){
 3 | 	u8 HSB,LSB;
 4 | 	HSB=BCD>>4;
 5 | 	LSB=BCD&0x0F;
 6 | 	return HSB*10+LSB;
 7 | }
 8 | u8 HEX2BCD(u8 HEX){
 9 | 	u8 HSB,LSB;
10 | 	HSB=HEX/10;
11 | 	LSB=HEX%10;
12 | 	return (HSB<<4)+LSB;
13 | }
14 | u8 DS3231_Check(void){
15 | u8 STATUS;
16 |  STATUS=I2C_Check(DS3231_ADDR);
17 | 	return STATUS;
18 | }
19 | 
20 | void DS3231_Get(Datetime * get){
21 | 	u8 BUF;
22 | 	get->second=BCD2HEX(I2C_ReadByte(DS3231_ADDR,DS3231_SEC));
23 | 	get->minute=BCD2HEX(I2C_ReadByte(DS3231_ADDR,DS3231_MIN));
24 | 	BUF=I2C_ReadByte(DS3231_ADDR,DS3231_HOUR);
25 | 	get->p1224=(BUF&0x40)>>6;
26 | 	if(get->p1224){
27 | 		get->hour=BCD2HEX(BUF&0x1F);
28 | 		get->ampm=(BUF&0x60)>>5;
29 | 	}
30 | 	else get->hour=BCD2HEX(BUF&0x3F);
31 | 	get->day=I2C_ReadByte(DS3231_ADDR,DS3231_DAY)&0x07;
32 | 	get->date=BCD2HEX(I2C_ReadByte(DS3231_ADDR,DS3231_DATE));
33 | 	BUF=I2C_ReadByte(DS3231_ADDR,DS3231_MPC);
34 | 	get->century=BUF&0x80;
35 | 	get->month=BCD2HEX(BUF&0x1F);
36 | 	get->year=BCD2HEX(I2C_ReadByte(DS3231_ADDR,DS3231_YEAR));
37 | }
38 | void DS3231_Set(Datetime * set){
39 | 	
40 | 	I2C_WriteByte(DS3231_ADDR,DS3231_SEC,HEX2BCD(set->second));
41 | 	I2C_WriteByte(DS3231_ADDR,DS3231_MIN,HEX2BCD(set->minute));
42 | 	if(set->p1224) {
43 | 		I2C_WriteByte(DS3231_ADDR,DS3231_HOUR,(set->p1224<<6)+(set->ampm<<5)+HEX2BCD(set->hour));
44 | 	}
45 | 	else I2C_WriteByte(DS3231_ADDR,DS3231_HOUR,(set->p1224<<6)+HEX2BCD(set->hour));
46 | 	I2C_WriteByte(DS3231_ADDR,DS3231_DAY,set->day);
47 | 	I2C_WriteByte(DS3231_ADDR,DS3231_DATE,HEX2BCD(set->date));
48 | 	//I2C_WriteByte(DS3231_ADDR,DS3231_MPC,set->century<<7&HEX2BCD(set->month));
49 | 	I2C_WriteByte(DS3231_ADDR,DS3231_MPC,HEX2BCD(set->month));
50 | 	I2C_WriteByte(DS3231_ADDR,DS3231_YEAR,HEX2BCD(set->year));
51 | }
52 | /*
53 | u16 getVoltage(u8 P){
54 | 	u8 MSB=0,LSB=0;
55 | 	u16 vbuf=0,voltage=0;
56 | 		I2C_WriteByte(SW3518_I2C_CTRL,0x02);
57 | 		I2C_WriteByte(SW3518_ADC_DATA_TYPE,0x01);
58 | 		MSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_H);
59 | 		LSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_L);
60 | 		vbuf=(MSB<<4)+LSB;
61 | 		voltage=vbuf*10;
62 | 		return voltage;
63 | }*/
64 | 
65 | 
66 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/DS3231/DS3231.h:
--------------------------------------------------------------------------------
 1 | #ifndef __DS3231_H
 2 | #define __DS3231_H
 3 | 
 4 | #include "I2C.h"
 5 | #include "USART.h"
 6 | 
 7 | #define DS3231_ADDR 0X68
 8 | 
 9 | #define DS3231_SEC 0x00
10 | #define DS3231_MIN 0x01
11 | #define DS3231_HOUR 0x02
12 | #define DS3231_DAY 0x03
13 | #define DS3231_DATE 0x04
14 | #define DS3231_MPC 0x05
15 | #define DS3231_YEAR 0x06
16 | 
17 | typedef struct typDatetime{
18 | 	u8 second;
19 | 	u8 minute;
20 | 	u8 p1224;
21 | 	u8 ampm;
22 | 	u8 hour;
23 | 	u8 day;
24 | 	u8 date;
25 | 	u8 month;
26 | 	u8 century;
27 | 	u8 year;
28 | }Datetime;
29 | 
30 | u8 DS3231_Check(void);
31 | void DS3231_Get(Datetime * get);
32 | void DS3231_Set(Datetime * set);
33 | #endif
34 | 
35 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/FLASH/EEPROM_POS.h:
--------------------------------------------------------------------------------
 1 | #ifndef __EEPROM_POS_H
 2 | #define __EEPROM_POS_H
 3 | 
 4 | #define FLASH_SAVE_ADDR  0X08007000
 5 | #define ALARM1_ADDR 2
 6 | #define ALARM2_ADDR 8
 7 | #define ALARM3_ADDR 14
 8 | #define WDT_ADDR 0
 9 | #define SCREENSET_ADDR 20
10 | 
11 | #endif


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/FLASH/FLASH.c:
--------------------------------------------------------------------------------
 1 | #include <FLASH.h>
 2 | #include <USART.h>
 3 | //从指定地址开始写入多个数据
 4 | void FLASH_WriteMoreData(uint32_t startAddress,uint16_t *writeData,uint16_t countToWrite)
 5 | {    
 6 |     uint32_t offsetAddress=startAddress - FLASH_BASE;               //计算去掉0X08000000后的实际偏移地址
 7 |   uint32_t sectorPosition=offsetAddress;            //计算扇区地址，对于STM32F103VET6为0~255
 8 |   uint32_t sectorStartAddress=sectorPosition+FLASH_BASE;    //对应扇区的首地址
 9 |     uint16_t dataIndex;
10 |     
11 |   FLASH_Unlock();         //解锁写保护
12 | 
13 |   FLASH_ErasePage(sectorStartAddress);//擦除这个扇区
14 |   
15 |   for(dataIndex=0;dataIndex<countToWrite;dataIndex++)
16 |   {
17 |     FLASH_ProgramHalfWord(startAddress+dataIndex*2,writeData[dataIndex]);
18 |   }
19 |   
20 |   FLASH_Lock();//上锁写保护
21 | 	
22 | }
23 | void FLASH_Erase(uint32_t startAddress){
24 | 	FLASH_Unlock();         //解锁写保护
25 | 	FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_PGERR );
26 |   FLASH_ErasePage(startAddress);//擦除这个扇区
27 | 	FLASH_Lock();
28 | }
29 | void FLASH_WriteData(uint32_t startAddress,uint16_t writeData)
30 | {    
31 |     volatile FLASH_Status FLASHStatus;
32 |   FLASH_Unlock();         //解锁写保护
33 | 	FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_PGERR );
34 |   //FLASH_ErasePage(startAddress);//擦除这个扇区
35 |  
36 |     FLASHStatus=FLASH_ProgramHalfWord(startAddress,writeData);
37 |   
38 |   FLASH_Lock();//上锁写保护
39 | 	if (FLASHStatus != FLASH_COMPLETE)  //FLASH_COMPLETE表示闪存完成
40 |       {
41 |         //printf("FLSH :Error %08X\n\r",FLASHStatus);
42 |         UART1_Send("Flash Write fail\r\n");
43 |       }else UART1_Send("Flash Write OK\r\n");
44 | }
45 | //读取指定地址的半字(16位数据)
46 | uint16_t FLASH_ReadHalfWord(uint32_t address)
47 | {
48 |   return *(__IO uint16_t*)address; 
49 | }
50 | 
51 | //从指定地址开始读取多个数据
52 | void FLASH_ReadMoreData(uint32_t startAddress,uint16_t *readData,uint16_t countToRead)
53 | {
54 |   uint16_t dataIndex;
55 |   for(dataIndex=0;dataIndex<countToRead;dataIndex++)
56 |   {
57 |     readData[dataIndex]=FLASH_ReadHalfWord(startAddress+dataIndex*2);
58 |   }
59 | }
60 | 
61 | void write_to_flash(void)
62 | {
63 |     u16 buff[1200];
64 |     u16 count_len = 2272 / 2;
65 |     FLASH_WriteMoreData(StartServerManageFlashAddress,buff,count_len);
66 | }
67 | 
68 | void read_from_flash(void)
69 | {
70 |     u16 buff[1200];
71 |     u16 count_len = 2272 / 2;
72 |     FLASH_WriteMoreData(StartServerManageFlashAddress,buff,count_len);
73 | 
74 |  }


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/FLASH/FLASH.h:
--------------------------------------------------------------------------------
 1 | #include "stm32f10x_flash.h"
 2 | 
 3 | #define StartServerManageFlashAddress    ((u32)0x08036000)//读写起始地址（内部flash的主存储块地址从0x08036000开始）
 4 | 
 5 | void FLASH_WriteMoreData(uint32_t startAddress,uint16_t *writeData,uint16_t countToWrite);
 6 | void FLASH_WriteData(uint32_t startAddress,uint16_t writeData);
 7 | uint16_t FLASH_ReadHalfWord(uint32_t address);
 8 | void FLASH_ReadMoreData(uint32_t startAddress,uint16_t *readData,uint16_t countToRead);
 9 | void write_to_flash(void);
10 | void read_from_flash(void);
11 | void FLASH_Erase(uint32_t startAddress);


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/I2C/I2C.c:
--------------------------------------------------------------------------------
  1 | #include "HBC_MISC.h"
  2 | #include "I2C.h"
  3 | #include "USART.h"
  4 | #include "STM32F10x_GPIO.h"
  5 | #include "STM32F10x_RCC.h"
  6 | u8 I2C_Check(u8 addr){
  7 | 	u16 timeout;
  8 | 	I2C_Cmd(I2C1,ENABLE);
  9 | 	I2C_AcknowledgeConfig(I2C1,ENABLE); 
 10 | 	I2C_GenerateSTART(I2C1,ENABLE); 
 11 | 	timeout=1000;
 12 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT)){
 13 | 		  if((timeout--)==0){
 14 | 				UART1_Send("CEV5 Fail");
 15 | 				return 0xFF;
 16 | 			}
 17 | 	}//EV5
 18 | 	I2C_Send7bitAddress(I2C1,addr<<1,I2C_Direction_Transmitter); 
 19 | 	timeout=1000;
 20 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)){
 21 | 		  if((timeout--)==0){
 22 | 				UART1_Send("CEV6 Fail");
 23 | 				return 0xFE;
 24 | 			}
 25 | 	} //EV6
 26 | 	I2C_GenerateSTOP(I2C1,ENABLE); 
 27 | 	I2C_Cmd(I2C1,DISABLE);
 28 | 	return 0;
 29 | }
 30 | void I2C_WriteByte(u8 addr,u8 regaddr, u8 data)
 31 | {
 32 | 	u16 timeout;
 33 | 	I2C_Cmd(I2C1,ENABLE);
 34 | 	I2C_AcknowledgeConfig(I2C1,ENABLE); 
 35 | 	I2C_GenerateSTART(I2C1,ENABLE); 
 36 | 	timeout=1000;
 37 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT)){
 38 | 		  if((timeout--)==0){
 39 | 				UART1_Send("WEV5 Fail");
 40 | 				return;
 41 | 			}
 42 | 	}//EV5
 43 | 	I2C_Send7bitAddress(I2C1,addr<<1,I2C_Direction_Transmitter); 
 44 | 	timeout=1000;
 45 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)){
 46 | 		  if((timeout--)==0){
 47 | 				UART1_Send("WEV6 Fail");
 48 | 				return;
 49 | 			}
 50 | 	} //EV6
 51 | 	I2C_SendData(I2C1,regaddr); 
 52 | 	timeout=1000;
 53 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_TRANSMITTED)){
 54 | 		  if((timeout--)==0){
 55 | 				UART1_Send("WEV8 Fail");
 56 | 				return;
 57 | 			}
 58 | 	} //EV8
 59 | 	I2C_SendData(I2C1,data);
 60 | 	timeout=1000;
 61 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_TRANSMITTED)){
 62 | 		  if((timeout--)==0){
 63 | 				UART1_Send("WEV8_2 Fail");
 64 | 				return;
 65 | 			}
 66 | 	}
 67 | 	I2C_GenerateSTOP(I2C1,ENABLE); 
 68 | 		I2C_Cmd(I2C1,DISABLE);
 69 | 
 70 | }
 71 | u16 I2C_ReadTwoByte(u8 addr,u8 regaddr)
 72 | {
 73 | 	u8 readtemp;
 74 | 	u16 timeout=5000;
 75 |   short data;
 76 |   uint8_t msb,lsb;
 77 | 	I2C_Cmd(I2C1,ENABLE);
 78 | 	I2C_GenerateSTART(I2C1,ENABLE);
 79 | 	timeout=5000;
 80 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT))//5
 81 | 	{
 82 | 		  if((timeout--)==0){
 83 | 				UART1_Send("REV5 Fail");
 84 | 				return 0xFE;
 85 | 			}
 86 | 	}	
 87 | 	I2C_Send7bitAddress(I2C1,addr<<1,I2C_Direction_Transmitter);
 88 | 	timeout=1000;
 89 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))//6
 90 | 	{
 91 | 		  if((timeout--)==0){
 92 | 				UART1_Send("REV6 Fail");
 93 | 				return 0xFE;
 94 | 			}
 95 | 	}	
 96 | 	I2C_Cmd(I2C1,ENABLE);
 97 | 	I2C_SendData(I2C1,regaddr);
 98 | 	timeout=1000;
 99 |   while(I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_TRANSMITTED) != SUCCESS )
100 |   {
101 | 		  if((timeout--)==0){
102 | 				UART1_Send("REV8 Fail");
103 | 				return 0xFE;
104 | 			}
105 | 	}	
106 | 	
107 | 	I2C_GenerateSTART(I2C1,ENABLE);
108 | 	timeout=1000;
109 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT))
110 | 	{
111 | 		  if((timeout--)==0){
112 | 				UART1_Send("REV5 Fail");
113 | 				return 0xFE;
114 | 			}
115 | 	}	
116 | 	
117 | 	I2C_Send7bitAddress(I2C1,(addr<<1)+1,I2C_Direction_Receiver);
118 | 	I2C_AcknowledgeConfig(I2C1,ENABLE);
119 | 	timeout=1000;
120 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED))
121 | 	{
122 | 		  if((timeout--)==0){
123 | 				UART1_Send("REV6.2 Fail");
124 | 				return 0xFE;
125 | 			}
126 | 	}
127 | 	timeout=50000;
128 | 	while(!(I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_RECEIVED))){
129 | 		if((timeout--)==0){
130 | 				UART1_Send("Timeout Fail");
131 | 				return 0xFE;
132 | 			}
133 | 	}
134 | 	/*
135 | 	timeout=5000;
136 | 	while(I2C_CheckEvent(I2C1,I2C_FLAG_BUSY))
137 |   {
138 | 		  if((timeout--)==0){
139 | 				UART1_Send("BUSY Fail");
140 | 				return 0xFE;
141 | 			}
142 | 	}*/
143 |   /* ?????? */
144 |   msb = I2C_ReceiveData(I2C1);
145 | 	/*
146 | 	while(I2C_CheckEvent(I2C1,I2C_FLAG_BUSY))
147 |   {
148 | 		  if((timeout--)==0){
149 | 				UART1_Send("BUSY Fail");
150 | 				return 0xFE;
151 | 			}
152 | 	}*/
153 | 	I2C_GenerateSTOP(I2C1,ENABLE);
154 | 	I2C_AcknowledgeConfig(I2C1,DISABLE);
155 | 	timeout=5000;
156 | 	while(!(I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_RECEIVED))){
157 | 		if((timeout--)==0){
158 | 				UART1_Send("Timeout Fail");
159 | 				return 0xFE;
160 | 			}
161 | 	}
162 | 	lsb	= I2C_ReceiveData(I2C1);
163 | 	/*
164 |    while(!I2C_CheckEvent(I2C1,I2C_FLAG_RXNE))
165 |   {
166 | 		  if((timeout--)==0){
167 | 				UART1_Send("REV7 Fail");
168 | 				return 0xFE;
169 | 			}
170 | 	}*/
171 |   
172 |   I2C_Cmd(I2C1,DISABLE);
173 | 	
174 | 	data = (msb<<8) + lsb;
175 | 	I2C_AcknowledgeConfig(I2C1,ENABLE);
176 |   return data;
177 | }
178 | 
179 | u8 I2C_ReadByte(u8 addr,u8 regaddr)
180 | {
181 | 	u8 readtemp;
182 | 	u16 timeout;
183 | 	I2C_Cmd(I2C1,ENABLE);
184 | 	I2C_GenerateSTART(I2C1,ENABLE);
185 | 	timeout=1000;
186 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT))//5
187 | 	{
188 | 		  if((timeout--)==0){
189 | 				UART1_Send("REV5 Fail");
190 | 				return 0xFE;
191 | 			}
192 | 	}	
193 | 	
194 | 	
195 | 	I2C_Send7bitAddress(I2C1,addr<<1,I2C_Direction_Transmitter);
196 | 	timeout=1000;
197 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))//6
198 | 	{
199 | 		  if((timeout--)==0){
200 | 				UART1_Send("REV6 Fail");
201 | 				return 0xFE;
202 | 			}
203 | 	}	
204 | 	
205 | 	I2C_Cmd(I2C1,ENABLE);
206 | 	I2C_SendData(I2C1,regaddr);
207 | 	timeout=1000;
208 |   while(I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_TRANSMITTED) != SUCCESS )
209 |   {
210 | 		  if((timeout--)==0){
211 | 				UART1_Send("REV8 Fail");
212 | 				return 0xFE;
213 | 			}
214 | 	}	
215 | 	
216 | 	I2C_GenerateSTART(I2C1,ENABLE);
217 | 	timeout=1000;
218 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_MODE_SELECT))
219 | 	{
220 | 		  if((timeout--)==0){
221 | 				UART1_Send("REV5 Fail");
222 | 				return 0xFE;
223 | 			}
224 | 	}	
225 | 	
226 | 	I2C_Send7bitAddress(I2C1,(addr<<1)+1,I2C_Direction_Receiver);
227 | 	timeout=1000;
228 | 	while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED))
229 | 	{
230 | 		  if((timeout--)==0){
231 | 				UART1_Send("REV6.2 Fail");
232 | 				return 0xFE;
233 | 			}
234 | 	}	
235 | 	I2C_AcknowledgeConfig(I2C1,DISABLE);
236 | 	I2C_GenerateSTOP(I2C1,ENABLE);
237 | 	timeout=1000;
238 |   while(!I2C_CheckEvent(I2C1,I2C_EVENT_MASTER_BYTE_RECEIVED))
239 |   {
240 | 		  if((timeout--)==0){
241 | 				UART1_Send("REV7 Fail");
242 | 				return 0xFE;
243 | 			}
244 | 	}	
245 | 
246 |   readtemp = I2C_ReceiveData(I2C1);
247 |    I2C_AcknowledgeConfig(I2C1,ENABLE);
248 |   /* ???? */
249 |   
250 |   	I2C_Cmd(I2C1,DISABLE);
251 | 
252 |   return readtemp;
253 | }
254 | 
255 | void I2C_Configuration(void){
256 | 	GPIO_InitTypeDef GPIO_InitStructure;
257 | 	I2C_InitTypeDef I2C_InitStructure;
258 | 	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB,ENABLE);
259 | 	RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1,ENABLE);
260 | 	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6|GPIO_Pin_7;
261 |   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
262 |   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD; // ????
263 |   GPIO_Init(GPIOB, &GPIO_InitStructure);
264 | 	
265 | 	
266 | 	
267 |   I2C_DeInit(I2C1);
268 | 	I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
269 | 	I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
270 | 	I2C_InitStructure.I2C_OwnAddress1 =0x00;
271 | 	I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
272 | 	I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
273 | 	I2C_InitStructure.I2C_ClockSpeed = 100000;
274 | 	I2C_Init(I2C1, &I2C_InitStructure);
275 | 	
276 | }
277 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/I2C/I2C.h:
--------------------------------------------------------------------------------
 1 | #ifndef __I2C_H
 2 | #define __I2C_H
 3 | #include "stm32f10x.h"
 4 | #include "stm32f10x_i2c.h"
 5 | 
 6 | #define I2C_ADDR 0x3C
 7 | 
 8 | u8 I2C_Check(u8 addr);
 9 | void I2C_WriteByte(u8 addr,u8 regaddr, u8 data);
10 | u8 I2C_ReadByte(u8 addr,u8 regaddr);
11 | void I2C_Configuration(void);
12 | u16 I2C_ReadTwoByte(u8 addr,u8 regaddr);
13 | u16 I2C_Read2(unsigned char id, unsigned char read_address);
14 | #endif
15 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/KEY/KEY.c:
--------------------------------------------------------------------------------
 1 | #include "stm32f10x_gpio.h"
 2 | #include "stm32f10x_exti.h"
 3 | //#include "misc.h"
 4 | //#include "stm32f10x_nvic.h"
 5 | void KEY_IO_Init(void){
 6 | 	GPIO_InitTypeDef GPIO_InitStructure;//创建GPIO初始化结构
 7 | 	//RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA , ENABLE);//使能PB口总线时钟 
 8 | 	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_AFIO , ENABLE);
 9 | 	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_8|GPIO_Pin_9; 
10 | 	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;	
11 | 	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
12 | 	GPIO_Init(GPIOB,&GPIO_InitStructure);
13 | 	
14 | }
15 | void KEY_EXTI_Init(void)
16 | {
17 | 	GPIO_InitTypeDef GPIO_InitStructure;
18 | 	EXTI_InitTypeDef EXTI_InitStructure;
19 | 	
20 | 	GPIO_EXTILineConfig(GPIO_PortSourceGPIOB,GPIO_PinSource5);	//配置GPIO为中断引脚
21 | 	EXTI_InitStructure.EXTI_Line = EXTI_Line5;
22 | 	EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
23 | 	EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;	//下降沿触发
24 | 	EXTI_InitStructure.EXTI_LineCmd = ENABLE;
25 | 	EXTI_Init(&EXTI_InitStructure);
26 | 	
27 | 	GPIO_EXTILineConfig(GPIO_PortSourceGPIOB,GPIO_PinSource8);	//配置GPIO为中断引脚
28 | 	EXTI_InitStructure.EXTI_Line = EXTI_Line8;
29 | 	EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
30 | 	EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;	//下降沿触发
31 | 	EXTI_InitStructure.EXTI_LineCmd = ENABLE;
32 | 	EXTI_Init(&EXTI_InitStructure);
33 | 	
34 | 	EXTI_ClearITPendingBit(EXTI_Line5);
35 | 	EXTI_ClearITPendingBit(EXTI_Line8);
36 | 	EXTI_ClearITPendingBit(EXTI_Line9);
37 | 	GPIO_EXTILineConfig(GPIO_PortSourceGPIOB,GPIO_PinSource9);	//配置GPIO为中断引脚
38 | 	EXTI_InitStructure.EXTI_Line = EXTI_Line9;
39 | 	EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
40 | 	EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;	//下降沿触发
41 | 	EXTI_InitStructure.EXTI_LineCmd = ENABLE;
42 | 	EXTI_Init(&EXTI_InitStructure);
43 | 	
44 | 	
45 | }
46 | void KEY_EXTI_CTL(u8 st){
47 | 	
48 | 	NVIC_InitTypeDef NVIC_InitStructure;
49 | 	NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
50 | 	NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
51 | 	NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
52 | 	if(st) NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; else NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
53 | 	NVIC_Init(&NVIC_InitStructure);
54 | 	
55 | }


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/KEY/KEY.h:
--------------------------------------------------------------------------------
1 | #ifndef __KEY_H
2 | #define __KEY_H
3 | #include "stm32f10x.h"
4 | void KEY_IO_Init(void);
5 | void KEY_EXTI_Init(void);
6 | void KEY_EXTI_CTL(u8 st);
7 | 
8 | #endif


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/SHT20/SHT20.c:
--------------------------------------------------------------------------------
 1 | #include "SHT20.h"
 2 | #include "HBC_MISC.h"
 3 | #include "math.h"
 4 | #include "USART.h"
 5 | 
 6 | u8 SHT20_Check(void){
 7 | u8 STATUS;
 8 |  STATUS=I2C_Check(SHT20_ADDR);
 9 | 	return STATUS;
10 | }
11 | float SHT20_GetTemp(){
12 | 	u16 TBUF;
13 | 	TBUF=I2C_ReadTwoByte(SHT20_ADDR,SHT20_TEMP_HM);
14 | 	TBUF &= ~0x0003;
15 |   return ((float)TBUF * 0.00268127) - 46.85;
16 | 	
17 | }
18 | float SHT20_GetHum(){
19 | 	u16 HBUF;
20 | 	HBUF=I2C_ReadTwoByte(SHT20_ADDR,SHT20_HUM_HM);
21 | 	HBUF &= ~0x0003;
22 |   return ((float)HBUF * 0.00190735) - 6;
23 | }
24 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/SHT20/SHT20.h:
--------------------------------------------------------------------------------
 1 | #ifndef __SW3518_H
 2 | #define __SW3518_H
 3 | 
 4 | #include "I2C.h"
 5 | #include "USART.h"
 6 | 
 7 | #define SHT20_ADDR 0x40
 8 | #define SHT20_TEMP_HM 0xE3
 9 | #define SHT20_HUM_HM 0xE5
10 | u8 SHT20_Check(void);
11 | float SHT20_GetTemp();
12 | float SHT20_GetHum();
13 | #endif
14 | 
15 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/SW3518/SW3518.c:
--------------------------------------------------------------------------------
 1 | #include "SW3518.h"
 2 | u16 getVoltage(u8 P){
 3 | 	u8 MSB=0,LSB=0;
 4 | 	u16 vbuf=0,voltage=0;
 5 | 	if(P==VIN){
 6 | 		I2C_WriteByte(SW3518_I2C_CTRL,0x02);
 7 | 		I2C_WriteByte(SW3518_ADC_DATA_TYPE,0x01);
 8 | 		MSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_H);
 9 | 		LSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_L);
10 | 		vbuf=(MSB<<4)+LSB;
11 | 		voltage=vbuf*10;
12 | 		return voltage;
13 | 	}else if(P==VOUT){
14 | 		I2C_WriteByte(SW3518_ADC_DATA_TYPE,0x02);
15 | 		MSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_H);
16 | 		LSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_L);
17 | 		vbuf=(MSB<<4)+LSB;
18 | 		voltage=vbuf*6;
19 | 		return voltage;
20 | 	}else return 0;
21 | }
22 | u16 getCurrent(u8 USB){
23 | 	u8 MSB=0,LSB=0;
24 | 	u16 cbuf=0,current=0;
25 | 	if(USB==USBC){
26 | 		I2C_WriteByte(SW3518_ADC_DATA_TYPE,0x03);
27 | 		MSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_H);
28 | 		LSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_L);
29 | 		cbuf=(MSB<<4)+LSB;
30 | 		current=cbuf*1.5;
31 | 		return current;
32 | 	}
33 | 	else if(USB==USBA){
34 | 		I2C_WriteByte(SW3518_ADC_DATA_TYPE,0x04);
35 | 		MSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_H);
36 | 		LSB=I2C_ReadByte(SW3518_ADC_DATA_BUF_L);
37 | 		cbuf=(MSB<<4)+LSB;
38 | 		current=cbuf*1.5;
39 | 		return current;
40 | 	}else return 0;
41 | }
42 | 
43 | 
44 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/SW3518/SW3518.h:
--------------------------------------------------------------------------------
 1 | #ifndef __SW3518_H
 2 | #define __SW3518_H
 3 | 
 4 | #include "I2C.h"
 5 | #include "USART.h"
 6 | 
 7 | #define SW3518_ADDR 0x3C
 8 | #define SW3518_IC_VERSION 0x01
 9 | #define SW3518_FCX_STATUS 0x06
10 | #define SW3518_PWR_STATUS 0x07
11 | #define SW3518_I2C_ENABLE 0x12
12 | #define SW3518_I2C_CTRL 0x13
13 | #define SW3518_ADC_DATA_TYPE 0x3A
14 | #define SW3518_ADC_DATA_BUF_H 0x3B
15 | #define SW3518_ADC_DATA_BUF_L 0x3C
16 | #define SW3518_PWR_CONF 0xA6
17 | #define SW3518_QC_CONF0 0xAA
18 | #define SW3518_VID_CONF0 0xAF
19 | #define SW3518_PD_CONF1 0xB0
20 | #define SW3518_PD_CONF2 0xB1
21 | #define SW3518_PD_CONF3 0xB2
22 | #define SW3518_PD_CONF4 0xB3
23 | #define SW3518_PD_CONF5 0xB4
24 | #define SW3518_PD_CONF6 0xB5
25 | #define SW3518_PD_CONF7 0xB6
26 | #define SW3518_PD_CONF8 0xB7
27 | #define SW3518_PD_CONF9 0xB8
28 | #define SW3518_QC_CONF1 0xB9
29 | #define SW3518_QC_CONF2 0xBA
30 | #define SW3518_PD_CONF10 0xBE
31 | #define SW3518_VID_CONF1 0xBF
32 | 
33 | #define USBC 1
34 | #define USBA 2
35 | 
36 | #define VIN 1
37 | #define VOUT 2
38 | 
39 | u16 getVoltage(u8 P);
40 | u16 getCurrent(u8 USB);
41 | 
42 | #endif
43 | 
44 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/USART/USART.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/DRIVERS/USART/USART.c


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/USART/USART.h:
--------------------------------------------------------------------------------
 1 | #ifndef __USART_H
 2 | #define __USART_H
 3 | #include "stm32f10x.h"
 4 | #include "stm32f10x_usart.h"
 5 | 
 6 | void UART1_Configuration(void);
 7 | void UART1_Send(char *s);
 8 | 
 9 | #endif
10 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/VFD/VFD.c:
--------------------------------------------------------------------------------
  1 | #include "VFD.h"
  2 | 
  3 | static void Delay(uint32_t nCount)
  4 | {
  5 |   for(; nCount != 0; nCount--);
  6 | }
  7 | void VFD_IO_INIT(void){
  8 | 	
  9 | 	GPIO_InitTypeDef GPIO_InitStructure;//创建GPIO初始化结构
 10 | 	RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB , ENABLE);//使能PB口总线时钟 
 11 | 	//RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE);
 12 | 
 13 | 
 14 | 	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15; 
 15 | 	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;	
 16 | 	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
 17 | 	GPIO_Init(GPIOB,&GPIO_InitStructure);
 18 | 	
 19 | }
 20 | void write_6302(unsigned char w_data)
 21 | {
 22 |   unsigned char i;
 23 |   for (i = 0; i < 8; i++)
 24 |   {
 25 | 		GPIO_ResetBits(GPIOB,S_CLK);
 26 |     if ( (w_data & 0x01) == 0x01)
 27 |     {
 28 |       GPIO_SetBits(GPIOB,S_DIN);
 29 |     }
 30 |     else
 31 |     {
 32 |       GPIO_ResetBits(GPIOB,S_DIN);
 33 |     }
 34 | 		Delay(40);
 35 |     w_data >>= 1;
 36 |     GPIO_SetBits(GPIOB,S_CLK);
 37 | 		Delay(40);
 38 |   }
 39 | }
 40 | void VFD_cmd(unsigned char command)
 41 | {
 42 |   GPIO_ResetBits(GPIOB,S_CS);
 43 |   write_6302(command);
 44 |   GPIO_SetBits(GPIOB,S_CS);
 45 | 	//delay 5us
 46 | 	Delay(40);
 47 | }
 48 | void S1201_show(void)
 49 | {
 50 |   GPIO_ResetBits(GPIOB,S_CS);//开始传输
 51 |   write_6302(0xe8);     //地址寄存器起始位置
 52 |   GPIO_SetBits(GPIOB,S_CS); //停止传输
 53 | }
 54 | 
 55 | void VFD_init(void)
 56 | {
 57 |   //SET HOW MANY digtal numbers
 58 |   GPIO_ResetBits(GPIOB,S_CS);
 59 |   write_6302(0xe0);
 60 |   //delayMicroseconds(5);
 61 | 	Delay(40);
 62 |   write_6302(0x07);//8 digtal
 63 |   GPIO_SetBits(GPIOB,S_CS);
 64 |   //delayMicroseconds(5);
 65 | 	Delay(40);
 66 |   //set bright
 67 |   GPIO_ResetBits(GPIOB,S_CS);
 68 |   write_6302(0xe4);
 69 |   //delayMicroseconds(5);
 70 | 	Delay(40);
 71 |   write_6302(0xff);//leve 255 max
 72 |   GPIO_SetBits(GPIOB,S_CS);
 73 |   //delayMicroseconds(5);
 74 | 	Delay(40);
 75 | }
 76 | void S1201_Brightness(unsigned char br){
 77 | GPIO_ResetBits(GPIOB,S_CS);
 78 |   write_6302(0xe4);
 79 |   //delayMicroseconds(5);
 80 | 	Delay(40);
 81 |   write_6302(br);//leve 255 max
 82 |   GPIO_SetBits(GPIOB,S_CS);
 83 |   //delayMicroseconds(5);
 84 | 	Delay(40);
 85 | 
 86 | }
 87 | void S1201_WriteOneChar(unsigned char x, unsigned char chr)
 88 | {
 89 |   GPIO_ResetBits(GPIOB,S_CS);  //开始传输
 90 |   write_6302(0x20 + x); //地址寄存器起始位置
 91 |   write_6302(chr + 0x30);
 92 |   GPIO_SetBits(GPIOB,S_CS); //停止传输
 93 |   S1201_show();
 94 | }
 95 | 
 96 | void S1201_WriteStr(unsigned char x, char *str)
 97 | {
 98 |   GPIO_ResetBits(GPIOB,S_CS);  //开始传输
 99 |   write_6302(0x20 + x); //地址寄存器起始位置
100 |   while (*str)
101 |   {
102 |     write_6302(*str); //ascii与对应字符表转换
103 |     str++;
104 |   }
105 |   GPIO_SetBits(GPIOB,S_CS); //停止传输
106 |   S1201_show();
107 | }
108 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/DRIVERS/VFD/VFD.h:
--------------------------------------------------------------------------------
 1 | #ifndef __VFD_H
 2 | #define __VFD_H
 3 | 
 4 | #include "USART.h"
 5 | 
 6 | #define S_CS GPIO_Pin_15
 7 | #define S_DIN GPIO_Pin_14
 8 | #define S_CLK GPIO_Pin_13
 9 | #define S_RST GPIO_Pin_12
10 | 
11 | void VFD_IO_INIT(void);
12 | void VFD_cmd(unsigned char command);
13 | void S1201_show(void);
14 | void VFD_init(void);
15 | void S1201_Brightness(unsigned char br);
16 | void S1201_WriteOneChar(unsigned char x, unsigned char chr);
17 | void S1201_WriteStr(unsigned char x, char *str);
18 | 
19 | #endif
20 | 
21 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/TrueSTUDIO/startup_stm32f10x_ld.s:
--------------------------------------------------------------------------------
  1 | /**
  2 |  ******************************************************************************
  3 |  * @file      startup_stm32f10x_ld.s
  4 |  * @author    MCD Application Team
  5 |  * @version   V3.4.0
  6 |  * @date      10/15/2010
  7 |  * @brief     STM32F10x Low Density Devices vector table for Atollic toolchain.
  8 |  *            This module performs:
  9 |  *                - Set the initial SP
 10 |  *                - Set the initial PC == Reset_Handler,
 11 |  *                - Set the vector table entries with the exceptions ISR address.
 12 |  *                - Configure the clock system 
 13 |  *                - Branches to main in the C library (which eventually
 14 |  *                  calls main()).
 15 |  *            After Reset the Cortex-M3 processor is in Thread mode,
 16 |  *            priority is Privileged, and the Stack is set to Main.
 17 |  *******************************************************************************
 18 |  * @copy
 19 |  *
 20 |  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 21 |  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 22 |  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 23 |  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 24 |  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 25 |  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 26 |  *
 27 |  * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 28 |  */
 29 | 
 30 |   .syntax unified
 31 | 	.cpu cortex-m3
 32 | 	.fpu softvfp
 33 | 	.thumb
 34 | 
 35 | .global	g_pfnVectors
 36 | .global	Default_Handler
 37 | 
 38 | /* start address for the initialization values of the .data section.
 39 | defined in linker script */
 40 | .word	_sidata
 41 | /* start address for the .data section. defined in linker script */
 42 | .word	_sdata
 43 | /* end address for the .data section. defined in linker script */
 44 | .word	_edata
 45 | /* start address for the .bss section. defined in linker script */
 46 | .word	_sbss
 47 | /* end address for the .bss section. defined in linker script */
 48 | .word	_ebss
 49 | 
 50 | .equ  BootRAM, 0xF108F85F
 51 | /**
 52 |  * @brief  This is the code that gets called when the processor first
 53 |  *          starts execution following a reset event. Only the absolutely
 54 |  *          necessary set is performed, after which the application
 55 |  *          supplied main() routine is called.
 56 |  * @param  None
 57 |  * @retval : None
 58 | */
 59 | 
 60 |     .section	.text.Reset_Handler
 61 | 	.weak	Reset_Handler
 62 | 	.type	Reset_Handler, %function
 63 | Reset_Handler:
 64 | 
 65 | /* Copy the data segment initializers from flash to SRAM */
 66 |   movs	r1, #0
 67 |   b	LoopCopyDataInit
 68 | 
 69 | CopyDataInit:
 70 | 	ldr	r3, =_sidata
 71 | 	ldr	r3, [r3, r1]
 72 | 	str	r3, [r0, r1]
 73 | 	adds	r1, r1, #4
 74 | 
 75 | LoopCopyDataInit:
 76 | 	ldr	r0, =_sdata
 77 | 	ldr	r3, =_edata
 78 | 	adds	r2, r0, r1
 79 | 	cmp	r2, r3
 80 | 	bcc	CopyDataInit
 81 | 	ldr	r2, =_sbss
 82 | 	b	LoopFillZerobss
 83 | /* Zero fill the bss segment. */
 84 | FillZerobss:
 85 | 	movs	r3, #0
 86 | 	str	r3, [r2], #4
 87 | 
 88 | LoopFillZerobss:
 89 | 	ldr	r3, = _ebss
 90 | 	cmp	r2, r3
 91 | 	bcc	FillZerobss
 92 | 
 93 | /* Call the clock system intitialization function.*/
 94 |   bl  SystemInit
 95 | /* Call static constructors */
 96 |   bl __libc_init_array
 97 | /* Call the application's entry point.*/
 98 | 	bl	main
 99 | 	bx	lr
100 | .size	Reset_Handler, .-Reset_Handler
101 | 
102 | /**
103 |  * @brief  This is the code that gets called when the processor receives an
104 |  *         unexpected interrupt.  This simply enters an infinite loop, preserving
105 |  *         the system state for examination by a debugger.
106 |  *
107 |  * @param  None
108 |  * @retval : None
109 | */
110 |     .section	.text.Default_Handler,"ax",%progbits
111 | Default_Handler:
112 | Infinite_Loop:
113 | 	b	Infinite_Loop
114 | 	.size	Default_Handler, .-Default_Handler
115 | /******************************************************************************
116 | *
117 | * The minimal vector table for a Cortex M3.  Note that the proper constructs
118 | * must be placed on this to ensure that it ends up at physical address
119 | * 0x0000.0000.
120 | *
121 | ******************************************************************************/
122 |  	.section	.isr_vector,"a",%progbits
123 | 	.type	g_pfnVectors, %object
124 | 	.size	g_pfnVectors, .-g_pfnVectors
125 | 
126 | 
127 | g_pfnVectors:
128 | 	.word	_estack
129 | 	.word	Reset_Handler
130 | 	.word	NMI_Handler
131 | 	.word	HardFault_Handler
132 | 	.word	MemManage_Handler
133 | 	.word	BusFault_Handler
134 | 	.word	UsageFault_Handler
135 | 	.word	0
136 | 	.word	0
137 | 	.word	0
138 | 	.word	0
139 | 	.word	SVC_Handler
140 | 	.word	DebugMon_Handler
141 | 	.word	0
142 | 	.word	PendSV_Handler
143 | 	.word	SysTick_Handler
144 | 	.word	WWDG_IRQHandler
145 | 	.word	PVD_IRQHandler
146 | 	.word	TAMPER_IRQHandler
147 | 	.word	RTC_IRQHandler
148 | 	.word	FLASH_IRQHandler
149 | 	.word	RCC_IRQHandler
150 | 	.word	EXTI0_IRQHandler
151 | 	.word	EXTI1_IRQHandler
152 | 	.word	EXTI2_IRQHandler
153 | 	.word	EXTI3_IRQHandler
154 | 	.word	EXTI4_IRQHandler
155 | 	.word	DMA1_Channel1_IRQHandler
156 | 	.word	DMA1_Channel2_IRQHandler
157 | 	.word	DMA1_Channel3_IRQHandler
158 | 	.word	DMA1_Channel4_IRQHandler
159 | 	.word	DMA1_Channel5_IRQHandler
160 | 	.word	DMA1_Channel6_IRQHandler
161 | 	.word	DMA1_Channel7_IRQHandler
162 | 	.word	ADC1_2_IRQHandler
163 | 	.word	USB_HP_CAN1_TX_IRQHandler
164 | 	.word	USB_LP_CAN1_RX0_IRQHandler
165 | 	.word	CAN1_RX1_IRQHandler
166 | 	.word	CAN1_SCE_IRQHandler
167 | 	.word	EXTI9_5_IRQHandler
168 | 	.word	TIM1_BRK_IRQHandler
169 | 	.word	TIM1_UP_IRQHandler
170 |   .word TIM1_TRG_COM_IRQHandler
171 |   .word TIM1_CC_IRQHandler
172 |   .word TIM2_IRQHandler
173 |   .word TIM3_IRQHandler
174 |   .word 0
175 |   .word I2C1_EV_IRQHandler
176 |   .word I2C1_ER_IRQHandler
177 |   .word 0
178 |   .word 0
179 |   .word SPI1_IRQHandler
180 |   .word 0
181 |   .word USART1_IRQHandler
182 |   .word USART2_IRQHandler
183 |   .word 0
184 |   .word EXTI15_10_IRQHandler
185 | 	.word	RTCAlarm_IRQHandler
186 | 	.word	USBWakeUp_IRQHandler
187 |   .word	0
188 | 	.word	0
189 | 	.word	0
190 | 	.word	0
191 | 	.word	0
192 | 	.word	0
193 | 	.word	0
194 | 	.word	BootRAM        /* @0x108. This is for boot in RAM mode for
195 |                           STM32F10x Low Density devices.*/
196 | 
197 | /*******************************************************************************
198 | *
199 | * Provide weak aliases for each Exception handler to the Default_Handler.
200 | * As they are weak aliases, any function with the same name will override
201 | * this definition.
202 | *
203 | *******************************************************************************/
204 | 
205 |   .weak	NMI_Handler
206 | 	.thumb_set NMI_Handler,Default_Handler
207 | 
208 |   .weak	HardFault_Handler
209 | 	.thumb_set HardFault_Handler,Default_Handler
210 | 
211 |   .weak	MemManage_Handler
212 | 	.thumb_set MemManage_Handler,Default_Handler
213 | 
214 |   .weak	BusFault_Handler
215 | 	.thumb_set BusFault_Handler,Default_Handler
216 | 
217 | 	.weak	UsageFault_Handler
218 | 	.thumb_set UsageFault_Handler,Default_Handler
219 | 
220 | 	.weak	SVC_Handler
221 | 	.thumb_set SVC_Handler,Default_Handler
222 | 
223 | 	.weak	DebugMon_Handler
224 | 	.thumb_set DebugMon_Handler,Default_Handler
225 | 
226 | 	.weak	PendSV_Handler
227 | 	.thumb_set PendSV_Handler,Default_Handler
228 | 
229 | 	.weak	SysTick_Handler
230 | 	.thumb_set SysTick_Handler,Default_Handler
231 | 
232 | 	.weak	WWDG_IRQHandler
233 | 	.thumb_set WWDG_IRQHandler,Default_Handler
234 | 
235 | 	.weak	PVD_IRQHandler
236 | 	.thumb_set PVD_IRQHandler,Default_Handler
237 | 
238 | 	.weak	TAMPER_IRQHandler
239 | 	.thumb_set TAMPER_IRQHandler,Default_Handler
240 | 
241 | 	.weak	RTC_IRQHandler
242 | 	.thumb_set RTC_IRQHandler,Default_Handler
243 | 
244 | 	.weak	FLASH_IRQHandler
245 | 	.thumb_set FLASH_IRQHandler,Default_Handler
246 | 
247 | 	.weak	RCC_IRQHandler
248 | 	.thumb_set RCC_IRQHandler,Default_Handler
249 | 
250 | 	.weak	EXTI0_IRQHandler
251 | 	.thumb_set EXTI0_IRQHandler,Default_Handler
252 | 
253 | 	.weak	EXTI1_IRQHandler
254 | 	.thumb_set EXTI1_IRQHandler,Default_Handler
255 | 
256 | 	.weak	EXTI2_IRQHandler
257 | 	.thumb_set EXTI2_IRQHandler,Default_Handler
258 | 
259 | 	.weak	EXTI3_IRQHandler
260 | 	.thumb_set EXTI3_IRQHandler,Default_Handler
261 | 
262 | 	.weak	EXTI4_IRQHandler
263 | 	.thumb_set EXTI4_IRQHandler,Default_Handler
264 | 
265 | 	.weak	DMA1_Channel1_IRQHandler
266 | 	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
267 | 
268 | 	.weak	DMA1_Channel2_IRQHandler
269 | 	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
270 | 
271 | 	.weak	DMA1_Channel3_IRQHandler
272 | 	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
273 | 
274 | 	.weak	DMA1_Channel4_IRQHandler
275 | 	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
276 | 
277 | 	.weak	DMA1_Channel5_IRQHandler
278 | 	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
279 | 
280 | 	.weak	DMA1_Channel6_IRQHandler
281 | 	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
282 | 
283 | 	.weak	DMA1_Channel7_IRQHandler
284 | 	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
285 | 
286 | 	.weak	ADC1_2_IRQHandler
287 | 	.thumb_set ADC1_2_IRQHandler,Default_Handler
288 | 
289 | 	.weak	USB_HP_CAN1_TX_IRQHandler
290 | 	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
291 | 
292 | 	.weak	USB_LP_CAN1_RX0_IRQHandler
293 | 	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
294 | 
295 | 	.weak	CAN1_RX1_IRQHandler
296 | 	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
297 | 
298 | 	.weak	CAN1_SCE_IRQHandler
299 | 	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
300 | 
301 | 	.weak	EXTI9_5_IRQHandler
302 | 	.thumb_set EXTI9_5_IRQHandler,Default_Handler
303 | 
304 | 	.weak	TIM1_BRK_IRQHandler
305 | 	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
306 | 
307 | 	.weak	TIM1_UP_IRQHandler
308 | 	.thumb_set TIM1_UP_IRQHandler,Default_Handler
309 | 
310 | 	.weak	TIM1_TRG_COM_IRQHandler
311 | 	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
312 | 
313 | 	.weak	TIM1_CC_IRQHandler
314 | 	.thumb_set TIM1_CC_IRQHandler,Default_Handler
315 | 
316 | 	.weak	TIM2_IRQHandler
317 | 	.thumb_set TIM2_IRQHandler,Default_Handler
318 | 
319 | 	.weak	TIM3_IRQHandler
320 | 	.thumb_set TIM3_IRQHandler,Default_Handler
321 | 
322 | 	.weak	I2C1_EV_IRQHandler
323 | 	.thumb_set I2C1_EV_IRQHandler,Default_Handler
324 | 
325 | 	.weak	I2C1_ER_IRQHandler
326 | 	.thumb_set I2C1_ER_IRQHandler,Default_Handler
327 | 
328 | 	.weak	SPI1_IRQHandler
329 | 	.thumb_set SPI1_IRQHandler,Default_Handler
330 | 
331 | 	.weak	USART1_IRQHandler
332 | 	.thumb_set USART1_IRQHandler,Default_Handler
333 | 
334 | 	.weak	USART2_IRQHandler
335 | 	.thumb_set USART2_IRQHandler,Default_Handler
336 | 
337 | 	.weak	EXTI15_10_IRQHandler
338 | 	.thumb_set EXTI15_10_IRQHandler,Default_Handler
339 | 
340 | 	.weak	RTCAlarm_IRQHandler
341 | 	.thumb_set RTCAlarm_IRQHandler,Default_Handler
342 | 
343 | 	.weak	USBWakeUp_IRQHandler
344 | 	.thumb_set USBWakeUp_IRQHandler,Default_Handler
345 | 
346 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
347 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_ld.s:
--------------------------------------------------------------------------------
  1 | /**
  2 |  ******************************************************************************
  3 |  * @file      startup_stm32f10x_ld.s
  4 |  * @author    MCD Application Team
  5 |  * @version   V3.4.0
  6 |  * @date      10/15/2010
  7 |  * @brief     STM32F10x Low Density Devices vector table for RIDE7 toolchain.
  8 |  *            This module performs:
  9 |  *                - Set the initial SP
 10 |  *                - Set the initial PC == Reset_Handler,
 11 |  *                - Set the vector table entries with the exceptions ISR address
 12 |  *                - Configure the clock system  
 13 |  *                - Branches to main in the C library (which eventually
 14 |  *                  calls main()).
 15 |  *            After Reset the Cortex-M3 processor is in Thread mode,
 16 |  *            priority is Privileged, and the Stack is set to Main.
 17 |  *******************************************************************************
 18 |  * @copy
 19 |  *
 20 |  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 21 |  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 22 |  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 23 |  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 24 |  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 25 |  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 26 |  *
 27 |  * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 28 |  */	
 29 |     
 30 |   .syntax unified
 31 | 	.cpu cortex-m3
 32 | 	.fpu softvfp
 33 | 	.thumb
 34 | 
 35 | .global	g_pfnVectors
 36 | .global	Default_Handler
 37 | 
 38 | /* start address for the initialization values of the .data section. 
 39 | defined in linker script */
 40 | .word	_sidata
 41 | /* start address for the .data section. defined in linker script */  
 42 | .word	_sdata
 43 | /* end address for the .data section. defined in linker script */
 44 | .word	_edata
 45 | /* start address for the .bss section. defined in linker script */
 46 | .word	_sbss
 47 | /* end address for the .bss section. defined in linker script */
 48 | .word	_ebss
 49 | 
 50 | .equ  BootRAM, 0xF108F85F
 51 | /**
 52 |  * @brief  This is the code that gets called when the processor first
 53 |  *          starts execution following a reset event. Only the absolutely
 54 |  *          necessary set is performed, after which the application
 55 |  *          supplied main() routine is called. 
 56 |  * @param  None
 57 |  * @retval : None
 58 | */
 59 | 
 60 |     .section	.text.Reset_Handler
 61 | 	.weak	Reset_Handler
 62 | 	.type	Reset_Handler, %function
 63 | Reset_Handler:	
 64 | 
 65 | /* Copy the data segment initializers from flash to SRAM */  
 66 |   movs	r1, #0
 67 |   b	LoopCopyDataInit
 68 | 
 69 | CopyDataInit:
 70 | 	ldr	r3, =_sidata
 71 | 	ldr	r3, [r3, r1]
 72 | 	str	r3, [r0, r1]
 73 | 	adds	r1, r1, #4
 74 |     
 75 | LoopCopyDataInit:
 76 | 	ldr	r0, =_sdata
 77 | 	ldr	r3, =_edata
 78 | 	adds	r2, r0, r1
 79 | 	cmp	r2, r3
 80 | 	bcc	CopyDataInit
 81 | 	ldr	r2, =_sbss
 82 | 	b	LoopFillZerobss
 83 | /* Zero fill the bss segment. */  
 84 | FillZerobss:
 85 | 	movs	r3, #0
 86 | 	str	r3, [r2], #4
 87 |     
 88 | LoopFillZerobss:
 89 | 	ldr	r3, = _ebss
 90 | 	cmp	r2, r3
 91 | 	bcc	FillZerobss
 92 | /* Call the clock system intitialization function.*/
 93 |   bl  SystemInit  
 94 | /* Call the application's entry point.*/
 95 | 	bl	main
 96 | 	bx	lr    
 97 | .size	Reset_Handler, .-Reset_Handler
 98 | 
 99 | /**
100 |  * @brief  This is the code that gets called when the processor receives an 
101 |  *         unexpected interrupt.  This simply enters an infinite loop, preserving
102 |  *         the system state for examination by a debugger.
103 |  * @param  None     
104 |  * @retval None       
105 | */
106 |     .section	.text.Default_Handler,"ax",%progbits
107 | Default_Handler:
108 | Infinite_Loop:
109 | 	b	Infinite_Loop
110 | 	.size	Default_Handler, .-Default_Handler
111 | /******************************************************************************
112 | *
113 | * The minimal vector table for a Cortex M3.  Note that the proper constructs
114 | * must be placed on this to ensure that it ends up at physical address
115 | * 0x0000.0000.
116 | *
117 | ******************************************************************************/    
118 |  	.section	.isr_vector,"a",%progbits
119 | 	.type	g_pfnVectors, %object
120 | 	.size	g_pfnVectors, .-g_pfnVectors
121 |     
122 |     
123 | g_pfnVectors:
124 | 	.word	_estack
125 | 	.word	Reset_Handler
126 | 	.word	NMI_Handler
127 | 	.word	HardFault_Handler
128 | 	.word	MemManage_Handler
129 | 	.word	BusFault_Handler
130 | 	.word	UsageFault_Handler
131 | 	.word	0
132 | 	.word	0
133 | 	.word	0
134 | 	.word	0
135 | 	.word	SVC_Handler
136 | 	.word	DebugMon_Handler
137 | 	.word	0
138 | 	.word	PendSV_Handler
139 | 	.word	SysTick_Handler
140 | 	.word	WWDG_IRQHandler
141 | 	.word	PVD_IRQHandler
142 | 	.word	TAMPER_IRQHandler
143 | 	.word	RTC_IRQHandler
144 | 	.word	FLASH_IRQHandler
145 | 	.word	RCC_IRQHandler
146 | 	.word	EXTI0_IRQHandler
147 | 	.word	EXTI1_IRQHandler
148 | 	.word	EXTI2_IRQHandler
149 | 	.word	EXTI3_IRQHandler
150 | 	.word	EXTI4_IRQHandler
151 | 	.word	DMA1_Channel1_IRQHandler
152 | 	.word	DMA1_Channel2_IRQHandler
153 | 	.word	DMA1_Channel3_IRQHandler
154 | 	.word	DMA1_Channel4_IRQHandler
155 | 	.word	DMA1_Channel5_IRQHandler
156 | 	.word	DMA1_Channel6_IRQHandler
157 | 	.word	DMA1_Channel7_IRQHandler
158 | 	.word	ADC1_2_IRQHandler
159 | 	.word	USB_HP_CAN1_TX_IRQHandler
160 | 	.word	USB_LP_CAN1_RX0_IRQHandler
161 | 	.word	CAN1_RX1_IRQHandler
162 | 	.word	CAN1_SCE_IRQHandler
163 | 	.word	EXTI9_5_IRQHandler
164 | 	.word	TIM1_BRK_IRQHandler
165 | 	.word	TIM1_UP_IRQHandler
166 | 	.word	TIM1_TRG_COM_IRQHandler
167 | 	.word	TIM1_CC_IRQHandler
168 | 	.word	TIM2_IRQHandler
169 | 	.word	TIM3_IRQHandler
170 | 	.word	0
171 | 	.word	I2C1_EV_IRQHandler
172 | 	.word	I2C1_ER_IRQHandler
173 | 	.word	0
174 | 	.word	0
175 | 	.word	SPI1_IRQHandler
176 | 	.word	0
177 | 	.word	USART1_IRQHandler
178 | 	.word	USART2_IRQHandler
179 | 	.word	0
180 | 	.word	EXTI15_10_IRQHandler
181 | 	.word	RTCAlarm_IRQHandler
182 | 	.word	USBWakeUp_IRQHandler	
183 |   .word	0
184 | 	.word	0
185 | 	.word	0
186 | 	.word	0
187 | 	.word	0
188 | 	.word	0
189 | 	.word	0
190 | 	.word	BootRAM        /* @0x108. This is for boot in RAM mode for 
191 |                           STM32F10x Low Density devices.*/
192 |    
193 | /*******************************************************************************
194 | *
195 | * Provide weak aliases for each Exception handler to the Default_Handler. 
196 | * As they are weak aliases, any function with the same name will override 
197 | * this definition.
198 | *
199 | *******************************************************************************/
200 |     
201 |   .weak	NMI_Handler
202 | 	.thumb_set NMI_Handler,Default_Handler
203 | 	
204 |   .weak	HardFault_Handler
205 | 	.thumb_set HardFault_Handler,Default_Handler
206 | 	
207 |   .weak	MemManage_Handler
208 | 	.thumb_set MemManage_Handler,Default_Handler
209 | 	
210 |   .weak	BusFault_Handler
211 | 	.thumb_set BusFault_Handler,Default_Handler
212 | 
213 | 	.weak	UsageFault_Handler
214 | 	.thumb_set UsageFault_Handler,Default_Handler
215 | 
216 | 	.weak	SVC_Handler
217 | 	.thumb_set SVC_Handler,Default_Handler
218 | 
219 | 	.weak	DebugMon_Handler
220 | 	.thumb_set DebugMon_Handler,Default_Handler
221 | 
222 | 	.weak	PendSV_Handler
223 | 	.thumb_set PendSV_Handler,Default_Handler
224 | 
225 | 	.weak	SysTick_Handler
226 | 	.thumb_set SysTick_Handler,Default_Handler
227 | 
228 | 	.weak	WWDG_IRQHandler
229 | 	.thumb_set WWDG_IRQHandler,Default_Handler
230 | 
231 | 	.weak	PVD_IRQHandler
232 | 	.thumb_set PVD_IRQHandler,Default_Handler
233 | 
234 | 	.weak	TAMPER_IRQHandler
235 | 	.thumb_set TAMPER_IRQHandler,Default_Handler
236 | 
237 | 	.weak	RTC_IRQHandler
238 | 	.thumb_set RTC_IRQHandler,Default_Handler
239 | 
240 | 	.weak	FLASH_IRQHandler
241 | 	.thumb_set FLASH_IRQHandler,Default_Handler
242 | 
243 | 	.weak	RCC_IRQHandler
244 | 	.thumb_set RCC_IRQHandler,Default_Handler
245 | 
246 | 	.weak	EXTI0_IRQHandler
247 | 	.thumb_set EXTI0_IRQHandler,Default_Handler
248 | 
249 | 	.weak	EXTI1_IRQHandler
250 | 	.thumb_set EXTI1_IRQHandler,Default_Handler
251 | 
252 | 	.weak	EXTI2_IRQHandler
253 | 	.thumb_set EXTI2_IRQHandler,Default_Handler
254 | 
255 | 	.weak	EXTI3_IRQHandler
256 | 	.thumb_set EXTI3_IRQHandler,Default_Handler
257 | 
258 | 	.weak	EXTI4_IRQHandler
259 | 	.thumb_set EXTI4_IRQHandler,Default_Handler
260 | 
261 | 	.weak	DMA1_Channel1_IRQHandler
262 | 	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
263 | 
264 | 	.weak	DMA1_Channel2_IRQHandler
265 | 	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
266 | 
267 | 	.weak	DMA1_Channel3_IRQHandler
268 | 	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
269 | 
270 | 	.weak	DMA1_Channel4_IRQHandler
271 | 	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
272 | 
273 | 	.weak	DMA1_Channel5_IRQHandler
274 | 	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
275 | 
276 | 	.weak	DMA1_Channel6_IRQHandler
277 | 	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
278 | 
279 | 	.weak	DMA1_Channel7_IRQHandler
280 | 	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
281 | 
282 | 	.weak	ADC1_2_IRQHandler
283 | 	.thumb_set ADC1_2_IRQHandler,Default_Handler
284 | 
285 | 	.weak	USB_HP_CAN1_TX_IRQHandler
286 | 	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
287 | 
288 | 	.weak	USB_LP_CAN1_RX0_IRQHandler
289 | 	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
290 | 
291 | 	.weak	CAN1_RX1_IRQHandler
292 | 	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
293 | 
294 | 	.weak	CAN1_SCE_IRQHandler
295 | 	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
296 | 
297 | 	.weak	EXTI9_5_IRQHandler
298 | 	.thumb_set EXTI9_5_IRQHandler,Default_Handler
299 | 
300 | 	.weak	TIM1_BRK_IRQHandler
301 | 	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
302 | 
303 | 	.weak	TIM1_UP_IRQHandler
304 | 	.thumb_set TIM1_UP_IRQHandler,Default_Handler
305 | 
306 | 	.weak	TIM1_TRG_COM_IRQHandler
307 | 	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
308 | 
309 | 	.weak	TIM1_CC_IRQHandler
310 | 	.thumb_set TIM1_CC_IRQHandler,Default_Handler
311 | 
312 | 	.weak	TIM2_IRQHandler
313 | 	.thumb_set TIM2_IRQHandler,Default_Handler
314 | 
315 | 	.weak	TIM3_IRQHandler
316 | 	.thumb_set TIM3_IRQHandler,Default_Handler
317 | 
318 | 	.weak	I2C1_EV_IRQHandler
319 | 	.thumb_set I2C1_EV_IRQHandler,Default_Handler
320 | 
321 | 	.weak	I2C1_ER_IRQHandler
322 | 	.thumb_set I2C1_ER_IRQHandler,Default_Handler
323 | 
324 | 	.weak	SPI1_IRQHandler
325 | 	.thumb_set SPI1_IRQHandler,Default_Handler
326 | 
327 | 	.weak	USART1_IRQHandler
328 | 	.thumb_set USART1_IRQHandler,Default_Handler
329 | 
330 | 	.weak	USART2_IRQHandler
331 | 	.thumb_set USART2_IRQHandler,Default_Handler
332 | 
333 | 	.weak	EXTI15_10_IRQHandler
334 | 	.thumb_set EXTI15_10_IRQHandler,Default_Handler
335 | 
336 | 	.weak	RTCAlarm_IRQHandler
337 | 	.thumb_set RTCAlarm_IRQHandler,Default_Handler
338 | 
339 | 	.weak	USBWakeUp_IRQHandler
340 | 	.thumb_set USBWakeUp_IRQHandler,Default_Handler  
341 | 
342 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
343 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md.s:
--------------------------------------------------------------------------------
  1 | /**
  2 |  ******************************************************************************
  3 |  * @file      startup_stm32f10x_md.s
  4 |  * @author    MCD Application Team
  5 |  * @version   V3.4.0
  6 |  * @date      10/15/2010
  7 |  * @brief     STM32F10x Medium Density Devices vector table for RIDE7 toolchain.
  8 |  *            This module performs:
  9 |  *                - Set the initial SP
 10 |  *                - Set the initial PC == Reset_Handler,
 11 |  *                - Set the vector table entries with the exceptions ISR address
 12 |  *                - Configure the clock system 
 13 |  *                - Branches to main in the C library (which eventually
 14 |  *                  calls main()).
 15 |  *            After Reset the Cortex-M3 processor is in Thread mode,
 16 |  *            priority is Privileged, and the Stack is set to Main.
 17 |  *******************************************************************************
 18 |  * @copy
 19 |  *
 20 |  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 21 |  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 22 |  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 23 |  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 24 |  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 25 |  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 26 |  *
 27 |  * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 28 |  */	
 29 |     
 30 |   .syntax unified
 31 | 	.cpu cortex-m3
 32 | 	.fpu softvfp
 33 | 	.thumb
 34 | 
 35 | .global	g_pfnVectors
 36 | .global	Default_Handler
 37 | 
 38 | /* start address for the initialization values of the .data section. 
 39 | defined in linker script */
 40 | .word	_sidata
 41 | /* start address for the .data section. defined in linker script */  
 42 | .word	_sdata
 43 | /* end address for the .data section. defined in linker script */
 44 | .word	_edata
 45 | /* start address for the .bss section. defined in linker script */
 46 | .word	_sbss
 47 | /* end address for the .bss section. defined in linker script */
 48 | .word	_ebss
 49 | 
 50 | .equ  BootRAM, 0xF108F85F
 51 | /**
 52 |  * @brief  This is the code that gets called when the processor first
 53 |  *          starts execution following a reset event. Only the absolutely
 54 |  *          necessary set is performed, after which the application
 55 |  *          supplied main() routine is called. 
 56 |  * @param  None
 57 |  * @retval : None
 58 | */
 59 | 
 60 |     .section	.text.Reset_Handler
 61 | 	.weak	Reset_Handler
 62 | 	.type	Reset_Handler, %function
 63 | Reset_Handler:	
 64 | 
 65 | /* Copy the data segment initializers from flash to SRAM */  
 66 |   movs	r1, #0
 67 |   b	LoopCopyDataInit
 68 | 
 69 | CopyDataInit:
 70 | 	ldr	r3, =_sidata
 71 | 	ldr	r3, [r3, r1]
 72 | 	str	r3, [r0, r1]
 73 | 	adds	r1, r1, #4
 74 |     
 75 | LoopCopyDataInit:
 76 | 	ldr	r0, =_sdata
 77 | 	ldr	r3, =_edata
 78 | 	adds	r2, r0, r1
 79 | 	cmp	r2, r3
 80 | 	bcc	CopyDataInit
 81 | 	ldr	r2, =_sbss
 82 | 	b	LoopFillZerobss
 83 | /* Zero fill the bss segment. */  
 84 | FillZerobss:
 85 | 	movs	r3, #0
 86 | 	str	r3, [r2], #4
 87 |     
 88 | LoopFillZerobss:
 89 | 	ldr	r3, = _ebss
 90 | 	cmp	r2, r3
 91 | 	bcc	FillZerobss
 92 | /* Call the clock system intitialization function.*/
 93 |   bl  SystemInit 	
 94 | /* Call the application's entry point.*/
 95 | 	bl	main
 96 | 	bx	lr    
 97 | .size	Reset_Handler, .-Reset_Handler
 98 | 
 99 | /**
100 |  * @brief  This is the code that gets called when the processor receives an 
101 |  *         unexpected interrupt. This simply enters an infinite loop, preserving
102 |  *         the system state for examination by a debugger.
103 |  * @param  None     
104 |  * @retval None       
105 | */
106 |     .section	.text.Default_Handler,"ax",%progbits
107 | Default_Handler:
108 | Infinite_Loop:
109 | 	b	Infinite_Loop
110 | 	.size	Default_Handler, .-Default_Handler
111 | /******************************************************************************
112 | *
113 | * The minimal vector table for a Cortex M3.  Note that the proper constructs
114 | * must be placed on this to ensure that it ends up at physical address
115 | * 0x0000.0000.
116 | *
117 | ******************************************************************************/    
118 |  	.section	.isr_vector,"a",%progbits
119 | 	.type	g_pfnVectors, %object
120 | 	.size	g_pfnVectors, .-g_pfnVectors
121 |     
122 |     
123 | g_pfnVectors:
124 | 	.word	_estack
125 | 	.word	Reset_Handler
126 | 	.word	NMI_Handler
127 | 	.word	HardFault_Handler
128 | 	.word	MemManage_Handler
129 | 	.word	BusFault_Handler
130 | 	.word	UsageFault_Handler
131 | 	.word	0
132 | 	.word	0
133 | 	.word	0
134 | 	.word	0
135 | 	.word	SVC_Handler
136 | 	.word	DebugMon_Handler
137 | 	.word	0
138 | 	.word	PendSV_Handler
139 | 	.word	SysTick_Handler
140 | 	.word	WWDG_IRQHandler
141 | 	.word	PVD_IRQHandler
142 | 	.word	TAMPER_IRQHandler
143 | 	.word	RTC_IRQHandler
144 | 	.word	FLASH_IRQHandler
145 | 	.word	RCC_IRQHandler
146 | 	.word	EXTI0_IRQHandler
147 | 	.word	EXTI1_IRQHandler
148 | 	.word	EXTI2_IRQHandler
149 | 	.word	EXTI3_IRQHandler
150 | 	.word	EXTI4_IRQHandler
151 | 	.word	DMA1_Channel1_IRQHandler
152 | 	.word	DMA1_Channel2_IRQHandler
153 | 	.word	DMA1_Channel3_IRQHandler
154 | 	.word	DMA1_Channel4_IRQHandler
155 | 	.word	DMA1_Channel5_IRQHandler
156 | 	.word	DMA1_Channel6_IRQHandler
157 | 	.word	DMA1_Channel7_IRQHandler
158 | 	.word	ADC1_2_IRQHandler
159 | 	.word	USB_HP_CAN1_TX_IRQHandler
160 | 	.word	USB_LP_CAN1_RX0_IRQHandler
161 | 	.word	CAN1_RX1_IRQHandler
162 | 	.word	CAN1_SCE_IRQHandler
163 | 	.word	EXTI9_5_IRQHandler
164 | 	.word	TIM1_BRK_IRQHandler
165 | 	.word	TIM1_UP_IRQHandler
166 | 	.word	TIM1_TRG_COM_IRQHandler
167 | 	.word	TIM1_CC_IRQHandler
168 | 	.word	TIM2_IRQHandler
169 | 	.word	TIM3_IRQHandler
170 | 	.word	TIM4_IRQHandler
171 | 	.word	I2C1_EV_IRQHandler
172 | 	.word	I2C1_ER_IRQHandler
173 | 	.word	I2C2_EV_IRQHandler
174 | 	.word	I2C2_ER_IRQHandler
175 | 	.word	SPI1_IRQHandler
176 | 	.word	SPI2_IRQHandler
177 | 	.word	USART1_IRQHandler
178 | 	.word	USART2_IRQHandler
179 | 	.word	USART3_IRQHandler
180 | 	.word	EXTI15_10_IRQHandler
181 | 	.word	RTCAlarm_IRQHandler
182 | 	.word	USBWakeUp_IRQHandler	
183 |   .word	0
184 | 	.word	0
185 | 	.word	0
186 | 	.word	0
187 | 	.word	0
188 | 	.word	0
189 | 	.word	0
190 | 	.word	BootRAM          /* @0x108. This is for boot in RAM mode for 
191 |                             STM32F10x Medium Density devices. */
192 |    
193 | /*******************************************************************************
194 | *
195 | * Provide weak aliases for each Exception handler to the Default_Handler. 
196 | * As they are weak aliases, any function with the same name will override 
197 | * this definition.
198 | *
199 | *******************************************************************************/
200 |     
201 |   .weak	NMI_Handler
202 | 	.thumb_set NMI_Handler,Default_Handler
203 | 	
204 |   .weak	HardFault_Handler
205 | 	.thumb_set HardFault_Handler,Default_Handler
206 | 	
207 |   .weak	MemManage_Handler
208 | 	.thumb_set MemManage_Handler,Default_Handler
209 | 	
210 |   .weak	BusFault_Handler
211 | 	.thumb_set BusFault_Handler,Default_Handler
212 | 
213 | 	.weak	UsageFault_Handler
214 | 	.thumb_set UsageFault_Handler,Default_Handler
215 | 
216 | 	.weak	SVC_Handler
217 | 	.thumb_set SVC_Handler,Default_Handler
218 | 
219 | 	.weak	DebugMon_Handler
220 | 	.thumb_set DebugMon_Handler,Default_Handler
221 | 
222 | 	.weak	PendSV_Handler
223 | 	.thumb_set PendSV_Handler,Default_Handler
224 | 
225 | 	.weak	SysTick_Handler
226 | 	.thumb_set SysTick_Handler,Default_Handler
227 | 
228 | 	.weak	WWDG_IRQHandler
229 | 	.thumb_set WWDG_IRQHandler,Default_Handler
230 | 
231 | 	.weak	PVD_IRQHandler
232 | 	.thumb_set PVD_IRQHandler,Default_Handler
233 | 
234 | 	.weak	TAMPER_IRQHandler
235 | 	.thumb_set TAMPER_IRQHandler,Default_Handler
236 | 
237 | 	.weak	RTC_IRQHandler
238 | 	.thumb_set RTC_IRQHandler,Default_Handler
239 | 
240 | 	.weak	FLASH_IRQHandler
241 | 	.thumb_set FLASH_IRQHandler,Default_Handler
242 | 
243 | 	.weak	RCC_IRQHandler
244 | 	.thumb_set RCC_IRQHandler,Default_Handler
245 | 
246 | 	.weak	EXTI0_IRQHandler
247 | 	.thumb_set EXTI0_IRQHandler,Default_Handler
248 | 
249 | 	.weak	EXTI1_IRQHandler
250 | 	.thumb_set EXTI1_IRQHandler,Default_Handler
251 | 
252 | 	.weak	EXTI2_IRQHandler
253 | 	.thumb_set EXTI2_IRQHandler,Default_Handler
254 | 
255 | 	.weak	EXTI3_IRQHandler
256 | 	.thumb_set EXTI3_IRQHandler,Default_Handler
257 | 
258 | 	.weak	EXTI4_IRQHandler
259 | 	.thumb_set EXTI4_IRQHandler,Default_Handler
260 | 
261 | 	.weak	DMA1_Channel1_IRQHandler
262 | 	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
263 | 
264 | 	.weak	DMA1_Channel2_IRQHandler
265 | 	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
266 | 
267 | 	.weak	DMA1_Channel3_IRQHandler
268 | 	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
269 | 
270 | 	.weak	DMA1_Channel4_IRQHandler
271 | 	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
272 | 
273 | 	.weak	DMA1_Channel5_IRQHandler
274 | 	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
275 | 
276 | 	.weak	DMA1_Channel6_IRQHandler
277 | 	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
278 | 
279 | 	.weak	DMA1_Channel7_IRQHandler
280 | 	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
281 | 
282 | 	.weak	ADC1_2_IRQHandler
283 | 	.thumb_set ADC1_2_IRQHandler,Default_Handler
284 | 
285 | 	.weak	USB_HP_CAN1_TX_IRQHandler
286 | 	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
287 | 
288 | 	.weak	USB_LP_CAN1_RX0_IRQHandler
289 | 	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
290 | 
291 | 	.weak	CAN1_RX1_IRQHandler
292 | 	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
293 | 
294 | 	.weak	CAN1_SCE_IRQHandler
295 | 	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
296 | 
297 | 	.weak	EXTI9_5_IRQHandler
298 | 	.thumb_set EXTI9_5_IRQHandler,Default_Handler
299 | 
300 | 	.weak	TIM1_BRK_IRQHandler
301 | 	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
302 | 
303 | 	.weak	TIM1_UP_IRQHandler
304 | 	.thumb_set TIM1_UP_IRQHandler,Default_Handler
305 | 
306 | 	.weak	TIM1_TRG_COM_IRQHandler
307 | 	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
308 | 
309 | 	.weak	TIM1_CC_IRQHandler
310 | 	.thumb_set TIM1_CC_IRQHandler,Default_Handler
311 | 
312 | 	.weak	TIM2_IRQHandler
313 | 	.thumb_set TIM2_IRQHandler,Default_Handler
314 | 
315 | 	.weak	TIM3_IRQHandler
316 | 	.thumb_set TIM3_IRQHandler,Default_Handler
317 | 
318 | 	.weak	TIM4_IRQHandler
319 | 	.thumb_set TIM4_IRQHandler,Default_Handler
320 | 
321 | 	.weak	I2C1_EV_IRQHandler
322 | 	.thumb_set I2C1_EV_IRQHandler,Default_Handler
323 | 
324 | 	.weak	I2C1_ER_IRQHandler
325 | 	.thumb_set I2C1_ER_IRQHandler,Default_Handler
326 | 
327 | 	.weak	I2C2_EV_IRQHandler
328 | 	.thumb_set I2C2_EV_IRQHandler,Default_Handler
329 | 
330 | 	.weak	I2C2_ER_IRQHandler
331 | 	.thumb_set I2C2_ER_IRQHandler,Default_Handler
332 | 
333 | 	.weak	SPI1_IRQHandler
334 | 	.thumb_set SPI1_IRQHandler,Default_Handler
335 | 
336 | 	.weak	SPI2_IRQHandler
337 | 	.thumb_set SPI2_IRQHandler,Default_Handler
338 | 
339 | 	.weak	USART1_IRQHandler
340 | 	.thumb_set USART1_IRQHandler,Default_Handler
341 | 
342 | 	.weak	USART2_IRQHandler
343 | 	.thumb_set USART2_IRQHandler,Default_Handler
344 | 
345 | 	.weak	USART3_IRQHandler
346 | 	.thumb_set USART3_IRQHandler,Default_Handler
347 | 
348 | 	.weak	EXTI15_10_IRQHandler
349 | 	.thumb_set EXTI15_10_IRQHandler,Default_Handler
350 | 
351 | 	.weak	RTCAlarm_IRQHandler
352 | 	.thumb_set RTCAlarm_IRQHandler,Default_Handler
353 | 
354 | 	.weak	USBWakeUp_IRQHandler
355 | 	.thumb_set USBWakeUp_IRQHandler,Default_Handler
356 | 
357 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
358 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.h:
--------------------------------------------------------------------------------
 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    system_stm32f10x.h
 4 |   * @author  MCD Application Team
 5 |   * @version V3.4.0
 6 |   * @date    10/15/2010
 7 |   * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
 8 |   ******************************************************************************  
 9 |   *
10 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
11 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
12 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
13 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
14 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
15 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
16 |   *
17 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
18 |   ******************************************************************************
19 |   */
20 | 
21 | /** @addtogroup CMSIS
22 |   * @{
23 |   */
24 | 
25 | /** @addtogroup stm32f10x_system
26 |   * @{
27 |   */  
28 |   
29 | /**
30 |   * @brief Define to prevent recursive inclusion
31 |   */
32 | #ifndef __SYSTEM_STM32F10X_H
33 | #define __SYSTEM_STM32F10X_H
34 | 
35 | #ifdef __cplusplus
36 |  extern "C" {
37 | #endif 
38 | 
39 | /** @addtogroup STM32F10x_System_Includes
40 |   * @{
41 |   */
42 | 
43 | /**
44 |   * @}
45 |   */
46 | 
47 | 
48 | /** @addtogroup STM32F10x_System_Exported_types
49 |   * @{
50 |   */
51 | 
52 | extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
53 | 
54 | /**
55 |   * @}
56 |   */
57 | 
58 | /** @addtogroup STM32F10x_System_Exported_Constants
59 |   * @{
60 |   */
61 | 
62 | /**
63 |   * @}
64 |   */
65 | 
66 | /** @addtogroup STM32F10x_System_Exported_Macros
67 |   * @{
68 |   */
69 | 
70 | /**
71 |   * @}
72 |   */
73 | 
74 | /** @addtogroup STM32F10x_System_Exported_Functions
75 |   * @{
76 |   */
77 |   
78 | extern void SystemInit(void);
79 | extern void SystemCoreClockUpdate(void);
80 | /**
81 |   * @}
82 |   */
83 | 
84 | #ifdef __cplusplus
85 | }
86 | #endif
87 | 
88 | #endif /*__SYSTEM_STM32F10X_H */
89 | 
90 | /**
91 |   * @}
92 |   */
93 |   
94 | /**
95 |   * @}
96 |   */  
97 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
98 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/misc.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    misc.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the miscellaneous
  8 |   *          firmware library functions (add-on to CMSIS functions).
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __MISC_H
 24 | #define __MISC_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup MISC
 38 |   * @{
 39 |   */
 40 | 
 41 | /** @defgroup MISC_Exported_Types
 42 |   * @{
 43 |   */
 44 | 
 45 | /** 
 46 |   * @brief  NVIC Init Structure definition  
 47 |   */
 48 | 
 49 | typedef struct
 50 | {
 51 |   uint8_t NVIC_IRQChannel;                    /*!< Specifies the IRQ channel to be enabled or disabled.
 52 |                                                    This parameter can be a value of @ref IRQn_Type 
 53 |                                                    (For the complete STM32 Devices IRQ Channels list, please
 54 |                                                     refer to stm32f10x.h file) */
 55 | 
 56 |   uint8_t NVIC_IRQChannelPreemptionPriority;  /*!< Specifies the pre-emption priority for the IRQ channel
 57 |                                                    specified in NVIC_IRQChannel. This parameter can be a value
 58 |                                                    between 0 and 15 as described in the table @ref NVIC_Priority_Table */
 59 | 
 60 |   uint8_t NVIC_IRQChannelSubPriority;         /*!< Specifies the subpriority level for the IRQ channel specified
 61 |                                                    in NVIC_IRQChannel. This parameter can be a value
 62 |                                                    between 0 and 15 as described in the table @ref NVIC_Priority_Table */
 63 | 
 64 |   FunctionalState NVIC_IRQChannelCmd;         /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
 65 |                                                    will be enabled or disabled. 
 66 |                                                    This parameter can be set either to ENABLE or DISABLE */   
 67 | } NVIC_InitTypeDef;
 68 |  
 69 | /**
 70 |   * @}
 71 |   */
 72 | 
 73 | /** @defgroup NVIC_Priority_Table 
 74 |   * @{
 75 |   */
 76 | 
 77 | /**
 78 | @code  
 79 |  The table below gives the allowed values of the pre-emption priority and subpriority according
 80 |  to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
 81 |   ============================================================================================================================
 82 |     NVIC_PriorityGroup   | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority  | Description
 83 |   ============================================================================================================================
 84 |    NVIC_PriorityGroup_0  |                0                  |            0-15             |   0 bits for pre-emption priority
 85 |                          |                                   |                             |   4 bits for subpriority
 86 |   ----------------------------------------------------------------------------------------------------------------------------
 87 |    NVIC_PriorityGroup_1  |                0-1                |            0-7              |   1 bits for pre-emption priority
 88 |                          |                                   |                             |   3 bits for subpriority
 89 |   ----------------------------------------------------------------------------------------------------------------------------    
 90 |    NVIC_PriorityGroup_2  |                0-3                |            0-3              |   2 bits for pre-emption priority
 91 |                          |                                   |                             |   2 bits for subpriority
 92 |   ----------------------------------------------------------------------------------------------------------------------------    
 93 |    NVIC_PriorityGroup_3  |                0-7                |            0-1              |   3 bits for pre-emption priority
 94 |                          |                                   |                             |   1 bits for subpriority
 95 |   ----------------------------------------------------------------------------------------------------------------------------    
 96 |    NVIC_PriorityGroup_4  |                0-15               |            0                |   4 bits for pre-emption priority
 97 |                          |                                   |                             |   0 bits for subpriority                       
 98 |   ============================================================================================================================
 99 | @endcode
100 | */
101 | 
102 | /**
103 |   * @}
104 |   */
105 | 
106 | /** @defgroup MISC_Exported_Constants
107 |   * @{
108 |   */
109 | 
110 | /** @defgroup Vector_Table_Base 
111 |   * @{
112 |   */
113 | 
114 | #define NVIC_VectTab_RAM             ((uint32_t)0x20000000)
115 | #define NVIC_VectTab_FLASH           ((uint32_t)0x08000000)
116 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
117 |                                   ((VECTTAB) == NVIC_VectTab_FLASH))
118 | /**
119 |   * @}
120 |   */
121 | 
122 | /** @defgroup System_Low_Power 
123 |   * @{
124 |   */
125 | 
126 | #define NVIC_LP_SEVONPEND            ((uint8_t)0x10)
127 | #define NVIC_LP_SLEEPDEEP            ((uint8_t)0x04)
128 | #define NVIC_LP_SLEEPONEXIT          ((uint8_t)0x02)
129 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
130 |                         ((LP) == NVIC_LP_SLEEPDEEP) || \
131 |                         ((LP) == NVIC_LP_SLEEPONEXIT))
132 | /**
133 |   * @}
134 |   */
135 | 
136 | /** @defgroup Preemption_Priority_Group 
137 |   * @{
138 |   */
139 | 
140 | #define NVIC_PriorityGroup_0         ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
141 |                                                             4 bits for subpriority */
142 | #define NVIC_PriorityGroup_1         ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
143 |                                                             3 bits for subpriority */
144 | #define NVIC_PriorityGroup_2         ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
145 |                                                             2 bits for subpriority */
146 | #define NVIC_PriorityGroup_3         ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
147 |                                                             1 bits for subpriority */
148 | #define NVIC_PriorityGroup_4         ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
149 |                                                             0 bits for subpriority */
150 | 
151 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
152 |                                        ((GROUP) == NVIC_PriorityGroup_1) || \
153 |                                        ((GROUP) == NVIC_PriorityGroup_2) || \
154 |                                        ((GROUP) == NVIC_PriorityGroup_3) || \
155 |                                        ((GROUP) == NVIC_PriorityGroup_4))
156 | 
157 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
158 | 
159 | #define IS_NVIC_SUB_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
160 | 
161 | #define IS_NVIC_OFFSET(OFFSET)  ((OFFSET) < 0x000FFFFF)
162 | 
163 | /**
164 |   * @}
165 |   */
166 | 
167 | /** @defgroup SysTick_clock_source 
168 |   * @{
169 |   */
170 | 
171 | #define SysTick_CLKSource_HCLK_Div8    ((uint32_t)0xFFFFFFFB)
172 | #define SysTick_CLKSource_HCLK         ((uint32_t)0x00000004)
173 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
174 |                                        ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
175 | /**
176 |   * @}
177 |   */
178 | 
179 | /**
180 |   * @}
181 |   */
182 | 
183 | /** @defgroup MISC_Exported_Macros
184 |   * @{
185 |   */
186 | 
187 | /**
188 |   * @}
189 |   */
190 | 
191 | /** @defgroup MISC_Exported_Functions
192 |   * @{
193 |   */
194 | 
195 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
196 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
197 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
198 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
199 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
200 | 
201 | #ifdef __cplusplus
202 | }
203 | #endif
204 | 
205 | #endif /* __MISC_H */
206 | 
207 | /**
208 |   * @}
209 |   */
210 | 
211 | /**
212 |   * @}
213 |   */
214 | 
215 | /**
216 |   * @}
217 |   */
218 | 
219 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
220 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_bkp.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the BKP firmware 
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_BKP_H
 24 | #define __STM32F10x_BKP_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup BKP
 38 |   * @{
 39 |   */
 40 | 
 41 | /** @defgroup BKP_Exported_Types
 42 |   * @{
 43 |   */
 44 | 
 45 | /**
 46 |   * @}
 47 |   */
 48 | 
 49 | /** @defgroup BKP_Exported_Constants
 50 |   * @{
 51 |   */
 52 | 
 53 | /** @defgroup Tamper_Pin_active_level 
 54 |   * @{
 55 |   */
 56 | 
 57 | #define BKP_TamperPinLevel_High           ((uint16_t)0x0000)
 58 | #define BKP_TamperPinLevel_Low            ((uint16_t)0x0001)
 59 | #define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \
 60 |                                         ((LEVEL) == BKP_TamperPinLevel_Low))
 61 | /**
 62 |   * @}
 63 |   */
 64 | 
 65 | /** @defgroup RTC_output_source_to_output_on_the_Tamper_pin 
 66 |   * @{
 67 |   */
 68 | 
 69 | #define BKP_RTCOutputSource_None          ((uint16_t)0x0000)
 70 | #define BKP_RTCOutputSource_CalibClock    ((uint16_t)0x0080)
 71 | #define BKP_RTCOutputSource_Alarm         ((uint16_t)0x0100)
 72 | #define BKP_RTCOutputSource_Second        ((uint16_t)0x0300)
 73 | #define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \
 74 |                                           ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \
 75 |                                           ((SOURCE) == BKP_RTCOutputSource_Alarm) || \
 76 |                                           ((SOURCE) == BKP_RTCOutputSource_Second))
 77 | /**
 78 |   * @}
 79 |   */
 80 | 
 81 | /** @defgroup Data_Backup_Register 
 82 |   * @{
 83 |   */
 84 | 
 85 | #define BKP_DR1                           ((uint16_t)0x0004)
 86 | #define BKP_DR2                           ((uint16_t)0x0008)
 87 | #define BKP_DR3                           ((uint16_t)0x000C)
 88 | #define BKP_DR4                           ((uint16_t)0x0010)
 89 | #define BKP_DR5                           ((uint16_t)0x0014)
 90 | #define BKP_DR6                           ((uint16_t)0x0018)
 91 | #define BKP_DR7                           ((uint16_t)0x001C)
 92 | #define BKP_DR8                           ((uint16_t)0x0020)
 93 | #define BKP_DR9                           ((uint16_t)0x0024)
 94 | #define BKP_DR10                          ((uint16_t)0x0028)
 95 | #define BKP_DR11                          ((uint16_t)0x0040)
 96 | #define BKP_DR12                          ((uint16_t)0x0044)
 97 | #define BKP_DR13                          ((uint16_t)0x0048)
 98 | #define BKP_DR14                          ((uint16_t)0x004C)
 99 | #define BKP_DR15                          ((uint16_t)0x0050)
100 | #define BKP_DR16                          ((uint16_t)0x0054)
101 | #define BKP_DR17                          ((uint16_t)0x0058)
102 | #define BKP_DR18                          ((uint16_t)0x005C)
103 | #define BKP_DR19                          ((uint16_t)0x0060)
104 | #define BKP_DR20                          ((uint16_t)0x0064)
105 | #define BKP_DR21                          ((uint16_t)0x0068)
106 | #define BKP_DR22                          ((uint16_t)0x006C)
107 | #define BKP_DR23                          ((uint16_t)0x0070)
108 | #define BKP_DR24                          ((uint16_t)0x0074)
109 | #define BKP_DR25                          ((uint16_t)0x0078)
110 | #define BKP_DR26                          ((uint16_t)0x007C)
111 | #define BKP_DR27                          ((uint16_t)0x0080)
112 | #define BKP_DR28                          ((uint16_t)0x0084)
113 | #define BKP_DR29                          ((uint16_t)0x0088)
114 | #define BKP_DR30                          ((uint16_t)0x008C)
115 | #define BKP_DR31                          ((uint16_t)0x0090)
116 | #define BKP_DR32                          ((uint16_t)0x0094)
117 | #define BKP_DR33                          ((uint16_t)0x0098)
118 | #define BKP_DR34                          ((uint16_t)0x009C)
119 | #define BKP_DR35                          ((uint16_t)0x00A0)
120 | #define BKP_DR36                          ((uint16_t)0x00A4)
121 | #define BKP_DR37                          ((uint16_t)0x00A8)
122 | #define BKP_DR38                          ((uint16_t)0x00AC)
123 | #define BKP_DR39                          ((uint16_t)0x00B0)
124 | #define BKP_DR40                          ((uint16_t)0x00B4)
125 | #define BKP_DR41                          ((uint16_t)0x00B8)
126 | #define BKP_DR42                          ((uint16_t)0x00BC)
127 | 
128 | #define IS_BKP_DR(DR) (((DR) == BKP_DR1)  || ((DR) == BKP_DR2)  || ((DR) == BKP_DR3)  || \
129 |                        ((DR) == BKP_DR4)  || ((DR) == BKP_DR5)  || ((DR) == BKP_DR6)  || \
130 |                        ((DR) == BKP_DR7)  || ((DR) == BKP_DR8)  || ((DR) == BKP_DR9)  || \
131 |                        ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \
132 |                        ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \
133 |                        ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \
134 |                        ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \
135 |                        ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \
136 |                        ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \
137 |                        ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \
138 |                        ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \
139 |                        ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \
140 |                        ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \
141 |                        ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42))
142 | 
143 | #define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F)
144 | /**
145 |   * @}
146 |   */
147 | 
148 | /**
149 |   * @}
150 |   */
151 | 
152 | /** @defgroup BKP_Exported_Macros
153 |   * @{
154 |   */
155 | 
156 | /**
157 |   * @}
158 |   */
159 | 
160 | /** @defgroup BKP_Exported_Functions
161 |   * @{
162 |   */
163 | 
164 | void BKP_DeInit(void);
165 | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel);
166 | void BKP_TamperPinCmd(FunctionalState NewState);
167 | void BKP_ITConfig(FunctionalState NewState);
168 | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource);
169 | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue);
170 | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data);
171 | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR);
172 | FlagStatus BKP_GetFlagStatus(void);
173 | void BKP_ClearFlag(void);
174 | ITStatus BKP_GetITStatus(void);
175 | void BKP_ClearITPendingBit(void);
176 | 
177 | #ifdef __cplusplus
178 | }
179 | #endif
180 | 
181 | #endif /* __STM32F10x_BKP_H */
182 | /**
183 |   * @}
184 |   */
185 | 
186 | /**
187 |   * @}
188 |   */
189 | 
190 | /**
191 |   * @}
192 |   */
193 | 
194 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
195 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_cec.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_cec.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the CEC firmware 
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_CEC_H
 24 | #define __STM32F10x_CEC_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup CEC
 38 |   * @{
 39 |   */
 40 |   
 41 | 
 42 | /** @defgroup CEC_Exported_Types
 43 |   * @{
 44 |   */
 45 |    
 46 | /** 
 47 |   * @brief  CEC Init structure definition  
 48 |   */ 
 49 | typedef struct
 50 | {
 51 |   uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. 
 52 |                                This parameter can be a value of @ref CEC_BitTiming_Mode */
 53 |   uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. 
 54 |                                This parameter can be a value of @ref CEC_BitPeriod_Mode */
 55 | }CEC_InitTypeDef;
 56 | 
 57 | /**
 58 |   * @}
 59 |   */
 60 | 
 61 | /** @defgroup CEC_Exported_Constants
 62 |   * @{
 63 |   */ 
 64 |   
 65 | /** @defgroup CEC_BitTiming_Mode 
 66 |   * @{
 67 |   */ 
 68 | #define CEC_BitTimingStdMode                    ((uint16_t)0x00) /*!< Bit timing error Standard Mode */
 69 | #define CEC_BitTimingErrFreeMode                CEC_CFGR_BTEM   /*!< Bit timing error Free Mode */
 70 | 
 71 | #define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \
 72 |                                             ((MODE) == CEC_BitTimingErrFreeMode))
 73 | /**
 74 |   * @}
 75 |   */
 76 | 
 77 | /** @defgroup CEC_BitPeriod_Mode 
 78 |   * @{
 79 |   */ 
 80 | #define CEC_BitPeriodStdMode                    ((uint16_t)0x00) /*!< Bit period error Standard Mode */
 81 | #define CEC_BitPeriodFlexibleMode                CEC_CFGR_BPEM   /*!< Bit period error Flexible Mode */
 82 | 
 83 | #define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \
 84 |                                             ((MODE) == CEC_BitPeriodFlexibleMode))
 85 | /**
 86 |   * @}
 87 |   */ 
 88 | 
 89 | 
 90 | /** @defgroup CEC_interrupts_definition 
 91 |   * @{
 92 |   */ 
 93 | #define CEC_IT_TERR                              CEC_CSR_TERR
 94 | #define CEC_IT_TBTRF                             CEC_CSR_TBTRF
 95 | #define CEC_IT_RERR                              CEC_CSR_RERR
 96 | #define CEC_IT_RBTF                              CEC_CSR_RBTF
 97 | #define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \
 98 |                            ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF))
 99 | /**
100 |   * @}
101 |   */ 
102 | 
103 | 
104 | /** @defgroup CEC_Own_Addres 
105 |   * @{
106 |   */ 
107 | #define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10)
108 | /**
109 |   * @}
110 |   */ 
111 | 
112 | /** @defgroup CEC_Prescaler 
113 |   * @{
114 |   */ 
115 | #define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF)
116 | 
117 | /**
118 |   * @}
119 |   */
120 | 
121 | /** @defgroup CEC_flags_definition 
122 |   * @{
123 |   */
124 |    
125 | /** 
126 |   * @brief  ESR register flags  
127 |   */ 
128 | #define CEC_FLAG_BTE                            ((uint32_t)0x10010000)
129 | #define CEC_FLAG_BPE                            ((uint32_t)0x10020000)
130 | #define CEC_FLAG_RBTFE                          ((uint32_t)0x10040000)
131 | #define CEC_FLAG_SBE                            ((uint32_t)0x10080000)
132 | #define CEC_FLAG_ACKE                           ((uint32_t)0x10100000)
133 | #define CEC_FLAG_LINE                           ((uint32_t)0x10200000)
134 | #define CEC_FLAG_TBTFE                          ((uint32_t)0x10400000)
135 | 
136 | /** 
137 |   * @brief  CSR register flags  
138 |   */ 
139 | #define CEC_FLAG_TEOM                           ((uint32_t)0x00000002)  
140 | #define CEC_FLAG_TERR                           ((uint32_t)0x00000004)
141 | #define CEC_FLAG_TBTRF                          ((uint32_t)0x00000008)
142 | #define CEC_FLAG_RSOM                           ((uint32_t)0x00000010)
143 | #define CEC_FLAG_REOM                           ((uint32_t)0x00000020)
144 | #define CEC_FLAG_RERR                           ((uint32_t)0x00000040)
145 | #define CEC_FLAG_RBTF                           ((uint32_t)0x00000080)
146 | 
147 | #define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00))
148 |                                
149 | #define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \
150 |                                ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \
151 |                                ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \
152 |                                ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \
153 |                                ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \
154 |                                ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \
155 |                                ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF))
156 | 
157 | /**
158 |   * @}
159 |   */ 
160 | 
161 | /**
162 |   * @}
163 |   */ 
164 | 
165 | /** @defgroup CEC_Exported_Macros
166 |   * @{
167 |   */
168 |  
169 | /**
170 |   * @}
171 |   */
172 | 
173 | /** @defgroup CEC_Exported_Functions
174 |   * @{
175 |   */ 
176 | void CEC_DeInit(void);
177 | void CEC_Init(CEC_InitTypeDef* CEC_InitStruct);
178 | void CEC_Cmd(FunctionalState NewState);
179 | void CEC_ITConfig(FunctionalState NewState);
180 | void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress);
181 | void CEC_SetPrescaler(uint16_t CEC_Prescaler);
182 | void CEC_SendDataByte(uint8_t Data);
183 | uint8_t CEC_ReceiveDataByte(void);
184 | void CEC_StartOfMessage(void);
185 | void CEC_EndOfMessageCmd(FunctionalState NewState);
186 | FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG);
187 | void CEC_ClearFlag(uint32_t CEC_FLAG);
188 | ITStatus CEC_GetITStatus(uint8_t CEC_IT);
189 | void CEC_ClearITPendingBit(uint16_t CEC_IT);
190 | 
191 | #ifdef __cplusplus
192 | }
193 | #endif
194 | 
195 | #endif /* __STM32F10x_CEC_H */
196 | 
197 | /**
198 |   * @}
199 |   */ 
200 | 
201 | /**
202 |   * @}
203 |   */ 
204 | 
205 | /**
206 |   * @}
207 |   */ 
208 | 
209 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
210 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h:
--------------------------------------------------------------------------------
 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    stm32f10x_crc.h
 4 |   * @author  MCD Application Team
 5 |   * @version V3.4.0
 6 |   * @date    10/15/2010
 7 |   * @brief   This file contains all the functions prototypes for the CRC firmware 
 8 |   *          library.
 9 |   ******************************************************************************
10 |   * @copy
11 |   *
12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
18 |   *
19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
20 |   */ 
21 | 
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __STM32F10x_CRC_H
24 | #define __STM32F10x_CRC_H
25 | 
26 | #ifdef __cplusplus
27 |  extern "C" {
28 | #endif
29 | 
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f10x.h"
32 | 
33 | /** @addtogroup STM32F10x_StdPeriph_Driver
34 |   * @{
35 |   */
36 | 
37 | /** @addtogroup CRC
38 |   * @{
39 |   */
40 | 
41 | /** @defgroup CRC_Exported_Types
42 |   * @{
43 |   */
44 | 
45 | /**
46 |   * @}
47 |   */
48 | 
49 | /** @defgroup CRC_Exported_Constants
50 |   * @{
51 |   */
52 | 
53 | /**
54 |   * @}
55 |   */
56 | 
57 | /** @defgroup CRC_Exported_Macros
58 |   * @{
59 |   */
60 | 
61 | /**
62 |   * @}
63 |   */
64 | 
65 | /** @defgroup CRC_Exported_Functions
66 |   * @{
67 |   */
68 | 
69 | void CRC_ResetDR(void);
70 | uint32_t CRC_CalcCRC(uint32_t Data);
71 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
72 | uint32_t CRC_GetCRC(void);
73 | void CRC_SetIDRegister(uint8_t IDValue);
74 | uint8_t CRC_GetIDRegister(void);
75 | 
76 | #ifdef __cplusplus
77 | }
78 | #endif
79 | 
80 | #endif /* __STM32F10x_CRC_H */
81 | /**
82 |   * @}
83 |   */
84 | 
85 | /**
86 |   * @}
87 |   */
88 | 
89 | /**
90 |   * @}
91 |   */
92 | 
93 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
94 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_dbgmcu.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the DBGMCU 
  8 |   *          firmware library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_DBGMCU_H
 24 | #define __STM32F10x_DBGMCU_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup DBGMCU
 38 |   * @{
 39 |   */
 40 | 
 41 | /** @defgroup DBGMCU_Exported_Types
 42 |   * @{
 43 |   */
 44 | 
 45 | /**
 46 |   * @}
 47 |   */
 48 | 
 49 | /** @defgroup DBGMCU_Exported_Constants
 50 |   * @{
 51 |   */
 52 | 
 53 | #define DBGMCU_SLEEP                 ((uint32_t)0x00000001)
 54 | #define DBGMCU_STOP                  ((uint32_t)0x00000002)
 55 | #define DBGMCU_STANDBY               ((uint32_t)0x00000004)
 56 | #define DBGMCU_IWDG_STOP             ((uint32_t)0x00000100)
 57 | #define DBGMCU_WWDG_STOP             ((uint32_t)0x00000200)
 58 | #define DBGMCU_TIM1_STOP             ((uint32_t)0x00000400)
 59 | #define DBGMCU_TIM2_STOP             ((uint32_t)0x00000800)
 60 | #define DBGMCU_TIM3_STOP             ((uint32_t)0x00001000)
 61 | #define DBGMCU_TIM4_STOP             ((uint32_t)0x00002000)
 62 | #define DBGMCU_CAN1_STOP             ((uint32_t)0x00004000)
 63 | #define DBGMCU_I2C1_SMBUS_TIMEOUT    ((uint32_t)0x00008000)
 64 | #define DBGMCU_I2C2_SMBUS_TIMEOUT    ((uint32_t)0x00010000)
 65 | #define DBGMCU_TIM8_STOP             ((uint32_t)0x00020000)
 66 | #define DBGMCU_TIM5_STOP             ((uint32_t)0x00040000)
 67 | #define DBGMCU_TIM6_STOP             ((uint32_t)0x00080000)
 68 | #define DBGMCU_TIM7_STOP             ((uint32_t)0x00100000)
 69 | #define DBGMCU_CAN2_STOP             ((uint32_t)0x00200000)
 70 | #define DBGMCU_TIM15_STOP            ((uint32_t)0x00400000)
 71 | #define DBGMCU_TIM16_STOP            ((uint32_t)0x00800000)
 72 | #define DBGMCU_TIM17_STOP            ((uint32_t)0x01000000)
 73 | #define DBGMCU_TIM12_STOP            ((uint32_t)0x02000000)
 74 | #define DBGMCU_TIM13_STOP            ((uint32_t)0x04000000)
 75 | #define DBGMCU_TIM14_STOP            ((uint32_t)0x08000000)
 76 | #define DBGMCU_TIM9_STOP             ((uint32_t)0x10000000)
 77 | #define DBGMCU_TIM10_STOP            ((uint32_t)0x20000000)
 78 | #define DBGMCU_TIM11_STOP            ((uint32_t)0x40000000)
 79 |                                               
 80 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00))
 81 | /**
 82 |   * @}
 83 |   */ 
 84 | 
 85 | /** @defgroup DBGMCU_Exported_Macros
 86 |   * @{
 87 |   */
 88 | 
 89 | /**
 90 |   * @}
 91 |   */
 92 | 
 93 | /** @defgroup DBGMCU_Exported_Functions
 94 |   * @{
 95 |   */
 96 | 
 97 | uint32_t DBGMCU_GetREVID(void);
 98 | uint32_t DBGMCU_GetDEVID(void);
 99 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
100 | 
101 | #ifdef __cplusplus
102 | }
103 | #endif
104 | 
105 | #endif /* __STM32F10x_DBGMCU_H */
106 | /**
107 |   * @}
108 |   */
109 | 
110 | /**
111 |   * @}
112 |   */
113 | 
114 | /**
115 |   * @}
116 |   */
117 | 
118 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
119 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_exti.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the EXTI firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_EXTI_H
 24 | #define __STM32F10x_EXTI_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup EXTI
 38 |   * @{
 39 |   */
 40 | 
 41 | /** @defgroup EXTI_Exported_Types
 42 |   * @{
 43 |   */
 44 | 
 45 | /** 
 46 |   * @brief  EXTI mode enumeration  
 47 |   */
 48 | 
 49 | typedef enum
 50 | {
 51 |   EXTI_Mode_Interrupt = 0x00,
 52 |   EXTI_Mode_Event = 0x04
 53 | }EXTIMode_TypeDef;
 54 | 
 55 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
 56 | 
 57 | /** 
 58 |   * @brief  EXTI Trigger enumeration  
 59 |   */
 60 | 
 61 | typedef enum
 62 | {
 63 |   EXTI_Trigger_Rising = 0x08,
 64 |   EXTI_Trigger_Falling = 0x0C,  
 65 |   EXTI_Trigger_Rising_Falling = 0x10
 66 | }EXTITrigger_TypeDef;
 67 | 
 68 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
 69 |                                   ((TRIGGER) == EXTI_Trigger_Falling) || \
 70 |                                   ((TRIGGER) == EXTI_Trigger_Rising_Falling))
 71 | /** 
 72 |   * @brief  EXTI Init Structure definition  
 73 |   */
 74 | 
 75 | typedef struct
 76 | {
 77 |   uint32_t EXTI_Line;               /*!< Specifies the EXTI lines to be enabled or disabled.
 78 |                                          This parameter can be any combination of @ref EXTI_Lines */
 79 |    
 80 |   EXTIMode_TypeDef EXTI_Mode;       /*!< Specifies the mode for the EXTI lines.
 81 |                                          This parameter can be a value of @ref EXTIMode_TypeDef */
 82 | 
 83 |   EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
 84 |                                          This parameter can be a value of @ref EXTIMode_TypeDef */
 85 | 
 86 |   FunctionalState EXTI_LineCmd;     /*!< Specifies the new state of the selected EXTI lines.
 87 |                                          This parameter can be set either to ENABLE or DISABLE */ 
 88 | }EXTI_InitTypeDef;
 89 | 
 90 | /**
 91 |   * @}
 92 |   */
 93 | 
 94 | /** @defgroup EXTI_Exported_Constants
 95 |   * @{
 96 |   */
 97 | 
 98 | /** @defgroup EXTI_Lines 
 99 |   * @{
100 |   */
101 | 
102 | #define EXTI_Line0       ((uint32_t)0x00001)  /*!< External interrupt line 0 */
103 | #define EXTI_Line1       ((uint32_t)0x00002)  /*!< External interrupt line 1 */
104 | #define EXTI_Line2       ((uint32_t)0x00004)  /*!< External interrupt line 2 */
105 | #define EXTI_Line3       ((uint32_t)0x00008)  /*!< External interrupt line 3 */
106 | #define EXTI_Line4       ((uint32_t)0x00010)  /*!< External interrupt line 4 */
107 | #define EXTI_Line5       ((uint32_t)0x00020)  /*!< External interrupt line 5 */
108 | #define EXTI_Line6       ((uint32_t)0x00040)  /*!< External interrupt line 6 */
109 | #define EXTI_Line7       ((uint32_t)0x00080)  /*!< External interrupt line 7 */
110 | #define EXTI_Line8       ((uint32_t)0x00100)  /*!< External interrupt line 8 */
111 | #define EXTI_Line9       ((uint32_t)0x00200)  /*!< External interrupt line 9 */
112 | #define EXTI_Line10      ((uint32_t)0x00400)  /*!< External interrupt line 10 */
113 | #define EXTI_Line11      ((uint32_t)0x00800)  /*!< External interrupt line 11 */
114 | #define EXTI_Line12      ((uint32_t)0x01000)  /*!< External interrupt line 12 */
115 | #define EXTI_Line13      ((uint32_t)0x02000)  /*!< External interrupt line 13 */
116 | #define EXTI_Line14      ((uint32_t)0x04000)  /*!< External interrupt line 14 */
117 | #define EXTI_Line15      ((uint32_t)0x08000)  /*!< External interrupt line 15 */
118 | #define EXTI_Line16      ((uint32_t)0x10000)  /*!< External interrupt line 16 Connected to the PVD Output */
119 | #define EXTI_Line17      ((uint32_t)0x20000)  /*!< External interrupt line 17 Connected to the RTC Alarm event */
120 | #define EXTI_Line18      ((uint32_t)0x40000)  /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS
121 |                                                    Wakeup from suspend event */                                    
122 | #define EXTI_Line19      ((uint32_t)0x80000)  /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
123 |                                           
124 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00))
125 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
126 |                             ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
127 |                             ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
128 |                             ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
129 |                             ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
130 |                             ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
131 |                             ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
132 |                             ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
133 |                             ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
134 |                             ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19))
135 | 
136 |                     
137 | /**
138 |   * @}
139 |   */
140 | 
141 | /**
142 |   * @}
143 |   */
144 | 
145 | /** @defgroup EXTI_Exported_Macros
146 |   * @{
147 |   */
148 | 
149 | /**
150 |   * @}
151 |   */
152 | 
153 | /** @defgroup EXTI_Exported_Functions
154 |   * @{
155 |   */
156 | 
157 | void EXTI_DeInit(void);
158 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
159 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
160 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
161 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
162 | void EXTI_ClearFlag(uint32_t EXTI_Line);
163 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
164 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
165 | 
166 | #ifdef __cplusplus
167 | }
168 | #endif
169 | 
170 | #endif /* __STM32F10x_EXTI_H */
171 | /**
172 |   * @}
173 |   */
174 | 
175 | /**
176 |   * @}
177 |   */
178 | 
179 | /**
180 |   * @}
181 |   */
182 | 
183 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
184 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_iwdg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the IWDG 
  8 |   *          firmware library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_IWDG_H
 24 | #define __STM32F10x_IWDG_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup IWDG
 38 |   * @{
 39 |   */
 40 | 
 41 | /** @defgroup IWDG_Exported_Types
 42 |   * @{
 43 |   */
 44 | 
 45 | /**
 46 |   * @}
 47 |   */
 48 | 
 49 | /** @defgroup IWDG_Exported_Constants
 50 |   * @{
 51 |   */
 52 | 
 53 | /** @defgroup IWDG_WriteAccess
 54 |   * @{
 55 |   */
 56 | 
 57 | #define IWDG_WriteAccess_Enable     ((uint16_t)0x5555)
 58 | #define IWDG_WriteAccess_Disable    ((uint16_t)0x0000)
 59 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
 60 |                                       ((ACCESS) == IWDG_WriteAccess_Disable))
 61 | /**
 62 |   * @}
 63 |   */
 64 | 
 65 | /** @defgroup IWDG_prescaler 
 66 |   * @{
 67 |   */
 68 | 
 69 | #define IWDG_Prescaler_4            ((uint8_t)0x00)
 70 | #define IWDG_Prescaler_8            ((uint8_t)0x01)
 71 | #define IWDG_Prescaler_16           ((uint8_t)0x02)
 72 | #define IWDG_Prescaler_32           ((uint8_t)0x03)
 73 | #define IWDG_Prescaler_64           ((uint8_t)0x04)
 74 | #define IWDG_Prescaler_128          ((uint8_t)0x05)
 75 | #define IWDG_Prescaler_256          ((uint8_t)0x06)
 76 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4)  || \
 77 |                                       ((PRESCALER) == IWDG_Prescaler_8)  || \
 78 |                                       ((PRESCALER) == IWDG_Prescaler_16) || \
 79 |                                       ((PRESCALER) == IWDG_Prescaler_32) || \
 80 |                                       ((PRESCALER) == IWDG_Prescaler_64) || \
 81 |                                       ((PRESCALER) == IWDG_Prescaler_128)|| \
 82 |                                       ((PRESCALER) == IWDG_Prescaler_256))
 83 | /**
 84 |   * @}
 85 |   */
 86 | 
 87 | /** @defgroup IWDG_Flag 
 88 |   * @{
 89 |   */
 90 | 
 91 | #define IWDG_FLAG_PVU               ((uint16_t)0x0001)
 92 | #define IWDG_FLAG_RVU               ((uint16_t)0x0002)
 93 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU))
 94 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
 95 | /**
 96 |   * @}
 97 |   */
 98 | 
 99 | /**
100 |   * @}
101 |   */
102 | 
103 | /** @defgroup IWDG_Exported_Macros
104 |   * @{
105 |   */
106 | 
107 | /**
108 |   * @}
109 |   */
110 | 
111 | /** @defgroup IWDG_Exported_Functions
112 |   * @{
113 |   */
114 | 
115 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
116 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
117 | void IWDG_SetReload(uint16_t Reload);
118 | void IWDG_ReloadCounter(void);
119 | void IWDG_Enable(void);
120 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
121 | 
122 | #ifdef __cplusplus
123 | }
124 | #endif
125 | 
126 | #endif /* __STM32F10x_IWDG_H */
127 | /**
128 |   * @}
129 |   */
130 | 
131 | /**
132 |   * @}
133 |   */
134 | 
135 | /**
136 |   * @}
137 |   */
138 | 
139 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
140 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_pwr.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the PWR firmware 
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_PWR_H
 24 | #define __STM32F10x_PWR_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup PWR
 38 |   * @{
 39 |   */ 
 40 | 
 41 | /** @defgroup PWR_Exported_Types
 42 |   * @{
 43 |   */ 
 44 | 
 45 | /**
 46 |   * @}
 47 |   */ 
 48 | 
 49 | /** @defgroup PWR_Exported_Constants
 50 |   * @{
 51 |   */ 
 52 | 
 53 | /** @defgroup PVD_detection_level 
 54 |   * @{
 55 |   */ 
 56 | 
 57 | #define PWR_PVDLevel_2V2          ((uint32_t)0x00000000)
 58 | #define PWR_PVDLevel_2V3          ((uint32_t)0x00000020)
 59 | #define PWR_PVDLevel_2V4          ((uint32_t)0x00000040)
 60 | #define PWR_PVDLevel_2V5          ((uint32_t)0x00000060)
 61 | #define PWR_PVDLevel_2V6          ((uint32_t)0x00000080)
 62 | #define PWR_PVDLevel_2V7          ((uint32_t)0x000000A0)
 63 | #define PWR_PVDLevel_2V8          ((uint32_t)0x000000C0)
 64 | #define PWR_PVDLevel_2V9          ((uint32_t)0x000000E0)
 65 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \
 66 |                                  ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \
 67 |                                  ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \
 68 |                                  ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9))
 69 | /**
 70 |   * @}
 71 |   */
 72 | 
 73 | /** @defgroup Regulator_state_is_STOP_mode 
 74 |   * @{
 75 |   */
 76 | 
 77 | #define PWR_Regulator_ON          ((uint32_t)0x00000000)
 78 | #define PWR_Regulator_LowPower    ((uint32_t)0x00000001)
 79 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
 80 |                                      ((REGULATOR) == PWR_Regulator_LowPower))
 81 | /**
 82 |   * @}
 83 |   */
 84 | 
 85 | /** @defgroup STOP_mode_entry 
 86 |   * @{
 87 |   */
 88 | 
 89 | #define PWR_STOPEntry_WFI         ((uint8_t)0x01)
 90 | #define PWR_STOPEntry_WFE         ((uint8_t)0x02)
 91 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE))
 92 |  
 93 | /**
 94 |   * @}
 95 |   */
 96 | 
 97 | /** @defgroup PWR_Flag 
 98 |   * @{
 99 |   */
100 | 
101 | #define PWR_FLAG_WU               ((uint32_t)0x00000001)
102 | #define PWR_FLAG_SB               ((uint32_t)0x00000002)
103 | #define PWR_FLAG_PVDO             ((uint32_t)0x00000004)
104 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
105 |                                ((FLAG) == PWR_FLAG_PVDO))
106 | 
107 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
108 | /**
109 |   * @}
110 |   */
111 | 
112 | /**
113 |   * @}
114 |   */
115 | 
116 | /** @defgroup PWR_Exported_Macros
117 |   * @{
118 |   */
119 | 
120 | /**
121 |   * @}
122 |   */
123 | 
124 | /** @defgroup PWR_Exported_Functions
125 |   * @{
126 |   */
127 | 
128 | void PWR_DeInit(void);
129 | void PWR_BackupAccessCmd(FunctionalState NewState);
130 | void PWR_PVDCmd(FunctionalState NewState);
131 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
132 | void PWR_WakeUpPinCmd(FunctionalState NewState);
133 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
134 | void PWR_EnterSTANDBYMode(void);
135 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
136 | void PWR_ClearFlag(uint32_t PWR_FLAG);
137 | 
138 | #ifdef __cplusplus
139 | }
140 | #endif
141 | 
142 | #endif /* __STM32F10x_PWR_H */
143 | /**
144 |   * @}
145 |   */
146 | 
147 | /**
148 |   * @}
149 |   */
150 | 
151 | /**
152 |   * @}
153 |   */
154 | 
155 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
156 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_rtc.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the RTC firmware 
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_RTC_H
 24 | #define __STM32F10x_RTC_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup RTC
 38 |   * @{
 39 |   */ 
 40 | 
 41 | /** @defgroup RTC_Exported_Types
 42 |   * @{
 43 |   */ 
 44 | 
 45 | /**
 46 |   * @}
 47 |   */ 
 48 | 
 49 | /** @defgroup RTC_Exported_Constants
 50 |   * @{
 51 |   */
 52 | 
 53 | /** @defgroup RTC_interrupts_define 
 54 |   * @{
 55 |   */
 56 | 
 57 | #define RTC_IT_OW            ((uint16_t)0x0004)  /*!< Overflow interrupt */
 58 | #define RTC_IT_ALR           ((uint16_t)0x0002)  /*!< Alarm interrupt */
 59 | #define RTC_IT_SEC           ((uint16_t)0x0001)  /*!< Second interrupt */
 60 | #define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00))
 61 | #define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \
 62 |                            ((IT) == RTC_IT_SEC))
 63 | /**
 64 |   * @}
 65 |   */ 
 66 | 
 67 | /** @defgroup RTC_interrupts_flags 
 68 |   * @{
 69 |   */
 70 | 
 71 | #define RTC_FLAG_RTOFF       ((uint16_t)0x0020)  /*!< RTC Operation OFF flag */
 72 | #define RTC_FLAG_RSF         ((uint16_t)0x0008)  /*!< Registers Synchronized flag */
 73 | #define RTC_FLAG_OW          ((uint16_t)0x0004)  /*!< Overflow flag */
 74 | #define RTC_FLAG_ALR         ((uint16_t)0x0002)  /*!< Alarm flag */
 75 | #define RTC_FLAG_SEC         ((uint16_t)0x0001)  /*!< Second flag */
 76 | #define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00))
 77 | #define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \
 78 |                                ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \
 79 |                                ((FLAG) == RTC_FLAG_SEC))
 80 | #define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF)
 81 | 
 82 | /**
 83 |   * @}
 84 |   */
 85 | 
 86 | /**
 87 |   * @}
 88 |   */
 89 | 
 90 | /** @defgroup RTC_Exported_Macros
 91 |   * @{
 92 |   */
 93 | 
 94 | /**
 95 |   * @}
 96 |   */
 97 | 
 98 | /** @defgroup RTC_Exported_Functions
 99 |   * @{
100 |   */
101 | 
102 | void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState);
103 | void RTC_EnterConfigMode(void);
104 | void RTC_ExitConfigMode(void);
105 | uint32_t  RTC_GetCounter(void);
106 | void RTC_SetCounter(uint32_t CounterValue);
107 | void RTC_SetPrescaler(uint32_t PrescalerValue);
108 | void RTC_SetAlarm(uint32_t AlarmValue);
109 | uint32_t  RTC_GetDivider(void);
110 | void RTC_WaitForLastTask(void);
111 | void RTC_WaitForSynchro(void);
112 | FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG);
113 | void RTC_ClearFlag(uint16_t RTC_FLAG);
114 | ITStatus RTC_GetITStatus(uint16_t RTC_IT);
115 | void RTC_ClearITPendingBit(uint16_t RTC_IT);
116 | 
117 | #ifdef __cplusplus
118 | }
119 | #endif
120 | 
121 | #endif /* __STM32F10x_RTC_H */
122 | /**
123 |   * @}
124 |   */
125 | 
126 | /**
127 |   * @}
128 |   */
129 | 
130 | /**
131 |   * @}
132 |   */
133 | 
134 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
135 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_wwdg.h
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file contains all the functions prototypes for the WWDG firmware
  8 |   *          library.
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Define to prevent recursive inclusion -------------------------------------*/
 23 | #ifndef __STM32F10x_WWDG_H
 24 | #define __STM32F10x_WWDG_H
 25 | 
 26 | #ifdef __cplusplus
 27 |  extern "C" {
 28 | #endif
 29 | 
 30 | /* Includes ------------------------------------------------------------------*/
 31 | #include "stm32f10x.h"
 32 | 
 33 | /** @addtogroup STM32F10x_StdPeriph_Driver
 34 |   * @{
 35 |   */
 36 | 
 37 | /** @addtogroup WWDG
 38 |   * @{
 39 |   */ 
 40 | 
 41 | /** @defgroup WWDG_Exported_Types
 42 |   * @{
 43 |   */ 
 44 |   
 45 | /**
 46 |   * @}
 47 |   */ 
 48 | 
 49 | /** @defgroup WWDG_Exported_Constants
 50 |   * @{
 51 |   */ 
 52 |   
 53 | /** @defgroup WWDG_Prescaler 
 54 |   * @{
 55 |   */ 
 56 |   
 57 | #define WWDG_Prescaler_1    ((uint32_t)0x00000000)
 58 | #define WWDG_Prescaler_2    ((uint32_t)0x00000080)
 59 | #define WWDG_Prescaler_4    ((uint32_t)0x00000100)
 60 | #define WWDG_Prescaler_8    ((uint32_t)0x00000180)
 61 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
 62 |                                       ((PRESCALER) == WWDG_Prescaler_2) || \
 63 |                                       ((PRESCALER) == WWDG_Prescaler_4) || \
 64 |                                       ((PRESCALER) == WWDG_Prescaler_8))
 65 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
 66 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
 67 | 
 68 | /**
 69 |   * @}
 70 |   */ 
 71 | 
 72 | /**
 73 |   * @}
 74 |   */ 
 75 | 
 76 | /** @defgroup WWDG_Exported_Macros
 77 |   * @{
 78 |   */ 
 79 | /**
 80 |   * @}
 81 |   */ 
 82 | 
 83 | /** @defgroup WWDG_Exported_Functions
 84 |   * @{
 85 |   */ 
 86 |   
 87 | void WWDG_DeInit(void);
 88 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
 89 | void WWDG_SetWindowValue(uint8_t WindowValue);
 90 | void WWDG_EnableIT(void);
 91 | void WWDG_SetCounter(uint8_t Counter);
 92 | void WWDG_Enable(uint8_t Counter);
 93 | FlagStatus WWDG_GetFlagStatus(void);
 94 | void WWDG_ClearFlag(void);
 95 | 
 96 | #ifdef __cplusplus
 97 | }
 98 | #endif
 99 | 
100 | #endif /* __STM32F10x_WWDG_H */
101 | 
102 | /**
103 |   * @}
104 |   */ 
105 | 
106 | /**
107 |   * @}
108 |   */ 
109 | 
110 | /**
111 |   * @}
112 |   */ 
113 | 
114 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
115 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    misc.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the miscellaneous firmware functions (add-on
  8 |   *          to CMSIS functions).
  9 |   ******************************************************************************
 10 |   * @copy
 11 |   *
 12 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 13 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 14 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 15 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 16 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 17 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 18 |   *
 19 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 20 |   */ 
 21 | 
 22 | /* Includes ------------------------------------------------------------------*/
 23 | #include "misc.h"
 24 | 
 25 | /** @addtogroup STM32F10x_StdPeriph_Driver
 26 |   * @{
 27 |   */
 28 | 
 29 | /** @defgroup MISC 
 30 |   * @brief MISC driver modules
 31 |   * @{
 32 |   */
 33 | 
 34 | /** @defgroup MISC_Private_TypesDefinitions
 35 |   * @{
 36 |   */
 37 | 
 38 | /**
 39 |   * @}
 40 |   */ 
 41 | 
 42 | /** @defgroup MISC_Private_Defines
 43 |   * @{
 44 |   */
 45 | 
 46 | #define AIRCR_VECTKEY_MASK    ((uint32_t)0x05FA0000)
 47 | /**
 48 |   * @}
 49 |   */
 50 | 
 51 | /** @defgroup MISC_Private_Macros
 52 |   * @{
 53 |   */
 54 | 
 55 | /**
 56 |   * @}
 57 |   */
 58 | 
 59 | /** @defgroup MISC_Private_Variables
 60 |   * @{
 61 |   */
 62 | 
 63 | /**
 64 |   * @}
 65 |   */
 66 | 
 67 | /** @defgroup MISC_Private_FunctionPrototypes
 68 |   * @{
 69 |   */
 70 | 
 71 | /**
 72 |   * @}
 73 |   */
 74 | 
 75 | /** @defgroup MISC_Private_Functions
 76 |   * @{
 77 |   */
 78 | 
 79 | /**
 80 |   * @brief  Configures the priority grouping: pre-emption priority and subpriority.
 81 |   * @param  NVIC_PriorityGroup: specifies the priority grouping bits length. 
 82 |   *   This parameter can be one of the following values:
 83 |   *     @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
 84 |   *                                4 bits for subpriority
 85 |   *     @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
 86 |   *                                3 bits for subpriority
 87 |   *     @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
 88 |   *                                2 bits for subpriority
 89 |   *     @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
 90 |   *                                1 bits for subpriority
 91 |   *     @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
 92 |   *                                0 bits for subpriority
 93 |   * @retval None
 94 |   */
 95 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
 96 | {
 97 |   /* Check the parameters */
 98 |   assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
 99 |   
100 |   /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
101 |   SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
102 | }
103 | 
104 | /**
105 |   * @brief  Initializes the NVIC peripheral according to the specified
106 |   *   parameters in the NVIC_InitStruct.
107 |   * @param  NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
108 |   *   the configuration information for the specified NVIC peripheral.
109 |   * @retval None
110 |   */
111 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
112 | {
113 |   uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
114 |   
115 |   /* Check the parameters */
116 |   assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
117 |   assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));  
118 |   assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
119 |     
120 |   if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
121 |   {
122 |     /* Compute the Corresponding IRQ Priority --------------------------------*/    
123 |     tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
124 |     tmppre = (0x4 - tmppriority);
125 |     tmpsub = tmpsub >> tmppriority;
126 | 
127 |     tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
128 |     tmppriority |=  NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
129 |     tmppriority = tmppriority << 0x04;
130 |         
131 |     NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
132 |     
133 |     /* Enable the Selected IRQ Channels --------------------------------------*/
134 |     NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
135 |       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
136 |   }
137 |   else
138 |   {
139 |     /* Disable the Selected IRQ Channels -------------------------------------*/
140 |     NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
141 |       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
142 |   }
143 | }
144 | 
145 | /**
146 |   * @brief  Sets the vector table location and Offset.
147 |   * @param  NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
148 |   *   This parameter can be one of the following values:
149 |   *     @arg NVIC_VectTab_RAM
150 |   *     @arg NVIC_VectTab_FLASH
151 |   * @param  Offset: Vector Table base offset field. This value must be a multiple of 0x100.
152 |   * @retval None
153 |   */
154 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
155 | { 
156 |   /* Check the parameters */
157 |   assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
158 |   assert_param(IS_NVIC_OFFSET(Offset));  
159 |    
160 |   SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
161 | }
162 | 
163 | /**
164 |   * @brief  Selects the condition for the system to enter low power mode.
165 |   * @param  LowPowerMode: Specifies the new mode for the system to enter low power mode.
166 |   *   This parameter can be one of the following values:
167 |   *     @arg NVIC_LP_SEVONPEND
168 |   *     @arg NVIC_LP_SLEEPDEEP
169 |   *     @arg NVIC_LP_SLEEPONEXIT
170 |   * @param  NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
171 |   * @retval None
172 |   */
173 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
174 | {
175 |   /* Check the parameters */
176 |   assert_param(IS_NVIC_LP(LowPowerMode));
177 |   assert_param(IS_FUNCTIONAL_STATE(NewState));  
178 |   
179 |   if (NewState != DISABLE)
180 |   {
181 |     SCB->SCR |= LowPowerMode;
182 |   }
183 |   else
184 |   {
185 |     SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
186 |   }
187 | }
188 | 
189 | /**
190 |   * @brief  Configures the SysTick clock source.
191 |   * @param  SysTick_CLKSource: specifies the SysTick clock source.
192 |   *   This parameter can be one of the following values:
193 |   *     @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
194 |   *     @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
195 |   * @retval None
196 |   */
197 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
198 | {
199 |   /* Check the parameters */
200 |   assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
201 |   if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
202 |   {
203 |     SysTick->CTRL |= SysTick_CLKSource_HCLK;
204 |   }
205 |   else
206 |   {
207 |     SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
208 |   }
209 | }
210 | 
211 | /**
212 |   * @}
213 |   */
214 | 
215 | /**
216 |   * @}
217 |   */
218 | 
219 | /**
220 |   * @}
221 |   */
222 | 
223 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
224 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_bkp.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the BKP firmware functions.
  8 |   ******************************************************************************
  9 |   * @copy
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 19 |   */ 
 20 | 
 21 | /* Includes ------------------------------------------------------------------*/
 22 | #include "stm32f10x_bkp.h"
 23 | #include "stm32f10x_rcc.h"
 24 | 
 25 | /** @addtogroup STM32F10x_StdPeriph_Driver
 26 |   * @{
 27 |   */
 28 | 
 29 | /** @defgroup BKP 
 30 |   * @brief BKP driver modules
 31 |   * @{
 32 |   */
 33 | 
 34 | /** @defgroup BKP_Private_TypesDefinitions
 35 |   * @{
 36 |   */
 37 | 
 38 | /**
 39 |   * @}
 40 |   */
 41 | 
 42 | /** @defgroup BKP_Private_Defines
 43 |   * @{
 44 |   */
 45 | 
 46 | /* ------------ BKP registers bit address in the alias region --------------- */
 47 | #define BKP_OFFSET        (BKP_BASE - PERIPH_BASE)
 48 | 
 49 | /* --- CR Register ----*/
 50 | 
 51 | /* Alias word address of TPAL bit */
 52 | #define CR_OFFSET         (BKP_OFFSET + 0x30)
 53 | #define TPAL_BitNumber    0x01
 54 | #define CR_TPAL_BB        (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4))
 55 | 
 56 | /* Alias word address of TPE bit */
 57 | #define TPE_BitNumber     0x00
 58 | #define CR_TPE_BB         (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4))
 59 | 
 60 | /* --- CSR Register ---*/
 61 | 
 62 | /* Alias word address of TPIE bit */
 63 | #define CSR_OFFSET        (BKP_OFFSET + 0x34)
 64 | #define TPIE_BitNumber    0x02
 65 | #define CSR_TPIE_BB       (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4))
 66 | 
 67 | /* Alias word address of TIF bit */
 68 | #define TIF_BitNumber     0x09
 69 | #define CSR_TIF_BB        (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4))
 70 | 
 71 | /* Alias word address of TEF bit */
 72 | #define TEF_BitNumber     0x08
 73 | #define CSR_TEF_BB        (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4))
 74 | 
 75 | /* ---------------------- BKP registers bit mask ------------------------ */
 76 | 
 77 | /* RTCCR register bit mask */
 78 | #define RTCCR_CAL_MASK    ((uint16_t)0xFF80)
 79 | #define RTCCR_MASK        ((uint16_t)0xFC7F)
 80 | 
 81 | /**
 82 |   * @}
 83 |   */ 
 84 | 
 85 | 
 86 | /** @defgroup BKP_Private_Macros
 87 |   * @{
 88 |   */
 89 | 
 90 | /**
 91 |   * @}
 92 |   */
 93 | 
 94 | /** @defgroup BKP_Private_Variables
 95 |   * @{
 96 |   */
 97 | 
 98 | /**
 99 |   * @}
100 |   */
101 | 
102 | /** @defgroup BKP_Private_FunctionPrototypes
103 |   * @{
104 |   */
105 | 
106 | /**
107 |   * @}
108 |   */
109 | 
110 | /** @defgroup BKP_Private_Functions
111 |   * @{
112 |   */
113 | 
114 | /**
115 |   * @brief  Deinitializes the BKP peripheral registers to their default reset values.
116 |   * @param  None
117 |   * @retval None
118 |   */
119 | void BKP_DeInit(void)
120 | {
121 |   RCC_BackupResetCmd(ENABLE);
122 |   RCC_BackupResetCmd(DISABLE);
123 | }
124 | 
125 | /**
126 |   * @brief  Configures the Tamper Pin active level.
127 |   * @param  BKP_TamperPinLevel: specifies the Tamper Pin active level.
128 |   *   This parameter can be one of the following values:
129 |   *     @arg BKP_TamperPinLevel_High: Tamper pin active on high level
130 |   *     @arg BKP_TamperPinLevel_Low: Tamper pin active on low level
131 |   * @retval None
132 |   */
133 | void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel)
134 | {
135 |   /* Check the parameters */
136 |   assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel));
137 |   *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel;
138 | }
139 | 
140 | /**
141 |   * @brief  Enables or disables the Tamper Pin activation.
142 |   * @param  NewState: new state of the Tamper Pin activation.
143 |   *   This parameter can be: ENABLE or DISABLE.
144 |   * @retval None
145 |   */
146 | void BKP_TamperPinCmd(FunctionalState NewState)
147 | {
148 |   /* Check the parameters */
149 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
150 |   *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState;
151 | }
152 | 
153 | /**
154 |   * @brief  Enables or disables the Tamper Pin Interrupt.
155 |   * @param  NewState: new state of the Tamper Pin Interrupt.
156 |   *   This parameter can be: ENABLE or DISABLE.
157 |   * @retval None
158 |   */
159 | void BKP_ITConfig(FunctionalState NewState)
160 | {
161 |   /* Check the parameters */
162 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
163 |   *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState;
164 | }
165 | 
166 | /**
167 |   * @brief  Select the RTC output source to output on the Tamper pin.
168 |   * @param  BKP_RTCOutputSource: specifies the RTC output source.
169 |   *   This parameter can be one of the following values:
170 |   *     @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin.
171 |   *     @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency
172 |   *                                          divided by 64 on the Tamper pin.
173 |   *     @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on
174 |   *                                     the Tamper pin.
175 |   *     @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on
176 |   *                                      the Tamper pin.  
177 |   * @retval None
178 |   */
179 | void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource)
180 | {
181 |   uint16_t tmpreg = 0;
182 |   /* Check the parameters */
183 |   assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource));
184 |   tmpreg = BKP->RTCCR;
185 |   /* Clear CCO, ASOE and ASOS bits */
186 |   tmpreg &= RTCCR_MASK;
187 |   
188 |   /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */
189 |   tmpreg |= BKP_RTCOutputSource;
190 |   /* Store the new value */
191 |   BKP->RTCCR = tmpreg;
192 | }
193 | 
194 | /**
195 |   * @brief  Sets RTC Clock Calibration value.
196 |   * @param  CalibrationValue: specifies the RTC Clock Calibration value.
197 |   *   This parameter must be a number between 0 and 0x7F.
198 |   * @retval None
199 |   */
200 | void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue)
201 | {
202 |   uint16_t tmpreg = 0;
203 |   /* Check the parameters */
204 |   assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue));
205 |   tmpreg = BKP->RTCCR;
206 |   /* Clear CAL[6:0] bits */
207 |   tmpreg &= RTCCR_CAL_MASK;
208 |   /* Set CAL[6:0] bits according to CalibrationValue value */
209 |   tmpreg |= CalibrationValue;
210 |   /* Store the new value */
211 |   BKP->RTCCR = tmpreg;
212 | }
213 | 
214 | /**
215 |   * @brief  Writes user data to the specified Data Backup Register.
216 |   * @param  BKP_DR: specifies the Data Backup Register.
217 |   *   This parameter can be BKP_DRx where x:[1, 42]
218 |   * @param  Data: data to write
219 |   * @retval None
220 |   */
221 | void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data)
222 | {
223 |   __IO uint32_t tmp = 0;
224 | 
225 |   /* Check the parameters */
226 |   assert_param(IS_BKP_DR(BKP_DR));
227 | 
228 |   tmp = (uint32_t)BKP_BASE; 
229 |   tmp += BKP_DR;
230 | 
231 |   *(__IO uint32_t *) tmp = Data;
232 | }
233 | 
234 | /**
235 |   * @brief  Reads data from the specified Data Backup Register.
236 |   * @param  BKP_DR: specifies the Data Backup Register.
237 |   *   This parameter can be BKP_DRx where x:[1, 42]
238 |   * @retval The content of the specified Data Backup Register
239 |   */
240 | uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR)
241 | {
242 |   __IO uint32_t tmp = 0;
243 | 
244 |   /* Check the parameters */
245 |   assert_param(IS_BKP_DR(BKP_DR));
246 | 
247 |   tmp = (uint32_t)BKP_BASE; 
248 |   tmp += BKP_DR;
249 | 
250 |   return (*(__IO uint16_t *) tmp);
251 | }
252 | 
253 | /**
254 |   * @brief  Checks whether the Tamper Pin Event flag is set or not.
255 |   * @param  None
256 |   * @retval The new state of the Tamper Pin Event flag (SET or RESET).
257 |   */
258 | FlagStatus BKP_GetFlagStatus(void)
259 | {
260 |   return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB);
261 | }
262 | 
263 | /**
264 |   * @brief  Clears Tamper Pin Event pending flag.
265 |   * @param  None
266 |   * @retval None
267 |   */
268 | void BKP_ClearFlag(void)
269 | {
270 |   /* Set CTE bit to clear Tamper Pin Event flag */
271 |   BKP->CSR |= BKP_CSR_CTE;
272 | }
273 | 
274 | /**
275 |   * @brief  Checks whether the Tamper Pin Interrupt has occurred or not.
276 |   * @param  None
277 |   * @retval The new state of the Tamper Pin Interrupt (SET or RESET).
278 |   */
279 | ITStatus BKP_GetITStatus(void)
280 | {
281 |   return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB);
282 | }
283 | 
284 | /**
285 |   * @brief  Clears Tamper Pin Interrupt pending bit.
286 |   * @param  None
287 |   * @retval None
288 |   */
289 | void BKP_ClearITPendingBit(void)
290 | {
291 |   /* Set CTI bit to clear Tamper Pin Interrupt pending bit */
292 |   BKP->CSR |= BKP_CSR_CTI;
293 | }
294 | 
295 | /**
296 |   * @}
297 |   */
298 | 
299 | /**
300 |   * @}
301 |   */
302 | 
303 | /**
304 |   * @}
305 |   */
306 | 
307 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
308 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_crc.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the CRC firmware functions.
  8 |   ******************************************************************************
  9 |   * @copy
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 19 |   */ 
 20 | 
 21 | /* Includes ------------------------------------------------------------------*/
 22 | #include "stm32f10x_crc.h"
 23 | 
 24 | /** @addtogroup STM32F10x_StdPeriph_Driver
 25 |   * @{
 26 |   */
 27 | 
 28 | /** @defgroup CRC 
 29 |   * @brief CRC driver modules
 30 |   * @{
 31 |   */
 32 | 
 33 | /** @defgroup CRC_Private_TypesDefinitions
 34 |   * @{
 35 |   */
 36 | 
 37 | /**
 38 |   * @}
 39 |   */
 40 | 
 41 | /** @defgroup CRC_Private_Defines
 42 |   * @{
 43 |   */
 44 | 
 45 | /**
 46 |   * @}
 47 |   */
 48 | 
 49 | /** @defgroup CRC_Private_Macros
 50 |   * @{
 51 |   */
 52 | 
 53 | /**
 54 |   * @}
 55 |   */
 56 | 
 57 | /** @defgroup CRC_Private_Variables
 58 |   * @{
 59 |   */
 60 | 
 61 | /**
 62 |   * @}
 63 |   */
 64 | 
 65 | /** @defgroup CRC_Private_FunctionPrototypes
 66 |   * @{
 67 |   */
 68 | 
 69 | /**
 70 |   * @}
 71 |   */
 72 | 
 73 | /** @defgroup CRC_Private_Functions
 74 |   * @{
 75 |   */
 76 | 
 77 | /**
 78 |   * @brief  Resets the CRC Data register (DR).
 79 |   * @param  None
 80 |   * @retval None
 81 |   */
 82 | void CRC_ResetDR(void)
 83 | {
 84 |   /* Reset CRC generator */
 85 |   CRC->CR = CRC_CR_RESET;
 86 | }
 87 | 
 88 | /**
 89 |   * @brief  Computes the 32-bit CRC of a given data word(32-bit).
 90 |   * @param  Data: data word(32-bit) to compute its CRC
 91 |   * @retval 32-bit CRC
 92 |   */
 93 | uint32_t CRC_CalcCRC(uint32_t Data)
 94 | {
 95 |   CRC->DR = Data;
 96 |   
 97 |   return (CRC->DR);
 98 | }
 99 | 
100 | /**
101 |   * @brief  Computes the 32-bit CRC of a given buffer of data word(32-bit).
102 |   * @param  pBuffer: pointer to the buffer containing the data to be computed
103 |   * @param  BufferLength: length of the buffer to be computed					
104 |   * @retval 32-bit CRC
105 |   */
106 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength)
107 | {
108 |   uint32_t index = 0;
109 |   
110 |   for(index = 0; index < BufferLength; index++)
111 |   {
112 |     CRC->DR = pBuffer[index];
113 |   }
114 |   return (CRC->DR);
115 | }
116 | 
117 | /**
118 |   * @brief  Returns the current CRC value.
119 |   * @param  None
120 |   * @retval 32-bit CRC
121 |   */
122 | uint32_t CRC_GetCRC(void)
123 | {
124 |   return (CRC->DR);
125 | }
126 | 
127 | /**
128 |   * @brief  Stores a 8-bit data in the Independent Data(ID) register.
129 |   * @param  IDValue: 8-bit value to be stored in the ID register 					
130 |   * @retval None
131 |   */
132 | void CRC_SetIDRegister(uint8_t IDValue)
133 | {
134 |   CRC->IDR = IDValue;
135 | }
136 | 
137 | /**
138 |   * @brief  Returns the 8-bit data stored in the Independent Data(ID) register
139 |   * @param  None
140 |   * @retval 8-bit value of the ID register 
141 |   */
142 | uint8_t CRC_GetIDRegister(void)
143 | {
144 |   return (CRC->IDR);
145 | }
146 | 
147 | /**
148 |   * @}
149 |   */
150 | 
151 | /**
152 |   * @}
153 |   */
154 | 
155 | /**
156 |   * @}
157 |   */
158 | 
159 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
160 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_dbgmcu.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the DBGMCU firmware functions.
  8 |   ******************************************************************************
  9 |   * @copy
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 19 |   */ 
 20 | 
 21 | /* Includes ------------------------------------------------------------------*/
 22 | #include "stm32f10x_dbgmcu.h"
 23 | 
 24 | /** @addtogroup STM32F10x_StdPeriph_Driver
 25 |   * @{
 26 |   */
 27 | 
 28 | /** @defgroup DBGMCU 
 29 |   * @brief DBGMCU driver modules
 30 |   * @{
 31 |   */ 
 32 | 
 33 | /** @defgroup DBGMCU_Private_TypesDefinitions
 34 |   * @{
 35 |   */
 36 | 
 37 | /**
 38 |   * @}
 39 |   */
 40 | 
 41 | /** @defgroup DBGMCU_Private_Defines
 42 |   * @{
 43 |   */
 44 | 
 45 | #define IDCODE_DEVID_MASK    ((uint32_t)0x00000FFF)
 46 | /**
 47 |   * @}
 48 |   */
 49 | 
 50 | /** @defgroup DBGMCU_Private_Macros
 51 |   * @{
 52 |   */
 53 | 
 54 | /**
 55 |   * @}
 56 |   */
 57 | 
 58 | /** @defgroup DBGMCU_Private_Variables
 59 |   * @{
 60 |   */
 61 | 
 62 | /**
 63 |   * @}
 64 |   */
 65 | 
 66 | /** @defgroup DBGMCU_Private_FunctionPrototypes
 67 |   * @{
 68 |   */
 69 | 
 70 | /**
 71 |   * @}
 72 |   */
 73 | 
 74 | /** @defgroup DBGMCU_Private_Functions
 75 |   * @{
 76 |   */
 77 | 
 78 | /**
 79 |   * @brief  Returns the device revision identifier.
 80 |   * @param  None
 81 |   * @retval Device revision identifier
 82 |   */
 83 | uint32_t DBGMCU_GetREVID(void)
 84 | {
 85 |    return(DBGMCU->IDCODE >> 16);
 86 | }
 87 | 
 88 | /**
 89 |   * @brief  Returns the device identifier.
 90 |   * @param  None
 91 |   * @retval Device identifier
 92 |   */
 93 | uint32_t DBGMCU_GetDEVID(void)
 94 | {
 95 |    return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
 96 | }
 97 | 
 98 | /**
 99 |   * @brief  Configures the specified peripheral and low power mode behavior
100 |   *   when the MCU under Debug mode.
101 |   * @param  DBGMCU_Periph: specifies the peripheral and low power mode.
102 |   *   This parameter can be any combination of the following values:
103 |   *     @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode              
104 |   *     @arg DBGMCU_STOP: Keep debugger connection during STOP mode               
105 |   *     @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode            
106 |   *     @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted          
107 |   *     @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted          
108 |   *     @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted          
109 |   *     @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted          
110 |   *     @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted          
111 |   *     @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted          
112 |   *     @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted           
113 |   *     @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted
114 |   *     @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted
115 |   *     @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted          
116 |   *     @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted          
117 |   *     @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted          
118 |   *     @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted
119 |   *     @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted 
120 |   *     @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
121 |   *     @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
122 |   *     @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted                
123 |   *     @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted
124 |   *     @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted
125 |   *     @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted
126 |   *     @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted
127 |   *     @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted
128 |   *     @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
129 |   * @param  NewState: new state of the specified peripheral in Debug mode.
130 |   *   This parameter can be: ENABLE or DISABLE.
131 |   * @retval None
132 |   */
133 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
134 | {
135 |   /* Check the parameters */
136 |   assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
137 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
138 | 
139 |   if (NewState != DISABLE)
140 |   {
141 |     DBGMCU->CR |= DBGMCU_Periph;
142 |   }
143 |   else
144 |   {
145 |     DBGMCU->CR &= ~DBGMCU_Periph;
146 |   }
147 | }
148 | 
149 | /**
150 |   * @}
151 |   */
152 | 
153 | /**
154 |   * @}
155 |   */
156 | 
157 | /**
158 |   * @}
159 |   */
160 | 
161 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
162 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c:
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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_iwdg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the IWDG firmware functions.
  8 |   ******************************************************************************
  9 |   * @copy
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 19 |   */ 
 20 | 
 21 | /* Includes ------------------------------------------------------------------*/
 22 | #include "stm32f10x_iwdg.h"
 23 | 
 24 | /** @addtogroup STM32F10x_StdPeriph_Driver
 25 |   * @{
 26 |   */
 27 | 
 28 | /** @defgroup IWDG 
 29 |   * @brief IWDG driver modules
 30 |   * @{
 31 |   */ 
 32 | 
 33 | /** @defgroup IWDG_Private_TypesDefinitions
 34 |   * @{
 35 |   */
 36 | 
 37 | /**
 38 |   * @}
 39 |   */
 40 | 
 41 | /** @defgroup IWDG_Private_Defines
 42 |   * @{
 43 |   */ 
 44 | 
 45 | /* ---------------------- IWDG registers bit mask ----------------------------*/
 46 | 
 47 | /* KR register bit mask */
 48 | #define KR_KEY_Reload    ((uint16_t)0xAAAA)
 49 | #define KR_KEY_Enable    ((uint16_t)0xCCCC)
 50 | 
 51 | /**
 52 |   * @}
 53 |   */ 
 54 | 
 55 | /** @defgroup IWDG_Private_Macros
 56 |   * @{
 57 |   */
 58 | 
 59 | /**
 60 |   * @}
 61 |   */
 62 | 
 63 | /** @defgroup IWDG_Private_Variables
 64 |   * @{
 65 |   */
 66 | 
 67 | /**
 68 |   * @}
 69 |   */
 70 | 
 71 | /** @defgroup IWDG_Private_FunctionPrototypes
 72 |   * @{
 73 |   */
 74 | 
 75 | /**
 76 |   * @}
 77 |   */
 78 | 
 79 | /** @defgroup IWDG_Private_Functions
 80 |   * @{
 81 |   */
 82 | 
 83 | /**
 84 |   * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.
 85 |   * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
 86 |   *   This parameter can be one of the following values:
 87 |   *     @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
 88 |   *     @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
 89 |   * @retval None
 90 |   */
 91 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
 92 | {
 93 |   /* Check the parameters */
 94 |   assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
 95 |   IWDG->KR = IWDG_WriteAccess;
 96 | }
 97 | 
 98 | /**
 99 |   * @brief  Sets IWDG Prescaler value.
100 |   * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.
101 |   *   This parameter can be one of the following values:
102 |   *     @arg IWDG_Prescaler_4: IWDG prescaler set to 4
103 |   *     @arg IWDG_Prescaler_8: IWDG prescaler set to 8
104 |   *     @arg IWDG_Prescaler_16: IWDG prescaler set to 16
105 |   *     @arg IWDG_Prescaler_32: IWDG prescaler set to 32
106 |   *     @arg IWDG_Prescaler_64: IWDG prescaler set to 64
107 |   *     @arg IWDG_Prescaler_128: IWDG prescaler set to 128
108 |   *     @arg IWDG_Prescaler_256: IWDG prescaler set to 256
109 |   * @retval None
110 |   */
111 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
112 | {
113 |   /* Check the parameters */
114 |   assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
115 |   IWDG->PR = IWDG_Prescaler;
116 | }
117 | 
118 | /**
119 |   * @brief  Sets IWDG Reload value.
120 |   * @param  Reload: specifies the IWDG Reload value.
121 |   *   This parameter must be a number between 0 and 0x0FFF.
122 |   * @retval None
123 |   */
124 | void IWDG_SetReload(uint16_t Reload)
125 | {
126 |   /* Check the parameters */
127 |   assert_param(IS_IWDG_RELOAD(Reload));
128 |   IWDG->RLR = Reload;
129 | }
130 | 
131 | /**
132 |   * @brief  Reloads IWDG counter with value defined in the reload register
133 |   *   (write access to IWDG_PR and IWDG_RLR registers disabled).
134 |   * @param  None
135 |   * @retval None
136 |   */
137 | void IWDG_ReloadCounter(void)
138 | {
139 |   IWDG->KR = KR_KEY_Reload;
140 | }
141 | 
142 | /**
143 |   * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
144 |   * @param  None
145 |   * @retval None
146 |   */
147 | void IWDG_Enable(void)
148 | {
149 |   IWDG->KR = KR_KEY_Enable;
150 | }
151 | 
152 | /**
153 |   * @brief  Checks whether the specified IWDG flag is set or not.
154 |   * @param  IWDG_FLAG: specifies the flag to check.
155 |   *   This parameter can be one of the following values:
156 |   *     @arg IWDG_FLAG_PVU: Prescaler Value Update on going
157 |   *     @arg IWDG_FLAG_RVU: Reload Value Update on going
158 |   * @retval The new state of IWDG_FLAG (SET or RESET).
159 |   */
160 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
161 | {
162 |   FlagStatus bitstatus = RESET;
163 |   /* Check the parameters */
164 |   assert_param(IS_IWDG_FLAG(IWDG_FLAG));
165 |   if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
166 |   {
167 |     bitstatus = SET;
168 |   }
169 |   else
170 |   {
171 |     bitstatus = RESET;
172 |   }
173 |   /* Return the flag status */
174 |   return bitstatus;
175 | }
176 | 
177 | /**
178 |   * @}
179 |   */
180 | 
181 | /**
182 |   * @}
183 |   */
184 | 
185 | /**
186 |   * @}
187 |   */
188 | 
189 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
190 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_pwr.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the PWR firmware functions.
  8 |   ******************************************************************************
  9 |   * @copy
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 19 |   */ 
 20 | 
 21 | /* Includes ------------------------------------------------------------------*/
 22 | #include "stm32f10x_pwr.h"
 23 | #include "stm32f10x_rcc.h"
 24 | 
 25 | /** @addtogroup STM32F10x_StdPeriph_Driver
 26 |   * @{
 27 |   */
 28 | 
 29 | /** @defgroup PWR 
 30 |   * @brief PWR driver modules
 31 |   * @{
 32 |   */ 
 33 | 
 34 | /** @defgroup PWR_Private_TypesDefinitions
 35 |   * @{
 36 |   */
 37 | 
 38 | /**
 39 |   * @}
 40 |   */
 41 | 
 42 | /** @defgroup PWR_Private_Defines
 43 |   * @{
 44 |   */
 45 | 
 46 | /* --------- PWR registers bit address in the alias region ---------- */
 47 | #define PWR_OFFSET               (PWR_BASE - PERIPH_BASE)
 48 | 
 49 | /* --- CR Register ---*/
 50 | 
 51 | /* Alias word address of DBP bit */
 52 | #define CR_OFFSET                (PWR_OFFSET + 0x00)
 53 | #define DBP_BitNumber            0x08
 54 | #define CR_DBP_BB                (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
 55 | 
 56 | /* Alias word address of PVDE bit */
 57 | #define PVDE_BitNumber           0x04
 58 | #define CR_PVDE_BB               (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
 59 | 
 60 | /* --- CSR Register ---*/
 61 | 
 62 | /* Alias word address of EWUP bit */
 63 | #define CSR_OFFSET               (PWR_OFFSET + 0x04)
 64 | #define EWUP_BitNumber           0x08
 65 | #define CSR_EWUP_BB              (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
 66 | 
 67 | /* ------------------ PWR registers bit mask ------------------------ */
 68 | 
 69 | /* CR register bit mask */
 70 | #define CR_DS_MASK               ((uint32_t)0xFFFFFFFC)
 71 | #define CR_PLS_MASK              ((uint32_t)0xFFFFFF1F)
 72 | 
 73 | 
 74 | /**
 75 |   * @}
 76 |   */
 77 | 
 78 | /** @defgroup PWR_Private_Macros
 79 |   * @{
 80 |   */
 81 | 
 82 | /**
 83 |   * @}
 84 |   */
 85 | 
 86 | /** @defgroup PWR_Private_Variables
 87 |   * @{
 88 |   */
 89 | 
 90 | /**
 91 |   * @}
 92 |   */
 93 | 
 94 | /** @defgroup PWR_Private_FunctionPrototypes
 95 |   * @{
 96 |   */
 97 | 
 98 | /**
 99 |   * @}
100 |   */
101 | 
102 | /** @defgroup PWR_Private_Functions
103 |   * @{
104 |   */
105 | 
106 | /**
107 |   * @brief  Deinitializes the PWR peripheral registers to their default reset values.
108 |   * @param  None
109 |   * @retval None
110 |   */
111 | void PWR_DeInit(void)
112 | {
113 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
114 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
115 | }
116 | 
117 | /**
118 |   * @brief  Enables or disables access to the RTC and backup registers.
119 |   * @param  NewState: new state of the access to the RTC and backup registers.
120 |   *   This parameter can be: ENABLE or DISABLE.
121 |   * @retval None
122 |   */
123 | void PWR_BackupAccessCmd(FunctionalState NewState)
124 | {
125 |   /* Check the parameters */
126 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
127 |   *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
128 | }
129 | 
130 | /**
131 |   * @brief  Enables or disables the Power Voltage Detector(PVD).
132 |   * @param  NewState: new state of the PVD.
133 |   *   This parameter can be: ENABLE or DISABLE.
134 |   * @retval None
135 |   */
136 | void PWR_PVDCmd(FunctionalState NewState)
137 | {
138 |   /* Check the parameters */
139 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
140 |   *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
141 | }
142 | 
143 | /**
144 |   * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
145 |   * @param  PWR_PVDLevel: specifies the PVD detection level
146 |   *   This parameter can be one of the following values:
147 |   *     @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V
148 |   *     @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V
149 |   *     @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V
150 |   *     @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V
151 |   *     @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V
152 |   *     @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V
153 |   *     @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V
154 |   *     @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V
155 |   * @retval None
156 |   */
157 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
158 | {
159 |   uint32_t tmpreg = 0;
160 |   /* Check the parameters */
161 |   assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
162 |   tmpreg = PWR->CR;
163 |   /* Clear PLS[7:5] bits */
164 |   tmpreg &= CR_PLS_MASK;
165 |   /* Set PLS[7:5] bits according to PWR_PVDLevel value */
166 |   tmpreg |= PWR_PVDLevel;
167 |   /* Store the new value */
168 |   PWR->CR = tmpreg;
169 | }
170 | 
171 | /**
172 |   * @brief  Enables or disables the WakeUp Pin functionality.
173 |   * @param  NewState: new state of the WakeUp Pin functionality.
174 |   *   This parameter can be: ENABLE or DISABLE.
175 |   * @retval None
176 |   */
177 | void PWR_WakeUpPinCmd(FunctionalState NewState)
178 | {
179 |   /* Check the parameters */
180 |   assert_param(IS_FUNCTIONAL_STATE(NewState));
181 |   *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState;
182 | }
183 | 
184 | /**
185 |   * @brief  Enters STOP mode.
186 |   * @param  PWR_Regulator: specifies the regulator state in STOP mode.
187 |   *   This parameter can be one of the following values:
188 |   *     @arg PWR_Regulator_ON: STOP mode with regulator ON
189 |   *     @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
190 |   * @param  PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
191 |   *   This parameter can be one of the following values:
192 |   *     @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
193 |   *     @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
194 |   * @retval None
195 |   */
196 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
197 | {
198 |   uint32_t tmpreg = 0;
199 |   /* Check the parameters */
200 |   assert_param(IS_PWR_REGULATOR(PWR_Regulator));
201 |   assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
202 |   
203 |   /* Select the regulator state in STOP mode ---------------------------------*/
204 |   tmpreg = PWR->CR;
205 |   /* Clear PDDS and LPDS bits */
206 |   tmpreg &= CR_DS_MASK;
207 |   /* Set LPDS bit according to PWR_Regulator value */
208 |   tmpreg |= PWR_Regulator;
209 |   /* Store the new value */
210 |   PWR->CR = tmpreg;
211 |   /* Set SLEEPDEEP bit of Cortex System Control Register */
212 |   SCB->SCR |= SCB_SCR_SLEEPDEEP;
213 |   
214 |   /* Select STOP mode entry --------------------------------------------------*/
215 |   if(PWR_STOPEntry == PWR_STOPEntry_WFI)
216 |   {   
217 |     /* Request Wait For Interrupt */
218 |     __WFI();
219 |   }
220 |   else
221 |   {
222 |     /* Request Wait For Event */
223 |     __WFE();
224 |   }
225 |   
226 |   /* Reset SLEEPDEEP bit of Cortex System Control Register */
227 |   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP);  
228 | }
229 | 
230 | /**
231 |   * @brief  Enters STANDBY mode.
232 |   * @param  None
233 |   * @retval None
234 |   */
235 | void PWR_EnterSTANDBYMode(void)
236 | {
237 |   /* Clear Wake-up flag */
238 |   PWR->CR |= PWR_CR_CWUF;
239 |   /* Select STANDBY mode */
240 |   PWR->CR |= PWR_CR_PDDS;
241 |   /* Set SLEEPDEEP bit of Cortex System Control Register */
242 |   SCB->SCR |= SCB_SCR_SLEEPDEEP;
243 | /* This option is used to ensure that store operations are completed */
244 | #if defined ( __CC_ARM   )
245 |   __force_stores();
246 | #endif
247 |   /* Request Wait For Interrupt */
248 |   __WFI();
249 | }
250 | 
251 | /**
252 |   * @brief  Checks whether the specified PWR flag is set or not.
253 |   * @param  PWR_FLAG: specifies the flag to check.
254 |   *   This parameter can be one of the following values:
255 |   *     @arg PWR_FLAG_WU: Wake Up flag
256 |   *     @arg PWR_FLAG_SB: StandBy flag
257 |   *     @arg PWR_FLAG_PVDO: PVD Output
258 |   * @retval The new state of PWR_FLAG (SET or RESET).
259 |   */
260 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
261 | {
262 |   FlagStatus bitstatus = RESET;
263 |   /* Check the parameters */
264 |   assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
265 |   
266 |   if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
267 |   {
268 |     bitstatus = SET;
269 |   }
270 |   else
271 |   {
272 |     bitstatus = RESET;
273 |   }
274 |   /* Return the flag status */
275 |   return bitstatus;
276 | }
277 | 
278 | /**
279 |   * @brief  Clears the PWR's pending flags.
280 |   * @param  PWR_FLAG: specifies the flag to clear.
281 |   *   This parameter can be one of the following values:
282 |   *     @arg PWR_FLAG_WU: Wake Up flag
283 |   *     @arg PWR_FLAG_SB: StandBy flag
284 |   * @retval None
285 |   */
286 | void PWR_ClearFlag(uint32_t PWR_FLAG)
287 | {
288 |   /* Check the parameters */
289 |   assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
290 |          
291 |   PWR->CR |=  PWR_FLAG << 2;
292 | }
293 | 
294 | /**
295 |   * @}
296 |   */
297 | 
298 | /**
299 |   * @}
300 |   */
301 | 
302 | /**
303 |   * @}
304 |   */
305 | 
306 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
307 | 


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c


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/PROGRAM-MDK/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c:
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  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    stm32f10x_wwdg.c
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   This file provides all the WWDG firmware functions.
  8 |   ******************************************************************************
  9 |   * @copy
 10 |   *
 11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 17 |   *
 18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 19 |   */ 
 20 | 
 21 | /* Includes ------------------------------------------------------------------*/
 22 | #include "stm32f10x_wwdg.h"
 23 | #include "stm32f10x_rcc.h"
 24 | 
 25 | /** @addtogroup STM32F10x_StdPeriph_Driver
 26 |   * @{
 27 |   */
 28 | 
 29 | /** @defgroup WWDG 
 30 |   * @brief WWDG driver modules
 31 |   * @{
 32 |   */
 33 | 
 34 | /** @defgroup WWDG_Private_TypesDefinitions
 35 |   * @{
 36 |   */
 37 | 
 38 | /**
 39 |   * @}
 40 |   */
 41 | 
 42 | /** @defgroup WWDG_Private_Defines
 43 |   * @{
 44 |   */
 45 | 
 46 | /* ----------- WWDG registers bit address in the alias region ----------- */
 47 | #define WWDG_OFFSET       (WWDG_BASE - PERIPH_BASE)
 48 | 
 49 | /* Alias word address of EWI bit */
 50 | #define CFR_OFFSET        (WWDG_OFFSET + 0x04)
 51 | #define EWI_BitNumber     0x09
 52 | #define CFR_EWI_BB        (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
 53 | 
 54 | /* --------------------- WWDG registers bit mask ------------------------ */
 55 | 
 56 | /* CR register bit mask */
 57 | #define CR_WDGA_Set       ((uint32_t)0x00000080)
 58 | 
 59 | /* CFR register bit mask */
 60 | #define CFR_WDGTB_Mask    ((uint32_t)0xFFFFFE7F)
 61 | #define CFR_W_Mask        ((uint32_t)0xFFFFFF80)
 62 | #define BIT_Mask          ((uint8_t)0x7F)
 63 | 
 64 | /**
 65 |   * @}
 66 |   */
 67 | 
 68 | /** @defgroup WWDG_Private_Macros
 69 |   * @{
 70 |   */
 71 | 
 72 | /**
 73 |   * @}
 74 |   */
 75 | 
 76 | /** @defgroup WWDG_Private_Variables
 77 |   * @{
 78 |   */
 79 | 
 80 | /**
 81 |   * @}
 82 |   */
 83 | 
 84 | /** @defgroup WWDG_Private_FunctionPrototypes
 85 |   * @{
 86 |   */
 87 | 
 88 | /**
 89 |   * @}
 90 |   */
 91 | 
 92 | /** @defgroup WWDG_Private_Functions
 93 |   * @{
 94 |   */
 95 | 
 96 | /**
 97 |   * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
 98 |   * @param  None
 99 |   * @retval None
100 |   */
101 | void WWDG_DeInit(void)
102 | {
103 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
104 |   RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
105 | }
106 | 
107 | /**
108 |   * @brief  Sets the WWDG Prescaler.
109 |   * @param  WWDG_Prescaler: specifies the WWDG Prescaler.
110 |   *   This parameter can be one of the following values:
111 |   *     @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
112 |   *     @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
113 |   *     @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
114 |   *     @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
115 |   * @retval None
116 |   */
117 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
118 | {
119 |   uint32_t tmpreg = 0;
120 |   /* Check the parameters */
121 |   assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
122 |   /* Clear WDGTB[1:0] bits */
123 |   tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
124 |   /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
125 |   tmpreg |= WWDG_Prescaler;
126 |   /* Store the new value */
127 |   WWDG->CFR = tmpreg;
128 | }
129 | 
130 | /**
131 |   * @brief  Sets the WWDG window value.
132 |   * @param  WindowValue: specifies the window value to be compared to the downcounter.
133 |   *   This parameter value must be lower than 0x80.
134 |   * @retval None
135 |   */
136 | void WWDG_SetWindowValue(uint8_t WindowValue)
137 | {
138 |   __IO uint32_t tmpreg = 0;
139 | 
140 |   /* Check the parameters */
141 |   assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
142 |   /* Clear W[6:0] bits */
143 | 
144 |   tmpreg = WWDG->CFR & CFR_W_Mask;
145 | 
146 |   /* Set W[6:0] bits according to WindowValue value */
147 |   tmpreg |= WindowValue & (uint32_t) BIT_Mask;
148 | 
149 |   /* Store the new value */
150 |   WWDG->CFR = tmpreg;
151 | }
152 | 
153 | /**
154 |   * @brief  Enables the WWDG Early Wakeup interrupt(EWI).
155 |   * @param  None
156 |   * @retval None
157 |   */
158 | void WWDG_EnableIT(void)
159 | {
160 |   *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
161 | }
162 | 
163 | /**
164 |   * @brief  Sets the WWDG counter value.
165 |   * @param  Counter: specifies the watchdog counter value.
166 |   *   This parameter must be a number between 0x40 and 0x7F.
167 |   * @retval None
168 |   */
169 | void WWDG_SetCounter(uint8_t Counter)
170 | {
171 |   /* Check the parameters */
172 |   assert_param(IS_WWDG_COUNTER(Counter));
173 |   /* Write to T[6:0] bits to configure the counter value, no need to do
174 |      a read-modify-write; writing a 0 to WDGA bit does nothing */
175 |   WWDG->CR = Counter & BIT_Mask;
176 | }
177 | 
178 | /**
179 |   * @brief  Enables WWDG and load the counter value.                  
180 |   * @param  Counter: specifies the watchdog counter value.
181 |   *   This parameter must be a number between 0x40 and 0x7F.
182 |   * @retval None
183 |   */
184 | void WWDG_Enable(uint8_t Counter)
185 | {
186 |   /* Check the parameters */
187 |   assert_param(IS_WWDG_COUNTER(Counter));
188 |   WWDG->CR = CR_WDGA_Set | Counter;
189 | }
190 | 
191 | /**
192 |   * @brief  Checks whether the Early Wakeup interrupt flag is set or not.
193 |   * @param  None
194 |   * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
195 |   */
196 | FlagStatus WWDG_GetFlagStatus(void)
197 | {
198 |   return (FlagStatus)(WWDG->SR);
199 | }
200 | 
201 | /**
202 |   * @brief  Clears Early Wakeup interrupt flag.
203 |   * @param  None
204 |   * @retval None
205 |   */
206 | void WWDG_ClearFlag(void)
207 | {
208 |   WWDG->SR = (uint32_t)RESET;
209 | }
210 | 
211 | /**
212 |   * @}
213 |   */
214 | 
215 | /**
216 |   * @}
217 |   */
218 | 
219 | /**
220 |   * @}
221 |   */
222 | 
223 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
224 | 


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/PROGRAM-MDK/MDK-ARM/DebugConfig/LED_STM32F103C8_1.0.0.dbgconf:
--------------------------------------------------------------------------------
 1 | // File: STM32F101_102_103_105_107.dbgconf
 2 | // Version: 1.0.0
 3 | // Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
 4 | //                STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
 5 | 
 6 | // <<< Use Configuration Wizard in Context Menu >>>
 7 | 
 8 | // <h> Debug MCU configuration register (DBGMCU_CR)
 9 | //                                   <i> Reserved bits must be kept at reset value
10 | //   <o.30> DBG_TIM11_STOP           <i> TIM11 counter stopped when core is halted
11 | //   <o.29> DBG_TIM10_STOP           <i> TIM10 counter stopped when core is halted
12 | //   <o.28> DBG_TIM9_STOP            <i> TIM9 counter stopped when core is halted
13 | //   <o.27> DBG_TIM14_STOP           <i> TIM14 counter stopped when core is halted
14 | //   <o.26> DBG_TIM13_STOP           <i> TIM13 counter stopped when core is halted
15 | //   <o.25> DBG_TIM12_STOP           <i> TIM12 counter stopped when core is halted
16 | //   <o.21> DBG_CAN2_STOP            <i> Debug CAN2 stopped when core is halted
17 | //   <o.20> DBG_TIM7_STOP            <i> TIM7 counter stopped when core is halted
18 | //   <o.19> DBG_TIM6_STOP            <i> TIM6 counter stopped when core is halted
19 | //   <o.18> DBG_TIM5_STOP            <i> TIM5 counter stopped when core is halted
20 | //   <o.17> DBG_TIM8_STOP            <i> TIM8 counter stopped when core is halted
21 | //   <o.16> DBG_I2C2_SMBUS_TIMEOUT   <i> SMBUS timeout mode stopped when core is halted
22 | //   <o.15> DBG_I2C1_SMBUS_TIMEOUT   <i> SMBUS timeout mode stopped when core is halted
23 | //   <o.14> DBG_CAN1_STOP            <i> Debug CAN1 stopped when Core is halted
24 | //   <o.13> DBG_TIM4_STOP            <i> TIM4 counter stopped when core is halted
25 | //   <o.12> DBG_TIM3_STOP            <i> TIM3 counter stopped when core is halted
26 | //   <o.11> DBG_TIM2_STOP            <i> TIM2 counter stopped when core is halted
27 | //   <o.10> DBG_TIM1_STOP            <i> TIM1 counter stopped when core is halted
28 | //   <o.9>  DBG_WWDG_STOP            <i> Debug window watchdog stopped when core is halted
29 | //   <o.8>  DBG_IWDG_STOP            <i> Debug independent watchdog stopped when core is halted
30 | //   <o.2>  DBG_STANDBY              <i> Debug standby mode
31 | //   <o.1>  DBG_STOP                 <i> Debug stop mode
32 | //   <o.0>  DBG_SLEEP                <i> Debug sleep mode
33 | // </h>
34 | DbgMCU_CR = 0x00000007;
35 | 
36 | // <<< end of configuration section >>>
37 | 


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/PROGRAM-MDK/MDK-ARM/DebugConfig/LED_STM32F103CB_1.0.0.dbgconf:
--------------------------------------------------------------------------------
 1 | // File: STM32F101_102_103_105_107.dbgconf
 2 | // Version: 1.0.0
 3 | // Note: refer to STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx Reference manual (RM0008)
 4 | //                STM32F101xx STM32F102xx STM32F103xx STM32F105xx STM32F107xx datasheets
 5 | 
 6 | // <<< Use Configuration Wizard in Context Menu >>>
 7 | 
 8 | // <h> Debug MCU configuration register (DBGMCU_CR)
 9 | //                                   <i> Reserved bits must be kept at reset value
10 | //   <o.30> DBG_TIM11_STOP           <i> TIM11 counter stopped when core is halted
11 | //   <o.29> DBG_TIM10_STOP           <i> TIM10 counter stopped when core is halted
12 | //   <o.28> DBG_TIM9_STOP            <i> TIM9 counter stopped when core is halted
13 | //   <o.27> DBG_TIM14_STOP           <i> TIM14 counter stopped when core is halted
14 | //   <o.26> DBG_TIM13_STOP           <i> TIM13 counter stopped when core is halted
15 | //   <o.25> DBG_TIM12_STOP           <i> TIM12 counter stopped when core is halted
16 | //   <o.21> DBG_CAN2_STOP            <i> Debug CAN2 stopped when core is halted
17 | //   <o.20> DBG_TIM7_STOP            <i> TIM7 counter stopped when core is halted
18 | //   <o.19> DBG_TIM6_STOP            <i> TIM6 counter stopped when core is halted
19 | //   <o.18> DBG_TIM5_STOP            <i> TIM5 counter stopped when core is halted
20 | //   <o.17> DBG_TIM8_STOP            <i> TIM8 counter stopped when core is halted
21 | //   <o.16> DBG_I2C2_SMBUS_TIMEOUT   <i> SMBUS timeout mode stopped when core is halted
22 | //   <o.15> DBG_I2C1_SMBUS_TIMEOUT   <i> SMBUS timeout mode stopped when core is halted
23 | //   <o.14> DBG_CAN1_STOP            <i> Debug CAN1 stopped when Core is halted
24 | //   <o.13> DBG_TIM4_STOP            <i> TIM4 counter stopped when core is halted
25 | //   <o.12> DBG_TIM3_STOP            <i> TIM3 counter stopped when core is halted
26 | //   <o.11> DBG_TIM2_STOP            <i> TIM2 counter stopped when core is halted
27 | //   <o.10> DBG_TIM1_STOP            <i> TIM1 counter stopped when core is halted
28 | //   <o.9>  DBG_WWDG_STOP            <i> Debug window watchdog stopped when core is halted
29 | //   <o.8>  DBG_IWDG_STOP            <i> Debug independent watchdog stopped when core is halted
30 | //   <o.2>  DBG_STANDBY              <i> Debug standby mode
31 | //   <o.1>  DBG_STOP                 <i> Debug stop mode
32 | //   <o.0>  DBG_SLEEP                <i> Debug sleep mode
33 | // </h>
34 | DbgMCU_CR = 0x00000007;
35 | 
36 | // <<< end of configuration section >>>
37 | 


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/PROGRAM-MDK/MDK-ARM/EventRecorderStub.scvd:
--------------------------------------------------------------------------------
 1 | <?xml version="1.0" encoding="utf-8"?>
 2 | 
 3 | <component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
 4 | 
 5 | <component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
 6 |   <events>
 7 |   </events>
 8 | 
 9 | </component_viewer>
10 | 


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/PROGRAM-MDK/MDK-ARM/JLinkSettings.ini:
--------------------------------------------------------------------------------
 1 | [BREAKPOINTS]
 2 | ShowInfoWin = 1
 3 | EnableFlashBP = 2
 4 | BPDuringExecution = 0
 5 | [CFI]
 6 | CFISize = 0x00
 7 | CFIAddr = 0x00
 8 | [CPU]
 9 | OverrideMemMap = 0
10 | AllowSimulation = 1
11 | ScriptFile=""
12 | [FLASH]
13 | MinNumBytesFlashDL = 0
14 | SkipProgOnCRCMatch = 1
15 | VerifyDownload = 1
16 | AllowCaching = 1
17 | EnableFlashDL = 2
18 | Override = 0
19 | Device="AD7160"
20 | [GENERAL]
21 | WorkRAMSize = 0x00
22 | WorkRAMAddr = 0x00
23 | [SWO]
24 | SWOLogFile=""
25 | [MEM]
26 | RdOverrideOrMask = 0x00
27 | RdOverrideAndMask = 0xFFFFFFFF
28 | RdOverrideAddr = 0xFFFFFFFF
29 | WrOverrideOrMask = 0x00
30 | WrOverrideAndMask = 0xFFFFFFFF
31 | WrOverrideAddr = 0xFFFFFFFF
32 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/MDK-ARM/LED.BAT:
--------------------------------------------------------------------------------
 1 | SET PATH=C:\Keil_v5\ARM\ARMCC\Bin;C:\Program Files (x86)\NetSarang\Xshell 6\;C:\Program Files (x86)\NetSarang\Xftp 6\;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Windows\System32\OpenSSH\;C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;C:\Program Files\NVIDIA Corporation\NVIDIA NvDLISR;C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\DAL;C:\Program Files\Intel\Intel(R) Management Engine Components\DAL;C:\Program Files\Intel\WiFi\bin\;C:\Program Files\Common Files\Intel\WirelessCommon\;C:\WINDOWS\system32;C:\WINDOWS;C:\WINDOWS\System32\Wbem;C:\WINDOWS\System32\WindowsPowerShell\v1.0\;C:\WINDOWS\System32\OpenSSH\;C:\Program Files\Microsoft\Web Platform Installer\;C:\Program Files (x86)\Microsoft ASP.NET\ASP.NET Web Pages\v1.0\;C:\Program Files (x86)\Windows Kits\8.0\Windows Performance Toolkit\;C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;E:\opencv\opencv\build\x64\vc14\bin;E:\opencv\opencv\build\x64\vc15\bin;C:\Program Files\PuTTY\;c:\arm-hp\bin;C:\Program Files (x86)\STMicroelectronics\STM32 ST-LINK Utility\ST-LINK Utility;C:\Users\hbc\AppData\Local\Microsoft\WindowsApps;
 2 | SET ARMCC5_ASMOPT=--diag_suppress=9931
 3 | SET ARMCC5_CCOPT=--diag_suppress=9931
 4 | SET ARMCC5_LINKOPT=--diag_suppress=9931
 5 | SET CPU_TYPE=STM32F103C8
 6 | SET CPU_VENDOR=STMicroelectronics
 7 | SET UV2_TARGET=LED
 8 | SET CPU_CLOCK=0x007A1200
 9 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\main.__i"
10 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_it.__i"
11 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\hbc_misc.__i"
12 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\sys.__i"
13 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\misc.__i"
14 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_flash.__i"
15 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_gpio.__i"
16 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_rcc.__i"
17 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_adc.__i"
18 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_bkp.__i"
19 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_can.__i"
20 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_cec.__i"
21 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_crc.__i"
22 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_dac.__i"
23 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_dbgmcu.__i"
24 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_dma.__i"
25 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_exti.__i"
26 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_fsmc.__i"
27 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_i2c.__i"
28 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_iwdg.__i"
29 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_pwr.__i"
30 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_rtc.__i"
31 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_sdio.__i"
32 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_spi.__i"
33 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_tim.__i"
34 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_usart.__i"
35 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\stm32f10x_wwdg.__i"
36 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\core_cm3.__i"
37 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\system_stm32f10x.__i"
38 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmAsm" --Via ".\obj\startup_stm32f10x_hd._ia"
39 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\i2c.__i"
40 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\usart.__i"
41 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\adc.__i"
42 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\vfd.__i"
43 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\ds3231.__i"
44 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\pressure.__i"
45 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\screen.__i"
46 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\th.__i"
47 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\time.__i"
48 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\alarm.__i"
49 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\key.__i"
50 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\flash.__i"
51 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\bmp180.__i"
52 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmCC" --Via ".\obj\sht20.__i"
53 | "C:\Keil_v5\ARM\ARMCC\Bin\ArmLink" --Via ".\Obj\Project.lnp"
54 | "C:\Keil_v5\ARM\ARMCC\Bin\fromelf.exe" ".\Obj\Project.axf" --i32combined --output ".\Obj\Project.hex"
55 | 


--------------------------------------------------------------------------------
/PROGRAM-MDK/PAGE/alarm.c:
--------------------------------------------------------------------------------
  1 | #include "VFD.h"
  2 | #include "HBC_MISC.h"
  3 | #include "DS3231.h"
  4 | #include "page.h"
  5 | //extern u8 now_page;
  6 | //extern u8 page_2;
  7 | //extern u8 page_n;
  8 | static u8 now_set=0;
  9 | ALARM_Str *ALARM_SET;
 10 | u8 ALM_CTL,ALM_DOW;
 11 | char USBUF[50];
 12 | static char *day_dp[]={"MON","TUE","WED","THU","FRI","SAT","SUN"};
 13 | void ALARM_PAGE(void){
 14 | 	char dispbuf[8];
 15 | 	if(now_page==5){
 16 | 		if(page_n){
 17 | 			page_n=0;
 18 | 			S1201_WriteStr(0,"        ");
 19 | 			if(page_2==1){
 20 | 				S1201_WriteStr(0,"ALARM");
 21 | 				KEY_EXTI_CTL(1);
 22 | 			}
 23 | 			else if(page_2==2){
 24 | 				S1201_WriteStr(0,"ALARM1");
 25 | 				KEY_EXTI_CTL(0);
 26 | 			}
 27 | 			else if(page_2==3){
 28 | 				S1201_WriteStr(0,"ALARM2");
 29 | 				KEY_EXTI_CTL(0);
 30 | 			}
 31 | 			else if(page_2==4){
 32 | 				S1201_WriteStr(0,"ALARM3");
 33 | 				KEY_EXTI_CTL(0);
 34 | 			}
 35 | 			else{
 36 | 				page_2=1;
 37 | 				page_n=1;
 38 | 				return;
 39 | 			}
 40 | 			Delay(5000000);
 41 | 		}
 42 | 		if(!Set_mode){
 43 | 			if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_5)==RESET){
 44 | 				if(page_2<4)
 45 | 				page_2++;
 46 | 				else page_2=1;
 47 | 				page_n=1;
 48 | 			}
 49 | 			if(page_2==1){
 50 | 				u8 a,b,c;
 51 | 				if((ALARM1.ALARM_CTL&0x800)==0x800) a=1;else a=0;
 52 | 				if((ALARM2.ALARM_CTL&0x800)==0x800) b=1;else b=0;
 53 | 				if((ALARM3.ALARM_CTL&0x800)==0x800) c=1;else c=0;
 54 | 				sprintf(dispbuf,"1%c 2%c 3%c",a?'O':'X',b?'O':'X',c?'O':'X');
 55 | 				S1201_WriteStr(0,dispbuf);
 56 | 			}
 57 | 			if(page_2==2){
 58 | 				S1201_WriteStr(0,"+-TO SET");
 59 | 				if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET && GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET){
 60 | 					ALARM_SET=&ALARM1;
 61 | 					Set_mode=1;
 62 | 					if((ALARM_SET->ALARM_CTL&0x800)==0x800) ALM_CTL=1; else ALM_CTL=0;
 63 | 				}
 64 | 			}
 65 | 			if(page_2==3){
 66 | 				S1201_WriteStr(0,"+-TO SET");
 67 | 				if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET && GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET){
 68 | 					ALARM_SET=&ALARM2;
 69 | 							Set_mode=1;
 70 | 					if((ALARM_SET->ALARM_CTL&0x800)==0x800) ALM_CTL=1; else ALM_CTL=0;
 71 | 				}
 72 | 			}
 73 | 			if(page_2==4){
 74 | 				S1201_WriteStr(0,"+-TO SET");
 75 | 				if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET && GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET){
 76 | 					ALARM_SET=&ALARM3;
 77 | 							Set_mode=1;
 78 | 					if((ALARM_SET->ALARM_CTL&0x800)==0x800) ALM_CTL=1; else ALM_CTL=0;
 79 | 				}
 80 | 			}
 81 | 		}else{
 82 | 			if(Set_done==1){
 83 | 					Set_done=0;
 84 | 				if(now_set==0)  {if(ALM_CTL)ALARM_SET->ALARM_CTL|=0x800;else ALARM_SET->ALARM_CTL&=0xF7FF;}
 85 | 				if(now_set>2) ALARM_SET->ALARM_CTL|=ALM_DOW<<(9-now_set);
 86 | 					now_set++;
 87 | 				if(now_set>2) {if((ALARM_SET->ALARM_CTL&(0x40>>(now_set-3)))==(0x40>>(now_set-3)))ALM_DOW=1; else ALM_DOW=0;}
 88 | 				
 89 | 				sprintf(USBUF,"\r\nCTL:0x%x\r\n",ALARM_SET->ALARM_CTL);
 90 | 				UART1_Send(USBUF);
 91 | 				}
 92 | 				else if(now_set==0){
 93 | 					
 94 | 					sprintf(dispbuf,"CTL:%s",ALM_CTL?"ON  ":"OFF ");
 95 | 					S1201_WriteStr(0,dispbuf);
 96 | 					Set_val=&ALM_CTL;
 97 | 					KEY_EXTI_CTL(1);
 98 | 					Set_val_min=0;
 99 | 					Set_val_max=1;
100 | 				}
101 | 				else if(now_set==1){
102 | 					sprintf(dispbuf,"HOUR:%02d ",ALARM_SET->ALARM_HOUR);
103 | 					S1201_WriteStr(0,dispbuf);
104 | 					Set_val=&ALARM_SET->ALARM_HOUR;
105 | 					KEY_EXTI_CTL(1);
106 | 					Set_val_min=0;
107 | 					Set_val_max=23;
108 | 				}
109 | 				else if(now_set==2){
110 | 					sprintf(dispbuf,"MIN:%02d  ",ALARM_SET->ALARM_MINUTE);
111 | 					S1201_WriteStr(0,dispbuf);
112 | 					Set_val=&ALARM_SET->ALARM_MINUTE;
113 | 					KEY_EXTI_CTL(1);
114 | 					Set_val_min=0;
115 | 					Set_val_max=59;
116 | 				}else if(now_set<10){
117 | 					sprintf(dispbuf,"%s:%s",day_dp[now_set-3],ALM_DOW?"ON  ":"OFF ");
118 | 					S1201_WriteStr(0,dispbuf);
119 | 					Set_val=&ALM_DOW;
120 | 					KEY_EXTI_CTL(1);
121 | 					Set_val_min=0;
122 | 					Set_val_max=1;
123 | 				}
124 | 				else{
125 | 					if(now_set==10) ALARM_SET->ALARM_CTL|=ALM_DOW<<(9-now_set);
126 | 					Set_mode=0;
127 | 					now_set=0;
128 | 					Set_done=0;
129 | 					page_2=1;
130 | 					Storage_Set();
131 | 				}
132 | 		}
133 | 		
134 | 	}
135 | 
136 | }


--------------------------------------------------------------------------------
/PROGRAM-MDK/PAGE/page.h:
--------------------------------------------------------------------------------
 1 | #ifndef __PAGE_H
 2 | #define __PAGE_H
 3 | #include "usart.h"
 4 | #include "DS3231.h"
 5 | #include "key.h"
 6 | #include "HBC_MISC.h"
 7 | extern u8 now_page;
 8 | extern u8 page_2;
 9 | extern u8 page_n;
10 | extern Datetime DS3231;
11 | extern u8 Set_mode;
12 | extern u8 Set_done;
13 | extern u8 *Set_val;
14 | extern u8 Set_val_min;
15 | extern u8 Set_val_max;
16 | extern ALARM_Str ALARM1,ALARM2,ALARM3;
17 | extern u16 wdt;
18 | extern u8 screen_auto;
19 | extern u8 screen_br;
20 | void TIME_PAGE(void);
21 | void TH_PAGE(void);
22 | void PRESSURE_PAGE(void);
23 | void SCREEN_PAGE(void);
24 | void ALARM_PAGE(void);
25 | 
26 | #endif


--------------------------------------------------------------------------------
/PROGRAM-MDK/PAGE/pressure.c:
--------------------------------------------------------------------------------
 1 | #include "VFD.h"
 2 | #include "HBC_MISC.h"
 3 | #include "BMP180.h"
 4 | #include "page.h"
 5 | //extern u8 now_page;
 6 | //extern u8 page_2;
 7 | //extern u8 page_n;
 8 | extern BMP180 bmp180;
 9 | void PRESSURE_PAGE(void){
10 | 	if(now_page==3){
11 | 		u8 STATUS;
12 | 			char dispbuf[8];
13 | 			if(!BMP180_Check()) UART1_Send("OK\r\n");
14 | 			
15 | 			
16 | 			BMP_ReadCalibrationData();
17 | 			//BMP_Read_UT();
18 | 			//BMP_Read_UP();
19 | 			BMP_UncompemstatedToTrue();
20 | 		if(page_n){
21 | 			page_n=0;
22 | 			S1201_WriteStr(0,"        ");
23 | 			if(page_2==1){
24 | 				S1201_WriteStr(0,"PRESSURE");
25 | 				KEY_EXTI_CTL(1);
26 | 			}
27 | 			else if(page_2==2){
28 | 				S1201_WriteStr(0,"TEMP");
29 | 				KEY_EXTI_CTL(1);
30 | 			}else{
31 | 				page_2=1;
32 | 				page_n=1;
33 | 				return;
34 | 			}
35 | 			
36 | 			
37 | 		}
38 | 		Delay(5000000);
39 | 	
40 | 		if(page_2==1){
41 | 			sprintf(dispbuf,"%06ldpa",bmp180.p);
42 | 			S1201_WriteStr(0,dispbuf);
43 | 		}
44 | 		if(page_2==2){
45 | 			sprintf(dispbuf,"%.2fC",bmp180.Temp/10.0);
46 | 			S1201_WriteStr(0,dispbuf);
47 | 		}
48 | 	}
49 | }


--------------------------------------------------------------------------------
/PROGRAM-MDK/PAGE/screen.c:
--------------------------------------------------------------------------------
 1 | #include "VFD.h"
 2 | #include "HBC_MISC.h"
 3 | #include "DS3231.h"
 4 | #include "page.h"
 5 | //extern u8 now_page;
 6 | //extern u8 page_2;
 7 | //extern u8 page_n;
 8 | extern u8 screen_br_now;
 9 | void SCREEN_PAGE(void){
10 | 	char dispbuf[8];
11 | 	if(now_page==4){
12 | 		if(page_n){
13 | 			page_n=0;
14 | 			S1201_WriteStr(0,"        ");
15 | 			if(page_2==1){
16 | 				S1201_WriteStr(0,"SCREEN");
17 | 				KEY_EXTI_CTL(1);
18 | 			}
19 | 			else if(page_2==2){
20 | 				S1201_WriteStr(0,"AUTOBR");
21 | 				KEY_EXTI_CTL(0);
22 | 			}
23 | 			else if(page_2==3){
24 | 				S1201_WriteStr(0,"SETBR");
25 | 				KEY_EXTI_CTL(0);
26 | 			}
27 | 			else{
28 | 				page_2=1;
29 | 				page_n=1;
30 | 				return;
31 | 			}
32 | 			Delay(5000000);
33 | 		}
34 | 		
35 | 		if(!Set_mode){
36 | 			if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_5)==RESET){
37 | 				if(page_2<4)
38 | 				page_2++;
39 | 				else page_2=1;
40 | 				page_n=1;
41 | 			}
42 | 			if(page_2==1){
43 | 				sprintf(dispbuf,"BRI:%03d ",screen_br_now);
44 | 				S1201_WriteStr(0,dispbuf);
45 | 			}
46 | 			if(page_2==2){
47 | 				S1201_WriteStr(0,"+-TO SET");
48 | 				if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET && GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET){
49 | 					Set_mode=1;
50 | 				}
51 | 			}
52 | 			if(page_2==3){
53 | 				S1201_WriteStr(0,"+-TO SET");
54 | 				if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET && GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET){
55 | 							Set_mode=1;
56 | 				}
57 | 			}
58 | 		}else{
59 | 				if(page_2==2){
60 | 					
61 | 					if(screen_auto)
62 | 					S1201_WriteStr(0,"M:Auto  ");
63 | 					else
64 | 					S1201_WriteStr(0,"M:Manual");
65 | 					Set_val=&screen_auto;
66 | 					KEY_EXTI_CTL(1);
67 | 					Set_val_min=0;
68 | 					Set_val_max=1;
69 | 				}
70 | 				if(page_2==3){
71 | 					sprintf(dispbuf,"BRIS:%03d",screen_br);
72 | 					S1201_WriteStr(0,dispbuf);
73 | 					Set_val=&screen_br;
74 | 					KEY_EXTI_CTL(1);
75 | 					Set_val_min=50;
76 | 					Set_val_max=255;
77 | 				}
78 | 			if(Set_done==1){
79 | 					Set_mode=0;
80 | 					Set_done=0;
81 | 					page_2=1;
82 | 					Storage_Set();
83 | 			}
84 | 		}
85 | 	}
86 | 
87 | }


--------------------------------------------------------------------------------
/PROGRAM-MDK/PAGE/th.c:
--------------------------------------------------------------------------------
 1 | #include "VFD.h"
 2 | #include "SHT20.h"
 3 | #include "HBC_MISC.h"
 4 | #include "DS3231.h"
 5 | #include "page.h"
 6 | //extern u8 now_page;
 7 | //extern u8 page_2;
 8 | //extern u8 page_n;
 9 | u8 STATUS;
10 | 
11 | void TH_PAGE(void){
12 | 	char dispbuf[8];
13 | 	if(now_page==2){
14 | 		if(page_n){
15 | 			S1201_WriteStr(0,"        ");
16 | 			if(page_2==1){
17 | 				S1201_WriteStr(0,"TEMP&HUM");
18 | 			}else if(page_2==2){
19 | 				S1201_WriteStr(0,"Humidity");
20 | 			}else{
21 | 				page_2=1;
22 | 				page_n=1;
23 | 				return;
24 | 			}
25 | 			page_n=0;
26 | 			
27 | 			Delay(5000000);
28 | 		}
29 | 		STATUS=SHT20_Check();
30 | 		if(!STATUS){
31 | 			if(page_2==1){
32 | 				sprintf(dispbuf,"%02.2fC  ",SHT20_GetTemp());
33 | 				S1201_WriteStr(0,dispbuf);
34 | 			}else if(page_2==2){
35 | 				sprintf(dispbuf,"%02.2f%%  ",SHT20_GetHum());
36 | 				S1201_WriteStr(0,dispbuf);
37 | 			}
38 | 		}else if(STATUS==0xFF) S1201_WriteStr(0,"I2CERROR");
39 | 		else	S1201_WriteStr(0," DEVERR ");
40 | 		
41 | 	}
42 | 
43 | }


--------------------------------------------------------------------------------
/PROGRAM-MDK/PAGE/time.c:
--------------------------------------------------------------------------------
  1 | #include "VFD.h"
  2 | #include "HBC_MISC.h"
  3 | #include "DS3231.h"
  4 | #include "page.h"
  5 | //extern u8 now_page;
  6 | //extern u8 page_2;
  7 | //extern u8 page_n;
  8 | char *day_dp[]={"Monday  ","Tuesday ","Wednesda","Thursday","Friday  ","Saturday","Sunday  "};
  9 | u8 now_set=0;
 10 | 
 11 | u8 month_cal(u8 y,u8 m){//平年闰年判断
 12 | 	int year=2000;
 13 | 	year+=y;
 14 | 	if(m==2){
 15 | 		if((year%4==0 && year%100!=0)||year%400==0){
 16 | 			return 29;
 17 | 		}else return 28;
 18 | 	}else if(m==1 || m==3 || m==5 || m==7 || m==8 || m==10 || m==12) return 31;
 19 | 	else return 30;
 20 | }
 21 | u8 day_cal(u8 y1,u8 m,u8 d){//星期计算
 22 | 	int y;
 23 | 	u8 day;
 24 | 	y=2000+y1;
 25 | 	if(m==1||m==2) {
 26 |         m+=12;
 27 |         y--;
 28 |     }
 29 |     day=(d+2*m+3*(m+1)/5+y+y/4-y/100+y/400)%7;
 30 | 		//if(++day>6) day=0;
 31 | 		day++;
 32 | 		return day;
 33 | }
 34 | void TIME_PAGE(void){
 35 | 	u8 STATUS;
 36 | 	if(now_page==1){
 37 | 		if(page_n){
 38 | 			page_n=0;
 39 | 			S1201_WriteStr(0,"        ");
 40 | 			if(page_2==1){
 41 | 				S1201_WriteStr(0,"TIME");
 42 | 				KEY_EXTI_CTL(1);
 43 | 			}
 44 | 			else if(page_2==2){
 45 | 				S1201_WriteStr(0,"DATE");
 46 | 				//KEY_EXTI_CTL(0);
 47 | 			}
 48 | 			else if(page_2==3){
 49 | 				S1201_WriteStr(0,"DOW");
 50 | 				KEY_EXTI_CTL(0);
 51 | 			}else if(page_2==4){
 52 | 				S1201_WriteStr(0,"TIMESET");
 53 | 				KEY_EXTI_CTL(0);
 54 | 			}
 55 | 			else{
 56 | 				page_2=1;
 57 | 				page_n=1;
 58 | 				return;
 59 | 			}
 60 | 			Delay(5000000);
 61 | 		}
 62 | 		if(!Set_mode)
 63 | 		if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_5)==RESET){
 64 | 			if(page_2<4)
 65 | 			page_2++;
 66 | 			else page_2=1;
 67 | 			page_n=1;
 68 | 		}
 69 | 		
 70 | 		STATUS=DS3231_Check();
 71 | 		if(!STATUS) {
 72 | 			char dispbuf[8];
 73 | 			if(!Set_mode){
 74 | 				DS3231_Get(&DS3231);
 75 | 				if(page_2==1){
 76 | 					sprintf(dispbuf,"%02d:%02d:%02d",DS3231.hour,DS3231.minute,DS3231.second);
 77 | 					S1201_WriteStr(0,dispbuf);
 78 | 				}else if(page_2==2){
 79 | 					sprintf(dispbuf,"%02d-%02d-%02d",DS3231.year,DS3231.month,DS3231.date);
 80 | 					S1201_WriteStr(0,dispbuf);
 81 | 				}else if(page_2==3){
 82 | 					
 83 | 					S1201_WriteStr(0,day_dp[DS3231.day-1]);
 84 | 					sprintf(dispbuf,"%d\r\n",DS3231.day);
 85 | 					UART1_Send(dispbuf);
 86 | 				}else if(page_2==4){
 87 | 					S1201_WriteStr(0,"+-TO SET");
 88 | 					if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET && GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET){
 89 | 						Set_mode=1;
 90 | 						
 91 | 					}
 92 | 				}
 93 | 			
 94 | 			}else{
 95 | 				if(Set_done==1){
 96 | 					Set_done=0;
 97 | 					now_set++;
 98 | 				}
 99 | 				else if(now_set==0){
100 | 					
101 | 					sprintf(dispbuf,"YEAR:%02d ",DS3231.year);
102 | 					S1201_WriteStr(0,dispbuf);
103 | 					Set_val=&DS3231.year;
104 | 					KEY_EXTI_CTL(1);
105 | 					Set_val_min=0;
106 | 					Set_val_max=99;
107 | 				}
108 | 				else if(now_set==1){
109 | 					sprintf(dispbuf,"MONTH:%02d",DS3231.month);
110 | 					S1201_WriteStr(0,dispbuf);
111 | 					Set_val=&DS3231.month;
112 | 					KEY_EXTI_CTL(1);
113 | 					Set_val_min=0;
114 | 					Set_val_max=12;
115 | 				}
116 | 				else if(now_set==2){
117 | 					sprintf(dispbuf,"DATE:%02d ",DS3231.date);
118 | 					S1201_WriteStr(0,dispbuf);
119 | 					Set_val=&DS3231.date;
120 | 					KEY_EXTI_CTL(1);
121 | 					Set_val_min=0;
122 | 					Set_val_max=month_cal(DS3231.year,DS3231.month);
123 | 				}
124 | 				else if(now_set==3){
125 | 					sprintf(dispbuf,"HOUR:%02d ",DS3231.hour);
126 | 					S1201_WriteStr(0,dispbuf);
127 | 					Set_val=&DS3231.hour;
128 | 					KEY_EXTI_CTL(1);
129 | 					Set_val_min=0;
130 | 					Set_val_max=23;
131 | 				}
132 | 				else if(now_set==4){
133 | 					sprintf(dispbuf,"MIN:%02d  ",DS3231.minute);
134 | 					S1201_WriteStr(0,dispbuf);
135 | 					Set_val=&DS3231.minute;
136 | 					KEY_EXTI_CTL(1);
137 | 					Set_val_min=0;
138 | 					Set_val_max=59;
139 | 				}
140 | 				else{
141 | 					Set_mode=0;
142 | 					now_set=0;
143 | 					Set_done=0;
144 | 					page_2=1;
145 | 					DS3231.day=day_cal(DS3231.year,DS3231.month,DS3231.date);
146 | 					DS3231.second=0;
147 | 					DS3231_Set(&DS3231);
148 | 				}
149 | 			}
150 | 			
151 | 			/*
152 | 			if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_9)==RESET) {
153 | 				if(DS3231.hour<23)
154 | 			DS3231.hour++;
155 | 				else DS3231.hour=0;
156 | 				DS3231_Set(&DS3231);
157 | 			}
158 | 			if(GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_8)==RESET) {
159 | 				if(DS3231.minute<59)
160 | 			DS3231.minute++;
161 | 				else DS3231.minute=0;
162 | 				DS3231.second=0;
163 | 				DS3231_Set(&DS3231);
164 | 			}*/
165 | 		}
166 | 		else if(STATUS==0xFF) S1201_WriteStr(0,"I2CERROR");
167 | 		else	S1201_WriteStr(0,"DS3231ER");
168 | 	}
169 | 
170 | }


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/PROGRAM-MDK/USER/i2c.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/USER/i2c.c


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/PROGRAM-MDK/USER/stm32f10x_conf.h:
--------------------------------------------------------------------------------
 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h 
 4 |   * @author  MCD Application Team
 5 |   * @version V3.4.0
 6 |   * @date    10/15/2010
 7 |   * @brief   Library configuration file.
 8 |   ******************************************************************************
 9 |   * @copy
10 |   *
11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 |   *
18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
19 |   */ 
20 | 
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F10x_CONF_H
23 | #define __STM32F10x_CONF_H
24 | 
25 | /* Includes ------------------------------------------------------------------*/
26 | /* Uncomment the line below to enable peripheral header file inclusion */
27 | /* #include "stm32f10x_adc.h" */
28 | /* #include "stm32f10x_bkp.h" */
29 | /* #include "stm32f10x_can.h" */
30 | /* #include "stm32f10x_cec.h" */
31 | /* #include "stm32f10x_crc.h" */
32 | /* #include "stm32f10x_dac.h" */
33 | /* #include "stm32f10x_dbgmcu.h" */
34 | /* #include "stm32f10x_dma.h" */
35 | /* #include "stm32f10x_exti.h" */
36 | /* #include "stm32f10x_flash.h" */
37 | /* #include "stm32f10x_fsmc.h" */
38 |    #include "stm32f10x_gpio.h"
39 | /* #include "stm32f10x_i2c.h"*/
40 | /* #include "stm32f10x_iwdg.h" */
41 | /* #include "stm32f10x_pwr.h" */
42 |    #include "stm32f10x_rcc.h"
43 | /* #include "stm32f10x_rtc.h" */
44 | /* #include "stm32f10x_sdio.h" */
45 | /* #include "stm32f10x_spi.h" */
46 | /* #include "stm32f10x_tim.h" */
47 | /* #include "stm32f10x_usart.h" */
48 | /* #include "stm32f10x_wwdg.h" */
49 |    #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
50 | 
51 | /* Exported types ------------------------------------------------------------*/
52 | /* Exported constants --------------------------------------------------------*/
53 | /* Uncomment the line below to expanse the "assert_param" macro in the 
54 |    Standard Peripheral Library drivers code */
55 | /* #define USE_FULL_ASSERT    1 */
56 | 
57 | /* Exported macro ------------------------------------------------------------*/
58 | #ifdef  USE_FULL_ASSERT
59 | 
60 | /**
61 |   * @brief  The assert_param macro is used for function's parameters check.
62 |   * @param  expr: If expr is false, it calls assert_failed function
63 |   *   which reports the name of the source file and the source
64 |   *   line number of the call that failed. 
65 |   *   If expr is true, it returns no value.
66 |   * @retval None
67 |   */
68 |   #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
69 | /* Exported functions ------------------------------------------------------- */
70 |   void assert_failed(uint8_t* file, uint32_t line);
71 | #else
72 |   #define assert_param(expr) ((void)0)
73 | #endif /* USE_FULL_ASSERT */
74 | 
75 | #endif /* __STM32F10x_CONF_H */
76 | 
77 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
78 | 


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/PROGRAM-MDK/USER/stm32f10x_it.c:
--------------------------------------------------------------------------------
  1 | /**
  2 |   ******************************************************************************
  3 |   * @file    Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c 
  4 |   * @author  MCD Application Team
  5 |   * @version V3.4.0
  6 |   * @date    10/15/2010
  7 |   * @brief   Main Interrupt Service Routines.
  8 |   *          This file provides template for all exceptions handler and 
  9 |   *          peripherals interrupt service routine.
 10 |   ******************************************************************************
 11 |   * @copy
 12 |   *
 13 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
 14 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
 15 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
 16 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
 17 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
 18 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
 19 |   *
 20 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
 21 |   */ 
 22 | 
 23 | /* Includes ------------------------------------------------------------------*/
 24 | #include "stm32f10x_it.h"
 25 | 
 26 | /** @addtogroup STM32F10x_StdPeriph_Template
 27 |   * @{
 28 |   */
 29 | 
 30 | /* Private typedef -----------------------------------------------------------*/
 31 | /* Private define ------------------------------------------------------------*/
 32 | /* Private macro -------------------------------------------------------------*/
 33 | /* Private variables ---------------------------------------------------------*/
 34 | /* Private function prototypes -----------------------------------------------*/
 35 | /* Private functions ---------------------------------------------------------*/
 36 | 
 37 | /******************************************************************************/
 38 | /*            Cortex-M3 Processor Exceptions Handlers                         */
 39 | /******************************************************************************/
 40 | 
 41 | /**
 42 |   * @brief   This function handles NMI exception.
 43 |   * @param  None
 44 |   * @retval None
 45 |   */
 46 | void NMI_Handler(void)
 47 | {
 48 | }
 49 | 
 50 | /**
 51 |   * @brief  This function handles Hard Fault exception.
 52 |   * @param  None
 53 |   * @retval None
 54 |   */
 55 | void HardFault_Handler(void)
 56 | {
 57 |   /* Go to infinite loop when Hard Fault exception occurs */
 58 |   while (1)
 59 |   {
 60 |   }
 61 | }
 62 | 
 63 | /**
 64 |   * @brief  This function handles Memory Manage exception.
 65 |   * @param  None
 66 |   * @retval None
 67 |   */
 68 | void MemManage_Handler(void)
 69 | {
 70 |   /* Go to infinite loop when Memory Manage exception occurs */
 71 |   while (1)
 72 |   {
 73 |   }
 74 | }
 75 | 
 76 | /**
 77 |   * @brief  This function handles Bus Fault exception.
 78 |   * @param  None
 79 |   * @retval None
 80 |   */
 81 | void BusFault_Handler(void)
 82 | {
 83 |   /* Go to infinite loop when Bus Fault exception occurs */
 84 |   while (1)
 85 |   {
 86 |   }
 87 | }
 88 | 
 89 | /**
 90 |   * @brief  This function handles Usage Fault exception.
 91 |   * @param  None
 92 |   * @retval None
 93 |   */
 94 | void UsageFault_Handler(void)
 95 | {
 96 |   /* Go to infinite loop when Usage Fault exception occurs */
 97 |   while (1)
 98 |   {
 99 |   }
100 | }
101 | 
102 | /**
103 |   * @brief  This function handles SVCall exception.
104 |   * @param  None
105 |   * @retval None
106 |   */
107 | void SVC_Handler(void)
108 | {
109 | }
110 | 
111 | /**
112 |   * @brief  This function handles Debug Monitor exception.
113 |   * @param  None
114 |   * @retval None
115 |   */
116 | void DebugMon_Handler(void)
117 | {
118 | }
119 | 
120 | /**
121 |   * @brief  This function handles PendSVC exception.
122 |   * @param  None
123 |   * @retval None
124 |   */
125 | void PendSV_Handler(void)
126 | {
127 | }
128 | 
129 | /**
130 |   * @brief  This function handles SysTick Handler.
131 |   * @param  None
132 |   * @retval None
133 |   */
134 | void SysTick_Handler(void)
135 | {
136 | }
137 | 
138 | /******************************************************************************/
139 | /*                 STM32F10x Peripherals Interrupt Handlers                   */
140 | /*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
141 | /*  available peripheral interrupt handler's name please refer to the startup */
142 | /*  file (startup_stm32f10x_xx.s).                                            */
143 | /******************************************************************************/
144 | 
145 | /**
146 |   * @brief  This function handles PPP interrupt request.
147 |   * @param  None
148 |   * @retval None
149 |   */
150 | /*void PPP_IRQHandler(void)
151 | {
152 | }*/
153 | 
154 | /**
155 |   * @}
156 |   */ 
157 | 
158 | 
159 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
160 | 


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/PROGRAM-MDK/USER/stm32f10x_it.h:
--------------------------------------------------------------------------------
 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h 
 4 |   * @author  MCD Application Team
 5 |   * @version V3.4.0
 6 |   * @date    10/15/2010
 7 |   * @brief   This file contains the headers of the interrupt handlers.
 8 |   ******************************************************************************
 9 |   * @copy
10 |   *
11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 |   *
18 |   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
19 |   */ 
20 | 
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F10x_IT_H
23 | #define __STM32F10x_IT_H
24 | 
25 | #ifdef __cplusplus
26 |  extern "C" {
27 | #endif 
28 | 
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "stm32f10x.h"
31 | 
32 | /* Exported types ------------------------------------------------------------*/
33 | /* Exported constants --------------------------------------------------------*/
34 | /* Exported macro ------------------------------------------------------------*/
35 | /* Exported functions ------------------------------------------------------- */
36 | 
37 | void NMI_Handler(void);
38 | void HardFault_Handler(void);
39 | void MemManage_Handler(void);
40 | void BusFault_Handler(void);
41 | void UsageFault_Handler(void);
42 | void SVC_Handler(void);
43 | void DebugMon_Handler(void);
44 | void PendSV_Handler(void);
45 | void SysTick_Handler(void);
46 | 
47 | #ifdef __cplusplus
48 | }
49 | #endif
50 | 
51 | #endif /* __STM32F10x_IT_H */
52 | 
53 | /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
54 | 


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/PROGRAM-MDK/keilkill.bat:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/keilkill.bat


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/PROGRAM-MDK/sys/HBC_MISC.c:
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 1 | #include "HBC_MISC.h"
 2 | #include "Flash.h"
 3 | #include "EEPROM_POS.h"
 4 | extern ALARM_Str ALARM1,ALARM2,ALARM3;
 5 | extern u16 wdt;
 6 | extern u8 screen_auto;
 7 | extern u8 screen_br;
 8 | void Delay(uint32_t nCount)
 9 | {
10 |   for(; nCount != 0; nCount--);
11 | }	
12 | void Storage_Get(void){
13 | 	u16 buf;
14 | 	wdt=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+WDT_ADDR);
15 | 	buf=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+SCREENSET_ADDR);
16 | 	screen_br=buf&0xFF;
17 | 	screen_auto=(buf&0x100)==0x100;
18 | 	ALARM1.ALARM_CTL=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM1_ADDR);
19 | 	ALARM1.ALARM_HOUR=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM1_ADDR+2);
20 | 	ALARM1.ALARM_MINUTE=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM1_ADDR+4);
21 | 	
22 | 	ALARM2.ALARM_CTL=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM2_ADDR);
23 | 	ALARM2.ALARM_HOUR=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM2_ADDR+2);
24 | 	ALARM2.ALARM_MINUTE=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM2_ADDR+4);
25 | 	
26 | 	ALARM3.ALARM_CTL=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM3_ADDR);
27 | 	ALARM3.ALARM_HOUR=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM3_ADDR+2);
28 | 	ALARM3.ALARM_MINUTE=FLASH_ReadHalfWord(FLASH_SAVE_ADDR+ALARM3_ADDR+4);
29 | 
30 | }
31 | 
32 | void Storage_Set(void){
33 | 	u16 buf;
34 | 	buf=screen_br;
35 | 	buf|=screen_auto<<8;
36 | 	FLASH_Erase(FLASH_SAVE_ADDR);
37 | 	FLASH_WriteData(FLASH_SAVE_ADDR+SCREENSET_ADDR,buf);
38 | 	FLASH_WriteData(FLASH_SAVE_ADDR+WDT_ADDR,wdt);
39 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM1_ADDR,ALARM1.ALARM_CTL);
40 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM1_ADDR+2,ALARM1.ALARM_HOUR);
41 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM1_ADDR+4,ALARM1.ALARM_MINUTE);
42 | 	
43 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM2_ADDR,ALARM2.ALARM_CTL);
44 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM2_ADDR+2,ALARM2.ALARM_HOUR);
45 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM2_ADDR+4,ALARM2.ALARM_MINUTE);
46 | 	
47 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM3_ADDR,ALARM3.ALARM_CTL);
48 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM3_ADDR+2,ALARM3.ALARM_HOUR);
49 | 	FLASH_WriteData(FLASH_SAVE_ADDR+ALARM3_ADDR+4,ALARM3.ALARM_MINUTE);
50 | 
51 | }
52 | 


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/PROGRAM-MDK/sys/HBC_MISC.h:
--------------------------------------------------------------------------------
 1 | #ifndef HBC_MISC
 2 | #define HBC_MISC
 3 | #include "USART.h"
 4 | 
 5 | typedef struct ALARM_Str{
 6 | 
 7 | 	u16 ALARM_CTL;
 8 | 	u8 ALARM_HOUR;
 9 | 	u8 ALARM_MINUTE;
10 | 	
11 | }ALARM_Str;
12 | 	void Delay(uint32_t nCount);
13 | 	void Storage_Get(void);
14 | 	void Storage_Set(void);
15 | #endif


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/PROGRAM-MDK/sys/stm32f10x.h:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/sys/stm32f10x.h


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/PROGRAM-MDK/sys/sys.c:
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/PROGRAM-MDK/sys/sys.h:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/sys/sys.h


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/PROGRAM-MDK/sys/system_stm32f10x.h:
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 1 | /**
 2 |   ******************************************************************************
 3 |   * @file    system_stm32f10x.h
 4 |   * @author  MCD Application Team
 5 |   * @version V3.5.0
 6 |   * @date    11-March-2011
 7 |   * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
 8 |   ******************************************************************************
 9 |   * @attention
10 |   *
11 |   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12 |   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13 |   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14 |   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15 |   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16 |   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17 |   *
18 |   * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
19 |   ******************************************************************************
20 |   */
21 | 
22 | /** @addtogroup CMSIS
23 |   * @{
24 |   */
25 | 
26 | /** @addtogroup stm32f10x_system
27 |   * @{
28 |   */  
29 |   
30 | /**
31 |   * @brief Define to prevent recursive inclusion
32 |   */
33 | #ifndef __SYSTEM_STM32F10X_H
34 | #define __SYSTEM_STM32F10X_H
35 | 
36 | #ifdef __cplusplus
37 |  extern "C" {
38 | #endif 
39 | 
40 | /** @addtogroup STM32F10x_System_Includes
41 |   * @{
42 |   */
43 | 
44 | /**
45 |   * @}
46 |   */
47 | 
48 | 
49 | /** @addtogroup STM32F10x_System_Exported_types
50 |   * @{
51 |   */
52 | 
53 | extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
54 | 
55 | /**
56 |   * @}
57 |   */
58 | 
59 | /** @addtogroup STM32F10x_System_Exported_Constants
60 |   * @{
61 |   */
62 | 
63 | /**
64 |   * @}
65 |   */
66 | 
67 | /** @addtogroup STM32F10x_System_Exported_Macros
68 |   * @{
69 |   */
70 | 
71 | /**
72 |   * @}
73 |   */
74 | 
75 | /** @addtogroup STM32F10x_System_Exported_Functions
76 |   * @{
77 |   */
78 |   
79 | extern void SystemInit(void);
80 | extern void SystemCoreClockUpdate(void);
81 | /**
82 |   * @}
83 |   */
84 | 
85 | #ifdef __cplusplus
86 | }
87 | #endif
88 | 
89 | #endif /*__SYSTEM_STM32F10X_H */
90 | 
91 | /**
92 |   * @}
93 |   */
94 |   
95 | /**
96 |   * @}
97 |   */  
98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
99 | 


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/PROGRAM-MDK/usart/usart.c:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/usart/usart.c


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/PROGRAM-MDK/usart/usart.h:
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https://raw.githubusercontent.com/hbc34/VFDclock/074789bde0850353d26fbd0f6555078a38dff70a/PROGRAM-MDK/usart/usart.h


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/README.md:
--------------------------------------------------------------------------------
 1 | # VFDclock
 2 | ## VFD桌面小闹钟
 3 | ### -HBC-@BiliBili
 4 | https://www.bilibili.com/video/BV1a7411K7gZ/ <br>
 5 | 项目耗时3个月，别忘记点赞投币收藏关注 <br>
 6 | * MCU:STM32F103CBT6
 7 | * RTC:DS3231
 8 | * 屏幕:Futaba 8-MD-06INKM
 9 | 
10 | 目前闹钟部分有BUG，后期会解决 <br>
11 | 外壳和PCB还未上传 <br>
12 | 
13 | 


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