├── .gitignore
├── Expressions.txt
├── LICENSE
├── Misc-After_20250517.txt
├── ProjectPanGu-C-no-codes.7z
├── README.md
├── User_CLA
├── CLA_shared.h
├── DCL.h
├── DCLCLA.h
├── DCL_PID_L1.asm
├── DCL_PI_L1.asm
├── F28069_PI_CLA.cla
└── mainCLA.c
├── User_acmsimcv5
├── ACMConfig.h
├── main_switch.c
├── main_switch.h
├── pi_math.h
├── pmsm_comm.c
├── pmsm_comm.h
├── pmsm_observer.c
├── pmsm_observer.h
├── shared_flux_estimator.c
├── shared_flux_estimator.h
├── simuser_bezier.c
├── simuser_bezier.h
├── simuser_cjh.c
├── simuser_cjh.h
├── simuser_wb.c
├── simuser_wb.h
├── simuser_wb_cury.c
├── simuser_wb_cury.h
├── simuser_yzz.c
├── simuser_yzz.h
├── super_config.c
├── super_config.h
├── typedef.h
└── utility.c
├── User_application
├── ACMSim.h
├── All_Definition.h
├── AppCury.c
├── AppCury.h
├── Device_define.h
├── Experiment.c
├── Experiment.h
├── ShareMemory.c
├── ShareMemory.h
├── main.c
├── new_user.c
├── new_user.h
├── tools.c
├── tools.h
├── yx2837xDeadtime_compensation.c
└── yx2837xdeadtime.h
├── User_driver
├── CONSOLE.c
├── CONSOLE.h
├── DAC_MAX5307.c
├── DAC_MAX5307.h
├── ECaptureVoltage.c
├── ECaptureVoltage.h
├── F2837xD_Ipc.c
├── F2837xD_Ipc_Driver.c
├── F2837xD_Ipc_Driver_Lite.c
├── F2837xD_Ipc_Driver_Util.c
├── i2cTalkToLDC1612.c
├── i2cTalkToLDC1612.h
├── yx2837xD_Adc.c
├── yx2837xD_EPwm.c
├── yx2837xD_EQep.c
├── yx2837xD_Gpio.c
└── yxsvgen.c
├── User_peripheral
├── F2837xD_Adc_defines.h
├── F2837xD_Can_defines.h
├── F2837xD_Cla_defines.h
├── F2837xD_Cla_typedefs.h
├── F2837xD_CodeStartBranch.asm
├── F2837xD_CpuTimers.c
├── F2837xD_DBGIER.asm
├── F2837xD_DefaultISR.c
├── F2837xD_Dma.c
├── F2837xD_Dma_defines.h
├── F2837xD_ECap.c
├── F2837xD_EPwm_defines.h
├── F2837xD_EQep_defines.h
├── F2837xD_Emif.c
├── F2837xD_Emif_defines.h
├── F2837xD_Examples.h
├── F2837xD_GlobalPrototypes.h
├── F2837xD_GlobalVariableDefs.c
├── F2837xD_Gpio_defines.h
├── F2837xD_I2c_defines.h
├── F2837xD_Ipc_defines.h
├── F2837xD_Ipc_drivers.h
├── F2837xD_PieCtrl.c
├── F2837xD_PieVect.c
├── F2837xD_Pie_defines.h
├── F2837xD_SWPrioritizedIsrLevels.h
├── F2837xD_Sci.c
├── F2837xD_Spi.c
├── F2837xD_SysCtrl.c
├── F2837xD_SysCtrl_defines.h
├── F2837xD_Systick_defines.h
├── F2837xD_TempSensorConv.c
├── F2837xD_Upp.c
├── F2837xD_Upp_defines.h
├── F2837xD_cputimervars.h
├── F2837xD_defaultisr.h
├── F2837xD_sci_io.c
├── F2837xD_sci_io.h
├── F2837xD_sdfm_drivers.c
├── F2837xD_sdfm_drivers.h
├── F2837xD_struct.c
├── F2837xD_struct.h
├── F2837xD_usDelay.asm
├── FlashAPI
│ ├── Constants
│ │ ├── Constants.h
│ │ ├── F2837xD.h
│ │ └── FMC.h
│ ├── F021.h
│ ├── F021_F2837xD_C28x.h
│ ├── Helpers.h
│ ├── Init.h
│ ├── Registers.h
│ ├── Registers_C28x.h
│ └── Types.h
├── PeripheralHeader
│ ├── F2837xD_adc.h
│ ├── F2837xD_analogsubsys.h
│ ├── F2837xD_can.h
│ ├── F2837xD_cla.h
│ ├── F2837xD_cmpss.h
│ ├── F2837xD_cputimer.h
│ ├── F2837xD_dac.h
│ ├── F2837xD_dcsm.h
│ ├── F2837xD_device.h
│ ├── F2837xD_dma.h
│ ├── F2837xD_ecap.h
│ ├── F2837xD_emif.h
│ ├── F2837xD_epwm.h
│ ├── F2837xD_epwm_xbar.h
│ ├── F2837xD_eqep.h
│ ├── F2837xD_flash.h
│ ├── F2837xD_gpio.h
│ ├── F2837xD_i2c.h
│ ├── F2837xD_input_xbar.h
│ ├── F2837xD_ipc.h
│ ├── F2837xD_mcbsp.h
│ ├── F2837xD_memconfig.h
│ ├── F2837xD_nmiintrupt.h
│ ├── F2837xD_output_xbar.h
│ ├── F2837xD_piectrl.h
│ ├── F2837xD_pievect.h
│ ├── F2837xD_sci.h
│ ├── F2837xD_sdfm.h
│ ├── F2837xD_spi.h
│ ├── F2837xD_sysctrl.h
│ ├── F2837xD_upp.h
│ ├── F2837xD_xbar.h
│ └── F2837xD_xint.h
└── f2837xbmsk.h
├── assets
├── 1721979047918-1.png
├── 1721979047918-2.png
├── 1721979047918-3.png
├── 1721979047918-4.png
├── 1721979047919-10.png
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├── 1721979047922-60.png
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├── 1721979047922-62.png
├── 1721979047922-63.png
├── 1721979047922-64.png
├── 1721979047922-65.png
├── 1721979047922-66.png
├── 1721979047922-67.png
├── 1721979047922-68.png
├── 1721979047922-69.png
├── 1721979047922-70.png
├── 1721979047922-71.png
├── 1721979047922-72.png
└── 1721979047924-83.png
├── cmd
├── 2837xD_FLASH_lnk_cpu1.cmd
├── 2837xD_RAM_lnk_cpu1.cmd
└── F2837xD_Headers_nonBIOS_cpu1.cmd
└── connections
├── Seed560V2.ccxml
└── xds200new.ccxml
/.gitignore:
--------------------------------------------------------------------------------
1 | *.code-workspace
2 | .vscode/
3 |
4 |
5 | /Debug/
6 | /Release/
7 | /lib/
8 | /targetConfigs/
9 | /NewTargetConfiguration.ccxml
10 | /.ccsproject
11 | /.cproject
12 | # /.gitignore
13 | /.project
14 | # /.settings
15 |
16 | Release/*
17 | .xdchelp
18 | config/*
19 | .launches/*
20 |
21 |
22 | *.sublime-project
23 | *.sublime-workspace
24 |
25 |
26 | *.d
27 | *.obj
28 | *.map
29 | *.out
30 | *.xml
31 | *.mk
32 | # *.ccxml
33 | *.opt
34 | # *.ccsproject
35 | # *.cproject
36 | # *.project
37 | *.prefs
38 | *.launch
39 | makefile
40 | /RAM/
41 | /FLASH/
42 | /Flash/
43 |
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/Expressions.txt:
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/Misc-After_20250517.txt:
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1 | /* 将Bezier Controller放在mainloop中运行的代码 */
2 | #if WHO_IS_USER == USER_BEZIER
3 | if( (d_sim.user.bezier_NUMBER_OF_STEPS<8000) && (d_sim.user.BOOL_BEZIER_RUN_IN_MAIN == TRUE) ){
4 | // When the button is on, then give a Sweeping Ref
5 | if (Axis_1.FLAG_ENABLE_PWM_OUTPUT && d_sim.user.bezier_Give_Sweeping_Ref_in_Interrupt){
6 | overwrite_sweeping_frequency();
7 | _user_Check_ThreeDB_Point( (*CTRL).i->varOmega*MECH_RAD_PER_SEC_2_RPM, d_sim.user.CMD_SPEED_SINE_RPM );
8 | // _user_commands(); // 用户指令
9 | }
10 | CTRL = &CTRL_1;
11 |
12 | PID_Speed->Ref = (*CTRL).i->cmd_varOmega;
13 |
14 | // Ref is given in Interrupt
15 | if (!d_sim.user.bezier_Give_Sweeping_Ref_in_Interrupt){
16 | overwrite_sweeping_frequency();
17 | /* Mark -3db points */
18 | _user_Check_ThreeDB_Point( (*CTRL).i->varOmega*MECH_RAD_PER_SEC_2_RPM, d_sim.user.CMD_SPEED_SINE_RPM );
19 | }
20 |
21 | if(d_sim.user.bool_apply_ESO_SPEED_for_SPEED_FBK == TRUE){
22 | PID_Speed->Fbk = OBSV.esoaf.xOmg * MOTOR.npp_inv ;
23 | }else{
24 | PID_Speed->Fbk = (*CTRL).i->varOmega;
25 | }
26 | PID_Speed->ErrPrev = PID_Speed->Err;
27 | PID_Speed->Err = PID_Speed->Ref - PID_Speed->Err;
28 | PID_Speed->OutLimit = BezierVL.points[BezierVL.order].y;
29 | control_output(PID_Speed, &BezierVL);
30 | if (d_sim.user.BOOL_BEZIER_ADAPTIVE_GAIN == FALSE){
31 | (*debug).set_iq_command = PID_Speed->Out;
32 | }else{
33 | (*debug).set_iq_command = control_output_adaptVersion(PID_Speed, &BezierVL_AdaptVersion);
34 | }
35 | (*debug).set_id_command = 0;
36 | }
37 | #endif
38 | // #if WHO_IS_USER == USER_QIAN
39 | // Sensor Coil
40 | // I2CA_ReadData_Channel(0);
41 | // DELAY_US(30);
42 | // I2CA_ReadData_Channel(1);
43 | // DELAY_US(30);
44 | // I2CA_ReadData_Channel(2);
45 | // DELAY_US(300);
46 | // I2CA_ReadData_Channel(3);
47 | // DELAY_US(300);
48 | // #endif
49 | // mainWhileLoopCounter1++;
50 | // mainWhileLoopCounter2=2992;
51 | // if (Motor_mode_START==1){
52 | // Axis_1.FLAG_ENABLE_PWM_OUTPUT = 1;
53 | // DSP_START_LED1
54 | // DSP_START_LED2
55 | // mainWhileLoopCounter1 = Axis_1.FLAG_ENABLE_PWM_OUTPUT +5;
56 | // }else if (Motor_mode_START==0){
57 | // Axis_1.FLAG_ENABLE_PWM_OUTPUT = 0;
58 | // DSP_STOP_LED1
59 | // DSP_STOP_LED2
60 | // mainWhileLoopCounter1 = Axis_1.FLAG_ENABLE_PWM_OUTPUT +5;
61 | // }
62 | // mainWhileLoopCounter1 = mainWhileLoopCounter2;
63 |
64 | // mainWhileLoopCounter3 += 1;
65 | // Axis_1.ID += 1;
66 | // mainWhileLoopCounter2 += 1;
67 |
68 |
69 |
70 | /* XXXXXXXXXXXXXXXX */
71 |
72 |
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/ProjectPanGu-C-no-codes.7z:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/ProjectPanGu-C-no-codes.7z
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/User_CLA/CLA_shared.h:
--------------------------------------------------------------------------------
1 | /* CLA_shared.h */
2 |
3 | #ifndef _C_CLA_SHARED_H
4 | #define _C_CLA_SHARED_H
5 |
6 | #include "DCLCLA.h"
7 | #include "F2837xD_Cla_typedefs.h"
8 |
9 | #define CLA_PROG_ENABLE 0x0001
10 | #define CLARAM0_ENABLE 0x0010
11 | #define CLARAM1_ENABLE 0x0020
12 | #define CLARAM2_ENABLE 0x0040
13 | #define CLA_RAM0CPUE 0x0100
14 | #define CLA_RAM1CPUE 0x0200
15 | #define CLA_RAM2CPUE 0x0400
16 |
17 | /* shared controller data */
18 | extern float rk;
19 | extern float yk;
20 | extern float uk;
21 | extern DCL_PI_CLA pi1;
22 |
23 | // CLA memory address symbols
24 | extern Uint16 Cla1funcsLoadStart;
25 | extern Uint16 Cla1funcsLoadEnd;
26 | extern Uint16 Cla1funcsLoadSize;
27 | extern Uint16 Cla1funcsRunStart;
28 | extern Uint16 Cla1Prog_Start;
29 |
30 | // CLA math table symbols
31 | extern Uint16 Cla1mathTablesLoadStart;
32 | extern Uint16 Cla1mathTablesLoadEnd;
33 | extern Uint16 Cla1mathTablesLoadSize;
34 | extern Uint16 Cla1mathTablesRunStart;
35 |
36 | // CLA C Tasks
37 | __interrupt void Cla1Task1();
38 | __interrupt void Cla1Task2();
39 | __interrupt void Cla1Task3();
40 | __interrupt void Cla1Task4();
41 | __interrupt void Cla1Task5();
42 | __interrupt void Cla1Task6();
43 | __interrupt void Cla1Task7();
44 | __interrupt void Cla1Task8();
45 |
46 |
47 |
48 | #endif // _C_CLA_SHARED_H
49 |
50 | /* end of file */
51 |
--------------------------------------------------------------------------------
/User_CLA/DCL_PID_L1.asm:
--------------------------------------------------------------------------------
1 | ; DCL_PID_L1.asm - Series PID controller
2 | ;
3 | ;;#############################################################################
4 | ;;!
5 | ;;! Copyright: Copyright (C) 2023 Texas Instruments Incorporated -
6 | ;;! All rights reserved not granted herein.
7 | ;;! Limited License.
8 | ;;!
9 | ;;! Texas Instruments Incorporated grants a world-wide, royalty-free,
10 | ;;! non-exclusive license under copyrights and patents it now or hereafter
11 | ;;! owns or controls to make, have made, use, import, offer to sell and sell
12 | ;;! ("Utilize") this software subject to the terms herein. With respect to the
13 | ;;! foregoing patent license, such license is granted solely to the extent that
14 | ;;! any such patent is necessary to Utilize the software alone. The patent
15 | ;;! license shall not apply to any combinations which include this software,
16 | ;;! other than combinations with devices manufactured by or for TI
17 | ;;! ("TI Devices").
18 | ;;! No hardware patent is licensed hereunder.
19 | ;;!
20 | ;;! Redistributions must preserve existing copyright notices and reproduce this
21 | ;;! license (including the above copyright notice and the disclaimer and
22 | ;;! (if applicable) source code license limitations below) in the documentation
23 | ;;! and/or other materials provided with the distribution.
24 | ;;!
25 | ;;! Redistribution and use in binary form, without modification, are permitted
26 | ;;! provided that the following conditions are met:
27 | ;;!
28 | ;;! * No reverse engineering, decompilation, or disassembly of this software is
29 | ;;! permitted with respect to any software provided in binary form.
30 | ;;! * Any redistribution and use are licensed by TI for use only
31 | ;;! with TI Devices.
32 | ;;! * Nothing shall obligate TI to provide you with source code for the
33 | ;;! software licensed and provided to you in object code.
34 | ;;!
35 | ;;! If software source code is provided to you, modification and redistribution
36 | ;;! of the source code are permitted provided that the following conditions
37 | ;;! are met:
38 | ;;!
39 | ;;! * any redistribution and use of the source code, including any resulting
40 | ;;! derivative works, are licensed by TI for use only with TI Devices.
41 | ;;! * any redistribution and use of any object code compiled from the source
42 | ;;! code and any resulting derivative works, are licensed by TI for use
43 | ;;! only with TI Devices.
44 | ;;!
45 | ;;! Neither the name of Texas Instruments Incorporated nor the names of its
46 | ;;! suppliers may be used to endorse or promote products derived from this
47 | ;;! software without specific prior written permission.
48 | ;;#############################################################################
49 |
50 |
51 | .if $defined(__TI_EABI__)
52 | .if __TI_EABI__
53 | .asg DCL_runPID_L1, _DCL_runPID_L1
54 | .endif
55 | .endif
56 |
57 | .global _DCL_runPID_L1
58 | .def __cla_DCL_runPID_L1_sp
59 |
60 | SIZEOF_LFRAME .set 10
61 | LFRAME_MR3 .set 0
62 | LFRAME_V5 .set 2
63 | LFRAME_V6 .set 4
64 | LFRAME_V7 .set 6
65 | LFRAME_LK .set 8
66 |
67 | __cla_DCL_runPID_L1_sp .usect ".scratchpad:Cla1Prog:_DCL_runPID_L1", SIZEOF_LFRAME, 0, 1
68 | .asg __cla_DCL_runPID_L1_sp, LFRAME
69 |
70 | .sect "Cla1Prog:_DCL_runPID_L1"
71 |
72 | .align 2
73 |
74 | ; C prototype:
75 | ; float DCL_runPID_L1(DCL_PID *p, float32_t rk, float32_t yk, float32_t lk)
76 | ; argument 1 = *p : PID structure address [MAR0]
77 | ; argument 2 = rk : control loop reference [MR0]
78 | ; argument 3 = yk : control loop feedback [MR1]
79 | ; argument 4 = lk : controller saturation input [MR2]
80 | ; return = uk : control effort [MR0]
81 |
82 | _DCL_runPID_L1:
83 | ; MDEBUGSTOP
84 | MSETFLG RNDF32=1 ; round to nearest even
85 | MMOV32 @LFRAME + LFRAME_MR3, MR3 ; save MR3
86 | MMOV32 @LFRAME + LFRAME_LK, MR2 ; save lk
87 |
88 | ;*** proportional path & integral prelude ***
89 | MSUBF32 MR3, MR0, MR1 ; MR3 = ek
90 | || MMOV32 MR2, *MAR0[2]++ ; MR2 = Kpa
91 | MMPYF32 MR2, MR2, MR3 ; MR2 = Kpa * ek
92 | || MMOV32 MR3, *MAR0[4]++ ; MR3 = Kia
93 | MMPYF32 MR2, MR2, MR3 ; MR2 = v7
94 | || MMOV32 MR3, *MAR0[-2]++ ; MR3 = Kra
95 | MMPYF32 MR3, MR0, MR3 ; MR3 = Kra * rk
96 | || MMOV32 @LFRAME + LFRAME_V7, MR2 ; save v7
97 | MSUBF32 MR3, MR3, MR1 ; MR3 = v5
98 | || MMOV32 MR2, *MAR0[4]++ ; MR2 = Kda
99 |
100 | ;*** derivative path ***
101 | MMPYF32 MR0, MR1, MR2 ; MR0 = Kda * yk
102 | || MMOV32 @LFRAME + LFRAME_V5, MR3 ; save v5
103 | MMOV32 MR3, *MAR0[6]++ ; MR3 = c1a
104 | MMPYF32 MR0, MR0, MR3 ; MR0 = v1
105 | || MMOV32 MR1, *MAR0[-2]++ ; MR1 = d3
106 | MSUBF32 MR2, MR0, MR1 ; MR2 = v1 - d3
107 | || MMOV32 MR3, *MAR0 ; MR3 = d2
108 | MMOV32 *MAR0[-2]++, MR0 ; save d2 = v1
109 | MSUBF32 MR2, MR2, MR3 ; MR2 = v4
110 | || MMOV32 MR1, *MAR0[4]++ ; MR1 = c2a
111 | MMPYF32 MR0, MR1, MR2 ; MR0 = c2a * v4
112 | || MMOV32 MR3, @LFRAME + LFRAME_V5 ; MR3 = v5
113 | MSUBF32 MR2, MR3, MR2 ; MR2 = v5 - v4
114 | || MMOV32 *MAR0[-14]++, MR0 ; save d3
115 |
116 | ;*** integral path ***
117 | MMOV32 MR3, *MAR0[18]++ ; MR3 = Kpa
118 | MMPYF32 MR0, MR2, MR3 ; MR0 = v6
119 | || MMOV32 MR1, *MAR0[-2]++ ; MR1 = i14
120 | MMOV32 @LFRAME + LFRAME_V6, MR0 ; save v6
121 | MMOV32 MR2, @LFRAME + LFRAME_V7 ; MR2 = v7
122 | MMPYF32 MR0, MR1, MR2 ; MR0 = i14 * v7
123 | || MMOV32 MR3, *MAR0 ; MR3 = i10
124 | MADDF32 MR1, MR0, MR3 ; MR1 = v8
125 | || MMOV32 MR2, @LFRAME + LFRAME_V6 ; MR2 = v6
126 | MADDF32 MR0, MR1, MR2 ; MR0 = v9
127 | || MMOV32 *MAR0[4]++, MR1 ; save i10
128 |
129 | ;*** saturation ***
130 | MMOVF32 MR2, #0.0f ; MR2 = 0.0f
131 | MMOVF32 MR3, #1.0f ; MR3 = 1.0f
132 | MMOV32 MR1, *MAR0[2]++ ; MR1 = Umaxa
133 | MMINF32 MR0, MR1 ; MR0 = sat+
134 | MMOV32 MR3, MR2, GT ; MR3 = v12
135 | MMOV32 MR1, *MAR0[-4]++ ; MR1 = Umina
136 | MMAXF32 MR0, MR1 ; MR0 = sat-
137 | MMOV32 MR3, MR2, LT ; MR3 = v12
138 | MRCNDD UNC ; return call
139 | MMOV32 MR1, @LFRAME + LFRAME_LK ; MR1 = lk
140 | MMPYF32 MR2, MR1, MR3 ; MR2 = v12 * lk
141 | || MMOV32 MR3, @LFRAME + LFRAME_MR3 ; restore MR3
142 | MMOV32 *MAR0, MR2 ; save i14
143 |
144 | .unasg LFRAME
145 |
146 | ; end of file
147 |
--------------------------------------------------------------------------------
/User_CLA/DCL_PI_L1.asm:
--------------------------------------------------------------------------------
1 | ; DCL_PI_L1.asm - Series PI controller
2 | ;
3 | ;;#############################################################################
4 | ;;!
5 | ;;! Copyright: Copyright (C) 2023 Texas Instruments Incorporated -
6 | ;;! All rights reserved not granted herein.
7 | ;;! Limited License.
8 | ;;!
9 | ;;! Texas Instruments Incorporated grants a world-wide, royalty-free,
10 | ;;! non-exclusive license under copyrights and patents it now or hereafter
11 | ;;! owns or controls to make, have made, use, import, offer to sell and sell
12 | ;;! ("Utilize") this software subject to the terms herein. With respect to the
13 | ;;! foregoing patent license, such license is granted solely to the extent that
14 | ;;! any such patent is necessary to Utilize the software alone. The patent
15 | ;;! license shall not apply to any combinations which include this software,
16 | ;;! other than combinations with devices manufactured by or for TI
17 | ;;! ("TI Devices").
18 | ;;! No hardware patent is licensed hereunder.
19 | ;;!
20 | ;;! Redistributions must preserve existing copyright notices and reproduce this
21 | ;;! license (including the above copyright notice and the disclaimer and
22 | ;;! (if applicable) source code license limitations below) in the documentation
23 | ;;! and/or other materials provided with the distribution.
24 | ;;!
25 | ;;! Redistribution and use in binary form, without modification, are permitted
26 | ;;! provided that the following conditions are met:
27 | ;;!
28 | ;;! * No reverse engineering, decompilation, or disassembly of this software is
29 | ;;! permitted with respect to any software provided in binary form.
30 | ;;! * Any redistribution and use are licensed by TI for use only
31 | ;;! with TI Devices.
32 | ;;! * Nothing shall obligate TI to provide you with source code for the
33 | ;;! software licensed and provided to you in object code.
34 | ;;!
35 | ;;! If software source code is provided to you, modification and redistribution
36 | ;;! of the source code are permitted provided that the following conditions
37 | ;;! are met:
38 | ;;!
39 | ;;! * any redistribution and use of the source code, including any resulting
40 | ;;! derivative works, are licensed by TI for use only with TI Devices.
41 | ;;! * any redistribution and use of any object code compiled from the source
42 | ;;! code and any resulting derivative works, are licensed by TI for use
43 | ;;! only with TI Devices.
44 | ;;!
45 | ;;! Neither the name of Texas Instruments Incorporated nor the names of its
46 | ;;! suppliers may be used to endorse or promote products derived from this
47 | ;;! software without specific prior written permission.
48 | ;;#############################################################################
49 |
50 |
51 | .if $defined(__TI_EABI__)
52 | .if __TI_EABI__
53 | .asg DCL_runPI_L1, _DCL_runPI_L1
54 | .endif
55 | .endif
56 |
57 | .global _DCL_runPI_L1
58 | .def __cla_DCL_runPI_L1_sp
59 |
60 | SIZEOF_LFRAME .set 5
61 | LFRAME_MR3 .set 0
62 |
63 | __cla_DCL_runPI_L1_sp .usect ".scratchpad:Cla1Prog:_DCL_runPI_L1", SIZEOF_LFRAME, 0, 1
64 | .asg __cla_DCL_runPI_L1_sp, LFRAME
65 |
66 | .sect "Cla1Prog:_DCL_runPI_L1"
67 |
68 | .align 2
69 |
70 | ; C prototype:
71 | ; float DCL_runPI_L1(DCL_PI_CLA *p, float32_t rk, float32_t yk)
72 | ; argument 1 = *p : 32-bit PI structure address [MAR0]
73 | ; argument 2 = rk : 32-bit floating-point reference [MR0]
74 | ; argument 3 = yk : 32-bit floating-point feedback [MR1]
75 | ; return = uk : 32-bit floating-point [MR0]
76 |
77 | _DCL_runPI_L1:
78 | ; MDEBUGSTOP
79 | MSETFLG RNDF32=1 ; round to nearest even
80 | MMOV32 @LFRAME + LFRAME_MR3, MR3 ; save MR3
81 |
82 | ;*** servo error ***
83 | MSUBF32 MR2, MR0, MR1 ; MR2 = v1
84 |
85 | ;*** proportional path ***
86 | MMOV32 MR1, *MAR0[2]++ ; MR1 = Kpa
87 | MMPYF32 MR2, MR1, MR2 ; MR2 = v2
88 |
89 | ;*** integral path ***
90 | || MMOV32 MR1, *MAR0[8]++ ; MR1 = Kia
91 | MMPYF32 MR0, MR2, MR1 ; MR0 = v3
92 | || MMOV32 MR1, *MAR0[-6]++ ; MR1 = i6
93 | MMPYF32 MR0, MR0, MR1 ; MR0 = v8
94 | || MMOV32 MR1, *MAR0 ; MR1 = i10
95 | MADDF32 MR0, MR0, MR1 ; MR0 = v4
96 | MMOV32 *MAR0[2]++, MR0 ; save i10
97 | MADDF32 MR0, MR0, MR2 ; MR0 = v5
98 |
99 | ;*** output saturation ***
100 | MMOVF32 MR2, #0.0f ; MR2 = 0.0f
101 | MMOVF32 MR3, #1.0f ; MR3 = 1.0f
102 | MMOV32 MR1, *MAR0[2]++ ; MR1 = Umaxa
103 | MMINF32 MR0, MR1 ; MR0 = sat+
104 | MMOV32 MR3, MR2, GT ; MR3 = v6
105 | MMOV32 MR1, *MAR0[2]++ ; MR1 = Umina
106 | MMAXF32 MR0, MR1 ; MR0 = sat-
107 | MRCNDD UNC ; return call
108 | MMOV32 MR3, MR2, LT ; MR3 = v6
109 | MMOV32 *MAR0, MR3 ; save i6
110 | MMOV32 MR3, @LFRAME + LFRAME_MR3 ; restore MR3
111 |
112 | .unasg LFRAME
113 |
114 | ; end of file
115 |
--------------------------------------------------------------------------------
/User_CLA/F28069_PI_CLA.cla:
--------------------------------------------------------------------------------
1 | /* control_F28069_CLA.cla
2 | *
3 | * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 | * ALL RIGHTS RESERVED
5 | *
6 | */
7 |
8 | #include "CLA_shared.h"
9 | #include "F2837xD_Cla_typedefs.h"
10 |
11 |
12 | __interrupt void Cla1Task1 ( void )
13 | {
14 |
15 | }
16 |
17 | __interrupt void Cla1Task2 ( void )
18 | {
19 |
20 | }
21 |
22 | // task 3 contains the PI controller
23 | __interrupt void Cla1Task3 ( void )
24 | {
25 | // __mdebugstop();
26 |
27 | // run the PI controller
28 | uk = DCL_runPI_L1(&pi1, rk, yk);
29 |
30 | __mnop();
31 | __mnop();
32 | __mnop();
33 | }
34 |
35 | __interrupt void Cla1Task4 ( void )
36 | {
37 |
38 | }
39 |
40 | __interrupt void Cla1Task5 ( void )
41 | {
42 |
43 | }
44 |
45 | __interrupt void Cla1Task6 ( void )
46 | {
47 |
48 | }
49 |
50 | __interrupt void Cla1Task7 ( void )
51 | {
52 |
53 | }
54 |
55 | __interrupt void Cla1Task8 ( void )
56 | {
57 |
58 | }
59 |
60 | // end of file
61 |
62 |
--------------------------------------------------------------------------------
/User_CLA/mainCLA.c:
--------------------------------------------------------------------------------
1 | #include
2 |
3 | // function prototypes
4 | //interrupt void control_Isr(void);
5 |
6 | // global variables
7 | long IdleLoopCount = 0;
8 | long IsrCount = 0;
9 | float Duty;
10 |
11 | // shared variables
12 | #pragma DATA_SECTION(rk, "CpuToCla1MsgRAM")
13 | #pragma DATA_SECTION(yk, "CpuToCla1MsgRAM")
14 | #pragma DATA_SECTION(uk, "Cla1ToCpuMsgRAM")
15 | float rk = 0.25f;
16 | float yk;
17 | float uk;
18 |
19 | #pragma DATA_SECTION(pi1, "Cla1DataRam1")
20 | DCL_PI_CLA pi1 = PI_CLA_DEFAULTS;
21 |
22 |
--------------------------------------------------------------------------------
/User_acmsimcv5/ACMConfig.h:
--------------------------------------------------------------------------------
1 | #ifndef ACMCONFIG_H
2 | #define ACMCONFIG_H
3 |
4 | // // 参数误差
5 | // #define MISMATCH_R 100.0
6 | // #define MISMATCH_RREQ 100.0
7 | // #define MISMATCH_LD 100.0
8 | // #define MISMATCH_LQ 100.0
9 | // #define MISMATCH_KE 100.0
10 | // #define MISMATCH_LMU 100.0
11 |
12 |
13 | // // 磁链给定
14 | // #define IM_MAGNETIZING_INDUCTANCE (d_sim.init.Ld - d_sim.init.Lq)
15 | // #define IM_FLUX_COMMAND_DC_PART d_sim.init.KE // 1.3593784874408608
16 | // #define IM_FLUX_COMMAND_SINE_PART 0.0
17 | // #define IM_FLUX_COMMAND_SINE_HERZ 10
18 |
19 | // #if MACHINE_TYPE % 10 == 2
20 | // #define CORRECTION_4_SHARED_FLUX_EST INIT_KE
21 | // #define U_MOTOR_KE INIT_KE
22 | // #else
23 | // #define CORRECTION_4_SHARED_FLUX_EST IM_FLUX_COMMAND_DC_PART
24 | // #define U_MOTOR_R IM_STAOTR_RESISTANCE // typo!
25 | // #define U_MOTOR_RREQ IM_ROTOR_RESISTANCE
26 | // #endif
27 |
28 | /* 经常要修改的 */
29 | // #define INVERTER_NONLINEARITY_COMPENSATION_INIT 0 // 5(9月1日及以前峣杰实验一直用的5) // 4 // 1:ParkSul12, 2:Sigmoid, 3:LUT(Obsolete), 4:LUT(by index), 5 Slessinv-a2a3Model
30 | // #define INVERTER_NONLINEARITY 0 // 4 // 1:ModelSul96, 2:ModelExpSigmoid, 3: ModelExpLUT, 4:LUT(by index)
31 | // #define SENSORLESS_CONTROL FALSE
32 | // #define SENSORLESS_CONTROL_HFSI FALSE
33 |
34 | /* ParkSul2012 梯形波 */
35 | // #define GAIN_THETA_TRAPEZOIDAL (40) //(500) // 20
36 |
37 | // /* 电机类型 */ //(TODO:饱和模型里面用的还是 IM.rr 而不是 IM.rreq)
38 | // #define INDUCTION_MACHINE_CLASSIC_MODEL 1
39 | // #define INDUCTION_MACHINE_FLUX_ONLY_MODEL 11
40 | // #define PM_SYNCHRONOUS_MACHINE 2
41 | // #define MACHINE_TYPE 1
42 |
43 |
44 | // #if APPLY_WCTUNER
45 | // #define CURRENT_KP (0.3063) // (1.19) // (0.6) // (0.84) // (0.84) // (0.84)
46 | // #define CURRENT_KI (231.578947368421) // (194.74) // (194.74) // (194.74) // (194.74) // (194.74)
47 | // #define SPEED_KP (1.3099) // (0.19) // (2.59) // (0.81) // (0.41) // (0.36)
48 | // #define SPEED_KI (763.5600) // (3.93) // (13.96) // (11.00) // (2.75) // (19.55)
49 | // #define SPEED_KFB (2.36)
50 | // #else
51 | // #define CURRENT_KP (0.9550441666912972) // (1.19) // (0.6) // (0.84) // (0.84) // (0.84)
52 | // #define CURRENT_KI (231.578947368421) // (194.74) // (194.74) // (194.74) // (194.74) // (194.74)
53 | // #define SPEED_KP (0.5896379954298365) // (0.19) // (2.59) // (0.81) // (0.41) // (0.36)
54 | // #define SPEED_KI (2.0106192982974678) // (3.93) // (13.96) // (11.00) // (2.75) // (19.55)
55 | // #define SPEED_KFB (0)
56 | // #endif
57 |
58 |
59 |
60 | // /* 指令类型 */
61 | // #define EXCITATION_POSITION 0
62 | // #define EXCITATION_SWEEP_FREQUENCY 2
63 | // #define EXCITATION_VELOCITY 1
64 | // #define EXCITATION_TYPE (1)
65 |
66 | // /* Sweep Frequency */
67 | // #define SWEEP_FREQ_MAX_FREQ 200
68 | // #define SWEEP_FREQ_INIT_FREQ 2
69 | // #define SWEEP_FREQ_VELOCITY_AMPL 500
70 | // #define SWEEP_FREQ_CURRENT_AMPL 1
71 | // #define SWEEP_FREQ_C2V FALSE
72 | // #define SWEEP_FREQ_C2C FALSE
73 |
74 |
75 | #endif
76 |
--------------------------------------------------------------------------------
/User_acmsimcv5/pi_math.h:
--------------------------------------------------------------------------------
1 | /* =================================================================================
2 | File name: PI.H
3 | ===================================================================================*/
4 |
5 |
6 | #ifndef __PI_H__
7 | #define __PI_H__
8 |
9 | #include "typedef.h"
10 |
11 |
12 | typedef struct { REAL Ref; // Input: reference set-point
13 | REAL Fbk; // Input: feedback
14 | REAL Out; // Output: controller output
15 | REAL Kp; // Parameter: proportional loop gain
16 | REAL Ki; // Parameter: integral gain
17 | REAL Umax; // Parameter: upper saturation limit
18 | REAL Umin; // Parameter: lower saturation limit
19 | REAL up; // Data: proportional term
20 | REAL ui; // Data: integral term
21 | REAL v1; // Data: pre-saturated controller output
22 | REAL i1; // Data: integrator storage: ui(k-1)
23 | REAL w1; // Data: saturation record: [u(k-1) - v(k-1)]
24 | } PI_CONTROLLER;
25 |
26 |
27 | /*-----------------------------------------------------------------------------
28 | Default initalisation values for the PI_GRANDO objects
29 | -----------------------------------------------------------------------------*/
30 |
31 | #define PI_CONTROLLER_DEFAULTS { \
32 | 0, \
33 | 0, \
34 | 0, \
35 | 1.0, \
36 | 0.0, \
37 | 1.0, \
38 | -1.0, \
39 | 0.0, \
40 | 0.0, \
41 | 0.0, \
42 | 0.0, \
43 | 1.0 \
44 | }
45 |
46 |
47 | /* 陈艺铭找到的德州仪器官方PI */
48 | #define USE_LAOMING_PI FALSE /* change PI algorithm*/
49 | extern PI_CONTROLLER texas_pi_id;
50 | extern PI_CONTROLLER texas_pi_iq;
51 | extern PI_CONTROLLER texas_pi_spd;
52 |
53 | /*------------------------------------------------------------------------------
54 | PI_GRANDO Macro Definition
55 | ------------------------------------------------------------------------------*/
56 | #define _IQsat(A, Pos, Neg) (fmaxf(((fminf((A),(Pos)))),(Neg)))
57 | #define PI_MACRO(v) \
58 | \
59 | /* proportional term */ \
60 | v.up = (v.Kp * (v.Ref - v.Fbk)); \
61 | \
62 | /* integral term */ \
63 | v.ui = (v.Out == v.v1)?( (v.Ki * v.up)+ v.i1) : v.i1; \
64 | v.i1 = v.ui; \
65 | \
66 | /* control output */ \
67 | v.v1 = v.up + v.ui; \
68 | v.Out= _IQsat(v.v1, v.Umax, v.Umin); \
69 | //v.w1 = (v.Out == v.v1) ? _IQ(1.0) : _IQ(0.0); \
70 |
71 | // ***********************************************************************************
72 | // This macro works with angles as inputs, hence error is rolled within -pi to +pi
73 | // ***********************************************************************************
74 | #define PI_POS_MACRO(v) \
75 | /* proportional term */ \
76 | v.up = v.Ref - v.Fbk; \
77 | if (v.up >= (0.5)) \
78 | v.up -= (1.0); /* roll in the error */ \
79 | else if (v.up <= (-0.5)) \
80 | v.up += (1.0); /* roll in the error */ \
81 | \
82 | /* integral term */ \
83 | v.up = (v.Kp * v.up); \
84 | v.ui = (v.Out == v.v1)?((v.Ki * v.up)+ v.i1) : v.i1; \
85 | v.i1 = v.ui; \
86 | \
87 | /* control output */ \
88 | v.v1 = v.up + v.ui; \
89 | v.Out= _IQsat(v.v1, v.Umax, v.Umin); \
90 | //v.w1 = (v.Out == v.v1) ? _IQ(1.0) : _IQ(0.0); \
91 |
92 |
93 | #endif // __PI_H__
94 |
95 |
--------------------------------------------------------------------------------
/User_acmsimcv5/pmsm_comm.h:
--------------------------------------------------------------------------------
1 | #ifndef PMSM_COMMISSIONING_H
2 | #define PMSM_COMMISSIONING_H
3 |
4 | #if ENABLE_COMMISSIONING || WHO_IS_USER == USER_WB
5 |
6 | #define COMM_IV_SIZE_R1 200 // 300
7 | #define COMM_IV_SIZE_L1 30
8 | struct CommissioningDataStruct{
9 |
10 | int bool_comm_status;
11 |
12 | REAL timebase;
13 | int32 counterEntered;
14 | int16 i;
15 |
16 | REAL R;
17 | REAL L;
18 | REAL R3;
19 | REAL L3;
20 | REAL KE;
21 | REAL Js; // shaft inertia
22 |
23 | // R
24 | REAL current_command;
25 | REAL current_sum;
26 | REAL voltage_sum;
27 | int32 counterSS;
28 | int16 bool_collecting;
29 | REAL i_phase_data_R1[COMM_IV_SIZE_R1];
30 | REAL v_phase_data_R1[COMM_IV_SIZE_R1];
31 | REAL i_data_L1[COMM_IV_SIZE_L1];
32 | REAL t_data_L1[COMM_IV_SIZE_L1];
33 | REAL inverter_voltage_drop;
34 |
35 | // L
36 | REAL last_voltage_command;
37 | REAL id_prev;
38 | REAL iq_prev;
39 |
40 | // Js
41 | int16 number_of_repeats_Js;
42 | };
43 | extern struct CommissioningDataStruct COMM;
44 | extern int16 bool_single_phase_excitation;
45 |
46 | void COMM_PI_tuning(REAL LL, REAL RR, REAL BW_current, REAL delta, REAL JJ, REAL KE, REAL npp);
47 |
48 | void init_COMM();
49 | void COMM_resistanceId(REAL id_fb, REAL iq_fb);
50 |
51 | void COMM_inductanceId(REAL id_fb, REAL iq_fb);
52 | void COMM_inductanceId_ver2(REAL id_fb, REAL iq_fb);
53 | void COMM_inductanceId_ver3(REAL id_fb, REAL iq_fb);
54 |
55 | void COMM_PMFluxId(REAL id_fb, REAL iq_fb, REAL omg_elec_fb);
56 |
57 | void COMM_inertiaId(REAL id_fb, REAL iq_fb, REAL cosPark, REAL sinPark, REAL omg_elec_fb);
58 | void COMM_end(REAL id_fb, REAL iq_fb);
59 |
60 | // Main Procedure
61 | #define USING_OLD_COMM FALSE
62 | void StepByStepCommissioning();
63 | void StepByStepCommissioning_NEW_WB();
64 | void StepbyStepCommissioning_OLD();
65 |
66 | #endif
67 | #endif
68 |
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/User_acmsimcv5/pmsm_observer.c:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_acmsimcv5/pmsm_observer.c
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/User_acmsimcv5/pmsm_observer.h:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_acmsimcv5/pmsm_observer.h
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/User_acmsimcv5/shared_flux_estimator.c:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_acmsimcv5/shared_flux_estimator.c
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/User_acmsimcv5/shared_flux_estimator.h:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_acmsimcv5/shared_flux_estimator.h
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/User_acmsimcv5/simuser_wb_cury.h:
--------------------------------------------------------------------------------
1 | #ifndef SIMUSER_WB_CURY_H
2 | #define SIMUSER_WB_CURY_H
3 |
4 | #include "ACMSim.h"
5 |
6 | /*
7 | Cury Code Copied from Pangu-C: AppCury.h, AppCury.h, tool.c
8 | rearranged and modified by WuBo
9 | */
10 | #if WHO_IS_USER == USER_CURY
11 |
12 | // Files needed to be put in the Device_define.h ???
13 | // void EUREKA_GPIO_SETUP(); 这个函数是最开始的GPIO定义,在原始代码中存在,暂时不要动
14 |
15 | // tools
16 | extern REAL iq_command_from_PC;
17 | //当初这两个变量是认真的吗,我学完EE270是不是就知道这些在干嘛了
18 | #define ANGLE_SHIFT_FOR_FIRST_INVERTER 0.0 // Torque Inverter
19 | #define ANGLE_SHIFT_FOR_SECOND_INVERTER 0.0 // Suspension Inverter
20 |
21 | // void handle_interrupts();
22 | // void main_loop();
23 | // void DeadtimeCompensation(REAL Current_U, REAL Current_V, REAL Current_W, REAL CMPA[], REAL CMPA_DBC[]);
24 | // void test_pwm_output();
25 |
26 | // void voltage_commands_to_pwm();
27 | // void voltage_measurement_based_on_eCAP();
28 | // void measurement_position_count_axisCnt0();
29 | // void measurement_position_count_axisCnt1();
30 | // void measurement_enc();
31 | // void measurement_current_axisCnt0();
32 | // void measurement_current_axisCnt1();
33 |
34 |
35 |
36 | /* Step 1 : Cury 运动轨迹生成*/
37 | #define BEZIER_ORDER 4
38 | #define BEZIER_TRACE_SIZE 100
39 | void run_iecon_main(Uint64 t);
40 | void reset_position();
41 | void linear_controller(REAL t);
42 | void sinusoidal_controller(REAL t);
43 | void calc_theta_from_height(REAL height);
44 | REAL hip_shank_angle_to_can(REAL angle, int type);
45 |
46 | /* Step 2 : CAN编码器到实物位置的线性插值映射 */
47 | #define CAN_QMAX 131072 // 功望编码器的最大值
48 | #define CAN_QMAX_INV 7.62939453125e-06 // 功望编码器的最大值的倒数
49 | #define HIP_MIN 0.2269
50 | #define HIP_MAX 0.5585
51 | #define SHANK_MIN 0.4538
52 | #define SHANK_MAX 1.1170
53 | #define CAN01_MIN 48000
54 | #define CAN01_MAX 41500
55 | #define CAN03_MIN 58000
56 | #define CAN03_MAX 46000
57 |
58 | /* Step 3 : 位置环,纯控制算法代码 */
59 | #define HIP_TYPE 0
60 | #define SHANK_TYPE 1
61 | void Cury_call_position_loop_controller();
62 | void control_two_motor_position();
63 | void control_single_motor_position();
64 | void run_shank_loop();
65 | void run_hip_loop();
66 | void run_both_loop();
67 | void run_impedance_control();
68 |
69 | #define NO_POSITION_CONTROL 0
70 | #define TWOMOTOR_POSITION_CONTROL 1
71 | #define SINGLE_POSITION_CONTROL 2
72 | #define SHANK_LOOP_RUN 3
73 | #define HIP_LOOP_RUN 4
74 | #define BOTH_LOOP_RUN 5
75 | #define IMPEDANCE_CONTROL 6
76 |
77 | /* Cury Controller from old files*/
78 | #define INIT_THETA1 0.0
79 | #define INIT_THETA2 0.0
80 | typedef struct{
81 | int CONTROLLER_TYPE;
82 | REAL IECON_HEIGHT;
83 | REAL L1;
84 | REAL L2;
85 | REAL theta1, theta2; // unit [rad] theta1: hip ; theta2: knee
86 | REAL dot_theta1, dot_theta2;
87 | REAL T; // unit [s]
88 | REAL T_inv; // unit [Hz]
89 | REAL height_limit[2]; // unit [m]
90 | REAL C[BEZIER_ORDER][2];
91 | int order;
92 | REAL bezier_trace[BEZIER_TRACE_SIZE + 1][2];
93 | REAL legBouncingSpeed;
94 | REAL hipBouncingFreq;
95 | REAL legBouncingIq;
96 | REAL hipBouncingIq;
97 | BOOL bool_TEMP;
98 | } CURYCONTROLLER;
99 | extern CURYCONTROLLER cury_controller;
100 |
101 |
102 | #endif
103 | #endif // SIMUSER_WB_CURY_H
104 |
105 |
106 |
--------------------------------------------------------------------------------
/User_acmsimcv5/super_config.c:
--------------------------------------------------------------------------------
1 | // This c file is automatically generated. Any modification to this file will get lost.
2 | #include "super_config.h"
3 | #include
4 |
5 | void init_d_sim() {
6 | d_sim.init.npp = 26;
7 | d_sim.init.IN = 8.0;
8 | d_sim.init.R = 0.256955624;
9 | d_sim.init.Ld = 0.000173;
10 | d_sim.init.Lq = 0.00020300000000000003;
11 | d_sim.init.KE = 0.0193;
12 | d_sim.init.Rreq = 0.0;
13 | d_sim.init.Js = 0.000364;
14 | d_sim.init.Vdc = 48;
15 |
16 | d_sim.sim.INVERTER_NONLINEARITY = 0;
17 | d_sim.sim.CLTS = 0.0001;
18 | d_sim.sim.NUMBER_OF_STEPS = 2000;
19 | d_sim.sim.MACHINE_SIMULATIONs_PER_SAMPLING_PERIOD = 1;
20 |
21 | d_sim.FOC.delta = 8.5;
22 | d_sim.FOC.CLBW_HZ = 800;
23 | d_sim.FOC.bool_apply_decoupling_voltages_to_current_regulation = FALSE;
24 | d_sim.FOC.VL_EXE_PER_CL_EXE = 1;
25 |
26 | d_sim.CL.SERIES_KP_D_AXIS = 0.8695928465136548;
27 | d_sim.CL.SERIES_KI_D_AXIS = 1485.2926242774565;
28 | d_sim.CL.SERIES_KP_Q_AXIS = 1.0203892938859649;
29 | d_sim.CL.SERIES_KI_Q_AXIS = 1265.791251231527;
30 | d_sim.CL.LIMIT_DC_BUS_UTILIZATION = 0.96;
31 |
32 | d_sim.VL.SERIES_KP = 0.285976533335005;
33 | d_sim.VL.SERIES_KI = 69.57160201721341;
34 | d_sim.VL.LIMIT_OVERLOAD_FACTOR = 0.25;
35 |
36 | d_sim.user.verbose = TRUE;
37 | d_sim.user.who_is_user = 2023231051;
38 | d_sim.user.mode_select_synchronous_motor = 4;
39 | d_sim.user.mode_select_induction_motor = 32;
40 | d_sim.user.INVERTER_NONLINEARITY_COMPENSATION_METHOD = FALSE;
41 | d_sim.user.Select_exp_operation = 0.0;
42 | d_sim.user.set_rpm_speed_command = 50;
43 | d_sim.user.set_id_command = 2.0;
44 | d_sim.user.set_iq_command = 2.0;
45 | d_sim.user.BOOL_INIT_MY_VARIABLES = FALSE;
46 | d_sim.user.BOOL_1996_SUL_ON = TRUE;
47 | d_sim.user.zeta = 1.0;
48 | d_sim.user.omega_n = 800;
49 | d_sim.user.max_CLBW_PER_min_CLBW = 0.9;
50 | d_sim.user.VL_FEEDBACK_KFB = 0;
51 | d_sim.user.Current_Loop_Ki_scale = 1.0;
52 | d_sim.user.bool_Null_D_Control = TRUE;
53 | d_sim.user.bool_apply_WC_tunner_for_speed_loop = FALSE;
54 | d_sim.user.bool_enable_Harnefors_back_calculation = FALSE;
55 | d_sim.user.Check_Harnerfors_1998_On = -1.0;
56 | d_sim.user.Position_Loop_Kp = 10.0;
57 | d_sim.user.BOOL_WUBO_POS_CMD_TEST = TRUE;
58 | d_sim.user.set_deg_position_command = 180;
59 | d_sim.user.Position_cmd_sine_frequency = 1;
60 | d_sim.user.Position_Loop_Output_Limit = 200;
61 | d_sim.user.Position_Loop_Ref_prev = 0.0;
62 | d_sim.user.Position_Loop_Ref_Diff = 0.0;
63 | d_sim.user.Position_Loop_Ref_Diff_TEST = 0.0;
64 | d_sim.user.bool_Compensation_byPosDiff = TRUE;
65 | d_sim.user.IMP_Spring_Factor = 0.5;
66 | d_sim.user.IMP_Damping_Factor = 0.1;
67 | d_sim.user.bool_apply_external_Force_to_Position_Loop = FALSE;
68 | d_sim.user.positionLoopType = 2;
69 | d_sim.user.tracking_trace_Type = -1;
70 | d_sim.user.target_position_cnt_shank = 58000;
71 | d_sim.user.target_position_cnt_hip = 48000;
72 | d_sim.user.bool_apply_Rohr_1991_Controller = FALSE;
73 | d_sim.user.bool_apply_Rohr_1991_Controller_with_Forgetting_Factor = FALSE;
74 | d_sim.user.Rohr_K_min = 0.0;
75 | d_sim.user.Rohr_K_max = 2.5;
76 | d_sim.user.Rohr_gamma = 1.0;
77 | d_sim.user.Rohr_sigma = 2.0;
78 | d_sim.user.Rohr_K_integral = 1000.0;
79 | d_sim.user.bool_ESO_SPEED_ON = TRUE;
80 | d_sim.user.bool_apply_ESO_SPEED_for_SPEED_FBK = TRUE;
81 | d_sim.user.CAREFUL_ESOAF_OMEGA_OBSERVER = 4000;
82 | d_sim.user.bool_apply_sweeping_frequency_excitation = FALSE;
83 | d_sim.user.bool_sweeping_frequency_for_speed_loop = FALSE;
84 | d_sim.user.bool_speed_sweeping_with_Load = FALSE;
85 | d_sim.user.bool_sweeping_frequency_for_current_loop_iD = FALSE;
86 | d_sim.user.bool_sweeping_frequency_for_Rejection_Load = FALSE;
87 | d_sim.user.CMD_CURRENT_SINE_AMPERE = 1.0;
88 | d_sim.user.CMD_SPEED_SINE_RPM = 100;
89 | d_sim.user.CMD_SPEED_SINE_HZ = 1;
90 | d_sim.user.CMD_SPEED_SINE_STEP_SIZE = 1;
91 | d_sim.user.CMD_SPEED_SINE_LAST_END_TIME = 0.0;
92 | d_sim.user.CMD_SPEED_SINE_END_TIME = 1e-4;
93 | d_sim.user.CMD_SPEED_SINE_HZ_CEILING = 400;
94 | d_sim.user.timebase_for_Sweeping = 0.0;
95 | d_sim.user.Mark_Sweeping_Freq_ThreeDB_Point = 0.0;
96 | d_sim.user.Mark_Counter = 0.0;
97 | d_sim.user.Set_SpeedLoop_KI_as_Zero = FALSE;
98 | d_sim.user.Stable_Time_for_Sweeping = 1.5;
99 | d_sim.user.flag_clear_timebase_once = FALSE;
100 | d_sim.user.bool_Parameter_Mismatch_test = FALSE;
101 | d_sim.user.ParaMis_percent_max = 4;
102 | d_sim.user.ParaMis_percent_min = 0.4;
103 | d_sim.user.ParaMis_Mode_Select = 5;
104 | d_sim.user.ParaMis_OneCycleTime = 0.5;
105 | d_sim.user.bool_apply_HitWall_analysis = FALSE;
106 | d_sim.user.HitWall_max_limit_ratio = 2.0;
107 | d_sim.user.HitWall_min_limit_ratio = 0.1;
108 | d_sim.user.HitWall_high_RPM_command = 400;
109 | d_sim.user.HitWall_time_interval = 0.2;
110 | d_sim.user.COMM_bool_comm_status = 1;
111 | d_sim.user.flag_Nyquist_one_cycle_DONE = FALSE;
112 | d_sim.user.Nyquist_plot_num_cycles = 1.0;
113 | d_sim.user.Nyquist_one_cycle_count = 0.0;
114 | d_sim.user.Nyquist_Input_Current_Amp = 0.35;
115 | d_sim.user.Nyquist_Input_Speed_Amp = 100.0;
116 | d_sim.user.Nyquist_sum_sin = 0.0;
117 | d_sim.user.Nyquist_sum_cos = 0.0;
118 | d_sim.user.Nyquist_Amp = 0.0;
119 | d_sim.user.Nyquist_Phase = 0.0;
120 | d_sim.user.Nyquist_Re = 0.0;
121 | d_sim.user.Nyquist_Im = 0.0;
122 | d_sim.user.Nyquist_Freq_Ceiling = 200;
123 |
124 | }
125 |
--------------------------------------------------------------------------------
/User_acmsimcv5/typedef.h:
--------------------------------------------------------------------------------
1 | #ifndef TYPEDEF_H
2 | #define TYPEDEF_H
3 |
4 | #ifndef DSP28_DATA_TYPES
5 | #define DSP28_DATA_TYPES
6 | typedef int int16;
7 | typedef unsigned int Uint16;
8 | typedef long int32;
9 | typedef unsigned long Uint32;
10 | typedef long long int64;
11 | typedef unsigned long long Uint64;
12 | typedef float float32;
13 | typedef double float64;
14 | typedef long double float128;
15 | #endif
16 |
17 | typedef float32 REAL;
18 |
19 | /* Constants */
20 | #define CONST_PI_OVER_180 (0.0174533)
21 | #define CONST_180_OVER_PI (57.2958)
22 | #define CONST_1_OVER_SQRT3 (0.57735)
23 |
24 | /* Macro for two-phase Amplitude-invariant Clarke transformation*/
25 | #define UV2A_AI(U, V) ( U )
26 | #define UV2B_AI(U, V) ( (U + 2*(V)) * CONST_1_OVER_SQRT3 )
27 |
28 | #define UVW2A_AI(U, V, W) ( 0.666667 * U - 0.333333 * V - 0.333333 * W )
29 | #define UVW2B_AI(U, V, W) ( 0 * U + (V - W) * CONST_1_OVER_SQRT3 )
30 | #define UVW2G_AI(U, V, W) ( 0.333333 * (U + V + W))
31 |
32 | #define AB2U_AI(A, B) ( ( A ) )
33 | #define AB2V_AI(A, B) ( ( (A)*-0.5 + (B)*0.866 ) )
34 | #define AB2W_AI(A, B) ( ( (A)*-0.5 + (B)*-0.866 ) )
35 |
36 | // Macro for Power-invariant inverse Clarke transformation
37 | #define AB2U_PI(A, B) ( 0.816496580927726 * ( A ) )
38 | #define AB2V_PI(A, B) ( 0.816496580927726 * ( A*-0.5 + B*0.8660254037844387 ) )
39 | #define AB2W_PI(A, B) ( 0.816496580927726 * ( A*-0.5 + B*-0.8660254037844385 ) )
40 |
41 | /* Macro for Park transformation*/
42 | #define AB2M(A, B, COS, SIN) ((A) * COS + (B) * SIN)
43 | #define AB2T(A, B, COS, SIN) ((A) * -SIN + (B) * COS)
44 | #define MT2A(M, T, COS, SIN) ((M) * COS - (T) * SIN)
45 | #define MT2B(M, T, COS, SIN) ((M) * SIN + (T) * COS)
46 |
47 | /* General Constants */
48 | #ifndef BOOL
49 | #define BOOL int
50 | #endif
51 | #ifndef TRUE
52 | #define TRUE (1)
53 | #endif
54 | #ifndef FALSE
55 | #define FALSE (0)
56 | #endif
57 | #define M_PI 3.14159265358979323846 // pi
58 | #define M_SQRT2 1.41421356237309504880 // sqrt(2)
59 | #define ONE_OVER_2PI 0.15915494309189535 // 1/(2*pi)
60 | #define ONE_OVER_60 0.01666666666666667 // 1/60
61 | #define ONE_OVER_360 0.00277777777777778 // 1/360
62 | #define TWO_PI_OVER_3 2.0943951023931953 // 2*pi/3
63 | #define SIN_2PI_SLASH_3 0.86602540378443871 // sin(2*pi/3)
64 | #define SIN_DASH_2PI_SLASH_3 -0.86602540378443871 // sin(-2*pi/3)
65 | #define SQRT_2_SLASH_3 0.81649658092772603 // sqrt(2.0/3.0)
66 | #define abs use_fabsf_instead_or_you_will_regret
67 | #define MECH_RAD_PER_SEC_2_RPM (60.0 * ONE_OVER_2PI)
68 | #define ELEC_RAD_PER_SEC_2_RPM (60.0 * ONE_OVER_2PI * (*CTRL).motor->npp_inv)
69 | // #define ELEC_RAD_PER_SEC_2_RPM ( 60.0/(2*M_PI*(*CTRL).motor->npp) )
70 | #define RPM_2_ELEC_RAD_PER_SEC ((2 * M_PI * (*CTRL).motor->npp) * ONE_OVER_60)
71 | #define RPM_2_MECH_RAD_PER_SEC ((2 * M_PI * ONE_OVER_60))
72 | // #define RPM_2_ELEC_RAD_PER_SEC ( (2*M_PI*(*CTRL).motor->npp)/60.0 )
73 | // New convention
74 | #define M_PI_OVER_180 0.017453292519943295 // pi/180
75 | #define ONE_OVER_THREE (0.3333333333333333) // 1/3
76 | #define ONE_OVER_SQRT3 (0.5773502691896257) // 1/sqrt(3)
77 | #define CONST_PI_OVER_180 (0.0174533) // pi/180
78 | #define CONST_180_OVER_PI (57.2958) // 180/pi
79 | #define CONST_1_OVER_SQRT3 (0.57735) // 1/sqrt(3)
80 |
81 |
82 |
83 | /* Motor Control Related Utility Macros */
84 | #define CLARKE_TRANS_TORQUE_GAIN (1.5) // consistent with experiment
85 | #define CLARKE_TRANS_TORQUE_GAIN_INVERSE (0.666666667)
86 | #define POW2AMPL (0.816496581) // = 1/sqrt(1.5) power-invariant to aplitude-invariant (the dqn vector becomes shorter to have the same length as the abc vector)
87 | #define AMPL2POW (1.22474487)
88 |
89 | // 模拟测量环节,可以在此为测量电机添加噪声、温飘等,也可以在此实现类似光电编码器的转速测量环节。
90 | #define RANDOM (((REAL)rand() / (RAND_MAX)) * 2 - 1) // [-1, 1]
91 |
92 | extern REAL one_over_six;
93 |
94 |
95 |
96 | /* User */
97 | #include "super_config.h"
98 | #include "main_switch.h"
99 |
100 | // 速度环 increase to 3 times because of the bug in dynamics clamping
101 | #define VL_SERIES_KI_CODE (VL_SERIES_KI*VL_SERIES_KP*VL_TS)
102 | #define SPEED_LOOP_LIMIT_AMPERE (1 * d_sim.init.npp) // (1.0*1.414*INIT_IN)
103 |
104 | /* 控制策略 */
105 | // #define VOLTAGE_CURRENT_DECOUPLING_CIRCUIT FALSE
106 | #define SATURATED_MAGNETIC_CIRCUIT FALSE
107 |
108 | #define CL_TS (d_sim.sim.CLTS)
109 | #define CL_TS_INVERSE (1.0 / CL_TS)
110 | #define VL_TS (d_sim.FOC.VL_EXE_PER_CL_EXE*CL_TS)
111 | #define PL_TS VL_TS
112 | #define SPEED_LOOP_CEILING (d_sim.FOC.VL_EXE_PER_CL_EXE)
113 | // #define TS_UPSAMPLING_FREQ_EXE (CL_TS / MACHINE_TS)
114 | // #define TS_UPSAMPLING_FREQ_EXE_INVERSE (1.0/TS_UPSAMPLING_FREQ_EXE)
115 | #define MACHINE_TS (CL_TS/d_sim.sim.MACHINE_SIMULATIONs_PER_SAMPLING_PERIOD)
116 | #define MACHINE_TS_INVERSE (1.0/MACHINE_TS)
117 |
118 | // #define LOAD_INERTIA 0.0
119 | #define LOAD_TORQUE 0.2 // 0.0
120 | #define VISCOUS_COEFF 0.007 // 0.0007
121 |
122 |
123 |
124 | #define PMSM_PERMANENT_MAGNET_FLUX_LINKAGE d_sim.init.KE
125 | #define MOTOR_RATED_POWER_WATT 750
126 | #define MOTOR_RATED_SPEED_RPM 3000
127 | #define MOTOR_RATED_TORQUE ( MOTOR_RATED_POWER_WATT / (MOTOR_RATED_SPEED_RPM/60.0*2*3.1415926) )
128 | #define MOTOR_TORQUE_CONSTANT ( MOTOR_RATED_TORQUE / (d_sim.init.IN*1.414) )
129 | #define MOTOR_BACK_EMF_CONSTANT ( MOTOR_TORQUE_CONSTANT / 1.5 / d_sim.init.npp )
130 | #define MOTOR_BACK_EMF_CONSTANT_mV_PER_RPM ( MOTOR_BACK_EMF_CONSTANT * 1e3 / (1.0/d_sim.init.npp/2/3.1415926*60) )
131 | #define SPEED_LOOP_LIMIT_NEWTON_METER (1.0*MOTOR_RATED_TORQUE)
132 |
133 |
134 |
135 |
136 |
137 |
138 |
139 |
140 |
141 |
142 | #endif
143 |
--------------------------------------------------------------------------------
/User_application/AppCury.h:
--------------------------------------------------------------------------------
1 | #ifndef APPCURY_H
2 | #define APPCURY_H
3 | #include
4 |
5 | #define HIP_TYPE 0
6 | #define SHANK_TYPE 1
7 | // 吴波debug Cury时注释掉的
8 | // extern REAL HIP_MIN;
9 | // extern REAL HIP_MAX; // 娑撹桨绮堟稊鍫g箹娑擃亝妲哥拹鐔烘畱閿涚喕锟藉奔绗朚AX濮f摤IN鐏忓骏绱�
10 | // extern REAL CAN01_MIN; //43000//96000//89000 //51943 25000&40000 12000 34000
11 | // extern REAL CAN01_MAX; //33200//10300//101000 //61584
12 |
13 | // extern REAL SHANK_MIN;
14 | // extern REAL SHANK_MAX;
15 | // extern REAL CAN03_MIN; //29180//25000
16 | // extern REAL CAN03_MAX; //12500//40000
17 |
18 | extern REAL SHANK_POS_CONTROL_IQ;
19 | extern REAL HIP_POS_CONTROL_POS;
20 |
21 | #define CAN_QMAX 131072
22 |
23 |
24 | // 閸嬪洩顔曢弫鐗堝祦閻愯鏆熼柌蹇撳嚒閻拷
25 | #define HIP_SHANK_N 106
26 | // 閻€劋绨�涙ê鍋嶉弫鐗堝祦閻ㄥ嫮绮ㄩ弸鍕秼
27 | typedef struct {
28 | REAL hip[HIP_SHANK_N];
29 | REAL shank[HIP_SHANK_N];
30 | } HIP_SHANK_ANGLE_TABLE;
31 |
32 | extern HIP_SHANK_ANGLE_TABLE hip_shank_angle_table;
33 |
34 | extern REAL HIP_SHANK_FREQUENCY;
35 | extern REAL TEST_HIP_KP;
36 | extern REAL TEST_SHANK_KP;
37 | extern REAL TEST_HIP_SPD_KP;
38 | extern REAL TEST_HIP_SPD_KI;
39 | extern REAL TEST_SHANK_SPD_KP;
40 | extern REAL TEST_SHANK_SPD_KI;
41 |
42 | extern REAL TEST_HIP_POS_OUTLIMIT;
43 | extern REAL TEST_SHANK_POS_OUTLIMIT;
44 |
45 | extern REAL deg_four_bar_map_motor_encoder_angle;
46 | extern REAL rad_four_bar_map_motor_encoder_angle;
47 | extern int32 cnt_four_bar_map_motor_encoder_angle;
48 |
49 |
50 | REAL linearInterpolate(REAL x, REAL x1, REAL x2, REAL y1, REAL y2);
51 | REAL linearInterpolate_Uint_to_real(Uint32 x, Uint32 x1, Uint32 x2, REAL y1, REAL y2);
52 | REAL look_up_hip_shank_angle(REAL t, int type);
53 | REAL hip_shank_angle_to_can(REAL angle, int type);
54 |
55 | #define PI 3.14159265
56 | #define BEZIER_ORDER 4
57 | #define BEZIER_TRACE_SIZE 100
58 | #define INIT_THETA1 0.0
59 | #define INIT_THETA2 0.0
60 | extern REAL IECON_HEIGHT;
61 |
62 | // 吴波debug Cury时注释掉的
63 | // typedef struct
64 | // {
65 | // REAL L1;
66 | // REAL L2;
67 | // REAL theta1, theta2; // unit [rad] theta1: hip ; theta2: knee
68 | // REAL dot_theta1, dot_theta2;
69 | // REAL T; // unit [s]
70 | // REAL height_limit[2]; // unit [m]
71 | // REAL C[BEZIER_ORDER][2];
72 | // int order;
73 | // REAL bezier_trace[BEZIER_TRACE_SIZE + 1][2];
74 | // } CURYCONTROLLER;
75 |
76 | // extern CURYCONTROLLER curycontroller;
77 |
78 | void calc_theta_from_height(REAL height);
79 | void reset_position();
80 | void linear_controller(REAL t);
81 | void sinusoidal_controller(REAL t);
82 | void get_bezier_points();
83 | REAL bezier_linear_interpoolation(REAL t);
84 | void bezier_controller(REAL t);
85 | void analoge_controller(REAL height);
86 | void run_iecon_main(Uint64 t);
87 |
88 | typedef struct
89 | {
90 | REAL current[6];
91 | REAL weight[6];
92 | } CURRENT_WEIGHT_TABLE;
93 |
94 | REAL get_current_from_weight(REAL weight);
95 |
96 | // impedance control
97 | extern REAL HIP_IMPEDANCE_DESIRE;
98 | extern REAL SHANK_IMPEDANCE_DESIRE;
99 | extern REAL HIP_PREV_ANGLE;
100 | extern REAL SHANK_PREV_ANGLE;
101 | extern REAL HIP_IMPENDENCE_B;
102 | extern REAL HIP_IMPENDENCE_D;
103 | extern REAL SHANK_IMPENDENCE_B;
104 | extern REAL SHANK_IMPENDENCE_D;
105 |
106 | extern REAL IMPENDENCE_HIP_D_ANGULAR;
107 | extern REAL IMPENDENCE_SHANK_D_ANGULAR;
108 | extern REAL IQOUT_SHANK;
109 | extern REAL IQOUT_HIP;
110 |
111 |
112 | REAL position_count_to_angle(int axisType, Uint32 hip_count_fbk, Uint32 shank_count_fbk);
113 | REAL calc_theta_angular_velocity(int axisType, REAL hip_theta_fbk, REAL shank_theta_fbk);
114 | REAL Impendence_Control_cal(int axisType, Uint32 hip_count_fbk, Uint32 shank_count_fbk);
115 |
116 | REAL get_motorpos(REAL angle);
117 |
118 | #endif
119 |
120 |
--------------------------------------------------------------------------------
/User_application/Experiment.h:
--------------------------------------------------------------------------------
1 | /*
2 | * Experiment.h
3 | *
4 | * Created on: May 19, 2021
5 | * Author: horyc
6 | */
7 |
8 | #ifndef THE_DRIVER_LAYER_EXPERIMENT_H_
9 | #define THE_DRIVER_LAYER_EXPERIMENT_H_
10 |
11 | #define AS_LOAD_MOTOR_CONST 1
12 | #define AS_LOAD_MOTOR_RAMP 2
13 | #define NSOAF_LOW_SPEED_OPERATION 3
14 | #define NSOAF_HIGH_SPEED_OPERATION 4
15 | #define NSOAF_RAMP_SPEED_OPERATION 41
16 | #define XCUBE_TaTbTc_DEBUG_MODE 5
17 | #define SLESSINV_CONST_LOAD_PAA 10
18 |
19 | void init_ADC_scale_and_offset();
20 | void init_experiment_overwrite();
21 | void runtime_command_and_tuning();
22 | void init_experiment_PLACE_gain_and_offset();
23 |
24 | /* NSOAF */
25 |
26 | #define SLOW_REVERSAL_RATE 50 // Park.Sul2014
27 |
28 | void short_stopping_at_zero_speed();
29 | void slow_speed_reversal();
30 | void low_speed_operation_init();
31 | void slow_speed_reversal_tuning();
32 | void zero_speed_stopping_tuning();
33 | void zero_speed_stopping();
34 | void high_speed_operation_init();
35 | void high_speed_operation_tuning();
36 | void high_speed_operation();
37 | void ramp_speed_operation_init();
38 | void ramp_speed_operation();
39 | void ramp_speed_operation_tuning();
40 |
41 |
42 | #endif /* THE_DRIVER_LAYER_EXPERIMENT_H_ */
43 |
--------------------------------------------------------------------------------
/User_application/ShareMemory.h:
--------------------------------------------------------------------------------
1 | #ifndef SHARE_MOMORY_H
2 | #define SHARE_MOMORY_H
3 |
4 | //Share Memory Configuration
5 | // �����ڴ�ṹ������
6 | struct IPC_MEMORY_WRITE{
7 | /* read/write (RW) shared memory @ GS1 owned by CPU1 */
8 | REAL dac_buffer[8];
9 | REAL test;
10 | REAL Read_RPM;
11 | };// ˫�����
12 | extern struct IPC_MEMORY_WRITE Write;
13 |
14 | struct IPC_MEMORY_READ{
15 | /* read only (RO) shared memory @ GS0 */
16 | Uint32 SCI_A_position_count;
17 | Uint32 SCI_B_position_count;
18 |
19 | Uint32 SCI_shank_position_count;
20 | Uint32 CAN_position_count_ID0x03;
21 |
22 | Uint32 SCI_hip_position_count;
23 | Uint32 CAN_position_count_ID0x01;
24 |
25 | REAL position_cmd_elec;
26 | REAL speed_cmd_elec;
27 | REAL current_cmd_from_PC;
28 | bool run_enable;
29 | int16 SCI_char;
30 | };// ˫�����
31 | extern struct IPC_MEMORY_READ Read;
32 |
33 | void write_DAC_buffer();
34 | void single_core_dac();
35 | #endif
36 |
--------------------------------------------------------------------------------
/User_application/new_user.h:
--------------------------------------------------------------------------------
1 | #ifndef NEW_USER_H // 如果没有定义 NEW_USER_H
2 | #define NEW_USER_H // 定义 NEW_USER_H
3 |
4 |
5 |
6 | /* When PWM is DISABLE*/
7 | typedef enum {
8 | RESET_MODE_SOFT, // 保持配置参数 _Reset_CTRL_except_Controller_Param();
9 | RESET_MODE_HARD, // 恢复出厂设置 _Reset_CTRL_ALL();
10 | RESET_MODE_SAFE // 进入安全状态后重置 _Reset_Controller_Param();
11 | } st_reset_mode;
12 |
13 | void _user_ResetController(st_reset_mode mode);
14 | void _Reset_CTRL_except_Controller_Param();
15 | void _Reset_CTRL_ALL();
16 | void _Reset_Controller_Param();
17 |
18 |
19 | /* When PWM is ENABLE */
20 | // typedef enum {
21 | // MODE_SELECT_PWM_DIRECT
22 | // MODE_SELECT_VOLTAGE_OPEN_LOOP
23 | // MODE_SELECT_WITHOUT_ENCODER_CURRENT_VECTOR_ROTATE
24 | // MODE_SELECT_FOC
25 | // MODE_SELECT_FOC_SENSORLESS
26 | // MODE_SELECT_INDIRECT_FOC
27 | // MODE_SELECT_ID_SWEEPING_FREQ
28 | // MODE_SELECT_IQ_SWEEPING_FREQ
29 | // MODE_SELECT_FOC_HARNEFORS_1998
30 | // MODE_SELECT_VELOCITY_LOOP
31 | // MODE_SELECT_VELOCITY_LOOP_SENSORLESS
32 | // MODE_SELECT_TESTING_SENSORLESS
33 | // MODE_SELECT_V_LOOP_WC_TUNER // 这个模式被弃用了,现在于USER_WB中实现WC Tuner
34 | // MODE_SELECT_Marino2005
35 | // MODE_SELECT_SWEEPING_FREQ
36 | // MODE_SELECT_V_LOOP_ESO_SPEED_REF
37 | // MODE_SELECT_POSITION_LOOP
38 | // MODE_SELECT_CURY_POSITION_LOOP
39 | // MODE_SELECT_POSITION_IMPEDANCE_CONTRssOL
40 | // MODE_SELECT_COMMISSIONING
41 | // } st_mode_select;
42 | // st_mode_select modeSelect;
43 |
44 | typedef struct{
45 | int ID;
46 | struct ControllerForExperiment *pCTRL;
47 | struct DebugExperiment *Pdebug;
48 |
49 | // Motor Operation Mode
50 | // mode_select
51 |
52 |
53 | // Commonly used for prototype motor testing
54 | //int use_first_set_three_phase;
55 | //int Set_current_loop;
56 | //int Set_x_suspension_current_loop;
57 | //int Set_y_suspension_current_loop;
58 | //REAL Set_manual_rpm;
59 | //REAL Prev_manual_rpm;
60 | //REAL rampRate_rpm;
61 | //REAL Set_manual_current_id;
62 | //REAL Set_manual_current_iq;
63 | //REAL Set_manual_current_ix;
64 | //REAL Set_manual_current_iy;
65 | //int Select_exp_operation;
66 | //int *pFLAG_INVERTER_NONLINEARITY_COMPENSATION;
67 | //int flag_overwrite_theta_d;
68 | //REAL Overwrite_Current_Frequency;
69 | //REAL Overwrite_Suspension_Current_Frequency;
70 | //REAL used_theta_d_elec;
71 | //REAL angle_shift_for_first_inverter;
72 | //REAL angle_shift_for_second_inverter;
73 | //REAL OverwriteSpeedOutLimitDuringInit;
74 |
75 | // ADC Offset
76 | // Automatic Offset Removing
77 |
78 | // volatile struct ADC_RESULT_REGS *pAdcaResultRegs;
79 | // volatile struct ADC_RESULT_REGS *pAdcbResultRegs;
80 | // volatile struct ADC_RESULT_REGS *pAdccResultRegs;
81 |
82 |
83 | // int FLAG_ENABLE_PWM_OUTPUT; // 电机模式标志位
84 | int AD_offset_flag2;
85 | REAL offset_counter;
86 | REAL offset_online[6];
87 | // Raw
88 | REAL adc_offset[12]; // ADC offset. U, V, W corresponds to ADCRESULT2, ADCRESULT3, ADCRESULT1.
89 | REAL adc_scale[12];
90 | // Sensor - Raw measurement
91 | REAL vdc;
92 | REAL iabg[6];
93 | REAL iuvw[6];
94 | REAL iuvw_offset_online[6];
95 | Uint32 SCI_Position_Count_fromCPU2;
96 | // DAC
97 | int DAC_MAX5307_FLAG; // for single core case
98 | REAL dac_offset[NO_OF_DAC_CHANNELS];
99 | REAL dac_time;
100 | REAL dac_watch[80];
101 | REAL dac_watch_stator_resistance;
102 | int channels[NO_OF_DAC_CHANNELS];
103 | int channels_preset;
104 | // Sensor Coil
105 | REAL place_sensor[8];
106 | REAL place_offset[8];
107 | REAL place_scale[8];
108 | } st_axis;
109 |
110 | extern st_axis Axis_1;
111 | extern st_axis Axis_2;
112 | extern st_axis *Axis;
113 |
114 |
115 | void user_init_axis(int axisCnt);
116 | void measurement_position_count_axisCnt0(); // 对四个电机采取不同的axisCnt函数,而不是循环——方便处理当驱动对象为4台不同电机时的情况
117 | void measurement_position_count_axisCnt1();
118 | void measurement_position_count_axisCnt2();
119 | void measurement_position_count_axisCnt3();
120 | void measurement_enc();
121 | void write_RPM_to_cpu02_dsp_cores_2();
122 |
123 | void user_routine_init_in_main();
124 | void user_routine_in_main_loop();
125 | void user_routine_init_pwm_output();
126 | void user_routine_read_from_cpu02();
127 | void user_routine_debug_switch();
128 | void user_routine_disable_pwm_output();
129 | REAL user_routine_enable_pwm_output(); // 返回四台逆变器的三相占空比
130 |
131 | #endif // NEW_USER_H
132 |
133 |
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/User_application/tools.h:
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1 | #ifndef MAIN_TOOLS
2 | #define MAIN_TOOLS
3 |
4 | void EUREKA_GPIO_SETUP();
5 | extern REAL iq_command_from_PC;
6 | #define ANGLE_SHIFT_FOR_FIRST_INVERTER 0.0 // Torque Inverter
7 | #define ANGLE_SHIFT_FOR_SECOND_INVERTER 0.0 // Suspension Inverter
8 |
9 | void axis_basic_setup(int axisCnt);
10 | void compute_CLA_task_vectors();
11 | void init_spi();
12 | void handle_interrupts();
13 | void main_loop();
14 | void DeadtimeCompensation(REAL Current_U, REAL Current_V, REAL Current_W, REAL CMPA[], REAL CMPA_DBC[]);
15 | void test_pwm_output();
16 |
17 | void voltage_commands_to_pwm();
18 | void voltage_measurement_based_on_eCAP();
19 | void measurement_position_count_axisCnt0();
20 | void measurement_position_count_axisCnt1();
21 | void measurement_enc();
22 | void measurement_current_axisCnt0();
23 | void measurement_current_axisCnt1();
24 | #if WHO_IS_USER == USER_QIAN
25 | void measurement_sensor_coil();
26 | #endif
27 |
28 | void control_two_motor_position();
29 | void control_single_motor_position();
30 | void run_shank_loop();
31 | void run_hip_loop();
32 | void run_both_loop();
33 | void run_impedance_control();
34 |
35 | void DISABLE_PWM_OUTPUT();
36 | void ENABLE_PWM_OUTPUT(int positionLoopType);
37 |
38 | void read_count_from_cpu02_dsp_cores_2();
39 | void write_RPM_to_cpu02_dsp_cores_2();
40 | void cla_test_codes();
41 | void test_ipc_tocpu02();
42 |
43 | #endif
44 |
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/User_application/yx2837xdeadtime.h:
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/User_driver/CONSOLE.c:
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1 | /*
2 | * SCI_232.c
3 | *
4 | * Created on: 2021��5��15��
5 | * Author: yuanx
6 | */
7 | #include
8 |
9 | //
10 | // Globals
11 | //
12 | Uint16 sdataA[2] = {0x22, 0x23}; // Send data for SCI-A
13 | Uint16 rdataA[2]; // Received data for SCI-A
14 | Uint16 rdata_pointA; // Used for checking the received data
15 |
16 |
17 | Uint16 LoopCount;
18 | Uint16 ErrorCount;
19 | Uint16 SendChar;
20 | Uint16 ReceivedChar;
21 |
22 |
23 | __interrupt void scicTxFifoIsr(void){
24 | Uint16 i;
25 |
26 | for(i=0; i< 2; i++)
27 | {
28 | ScicRegs.SCITXBUF.all=sdataA[i]; // Send data
29 | }
30 |
31 | // for(i=0; i< 2; i++) // Increment send data for next cycle
32 | // {
33 | // sdataA[i] = (sdataA[i]+1) & 0x00F;
34 | // }
35 |
36 | ScicRegs.SCIFFTX.bit.TXFFINTCLR=1; // Clear SCI Interrupt flag
37 | PieCtrlRegs.PIEACK.all |= PIEACK_GROUP8; // Issue PIE ACK for Group 8 (for SCI-C and SCI-D)
38 | }
39 |
40 | __interrupt void scicRxFifoIsr(void){
41 | Uint16 i;
42 |
43 | for(i=0;i<2;i++)
44 | {
45 | rdataA[i]=ScicRegs.SCIRXBUF.all; // Read data
46 | }
47 |
48 | for(i=0;i<2;i++) // Check received data
49 | {
50 | if(rdataA[i] != ( (rdata_pointA+i) & 0x00FF) )
51 | {
52 | //error();
53 | }
54 | }
55 |
56 | rdata_pointA = (rdata_pointA+1) & 0x00FF;
57 |
58 | ScicRegs.SCIFFRX.bit.RXFFOVRCLR=1; // Clear Overflow flag
59 | ScicRegs.SCIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag
60 | PieCtrlRegs.PIEACK.all |= PIEACK_GROUP8; // Issue PIE ACK for Group 8 (for SCI-C and SCI-D)
61 | }
62 |
63 |
64 | void sci_poll(int16 ch){
65 | static int set_current_flag = FALSE;
66 |
67 | static int dac_offset_flag = FALSE;
68 | static int dac_channel_flag = FALSE;
69 |
70 | static int reverse_speed_flag = FALSE;
71 | static int reverse_current_flag = FALSE;
72 |
73 | if( set_current_flag || dac_offset_flag || dac_channel_flag ){
74 | if(set_current_flag){
75 | switch(ch){
76 | case ' ': set_current_flag = FALSE; break;
77 | case '+': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit += 0.1; break;
78 | case '-': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit -= 0.1; break;
79 | case '1': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = 0.1; break;
80 | case '2': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = 2; break;
81 | case '3': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = 3; break;
82 | case '4': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = 4; break;
83 | case '5': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = 5; break;
84 | case '6': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = -5; break;
85 | case '7': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = -4; break;
86 | case '8': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = -3; break;
87 | case '9': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = -2; break;
88 | case '0': G.sendCurrentCommandFlag = TRUE; PID_Speed->OutLimit = -1; break;
89 | default : break;
90 | }
91 | }
92 | }
93 | else // No Flag is set
94 | {
95 | switch(ch)
96 | {
97 | /* Default mode is to change speed. */
98 | case '1':
99 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = -500;
100 | break;
101 | case '2':
102 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = -300;
103 | break;
104 | case '3':
105 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 50;
106 | break;
107 | case '4':
108 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 100;
109 | break;
110 | case '5':
111 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 300;
112 | break;
113 | case '6':
114 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 500;
115 | break;
116 | case '7':
117 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 800;
118 | break;
119 | case '8':
120 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 1500;
121 | break;
122 | case '9':
123 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 2000;
124 | break;
125 | case '0':
126 | G.sendSpeedCommandFlag = TRUE; // (*Axis).Select_exp_operation = 0;
127 | break;
128 | case '-':
129 | reverse_speed_flag = TRUE; // not used
130 | reverse_current_flag = TRUE; // not used
131 | break;
132 |
133 | /* Change torque current */
134 | case 'c':
135 | set_current_flag = TRUE;
136 | G.sendCurrentCommandFlag = TRUE;
137 | break;
138 |
139 | /* Stop */
140 | case 's':
141 | case 'S':
142 | break;
143 |
144 | /* Run */
145 | case 'r':
146 | case 'R':
147 | G.sendSpeedCommandFlag = TRUE;
148 | break;
149 |
150 | default :
151 | /*Do Nothing Or Test Respond*/;
152 | //send_flag = 999;
153 | break;
154 | }
155 | }
156 |
157 |
158 | }
159 |
160 |
161 |
162 |
163 | /*
164 | * else if(dac_channel_flag){
165 | switch(ch)
166 | {
167 | case '+': dac_channel += 1; send_flag=5; break;
168 | case '-': dac_channel -= 1; send_flag=5; break;
169 | case ' ': dac_channel_flag=False; break;
170 | default : break;
171 | }
172 | }else if(dac_offset_flag){
173 | if(dac_channel>8){
174 | dac_channel=8;
175 | }else if(dac_channel<1){
176 | dac_channel=1;
177 | }
178 | switch(ch)
179 | {
180 | case '+': dac_offset[dac_channel-1] += 1; send_flag=55; break;
181 | case '-': dac_offset[dac_channel-1] -= 1; send_flag=55; break;
182 | case ' ': dac_offset_flag=False; break;
183 | default : break;
184 | }
185 | }
186 | */
187 |
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/User_driver/CONSOLE.h:
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1 | /*
2 | * CONSOLE.h
3 | *
4 | * Created on: Jun 10, 2021
5 | * Author: horyc
6 | */
7 |
8 | #ifndef THE_DRIVER_LAYER_CONSOLE_H_
9 | #define THE_DRIVER_LAYER_CONSOLE_H_
10 |
11 | extern Uint16 LoopCount;
12 | extern Uint16 ErrorCount;
13 | extern Uint16 SendChar;
14 | extern Uint16 ReceivedChar;
15 |
16 |
17 | void sci_poll(int16 ch);
18 |
19 | #endif /* THE_DRIVER_LAYER_CONSOLE_H_ */
20 |
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/User_driver/DAC_MAX5307.c:
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/User_driver/DAC_MAX5307.h:
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1 | #include "All_Definition.h"
2 |
3 | void DAC_MAX5307(int channel_number, REAL dac_value);
4 |
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/User_driver/ECaptureVoltage.c:
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/User_driver/ECaptureVoltage.h:
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1 | /*
2 | * ECaptureVoltage.h
3 | *
4 | * Created on: May 19, 2021
5 | * Author: horyc
6 | */
7 |
8 | #ifndef THE_DRIVER_LAYER_ECAPTUREVOLTAGE_H_
9 | #define THE_DRIVER_LAYER_ECAPTUREVOLTAGE_H_
10 |
11 | void InitECapture();
12 | void InitECaptureContinuousMode();
13 | void do_enhanced_capture();
14 |
15 | void ecap_moving_average();
16 |
17 | #endif /* THE_DRIVER_LAYER_ECAPTUREVOLTAGE_H_ */
18 |
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/User_driver/F2837xD_Ipc.c:
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1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Ipc.c
4 | //
5 | // TITLE: Inter-Processor Communication module support functions
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h"
18 | #include "F2837xD_Examples.h"
19 | #include
20 |
21 | //
22 | // InitIpc - Initialize all IPC registers and clear all flags
23 | //
24 | void InitIpc()
25 | {
26 | //
27 | //Clear sent flags. Received flags must not be cleared locally
28 | //to handle the case where the remote CPU starts executing first.
29 | //In this case, a remote flag could be sent correctly and be
30 | //incorrectly cleared by this function. Unfortunately, we're
31 | //still left with a startup synchronization problem if the
32 | //remote CPU has flags left over from a previous run. There's
33 | //probably a better way of handling this.
34 | //
35 | IpcRegs.IPCCLR.all = 0xFFFFFFFF;
36 |
37 | //
38 | //Clear commands
39 | //
40 | IpcRegs.IPCSENDCOM = 0;
41 | IpcRegs.IPCSENDADDR = 0;
42 | IpcRegs.IPCSENDDATA = 0;
43 | IpcRegs.IPCLOCALREPLY = 0;
44 |
45 | //
46 | //Clear boot status and pump semaphore
47 | //
48 | #if defined(CPU1)
49 | IpcRegs.IPCBOOTMODE = 0;
50 | #elif defined(CPU2)
51 | IpcRegs.IPCBOOTSTS = 0;
52 | #endif
53 | ReleaseFlashPump();
54 | }
55 |
56 | //
57 | // ReadIpcTimer - Read the current IPC timer value. The low register must be
58 | // read first to latch a value in the high register.
59 | //
60 | unsigned long long ReadIpcTimer()
61 | {
62 | Uint32 low, high;
63 |
64 | low = IpcRegs.IPCCOUNTERL;
65 | high = IpcRegs.IPCCOUNTERH;
66 | return ((unsigned long long)high << 32) | (unsigned long long)low;
67 | }
68 |
69 | //
70 | // SendIpcData - Copy data into the IPC send message RAM for this CPU and set
71 | // a flag. If the specified 16-bit word length is greater than
72 | // the size of the message RAM, the data is truncated.
73 | //
74 | void SendIpcData(void *data, Uint16 word_length, Uint16 flag)
75 | {
76 | word_length = (word_length < MSG_RAM_SIZE) ? word_length : MSG_RAM_SIZE;
77 |
78 | memcpy(SEND_MSG_RAM, data, word_length);
79 |
80 | if (flag != NO_IPC_FLAG)
81 | {
82 | SendIpcFlag(flag);
83 | }
84 | }
85 |
86 | //
87 | // RecvIpcData - Copy data out of the IPC receive message RAM for this CPU. If
88 | // the specified 16-bit word length is greater than the size of
89 | // the message RAM, the data is truncated.
90 | //
91 | void RecvIpcData(void *recv_buf, Uint16 word_length)
92 | {
93 | word_length = (word_length < MSG_RAM_SIZE) ? word_length : MSG_RAM_SIZE;
94 | memcpy(RECV_MSG_RAM, recv_buf, word_length);
95 | }
96 |
97 | //
98 | // FillIpcSendData - Fill the IPC send message RAM for this CPU with a constant
99 | // value
100 | //
101 | void FillIpcSendData(Uint16 fill_data)
102 | {
103 | memset(SEND_MSG_RAM, fill_data, MSG_RAM_SIZE);
104 | }
105 |
106 | //
107 | // SendIpcCommand - Write the send command, address, and data registers with
108 | // the specified values, then set an IPC flag.
109 | //
110 | void SendIpcCommand(Uint32 command, Uint32 address, Uint32 data, Uint16 flag)
111 | {
112 | IpcRegs.IPCSENDCOM = command;
113 | IpcRegs.IPCSENDADDR = address;
114 | IpcRegs.IPCSENDDATA = data;
115 |
116 | if (flag != NO_IPC_FLAG)
117 | {
118 | SendIpcFlag(flag);
119 | }
120 | }
121 |
122 | //
123 | // SendIpcFlag - Set an IPC flag bit for the other CPU. Flags 0-3 will generate
124 | // PIE interrupts.
125 | //
126 | void SendIpcFlag(Uint16 flag)
127 | {
128 | IpcRegs.IPCSET.all = 1UL << flag;
129 | }
130 |
131 | //
132 | // AckIpcFlag - Acknowledge/clear a received IPC flag
133 | //
134 | void AckIpcFlag(Uint16 flag)
135 | {
136 | IpcRegs.IPCACK.all = 1UL << flag;
137 | }
138 |
139 | //
140 | // CancelIpcFlag - Clear a sent IPC flag bit before the other CPU acknowledges
141 | // it. You will normally never use this function. To clear a
142 | // received flag, call AckIpcFlag() instead.
143 | //
144 | void CancelIpcFlag(Uint16 flag)
145 | {
146 | IpcRegs.IPCCLR.all = 1UL << flag;
147 | }
148 |
149 | //
150 | // WaitForIpcFlag - Wait for any IPC flag in the specified mask to be set.
151 | // WARNING: If you use this function to wait for an IPC
152 | // interrupt, you must not clear the IPC flag in the interrupt
153 | // handler. Otherwise, this function will never return.
154 | //
155 | void WaitForIpcFlag(Uint16 flag)
156 | {
157 | //
158 | //WARNING: Don't use this function to wait for an IPC interrupt!
159 | //
160 | while ((IpcRegs.IPCSTS.all & (1UL << flag)) == 0x00000000) {;}
161 | }
162 |
163 | //
164 | // WaitForIpcAck - Wait for any IPC flag in the specified mask to be
165 | // acknowledged.
166 | //
167 | void WaitForIpcAck(Uint16 flag)
168 | {
169 | while ((IpcRegs.IPCFLG.all & (1UL << flag)) != 0x00000000) {;}
170 | }
171 |
172 | //
173 | // IpcSync - Synchronize the two CPUs. Neither CPU will return from this
174 | // function call before the other one enters it. Must be called with
175 | // the same flag number on both CPUs.
176 | //
177 | void IpcSync(Uint16 flag)
178 | {
179 | SendIpcFlag(flag);
180 | WaitForIpcFlag(flag);
181 | AckIpcFlag(flag);
182 | WaitForIpcAck(flag);
183 | }
184 |
185 | //
186 | // End of file
187 | //
188 |
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/User_driver/i2cTalkToLDC1612.c:
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/User_driver/i2cTalkToLDC1612.h:
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1 | #include "All_Definition.h"
2 |
3 | //The following functions will be called in main.c.
4 | void I2CA_Init(void);
5 | Uint32 I2CA_ReadData_Channel(Uint16 channel);
6 | int Single_channel_config(Uint16 channel);
7 |
8 |
9 | extern uint32_t raw_value_rdlu[4];
10 | //extern uint32 raw_value_rdlu[4];
11 | // extern Uint32 raw_value_zero;
12 | // extern Uint32 raw_value_one;
13 | // extern Uint32 raw_value_two;
14 | // extern Uint32 raw_value_three;
15 |
16 |
17 |
18 |
19 |
20 |
21 |
22 |
23 |
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/User_driver/yx2837xD_EPwm.c:
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/User_driver/yx2837xD_Gpio.c:
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/User_driver/yxsvgen.c:
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/User_peripheral/F2837xD_Adc_defines.h:
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1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Adc_defines.h
4 | //
5 | // TITLE: #defines used in ADC examples
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_ADC_DEFINES_H
15 | #define F2837xD_ADC_DEFINES_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Defines
23 | //
24 |
25 | //
26 | //definitions for specifying an ADC
27 | //
28 | #define ADC_ADCA 0
29 | #define ADC_ADCB 1
30 | #define ADC_ADCC 2
31 | #define ADC_ADCD 3
32 |
33 | //
34 | //definitions for selecting ADC resolution
35 | //
36 | #define ADC_RESOLUTION_12BIT 0
37 | #define ADC_RESOLUTION_16BIT 1
38 |
39 | //
40 | //definitions for selecting ADC signal mode
41 | //(single-ended mode is only a valid mode for 12-bit resolution)
42 | //
43 | #define ADC_SIGNALMODE_SINGLE 0
44 | #define ADC_SIGNALMODE_DIFFERENTIAL 1
45 |
46 | #ifdef __cplusplus
47 | }
48 | #endif /* extern "C" */
49 |
50 | #endif // - end of F2837xD_ADC_DEFINES_H
51 |
52 | //
53 | // End of file
54 | //
55 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Can_defines.h:
--------------------------------------------------------------------------------
1 | //#############################################################################
2 | //
3 | // FILE: F2837xD_Can_defines.h
4 | //
5 | // TITLE: Common defines used in CAN Test Cases
6 | //
7 | //#############################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //#############################################################################
13 |
14 | #ifndef F2837xD_CAN_DEFINES_H
15 | #define F2837xD_CAN_DEFINES_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Defines
23 | //
24 |
25 | //
26 | // Reset Values
27 | //
28 | #define CAN_RESET_VALUE_ZERO 0x00000000
29 | #define CAN_CTL_RESET_VALUE 0x00001401
30 | #define CAN_ES_RESET_VALUE 0x00000007
31 | #define CAN_BTR_RESET_VALUE 0x00002301
32 | #define CAN_REL_RESET_VALUE 0xA3170504
33 | #define CAN_RAM_INIT_RESET_VALUE 0x00000005
34 | #define CAN_IF_CMD_RESET_VALUE 0x00000001
35 | #define CAN_IF_MASK_RESET_VALUE 0xFFFFFFFF
36 |
37 | //
38 | // Register value when Peripheral Clock is Disabled
39 | //
40 | #define CAN_MODULE_CLK_DISABLE_VALUE 0x00000000
41 |
42 | //
43 | // Bit field definition of CAN_CTL register.
44 | //
45 | #define CAN_CTL_INIT 0x00000001 // Initialization
46 | #define CAN_CTL_IE0 0x00000002 // Interrupt Enable 0
47 | #define CAN_CTL_SIE 0x00000004 // Status Interrupt Enable
48 | #define CAN_CTL_EIE 0x00000008 // Error Interrupt Enable
49 | #define CAN_CTL_DAR 0x00000020 // Disable Automatic-Retransmission
50 | #define CAN_CTL_CCE 0x00000040 // Configuration Change Enable
51 | #define CAN_CTL_TEST 0x00000080 // Test Mode Enable
52 | #define CAN_CTL_IDS 0x00000100 // Interruption Debug Support Enable
53 | #define CAN_CTL_ABO 0x00000200 // Auto-Bus On Enable
54 | #define CAN_CTL_PMD_S 10
55 | #define CAN_CTL_PMD_M 0x00003C00 // Parity/SECDED Enable
56 | #define CAN_CTL_SWR 0x00008000 // Software Reset Enable
57 | #define CAN_CTL_INITDBG 0x00010000 // Debug Mode Status
58 | #define CAN_CTL_IE1 0x00020000 // Interrupt Enable 1
59 | #define CAN_CTL_PDR 0x01000000 // Power Down Mode Request
60 | #define CAN_CTL_WUBA 0x02000000 // Wake Up on Bus Activity
61 |
62 | //
63 | // Bit field definition of CAN_IF1_CMD register.
64 | //
65 | #define CAN_IF1_CMD_MESSNUM_S 0
66 | #define CAN_IF1_CMD_MESSNUM_M 0x000000FF // Message Number
67 | #define CAN_IF1_CMD_BUSY 0x00008000 // Busy Flag
68 | #define CAN_IF1_CMD_DATAB 0x00010000 // Access Data B
69 | #define CAN_IF1_CMD_DATAA 0x00020000 // Access Data A
70 | #define CAN_IF1_CMD_TXRQSTNDAT 0x00040000 // Transmission Request Bit
71 | #define CAN_IF1_CMD_CLRINTPND 0x00080000 // Clear Interrupt Pending Bit
72 | #define CAN_IF1_CMD_CONTROL 0x00100000 // Access Control Bits
73 | #define CAN_IF1_CMD_ARB 0x00200000 // Access Arbitration Bits
74 | #define CAN_IF1_CMD_MASK 0x00400000 // Access Mask Bits
75 | #define CAN_IF1_CMD_WR_RD 0x00800000 // Write and Read
76 |
77 | //
78 | // Bit field definition of CAN_IF2_CMD register.
79 | //
80 | #define CAN_IF2_CMD_MESSNUM_S 0
81 | #define CAN_IF2_CMD_MESSNUM_M 0x000000FF // Message Number
82 | #define CAN_IF2_CMD_BUSY 0x00008000 // Busy Flag
83 | #define CAN_IF2_CMD_DATAB 0x00010000 // Access Data B
84 | #define CAN_IF2_CMD_DATAA 0x00020000 // Access Data A
85 | #define CAN_IF2_CMD_TXRQSTNDAT 0x00040000 // Transmission Request Bit
86 | #define CAN_IF2_CMD_CLRINTPND 0x00080000 // Clear Interrupt Pending Bit
87 | #define CAN_IF2_CMD_CONTROL 0x00100000 // Access Control Bits
88 | #define CAN_IF2_CMD_ARB 0x00200000 // Access Arbitration Bits
89 | #define CAN_IF2_CMD_MASK 0x00400000 // Access Mask Bits
90 | #define CAN_IF2_CMD_WR_RD 0x00800000 // Write and Read
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif /* extern "C" */
95 |
96 | #endif // - end of F2837xD_CAN_DEFINES_H
97 |
98 | //
99 | // End of file
100 | //
101 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Cla_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Cla_defines.h
4 | //
5 | // TITLE: #defines used in CLA examples
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_CLA_DEFINES_H
15 | #define F2837xD_CLA_DEFINES_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Defines
23 | //
24 |
25 | //
26 | // MCTL Register
27 | //
28 | #define CLA_FORCE_RESET 0x1
29 | #define CLA_IACK_ENABLE 0x1
30 | #define CLA_IACK_DISABLE 0x0
31 |
32 | //
33 | // MMEMCFG Register
34 | //
35 | #define CLA_CLA_SPACE 0x1
36 | #define CLA_CPU_SPACE 0x0
37 |
38 | //
39 | // MIER Interrupt Enable Register
40 | //
41 | #define CLA_INT_ENABLE 0x1
42 | #define CLA_INT_DISABLE 0x0
43 |
44 | //
45 | // Peripheral Interrupt Source Select define for DMAnCLASourceSelect Register
46 | //
47 | #define CLA_TRIG_NOPERPH 0
48 | #define CLA_TRIG_ADCAINT1 1
49 | #define CLA_TRIG_ADCAINT2 2
50 | #define CLA_TRIG_ADCAINT3 3
51 | #define CLA_TRIG_ADCAINT4 4
52 | #define CLA_TRIG_ADCAEVT 5
53 | #define CLA_TRIG_ADCBINT1 6
54 | #define CLA_TRIG_ADCBINT2 7
55 | #define CLA_TRIG_ADCBINT3 8
56 | #define CLA_TRIG_ADCBINT4 9
57 | #define CLA_TRIG_ADCBEVT 10
58 | #define CLA_TRIG_ADCCINT1 11
59 | #define CLA_TRIG_ADCCINT2 12
60 | #define CLA_TRIG_ADCCINT3 13
61 | #define CLA_TRIG_ADCCINT4 14
62 | #define CLA_TRIG_ADCCEVT 15
63 | #define CLA_TRIG_ADCDINT1 16
64 | #define CLA_TRIG_ADCDINT2 17
65 | #define CLA_TRIG_ADCDINT3 18
66 | #define CLA_TRIG_ADCDINT4 19
67 | #define CLA_TRIG_ADCDEVT 20
68 |
69 | #define CLA_TRIG_XINT1 29
70 | #define CLA_TRIG_XINT2 30
71 | #define CLA_TRIG_XINT3 31
72 | #define CLA_TRIG_XINT4 32
73 | #define CLA_TRIG_XINT5 33
74 |
75 | #define CLA_TRIG_EPWM1INT 36
76 | #define CLA_TRIG_EPWM2INT 37
77 | #define CLA_TRIG_EPWM3INT 38
78 | #define CLA_TRIG_EPWM4INT 39
79 | #define CLA_TRIG_EPWM5INT 40
80 | #define CLA_TRIG_EPWM6INT 41
81 | #define CLA_TRIG_EPWM7INT 42
82 | #define CLA_TRIG_EPWM8INT 43
83 | #define CLA_TRIG_EPWM9INT 44
84 | #define CLA_TRIG_EPWM10INT 45
85 | #define CLA_TRIG_EPWM11INT 46
86 | #define CLA_TRIG_EPWM12INT 47
87 |
88 | #define CLA_TRIG_TINT0 68
89 | #define CLA_TRIG_TINT1 69
90 | #define CLA_TRIG_TINT2 70
91 |
92 | #define CLA_TRIG_MXEVTA 71
93 | #define CLA_TRIG_MREVTA 72
94 | #define CLA_TRIG_MXEVTB 73
95 | #define CLA_TRIG_MREVTB 74
96 |
97 | #define CLA_TRIG_ECAP1INT 75
98 | #define CLA_TRIG_ECAP2INT 76
99 | #define CLA_TRIG_ECAP3INT 77
100 | #define CLA_TRIG_ECAP4INT 78
101 | #define CLA_TRIG_ECAP5INT 79
102 | #define CLA_TRIG_ECAP6INT 80
103 |
104 | #define CLA_TRIG_EQEP1INT 83
105 | #define CLA_TRIG_EQEP2INT 84
106 | #define CLA_TRIG_EQEP3INT 85
107 |
108 | #define CLA_TRIG_HRCAP1INT 87
109 | #define CLA_TRIG_HRCAP2INT 88
110 |
111 | #define CLA_TRIG_SD1INT 95
112 | #define CLA_TRIG_SD2INT 96
113 |
114 | #define CLA_TRIG_UPP1_INT 107
115 |
116 | #define CLA_TRIG_SPITXINTA 109
117 | #define CLA_TRIG_SPIRXINTA 110
118 | #define CLA_TRIG_SPITXINTB 111
119 | #define CLA_TRIG_SPIRXINTB 112
120 | #define CLA_TRIG_SPITXINTC 113
121 | #define CLA_TRIG_SPIRXINTC 114
122 |
123 | #define Cla1ForceTask1andWait()asm(" IACK #0x0001"); \
124 | asm(" RPT #3 || NOP"); \
125 | while(Cla1Regs.MIRUN.bit.INT1 == 1);
126 |
127 | #define Cla1ForceTask2andWait()asm(" IACK #0x0002"); \
128 | asm(" RPT #3 || NOP"); \
129 | while(Cla1Regs.MIRUN.bit.INT2 == 1);
130 |
131 | #define Cla1ForceTask3andWait()asm(" IACK #0x0004"); \
132 | asm(" RPT #3 || NOP"); \
133 | while(Cla1Regs.MIRUN.bit.INT3 == 1);
134 |
135 | #define Cla1ForceTask4andWait()asm(" IACK #0x0008"); \
136 | asm(" RPT #3 || NOP"); \
137 | while(Cla1Regs.MIRUN.bit.INT4 == 1);
138 |
139 | #define Cla1ForceTask5andWait()asm(" IACK #0x0010"); \
140 | asm(" RPT #3 || NOP"); \
141 | while(Cla1Regs.MIRUN.bit.INT5 == 1);
142 |
143 | #define Cla1ForceTask6andWait()asm(" IACK #0x0020"); \
144 | asm(" RPT #3 || NOP"); \
145 | while(Cla1Regs.MIRUN.bit.INT6 == 1);
146 |
147 | #define Cla1ForceTask7andWait()asm(" IACK #0x0040"); \
148 | asm(" RPT #3 || NOP"); \
149 | while(Cla1Regs.MIRUN.bit.INT7 == 1);
150 |
151 | #define Cla1ForceTask8andWait()asm(" IACK #0x0080"); \
152 | asm(" RPT #3 || NOP"); \
153 | while(Cla1Regs.MIRUN.bit.INT8 == 1);
154 |
155 | #define Cla1ForceTask1() asm(" IACK #0x0001")
156 | #define Cla1ForceTask2() asm(" IACK #0x0002")
157 | #define Cla1ForceTask3() asm(" IACK #0x0004")
158 | #define Cla1ForceTask4() asm(" IACK #0x0008")
159 | #define Cla1ForceTask5() asm(" IACK #0x0010")
160 | #define Cla1ForceTask6() asm(" IACK #0x0020")
161 | #define Cla1ForceTask7() asm(" IACK #0x0040")
162 | #define Cla1ForceTask8() asm(" IACK #0x0080")
163 |
164 | #ifdef __cplusplus
165 | }
166 | #endif
167 |
168 | #endif // - end of F2837xD_CLA_DEFINES_H
169 |
170 | //
171 | // End of file
172 | //
173 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Cla_typedefs.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Cla_typedefs.h
4 | //
5 | // TITLE: Variable type definitions
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_CLA_TYPEDEFS_H_
15 | #define F2837xD_CLA_TYPEDEFS_H_
16 |
17 | //
18 | // Macros to manipulate pre-processor to generate a header file name
19 | // at compile time that is based on the test name and can be used as
20 | // an argument to #include
21 | //
22 | #define XSTRINGIZE(s) STRINGIZE(s)
23 | #define STRINGIZE(s) #s
24 | #define XCONCAT(x,y) CONCAT(x,y)
25 | #define CONCAT(x,y) x##y
26 |
27 | //
28 | // Suppress warnings casting CLA pointers
29 | //
30 | #pragma diag_suppress 70,770,232
31 |
32 | #ifdef __TMS320C28XX_CLA__
33 | //
34 | // For Portability, User Is Recommended To Use Following Data Type Size
35 | // Definitions For 16-bit and 32-Bit Signed/Unsigned Integers:
36 | //
37 | // CLA does not support 64-bit types
38 | // This definition is only to allow inclusion of the standard header files
39 | // which do use 64-bit types
40 | //
41 |
42 | #if (!defined(F28_DATA_TYPES) && !defined(DSP28_DATA_TYPES))
43 | #define F28_DATA_TYPES
44 | #define DSP28_DATA_TYPES
45 | typedef short int16;
46 | typedef long int32;
47 | typedef unsigned char Uint8;
48 | typedef unsigned short Uint16;
49 | typedef unsigned long Uint32;
50 | typedef float float32;
51 | typedef long double float64;
52 | typedef struct { Uint32 low32; Uint32 high32; } Uint64;
53 | typedef struct { int32 low32; int32 high32; } int64;
54 | #else
55 | #error F2837xD_Cla_Typedefs.h must be included before F2837xD_Device.h or any other header \
56 | file that redefines data types using the guard macros F28_DATA_TYPES or DSP28_DATA_TYPES
57 | #endif //(!defined(F28_DATA_TYPES) && !defined(DSP28_DATA_TYPES))
58 |
59 | #ifndef _TI_STD_TYPES
60 | #define _TI_STD_TYPES
61 | //
62 | //These types are also defined in DSP/BIOS 5.x's and the
63 | //SYS/BIOS 6.x's files. We need to protect their
64 | //definition with the #ifndef/#define guard to avoid the duplicate
65 | //definition warning.
66 | //
67 | //SYS/BIOS requires that the file be included before
68 | //any other .h files.
69 | //
70 | #endif
71 |
72 | struct MSTF_SHADOW_BITS { // bits description
73 | Uint16 LVF:1; // 0 Latched Overflow Flag
74 | Uint16 LUF:1; // 1 Latched Underflow Flag
75 | Uint16 NF:1; // 2 Negative Float Flag
76 | Uint16 ZF:1; // 3 Zero Float Flag
77 | Uint16 rsvd1:2; // 5:4 Reserved
78 | Uint16 TF:1; // 6 Test Flag
79 | Uint16 rsvd2:2; // 8:7 Reserved
80 | Uint16 RNDF32:1; // 9 Rounding Mode
81 | Uint16 rsvd3:1; // 10 Reserved
82 | Uint16 MEALLOW:1; // 11 MEALLOW Status
83 | Uint16 RPCL:4; // 15:12 Return PC: Low Portion
84 | Uint16 RPCH:8; // 23:16 Return PC: High Portion
85 | Uint16 rsvd4:8; // 31:24 Reserved
86 | };
87 | extern __cregister volatile unsigned int MSTF;
88 |
89 | #endif //__TMS320C28XX_CLA__
90 |
91 | #ifndef __TMS320C28XX__
92 | #define __cregister
93 | #endif //__TMS320C28xx__
94 |
95 | #endif //F2837xD_CLA_TYPEDEFS_H_
96 |
97 | //
98 | // End of file
99 | //
100 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_CodeStartBranch.asm:
--------------------------------------------------------------------------------
1 | ;//###########################################################################
2 | ;//
3 | ;// FILE: F2837xD_CodeStartBranch.asm
4 | ;//
5 | ;// TITLE: Branch for redirecting code execution after boot.
6 | ;//
7 | ;// For these examples, code_start is the first code that is executed after
8 | ;// exiting the boot ROM code.
9 | ;//
10 | ;// The codestart section in the linker cmd file is used to physically place
11 | ;// this code at the correct memory location. This section should be placed
12 | ;// at the location the BOOT ROM will re-direct the code to. For example,
13 | ;// for boot to FLASH this code will be located at 0x3f7ff6.
14 | ;//
15 | ;// In addition, the example F2837xD projects are setup such that the codegen
16 | ;// entry point is also set to the code_start label. This is done by linker
17 | ;// option -e in the project build options. When the debugger loads the code,
18 | ;// it will automatically set the PC to the "entry point" address indicated by
19 | ;// the -e linker option. In this case the debugger is simply assigning the PC,
20 | ;// it is not the same as a full reset of the device.
21 | ;//
22 | ;// The compiler may warn that the entry point for the project is other then
23 | ;// _c_init00. _c_init00 is the C environment setup and is run before
24 | ;// main() is entered. The code_start code will re-direct the execution
25 | ;// to _c_init00 and thus there is no worry and this warning can be ignored.
26 | ;//
27 | ;//###########################################################################
28 | ;// $TI Release: F2837xD Support Library v210 $
29 | ;// $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
30 | ;// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
31 | ;// http://www.ti.com/ ALL RIGHTS RESERVED $
32 | ;//###########################################################################
33 |
34 | ***********************************************************************
35 |
36 | WD_DISABLE .set 0 ;set to 1 to disable WD, else set to 0
37 |
38 | .ref _c_int00
39 | .global code_start
40 |
41 | ***********************************************************************
42 | * Function: codestart section
43 | *
44 | * Description: Branch to code starting point
45 | ***********************************************************************
46 |
47 | .sect "codestart"
48 |
49 | code_start:
50 | .if WD_DISABLE == 1
51 | LB wd_disable ;Branch to watchdog disable code
52 | .else
53 | LB _c_int00 ;Branch to start of boot._asm in RTS library
54 | .endif
55 |
56 | ;end codestart section
57 |
58 | ***********************************************************************
59 | * Function: wd_disable
60 | *
61 | * Description: Disables the watchdog timer
62 | ***********************************************************************
63 | .if WD_DISABLE == 1
64 |
65 | .text
66 | wd_disable:
67 | SETC OBJMODE ;Set OBJMODE for 28x object code
68 | EALLOW ;Enable EALLOW protected register access
69 | MOVZ DP, #7029h>>6 ;Set data page for WDCR register
70 | MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
71 | EDIS ;Disable EALLOW protected register access
72 | LB _c_int00 ;Branch to start of boot._asm in RTS library
73 |
74 | .endif
75 |
76 | ;end wd_disable
77 |
78 | .end
79 |
80 | ;//
81 | ;// End of file.
82 | ;//
83 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_CpuTimers.c:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_CpuTimers.c
4 | //
5 | // TITLE: CPU 32-bit Timers Initialization & Support Functions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h"
18 | #include "F2837xD_Examples.h"
19 |
20 | //
21 | // Globals
22 | //
23 | struct CPUTIMER_VARS CpuTimer0;
24 | struct CPUTIMER_VARS CpuTimer1;
25 | struct CPUTIMER_VARS CpuTimer2;
26 |
27 | //
28 | // InitCpuTimers - This function initializes all three CPU timers to a known
29 | // state.
30 | //
31 | void InitCpuTimers(void)
32 | {
33 | //
34 | // CPU Timer 0
35 | // Initialize address pointers to respective timer registers:
36 | //
37 | CpuTimer0.RegsAddr = &CpuTimer0Regs;
38 |
39 | //
40 | // Initialize timer period to maximum:
41 | //
42 | CpuTimer0Regs.PRD.all = 0xFFFFFFFF;
43 |
44 | //
45 | // Initialize pre-scale counter to divide by 1 (SYSCLKOUT):
46 | //
47 | CpuTimer0Regs.TPR.all = 0;
48 | CpuTimer0Regs.TPRH.all = 0;
49 |
50 | //
51 | // Make sure timer is stopped:
52 | //
53 | CpuTimer0Regs.TCR.bit.TSS = 1;
54 |
55 | //
56 | // Reload all counter register with period value:
57 | //
58 | CpuTimer0Regs.TCR.bit.TRB = 1;
59 |
60 | //
61 | // Reset interrupt counters:
62 | //
63 | CpuTimer0.InterruptCount = 0;
64 |
65 | //
66 | // Initialize address pointers to respective timer registers:
67 | //
68 | CpuTimer1.RegsAddr = &CpuTimer1Regs;
69 | CpuTimer2.RegsAddr = &CpuTimer2Regs;
70 |
71 | //
72 | // Initialize timer period to maximum:
73 | //
74 | CpuTimer1Regs.PRD.all = 0xFFFFFFFF;
75 | CpuTimer2Regs.PRD.all = 0xFFFFFFFF;
76 |
77 | //
78 | // Initialize pre-scale counter to divide by 1 (SYSCLKOUT):
79 | //
80 | CpuTimer1Regs.TPR.all = 0;
81 | CpuTimer1Regs.TPRH.all = 0;
82 | CpuTimer2Regs.TPR.all = 0;
83 | CpuTimer2Regs.TPRH.all = 0;
84 |
85 | //
86 | // Make sure timers are stopped:
87 | //
88 | CpuTimer1Regs.TCR.bit.TSS = 1;
89 | CpuTimer2Regs.TCR.bit.TSS = 1;
90 |
91 | //
92 | // Reload all counter register with period value:
93 | //
94 | CpuTimer1Regs.TCR.bit.TRB = 1;
95 | CpuTimer2Regs.TCR.bit.TRB = 1;
96 |
97 | //
98 | // Reset interrupt counters:
99 | //
100 | CpuTimer1.InterruptCount = 0;
101 | CpuTimer2.InterruptCount = 0;
102 | }
103 |
104 | //
105 | // ConfigCpuTimer - This function initializes the selected timer to the period
106 | // specified by the "Freq" and "Period" parameters. The "Freq"
107 | // is entered as "MHz" and the period in "uSeconds". The timer
108 | // is held in the stopped state after configuration.
109 | //
110 | void ConfigCpuTimer(struct CPUTIMER_VARS *Timer, float Freq, float Period)
111 | {
112 | Uint32 temp;
113 |
114 | //
115 | // Initialize timer period:
116 | //
117 | Timer->CPUFreqInMHz = Freq;
118 | Timer->PeriodInUSec = Period;
119 | temp = (long) (Freq * Period);
120 |
121 | //
122 | // Counter decrements PRD+1 times each period
123 | //
124 | Timer->RegsAddr->PRD.all = temp - 1;
125 |
126 | //
127 | // Set pre-scale counter to divide by 1 (SYSCLKOUT):
128 | //
129 | Timer->RegsAddr->TPR.all = 0;
130 | Timer->RegsAddr->TPRH.all = 0;
131 |
132 | //
133 | // Initialize timer control register:
134 | //
135 | Timer->RegsAddr->TCR.bit.TSS = 1; // 1 = Stop timer, 0 = Start/Restart
136 | // Timer
137 | Timer->RegsAddr->TCR.bit.TRB = 1; // 1 = reload timer
138 | Timer->RegsAddr->TCR.bit.SOFT = 0;
139 | Timer->RegsAddr->TCR.bit.FREE = 0; // Timer Free Run Disabled
140 | Timer->RegsAddr->TCR.bit.TIE = 1; // 0 = Disable/ 1 = Enable Timer
141 | // Interrupt
142 |
143 | //
144 | // Reset interrupt counter:
145 | //
146 | Timer->InterruptCount = 0;
147 | }
148 |
149 |
150 | //
151 | // End of file
152 | //
153 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_DBGIER.asm:
--------------------------------------------------------------------------------
1 | ;//###########################################################################
2 | ;//
3 | ;// FILE: F2837xD_DBGIER.asm
4 | ;//
5 | ;// TITLE: Set the DBGIER register
6 | ;//
7 | ;// DESCRIPTION:
8 | ;//
9 | ;// Function to set the DBGIER register (for realtime emulation).
10 | ;// Function Prototype: void SetDBGIER(Uint16)
11 | ;// Usage: SetDBGIER(value);
12 | ;// Input Parameters: Uint16 value = value to put in DBGIER register.
13 | ;// Return Value: none
14 | ;//
15 | ;//###########################################################################
16 | ;// $TI Release: F2837xD Support Library v210 $
17 | ;// $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
18 | ;// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
19 | ;// http://www.ti.com/ ALL RIGHTS RESERVED $
20 | ;//###########################################################################
21 | .global _SetDBGIER
22 | .text
23 |
24 | _SetDBGIER:
25 | MOV *SP++,AL
26 | POP DBGIER
27 | LRETR
28 |
29 | ;//
30 | ;// End of file
31 | ;//
32 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Dma_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Dma_defines.h
4 | //
5 | // TITLE: #defines used in DMA examples
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_DMA_DEFINES_H
15 | #define F2837xD_DMA_DEFINES_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Defines
23 | //
24 |
25 | //
26 | // PERINTSEL bits
27 | //
28 | #define DMA_ADCAINT1 1
29 | #define DMA_ADCAINT2 2
30 | #define DMA_ADCAINT3 3
31 | #define DMA_ADCAINT4 4
32 | #define DMA_ADCAEVT 5
33 | #define DMA_ADCBINT1 6
34 | #define DMA_ADCBINT2 7
35 | #define DMA_ADCBINT3 8
36 | #define DMA_ADCBINT4 9
37 | #define DMA_ADCBEVT 10
38 | #define DMA_ADCCINT1 11
39 | #define DMA_ADCCINT2 12
40 | #define DMA_ADCCINT3 13
41 | #define DMA_ADCCINT4 14
42 | #define DMA_ADCCEVT 15
43 | #define DMA_ADCDINT1 16
44 | #define DMA_ADCDINT2 17
45 | #define DMA_ADCDINT3 18
46 | #define DMA_ADCDINT4 19
47 | #define DMA_ADCDEVT 20
48 |
49 | #define DMA_XINT1 29
50 | #define DMA_XINT2 30
51 | #define DMA_XINT3 31
52 | #define DMA_XINT4 32
53 | #define DMA_XINT5 33
54 |
55 | #define DMA_EPWM1A 36
56 | #define DMA_EPWM1B 37
57 | #define DMA_EPWM2A 38
58 | #define DMA_EPWM2B 39
59 | #define DMA_EPWM3A 40
60 | #define DMA_EPWM3B 41
61 | #define DMA_EPWM4A 42
62 | #define DMA_EPWM4B 43
63 | #define DMA_EPWM5A 44
64 | #define DMA_EPWM5B 45
65 | #define DMA_EPWM6A 46
66 | #define DMA_EPWM6B 47
67 | #define DMA_EPWM7A 48
68 | #define DMA_EPWM7B 49
69 | #define DMA_EPWM8A 50
70 | #define DMA_EPWM8B 51
71 | #define DMA_EPWM9A 52
72 | #define DMA_EPWM9B 53
73 | #define DMA_EPWM10A 54
74 | #define DMA_EPWM10B 55
75 | #define DMA_EPWM11A 56
76 | #define DMA_EPWM11B 57
77 | #define DMA_EPWM12A 58
78 | #define DMA_EPWM12B 59
79 | #define DMA_EPWM13A 60
80 | #define DMA_EPWM13B 61
81 | #define DMA_EPWM14A 62
82 | #define DMA_EPWM14B 63
83 | #define DMA_EPWM15A 64
84 | #define DMA_EPWM15B 65
85 | #define DMA_EPWM16A 66
86 | #define DMA_EPWM16B 67
87 |
88 | #define DMA_TINT0 68
89 | #define DMA_TINT1 69
90 | #define DMA_TINT2 70
91 |
92 | #define DMA_MXEVTA 71
93 | #define DMA_MREVTA 72
94 | #define DMA_MXEVTB 73
95 | #define DMA_MREVTB 74
96 |
97 | #define DMA_SD1FLT1 95
98 | #define DMA_SD1FLT2 96
99 | #define DMA_SD1FLT3 97
100 | #define DMA_SD1FLT4 98
101 |
102 | #define DMA_SD2FLT1 99
103 | #define DMA_SD2FLT2 100
104 | #define DMA_SD2FLT3 101
105 | #define DMA_SD2FLT4 102
106 |
107 | #define DMA_SPIATX 109
108 | #define DMA_SPIARX 110
109 | #define DMA_SPIBTX 111
110 | #define DMA_SPIBRX 112
111 | #define DMA_SPICTX 113
112 | #define DMA_SPICRX 114
113 |
114 | #define DMA_USBRX1 131
115 | #define DMA_USBTX1 132
116 | #define DMA_USBRX2 133
117 | #define DMA_USBTX2 134
118 | #define DMA_USBRX3 135
119 | #define DMA_USBTX3 136
120 |
121 | //
122 | // OVERINTE bit
123 | //
124 | #define OVRFLOW_DISABLE 0x0
125 | #define OVEFLOW_ENABLE 0x1
126 |
127 | //
128 | // PERINTE bit
129 | //
130 | #define PERINT_DISABLE 0x0
131 | #define PERINT_ENABLE 0x1
132 |
133 | //
134 | // CHINTMODE bits
135 | //
136 | #define CHINT_BEGIN 0x0
137 | #define CHINT_END 0x1
138 |
139 | //
140 | // ONESHOT bits
141 | //
142 | #define ONESHOT_DISABLE 0x0
143 | #define ONESHOT_ENABLE 0x1
144 |
145 | //
146 | // CONTINOUS bit
147 | //
148 | #define CONT_DISABLE 0x0
149 | #define CONT_ENABLE 0x1
150 |
151 | //
152 | // SYNCE bit
153 | //
154 | #define SYNC_DISABLE 0x0
155 | #define SYNC_ENABLE 0x1
156 |
157 | //
158 | // SYNCSEL bit
159 | //
160 | #define SYNC_SRC 0x0
161 | #define SYNC_DST 0x1
162 |
163 | //
164 | // DATASIZE bit
165 | //
166 | #define SIXTEEN_BIT 0x0
167 | #define THIRTYTWO_BIT 0x1
168 |
169 | //
170 | // CHINTE bit
171 | //
172 | #define CHINT_DISABLE 0x0
173 | #define CHINT_ENABLE 0x1
174 |
175 | #ifdef __cplusplus
176 | }
177 | #endif
178 |
179 | #endif // - end of F2837xD_DMA_DEFINES_H
180 |
181 | //
182 | // End of file
183 | //
184 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_ECap.c:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_ECap.c
4 | //
5 | // TITLE: F2837xD eCAP Initialization & Support Functions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h"
18 | #include "F2837xD_Examples.h"
19 |
20 | //
21 | // InitECap - This function initializes the eCAP(s) to a known state.
22 | //
23 | void InitECap(void)
24 | {
25 | // Initialize eCAP1/2/3/4/5/6
26 |
27 | //tbd...
28 | }
29 |
30 | //
31 | // InitECapGpio - This function initializes GPIO pins to function as ECAP pins
32 | // Each GPIO pin can be configured as a GPIO pin or up to 3
33 | // different peripheral functional pins. By default all pins
34 | // come up as GPIO inputs after reset.
35 | // Caution:
36 | // For each eCAP peripheral
37 | // Only one GPIO pin should be enabled for ECAP operation.
38 | // Comment out other unwanted lines.
39 | //
40 | void InitECapGpio()
41 | {
42 | }
43 |
44 | //
45 | // InitECap1Gpio - Initialize ECAP1 GPIOs
46 | //
47 | void InitECap1Gpio(Uint16 pin)
48 | {
49 | EALLOW;
50 | InputXbarRegs.INPUT7SELECT = pin; // Set eCAP1 source to GPIO-pin
51 | EDIS;
52 | }
53 |
54 | //
55 | // InitECap2Gpio - Initialize ECAP2 GPIOs
56 | //
57 | void InitECap2Gpio(Uint16 pin)
58 | {
59 | EALLOW;
60 | InputXbarRegs.INPUT8SELECT = pin; // Set eCAP2 source to GPIO-pin
61 | EDIS;
62 | }
63 |
64 | //
65 | // InitECap3Gpio - Initialize ECAP3 GPIOs
66 | //
67 | void InitECap3Gpio(Uint16 pin)
68 | {
69 | EALLOW;
70 | InputXbarRegs.INPUT9SELECT = pin; // Set eCAP3 source to GPIO-pin
71 | EDIS;
72 | }
73 |
74 | //
75 | // InitECap4Gpio - Initialize ECAP4 GPIOs
76 | //
77 | void InitECap4Gpio(Uint16 pin)
78 | {
79 | EALLOW;
80 | InputXbarRegs.INPUT10SELECT = pin; // Set eCAP4 source to GPIO-pin
81 | EDIS;
82 | }
83 |
84 | //
85 | // InitECap5Gpio - Initialize ECAP5 GPIOs
86 | //
87 | void InitECap5Gpio(Uint16 pin)
88 | {
89 | EALLOW;
90 | InputXbarRegs.INPUT11SELECT = pin; // Set eCAP5 source to GPIO-pin
91 | EDIS;
92 | }
93 |
94 | //
95 | // InitECap6Gpio - Initialize ECAP6 GPIOs
96 | //
97 | void InitECap6Gpio(Uint16 pin)
98 | {
99 | EALLOW;
100 | InputXbarRegs.INPUT12SELECT = pin; // Set eCAP6 source to GPIO-pin
101 | EDIS;
102 | }
103 |
104 | //
105 | // InitAPwm1Gpio - Initialize EPWM1 GPIOs
106 | //
107 | void InitAPwm1Gpio()
108 | {
109 | EALLOW;
110 | OutputXbarRegs.OUTPUT3MUX0TO15CFG.bit.MUX0 = 3; // Select ECAP1.OUT on Mux0
111 | OutputXbarRegs.OUTPUT3MUXENABLE.bit.MUX0 = 1; // Enable MUX0 for ECAP1.OUT
112 | GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 3; // Select OUTPUTXBAR3 on GPIO5
113 | EDIS;
114 | }
115 |
116 | //
117 | // End of file
118 | //
119 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_EQep_defines.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_peripheral/F2837xD_EQep_defines.h
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Gpio_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Gpio_defines.h
4 | //
5 | // TITLE: F2837xD GPIO support definitions
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_GPIO_DEFINES_H
15 | #define F2837xD_GPIO_DEFINES_H
16 |
17 | //
18 | // Defines
19 | //
20 |
21 | //
22 | //CPU pin masters for GPIO_SelectPinMux()
23 | //
24 | #define GPIO_MUX_CPU1 0x0
25 | #define GPIO_MUX_CPU1CLA 0x1
26 | #define GPIO_MUX_CPU2 0x2
27 | #define GPIO_MUX_CPU2CLA 0x3
28 |
29 | //
30 | //Flags for GPIO_SetupPinOptions(). The qualification flags (SYNC, QUAL3,
31 | //QUAL6, and ASYNC) take up two bits and must be in the order specified.
32 | //
33 | #define GPIO_INPUT 0
34 | #define GPIO_OUTPUT 1
35 | #define GPIO_PUSHPULL 0
36 | #define GPIO_PULLUP (1 << 0)
37 | #define GPIO_INVERT (1 << 1)
38 | #define GPIO_OPENDRAIN (1 << 2)
39 | #define GPIO_SYNC (0x0 << 4)
40 | #define GPIO_QUAL3 (0x1 << 4)
41 | #define GPIO_QUAL6 (0x2 << 4)
42 | #define GPIO_ASYNC (0x3 << 4)
43 |
44 | //
45 | //Flags for GPIO_SetupLock().
46 | //
47 | #define GPIO_UNLOCK 0
48 | #define GPIO_LOCK 1
49 |
50 | //
51 | //Commands for the CPU2->CPU1 GPIO configuration interrupt handler
52 | //
53 | #define GPIO_CMD_INIT 1L
54 | #define GPIO_CMD_PINMUX 2L
55 | #define GPIO_CMD_PINOPTS 3L
56 | #define GPIO_CMD_WRITE32 4L
57 | #define GPIO_CMD_WRITE16 5L
58 | #define GPIO_CMD_READ32 6L
59 | #define GPIO_CMD_READ16 7L
60 |
61 | //
62 | //Helpful constants for array-based access to GPIO registers
63 | //
64 | #define GPY_CTRL_OFFSET (0x40/2)
65 | #define GPY_DATA_OFFSET (0x8/2)
66 |
67 | #define GPYQSEL (0x2/2)
68 | #define GPYMUX (0x6/2)
69 | #define GPYDIR (0xA/2)
70 | #define GPYPUD (0xC/2)
71 | #define GPYINV (0x10/2)
72 | #define GPYODR (0x12/2)
73 | #define GPYGMUX (0x20/2)
74 | #define GPYCSEL (0x28/2)
75 | #define GPYLOCK (0x3C/2)
76 | #define GPYCR (0x3E/2)
77 |
78 | #define GPYDAT (0x0/2)
79 | #define GPYSET (0x2/2)
80 | #define GPYCLEAR (0x4/2)
81 | #define GPYTOGGLE (0x6/2)
82 |
83 | #endif // end of F2837xD_GPIO_DEFINES_H definition
84 |
85 | //
86 | // End of file
87 | //
88 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_I2c_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_I2c_defines.h
4 | //
5 | // TITLE: F2837xD I2C Common Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_I2C_DEFINES_H
15 | #define F2837xD_I2C_DEFINES_H
16 |
17 | //
18 | // Defines
19 | //
20 |
21 | //
22 | // Error Messages
23 | //
24 | #define I2C_ERROR 0xFFFF
25 | #define I2C_ARB_LOST_ERROR 0x0001
26 | #define I2C_NACK_ERROR 0x0002
27 | #define I2C_BUS_BUSY_ERROR 0x1000
28 | #define I2C_STP_NOT_READY_ERROR 0x5555
29 | #define I2C_NO_FLAGS 0xAAAA
30 | #define I2C_SUCCESS 0x0000
31 |
32 | //
33 | // Clear Status Flags
34 | //
35 | #define I2C_CLR_AL_BIT 0x0001
36 | #define I2C_CLR_NACK_BIT 0x0002
37 | #define I2C_CLR_ARDY_BIT 0x0004
38 | #define I2C_CLR_RRDY_BIT 0x0008
39 | #define I2C_CLR_SCD_BIT 0x0020
40 |
41 | //
42 | // Interrupt Source Messages
43 | //
44 | #define I2C_NO_ISRC 0x0000
45 | #define I2C_ARB_ISRC 0x0001
46 | #define I2C_NACK_ISRC 0x0002
47 | #define I2C_ARDY_ISRC 0x0003
48 | #define I2C_RX_ISRC 0x0004
49 | #define I2C_TX_ISRC 0x0005
50 | #define I2C_SCD_ISRC 0x0006
51 | #define I2C_AAS_ISRC 0x0007
52 |
53 | //
54 | // I2CMSG structure defines
55 | //
56 | #define I2C_NO_STOP 0
57 | #define I2C_YES_STOP 1
58 | #define I2C_RECEIVE 0
59 | #define I2C_TRANSMIT 1
60 | #define I2C_MAX_BUFFER_SIZE 4
61 |
62 | //
63 | // I2C Slave State defines
64 | //
65 | #define I2C_NOTSLAVE 0
66 | #define I2C_ADDR_AS_SLAVE 1
67 | #define I2C_ST_MSG_READY 2
68 |
69 | //
70 | // I2C Slave Receiver messages defines
71 | //
72 | #define I2C_SND_MSG1 1
73 | #define I2C_SND_MSG2 2
74 |
75 | //
76 | // I2C State defines
77 | //
78 | #define I2C_IDLE 0
79 | #define I2C_SLAVE_RECEIVER 1
80 | #define I2C_SLAVE_TRANSMITTER 2
81 | #define I2C_MASTER_RECEIVER 3
82 | #define I2C_MASTER_TRANSMITTER 4
83 |
84 | //
85 | // I2C Message Commands for I2CMSG struct
86 | //
87 | #define I2C_MSGSTAT_INACTIVE 0x0000
88 | #define I2C_MSGSTAT_SEND_WITHSTOP 0x0010
89 | #define I2C_MSGSTAT_WRITE_BUSY 0x0011
90 | #define I2C_MSGSTAT_SEND_NOSTOP 0x0020
91 | #define I2C_MSGSTAT_SEND_NOSTOP_BUSY 0x0021
92 | #define I2C_MSGSTAT_RESTART 0x0022
93 | #define I2C_MSGSTAT_READ_BUSY 0x0023
94 |
95 | //
96 | // Generic defines
97 | //
98 | #define I2C_TRUE 1
99 | #define I2C_FALSE 0
100 | #define I2C_YES 1
101 | #define I2C_NO 0
102 | #define I2C_DUMMY_BYTE 0
103 |
104 |
105 | //
106 | // These are the Defines to select I2C pin muxing when calling the functions
107 | // I2cAGpioConfig() & I2cBGpioConfig() in F2837xD_I2C.c
108 | //
109 | #define I2C_A_GPIO0_GPIO1 1 //switch case 1
110 | #define I2C_A_GPIO32_GPIO33 2 //switch case 2
111 | #define I2C_A_GPIO42_GPIO43 3 //switch case 3
112 | #define I2C_A_GPIO91_GPIO92 4 //switch case 4
113 | #define I2C_A_GPIO63104_GPIO105 5 //switch case 5
114 |
115 | #define I2C_B_GPIO2_GPIO3 1 //switch case 1
116 | #define I2C_B_GPIO134_GPIO35 2 //switch case 2
117 | #define I2C_B_GPIO40_GPIO41 3 //switch case 3
118 | #define I2C_B_GPIO66_GPIO69 4 //switch case 4
119 |
120 | //
121 | // Globals
122 | //
123 |
124 | //
125 | // I2C Message Structure
126 | //
127 | struct I2CMSG {
128 | Uint16 MsgStatus; // Word stating what state msg is in:
129 | // I2C_MSGCMD_INACTIVE = do not send msg
130 | // I2C_MSGCMD_BUSY = msg start has been sent,
131 | // awaiting stop
132 | // I2C_MSGCMD_SEND_WITHSTOP = command to send
133 | // master trans msg complete with a stop bit
134 | // I2C_MSGCMD_SEND_NOSTOP = command to send
135 | // master trans msg without the stop bit
136 | // I2C_MSGCMD_RESTART = command to send a
137 | // restart as a master receiver with a
138 | // stop bit
139 | Uint16 SlaveAddress; // I2C address of slave msg is intended for
140 | Uint16 NumOfBytes; // Num of valid bytes in (or to be put
141 | // in MsgBuffer)
142 | Uint16 MemoryHighAddr; // EEPROM address of data associated with
143 | // msg (high byte)
144 | Uint16 MemoryLowAddr; // EEPROM address of data associated with
145 | // msg (low byte)
146 | Uint16 MsgBuffer[I2C_MAX_BUFFER_SIZE]; // Array holding msg data - max that
147 | // MAX_BUFFER_SIZE can be is 16 due
148 | // to the FIFO's
149 | };
150 |
151 | #endif // end of F2837xD_I2C_DEFINES_H definition
152 |
153 | //
154 | // End of file
155 | //
156 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Ipc_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Ipc_defines.h
4 | //
5 | // TITLE: F2837xD IPC support definitions
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_IPC_DEFINES_H
15 | #define F2837xD_IPC_DEFINES_H
16 |
17 | //
18 | // Defines
19 | //
20 | #define C1TOC2_MSG_RAM ((void *)0x3FC00)
21 | #define C2TOC1_MSG_RAM ((void *)0x3F800)
22 |
23 | #if defined(CPU1)
24 | #define SEND_MSG_RAM C1TOC2_MSG_RAM
25 | #define RECV_MSG_RAM C2TOC1_MSG_RAM
26 | #elif defined(CPU2)
27 | #define SEND_MSG_RAM C2TOC1_MSG_RAM
28 | #define RECV_MSG_RAM C1TOC2_MSG_RAM
29 | #endif
30 | #define MSG_RAM_SIZE 0x400
31 |
32 | //
33 | //Used with SendIpcData() and SendIpcCommand() to avoid setting a flag
34 | //
35 | #define NO_IPC_FLAG 32
36 |
37 | #endif // end of F2837xD_IPC_DEFINES_H definition
38 |
39 | //
40 | // End of file
41 | //
42 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_PieCtrl.c:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_PieCtrl.c
4 | //
5 | // TITLE: F2837xD Device PIE Control Register Initialization Functions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h" // F2837xD Headerfile Include File
18 | #include "F2837xD_Examples.h" // F2837xD Examples Include File
19 |
20 | //
21 | // InitPieCtrl - This function initializes the PIE control registers to a
22 | // known state.
23 | //
24 | void InitPieCtrl(void)
25 | {
26 | //
27 | // Disable Interrupts at the CPU level:
28 | //
29 | DINT;
30 |
31 | //
32 | // Disable the PIE
33 | //
34 | PieCtrlRegs.PIECTRL.bit.ENPIE = 0;
35 |
36 | //
37 | // Clear all PIEIER registers:
38 | //
39 | PieCtrlRegs.PIEIER1.all = 0;
40 | PieCtrlRegs.PIEIER2.all = 0;
41 | PieCtrlRegs.PIEIER3.all = 0;
42 | PieCtrlRegs.PIEIER4.all = 0;
43 | PieCtrlRegs.PIEIER5.all = 0;
44 | PieCtrlRegs.PIEIER6.all = 0;
45 | PieCtrlRegs.PIEIER7.all = 0;
46 | PieCtrlRegs.PIEIER8.all = 0;
47 | PieCtrlRegs.PIEIER9.all = 0;
48 | PieCtrlRegs.PIEIER10.all = 0;
49 | PieCtrlRegs.PIEIER11.all = 0;
50 | PieCtrlRegs.PIEIER12.all = 0;
51 |
52 | //
53 | // Clear all PIEIFR registers:
54 | //
55 | PieCtrlRegs.PIEIFR1.all = 0;
56 | PieCtrlRegs.PIEIFR2.all = 0;
57 | PieCtrlRegs.PIEIFR3.all = 0;
58 | PieCtrlRegs.PIEIFR4.all = 0;
59 | PieCtrlRegs.PIEIFR5.all = 0;
60 | PieCtrlRegs.PIEIFR6.all = 0;
61 | PieCtrlRegs.PIEIFR7.all = 0;
62 | PieCtrlRegs.PIEIFR8.all = 0;
63 | PieCtrlRegs.PIEIFR9.all = 0;
64 | PieCtrlRegs.PIEIFR10.all = 0;
65 | PieCtrlRegs.PIEIFR11.all = 0;
66 | PieCtrlRegs.PIEIFR12.all = 0;
67 | }
68 |
69 | //
70 | // EnableInterrupts - This function enables the PIE module and CPU __interrupts
71 | //
72 | void EnableInterrupts()
73 | {
74 | //
75 | // Enable the PIE
76 | //
77 | PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
78 |
79 | //
80 | // Enables PIE to drive a pulse into the CPU
81 | //
82 | PieCtrlRegs.PIEACK.all = 0xFFFF;
83 |
84 | //
85 | // Enable Interrupts at the CPU level
86 | //
87 | EINT;
88 | }
89 |
90 | //
91 | // End of file
92 | //
93 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Pie_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Pie_defines.h
4 | //
5 | // TITLE: #defines used in PIE examples
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_PIE_DEFINES_H
15 | #define F2837xD_PIE_DEFINES_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Defines
23 | //
24 | #define PIEACK_GROUP1 0x0001
25 | #define PIEACK_GROUP2 0x0002
26 | #define PIEACK_GROUP3 0x0004
27 | #define PIEACK_GROUP4 0x0008
28 | #define PIEACK_GROUP5 0x0010
29 | #define PIEACK_GROUP6 0x0020
30 | #define PIEACK_GROUP7 0x0040
31 | #define PIEACK_GROUP8 0x0080
32 | #define PIEACK_GROUP9 0x0100
33 | #define PIEACK_GROUP10 0x0200
34 | #define PIEACK_GROUP11 0x0400
35 | #define PIEACK_GROUP12 0x0800
36 |
37 | #ifdef __cplusplus
38 | }
39 | #endif /* extern "C" */
40 |
41 | #endif // - end of F2837xD_PIE_DEFINES_H
42 |
43 | //
44 | // End of file
45 | //
46 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Sci.c:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_peripheral/F2837xD_Sci.c
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/User_peripheral/F2837xD_Spi.c:
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https://raw.githubusercontent.com/horychen/ProjectPanGu-C/77be76304f172f655c3d92afb6d777d5fc1e4f0d/User_peripheral/F2837xD_Spi.c
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/User_peripheral/F2837xD_SysCtrl_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_SysCtrl_defines.h
4 | //
5 | // TITLE: F2837xD LPM support definitions
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_SYSCTRL_DEFINES_H
15 | #define F2837xD_SYSCTRL_DEFINES_H
16 |
17 | //
18 | // Defines
19 | //
20 | #define LPM_IDLE 0x0
21 | #define LPM_STANDBY 0x1
22 | #define LPM_HALT 0x2
23 | #define LPM_HIB 0x3
24 |
25 | //
26 | //Key value used for write access to the flash pump semaphore register
27 | //
28 | #define IPC_PUMP_KEY 0x5a5a0000
29 |
30 | #endif // end of F2837xD_SYSCTRL_DEFINES_H definition
31 |
32 | //
33 | // End of file
34 | //
35 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Systick_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: systick.h
4 | //
5 | // TITLE: Stellaris style wrapper driver for C28x CPU Timer 0.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef __SYSTICK_H__
15 | #define __SYSTICK_H__
16 |
17 | //
18 | // If building with a C++ compiler, make all of the definitions in this header
19 | // have a C binding.
20 | //
21 | #ifdef __cplusplus
22 | extern "C"
23 | {
24 | #endif
25 |
26 | //
27 | // Function Prototypes
28 | //
29 | extern void SysTickInit(void);
30 | extern void SysTickEnable(void);
31 | extern void SysTickDisable(void);
32 | extern void SysTickIntRegister(void (*pfnHandler)(void));
33 | extern void SysTickIntUnregister(void);
34 | extern void SysTickIntEnable(void);
35 | extern void SysTickIntDisable(void);
36 | extern void SysTickPeriodSet(unsigned long ulPeriod);
37 | extern unsigned long SysTickPeriodGet(void);
38 | extern unsigned long SysTickValueGet(void);
39 |
40 | //
41 | // Mark the end of the C bindings section for C++ compilers.
42 | //
43 | #ifdef __cplusplus
44 | }
45 | #endif
46 |
47 | #endif // __SYSTICK_H__
48 |
49 | //
50 | // End of file
51 | //
52 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_TempSensorConv.c:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_TempSensorConv.c
4 | //
5 | // TITLE: F2837xD Temperature Sensor Conversion Functions
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h"
18 | #include "F2837xD_Examples.h"
19 |
20 | //
21 | // Defines
22 | //
23 | #define FP_SCALE 32768 //Scale factor for Q15 fixed point numbers (2^15)
24 | #define FP_ROUND FP_SCALE/2 //Added to Q15 numbers before converting to
25 | //integer to round the number.
26 | #define KELVIN 273 // Amount to add to Q15 fixed point numbers
27 | // to shift from Celsius to Kelvin
28 | // (Converting guarantees number is
29 | // positive, which makes rounding more
30 | // efficient)
31 | #define KELVIN_OFF FP_SCALE*KELVIN
32 | #define getTempSlope() (*(int (*)(void))0x7036E)() //Slope of temperature sensor
33 | //(deg. C / ADC code).
34 | //Stored in fixed point Q15
35 | //format.
36 | #define getTempOffset() (*(int (*)(void))0x70372)() //ADC code corresponding to
37 | //temperature sensor output
38 | //at 0 deg. C
39 |
40 | //
41 | // Globals
42 | //
43 | float32 tempSensor_tempSlope;
44 | float32 tempSensor_tempOffset;
45 | float32 tempSensor_scaleFactor;
46 |
47 | //
48 | // InitTempSensor - Initialize the temperature sensor by powering up the
49 | // sensor, loading the calibration values from OTP to RAM,
50 | // and recording the intended VREFHI voltage.
51 | // Note: This function doesn't support VREFLO != 0.0V,
52 | // but this could be implemented if desired.
53 | //
54 | void InitTempSensor(float32 vrefhi_voltage)
55 | {
56 | EALLOW;
57 |
58 | //
59 | //power up the the temperature sensor
60 | //
61 | AnalogSubsysRegs.TSNSCTL.bit.ENABLE = 1;
62 |
63 | //
64 | //delay to allow the sensor to power up
65 | //
66 | DELAY_US(1000);
67 |
68 | EDIS;
69 |
70 | //
71 | //need to remember VREFHI voltage so that sensor readings can be scaled
72 | //to match 2.5V values used for calibration data.
73 | //
74 | tempSensor_scaleFactor = vrefhi_voltage;
75 |
76 | //
77 | //check the device revision
78 | //
79 | if(DevCfgRegs.REVID >= 3)
80 | {
81 | //
82 | //for production devices (Rev. C), pull the slope and offset from OTP
83 | //
84 | tempSensor_tempSlope = (int32)getTempSlope();
85 | tempSensor_tempOffset = getTempOffset();
86 | }
87 | else
88 | {
89 | //
90 | //for pre-production devices, use these static values for slope
91 | //and offset
92 | //
93 | tempSensor_tempSlope = 5196;
94 | tempSensor_tempOffset = 1788;
95 | }
96 | }
97 |
98 | //
99 | // GetTemperatureC - This function uses the reference data stored in OTP to
100 | // convert the raw temperature sensor reading into degrees C
101 | //
102 | int16 GetTemperatureC(int16 sensorSample)
103 | {
104 | sensorSample = (int16)((tempSensor_scaleFactor/2.5)*(sensorSample));
105 |
106 | return (((sensorSample - tempSensor_tempOffset)*tempSensor_tempSlope +
107 | FP_ROUND + KELVIN_OFF)/FP_SCALE - KELVIN);
108 | }
109 |
110 | //
111 | // GetTemperatureK - This function uses the reference data stored in OTP to
112 | // convert the raw temperature sensor reading into degrees K
113 | //
114 | int16 GetTemperatureK(int16 sensorSample)
115 | {
116 | sensorSample = (int16)((2.5/tempSensor_scaleFactor)*(sensorSample));
117 |
118 | return (((sensorSample - tempSensor_tempOffset)*tempSensor_tempSlope +
119 | FP_ROUND + KELVIN_OFF)/FP_SCALE);
120 | }
121 |
122 | //
123 | // End of file
124 | //
125 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Upp.c:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Upp.c
4 | //
5 | // TITLE: F2837xD Upp Initialization & Support Functions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h"
18 | #include "F2837xD_Examples.h"
19 |
20 | //
21 | // InitUpp1Gpio - Initialize UPP1 GPIOs
22 | //
23 | void InitUpp1Gpio(void)
24 | {
25 | EALLOW;
26 |
27 | //
28 | // Disable internal pull-up for the selected output pins
29 | // for reduced power consumption
30 | // Pull-ups can be enabled or disabled by the user.
31 | // Comment out other unwanted lines.
32 | //
33 | GpioCtrlRegs.GPAPUD.bit.GPIO10 = 1; // Disable pull-up on GPIO10 (uPP_WAIT)
34 | GpioCtrlRegs.GPAPUD.bit.GPIO11 = 1; // Disable pull-up on GPIO11 (uPP_START)
35 | GpioCtrlRegs.GPAPUD.bit.GPIO12 = 1; // Disable pull-up on GPIO12 (uPP_ENA)
36 | GpioCtrlRegs.GPAPUD.bit.GPIO13 = 1; // Disable pull-up on GPIO13 (uPP_D7)
37 | GpioCtrlRegs.GPAPUD.bit.GPIO14 = 1; // Disable pull-up on GPIO14 (uPP_D6)
38 | GpioCtrlRegs.GPAPUD.bit.GPIO15 = 1; // Disable pull-up on GPIO15 (uPP_D5)
39 | GpioCtrlRegs.GPAPUD.bit.GPIO16 = 1; // Disable pull-up on GPIO16 (uPP_D4)
40 | GpioCtrlRegs.GPAPUD.bit.GPIO17 = 1; // Disable pull-up on GPIO17 (uPP_D3)
41 | GpioCtrlRegs.GPAPUD.bit.GPIO18 = 1; // Disable pull-up on GPIO18 (uPP_D2)
42 | GpioCtrlRegs.GPAPUD.bit.GPIO19 = 1; // Disable pull-up on GPIO19 (uPP_D1)
43 | GpioCtrlRegs.GPAPUD.bit.GPIO20 = 1; // Disable pull-up on GPIO20 (uPP_D0)
44 | GpioCtrlRegs.GPAPUD.bit.GPIO21 = 1; // Disable pull-up on GPIO21 (uPP_CLK)
45 |
46 | //
47 | // Disable QUAL for selected pins (ASYNC Input)
48 | //
49 | GpioCtrlRegs.GPAQSEL1.bit.GPIO10 = 3; // Disable pull-up on GPIO10 (uPP_WAIT)
50 | GpioCtrlRegs.GPAQSEL1.bit.GPIO11 = 3; // Disable pull-up on GPIO11 (uPP_START)
51 | GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // Disable pull-up on GPIO12 (uPP_ENA)
52 | GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Disable pull-up on GPIO13 (uPP_D7)
53 | GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Disable pull-up on GPIO14 (uPP_D6)
54 | GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Disable pull-up on GPIO15 (uPP_D5)
55 | GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Disable pull-up on GPIO16 (uPP_D4)
56 | GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Disable pull-up on GPIO17 (uPP_D3)
57 | GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Disable pull-up on GPIO18 (uPP_D2)
58 | GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Disable pull-up on GPIO19 (uPP_D1)
59 | GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 3; // Disable pull-up on GPIO20 (uPP_D0)
60 | GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 3; // Disable pull-up on GPIO21 (uPP_CLK)
61 |
62 | //
63 | // Configure uPP-1 pins using GPIO regs
64 | // This specifies which of the possible GPIO pins will be EPWM1 functional
65 | // pins.
66 | // Comment out other unwanted lines.
67 | //
68 | GpioCtrlRegs.GPAGMUX1.bit.GPIO10 = 3; // Configure GPIO10 as uPP_WAIT
69 | GpioCtrlRegs.GPAGMUX1.bit.GPIO11 = 3; // Configure GPIO11 as uPP_START
70 | GpioCtrlRegs.GPAGMUX1.bit.GPIO12 = 3; // Configure GPIO12 as uPP_ENA
71 | GpioCtrlRegs.GPAGMUX1.bit.GPIO13 = 3; // Configure GPIO13 as uPP_D7
72 | GpioCtrlRegs.GPAGMUX1.bit.GPIO14 = 3; // Configure GPIO14 as uPP_D6
73 | GpioCtrlRegs.GPAGMUX1.bit.GPIO15 = 3; // Configure GPIO15 as uPP_D5
74 | GpioCtrlRegs.GPAGMUX2.bit.GPIO16 = 3; // Configure GPIO16 as uPP_D4
75 | GpioCtrlRegs.GPAGMUX2.bit.GPIO17 = 3; // Configure GPIO17 as uPP_D3
76 | GpioCtrlRegs.GPAGMUX2.bit.GPIO18 = 3; // Configure GPIO18 as uPP_D2
77 | GpioCtrlRegs.GPAGMUX2.bit.GPIO19 = 3; // Configure GPIO19 as uPP_D1
78 | GpioCtrlRegs.GPAGMUX2.bit.GPIO20 = 3; // Configure GPIO20 as uPP_D0
79 | GpioCtrlRegs.GPAGMUX2.bit.GPIO21 = 3; // Configure GPIO21 as uPP_CLK
80 |
81 | GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 3; // Configure GPIO10 as uPP_WAIT
82 | GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 3; // Configure GPIO11 as uPP_START
83 | GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3; // Configure GPIO12 as uPP_ENA
84 | GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3; // Configure GPIO13 as uPP_D7
85 | GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3; // Configure GPIO14 as uPP_D6
86 | GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3; // Configure GPIO15 as uPP_D5
87 | GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 3; // Configure GPIO16 as uPP_D4
88 | GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 3; // Configure GPIO17 as uPP_D3
89 | GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3; // Configure GPIO18 as uPP_D2
90 | GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 3; // Configure GPIO19 as uPP_D1
91 | GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 3; // Configure GPIO20 as uPP_D0
92 | GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 3; // Configure GPIO21 as uPP_CLK
93 |
94 | EDIS;
95 | }
96 |
97 | //
98 | // SoftResetUpp - Trigger an internal uPP reset
99 | //
100 | void SoftResetUpp(void)
101 | {
102 | UppRegs.PERCTL.bit.SOFTRST = 1; // Issue uPP Internal Reset.
103 | asm(" NOP");
104 | asm(" NOP");
105 | asm(" NOP");
106 | asm(" NOP");
107 | asm(" NOP");
108 | asm(" NOP");
109 | asm(" NOP");
110 | asm(" NOP");
111 | asm(" NOP");
112 | asm(" NOP");
113 | asm(" NOP");
114 | asm(" NOP");
115 | asm(" NOP");
116 | asm(" NOP");
117 | asm(" NOP");
118 | asm(" NOP");
119 | UppRegs.PERCTL.bit.SOFTRST = 0; // Release uPP Internal Reset.
120 | }
121 |
122 | //
123 | // End of file
124 | //
125 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_Upp_defines.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Upp_defines.h
4 | //
5 | // TITLE: #defines used in Upp examples
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_UPP_DEFINES_H
15 | #define F2837xD_UPP_DEFINES_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Defines
23 | //
24 | #define uPP_TX_MSGRAM_ADDR 0x6C00
25 | #define uPP_TX_MSGRAM_SIZE 512
26 |
27 | #define uPP_RX_MSGRAM_ADDR 0x6E00
28 | #define uPP_RX_MSGRAM_SIZE 512
29 |
30 | #define uPP_RX_MODE 0
31 | #define uPP_TX_MODE 1
32 |
33 | #define uPP_SDR 0
34 | #define uPP_DDR 1
35 |
36 | #define uPP_TX_SIZE_64B 0
37 | #define uPP_TX_SIZE_128B 1
38 | #define uPP_TX_SIZE_256B 3
39 |
40 | #define uPP_RX_SIZE_64B 0
41 | #define uPP_RX_SIZE_128B 1
42 | #define uPP_RX_SIZE_256B 3
43 |
44 | #define uPP_INT_EOWI 0x8
45 | #define uPP_INT_EOLI 0x10
46 | #define uPP_INT_EOWQ 0x800
47 | #define uPP_INT_EOLQ 0x1000
48 |
49 | #ifdef __cplusplus
50 | }
51 | #endif /* extern "C" */
52 |
53 | #endif // - end of F2837xD_UPP_DEFINES_H
54 |
55 | //
56 | // End of file
57 | //
58 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_cputimervars.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_Cputimers.h
4 | //
5 | // TITLE: F2837xD Device CPUTIMERS Register Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_CPUTIMERVARS_H
15 | #define F2837xD_CPUTIMERVARS_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Globals
23 | //
24 | struct CPUTIMER_VARS {
25 | volatile struct CPUTIMER_REGS *RegsAddr;
26 | Uint32 InterruptCount;
27 | float CPUFreqInMHz;
28 | float PeriodInUSec;
29 | };
30 |
31 | extern struct CPUTIMER_VARS CpuTimer0;
32 | extern struct CPUTIMER_VARS CpuTimer1;
33 | extern struct CPUTIMER_VARS CpuTimer2;
34 |
35 | //
36 | // Defines
37 | //
38 |
39 | //
40 | // Start Timer:
41 | //
42 | #define StartCpuTimer0() CpuTimer0Regs.TCR.bit.TSS = 0
43 |
44 | //
45 | // Stop Timer:
46 | //
47 | #define StopCpuTimer0() CpuTimer0Regs.TCR.bit.TSS = 1
48 |
49 | //
50 | // Reload Timer With period Value:
51 | //
52 | #define ReloadCpuTimer0() CpuTimer0Regs.TCR.bit.TRB = 1
53 |
54 | //
55 | // Read 32-Bit Timer Value:
56 | //
57 | #define ReadCpuTimer0Counter() CpuTimer0Regs.TIM.all
58 |
59 | //
60 | // Read 32-Bit Period Value:
61 | //
62 | #define ReadCpuTimer0Period() CpuTimer0Regs.PRD.all
63 |
64 | //
65 | // Start Timer:
66 | //
67 | #define StartCpuTimer1() CpuTimer1Regs.TCR.bit.TSS = 0
68 | #define StartCpuTimer2() CpuTimer2Regs.TCR.bit.TSS = 0
69 |
70 | //
71 | // Stop Timer:
72 | //
73 | #define StopCpuTimer1() CpuTimer1Regs.TCR.bit.TSS = 1
74 | #define StopCpuTimer2() CpuTimer2Regs.TCR.bit.TSS = 1
75 |
76 | //
77 | // Reload Timer With period Value:
78 | //
79 | #define ReloadCpuTimer1() CpuTimer1Regs.TCR.bit.TRB = 1
80 | #define ReloadCpuTimer2() CpuTimer2Regs.TCR.bit.TRB = 1
81 |
82 | //
83 | // Read 32-Bit Timer Value:
84 | //
85 | #define ReadCpuTimer1Counter() CpuTimer1Regs.TIM.all
86 | #define ReadCpuTimer2Counter() CpuTimer2Regs.TIM.all
87 |
88 | //
89 | // Read 32-Bit Period Value:
90 | //
91 | #define ReadCpuTimer1Period() CpuTimer1Regs.PRD.all
92 | #define ReadCpuTimer2Period() CpuTimer2Regs.PRD.all
93 |
94 | //
95 | // Function Prototypes
96 | //
97 | void InitCpuTimers(void);
98 | void ConfigCpuTimer(struct CPUTIMER_VARS *Timer, float Freq, float Period);
99 |
100 | #ifdef __cplusplus
101 | }
102 | #endif /* extern "C" */
103 |
104 |
105 | #endif // end of F2837xD_CPUTIMERVARS_H definition
106 |
107 | //
108 | // End of file
109 | //
110 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_sci_io.c:
--------------------------------------------------------------------------------
1 | //#############################################################################
2 | //
3 | // File: F2837xD_sci_io.c
4 | //
5 | // Description: Contains the various functions related to the serial
6 | // communications interface (SCI) object
7 | //
8 | //#############################################################################
9 | // $TI Release: F2837xD Support Library v210 $
10 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
11 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
12 | // http://www.ti.com/ ALL RIGHTS RESERVED $
13 | //#############################################################################
14 |
15 | //
16 | // Included Files
17 | //
18 | #include
19 | #include
20 | #include
21 | #include "F2837xD_sci_io.h"
22 |
23 | //
24 | // Globals
25 | //
26 | uint16_t deviceOpen = 0;
27 |
28 | //
29 | // SCI_open - Initialize and setup SCI
30 | //
31 | int SCI_open(const char * path, unsigned flags, int llv_fd)
32 | {
33 | if(deviceOpen)
34 | {
35 | return (-1);
36 | }
37 | else
38 | {
39 | EALLOW;
40 | CpuSysRegs.PCLKCR7.bit.SCI_A = 1;
41 | SciaRegs.SCIFFTX.all=0xE040;
42 | SciaRegs.SCIFFRX.all=0x2044;
43 | SciaRegs.SCIFFCT.all=0x0;
44 | SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
45 | // No parity,8 char bits,
46 | // async mode, idle-line protocol
47 | SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
48 | // Disable RX ERR, SLEEP, TXWAKE
49 | SciaRegs.SCICTL2.all =0x0003;
50 | SciaRegs.SCICTL2.bit.TXINTENA =1;
51 | SciaRegs.SCICTL2.bit.RXBKINTENA =1;
52 |
53 | SciaRegs.SCIHBAUD.bit.BAUD =0x0000; // 9600 baud @LSPCLK = 10MHz
54 | //(40 MHz SYSCLK).
55 | SciaRegs.SCILBAUD.bit.BAUD =0x0081;
56 |
57 | SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
58 | EDIS;
59 |
60 | deviceOpen = 1;
61 | return (1);
62 | }
63 | }
64 |
65 | //
66 | // SCI_close - Set SCI to closed
67 | //
68 | int SCI_close(int dev_fd)
69 | {
70 | if((dev_fd != 1) || (!deviceOpen))
71 | {
72 | return (-1);
73 | }
74 | else
75 | {
76 | deviceOpen = 0;
77 | return (0);
78 | }
79 | }
80 |
81 | //
82 | // SCI_read - Read from the SCI RX buffer
83 | //
84 | int SCI_read(int dev_fd, char * buf, unsigned count)
85 | {
86 | uint16_t readCount = 0;
87 | uint16_t * bufPtr = (uint16_t *) buf;
88 |
89 | if(count == 0)
90 | {
91 | return (0);
92 | }
93 |
94 | while((readCount < count) && SciaRegs.SCIRXST.bit.RXRDY)
95 | {
96 | *bufPtr = SciaRegs.SCIRXBUF.bit.SAR;
97 | readCount++;
98 | bufPtr++;
99 | }
100 |
101 | return (readCount);
102 | }
103 |
104 | //
105 | // SCI_write - Write to the SCI TX buffer
106 | //
107 | int SCI_write(int dev_fd, char * buf, unsigned count)
108 | {
109 | uint16_t writeCount = 0;
110 | uint16_t * bufPtr = (uint16_t *) buf;
111 |
112 | if(count == 0)
113 | {
114 | return (0);
115 | }
116 |
117 | while(writeCount < count)
118 | {
119 | while(SciaRegs.SCICTL2.bit.TXRDY != 1)
120 | {
121 | }
122 | SciaRegs.SCITXBUF.bit.TXDT = *bufPtr;
123 | writeCount++;
124 | bufPtr++;
125 | }
126 |
127 | return (writeCount);
128 | }
129 |
130 | //
131 | // SCI_lseek - Do nothing
132 | //
133 | off_t SCI_lseek(int dev_fd, off_t offset, int origin)
134 | {
135 | return (0);
136 | }
137 |
138 | //
139 | // SCI_unlink - Do nothing
140 | //
141 | int SCI_unlink(const char * path)
142 | {
143 | return (0);
144 | }
145 |
146 | //
147 | // SCI_rename - Do nothing
148 | //
149 | int SCI_rename(const char * old_name, const char * new_name)
150 | {
151 | return (0);
152 | }
153 |
154 | //
155 | // End of file
156 | //
157 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_sci_io.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_sci_io.h
4 | //
5 | // TITLE: Prototypes for SCI redirection to STDIO
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_SCI_IO_H
15 | #define F2837xD_SCI_IO_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | //
22 | // Function Prototypes
23 | //
24 | extern int SCI_open(const char * path, unsigned flags, int llv_fd);
25 | extern int SCI_close(int dev_fd);
26 | extern int SCI_read(int dev_fd, char * buf, unsigned count);
27 | extern int SCI_write(int dev_fd, char * buf, unsigned count);
28 | extern off_t SCI_lseek(int dev_fd, off_t offset, int origin);
29 | extern int SCI_unlink(const char * path);
30 | extern int SCI_rename(const char * old_name, const char * new_name);
31 |
32 | #ifdef __cplusplus
33 | }
34 | #endif /* extern "C" */
35 |
36 |
37 | #endif
38 |
39 | //
40 | // End of file
41 | //
42 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_struct.c:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_struct.c
4 | //
5 | // TITLE: F2837xD SDFM structure
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | //
15 | // Included Files
16 | //
17 | #include "F2837xD_device.h"
18 | #include "F2837xD_struct.h"
19 |
20 | //
21 | // Globals
22 | //
23 | #if defined(CPU1)
24 | volatile struct ADC_REGS *ADC[MAX_ADC] =
25 | { 0, &AdcaRegs, &AdcbRegs,
26 | &AdccRegs, &AdcdRegs };
27 | #endif
28 |
29 | volatile struct ECAP_REGS *ECAP[MAX_ECAP] =
30 | { 0, &ECap1Regs, &ECap2Regs, &ECap3Regs,
31 | &ECap4Regs, &ECap5Regs, &ECap6Regs };
32 |
33 | volatile struct EPWM_REGS *EPWM[MAX_EPWM] =
34 | { 0, &EPwm1Regs, &EPwm2Regs, &EPwm3Regs,
35 | &EPwm4Regs, &EPwm5Regs, &EPwm6Regs,
36 | &EPwm7Regs, &EPwm8Regs, &EPwm9Regs,
37 | &EPwm10Regs, &EPwm11Regs, &EPwm12Regs };
38 |
39 | // volatile struct EQEP_REGS *EQEP[MAX_EQEP] =
40 | // { 0, &EQep1Regs, &EQep2Regs, &EQep3Regs };
41 |
42 | volatile struct I2C_REGS *I2C[MAX_I2C] =
43 | { 0, &I2caRegs };
44 |
45 | volatile struct McBSP_REGS *MCBSP[MAX_MCBSP] =
46 | { 0, &McbspaRegs };
47 |
48 | volatile struct SCI_REGS *SCI[MAX_SCI] =
49 | { 0, &SciaRegs };
50 |
51 | volatile struct SPI_REGS *SPI[MAX_SPI] =
52 | { 0, &SpiaRegs, &SpibRegs, &SpicRegs };
53 |
54 | volatile struct SDFM_REGS *SDFM[MAX_SDFM] =
55 | { 0, &Sdfm1Regs, &Sdfm2Regs};
56 |
57 | #if defined(CPU1)
58 | volatile Uint16 *TRIP_SEL[MAX_TRIPSEL] =
59 | { 0, &InputXbarRegs.INPUT1SELECT, &InputXbarRegs.INPUT2SELECT,
60 | &InputXbarRegs.INPUT3SELECT, &InputXbarRegs.INPUT4SELECT,
61 | &InputXbarRegs.INPUT5SELECT, &InputXbarRegs.INPUT6SELECT,
62 | &InputXbarRegs.INPUT7SELECT, &InputXbarRegs.INPUT8SELECT,
63 | &InputXbarRegs.INPUT9SELECT, &InputXbarRegs.INPUT10SELECT,
64 | &InputXbarRegs.INPUT11SELECT, &InputXbarRegs.INPUT12SELECT,
65 | &InputXbarRegs.INPUT13SELECT, &InputXbarRegs.INPUT14SELECT
66 | };
67 | #endif
68 |
69 | //
70 | // End of file
71 | //
72 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_struct.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_sdfm_strut.h
4 | //
5 | // TITLE: contains structures used for the SDFM driver.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef F2837xD_SDFM_STRUCT_H
15 | #define F2837xD_SDFM_STRUCT_H
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 | #define MAX_CPUTIMER 4
22 | #define MAX_ECAP 7
23 | #define MAX_EPWM 13
24 | #define MAX_EQEP 4
25 | #define MAX_I2C 2
26 | #define MAX_MCBSP 2
27 | #define MAX_SCI 2
28 | #define MAX_SPI 4
29 | #define MAX_ADC 5
30 | #define MAX_SDFM 3
31 | #define MAX_TRIPSEL 15
32 |
33 | extern volatile Uint16 *TRIP_SEL[MAX_TRIPSEL];
34 | extern volatile struct ADC_REGS *ADC[MAX_ADC];
35 | extern volatile struct CPUTIMER_REGS *CPUTIMER[MAX_CPUTIMER];
36 | extern volatile struct ECAP_REGS *ECAP[MAX_ECAP];
37 | extern volatile struct EPWM_REGS *EPWM[MAX_EPWM];
38 | extern volatile struct EQEP_REGS *EQEP[MAX_EQEP];
39 | extern volatile struct I2C_REGS *I2C[MAX_I2C];
40 | extern volatile struct McBSP_REGS *MCBSP[MAX_MCBSP];
41 | extern volatile struct SCI_REGS *SCI[MAX_SCI];
42 | extern volatile struct SPI_REGS *SPI[MAX_SPI];
43 | extern volatile struct SDFM_REGS *SDFM[MAX_SDFM];
44 |
45 | #ifdef __cplusplus
46 | }
47 | #endif /* extern "C" */
48 |
49 | #endif // - end of F2837xD_SDFM_STRUCT_H
50 |
51 | //
52 | // End of file
53 | //
54 |
--------------------------------------------------------------------------------
/User_peripheral/F2837xD_usDelay.asm:
--------------------------------------------------------------------------------
1 | ;//###########################################################################
2 | ;//
3 | ;// FILE: F2837xD_usDelay.asm
4 | ;//
5 | ;// TITLE: Simple delay function
6 | ;//
7 | ;// DESCRIPTION:
8 | ;// This is a simple delay function that can be used to insert a specified
9 | ;// delay into code.
10 | ;// This function is only accurate if executed from internal zero-waitstate
11 | ;// SARAM. If it is executed from waitstate memory then the delay will be
12 | ;// longer then specified.
13 | ;// To use this function:
14 | ;// 1 - update the CPU clock speed in the F2837xD_Examples.h
15 | ;// file. For example:
16 | ;// #define CPU_RATE 6.667L // for a 150MHz CPU clock speed
17 | ;// 2 - Call this function by using the DELAY_US(A) macro
18 | ;// that is defined in the F2837xD_Device.h file. This macro
19 | ;// will convert the number of microseconds specified
20 | ;// into a loop count for use with this function.
21 | ;// This count will be based on the CPU frequency you specify.
22 | ;// 3 - For the most accurate delay
23 | ;// - Execute this function in 0 waitstate RAM.
24 | ;// - Disable interrupts before calling the function
25 | ;// If you do not disable interrupts, then think of
26 | ;// this as an "at least" delay function as the actual
27 | ;// delay may be longer.
28 | ;// The C assembly call from the DELAY_US(time) macro will
29 | ;// look as follows:
30 | ;// extern void Delay(long LoopCount);
31 | ;// MOV AL,#LowLoopCount
32 | ;// MOV AH,#HighLoopCount
33 | ;// LCR _Delay
34 | ;// Or as follows (if count is less then 16-bits):
35 | ;// MOV ACC,#LoopCount
36 | ;// LCR _Delay
37 | ;//
38 | ;//###########################################################################
39 | ;// $TI Release: F2837xD Support Library v210 $
40 | ;// $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
41 | ;// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
42 | ;// http://www.ti.com/ ALL RIGHTS RESERVED $
43 | ;//###########################################################################
44 |
45 | .def _F28x_usDelay
46 | .sect "ramfuncs"
47 |
48 | .global __F28x_usDelay
49 | _F28x_usDelay:
50 | SUB ACC,#1
51 | BF _F28x_usDelay,GEQ ;; Loop if ACC >= 0
52 | LRETR
53 |
54 | ;There is a 9/10 cycle overhead and each loop
55 | ;takes five cycles. The LoopCount is given by
56 | ;the following formula:
57 | ; DELAY_CPU_CYCLES = 9 + 5*LoopCount
58 | ; LoopCount = (DELAY_CPU_CYCLES - 9) / 5
59 | ; The macro DELAY_US(A) performs this calculation for you
60 | ;
61 | ;
62 |
63 | ;//
64 | ;// End of file
65 | ;//
66 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/Constants/Constants.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\Constants\Constants.h */
3 | /* */
4 | /* Copyright (c) 2009-2011 Texas Instruments Incorporated */
5 | /* */
6 | /* F021 Flash API v1.53 */
7 | /*--------------------------------------------------------*/
8 |
9 | /*!
10 | \file F021\Constants\Constants.h
11 | \brief A set of Constant Values.
12 | */
13 | #ifndef F021_CONSTANTS_H_
14 | #define F021_CONSTANTS_H_
15 |
16 | #if defined(_CONCERTO)
17 | #include "Concerto.h"
18 | #elif defined(_F2837xD)
19 | #include "F2837xD.h"
20 | #else
21 | #include "FMC.h"
22 | #endif
23 |
24 |
25 |
26 | /*!
27 | \brief Define to map the direct access to the TI OTP memory.
28 | */
29 | #define F021_TIOTP_BASE_ADDRESS ((Fapi_TiOtpBytesType *)(F021_PROGRAM_TIOTP_OFFSET + F021_TIOTP_SETTINGS_BASE))
30 |
31 | /*!
32 | \brief Define to map the direct access to the FMC registers.
33 | */
34 | #define F021_CPU0_BASE_ADDRESS ((Fapi_FmcRegistersType *)F021_CPU0_REGISTER_ADDRESS)
35 |
36 | #endif /* F021_CONSTANTS_H_ */
37 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/Constants/F2837xD.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\Constants\F2837xD.h */
3 | /* */
4 | /* Copyright (c) 2010-2013 Texas Instruments Incorporated */
5 | /* */
6 | /*--------------------------------------------------------*/
7 |
8 | /*!
9 | \file F021\Constants\F2837xD.h
10 | \brief A set of Constant Values for the F2837xD Family.
11 | */
12 | #ifndef F021_CONSTANTS_F2837xD_H_
13 | #define F021_CONSTANTS_F2837xD_H_
14 |
15 | /*!
16 | \brief Specifies the bit mask for determining all address bits exclusive of
17 | the offest imposed by the memory map register
18 | */
19 | #define F021_PROGRAM_ADDRESS_MASK 0x07FFFFFF
20 |
21 | /*!
22 | \brief Specifies the Offset to the TI OTP
23 | */
24 |
25 | #define F021_PROGRAM_TIOTP_OFFSET 0x00070000 //TI OTP start on C28x
26 |
27 |
28 |
29 | /* Final values to be determined */
30 |
31 | /*!
32 | \brief Maximum FClck Value
33 | */
34 | #define F021_FCLK_MAX 0x18
35 |
36 |
37 | /*!
38 | \brief PGM_OSU Max Value
39 | */
40 | #define F021_PGM_OSU_MAX 0xFF
41 |
42 | /*!
43 | \brief PGM_OSU Min Value
44 | */
45 | #define F021_PGM_OSU_MIN 0x02
46 |
47 | /*!
48 | \brief ERA_OSU Max Value
49 | */
50 | #define F021_ERA_OSU_MAX 0xFF
51 |
52 | /*!
53 | \brief ERA_OSU Min Value
54 | */
55 | #define F021_ERA_OSU_MIN 0x02
56 |
57 | /*!
58 | \brief ADD_EXZ Max Value
59 | */
60 | #define F021_ADD_EXZ_MAX 0x0F
61 |
62 | /*!
63 | \brief ADD_EXZ Min Value
64 | */
65 | #define F021_ADD_EXZ_MIN 0x02
66 |
67 | /*!
68 | \brief EXE_VALD Max Value
69 | */
70 | #define F021_EXE_VALD_MAX 0x0F
71 |
72 | /*!
73 | \brief EXE_VALD Min Value
74 | */
75 | #define F021_EXE_VALD_MIN 0x02
76 |
77 | /*!
78 | \brief PROG_PUL_WIDTH Max Value
79 | */
80 | #define F021_PROG_PUL_WIDTH_MAX 0xFFFF
81 |
82 | /*!
83 | \brief PROG_PUL_WIDTH Min Value
84 | */
85 | #define F021_PROG_PUL_WIDTH_MIN 0x0002
86 |
87 | /*!
88 | \brief ERA_PUL_WIDTH Max Value
89 | */
90 | #define F021_ERA_PUL_WIDTH_MAX 0xFFFFFFFF
91 |
92 | /*!
93 | \brief ERA_PUL_WIDTH Min Value
94 | */
95 | #define F021_ERA_PUL_WIDTH_MIN 0x00000002
96 |
97 | /*!
98 | * FMC memory map defines
99 | */
100 | #if defined (_F2837xD)
101 | #define F021_FLASH_MAP_BEGIN 0x80000
102 | #define F021_FLASH_MAP_END 0xBFFFF
103 | #define F021_OTP_MAP_BEGIN 0x78000//Customer OTP start
104 | #define F021_OTP_MAP_END 0x783FF//Customer OTP End
105 | #define F021_OTPECC_MAP_BEGIN 0x1071000
106 | #define F021_OTPECC_MAP_END 0x107107F
107 | #define F021_FLASHECC_MAP_BEGIN 0x1080000
108 | #define F021_FLASHECC_MAP_END 0x1087FFF
109 | #define F021_EEPROM_MAP_BEGIN 0xFFFFFFFF
110 | #define F021_EEPROM_MAP_END 0xFFFFFFFF
111 | #define F021_EEPROMECC_MAP_BEGIN 0xFFFFFFFF
112 | #define F021_EEPROMECC_MAP_END 0xFFFFFFFF
113 | #endif
114 |
115 | /*!
116 | \brief Define to map the direct access to the FMC registers.
117 | */
118 |
119 | #define F021_CPU0_REGISTER_ADDRESS 0x0005F800
120 |
121 | /*!
122 | * Specific TI OTP Offsets
123 | */
124 |
125 | #define F021_TIOTP_PER_BANK_SIZE 0x800 //Even though TI OTP is 2K, Size is mentioned here as 0x800 (4K) because code uses this to find the offset of TI OTP (1, 2) relative to OTP Base address
126 | #define F021_TIOTP_SETTINGS_BASE 0xA8
127 | #define F021_TIOTP_BANK_SECTOR_OFFSET 0xAC
128 |
129 |
130 | #endif /* F021_CONSTANTS_F2837xD_H_ */
131 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/Constants/FMC.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\Constants\FMC.h */
3 | /* */
4 | /* Copyright (c) 2009-2011 Texas Instruments Incorporated */
5 | /* */
6 | /* F021 Flash API v1.00 */
7 | /*--------------------------------------------------------*/
8 |
9 | /*!
10 | \file F021\Constants\FMC.h
11 | \brief A set of Constant Values for the FMC Family.
12 | */
13 | #ifndef F021_CONSTANTS_FMC_H_
14 | #define F021_CONSTANTS_FMC_H_
15 |
16 | /*!
17 | \brief Specifies the bit mask for determining all address bits exclusive of
18 | the offest imposed by the memory map register
19 | */
20 | #define F021_PROGRAM_ADDRESS_MASK 0x07FFFFFFU
21 |
22 | /*!
23 | \brief Specifies the Offset to the TI OTP
24 | */
25 | #define F021_PROGRAM_TIOTP_OFFSET 0xF0080000
26 |
27 |
28 | /*!
29 | \brief PGM_OSU Max Value
30 | */
31 | #define F021_PGM_OSU_MAX 0xFFU
32 |
33 | /*!
34 | \brief PGM_OSU Min Value
35 | */
36 | #define F021_PGM_OSU_MIN 0x02U
37 |
38 | /*!
39 | \brief ERA_OSU Max Value
40 | */
41 | #define F021_ERA_OSU_MAX 0xFFU
42 |
43 | /*!
44 | \brief ERA_OSU Min Value
45 | */
46 | #define F021_ERA_OSU_MIN 0x02U
47 |
48 | /*!
49 | \brief ADD_EXZ Max Value
50 | */
51 | #define F021_ADD_EXZ_MAX 0x0FU
52 |
53 | /*!
54 | \brief ADD_EXZ Min Value
55 | */
56 | #define F021_ADD_EXZ_MIN 0x02U
57 |
58 | /*!
59 | \brief EXE_VALD Max Value
60 | */
61 | #define F021_EXE_VALD_MAX 0x0FU
62 |
63 | /*!
64 | \brief EXE_VALD Min Value
65 | */
66 | #define F021_EXE_VALD_MIN 0x02U
67 |
68 | /*!
69 | \brief PROG_PUL_WIDTH Max Value
70 | */
71 | #define F021_PROG_PUL_WIDTH_MAX 0xFFFFU
72 |
73 | /*!
74 | \brief PROG_PUL_WIDTH Min Value
75 | */
76 | #define F021_PROG_PUL_WIDTH_MIN 0x0002U
77 |
78 | /*!
79 | \brief ERA_PUL_WIDTH Max Value
80 | */
81 | #define F021_ERA_PUL_WIDTH_MAX 0xFFFFFFFFU
82 |
83 | /*!
84 | \brief ERA_PUL_WIDTH Min Value
85 | */
86 | #define F021_ERA_PUL_WIDTH_MIN 0x00000002U
87 |
88 | /*!
89 | * FMC memory map defines
90 | */
91 | #define F021_FLASH_MAP_BEGIN 0x00000000
92 | #define F021_FLASH_MAP_END 0x00FFFFFF
93 | #define F021_OTP_MAP_BEGIN 0xF0000000
94 | #define F021_OTP_MAP_END 0xF000FFFF
95 | #define F021_OTPECC_MAP_BEGIN 0xF0040000
96 | #define F021_OTPECC_MAP_END 0xF0041FFF
97 | #define F021_EEPROMECC_MAP_BEGIN 0xF0100000
98 | #define F021_EEPROMECC_MAP_END 0xF01FFFFF
99 | #define F021_EEPROM_MAP_BEGIN 0xF0200000
100 | #define F021_EEPROM_MAP_END 0xF03FFFFF
101 | #define F021_FLASHECC_MAP_BEGIN 0xF0400000
102 | #define F021_FLASHECC_MAP_END 0xF04FFFFF
103 |
104 | /*!
105 | \brief Define to map the direct access to the FMC registers.
106 | */
107 | #define F021_CPU0_REGISTER_ADDRESS 0xFFF87000
108 |
109 | /*!
110 | * Specific TI OTP Offsets
111 | */
112 | #define F021_TIOTP_PER_BANK_SIZE 0x2000U
113 | #define F021_TIOTP_SETTINGS_BASE 0x150U
114 | #define F021_TIOTP_BANK_SECTOR_OFFSET 0x158U
115 |
116 | #endif /* F021_CONSTANTS_FMC_H_ */
117 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/F021_F2837xD_C28x.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\F021_F2837xD_C28x.h */
3 | /* */
4 | /* Copyright (c) 2009-2013 Texas Instruments Incorporated */
5 | /* */
6 | /* F021 Flash API v1.53 */
7 | /*--------------------------------------------------------*/
8 |
9 | /*!
10 | \file F021\F021_F2837xD_C28x.h
11 | \brief Setups the defines required for Harmony C28x
12 | */
13 | #ifndef F021_F2837xD_C28X_H_
14 | #define F021_F2837xD_C28X_H_
15 |
16 | #if !defined(_F2837xD)
17 | #define _F2837xD
18 | #endif
19 |
20 | #if !defined(_LITTLE_ENDIAN)
21 | #define _LITTLE_ENDIAN
22 | #endif
23 |
24 | #if !defined(_C28X)
25 | #define _C28X
26 | #endif
27 |
28 | #include "F021.h"
29 |
30 | #endif /*F021_F2837xD_C28X_H_*/
31 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/Helpers.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\Helpers.h */
3 | /* */
4 | /* Copyright (c) 2009-2011 Texas Instruments Incorporated */
5 | /* */
6 | /* F021 Flash API v1.00 */
7 | /*--------------------------------------------------------*/
8 |
9 | /*!
10 | \file F021\Helpers.h
11 | \brief A set of helper Macros.
12 |
13 | These helper Macros are to facilitate common
14 | operations.
15 | */
16 | #ifndef F021_HELPERS_H_
17 | #define F021_HELPERS_H_
18 |
19 | /*!
20 | \brief Quick Register referencing macro
21 | */
22 | #define REGISTER(mRegister) (* (volatile uint32 *)(mRegister))
23 |
24 | #define FAPI_WRITE_LOCKED_FSM_REGISTER(mRegister,mValue) \
25 | { \
26 | Fapi_GlobalInit.m_poFlashControlRegisters->FsmWrEna.FSM_WR_ENA_BITS.WR_ENA = 0x5U; \
27 | mRegister = mValue; \
28 | Fapi_GlobalInit.m_poFlashControlRegisters->FsmWrEna.FSM_WR_ENA_BITS.WR_ENA = 0x2U; \
29 | }
30 |
31 |
32 | #if defined(_LITTLE_ENDIAN)
33 | #define EI16(idx) (idx ^ 1)
34 | #define EI8(idx) (idx ^ 3)
35 | #else
36 | #define EI16(idx) (idx)
37 | #define EI8(idx) (idx)
38 | #endif
39 |
40 | #endif /* F021_HELPERS_H_ */
41 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/Init.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\Init.h */
3 | /* */
4 | /* Copyright (c) 2009-2011 Texas Instruments Incorporated */
5 | /* */
6 | /* F021 Flash API v1.00 */
7 | /*--------------------------------------------------------*/
8 |
9 | #pragma once
10 |
11 | /*!
12 | \file F021\Init.h
13 | \brief
14 | */
15 | #ifndef FAPI_INIT_H_
16 | #define FAPI_INIT_H_
17 |
18 | typedef struct
19 | {
20 | Fapi_TiOtpBytesType *m_poTiOtpBaseAddress;
21 | Fapi_FmcRegistersType *m_poFlashControlRegisters;
22 | uint8 m_u8MainBankWidth;
23 | uint8 m_u8EeBankWidth;
24 | uint8 m_u8MainEccWidth;
25 | uint8 m_u8EeEccWidth;
26 | uint8 m_u8CurrentRwait;
27 | uint8 m_u8CurrentEwait;
28 | uint16 m_u16HclkFrequency;
29 | } Fapi_InitStruct;
30 |
31 | #endif /* FAPI_FLASH_STATE_MACHINE_H_ */
32 |
--------------------------------------------------------------------------------
/User_peripheral/FlashAPI/Registers.h:
--------------------------------------------------------------------------------
1 | /*--------------------------------------------------------*/
2 | /* F021\Registers.h */
3 | /* */
4 | /* Copyright (c) 2009-2011 Texas Instruments Incorporated */
5 | /* */
6 | /* F021 Flash API v1.00 */
7 | /*--------------------------------------------------------*/
8 |
9 | /*!
10 | \file F021\Registers.h
11 | \brief A complete mapping of the F021 Flash Registers
12 |
13 | Allows named access to the F021 Flash Registers.
14 | */
15 | #ifndef F021_REGISTERS_H_
16 | #define F021_REGISTERS_H_
17 |
18 | #include "Types.h"
19 |
20 | #if defined(_F2837xD)
21 | #include "Registers_C28x.h"
22 | #elif defined(_C28X)
23 | #include "Registers_Concerto_C28x.h"
24 | #elif defined(_CONCERTO)
25 | #include "Registers_Concerto_Cortex.h"
26 | #elif defined(_LITTLE_ENDIAN)
27 | #include "Registers_FMC_LE.h"
28 | #else
29 | #include "Registers_FMC_BE.h"
30 | #endif
31 |
32 | #endif /*F021_REGISTERS_H_*/
33 |
--------------------------------------------------------------------------------
/User_peripheral/PeripheralHeader/F2837xD_cputimer.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_cputimer.h
4 | //
5 | // TITLE: F2837xD Device CPUTIMER Register Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef __F2837xD_CPUTIMER_H__
15 | #define __F2837xD_CPUTIMER_H__
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 |
22 | //---------------------------------------------------------------------------
23 | // CPUTIMER Individual Register Bit Definitions:
24 |
25 | struct TIM_BITS { // bits description
26 | Uint16 LSW:16; // 15:0 CPU-Timer Counter Registers
27 | Uint16 MSW:16; // 31:16 CPU-Timer Counter Registers High
28 | };
29 |
30 | union TIM_REG {
31 | Uint32 all;
32 | struct TIM_BITS bit;
33 | };
34 |
35 | struct PRD_BITS { // bits description
36 | Uint16 LSW:16; // 15:0 CPU-Timer Period Registers
37 | Uint16 MSW:16; // 31:16 CPU-Timer Period Registers High
38 | };
39 |
40 | union PRD_REG {
41 | Uint32 all;
42 | struct PRD_BITS bit;
43 | };
44 |
45 | struct TCR_BITS { // bits description
46 | Uint16 rsvd1:4; // 3:0 Reserved
47 | Uint16 TSS:1; // 4 CPU-Timer stop status bit.
48 | Uint16 TRB:1; // 5 Timer reload
49 | Uint16 rsvd2:4; // 9:6 Reserved
50 | Uint16 SOFT:1; // 10 Emulation modes
51 | Uint16 FREE:1; // 11 Emulation modes
52 | Uint16 rsvd3:2; // 13:12 Reserved
53 | Uint16 TIE:1; // 14 CPU-Timer Interrupt Enable.
54 | Uint16 TIF:1; // 15 CPU-Timer Interrupt Flag.
55 | };
56 |
57 | union TCR_REG {
58 | Uint16 all;
59 | struct TCR_BITS bit;
60 | };
61 |
62 | struct TPR_BITS { // bits description
63 | Uint16 TDDR:8; // 7:0 CPU-Timer Divide-Down.
64 | Uint16 PSC:8; // 15:8 CPU-Timer Prescale Counter.
65 | };
66 |
67 | union TPR_REG {
68 | Uint16 all;
69 | struct TPR_BITS bit;
70 | };
71 |
72 | struct TPRH_BITS { // bits description
73 | Uint16 TDDRH:8; // 7:0 CPU-Timer Divide-Down.
74 | Uint16 PSCH:8; // 15:8 CPU-Timer Prescale Counter.
75 | };
76 |
77 | union TPRH_REG {
78 | Uint16 all;
79 | struct TPRH_BITS bit;
80 | };
81 |
82 | struct CPUTIMER_REGS {
83 | union TIM_REG TIM; // CPU-Timer, Counter Register
84 | union PRD_REG PRD; // CPU-Timer, Period Register
85 | union TCR_REG TCR; // CPU-Timer, Control Register
86 | Uint16 rsvd1; // Reserved
87 | union TPR_REG TPR; // CPU-Timer, Prescale Register
88 | union TPRH_REG TPRH; // CPU-Timer, Prescale Register High
89 | };
90 |
91 | //---------------------------------------------------------------------------
92 | // CPUTIMER External References & Function Declarations:
93 | //
94 | #ifdef CPU1
95 | extern volatile struct CPUTIMER_REGS CpuTimer0Regs;
96 | extern volatile struct CPUTIMER_REGS CpuTimer1Regs;
97 | extern volatile struct CPUTIMER_REGS CpuTimer2Regs;
98 | #endif
99 | #ifdef CPU2
100 | extern volatile struct CPUTIMER_REGS CpuTimer0Regs;
101 | extern volatile struct CPUTIMER_REGS CpuTimer1Regs;
102 | extern volatile struct CPUTIMER_REGS CpuTimer2Regs;
103 | #endif
104 | #ifdef __cplusplus
105 | }
106 | #endif /* extern "C" */
107 |
108 | #endif
109 |
110 | //===========================================================================
111 | // End of file.
112 | //===========================================================================
113 |
--------------------------------------------------------------------------------
/User_peripheral/PeripheralHeader/F2837xD_dac.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_dac.h
4 | //
5 | // TITLE: F2837xD Device DAC Register Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef __F2837xD_DAC_H__
15 | #define __F2837xD_DAC_H__
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 |
22 | //---------------------------------------------------------------------------
23 | // DAC Individual Register Bit Definitions:
24 |
25 | struct DACREV_BITS { // bits description
26 | Uint16 REV:8; // 7:0 DAC Revision Register
27 | Uint16 rsvd1:8; // 15:8 Reserved
28 | };
29 |
30 | union DACREV_REG {
31 | Uint16 all;
32 | struct DACREV_BITS bit;
33 | };
34 |
35 | struct DACCTL_BITS { // bits description
36 | Uint16 DACREFSEL:1; // 0 DAC Reference Select
37 | Uint16 rsvd1:1; // 1 Reserved
38 | Uint16 LOADMODE:1; // 2 DACVALA Load Mode
39 | Uint16 rsvd2:1; // 3 Reserved
40 | Uint16 SYNCSEL:4; // 7:4 DAC PWMSYNC Select
41 | Uint16 rsvd3:8; // 15:8 Reserved
42 | };
43 |
44 | union DACCTL_REG {
45 | Uint16 all;
46 | struct DACCTL_BITS bit;
47 | };
48 |
49 | struct DACVALA_BITS { // bits description
50 | Uint16 DACVALA:12; // 11:0 DAC Active Output Code
51 | Uint16 rsvd1:4; // 15:12 Reserved
52 | };
53 |
54 | union DACVALA_REG {
55 | Uint16 all;
56 | struct DACVALA_BITS bit;
57 | };
58 |
59 | struct DACVALS_BITS { // bits description
60 | Uint16 DACVALS:12; // 11:0 DAC Shadow Output Code
61 | Uint16 rsvd1:4; // 15:12 Reserved
62 | };
63 |
64 | union DACVALS_REG {
65 | Uint16 all;
66 | struct DACVALS_BITS bit;
67 | };
68 |
69 | struct DACOUTEN_BITS { // bits description
70 | Uint16 DACOUTEN:1; // 0 DAC Output Code
71 | Uint16 rsvd1:15; // 15:1 Reserved
72 | };
73 |
74 | union DACOUTEN_REG {
75 | Uint16 all;
76 | struct DACOUTEN_BITS bit;
77 | };
78 |
79 | struct DACLOCK_BITS { // bits description
80 | Uint16 DACCTL:1; // 0 DAC Control Register Lock
81 | Uint16 DACVAL:1; // 1 DAC Value Register Lock
82 | Uint16 DACOUTEN:1; // 2 DAC Output Enable Register Lock
83 | Uint16 rsvd1:13; // 15:3 Reserved
84 | };
85 |
86 | union DACLOCK_REG {
87 | Uint16 all;
88 | struct DACLOCK_BITS bit;
89 | };
90 |
91 | struct DACTRIM_BITS { // bits description
92 | Uint16 OFFSET_TRIM:8; // 7:0 DAC Offset Trim
93 | Uint16 rsvd1:4; // 11:8 Reserved
94 | Uint16 rsvd2:4; // 15:12 Reserved
95 | };
96 |
97 | union DACTRIM_REG {
98 | Uint16 all;
99 | struct DACTRIM_BITS bit;
100 | };
101 |
102 | struct DAC_REGS {
103 | union DACREV_REG DACREV; // DAC Revision Register
104 | union DACCTL_REG DACCTL; // DAC Control Register
105 | union DACVALA_REG DACVALA; // DAC Value Register - Active
106 | union DACVALS_REG DACVALS; // DAC Value Register - Shadow
107 | union DACOUTEN_REG DACOUTEN; // DAC Output Enable Register
108 | union DACLOCK_REG DACLOCK; // DAC Lock Register
109 | union DACTRIM_REG DACTRIM; // DAC Trim Register
110 | Uint16 rsvd1; // Reserved
111 | };
112 |
113 | //---------------------------------------------------------------------------
114 | // DAC External References & Function Declarations:
115 | //
116 | #ifdef CPU1
117 | extern volatile struct DAC_REGS DacaRegs;
118 | extern volatile struct DAC_REGS DacbRegs;
119 | extern volatile struct DAC_REGS DaccRegs;
120 | #endif
121 | #ifdef CPU2
122 | extern volatile struct DAC_REGS DacaRegs;
123 | extern volatile struct DAC_REGS DacbRegs;
124 | extern volatile struct DAC_REGS DaccRegs;
125 | #endif
126 | #ifdef __cplusplus
127 | }
128 | #endif /* extern "C" */
129 |
130 | #endif
131 |
132 | //===========================================================================
133 | // End of file.
134 | //===========================================================================
135 |
--------------------------------------------------------------------------------
/User_peripheral/PeripheralHeader/F2837xD_input_xbar.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_input_xbar.h
4 | //
5 | // TITLE: F2837xD Device INPUT_XBAR Register Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef __F2837xD_INPUT_XBAR_H__
15 | #define __F2837xD_INPUT_XBAR_H__
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 |
22 | //---------------------------------------------------------------------------
23 | // INPUT_XBAR Individual Register Bit Definitions:
24 |
25 | struct INPUTSELECTLOCK_BITS { // bits description
26 | Uint16 INPUT1SELECT:1; // 0 Lock bit for INPUT1SEL Register
27 | Uint16 INPUT2SELECT:1; // 1 Lock bit for INPUT2SEL Register
28 | Uint16 INPUT3SELECT:1; // 2 Lock bit for INPUT3SEL Register
29 | Uint16 INPUT4SELECT:1; // 3 Lock bit for INPUT4SEL Register
30 | Uint16 INPUT5SELECT:1; // 4 Lock bit for INPUT5SEL Register
31 | Uint16 INPUT6SELECT:1; // 5 Lock bit for INPUT7SEL Register
32 | Uint16 INPUT7SELECT:1; // 6 Lock bit for INPUT8SEL Register
33 | Uint16 INPUT8SELECT:1; // 7 Lock bit for INPUT9SEL Register
34 | Uint16 INPUT9SELECT:1; // 8 Lock bit for INPUT10SEL Register
35 | Uint16 INPUT10SELECT:1; // 9 Lock bit for INPUT11SEL Register
36 | Uint16 INPUT11SELECT:1; // 10 Lock bit for INPUT11SEL Register
37 | Uint16 INPUT12SELECT:1; // 11 Lock bit for INPUT12SEL Register
38 | Uint16 INPUT13SELECT:1; // 12 Lock bit for INPUT13SEL Register
39 | Uint16 INPUT14SELECT:1; // 13 Lock bit for INPUT14SEL Register
40 | Uint16 INPUT15SELECT:1; // 14 Lock bit for INPUT15SEL Register
41 | Uint16 INPUT16SELECT:1; // 15 Lock bit for INPUT16SEL Register
42 | Uint16 rsvd1:16; // 31:16 Reserved
43 | };
44 |
45 | union INPUTSELECTLOCK_REG {
46 | Uint32 all;
47 | struct INPUTSELECTLOCK_BITS bit;
48 | };
49 |
50 | struct INPUT_XBAR_REGS {
51 | Uint16 INPUT1SELECT; // INPUT1 Input Select Register (GPIO0 to x)
52 | Uint16 INPUT2SELECT; // INPUT2 Input Select Register (GPIO0 to x)
53 | Uint16 INPUT3SELECT; // INPUT3 Input Select Register (GPIO0 to x)
54 | Uint16 INPUT4SELECT; // INPUT4 Input Select Register (GPIO0 to x)
55 | Uint16 INPUT5SELECT; // INPUT5 Input Select Register (GPIO0 to x)
56 | Uint16 INPUT6SELECT; // INPUT6 Input Select Register (GPIO0 to x)
57 | Uint16 INPUT7SELECT; // INPUT7 Input Select Register (GPIO0 to x)
58 | Uint16 INPUT8SELECT; // INPUT8 Input Select Register (GPIO0 to x)
59 | Uint16 INPUT9SELECT; // INPUT9 Input Select Register (GPIO0 to x)
60 | Uint16 INPUT10SELECT; // INPUT10 Input Select Register (GPIO0 to x)
61 | Uint16 INPUT11SELECT; // INPUT11 Input Select Register (GPIO0 to x)
62 | Uint16 INPUT12SELECT; // INPUT12 Input Select Register (GPIO0 to x)
63 | Uint16 INPUT13SELECT; // INPUT13 Input Select Register (GPIO0 to x)
64 | Uint16 INPUT14SELECT; // INPUT14 Input Select Register (GPIO0 to x)
65 | Uint16 rsvd1[16]; // Reserved
66 | union INPUTSELECTLOCK_REG INPUTSELECTLOCK; // Input Select Lock Register
67 | };
68 |
69 | //---------------------------------------------------------------------------
70 | // INPUT_XBAR External References & Function Declarations:
71 | //
72 | #ifdef CPU1
73 | extern volatile struct INPUT_XBAR_REGS InputXbarRegs;
74 | #endif
75 | #ifdef __cplusplus
76 | }
77 | #endif /* extern "C" */
78 |
79 | #endif
80 |
81 | //===========================================================================
82 | // End of file.
83 | //===========================================================================
84 |
--------------------------------------------------------------------------------
/User_peripheral/PeripheralHeader/F2837xD_nmiintrupt.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_nmiintrupt.h
4 | //
5 | // TITLE: F2837xD Device NMIINTRUPT Register Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef __F2837xD_NMIINTRUPT_H__
15 | #define __F2837xD_NMIINTRUPT_H__
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 |
22 | //---------------------------------------------------------------------------
23 | // NMIINTRUPT Individual Register Bit Definitions:
24 |
25 | struct NMICFG_BITS { // bits description
26 | Uint16 NMIE:1; // 0 Global NMI Enable
27 | Uint16 rsvd1:15; // 15:1 Reserved
28 | };
29 |
30 | union NMICFG_REG {
31 | Uint16 all;
32 | struct NMICFG_BITS bit;
33 | };
34 |
35 | struct NMIFLG_BITS { // bits description
36 | Uint16 NMIINT:1; // 0 NMI Interrupt Flag
37 | Uint16 CLOCKFAIL:1; // 1 Clock Fail Interrupt Flag
38 | Uint16 RAMUNCERR:1; // 2 RAM Uncorrectable Error NMI Flag
39 | Uint16 FLUNCERR:1; // 3 Flash Uncorrectable Error NMI Flag
40 | Uint16 CPU1HWBISTERR:1; // 4 HW BIST Error NMI Flag
41 | Uint16 CPU2HWBISTERR:1; // 5 HW BIST Error NMI Flag
42 | Uint16 PIEVECTERR:1; // 6 PIE Vector Fetch Error Flag
43 | Uint16 rsvd1:1; // 7 Reserved
44 | Uint16 rsvd2:1; // 8 Reserved
45 | Uint16 CPU2WDRSn:1; // 9 CPU2 WDRSn Reset Indication Flag
46 | Uint16 CPU2NMIWDRSn:1; // 10 CPU2 NMIWDRSn Reset Indication Flag
47 | Uint16 rsvd3:1; // 11 Reserved
48 | Uint16 rsvd4:4; // 15:12 Reserved
49 | };
50 |
51 | union NMIFLG_REG {
52 | Uint16 all;
53 | struct NMIFLG_BITS bit;
54 | };
55 |
56 | struct NMIFLGCLR_BITS { // bits description
57 | Uint16 NMIINT:1; // 0 NMIINT Flag Clear
58 | Uint16 CLOCKFAIL:1; // 1 CLOCKFAIL Flag Clear
59 | Uint16 RAMUNCERR:1; // 2 RAMUNCERR Flag Clear
60 | Uint16 FLUNCERR:1; // 3 FLUNCERR Flag Clear
61 | Uint16 CPU1HWBISTERR:1; // 4 CPU1HWBISTERR Flag Clear
62 | Uint16 CPU2HWBISTERR:1; // 5 CPU2HWBISTERR Flag Clear
63 | Uint16 PIEVECTERR:1; // 6 PIEVECTERR Flag Clear
64 | Uint16 rsvd1:1; // 7 Reserved
65 | Uint16 rsvd2:1; // 8 Reserved
66 | Uint16 CPU2WDRSn:1; // 9 CPU2WDRSn Flag Clear
67 | Uint16 CPU2NMIWDRSn:1; // 10 CPU2NMIWDRSn Flag Clear
68 | Uint16 OVF:1; // 11 OVF Flag Clear
69 | Uint16 rsvd3:4; // 15:12 Reserved
70 | };
71 |
72 | union NMIFLGCLR_REG {
73 | Uint16 all;
74 | struct NMIFLGCLR_BITS bit;
75 | };
76 |
77 | struct NMIFLGFRC_BITS { // bits description
78 | Uint16 rsvd1:1; // 0 Reserved
79 | Uint16 CLOCKFAIL:1; // 1 CLOCKFAIL Flag Force
80 | Uint16 RAMUNCERR:1; // 2 RAMUNCERR Flag Force
81 | Uint16 FLUNCERR:1; // 3 FLUNCERR Flag Force
82 | Uint16 CPU1HWBISTERR:1; // 4 CPU1HWBISTERR Flag Force
83 | Uint16 CPU2HWBISTERR:1; // 5 CPU2HWBISTERR Flag Force
84 | Uint16 PIEVECTERR:1; // 6 PIEVECTERR Flag Force
85 | Uint16 rsvd2:1; // 7 Reserved
86 | Uint16 rsvd3:1; // 8 Reserved
87 | Uint16 CPU2WDRSn:1; // 9 CPU2WDRSn Flag Force
88 | Uint16 CPU2NMIWDRSn:1; // 10 CPU2NMIWDRSn Flag Force
89 | Uint16 OVF:1; // 11 OVF Flag Force
90 | Uint16 rsvd4:4; // 15:12 Reserved
91 | };
92 |
93 | union NMIFLGFRC_REG {
94 | Uint16 all;
95 | struct NMIFLGFRC_BITS bit;
96 | };
97 |
98 | struct NMISHDFLG_BITS { // bits description
99 | Uint16 rsvd1:1; // 0 Reserved
100 | Uint16 CLOCKFAIL:1; // 1 Shadow CLOCKFAIL Flag
101 | Uint16 RAMUNCERR:1; // 2 Shadow RAMUNCERR Flag
102 | Uint16 FLUNCERR:1; // 3 Shadow FLUNCERR Flag
103 | Uint16 CPU1HWBISTERR:1; // 4 Shadow CPU1HWBISTERR Flag
104 | Uint16 CPU2HWBISTERR:1; // 5 Shadow CPU2HWBISTERR Flag
105 | Uint16 PIEVECTERR:1; // 6 Shadow PIEVECTERR Flag
106 | Uint16 rsvd2:1; // 7 Reserved
107 | Uint16 rsvd3:1; // 8 Reserved
108 | Uint16 CPU2WDRSn:1; // 9 Shadow CPU2WDRSn Flag
109 | Uint16 CPU2NMIWDRSn:1; // 10 Shadow CPU2NMIWDRSn Flag
110 | Uint16 OVF:1; // 11 Shadow OVF Flag
111 | Uint16 rsvd4:4; // 15:12 Reserved
112 | };
113 |
114 | union NMISHDFLG_REG {
115 | Uint16 all;
116 | struct NMISHDFLG_BITS bit;
117 | };
118 |
119 | struct NMI_INTRUPT_REGS {
120 | union NMICFG_REG NMICFG; // NMI Configuration Register
121 | union NMIFLG_REG NMIFLG; // NMI Flag Register (XRSn Clear)
122 | union NMIFLGCLR_REG NMIFLGCLR; // NMI Flag Clear Register
123 | union NMIFLGFRC_REG NMIFLGFRC; // NMI Flag Force Register
124 | Uint16 NMIWDCNT; // NMI Watchdog Counter Register
125 | Uint16 NMIWDPRD; // NMI Watchdog Period Register
126 | union NMISHDFLG_REG NMISHDFLG; // NMI Shadow Flag Register
127 | };
128 |
129 | //---------------------------------------------------------------------------
130 | // NMIINTRUPT External References & Function Declarations:
131 | //
132 | #ifdef CPU1
133 | extern volatile struct NMI_INTRUPT_REGS NmiIntruptRegs;
134 | #endif
135 | #ifdef CPU2
136 | extern volatile struct NMI_INTRUPT_REGS NmiIntruptRegs;
137 | #endif
138 | #ifdef __cplusplus
139 | }
140 | #endif /* extern "C" */
141 |
142 | #endif
143 |
144 | //===========================================================================
145 | // End of file.
146 | //===========================================================================
147 |
--------------------------------------------------------------------------------
/User_peripheral/PeripheralHeader/F2837xD_xint.h:
--------------------------------------------------------------------------------
1 | //###########################################################################
2 | //
3 | // FILE: F2837xD_xint.h
4 | //
5 | // TITLE: F2837xD Device XINT Register Definitions.
6 | //
7 | //###########################################################################
8 | // $TI Release: F2837xD Support Library v210 $
9 | // $Release Date: Tue Nov 1 14:46:15 CDT 2016 $
10 | // $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
11 | // http://www.ti.com/ ALL RIGHTS RESERVED $
12 | //###########################################################################
13 |
14 | #ifndef __F2837xD_XINT_H__
15 | #define __F2837xD_XINT_H__
16 |
17 | #ifdef __cplusplus
18 | extern "C" {
19 | #endif
20 |
21 |
22 | //---------------------------------------------------------------------------
23 | // XINT Individual Register Bit Definitions:
24 |
25 | struct XINT1CR_BITS { // bits description
26 | Uint16 ENABLE:1; // 0 XINT1 Enable
27 | Uint16 rsvd1:1; // 1 Reserved
28 | Uint16 POLARITY:2; // 3:2 XINT1 Polarity
29 | Uint16 rsvd2:12; // 15:4 Reserved
30 | };
31 |
32 | union XINT1CR_REG {
33 | Uint16 all;
34 | struct XINT1CR_BITS bit;
35 | };
36 |
37 | struct XINT2CR_BITS { // bits description
38 | Uint16 ENABLE:1; // 0 XINT2 Enable
39 | Uint16 rsvd1:1; // 1 Reserved
40 | Uint16 POLARITY:2; // 3:2 XINT2 Polarity
41 | Uint16 rsvd2:12; // 15:4 Reserved
42 | };
43 |
44 | union XINT2CR_REG {
45 | Uint16 all;
46 | struct XINT2CR_BITS bit;
47 | };
48 |
49 | struct XINT3CR_BITS { // bits description
50 | Uint16 ENABLE:1; // 0 XINT3 Enable
51 | Uint16 rsvd1:1; // 1 Reserved
52 | Uint16 POLARITY:2; // 3:2 XINT3 Polarity
53 | Uint16 rsvd2:12; // 15:4 Reserved
54 | };
55 |
56 | union XINT3CR_REG {
57 | Uint16 all;
58 | struct XINT3CR_BITS bit;
59 | };
60 |
61 | struct XINT4CR_BITS { // bits description
62 | Uint16 ENABLE:1; // 0 XINT4 Enable
63 | Uint16 rsvd1:1; // 1 Reserved
64 | Uint16 POLARITY:2; // 3:2 XINT4 Polarity
65 | Uint16 rsvd2:12; // 15:4 Reserved
66 | };
67 |
68 | union XINT4CR_REG {
69 | Uint16 all;
70 | struct XINT4CR_BITS bit;
71 | };
72 |
73 | struct XINT5CR_BITS { // bits description
74 | Uint16 ENABLE:1; // 0 XINT5 Enable
75 | Uint16 rsvd1:1; // 1 Reserved
76 | Uint16 POLARITY:2; // 3:2 XINT5 Polarity
77 | Uint16 rsvd2:12; // 15:4 Reserved
78 | };
79 |
80 | union XINT5CR_REG {
81 | Uint16 all;
82 | struct XINT5CR_BITS bit;
83 | };
84 |
85 | struct XINT_REGS {
86 | union XINT1CR_REG XINT1CR; // XINT1 configuration register
87 | union XINT2CR_REG XINT2CR; // XINT2 configuration register
88 | union XINT3CR_REG XINT3CR; // XINT3 configuration register
89 | union XINT4CR_REG XINT4CR; // XINT4 configuration register
90 | union XINT5CR_REG XINT5CR; // XINT5 configuration register
91 | Uint16 rsvd1[3]; // Reserved
92 | Uint16 XINT1CTR; // XINT1 counter register
93 | Uint16 XINT2CTR; // XINT2 counter register
94 | Uint16 XINT3CTR; // XINT3 counter register
95 | };
96 |
97 | //---------------------------------------------------------------------------
98 | // XINT External References & Function Declarations:
99 | //
100 | #ifdef CPU1
101 | extern volatile struct XINT_REGS XintRegs;
102 | #endif
103 | #ifdef CPU2
104 | extern volatile struct XINT_REGS XintRegs;
105 | #endif
106 | #ifdef __cplusplus
107 | }
108 | #endif /* extern "C" */
109 |
110 | #endif
111 |
112 | //===========================================================================
113 | // End of file.
114 | //===========================================================================
115 |
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1 |
2 | MEMORY
3 | {
4 | PAGE 0 :
5 | /* BEGIN is used for the "boot to SARAM" bootloader mode */
6 |
7 | BEGIN : origin = 0x000000, length = 0x000002
8 | RAMM0 : origin = 0x000122, length = 0x0002DE
9 | RAMD0 : origin = 0x00B000, length = 0x000800
10 | RAMLS0 : origin = 0x008000, length = 0x000800
11 | RAMLS1 : origin = 0x008800, length = 0x000800
12 | RAMLS2 : origin = 0x009000, length = 0x000800
13 | RAMLS3 : origin = 0x009800, length = 0x000800
14 | RAMLS4 : origin = 0x00A000, length = 0x000800
15 | RESET : origin = 0x3FFFC0, length = 0x000002
16 |
17 | PAGE 1 :
18 |
19 | BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
20 | RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
21 | RAMD1 : origin = 0x00B800, length = 0x000800
22 |
23 | RAMLS5 : origin = 0x00A800, length = 0x000800
24 |
25 | RAMGS0 : origin = 0x00C000, length = 0x001000
26 | RAMGS1 : origin = 0x00D000, length = 0x001000
27 | RAMGS2 : origin = 0x00E000, length = 0x001000
28 | RAMGS3 : origin = 0x00F000, length = 0x001000
29 | RAMGS4 : origin = 0x010000, length = 0x001000
30 | RAMGS5 : origin = 0x011000, length = 0x001000
31 | RAMGS6 : origin = 0x012000, length = 0x001000
32 | RAMGS7 : origin = 0x013000, length = 0x001000
33 | RAMGS8 : origin = 0x014000, length = 0x001000
34 | RAMGS9 : origin = 0x015000, length = 0x001000
35 | RAMGS10 : origin = 0x016000, length = 0x001000
36 | RAMGS11 : origin = 0x017000, length = 0x001000
37 | RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
38 | RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
39 | RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
40 | RAMGS15 : origin = 0x01B000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
41 |
42 | CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
43 | CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
44 |
45 | CANA_MSG_RAM : origin = 0x049000, length = 0x000800
46 | CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
47 | }
48 |
49 |
50 | SECTIONS
51 | {
52 | codestart : > BEGIN, PAGE = 0
53 | .text : >>RAMM0 | RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
54 | .cinit : > RAMM0, PAGE = 0
55 | .pinit : > RAMM0, PAGE = 0
56 | .switch : > RAMM0, PAGE = 0
57 | .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
58 |
59 | .stack : > RAMM1, PAGE = 1
60 | .ebss : > RAMLS5, PAGE = 1
61 | .econst : > RAMLS5, PAGE = 1
62 | .esysmem : > RAMLS5, PAGE = 1
63 | //Filter_RegsFile : > RAMGS0, PAGE = 1
64 |
65 | SHARERAMGS0 : > RAMGS0, PAGE = 1
66 | SHARERAMGS1 : > RAMGS1, PAGE = 1
67 |
68 | ramgs0 : > RAMGS0, PAGE = 1
69 | ramgs1 : > RAMGS1, PAGE = 1
70 |
71 | #ifdef __TI_COMPILER_VERSION__
72 | ramfuncs : > RAMM0 PAGE = 0
73 | #endif
74 |
75 | /* The following section definitions are required when using the IPC API Drivers */
76 | GROUP : > CPU1TOCPU2RAM, PAGE = 1
77 | {
78 | PUTBUFFER
79 | PUTWRITEIDX
80 | GETREADIDX
81 | }
82 |
83 | GROUP : > CPU2TOCPU1RAM, PAGE = 1
84 | {
85 | GETBUFFER : TYPE = DSECT
86 | GETWRITEIDX : TYPE = DSECT
87 | PUTREADIDX : TYPE = DSECT
88 | }
89 |
90 | /* The following section definition are for SDFM examples */
91 | Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
92 | Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
93 | Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
94 | Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
95 | Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
96 | }
97 |
98 | /*
99 | //===========================================================================
100 | // End of file.
101 | //===========================================================================
102 | */
103 |
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1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
15 |
16 |
17 |
18 |
19 |
20 |
21 |
22 |
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/connections/xds200new.ccxml:
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