├── .github └── workflows │ ├── build.yml │ └── nightly.yml ├── .gitignore ├── Cargo.toml ├── LICENSE-APACHE ├── LICENSE-MIT ├── README.md ├── d ├── data ├── chips │ ├── HPM5301.yaml │ ├── HPM5321.yaml │ ├── HPM5331.yaml │ ├── HPM5361.yaml │ ├── HPM6220.yaml │ ├── HPM6240.yaml │ ├── HPM6260.yaml │ ├── HPM6264.yaml │ ├── HPM6280.yaml │ ├── HPM6284.yaml │ ├── HPM6320.yaml │ ├── HPM6330.yaml │ ├── HPM6340.yaml │ ├── HPM6350.yaml │ ├── HPM6360.yaml │ ├── HPM6364.yaml │ ├── HPM6420.yaml │ ├── HPM6430.yaml │ ├── HPM6450.yaml │ ├── HPM6454.yaml │ ├── HPM64A0.yaml │ ├── HPM64G0.yaml │ ├── HPM6730.yaml │ ├── HPM6750.yaml │ ├── HPM6754.yaml │ ├── HPM6830.yaml │ ├── HPM6850.yaml │ ├── HPM6880.yaml │ ├── HPM6E50.yaml │ ├── HPM6E60.yaml │ ├── HPM6E70.yaml │ └── HPM6E80.yaml ├── dmamux │ ├── HPM5301.yaml │ ├── HPM5361.yaml │ ├── HPM6280.yaml │ ├── HPM6360.yaml │ ├── HPM6750.yaml │ ├── HPM6880.yaml │ └── HPM6E80.yaml ├── family │ ├── COMMON.yaml │ ├── HPM5300.yaml │ ├── HPM5300_ADC1.yaml │ ├── HPM5300_DAC.yaml │ ├── HPM5300_GPTMR23.yaml │ ├── HPM5300_MCAN.yaml │ ├── HPM5300_Motion.yaml │ ├── HPM5300_OPAMP.yaml │ ├── HPM5300_PLB.yaml │ ├── HPM5300_Secure.yaml │ ├── HPM5300_UART4567.yaml │ ├── HPM6200.yaml │ ├── HPM6200_NonBasic.yaml │ ├── HPM6300.yaml │ ├── HPM6300_ADC23_DAC.yaml │ ├── HPM6300_CAN.yaml │ ├── HPM6300_FFA.yaml │ ├── HPM6300_I2C3.yaml │ ├── HPM6300_QEI_HALL.yaml │ ├── HPM6300_SPI3.yaml │ ├── HPM6300_UART567.yaml │ ├── HPM6300_USB_ENET.yaml │ ├── HPM6700_6400.yaml │ ├── HPM6800.yaml │ ├── HPM6800_Adv.yaml │ ├── HPM6800_NonBasic.yaml │ ├── HPM6E00.yaml │ ├── HPM6E00_NonBasic.yaml │ └── HPM6E00_TSW.yaml ├── interrupts │ ├── HPM5301.yaml │ ├── HPM5361.yaml │ ├── HPM6280.yaml │ ├── HPM6360.yaml │ ├── HPM6750.yaml │ ├── HPM6830.yaml │ ├── HPM6850.yaml │ ├── HPM6880.yaml │ └── HPM6E80.yaml ├── pinmux │ ├── HPM5361.json │ ├── HPM6284.json │ ├── HPM6364.json │ ├── HPM6750.json │ ├── HPM6880.json │ ├── HPM6E80.json │ └── README.md └── registers │ ├── acmp_common.yaml │ ├── acmp_v6e.yaml │ ├── adc12_v67.yaml │ ├── adc16_v53.yaml │ ├── adc16_v63.yaml │ ├── adc16_v67.yaml │ ├── adc16_v68.yaml │ ├── adc16_v6e.yaml │ ├── bcfg_v62.yaml │ ├── bcfg_v67.yaml │ ├── bcfg_v68.yaml │ ├── bkey_common.yaml │ ├── bmon_common.yaml │ ├── bpor_v67.yaml │ ├── bpor_v68.yaml │ ├── bsec_common.yaml │ ├── butn_common.yaml │ ├── cam_v67.yaml │ ├── cam_v68.yaml │ ├── can_v67.yaml │ ├── clc_v6e.yaml │ ├── conctl_v67.yaml │ ├── crc_common.yaml │ ├── dac_v53.yaml │ ├── dac_v63.yaml │ ├── dao_v67.yaml │ ├── dao_v68.yaml │ ├── ddrctl_v68.yaml │ ├── ddrphy_v68.yaml │ ├── dma_v53.yaml │ ├── dma_v62.yaml │ ├── dma_v67.yaml │ ├── dma_v6e.yaml │ ├── dmamux_common.yaml │ ├── enet_v63.yaml │ ├── enet_v67.yaml │ ├── enet_v68.yaml │ ├── esc_v6e.yaml │ ├── femc_common.yaml │ ├── ffa_common.yaml │ ├── ffa_v6e.yaml │ ├── gpio_common.yaml │ ├── gpio_v53.yaml │ ├── gpiom_v53.yaml │ ├── gpiom_v63.yaml │ ├── gpiom_v67.yaml │ ├── gpiom_v68.yaml │ ├── gpu_v68.yaml │ ├── gwc_v68.yaml │ ├── hall_common.yaml │ ├── i2c_v53.yaml │ ├── i2c_v67.yaml │ ├── i2s_common.yaml │ ├── ioc_common.yaml │ ├── ioc_v67.yaml │ ├── jpeg_common.yaml │ ├── keym_common.yaml │ ├── lcb_v68.yaml │ ├── lcdc_v67.yaml │ ├── lcdc_v68.yaml │ ├── lin_v62.yaml │ ├── lobs_v6e.yaml │ ├── lvb_v68.yaml │ ├── mbx_common.yaml │ ├── mcan_v53.yaml │ ├── mcan_v68.yaml │ ├── mchtmr_common.yaml │ ├── mipicsi_v68.yaml │ ├── mipicsiphy_v68.yaml │ ├── mipidsi_v68.yaml │ ├── mipidsiphy_v68.yaml │ ├── mmc_v53.yaml │ ├── mono_common.yaml │ ├── mtg_v6e.yaml │ ├── opamp_v53.yaml │ ├── otp_common.yaml │ ├── pcfg_v53.yaml │ ├── pcfg_v67.yaml │ ├── pcfg_v68.yaml │ ├── pcfg_v6e.yaml │ ├── pdgo_v53.yaml │ ├── pdm_common.yaml │ ├── pdma_v67.yaml │ ├── pdma_v68.yaml │ ├── pixelmux_v68.yaml │ ├── pla_v62.yaml │ ├── plb_v53.yaml │ ├── plb_v6e.yaml │ ├── plic_common.yaml │ ├── plicsw_common.yaml │ ├── pllctl_v2.yaml │ ├── pllctl_v67.yaml │ ├── pmon_common.yaml │ ├── ppi_v6e.yaml │ ├── ppor_v53.yaml │ ├── ppor_v67.yaml │ ├── ppor_v68.yaml │ ├── psec_common.yaml │ ├── ptpc_common.yaml │ ├── pwm_v53.yaml │ ├── pwm_v62.yaml │ ├── pwm_v67.yaml │ ├── pwm_v6e.yaml │ ├── qei_v53.yaml │ ├── qei_v67.yaml │ ├── qei_v6e.yaml │ ├── qeo_v53.yaml │ ├── qeo_v6e.yaml │ ├── rdc_v53.yaml │ ├── rdc_v6e.yaml │ ├── rng_common.yaml │ ├── rtc_common.yaml │ ├── sdm_v62.yaml │ ├── sdm_v6e.yaml │ ├── sdp_v53.yaml │ ├── sdp_v67.yaml │ ├── sdxc_v63.yaml │ ├── sdxc_v67.yaml │ ├── sdxc_v68.yaml │ ├── sec_common.yaml │ ├── sei_v53.yaml │ ├── sei_v6e.yaml │ ├── smix_v68.yaml │ ├── spi_v53.yaml │ ├── spi_v67.yaml │ ├── synt_v53.yaml │ ├── synt_v67.yaml │ ├── sysctl_v53.yaml │ ├── sysctl_v62.yaml │ ├── sysctl_v63.yaml │ ├── sysctl_v67.yaml │ ├── sysctl_v68.yaml │ ├── sysctl_v6e.yaml │ ├── tamp_v62.yaml │ ├── tamp_v67.yaml │ ├── tmr_common.yaml │ ├── tmr_v68.yaml │ ├── tmr_v6e.yaml │ ├── trgm_v53.yaml │ ├── trgm_v62.yaml │ ├── trgm_v67.yaml │ ├── tsns_common.yaml │ ├── tsw_v6e.yaml │ ├── uart_v53.yaml │ ├── uart_v62.yaml │ ├── uart_v67.yaml │ ├── uart_v68.yaml │ ├── usb_v53.yaml │ ├── usb_v67.yaml │ ├── vad_common.yaml │ ├── vsc_v6e.yaml │ ├── wdg_v53.yaml │ ├── wdg_v67.yaml │ ├── wdg_v68.yaml │ └── xpi_dummy.yaml ├── hpm-data-gen ├── Cargo.toml └── src │ ├── dma.rs │ ├── interrupts.rs │ ├── iomux.rs │ ├── main.rs │ ├── pinmux.rs │ ├── pins.rs │ ├── registers.rs │ ├── sysctl.rs │ └── trgmmux.rs ├── hpm-data-macros ├── Cargo.toml ├── src │ └── lib.rs └── tests │ └── test_macros.rs ├── hpm-data-serde ├── Cargo.toml └── src │ └── lib.rs ├── hpm-metapac-gen ├── Cargo.toml ├── res │ ├── Cargo.toml │ ├── build.rs │ └── src │ │ ├── lib.rs │ │ └── metadata.rs └── src │ ├── data.rs │ ├── lib.rs │ └── main.rs └── svd ├── HPM5301_svd.xml ├── HPM5361_svd.xml ├── HPM6280_svd.xml ├── HPM6360_svd.xml ├── HPM6750_svd.xml ├── HPM6880_svd.xml └── HPM6E80_svd.xml /.github/workflows/build.yml: -------------------------------------------------------------------------------- 1 | name: metapac build 2 | 3 | on: 4 | pull_request: 5 | branches: ["main"] 6 | paths-ignore: 7 | - '*.md' 8 | push: 9 | branches: ["main"] 10 | 11 | env: 12 | CARGO_TERM_COLOR: always 13 | 14 | jobs: 15 | build: 16 | runs-on: ubuntu-latest 17 | steps: 18 | - uses: actions/checkout@v3 19 | - name: Use nightly Rust 20 | run: | 21 | rustup default nightly 22 | rustup target add riscv32imafc-unknown-none-elf 23 | - name: Prepare dependencies 24 | run: | 25 | ./d download-all 26 | - name: Build 27 | run: | 28 | ./d gen 29 | - name: Test 30 | run: | 31 | cd build/hpm-metapac/ 32 | cargo build --features pac,metadata,rt,memory-x,hpm6750 --target riscv32imafc-unknown-none-elf 33 | cargo build --features pac,metadata,rt,memory-x,hpm6360 --target riscv32imafc-unknown-none-elf 34 | cargo build --features pac,metadata,rt,memory-x,hpm6260 --target riscv32imafc-unknown-none-elf 35 | cargo build --features pac,metadata,rt,memory-x,hpm5361 --target riscv32imafc-unknown-none-elf 36 | cargo build --features pac,metadata,rt,memory-x,hpm6880 --target riscv32imafc-unknown-none-elf 37 | cargo doc --features pac,metadata,rt,memory-x,hpm5361 --target riscv32imafc-unknown-none-elf 38 | -------------------------------------------------------------------------------- /.github/workflows/nightly.yml: -------------------------------------------------------------------------------- 1 | name: metapac publish 2 | 3 | on: 4 | push: 5 | branches: ["main"] 6 | 7 | env: 8 | CARGO_TERM_COLOR: always 9 | 10 | jobs: 11 | build: 12 | runs-on: ubuntu-latest 13 | # due to lack of perimissions, the nightly is published via a different repository 14 | if: ${{ github.repository == 'andelf/hpm-data' }} 15 | steps: 16 | - uses: actions/checkout@v3 17 | - name: Use nightly Rust 18 | run: | 19 | rustup default nightly 20 | rustup component add rustfmt 21 | - name: Deploy SSH key 22 | run: | 23 | mkdir ~/.ssh 24 | echo "${{ secrets.NIGHTLIES_KEY }}" > ~/.ssh/id_rsa 25 | chmod 700 ~/.ssh 26 | chmod 600 ~/.ssh/id_rsa 27 | ssh-keyscan -t rsa github.com 28 | - name: Build 29 | run: | 30 | COMMIT=$(git rev-parse HEAD) 31 | COMMIT_MESSAGE=$(git log -1 --pretty=%B) 32 | mkdir -p build 33 | git clone --depth 1 git@github.com:hpmicro-rs/hpm-metapac.git build/hpm-metapac/ 34 | ./d download-all 35 | ./d gen 36 | ./d prepare-publish 37 | cd build/hpm-metapac/ 38 | git init 39 | git add . 40 | git config user.name "hpm-data builder" 41 | git config user.email "action@github.com" 42 | git commit -m "hpmicro/hpm-data master $COMMIT" --allow-empty 43 | git tag -a hpm-data-$COMMIT -m "Generated from hpmicro/hpm-data $COMMIT" 44 | - name: Test 45 | run: | 46 | cd build/hpm-metapac/ 47 | cargo doc --features hpm5361,metadata 48 | - name: Push 49 | run: | 50 | cd build/hpm-metapac/ 51 | git push origin main --follow-tags 52 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | tmp/ 2 | .DS_Store 3 | **/target 4 | Cargo.lock 5 | build/ 6 | **/trash 7 | 8 | hpm_sdk/ 9 | -------------------------------------------------------------------------------- /Cargo.toml: -------------------------------------------------------------------------------- 1 | [workspace] 2 | resolver = "2" 3 | members = [ 4 | "hpm-data-gen", 5 | "hpm-data-serde", 6 | "hpm-metapac-gen", 7 | "hpm-data-macros", 8 | ] 9 | exclude = ["build"] 10 | -------------------------------------------------------------------------------- /LICENSE-MIT: -------------------------------------------------------------------------------- 1 | Copyright (c) 2023 Andelf 2 | 3 | Permission is hereby granted, free of charge, to any 4 | person obtaining a copy of this software and associated 5 | documentation files (the "Software"), to deal in the 6 | Software without restriction, including without 7 | limitation the rights to use, copy, modify, merge, 8 | publish, distribute, sublicense, and/or sell copies of 9 | the Software, and to permit persons to whom the Software 10 | is furnished to do so, subject to the following 11 | conditions: 12 | 13 | The above copyright notice and this permission notice 14 | shall be included in all copies or substantial portions 15 | of the Software. 16 | 17 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF 18 | ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED 19 | TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 20 | PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT 21 | SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 22 | CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23 | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR 24 | IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 25 | DEALINGS IN THE SOFTWARE. 26 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # hpm-data & hpm-metapac 2 | 3 | [![CI Status][badge-actions]][actions-build] 4 | [![Crates.io][badge-crates-io]][crates-io] 5 | [![Docs.rs][badge-docs-rs]][docs-rs] 6 | 7 | [badge-actions]: https://img.shields.io/github/actions/workflow/status/hpmicro/hpm-data/build.yml?style=for-the-badge&label=CI&20Tests 8 | [actions-build]: https://github.com/hpmicro/hpm-data/actions/workflows/build.yml 9 | [badge-crates-io]: https://img.shields.io/crates/v/hpm-metapac.svg?style=for-the-badge 10 | [crates-io]: https://crates.io/crates/hpm-metapac 11 | [badge-docs-rs]: https://img.shields.io/docsrs/hpm-metapac?style=for-the-badge 12 | [docs-rs]: https://docs.rs/hpm-metapac 13 | 14 | The structured MCU DB of HPM MCUs. The home of [hpm-metapac][docs-rs]. 15 | 16 | All PRs and Issues are handled in [hpmicro/hpm-data](https://github.com/hpmicro/hpm-data). 17 | 18 | `hpm-metapac` is generated from this repo. For each commit(or push) of hpm-data, it's pushed to , 19 | with a tag of `hpm-data-`. 20 | 21 | ## hpm-metapac 22 | 23 | - The `hpm-metapac` crate has a `metadata` feature, when enabled, it will provide the basic metadata of the currrent MCU 24 | - Patch vectored interrupt mode, add `CORE_LOCAL` for Non-External Interrupts 25 | - To best fit for HPM RISC-V's clustered register desigin, the following is added: 26 | - All clocks, for `SYSCTL.CLOCK`, under `hpm_metapac::clocks::` 27 | - All SYSCTL resources, under `hpm_metapac::resources::` 28 | - All GPIOs and it's PADs, for `IOC`, under `hpm_metapac::pins::` 29 | - All IOMUX settings (`FUNC_CTL`), under `hpm_metapac::iomux::` 30 | - All TRGM const definitions, under `hpm_metapac::trgmmux::` 31 | - The version on crates.io is not updated frequently, please use the git repo directly 32 | 33 | ### Usage 34 | 35 | ```toml 36 | [dependencies] 37 | hpm-metapac = { version = "0.0.4", git = "https://github.com/hpmicro-rs/hpm-metapac.git", tag = "hpm-data-d8c87c6a676818ff6abd3b7ae54a1a7612cc8534", features = ["hpm5361"] } 38 | 39 | # If you want to use the metadata feature in build.rs 40 | [build-dependencies] 41 | hpm-metapac = { version = "0.0.4", git = "https://github.com/hpmicro-rs/hpm-metapac.git", tag = "hpm-data-d8c87c6a676818ff6abd3b7ae54a1a7612cc8534", default-features = false, features = [ 42 | "metadata", 43 | "hpm5361", 44 | ] } 45 | ``` 46 | 47 | A simple example to configure pin PA25 for PWM1_P1: 48 | 49 | ```rust 50 | use hpm_metapac as pac; 51 | use pac::{iomux, pins}; 52 | 53 | pac::IOC 54 | .pad(pins::PA25) 55 | .func_ctl() 56 | .modify(|w| w.set_alt_select(iomux::IOC_PA25_FUNC_CTL_PWM1_P_1)); 57 | ``` 58 | 59 | ### Development 60 | 61 | To get a local build of `hpm-metapac`, you can use the following commands: 62 | 63 | ```sh 64 | ./d download-all 65 | ./d gen 66 | ``` 67 | 68 | Now you have a local build of `hpm-metapac` in the `build/hpm-metapac` directory. 69 | 70 | ```toml 71 | [dependencies] 72 | hpm-metapac = { path = "path/to/hpm-data/build/hpm-metapac", features = ["hpm5361"] } 73 | ``` 74 | 75 | ## Support Status 76 | 77 | - All peripherals are supported 78 | - All MCU families are supported 79 | - Peripherals that have an HAL driver or raw PAC demo in [hpm-hal](https://github.com/hpmicro/hpm-hal) are reviewed and tested 80 | 81 | ### MCU Family 82 | 83 | (in order of release date) 84 | 85 | - HPM6700/HPM6400 - High performance 86 | - HPM6300 - General purpose 87 | - HPM6200 - High performance, real-time, mixed signal 88 | - HPM5300 - General purpose, motion control 89 | - HPM6800 - Display dirver, user interface 90 | - HPM6E00 - EtherCAT 91 | 92 | ## Data Source 93 | 94 | - 95 | - 96 | - 97 | - 98 | 99 | ## Project History 100 | 101 | As of 2024-09-19, this project is transferred from [andelf](https://github.com/andelf) to [hpmicro](https://github.com/hpmicro). 102 | -------------------------------------------------------------------------------- /d: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | 3 | set -ex 4 | 5 | cd $(dirname $0) 6 | 7 | CMD=$1 8 | shift 9 | 10 | case "$CMD" in 11 | download-all) 12 | git clone --depth 1 --branch v1.6.0 https://github.com/hpmicro/hpm_sdk.git 13 | ;; 14 | install-chiptool) 15 | cargo install --git https://github.com/ch32-rs/chiptool 16 | ;; 17 | extract-all) 18 | peri=$1 19 | shift 20 | echo $@ 21 | 22 | rm -rf tmp/$peri 23 | mkdir -p tmp/$peri 24 | 25 | for f in `ls svd/HPM*`; do 26 | echo $f 27 | svd_path=$f 28 | f=${f#"svd/HPM"} 29 | f=${f%"_svd.xml"} 30 | echo -n processing $f ... 31 | if test -f transforms/$peri.yaml; then 32 | trans_args="--transform transforms/$peri.yaml" 33 | fi 34 | 35 | if chiptool extract-peripheral $trans_args --svd $svd_path --peripheral $peri $@ > tmp/$peri/$f.yaml 2> tmp/$peri/$f.err; then 36 | rm tmp/$peri/$f.err 37 | echo OK 38 | else 39 | if grep -q 'peripheral not found' tmp/$peri/$f.err; then 40 | echo No Peripheral 41 | else 42 | echo OTHER FAILURE 43 | fi 44 | rm tmp/$peri/$f.yaml 45 | fi 46 | done 47 | ;; 48 | gen) 49 | rm -rf build/data 50 | RUST_BACKTRACE=1 cargo run -p hpm-data-gen 51 | RUST_BACKTRACE=1 cargo run -p hpm-metapac-gen -- "HPM53*" "HPM67*" "HPM64*" "HPM62*" "HPM63*" "HPM68*" "HPM6E*" 52 | ;; 53 | prepare-publish) 54 | cd build/hpm-metapac/ 55 | cp -v ../../README.md . 56 | cp -v ../../LICENSE* . 57 | find src -iname '*.rs' -exec rustfmt -v {} \; 58 | ;; 59 | *) 60 | echo "unknown command" 61 | ;; 62 | esac 63 | 64 | -------------------------------------------------------------------------------- /data/chips/HPM5301.yaml: -------------------------------------------------------------------------------- 1 | name: HPM5301 2 | family: HPM5300 Series 3 | sub_family: HPM5300, Single-core, Basic 4 | packages: 5 | - name: HPM5301xEGx 6 | package: QFN48 7 | pins: 48 8 | memory: 9 | - address: 0x00000000 10 | kind: ram 11 | name: ILM 12 | size: 128K 13 | - address: 0x00080000 14 | kind: ram 15 | name: DLM 16 | size: 128K 17 | - address: 0xf0400000 18 | kind: ram 19 | name: AHB_SRAM 20 | size: 32K 21 | - address: 0x80000000 22 | kind: flash 23 | name: XPI0 24 | size: 1M 25 | cores: 26 | - name: RV32-IMAFDCPB # D25 27 | ip-core: Andes D25F 28 | include_peripherals: 29 | - "../family/COMMON.yaml" 30 | - "../family/HPM5300.yaml" 31 | include_interrupts: "../interrupts/HPM5361.yaml" 32 | include_dmamux: "../dmamux/HPM5301.yaml" 33 | gen_dma_channels: 34 | HDMA: 32 35 | -------------------------------------------------------------------------------- /data/chips/HPM5321.yaml: -------------------------------------------------------------------------------- 1 | name: HPM5321 2 | family: HPM5300 Series 3 | sub_family: HPM5300, Single-core, Communication 4 | packages: 5 | - name: HPM5321xCBx 6 | package: LQFP100 7 | pins: 100 8 | - name: HPM5321xCFx 9 | package: LQFP64 10 | pins: 64 11 | - name: HPM5321xEGx 12 | package: QFN48 13 | pins: 48 14 | memory: 15 | - address: 0x00000000 16 | kind: ram 17 | name: ILM 18 | size: 128K 19 | - address: 0x00080000 20 | kind: ram 21 | name: DLM 22 | size: 128K 23 | - address: 0xf0400000 24 | kind: ram 25 | name: AHB_SRAM 26 | size: 32K 27 | - address: 0x80000000 28 | kind: flash 29 | name: XPI0 30 | size: 1M 31 | cores: 32 | - name: RV32-IMAFDCPB # D25 33 | ip-core: Andes D25F 34 | include_peripherals: 35 | - "../family/COMMON.yaml" 36 | - "../family/HPM5300.yaml" 37 | - "../family/HPM5300_GPTMR23.yaml" 38 | - "../family/HPM5300_UART4567.yaml" 39 | - "../family/HPM5300_ADC1.yaml" 40 | - "../family/HPM5300_MCAN.yaml" 41 | - "../family/HPM5300_PLB.yaml" 42 | - "../family/HPM5300_Secure.yaml" 43 | include_interrupts: "../interrupts/HPM5361.yaml" 44 | include_dmamux: "../dmamux/HPM5361.yaml" 45 | gen_dma_channels: 46 | HDMA: 32 47 | 48 | _raw: 49 | "| HPM5321 | Single-core 32-bit | 288 | | | CAN FD | USB HS w/ PHY \xD7\ 50 | 1 | AES128/256, SHA-1/256 | 2*16bit | 14\xD714 100LQFP P0.5 10\xD710 64LQFP P0.5\ 51 | \ 6\xD76 48QFN P0.4 | \u221240 \u223C 125\u25E6C Tj \u221240 \u223C 105\u25E6\ 52 | C Ta | |" 53 | -------------------------------------------------------------------------------- /data/chips/HPM5331.yaml: -------------------------------------------------------------------------------- 1 | name: HPM5331 2 | family: HPM5300 Series 3 | sub_family: HPM5300, Single-core, Motor Control 4 | packages: 5 | - name: HPM5331xCBx 6 | package: LQFP100 7 | pins: 100 8 | - name: HPM5331xCFx 9 | package: LQFP64 10 | pins: 64 11 | - name: HPM5331xEGx 12 | package: QFN48 13 | pins: 48 14 | memory: 15 | - address: 0x00000000 16 | kind: ram 17 | name: ILM 18 | size: 128K 19 | - address: 0x00080000 20 | kind: ram 21 | name: DLM 22 | size: 128K 23 | - address: 0xf0400000 24 | kind: ram 25 | name: AHB_SRAM 26 | size: 32K 27 | - address: 0x80000000 28 | kind: flash 29 | name: XPI0 30 | size: 1M 31 | cores: 32 | - name: RV32-IMAFDCPB # D25 33 | ip-core: Andes D25F 34 | include_peripherals: 35 | - "../family/COMMON.yaml" 36 | - "../family/HPM5300.yaml" 37 | - "../family/HPM5300_PLB.yaml" 38 | - "../family/HPM5300_GPTMR23.yaml" 39 | - "../family/HPM5300_ADC1.yaml" 40 | - "../family/HPM5300_DAC.yaml" 41 | - "../family/HPM5300_OPAMP.yaml" 42 | - "../family/HPM5300_Motion.yaml" 43 | - "../family/HPM5300_Secure.yaml" 44 | include_interrupts: "../interrupts/HPM5361.yaml" 45 | include_dmamux: "../dmamux/HPM5361.yaml" 46 | gen_dma_channels: 47 | HDMA: 32 48 | 49 | _raw: 50 | "| HPM5331 | Single-core 32-bit | 288 | | | | USB HS w/ PHY \xD71 |\ 51 | \ AES128/256, SHA-1/256 | 2*16bit | 14\xD714 100LQFP P0.5\uFF0C10\xD710 64LQFP P0.5\uFF0C\ 52 | 6\xD76 48QFN P0.4 | \u221240 \u223C 125\u25E6C Tj \u221240 \u223C 105\u25E6C\ 53 | \ Ta | |" 54 | -------------------------------------------------------------------------------- /data/chips/HPM5361.yaml: -------------------------------------------------------------------------------- 1 | name: HPM5361 2 | family: HPM5300 Series 3 | sub_family: HPM5300, Single-core, Full Featured 4 | packages: 5 | - name: HPM5361xCBx 6 | package: LQFP100 7 | pins: 100 8 | - name: HPM5361xCFx 9 | package: LQFP64 10 | pins: 64 11 | - name: HPM5361xEGx 12 | package: QFN48 13 | pins: 48 14 | memory: 15 | - address: 0x00000000 16 | kind: ram 17 | name: ILM 18 | size: 128K 19 | - address: 0x00080000 20 | kind: ram 21 | name: DLM 22 | size: 128K 23 | - address: 0xf0400000 24 | kind: ram 25 | name: AHB_SRAM 26 | size: 32K 27 | - address: 0x80000000 28 | kind: flash 29 | name: XPI0 30 | size: 1M 31 | cores: 32 | - name: RV32-IMAFDCPB # D25 33 | ip-core: Andes D25F 34 | peripherals: [] 35 | include_peripherals: 36 | - "../family/COMMON.yaml" 37 | - "../family/HPM5300.yaml" 38 | - "../family/HPM5300_GPTMR23.yaml" 39 | - "../family/HPM5300_UART4567.yaml" 40 | - "../family/HPM5300_ADC1.yaml" 41 | - "../family/HPM5300_DAC.yaml" 42 | - "../family/HPM5300_OPAMP.yaml" 43 | - "../family/HPM5300_MCAN.yaml" 44 | - "../family/HPM5300_Motion.yaml" 45 | - "../family/HPM5300_PLB.yaml" 46 | - "../family/HPM5300_Secure.yaml" 47 | include_interrupts: "../interrupts/HPM5361.yaml" 48 | include_dmamux: "../dmamux/HPM5361.yaml" 49 | gen_dma_channels: 50 | HDMA: 32 51 | 52 | _raw: 53 | "| HPM5361 | Single-core 32-bit | 288 | | | CAN FD | USB HS w/ PHY \xD7\ 54 | 1 | AES128/256, SHA-1/256 | 2*16bit | 14\xD714 100LQFP P0.5\uFF0C10\xD710 64LQFP\ 55 | \ P0.5\uFF0C6\xD76 48QFN P0.4 | \u221240 \u223C 125\u25E6C Tj \u221240 \u223C\ 56 | \ 105\u25E6C Ta | |" 57 | -------------------------------------------------------------------------------- /data/chips/HPM6220.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6220 2 | family: HPM6200 Series 3 | sub_family: HPM6200, Single-core, Basic 4 | packages: 5 | - name: HPM6220xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6220xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 131072 # 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 131072 # 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM_NOCACHE 23 | size: 131072 # 128K 24 | - address: 0x010A0000 25 | kind: ram 26 | name: AXI_SRAM 27 | size: 114688 # 112K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0x80000000 37 | kind: flash 38 | name: XPI0 39 | size: 1048576 # 1M 40 | cores: 41 | - name: RV32-IMAFDCP 42 | ip-core: Andes D45 43 | peripherals: [] 44 | include_peripherals: 45 | - "../family/COMMON.yaml" 46 | - "../family/HPM6200.yaml" 47 | include_interrupts: "../interrupts/HPM6280.yaml" 48 | include_dmamux: "../dmamux/HPM6280.yaml" 49 | gen_dma_channels: 50 | HDMA: 8 51 | XDMA: 8 52 | _raw: 53 | "| HPM6220 | Single-core 32-bit | 800 | | | | USB HS w/ PHY \xD71 |\ 54 | \ AES128/256, SHA-1/256 | 1\xD716 bit | | -40\u223C\ 55 | 125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | |" 56 | -------------------------------------------------------------------------------- /data/chips/HPM6240.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6240 2 | family: HPM6200 Series 3 | sub_family: HPM6200, Single-core, No PWM 4 | packages: 5 | - name: HPM6240xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6240xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 131072 # 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 131072 # 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM_NOCACHE 23 | size: 131072 # 128K 24 | - address: 0x010A0000 25 | kind: ram 26 | name: AXI_SRAM 27 | size: 114688 # 112K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0x80000000 37 | kind: flash 38 | name: XPI0 39 | size: 1048576 # 1M 40 | cores: 41 | - name: RV32-IMAFDCP 42 | ip-core: Andes D45 43 | peripherals: [] 44 | include_peripherals: 45 | - "../family/COMMON.yaml" 46 | - "../family/HPM6200.yaml" 47 | - "../family/HPM6200_NonBasic.yaml" 48 | include_interrupts: "../interrupts/HPM6280.yaml" 49 | include_dmamux: "../dmamux/HPM6280.yaml" 50 | gen_dma_channels: 51 | HDMA: 8 52 | XDMA: 8 53 | _raw: 54 | "| HPM6240 | Single-core 32-bit | 800 | | | CAN FD | USB HS w/ PHY \xD7\ 55 | 1 | AES128/256, SHA-1/256 | 3\xD716 bits | 20\xD720 144eLQFP P0.5,7\xD77 116BGA\ 56 | \ P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | |" 57 | -------------------------------------------------------------------------------- /data/chips/HPM6260.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6260 2 | family: HPM6200 Series 3 | sub_family: HPM6200, Single-core, Full Featured 4 | packages: 5 | - name: HPM6260xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6260xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 131072 # 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 131072 # 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM_NOCACHE 23 | size: 131072 # 128K 24 | - address: 0x010A0000 25 | kind: ram 26 | name: AXI_SRAM 27 | size: 114688 # 112K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0x80000000 37 | kind: flash 38 | name: XPI0 39 | size: 1048576 # 1M 40 | cores: 41 | - name: RV32-IMAFDCP 42 | ip-core: Andes D45 43 | peripherals: [] 44 | include_peripherals: 45 | - "../family/COMMON.yaml" 46 | - "../family/HPM6200.yaml" 47 | - "../family/HPM6200_NonBasic.yaml" 48 | include_interrupts: "../interrupts/HPM6280.yaml" 49 | include_dmamux: "../dmamux/HPM6280.yaml" 50 | gen_dma_channels: 51 | HDMA: 8 52 | XDMA: 8 53 | _raw: 54 | "| HPM6260 | Single-core 32-bit | 800 | | | CAN FD | USB HS w/ PHY \xD7\ 55 | 1 | AES128/256, SHA-1/256 | 3\xD716 bits | 20\xD720 144eLQFP P0.5,7\xD77 116BGA\ 56 | \ P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | |" 57 | -------------------------------------------------------------------------------- /data/chips/HPM6264.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6264 2 | family: HPM6200 Series 3 | sub_family: HPM6200, Single-core, Full Featured 4 | packages: 5 | - name: HPM6264xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6264xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 131072 # 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 131072 # 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM_NOCACHE 23 | size: 131072 # 128K 24 | - address: 0x010A0000 25 | kind: ram 26 | name: AXI_SRAM 27 | size: 114688 # 112K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0x80000000 37 | kind: flash 38 | name: XPI0 39 | size: 1048576 # 1M 40 | cores: 41 | - name: RV32-IMAFDCP 42 | ip-core: Andes D45 43 | peripherals: [] 44 | include_peripherals: 45 | - "../family/COMMON.yaml" 46 | - "../family/HPM6200.yaml" 47 | - "../family/HPM6200_NonBasic.yaml" 48 | include_interrupts: "../interrupts/HPM6280.yaml" 49 | include_dmamux: "../dmamux/HPM6280.yaml" 50 | gen_dma_channels: 51 | HDMA: 8 52 | XDMA: 8 53 | _raw: 54 | "| HPM6264 | Single-core 32-bit | 800 | | | CAN FD | USB HS w/ PHY \xD7\ 55 | 1 | AES128/256, SHA-1/256 | 3\xD716 bits | 20\xD720 144eLQFP P0.5,7\xD77 116BGA\ 56 | \ P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | |" 57 | -------------------------------------------------------------------------------- /data/chips/HPM6280.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6280 2 | family: HPM6200 Series 3 | sub_family: HPM6200, Dual-core, Full Featured 4 | packages: 5 | - name: HPM6280xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6280xCBx 9 | package: LQFP100 10 | pins: 100 11 | - name: HPM6280xPAx 12 | package: LQFP144 13 | pins: 144 14 | memory: 15 | - address: 0x00000000 16 | kind: ram 17 | name: ILM 18 | size: 131072 # 128K 19 | - address: 0x00080000 20 | kind: ram 21 | name: DLM 22 | size: 131072 # 128K 23 | - address: 0x01080000 24 | kind: ram 25 | name: AXI_SRAM_NOCACHE 26 | size: 131072 # 128K 27 | - address: 0x010A0000 28 | kind: ram 29 | name: AXI_SRAM 30 | size: 114688 # 112K 31 | - address: 0x0117C000 32 | kind: ram 33 | name: SHARE_RAM 34 | size: 16384 # 16K 35 | - address: 0xF0300000 36 | kind: ram 37 | name: AHB_SRAM 38 | size: 32768 # 32K 39 | - address: 0x80000000 40 | kind: flash 41 | name: XPI0 42 | size: 1048576 # 1M 43 | cores: 44 | - name: RV32-IMAFDCP 45 | ip-core: Andes D45 46 | peripherals: [] 47 | include_peripherals: 48 | - "../family/COMMON.yaml" 49 | - "../family/HPM6200.yaml" 50 | - "../family/HPM6200_NonBasic.yaml" 51 | include_interrupts: "../interrupts/HPM6280.yaml" 52 | include_dmamux: "../dmamux/HPM6280.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | _raw: 57 | "| HPM6280 | Dual-core 32-bit | 800 | | | CAN FD | USB HS w/ PHY \xD7\ 58 | 1 | AES128/256, SHA-1/256 | 3\xD716 bits | 20\xD720 144eLQFP P0.5,7\xD77 116BGA\ 59 | \ P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | |" 60 | -------------------------------------------------------------------------------- /data/chips/HPM6284.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6284 2 | family: HPM6200 Series 3 | sub_family: HPM6200, Dual-core, Full Featured, 4MB Flash 4 | packages: 5 | - name: HPM6284xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6284xCBx 9 | package: LQFP100 10 | pins: 100 11 | - name: HPM6284xPAx 12 | package: LQFP144 13 | pins: 144 14 | memory: 15 | - address: 0x00000000 16 | kind: ram 17 | name: ILM 18 | size: 131072 # 128K 19 | - address: 0x00080000 20 | kind: ram 21 | name: DLM 22 | size: 131072 # 128K 23 | - address: 0x01080000 24 | kind: ram 25 | name: AXI_SRAM_NOCACHE 26 | size: 131072 # 128K 27 | - address: 0x010A0000 28 | kind: ram 29 | name: AXI_SRAM 30 | size: 114688 # 112K 31 | - address: 0x0117C000 32 | kind: ram 33 | name: SHARE_RAM 34 | size: 16384 # 16K 35 | - address: 0xF0300000 36 | kind: ram 37 | name: AHB_SRAM 38 | size: 32768 # 32K 39 | - address: 0x80000000 40 | kind: flash 41 | name: XPI0 42 | size: 4194304 # 4M 43 | cores: 44 | - name: RV32-IMAFDCP 45 | ip-core: Andes D45 46 | peripherals: [] 47 | include_peripherals: 48 | - "../family/COMMON.yaml" 49 | - "../family/HPM6200.yaml" 50 | - "../family/HPM6200_NonBasic.yaml" 51 | include_interrupts: "../interrupts/HPM6280.yaml" 52 | include_dmamux: "../dmamux/HPM6280.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | _raw: 57 | "| HPM6284 | Dual-core 32-bit | 800 | | | CAN FD | USB HS w/ PHY \xD7\ 58 | 1 | AES128/256, SHA-1/256 | 3\xD716 bits | 20\xD720 144eLQFP P0.5,7\xD77 116BGA\ 59 | \ P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | |" 60 | -------------------------------------------------------------------------------- /data/chips/HPM6320.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6320 2 | family: HPM6300 Series 3 | sub_family: HPM6300, Basic 4 | packages: 5 | - name: HPM6320xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6320xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0xF0300000 25 | kind: ram 26 | name: AHB_SRAM 27 | size: 32768 # 32K 28 | - address: 0x80000000 29 | kind: flash 30 | name: XPI0 31 | size: 1048576 # 1M 32 | cores: 33 | - name: RV32-IMAFDCP 34 | ip-core: Andes D45 35 | peripherals: [] 36 | include_peripherals: 37 | - "../family/COMMON.yaml" 38 | - "../family/HPM6300.yaml" 39 | - "../family/HPM6300_USB_ENET.yaml" 40 | include_interrupts: "../interrupts/HPM6360.yaml" 41 | include_dmamux: "../dmamux/HPM6360.yaml" 42 | gen_dma_channels: 43 | HDMA: 8 44 | XDMA: 8 45 | _raw: 46 | "| HPM6320 | Single-core 32-bit | 800 | 2\xD7I2S, 1\xD7digital audio output\ 47 | \ | 100M | | USB HS w/ PHY \xD71 | AES128/256, SHA-1/256 | 1\xD716 bit | 20\xD7\ 48 | 20 144eLQFP P0.5,7\xD77 116BGA P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0\ 49 | C Ta | | (no SDRAM @ 0x40000000)" 50 | -------------------------------------------------------------------------------- /data/chips/HPM6330.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6330 2 | family: HPM6300 Series 3 | sub_family: HPM6300, Basic Enhanced 4 | packages: 5 | - name: HPM6330xCEx 6 | package: LQFP80 7 | pins: 80 8 | memory: 9 | - address: 0x00000000 10 | kind: ram 11 | name: ILM 12 | size: 128K 13 | - address: 0x00080000 14 | kind: ram 15 | name: DLM 16 | size: 128K 17 | - address: 0x01080000 18 | kind: ram 19 | name: AXI_SRAM 20 | size: 524288 # 512K 21 | - address: 0xF0300000 22 | kind: ram 23 | name: AHB_SRAM 24 | size: 32768 # 32K 25 | - address: 0x80000000 26 | kind: flash 27 | name: XPI0 28 | size: 1048576 # 1M 29 | cores: 30 | - name: RV32-IMAFDCP 31 | ip-core: Andes D45 32 | peripherals: [] 33 | include_peripherals: 34 | - "../family/COMMON.yaml" 35 | - "../family/HPM6300.yaml" 36 | - "../family/HPM6300_FFA.yaml" 37 | - "../family/HPM6300_USB_ENET.yaml" 38 | - "../family/HPM6300_CAN.yaml" 39 | - "../family/HPM6300_UART567.yaml" 40 | - "../family/HPM6300_SPI3.yaml" 41 | - "../family/HPM6300_I2C3.yaml" 42 | - "../family/HPM6300_QEI_HALL.yaml" 43 | - "../family/HPM6300_ADC23_DAC.yaml" 44 | include_interrupts: "../interrupts/HPM6360.yaml" 45 | include_dmamux: "../dmamux/HPM6360.yaml" 46 | gen_dma_channels: 47 | HDMA: 8 48 | XDMA: 8 49 | -------------------------------------------------------------------------------- /data/chips/HPM6340.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6340 2 | family: HPM6300 Series 3 | sub_family: HPM6300, No USB, No Ethernet 4 | packages: 5 | - name: HPM6340xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6340xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0xF0300000 25 | kind: ram 26 | name: AHB_SRAM 27 | size: 32768 # 32K 28 | - address: 0x80000000 29 | kind: flash 30 | name: XPI0 31 | size: 1048576 # 1M 32 | cores: 33 | - name: RV32-IMAFDCP 34 | ip-core: Andes D45 35 | peripherals: [] 36 | include_peripherals: 37 | - "../family/COMMON.yaml" 38 | - "../family/HPM6300.yaml" 39 | - "../family/HPM6300_FFA.yaml" 40 | - "../family/HPM6300_CAN.yaml" 41 | - "../family/HPM6300_UART567.yaml" 42 | - "../family/HPM6300_SPI3.yaml" 43 | - "../family/HPM6300_I2C3.yaml" 44 | - "../family/HPM6300_QEI_HALL.yaml" 45 | - "../family/HPM6300_ADC23_DAC.yaml" 46 | include_interrupts: "../interrupts/HPM6360.yaml" 47 | include_dmamux: "../dmamux/HPM6360.yaml" 48 | gen_dma_channels: 49 | HDMA: 8 50 | XDMA: 8 51 | _raw: 52 | "| HPM6340 | Single-core 32-bit | 800 | 2\xD7I2S, 1\xD7digital audio output\ 53 | \ | | CAN FD | | AES128/256, SHA-1/256 | 3\xD716 bits | 20\xD720 144eLQFP\ 54 | \ P0.5,7\xD77 116BGA P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C105 \xB0C Ta | \ 55 | \ |" 56 | -------------------------------------------------------------------------------- /data/chips/HPM6350.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6350 2 | family: HPM6300 Series 3 | sub_family: HPM6300, No CANFD 4 | packages: 5 | - name: HPM6350xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6350xPAx 9 | package: LQFP144 10 | pins: 144 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 128K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 128K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0xF0300000 25 | kind: ram 26 | name: AHB_SRAM 27 | size: 32768 # 32K 28 | - address: 0x80000000 29 | kind: flash 30 | name: XPI0 31 | size: 1048576 # 1M 32 | cores: 33 | - name: RV32-IMAFDCP 34 | ip-core: Andes D45 35 | peripherals: [] 36 | include_peripherals: 37 | - "../family/COMMON.yaml" 38 | - "../family/HPM6300.yaml" 39 | - "../family/HPM6300_FFA.yaml" 40 | - "../family/HPM6300_USB_ENET.yaml" 41 | - "../family/HPM6300_CAN.yaml" 42 | - "../family/HPM6300_UART567.yaml" 43 | - "../family/HPM6300_SPI3.yaml" 44 | - "../family/HPM6300_I2C3.yaml" 45 | - "../family/HPM6300_QEI_HALL.yaml" 46 | - "../family/HPM6300_ADC23_DAC.yaml" 47 | include_interrupts: "../interrupts/HPM6360.yaml" 48 | include_dmamux: "../dmamux/HPM6360.yaml" 49 | gen_dma_channels: 50 | HDMA: 8 51 | XDMA: 8 52 | _raw: 53 | "| HPM6350 | Single-core 32-bit | 800 | 2\xD7I2S, 1\xD7digital audio output\ 54 | \ | 100M | CAN | USB HS w/ PHY \xD71 | AES128/256, SHA-1/256 | 3\xD716 bits |\ 55 | \ 20\xD720 144eLQFP P0.5,7\xD77 116BGA P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C\ 56 | 105 \xB0C Ta | |" 57 | -------------------------------------------------------------------------------- /data/chips/HPM6360.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6360 2 | family: HPM6300 Series 3 | sub_family: HPM6300, Full Featured 4 | packages: 5 | - name: HPM6360xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6360xDCx 9 | package: BGA172 10 | pins: 172 11 | - name: HPM6360xCBx 12 | package: LQFP100 13 | pins: 100 14 | - name: HPM6360xPAx 15 | package: LQFP144 16 | pins: 144 17 | memory: 18 | - address: 0x00000000 19 | kind: ram 20 | name: ILM 21 | size: 128K 22 | - address: 0x00080000 23 | kind: ram 24 | name: DLM 25 | size: 128K 26 | - address: 0x01080000 27 | kind: ram 28 | name: AXI_SRAM 29 | size: 524288 # 512K 30 | - address: 0xF0300000 31 | kind: ram 32 | name: AHB_SRAM 33 | size: 32768 # 32K 34 | - address: 0x80000000 35 | kind: flash 36 | name: XPI0 37 | size: 1048576 # 1M 38 | cores: 39 | - name: RV32-IMAFDCP 40 | ip-core: Andes D45 41 | peripherals: [] 42 | include_peripherals: 43 | - "../family/COMMON.yaml" 44 | - "../family/HPM6300.yaml" 45 | - "../family/HPM6300_FFA.yaml" 46 | - "../family/HPM6300_USB_ENET.yaml" 47 | - "../family/HPM6300_CAN.yaml" 48 | - "../family/HPM6300_UART567.yaml" 49 | - "../family/HPM6300_SPI3.yaml" 50 | - "../family/HPM6300_I2C3.yaml" 51 | - "../family/HPM6300_QEI_HALL.yaml" 52 | - "../family/HPM6300_ADC23_DAC.yaml" 53 | include_interrupts: "../interrupts/HPM6360.yaml" 54 | include_dmamux: "../dmamux/HPM6360.yaml" 55 | gen_dma_channels: 56 | HDMA: 8 57 | XDMA: 8 58 | _raw: 59 | "| HPM6360 | Single-core 32-bit | 800 | 2\xD7I2S, 1\xD7digital audio output\ 60 | \ | 100M | CAN FD | USB HS w/ PHY \xD71 | AES128/256, SHA-1/256 | 3\xD716 bits |\ 61 | \ 20\xD720 144eLQFP P0.5,7\xD77 116BGA P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C\ 62 | 105 \xB0C Ta | |" 63 | -------------------------------------------------------------------------------- /data/chips/HPM6364.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6364 2 | family: HPM6300 Series 3 | sub_family: HPM6300, Full Featured, 4MB Flash 4 | packages: 5 | - name: HPM6364xEPx 6 | package: BGA116 7 | pins: 116 8 | - name: HPM6364xDCx 9 | package: BGA172 10 | pins: 172 11 | - name: HPM6364xCBx 12 | package: LQFP100 13 | pins: 100 14 | - name: HPM6364xPAx 15 | package: LQFP144 16 | pins: 144 17 | memory: 18 | - address: 0x00000000 19 | kind: ram 20 | name: ILM 21 | size: 128K 22 | - address: 0x00080000 23 | kind: ram 24 | name: DLM 25 | size: 128K 26 | - address: 0x01080000 27 | kind: ram 28 | name: AXI_SRAM 29 | size: 524288 # 512K 30 | - address: 0xF0300000 31 | kind: ram 32 | name: AHB_SRAM 33 | size: 32768 # 32K 34 | - address: 0x80000000 35 | kind: flash 36 | name: XPI0 37 | size: 4194304 # 4M 38 | cores: 39 | - name: RV32-IMAFDCP 40 | ip-core: Andes D45 41 | peripherals: [] 42 | include_peripherals: 43 | - "../family/COMMON.yaml" 44 | - "../family/HPM6300.yaml" 45 | - "../family/HPM6300_FFA.yaml" 46 | - "../family/HPM6300_USB_ENET.yaml" 47 | - "../family/HPM6300_CAN.yaml" 48 | - "../family/HPM6300_UART567.yaml" 49 | - "../family/HPM6300_SPI3.yaml" 50 | - "../family/HPM6300_I2C3.yaml" 51 | - "../family/HPM6300_QEI_HALL.yaml" 52 | - "../family/HPM6300_ADC23_DAC.yaml" 53 | include_interrupts: "../interrupts/HPM6360.yaml" 54 | include_dmamux: "../dmamux/HPM6360.yaml" 55 | gen_dma_channels: 56 | HDMA: 8 57 | XDMA: 8 58 | _raw: 59 | "| HPM6364 | Single-core 32-bit | 800 | 2\xD7I2S, 1\xD7digital audio output\ 60 | \ | 100M | CAN FD | USB HS w/ PHY \xD71 | AES128/256, SHA-1/256 | 3\xD716 bits |\ 61 | \ 20\xD720 144eLQFP P0.5,7\xD77 116BGA P0.5 | -40\u223C125 \xB0C Tj\uFF0C-40\u223C\ 62 | 105 \xB0C Ta | |" 63 | -------------------------------------------------------------------------------- /data/chips/HPM6420.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6420 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6400, Single-core 4 | packages: 5 | - name: HPM6420xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6420xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 1048576 # 1M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | -------------------------------------------------------------------------------- /data/chips/HPM6430.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6430 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6400, Single-core 4 | packages: 5 | - name: HPM6430xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6430xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 1048576 # 1M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | _raw: 57 | "| HPM6430 | Single-core 32-bit | 2088 | 4\xD7I2S, 1\xD7digital audio output\ 58 | \ | Gigabit | CAN | USB HS w/ PHY \xD72 | AES128/256, SHA-1/256 | 3\xD712 bits,\ 59 | \ 1\xD716 bits | 14\xD714 289BGA 0.8P,10\xD710 196BGA 0.65P | \ 60 | \ | |" 61 | -------------------------------------------------------------------------------- /data/chips/HPM6450.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6450 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6400, Single-core 4 | packages: 5 | - name: HPM6450xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6450xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 1048576 # 1M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | _raw: 57 | "| HPM6450 | Single-core 32-bit | 2088 | 4\xD7I2S, 1\xD7digital audio output\ 58 | \ | Gigabit | CAN FD | USB HS w/ PHY \xD72 | AES128/256, SHA-1/256 | 3\xD712 bits,\ 59 | \ 1\xD716 bits | 14\xD714 289BGA 0.8P,10\xD710 196BGA 0.65P | \ 60 | \ | |" 61 | -------------------------------------------------------------------------------- /data/chips/HPM6454.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6454 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6400, Single-core 4 | packages: 5 | - name: HPM6454xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6454xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 1048576 # 1M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | -------------------------------------------------------------------------------- /data/chips/HPM64A0.yaml: -------------------------------------------------------------------------------- 1 | name: HPM64A0 2 | family: HPM6400 Series 3 | sub_family: HPM6400, Automotive 4 | packages: 5 | # A- -40- 105°C，AEC-Q100 G2 6 | - name: HPM64A0xANx 7 | package: BGA196-P0.65-10x10 8 | pins: 196 9 | - name: HPM64A0xVMx 10 | package: BGA289-P0.8-14x14 11 | pins: 289 12 | memory: 13 | - address: 0x00000000 14 | kind: ram 15 | name: ILM 16 | size: 262144 # 256K 17 | - address: 0x00080000 18 | kind: ram 19 | name: DLM 20 | size: 262144 # 256K 21 | - address: 0x01080000 22 | kind: ram 23 | name: AXI_SRAM 24 | size: 524288 # 512K 25 | - address: 0x01100000 26 | kind: ram 27 | name: AXI_SRAM_NOCACHE # AXI SRAM1 28 | size: 262144 # 256K 29 | - address: 0x0117C000 30 | kind: ram 31 | name: SHARE_RAM 32 | size: 16384 # 16K 33 | - address: 0xF0300000 34 | kind: ram 35 | name: AHB_SRAM 36 | size: 32768 # 32K 37 | - address: 0xF40F0000 38 | kind: ram 39 | name: APB_SRAM 40 | size: 8192 # 8K 41 | - address: 0x80000000 42 | kind: flash 43 | name: XPI0 44 | size: 1048576 # 1M 45 | cores: 46 | - name: RV32-IMAFDCP 47 | ip-core: Andes D45 48 | peripherals: [] 49 | include_peripherals: 50 | - "../family/COMMON.yaml" 51 | - "../family/HPM6700_6400.yaml" 52 | include_interrupts: "../interrupts/HPM6750.yaml" 53 | include_dmamux: "../dmamux/HPM6750.yaml" 54 | _raw: "HPM64A0 汽车级高性能MCU" 55 | -------------------------------------------------------------------------------- /data/chips/HPM64G0.yaml: -------------------------------------------------------------------------------- 1 | name: HPM64G0 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6400, Single-core, 1GHz 4 | packages: 5 | # C- -40- 85°C 6 | - name: HPM64G0xANx 7 | package: BGA196-P0.65-10x10 8 | pins: 196 9 | - name: HPM64G0xVMx 10 | package: BGA289-P0.8-14x14 11 | pins: 289 12 | memory: 13 | - address: 0x00000000 14 | kind: ram 15 | name: ILM 16 | size: 262144 # 256K 17 | - address: 0x00080000 18 | kind: ram 19 | name: DLM 20 | size: 262144 # 256K 21 | - address: 0x01080000 22 | kind: ram 23 | name: AXI_SRAM 24 | size: 524288 # 512K 25 | - address: 0x01100000 26 | kind: ram 27 | name: AXI_SRAM_NOCACHE # AXI SRAM1 28 | size: 262144 # 256K 29 | - address: 0x0117C000 30 | kind: ram 31 | name: SHARE_RAM 32 | size: 16384 # 16K 33 | - address: 0xF0300000 34 | kind: ram 35 | name: AHB_SRAM 36 | size: 32768 # 32K 37 | - address: 0xF40F0000 38 | kind: ram 39 | name: APB_SRAM 40 | size: 8192 # 8K 41 | - address: 0x80000000 42 | kind: flash 43 | name: XPI0 44 | size: 1048576 # 1M 45 | cores: 46 | - name: RV32-IMAFDCP 47 | ip-core: Andes D45 48 | peripherals: [] 49 | include_peripherals: 50 | - "../family/COMMON.yaml" 51 | - "../family/HPM6700_6400.yaml" 52 | include_interrupts: "../interrupts/HPM6750.yaml" 53 | include_dmamux: "../dmamux/HPM6750.yaml" 54 | gen_dma_channels: 55 | HDMA: 8 56 | XDMA: 8 57 | -------------------------------------------------------------------------------- /data/chips/HPM6730.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6730 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6700, Dual-core 4 | packages: 5 | - name: HPM6730xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6730xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 1048576 # 1M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | _raw: 57 | "| HPM6730 | Dual-core 32-bit | 2088 | 4\xD7I2S, 1\xD7digital audio output |\ 58 | \ Gigabit | CAN | USB HS w/ PHY \xD72 | AES128/256, SHA-1/256 | 3\xD712 bits,\ 59 | \ 1\xD716 bits | 14\xD714 289BGA 0.8P,10\xD710 196BGA 0.65P | \ 60 | \ | |" 61 | -------------------------------------------------------------------------------- /data/chips/HPM6750.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6750 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6700, Dual-core 4 | packages: 5 | - name: HPM6750xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6750xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 1048576 # 1M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | _raw: 57 | "| HPM6750 | Dual-core 32-bit | 2088 | 4\xD7I2S, 1\xD7digital audio output |\ 58 | \ Gigabit | CAN FD | USB HS w/ PHY \xD72 | AES128/256, SHA-1/256 | 3\xD712 bits,\ 59 | \ 1\xD716 bits | 14\xD714 289BGA 0.8P,10\xD710 196BGA 0.65P | -40~105 \ 60 | \ | |" 61 | -------------------------------------------------------------------------------- /data/chips/HPM6754.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6754 2 | family: HPM6700/6400 Series 3 | sub_family: HPM6700, Dual-core 4 | packages: 5 | - name: HPM6754xANx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6754xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | - address: 0x00000000 13 | kind: ram 14 | name: ILM 15 | size: 262144 # 256K 16 | - address: 0x00080000 17 | kind: ram 18 | name: DLM 19 | size: 262144 # 256K 20 | - address: 0x01080000 21 | kind: ram 22 | name: AXI_SRAM 23 | size: 524288 # 512K 24 | - address: 0x01100000 25 | kind: ram 26 | name: AXI_SRAM_NOCACHE # AXI SRAM1 27 | size: 262144 # 256K 28 | - address: 0x0117C000 29 | kind: ram 30 | name: SHARE_RAM 31 | size: 16384 # 16K 32 | - address: 0xF0300000 33 | kind: ram 34 | name: AHB_SRAM 35 | size: 32768 # 32K 36 | - address: 0xF40F0000 37 | kind: ram 38 | name: APB_SRAM 39 | size: 8192 # 8K 40 | - address: 0x80000000 41 | kind: flash 42 | name: XPI0 43 | size: 4194304 # 4M 44 | cores: 45 | - name: RV32-IMAFDCP 46 | ip-core: Andes D45 47 | peripherals: [] 48 | include_peripherals: 49 | - "../family/COMMON.yaml" 50 | - "../family/HPM6700_6400.yaml" 51 | include_interrupts: "../interrupts/HPM6750.yaml" 52 | include_dmamux: "../dmamux/HPM6750.yaml" 53 | gen_dma_channels: 54 | HDMA: 8 55 | XDMA: 8 56 | -------------------------------------------------------------------------------- /data/chips/HPM6830.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6830 2 | family: HPM6800 Series 3 | sub_family: HPM6800, Basic 4 | packages: 5 | - name: HPM6830xBDx 6 | package: BGA417 7 | pins: 417 8 | memory: 9 | - address: 0x00000000 10 | kind: ram 11 | name: ILM 12 | size: 262144 # 256K 13 | - address: 0x00080000 14 | kind: ram 15 | name: DLM 16 | size: 262144 # 256K 17 | - address: 0x01200000 18 | kind: ram 19 | name: AXI_SRAM 20 | size: 524288 # 512K 21 | - address: 0xF0400000 22 | kind: ram 23 | name: AHB_SRAM 24 | size: 32768 # 32K 25 | - address: 0xF4130000 26 | kind: ram 27 | name: APB_SRAM 28 | size: 16384 # 16K 29 | - address: 0x80000000 30 | kind: flash 31 | name: XPI0 32 | size: 1048576 # 1M 33 | cores: 34 | - name: RV32-IMAFDCP 35 | ip-core: Andes D45 36 | peripherals: [] 37 | include_peripherals: 38 | - "../family/COMMON.yaml" 39 | - "../family/HPM6800.yaml" 40 | include_interrupts: "../interrupts/HPM6830.yaml" 41 | include_dmamux: "../dmamux/HPM6880.yaml" 42 | gen_dma_channels: 43 | HDMA: 32 44 | XDMA: 32 45 | _raw: 46 | "| HPM6830 | Single-core 32-bit | 1064 | | Gigabit | CAN FD | USB HS w/ PHY\ 47 | \ \xD71 | AES128/256, SHA-1/256 | 1\xD716 bit | 17\xD717 417BGA P0.8 | \u221240\ 48 | \ \u223C 105 | |" 49 | -------------------------------------------------------------------------------- /data/chips/HPM6850.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6850 2 | family: HPM6800 Series 3 | sub_family: HPM6800, Multimedia 4 | packages: 5 | - name: HPM6850xBDx 6 | package: BGA417 7 | pins: 417 8 | memory: 9 | - address: 0x00000000 10 | kind: ram 11 | name: ILM 12 | size: 262144 # 256K 13 | - address: 0x00080000 14 | kind: ram 15 | name: DLM 16 | size: 262144 # 256K 17 | - address: 0x01200000 18 | kind: ram 19 | name: AXI_SRAM 20 | size: 524288 # 512K 21 | - address: 0xF0400000 22 | kind: ram 23 | name: AHB_SRAM 24 | size: 32768 # 32K 25 | - address: 0xF4130000 26 | kind: ram 27 | name: APB_SRAM 28 | size: 16384 # 16K 29 | - address: 0x80000000 30 | kind: flash 31 | name: XPI0 32 | size: 1048576 # 1M 33 | cores: 34 | - name: RV32-IMAFDCP 35 | ip-core: Andes D45 36 | peripherals: [] 37 | include_peripherals: 38 | - "../family/COMMON.yaml" 39 | - "../family/HPM6800.yaml" 40 | - "../family/HPM6800_NonBasic.yaml" 41 | include_interrupts: "../interrupts/HPM6850.yaml" 42 | include_dmamux: "../dmamux/HPM6880.yaml" 43 | gen_dma_channels: 44 | HDMA: 32 45 | XDMA: 32 46 | _raw: 47 | "| HPM6850 | Single-core 32-bit | 1064 | 4 | Gigabit | CAN FD | USB HS w/ PHY\ 48 | \ \xD71 | AES128/256, SHA-1/256 | 1\xD716 bit | 17\xD717 417BGA P0.8 | \u221240\ 49 | \ \u223C 105 | 2.5D OpenVG GPU |" 50 | -------------------------------------------------------------------------------- /data/chips/HPM6880.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6880 2 | family: HPM6800 Series 3 | sub_family: HPM6800, Full Featured 4 | packages: 5 | - name: HPM6880xBDx 6 | package: BGA417 7 | pins: 417 8 | memory: 9 | - address: 0x00000000 10 | kind: ram 11 | name: ILM 12 | size: 262144 # 256K 13 | - address: 0x00080000 14 | kind: ram 15 | name: DLM 16 | size: 262144 # 256K 17 | - address: 0x01200000 18 | kind: ram 19 | name: AXI_SRAM 20 | size: 524288 # 512K 21 | - address: 0xF0400000 22 | kind: ram 23 | name: AHB_SRAM 24 | size: 32768 # 32K 25 | - address: 0xF4130000 26 | kind: ram 27 | name: APB_SRAM 28 | size: 16384 # 16K 29 | - address: 0x80000000 30 | kind: flash 31 | name: XPI0 32 | size: 1048576 # 1M 33 | cores: 34 | - name: RV32-IMAFDCP 35 | ip-core: Andes D45 36 | peripherals: [] 37 | include_peripherals: 38 | - "../family/COMMON.yaml" 39 | - "../family/HPM6800.yaml" 40 | - "../family/HPM6800_NonBasic.yaml" 41 | - "../family/HPM6800_Adv.yaml" 42 | include_interrupts: "../interrupts/HPM6880.yaml" 43 | include_dmamux: "../dmamux/HPM6880.yaml" 44 | gen_dma_channels: 45 | HDMA: 32 46 | XDMA: 32 47 | _raw: 48 | "| HPM6880 | Single-core 32-bit | 1064 | 4 | Gigabit | CAN FD | USB HS w/ PHY\ 49 | \ \xD71 | AES128/256, SHA-1/256 | 1\xD716 bit | 17\xD717 417BGA P0.8 | \u221240\ 50 | \ \u223C 105 | 2.5D OpenVG GPU |" 51 | -------------------------------------------------------------------------------- /data/chips/HPM6E50.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6E50 2 | family: HPM6E00 Series 3 | sub_family: HPM6E00, Single-core 4 | packages: 5 | - name: HPM6E50xGNx 6 | package: BGA196 7 | pins: 196 8 | memory: 9 | # 2MB SRAM 10 | - address: 0x00000000 11 | kind: ram 12 | name: ILM0 13 | size: 256K 14 | - address: 0x00200000 15 | kind: ram 16 | name: DLM0 17 | size: 256K 18 | - address: 0x01200000 19 | kind: ram 20 | name: AXI_SRAM0 # XRAM0 21 | size: 512K 22 | - address: 0x01280000 23 | kind: ram 24 | name: AXI_SRAM1 # XRAM1 25 | size: 512K # 512K 26 | - address: 0xF0200000 27 | kind: ram 28 | name: AHB_SRAM # HRAM 29 | size: 32K 30 | - address: 0x80000000 31 | kind: flash 32 | name: XPI0 33 | size: 1M 34 | # FEMC(SRAM/SDRAM) 35 | # 0x40000000 - 0x7FFFFFFF 36 | # PPI 37 | # 0xF8000000 - 0xFFFFFFFF 38 | cores: 39 | - name: RV32-IMAFDCPB 40 | ip-core: Andes D45 41 | include_peripherals: 42 | - "../family/COMMON.yaml" 43 | - "../family/HPM6E00.yaml" 44 | include_interrupts: "../interrupts/HPM6E80.yaml" 45 | include_dmamux: "../dmamux/HPM6E80.yaml" 46 | gen_dma_channels: 47 | HDMA: 32 48 | XDMA: 32 49 | _raw: "EtherCAT从栈控制器, 多达2轴电机控制" 50 | -------------------------------------------------------------------------------- /data/chips/HPM6E60.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6E60 2 | family: HPM6E00 Series 3 | sub_family: HPM6E00, Single-core 4 | packages: 5 | - name: HPM6E60xGNx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6E60xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | # 2MB SRAM 13 | - address: 0x00000000 14 | kind: ram 15 | name: ILM0 16 | size: 256K 17 | - address: 0x00200000 18 | kind: ram 19 | name: DLM0 20 | size: 256K 21 | - address: 0x01200000 22 | kind: ram 23 | name: AXI_SRAM0 # XRAM0 24 | size: 512K 25 | - address: 0x01280000 26 | kind: ram 27 | name: AXI_SRAM1 # XRAM1 28 | size: 512K # 512K 29 | - address: 0xF0200000 30 | kind: ram 31 | name: AHB_SRAM # HRAM 32 | size: 32K 33 | - address: 0x80000000 34 | kind: flash 35 | name: XPI0 36 | size: 1M 37 | # FEMC(SRAM/SDRAM) 38 | # 0x40000000 - 0x7FFFFFFF 39 | # PPI 40 | # 0xF8000000 - 0xFFFFFFFF 41 | cores: 42 | - name: RV32-IMAFDCPB 43 | ip-core: Andes D45 44 | include_peripherals: 45 | - "../family/COMMON.yaml" 46 | - "../family/HPM6E00.yaml" 47 | - "../family/HPM6E00_NonBasic.yaml" 48 | include_interrupts: "../interrupts/HPM6E80.yaml" 49 | include_dmamux: "../dmamux/HPM6E80.yaml" 50 | gen_dma_channels: 51 | HDMA: 32 52 | XDMA: 32 53 | _raw: "EtherCAT从栈控制器, 多达2轴电机控制" 54 | -------------------------------------------------------------------------------- /data/chips/HPM6E70.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6E70 2 | family: HPM6E00 Series 3 | sub_family: HPM6E00, Dual-core 4 | packages: 5 | - name: HPM6E70xGNx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6E70xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | # 2MB SRAM 13 | - address: 0x00000000 14 | kind: ram 15 | name: ILM0 16 | size: 256K 17 | - address: 0x00040000 18 | kind: ram 19 | name: ILM1 20 | size: 256K 21 | - address: 0x00200000 22 | kind: ram 23 | name: DLM0 24 | size: 256K 25 | - address: 0x00240000 26 | kind: ram 27 | name: DLM1 28 | size: 256K 29 | - address: 0x01200000 30 | kind: ram 31 | name: AXI_SRAM0 # XRAM0 32 | size: 512K 33 | - address: 0x01280000 34 | kind: ram 35 | name: AXI_SRAM1 # XRAM1 36 | size: 512K # 512K 37 | - address: 0xF0200000 38 | kind: ram 39 | name: AHB_SRAM # HRAM 40 | size: 32K 41 | - address: 0x80000000 42 | kind: flash 43 | name: XPI0 44 | size: 1M 45 | # FEMC(SRAM/SDRAM) 46 | # 0x40000000 - 0x7FFFFFFF 47 | # PPI 48 | # 0xF8000000 - 0xFFFFFFFF 49 | cores: 50 | - name: RV32-IMAFDCPB 51 | ip-core: Andes D45 52 | include_peripherals: 53 | - "../family/COMMON.yaml" 54 | - "../family/HPM6E00.yaml" 55 | - "../family/HPM6E00_NonBasic.yaml" 56 | include_interrupts: "../interrupts/HPM6E80.yaml" 57 | include_dmamux: "../dmamux/HPM6E80.yaml" 58 | gen_dma_channels: 59 | HDMA: 32 60 | XDMA: 32 61 | _raw: "EtherCAT从栈控制器, 多达2轴电机控制" 62 | -------------------------------------------------------------------------------- /data/chips/HPM6E80.yaml: -------------------------------------------------------------------------------- 1 | name: HPM6E80 2 | family: HPM6E00 Series 3 | sub_family: HPM6E00, Dual-core 4 | packages: 5 | - name: HPM6E80xGNx 6 | package: BGA196 7 | pins: 196 8 | - name: HPM6E80xVMx 9 | package: BGA289 10 | pins: 289 11 | memory: 12 | # 2MB SRAM 13 | - address: 0x00000000 14 | kind: ram 15 | name: ILM0 16 | size: 256K 17 | - address: 0x00040000 18 | kind: ram 19 | name: ILM1 20 | size: 256K 21 | - address: 0x00200000 22 | kind: ram 23 | name: DLM0 24 | size: 256K 25 | - address: 0x00240000 26 | kind: ram 27 | name: DLM1 28 | size: 256K 29 | - address: 0x01200000 30 | kind: ram 31 | name: AXI_SRAM0 # XRAM0 32 | size: 512K 33 | - address: 0x01280000 34 | kind: ram 35 | name: AXI_SRAM1 # XRAM1 36 | size: 512K # 512K 37 | - address: 0xF0200000 38 | kind: ram 39 | name: AHB_SRAM # HRAM 40 | size: 32K 41 | - address: 0x80000000 42 | kind: flash 43 | name: XPI0 44 | size: 1M 45 | # FEMC(SRAM/SDRAM) 46 | # 0x40000000 - 0x7FFFFFFF 47 | # PPI 48 | # 0xF8000000 - 0xFFFFFFFF 49 | cores: 50 | - name: RV32-IMAFDCPB 51 | ip-core: Andes D45 52 | peripherals: [] 53 | include_peripherals: 54 | - "../family/COMMON.yaml" 55 | - "../family/HPM6E00.yaml" 56 | - "../family/HPM6E00_NonBasic.yaml" 57 | - "../family/HPM6E00_TSW.yaml" 58 | include_interrupts: "../interrupts/HPM6E80.yaml" 59 | include_dmamux: "../dmamux/HPM6E80.yaml" 60 | gen_dma_channels: 61 | HDMA: 32 62 | XDMA: 32 63 | _raw: "千兆工业以太网互联+EtherCAT, 多达4轴电机控制" 64 | -------------------------------------------------------------------------------- /data/dmamux/HPM5301.yaml: -------------------------------------------------------------------------------- 1 | GPTMR0_0: 0x0 2 | GPTMR0_1: 0x1 3 | GPTMR0_2: 0x2 4 | GPTMR0_3: 0x3 5 | GPTMR1_0: 0x4 6 | GPTMR1_1: 0x5 7 | GPTMR1_2: 0x6 8 | GPTMR1_3: 0x7 9 | UART0_RX: 0x14 10 | UART0_TX: 0x15 11 | UART1_RX: 0x16 12 | UART1_TX: 0x17 13 | UART2_RX: 0x18 14 | UART2_TX: 0x19 15 | UART3_RX: 0x1A 16 | UART3_TX: 0x1B 17 | I2C0: 0x24 18 | I2C1: 0x25 19 | I2C2: 0x26 20 | I2C3: 0x27 21 | SPI0_RX: 0x28 22 | SPI0_TX: 0x29 23 | SPI1_RX: 0x2A 24 | SPI1_TX: 0x2B 25 | SPI2_RX: 0x2C 26 | SPI2_TX: 0x2D 27 | SPI3_RX: 0x2E 28 | SPI3_TX: 0x2F 29 | MOT_0: 0x34 30 | MOT_1: 0x35 31 | MOT_2: 0x36 32 | MOT_3: 0x37 33 | MOT_4: 0x38 34 | MOT_5: 0x39 35 | MOT_6: 0x3A 36 | MOT_7: 0x3B 37 | XPI0_RX: 0x3C 38 | XPI0_TX: 0x3D 39 | ACMP0: 0x40 40 | ACMP1: 0x41 41 | -------------------------------------------------------------------------------- /data/dmamux/HPM5361.yaml: -------------------------------------------------------------------------------- 1 | # soc/HPM5361/hpm_dmamux_src.h 2 | GPTMR0_0: 0x0 3 | GPTMR0_1: 0x1 4 | GPTMR0_2: 0x2 5 | GPTMR0_3: 0x3 6 | GPTMR1_0: 0x4 7 | GPTMR1_1: 0x5 8 | GPTMR1_2: 0x6 9 | GPTMR1_3: 0x7 10 | GPTMR2_0: 0x8 11 | GPTMR2_1: 0x9 12 | GPTMR2_2: 0xA 13 | GPTMR2_3: 0xB 14 | GPTMR3_0: 0xC 15 | GPTMR3_1: 0xD 16 | GPTMR3_2: 0xE 17 | GPTMR3_3: 0xF 18 | UART0_RX: 0x14 19 | UART0_TX: 0x15 20 | UART1_RX: 0x16 21 | UART1_TX: 0x17 22 | UART2_RX: 0x18 23 | UART2_TX: 0x19 24 | UART3_RX: 0x1A 25 | UART3_TX: 0x1B 26 | UART4_RX: 0x1C 27 | UART4_TX: 0x1D 28 | UART5_RX: 0x1E 29 | UART5_TX: 0x1F 30 | UART6_RX: 0x20 31 | UART6_TX: 0x21 32 | UART7_RX: 0x22 33 | UART7_TX: 0x23 34 | I2C0: 0x24 35 | I2C1: 0x25 36 | I2C2: 0x26 37 | I2C3: 0x27 38 | SPI0_RX: 0x28 39 | SPI0_TX: 0x29 40 | SPI1_RX: 0x2A 41 | SPI1_TX: 0x2B 42 | SPI2_RX: 0x2C 43 | SPI2_TX: 0x2D 44 | SPI3_RX: 0x2E 45 | SPI3_TX: 0x2F 46 | MCAN0: 0x30 47 | MCAN1: 0x31 48 | MCAN2: 0x32 49 | MCAN3: 0x33 50 | MOT_0: 0x34 51 | MOT_1: 0x35 52 | MOT_2: 0x36 53 | MOT_3: 0x37 54 | MOT_4: 0x38 55 | MOT_5: 0x39 56 | MOT_6: 0x3A 57 | MOT_7: 0x3B 58 | XPI0_RX: 0x3C 59 | XPI0_TX: 0x3D 60 | DAC0: 0x3E 61 | DAC1: 0x3F 62 | ACMP0: 0x40 63 | ACMP1: 0x41 64 | -------------------------------------------------------------------------------- /data/dmamux/HPM6280.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 2 | GPIO0_B: 2 3 | GPIO0_C: 3 4 | GPIO0_D: 4 5 | GPIO0_X: 5 6 | GPIO0_Y: 6 7 | GPIO0_Z: 7 8 | GPIO1_A: 8 9 | GPIO1_B: 9 10 | GPIO1_C: 10 11 | GPIO1_D: 11 12 | GPIO1_X: 12 13 | GPIO1_Y: 13 14 | GPIO1_Z: 14 15 | ADC0: 15 16 | ADC1: 16 17 | ADC2: 17 18 | SDFM: 18 19 | DAC0: 19 20 | DAC1: 20 21 | ACMP_0: 21 22 | ACMP_1: 22 23 | ACMP_2: 23 24 | ACMP_3: 24 25 | SPI0: 25 26 | SPI1: 26 27 | SPI2: 27 28 | SPI3: 28 29 | UART0: 29 30 | UART1: 30 31 | UART2: 31 32 | UART3: 32 33 | UART4: 33 34 | UART5: 34 35 | UART6: 35 36 | UART7: 36 37 | MCAN0: 37 38 | MCAN1: 38 39 | MCAN2: 39 40 | MCAN3: 40 41 | PTPC: 41 42 | WDG0: 42 43 | WDG1: 43 44 | TSNS: 44 45 | MBX0A: 45 46 | MBX0B: 46 47 | MBX1A: 47 48 | MBX1B: 48 49 | GPTMR0: 49 50 | GPTMR1: 50 51 | GPTMR2: 51 52 | GPTMR3: 52 53 | I2C0: 53 54 | I2C1: 54 55 | I2C2: 55 56 | I2C3: 56 57 | PWM0: 57 58 | HALL0: 58 59 | QEI0: 59 60 | PWM1: 60 61 | HALL1: 61 62 | QEI1: 62 63 | PWM2: 63 64 | HALL2: 64 65 | QEI2: 65 66 | PWM3: 66 67 | HALL3: 67 68 | QEI3: 68 69 | SDP: 69 70 | XPI0: 70 71 | XDMA: 71 72 | HDMA: 72 73 | RNG: 73 74 | USB0: 74 75 | PSEC: 75 76 | PGPIO: 76 77 | PWDG: 77 78 | PTMR: 78 79 | PUART: 79 80 | FUSE: 80 81 | SECMON: 81 82 | RTC: 82 83 | BUTN: 83 84 | BGPIO: 84 85 | BVIO: 85 86 | BROWNOUT: 86 87 | SYSCTL: 87 88 | DEBUG_0: 88 89 | DEBUG_1: 89 90 | LIN0: 90 91 | LIN1: 91 92 | LIN2: 92 93 | LIN3: 93 94 | -------------------------------------------------------------------------------- /data/dmamux/HPM6360.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 2 | GPIO0_B: 2 3 | GPIO0_C: 3 4 | GPIO0_D: 4 5 | GPIO0_X: 5 6 | GPIO0_Y: 6 7 | GPIO0_Z: 7 8 | ADC0: 8 9 | ADC1: 9 10 | ADC2: 10 11 | DAC0: 11 12 | ACMP_0: 12 13 | ACMP_1: 13 14 | SPI0: 14 15 | SPI1: 15 16 | SPI2: 16 17 | SPI3: 17 18 | UART0: 18 19 | UART1: 19 20 | UART2: 20 21 | UART3: 21 22 | UART4: 22 23 | UART5: 23 24 | UART6: 24 25 | UART7: 25 26 | CAN0: 26 27 | CAN1: 27 28 | PTPC: 28 29 | WDG0: 29 30 | WDG1: 30 31 | TSNS: 31 32 | MBX0A: 32 33 | MBX0B: 33 34 | GPTMR0: 34 35 | GPTMR1: 35 36 | GPTMR2: 36 37 | GPTMR3: 37 38 | I2C0: 38 39 | I2C1: 39 40 | I2C2: 40 41 | I2C3: 41 42 | PWM0: 42 43 | HALL0: 43 44 | QEI0: 44 45 | PWM1: 45 46 | HALL1: 46 47 | QEI1: 47 48 | SDP: 48 49 | XPI0: 49 50 | XPI1: 50 51 | XDMA: 51 52 | HDMA: 52 53 | FEMC: 53 54 | RNG: 54 55 | I2S0: 55 56 | I2S1: 56 57 | DAO: 57 58 | PDM: 58 59 | FFA: 59 60 | NTMR0: 60 61 | USB0: 61 62 | ENET0: 62 63 | SDXC0: 63 64 | PSEC: 64 65 | PGPIO: 65 66 | PWDG: 66 67 | PTMR: 67 68 | PUART: 68 69 | FUSE: 69 70 | SECMON: 70 71 | RTC: 71 72 | BUTN: 72 73 | BGPIO: 73 74 | BVIO: 74 75 | BROWNOUT: 75 76 | SYSCTL: 76 77 | DEBUG_0: 77 78 | DEBUG_1: 78 79 | -------------------------------------------------------------------------------- /data/dmamux/HPM6750.yaml: -------------------------------------------------------------------------------- 1 | SPI0_RX: 0x0 2 | SPI0_TX: 0x1 3 | SPI1_RX: 0x2 4 | SPI1_TX: 0x3 5 | SPI2_RX: 0x4 6 | SPI2_TX: 0x5 7 | SPI3_RX: 0x6 8 | SPI3_TX: 0x7 9 | UART0_RX: 0x8 10 | UART0_TX: 0x9 11 | UART1_RX: 0xA 12 | UART1_TX: 0xB 13 | UART2_RX: 0xC 14 | UART2_TX: 0xD 15 | UART3_RX: 0xE 16 | UART3_TX: 0xF 17 | UART4_RX: 0x10 18 | UART4_TX: 0x11 19 | UART5_RX: 0x12 20 | UART5_TX: 0x13 21 | UART6_RX: 0x14 22 | UART6_TX: 0x15 23 | UART7_RX: 0x16 24 | UART7_TX: 0x17 25 | UART8_RX: 0x18 26 | UART8_TX: 0x19 27 | UART9_RX: 0x1A 28 | UART9_TX: 0x1B 29 | UART10_RX: 0x1C 30 | UART10_TX: 0x1D 31 | UART11_RX: 0x1E 32 | UART11_TX: 0x1F 33 | UART12_RX: 0x20 34 | UART12_TX: 0x21 35 | UART13_RX: 0x22 36 | UART13_TX: 0x23 37 | UART14_RX: 0x24 38 | UART14_TX: 0x25 39 | UART15_RX: 0x26 40 | UART15_TX: 0x27 41 | I2S0_RX: 0x28 42 | I2S0_TX: 0x29 43 | I2S1_RX: 0x2A 44 | I2S1_TX: 0x2B 45 | I2S2_RX: 0x2C 46 | I2S2_TX: 0x2D 47 | I2S3_RX: 0x2E 48 | I2S3_TX: 0x2F 49 | MOT0_0: 0x30 50 | MOT0_1: 0x31 51 | MOT0_2: 0x32 52 | MOT0_3: 0x33 53 | MOT1_0: 0x34 54 | MOT1_1: 0x35 55 | MOT1_2: 0x36 56 | MOT1_3: 0x37 57 | MOT2_0: 0x38 58 | MOT2_1: 0x39 59 | MOT2_2: 0x3A 60 | MOT2_3: 0x3B 61 | MOT3_0: 0x3C 62 | MOT3_1: 0x3D 63 | MOT3_2: 0x3E 64 | MOT3_3: 0x3F 65 | NTMR0_0: 0x40 66 | NTMR0_1: 0x41 67 | NTMR0_2: 0x42 68 | NTMR0_3: 0x43 69 | NTMR1_0: 0x44 70 | NTMR1_1: 0x45 71 | NTMR1_2: 0x46 72 | NTMR1_3: 0x47 73 | GPTMR0_0: 0x48 74 | GPTMR0_1: 0x49 75 | GPTMR0_2: 0x4A 76 | GPTMR0_3: 0x4B 77 | GPTMR1_0: 0x4C 78 | GPTMR1_1: 0x4D 79 | GPTMR1_2: 0x4E 80 | GPTMR1_3: 0x4F 81 | GPTMR2_0: 0x50 82 | GPTMR2_1: 0x51 83 | GPTMR2_2: 0x52 84 | GPTMR2_3: 0x53 85 | GPTMR3_0: 0x54 86 | GPTMR3_1: 0x55 87 | GPTMR3_2: 0x56 88 | GPTMR3_3: 0x57 89 | GPTMR4_0: 0x58 90 | GPTMR4_1: 0x59 91 | GPTMR4_2: 0x5A 92 | GPTMR4_3: 0x5B 93 | GPTMR5_0: 0x5C 94 | GPTMR5_1: 0x5D 95 | GPTMR5_2: 0x5E 96 | GPTMR5_3: 0x5F 97 | GPTMR6_0: 0x60 98 | GPTMR6_1: 0x61 99 | GPTMR6_2: 0x62 100 | GPTMR6_3: 0x63 101 | GPTMR7_0: 0x64 102 | GPTMR7_1: 0x65 103 | GPTMR7_2: 0x66 104 | GPTMR7_3: 0x67 105 | I2C0: 0x68 106 | I2C1: 0x69 107 | I2C2: 0x6A 108 | I2C3: 0x6B 109 | XPI0_RX: 0x6C 110 | XPI0_TX: 0x6D 111 | XPI1_RX: 0x6E 112 | XPI1_TX: 0x6F 113 | ACMP_0: 0x70 114 | ACMP_1: 0x71 115 | ACMP_2: 0x72 116 | ACMP_3: 0x73 117 | -------------------------------------------------------------------------------- /data/dmamux/HPM6880.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 2 | GPIO0_B: 2 3 | GPIO0_C: 3 4 | GPIO0_D: 4 5 | GPIO0_E: 5 6 | GPIO0_F: 6 7 | GPIO0_X: 7 8 | GPIO0_Y: 8 9 | GPIO0_Z: 9 10 | MCAN0: 10 11 | MCAN1: 11 12 | MCAN2: 12 13 | MCAN3: 13 14 | MCAN4: 14 15 | MCAN5: 15 16 | MCAN6: 16 17 | MCAN7: 17 18 | PTPC: 18 19 | UART0: 27 20 | UART1: 28 21 | UART2: 29 22 | UART3: 30 23 | UART4: 31 24 | UART5: 32 25 | UART6: 33 26 | UART7: 34 27 | I2C0: 35 28 | I2C1: 36 29 | I2C2: 37 30 | I2C3: 38 31 | SPI0: 39 32 | SPI1: 40 33 | SPI2: 41 34 | SPI3: 42 35 | GPTMR0: 43 36 | GPTMR1: 44 37 | GPTMR2: 45 38 | GPTMR3: 46 39 | GPTMR4: 47 40 | GPTMR5: 48 41 | GPTMR6: 49 42 | GPTMR7: 50 43 | EWDG0: 51 44 | EWDG1: 52 45 | MBX0A: 53 46 | MBX0B: 54 47 | MBX1A: 55 48 | MBX1B: 56 49 | RNG: 57 50 | HDMA: 58 51 | ADC0: 59 52 | ADC1: 60 53 | SDM: 61 54 | OPAMP: 62 55 | I2S0: 63 56 | I2S1: 64 57 | I2S2: 65 58 | I2S3: 66 59 | DAO: 67 60 | PDM: 68 61 | SMIX_DMA: 69 62 | SMIX_ASRC: 70 63 | CAM0: 71 64 | CAM1: 72 65 | LCDC: 73 66 | LCDC1: 74 67 | PDMA: 75 68 | JPEG: 76 69 | GWCK0_FUNC: 77 70 | GWCK0_ERR: 78 71 | GWCK1_FUNC: 79 72 | GWCK1_ERR: 80 73 | MIPI_DSI0: 81 74 | MIPI_DSI1: 82 75 | MIPI_CSI0: 83 76 | MIPI_CSI0_AP: 84 77 | MIPI_CSI0_DIAG: 85 78 | MIPI_CSI1_AP: 86 79 | MIPI_CSI1_DIAG: 87 80 | MIPI_CSI1: 88 81 | LCB0: 89 82 | LCB1: 90 83 | GPU: 91 84 | ENET0: 92 85 | NTMR0: 93 86 | USB0: 94 87 | SDXC0: 95 88 | SDXC1: 96 89 | SDP: 97 90 | XPI0: 98 91 | XDMA: 99 92 | DDR: 100 93 | FFA: 101 94 | PSEC: 102 95 | TSNS: 103 96 | VAD: 104 97 | PGPIO: 105 98 | PWDG: 106 99 | PTMR: 107 100 | PUART: 108 101 | FUSE: 109 102 | SECMON: 110 103 | RTC: 111 104 | BGPIO: 112 105 | BVIO: 113 106 | BROWNOUT: 114 107 | SYSCTL: 115 108 | DEBUG0: 116 109 | DEBUG1: 117 110 | -------------------------------------------------------------------------------- /data/dmamux/HPM6E80.yaml: -------------------------------------------------------------------------------- 1 | SPI0_RX: 0x0 2 | SPI0_TX: 0x1 3 | SPI1_RX: 0x2 4 | SPI1_TX: 0x3 5 | SPI2_RX: 0x4 6 | SPI2_TX: 0x5 7 | SPI3_RX: 0x6 8 | SPI3_TX: 0x7 9 | UART0_RX: 0x8 10 | UART0_TX: 0x9 11 | UART1_RX: 0xA 12 | UART1_TX: 0xB 13 | UART2_RX: 0xC 14 | UART2_TX: 0xD 15 | UART3_RX: 0xE 16 | UART3_TX: 0xF 17 | UART4_RX: 0x10 18 | UART4_TX: 0x11 19 | UART5_RX: 0x12 20 | UART5_TX: 0x13 21 | UART6_RX: 0x14 22 | UART6_TX: 0x15 23 | UART7_RX: 0x16 24 | UART7_TX: 0x17 25 | I2C0: 0x18 26 | I2C1: 0x19 27 | I2C2: 0x1A 28 | I2C3: 0x1B 29 | SPI4_RX: 0x1C 30 | SPI4_TX: 0x1D 31 | SPI5_RX: 0x1E 32 | SPI5_TX: 0x1F 33 | SPI6_RX: 0x20 34 | SPI6_TX: 0x21 35 | SPI7_RX: 0x22 36 | SPI7_TX: 0x23 37 | UART8_RX: 0x24 38 | UART8_TX: 0x25 39 | UART9_RX: 0x26 40 | UART9_TX: 0x27 41 | UART10_RX: 0x28 42 | UART10_TX: 0x29 43 | UART11_RX: 0x2A 44 | UART11_TX: 0x2B 45 | UART12_RX: 0x2C 46 | UART12_TX: 0x2D 47 | UART13_RX: 0x2E 48 | UART13_TX: 0x2F 49 | UART14_RX: 0x30 50 | UART14_TX: 0x31 51 | UART15_RX: 0x32 52 | UART15_TX: 0x33 53 | I2C4: 0x34 54 | I2C5: 0x35 55 | I2C6: 0x36 56 | I2C7: 0x37 57 | MCAN0: 0x38 58 | MCAN1: 0x39 59 | MCAN2: 0x3A 60 | MCAN3: 0x3B 61 | MCAN4: 0x3C 62 | MCAN5: 0x3D 63 | MCAN6: 0x3E 64 | MCAN7: 0x3F 65 | I2S0_RX: 0x40 66 | I2S0_TX: 0x41 67 | I2S1_RX: 0x42 68 | I2S1_TX: 0x43 69 | GPTMR0_0: 0x44 70 | GPTMR0_1: 0x45 71 | GPTMR0_2: 0x46 72 | GPTMR0_3: 0x47 73 | GPTMR1_0: 0x48 74 | GPTMR1_1: 0x49 75 | GPTMR1_2: 0x4A 76 | GPTMR1_3: 0x4B 77 | GPTMR2_0: 0x4C 78 | GPTMR2_1: 0x4D 79 | GPTMR2_2: 0x4E 80 | GPTMR2_3: 0x4F 81 | GPTMR3_0: 0x50 82 | GPTMR3_1: 0x51 83 | GPTMR3_2: 0x52 84 | GPTMR3_3: 0x53 85 | GPTMR4_0: 0x54 86 | GPTMR4_1: 0x55 87 | GPTMR4_2: 0x56 88 | GPTMR4_3: 0x57 89 | GPTMR5_0: 0x58 90 | GPTMR5_1: 0x59 91 | GPTMR5_2: 0x5A 92 | GPTMR5_3: 0x5B 93 | GPTMR6_0: 0x5C 94 | GPTMR6_1: 0x5D 95 | GPTMR6_2: 0x5E 96 | GPTMR6_3: 0x5F 97 | GPTMR7_0: 0x60 98 | GPTMR7_1: 0x61 99 | GPTMR7_2: 0x62 100 | GPTMR7_3: 0x63 101 | MOT_0: 0x64 102 | MOT_1: 0x65 103 | MOT_2: 0x66 104 | MOT_3: 0x67 105 | MOT_4: 0x68 106 | MOT_5: 0x69 107 | MOT_6: 0x6A 108 | MOT_7: 0x6B 109 | ACMP0_0: 0x6C 110 | ACMP0_1: 0x6D 111 | ACMP1_0: 0x6E 112 | ACMP1_1: 0x6F 113 | ACMP2_0: 0x70 114 | ACMP2_1: 0x71 115 | ACMP3_0: 0x72 116 | ACMP3_1: 0x73 117 | XPI0_RX: 0x74 118 | XPI0_TX: 0x75 119 | ESC_SYNC0: 0x76 120 | ESC_SYNC1: 0x77 121 | -------------------------------------------------------------------------------- /data/family/COMMON.yaml: -------------------------------------------------------------------------------- 1 | - name: PLIC 2 | address: 0xE4000000 3 | registers: 4 | kind: plic 5 | version: common 6 | block: PLIC 7 | 8 | - name: PLICSW 9 | address: 0xE6400000 10 | registers: 11 | kind: plicsw 12 | version: common 13 | block: PLICSW 14 | 15 | # pins are generated from the sdk 16 | - name: MCHTMR 17 | address: 0xE6000000 18 | registers: 19 | kind: mchtmr 20 | version: common 21 | block: MCHTMR 22 | -------------------------------------------------------------------------------- /data/family/HPM5300_ADC1.yaml: -------------------------------------------------------------------------------- 1 | - name: ADC1 2 | address: 0xF3084000 3 | registers: 4 | kind: adc16 5 | version: v53 6 | block: ADC 7 | -------------------------------------------------------------------------------- /data/family/HPM5300_DAC.yaml: -------------------------------------------------------------------------------- 1 | - name: DAC0 2 | address: 0xF3090000 3 | registers: 4 | kind: dac 5 | version: v53 6 | block: DAC 7 | - name: DAC1 8 | address: 0xF3094000 9 | registers: 10 | kind: dac 11 | version: v53 12 | block: DAC 13 | -------------------------------------------------------------------------------- /data/family/HPM5300_GPTMR23.yaml: -------------------------------------------------------------------------------- 1 | - name: GPTMR2 2 | address: 0xF0008000 3 | registers: 4 | kind: tmr 5 | version: common 6 | block: TMR 7 | - name: GPTMR3 8 | address: 0xF000C000 9 | registers: 10 | kind: tmr 11 | version: common 12 | block: TMR 13 | -------------------------------------------------------------------------------- /data/family/HPM5300_MCAN.yaml: -------------------------------------------------------------------------------- 1 | - name: MCAN0 2 | address: 0xF0280000 3 | registers: 4 | kind: mcan 5 | version: v53 6 | block: MCAN 7 | - name: MCAN1 8 | address: 0xF0284000 9 | registers: 10 | kind: mcan 11 | version: v53 12 | block: MCAN 13 | - name: MCAN2 14 | address: 0xF0288000 15 | registers: 16 | kind: mcan 17 | version: v53 18 | block: MCAN 19 | - name: MCAN3 20 | address: 0xF028C000 21 | registers: 22 | kind: mcan 23 | version: v53 24 | block: MCAN 25 | -------------------------------------------------------------------------------- /data/family/HPM5300_Motion.yaml: -------------------------------------------------------------------------------- 1 | - name: PWM0 2 | address: 0xF0318000 3 | registers: 4 | kind: pwm 5 | version: v53 6 | block: PWM 7 | - name: PWM1 8 | address: 0xF031C000 9 | registers: 10 | kind: pwm 11 | version: v53 12 | block: PWM 13 | 14 | - name: TRGM0 15 | address: 0xF033C000 16 | registers: 17 | kind: trgm 18 | version: v53 19 | block: TRGM 20 | 21 | - name: SYNT 22 | address: 0xF0328000 23 | registers: 24 | kind: synt 25 | version: v53 26 | block: SYNT 27 | 28 | - name: QEI0 29 | address: 0xF0300000 30 | registers: 31 | kind: qei 32 | version: v53 33 | block: QEI 34 | - name: QEI1 35 | address: 0xF0304000 36 | registers: 37 | kind: qei 38 | version: v53 39 | block: QEI 40 | 41 | - name: QEO0 42 | address: 0xF0308000 43 | registers: 44 | kind: qeo 45 | version: v53 46 | block: QEO 47 | - name: QEO1 48 | address: 0xF030C000 49 | registers: 50 | kind: qeo 51 | version: v53 52 | block: QEO 53 | 54 | - name: MMC0 55 | address: 0xF0310000 56 | registers: 57 | kind: mmc 58 | version: v53 59 | block: MMC 60 | - name: MMC1 61 | address: 0xF0314000 62 | registers: 63 | kind: mmc 64 | version: v53 65 | block: MMC 66 | 67 | - name: RDC0 68 | address: 0xF0320000 69 | registers: 70 | kind: rdc 71 | version: v53 72 | block: RDC 73 | 74 | - name: SEI 75 | address: 0xF032C000 76 | registers: 77 | kind: sei 78 | version: v53 79 | block: SEI 80 | -------------------------------------------------------------------------------- /data/family/HPM5300_OPAMP.yaml: -------------------------------------------------------------------------------- 1 | - name: OPAMP0 2 | address: 0xF30A0000 3 | registers: 4 | kind: opamp 5 | version: v53 6 | block: OPAMP 7 | - name: OPAMP1 8 | address: 0xF30A4000 9 | registers: 10 | kind: opamp 11 | version: v53 12 | block: OPAMP 13 | -------------------------------------------------------------------------------- /data/family/HPM5300_PLB.yaml: -------------------------------------------------------------------------------- 1 | - name: PLB 2 | address: 0xF0324000 3 | registers: 4 | kind: plb 5 | version: v53 6 | block: PLB 7 | -------------------------------------------------------------------------------- /data/family/HPM5300_Secure.yaml: -------------------------------------------------------------------------------- 1 | - name: SDP 2 | address: 0xF3040000 3 | registers: 4 | kind: sdp 5 | version: v53 6 | block: SDP 7 | 8 | - name: RNG 9 | address: 0xF304C000 10 | registers: 11 | kind: rng 12 | version: common 13 | block: RNG 14 | 15 | - name: KEYM 16 | address: 0xF3054000 17 | registers: 18 | kind: keym 19 | version: common 20 | block: KEYM 21 | 22 | - name: SEC 23 | address: 0xF3044000 24 | registers: 25 | kind: sec 26 | version: common 27 | block: SEC 28 | 29 | - name: PMON 30 | address: 0xF3048000 31 | registers: 32 | kind: pmon 33 | version: common 34 | block: PMON 35 | -------------------------------------------------------------------------------- /data/family/HPM5300_UART4567.yaml: -------------------------------------------------------------------------------- 1 | - name: UART4 2 | address: 0xF0050000 3 | registers: 4 | kind: uart 5 | version: v53 6 | block: UART 7 | - name: UART5 8 | address: 0xF0054000 9 | registers: 10 | kind: uart 11 | version: v53 12 | block: UART 13 | - name: UART6 14 | address: 0xF0058000 15 | registers: 16 | kind: uart 17 | version: v53 18 | block: UART 19 | - name: UART7 20 | address: 0xF005C000 21 | registers: 22 | kind: uart 23 | version: v53 24 | block: UART 25 | -------------------------------------------------------------------------------- /data/family/HPM6200_NonBasic.yaml: -------------------------------------------------------------------------------- 1 | # Non Basic(6220) 2 | - name: MCAN0 3 | address: 0xF0080000 4 | registers: 5 | kind: mcan 6 | version: v68 7 | block: MCAN 8 | - name: MCAN1 9 | address: 0xF0084000 10 | registers: 11 | kind: mcan 12 | version: v68 13 | block: MCAN 14 | - name: MCAN2 15 | address: 0xF0088000 16 | registers: 17 | kind: mcan 18 | version: v68 19 | block: MCAN 20 | - name: MCAN3 21 | address: 0xF008C000 22 | registers: 23 | kind: mcan 24 | version: v68 25 | block: MCAN 26 | 27 | - name: UART5 28 | address: 0xF0054000 29 | registers: 30 | kind: uart 31 | version: v62 32 | block: UART 33 | - name: UART6 34 | address: 0xF0058000 35 | registers: 36 | kind: uart 37 | version: v62 38 | block: UART 39 | - name: UART7 40 | address: 0xF005C000 41 | registers: 42 | kind: uart 43 | version: v62 44 | block: UART 45 | 46 | - name: SPI3 47 | address: 0xF003C000 48 | registers: 49 | kind: spi 50 | version: v67 51 | block: SPI 52 | 53 | - name: I2C3 54 | address: 0xF302C000 55 | registers: 56 | kind: i2c 57 | version: v67 58 | block: I2C 59 | 60 | - name: QEI0 61 | address: 0xF0208000 62 | registers: 63 | kind: qei 64 | version: v67 65 | block: QEI 66 | - name: QEI1 67 | address: 0xF0218000 68 | registers: 69 | kind: qei 70 | version: v67 71 | block: QEI 72 | - name: QEI2 73 | address: 0xF0228000 74 | registers: 75 | kind: qei 76 | version: v67 77 | block: QEI 78 | - name: QEI3 79 | address: 0xF0238000 80 | registers: 81 | kind: qei 82 | version: v67 83 | block: QEI 84 | 85 | - name: HALL0 86 | address: 0xF0204000 87 | registers: 88 | kind: hall 89 | version: common 90 | block: HALL 91 | - name: HALL1 92 | address: 0xF0214000 93 | registers: 94 | kind: hall 95 | version: common 96 | block: HALL 97 | - name: HALL2 98 | address: 0xF0224000 99 | registers: 100 | kind: hall 101 | version: common 102 | block: HALL 103 | - name: HALL3 104 | address: 0xF0234000 105 | registers: 106 | kind: hall 107 | version: common 108 | block: HALL 109 | 110 | - name: ADC1 111 | address: 0xF0014000 112 | registers: 113 | kind: adc16 114 | version: v63 115 | block: ADC 116 | - name: ADC2 117 | address: 0xF0018000 118 | registers: 119 | kind: adc16 120 | version: v63 121 | block: ADC 122 | 123 | - name: DAC0 124 | address: 0xF0024000 125 | registers: 126 | kind: dac 127 | version: v53 128 | block: DAC 129 | - name: DAC1 130 | address: 0xF0028000 131 | registers: 132 | kind: dac 133 | version: v53 134 | block: DAC 135 | -------------------------------------------------------------------------------- /data/family/HPM6300_ADC23_DAC.yaml: -------------------------------------------------------------------------------- 1 | - name: ADC1 2 | address: 0xF0014000 3 | registers: 4 | kind: adc16 5 | version: v63 6 | block: ADC 7 | - name: ADC2 8 | address: 0xF0018000 9 | registers: 10 | kind: adc16 11 | version: v63 12 | block: ADC 13 | 14 | - name: DAC0 15 | address: 0xF0024000 16 | registers: 17 | kind: dac 18 | version: v63 19 | block: DAC 20 | -------------------------------------------------------------------------------- /data/family/HPM6300_CAN.yaml: -------------------------------------------------------------------------------- 1 | - name: CAN0 2 | address: 0xF0080000 3 | registers: 4 | kind: can 5 | version: v67 6 | block: CAN 7 | - name: CAN1 8 | address: 0xF0084000 9 | registers: 10 | kind: can 11 | version: v67 12 | block: CAN 13 | -------------------------------------------------------------------------------- /data/family/HPM6300_FFA.yaml: -------------------------------------------------------------------------------- 1 | - name: FFA 2 | address: 0xF3058000 3 | registers: 4 | kind: ffa 5 | version: common 6 | block: FFA 7 | -------------------------------------------------------------------------------- /data/family/HPM6300_I2C3.yaml: -------------------------------------------------------------------------------- 1 | - name: I2C3 2 | address: 0xF302C000 3 | registers: 4 | kind: i2c 5 | version: v67 6 | block: I2C 7 | -------------------------------------------------------------------------------- /data/family/HPM6300_QEI_HALL.yaml: -------------------------------------------------------------------------------- 1 | - name: QEI0 2 | address: 0xF0208000 3 | registers: 4 | kind: qei 5 | version: v67 6 | block: QEI 7 | - name: QEI1 8 | address: 0xF0218000 9 | registers: 10 | kind: qei 11 | version: v67 12 | block: QEI 13 | 14 | - name: HALL0 15 | address: 0xF0204000 16 | registers: 17 | kind: hall 18 | version: common 19 | block: HALL 20 | - name: HALL1 21 | address: 0xF0214000 22 | registers: 23 | kind: hall 24 | version: common 25 | block: HALL 26 | -------------------------------------------------------------------------------- /data/family/HPM6300_SPI3.yaml: -------------------------------------------------------------------------------- 1 | - name: SPI3 2 | address: 0xF003C000 3 | registers: 4 | kind: spi 5 | version: v67 6 | block: SPI 7 | -------------------------------------------------------------------------------- /data/family/HPM6300_UART567.yaml: -------------------------------------------------------------------------------- 1 | - name: UART5 2 | address: 0xF0054000 3 | registers: 4 | kind: uart 5 | version: v67 6 | block: UART 7 | - name: UART6 8 | address: 0xF0058000 9 | registers: 10 | kind: uart 11 | version: v67 12 | block: UART 13 | - name: UART7 14 | address: 0xF005C000 15 | registers: 16 | kind: uart 17 | version: v67 18 | block: UART 19 | -------------------------------------------------------------------------------- /data/family/HPM6300_USB_ENET.yaml: -------------------------------------------------------------------------------- 1 | - name: ENET0 2 | address: 0xF2000000 3 | registers: 4 | kind: enet 5 | version: v63 6 | block: ENET 7 | 8 | - name: USB0 9 | address: 0xF2020000 10 | registers: 11 | kind: usb 12 | version: v67 13 | block: USB 14 | -------------------------------------------------------------------------------- /data/family/HPM6800_Adv.yaml: -------------------------------------------------------------------------------- 1 | - name: GPU 2 | address: 0xF1080000 3 | registers: 4 | kind: gpu 5 | version: v68 6 | block: GPU 7 | 8 | - name: JPEG 9 | address: 0xF1014000 10 | registers: 11 | kind: jpeg 12 | version: common 13 | block: JPEG 14 | -------------------------------------------------------------------------------- /data/family/HPM6800_NonBasic.yaml: -------------------------------------------------------------------------------- 1 | - name: LCDC0 2 | address: 0xF1000000 3 | registers: 4 | kind: lcdc 5 | version: v68 6 | block: LCDC 7 | - name: LCDC1 8 | address: 0xF1004000 9 | registers: 10 | kind: lcdc 11 | version: v68 12 | block: LCDC 13 | 14 | - name: MIPI_DSI0 15 | address: 0xF1020000 16 | registers: 17 | kind: mipidsi 18 | version: v68 19 | block: MIPI_DSI 20 | - name: MIPI_DSI1 21 | address: 0xF1024000 22 | registers: 23 | kind: mipidsi 24 | version: v68 25 | block: MIPI_DSI 26 | 27 | - name: MIPI_DSI_PHY0 28 | address: 0xF4140000 29 | registers: 30 | kind: mipidsiphy 31 | version: v68 32 | block: MIPI_DSI_PHY 33 | - name: MIPI_DSI_PHY1 34 | address: 0xF4144000 35 | registers: 36 | kind: mipidsiphy 37 | version: v68 38 | block: MIPI_DSI_PHY 39 | 40 | - name: MIPI_CSI0 41 | address: 0xF1028000 42 | registers: 43 | kind: mipicsi 44 | version: v68 45 | block: MIPI_CSI 46 | - name: MIPI_CSI1 47 | address: 0xF102C000 48 | registers: 49 | kind: mipicsi 50 | version: v68 51 | block: MIPI_CSI 52 | 53 | - name: MIPI_CSI_PHY0 54 | address: 0xF4148000 55 | registers: 56 | kind: mipicsiphy 57 | version: v68 58 | block: MIPI_CSI_PHY 59 | - name: MIPI_CSI_PHY1 60 | address: 0xF414C000 61 | registers: 62 | kind: mipicsiphy 63 | version: v68 64 | block: MIPI_CSI_PHY 65 | 66 | - name: CAM0 67 | address: 0xF1008000 68 | registers: 69 | kind: cam 70 | version: v68 71 | block: CAM 72 | - name: CAM1 73 | address: 0xF100C000 74 | registers: 75 | kind: cam 76 | version: v68 77 | block: CAM 78 | 79 | - name: PDMA 80 | address: 0xF1010000 81 | registers: 82 | kind: pdma 83 | version: v68 84 | block: PDMA 85 | 86 | - name: LVB 87 | address: 0xF1030000 88 | registers: 89 | kind: lvb 90 | version: v68 91 | block: LVB 92 | 93 | - name: LCB 94 | address: 0xF1038000 95 | registers: 96 | kind: lcb 97 | version: v68 98 | block: LCB 99 | 100 | - name: GWC0 101 | address: 0xF1018000 102 | registers: 103 | kind: gwc 104 | version: v68 105 | block: GWC 106 | - name: GWC1 107 | address: 0xF101C000 108 | registers: 109 | kind: gwc 110 | version: v68 111 | block: GWC 112 | 113 | - name: PIXELMUX 114 | address: 0xF1034000 115 | registers: 116 | kind: pixelmux 117 | version: v68 118 | block: PIXEL_MUX 119 | -------------------------------------------------------------------------------- /data/family/HPM6E00_TSW.yaml: -------------------------------------------------------------------------------- 1 | - name: TSW 2 | address: 0xF140C000 3 | registers: 4 | kind: tsw 5 | version: v6e 6 | block: TSW 7 | -------------------------------------------------------------------------------- /data/interrupts/HPM5301.yaml: -------------------------------------------------------------------------------- 1 | # GPIO0_A IRQ 2 | GPIO0_A: 1 3 | # GPIO0_B IRQ 4 | GPIO0_B: 2 5 | # GPIO0_X IRQ 6 | GPIO0_X: 3 7 | # GPIO0_Y IRQ 8 | GPIO0_Y: 4 9 | # GPTMR0 IRQ 10 | GPTMR0: 5 11 | # GPTMR1 IRQ 12 | GPTMR1: 6 13 | # UART0 IRQ 14 | UART0: 13 15 | # UART1 IRQ 16 | UART1: 14 17 | # UART2 IRQ 18 | UART2: 15 19 | # UART3 IRQ 20 | UART3: 16 21 | # I2C0 IRQ 22 | I2C0: 21 23 | # I2C1 IRQ 24 | I2C1: 22 25 | # I2C2 IRQ 26 | I2C2: 23 27 | # I2C3 IRQ 28 | I2C3: 24 29 | # SPI0 IRQ 30 | SPI0: 25 31 | # SPI1 IRQ 32 | SPI1: 26 33 | # SPI2 IRQ 34 | SPI2: 27 35 | # SPI3 IRQ 36 | SPI3: 28 37 | # TSNS IRQ 38 | TSNS: 29 39 | # MBX0A IRQ 40 | MBX0A: 30 41 | # MBX0B IRQ 42 | MBX0B: 31 43 | # EWDG0 IRQ 44 | EWDG0: 32 45 | # EWDG1 IRQ 46 | EWDG1: 33 47 | # HDMA IRQ 48 | HDMA: 34 49 | # USB0 IRQ 50 | USB0: 51 51 | # XPI0 IRQ 52 | XPI0: 52 53 | # PSEC IRQ 54 | PSEC: 54 55 | # SECMON IRQ 56 | SECMON: 55 57 | # FUSE IRQ 58 | FUSE: 57 59 | # ADC0 IRQ 60 | ADC0: 58 61 | # ACMP_0 IRQ 62 | ACMP_0: 62 63 | # ACMP_1 IRQ 64 | ACMP_1: 63 65 | # SYSCTL IRQ 66 | SYSCTL: 64 67 | # PGPIO IRQ 68 | PGPIO: 65 69 | # PTMR IRQ 70 | PTMR: 66 71 | # PUART IRQ 72 | PUART: 67 73 | # PWDG IRQ 74 | PWDG: 68 75 | # BROWNOUT IRQ 76 | BROWNOUT: 69 77 | # PAD_WAKEUP IRQ 78 | PAD_WAKEUP: 70 79 | # DEBUG0 IRQ 80 | DEBUG0: 71 81 | # DEBUG1 IRQ 82 | DEBUG1: 72 83 | -------------------------------------------------------------------------------- /data/interrupts/HPM5361.yaml: -------------------------------------------------------------------------------- 1 | # GPIO0_A IRQ 2 | GPIO0_A: 1 3 | # GPIO0_B IRQ 4 | GPIO0_B: 2 5 | # GPIO0_X IRQ 6 | GPIO0_X: 3 7 | # GPIO0_Y IRQ 8 | GPIO0_Y: 4 9 | # GPTMR0 IRQ 10 | GPTMR0: 5 11 | # GPTMR1 IRQ 12 | GPTMR1: 6 13 | # GPTMR2 IRQ 14 | GPTMR2: 7 15 | # GPTMR3 IRQ 16 | GPTMR3: 8 17 | # UART0 IRQ 18 | UART0: 13 19 | # UART1 IRQ 20 | UART1: 14 21 | # UART2 IRQ 22 | UART2: 15 23 | # UART3 IRQ 24 | UART3: 16 25 | # UART4 IRQ 26 | UART4: 17 27 | # UART5 IRQ 28 | UART5: 18 29 | # UART6 IRQ 30 | UART6: 19 31 | # UART7 IRQ 32 | UART7: 20 33 | # I2C0 IRQ 34 | I2C0: 21 35 | # I2C1 IRQ 36 | I2C1: 22 37 | # I2C2 IRQ 38 | I2C2: 23 39 | # I2C3 IRQ 40 | I2C3: 24 41 | # SPI0 IRQ 42 | SPI0: 25 43 | # SPI1 IRQ 44 | SPI1: 26 45 | # SPI2 IRQ 46 | SPI2: 27 47 | # SPI3 IRQ 48 | SPI3: 28 49 | # TSNS IRQ 50 | TSNS: 29 51 | # MBX0A IRQ 52 | MBX0A: 30 53 | # MBX0B IRQ 54 | MBX0B: 31 55 | # EWDG0 IRQ 56 | EWDG0: 32 57 | # EWDG1 IRQ 58 | EWDG1: 33 59 | # HDMA IRQ 60 | HDMA: 34 61 | # MCAN0 IRQ 62 | MCAN0: 35 63 | # MCAN1 IRQ 64 | MCAN1: 36 65 | # MCAN2 IRQ 66 | MCAN2: 37 67 | # MCAN3 IRQ 68 | MCAN3: 38 69 | # PTPC IRQ 70 | PTPC: 39 71 | # PWM0 IRQ 72 | PWM0: 40 73 | # QEI0 IRQ 74 | QEI0: 41 75 | # SEI0 IRQ 76 | SEI0: 42 77 | # MMC0 IRQ 78 | MMC0: 43 79 | # TRGM0 IRQ 80 | TRGM0: 44 81 | # PWM1 IRQ 82 | PWM1: 45 83 | # QEI1 IRQ 84 | QEI1: 46 85 | # SEI1 IRQ 86 | SEI1: 47 87 | # MMC1 IRQ 88 | MMC1: 48 89 | # TRGM1 IRQ 90 | TRGM1: 49 91 | # RDC IRQ 92 | RDC: 50 93 | # USB0 IRQ 94 | USB0: 51 95 | # XPI0 IRQ 96 | XPI0: 52 97 | # SDP IRQ 98 | SDP: 53 99 | # PSEC IRQ 100 | PSEC: 54 101 | # SECMON IRQ 102 | SECMON: 55 103 | # RNG IRQ 104 | RNG: 56 105 | # FUSE IRQ 106 | FUSE: 57 107 | # ADC0 IRQ 108 | ADC0: 58 109 | # ADC1 IRQ 110 | ADC1: 59 111 | # DAC0 IRQ 112 | DAC0: 60 113 | # DAC1 IRQ 114 | DAC1: 61 115 | # ACMP_0 IRQ 116 | ACMP_0: 62 117 | # ACMP_1 IRQ 118 | ACMP_1: 63 119 | # SYSCTL IRQ 120 | SYSCTL: 64 121 | # PGPIO IRQ 122 | PGPIO: 65 123 | # PTMR IRQ 124 | PTMR: 66 125 | # PUART IRQ 126 | PUART: 67 127 | # PWDG IRQ 128 | PWDG: 68 129 | # BROWNOUT IRQ 130 | BROWNOUT: 69 131 | # PAD_WAKEUP IRQ 132 | PAD_WAKEUP: 70 133 | # DEBUG0 IRQ 134 | DEBUG0: 71 135 | # DEBUG1 IRQ 136 | DEBUG1: 72 137 | -------------------------------------------------------------------------------- /data/interrupts/HPM6280.yaml: -------------------------------------------------------------------------------- 1 | # GPIO0_A IRQ 2 | GPIO0_A: 1 3 | # GPIO0_B IRQ 4 | GPIO0_B: 2 5 | # GPIO0_C IRQ 6 | GPIO0_C: 3 7 | # GPIO0_D IRQ 8 | GPIO0_D: 4 9 | # GPIO0_X IRQ 10 | GPIO0_X: 5 11 | # GPIO0_Y IRQ 12 | GPIO0_Y: 6 13 | # GPIO0_Z IRQ 14 | GPIO0_Z: 7 15 | # GPIO1_A IRQ 16 | GPIO1_A: 8 17 | # GPIO1_B IRQ 18 | GPIO1_B: 9 19 | # GPIO1_C IRQ 20 | GPIO1_C: 10 21 | # GPIO1_D IRQ 22 | GPIO1_D: 11 23 | # GPIO1_X IRQ 24 | GPIO1_X: 12 25 | # GPIO1_Y IRQ 26 | GPIO1_Y: 13 27 | # GPIO1_Z IRQ 28 | GPIO1_Z: 14 29 | # ADC0 IRQ 30 | ADC0: 15 31 | # ADC1 IRQ 32 | ADC1: 16 33 | # ADC2 IRQ 34 | ADC2: 17 35 | # SDFM IRQ 36 | SDFM: 18 37 | # DAC0 IRQ 38 | DAC0: 19 39 | # DAC1 IRQ 40 | DAC1: 20 41 | # ACMP[0] IRQ 42 | ACMP_0: 21 43 | # ACMP[1] IRQ 44 | ACMP_1: 22 45 | # ACMP[2] IRQ 46 | ACMP_2: 23 47 | # ACMP[3] IRQ 48 | ACMP_3: 24 49 | # SPI0 IRQ 50 | SPI0: 25 51 | # SPI1 IRQ 52 | SPI1: 26 53 | # SPI2 IRQ 54 | SPI2: 27 55 | # SPI3 IRQ 56 | SPI3: 28 57 | # UART0 IRQ 58 | UART0: 29 59 | # UART1 IRQ 60 | UART1: 30 61 | # UART2 IRQ 62 | UART2: 31 63 | # UART3 IRQ 64 | UART3: 32 65 | # UART4 IRQ 66 | UART4: 33 67 | # UART5 IRQ 68 | UART5: 34 69 | # UART6 IRQ 70 | UART6: 35 71 | # UART7 IRQ 72 | UART7: 36 73 | # MCAN0 IRQ 74 | MCAN0: 37 75 | # MCAN1 IRQ 76 | MCAN1: 38 77 | # MCAN2 IRQ 78 | MCAN2: 39 79 | # MCAN3 IRQ 80 | MCAN3: 40 81 | # PTPC IRQ 82 | PTPC: 41 83 | # WDG0 IRQ 84 | WDG0: 42 85 | # WDG1 IRQ 86 | WDG1: 43 87 | # TSNS IRQ 88 | TSNS: 44 89 | # MBX0A IRQ 90 | MBX0A: 45 91 | # MBX0B IRQ 92 | MBX0B: 46 93 | # MBX1A IRQ 94 | MBX1A: 47 95 | # MBX1B IRQ 96 | MBX1B: 48 97 | # GPTMR0 IRQ 98 | GPTMR0: 49 99 | # GPTMR1 IRQ 100 | GPTMR1: 50 101 | # GPTMR2 IRQ 102 | GPTMR2: 51 103 | # GPTMR3 IRQ 104 | GPTMR3: 52 105 | # I2C0 IRQ 106 | I2C0: 53 107 | # I2C1 IRQ 108 | I2C1: 54 109 | # I2C2 IRQ 110 | I2C2: 55 111 | # I2C3 IRQ 112 | I2C3: 56 113 | # PWM0 IRQ 114 | PWM0: 57 115 | # HALL0 IRQ 116 | HALL0: 58 117 | # QEI0 IRQ 118 | QEI0: 59 119 | # PWM1 IRQ 120 | PWM1: 60 121 | # HALL1 IRQ 122 | HALL1: 61 123 | # QEI1 IRQ 124 | QEI1: 62 125 | # PWM2 IRQ 126 | PWM2: 63 127 | # HALL2 IRQ 128 | HALL2: 64 129 | # QEI2 IRQ 130 | QEI2: 65 131 | # PWM3 IRQ 132 | PWM3: 66 133 | # HALL3 IRQ 134 | HALL3: 67 135 | # QEI3 IRQ 136 | QEI3: 68 137 | # SDP IRQ 138 | SDP: 69 139 | # XPI0 IRQ 140 | XPI0: 70 141 | # XDMA IRQ 142 | XDMA: 71 143 | # HDMA IRQ 144 | HDMA: 72 145 | # RNG IRQ 146 | RNG: 73 147 | # USB0 IRQ 148 | USB0: 74 149 | # PSEC IRQ 150 | PSEC: 75 151 | # PGPIO IRQ 152 | PGPIO: 76 153 | # PWDG IRQ 154 | PWDG: 77 155 | # PTMR IRQ 156 | PTMR: 78 157 | # PUART IRQ 158 | PUART: 79 159 | # FUSE IRQ 160 | FUSE: 80 161 | # SECMON IRQ 162 | SECMON: 81 163 | # RTC IRQ 164 | RTC: 82 165 | # BUTN IRQ 166 | BUTN: 83 167 | # BGPIO IRQ 168 | BGPIO: 84 169 | # BVIO IRQ 170 | BVIO: 85 171 | # BROWNOUT IRQ 172 | BROWNOUT: 86 173 | # SYSCTL IRQ 174 | SYSCTL: 87 175 | # DEBUG[0] IRQ 176 | DEBUG_0: 88 177 | # DEBUG[1] IRQ 178 | DEBUG_1: 89 179 | # LIN0 IRQ 180 | LIN0: 90 181 | # LIN1 IRQ 182 | LIN1: 91 183 | # LIN2 IRQ 184 | LIN2: 92 185 | # LIN3 IRQ 186 | LIN3: 93 187 | -------------------------------------------------------------------------------- /data/interrupts/HPM6360.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 # GPIO0_A IRQ 2 | GPIO0_B: 2 # GPIO0_B IRQ 3 | GPIO0_C: 3 # GPIO0_C IRQ 4 | GPIO0_D: 4 # GPIO0_D IRQ 5 | GPIO0_X: 5 # GPIO0_X IRQ 6 | GPIO0_Y: 6 # GPIO0_Y IRQ 7 | GPIO0_Z: 7 # GPIO0_Z IRQ 8 | ADC0: 8 # ADC0 IRQ 9 | ADC1: 9 # ADC1 IRQ 10 | ADC2: 10 # ADC2 IRQ 11 | DAC0: 11 # DAC IRQ 12 | ACMP_0: 12 # ACMP[0] IRQ 13 | ACMP_1: 13 # ACMP[1] IRQ 14 | SPI0: 14 # SPI0 IRQ 15 | SPI1: 15 # SPI1 IRQ 16 | SPI2: 16 # SPI2 IRQ 17 | SPI3: 17 # SPI3 IRQ 18 | UART0: 18 # UART0 IRQ 19 | UART1: 19 # UART1 IRQ 20 | UART2: 20 # UART2 IRQ 21 | UART3: 21 # UART3 IRQ 22 | UART4: 22 # UART4 IRQ 23 | UART5: 23 # UART5 IRQ 24 | UART6: 24 # UART6 IRQ 25 | UART7: 25 # UART7 IRQ 26 | CAN0: 26 # CAN0 IRQ 27 | CAN1: 27 # CAN1 IRQ 28 | PTPC: 28 # PTPC IRQ 29 | WDG0: 29 # WDG0 IRQ 30 | WDG1: 30 # WDG1 IRQ 31 | TSNS: 31 # TSNS IRQ 32 | MBX0A: 32 # MBX0A IRQ 33 | MBX0B: 33 # MBX0B IRQ 34 | GPTMR0: 34 # GPTMR0 IRQ 35 | GPTMR1: 35 # GPTMR1 IRQ 36 | GPTMR2: 36 # GPTMR2 IRQ 37 | GPTMR3: 37 # GPTMR3 IRQ 38 | I2C0: 38 # I2C0 IRQ 39 | I2C1: 39 # I2C1 IRQ 40 | I2C2: 40 # I2C2 IRQ 41 | I2C3: 41 # I2C3 IRQ 42 | PWM0: 42 # PWM0 IRQ 43 | HALL0: 43 # HALL0 IRQ 44 | QEI0: 44 # QEI0 IRQ 45 | PWM1: 45 # PWM1 IRQ 46 | HALL1: 46 # HALL1 IRQ 47 | QEI1: 47 # QEI1 IRQ 48 | SDP: 48 # SDP IRQ 49 | XPI0: 49 # XPI0 IRQ 50 | XPI1: 50 # XPI1 IRQ 51 | XDMA: 51 # XDMA IRQ 52 | HDMA: 52 # HDMA IRQ 53 | FEMC: 53 # FEMC IRQ 54 | RNG: 54 # RNG IRQ 55 | I2S0: 55 # I2S0 IRQ 56 | I2S1: 56 # I2S1 IRQ 57 | DAO: 57 # DAO IRQ 58 | PDM: 58 # PDM IRQ 59 | FFA: 59 # FFA IRQ 60 | NTMR0: 60 # NTMR0 IRQ 61 | USB0: 61 # USB0 IRQ 62 | ENET0: 62 # ENET0 IRQ 63 | SDXC0: 63 # SDXC0 IRQ 64 | PSEC: 64 # PSEC IRQ 65 | PGPIO: 65 # PGPIO IRQ 66 | PWDG: 66 # PWDG IRQ 67 | PTMR: 67 # PTMR IRQ 68 | PUART: 68 # PUART IRQ 69 | FUSE: 69 # FUSE IRQ 70 | SECMON: 70 # SECMON IRQ 71 | RTC: 71 # RTC IRQ 72 | BUTN: 72 # BUTN IRQ 73 | BGPIO: 73 # BGPIO IRQ 74 | BVIO: 74 # BVIO IRQ 75 | BROWNOUT: 75 # BROWNOUT IRQ 76 | SYSCTL: 76 # SYSCTL IRQ 77 | DEBUG_0: 77 # DEBUG[0] IRQ 78 | DEBUG_1: 78 # DEBUG[1] IRQ 79 | -------------------------------------------------------------------------------- /data/interrupts/HPM6750.yaml: -------------------------------------------------------------------------------- 1 | # GPIO0_A IRQ 2 | GPIO0_A: 1 3 | # GPIO0_B IRQ 4 | GPIO0_B: 2 5 | # GPIO0_C IRQ 6 | GPIO0_C: 3 7 | # GPIO0_D IRQ 8 | GPIO0_D: 4 9 | # GPIO0_E IRQ 10 | GPIO0_E: 5 11 | # GPIO0_F IRQ 12 | GPIO0_F: 6 13 | # GPIO0_X IRQ 14 | GPIO0_X: 7 15 | # GPIO0_Y IRQ 16 | GPIO0_Y: 8 17 | # GPIO0_Z IRQ 18 | GPIO0_Z: 9 19 | # GPIO1_A IRQ 20 | GPIO1_A: 10 21 | # GPIO1_B IRQ 22 | GPIO1_B: 11 23 | # GPIO1_C IRQ 24 | GPIO1_C: 12 25 | # GPIO1_D IRQ 26 | GPIO1_D: 13 27 | # GPIO1_E IRQ 28 | GPIO1_E: 14 29 | # GPIO1_F IRQ 30 | GPIO1_F: 15 31 | # GPIO1_X IRQ 32 | GPIO1_X: 16 33 | # GPIO1_Y IRQ 34 | GPIO1_Y: 17 35 | # GPIO1_Z IRQ 36 | GPIO1_Z: 18 37 | # ADC0 IRQ 38 | ADC0: 19 39 | # ADC1 IRQ 40 | ADC1: 20 41 | # ADC2 IRQ 42 | ADC2: 21 43 | # ADC3 IRQ 44 | ADC3: 22 45 | # ACMP[0] IRQ 46 | ACMP_0: 23 47 | # ACMP[1] IRQ 48 | ACMP_1: 24 49 | # ACMP[2] IRQ 50 | ACMP_2: 25 51 | # ACMP[3] IRQ 52 | ACMP_3: 26 53 | # SPI0 IRQ 54 | SPI0: 27 55 | # SPI1 IRQ 56 | SPI1: 28 57 | # SPI2 IRQ 58 | SPI2: 29 59 | # SPI3 IRQ 60 | SPI3: 30 61 | # UART0 IRQ 62 | UART0: 31 63 | # UART1 IRQ 64 | UART1: 32 65 | # UART2 IRQ 66 | UART2: 33 67 | # UART3 IRQ 68 | UART3: 34 69 | # UART4 IRQ 70 | UART4: 35 71 | # UART5 IRQ 72 | UART5: 36 73 | # UART6 IRQ 74 | UART6: 37 75 | # UART7 IRQ 76 | UART7: 38 77 | # UART8 IRQ 78 | UART8: 39 79 | # UART9 IRQ 80 | UART9: 40 81 | # UART10 IRQ 82 | UART10: 41 83 | # UART11 IRQ 84 | UART11: 42 85 | # UART12 IRQ 86 | UART12: 43 87 | # UART13 IRQ 88 | UART13: 44 89 | # UART14 IRQ 90 | UART14: 45 91 | # UART15 IRQ 92 | UART15: 46 93 | # CAN0 IRQ 94 | CAN0: 47 95 | # CAN1 IRQ 96 | CAN1: 48 97 | # CAN2 IRQ 98 | CAN2: 49 99 | # CAN3 IRQ 100 | CAN3: 50 101 | # PTPC IRQ 102 | PTPC: 51 103 | # WDG0 IRQ 104 | WDG0: 52 105 | # WDG1 IRQ 106 | WDG1: 53 107 | # WDG2 IRQ 108 | WDG2: 54 109 | # WDG3 IRQ 110 | WDG3: 55 111 | # MBX0A IRQ 112 | MBX0A: 56 113 | # MBX0B IRQ 114 | MBX0B: 57 115 | # MBX1A IRQ 116 | MBX1A: 58 117 | # MBX1B IRQ 118 | MBX1B: 59 119 | # GPTMR0 IRQ 120 | GPTMR0: 60 121 | # GPTMR1 IRQ 122 | GPTMR1: 61 123 | # GPTMR2 IRQ 124 | GPTMR2: 62 125 | # GPTMR3 IRQ 126 | GPTMR3: 63 127 | # GPTMR4 IRQ 128 | GPTMR4: 64 129 | # GPTMR5 IRQ 130 | GPTMR5: 65 131 | # GPTMR6 IRQ 132 | GPTMR6: 66 133 | # GPTMR7 IRQ 134 | GPTMR7: 67 135 | # I2C0 IRQ 136 | I2C0: 68 137 | # I2C1 IRQ 138 | I2C1: 69 139 | # I2C2 IRQ 140 | I2C2: 70 141 | # I2C3 IRQ 142 | I2C3: 71 143 | # PWM0 IRQ 144 | PWM0: 72 145 | # HALL0 IRQ 146 | HALL0: 73 147 | # QEI0 IRQ 148 | QEI0: 74 149 | # PWM1 IRQ 150 | PWM1: 75 151 | # HALL1 IRQ 152 | HALL1: 76 153 | # QEI1 IRQ 154 | QEI1: 77 155 | # PWM2 IRQ 156 | PWM2: 78 157 | # HALL2 IRQ 158 | HALL2: 79 159 | # QEI2 IRQ 160 | QEI2: 80 161 | # PWM3 IRQ 162 | PWM3: 81 163 | # HALL3 IRQ 164 | HALL3: 82 165 | # QEI3 IRQ 166 | QEI3: 83 167 | # SDP IRQ 168 | SDP: 84 169 | # XPI0 IRQ 170 | XPI0: 85 171 | # XPI1 IRQ 172 | XPI1: 86 173 | # XDMA IRQ 174 | XDMA: 87 175 | # HDMA IRQ 176 | HDMA: 88 177 | # FEMC IRQ 178 | FEMC: 89 179 | # RNG IRQ 180 | RNG: 90 181 | # I2S0 IRQ 182 | I2S0: 91 183 | # I2S1 IRQ 184 | I2S1: 92 185 | # I2S2 IRQ 186 | I2S2: 93 187 | # I2S3 IRQ 188 | I2S3: 94 189 | # DAO IRQ 190 | DAO: 95 191 | # PDM IRQ 192 | PDM: 96 193 | # CAM0 IRQ 194 | CAM0: 97 195 | # CAM1 IRQ 196 | CAM1: 98 197 | # LCDC_D0 IRQ 198 | LCDC_D0: 99 199 | # LCDC_D1 IRQ 200 | LCDC_D1: 100 201 | # PDMA_D0 IRQ 202 | PDMA_D0: 101 203 | # PDMA_D1 IRQ 204 | PDMA_D1: 102 205 | # JPEG IRQ 206 | JPEG: 103 207 | # NTMR0 IRQ 208 | NTMR0: 104 209 | # NTMR1 IRQ 210 | NTMR1: 105 211 | # USB0 IRQ 212 | USB0: 106 213 | # USB1 IRQ 214 | USB1: 107 215 | # ENET0 IRQ 216 | ENET0: 108 217 | # ENET1 IRQ 218 | ENET1: 109 219 | # SDXC0 IRQ 220 | SDXC0: 110 221 | # SDXC1 IRQ 222 | SDXC1: 111 223 | # PSEC IRQ 224 | PSEC: 112 225 | # PGPIO IRQ 226 | PGPIO: 113 227 | # PWDG IRQ 228 | PWDG: 114 229 | # PTMR IRQ 230 | PTMR: 115 231 | # PUART IRQ 232 | PUART: 116 233 | # VAD IRQ 234 | VAD: 117 235 | # FUSE IRQ 236 | FUSE: 118 237 | # SECMON IRQ 238 | SECMON: 119 239 | # RTC IRQ 240 | RTC: 120 241 | # BUTN IRQ 242 | BUTN: 121 243 | # BGPIO IRQ 244 | BGPIO: 122 245 | # BVIO IRQ 246 | BVIO: 123 247 | # BROWNOUT IRQ 248 | BROWNOUT: 124 249 | # SYSCTL IRQ 250 | SYSCTL: 125 251 | # DEBUG[0] IRQ 252 | DEBUG_0: 126 253 | # DEBUG[1] IRQ 254 | DEBUG_1: 127 255 | -------------------------------------------------------------------------------- /data/interrupts/HPM6830.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 2 | GPIO0_B: 2 3 | GPIO0_C: 3 4 | GPIO0_D: 4 5 | GPIO0_E: 5 6 | GPIO0_F: 6 7 | GPIO0_X: 7 8 | GPIO0_Y: 8 9 | GPIO0_Z: 9 10 | MCAN0: 10 11 | MCAN1: 11 12 | MCAN2: 12 13 | MCAN3: 13 14 | MCAN4: 14 15 | MCAN5: 15 16 | MCAN6: 16 17 | MCAN7: 17 18 | PTPC: 18 19 | UART0: 27 20 | UART1: 28 21 | UART2: 29 22 | UART3: 30 23 | UART4: 31 24 | UART5: 32 25 | UART6: 33 26 | UART7: 34 27 | I2C0: 35 28 | I2C1: 36 29 | I2C2: 37 30 | I2C3: 38 31 | SPI0: 39 32 | SPI1: 40 33 | SPI2: 41 34 | SPI3: 42 35 | GPTMR0: 43 36 | GPTMR1: 44 37 | GPTMR2: 45 38 | GPTMR3: 46 39 | GPTMR4: 47 40 | GPTMR5: 48 41 | GPTMR6: 49 42 | GPTMR7: 50 43 | EWDG0: 51 44 | EWDG1: 52 45 | MBX0A: 53 46 | MBX0B: 54 47 | MBX1A: 55 48 | MBX1B: 56 49 | RNG: 57 50 | HDMA: 58 51 | ADC0: 59 52 | ADC1: 60 53 | SDM: 61 54 | OPAMP: 62 55 | I2S0: 63 56 | I2S1: 64 57 | I2S2: 65 58 | I2S3: 66 59 | DAO: 67 60 | PDM: 68 61 | SMIX_DMA: 69 62 | SMIX_ASRC: 70 63 | GWCK0_FUNC: 77 64 | GWCK0_ERR: 78 65 | GWCK1_FUNC: 79 66 | GWCK1_ERR: 80 67 | ENET0: 92 68 | NTMR0: 93 69 | USB0: 94 70 | SDXC0: 95 71 | SDXC1: 96 72 | SDP: 97 73 | XPI0: 98 74 | XDMA: 99 75 | DDR: 100 76 | FFA: 101 77 | PSEC: 102 78 | TSNS: 103 79 | VAD: 104 80 | PGPIO: 105 81 | PWDG: 106 82 | PTMR: 107 83 | PUART: 108 84 | FUSE: 109 85 | SECMON: 110 86 | RTC: 111 87 | BGPIO: 112 88 | BVIO: 113 89 | BROWNOUT: 114 90 | SYSCTL: 115 91 | DEBUG0: 116 92 | DEBUG1: 117 93 | -------------------------------------------------------------------------------- /data/interrupts/HPM6850.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 2 | GPIO0_B: 2 3 | GPIO0_C: 3 4 | GPIO0_D: 4 5 | GPIO0_E: 5 6 | GPIO0_F: 6 7 | GPIO0_X: 7 8 | GPIO0_Y: 8 9 | GPIO0_Z: 9 10 | MCAN0: 10 11 | MCAN1: 11 12 | MCAN2: 12 13 | MCAN3: 13 14 | MCAN4: 14 15 | MCAN5: 15 16 | MCAN6: 16 17 | MCAN7: 17 18 | PTPC: 18 19 | UART0: 27 20 | UART1: 28 21 | UART2: 29 22 | UART3: 30 23 | UART4: 31 24 | UART5: 32 25 | UART6: 33 26 | UART7: 34 27 | I2C0: 35 28 | I2C1: 36 29 | I2C2: 37 30 | I2C3: 38 31 | SPI0: 39 32 | SPI1: 40 33 | SPI2: 41 34 | SPI3: 42 35 | GPTMR0: 43 36 | GPTMR1: 44 37 | GPTMR2: 45 38 | GPTMR3: 46 39 | GPTMR4: 47 40 | GPTMR5: 48 41 | GPTMR6: 49 42 | GPTMR7: 50 43 | EWDG0: 51 44 | EWDG1: 52 45 | MBX0A: 53 46 | MBX0B: 54 47 | MBX1A: 55 48 | MBX1B: 56 49 | RNG: 57 50 | HDMA: 58 51 | ADC0: 59 52 | ADC1: 60 53 | SDM: 61 54 | OPAMP: 62 55 | I2S0: 63 56 | I2S1: 64 57 | I2S2: 65 58 | I2S3: 66 59 | DAO: 67 60 | PDM: 68 61 | SMIX_DMA: 69 62 | SMIX_ASRC: 70 63 | CAM0: 71 64 | CAM1: 72 65 | LCDC: 73 66 | LCDC1: 74 67 | PDMA: 75 68 | JPEG: 76 69 | GWCK0_FUNC: 77 70 | GWCK0_ERR: 78 71 | GWCK1_FUNC: 79 72 | GWCK1_ERR: 80 73 | MIPI_DSI0: 81 74 | MIPI_DSI1: 82 75 | MIPI_CSI0: 83 76 | MIPI_CSI0_AP: 84 77 | MIPI_CSI0_DIAG: 85 78 | MIPI_CSI1_AP: 86 79 | MIPI_CSI1_DIAG: 87 80 | MIPI_CSI1: 88 81 | LCB0: 89 82 | LCB1: 90 83 | ENET0: 92 84 | NTMR0: 93 85 | USB0: 94 86 | SDXC0: 95 87 | SDXC1: 96 88 | SDP: 97 89 | XPI0: 98 90 | XDMA: 99 91 | DDR: 100 92 | FFA: 101 93 | PSEC: 102 94 | TSNS: 103 95 | VAD: 104 96 | PGPIO: 105 97 | PWDG: 106 98 | PTMR: 107 99 | PUART: 108 100 | FUSE: 109 101 | SECMON: 110 102 | RTC: 111 103 | BGPIO: 112 104 | BVIO: 113 105 | BROWNOUT: 114 106 | SYSCTL: 115 107 | DEBUG0: 116 108 | DEBUG1: 117 109 | -------------------------------------------------------------------------------- /data/interrupts/HPM6880.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 # GPIO0_A IRQ 2 | GPIO0_B: 2 # GPIO0_B IRQ 3 | GPIO0_C: 3 # GPIO0_C IRQ 4 | GPIO0_D: 4 # GPIO0_D IRQ 5 | GPIO0_E: 5 # GPIO0_E IRQ 6 | GPIO0_F: 6 # GPIO0_F IRQ 7 | GPIO0_X: 7 # GPIO0_X IRQ 8 | GPIO0_Y: 8 # GPIO0_Y IRQ 9 | GPIO0_Z: 9 # GPIO0_Z IRQ 10 | MCAN0: 10 # MCAN0 IRQ 11 | MCAN1: 11 # MCAN1 IRQ 12 | MCAN2: 12 # MCAN2 IRQ 13 | MCAN3: 13 # MCAN3 IRQ 14 | MCAN4: 14 # MCAN4 IRQ 15 | MCAN5: 15 # MCAN5 IRQ 16 | MCAN6: 16 # MCAN6 IRQ 17 | MCAN7: 17 # MCAN7 IRQ 18 | PTPC: 18 # PTPC IRQ 19 | UART0: 27 # UART0 IRQ 20 | UART1: 28 # UART1 IRQ 21 | UART2: 29 # UART2 IRQ 22 | UART3: 30 # UART3 IRQ 23 | UART4: 31 # UART4 IRQ 24 | UART5: 32 # UART5 IRQ 25 | UART6: 33 # UART6 IRQ 26 | UART7: 34 # UART7 IRQ 27 | I2C0: 35 # I2C0 IRQ 28 | I2C1: 36 # I2C1 IRQ 29 | I2C2: 37 # I2C2 IRQ 30 | I2C3: 38 # I2C3 IRQ 31 | SPI0: 39 # SPI0 IRQ 32 | SPI1: 40 # SPI1 IRQ 33 | SPI2: 41 # SPI2 IRQ 34 | SPI3: 42 # SPI3 IRQ 35 | GPTMR0: 43 # GPTMR0 IRQ 36 | GPTMR1: 44 # GPTMR1 IRQ 37 | GPTMR2: 45 # GPTMR2 IRQ 38 | GPTMR3: 46 # GPTMR3 IRQ 39 | GPTMR4: 47 # GPTMR4 IRQ 40 | GPTMR5: 48 # GPTMR5 IRQ 41 | GPTMR6: 49 # GPTMR6 IRQ 42 | GPTMR7: 50 # GPTMR7 IRQ 43 | EWDG0: 51 # EWDG0 IRQ 44 | EWDG1: 52 # EWDG1 IRQ 45 | MBX0A: 53 # MBX0A IRQ 46 | MBX0B: 54 # MBX0B IRQ 47 | MBX1A: 55 # MBX1A IRQ 48 | MBX1B: 56 # MBX1B IRQ 49 | RNG: 57 # RNG IRQ 50 | HDMA: 58 # HDMA IRQ 51 | ADC0: 59 # ADC0 IRQ 52 | ADC1: 60 # ADC1 IRQ 53 | SDM: 61 # SDM IRQ 54 | OPAMP: 62 # OPAMP IRQ 55 | I2S0: 63 # I2S0 IRQ 56 | I2S1: 64 # I2S1 IRQ 57 | I2S2: 65 # I2S2 IRQ 58 | I2S3: 66 # I2S3 IRQ 59 | DAO: 67 # DAO IRQ 60 | PDM: 68 # PDM IRQ 61 | SMIX_DMA: 69 # SMIX_DMA IRQ 62 | SMIX_ASRC: 70 # SMIX_ASRC IRQ 63 | CAM0: 71 # CAM0 IRQ 64 | CAM1: 72 # CAM1 IRQ 65 | LCDC: 73 # LCDC IRQ 66 | LCDC1: 74 # LCDC1 IRQ 67 | PDMA: 75 # PDMA IRQ 68 | JPEG: 76 # JPEG IRQ 69 | GWCK0_FUNC: 77 # GWCK0_FUNC IRQ 70 | GWCK0_ERR: 78 # GWCK0_ERR IRQ 71 | GWCK1_FUNC: 79 # GWCK1_FUNC IRQ 72 | GWCK1_ERR: 80 # GWCK1_ERR IRQ 73 | MIPI_DSI0: 81 # MIPI_DSI0 IRQ 74 | MIPI_DSI1: 82 # MIPI_DSI1 IRQ 75 | MIPI_CSI0: 83 # MIPI_CSI0 IRQ 76 | MIPI_CSI0_AP: 84 # MIPI_CSI0_AP IRQ 77 | MIPI_CSI0_DIAG: 85 # MIPI_CSI0_DIAG IRQ 78 | MIPI_CSI1_AP: 86 # MIPI_CSI1_AP IRQ 79 | MIPI_CSI1_DIAG: 87 # MIPI_CSI1_DIAG IRQ 80 | MIPI_CSI1: 88 # MIPI_CSI1 IRQ 81 | LCB0: 89 # LCB0 IRQ 82 | LCB1: 90 # LCB1 IRQ 83 | GPU: 91 # GPU IRQ 84 | ENET0: 92 # ENET0 IRQ 85 | NTMR0: 93 # NTMR0 IRQ 86 | USB0: 94 # USB0 IRQ 87 | SDXC0: 95 # SDXC0 IRQ 88 | SDXC1: 96 # SDXC1 IRQ 89 | SDP: 97 # SDP IRQ 90 | XPI0: 98 # XPI0 IRQ 91 | XDMA: 99 # XDMA IRQ 92 | DDR: 100 # DDR IRQ 93 | FFA: 101 # FFA IRQ 94 | PSEC: 102 # PSEC IRQ 95 | TSNS: 103 # TSNS IRQ 96 | VAD: 104 # VAD IRQ 97 | PGPIO: 105 # PGPIO IRQ 98 | PWDG: 106 # PWDG IRQ 99 | PTMR: 107 # PTMR IRQ 100 | PUART: 108 # PUART IRQ 101 | FUSE: 109 # FUSE IRQ 102 | SECMON: 110 # SECMON IRQ 103 | RTC: 111 # RTC IRQ 104 | BGPIO: 112 # BGPIO IRQ 105 | BVIO: 113 # BVIO IRQ 106 | BROWNOUT: 114 # BROWNOUT IRQ 107 | SYSCTL: 115 # SYSCTL IRQ 108 | DEBUG0: 116 # DEBUG0 IRQ 109 | DEBUG1: 117 # DEBUG1 IRQ 110 | -------------------------------------------------------------------------------- /data/interrupts/HPM6E80.yaml: -------------------------------------------------------------------------------- 1 | GPIO0_A: 1 2 | GPIO0_B: 2 3 | GPIO0_C: 3 4 | GPIO0_D: 4 5 | GPIO0_E: 5 6 | GPIO0_F: 6 7 | GPIO0_V: 7 8 | GPIO0_W: 8 9 | GPIO0_X: 9 10 | GPIO0_Y: 10 11 | GPIO0_Z: 11 12 | GPIO1_A: 12 13 | GPIO1_B: 13 14 | GPIO1_C: 14 15 | GPIO1_D: 15 16 | GPIO1_E: 16 17 | GPIO1_F: 17 18 | GPIO1_V: 18 19 | GPIO1_W: 19 20 | GPIO1_X: 20 21 | GPIO1_Y: 21 22 | GPIO1_Z: 22 23 | GPTMR0: 23 24 | GPTMR1: 24 25 | GPTMR2: 25 26 | GPTMR3: 26 27 | GPTMR4: 27 28 | GPTMR5: 28 29 | GPTMR6: 29 30 | GPTMR7: 30 31 | UART0: 31 32 | UART1: 32 33 | UART2: 33 34 | UART3: 34 35 | UART4: 35 36 | UART5: 36 37 | UART6: 37 38 | UART7: 38 39 | I2C0: 39 40 | I2C1: 40 41 | I2C2: 41 42 | I2C3: 42 43 | SPI0: 43 44 | SPI1: 44 45 | SPI2: 45 46 | SPI3: 46 47 | TSNS: 47 48 | MBX0A: 48 49 | MBX0B: 49 50 | MBX1A: 50 51 | MBX1B: 51 52 | EWDG0: 52 53 | EWDG1: 53 54 | EWDG2: 54 55 | EWDG3: 55 56 | HDMA: 56 57 | LOBS: 57 58 | ADC0: 58 59 | ADC1: 59 60 | ADC2: 60 61 | ADC3: 61 62 | ACMP0_0: 62 63 | ACMP0_1: 63 64 | ACMP1_0: 64 65 | ACMP1_1: 65 66 | ACMP2_0: 66 67 | ACMP2_1: 67 68 | ACMP3_0: 68 69 | ACMP3_1: 69 70 | I2S0: 70 71 | I2S1: 71 72 | DAO: 72 73 | PDM: 73 74 | UART8: 74 75 | UART9: 75 76 | UART10: 76 77 | UART11: 77 78 | UART12: 78 79 | UART13: 79 80 | UART14: 80 81 | UART15: 81 82 | I2C4: 82 83 | I2C5: 83 84 | I2C6: 84 85 | I2C7: 85 86 | SPI4: 86 87 | SPI5: 87 88 | SPI6: 88 89 | SPI7: 89 90 | MCAN0: 90 91 | MCAN1: 91 92 | MCAN2: 92 93 | MCAN3: 93 94 | MCAN4: 94 95 | MCAN5: 95 96 | MCAN6: 96 97 | MCAN7: 97 98 | PTPC: 98 99 | QEI0: 99 100 | QEI1: 100 101 | QEI2: 101 102 | QEI3: 102 103 | PWM0: 103 104 | PWM1: 104 105 | PWM2: 105 106 | PWM3: 106 107 | RDC0: 107 108 | RDC1: 108 109 | SDM0: 109 110 | SDM1: 110 111 | SEI_0: 111 112 | SEI_1: 112 113 | SEI_2: 113 114 | SEI_3: 114 115 | MTG0: 115 116 | MTG1: 116 117 | VSC0: 117 118 | VSC1: 118 119 | CLC0_0: 119 120 | CLC0_1: 120 121 | CLC1_0: 121 122 | CLC1_1: 122 123 | TRGM0: 123 124 | TRGM1: 124 125 | ENET0: 125 126 | NTMR0: 126 127 | USB0: 127 128 | TSW_0: 128 129 | TSW_1: 129 130 | TSW_2: 130 131 | TSW_3: 131 132 | TSW_PTP_EVT: 132 133 | ESC: 133 134 | ESC_SYNC0: 134 135 | ESC_SYNC1: 135 136 | ESC_RESET: 136 137 | XPI0: 137 138 | FEMC: 138 139 | PPI: 139 140 | XDMA: 140 141 | FFA: 141 142 | SDP: 142 143 | RNG: 143 144 | PKA: 144 145 | PSEC: 145 146 | PGPIO: 146 147 | PWDG: 147 148 | PTMR: 148 149 | PUART: 149 150 | FUSE: 150 151 | SECMON: 151 152 | RTC: 152 153 | PAD_WAKEUP: 153 154 | BGPIO: 154 155 | BVIO: 155 156 | BROWNOUT: 156 157 | SYSCTL: 157 158 | CPU0: 158 159 | CPU1: 159 160 | DEBUG0: 160 161 | DEBUG1: 161 162 | -------------------------------------------------------------------------------- /data/pinmux/README.md: -------------------------------------------------------------------------------- 1 | # pinmux 2 | 3 | Generated from . 4 | -------------------------------------------------------------------------------- /data/registers/bcfg_v62.yaml: -------------------------------------------------------------------------------- 1 | block/BCFG: 2 | description: BCFG. 3 | items: 4 | - name: VBG_CFG 5 | description: Bandgap config. 6 | byte_offset: 0 7 | fieldset: VBG_CFG 8 | - name: IRC32K_CFG 9 | description: On-chip 32k oscillator config. 10 | byte_offset: 8 11 | fieldset: IRC32K_CFG 12 | - name: XTAL32K_CFG 13 | description: XTAL 32K config. 14 | byte_offset: 12 15 | fieldset: XTAL32K_CFG 16 | - name: CLK_CFG 17 | description: Clock config. 18 | byte_offset: 16 19 | fieldset: CLK_CFG 20 | fieldset/CLK_CFG: 21 | description: Clock config. 22 | fields: 23 | - name: FORCE_XTAL 24 | description: force switch to crystal. 25 | bit_offset: 4 26 | bit_size: 1 27 | - name: KEEP_IRC 28 | description: force irc32k run. 29 | bit_offset: 16 30 | bit_size: 1 31 | - name: XTAL_SEL 32 | description: crystal selected. 33 | bit_offset: 28 34 | bit_size: 1 35 | fieldset/IRC32K_CFG: 36 | description: On-chip 32k oscillator config. 37 | fields: 38 | - name: CAP_TRIM 39 | description: capacitor trim bits. 40 | bit_offset: 0 41 | bit_size: 9 42 | - name: CAPEX6_TRIM 43 | description: IRC32K bit 6. 44 | bit_offset: 22 45 | bit_size: 1 46 | - name: CAPEX7_TRIM 47 | description: IRC32K bit 7. 48 | bit_offset: 23 49 | bit_size: 1 50 | - name: IRC_TRIMMED 51 | description: "IRC32K trim happened, this bit set by hardware after trim value loaded, and stop load, write 0 will clear this bit and reload trim value 0: irc is not trimmed 1: irc is trimmed." 52 | bit_offset: 31 53 | bit_size: 1 54 | fieldset/VBG_CFG: 55 | description: Bandgap config. 56 | fields: 57 | - name: VBG_P50 58 | description: Bandgap 0.50V output trim. 59 | bit_offset: 0 60 | bit_size: 5 61 | - name: VBG_P65 62 | description: Bandgap 0.65V output trim. 63 | bit_offset: 8 64 | bit_size: 5 65 | - name: VBG_1P0 66 | description: Bandgap 1.0V output trim. 67 | bit_offset: 16 68 | bit_size: 5 69 | - name: POWER_SAVE 70 | description: "Bandgap works in power save mode 0: not in power save mode 1: bandgap work in power save mode." 71 | bit_offset: 24 72 | bit_size: 1 73 | - name: LP_MODE 74 | description: "Bandgap works in low power mode 0: not in low power mode 1: bandgap work in low power mode." 75 | bit_offset: 25 76 | bit_size: 1 77 | - name: VBG_TRIMMED 78 | description: "Bandgap trim happened, this bit set by hardware after trim value loaded, and stop load, write 0 will clear this bit and reload trim value 0: bandgap is not trimmed 1: bandgap is trimmed." 79 | bit_offset: 31 80 | bit_size: 1 81 | fieldset/XTAL32K_CFG: 82 | description: XTAL 32K config. 83 | fields: 84 | - name: AMP 85 | description: crystal 32k amplifier. 86 | bit_offset: 0 87 | bit_size: 2 88 | - name: CFG 89 | description: crystal 32k config. 90 | bit_offset: 4 91 | bit_size: 1 92 | - name: GMSEL 93 | description: crystal 32k gm selection. 94 | bit_offset: 8 95 | bit_size: 2 96 | - name: HYST_EN 97 | description: crystal 32k hysteres enable. 98 | bit_offset: 12 99 | bit_size: 1 100 | -------------------------------------------------------------------------------- /data/registers/bcfg_v68.yaml: -------------------------------------------------------------------------------- 1 | block/BCFG: 2 | description: BCFG. 3 | items: 4 | - name: VBG_CFG 5 | description: Bandgap config. 6 | byte_offset: 0 7 | fieldset: VBG_CFG 8 | - name: IRC32K_CFG 9 | description: On-chip 32k oscillator config. 10 | byte_offset: 8 11 | fieldset: IRC32K_CFG 12 | - name: XTAL32K_CFG 13 | description: XTAL 32K config. 14 | byte_offset: 12 15 | fieldset: XTAL32K_CFG 16 | - name: CLK_CFG 17 | description: Clock config. 18 | byte_offset: 16 19 | fieldset: CLK_CFG 20 | fieldset/CLK_CFG: 21 | description: Clock config. 22 | fields: 23 | - name: FORCE_XTAL 24 | description: force switch to crystal. 25 | bit_offset: 4 26 | bit_size: 1 27 | - name: KEEP_IRC 28 | description: force irc32k run. 29 | bit_offset: 16 30 | bit_size: 1 31 | - name: XTAL_SEL 32 | description: crystal selected. 33 | bit_offset: 28 34 | bit_size: 1 35 | fieldset/IRC32K_CFG: 36 | description: On-chip 32k oscillator config. 37 | fields: 38 | - name: CAP_TRIM 39 | description: capacitor trim bits. 40 | bit_offset: 0 41 | bit_size: 9 42 | - name: CAPEX6_TRIM 43 | description: IRC32K bit 6. 44 | bit_offset: 22 45 | bit_size: 1 46 | - name: CAPEX7_TRIM 47 | description: IRC32K bit 7. 48 | bit_offset: 23 49 | bit_size: 1 50 | - name: IRC_TRIMMED 51 | description: "IRC32K trim happened, this bit set by hardware after trim value loaded, and stop load, write 0 will clear this bit and reload trim value 0: irc is not trimmed 1: irc is trimmed." 52 | bit_offset: 31 53 | bit_size: 1 54 | fieldset/VBG_CFG: 55 | description: Bandgap config. 56 | fields: 57 | - name: VBG_P50 58 | description: Bandgap 0.50V output trim. 59 | bit_offset: 0 60 | bit_size: 5 61 | - name: VBG_P65 62 | description: Bandgap 0.65V output trim. 63 | bit_offset: 8 64 | bit_size: 5 65 | - name: VBG_1P0 66 | description: Bandgap 1.0V output trim. 67 | bit_offset: 16 68 | bit_size: 5 69 | - name: POWER_SAVE 70 | description: "Bandgap works in power save mode 0: not in power save mode 1: bandgap work in power save mode." 71 | bit_offset: 24 72 | bit_size: 1 73 | - name: VBG_TRIMMED 74 | description: "Bandgap trim happened, this bit set by hardware after trim value loaded, and stop load, write 0 will clear this bit and reload trim value 0: bandgap is not trimmed 1: bandgap is trimmed." 75 | bit_offset: 31 76 | bit_size: 1 77 | fieldset/XTAL32K_CFG: 78 | description: XTAL 32K config. 79 | fields: 80 | - name: AMP 81 | description: crystal 32k amplifier. 82 | bit_offset: 0 83 | bit_size: 2 84 | - name: CFG 85 | description: crystal 32k config. 86 | bit_offset: 4 87 | bit_size: 1 88 | - name: GMSEL 89 | description: crystal 32k gm selection. 90 | bit_offset: 8 91 | bit_size: 2 92 | - name: HYST_EN 93 | description: crystal 32k hysteres enable. 94 | bit_offset: 12 95 | bit_size: 1 96 | -------------------------------------------------------------------------------- /data/registers/bkey_common.yaml: -------------------------------------------------------------------------------- 1 | block/BKEY: 2 | description: BKEY. 3 | items: 4 | - name: KEY 5 | description: no description available. 6 | array: 7 | len: 2 8 | stride: 32 9 | byte_offset: 0 10 | block: KEY 11 | - name: ECC 12 | description: no description available. 13 | array: 14 | len: 2 15 | stride: 4 16 | byte_offset: 64 17 | fieldset: ECC 18 | - name: SELECT 19 | description: Key selection. 20 | byte_offset: 72 21 | fieldset: SELECT 22 | block/KEY: 23 | description: no description available. 24 | items: 25 | - name: DATA 26 | description: no description available. 27 | array: 28 | len: 8 29 | stride: 4 30 | byte_offset: 0 31 | fieldset: DATA 32 | fieldset/DATA: 33 | description: no description available. 34 | fields: 35 | - name: DATA 36 | description: security key data. 37 | bit_offset: 0 38 | bit_size: 32 39 | fieldset/ECC: 40 | description: no description available. 41 | fields: 42 | - name: ECC 43 | description: Parity check bits for key0. 44 | bit_offset: 0 45 | bit_size: 16 46 | - name: RLOCK 47 | description: "read lock to key0 0: key read enable 1: key always read as 0." 48 | bit_offset: 30 49 | bit_size: 1 50 | - name: WLOCK 51 | description: "write lock to key0 0: write enable 1: write ignored." 52 | bit_offset: 31 53 | bit_size: 1 54 | fieldset/SELECT: 55 | description: Key selection. 56 | fields: 57 | - name: SELECT 58 | description: "select key, key0 treated as secure key, in non-scure mode, only key1 can be selected 0: select key0 in secure mode, key1 in non-secure mode 1: select key1 in secure or nonsecure mode." 59 | bit_offset: 0 60 | bit_size: 1 61 | -------------------------------------------------------------------------------- /data/registers/bmon_common.yaml: -------------------------------------------------------------------------------- 1 | block/BMON: 2 | description: BMON. 3 | items: 4 | - name: MONITOR 5 | description: no description available. 6 | array: 7 | len: 2 8 | stride: 16 9 | byte_offset: 0 10 | block: MONITOR 11 | block/MONITOR: 12 | description: no description available. 13 | items: 14 | - name: CONTROL 15 | description: Glitch and clock monitor control. 16 | byte_offset: 0 17 | fieldset: CONTROL 18 | - name: STATUS 19 | description: Glitch and clock monitor status. 20 | byte_offset: 4 21 | fieldset: STATUS 22 | fieldset/CONTROL: 23 | description: Glitch and clock monitor control. 24 | fields: 25 | - name: ENABLE 26 | description: "enable glitch detector 0: detector disabled 1: detector enabled." 27 | bit_offset: 0 28 | bit_size: 1 29 | - name: ACTIVE 30 | description: "select glitch works in active mode or passve mode. 0: passive mode, depends on power glitch destroy DFF value 1: active mode, check glitch by DFF chain." 31 | bit_offset: 4 32 | bit_size: 1 33 | fieldset/STATUS: 34 | description: Glitch and clock monitor status. 35 | fields: 36 | - name: FLAG 37 | description: "flag for glitch detected, write 1 to clear this flag 0: glitch not detected 1: glitch detected." 38 | bit_offset: 0 39 | bit_size: 1 40 | -------------------------------------------------------------------------------- /data/registers/bpor_v67.yaml: -------------------------------------------------------------------------------- 1 | block/BPOR: 2 | description: BPOR. 3 | items: 4 | - name: POR_CAUSE 5 | description: Power on cause. 6 | byte_offset: 0 7 | fieldset: POR_CAUSE 8 | - name: POR_SELECT 9 | description: Power on select. 10 | byte_offset: 4 11 | fieldset: POR_SELECT 12 | - name: POR_CONFIG 13 | description: Power on reset config. 14 | byte_offset: 8 15 | fieldset: POR_CONFIG 16 | - name: POR_CONTROL 17 | description: Power down control. 18 | byte_offset: 12 19 | fieldset: POR_CONTROL 20 | fieldset/POR_CAUSE: 21 | description: Power on cause. 22 | fields: 23 | - name: CAUSE 24 | description: "Power on cause, each bit represnts one cause, write 1 to clear each bit bit0: wakeup button bit1: security violation bit2: RTC alarm 0 bit3: RTC alarm 1 bit4: GPIO." 25 | bit_offset: 0 26 | bit_size: 5 27 | fieldset/POR_CONFIG: 28 | description: Power on reset config. 29 | fields: 30 | - name: RETENTION 31 | description: "retention battery domain setting 0: battery reset on reset pin reset happen 1: battery domain retention when reset pin reset happen." 32 | bit_offset: 0 33 | bit_size: 1 34 | fieldset/POR_CONTROL: 35 | description: Power down control. 36 | fields: 37 | - name: COUNTER 38 | description: Chip power down counter, counter decreasing if value is not 0, power down of chip happens on counter value is 1. 39 | bit_offset: 0 40 | bit_size: 16 41 | fieldset/POR_SELECT: 42 | description: Power on select. 43 | fields: 44 | - name: SELECT 45 | description: "Power on cause select, each bit represnts one cause, value 1 enables corresponding cause bit0: wakeup button bit1: security violation bit2: RTC alarm 0 bit3: RTC alarm 1 bit4: GPIO." 46 | bit_offset: 0 47 | bit_size: 5 48 | -------------------------------------------------------------------------------- /data/registers/bpor_v68.yaml: -------------------------------------------------------------------------------- 1 | block/BPOR: 2 | description: BPOR. 3 | items: 4 | - name: POR_CONFIG 5 | description: Power on reset config. 6 | byte_offset: 0 7 | fieldset: POR_CONFIG 8 | fieldset/POR_CONFIG: 9 | description: Power on reset config. 10 | fields: 11 | - name: RETENTION 12 | description: "retention battery domain setting 0: battery reset on reset pin reset happen 1: battery domain retention when reset pin reset happen." 13 | bit_offset: 0 14 | bit_size: 1 15 | -------------------------------------------------------------------------------- /data/registers/butn_common.yaml: -------------------------------------------------------------------------------- 1 | block/BUTN: 2 | description: BUTN. 3 | items: 4 | - name: BTN_STATUS 5 | description: Button status. 6 | byte_offset: 0 7 | fieldset: BTN_STATUS 8 | - name: BTN_IRQ_MASK 9 | description: Button interrupt mask. 10 | byte_offset: 4 11 | fieldset: BTN_IRQ_MASK 12 | - name: LED_INTENSE 13 | description: Debounce setting. 14 | byte_offset: 8 15 | fieldset: LED_INTENSE 16 | fieldset/BTN_IRQ_MASK: 17 | description: Button interrupt mask. 18 | fields: 19 | - name: PBTN 20 | description: "Power button press interrupt enable bit0: button pressed bit1: button confirmd bit2: button long pressed bit3: button long long pressed." 21 | bit_offset: 0 22 | bit_size: 4 23 | - name: WBTN 24 | description: "Wake button press interrupt enable bit0: button pressed bit1: button confirmd bit2: button long pressed bit3: button long long pressed." 25 | bit_offset: 4 26 | bit_size: 4 27 | - name: DBTN 28 | description: "Dual button press interrupt enable bit0: button pressed bit1: button confirmd bit2: button long pressed bit3: button long long pressed." 29 | bit_offset: 8 30 | bit_size: 4 31 | - name: PCLICK 32 | description: "power button click interrupt enable bit0: clicked bit1: double clicked bit2: tripple clicked." 33 | bit_offset: 16 34 | bit_size: 3 35 | - name: XPCLICK 36 | description: "power button click status when wake button held interrupt enable bit0: clicked bit1: double clicked bit2: tripple clicked." 37 | bit_offset: 20 38 | bit_size: 3 39 | - name: WCLICK 40 | description: "wake button click interrupt enable bit0: clicked bit1: double clicked bit2: tripple clicked." 41 | bit_offset: 24 42 | bit_size: 3 43 | - name: XWCLICK 44 | description: "wake button click status when power button held interrupt enable bit0: clicked bit1: double clicked bit2: tripple clicked." 45 | bit_offset: 28 46 | bit_size: 3 47 | fieldset/BTN_STATUS: 48 | description: Button status. 49 | fields: 50 | - name: PBTN 51 | description: "Power button press status, write 1 to clear flag bit0: button pressed bit1: button confirmd bit2: button long pressed bit3: button long long pressed." 52 | bit_offset: 0 53 | bit_size: 4 54 | - name: WBTN 55 | description: "Wake button press status, write 1 to clear flag bit0: button pressed bit1: button confirmd bit2: button long pressed bit3: button long long pressed." 56 | bit_offset: 4 57 | bit_size: 4 58 | - name: DBTN 59 | description: "Dual button press status, write 1 to clear flag bit0: button pressed bit1: button confirmd bit2: button long pressed bit3: button long long pressed." 60 | bit_offset: 8 61 | bit_size: 4 62 | - name: PCLICK 63 | description: "power button click status, write 1 to clear flag bit0: clicked bit1: double clicked bit2: tripple clicked." 64 | bit_offset: 16 65 | bit_size: 3 66 | - name: XPCLICK 67 | description: "power button click status when wake button held, write 1 to clear flag bit0: clicked bit1: double clicked bit2: tripple clicked." 68 | bit_offset: 20 69 | bit_size: 3 70 | - name: WCLICK 71 | description: "wake button click status, write 1 to clear flag bit0: clicked bit1: double clicked bit2: tripple clicked." 72 | bit_offset: 24 73 | bit_size: 3 74 | - name: XWCLICK 75 | description: "wake button click status when power button held, write 1 to clear flag bit0: clicked bit1: double clicked bit2: tripple clicked." 76 | bit_offset: 28 77 | bit_size: 3 78 | fieldset/LED_INTENSE: 79 | description: Debounce setting. 80 | fields: 81 | - name: PLED 82 | description: Pbutton brightness 0. 83 | bit_offset: 0 84 | bit_size: 4 85 | - name: RLED 86 | description: Rbutton brightness 0. 87 | bit_offset: 16 88 | bit_size: 4 89 | -------------------------------------------------------------------------------- /data/registers/crc_common.yaml: -------------------------------------------------------------------------------- 1 | block/CHN: 2 | description: no description available. 3 | items: 4 | - name: pre_set 5 | description: "&index0 pre set for crc setting." 6 | byte_offset: 0 7 | fieldset: pre_set 8 | - name: clr 9 | description: chn&index0 clear crc result and setting. 10 | byte_offset: 4 11 | fieldset: clr 12 | - name: poly 13 | description: chn&index0 poly. 14 | byte_offset: 8 15 | fieldset: poly 16 | - name: init_data 17 | description: chn&index0 init_data. 18 | byte_offset: 12 19 | fieldset: init_data 20 | - name: xorout 21 | description: chn&index0 xorout. 22 | byte_offset: 16 23 | fieldset: xorout 24 | - name: misc_setting 25 | description: chn&index0 misc_setting. 26 | byte_offset: 20 27 | fieldset: misc_setting 28 | - name: data 29 | description: chn&index0 data. 30 | byte_offset: 24 31 | fieldset: data 32 | - name: result 33 | description: chn&index0 result. 34 | byte_offset: 28 35 | fieldset: result 36 | block/CRC: 37 | description: CRC. 38 | items: 39 | - name: CHN 40 | description: no description available. 41 | array: 42 | len: 8 43 | stride: 64 44 | byte_offset: 0 45 | block: CHN 46 | fieldset/clr: 47 | description: chn&index0 clear crc result and setting. 48 | fields: 49 | - name: CLR 50 | description: write 1 to clr crc setting and result for its channel. always read 0. 51 | bit_offset: 0 52 | bit_size: 1 53 | fieldset/data: 54 | description: chn&index0 data. 55 | fields: 56 | - name: DATA 57 | description: data for crc. 58 | bit_offset: 0 59 | bit_size: 32 60 | fieldset/init_data: 61 | description: chn&index0 init_data. 62 | fields: 63 | - name: INIT_DATA 64 | description: initial data of CRC. 65 | bit_offset: 0 66 | bit_size: 32 67 | fieldset/misc_setting: 68 | description: chn&index0 misc_setting. 69 | fields: 70 | - name: POLY_WIDTH 71 | description: crc data length. 72 | bit_offset: 0 73 | bit_size: 6 74 | - name: REV_IN 75 | description: "0: no wrap input bit order 1: wrap input bit order." 76 | bit_offset: 8 77 | bit_size: 1 78 | - name: REV_OUT 79 | description: "0: no wrap output bit order 1: wrap output bit order." 80 | bit_offset: 16 81 | bit_size: 1 82 | - name: BYTE_REV 83 | description: "0: no wrap input byte order 1: wrap input byte order." 84 | bit_offset: 24 85 | bit_size: 1 86 | fieldset/poly: 87 | description: chn&index0 poly. 88 | fields: 89 | - name: POLY 90 | description: poly setting. 91 | bit_offset: 0 92 | bit_size: 32 93 | fieldset/pre_set: 94 | description: "&index0 pre set for crc setting." 95 | fields: 96 | - name: PRE_SET 97 | description: "0: no pre set 1: CRC32 2: CRC32-AUTOSAR 3: CRC16-CCITT 4: CRC16-XMODEM 5: CRC16-MODBUS 1: CRC32 2: CRC32-autosar 3: CRC16-ccitt 4: CRC16-xmodem 5: CRC16-modbus 6: crc16_dnp 7: crc16_x25 8: crc16_usb 9: crc16_maxim 10: crc16_ibm 11: crc8_maxim 12: crc8_rohc 13: crc8_itu 14: crc8 15: crc5_usb." 98 | bit_offset: 0 99 | bit_size: 8 100 | fieldset/result: 101 | description: chn&index0 result. 102 | fields: 103 | - name: RESULT 104 | description: crc result. 105 | bit_offset: 0 106 | bit_size: 32 107 | fieldset/xorout: 108 | description: chn&index0 xorout. 109 | fields: 110 | - name: XOROUT 111 | description: XOR for CRC result. 112 | bit_offset: 0 113 | bit_size: 32 114 | -------------------------------------------------------------------------------- /data/registers/dao_v67.yaml: -------------------------------------------------------------------------------- 1 | block/DAO: 2 | description: DAO. 3 | items: 4 | - name: CTRL 5 | description: Control Register. 6 | byte_offset: 0 7 | fieldset: CTRL 8 | - name: CMD 9 | description: Command Register. 10 | byte_offset: 8 11 | fieldset: CMD 12 | - name: RX_CFGR 13 | description: Configuration Register. 14 | byte_offset: 12 15 | fieldset: RX_CFGR 16 | - name: RXSLT 17 | description: RX Slot Control Register. 18 | byte_offset: 16 19 | fieldset: RXSLT 20 | - name: HPF_MA 21 | description: HPF A Coef Register. 22 | byte_offset: 20 23 | fieldset: HPF_MA 24 | - name: HPF_B 25 | description: HPF B Coef Register. 26 | byte_offset: 24 27 | fieldset: HPF_B 28 | fieldset/CMD: 29 | description: Command Register. 30 | fields: 31 | - name: RUN 32 | description: Enable this module to run. 33 | bit_offset: 0 34 | bit_size: 1 35 | - name: SFTRST 36 | description: Self-clear. 37 | bit_offset: 1 38 | bit_size: 1 39 | fieldset/CTRL: 40 | description: Control Register. 41 | fields: 42 | - name: FALSE_RUN 43 | description: the module continues to consume data, but all the pads are constant, thus no audio out. 44 | bit_offset: 0 45 | bit_size: 1 46 | - name: FALSE_LEVEL 47 | description: "the pad output in False run mode, or when the module is disabled 0: all low 1: all high 2: P-high, N-low 3. output is not enabled." 48 | bit_offset: 1 49 | bit_size: 2 50 | - name: INVERT 51 | description: all the outputs are inverted before sending to pad. 52 | bit_offset: 3 53 | bit_size: 1 54 | - name: REMAP 55 | description: "1: Use remap pwm version. The remap version is a version that one pwm output is tied to zero when the input pcm signal is positive or negative 0: Don't use remap pwm version." 56 | bit_offset: 4 57 | bit_size: 1 58 | - name: LEFT_EN 59 | description: Asserted to enable the left channel. 60 | bit_offset: 5 61 | bit_size: 1 62 | - name: RIGHT_EN 63 | description: Asserted to enable the right channel. 64 | bit_offset: 6 65 | bit_size: 1 66 | - name: MONO 67 | description: Asserted to let the left and right channel output the same value. 68 | bit_offset: 7 69 | bit_size: 1 70 | - name: HPF_EN 71 | description: Whether HPF is enabled. This HPF is used to filter out the DC part. 72 | bit_offset: 17 73 | bit_size: 1 74 | fieldset/HPF_B: 75 | description: HPF B Coef Register. 76 | fields: 77 | - name: COEF 78 | description: coef B of the Order-1 HPF. 79 | bit_offset: 0 80 | bit_size: 32 81 | fieldset/HPF_MA: 82 | description: HPF A Coef Register. 83 | fields: 84 | - name: COEF 85 | description: Composite value of coef A of the Order-1 HPF. 86 | bit_offset: 0 87 | bit_size: 32 88 | fieldset/RXSLT: 89 | description: RX Slot Control Register. 90 | fields: 91 | - name: EN 92 | description: Slot enable for the channels. 93 | bit_offset: 0 94 | bit_size: 32 95 | fieldset/RX_CFGR: 96 | description: Configuration Register. 97 | fields: 98 | - name: CH_MAX 99 | description: "CH_MAX[3:0] is the number if channels supported in TDM mode. When not in TDM mode, it must be set as 2. It must be an even number, so CH_MAX[0] is always 0. 4'h2: 2 channels 4'h4: 4 channels etc." 100 | bit_offset: 6 101 | bit_size: 5 102 | -------------------------------------------------------------------------------- /data/registers/dmamux_common.yaml: -------------------------------------------------------------------------------- 1 | block/DMAMUX: 2 | description: DMAMUX. 3 | items: 4 | - name: MUXCFG 5 | description: no description available. 6 | array: 7 | len: 64 # diffs, max is 64 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: MUXCFG 11 | fieldset/MUXCFG: 12 | description: no description available. 13 | fields: 14 | - name: SOURCE 15 | description: DMA Channel Source Specifies which DMA source, if any, is routed to a particular DMA channel. See the "DMA MUX Mapping". 16 | bit_offset: 0 17 | bit_size: 7 18 | - name: ENABLE 19 | description: DMA Mux Channel Enable Enables the channel for DMA Mux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel. 0b - DMA Mux channel is disabled 1b - DMA Mux channel is enabled. 20 | bit_offset: 31 21 | bit_size: 1 22 | -------------------------------------------------------------------------------- /data/registers/gpiom_v53.yaml: -------------------------------------------------------------------------------- 1 | block/ASSIGN: 2 | description: no description available. 3 | items: 4 | - name: PIN 5 | description: no description available. 6 | array: 7 | len: 32 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: PIN 11 | block/GPIOM: 12 | description: GPIOM. 13 | items: 14 | - name: ASSIGN 15 | description: no description available. 16 | array: 17 | len: 15 18 | stride: 128 19 | byte_offset: 0 20 | block: ASSIGN 21 | fieldset/PIN: 22 | description: no description available. 23 | fields: 24 | - name: SELECT 25 | description: "select which gpio controls chip pin, 0: soc gpio0; 2: cpu0 fastgpio." 26 | bit_offset: 0 27 | bit_size: 2 28 | enum: PIN_SELECT 29 | - name: HIDE 30 | description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit2: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio." 31 | bit_offset: 8 32 | bit_size: 4 33 | - name: HIDE_GPIO0 34 | description: "pin value visibility to soc gpio0, 0: visible; 1: invisible." 35 | bit_offset: 8 36 | bit_size: 1 37 | - name: HIDE_CPU0_FGPIO 38 | description: "pin value visibility to cpu0 fast gpio, 0: visible; 1: invisible." 39 | bit_offset: 10 40 | bit_size: 1 41 | - name: LOCK 42 | description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." 43 | bit_offset: 31 44 | bit_size: 1 45 | enum/PIN_SELECT: 46 | description: select which gpio controls chip pin 47 | bit_size: 2 48 | variants: 49 | - name: GPIO0 50 | description: soc gpio0 51 | value: 0 52 | - name: CPU0_FGPIO 53 | description: cpu0 fastgpio 54 | value: 2 55 | -------------------------------------------------------------------------------- /data/registers/gpiom_v63.yaml: -------------------------------------------------------------------------------- 1 | block/ASSIGN: 2 | description: no description available. 3 | items: 4 | - name: PIN 5 | description: no description available. 6 | array: 7 | len: 32 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: PIN 11 | block/GPIOM: 12 | description: GPIOM. 13 | items: 14 | - name: ASSIGN 15 | description: no description available. 16 | array: 17 | len: 16 18 | stride: 128 19 | byte_offset: 0 20 | block: ASSIGN 21 | fieldset/PIN: 22 | description: no description available. 23 | fields: 24 | - name: SELECT 25 | description: "select which gpio controls chip pin, 0: soc gpio0; 1: cpu0 fastgpio." 26 | bit_offset: 0 27 | bit_size: 1 28 | enum: PIN_SELECT 29 | - name: HIDE 30 | description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit1: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio." 31 | bit_offset: 8 32 | bit_size: 2 33 | - name: LOCK 34 | description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." 35 | bit_offset: 31 36 | bit_size: 1 37 | enum/PIN_SELECT: 38 | description: select which gpio controls chip pin 39 | bit_size: 1 40 | variants: 41 | - name: GPIO0 42 | description: soc gpio0 43 | value: 0 44 | - name: CPU0_FGPIO 45 | description: cpu0 fastgpio 46 | value: 1 47 | -------------------------------------------------------------------------------- /data/registers/gpiom_v67.yaml: -------------------------------------------------------------------------------- 1 | block/ASSIGN: 2 | description: no description available. 3 | items: 4 | - name: PIN 5 | description: no description available. 6 | array: 7 | len: 32 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: PIN 11 | block/GPIOM: 12 | description: GPIOM. 13 | items: 14 | - name: ASSIGN 15 | description: no description available. 16 | array: 17 | len: 16 18 | stride: 128 19 | byte_offset: 0 20 | block: ASSIGN 21 | fieldset/PIN: 22 | description: no description available. 23 | fields: 24 | - name: SELECT 25 | description: "select which gpio controls chip pin, 0: soc gpio0; 1: soc gpio1; 2: cpu0 fastgpio 3: cpu1 fast gpio." 26 | bit_offset: 0 27 | bit_size: 2 28 | enum: PIN_SELECT 29 | - name: HIDE 30 | description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit1: 1, invisible to soc gpio1; 0: visible to soc gpio1 bit2: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio bit3: 1, invisible to cpu1 fast gpio; 0: visible to cpu1 fast gpio." 31 | bit_offset: 8 32 | bit_size: 4 33 | - name: LOCK 34 | description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." 35 | bit_offset: 31 36 | bit_size: 1 37 | enum/PIN_SELECT: 38 | description: select which gpio controls chip pin 39 | bit_size: 2 40 | variants: 41 | - name: GPIO0 42 | description: soc gpio0 43 | value: 0 44 | - name: GPIO1 45 | description: soc gpio1 46 | value: 1 47 | - name: CPU0_FGPIO 48 | description: cpu0 fastgpio 49 | value: 2 50 | - name: CPU1_FGPIO 51 | description: cpu1 fast gpio 52 | value: 3 53 | -------------------------------------------------------------------------------- /data/registers/gpiom_v68.yaml: -------------------------------------------------------------------------------- 1 | block/ASSIGN: 2 | description: no description available. 3 | items: 4 | - name: PIN 5 | description: no description available. 6 | array: 7 | len: 32 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: PIN 11 | block/GPIOM: 12 | description: GPIOM. 13 | items: 14 | - name: ASSIGN 15 | description: no description available. 16 | array: 17 | len: 16 18 | stride: 128 19 | byte_offset: 0 20 | block: ASSIGN 21 | fieldset/PIN: 22 | description: no description available. 23 | fields: 24 | - name: SELECT 25 | description: "select which gpio controls chip pin, 0: soc gpio0; 2: cpu0 fastgpio." 26 | bit_offset: 0 27 | bit_size: 2 28 | enum: PIN_SELECT 29 | - name: HIDE 30 | description: "pin value visibility to gpios, bit0: 1, invisible to soc gpio0; 0: visible to soc gpio0 bit1: 1, invisible to cpu0 fast gpio; 0: visible to cpu0 fast gpio." 31 | bit_offset: 8 32 | bit_size: 2 33 | - name: LOCK 34 | description: "lock fields in this register, lock can only be cleared by soc reset 0: fields can be changed 1: fields locked to current value, not changeable." 35 | bit_offset: 31 36 | bit_size: 1 37 | enum/PIN_SELECT: 38 | description: select which gpio controls chip pin 39 | bit_size: 2 40 | variants: 41 | - name: GPIO0 42 | description: soc gpio0 43 | value: 0 44 | - name: CPU0_FGPIO 45 | description: cpu0 fastgpio 46 | value: 2 47 | -------------------------------------------------------------------------------- /data/registers/gwc_v68.yaml: -------------------------------------------------------------------------------- 1 | block/CHANNEL: 2 | description: no description available. 3 | items: 4 | - name: cfg0 5 | description: config reg 0. 6 | byte_offset: 0 7 | fieldset: cfg0 8 | - name: cfg1 9 | description: config reg 1. 10 | byte_offset: 4 11 | fieldset: cfg1 12 | - name: refcrc 13 | description: reference CRC. 14 | byte_offset: 8 15 | fieldset: refcrc 16 | - name: calcrc 17 | description: calculated CRC. 18 | byte_offset: 12 19 | fieldset: calcrc 20 | block/GWC: 21 | description: GWC0. 22 | items: 23 | - name: glb_ctrl 24 | description: control reg. 25 | byte_offset: 0 26 | fieldset: glb_ctrl 27 | - name: irq_mask 28 | description: interrupt enable. 29 | byte_offset: 4 30 | fieldset: irq_mask 31 | - name: irq_sts 32 | description: interrupt status. 33 | byte_offset: 8 34 | fieldset: irq_sts 35 | - name: CHANNEL 36 | description: no description available. 37 | array: 38 | len: 2 39 | stride: 240 40 | byte_offset: 16 41 | block: CHANNEL 42 | fieldset/calcrc: 43 | description: calculated CRC. 44 | fields: 45 | - name: CAL_CRC 46 | description: calculated CRC for last frame. 47 | bit_offset: 0 48 | bit_size: 32 49 | fieldset/cfg0: 50 | description: config reg 0. 51 | fields: 52 | - name: START_COL 53 | description: define the window start column number. 54 | bit_offset: 0 55 | bit_size: 13 56 | - name: START_ROW 57 | description: define the window start row number. 58 | bit_offset: 16 59 | bit_size: 12 60 | - name: FREEZE 61 | description: freeze config. set to freeze all other config registers for current channel. can only be cleared by system reset. 62 | bit_offset: 30 63 | bit_size: 1 64 | - name: ENABLE 65 | description: channel enable. 66 | bit_offset: 31 67 | bit_size: 1 68 | fieldset/cfg1: 69 | description: config reg 1. 70 | fields: 71 | - name: END_COL 72 | description: define the window end column number. 73 | bit_offset: 0 74 | bit_size: 13 75 | - name: END_ROW 76 | description: define the window end row number. 77 | bit_offset: 16 78 | bit_size: 12 79 | fieldset/glb_ctrl: 80 | description: control reg. 81 | fields: 82 | - name: GWC_EN 83 | description: graphic window check enable. set to enable the whole block. 84 | bit_offset: 0 85 | bit_size: 1 86 | - name: CLK_POL 87 | description: graphic clock polarity. set to invert input graphic clock. 88 | bit_offset: 7 89 | bit_size: 1 90 | fieldset/irq_mask: 91 | description: interrupt enable. 92 | fields: 93 | - name: ERR_MASK 94 | description: error interrupt mask. 95 | bit_offset: 0 96 | bit_size: 1 97 | - name: FUNC_MASK 98 | description: function interrupt mask. 99 | bit_offset: 1 100 | bit_size: 1 101 | - name: MASK_RREEZ 102 | description: freeze mask, set to disable changing ERR_MASK and FUNC_MASK. can only be cleared by system reset. 103 | bit_offset: 3 104 | bit_size: 1 105 | fieldset/irq_sts: 106 | description: interrupt status. 107 | fields: 108 | - name: GWC_FAIL_STS 109 | description: graphic window check fail interrupt status. will be set if the calculated CRC not equal reference CRC. one bit for each channel. software write 1 to clear. 110 | bit_offset: 0 111 | bit_size: 16 112 | - name: ERR_STS 113 | description: error status, it's OR of GWC_FAIL_STS[15:0]. 114 | bit_offset: 16 115 | bit_size: 1 116 | - name: FUNC_STS 117 | description: function interrupt status. it's set when detect two VSYNC signals after the block is enabled(GWC_EN is set) software write 1 to clear. 118 | bit_offset: 17 119 | bit_size: 1 120 | fieldset/refcrc: 121 | description: reference CRC. 122 | fields: 123 | - name: REF_CRC 124 | description: "reference CRC polynomial function: 0x104C11DB7." 125 | bit_offset: 0 126 | bit_size: 32 127 | -------------------------------------------------------------------------------- /data/registers/ioc_common.yaml: -------------------------------------------------------------------------------- 1 | block/IOC: 2 | description: IOC. 3 | items: 4 | - name: PAD 5 | description: no description available. 6 | array: 7 | len: 456 8 | stride: 8 9 | byte_offset: 0 10 | block: PAD 11 | block/PAD: 12 | description: no description available. 13 | items: 14 | - name: FUNC_CTL 15 | description: ALT SELECT. 16 | byte_offset: 0 17 | fieldset: FUNC_CTL 18 | - name: PAD_CTL 19 | description: PAD SETTINGS. 20 | byte_offset: 4 21 | fieldset: PAD_CTL 22 | fieldset/FUNC_CTL: 23 | description: ALT SELECT. 24 | fields: 25 | - name: ALT_SELECT 26 | description: "alt select 0: ALT0 1: ALT1 ... 31:ALT31." 27 | bit_offset: 0 28 | bit_size: 5 29 | - name: ANALOG 30 | description: "select analog pin in pad 0: disable 1: enable." 31 | bit_offset: 8 32 | bit_size: 1 33 | - name: LOOP_BACK 34 | description: "force input on 0: disable 1: enable." 35 | bit_offset: 16 36 | bit_size: 1 37 | fieldset/PAD_CTL: 38 | description: PAD SETTINGS. 39 | fields: 40 | - name: DS 41 | description: "drive strength 1.8V Mode: 000: 260 Ohm 001: 260 Ohm 010: 130 Ohm 011: 88 Ohm 100: 65 Ohm 101: 52 Ohm 110: 43 Ohm 111: 37 Ohm 3.3V Mode: 000: 157 Ohm 001: 157 Ohm 010: 78 Ohm 011: 53 Ohm 100: 39 Ohm 101: 32 Ohm 110: 26 Ohm 111: 23 Ohm." 42 | bit_offset: 0 43 | bit_size: 3 44 | - name: SPD 45 | description: "additional 2-bit slew rate to select IO cell operation frequency range with reduced switching noise 00: Slow frequency slew rate(50Mhz) 01: Medium frequency slew rate(100 Mhz) 10: Fast frequency slew rate(150 Mhz) 11: Max frequency slew rate(200Mhz)." 46 | bit_offset: 4 47 | bit_size: 2 48 | - name: SR 49 | description: "slew rate 0: Slow slew rate 1: Fast slew rate." 50 | bit_offset: 6 51 | bit_size: 1 52 | - name: OD 53 | description: "open drain 0: open drain disable 1: open drain enable." 54 | bit_offset: 8 55 | bit_size: 1 56 | - name: KE 57 | description: "keeper capability enable 0: keeper disable 1: keeper enable." 58 | bit_offset: 16 59 | bit_size: 1 60 | - name: PE 61 | description: "pull enable 0: pull disable 1: pull enable." 62 | bit_offset: 17 63 | bit_size: 1 64 | - name: PS 65 | description: "pull select 0: pull down 1: pull up." 66 | bit_offset: 18 67 | bit_size: 1 68 | - name: PRS 69 | description: "select pull up/down internal resistance strength: For pull down, only have 100 Kohm resistance For pull up: 00: 100 KOhm 01: 47 KOhm 10: 22 KOhm 11: 22 KOhm." 70 | bit_offset: 20 71 | bit_size: 2 72 | - name: HYS 73 | description: "schmitt trigger enable 0: disable 1: enable." 74 | bit_offset: 24 75 | bit_size: 1 76 | -------------------------------------------------------------------------------- /data/registers/ioc_v67.yaml: -------------------------------------------------------------------------------- 1 | block/IOC: 2 | description: IOC. 3 | items: 4 | - name: PAD 5 | description: no description available. 6 | array: 7 | len: 492 8 | stride: 8 9 | byte_offset: 0 10 | block: PAD 11 | block/PAD: 12 | description: no description available. 13 | items: 14 | - name: FUNC_CTL 15 | description: ALT SELECT. 16 | byte_offset: 0 17 | fieldset: FUNC_CTL 18 | - name: PAD_CTL 19 | description: PAD SETTINGS. 20 | byte_offset: 4 21 | fieldset: PAD_CTL 22 | fieldset/FUNC_CTL: 23 | description: ALT SELECT. 24 | fields: 25 | - name: ALT_SELECT 26 | description: "alt select 0: ALT0 1: ALT1 … 31:ALT31." 27 | bit_offset: 0 28 | bit_size: 5 29 | - name: ANALOG 30 | description: "select analog pin in pad 0: disable 1: enable." 31 | bit_offset: 8 32 | bit_size: 1 33 | - name: LOOP_BACK 34 | description: "force input on 0: disable 1: enable." 35 | bit_offset: 16 36 | bit_size: 1 37 | fieldset/PAD_CTL: 38 | description: PAD SETTINGS. 39 | fields: 40 | - name: DS 41 | description: "drive strength for high-speed IO 3.3V: 000: 85.61Ohm 001: 61.2 Ohm 010: 42.88Ohm 011: 35.76Ohm 111: 30.67Ohm for high-speed IO 1.8V: 000: 84.07Ohm 001: 60.14Ohm 010: 42.15Ohm 011: 35.19Ohm 111: 30.2 Ohm for general IO: 00: 4mA 01: 8mA 11: 12mA." 42 | bit_offset: 0 43 | bit_size: 3 44 | - name: PE 45 | description: "pull enable 0: pull disable 1: pull enable." 46 | bit_offset: 4 47 | bit_size: 1 48 | - name: PS 49 | description: "pull select 0: pull down 1: pull up." 50 | bit_offset: 11 51 | bit_size: 1 52 | - name: SMT 53 | description: "schmitt trigger enable, only available in high-speed IO 0: disable 1: enable." 54 | bit_offset: 12 55 | bit_size: 1 56 | - name: OD 57 | description: "open drain 0: open drain disable 1: open drain enable." 58 | bit_offset: 13 59 | bit_size: 1 60 | - name: MS 61 | description: "pin voltage select, only available in high-speed IO 0: 3.3V 1: 1.8V." 62 | bit_offset: 14 63 | bit_size: 1 64 | -------------------------------------------------------------------------------- /data/registers/mchtmr_common.yaml: -------------------------------------------------------------------------------- 1 | block/MCHTMR: 2 | description: MCHTMR. 3 | items: 4 | - name: MTIME 5 | description: Machine Time. 6 | byte_offset: 0 7 | bit_size: 64 8 | - name: MTIMECMP 9 | description: Machine Time Compare. 10 | byte_offset: 8 11 | bit_size: 64 12 | -------------------------------------------------------------------------------- /data/registers/mono_common.yaml: -------------------------------------------------------------------------------- 1 | block/MONO: 2 | description: MONO. 3 | items: 4 | - name: MONOL 5 | description: Low part of monotonic counter. 6 | byte_offset: 0 7 | fieldset: MONOL 8 | - name: MONOH 9 | description: High part of monotonic counter. 10 | byte_offset: 4 11 | fieldset: MONOH 12 | fieldset/MONOH: 13 | description: High part of monotonic counter. 14 | fields: 15 | - name: COUNTER 16 | description: high part of monotonica counter, write to this counter will cause counter increase by 1 if low part overflow. 17 | bit_offset: 0 18 | bit_size: 16 19 | - name: EPOCH 20 | description: Fuse value for high part of monotonica. 21 | bit_offset: 16 22 | bit_size: 16 23 | fieldset/MONOL: 24 | description: Low part of monotonic counter. 25 | fields: 26 | - name: COUNTER 27 | description: low part of monotonica counter, write to this counter will cause counter increase by 1. 28 | bit_offset: 0 29 | bit_size: 32 30 | -------------------------------------------------------------------------------- /data/registers/plb_v53.yaml: -------------------------------------------------------------------------------- 1 | block/PLB: 2 | description: PLB. 3 | items: 4 | - name: TYPE_A 5 | description: no description available. 6 | array: 7 | len: 4 8 | stride: 32 9 | byte_offset: 0 10 | block: TYPE_A 11 | - name: TYPE_B 12 | description: no description available. 13 | array: 14 | len: 4 15 | stride: 32 16 | byte_offset: 1024 17 | block: TYPE_B 18 | block/TYPE_A: 19 | description: no description available. 20 | items: 21 | - name: LOOKUP_TABLE 22 | description: no description available. 23 | array: 24 | len: 4 25 | stride: 4 26 | byte_offset: 0 27 | fieldset: LOOKUP_TABLE 28 | - name: sw_inject 29 | description: TYPE A CHN&index0 software inject. 30 | byte_offset: 16 31 | fieldset: TYPE_A_sw_inject 32 | block/TYPE_B: 33 | description: no description available. 34 | items: 35 | - name: LUT 36 | description: no description available. 37 | array: 38 | len: 2 39 | stride: 4 40 | byte_offset: 0 41 | fieldset: LUT 42 | - name: CMP 43 | description: no description available. 44 | array: 45 | len: 4 46 | stride: 4 47 | byte_offset: 8 48 | fieldset: CMP 49 | - name: mode 50 | description: TYPE B CHN&index0 mode ctrl. 51 | byte_offset: 24 52 | fieldset: mode 53 | - name: sw_inject 54 | description: TYPE B CHN&index0 software inject. 55 | byte_offset: 28 56 | fieldset: TYPE_B_sw_inject 57 | fieldset/CMP: 58 | description: no description available. 59 | fields: 60 | - name: CMP_VALUE 61 | description: cmp value, using as data unit operation. 62 | bit_offset: 0 63 | bit_size: 32 64 | fieldset/LOOKUP_TABLE: 65 | description: no description available. 66 | fields: 67 | - name: LOOKUP_TABLE 68 | description: using 4 bit trig_in as lookup index. software can program this register as trig_in's true table. 69 | bit_offset: 0 70 | bit_size: 16 71 | fieldset/LUT: 72 | description: no description available. 73 | fields: 74 | - name: LOOKUP_TABLE 75 | description: lut0 and lut1 union as 64bit, consider each 4bit as one slice. then, total 16 slice. slice0 as bit3:0, slice1 as bit7:4...etc. using 4bit trig in as index of slice. the operate sel in data unit of type B channle is decided by which slice value choosed by trig_in. 76 | bit_offset: 0 77 | bit_size: 32 78 | fieldset/TYPE_A_sw_inject: 79 | description: TYPE A CHN&index0 software inject. 80 | fields: 81 | - name: SW_INJECT 82 | description: software can inject value to TYPEA's output. 83 | bit_offset: 0 84 | bit_size: 4 85 | fieldset/TYPE_B_sw_inject: 86 | description: TYPE B CHN&index0 software inject. 87 | fields: 88 | - name: SOFTWARE_INJECT 89 | description: data unit value can be changed if program this register. 90 | bit_offset: 0 91 | bit_size: 32 92 | fieldset/mode: 93 | description: TYPE B CHN&index0 mode ctrl. 94 | fields: 95 | - name: OUT0_SEL 96 | description: trig out 0 output type in current channel. 97 | bit_offset: 0 98 | bit_size: 4 99 | - name: OUT1_SEL 100 | description: trig out 1 output type in current channel. 101 | bit_offset: 4 102 | bit_size: 4 103 | - name: OUT2_SEL 104 | description: trig out 2 output type in current channel. 105 | bit_offset: 8 106 | bit_size: 4 107 | - name: OUT3_SEL 108 | description: trig out 3 output type in current channel. 109 | bit_offset: 12 110 | bit_size: 4 111 | - name: OPT_SEL 112 | description: operation selection in data unit. 113 | bit_offset: 16 114 | bit_size: 1 115 | -------------------------------------------------------------------------------- /data/registers/plb_v6e.yaml: -------------------------------------------------------------------------------- 1 | block/PLB: 2 | description: PLB. 3 | items: 4 | - name: TYPE_A 5 | description: no description available. 6 | array: 7 | len: 8 8 | stride: 32 9 | byte_offset: 0 10 | block: TYPE_A 11 | - name: TYPE_B 12 | description: no description available. 13 | array: 14 | len: 8 15 | stride: 32 16 | byte_offset: 1024 17 | block: TYPE_B 18 | block/TYPE_A: 19 | description: no description available. 20 | items: 21 | - name: LOOKUP_TABLE 22 | description: no description available. 23 | array: 24 | len: 4 25 | stride: 4 26 | byte_offset: 0 27 | fieldset: LOOKUP_TABLE 28 | - name: sw_inject 29 | description: TYPE A CHN&index0 software inject. 30 | byte_offset: 16 31 | fieldset: TYPE_A_sw_inject 32 | block/TYPE_B: 33 | description: no description available. 34 | items: 35 | - name: LUT 36 | description: no description available. 37 | array: 38 | len: 2 39 | stride: 4 40 | byte_offset: 0 41 | fieldset: LUT 42 | - name: CMP 43 | description: no description available. 44 | array: 45 | len: 4 46 | stride: 4 47 | byte_offset: 8 48 | fieldset: CMP 49 | - name: mode 50 | description: TYPE B CHN&index0 mode ctrl. 51 | byte_offset: 24 52 | fieldset: mode 53 | - name: sw_inject 54 | description: TYPE B CHN&index0 software inject. 55 | byte_offset: 28 56 | fieldset: TYPE_B_sw_inject 57 | fieldset/CMP: 58 | description: no description available. 59 | fields: 60 | - name: CMP_VALUE 61 | description: cmp value, using as data unit operation. 62 | bit_offset: 0 63 | bit_size: 32 64 | fieldset/LOOKUP_TABLE: 65 | description: no description available. 66 | fields: 67 | - name: LOOKUP_TABLE 68 | description: using 4 bit trig_in as lookup index. software can program this register as trig_in's true table. 69 | bit_offset: 0 70 | bit_size: 16 71 | fieldset/LUT: 72 | description: no description available. 73 | fields: 74 | - name: LOOKUP_TABLE 75 | description: lut0 and lut1 union as 64bit, consider each 4bit as one slice. then, total 16 slice. slice0 as bit3:0, slice1 as bit7:4...etc. using 4bit trig in as index of slice. the operate sel in data unit of type B channle is decided by which slice value choosed by trig_in. 76 | bit_offset: 0 77 | bit_size: 32 78 | fieldset/TYPE_A_sw_inject: 79 | description: TYPE A CHN&index0 software inject. 80 | fields: 81 | - name: SW_INJECT 82 | description: software can inject value to TYPEA's output. 83 | bit_offset: 0 84 | bit_size: 4 85 | fieldset/TYPE_B_sw_inject: 86 | description: TYPE B CHN&index0 software inject. 87 | fields: 88 | - name: SOFTWARE_INJECT 89 | description: data unit value can be changed if program this register. 90 | bit_offset: 0 91 | bit_size: 32 92 | fieldset/mode: 93 | description: TYPE B CHN&index0 mode ctrl. 94 | fields: 95 | - name: OUT0_SEL 96 | description: trig out 0 output type in current channel. 97 | bit_offset: 0 98 | bit_size: 4 99 | - name: OUT1_SEL 100 | description: trig out 1 output type in current channel. 101 | bit_offset: 4 102 | bit_size: 4 103 | - name: OUT2_SEL 104 | description: trig out 2 output type in current channel. 105 | bit_offset: 8 106 | bit_size: 4 107 | - name: OUT3_SEL 108 | description: trig out 3 output type in current channel. 109 | bit_offset: 12 110 | bit_size: 4 111 | - name: OPT_SEL 112 | description: operation selection in data unit. 113 | bit_offset: 16 114 | bit_size: 1 115 | -------------------------------------------------------------------------------- /data/registers/plicsw_common.yaml: -------------------------------------------------------------------------------- 1 | block/PLICSW: 2 | description: PLICSW. 3 | items: 4 | - name: PENDING 5 | description: Pending status. 6 | byte_offset: 4096 7 | fieldset: PENDING 8 | - name: INTEN 9 | description: Interrupt enable. 10 | byte_offset: 8192 11 | fieldset: INTEN 12 | - name: CLAIM 13 | description: Claim and complete. 14 | byte_offset: 2097156 15 | fieldset: CLAIM 16 | fieldset/CLAIM: 17 | description: Claim and complete. 18 | fields: 19 | - name: INTERRUPT_ID 20 | description: On reads, indicating the interrupt source that has being claimed. On writes, indicating the interrupt source that has been handled (completed). 21 | bit_offset: 0 22 | bit_size: 1 23 | fieldset/INTEN: 24 | description: Interrupt enable. 25 | fields: 26 | - name: INTERRUPT 27 | description: enable software interrupt. 28 | bit_offset: 0 29 | bit_size: 1 30 | fieldset/PENDING: 31 | description: Pending status. 32 | fields: 33 | - name: INTERRUPT 34 | description: writing 1 to trigger software interrupt. 35 | bit_offset: 1 36 | bit_size: 1 37 | -------------------------------------------------------------------------------- /data/registers/pmon_common.yaml: -------------------------------------------------------------------------------- 1 | block/MONITOR: 2 | description: no description available. 3 | items: 4 | - name: CONTROL 5 | description: Glitch and clock monitor control. 6 | byte_offset: 0 7 | fieldset: CONTROL 8 | - name: STATUS 9 | description: Glitch and clock monitor status. 10 | byte_offset: 4 11 | fieldset: STATUS 12 | block/PMON: 13 | description: PMON. 14 | items: 15 | - name: MONITOR 16 | description: no description available. 17 | array: 18 | len: 4 19 | stride: 8 20 | byte_offset: 0 21 | block: MONITOR 22 | - name: IRQ_FLAG 23 | description: No description available. 24 | byte_offset: 64 25 | fieldset: IRQ_FLAG 26 | - name: IRQ_ENABLE 27 | description: No description available. 28 | byte_offset: 68 29 | fieldset: IRQ_ENABLE 30 | fieldset/CONTROL: 31 | description: Glitch and clock monitor control. 32 | fields: 33 | - name: ENABLE 34 | description: "enable glitch detector 0: detector disabled 1: detector enabled." 35 | bit_offset: 0 36 | bit_size: 1 37 | - name: ACTIVE 38 | description: "select glitch works in active mode or passve mode. 0: passive mode, depends on power glitch destroy DFF value 1: active mode, check glitch by DFF chain." 39 | bit_offset: 4 40 | bit_size: 1 41 | fieldset/IRQ_ENABLE: 42 | description: No description available. 43 | fields: 44 | - name: ENABLE 45 | description: "interrupt enable, each bit represents for one monitor 0: monitor interrupt disabled 1: monitor interrupt enabled." 46 | bit_offset: 0 47 | bit_size: 4 48 | fieldset/IRQ_FLAG: 49 | description: No description available. 50 | fields: 51 | - name: FLAG 52 | description: "interrupt flag, each bit represents for one monitor, write 1 to clear interrupt flag 0: no monitor interrupt 1: monitor interrupt happened." 53 | bit_offset: 0 54 | bit_size: 4 55 | fieldset/STATUS: 56 | description: Glitch and clock monitor status. 57 | fields: 58 | - name: FLAG 59 | description: "flag for glitch detected, write 1 to clear this flag 0: glitch not detected 1: glitch detected." 60 | bit_offset: 0 61 | bit_size: 1 62 | -------------------------------------------------------------------------------- /data/registers/ppor_v53.yaml: -------------------------------------------------------------------------------- 1 | block/PPOR: 2 | description: PPOR. 3 | items: 4 | - name: RESET_FLAG 5 | description: flag indicate reset source. 6 | byte_offset: 0 7 | fieldset: RESET_FLAG 8 | - name: RESET_STATUS 9 | description: reset source status. 10 | byte_offset: 4 11 | fieldset: RESET_STATUS 12 | - name: RESET_HOLD 13 | description: reset hold attribute. 14 | byte_offset: 8 15 | fieldset: RESET_HOLD 16 | - name: RESET_ENABLE 17 | description: reset source enable. 18 | byte_offset: 12 19 | fieldset: RESET_ENABLE 20 | - name: RESET_TYPE 21 | description: reset type triggered by reset. 22 | byte_offset: 16 23 | fieldset: RESET_TYPE 24 | - name: SOFTWARE_RESET 25 | description: Software reset counter. 26 | byte_offset: 28 27 | fieldset: SOFTWARE_RESET 28 | fieldset/RESET_ENABLE: 29 | description: reset source enable. 30 | fields: 31 | - name: ENABLE 32 | description: "enable of reset sources 0: brownout 1: temperature 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 33 | bit_offset: 0 34 | bit_size: 32 35 | fieldset/RESET_FLAG: 36 | description: flag indicate reset source. 37 | fields: 38 | - name: FLAG 39 | description: "reset reason of last hard reset, write 1 to clear each bit 0: brownout 1: temperature 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 40 | bit_offset: 0 41 | bit_size: 32 42 | fieldset/RESET_HOLD: 43 | description: reset hold attribute. 44 | fields: 45 | - name: HOLD 46 | description: "hold arrtibute, when set, SOC keep in reset status until reset source release, or, reset will be released after SOC enter reset status 0: brownout 1: temperature 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 47 | bit_offset: 0 48 | bit_size: 32 49 | fieldset/RESET_STATUS: 50 | description: reset source status. 51 | fields: 52 | - name: STATUS 53 | description: "current status of reset sources 0: brownout 1: temperature 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 54 | bit_offset: 0 55 | bit_size: 32 56 | fieldset/RESET_TYPE: 57 | description: reset type triggered by reset. 58 | fields: 59 | - name: TYPE 60 | description: "reset type of reset sources, 0 for cold reset, all system control setting cleared except debug/fuse/ioc; 1 for hot reset, keep system control setting and debug/fuse/ioc setting, only clear some subsystem 0: brownout 1: temperature 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 61 | bit_offset: 0 62 | bit_size: 32 63 | fieldset/SOFTWARE_RESET: 64 | description: Software reset counter. 65 | fields: 66 | - name: COUNTER 67 | description: counter decrease in 24MHz and stop at 0, trigger reset when value reach 2, software can write 0 to cancel reset. 68 | bit_offset: 0 69 | bit_size: 32 70 | -------------------------------------------------------------------------------- /data/registers/ppor_v68.yaml: -------------------------------------------------------------------------------- 1 | block/PPOR: 2 | description: PPOR. 3 | items: 4 | - name: RESET_FLAG 5 | description: flag indicate reset source. 6 | byte_offset: 0 7 | fieldset: RESET_FLAG 8 | - name: RESET_STATUS 9 | description: reset source status. 10 | byte_offset: 4 11 | fieldset: RESET_STATUS 12 | - name: RESET_HOLD 13 | description: reset hold attribute. 14 | byte_offset: 8 15 | fieldset: RESET_HOLD 16 | - name: RESET_ENABLE 17 | description: reset source enable. 18 | byte_offset: 12 19 | fieldset: RESET_ENABLE 20 | - name: SOFTWARE_RESET 21 | description: Software reset counter. 22 | byte_offset: 28 23 | fieldset: SOFTWARE_RESET 24 | fieldset/RESET_ENABLE: 25 | description: reset source enable. 26 | fields: 27 | - name: ENABLE 28 | description: "enable of reset sources 0: brownout 1: temperature(not available) 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 29 | bit_offset: 0 30 | bit_size: 32 31 | fieldset/RESET_FLAG: 32 | description: flag indicate reset source. 33 | fields: 34 | - name: FLAG 35 | description: "reset reason of last hard reset, write 1 to clear each bit 0: brownout 1: temperature(not available) 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 36 | bit_offset: 0 37 | bit_size: 32 38 | fieldset/RESET_HOLD: 39 | description: reset hold attribute. 40 | fields: 41 | - name: HOLD 42 | description: "hold arrtibute, when set, SOC keep in reset status until reset source release, or, reset will be released after SOC enter reset status 0: brownout 1: temperature(not available) 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 43 | bit_offset: 0 44 | bit_size: 32 45 | fieldset/RESET_STATUS: 46 | description: reset source status. 47 | fields: 48 | - name: STATUS 49 | description: "current status of reset sources 0: brownout 1: temperature(not available) 4: debug reset 5: jtag soft reset 8: cpu0 lockup(not available) 9: cpu1 lockup(not available) 10: cpu0 request(not available) 11: cpu1 request(not available) 16: watch dog 0 17: watch dog 1 18: watch dog 2(not available) 19: watch dog 3(not available) 24: pmic watch dog 30: jtag ieee reset 31: software." 50 | bit_offset: 0 51 | bit_size: 32 52 | fieldset/SOFTWARE_RESET: 53 | description: Software reset counter. 54 | fields: 55 | - name: COUNTER 56 | description: counter decrease in 24MHz and stop at 0, trigger reset when value reach 2, software can write 0 to cancel reset. 57 | bit_offset: 0 58 | bit_size: 32 59 | -------------------------------------------------------------------------------- /data/registers/rtc_common.yaml: -------------------------------------------------------------------------------- 1 | block/RTC: 2 | description: RTC. 3 | items: 4 | - name: SECOND 5 | description: Second counter. 6 | byte_offset: 0 7 | fieldset: SECOND 8 | - name: SUBSEC 9 | description: Sub-second counter. 10 | byte_offset: 4 11 | fieldset: SUBSEC 12 | - name: SEC_SNAP 13 | description: Second counter snap shot. 14 | byte_offset: 8 15 | fieldset: SEC_SNAP 16 | - name: SUB_SNAP 17 | description: Sub-second counter snap shot. 18 | byte_offset: 12 19 | fieldset: SUB_SNAP 20 | - name: ALARM0 21 | description: RTC alarm0. 22 | byte_offset: 16 23 | fieldset: ALARM0 24 | - name: ALARM0_INC 25 | description: Alarm0 incremental. 26 | byte_offset: 20 27 | fieldset: ALARM0_INC 28 | - name: ALARM1 29 | description: RTC alarm1. 30 | byte_offset: 24 31 | fieldset: ALARM1 32 | - name: ALARM1_INC 33 | description: Alarm1 incremental. 34 | byte_offset: 28 35 | fieldset: ALARM1_INC 36 | - name: ALARM_FLAG 37 | description: RTC alarm flag. 38 | byte_offset: 32 39 | fieldset: ALARM_FLAG 40 | - name: ALARM_EN 41 | description: RTC alarm enable. 42 | byte_offset: 36 43 | fieldset: ALARM_EN 44 | fieldset/ALARM0: 45 | description: RTC alarm0. 46 | fields: 47 | - name: ALARM 48 | description: Alarm time for second counter, on each alarm match, alarm increase ALARM0_INC. 49 | bit_offset: 0 50 | bit_size: 32 51 | fieldset/ALARM0_INC: 52 | description: Alarm0 incremental. 53 | fields: 54 | - name: INCREASE 55 | description: adder when ARLAM0 happen, helps to create periodical alarm. 56 | bit_offset: 0 57 | bit_size: 32 58 | fieldset/ALARM1: 59 | description: RTC alarm1. 60 | fields: 61 | - name: ALARM 62 | description: Alarm time for second counter, on each alarm match, alarm increase ALARM0_INC. 63 | bit_offset: 0 64 | bit_size: 32 65 | fieldset/ALARM1_INC: 66 | description: Alarm1 incremental. 67 | fields: 68 | - name: INCREASE 69 | description: adder when ARLAM0 happen, helps to create periodical alarm. 70 | bit_offset: 0 71 | bit_size: 32 72 | fieldset/ALARM_EN: 73 | description: RTC alarm enable. 74 | fields: 75 | - name: ENABLE0 76 | description: "alarm0 mask 0: alarm0 disabled 1: alarm0 enabled." 77 | bit_offset: 0 78 | bit_size: 1 79 | - name: ENABLE1 80 | description: "alarm1 mask 0: alarm1 disabled 1: alarm1 enabled." 81 | bit_offset: 1 82 | bit_size: 1 83 | fieldset/ALARM_FLAG: 84 | description: RTC alarm flag. 85 | fields: 86 | - name: ALARM0 87 | description: alarm0 happen. 88 | bit_offset: 0 89 | bit_size: 1 90 | - name: ALARM1 91 | description: alarm1 happen. 92 | bit_offset: 1 93 | bit_size: 1 94 | fieldset/SECOND: 95 | description: Second counter. 96 | fields: 97 | - name: SECOND 98 | description: second counter. 99 | bit_offset: 0 100 | bit_size: 32 101 | fieldset/SEC_SNAP: 102 | description: Second counter snap shot. 103 | fields: 104 | - name: SEC_SNAP 105 | description: second snap shot, write to take snap shot. 106 | bit_offset: 0 107 | bit_size: 32 108 | fieldset/SUBSEC: 109 | description: Sub-second counter. 110 | fields: 111 | - name: SUBSEC 112 | description: sub second counter. 113 | bit_offset: 0 114 | bit_size: 32 115 | fieldset/SUB_SNAP: 116 | description: Sub-second counter snap shot. 117 | fields: 118 | - name: SUB_SNAP 119 | description: sub second snap shot, write to take snap shot. 120 | bit_offset: 0 121 | bit_size: 32 122 | -------------------------------------------------------------------------------- /data/registers/synt_v53.yaml: -------------------------------------------------------------------------------- 1 | block/SYNT: 2 | description: SYNT. 3 | items: 4 | - name: gcr 5 | description: Global control register. 6 | byte_offset: 0 7 | fieldset: gcr 8 | - name: rld 9 | description: Counter reload register. 10 | byte_offset: 4 11 | fieldset: rld 12 | - name: timestamp_new 13 | description: timestamp new value register. 14 | byte_offset: 8 15 | fieldset: timestamp_new 16 | - name: cnt 17 | description: Counter. 18 | byte_offset: 12 19 | fieldset: cnt 20 | - name: timestamp_sav 21 | description: timestamp trig save value. 22 | byte_offset: 16 23 | fieldset: timestamp_sav 24 | - name: timestamp_cur 25 | description: timestamp read value. 26 | byte_offset: 20 27 | fieldset: timestamp_cur 28 | - name: CMP 29 | description: no description available. 30 | array: 31 | len: 4 32 | stride: 4 33 | byte_offset: 32 34 | fieldset: CMP 35 | fieldset/CMP: 36 | description: no description available. 37 | fields: 38 | - name: CMP 39 | description: comparator value, the output will assert when counter count to this value. 40 | bit_offset: 0 41 | bit_size: 32 42 | fieldset/cnt: 43 | description: Counter. 44 | fields: 45 | - name: CNT 46 | description: counter. 47 | bit_offset: 0 48 | bit_size: 32 49 | fieldset/gcr: 50 | description: Global control register. 51 | fields: 52 | - name: CEN 53 | description: 1- Enable counter. 54 | bit_offset: 0 55 | bit_size: 1 56 | - name: CRST 57 | description: 1- Reset counter. 58 | bit_offset: 1 59 | bit_size: 1 60 | - name: COUNTER_DEBUG_EN 61 | description: set to enable cpu_debug_mode to stop the counter. 62 | bit_offset: 2 63 | bit_size: 1 64 | - name: TIMESTAMP_ENABLE 65 | description: set to enable the timesamp , clr to stop. 66 | bit_offset: 4 67 | bit_size: 1 68 | - name: TIMESTAMP_DEBUG_EN 69 | description: set to enable cpu_debug_mode to stop the timesamp. 70 | bit_offset: 5 71 | bit_size: 1 72 | - name: TIMESTAMP_RESET 73 | description: reset timesamp to 0, auto clr. 74 | bit_offset: 28 75 | bit_size: 1 76 | - name: TIMESTAMP_SET_NEW 77 | description: set the timesamp to new value, auto clr. 78 | bit_offset: 29 79 | bit_size: 1 80 | - name: TIMESTAMP_DEC_NEW 81 | description: set to decrease the timesamp with new value, auto clr. 82 | bit_offset: 30 83 | bit_size: 1 84 | - name: TIMESTAMP_INC_NEW 85 | description: set to increase the timesamp with new value, auto clr. 86 | bit_offset: 31 87 | bit_size: 1 88 | fieldset/rld: 89 | description: Counter reload register. 90 | fields: 91 | - name: RLD 92 | description: counter reload value. 93 | bit_offset: 0 94 | bit_size: 32 95 | fieldset/timestamp_cur: 96 | description: timestamp read value. 97 | fields: 98 | - name: VALUE 99 | description: current timesamp value. 100 | bit_offset: 0 101 | bit_size: 32 102 | fieldset/timestamp_new: 103 | description: timestamp new value register. 104 | fields: 105 | - name: VALUE 106 | description: new value for timesamp , can be used as set/inc/dec. 107 | bit_offset: 0 108 | bit_size: 32 109 | fieldset/timestamp_sav: 110 | description: timestamp trig save value. 111 | fields: 112 | - name: VALUE 113 | description: use the trigger to save timesamp here. 114 | bit_offset: 0 115 | bit_size: 32 116 | -------------------------------------------------------------------------------- /data/registers/synt_v67.yaml: -------------------------------------------------------------------------------- 1 | block/SYNT: 2 | description: SYNT. 3 | items: 4 | - name: gcr 5 | description: Global control register. 6 | byte_offset: 0 7 | fieldset: gcr 8 | - name: rld 9 | description: Counter reload register. 10 | byte_offset: 4 11 | fieldset: rld 12 | - name: cnt 13 | description: Counter. 14 | byte_offset: 12 15 | fieldset: cnt 16 | - name: CMP 17 | description: no description available. 18 | array: 19 | len: 4 20 | stride: 4 21 | byte_offset: 32 22 | fieldset: CMP 23 | fieldset/CMP: 24 | description: no description available. 25 | fields: 26 | - name: CMP 27 | description: comparator value, the output will assert when counter count to this value. 28 | bit_offset: 0 29 | bit_size: 32 30 | fieldset/cnt: 31 | description: Counter. 32 | fields: 33 | - name: CNT 34 | description: counter. 35 | bit_offset: 0 36 | bit_size: 32 37 | fieldset/gcr: 38 | description: Global control register. 39 | fields: 40 | - name: CEN 41 | description: 1- Enable counter. 42 | bit_offset: 0 43 | bit_size: 1 44 | - name: CRST 45 | description: 1- Reset counter. 46 | bit_offset: 1 47 | bit_size: 1 48 | fieldset/rld: 49 | description: Counter reload register. 50 | fields: 51 | - name: RLD 52 | description: counter reload value. 53 | bit_offset: 0 54 | bit_size: 32 55 | -------------------------------------------------------------------------------- /data/registers/tamp_v62.yaml: -------------------------------------------------------------------------------- 1 | block/TAMP: 2 | description: TAMP. 3 | items: 4 | - name: TAMP 5 | description: no description available. 6 | array: 7 | len: 4 8 | stride: 16 9 | byte_offset: 0 10 | block: TAMP_TAMP 11 | - name: TAMP_FLAG 12 | description: Tamper flag. 13 | byte_offset: 128 14 | fieldset: TAMP_FLAG 15 | - name: IRQ_EN 16 | description: Tamper interrupt enable. 17 | byte_offset: 132 18 | fieldset: IRQ_EN 19 | block/TAMP_TAMP: 20 | description: no description available. 21 | items: 22 | - name: CONTROL 23 | description: Tamper n control. 24 | byte_offset: 0 25 | fieldset: CONTROL 26 | - name: POLY 27 | description: Tamper n Polynomial of LFSR. 28 | byte_offset: 4 29 | fieldset: POLY 30 | - name: LFSR 31 | description: Tamper n LFSR shift register. 32 | byte_offset: 8 33 | fieldset: LFSR 34 | fieldset/CONTROL: 35 | description: Tamper n control. 36 | fields: 37 | - name: ENABLE 38 | description: "enable tamper 0: tamper disableed 1: tamper enabled." 39 | bit_offset: 0 40 | bit_size: 1 41 | - name: ACTIVE 42 | description: "select active or passive tamper 0: passive tamper 1: active tamper." 43 | bit_offset: 1 44 | bit_size: 1 45 | - name: RECOVER 46 | description: "tamper will recover itself if tamper LFSR goes wrong 0: tamper will not recover 1: tamper will recover." 47 | bit_offset: 2 48 | bit_size: 1 49 | - name: SPEED 50 | description: "tamper speed selection, (2^SPEED) changes per second 0: 1 shift per second 1: 2 shifts per second . . . 15: 32768 shifts per second." 51 | bit_offset: 4 52 | bit_size: 4 53 | - name: VALUE 54 | description: pin value for passive tamper. 55 | bit_offset: 8 56 | bit_size: 2 57 | - name: FILTER 58 | description: "filter length 0: 1 cycle 1: 2 cycle 15: 65526 cycle." 59 | bit_offset: 16 60 | bit_size: 4 61 | - name: BYPASS 62 | description: "bypass tamper violation filter 0: filter applied 1: filter not used." 63 | bit_offset: 20 64 | bit_size: 1 65 | - name: LOCK 66 | description: "lock tamper setting 0: tamper setting can be changed 1: tamper setting will last to next battery domain power cycle." 67 | bit_offset: 31 68 | bit_size: 1 69 | fieldset/IRQ_EN: 70 | description: Tamper interrupt enable. 71 | fields: 72 | - name: IRQ_EN 73 | description: "interrupt enable, each bit represents one tamper pin 0: interrupt disabled 1: interrupt enabled." 74 | bit_offset: 0 75 | bit_size: 12 76 | - name: LOCK 77 | description: "lock bit for IRQ enable 0: enable bits can be changed 1: enable bits hold until next battery domain power cycle." 78 | bit_offset: 31 79 | bit_size: 1 80 | fieldset/LFSR: 81 | description: Tamper n LFSR shift register. 82 | fields: 83 | - name: LFSR 84 | description: LFSR for active tamper, write only register, always read 0. 85 | bit_offset: 0 86 | bit_size: 32 87 | fieldset/POLY: 88 | description: Tamper n Polynomial of LFSR. 89 | fields: 90 | - name: POLY 91 | description: tamper LFSR polyminal, this is a write once register, once write content is locked, and readout value is "1". 92 | bit_offset: 0 93 | bit_size: 32 94 | fieldset/TAMP_FLAG: 95 | description: Tamper flag. 96 | fields: 97 | - name: FLAG 98 | description: tamper flag, each bit represents one tamper pin, write 1 to clear the flag Note, clear can only be cleared when tamper disappeared. 99 | bit_offset: 0 100 | bit_size: 12 101 | -------------------------------------------------------------------------------- /data/registers/tamp_v67.yaml: -------------------------------------------------------------------------------- 1 | block/TAMP: 2 | description: TAMP. 3 | items: 4 | - name: TAMP 5 | description: no description available. 6 | array: 7 | len: 6 8 | stride: 16 9 | byte_offset: 0 10 | block: TAMP_TAMP 11 | - name: TAMP_FLAG 12 | description: Tamper flag. 13 | byte_offset: 128 14 | fieldset: TAMP_FLAG 15 | - name: IRQ_EN 16 | description: Tamper interrupt enable. 17 | byte_offset: 132 18 | fieldset: IRQ_EN 19 | block/TAMP_TAMP: 20 | description: no description available. 21 | items: 22 | - name: CONTROL 23 | description: Tamper n control. 24 | byte_offset: 0 25 | fieldset: CONTROL 26 | - name: POLY 27 | description: Tamper n Polynomial of LFSR. 28 | byte_offset: 4 29 | fieldset: POLY 30 | - name: LFSR 31 | description: Tamper n LFSR shift register. 32 | byte_offset: 8 33 | fieldset: LFSR 34 | fieldset/CONTROL: 35 | description: Tamper n control. 36 | fields: 37 | - name: ENABLE 38 | description: "enable tamper 0: tamper disableed 1: tamper enabled." 39 | bit_offset: 0 40 | bit_size: 1 41 | - name: ACTIVE 42 | description: "select active or passive tamper 0: passive tamper 1: active tamper." 43 | bit_offset: 1 44 | bit_size: 1 45 | - name: RECOVER 46 | description: "tamper will recover itself if tamper LFSR goes wrong 0: tamper will not recover 1: tamper will recover." 47 | bit_offset: 2 48 | bit_size: 1 49 | - name: SPEED 50 | description: "tamper speed selection, (2^SPEED) changes per second 0: 1 shift per second 1: 2 shifts per second . . . 15: 32768 shifts per second." 51 | bit_offset: 4 52 | bit_size: 4 53 | - name: VALUE 54 | description: pin value for passive tamper. 55 | bit_offset: 8 56 | bit_size: 2 57 | - name: FILTER 58 | description: "filter length 0: 1 cycle 1: 2 cycle 15: 65526 cycle." 59 | bit_offset: 16 60 | bit_size: 4 61 | - name: BYPASS 62 | description: "bypass tamper violation filter 0: filter applied 1: filter not used." 63 | bit_offset: 20 64 | bit_size: 1 65 | - name: LOCK 66 | description: "lock tamper setting 0: tamper setting can be changed 1: tamper setting will last to next battery domain power cycle." 67 | bit_offset: 31 68 | bit_size: 1 69 | fieldset/IRQ_EN: 70 | description: Tamper interrupt enable. 71 | fields: 72 | - name: IRQ_EN 73 | description: "interrupt enable, each bit represents one tamper pin 0: interrupt disabled 1: interrupt enabled." 74 | bit_offset: 0 75 | bit_size: 12 76 | - name: LOCK 77 | description: "lock bit for IRQ enable 0: enable bits can be changed 1: enable bits hold until next battery domain power cycle." 78 | bit_offset: 31 79 | bit_size: 1 80 | fieldset/LFSR: 81 | description: Tamper n LFSR shift register. 82 | fields: 83 | - name: LFSR 84 | description: LFSR for active tamper, write only register, always read 0. 85 | bit_offset: 0 86 | bit_size: 32 87 | fieldset/POLY: 88 | description: Tamper n Polynomial of LFSR. 89 | fields: 90 | - name: POLY 91 | description: tamper LFSR polyminal, this is a write once register, once write content is locked, and readout value is "1". 92 | bit_offset: 0 93 | bit_size: 32 94 | fieldset/TAMP_FLAG: 95 | description: Tamper flag. 96 | fields: 97 | - name: FLAG 98 | description: tamper flag, each bit represents one tamper pin, write 1 to clear the flag Note, clear can only be cleared when tamper disappeared. 99 | bit_offset: 0 100 | bit_size: 12 101 | -------------------------------------------------------------------------------- /data/registers/trgm_v62.yaml: -------------------------------------------------------------------------------- 1 | block/TRGM: 2 | description: TRGM0. 3 | items: 4 | - name: FILTCFG 5 | description: no description available. 6 | array: 7 | len: 20 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: FILTCFG 11 | - name: TRGOCFG 12 | description: no description available. 13 | array: 14 | len: 68 15 | stride: 4 16 | byte_offset: 256 17 | fieldset: TRGOCFG 18 | - name: DMACFG 19 | description: no description available. 20 | array: 21 | len: 4 22 | stride: 4 23 | byte_offset: 768 24 | fieldset: DMACFG 25 | - name: GCR 26 | description: General Control Register. 27 | byte_offset: 1024 28 | fieldset: GCR 29 | fieldset/DMACFG: 30 | description: no description available. 31 | fields: 32 | - name: DMASRCSEL 33 | description: This field selects one of the DMA requests as the DMA request output. 34 | bit_offset: 0 35 | bit_size: 5 36 | fieldset/FILTCFG: 37 | description: no description available. 38 | fields: 39 | - name: FILTLEN 40 | description: This bitfields defines the filter counter length. 41 | bit_offset: 0 42 | bit_size: 12 43 | - name: SYNCEN 44 | description: set to enable sychronization input signal with TRGM clock. 45 | bit_offset: 12 46 | bit_size: 1 47 | - name: MODE 48 | description: This bitfields defines the filter mode 000-bypass; 100-rapid change mode; 101-delay filter mode; 110-stalbe low mode; 111-stable high mode. 49 | bit_offset: 13 50 | bit_size: 3 51 | enum: FILTER_MODE 52 | - name: OUTINV 53 | description: 1- Filter will invert the output 0- Filter will not invert the output. 54 | bit_offset: 16 55 | bit_size: 1 56 | fieldset/GCR: 57 | description: General Control Register. 58 | fields: 59 | - name: TRGOPEN 60 | description: The bitfield enable the TRGM outputs. 61 | bit_offset: 0 62 | bit_size: 12 63 | fieldset/TRGOCFG: 64 | description: no description available. 65 | fields: 66 | - name: TRIGOSEL 67 | description: This bitfield selects one of the TRGM inputs as output. 68 | bit_offset: 0 69 | bit_size: 7 70 | - name: REDG2PEN 71 | description: 1- The selected input signal rising edge will be convert to an pulse on output. 72 | bit_offset: 7 73 | bit_size: 1 74 | - name: FEDG2PEN 75 | description: 1- The selected input signal falling edge will be convert to an pulse on output. 76 | bit_offset: 8 77 | bit_size: 1 78 | - name: OUTINV 79 | description: 1- Invert the output. 80 | bit_offset: 9 81 | bit_size: 1 82 | enum/FILTER_MODE: 83 | description: "Filter mode." 84 | bit_size: 3 85 | variants: 86 | - name: BYPASS 87 | description: Bypass 88 | value: 0 89 | - name: RAPID_CHANGE 90 | description: Rapid change mode 91 | value: 4 92 | - name: DELAY 93 | description: Delay filter mode 94 | value: 5 95 | - name: STABLE_LOW 96 | description: Stable low mode 97 | value: 6 98 | - name: STABLE_HIGH 99 | description: Stable high mode 100 | value: 7 101 | -------------------------------------------------------------------------------- /data/registers/trgm_v67.yaml: -------------------------------------------------------------------------------- 1 | block/TRGM: 2 | description: TRGM0. 3 | items: 4 | - name: FILTCFG 5 | description: no description available. 6 | array: 7 | len: 20 8 | stride: 4 9 | byte_offset: 0 10 | fieldset: FILTCFG 11 | - name: TRGOCFG 12 | description: no description available. 13 | array: 14 | len: 64 15 | stride: 4 16 | byte_offset: 256 17 | fieldset: TRGOCFG 18 | - name: DMACFG 19 | description: no description available. 20 | array: 21 | len: 4 22 | stride: 4 23 | byte_offset: 512 24 | fieldset: DMACFG 25 | - name: GCR 26 | description: General Control Register. 27 | byte_offset: 1024 28 | fieldset: GCR 29 | fieldset/DMACFG: 30 | description: no description available. 31 | fields: 32 | - name: DMASRCSEL 33 | description: This field selects one of the DMA requests as the DMA request output. 34 | bit_offset: 0 35 | bit_size: 5 36 | fieldset/FILTCFG: 37 | description: no description available. 38 | fields: 39 | - name: FILTLEN 40 | description: This bitfields defines the filter counter length. 41 | bit_offset: 0 42 | bit_size: 12 43 | - name: SYNCEN 44 | description: set to enable sychronization input signal with TRGM clock. 45 | bit_offset: 12 46 | bit_size: 1 47 | - name: MODE 48 | description: This bitfields defines the filter mode 000-bypass; 100-rapid change mode; 101-delay filter mode; 110-stalbe low mode; 111-stable high mode. 49 | bit_offset: 13 50 | bit_size: 3 51 | enum: FILTER_MODE 52 | - name: OUTINV 53 | description: 1- Filter will invert the output 0- Filter will not invert the output. 54 | bit_offset: 16 55 | bit_size: 1 56 | fieldset/GCR: 57 | description: General Control Register. 58 | fields: 59 | - name: TRGOPEN 60 | description: The bitfield enable the TRGM outputs. 61 | bit_offset: 0 62 | bit_size: 12 63 | fieldset/TRGOCFG: 64 | description: no description available. 65 | fields: 66 | - name: TRIGOSEL 67 | description: This bitfield selects one of the TRGM inputs as output. 68 | bit_offset: 0 69 | bit_size: 6 70 | - name: REDG2PEN 71 | description: 1- The selected input signal rising edge will be convert to an pulse on output. 72 | bit_offset: 6 73 | bit_size: 1 74 | - name: FEDG2PEN 75 | description: 1- The selected input signal falling edge will be convert to an pulse on output. 76 | bit_offset: 7 77 | bit_size: 1 78 | - name: OUTINV 79 | description: 1- Invert the output. 80 | bit_offset: 8 81 | bit_size: 1 82 | enum/FILTER_MODE: 83 | description: "Filter mode." 84 | bit_size: 3 85 | variants: 86 | - name: BYPASS 87 | description: Bypass 88 | value: 0 89 | - name: RAPID_CHANGE 90 | description: Rapid change mode 91 | value: 4 92 | - name: DELAY 93 | description: Delay filter mode 94 | value: 5 95 | - name: STABLE_LOW 96 | description: Stable low mode 97 | value: 6 98 | - name: STABLE_HIGH 99 | description: Stable high mode 100 | value: 7 101 | -------------------------------------------------------------------------------- /data/registers/wdg_v67.yaml: -------------------------------------------------------------------------------- 1 | block/WDG: 2 | description: WDG0. 3 | items: 4 | - name: CTRL 5 | description: Control Register. 6 | byte_offset: 16 7 | fieldset: CTRL 8 | - name: Restart 9 | description: Restart Register. 10 | byte_offset: 20 11 | fieldset: Restart 12 | - name: WrEn 13 | description: Write Protection Register. 14 | byte_offset: 24 15 | fieldset: WrEn 16 | - name: St 17 | description: Status Register. 18 | byte_offset: 28 19 | fieldset: St 20 | fieldset/CTRL: 21 | description: Control Register. 22 | fields: 23 | - name: EN 24 | description: "Enable or disable the watchdog timer 0: Disable 1: Enable." 25 | bit_offset: 0 26 | bit_size: 1 27 | - name: CLKSEL 28 | description: "Clock source of timer: 0: EXTCLK 1: PCLK." 29 | bit_offset: 1 30 | bit_size: 1 31 | - name: INTEN 32 | description: "Enable or disable the watchdog interrupt 0: Disable 1: Enable." 33 | bit_offset: 2 34 | bit_size: 1 35 | - name: RSTEN 36 | description: "Enable or disable the watchdog reset 0: Disable 1: Enable." 37 | bit_offset: 3 38 | bit_size: 1 39 | - name: INTTIME 40 | description: "The timer interval of the interrupt stage: 0: Clock period x 2^6 1: Clock period x 2^8 2: Clock period x 2^10 3: Clock period x 2^11 4: Clock period x 2^12 5: Clock period x 2^13 6: Clock period x 2^14 7: Clock period x 2^15 8: Clock period x 2^17 9: Clock period x 2^19 10: Clock period x 2^21 11: Clock period x 2^23 12: Clock period x 2^25 13: Clock period x 2^27 14: Clock period x 2^29 15: Clock period x 2^31." 41 | bit_offset: 4 42 | bit_size: 4 43 | - name: RSTTIME 44 | description: "The time interval of the reset stage: 0: Clock period x 2^7 1: Clock period x 2^8 2: Clock period x 2^9 3: Clock period x 2^10 4: Clock period x 2^11 5: Clock period x 2^12 6: Clock period x 2^13 7: Clock period x 2^14." 45 | bit_offset: 8 46 | bit_size: 3 47 | fieldset/Restart: 48 | description: Restart Register. 49 | fields: 50 | - name: RESTART 51 | description: Write the magic number ATCWDT200_RESTART_NUM to restart the watchdog timer. 52 | bit_offset: 0 53 | bit_size: 16 54 | fieldset/St: 55 | description: Status Register. 56 | fields: 57 | - name: INTEXPIRED 58 | description: "The status of the watchdog interrupt timer 0: timer is not expired yet 1: timer is expired." 59 | bit_offset: 0 60 | bit_size: 1 61 | fieldset/WrEn: 62 | description: Write Protection Register. 63 | fields: 64 | - name: WEN 65 | description: Write the magic code to disable the write protection of the Control Register and the Restart Register. 66 | bit_offset: 0 67 | bit_size: 16 68 | -------------------------------------------------------------------------------- /data/registers/xpi_dummy.yaml: -------------------------------------------------------------------------------- 1 | block/XPI: 2 | description: Placeholder for XPI device. 3 | items: 4 | -------------------------------------------------------------------------------- /hpm-data-gen/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "hpm-data-gen" 3 | version = "0.1.0" 4 | edition = "2021" 5 | 6 | # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html 7 | 8 | [features] 9 | default = ["rayon"] 10 | rayon = ["dep:rayon"] 11 | 12 | [dependencies] 13 | anyhow = "1.0.79" 14 | glob = "0.3.1" 15 | num = "0.4.0" 16 | quick-xml = { version = "0.31.0", features = ["serialize"] } 17 | regex = "1.7.1" 18 | serde = { version = "1.0.157", features = ["derive"] } 19 | serde_yaml = "0.9.19" 20 | chiptool = { git = "https://github.com/ch32-rs/chiptool", rev = "1c198ae678ebd426751513f0deab6fbd6f8b8211" } 21 | serde_json = "1.0.94" 22 | rayon = { version = "1.7.0", optional = true } 23 | hpm-data-serde = { version = "0.1.0", path = "../hpm-data-serde" } 24 | 25 | ref_thread_local = "0.1.1" 26 | log = "0.4.17" 27 | pretty_env_logger = "0.5.0" 28 | -------------------------------------------------------------------------------- /hpm-data-gen/src/dma.rs: -------------------------------------------------------------------------------- 1 | use std::{collections::HashMap, path::Path}; 2 | 3 | fn parse_signal(signal_name: &str, periph_name: &str) -> String { 4 | if signal_name.contains("_") { 5 | let suffix = signal_name.split("_").last().unwrap(); 6 | 7 | if signal_name.starts_with("GPTMR") || signal_name.starts_with("NTMR") { 8 | format!("CH{}", suffix) 9 | } else { 10 | suffix.to_string() 11 | } 12 | } else if signal_name.starts_with("I2C") { 13 | "GLOBAL".to_string() 14 | } else { 15 | periph_name.to_string() 16 | } 17 | } 18 | 19 | pub fn handle_chip_dmamux_include>( 20 | path: P, 21 | chip: &mut hpm_data_serde::Chip, 22 | ) -> anyhow::Result<()> { 23 | let meta_yaml_path = path.as_ref(); 24 | 25 | for core in &mut chip.cores { 26 | if let Some(include_path) = core.include_dmamux.take() { 27 | let dma_yaml_path = meta_yaml_path.parent().unwrap().join(&include_path); 28 | let content = std::fs::read_to_string(&dma_yaml_path)?; 29 | let dmamux: HashMap = serde_yaml::from_str(&content)?; 30 | // println!("dma_channels: {:#?}", dmamux); 31 | 32 | for (signal_name, request_no) in dmamux { 33 | for periph in core.peripherals.iter_mut() { 34 | let signal_periph_prefix = 35 | signal_name.split('_').next().expect("empty signal_name"); 36 | if periph.name == signal_periph_prefix { 37 | // println!("matches signal_name: {:#?}", signal_name); 38 | 39 | let signal = parse_signal(&signal_name, &periph.name); 40 | 41 | periph.dma_channels.push( 42 | hpm_data_serde::chip::core::peripheral::DmaChannel { 43 | signal: signal.clone(), 44 | dmamux: Some("DMAMUX".to_string()), 45 | request: request_no as u8, 46 | }, 47 | ); 48 | } 49 | } 50 | } 51 | } 52 | } 53 | 54 | Ok(()) 55 | } 56 | -------------------------------------------------------------------------------- /hpm-data-gen/src/interrupts.rs: -------------------------------------------------------------------------------- 1 | fn parse_interrupt_signal(irq_name: &str) -> String { 2 | if irq_name.contains("_") { 3 | let suffix = irq_name.split("_").last().unwrap(); 4 | 5 | if irq_name.starts_with("GPIO") { 6 | format!("P{}", suffix) 7 | } else if irq_name.starts_with("ACMP") { 8 | format!("CH{}", suffix) 9 | } else { 10 | suffix.to_string() 11 | } 12 | } else { 13 | "GLOBAL".to_string() 14 | } 15 | } 16 | 17 | pub fn fill_peripheral_interrupts(chip: &mut hpm_data_serde::Chip) -> anyhow::Result<()> { 18 | for core in chip.cores.iter_mut() { 19 | let interrupts = core.interrupts.clone(); 20 | 21 | for interrupt in &interrupts { 22 | for periph in core.peripherals.iter_mut() { 23 | if !interrupt.name.starts_with(&periph.name) { 24 | continue; 25 | } 26 | // special handling for UART10+ 27 | if periph.name.starts_with("UART") && periph.name != interrupt.name { 28 | continue; 29 | } 30 | // println!("matches interrupt: {:#?}", interrupt); 31 | 32 | let signal = parse_interrupt_signal(&interrupt.name); 33 | 34 | let mut periph_ints = periph.interrupts.take().unwrap_or_default(); 35 | 36 | periph_ints.push(hpm_data_serde::chip::core::peripheral::Interrupt { 37 | signal: signal.clone(), 38 | interrupt: interrupt.name.clone(), 39 | }); 40 | 41 | periph.interrupts = Some(periph_ints); 42 | } 43 | } 44 | } 45 | 46 | Ok(()) 47 | } 48 | -------------------------------------------------------------------------------- /hpm-data-gen/src/iomux.rs: -------------------------------------------------------------------------------- 1 | //! parse iomux definitions from sdk_code 2 | 3 | use std::path::{Path, PathBuf}; 4 | 5 | pub fn add_iomux_from_sdk>( 6 | data_dir: P, 7 | chip: &mut hpm_data_serde::Chip, 8 | ) -> anyhow::Result<()> { 9 | let sdk_path = std::env::var("HPM_SDK_BASE") 10 | .map(PathBuf::from) 11 | .unwrap_or_else(|_| data_dir.as_ref().parent().unwrap().join("hpm_sdk")); 12 | 13 | let chip_name = &chip.name; 14 | 15 | let mut all_iomux: Vec = vec![]; 16 | 17 | let chip_inc_path = match chip_name { 18 | n if n.starts_with("HPM5301") => sdk_path.join("soc/HPM5300/HPM5301/"), 19 | n if n.starts_with("HPM53") => sdk_path.join("soc/HPM5300/HPM5361/"), 20 | n if n.starts_with("HPM62") => sdk_path.join("soc/HPM6200/HPM6280/"), 21 | n if n.starts_with("HPM63") => sdk_path.join("soc/HPM6300/HPM6360/"), 22 | n if n.starts_with("HPM67") || n.starts_with("HPM64") => { 23 | sdk_path.join("soc/HPM6700/HPM6750/") 24 | } 25 | n if n.starts_with("HPM68") => sdk_path.join("soc/HPM6800/HPM6880/"), 26 | n if n.starts_with("HPM6E") => sdk_path.join("soc/HPM6E00/HPM6E80/"), 27 | _ => anyhow::bail!("Unknown chip: {}", chip_name), 28 | }; 29 | 30 | let iomux_path = chip_inc_path.join("hpm_iomux.h"); 31 | 32 | let content = std::fs::read_to_string(&iomux_path) 33 | .expect(format!("Failed to read file: {:?}", &iomux_path).as_str()); 34 | 35 | // #define IOC_PA16_FUNC_CTL_MCAN4_TXD IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7) 36 | let iomux_pattern = regex::Regex::new( 37 | r"#define\s+(IOC_(\w+)_FUNC_CTL_(\w+))\s+IOC_PAD_FUNC_CTL_ALT_SELECT_SET\((\d+)\)", 38 | ) 39 | .expect("Invalid regex"); 40 | 41 | for mux in iomux_pattern.captures_iter(&content).map(|cap| { 42 | ( 43 | cap.get(1).unwrap().as_str().to_string(), 44 | cap.get(4).unwrap().as_str().parse().unwrap(), 45 | ) 46 | }) { 47 | all_iomux.push(hpm_data_serde::chip::core::IoMux { 48 | name: mux.0, 49 | value: mux.1, 50 | }); 51 | } 52 | 53 | // PMIC domain 54 | 55 | let pmic_iomux = chip_inc_path.join("hpm_pmic_iomux.h"); 56 | 57 | let content = std::fs::read_to_string(&pmic_iomux) 58 | .expect(format!("Failed to read file: {:?}", &pmic_iomux).as_str()); 59 | 60 | // #define PIOC_PY01_FUNC_CTL_PGPIO_Y_01 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) 61 | let pmic_iomux_pattern = regex::Regex::new( 62 | r"#define\s+(PIOC_(\w+)_FUNC_CTL_(\w+))\s+IOC_PAD_FUNC_CTL_ALT_SELECT_SET\((\d+)\)", 63 | ) 64 | .expect("Invalid regex"); 65 | 66 | for mux in pmic_iomux_pattern.captures_iter(&content).map(|cap| { 67 | ( 68 | cap.get(1).unwrap().as_str().to_string(), 69 | cap.get(4).unwrap().as_str().parse().unwrap(), 70 | ) 71 | }) { 72 | all_iomux.push(hpm_data_serde::chip::core::IoMux { 73 | name: mux.0, 74 | value: mux.1, 75 | }); 76 | } 77 | 78 | // BATT domain 79 | 80 | let batt_iomux = chip_inc_path.join("hpm_batt_iomux.h"); 81 | 82 | if batt_iomux.exists() { 83 | let content = std::fs::read_to_string(&batt_iomux) 84 | .expect(format!("Failed to read file: {:?}", &batt_iomux).as_str()); 85 | 86 | // #define BIOC_PZ00_FUNC_CTL_BGPIO_Z_00 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0) 87 | let batt_iomux_pattern = regex::Regex::new( 88 | r"#define\s+(BIOC_(\w+)_FUNC_CTL_(\w+))\s+IOC_PAD_FUNC_CTL_ALT_SELECT_SET\((\d+)\)", 89 | ) 90 | .expect("Invalid regex"); 91 | 92 | for mux in batt_iomux_pattern 93 | .captures_iter(&content) 94 | .map(|cap| { 95 | ( 96 | cap.get(1).unwrap().as_str().to_string(), 97 | cap.get(4).unwrap().as_str().parse().unwrap(), 98 | ) 99 | }) 100 | .filter(|(name, _)| !name.contains("_GPIO")) 101 | { 102 | // filter out old style GPIO 103 | 104 | all_iomux.push(hpm_data_serde::chip::core::IoMux { 105 | name: mux.0, 106 | value: mux.1, 107 | }); 108 | } 109 | } 110 | 111 | all_iomux.sort_by_key(|p| p.name.to_string()); 112 | 113 | all_iomux.dedup(); 114 | 115 | println!(" {} load iomux {:#?}", chip_name, all_iomux.len()); 116 | 117 | chip.cores[0].iomuxes = all_iomux; 118 | 119 | Ok(()) 120 | } 121 | -------------------------------------------------------------------------------- /hpm-data-gen/src/pins.rs: -------------------------------------------------------------------------------- 1 | //! parse sysctl registers from sdk_code 2 | 3 | use std::{ 4 | collections::HashMap, 5 | path::{Path, PathBuf}, 6 | }; 7 | 8 | pub fn add_ioc_pins_from_sdk>( 9 | data_dir: P, 10 | chip: &mut hpm_data_serde::Chip, 11 | ) -> anyhow::Result<()> { 12 | let sdk_path = std::env::var("HPM_SDK_BASE") 13 | .map(PathBuf::from) 14 | .unwrap_or_else(|_| data_dir.as_ref().parent().unwrap().join("hpm_sdk")); 15 | 16 | let chip_name = &chip.name; 17 | 18 | let header_file = match chip_name { 19 | n if n.starts_with("HPM53") => sdk_path.join("soc/HPM5300/ip/hpm_ioc_regs.h"), 20 | n if n.starts_with("HPM62") => sdk_path.join("soc/HPM6200/ip/hpm_ioc_regs.h"), 21 | n if n.starts_with("HPM63") => sdk_path.join("soc/HPM6300/ip/hpm_ioc_regs.h"), 22 | n if n.starts_with("HPM67") || n.starts_with("HPM64") => { 23 | sdk_path.join("soc/HPM6700/ip/hpm_ioc_regs.h") 24 | } 25 | n if n.starts_with("HPM68") => sdk_path.join("soc/HPM6800/ip/hpm_ioc_regs.h"), 26 | n if n.starts_with("HPM6E") => sdk_path.join("soc/HPM6E00/ip/hpm_ioc_regs.h"), 27 | _ => anyhow::bail!("Unknown chip: {}", chip_name), 28 | }; 29 | 30 | let content = std::fs::read_to_string(&header_file) 31 | .expect(format!("Failed to read file: {:?}", &header_file).as_str()); 32 | 33 | // #define IOC_PAD_PA00 (0UL) 34 | let ioc_pin_pattern = 35 | regex::Regex::new(r"#define\s+IOC_PAD_(\w+)\s+\((\d+)UL\)").expect("Invalid regex"); 36 | let pins: HashMap = ioc_pin_pattern 37 | .captures_iter(&content) 38 | .map(|cap| { 39 | ( 40 | cap.get(1).unwrap().as_str().to_string(), 41 | cap.get(2).unwrap().as_str().parse().unwrap(), 42 | ) 43 | }) 44 | .collect(); 45 | 46 | let mut pins: Vec<_> = pins 47 | .iter() 48 | .map(|(name, idx)| hpm_data_serde::chip::core::IoPin { 49 | name: name.clone(), 50 | index: *idx as _, 51 | }) 52 | .collect(); 53 | 54 | // fix wrong pins 55 | if chip_name.starts_with("HPM53") { 56 | pins = pins 57 | .into_iter() 58 | .filter(|p| !p.name.starts_with("PX")) 59 | .collect(); 60 | } 61 | 62 | pins.sort_by_key(|p| p.index); 63 | 64 | for core in &mut chip.cores { 65 | core.pins = pins.clone(); 66 | } 67 | 68 | Ok(()) 69 | } 70 | -------------------------------------------------------------------------------- /hpm-data-gen/src/registers.rs: -------------------------------------------------------------------------------- 1 | use std::collections::HashMap; 2 | 3 | use anyhow::anyhow; 4 | use chiptool::ir::IR; 5 | use chiptool::validate; 6 | 7 | pub struct Registers { 8 | pub registers: HashMap, 9 | } 10 | 11 | impl Registers { 12 | pub fn parse() -> Result { 13 | let mut registers = HashMap::new(); 14 | 15 | for f in glob::glob("data/registers/*")? { 16 | let f = f?; 17 | let ff = f 18 | .file_name() 19 | .unwrap() 20 | .to_string_lossy() 21 | .strip_suffix(".yaml") 22 | .unwrap() 23 | .to_string(); 24 | let ir: IR = serde_yaml::from_str(&std::fs::read_to_string(&f)?) 25 | .map_err(|e| anyhow!("failed to parse {f:?}: {e:?}"))?; 26 | 27 | // validate yaml file 28 | // we allow register overlap and field overlap for now 29 | let validate_option = validate::Options { 30 | allow_register_overlap: true, 31 | allow_field_overlap: true, 32 | allow_enum_dup_value: false, 33 | allow_unused_enums: false, 34 | allow_unused_fieldsets: false, 35 | }; 36 | let err_vec = validate::validate(&ir, validate_option); 37 | let err_string = err_vec.iter().fold(String::new(), |mut acc, cur| { 38 | acc.push_str(cur); 39 | acc.push('\n'); 40 | acc 41 | }); 42 | 43 | if !err_string.is_empty() { 44 | return Err(anyhow!(format!("\n{ff}:\n{err_string}"))); 45 | } 46 | 47 | registers.insert(ff, ir); 48 | } 49 | 50 | Ok(Self { registers }) 51 | } 52 | 53 | pub fn write(&self) -> Result<(), anyhow::Error> { 54 | std::fs::create_dir_all("build/data/registers")?; 55 | 56 | for (name, ir) in &self.registers { 57 | let dump = serde_json::to_string_pretty(ir)?; 58 | std::fs::write(format!("build/data/registers/{name}.json"), dump)?; 59 | } 60 | Ok(()) 61 | } 62 | } 63 | -------------------------------------------------------------------------------- /hpm-data-gen/src/trgmmux.rs: -------------------------------------------------------------------------------- 1 | //! parse trgm mux defines from sdk_code 2 | 3 | use std::{ 4 | collections::HashMap, 5 | path::{Path, PathBuf}, 6 | }; 7 | 8 | pub fn add_trgmmux_from_sdk>( 9 | data_dir: P, 10 | chip: &mut hpm_data_serde::Chip, 11 | ) -> anyhow::Result<()> { 12 | let sdk_path = std::env::var("HPM_SDK_BASE") 13 | .map(PathBuf::from) 14 | .unwrap_or_else(|_| data_dir.as_ref().parent().unwrap().join("hpm_sdk")); 15 | 16 | let chip_name = &chip.name; 17 | 18 | if chip.cores[0] 19 | .peripherals 20 | .iter() 21 | .find(|p| p.name.starts_with("TRGM")) 22 | .is_none() 23 | { 24 | return Ok(()); // No TRGM peripheral 25 | } 26 | 27 | let header_file = match chip_name { 28 | n if n.starts_with("HPM53") => sdk_path.join("soc/HPM5300/HPM5361/hpm_trgmmux_src.h"), 29 | n if n.starts_with("HPM62") => sdk_path.join("soc/HPM6200/HPM6280/hpm_trgmmux_src.h"), 30 | n if n.starts_with("HPM63") => sdk_path.join("soc/HPM6300/HPM6360/hpm_trgmmux_src.h"), 31 | n if n.starts_with("HPM67") || n.starts_with("HPM64") => { 32 | sdk_path.join("soc/HPM6700/HPM6750/hpm_trgmmux_src.h") 33 | } 34 | n if n.starts_with("HPM6E") => sdk_path.join("soc/HPM6E00/HPM6E80/hpm_trgmmux_src.h"), 35 | _ => anyhow::bail!("Unknown chip: {}", chip_name), 36 | }; 37 | 38 | let content = std::fs::read_to_string(&header_file) 39 | .expect(format!("Failed to read file: {:?}", &header_file).as_str()); 40 | 41 | // #define HPM_TRGM0_FILTER_SRC_PWM0_IN0 (0x0UL) 42 | let resource_pattern = 43 | regex::Regex::new(r"#define\s+HPM_(TRGM\d_\w+)\s+\(0x([0-9A-Fa-f]+)UL\)") 44 | .expect("Invalid regex"); 45 | let defines: HashMap = resource_pattern 46 | .captures_iter(&content) 47 | .map(|cap| { 48 | ( 49 | cap.get(1).unwrap().as_str().to_string(), 50 | u32::from_str_radix(cap.get(2).unwrap().as_str(), 16).unwrap(), 51 | ) 52 | }) 53 | .collect(); 54 | 55 | println!(" Chip: {} TRGM consts: {}", chip_name, defines.len()); 56 | 57 | for core in &mut chip.cores { 58 | core.trgmmuxes = defines 59 | .iter() 60 | .map(|(name, val)| hpm_data_serde::chip::core::TrgmMux { 61 | name: name.clone(), 62 | value: *val as _, 63 | }) 64 | .collect(); 65 | core.trgmmuxes 66 | .sort_by(|a, b| trgm_cmp_key(a).cmp(&trgm_cmp_key(b))); 67 | } 68 | 69 | Ok(()) 70 | } 71 | 72 | // TRGM0_FILTER_SRC_PWM0_IN0 => ("TRGM0_FILTER", 0) 73 | fn trgm_cmp_key(val: &hpm_data_serde::chip::core::TrgmMux) -> (&str, u32) { 74 | let i: usize = val.name.find('_').unwrap(); 75 | val.name[i + 1..] 76 | .find('_') 77 | .map_or((&val.name, val.value as u32), |j| { 78 | (&val.name[..i + j + 1], val.value as u32) 79 | }) 80 | } 81 | -------------------------------------------------------------------------------- /hpm-data-macros/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "hpm-data-macros" 3 | version = "0.1.0" 4 | edition = "2021" 5 | 6 | [lib] 7 | proc-macro = true 8 | 9 | [dependencies] 10 | proc-macro2 = "1.0.36" 11 | quote = "1.0.15" 12 | syn = "1.0" 13 | -------------------------------------------------------------------------------- /hpm-data-macros/src/lib.rs: -------------------------------------------------------------------------------- 1 | use proc_macro2::TokenStream; 2 | use quote::quote; 3 | use syn::Data; 4 | 5 | #[proc_macro_derive(EnumDebug)] 6 | pub fn enum_derive(input: proc_macro::TokenStream) -> proc_macro::TokenStream { 7 | let ast = syn::parse(input).unwrap(); 8 | 9 | impl_enum_derive(&ast).into() 10 | } 11 | 12 | fn impl_enum_derive(ast: &syn::DeriveInput) -> TokenStream { 13 | let name = &ast.ident; 14 | let enumm = match &ast.data { 15 | Data::Enum(e) => e, 16 | _ => unreachable!(), 17 | }; 18 | 19 | let match_variants: TokenStream = enumm 20 | .variants 21 | .iter() 22 | .map(|v| { 23 | let variant_name = &v.ident; 24 | let variant_debug = format!("{}::{}", name, variant_name); 25 | 26 | match v.fields.len() { 27 | 0 => quote! { 28 | #name::#variant_name => ::core::fmt::Formatter::write_str(f, #variant_debug), 29 | }, 30 | 1 => quote! { 31 | #name::#variant_name(__self_0) => ::core::fmt::Formatter::debug_tuple(f, #variant_debug) 32 | .field(&__self_0) 33 | .finish(), 34 | }, 35 | _ => unimplemented!(), 36 | } 37 | }) 38 | .collect(); 39 | 40 | quote! { 41 | #[automatically_derived] 42 | impl ::core::fmt::Debug for #name { 43 | fn fmt(self: &Self, f: &mut ::core::fmt::Formatter) -> ::core::fmt::Result { 44 | match self { 45 | #match_variants 46 | } 47 | } 48 | } 49 | } 50 | } 51 | -------------------------------------------------------------------------------- /hpm-data-macros/tests/test_macros.rs: -------------------------------------------------------------------------------- 1 | #![allow(dead_code)] 2 | 3 | use hpm_data_macros::EnumDebug; 4 | 5 | #[derive(Debug)] 6 | struct A { 7 | pub b: String, 8 | } 9 | 10 | #[derive(EnumDebug)] 11 | enum C { 12 | D(A), 13 | E, 14 | } 15 | -------------------------------------------------------------------------------- /hpm-data-serde/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "hpm-data-serde" 3 | version = "0.1.0" 4 | edition = "2021" 5 | 6 | [dependencies] 7 | serde = { version = "1.0.195", features = ["derive"] } 8 | serde_yaml = "0.9.30" 9 | -------------------------------------------------------------------------------- /hpm-metapac-gen/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "hpm-metapac-gen" 3 | version = "0.1.0" 4 | edition = "2021" 5 | license = "MIT OR Apache-2.0" 6 | 7 | 8 | [dependencies] 9 | regex = "1.7.1" 10 | chiptool = { git = "https://github.com/ch32-rs/chiptool", rev = "305bd6ee3e57009ae93be2c81d6e94b9896a03b1" } 11 | serde = { version = "1.0.157", features = ["derive"] } 12 | serde_json = "1.0.94" 13 | proc-macro2 = "1.0.52" 14 | hpm-data-macros = { version = "0.1.0", path = "../hpm-data-macros" } 15 | -------------------------------------------------------------------------------- /hpm-metapac-gen/res/Cargo.toml: -------------------------------------------------------------------------------- 1 | [package] 2 | name = "hpm-metapac" 3 | version = "0.0.5" 4 | edition = "2021" 5 | license = "MIT OR Apache-2.0" 6 | repository = "https://github.com/hpmicro/hpm-data" 7 | homepage = "https://github.com/hpmico/hpm-data" 8 | description = "Peripheral Access Crate (PAC) for all HPM's MCU chips, including metadata." 9 | authors = ["Andelf "] 10 | documentation = "https://docs.rs/hpm-metapac" 11 | categories = ["embedded", "no-std", "hardware-support"] 12 | keywords = ["hpm", "hpmicro", "svd2rust", "no_std", "embedded"] 13 | readme = "README.md" 14 | 15 | # `cargo publish` is unable to figure out which .rs files are needed due to the include! magic. 16 | include = ["**/*.rs", "**/*.x", "Cargo.toml"] 17 | 18 | [package.metadata.docs.rs] 19 | features = ["hpm5361", "pac", "metadata"] 20 | default-target = "riscv32imafc-unknown-none-elf" 21 | targets = [] 22 | 23 | [dependencies] 24 | riscv = "0.11.1" 25 | vcell = "0.1" 26 | 27 | [features] 28 | default = ["pac"] 29 | 30 | # Build the actual PAC. Set by default. 31 | # If you just want the metadata, unset it with `default-features = false`. 32 | pac = [] 33 | 34 | # Build the chip metadata. 35 | # If set, a const `hpm_metapac::METADATA` will be exported, containing all the 36 | # metadata for the currently selected chip. 37 | metadata = [] 38 | 39 | rt = [] 40 | memory-x = [] 41 | 42 | # Chip-selection features 43 | -------------------------------------------------------------------------------- /hpm-metapac-gen/res/build.rs: -------------------------------------------------------------------------------- 1 | use std::env; 2 | #[cfg(any(feature = "rt", feature = "memory-x"))] 3 | use std::path::PathBuf; 4 | 5 | enum GetOneError { 6 | None, 7 | Multiple, 8 | } 9 | 10 | trait IteratorExt: Iterator { 11 | fn get_one(self) -> Result; 12 | } 13 | 14 | impl IteratorExt for T { 15 | fn get_one(mut self) -> Result { 16 | match self.next() { 17 | None => Err(GetOneError::None), 18 | Some(res) => match self.next() { 19 | Some(_) => Err(GetOneError::Multiple), 20 | None => Ok(res), 21 | }, 22 | } 23 | } 24 | } 25 | 26 | fn main() { 27 | #[cfg(any(feature = "rt", feature = "memory-x"))] 28 | let crate_dir = PathBuf::from(env::var_os("CARGO_MANIFEST_DIR").unwrap()); 29 | 30 | let chip_core_name = match env::vars() 31 | .map(|(a, _)| a) 32 | .filter(|x| x.starts_with("CARGO_FEATURE_HPM")) 33 | .get_one() 34 | { 35 | Ok(x) => x, 36 | Err(GetOneError::None) => panic!("No hpmxxxx Cargo feature enabled"), 37 | Err(GetOneError::Multiple) => panic!("Multiple hpmxxxx Cargo features enabled"), 38 | } 39 | .strip_prefix("CARGO_FEATURE_") 40 | .unwrap() 41 | .to_ascii_lowercase() 42 | .replace('_', "-"); 43 | 44 | #[cfg(feature = "rt")] 45 | println!( 46 | "cargo:rustc-link-search={}/src/chips/{}", 47 | crate_dir.display(), 48 | chip_core_name, 49 | ); 50 | 51 | #[cfg(feature = "memory-x")] 52 | println!( 53 | "cargo:rustc-link-search={}/src/chips/{}/memory_x/", 54 | crate_dir.display(), 55 | chip_core_name 56 | ); 57 | println!( 58 | "cargo:rustc-env=HPM_METAPAC_PAC_PATH=chips/{}/pac.rs", 59 | chip_core_name 60 | ); 61 | println!( 62 | "cargo:rustc-env=HPM_METAPAC_METADATA_PATH=chips/{}/metadata.rs", 63 | chip_core_name 64 | ); 65 | 66 | println!("cargo:rerun-if-changed=build.rs"); 67 | } 68 | -------------------------------------------------------------------------------- /hpm-metapac-gen/res/src/lib.rs: -------------------------------------------------------------------------------- 1 | //! Peripheral Access Crate (PAC) for all HPMicro chips, including metadata. 2 | #![no_std] 3 | #![allow(non_snake_case)] 4 | #![allow(unused)] 5 | #![allow(non_camel_case_types)] 6 | #![doc(html_no_source)] 7 | 8 | pub mod common; 9 | 10 | #[cfg(feature = "pac")] 11 | include!(env!("HPM_METAPAC_PAC_PATH")); 12 | 13 | #[cfg(feature = "metadata")] 14 | pub mod metadata { 15 | include!("metadata.rs"); 16 | include!(env!("HPM_METAPAC_METADATA_PATH")); 17 | } 18 | 19 | pub unsafe trait InterruptNumber: Copy { 20 | /// Return the interrupt number associated with this variant. 21 | /// 22 | /// See trait documentation for safety requirements. 23 | fn number(self) -> u16; 24 | } 25 | -------------------------------------------------------------------------------- /hpm-metapac-gen/src/main.rs: -------------------------------------------------------------------------------- 1 | use std::env::args; 2 | use std::path::PathBuf; 3 | 4 | use hpm_metapac_gen::*; 5 | 6 | fn main() { 7 | let out_dir = PathBuf::from("build/hpm-metapac"); 8 | let data_dir = PathBuf::from("build/data"); 9 | 10 | let args: Vec = args().collect(); 11 | 12 | let all_chips: Vec<_> = std::fs::read_dir(data_dir.join("chips")) 13 | .unwrap() 14 | .filter_map(|res| res.unwrap().file_name().to_str().map(|s| s.to_string())) 15 | .filter(|s| s.ends_with(".json")) 16 | .map(|s| s.strip_suffix(".json").unwrap().to_string()) 17 | .collect(); 18 | 19 | let mut chips = match &args[..] { 20 | [_] => all_chips.clone(), 21 | _ => { 22 | let mut chips = vec![]; 23 | for arg in &args[1..] { 24 | if all_chips.contains(arg) { 25 | chips.push(arg.clone()); 26 | } else if arg.ends_with("*") { 27 | let prefix = arg.strip_suffix("*").unwrap(); 28 | for chip in &all_chips { 29 | if chip.starts_with(prefix) { 30 | chips.push(chip.clone()); 31 | } 32 | } 33 | } else { 34 | println!("Unknown chip: {}", arg); 35 | panic!(); 36 | } 37 | } 38 | chips 39 | } 40 | }; 41 | 42 | chips.sort(); 43 | 44 | println!("chips: {:?}", chips); 45 | 46 | let opts = Options { 47 | out_dir, 48 | data_dir, 49 | chips, 50 | }; 51 | Gen::new(opts).gen(); 52 | } 53 | --------------------------------------------------------------------------------