├── docs
├── 9731 avago.pdf
├── 9731.pdf
├── A4950-Datasheet.pdf
├── A4954-Datasheet.pdf
├── AS5047P_Datasheet-606067.pdf
├── AS5048_DS000298_4-00.pdf
├── C126463_SGM2203-3.3YK3LG%2FTR编带_2018-06-21.PDF
├── C127189_CT357B（T1）编带_2017-09-14.PDF
├── C161798_MA730GQ-Z_2018-06-29.PDF
├── C259220_91F21776BC6F4467ADF8CDD9B43FEFBC.pdf
├── HT7333-2_PDF_C114049_2017-09-19.pdf
├── Infineon-TLE5012B_Exxxx-DS-v02_00-en.pdf
├── Position_Feedback_for_Motor_Control (Chinese)(--).pdf
├── STM32Cube firmware examples for STM32F0 Series .pdf
├── STM32F030 and STM32F070advanced ARM-based 32-bit MCUs.pdf
├── STM32F030x4.pdf
├── STM32F030xx 和 STM32F070xx 系列硬件开发入门.pdf
├── TB67S109AFTG_PDF_C92125_2017-03-04.pdf
├── TB67S109AFTG_application_note_en_20170922.pdf
├── TB67S109AFTG_datasheet_zh_cn_20140520.pdf
├── TLE5012B E1000
│ ├── History
│ │ └── INF-PG-DSO-8-16M.~(1).PcbLib.Zip
│ ├── INF-PG-DSO-8-16L.PcbLib
│ ├── INF-PG-DSO-8-16M.PcbLib
│ ├── INF-PG-DSO-8-16N.PcbLib
│ └── TLE5012B E1000.SchLib
├── TLE5012B_Register_Setting_AN_Rev1.5 %28Chinese%29%28中文%29.pdf
├── TLP2168%28TP，F%29+编带_PDF_C99480_2018-04-17.PDF
├── dc989f846bec0975f465e2e9.jpg
├── en.DM00031936.pdf
├── en.DM00129215.pdf
├── en.SMPRES_STM32F0-L0_Discover-Webinar_A.pdf
├── stm32f051k6.pdf
└── 基于iGMR原理角度传感器TLE5012B应用指导.pdf
├── firmware
├── .mxproject
├── Drivers
│ ├── CMSIS
│ │ ├── DSP_Lib
│ │ │ └── Source
│ │ │ │ ├── BasicMathFunctions
│ │ │ │ ├── arm_abs_f32.c
│ │ │ │ ├── arm_abs_q15.c
│ │ │ │ ├── arm_abs_q31.c
│ │ │ │ ├── arm_abs_q7.c
│ │ │ │ ├── arm_add_f32.c
│ │ │ │ ├── arm_add_q15.c
│ │ │ │ ├── arm_add_q31.c
│ │ │ │ ├── arm_add_q7.c
│ │ │ │ ├── arm_dot_prod_f32.c
│ │ │ │ ├── arm_dot_prod_q15.c
│ │ │ │ ├── arm_dot_prod_q31.c
│ │ │ │ ├── arm_dot_prod_q7.c
│ │ │ │ ├── arm_mult_f32.c
│ │ │ │ ├── arm_mult_q15.c
│ │ │ │ ├── arm_mult_q31.c
│ │ │ │ ├── arm_mult_q7.c
│ │ │ │ ├── arm_negate_f32.c
│ │ │ │ ├── arm_negate_q15.c
│ │ │ │ ├── arm_negate_q31.c
│ │ │ │ ├── arm_negate_q7.c
│ │ │ │ ├── arm_offset_f32.c
│ │ │ │ ├── arm_offset_q15.c
│ │ │ │ ├── arm_offset_q31.c
│ │ │ │ ├── arm_offset_q7.c
│ │ │ │ ├── arm_scale_f32.c
│ │ │ │ ├── arm_scale_q15.c
│ │ │ │ ├── arm_scale_q31.c
│ │ │ │ ├── arm_scale_q7.c
│ │ │ │ ├── arm_shift_q15.c
│ │ │ │ ├── arm_shift_q31.c
│ │ │ │ ├── arm_shift_q7.c
│ │ │ │ ├── arm_sub_f32.c
│ │ │ │ ├── arm_sub_q15.c
│ │ │ │ ├── arm_sub_q31.c
│ │ │ │ └── arm_sub_q7.c
│ │ │ │ ├── CommonTables
│ │ │ │ ├── arm_common_tables.c
│ │ │ │ └── arm_const_structs.c
│ │ │ │ ├── ComplexMathFunctions
│ │ │ │ ├── arm_cmplx_conj_f32.c
│ │ │ │ ├── arm_cmplx_conj_q15.c
│ │ │ │ ├── arm_cmplx_conj_q31.c
│ │ │ │ ├── arm_cmplx_dot_prod_f32.c
│ │ │ │ ├── arm_cmplx_dot_prod_q15.c
│ │ │ │ ├── arm_cmplx_dot_prod_q31.c
│ │ │ │ ├── arm_cmplx_mag_f32.c
│ │ │ │ ├── arm_cmplx_mag_q15.c
│ │ │ │ ├── arm_cmplx_mag_q31.c
│ │ │ │ ├── arm_cmplx_mag_squared_f32.c
│ │ │ │ ├── arm_cmplx_mag_squared_q15.c
│ │ │ │ ├── arm_cmplx_mag_squared_q31.c
│ │ │ │ ├── arm_cmplx_mult_cmplx_f32.c
│ │ │ │ ├── arm_cmplx_mult_cmplx_q15.c
│ │ │ │ ├── arm_cmplx_mult_cmplx_q31.c
│ │ │ │ ├── arm_cmplx_mult_real_f32.c
│ │ │ │ ├── arm_cmplx_mult_real_q15.c
│ │ │ │ └── arm_cmplx_mult_real_q31.c
│ │ │ │ ├── ControllerFunctions
│ │ │ │ ├── arm_pid_init_f32.c
│ │ │ │ ├── arm_pid_init_q15.c
│ │ │ │ ├── arm_pid_init_q31.c
│ │ │ │ ├── arm_pid_reset_f32.c
│ │ │ │ ├── arm_pid_reset_q15.c
│ │ │ │ ├── arm_pid_reset_q31.c
│ │ │ │ ├── arm_sin_cos_f32.c
│ │ │ │ └── arm_sin_cos_q31.c
│ │ │ │ ├── FastMathFunctions
│ │ │ │ ├── arm_cos_f32.c
│ │ │ │ ├── arm_cos_q15.c
│ │ │ │ ├── arm_cos_q31.c
│ │ │ │ ├── arm_sin_f32.c
│ │ │ │ ├── arm_sin_q15.c
│ │ │ │ ├── arm_sin_q31.c
│ │ │ │ ├── arm_sqrt_q15.c
│ │ │ │ └── arm_sqrt_q31.c
│ │ │ │ ├── FilteringFunctions
│ │ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_f32.c
│ │ │ │ ├── arm_biquad_cascade_df1_fast_q15.c
│ │ │ │ ├── arm_biquad_cascade_df1_fast_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_init_f32.c
│ │ │ │ ├── arm_biquad_cascade_df1_init_q15.c
│ │ │ │ ├── arm_biquad_cascade_df1_init_q31.c
│ │ │ │ ├── arm_biquad_cascade_df1_q15.c
│ │ │ │ ├── arm_biquad_cascade_df1_q31.c
│ │ │ │ ├── arm_biquad_cascade_df2T_f32.c
│ │ │ │ ├── arm_biquad_cascade_df2T_f64.c
│ │ │ │ ├── arm_biquad_cascade_df2T_init_f32.c
│ │ │ │ ├── arm_biquad_cascade_df2T_init_f64.c
│ │ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c
│ │ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c
│ │ │ │ ├── arm_conv_f32.c
│ │ │ │ ├── arm_conv_fast_opt_q15.c
│ │ │ │ ├── arm_conv_fast_q15.c
│ │ │ │ ├── arm_conv_fast_q31.c
│ │ │ │ ├── arm_conv_opt_q15.c
│ │ │ │ ├── arm_conv_opt_q7.c
│ │ │ │ ├── arm_conv_partial_f32.c
│ │ │ │ ├── arm_conv_partial_fast_opt_q15.c
│ │ │ │ ├── arm_conv_partial_fast_q15.c
│ │ │ │ ├── arm_conv_partial_fast_q31.c
│ │ │ │ ├── arm_conv_partial_opt_q15.c
│ │ │ │ ├── arm_conv_partial_opt_q7.c
│ │ │ │ ├── arm_conv_partial_q15.c
│ │ │ │ ├── arm_conv_partial_q31.c
│ │ │ │ ├── arm_conv_partial_q7.c
│ │ │ │ ├── arm_conv_q15.c
│ │ │ │ ├── arm_conv_q31.c
│ │ │ │ ├── arm_conv_q7.c
│ │ │ │ ├── arm_correlate_f32.c
│ │ │ │ ├── arm_correlate_fast_opt_q15.c
│ │ │ │ ├── arm_correlate_fast_q15.c
│ │ │ │ ├── arm_correlate_fast_q31.c
│ │ │ │ ├── arm_correlate_opt_q15.c
│ │ │ │ ├── arm_correlate_opt_q7.c
│ │ │ │ ├── arm_correlate_q15.c
│ │ │ │ ├── arm_correlate_q31.c
│ │ │ │ ├── arm_correlate_q7.c
│ │ │ │ ├── arm_fir_decimate_f32.c
│ │ │ │ ├── arm_fir_decimate_fast_q15.c
│ │ │ │ ├── arm_fir_decimate_fast_q31.c
│ │ │ │ ├── arm_fir_decimate_init_f32.c
│ │ │ │ ├── arm_fir_decimate_init_q15.c
│ │ │ │ ├── arm_fir_decimate_init_q31.c
│ │ │ │ ├── arm_fir_decimate_q15.c
│ │ │ │ ├── arm_fir_decimate_q31.c
│ │ │ │ ├── arm_fir_f32.c
│ │ │ │ ├── arm_fir_fast_q15.c
│ │ │ │ ├── arm_fir_fast_q31.c
│ │ │ │ ├── arm_fir_init_f32.c
│ │ │ │ ├── arm_fir_init_q15.c
│ │ │ │ ├── arm_fir_init_q31.c
│ │ │ │ ├── arm_fir_init_q7.c
│ │ │ │ ├── arm_fir_interpolate_f32.c
│ │ │ │ ├── arm_fir_interpolate_init_f32.c
│ │ │ │ ├── arm_fir_interpolate_init_q15.c
│ │ │ │ ├── arm_fir_interpolate_init_q31.c
│ │ │ │ ├── arm_fir_interpolate_q15.c
│ │ │ │ ├── arm_fir_interpolate_q31.c
│ │ │ │ ├── arm_fir_lattice_f32.c
│ │ │ │ ├── arm_fir_lattice_init_f32.c
│ │ │ │ ├── arm_fir_lattice_init_q15.c
│ │ │ │ ├── arm_fir_lattice_init_q31.c
│ │ │ │ ├── arm_fir_lattice_q15.c
│ │ │ │ ├── arm_fir_lattice_q31.c
│ │ │ │ ├── arm_fir_q15.c
│ │ │ │ ├── arm_fir_q31.c
│ │ │ │ ├── arm_fir_q7.c
│ │ │ │ ├── arm_fir_sparse_f32.c
│ │ │ │ ├── arm_fir_sparse_init_f32.c
│ │ │ │ ├── arm_fir_sparse_init_q15.c
│ │ │ │ ├── arm_fir_sparse_init_q31.c
│ │ │ │ ├── arm_fir_sparse_init_q7.c
│ │ │ │ ├── arm_fir_sparse_q15.c
│ │ │ │ ├── arm_fir_sparse_q31.c
│ │ │ │ ├── arm_fir_sparse_q7.c
│ │ │ │ ├── arm_iir_lattice_f32.c
│ │ │ │ ├── arm_iir_lattice_init_f32.c
│ │ │ │ ├── arm_iir_lattice_init_q15.c
│ │ │ │ ├── arm_iir_lattice_init_q31.c
│ │ │ │ ├── arm_iir_lattice_q15.c
│ │ │ │ ├── arm_iir_lattice_q31.c
│ │ │ │ ├── arm_lms_f32.c
│ │ │ │ ├── arm_lms_init_f32.c
│ │ │ │ ├── arm_lms_init_q15.c
│ │ │ │ ├── arm_lms_init_q31.c
│ │ │ │ ├── arm_lms_norm_f32.c
│ │ │ │ ├── arm_lms_norm_init_f32.c
│ │ │ │ ├── arm_lms_norm_init_q15.c
│ │ │ │ ├── arm_lms_norm_init_q31.c
│ │ │ │ ├── arm_lms_norm_q15.c
│ │ │ │ ├── arm_lms_norm_q31.c
│ │ │ │ ├── arm_lms_q15.c
│ │ │ │ └── arm_lms_q31.c
│ │ │ │ ├── MatrixFunctions
│ │ │ │ ├── arm_mat_add_f32.c
│ │ │ │ ├── arm_mat_add_q15.c
│ │ │ │ ├── arm_mat_add_q31.c
│ │ │ │ ├── arm_mat_cmplx_mult_f32.c
│ │ │ │ ├── arm_mat_cmplx_mult_q15.c
│ │ │ │ ├── arm_mat_cmplx_mult_q31.c
│ │ │ │ ├── arm_mat_init_f32.c
│ │ │ │ ├── arm_mat_init_q15.c
│ │ │ │ ├── arm_mat_init_q31.c
│ │ │ │ ├── arm_mat_inverse_f32.c
│ │ │ │ ├── arm_mat_inverse_f64.c
│ │ │ │ ├── arm_mat_mult_f32.c
│ │ │ │ ├── arm_mat_mult_fast_q15.c
│ │ │ │ ├── arm_mat_mult_fast_q31.c
│ │ │ │ ├── arm_mat_mult_q15.c
│ │ │ │ ├── arm_mat_mult_q31.c
│ │ │ │ ├── arm_mat_scale_f32.c
│ │ │ │ ├── arm_mat_scale_q15.c
│ │ │ │ ├── arm_mat_scale_q31.c
│ │ │ │ ├── arm_mat_sub_f32.c
│ │ │ │ ├── arm_mat_sub_q15.c
│ │ │ │ ├── arm_mat_sub_q31.c
│ │ │ │ ├── arm_mat_trans_f32.c
│ │ │ │ ├── arm_mat_trans_q15.c
│ │ │ │ └── arm_mat_trans_q31.c
│ │ │ │ ├── StatisticsFunctions
│ │ │ │ ├── arm_max_f32.c
│ │ │ │ ├── arm_max_q15.c
│ │ │ │ ├── arm_max_q31.c
│ │ │ │ ├── arm_max_q7.c
│ │ │ │ ├── arm_mean_f32.c
│ │ │ │ ├── arm_mean_q15.c
│ │ │ │ ├── arm_mean_q31.c
│ │ │ │ ├── arm_mean_q7.c
│ │ │ │ ├── arm_min_f32.c
│ │ │ │ ├── arm_min_q15.c
│ │ │ │ ├── arm_min_q31.c
│ │ │ │ ├── arm_min_q7.c
│ │ │ │ ├── arm_power_f32.c
│ │ │ │ ├── arm_power_q15.c
│ │ │ │ ├── arm_power_q31.c
│ │ │ │ ├── arm_power_q7.c
│ │ │ │ ├── arm_rms_f32.c
│ │ │ │ ├── arm_rms_q15.c
│ │ │ │ ├── arm_rms_q31.c
│ │ │ │ ├── arm_std_f32.c
│ │ │ │ ├── arm_std_q15.c
│ │ │ │ ├── arm_std_q31.c
│ │ │ │ ├── arm_var_f32.c
│ │ │ │ ├── arm_var_q15.c
│ │ │ │ └── arm_var_q31.c
│ │ │ │ ├── SupportFunctions
│ │ │ │ ├── arm_copy_f32.c
│ │ │ │ ├── arm_copy_q15.c
│ │ │ │ ├── arm_copy_q31.c
│ │ │ │ ├── arm_copy_q7.c
│ │ │ │ ├── arm_fill_f32.c
│ │ │ │ ├── arm_fill_q15.c
│ │ │ │ ├── arm_fill_q31.c
│ │ │ │ ├── arm_fill_q7.c
│ │ │ │ ├── arm_float_to_q15.c
│ │ │ │ ├── arm_float_to_q31.c
│ │ │ │ ├── arm_float_to_q7.c
│ │ │ │ ├── arm_q15_to_float.c
│ │ │ │ ├── arm_q15_to_q31.c
│ │ │ │ ├── arm_q15_to_q7.c
│ │ │ │ ├── arm_q31_to_float.c
│ │ │ │ ├── arm_q31_to_q15.c
│ │ │ │ ├── arm_q31_to_q7.c
│ │ │ │ ├── arm_q7_to_float.c
│ │ │ │ ├── arm_q7_to_q15.c
│ │ │ │ └── arm_q7_to_q31.c
│ │ │ │ └── TransformFunctions
│ │ │ │ ├── arm_bitreversal.c
│ │ │ │ ├── arm_cfft_f32.c
│ │ │ │ ├── arm_cfft_q15.c
│ │ │ │ ├── arm_cfft_q31.c
│ │ │ │ ├── arm_cfft_radix2_f32.c
│ │ │ │ ├── arm_cfft_radix2_init_f32.c
│ │ │ │ ├── arm_cfft_radix2_init_q15.c
│ │ │ │ ├── arm_cfft_radix2_init_q31.c
│ │ │ │ ├── arm_cfft_radix2_q15.c
│ │ │ │ ├── arm_cfft_radix2_q31.c
│ │ │ │ ├── arm_cfft_radix4_f32.c
│ │ │ │ ├── arm_cfft_radix4_init_f32.c
│ │ │ │ ├── arm_cfft_radix4_init_q15.c
│ │ │ │ ├── arm_cfft_radix4_init_q31.c
│ │ │ │ ├── arm_cfft_radix4_q15.c
│ │ │ │ ├── arm_cfft_radix4_q31.c
│ │ │ │ ├── arm_cfft_radix8_f32.c
│ │ │ │ ├── arm_dct4_f32.c
│ │ │ │ ├── arm_dct4_init_f32.c
│ │ │ │ ├── arm_dct4_init_q15.c
│ │ │ │ ├── arm_dct4_init_q31.c
│ │ │ │ ├── arm_dct4_q15.c
│ │ │ │ ├── arm_dct4_q31.c
│ │ │ │ ├── arm_rfft_f32.c
│ │ │ │ ├── arm_rfft_fast_f32.c
│ │ │ │ ├── arm_rfft_fast_init_f32.c
│ │ │ │ ├── arm_rfft_init_f32.c
│ │ │ │ ├── arm_rfft_init_q15.c
│ │ │ │ ├── arm_rfft_init_q31.c
│ │ │ │ ├── arm_rfft_q15.c
│ │ │ │ └── arm_rfft_q31.c
│ │ ├── Device
│ │ │ └── ST
│ │ │ │ └── STM32F0xx
│ │ │ │ ├── Include
│ │ │ │ ├── stm32f030x6.h
│ │ │ │ ├── stm32f030x8.h
│ │ │ │ ├── stm32f030xc.h
│ │ │ │ ├── stm32f031x6.h
│ │ │ │ ├── stm32f038xx.h
│ │ │ │ ├── stm32f042x6.h
│ │ │ │ ├── stm32f048xx.h
│ │ │ │ ├── stm32f051x8.h
│ │ │ │ ├── stm32f058xx.h
│ │ │ │ ├── stm32f070x6.h
│ │ │ │ ├── stm32f070xb.h
│ │ │ │ ├── stm32f071xb.h
│ │ │ │ ├── stm32f072xb.h
│ │ │ │ ├── stm32f078xx.h
│ │ │ │ ├── stm32f091xc.h
│ │ │ │ ├── stm32f098xx.h
│ │ │ │ ├── stm32f0xx.h
│ │ │ │ └── system_stm32f0xx.h
│ │ │ │ └── Source
│ │ │ │ └── Templates
│ │ │ │ ├── arm
│ │ │ │ ├── startup_stm32f030x6.s
│ │ │ │ ├── startup_stm32f030x8.s
│ │ │ │ ├── startup_stm32f030xc.s
│ │ │ │ ├── startup_stm32f031x6.s
│ │ │ │ ├── startup_stm32f038xx.s
│ │ │ │ ├── startup_stm32f042x6.s
│ │ │ │ ├── startup_stm32f048xx.s
│ │ │ │ ├── startup_stm32f051x8.s
│ │ │ │ ├── startup_stm32f058xx.s
│ │ │ │ ├── startup_stm32f070x6.s
│ │ │ │ ├── startup_stm32f070xb.s
│ │ │ │ ├── startup_stm32f071xb.s
│ │ │ │ ├── startup_stm32f072xb.s
│ │ │ │ ├── startup_stm32f078xx.s
│ │ │ │ ├── startup_stm32f091xc.s
│ │ │ │ └── startup_stm32f098xx.s
│ │ │ │ ├── gcc
│ │ │ │ ├── startup_stm32f030x6.s
│ │ │ │ ├── startup_stm32f030x8.s
│ │ │ │ ├── startup_stm32f030xc.s
│ │ │ │ ├── startup_stm32f031x6.s
│ │ │ │ ├── startup_stm32f038xx.s
│ │ │ │ ├── startup_stm32f042x6.s
│ │ │ │ ├── startup_stm32f048xx.s
│ │ │ │ ├── startup_stm32f051x8.s
│ │ │ │ ├── startup_stm32f058xx.s
│ │ │ │ ├── startup_stm32f070x6.s
│ │ │ │ ├── startup_stm32f070xb.s
│ │ │ │ ├── startup_stm32f071xb.s
│ │ │ │ ├── startup_stm32f072xb.s
│ │ │ │ ├── startup_stm32f078xx.s
│ │ │ │ ├── startup_stm32f091xc.s
│ │ │ │ └── startup_stm32f098xx.s
│ │ │ │ ├── iar
│ │ │ │ ├── linker
│ │ │ │ │ ├── stm32f030x6_flash.icf
│ │ │ │ │ ├── stm32f030x8_flash.icf
│ │ │ │ │ ├── stm32f030xc_flash.icf
│ │ │ │ │ ├── stm32f031x6_flash.icf
│ │ │ │ │ ├── stm32f038xx_flash.icf
│ │ │ │ │ ├── stm32f042x6_flash.icf
│ │ │ │ │ ├── stm32f048xx_flash.icf
│ │ │ │ │ ├── stm32f051x8_flash.icf
│ │ │ │ │ ├── stm32f058xx_flash.icf
│ │ │ │ │ ├── stm32f070x6_flash.icf
│ │ │ │ │ ├── stm32f070xb_flash.icf
│ │ │ │ │ ├── stm32f071xb_flash.icf
│ │ │ │ │ ├── stm32f072xb_flash.icf
│ │ │ │ │ ├── stm32f078xx_flash.icf
│ │ │ │ │ ├── stm32f091xc_flash.icf
│ │ │ │ │ ├── stm32f091xc_sram.icf
│ │ │ │ │ ├── stm32f098xx_flash.icf
│ │ │ │ │ └── stm32f098xx_sram.icf
│ │ │ │ ├── startup_stm32f030x6.s
│ │ │ │ ├── startup_stm32f030x8.s
│ │ │ │ ├── startup_stm32f030xc.s
│ │ │ │ ├── startup_stm32f031x6.s
│ │ │ │ ├── startup_stm32f038xx.s
│ │ │ │ ├── startup_stm32f042x6.s
│ │ │ │ ├── startup_stm32f048xx.s
│ │ │ │ ├── startup_stm32f051x8.s
│ │ │ │ ├── startup_stm32f058xx.s
│ │ │ │ ├── startup_stm32f070x6.s
│ │ │ │ ├── startup_stm32f070xb.s
│ │ │ │ ├── startup_stm32f071xb.s
│ │ │ │ ├── startup_stm32f072xb.s
│ │ │ │ ├── startup_stm32f078xx.s
│ │ │ │ ├── startup_stm32f091xc.s
│ │ │ │ └── startup_stm32f098xx.s
│ │ │ │ └── system_stm32f0xx.c
│ │ ├── Include
│ │ │ ├── arm_common_tables.h
│ │ │ ├── arm_const_structs.h
│ │ │ ├── arm_math.h
│ │ │ ├── cmsis_armcc.h
│ │ │ ├── cmsis_armcc_V6.h
│ │ │ ├── cmsis_gcc.h
│ │ │ ├── core_cm0.h
│ │ │ ├── core_cm0plus.h
│ │ │ ├── core_cm3.h
│ │ │ ├── core_cm4.h
│ │ │ ├── core_cm7.h
│ │ │ ├── core_cmFunc.h
│ │ │ ├── core_cmInstr.h
│ │ │ ├── core_cmSimd.h
│ │ │ ├── core_sc000.h
│ │ │ └── core_sc300.h
│ │ ├── Lib
│ │ │ ├── ARM
│ │ │ │ ├── arm_cortexM0b_math.lib
│ │ │ │ └── arm_cortexM0l_math.lib
│ │ │ └── GCC
│ │ │ │ └── libarm_cortexM0l_math.a
│ │ └── RTOS
│ │ │ └── Template
│ │ │ └── cmsis_os.h
│ └── STM32F0xx_HAL_Driver
│ │ ├── Inc
│ │ ├── Legacy
│ │ │ └── stm32_hal_legacy.h
│ │ ├── stm32_assert_template.h
│ │ ├── stm32f0xx_hal.h
│ │ ├── stm32f0xx_hal_adc.h
│ │ ├── stm32f0xx_hal_adc_ex.h
│ │ ├── stm32f0xx_hal_can.h
│ │ ├── stm32f0xx_hal_cec.h
│ │ ├── stm32f0xx_hal_comp.h
│ │ ├── stm32f0xx_hal_conf_template.h
│ │ ├── stm32f0xx_hal_cortex.h
│ │ ├── stm32f0xx_hal_crc.h
│ │ ├── stm32f0xx_hal_crc_ex.h
│ │ ├── stm32f0xx_hal_dac.h
│ │ ├── stm32f0xx_hal_dac_ex.h
│ │ ├── stm32f0xx_hal_def.h
│ │ ├── stm32f0xx_hal_dma.h
│ │ ├── stm32f0xx_hal_dma_ex.h
│ │ ├── stm32f0xx_hal_flash.h
│ │ ├── stm32f0xx_hal_flash_ex.h
│ │ ├── stm32f0xx_hal_gpio.h
│ │ ├── stm32f0xx_hal_gpio_ex.h
│ │ ├── stm32f0xx_hal_i2c.h
│ │ ├── stm32f0xx_hal_i2c_ex.h
│ │ ├── stm32f0xx_hal_i2s.h
│ │ ├── stm32f0xx_hal_irda.h
│ │ ├── stm32f0xx_hal_irda_ex.h
│ │ ├── stm32f0xx_hal_iwdg.h
│ │ ├── stm32f0xx_hal_pcd.h
│ │ ├── stm32f0xx_hal_pcd_ex.h
│ │ ├── stm32f0xx_hal_pwr.h
│ │ ├── stm32f0xx_hal_pwr_ex.h
│ │ ├── stm32f0xx_hal_rcc.h
│ │ ├── stm32f0xx_hal_rcc_ex.h
│ │ ├── stm32f0xx_hal_rtc.h
│ │ ├── stm32f0xx_hal_rtc_ex.h
│ │ ├── stm32f0xx_hal_smartcard.h
│ │ ├── stm32f0xx_hal_smartcard_ex.h
│ │ ├── stm32f0xx_hal_smbus.h
│ │ ├── stm32f0xx_hal_spi.h
│ │ ├── stm32f0xx_hal_spi_ex.h
│ │ ├── stm32f0xx_hal_tim.h
│ │ ├── stm32f0xx_hal_tim_ex.h
│ │ ├── stm32f0xx_hal_tsc.h
│ │ ├── stm32f0xx_hal_uart.h
│ │ ├── stm32f0xx_hal_uart_ex.h
│ │ ├── stm32f0xx_hal_usart.h
│ │ ├── stm32f0xx_hal_usart_ex.h
│ │ ├── stm32f0xx_hal_wwdg.h
│ │ ├── stm32f0xx_ll_adc.h
│ │ ├── stm32f0xx_ll_bus.h
│ │ ├── stm32f0xx_ll_comp.h
│ │ ├── stm32f0xx_ll_cortex.h
│ │ ├── stm32f0xx_ll_crc.h
│ │ ├── stm32f0xx_ll_crs.h
│ │ ├── stm32f0xx_ll_dac.h
│ │ ├── stm32f0xx_ll_dma.h
│ │ ├── stm32f0xx_ll_exti.h
│ │ ├── stm32f0xx_ll_gpio.h
│ │ ├── stm32f0xx_ll_i2c.h
│ │ ├── stm32f0xx_ll_iwdg.h
│ │ ├── stm32f0xx_ll_pwr.h
│ │ ├── stm32f0xx_ll_rcc.h
│ │ ├── stm32f0xx_ll_rtc.h
│ │ ├── stm32f0xx_ll_spi.h
│ │ ├── stm32f0xx_ll_spi.h~RF78c8eb.TMP
│ │ ├── stm32f0xx_ll_system.h
│ │ ├── stm32f0xx_ll_tim.h
│ │ ├── stm32f0xx_ll_usart.h
│ │ ├── stm32f0xx_ll_utils.h
│ │ └── stm32f0xx_ll_wwdg.h
│ │ └── Src
│ │ ├── stm32f0xx_hal.c
│ │ ├── stm32f0xx_hal_adc.c
│ │ ├── stm32f0xx_hal_adc_ex.c
│ │ ├── stm32f0xx_hal_can.c
│ │ ├── stm32f0xx_hal_cec.c
│ │ ├── stm32f0xx_hal_comp.c
│ │ ├── stm32f0xx_hal_cortex.c
│ │ ├── stm32f0xx_hal_crc.c
│ │ ├── stm32f0xx_hal_crc_ex.c
│ │ ├── stm32f0xx_hal_dac.c
│ │ ├── stm32f0xx_hal_dac_ex.c
│ │ ├── stm32f0xx_hal_dma.c
│ │ ├── stm32f0xx_hal_flash.c
│ │ ├── stm32f0xx_hal_flash_ex.c
│ │ ├── stm32f0xx_hal_gpio.c
│ │ ├── stm32f0xx_hal_i2c.c
│ │ ├── stm32f0xx_hal_i2c_ex.c
│ │ ├── stm32f0xx_hal_i2s.c
│ │ ├── stm32f0xx_hal_irda.c
│ │ ├── stm32f0xx_hal_iwdg.c
│ │ ├── stm32f0xx_hal_msp_template.c
│ │ ├── stm32f0xx_hal_pcd.c
│ │ ├── stm32f0xx_hal_pcd_ex.c
│ │ ├── stm32f0xx_hal_pwr.c
│ │ ├── stm32f0xx_hal_pwr_ex.c
│ │ ├── stm32f0xx_hal_rcc.c
│ │ ├── stm32f0xx_hal_rcc_ex.c
│ │ ├── stm32f0xx_hal_rtc.c
│ │ ├── stm32f0xx_hal_rtc_ex.c
│ │ ├── stm32f0xx_hal_smartcard.c
│ │ ├── stm32f0xx_hal_smartcard_ex.c
│ │ ├── stm32f0xx_hal_smbus.c
│ │ ├── stm32f0xx_hal_spi.c
│ │ ├── stm32f0xx_hal_spi_ex.c
│ │ ├── stm32f0xx_hal_tim.c
│ │ ├── stm32f0xx_hal_tim_ex.c
│ │ ├── stm32f0xx_hal_timebase_rtc_alarm_template.c
│ │ ├── stm32f0xx_hal_timebase_rtc_wakeup_template.c
│ │ ├── stm32f0xx_hal_timebase_tim_template.c
│ │ ├── stm32f0xx_hal_tsc.c
│ │ ├── stm32f0xx_hal_uart.c
│ │ ├── stm32f0xx_hal_uart_ex.c
│ │ ├── stm32f0xx_hal_usart.c
│ │ ├── stm32f0xx_hal_wwdg.c
│ │ ├── stm32f0xx_ll_adc.c
│ │ ├── stm32f0xx_ll_comp.c
│ │ ├── stm32f0xx_ll_crc.c
│ │ ├── stm32f0xx_ll_crs.c
│ │ ├── stm32f0xx_ll_dac.c
│ │ ├── stm32f0xx_ll_dma.c
│ │ ├── stm32f0xx_ll_exti.c
│ │ ├── stm32f0xx_ll_gpio.c
│ │ ├── stm32f0xx_ll_i2c.c
│ │ ├── stm32f0xx_ll_pwr.c
│ │ ├── stm32f0xx_ll_rcc.c
│ │ ├── stm32f0xx_ll_rtc.c
│ │ ├── stm32f0xx_ll_spi.c
│ │ ├── stm32f0xx_ll_tim.c
│ │ ├── stm32f0xx_ll_usart.c
│ │ └── stm32f0xx_ll_utils.c
├── ITEM.ioc
├── Inc
│ ├── main.h
│ ├── stm32_assert.h
│ ├── stm32f0xx_hal_conf.h
│ └── stm32f0xx_it.h
├── MDK-ARM
│ ├── ITEM.uvguix.Bruce
│ ├── ITEM.uvoptx
│ ├── ITEM.uvprojx
│ ├── ITEM
│ │ ├── ExtDll.iex
│ │ ├── ITEM.axf
│ │ ├── ITEM.build_log.htm
│ │ ├── ITEM.hex
│ │ ├── ITEM.htm
│ │ ├── ITEM.lnp
│ │ ├── ITEM.map
│ │ ├── ITEM.sct
│ │ ├── ITEM_ITEM.dep
│ │ ├── main.crf
│ │ ├── main.d
│ │ ├── main.o
│ │ ├── startup_stm32f030x8.d
│ │ ├── startup_stm32f030x8.o
│ │ ├── stm32f0xx_it.crf
│ │ ├── stm32f0xx_it.d
│ │ ├── stm32f0xx_it.o
│ │ ├── stm32f0xx_ll_dma.crf
│ │ ├── stm32f0xx_ll_dma.d
│ │ ├── stm32f0xx_ll_dma.o
│ │ ├── stm32f0xx_ll_exti.crf
│ │ ├── stm32f0xx_ll_exti.d
│ │ ├── stm32f0xx_ll_exti.o
│ │ ├── stm32f0xx_ll_gpio.crf
│ │ ├── stm32f0xx_ll_gpio.d
│ │ ├── stm32f0xx_ll_gpio.o
│ │ ├── stm32f0xx_ll_pwr.crf
│ │ ├── stm32f0xx_ll_pwr.d
│ │ ├── stm32f0xx_ll_pwr.o
│ │ ├── stm32f0xx_ll_rcc.crf
│ │ ├── stm32f0xx_ll_rcc.d
│ │ ├── stm32f0xx_ll_rcc.o
│ │ ├── stm32f0xx_ll_spi.crf
│ │ ├── stm32f0xx_ll_spi.d
│ │ ├── stm32f0xx_ll_spi.o
│ │ ├── stm32f0xx_ll_tim.crf
│ │ ├── stm32f0xx_ll_tim.d
│ │ ├── stm32f0xx_ll_tim.o
│ │ ├── stm32f0xx_ll_usart.crf
│ │ ├── stm32f0xx_ll_usart.d
│ │ ├── stm32f0xx_ll_usart.o
│ │ ├── stm32f0xx_ll_utils.crf
│ │ ├── stm32f0xx_ll_utils.d
│ │ ├── stm32f0xx_ll_utils.o
│ │ ├── system_stm32f0xx.crf
│ │ ├── system_stm32f0xx.d
│ │ └── system_stm32f0xx.o
│ ├── RTE
│ │ └── RTE_Components.h
│ ├── startup_stm32f030x8.lst
│ └── startup_stm32f030x8.s
├── Src
│ ├── main.c
│ ├── stm32f0xx_it.c
│ └── system_stm32f0xx.c
└── mx.scratch
└── hardware
├── Item.PcbDoc
├── Item.PrjPCB
├── Item.PrjPCBStructure
└── Item.SchDoc
/docs/9731 avago.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/9731 avago.pdf
--------------------------------------------------------------------------------
/docs/9731.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/9731.pdf
--------------------------------------------------------------------------------
/docs/A4950-Datasheet.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/A4950-Datasheet.pdf
--------------------------------------------------------------------------------
/docs/A4954-Datasheet.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/A4954-Datasheet.pdf
--------------------------------------------------------------------------------
/docs/AS5047P_Datasheet-606067.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/AS5047P_Datasheet-606067.pdf
--------------------------------------------------------------------------------
/docs/AS5048_DS000298_4-00.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/AS5048_DS000298_4-00.pdf
--------------------------------------------------------------------------------
/docs/C126463_SGM2203-3.3YK3LG%2FTR编带_2018-06-21.PDF:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/C126463_SGM2203-3.3YK3LG%2FTR编带_2018-06-21.PDF
--------------------------------------------------------------------------------
/docs/C127189_CT357B（T1）编带_2017-09-14.PDF:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/C127189_CT357B（T1）编带_2017-09-14.PDF
--------------------------------------------------------------------------------
/docs/C161798_MA730GQ-Z_2018-06-29.PDF:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/C161798_MA730GQ-Z_2018-06-29.PDF
--------------------------------------------------------------------------------
/docs/C259220_91F21776BC6F4467ADF8CDD9B43FEFBC.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/C259220_91F21776BC6F4467ADF8CDD9B43FEFBC.pdf
--------------------------------------------------------------------------------
/docs/HT7333-2_PDF_C114049_2017-09-19.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/HT7333-2_PDF_C114049_2017-09-19.pdf
--------------------------------------------------------------------------------
/docs/Infineon-TLE5012B_Exxxx-DS-v02_00-en.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/Infineon-TLE5012B_Exxxx-DS-v02_00-en.pdf
--------------------------------------------------------------------------------
/docs/Position_Feedback_for_Motor_Control (Chinese)(--).pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/Position_Feedback_for_Motor_Control (Chinese)(--).pdf
--------------------------------------------------------------------------------
/docs/STM32Cube firmware examples for STM32F0 Series .pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/STM32Cube firmware examples for STM32F0 Series .pdf
--------------------------------------------------------------------------------
/docs/STM32F030 and STM32F070advanced ARM-based 32-bit MCUs.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/STM32F030 and STM32F070advanced ARM-based 32-bit MCUs.pdf
--------------------------------------------------------------------------------
/docs/STM32F030x4.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/STM32F030x4.pdf
--------------------------------------------------------------------------------
/docs/STM32F030xx 和 STM32F070xx 系列硬件开发入门.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/STM32F030xx 和 STM32F070xx 系列硬件开发入门.pdf
--------------------------------------------------------------------------------
/docs/TB67S109AFTG_PDF_C92125_2017-03-04.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TB67S109AFTG_PDF_C92125_2017-03-04.pdf
--------------------------------------------------------------------------------
/docs/TB67S109AFTG_application_note_en_20170922.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TB67S109AFTG_application_note_en_20170922.pdf
--------------------------------------------------------------------------------
/docs/TB67S109AFTG_datasheet_zh_cn_20140520.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TB67S109AFTG_datasheet_zh_cn_20140520.pdf
--------------------------------------------------------------------------------
/docs/TLE5012B E1000/History/INF-PG-DSO-8-16M.~(1).PcbLib.Zip:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLE5012B E1000/History/INF-PG-DSO-8-16M.~(1).PcbLib.Zip
--------------------------------------------------------------------------------
/docs/TLE5012B E1000/INF-PG-DSO-8-16L.PcbLib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLE5012B E1000/INF-PG-DSO-8-16L.PcbLib
--------------------------------------------------------------------------------
/docs/TLE5012B E1000/INF-PG-DSO-8-16M.PcbLib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLE5012B E1000/INF-PG-DSO-8-16M.PcbLib
--------------------------------------------------------------------------------
/docs/TLE5012B E1000/INF-PG-DSO-8-16N.PcbLib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLE5012B E1000/INF-PG-DSO-8-16N.PcbLib
--------------------------------------------------------------------------------
/docs/TLE5012B E1000/TLE5012B E1000.SchLib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLE5012B E1000/TLE5012B E1000.SchLib
--------------------------------------------------------------------------------
/docs/TLE5012B_Register_Setting_AN_Rev1.5 %28Chinese%29%28中文%29.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLE5012B_Register_Setting_AN_Rev1.5 %28Chinese%29%28中文%29.pdf
--------------------------------------------------------------------------------
/docs/TLP2168%28TP，F%29+编带_PDF_C99480_2018-04-17.PDF:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/TLP2168%28TP，F%29+编带_PDF_C99480_2018-04-17.PDF
--------------------------------------------------------------------------------
/docs/dc989f846bec0975f465e2e9.jpg:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/dc989f846bec0975f465e2e9.jpg
--------------------------------------------------------------------------------
/docs/en.DM00031936.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/en.DM00031936.pdf
--------------------------------------------------------------------------------
/docs/en.DM00129215.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/en.DM00129215.pdf
--------------------------------------------------------------------------------
/docs/en.SMPRES_STM32F0-L0_Discover-Webinar_A.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/en.SMPRES_STM32F0-L0_Discover-Webinar_A.pdf
--------------------------------------------------------------------------------
/docs/stm32f051k6.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/stm32f051k6.pdf
--------------------------------------------------------------------------------
/docs/基于iGMR原理角度传感器TLE5012B应用指导.pdf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/docs/基于iGMR原理角度传感器TLE5012B应用指导.pdf
--------------------------------------------------------------------------------
/firmware/.mxproject:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/.mxproject
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_f32.c
9 | *
10 | * Description: Floating-point PID Control initialization function
11 | *
12 | *
13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 | *
15 | * Redistribution and use in source and binary forms, with or without
16 | * modification, are permitted provided that the following conditions
17 | * are met:
18 | * - Redistributions of source code must retain the above copyright
19 | * notice, this list of conditions and the following disclaimer.
20 | * - Redistributions in binary form must reproduce the above copyright
21 | * notice, this list of conditions and the following disclaimer in
22 | * the documentation and/or other materials provided with the
23 | * distribution.
24 | * - Neither the name of ARM LIMITED nor the names of its contributors
25 | * may be used to endorse or promote products derived from this
26 | * software without specific prior written permission.
27 | *
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 | * POSSIBILITY OF SUCH DAMAGE.
40 | * ------------------------------------------------------------------- */
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @addtogroup PID
46 | * @{
47 | */
48 |
49 | /**
50 | * @brief Initialization function for the floating-point PID Control.
51 | * @param[in,out] *S points to an instance of the PID structure.
52 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state & 1 = reset the state.
53 | * @return none.
54 | * \par Description:
55 | * \par
56 | * The resetStateFlag specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0, A1 A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q31.c
9 | *
10 | * Description: Q31 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for the Q31 PID Control.
50 | * @param[in,out] *S points to an instance of the Q31 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0, A1 A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q31(
62 | arm_pid_instance_q31 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficient A1 */
74 | S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
75 |
76 |
77 | #else
78 |
79 | /* Run the below code for Cortex-M0 */
80 |
81 | q31_t temp;
82 |
83 | /* Derived coefficient A0 */
84 | temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
85 | S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
86 |
87 | /* Derived coefficient A1 */
88 | temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
89 | S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
90 |
91 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
92 |
93 | /* Derived coefficient A2 */
94 | S->A2 = S->Kd;
95 |
96 | /* Check whether state needs reset or not */
97 | if(resetStateFlag)
98 | {
99 | /* Clear the state buffer. The size will be always 3 samples */
100 | memset(S->state, 0, 3u * sizeof(q31_t));
101 | }
102 |
103 | }
104 |
105 | /**
106 | * @} end of PID group
107 | */
108 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q15.c
9 | *
10 | * Description: Fast cosine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q15_t arm_cos_q15(
63 | q15_t x)
64 | {
65 | q15_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q15_t a, b; /* Four nearest output values */
68 | q15_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint16_t)x + 0x2000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint16_t)x + 0x8000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q15[index];
85 | b = sinTable_q15[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q31_t)(0x8000-fract)*a >> 16;
89 | cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q31.c
9 | *
10 | * Description: Fast cosine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q31_t arm_cos_q31(
63 | q31_t x)
64 | {
65 | q31_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q31_t a, b; /* Four nearest output values */
68 | q31_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint32_t)x + 0x20000000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint32_t)x + 0x80000000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q31[index];
85 | b = sinTable_q31[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q63_t)(0x80000000-fract)*a >> 32;
89 | cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q15.c
9 | *
10 | * Description: Fast sine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
59 | */
60 |
61 | q15_t arm_sin_q15(
62 | q15_t x)
63 | {
64 | q15_t sinVal; /* Temporary variables for input, output */
65 | int32_t index; /* Index variables */
66 | q15_t a, b; /* Four nearest output values */
67 | q15_t fract; /* Temporary values for fractional values */
68 |
69 | /* Calculate the nearest index */
70 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
71 |
72 | /* Calculation of fractional value */
73 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
74 |
75 | /* Read two nearest values of input value from the sin table */
76 | a = sinTable_q15[index];
77 | b = sinTable_q15[index+1];
78 |
79 | /* Linear interpolation process */
80 | sinVal = (q31_t)(0x8000-fract)*a >> 16;
81 | sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
82 |
83 | return sinVal << 1;
84 | }
85 |
86 | /**
87 | * @} end of sin group
88 | */
89 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q31.c
9 | *
10 | * Description: Fast sine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
59 |
60 | q31_t arm_sin_q31(
61 | q31_t x)
62 | {
63 | q31_t sinVal; /* Temporary variables for input, output */
64 | int32_t index; /* Index variables */
65 | q31_t a, b; /* Four nearest output values */
66 | q31_t fract; /* Temporary values for fractional values */
67 |
68 | /* Calculate the nearest index */
69 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
70 |
71 | /* Calculation of fractional value */
72 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
73 |
74 | /* Read two nearest values of input value from the sin table */
75 | a = sinTable_q31[index];
76 | b = sinTable_q31[index+1];
77 |
78 | /* Linear interpolation process */
79 | sinVal = (q63_t)(0x80000000-fract)*a >> 32;
80 | sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
81 |
82 | return sinVal << 1;
83 | }
84 |
85 | /**
86 | * @} end of sin group
87 | */
88 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_f32.c
9 | *
10 | * Description: Floating-point FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
71 | */
72 |
73 | void arm_fir_init_f32(
74 | arm_fir_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q31.c
9 | *
10 | * Description: Q31 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
65 | *
66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
67 | *
68 | * \par
69 | * pState points to the array of state variables.
70 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().
71 | */
72 |
73 | void arm_fir_init_q31(
74 | arm_fir_instance_q31 * S,
75 | uint16_t numTaps,
76 | q31_t * pCoeffs,
77 | q31_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * \par
66 | * pState points to the array of state variables.
67 | * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_f32.c
9 | *
10 | * Description: Floating-point LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup LMS
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for floating-point LMS filter.
50 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
51 | * @param[in] numTaps number of filter coefficients.
52 | * @param[in] *pCoeffs points to the coefficient buffer.
53 | * @param[in] *pState points to state buffer.
54 | * @param[in] mu step size that controls filter coefficient updates.
55 | * @param[in] blockSize number of samples to process.
56 | * @return none.
57 | */
58 |
59 | /**
60 | * \par Description:
61 | * pCoeffs points to the array of filter coefficients stored in time reversed order:
62 | *
63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
64 | *
65 | * The initial filter coefficients serve as a starting point for the adaptive filter.
66 | * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().
67 | */
68 |
69 | void arm_lms_init_f32(
70 | arm_lms_instance_f32 * S,
71 | uint16_t numTaps,
72 | float32_t * pCoeffs,
73 | float32_t * pState,
74 | float32_t mu,
75 | uint32_t blockSize)
76 | {
77 | /* Assign filter taps */
78 | S->numTaps = numTaps;
79 |
80 | /* Assign coefficient pointer */
81 | S->pCoeffs = pCoeffs;
82 |
83 | /* Clear state buffer and size is always blockSize + numTaps */
84 | memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
85 |
86 | /* Assign state pointer */
87 | S->pState = pState;
88 |
89 | /* Assign Step size value */
90 | S->mu = mu;
91 | }
92 |
93 | /**
94 | * @} end of LMS group
95 | */
96 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows,
52 | * numCols, and pData fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q15.c
9 | *
10 | * Description: Copies the elements of a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 | /**
52 | * @brief Copies the elements of a Q15 vector.
53 | * @param[in] *pSrc points to input vector
54 | * @param[out] *pDst points to output vector
55 | * @param[in] blockSize length of the input vector
56 | * @return none.
57 | *
58 | */
59 |
60 | void arm_copy_q15(
61 | q15_t * pSrc,
62 | q15_t * pDst,
63 | uint32_t blockSize)
64 | {
65 | uint32_t blkCnt; /* loop counter */
66 |
67 | #ifndef ARM_MATH_CM0_FAMILY
68 |
69 | /* Run the below code for Cortex-M4 and Cortex-M3 */
70 |
71 | /*loop Unrolling */
72 | blkCnt = blockSize >> 2u;
73 |
74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 | ** a second loop below computes the remaining 1 to 3 samples. */
76 | while(blkCnt > 0u)
77 | {
78 | /* C = A */
79 | /* Read two inputs */
80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
82 |
83 | /* Decrement the loop counter */
84 | blkCnt--;
85 | }
86 |
87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 | ** No loop unrolling is used. */
89 | blkCnt = blockSize % 0x4u;
90 |
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 | while(blkCnt > 0u)
102 | {
103 | /* C = A */
104 | /* Copy and then store the value in the destination buffer */
105 | *pDst++ = *pSrc++;
106 |
107 | /* Decrement the loop counter */
108 | blkCnt--;
109 | }
110 | }
111 |
112 | /**
113 | * @} end of BasicCopy group
114 | */
115 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q31.c
9 | *
10 | * Description: Copies the elements of a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q31 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q31(
62 | q31_t * pSrc,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1, in2, in3, in4;
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
78 | ** a second loop below computes the remaining 1 to 3 samples. */
79 | while(blkCnt > 0u)
80 | {
81 | /* C = A */
82 | /* Copy and then store the values in the destination buffer */
83 | in1 = *pSrc++;
84 | in2 = *pSrc++;
85 | in3 = *pSrc++;
86 | in4 = *pSrc++;
87 |
88 | *pDst++ = in1;
89 | *pDst++ = in2;
90 | *pDst++ = in3;
91 | *pDst++ = in4;
92 |
93 | /* Decrement the loop counter */
94 | blkCnt--;
95 | }
96 |
97 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
98 | ** No loop unrolling is used. */
99 | blkCnt = blockSize % 0x4u;
100 |
101 | #else
102 |
103 | /* Run the below code for Cortex-M0 */
104 |
105 | /* Loop over blockSize number of values */
106 | blkCnt = blockSize;
107 |
108 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
109 |
110 | while(blkCnt > 0u)
111 | {
112 | /* C = A */
113 | /* Copy and then store the value in the destination buffer */
114 | *pDst++ = *pSrc++;
115 |
116 | /* Decrement the loop counter */
117 | blkCnt--;
118 | }
119 | }
120 |
121 | /**
122 | * @} end of BasicCopy group
123 | */
124 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q7.c
9 | *
10 | * Description: Copies the elements of a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q7 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q7(
62 | q7_t * pSrc,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | /*loop Unrolling */
73 | blkCnt = blockSize >> 2u;
74 |
75 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
76 | ** a second loop below computes the remaining 1 to 3 samples. */
77 | while(blkCnt > 0u)
78 | {
79 | /* C = A */
80 | /* Copy and then store the results in the destination buffer */
81 | /* 4 samples are copied and stored at a time using SIMD */
82 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
83 |
84 | /* Decrement the loop counter */
85 | blkCnt--;
86 | }
87 |
88 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 | ** No loop unrolling is used. */
90 | blkCnt = blockSize % 0x4u;
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 |
102 | while(blkCnt > 0u)
103 | {
104 | /* C = A */
105 | /* Copy and then store the results in the destination buffer */
106 | *pDst++ = *pSrc++;
107 |
108 | /* Decrement the loop counter */
109 | blkCnt--;
110 | }
111 | }
112 |
113 | /**
114 | * @} end of BasicCopy group
115 | */
116 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q31.c
9 | *
10 | * Description: Fills a constant value into a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q31 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q31(
62 | q31_t value,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1 = value;
73 | q31_t in2 = value;
74 | q31_t in3 = value;
75 | q31_t in4 = value;
76 |
77 | /*loop Unrolling */
78 | blkCnt = blockSize >> 2u;
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *pDst++ = in1;
87 | *pDst++ = in2;
88 | *pDst++ = in3;
89 | *pDst++ = in4;
90 |
91 | /* Decrement the loop counter */
92 | blkCnt--;
93 | }
94 |
95 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
96 | ** No loop unrolling is used. */
97 | blkCnt = blockSize % 0x4u;
98 |
99 | #else
100 |
101 | /* Run the below code for Cortex-M0 */
102 |
103 | /* Loop over blockSize number of values */
104 | blkCnt = blockSize;
105 |
106 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
107 |
108 | while(blkCnt > 0u)
109 | {
110 | /* C = value */
111 | /* Fill the value in the destination buffer */
112 | *pDst++ = value;
113 |
114 | /* Decrement the loop counter */
115 | blkCnt--;
116 | }
117 | }
118 |
119 | /**
120 | * @} end of Fill group
121 | */
122 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x6.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030xc.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030xc.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f031x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f031x6.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f038xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f038xx.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f042x6.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f048xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f048xx.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f051x8.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f051x8.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f058xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f058xx.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f070x6.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f070x6.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f070xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f070xb.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f071xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f071xb.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f078xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f078xx.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f091xc.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f091xc.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f098xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f098xx.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f0xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /** @addtogroup CMSIS
37 | * @{
38 | */
39 |
40 | /** @addtogroup stm32f0xx_system
41 | * @{
42 | */
43 |
44 | /**
45 | * @brief Define to prevent recursive inclusion
46 | */
47 | #ifndef __SYSTEM_STM32F0XX_H
48 | #define __SYSTEM_STM32F0XX_H
49 |
50 | #ifdef __cplusplus
51 | extern "C" {
52 | #endif
53 |
54 | /** @addtogroup STM32F0xx_System_Includes
55 | * @{
56 | */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 |
63 | /** @addtogroup STM32F0xx_System_Exported_types
64 | * @{
65 | */
66 | /* This variable is updated in three ways:
67 | 1) by calling CMSIS function SystemCoreClockUpdate()
68 | 3) by calling HAL API function HAL_RCC_GetHCLKFreq()
69 | 3) by calling HAL API function HAL_RCC_ClockConfig()
70 | Note: If you use this function to configure the system clock; then there
71 | is no need to call the 2 first functions listed above, since SystemCoreClock
72 | variable is updated automatically.
73 | */
74 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
75 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
76 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
77 |
78 | /**
79 | * @}
80 | */
81 |
82 | /** @addtogroup STM32F0xx_System_Exported_Constants
83 | * @{
84 | */
85 |
86 | /**
87 | * @}
88 | */
89 |
90 | /** @addtogroup STM32F0xx_System_Exported_Macros
91 | * @{
92 | */
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | /** @addtogroup STM32F0xx_System_Exported_Functions
99 | * @{
100 | */
101 |
102 | extern void SystemInit(void);
103 | extern void SystemCoreClockUpdate(void);
104 | /**
105 | * @}
106 | */
107 |
108 | #ifdef __cplusplus
109 | }
110 | #endif
111 |
112 | #endif /*__SYSTEM_STM32F0XX_H */
113 |
114 | /**
115 | * @}
116 | */
117 |
118 | /**
119 | * @}
120 | */
121 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
122 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f030x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f030x8_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f030xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f031x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f038xx_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20000FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f042x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f048xx_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f051x8_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f058xx_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0800FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f070x6_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f070xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f072xb_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f078xx_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f091xc_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f091xc_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20003FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20004000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f098xx_flash.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 | define memory mem with size = 4G;
17 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
18 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
19 |
20 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
21 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
22 |
23 | initialize by copy { readwrite };
24 | do not initialize { section .noinit };
25 |
26 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
27 |
28 | place in ROM_region { readonly };
29 | place in RAM_region { readwrite,
30 | block CSTACK, block HEAP };
31 |
32 | export symbol __ICFEDIT_region_RAM_start__;
33 | export symbol __ICFEDIT_region_RAM_end__;
34 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f098xx_sram.icf:
--------------------------------------------------------------------------------
1 | /*###ICF### Section handled by ICF editor, don't touch! ****/
2 | /*-Editor annotation file-*/
3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4 | /*-Specials-*/
5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000;
6 | /*-Memory Regions-*/
7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ;
8 | define symbol __ICFEDIT_region_ROM_end__ = 0x20003FFF;
9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20004000;
10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
11 | /*-Sizes-*/
12 | define symbol __ICFEDIT_size_cstack__ = 0x400;
13 | define symbol __ICFEDIT_size_heap__ = 0x200;
14 | /**** End of ICF editor section. ###ICF###*/
15 |
16 |
17 | define memory mem with size = 4G;
18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
20 |
21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
23 |
24 | initialize by copy { readwrite };
25 | do not initialize { section .noinit };
26 |
27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
28 |
29 | place in ROM_region { readonly };
30 | place in RAM_region { readwrite,
31 | block CSTACK, block HEAP };
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Include/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
58 |
59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
68 |
69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
78 |
79 | #endif
80 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Include/core_cmFunc.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmFunc.h
3 | * @brief CMSIS Cortex-M Core Function Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMFUNC_H
42 | #define __CORE_CMFUNC_H
43 |
44 |
45 | /* ########################### Core Function Access ########################### */
46 | /** \ingroup CMSIS_Core_FunctionInterface
47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@} end of CMSIS_Core_RegAccFunctions */
86 |
87 | #endif /* __CORE_CMFUNC_H */
88 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Include/core_cmInstr.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmInstr.h
3 | * @brief CMSIS Cortex-M Core Instruction Access Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMINSTR_H
42 | #define __CORE_CMINSTR_H
43 |
44 |
45 | /* ########################## Core Instruction Access ######################### */
46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
47 | Access to dedicated instructions
48 | @{
49 | */
50 |
51 | /*------------------ RealView Compiler -----------------*/
52 | #if defined ( __CC_ARM )
53 | #include "cmsis_armcc.h"
54 |
55 | /*------------------ ARM Compiler V6 -------------------*/
56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
57 | #include "cmsis_armcc_V6.h"
58 |
59 | /*------------------ GNU Compiler ----------------------*/
60 | #elif defined ( __GNUC__ )
61 | #include "cmsis_gcc.h"
62 |
63 | /*------------------ ICC Compiler ----------------------*/
64 | #elif defined ( __ICCARM__ )
65 | #include
66 |
67 | /*------------------ TI CCS Compiler -------------------*/
68 | #elif defined ( __TMS470__ )
69 | #include
70 |
71 | /*------------------ TASKING Compiler ------------------*/
72 | #elif defined ( __TASKING__ )
73 | /*
74 | * The CMSIS functions have been implemented as intrinsics in the compiler.
75 | * Please use "carm -?i" to get an up to date list of all intrinsics,
76 | * Including the CMSIS ones.
77 | */
78 |
79 | /*------------------ COSMIC Compiler -------------------*/
80 | #elif defined ( __CSMC__ )
81 | #include
82 |
83 | #endif
84 |
85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
86 |
87 | #endif /* __CORE_CMINSTR_H */
88 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Include/core_cmSimd.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file core_cmSimd.h
3 | * @brief CMSIS Cortex-M SIMD Header File
4 | * @version V4.30
5 | * @date 20. October 2015
6 | ******************************************************************************/
7 | /* Copyright (c) 2009 - 2015 ARM LIMITED
8 |
9 | All rights reserved.
10 | Redistribution and use in source and binary forms, with or without
11 | modification, are permitted provided that the following conditions are met:
12 | - Redistributions of source code must retain the above copyright
13 | notice, this list of conditions and the following disclaimer.
14 | - Redistributions in binary form must reproduce the above copyright
15 | notice, this list of conditions and the following disclaimer in the
16 | documentation and/or other materials provided with the distribution.
17 | - Neither the name of ARM nor the names of its contributors may be used
18 | to endorse or promote products derived from this software without
19 | specific prior written permission.
20 | *
21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 | POSSIBILITY OF SUCH DAMAGE.
32 | ---------------------------------------------------------------------------*/
33 |
34 |
35 | #if defined ( __ICCARM__ )
36 | #pragma system_include /* treat file as system include file for MISRA check */
37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
38 | #pragma clang system_header /* treat file as system include file */
39 | #endif
40 |
41 | #ifndef __CORE_CMSIMD_H
42 | #define __CORE_CMSIMD_H
43 |
44 | #ifdef __cplusplus
45 | extern "C" {
46 | #endif
47 |
48 |
49 | /* ################### Compiler specific Intrinsics ########################### */
50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
51 | Access to dedicated SIMD instructions
52 | @{
53 | */
54 |
55 | /*------------------ RealView Compiler -----------------*/
56 | #if defined ( __CC_ARM )
57 | #include "cmsis_armcc.h"
58 |
59 | /*------------------ ARM Compiler V6 -------------------*/
60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
61 | #include "cmsis_armcc_V6.h"
62 |
63 | /*------------------ GNU Compiler ----------------------*/
64 | #elif defined ( __GNUC__ )
65 | #include "cmsis_gcc.h"
66 |
67 | /*------------------ ICC Compiler ----------------------*/
68 | #elif defined ( __ICCARM__ )
69 | #include
70 |
71 | /*------------------ TI CCS Compiler -------------------*/
72 | #elif defined ( __TMS470__ )
73 | #include
74 |
75 | /*------------------ TASKING Compiler ------------------*/
76 | #elif defined ( __TASKING__ )
77 | /*
78 | * The CMSIS functions have been implemented as intrinsics in the compiler.
79 | * Please use "carm -?i" to get an up to date list of all intrinsics,
80 | * Including the CMSIS ones.
81 | */
82 |
83 | /*------------------ COSMIC Compiler -------------------*/
84 | #elif defined ( __CSMC__ )
85 | #include
86 |
87 | #endif
88 |
89 | /*@} end of group CMSIS_SIMD_intrinsics */
90 |
91 |
92 | #ifdef __cplusplus
93 | }
94 | #endif
95 |
96 | #endif /* __CORE_CMSIMD_H */
97 |
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Lib/ARM/arm_cortexM0b_math.lib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Lib/ARM/arm_cortexM0b_math.lib
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Lib/ARM/arm_cortexM0l_math.lib:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Lib/ARM/arm_cortexM0l_math.lib
--------------------------------------------------------------------------------
/firmware/Drivers/CMSIS/Lib/GCC/libarm_cortexM0l_math.a:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/CMSIS/Lib/GCC/libarm_cortexM0l_math.a
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Inc/stm32_assert_template.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32_assert.h
4 | * @author MCD Application Team
5 | * @brief STM32 assert template file.
6 | * This file should be copied to the application folder and renamed
7 | * to stm32_assert.h.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT(c) 2016 STMicroelectronics
12 | *
13 | * Redistribution and use in source and binary forms, with or without modification,
14 | * are permitted provided that the following conditions are met:
15 | * 1. Redistributions of source code must retain the above copyright notice,
16 | * this list of conditions and the following disclaimer.
17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
18 | * this list of conditions and the following disclaimer in the documentation
19 | * and/or other materials provided with the distribution.
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 | * may be used to endorse or promote products derived from this software
22 | * without specific prior written permission.
23 | *
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 | *
35 | ******************************************************************************
36 | */
37 |
38 | /* Define to prevent recursive inclusion -------------------------------------*/
39 | #ifndef __STM32_ASSERT_H
40 | #define __STM32_ASSERT_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /* Exported types ------------------------------------------------------------*/
47 | /* Exported constants --------------------------------------------------------*/
48 | /* Includes ------------------------------------------------------------------*/
49 | /* Exported macro ------------------------------------------------------------*/
50 | #ifdef USE_FULL_ASSERT
51 | /**
52 | * @brief The assert_param macro is used for function's parameters check.
53 | * @param expr If expr is false, it calls assert_failed function
54 | * which reports the name of the source file and the source
55 | * line number of the call that failed.
56 | * If expr is true, it returns no value.
57 | * @retval None
58 | */
59 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
60 | /* Exported functions ------------------------------------------------------- */
61 | void assert_failed(char* file, uint32_t line);
62 | #else
63 | #define assert_param(expr) ((void)0U)
64 | #endif /* USE_FULL_ASSERT */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 |
70 | #endif /* __STM32_ASSERT_H */
71 |
72 |
73 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
74 |
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_hal_pcd_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of PCD HAL Extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F0xx_HAL_PCD_EX_H
38 | #define __STM32F0xx_HAL_PCD_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx)|| defined(STM32F070xB)|| defined(STM32F070x6)
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f0xx_hal_def.h"
48 |
49 | /** @addtogroup STM32F0xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @addtogroup PCDEx
54 | * @{
55 | */
56 |
57 | /* Exported types ------------------------------------------------------------*/
58 | /* Exported constants --------------------------------------------------------*/
59 | /* Exported macros -----------------------------------------------------------*/
60 | /* Internal macros -----------------------------------------------------------*/
61 | /* Exported functions --------------------------------------------------------*/
62 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
63 | * @{
64 | */
65 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
66 | * @{
67 | */
68 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
69 | uint16_t ep_addr,
70 | uint16_t ep_kind,
71 | uint32_t pmaadress);
72 | /**
73 | * @}
74 | */
75 |
76 | /**
77 | * @}
78 | */
79 |
80 | /**
81 | * @}
82 | */
83 |
84 | /**
85 | * @}
86 | */
87 |
88 | #endif /* STM32F042x6 || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6*/
89 |
90 | #ifdef __cplusplus
91 | }
92 | #endif
93 |
94 |
95 | #endif /* __STM32F0xx_HAL_PCD_EX_H */
96 |
97 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
98 |
99 |
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_hal_spi_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of SPI HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /* Define to prevent recursive inclusion -------------------------------------*/
37 | #ifndef __STM32F0xx_HAL_SPI_EX_H
38 | #define __STM32F0xx_HAL_SPI_EX_H
39 |
40 | #ifdef __cplusplus
41 | extern "C" {
42 | #endif
43 |
44 | /* Includes ------------------------------------------------------------------*/
45 | #include "stm32f0xx_hal_def.h"
46 |
47 | /** @addtogroup STM32F0xx_HAL_Driver
48 | * @{
49 | */
50 |
51 | /** @addtogroup SPIEx
52 | * @{
53 | */
54 |
55 | /* Exported types ------------------------------------------------------------*/
56 | /* Exported constants --------------------------------------------------------*/
57 | /* Exported macros -----------------------------------------------------------*/
58 | /* Exported functions --------------------------------------------------------*/
59 | /** @addtogroup SPIEx_Exported_Functions
60 | * @{
61 | */
62 |
63 | /* Initialization and de-initialization functions ****************************/
64 | /* IO operation functions *****************************************************/
65 | /** @addtogroup SPIEx_Exported_Functions_Group1
66 | * @{
67 | */
68 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /**
82 | * @}
83 | */
84 |
85 | #ifdef __cplusplus
86 | }
87 | #endif
88 |
89 | #endif /* __STM32F0xx_HAL_SPI_EX_H */
90 |
91 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
92 |
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_msp_template.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_hal_msp_template.c
4 | * @author MCD Application Team
5 | * @brief HAL MSP module.
6 | * This file template is located in the HAL folder and should be copied
7 | * to the user folder.
8 | *
9 | @verbatim
10 | ===============================================================================
11 | ##### How to use this driver #####
12 | ===============================================================================
13 | [..]
14 |
15 | @endverbatim
16 | ******************************************************************************
17 | * @attention
18 | *
19 | * © COPYRIGHT(c) 2016 STMicroelectronics
20 | *
21 | * Redistribution and use in source and binary forms, with or without modification,
22 | * are permitted provided that the following conditions are met:
23 | * 1. Redistributions of source code must retain the above copyright notice,
24 | * this list of conditions and the following disclaimer.
25 | * 2. Redistributions in binary form must reproduce the above copyright notice,
26 | * this list of conditions and the following disclaimer in the documentation
27 | * and/or other materials provided with the distribution.
28 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
29 | * may be used to endorse or promote products derived from this software
30 | * without specific prior written permission.
31 | *
32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
36 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
38 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
39 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
40 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
41 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 | *
43 | ******************************************************************************
44 | */
45 |
46 | /* Includes ------------------------------------------------------------------*/
47 | #include "stm32f0xx_hal.h"
48 |
49 | /** @addtogroup STM32F0xx_HAL_Driver
50 | * @{
51 | */
52 |
53 | /** @defgroup HAL_MSP HAL MSP module driver
54 | * @brief HAL MSP module.
55 | * @{
56 | */
57 |
58 | /* Private typedef -----------------------------------------------------------*/
59 | /* Private define ------------------------------------------------------------*/
60 | /* Private macro -------------------------------------------------------------*/
61 | /* Private variables ---------------------------------------------------------*/
62 | /* Private function prototypes -----------------------------------------------*/
63 | /* Private functions ---------------------------------------------------------*/
64 |
65 | /** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions
66 | * @{
67 | */
68 |
69 | /**
70 | * @brief Initializes the Global MSP.
71 | * @retval None
72 | */
73 | void HAL_MspInit(void)
74 | {
75 |
76 | }
77 |
78 | /**
79 | * @brief DeInitializes the Global MSP.
80 | * @retval None
81 | */
82 | void HAL_MspDeInit(void)
83 | {
84 |
85 | }
86 |
87 | /**
88 | * @brief Initializes the PPP MSP.
89 | * @retval None
90 | */
91 | void HAL_PPP_MspInit(void)
92 | {
93 |
94 | }
95 |
96 | /**
97 | * @brief DeInitializes the PPP MSP.
98 | * @retval None
99 | */
100 | void HAL_PPP_MspDeInit(void)
101 | {
102 |
103 | }
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /**
110 | * @}
111 | */
112 |
113 | /**
114 | * @}
115 | */
116 |
117 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
118 |
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_alarm_template.c
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_timebase_rtc_wakeup_template.c
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_crs.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_ll_crs.h
4 | * @author MCD Application Team
5 | * @brief CRS LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 | #if defined(USE_FULL_LL_DRIVER)
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx_ll_crs.h"
39 | #include "stm32f0xx_ll_bus.h"
40 |
41 | /** @addtogroup STM32F0xx_LL_Driver
42 | * @{
43 | */
44 |
45 | #if defined(CRS)
46 |
47 | /** @defgroup CRS_LL CRS
48 | * @{
49 | */
50 |
51 | /* Private types -------------------------------------------------------------*/
52 | /* Private variables ---------------------------------------------------------*/
53 | /* Private constants ---------------------------------------------------------*/
54 | /* Private macros ------------------------------------------------------------*/
55 | /* Private function prototypes -----------------------------------------------*/
56 |
57 | /* Exported functions --------------------------------------------------------*/
58 | /** @addtogroup CRS_LL_Exported_Functions
59 | * @{
60 | */
61 |
62 | /** @addtogroup CRS_LL_EF_Init
63 | * @{
64 | */
65 |
66 | /**
67 | * @brief De-Initializes CRS peripheral registers to their default reset values.
68 | * @retval An ErrorStatus enumeration value:
69 | * - SUCCESS: CRS registers are de-initialized
70 | * - ERROR: not applicable
71 | */
72 | ErrorStatus LL_CRS_DeInit(void)
73 | {
74 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_CRS);
75 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_CRS);
76 |
77 | return SUCCESS;
78 | }
79 |
80 |
81 |
82 | /**
83 | * @}
84 | */
85 |
86 | /**
87 | * @}
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | #endif /* defined(CRS) */
95 |
96 | /**
97 | * @}
98 | */
99 |
100 | #endif /* USE_FULL_LL_DRIVER */
101 |
102 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
103 |
--------------------------------------------------------------------------------
/firmware/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_ll_pwr.c
4 | * @author MCD Application Team
5 | * @brief PWR LL module driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2016 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 | #if defined(USE_FULL_LL_DRIVER)
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx_ll_pwr.h"
39 | #include "stm32f0xx_ll_bus.h"
40 |
41 | /** @addtogroup STM32F0xx_LL_Driver
42 | * @{
43 | */
44 |
45 | #if defined(PWR)
46 |
47 | /** @defgroup PWR_LL PWR
48 | * @{
49 | */
50 |
51 | /* Private types -------------------------------------------------------------*/
52 | /* Private variables ---------------------------------------------------------*/
53 | /* Private constants ---------------------------------------------------------*/
54 | /* Private macros ------------------------------------------------------------*/
55 | /* Private function prototypes -----------------------------------------------*/
56 |
57 | /* Exported functions --------------------------------------------------------*/
58 | /** @addtogroup PWR_LL_Exported_Functions
59 | * @{
60 | */
61 |
62 | /** @addtogroup PWR_LL_EF_Init
63 | * @{
64 | */
65 |
66 | /**
67 | * @brief De-initialize the PWR registers to their default reset values.
68 | * @retval An ErrorStatus enumeration value:
69 | * - SUCCESS: PWR registers are de-initialized
70 | * - ERROR: not applicable
71 | */
72 | ErrorStatus LL_PWR_DeInit(void)
73 | {
74 | /* Force reset of PWR clock */
75 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR);
76 |
77 | /* Release reset of PWR clock */
78 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR);
79 |
80 | return SUCCESS;
81 | }
82 |
83 | /**
84 | * @}
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /**
92 | * @}
93 | */
94 | #endif /* defined(PWR) */
95 | /**
96 | * @}
97 | */
98 |
99 | #endif /* USE_FULL_LL_DRIVER */
100 |
101 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
102 |
--------------------------------------------------------------------------------
/firmware/Inc/stm32_assert.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32_assert.h
4 | * @brief STM32 assert file.
5 | ******************************************************************************
6 | ** This notice applies to any and all portions of this file
7 | * that are not between comment pairs USER CODE BEGIN and
8 | * USER CODE END. Other portions of this file, whether
9 | * inserted by the user or by software development tools
10 | * are owned by their respective copyright owners.
11 | *
12 | * COPYRIGHT(c) 2019 STMicroelectronics
13 | *
14 | * Redistribution and use in source and binary forms, with or without modification,
15 | * are permitted provided that the following conditions are met:
16 | * 1. Redistributions of source code must retain the above copyright notice,
17 | * this list of conditions and the following disclaimer.
18 | * 2. Redistributions in binary form must reproduce the above copyright notice,
19 | * this list of conditions and the following disclaimer in the documentation
20 | * and/or other materials provided with the distribution.
21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
22 | * may be used to endorse or promote products derived from this software
23 | * without specific prior written permission.
24 | *
25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 | *
36 | ******************************************************************************
37 | */
38 |
39 | /* Define to prevent recursive inclusion -------------------------------------*/
40 | #ifndef __STM32_ASSERT_H
41 | #define __STM32_ASSERT_H
42 |
43 | #ifdef __cplusplus
44 | extern "C" {
45 | #endif
46 |
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 | /* Includes ------------------------------------------------------------------*/
50 | /* Exported macro ------------------------------------------------------------*/
51 | #ifdef USE_FULL_ASSERT
52 | /**
53 | * @brief The assert_param macro is used for function's parameters check.
54 | * @param expr: If expr is false, it calls assert_failed function
55 | * which reports the name of the source file and the source
56 | * line number of the call that failed.
57 | * If expr is true, it returns no value.
58 | * @retval None
59 | */
60 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
61 | /* Exported functions ------------------------------------------------------- */
62 | void assert_failed(uint8_t* file, uint32_t line);
63 | #else
64 | #define assert_param(expr) ((void)0U)
65 | #endif /* USE_FULL_ASSERT */
66 |
67 | #ifdef __cplusplus
68 | }
69 | #endif
70 |
71 | #endif /* __STM32_ASSERT_H */
72 |
73 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
74 |
--------------------------------------------------------------------------------
/firmware/Inc/stm32f0xx_it.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_it.h
4 | * @brief This file contains the headers of the interrupt handlers.
5 | ******************************************************************************
6 | *
7 | * COPYRIGHT(c) 2019 STMicroelectronics
8 | *
9 | * Redistribution and use in source and binary forms, with or without modification,
10 | * are permitted provided that the following conditions are met:
11 | * 1. Redistributions of source code must retain the above copyright notice,
12 | * this list of conditions and the following disclaimer.
13 | * 2. Redistributions in binary form must reproduce the above copyright notice,
14 | * this list of conditions and the following disclaimer in the documentation
15 | * and/or other materials provided with the distribution.
16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
17 | * may be used to endorse or promote products derived from this software
18 | * without specific prior written permission.
19 | *
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 | *
31 | ******************************************************************************
32 | */
33 |
34 | /* Define to prevent recursive inclusion -------------------------------------*/
35 | #ifndef __STM32F0xx_IT_H
36 | #define __STM32F0xx_IT_H
37 |
38 | #ifdef __cplusplus
39 | extern "C" {
40 | #endif
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f0xx_ll_system.h"
44 | #include "stm32f0xx_ll_gpio.h"
45 | #include "stm32f0xx_ll_exti.h"
46 | #include "main.h"
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 | /* Exported macro ------------------------------------------------------------*/
50 | /* Exported functions ------------------------------------------------------- */
51 |
52 | void NMI_Handler(void);
53 | void HardFault_Handler(void);
54 | void SVC_Handler(void);
55 | void PendSV_Handler(void);
56 | void SysTick_Handler(void);
57 | void EXTI0_1_IRQHandler(void);
58 | void EXTI2_3_IRQHandler(void);
59 | void TIM6_IRQHandler(void);
60 |
61 | #ifdef __cplusplus
62 | }
63 | #endif
64 |
65 | #endif /* __STM32F0xx_IT_H */
66 |
67 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
68 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/ExtDll.iex:
--------------------------------------------------------------------------------
1 | [EXTDLL]
2 | Count=0
3 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/ITEM.axf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/ITEM.axf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/ITEM.build_log.htm:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/ITEM.build_log.htm
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/ITEM.lnp:
--------------------------------------------------------------------------------
1 | --cpu Cortex-M0
2 | "item\startup_stm32f030x8.o"
3 | "item\stm32f0xx_it.o"
4 | "item\main.o"
5 | "item\system_stm32f0xx.o"
6 | "item\stm32f0xx_ll_tim.o"
7 | "item\stm32f0xx_ll_pwr.o"
8 | "item\stm32f0xx_ll_spi.o"
9 | "item\stm32f0xx_ll_dma.o"
10 | "item\stm32f0xx_ll_rcc.o"
11 | "item\stm32f0xx_ll_usart.o"
12 | "item\stm32f0xx_ll_exti.o"
13 | "item\stm32f0xx_ll_gpio.o"
14 | "item\stm32f0xx_ll_utils.o"
15 | --library_type=microlib --strict --scatter "ITEM\ITEM.sct"
16 | --summary_stderr --info summarysizes --map --xref --callgraph --symbols
17 | --info sizes --info totals --info unused --info veneers
18 | --list "ITEM.map" -o ITEM\ITEM.axf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/ITEM.sct:
--------------------------------------------------------------------------------
1 | ; *************************************************************
2 | ; *** Scatter-Loading Description File generated by uVision ***
3 | ; *************************************************************
4 |
5 | LR_IROM1 0x08000000 0x00010000 { ; load region size_region
6 | ER_IROM1 0x08000000 0x00010000 { ; load address = execution address
7 | *.o (RESET, +First)
8 | *(InRoot$$Sections)
9 | .ANY (+RO)
10 | }
11 | RW_IRAM1 0x20000000 0x00002000 { ; RW data
12 | .ANY (+RW +ZI)
13 | }
14 | }
15 |
16 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/ITEM_ITEM.dep:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/ITEM_ITEM.dep
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/main.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/main.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/main.d:
--------------------------------------------------------------------------------
1 | item\main.o: ../Src/main.c
2 | item\main.o: ../Inc/main.h
3 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_iwdg.h
4 | item\main.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
5 | item\main.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
6 | item\main.o: ../Drivers/CMSIS/Include/core_cm0.h
7 | item\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
8 | item\main.o: ../Drivers/CMSIS/Include/core_cmInstr.h
9 | item\main.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
10 | item\main.o: ../Drivers/CMSIS/Include/core_cmFunc.h
11 | item\main.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
12 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h
13 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h
14 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
15 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h
16 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h
17 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h
18 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h
19 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h
20 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h
21 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_spi.h
22 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h
23 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h
24 | item\main.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h
25 | item\main.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
26 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/main.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/main.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/startup_stm32f030x8.d:
--------------------------------------------------------------------------------
1 | item\startup_stm32f030x8.o: startup_stm32f030x8.s
2 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/startup_stm32f030x8.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/startup_stm32f030x8.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_it.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_it.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_it.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_it.o: ../Src/stm32f0xx_it.c
2 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
3 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
4 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Include/core_cm0.h
5 | item\stm32f0xx_it.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Include/core_cmInstr.h
7 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
8 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Include/core_cmFunc.h
9 | item\stm32f0xx_it.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
10 | item\stm32f0xx_it.o: ../Inc/stm32f0xx_it.h
11 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h
12 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h
13 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h
14 | item\stm32f0xx_it.o: ../Inc/main.h
15 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_iwdg.h
16 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h
17 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h
18 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
19 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h
20 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h
21 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h
22 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h
23 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_spi.h
24 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h
25 | item\stm32f0xx_it.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h
26 | item\stm32f0xx_it.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
27 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_it.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_it.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_dma.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_dma.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_dma.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_dma.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c
2 | item\stm32f0xx_ll_dma.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h
3 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_dma.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_dma.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_dma.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
12 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_dma.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_dma.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_exti.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_exti.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_exti.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_exti.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c
2 | item\stm32f0xx_ll_exti.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h
3 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_exti.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_exti.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_exti.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_exti.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_gpio.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_gpio.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_gpio.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_gpio.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c
2 | item\stm32f0xx_ll_gpio.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h
3 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_gpio.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_gpio.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_gpio.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
12 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_gpio.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_gpio.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_pwr.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_pwr.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_pwr.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_pwr.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c
2 | item\stm32f0xx_ll_pwr.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h
3 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_pwr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_pwr.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_pwr.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
12 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_pwr.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_pwr.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_rcc.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_rcc.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_rcc.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_rcc.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c
2 | item\stm32f0xx_ll_rcc.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h
3 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_rcc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_rcc.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_rcc.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_rcc.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_spi.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_spi.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_spi.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_spi.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_spi.c
2 | item\stm32f0xx_ll_spi.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_spi.h
3 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_spi.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_spi.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_spi.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
12 | item\stm32f0xx_ll_spi.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h
13 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_spi.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_spi.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_tim.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_tim.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_tim.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_tim.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c
2 | item\stm32f0xx_ll_tim.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h
3 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_tim.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_tim.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_tim.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
12 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_tim.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_tim.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_usart.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_usart.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_usart.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_usart.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c
2 | item\stm32f0xx_ll_usart.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h
3 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_usart.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_usart.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_usart.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h
12 | item\stm32f0xx_ll_usart.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h
13 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_usart.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_usart.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_utils.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_utils.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_utils.d:
--------------------------------------------------------------------------------
1 | item\stm32f0xx_ll_utils.o: ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c
2 | item\stm32f0xx_ll_utils.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h
3 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
4 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
5 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Include/core_cm0.h
6 | item\stm32f0xx_ll_utils.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
7 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Include/core_cmInstr.h
8 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
9 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Include/core_cmFunc.h
10 | item\stm32f0xx_ll_utils.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
11 | item\stm32f0xx_ll_utils.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h
12 | item\stm32f0xx_ll_utils.o: ../Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h
13 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/stm32f0xx_ll_utils.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/stm32f0xx_ll_utils.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/system_stm32f0xx.crf:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/system_stm32f0xx.crf
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/system_stm32f0xx.d:
--------------------------------------------------------------------------------
1 | item\system_stm32f0xx.o: ..//Src/system_stm32f0xx.c
2 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h
3 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h
4 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Include/core_cm0.h
5 | item\system_stm32f0xx.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
6 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Include/core_cmInstr.h
7 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Include/cmsis_armcc.h
8 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Include/core_cmFunc.h
9 | item\system_stm32f0xx.o: ../Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h
10 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/ITEM/system_stm32f0xx.o:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/ITEM/system_stm32f0xx.o
--------------------------------------------------------------------------------
/firmware/MDK-ARM/RTE/RTE_Components.h:
--------------------------------------------------------------------------------
1 |
2 | /*
3 | * Auto generated Run-Time-Environment Component Configuration File
4 | * *** Do not modify ! ***
5 | *
6 | * Project: 'ITEM'
7 | * Target: 'ITEM'
8 | */
9 |
10 | #ifndef RTE_COMPONENTS_H
11 | #define RTE_COMPONENTS_H
12 |
13 |
14 | #endif /* RTE_COMPONENTS_H */
15 |
--------------------------------------------------------------------------------
/firmware/MDK-ARM/startup_stm32f030x8.lst:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/firmware/MDK-ARM/startup_stm32f030x8.lst
--------------------------------------------------------------------------------
/firmware/Src/stm32f0xx_it.c:
--------------------------------------------------------------------------------
1 | #include "stm32f0xx.h"
2 | #include "stm32f0xx_it.h"
3 |
4 |
5 | void NMI_Handler(void)
6 | {
7 | }
8 |
9 | void HardFault_Handler(void)
10 | {
11 | while (1)
12 | {
13 | }
14 | }
15 |
16 |
17 | void SVC_Handler(void)
18 | {
19 | }
20 |
21 | void PendSV_Handler(void)
22 | {
23 | }
24 |
25 | void SysTick_Handler(void)
26 | {
27 | }
28 |
29 |
30 | void EXTI0_1_IRQHandler(void)
31 | {
32 | if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_0) != RESET)
33 | {
34 | LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_0);
35 | if(dir)
36 | r+=stepangle;
37 | else
38 | r-=stepangle;
39 | }
40 | if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_1) != RESET)
41 | {
42 | LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_1);
43 | if(DIRIN==1)
44 | dir=1;
45 | else
46 | dir=0;
47 | }
48 | }
49 |
50 | void EXTI2_3_IRQHandler(void)
51 | {
52 | if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_2) != RESET)
53 | {
54 | LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_2);
55 | if(ENIN==1)
56 | enmode=1;
57 | else
58 | {
59 | enmode=0;
60 | LL_TIM_OC_SetCompareCH1(TIM3,0);
61 | LL_TIM_OC_SetCompareCH2(TIM3,0);
62 | }
63 | }
64 | }
65 |
66 | /**
67 | * @brief This function handles TIM6 global interrupt.
68 | */
69 | void TIM6_IRQHandler(void)
70 | {
71 | if(LL_TIM_IsActiveFlag_UPDATE(TIM6) == 1)
72 | {
73 | LL_TIM_ClearFlag_UPDATE(TIM6);
74 | LL_IWDG_ReloadCounter(IWDG);
75 | if(enmode==1)
76 | {
77 | if(closemode==1)
78 | {
79 | y=*(volatile uint16_t*)((ReadValue(READ_ANGLE_VALUE)>>1)*2+0x08008000);
80 | y=y*360.0/16384;
81 | if(y-y_1>180.0)
82 | wrap_count--;
83 | else if(y-y_1<-180.0)
84 | wrap_count++;
85 | yw=y+360.0*wrap_count;
86 | e=r-yw;
87 | if((e>1.8)||(e>1.8))
88 | LED_H;
89 | else
90 | LED_L;
91 | // if(e>36.0)
92 | // e=36.0;
93 | // else if(e<-36.0)
94 | // e=-36.0;
95 | iterm+=ki*e;
96 | if(iterm>UMAXCL)
97 | iterm=UMAXCL;
98 | else if(iterm<-UMAXCL)
99 | iterm=-UMAXCL;
100 |
101 | dterm=LPFA*dterm-LPFB*kd*(yw-yw_1);
102 | u=kp*e+iterm+dterm;
103 |
104 | y_1=y; //copy current value of y to previous value (y_1) for next control cycle before PA angle added
105 | yw_1=yw;
106 |
107 | if(u>0) //You can experiment with "Phase Advance" by increasing PA when operating at high speeds
108 | {
109 | y+=1.5;
110 | }
111 | else
112 | {
113 | y-=1.5;
114 | u=-u;
115 | }
116 | if(u>UMAXCL) // limit control effort
117 | u=UMAXCL; //saturation limits max current command //digitalWrite(ledPin, LOW);
118 | Output(y,roundf(u)); // update phase currents
119 | }
120 | else
121 | {
122 | if(r==r_1)
123 | {
124 | hccount++;
125 | if(hccount>=1000)
126 | hccount=1000;
127 | }
128 | else
129 | hccount=0;
130 |
131 | if(hccount>=1000)
132 | Output(r,UMAXOP/2);
133 | else
134 | Output(r,UMAXOP);
135 | r_1=r;
136 | }
137 | }
138 | }
139 | }
140 |
141 |
142 |
--------------------------------------------------------------------------------
/firmware/mx.scratch:
--------------------------------------------------------------------------------
1 |
2 |
3 | F:\项目方案\闭环步进电机\固件\20190414V2.7\ITEM\\ITEM
4 | C
5 | ..\Drivers\CMSIS
6 | C:\Users\Bruce\STM32Cube\Repository\STM32Cube_FW_F0_V1.9.0\Drivers\CMSIS
7 | MDK-ARM
8 | 5
9 | 0
10 |
11 |
12 |
13 | ..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\arm\startup_stm32f030x8.s
14 |
15 |
16 |
17 |
18 |
19 |
20 |
21 |
22 |
23 |
24 |
25 |
26 |
27 | ITEM
28 | STM32F030C8Tx
29 | 0x200
30 | 0x400
31 |
32 | 48
33 | custom
34 |
35 | true
36 | swd
37 |
38 | 0
39 |
40 |
41 |
42 |
43 |
44 |
45 |
46 |
47 |
48 |
49 |
50 | USE_FULL_LL_DRIVER
51 |
52 |
53 |
54 |
55 |
56 |
57 | USE_HAL_DRIVER
58 | MBEDTLS_CONFIG_FILE=<mbedtls_config.h>
59 |
60 |
61 |
62 |
63 | ..\Inc
64 | ..\Drivers\STM32F0xx_HAL_Driver\Inc
65 | ..\Drivers\CMSIS\Device\ST\STM32F0xx\Include
66 | ..\Drivers\CMSIS\Include
67 |
68 |
69 |
70 |
71 |
72 | false
73 |
74 |
75 | Drivers
76 |
77 | STM32F0xx_HAL_Driver
78 |
79 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c
80 |
81 |
82 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c
83 |
84 |
85 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_spi.c
86 |
87 |
88 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c
89 |
90 |
91 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c
92 |
93 |
94 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c
95 |
96 |
97 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c
98 |
99 |
100 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c
101 |
102 |
103 | ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c
104 |
105 |
106 |
107 | CMSIS
108 |
109 | ../\Src/system_stm32f0xx.c
110 |
111 |
112 |
113 |
114 | Application
115 |
116 | User
117 |
118 | ..\Src\main.c
119 |
120 |
121 |
122 | ..\Src\stm32f0xx_it.c
123 |
124 |
125 |
126 |
127 |
128 |
129 |
130 |
131 |
--------------------------------------------------------------------------------
/hardware/Item.PcbDoc:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/hardware/Item.PcbDoc
--------------------------------------------------------------------------------
/hardware/Item.PrjPCBStructure:
--------------------------------------------------------------------------------
1 | Record=TopLevelDocument|FileName=Item.SchDoc
2 |
--------------------------------------------------------------------------------
/hardware/Item.SchDoc:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/hyperstepper/NEMA17-HyperStepper/9c22d7a8d0ecfd4c181c020ae0a0fff79584245f/hardware/Item.SchDoc
--------------------------------------------------------------------------------