├── .gitignore ├── Drivers ├── LogoDxe │ ├── Logo.bmp │ ├── Logo.idf │ ├── LogoDxeExtra.uni │ ├── LogoExtra.uni │ ├── LogoDxe.uni │ ├── Logo.uni │ ├── Logo.inf │ ├── LogoDxe.inf │ └── Logo.c ├── ConSplitterDxe │ ├── ConSplitterDxeExtra.uni │ ├── ConSplitterDxe.uni │ └── ConSplitterDxe.inf ├── GraphicsConsoleDxe │ ├── GraphicsConsoleDxeExtra.uni │ ├── GraphicsConsoleDxe.uni │ └── GraphicsConsoleDxe.inf ├── LedHeartbeatDxe │ ├── LedHeartbeatDxe.inf │ └── Heartbeat.c ├── PlatformSmbiosDxe │ ├── PlatformSmbiosDxe.h │ └── PlatformSmbiosDxe.inf ├── PciEmulation │ ├── PciEmulation.inf │ └── PciEmulation.c ├── LcdFbDxe │ └── LcdFbDxe.inf └── TimerDxe │ └── TimerDxe.inf ├── Include ├── Resources │ ├── ReleaseStampStub.h │ ├── FbColor.h │ ├── ReleaseInfo.h │ └── font5x12.h ├── Device │ ├── iMX6UsbPhy.h │ ├── iMXIoMux.h │ ├── iMX6ClkPwr.h │ ├── regs-common.h │ ├── iMXGpio.h │ ├── MemoryMap.h │ ├── common_epit.h │ ├── iMX6IoMux.h │ └── iMX6ClkPwr_ULL.h └── Library │ ├── iMX6Timer.h │ └── FrameBufferSerialPortLib.h ├── AcpiTables ├── Facs.asl ├── Dsdt │ ├── DSDT.asl │ ├── Dsdt-I2c.asl │ ├── Dsdt-Gpio.asl │ ├── Dsdt-Usb.asl │ ├── Dsdt-Platform.asl │ ├── Dsdt-Uart.asl │ └── Dsdt-Common.h ├── AcpiTables.inf ├── Madt.asl ├── Platform.h ├── Gtdt.aslc ├── Dbg2.aslc └── Fadt.aslc ├── Library ├── FrameBufferSerialPortLib │ └── FrameBufferSerialPortLib.inf ├── VirtualRealTimeClockLib │ ├── VirtualRealTimeClockLib.inf │ └── VirtualRealTimeClockLib.c ├── iMX6IoMuxLib │ ├── iMX6IoMuxLib.inf │ └── iMX6IoMux.c ├── UartSerialPortLib │ └── UartSerialPortLib.inf ├── iMX6UsbPhyLib │ └── iMX6UsbPhyLib.inf ├── iMX6ClkPwrLib │ ├── iMX6ClkPwrLib.inf │ └── iMX6ClkPwr_private.h ├── TimerLib │ ├── TimerLib.inf │ └── TimerLib.c ├── iMX6ULLResetSystemLib │ ├── iMX6ULLResetSystemLib.inf │ └── iMX6ULLResetSystemLib.c ├── PlatformLib │ ├── PlatformLib.inf │ ├── Arm │ │ ├── ArmPlatformHelper.asm │ │ └── ArmPlatformHelper.S │ ├── ArmPlatformLib.c │ └── ArmPlatformLibMem.c ├── PlatformBootManagerLib │ ├── PlatformBm.h │ └── PlatformBootManagerLib.inf └── MemoryInitPeiLib │ ├── MemoryInitPeiLib.inf │ └── MemoryInitPeiLib.c ├── PrePi ├── Arm │ ├── ArchPrePi.c │ ├── ModuleEntryPoint.S │ └── ModuleEntryPoint.asm ├── MainUniCore.c ├── PrePi.h └── PeiUniCore.inf ├── README.md ├── PrimeG2Pkg.dec ├── CommonFdf.fdf.inc └── PrimeG2.fdf /.gitignore: -------------------------------------------------------------------------------- 1 | .DS_Store 2 | InternalPayload -------------------------------------------------------------------------------- /Drivers/LogoDxe/Logo.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/imbushuo/PrimeG2Pkg/HEAD/Drivers/LogoDxe/Logo.bmp -------------------------------------------------------------------------------- /Include/Resources/ReleaseStampStub.h: -------------------------------------------------------------------------------- 1 | #ifndef __RELEASE_STAMP_STUB_H__ 2 | #define __RELEASE_STAMP_STUB_H__ 3 | 4 | // These values will be overwritten by build script. 5 | #define __IMPL_COMMIT_ID__ "Unknown Commit" 6 | #define __RELEASE_DATE__ "06/10/2018" 7 | #define __BUILD_OWNER__ "Unknown@Unknown" 8 | #define __EDK2_RELEASE__ "Unknown Commit" 9 | 10 | #endif 11 | -------------------------------------------------------------------------------- /Include/Resources/FbColor.h: -------------------------------------------------------------------------------- 1 | #ifndef _FB_COLOR_H_ 2 | #define _FB_COLOR_H_ 3 | 4 | #define FB_BGRA8888_BLACK 0xff000000 5 | #define FB_BGRA8888_WHITE 0xffffffff 6 | #define FB_BGRA8888_CYAN 0xff00ffff 7 | #define FB_BGRA8888_BLUE 0xff0000ff 8 | #define FB_BGRA8888_SILVER 0xffc0c0c0 9 | #define FB_BGRA8888_YELLOW 0xffffff00 10 | #define FB_BGRA8888_ORANGE 0xffffa500 11 | #define FB_BGRA8888_RED 0xffff0000 12 | #define FB_BGRA8888_GREEN 0xff00ff00 13 | 14 | #endif -------------------------------------------------------------------------------- /Include/Resources/ReleaseInfo.h: -------------------------------------------------------------------------------- 1 | #ifndef __SMBIOS_RELEASE_INFO_H__ 2 | #define __SMBIOS_RELEASE_INFO_H__ 3 | #ifdef __IMPL_COMMIT_ID__ 4 | #undef __IMPL_COMMIT_ID__ 5 | #endif 6 | #define __IMPL_COMMIT_ID__ "b874b97e" 7 | #ifdef __RELEASE_DATE__ 8 | #undef __RELEASE_DATE__ 9 | #endif 10 | #define __RELEASE_DATE__ "09/06/2019" 11 | #ifdef __BUILD_OWNER__ 12 | #undef __BUILD_OWNER__ 13 | #endif 14 | #define __BUILD_OWNER__ "binwang@bc-macbookpro-osx" 15 | #ifdef __EDK2_RELEASE__ 16 | #undef __EDK2_RELEASE__ 17 | #endif 18 | #define __EDK2_RELEASE__ "4e0f920d" 19 | #endif 20 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/Logo.idf: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // Platform Logo image definition file. 3 | // 4 | // Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
5 | // 6 | // This program and the accompanying materials 7 | // are licensed and made available under the terms and conditions of the BSD License 8 | // which accompanies this distribution. The full text of the license may be found at 9 | // http://opensource.org/licenses/bsd-license.php 10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | // 13 | // **/ 14 | 15 | #image IMG_LOGO Logo.bmp 16 | -------------------------------------------------------------------------------- /Include/Device/iMX6UsbPhy.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _IMX6_USB_PHY_H_ 16 | #define _IMX6_USB_PHY_H_ 17 | 18 | EFI_STATUS ImxUsbPhyInit (IMX_USBPHY_ID ImxUsbPhyId); 19 | 20 | #endif // _IMX6_USB_PHY_H_ 21 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/LogoDxeExtra.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // Logo Localized Strings and Content 3 | // 4 | // Copyright (c) 2016, Intel Corporation. All rights reserved.
5 | // 6 | // This program and the accompanying materials 7 | // are licensed and made available under the terms and conditions of the BSD License 8 | // which accompanies this distribution. The full text of the license may be found at 9 | // http://opensource.org/licenses/bsd-license.php 10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | // 13 | // **/ 14 | 15 | #string STR_PROPERTIES_MODULE_NAME 16 | #language en-US 17 | "Logo Image File" 18 | 19 | 20 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/LogoExtra.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // Logo Localized Strings and Content 3 | // 4 | // Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.
5 | // 6 | // This program and the accompanying materials 7 | // are licensed and made available under the terms and conditions of the BSD License 8 | // which accompanies this distribution. The full text of the license may be found at 9 | // http://opensource.org/licenses/bsd-license.php 10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | // 13 | // **/ 14 | 15 | #string STR_PROPERTIES_MODULE_NAME 16 | #language en-US 17 | "Logo Image File" 18 | 19 | 20 | -------------------------------------------------------------------------------- /Include/Library/iMX6Timer.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _IMX6_TIMER_H_ 16 | #define _IMX6_TIMER_H_ 17 | 18 | RETURN_STATUS 19 | EFIAPI 20 | TimerConstructor ( 21 | VOID 22 | ); 23 | 24 | #endif /* _IMX6_TIMER_H_ */ 25 | -------------------------------------------------------------------------------- /AcpiTables/Facs.asl: -------------------------------------------------------------------------------- 1 | [000h 0000 4] Signature : "FACS" 2 | [004h 0004 4] Length : 00000040 3 | [008h 0008 4] Hardware Signature : 00000000 4 | [00Ch 0012 4] 32 Firmware Waking Vector : 00000000 5 | [010h 0016 4] Global Lock : 00000000 6 | [014h 0020 4] Flags (decoded below) : 00000000 7 | S4BIOS Support Present : 0 8 | 64-bit Wake Supported (V2) : 0 9 | [018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 10 | [020h 0032 1] Version : 02 11 | [021h 0033 3] Reserved : 000000 12 | [024h 0036 4] OspmFlags (decoded below) : 00000000 13 | 64-bit Wake Env Required (V2) : 0 14 | -------------------------------------------------------------------------------- /Drivers/ConSplitterDxe/ConSplitterDxeExtra.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // ConSplitterDxe Localized Strings and Content 3 | // 4 | // Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.
5 | // 6 | // This program and the accompanying materials 7 | // are licensed and made available under the terms and conditions of the BSD License 8 | // which accompanies this distribution. The full text of the license may be found at 9 | // http://opensource.org/licenses/bsd-license.php 10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | // 13 | // **/ 14 | 15 | #string STR_PROPERTIES_MODULE_NAME 16 | #language en-US 17 | "Console Splitter DXE Driver" 18 | 19 | 20 | -------------------------------------------------------------------------------- /Drivers/GraphicsConsoleDxe/GraphicsConsoleDxeExtra.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // GraphicsConsoleDxe Localized Strings and Content 3 | // 4 | // Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.
5 | // 6 | // This program and the accompanying materials 7 | // are licensed and made available under the terms and conditions of the BSD License 8 | // which accompanies this distribution. The full text of the license may be found at 9 | // http://opensource.org/licenses/bsd-license.php 10 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | // 13 | // **/ 14 | 15 | #string STR_PROPERTIES_MODULE_NAME 16 | #language en-US 17 | "Graphics Console DXE Driver" 18 | 19 | 20 | -------------------------------------------------------------------------------- /Library/FrameBufferSerialPortLib/FrameBufferSerialPortLib.inf: -------------------------------------------------------------------------------- 1 | [Defines] 2 | INF_VERSION = 0x00010005 3 | BASE_NAME = FrameBufferSerialPortLib 4 | MODULE_TYPE = BASE 5 | VERSION_STRING = 1.0 6 | LIBRARY_CLASS = SerialPortLib 7 | 8 | [Sources.common] 9 | FrameBufferSerialPortLib.c 10 | 11 | [Packages] 12 | MdePkg/MdePkg.dec 13 | ArmPkg/ArmPkg.dec 14 | PrimeG2Pkg/PrimeG2Pkg.dec 15 | 16 | [LibraryClasses] 17 | ArmLib 18 | PcdLib 19 | IoLib 20 | HobLib 21 | CompilerIntrinsicsLib 22 | CacheMaintenanceLib 23 | BaseMemoryLib 24 | 25 | [Pcd] 26 | gPrimeG2PkgTokenSpaceGuid.PcdLcdIfBaseAddress 27 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferWidth 28 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferHeight 29 | gPrimeG2PkgTokenSpaceGuid.PcdEnableScreenSerial -------------------------------------------------------------------------------- /PrePi/Arm/ArchPrePi.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2011 - 2013, ARM Limited. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include "PrePi.h" 16 | 17 | VOID 18 | ArchInitialize ( 19 | VOID 20 | ) 21 | { 22 | // Enable program flow prediction, if supported. 23 | ArmEnableBranchPrediction (); 24 | 25 | if (FixedPcdGet32 (PcdVFPEnabled)) { 26 | ArmEnableVFP (); 27 | } 28 | } 29 | 30 | -------------------------------------------------------------------------------- /AcpiTables/Dsdt/DSDT.asl: -------------------------------------------------------------------------------- 1 | /* 2 | * iMX6 ULL DSDT 3 | * 4 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 5 | * 6 | * This program and the accompanying materials 7 | * are licensed and made available under the terms and conditions of the BSD License 8 | * which accompanies this distribution. The full text of the license may be found at 9 | * http://opensource.org/licenses/bsd-license.php 10 | * 11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | * 14 | */ 15 | #include "Dsdt-Common.h" 16 | 17 | DefinitionBlock ("DSDT.aml", "DSDT", 5, "MSFT", "EDK2", 1) 18 | { 19 | Scope (\_SB_) 20 | { 21 | include("Dsdt-Platform.asl") 22 | include("Dsdt-Gpio.asl") 23 | include("Dsdt-I2c.asl") 24 | include("Dsdt-Uart.asl") 25 | include("Dsdt-Usb.asl") 26 | } // \_SB_ 27 | } 28 | -------------------------------------------------------------------------------- /AcpiTables/Dsdt/Dsdt-I2c.asl: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | Device (I2C1) 16 | { 17 | Name (_HID, "NXP0104") 18 | Name (_UID, 0x1) 19 | 20 | Method (_STA) { 21 | Return (0xf) 22 | } 23 | 24 | Name (_CRS, ResourceTemplate () { 25 | MEMORY32FIXED (ReadWrite, 0x021A0000, 0x14, ) 26 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 68 } 27 | }) 28 | } 29 | 30 | -------------------------------------------------------------------------------- /Include/Device/iMXIoMux.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _IMX_IO_MUX_H_ 16 | #define _IMX_IO_MUX_H_ 17 | 18 | #define IMX_IOMUX_PAD_DEFINE(CtlRegOffset, MuxRegOffset) \ 19 | ((((CtlRegOffset) & 0xffff) << 16) | ((MuxRegOffset) & 0xffff)) 20 | 21 | #define IMX_IOMUX_PAD_CTL_OFFSET(ImxPadVal) ((ImxPadVal) >> 16) 22 | #define IMX_IOMUX_PAD_MUX_OFFSET(ImxPadVal) ((ImxPadVal) & 0xffff) 23 | 24 | #endif // _IMX_IO_MUX_H_ 25 | -------------------------------------------------------------------------------- /Include/Library/FrameBufferSerialPortLib.h: -------------------------------------------------------------------------------- 1 | #ifndef _FRAMEBUFFER_SERIALPORT_LIB_H_ 2 | #define _FRAMEBUFFER_SERIALPORT_LIB_H_ 3 | 4 | #include 5 | 6 | typedef struct _FBCON_POSITION { 7 | INTN x; 8 | INTN y; 9 | } FBCON_POSITION, *PFBCON_POSITION; 10 | 11 | typedef struct _FBCON_COLOR { 12 | UINTN Foreground; 13 | UINTN Background; 14 | } FBCON_COLOR, *PFBCON_COLOR; 15 | 16 | enum FbConMsgType { 17 | /* type for menu */ 18 | FBCON_COMMON_MSG = 0, 19 | FBCON_UNLOCK_TITLE_MSG, 20 | FBCON_TITLE_MSG, 21 | FBCON_SUBTITLE_MSG, 22 | 23 | /* type for warning */ 24 | FBCON_YELLOW_MSG, 25 | FBCON_ORANGE_MSG, 26 | FBCON_RED_MSG, 27 | FBCON_GREEN_MSG, 28 | 29 | /* and the select message's background */ 30 | FBCON_SELECT_MSG_BG_COLOR, 31 | }; 32 | 33 | void ResetFb(void); 34 | 35 | UINTN 36 | EFIAPI 37 | SerialPortWriteCritical(IN UINT8 *Buffer, IN UINTN NumberOfBytes); 38 | 39 | #endif 40 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # PrimeG2Pkg: UEFI for HP Prime G2 calculator 2 | 3 | I will write a better README later. 4 | 5 |

Cursed level 16000

It takes a few minutes for the 396MHz CPU, 256MB memory device to go here

(Hey Windows, new friend in the family) pic.twitter.com/RJDcHmVwgR

— Sunshine Biscuit at scale (@imbushuo) November 20, 2019
6 | 7 | ![Windows IoT on HP Prime G2 Calculator](https://pbs.twimg.com/media/EJy-wADU8AIzRoJ?format=jpg&name=4096x4096) 8 | 9 | ## Current Status 10 | 11 | Capable of booting Windows and Linux. USB Host is functional but external VBus supply is required currently. 12 | 13 | ## Boot 14 | 15 | You need a few tools from [prinux](https://github.com/zephray/prinux) and my [U-Boot](https://github.com/imbushuo/uboot). 16 | 17 | ## License 18 | 19 | GPLv2 20 | -------------------------------------------------------------------------------- /Drivers/LedHeartbeatDxe/LedHeartbeatDxe.inf: -------------------------------------------------------------------------------- 1 | [Defines] 2 | INF_VERSION = 0x00010005 3 | BASE_NAME = LedHeartbeatDxe 4 | FILE_GUID = 78fe9d61-2f48-4ff3-aec0-3a9fd0e10333 5 | MODULE_TYPE = DXE_DRIVER 6 | VERSION_STRING = 1.0 7 | ENTRY_POINT = HeartbeatInitialize 8 | 9 | [Sources.common] 10 | Heartbeat.c 11 | 12 | [Packages] 13 | MdePkg/MdePkg.dec 14 | ArmPkg/ArmPkg.dec 15 | EmbeddedPkg/EmbeddedPkg.dec 16 | PrimeG2Pkg/PrimeG2Pkg.dec 17 | 18 | [BuildOptions.AARCH64] 19 | GCC:*_*_*_CC_FLAGS = -Werror -Wno-error=unused-variable 20 | 21 | [LibraryClasses] 22 | UefiDriverEntryPoint 23 | IoLib 24 | TimerLib 25 | BaseLib 26 | DebugLib 27 | PrintLib 28 | iMX6IoMuxLib 29 | 30 | [Protocols] 31 | gEfiTimerArchProtocolGuid 32 | 33 | [Guids] 34 | gEfiEventExitBootServicesGuid 35 | 36 | [Pcd] 37 | giMXPlatformTokenSpaceGuid.PcdGpioBankMemoryRange 38 | 39 | [Depex] 40 | gEfiTimerArchProtocolGuid -------------------------------------------------------------------------------- /Drivers/LogoDxe/LogoDxe.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // The default logo bitmap picture shown on setup screen. 3 | // 4 | // This module provides the default logo bitmap picture shown on setup screen, through EDKII Platform Logo protocol. 5 | // 6 | // Copyright (c) 2016, Intel Corporation. All rights reserved.
7 | // 8 | // This program and the accompanying materials 9 | // are licensed and made available under the terms and conditions of the BSD License 10 | // which accompanies this distribution. The full text of the license may be found at 11 | // http://opensource.org/licenses/bsd-license.php 12 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 | // 15 | // **/ 16 | 17 | 18 | #string STR_MODULE_ABSTRACT #language en-US "Provides the default logo bitmap picture shown on setup screen." 19 | 20 | #string STR_MODULE_DESCRIPTION #language en-US "This module provides the default logo bitmap picture shown on setup screen, through EDKII Platform Logo protocol." 21 | 22 | -------------------------------------------------------------------------------- /PrePi/MainUniCore.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2011, ARM Limited. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include "PrePi.h" 16 | 17 | VOID 18 | PrimaryMain ( 19 | IN UINTN UefiMemoryBase, 20 | IN UINTN StacksBase, 21 | IN UINT64 StartTimeStamp 22 | ) 23 | { 24 | PrePiMain (UefiMemoryBase, StacksBase, StartTimeStamp); 25 | 26 | // We must never return 27 | ASSERT(FALSE); 28 | } 29 | 30 | VOID 31 | SecondaryMain ( 32 | IN UINTN MpId 33 | ) 34 | { 35 | // We must never get into this function on UniCore system 36 | ASSERT(FALSE); 37 | } 38 | 39 | -------------------------------------------------------------------------------- /Drivers/GraphicsConsoleDxe/GraphicsConsoleDxe.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // Console support on graphic devices. 3 | // 4 | // This driver will install Simple Text Output protocol by consuming Graphices Output 5 | // protocol or UGA Draw protocol on graphic devices. 6 | // 7 | // Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
8 | // 9 | // This program and the accompanying materials 10 | // are licensed and made available under the terms and conditions of the BSD License 11 | // which accompanies this distribution. The full text of the license may be found at 12 | // http://opensource.org/licenses/bsd-license.php 13 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 | // 16 | // **/ 17 | 18 | 19 | #string STR_MODULE_ABSTRACT #language en-US "Console support on graphic devices" 20 | 21 | #string STR_MODULE_DESCRIPTION #language en-US "This driver will install SimpleTextOutputProtocol by consuming GraphicesOutput\n" 22 | "Protocol or UgaDrawProtocol on graphics devices." 23 | 24 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/Logo.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // The default logo bitmap picture shown on setup screen, which is corresponding to gEfiDefaultBmpLogoGuid. 3 | // 4 | // This module provides the default logo bitmap picture shown on setup screen, which corresponds to gEfiDefaultBmpLogoGuid. 5 | // 6 | // Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
7 | // 8 | // This program and the accompanying materials 9 | // are licensed and made available under the terms and conditions of the BSD License 10 | // which accompanies this distribution. The full text of the license may be found at 11 | // http://opensource.org/licenses/bsd-license.php 12 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 | // 15 | // **/ 16 | 17 | 18 | #string STR_MODULE_ABSTRACT #language en-US "Provides the default logo bitmap picture shown on setup screen, which corresponds to gEfiDefaultBmpLogoGuid" 19 | 20 | #string STR_MODULE_DESCRIPTION #language en-US "This module provides the default logo bitmap picture shown on setup screen, which corresponds to gEfiDefaultBmpLogoGuid." 21 | 22 | -------------------------------------------------------------------------------- /Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # 3 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | # 5 | # This program and the accompanying materials 6 | # are licensed and made available under the terms and conditions of the BSD License 7 | # which accompanies this distribution. The full text of the license may be found at 8 | # http://opensource.org/licenses/bsd-license.php 9 | # 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | ## 14 | 15 | [Defines] 16 | INF_VERSION = 0x0001001A 17 | BASE_NAME = VirtualRealTimeClockLib 18 | FILE_GUID = 1E27D461-78F3-4F7D-B1C2-F72384F13A6E 19 | MODULE_TYPE = BASE 20 | VERSION_STRING = 1.0 21 | LIBRARY_CLASS = RealTimeClockLib 22 | 23 | [Sources.common] 24 | VirtualRealTimeClockLib.c 25 | 26 | [Packages] 27 | ArmPkg/ArmPkg.dec 28 | EmbeddedPkg/EmbeddedPkg.dec 29 | MdePkg/MdePkg.dec 30 | 31 | [LibraryClasses] 32 | DebugLib 33 | IoLib 34 | TimerLib 35 | 36 | [FixedPcd] 37 | gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz -------------------------------------------------------------------------------- /Library/iMX6IoMuxLib/iMX6IoMuxLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # 3 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | # 5 | # This program and the accompanying materials 6 | # are licensed and made available under the terms and conditions of the BSD License 7 | # which accompanies this distribution. The full text of the license may be found at 8 | # http://opensource.org/licenses/bsd-license.php 9 | # 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | ## 14 | 15 | [Defines] 16 | INF_VERSION = 0x0001001A 17 | BASE_NAME = iMX6IoMuxLib 18 | FILE_GUID = FA41BEF0-0666-4C07-9EC3-47F61C36EDBE 19 | MODULE_TYPE = BASE 20 | VERSION_STRING = 1.0 21 | LIBRARY_CLASS = iMX6IoMuxLib 22 | 23 | [Packages] 24 | ArmPkg/ArmPkg.dec 25 | EmbeddedPkg/EmbeddedPkg.dec 26 | MdeModulePkg/MdeModulePkg.dec 27 | MdePkg/MdePkg.dec 28 | PrimeG2Pkg/PrimeG2Pkg.dec 29 | 30 | [LibraryClasses] 31 | BaseMemoryLib 32 | DebugLib 33 | IoLib 34 | TimerLib 35 | 36 | [Sources.common] 37 | iMX6IoMux.c 38 | 39 | [FixedPcd] 40 | giMXPlatformTokenSpaceGuid.PcdGpioBankMemoryRange -------------------------------------------------------------------------------- /Library/UartSerialPortLib/UartSerialPortLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # 3 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | # 5 | # This program and the accompanying materials 6 | # are licensed and made available under the terms and conditions of the BSD License 7 | # which accompanies this distribution. The full text of the license may be found at 8 | # http://opensource.org/licenses/bsd-license.php 9 | # 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | ## 14 | 15 | [Defines] 16 | INF_VERSION = 0x0001001A 17 | BASE_NAME = SerialPortLib 18 | FILE_GUID = C22D85E6-8B3E-4c05-AA5B-5732F3ACD055 19 | MODULE_TYPE = BASE 20 | VERSION_STRING = 1.0 21 | LIBRARY_CLASS = SerialPortLib 22 | 23 | [Sources.common] 24 | UartSerialPortLib.c 25 | 26 | [LibraryClasses] 27 | ArmLib 28 | BaseMemoryLib 29 | CacheMaintenanceLib 30 | IoLib 31 | PcdLib 32 | TimerLib 33 | 34 | [Packages] 35 | ArmPkg/ArmPkg.dec 36 | ArmPlatformPkg/ArmPlatformPkg.dec 37 | MdePkg/MdePkg.dec 38 | PrimeG2Pkg/PrimeG2Pkg.dec 39 | 40 | [FixedPcd] 41 | giMXPlatformTokenSpaceGuid.PcdSerialRegisterBase 42 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/Logo.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # The default logo bitmap picture shown on setup screen, which is corresponding to gEfiDefaultBmpLogoGuid. 3 | # 4 | # Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
5 | # 6 | # This program and the accompanying materials 7 | # are licensed and made available under the terms and conditions of the BSD License 8 | # which accompanies this distribution. The full text of the license may be found at 9 | # http://opensource.org/licenses/bsd-license.php 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | # 14 | ## 15 | 16 | [Defines] 17 | INF_VERSION = 0x00010005 18 | BASE_NAME = Logo 19 | MODULE_UNI_FILE = Logo.uni 20 | FILE_GUID = 7BB28B99-61BB-11D5-9A5D-0090273FC14D 21 | MODULE_TYPE = USER_DEFINED 22 | VERSION_STRING = 1.0 23 | 24 | # 25 | # The following information is for reference only and not required by the build tools. 26 | # 27 | # VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64 28 | # 29 | 30 | [Binaries] 31 | BIN|Logo.bmp|* 32 | 33 | [UserExtensions.TianoCore."ExtraFiles"] 34 | LogoExtra.uni 35 | -------------------------------------------------------------------------------- /Library/iMX6UsbPhyLib/iMX6UsbPhyLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # 3 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | # 5 | # This program and the accompanying materials 6 | # are licensed and made available under the terms and conditions of the BSD License 7 | # which accompanies this distribution. The full text of the license may be found at 8 | # http://opensource.org/licenses/bsd-license.php 9 | # 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | ## 14 | 15 | [Defines] 16 | INF_VERSION = 0x00010005 17 | BASE_NAME = iMX6UsbPhyLib 18 | FILE_GUID = 463989D1-27DC-4AE7-92AE-C7E28C1C605D 19 | MODULE_TYPE = BASE 20 | VERSION_STRING = 1.0 21 | LIBRARY_CLASS = iMX6UsbPhyLib 22 | 23 | [Packages] 24 | MdePkg/MdePkg.dec 25 | MdeModulePkg/MdeModulePkg.dec 26 | EmbeddedPkg/EmbeddedPkg.dec 27 | ArmPkg/ArmPkg.dec 28 | ArmPlatformPkg/ArmPlatformPkg.dec 29 | PrimeG2Pkg/PrimeG2Pkg.dec 30 | 31 | [LibraryClasses] 32 | BaseMemoryLib 33 | DebugLib 34 | IoLib 35 | TimerLib 36 | iMX6IoMuxLib 37 | 38 | [Sources.common] 39 | iMX6UsbPhy.c 40 | 41 | [FixedPcd] 42 | giMXPlatformTokenSpaceGuid.PcdGpioBankMemoryRange 43 | -------------------------------------------------------------------------------- /Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2015, ARM Limited. All rights reserved. 4 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 5 | * 6 | * This program and the accompanying materials 7 | * are licensed and made available under the terms and conditions of the BSD License 8 | * which accompanies this distribution. The full text of the license may be found at 9 | * http://opensource.org/licenses/bsd-license.php 10 | * 11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | * 14 | **/ 15 | 16 | #ifndef _PLATFORM_SMBIOS_DXE_H_ 17 | #define _PLATFORM_SMBIOS_DXE_H_ 18 | 19 | #define OCOTP_BANK_0_WORD_1 0x021BC410 20 | #define OCOTP_BANK_0_WORD_2 0x021BC420 21 | 22 | #define GLOBAL_PAGE_SIGNATURE 0x474C424C // 'GLBL' 23 | 24 | enum SMBIOS_REFRENCE_HANDLES { 25 | SMBIOS_HANDLE_BOARD = 0x1000, 26 | SMBIOS_HANDLE_CHASSIS, 27 | SMBIOS_HANDLE_PROCESSOR, 28 | SMBIOS_HANDLE_L1I, 29 | SMBIOS_HANDLE_L1D, 30 | SMBIOS_HANDLE_L2U, 31 | SMBIOS_HANDLE_MEMORY_ARRAY, 32 | SMBIOS_HANDLE_MEMORY_DEVICE 33 | }; 34 | 35 | typedef struct { 36 | UINT32 Signature; 37 | UINT8 Revision; 38 | UINT8 reserved[3]; 39 | UINT8 Mac0Id; 40 | UINT8 Mac0Valid; 41 | UINT8 MacAddress[6]; 42 | } GLOBAL_PAGE_DATA; 43 | 44 | #endif /* _PLATFORM_SMBIOS_DXE_H_ */ 45 | -------------------------------------------------------------------------------- /Library/iMX6ClkPwrLib/iMX6ClkPwrLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # 3 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | # 5 | # This program and the accompanying materials 6 | # are licensed and made available under the terms and conditions of the BSD License 7 | # which accompanies this distribution. The full text of the license may be found at 8 | # http://opensource.org/licenses/bsd-license.php 9 | # 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | ## 14 | 15 | [Defines] 16 | INF_VERSION = 0x0001001A 17 | BASE_NAME = iMX6ClkPwrLib 18 | FILE_GUID = 8DB4B460-9201-435A-B86A-24B58CED9A9E 19 | MODULE_TYPE = BASE 20 | VERSION_STRING = 1.0 21 | LIBRARY_CLASS = iMX6ClkPwrLib 22 | 23 | [Packages] 24 | ArmPkg/ArmPkg.dec 25 | ArmPlatformPkg/ArmPlatformPkg.dec 26 | EmbeddedPkg/EmbeddedPkg.dec 27 | MdeModulePkg/MdeModulePkg.dec 28 | MdePkg/MdePkg.dec 29 | PrimeG2Pkg/PrimeG2Pkg.dec 30 | 31 | [LibraryClasses] 32 | BaseMemoryLib 33 | DebugLib 34 | iMX6IoMuxLib 35 | IoLib 36 | TimerLib 37 | 38 | [Sources.common] 39 | iMX6ClkPwr.c 40 | 41 | [FeaturePcd] 42 | gPrimeG2PkgTokenSpaceGuid.PcdLvdsEnable 43 | 44 | [FixedPcd] 45 | giMXPlatformTokenSpaceGuid.PcdGpioBankMemoryRange 46 | -------------------------------------------------------------------------------- /Drivers/PciEmulation/PciEmulation.inf: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) Microsoft. All rights reserved 3 | # 4 | #%HEADER% 5 | /** @file 6 | 7 | Copyright (c) 2009 Apple, Inc. All rights reserved. 8 | 9 | This document is the property of Apple, Inc. 10 | It is considered confidential and proprietary. 11 | 12 | This document may not be reproduced or transmitted in any form, 13 | in whole or in part, without the express written permission of 14 | Apple, Inc. 15 | 16 | **/ 17 | 18 | [Defines] 19 | INF_VERSION = 0x00010005 20 | BASE_NAME = PciEmulation 21 | FILE_GUID = E87C242E-7341-46d7-B84B-593BC6E4F3E8 22 | MODULE_TYPE = DXE_DRIVER 23 | VERSION_STRING = 1.0 24 | ENTRY_POINT = PciEmulationEntryPoint 25 | 26 | [Sources.common] 27 | PciEmulation.c 28 | 29 | [Packages] 30 | EmbeddedPkg/EmbeddedPkg.dec 31 | MdeModulePkg/MdeModulePkg.dec 32 | MdePkg/MdePkg.dec 33 | PrimeG2Pkg/PrimeG2Pkg.dec 34 | 35 | [LibraryClasses] 36 | NonDiscoverableDeviceRegistrationLib 37 | UefiDriverEntryPoint 38 | iMX6IoMuxLib 39 | iMX6UsbPhyLib 40 | iMX6ClkPwrLib 41 | 42 | [Protocols] 43 | 44 | [Pcd] 45 | gPrimeG2PkgTokenSpaceGuid.PcdEHCIBase 46 | gPrimeG2PkgTokenSpaceGuid.PcdEHCILength 47 | gPrimeG2PkgTokenSpaceGuid.PcdIsUsbPortOTG 48 | gPrimeG2PkgTokenSpaceGuid.PcdUSBOTGBase 49 | giMXPlatformTokenSpaceGuid.PcdGpioBankMemoryRange 50 | 51 | [Depex] 52 | TRUE 53 | -------------------------------------------------------------------------------- /Drivers/LcdFbDxe/LcdFbDxe.inf: -------------------------------------------------------------------------------- 1 | # SimpleFbDxe.inf: Implements Simple FrameBuffer in UEFI. 2 | 3 | [Defines] 4 | INF_VERSION = 0x00010005 5 | BASE_NAME = SimpleFbDxe 6 | FILE_GUID = dcfd1e6d-788d-4ffc-8e1b-ca2f75651a92 7 | MODULE_TYPE = DXE_DRIVER 8 | VERSION_STRING = 1.0 9 | ENTRY_POINT = SimpleFbDxeInitialize 10 | 11 | [Sources.common] 12 | SimpleFbDxe.c 13 | 14 | [Packages] 15 | MdePkg/MdePkg.dec 16 | MdeModulePkg/MdeModulePkg.dec 17 | EmbeddedPkg/EmbeddedPkg.dec 18 | ArmPkg/ArmPkg.dec 19 | PrimeG2Pkg/PrimeG2Pkg.dec 20 | 21 | [LibraryClasses] 22 | BaseLib 23 | ReportStatusCodeLib 24 | UefiLib 25 | UefiBootServicesTableLib 26 | UefiDriverEntryPoint 27 | BaseMemoryLib 28 | DebugLib 29 | CompilerIntrinsicsLib 30 | CacheMaintenanceLib 31 | FrameBufferBltLib 32 | PcdLib 33 | IoLib 34 | 35 | [Protocols] 36 | gEfiGraphicsOutputProtocolGuid ## PRODUCES 37 | gEfiCpuArchProtocolGuid 38 | 39 | [FixedPcd] 40 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferWidth 41 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferHeight 42 | gPrimeG2PkgTokenSpaceGuid.PcdLcdIfBaseAddress 43 | 44 | [Guids] 45 | gEfiMdeModulePkgTokenSpaceGuid 46 | 47 | [Pcd] 48 | gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution 49 | gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution 50 | 51 | [Depex] 52 | gEfiCpuArchProtocolGuid 53 | -------------------------------------------------------------------------------- /Drivers/TimerDxe/TimerDxe.inf: -------------------------------------------------------------------------------- 1 | #/** @file 2 | # 3 | # Copyright (c) 2009, Apple Inc. All rights reserved.
4 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 5 | # 6 | # All rights reserved. This program and the accompanying materials 7 | # are licensed and made available under the terms and conditions of the BSD License 8 | # which accompanies this distribution. The full text of the license may be found at 9 | # http://opensource.org/licenses/bsd-license.php 10 | # 11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | # 14 | #**/ 15 | 16 | [Defines] 17 | INF_VERSION = 0x0001001A 18 | BASE_NAME = iMX6TimerDxe 19 | FILE_GUID = 7CAF576F-F1D9-4104-A922-CB64537FD7AE 20 | MODULE_TYPE = DXE_DRIVER 21 | VERSION_STRING = 1.0 22 | ENTRY_POINT = TimerInitialize 23 | 24 | [Sources.common] 25 | Timer.c 26 | 27 | [Packages] 28 | ArmPkg/ArmPkg.dec 29 | EmbeddedPkg/EmbeddedPkg.dec 30 | MdePkg/MdePkg.dec 31 | PrimeG2Pkg/PrimeG2Pkg.dec 32 | 33 | [LibraryClasses] 34 | BaseLib 35 | BaseMemoryLib 36 | DebugLib 37 | IoLib 38 | PerformanceLib 39 | UefiBootServicesTableLib 40 | UefiDriverEntryPoint 41 | UefiLib 42 | UefiRuntimeServicesTableLib 43 | 44 | [Guids] 45 | 46 | [Protocols] 47 | gEfiTimerArchProtocolGuid 48 | gHardwareInterruptProtocolGuid 49 | 50 | [Pcd.common] 51 | gEmbeddedTokenSpaceGuid.PcdTimerPeriod 52 | 53 | [Depex] 54 | gHardwareInterruptProtocolGuid 55 | -------------------------------------------------------------------------------- /Library/TimerLib/TimerLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # 3 | # NULL instance of Timer Library as a template. 4 | # 5 | # A non-functional instance of the Timer Library that can be used as a template 6 | # for the implementation of a functional timer library instance. This library 7 | # instance can also be used to test build DXE, Runtime, DXE SAL, and DXE SMM 8 | # modules that require timer services as well as EBC modules that require 9 | # timer services. 10 | # 11 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 12 | # Copyright (c) 2007 - 2008, Intel Corporation. 13 | # 14 | # This program and the accompanying materials 15 | # are licensed and made available under the terms and conditions of the BSD License 16 | # which accompanies this distribution. The full text of the license may be found at 17 | # http://opensource.org/licenses/bsd-license.php 18 | # 19 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 20 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 21 | # 22 | ## 23 | 24 | [Defines] 25 | INF_VERSION = 0x0001001A 26 | BASE_NAME = iMX6TimerLib 27 | FILE_GUID = 2956C1A6-6FF8-4763-9FD8-D45892E025E3 28 | MODULE_TYPE = BASE 29 | VERSION_STRING = 1.0 30 | LIBRARY_CLASS = TimerLib 31 | 32 | [Sources.common] 33 | TimerLib.c 34 | 35 | [Packages] 36 | ArmPkg/ArmPkg.dec 37 | MdePkg/MdePkg.dec 38 | PrimeG2Pkg/PrimeG2Pkg.dec 39 | 40 | [LibraryClasses] 41 | DebugLib 42 | IoLib 43 | 44 | [Pcd] 45 | gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz -------------------------------------------------------------------------------- /Library/iMX6ULLResetSystemLib/iMX6ULLResetSystemLib.inf: -------------------------------------------------------------------------------- 1 | #/** @file 2 | # Reset System lib using iMX6 registers 3 | # 4 | # Copyright (c) 2008, Apple Inc. All rights reserved.
5 | # Copyright (c) 2014, Linaro Ltd. All rights reserved.
6 | # Copyright (c) 2014, ARM Ltd. All rights reserved.
7 | # Copyright (c) 2019, Bingxing Wang. All rights reserved.
8 | # 9 | # This program and the accompanying materials 10 | # are licensed and made available under the terms and conditions of the BSD License 11 | # which accompanies this distribution. The full text of the license may be found at 12 | # http://opensource.org/licenses/bsd-license.php 13 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 | # 16 | # 17 | #**/ 18 | 19 | [Defines] 20 | INF_VERSION = 0x00010005 21 | BASE_NAME = iMX6ULLResetSystemLib 22 | FILE_GUID = b764ad02-18db-4c86-802f-5a3f14c124cf 23 | MODULE_TYPE = BASE 24 | VERSION_STRING = 1.0 25 | LIBRARY_CLASS = EfiResetSystemLib 26 | 27 | [Sources] 28 | iMX6ULLResetSystemLib.c 29 | 30 | [Packages] 31 | ArmPkg/ArmPkg.dec 32 | MdePkg/MdePkg.dec 33 | EmbeddedPkg/EmbeddedPkg.dec 34 | PrimeG2Pkg/PrimeG2Pkg.dec 35 | 36 | [Guids] 37 | gEfiEventVirtualAddressChangeGuid 38 | 39 | [LibraryClasses] 40 | ArmLib 41 | DebugLib 42 | BaseLib 43 | IoLib 44 | UefiBootServicesTableLib 45 | UefiRuntimeServicesTableLib 46 | DxeServicesTableLib -------------------------------------------------------------------------------- /Library/PlatformLib/PlatformLib.inf: -------------------------------------------------------------------------------- 1 | #/* @file 2 | # Copyright (c) 2011-2012, ARM Limited. All rights reserved. 3 | # 4 | # This program and the accompanying materials 5 | # are licensed and made available under the terms and conditions of the BSD License 6 | # which accompanies this distribution. The full text of the license may be found at 7 | # http://opensource.org/licenses/bsd-license.php 8 | # 9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 | # 12 | #*/ 13 | 14 | [Defines] 15 | INF_VERSION = 0x00010005 16 | BASE_NAME = ArmPlatformLibNull 17 | FILE_GUID = cb494bad-23ff-427e-8608-d7e138d3363b 18 | MODULE_TYPE = BASE 19 | VERSION_STRING = 1.0 20 | LIBRARY_CLASS = ArmPlatformLib 21 | 22 | [Packages] 23 | MdePkg/MdePkg.dec 24 | MdeModulePkg/MdeModulePkg.dec 25 | ArmPkg/ArmPkg.dec 26 | ArmPlatformPkg/ArmPlatformPkg.dec 27 | PrimeG2Pkg/PrimeG2Pkg.dec 28 | 29 | [LibraryClasses] 30 | ArmLib 31 | DebugLib 32 | IoLib 33 | TimerLib 34 | 35 | [Sources.common] 36 | ArmPlatformLib.c 37 | ArmPlatformLibMem.c 38 | 39 | [Sources.Arm] 40 | Arm/ArmPlatformHelper.S | GCC 41 | Arm/ArmPlatformHelper.asm | RVCT 42 | 43 | [FixedPcd] 44 | gArmTokenSpaceGuid.PcdArmPrimaryCoreMask 45 | gArmTokenSpaceGuid.PcdArmPrimaryCore 46 | gPrimeG2PkgTokenSpaceGuid.PcdLcdIfBaseAddress 47 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferWidth 48 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferHeight 49 | 50 | [Ppis] 51 | gArmMpCoreInfoPpiGuid 52 | -------------------------------------------------------------------------------- /AcpiTables/Dsdt/Dsdt-Gpio.asl: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | Device (GPIO) 16 | { 17 | Name (_HID, "NXP0103") 18 | Name (_UID, 0x0) 19 | 20 | Method (_STA) { 21 | Return (0xf) 22 | } 23 | 24 | Name (_CRS, ResourceTemplate () { 25 | // GPIO1-7 26 | MEMORY32FIXED (ReadWrite, 0x0209C000, 0x1C000, ) 27 | 28 | // IOMUXC 29 | MEMORY32FIXED (ReadWrite, 0x020E0000, 0x4000, ) 30 | 31 | // GPIO1 0-15, 16-31 32 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 98, 99 } 33 | 34 | // GPIO2 0-15, 16-31 35 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 100, 101 } 36 | 37 | // GPIO3 0-15, 16-31 38 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 102, 103 } 39 | 40 | // GPIO4 0-15, 16-31 41 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 104, 105 } 42 | 43 | // GPIO5 0-15, 16-31 44 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 106, 107 } 45 | 46 | // GPIO6 0-15, 16-31 47 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 108, 109 } 48 | 49 | // GPIO7 0-15, 16-31 50 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 110, 111 } 51 | }) 52 | 53 | OperationRegion (OTGP, GeneralPurposeIO, Zero, One) 54 | } 55 | -------------------------------------------------------------------------------- /AcpiTables/AcpiTables.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # Component description file for PlatformAcpiTables module. 3 | # 4 | # ACPI table data and ASL sources required to boot the platform. 5 | # 6 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 7 | # 8 | # This program and the accompanying materials 9 | # are licensed and made available under the terms and conditions of the BSD License 10 | # which accompanies this distribution. The full text of the license may be found at 11 | # http://opensource.org/licenses/bsd-license.php 12 | # 13 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 | # 16 | ## 17 | 18 | [Defines] 19 | INF_VERSION = 0x0001001A 20 | BASE_NAME = PlatformAcpiTables 21 | FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD 22 | MODULE_TYPE = USER_DEFINED 23 | VERSION_STRING = 1.0 24 | 25 | [Sources] 26 | Dsdt/DSDT.asl 27 | Csrt.aslc 28 | Dbg2.aslc 29 | Fadt.aslc 30 | Madt.asl 31 | Facs.asl 32 | Gtdt.aslc 33 | 34 | [BuildOptions.ARM] 35 | GCC:*_*_*_CC_FLAGS = -Wno-missing-braces 36 | 37 | [Packages] 38 | ArmPkg/ArmPkg.dec 39 | ArmPlatformPkg/ArmPlatformPkg.dec 40 | EmbeddedPkg/EmbeddedPkg.dec 41 | MdeModulePkg/MdeModulePkg.dec 42 | MdePkg/MdePkg.dec 43 | PrimeG2Pkg/PrimeG2Pkg.dec 44 | 45 | [FixedPcd] 46 | gArmPlatformTokenSpaceGuid.PcdCoreCount 47 | gArmTokenSpaceGuid.PcdGicDistributorBase 48 | gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase 49 | giMXPlatformTokenSpaceGuid.PcdKdUartInstance 50 | 51 | gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum 52 | gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum 53 | gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum 54 | gArmTokenSpaceGuid.PcdArmArchTimerIntrNum -------------------------------------------------------------------------------- /AcpiTables/Dsdt/Dsdt-Usb.asl: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * iMX6 ULL EHCI USB Controllers 4 | * 5 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 6 | * 7 | * This program and the accompanying materials 8 | * are licensed and made available under the terms and conditions of the BSD License 9 | * which accompanies this distribution. The full text of the license may be found at 10 | * http://opensource.org/licenses/bsd-license.php 11 | * 12 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 | * 15 | **/ 16 | 17 | // Pre-configured to USB Host mode 18 | Device (USB0) { 19 | Name(_HID, "PNP0D20") 20 | Name(_UID, 0x0) 21 | 22 | Name (_S0W, 0x0) // D0 is the lowest supported state to wake itself up 23 | Method (_STA) { 24 | Return (0xf) 25 | } 26 | 27 | Method (_CRS, 0x0, Serialized) { 28 | Name (RBUF, ResourceTemplate () { 29 | MEMORY32FIXED(ReadWrite, 0x02184100, 0x100, ) 30 | Interrupt (ResourceConsumer, Level, ActiveHigh, SharedAndWake) { 75 } 31 | }) 32 | Return(RBUF) 33 | } 34 | 35 | OperationRegion (OTGM, SystemMemory, 0x02184100, 0x100) 36 | Field (OTGM, WordAcc, NoLock, Preserve) { 37 | Offset (0x84), // skip to register 84h 38 | PTSC, 32, // port status control 39 | Offset (0xA8), // skip to register A8h 40 | DSBM, 32, // UOG_USBMOD 41 | } 42 | 43 | Name (REG, 0x0) // Declare register read variable 44 | Method (_UBF, 0x0, Serialized) { 45 | // Reset handled by driver so no reset required here 46 | Store (0x03, DSBM); // set host mode & little endian 47 | Store (PTSC, REG); // read PORTSC status 48 | Store (OR (REG, 0x2), PTSC); // clear current PORTSC status 49 | } 50 | } 51 | -------------------------------------------------------------------------------- /Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf: -------------------------------------------------------------------------------- 1 | #/** @file 2 | # 3 | # Copyright (c) 2013 Linaro.org 4 | # Copyright (c) 2018 Microsoft Corporation. All rights reserved. 5 | # 6 | # This program and the accompanying materials 7 | # are licensed and made available under the terms and conditions of the BSD License 8 | # which accompanies this distribution. The full text of the license may be found at 9 | # http://opensource.org/licenses/bsd-license.php 10 | # 11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | # 14 | #**/ 15 | 16 | [Defines] 17 | INF_VERSION = 0x0001001A 18 | BASE_NAME = PlatformSmbiosDxe 19 | FILE_GUID = 3847D23F-1D95-4772-B60C-4BBFBC4D532F 20 | MODULE_TYPE = DXE_DRIVER 21 | VERSION_STRING = 1.0 22 | ENTRY_POINT = PlatformSmbiosDriverEntryPoint 23 | 24 | [Sources] 25 | PlatformSmbiosDxe.c 26 | 27 | [Packages] 28 | ArmPkg/ArmPkg.dec 29 | ArmPlatformPkg/ArmPlatformPkg.dec 30 | MdeModulePkg/MdeModulePkg.dec 31 | MdePkg/MdePkg.dec 32 | PrimeG2Pkg/PrimeG2Pkg.dec 33 | 34 | [LibraryClasses] 35 | ArmLib 36 | BaseLib 37 | BaseMemoryLib 38 | DebugLib 39 | IoLib 40 | MemoryAllocationLib 41 | PrintLib 42 | UefiBootServicesTableLib 43 | UefiDriverEntryPoint 44 | UefiLib 45 | 46 | [Protocols] 47 | gEfiSmbiosProtocolGuid # PROTOCOL SOMETIMES_CONSUMED 48 | 49 | [Guids] 50 | 51 | [FixedPcd] 52 | gArmPlatformTokenSpaceGuid.PcdCoreCount 53 | gArmTokenSpaceGuid.PcdFdSize 54 | gArmTokenSpaceGuid.PcdSystemMemorySize 55 | gArmTokenSpaceGuid.PcdSystemMemoryBase 56 | gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision 57 | gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor 58 | giMXPlatformTokenSpaceGuid.PcdSystemUuid 59 | giMXPlatformTokenSpaceGuid.PcdPhysicalMemoryMaximumCapacity 60 | 61 | [Depex] 62 | gEfiSmbiosProtocolGuid 63 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/LogoDxe.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # The default logo bitmap picture shown on setup screen. 3 | # 4 | # Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
5 | # 6 | # This program and the accompanying materials 7 | # are licensed and made available under the terms and conditions of the BSD License 8 | # which accompanies this distribution. The full text of the license may be found at 9 | # http://opensource.org/licenses/bsd-license.php 10 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | # 13 | # 14 | ## 15 | 16 | [Defines] 17 | INF_VERSION = 0x00010005 18 | BASE_NAME = LogoDxe 19 | MODULE_UNI_FILE = LogoDxe.uni 20 | FILE_GUID = F74D20EE-37E7-48FC-97F7-9B1047749C69 21 | MODULE_TYPE = DXE_DRIVER 22 | VERSION_STRING = 1.0 23 | 24 | ENTRY_POINT = InitializeLogo 25 | # 26 | # This flag specifies whether HII resource section is generated into PE image. 27 | # 28 | UEFI_HII_RESOURCE_SECTION = TRUE 29 | 30 | # 31 | # The following information is for reference only and not required by the build tools. 32 | # 33 | # VALID_ARCHITECTURES = IA32 X64 34 | # 35 | 36 | [Sources] 37 | Logo.bmp 38 | Logo.c 39 | Logo.idf 40 | 41 | [Packages] 42 | MdeModulePkg/MdeModulePkg.dec 43 | MdePkg/MdePkg.dec 44 | 45 | [LibraryClasses] 46 | UefiBootServicesTableLib 47 | UefiDriverEntryPoint 48 | DebugLib 49 | 50 | [Protocols] 51 | gEfiHiiDatabaseProtocolGuid ## CONSUMES 52 | gEfiHiiImageExProtocolGuid ## CONSUMES 53 | gEfiHiiPackageListProtocolGuid ## PRODUCES CONSUMES 54 | gEdkiiPlatformLogoProtocolGuid ## PRODUCES 55 | 56 | [Depex] 57 | gEfiHiiDatabaseProtocolGuid AND 58 | gEfiHiiImageExProtocolGuid 59 | 60 | [UserExtensions.TianoCore."ExtraFiles"] 61 | LogoDxeExtra.uni 62 | -------------------------------------------------------------------------------- /Library/PlatformLib/Arm/ArmPlatformHelper.asm: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2012-2013, ARM Limited. All rights reserved. 3 | // 4 | // This program and the accompanying materials 5 | // are licensed and made available under the terms and conditions of the BSD License 6 | // which accompanies this distribution. The full text of the license may be found at 7 | // http://opensource.org/licenses/bsd-license.php 8 | // 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 | // 12 | // 13 | 14 | #include 15 | 16 | INCLUDE AsmMacroIoLib.inc 17 | 18 | EXPORT ArmPlatformPeiBootAction 19 | EXPORT ArmPlatformGetCorePosition 20 | EXPORT ArmPlatformGetPrimaryCoreMpId 21 | EXPORT ArmPlatformIsPrimaryCore 22 | 23 | IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore 24 | IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask 25 | 26 | PRESERVE8 27 | AREA ArmPlatformNullHelper, CODE, READONLY 28 | 29 | ArmPlatformPeiBootAction FUNCTION 30 | mrc p15, 0, r0, c1, c0, 0 31 | bic r0, r0, #2 32 | mcr p15, 0, r0, c1, c0, 0 33 | bx lr 34 | ENDFUNC 35 | 36 | //UINTN 37 | //ArmPlatformGetCorePosition ( 38 | // IN UINTN MpId 39 | // ); 40 | ArmPlatformGetCorePosition FUNCTION 41 | and r1, r0, #ARM_CORE_MASK 42 | and r0, r0, #ARM_CLUSTER_MASK 43 | add r0, r1, r0, LSR #7 44 | bx lr 45 | ENDFUNC 46 | 47 | //UINTN 48 | //ArmPlatformGetPrimaryCoreMpId ( 49 | // VOID 50 | // ); 51 | ArmPlatformGetPrimaryCoreMpId FUNCTION 52 | mov32 r0, FixedPcdGet32(PcdArmPrimaryCore) 53 | bx lr 54 | ENDFUNC 55 | 56 | //UINTN 57 | //ArmPlatformIsPrimaryCore ( 58 | // IN UINTN MpId 59 | // ); 60 | ArmPlatformIsPrimaryCore FUNCTION 61 | mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask) 62 | and r0, r0, r1 63 | mov32 r1, FixedPcdGet32(PcdArmPrimaryCore) 64 | cmp r0, r1 65 | moveq r0, #1 66 | movne r0, #0 67 | bx lr 68 | ENDFUNC 69 | 70 | END 71 | 72 | -------------------------------------------------------------------------------- /AcpiTables/Dsdt/Dsdt-Platform.asl: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | OperationRegion (GLBL, SystemMemory, 0x10817000, 0x10) 16 | Field (GLBL, AnyAcc, Nolock, Preserve) 17 | { 18 | Offset (0), // Miscellaneous Dynamic Registers: 19 | SIGN, 32, // Global Page Signature 'GLBL' 20 | REVN, 8, // Revision 21 | , 8, // Reserved 22 | , 8, // Reserved 23 | , 8, // Reserved 24 | M0ID, 8, // MAC 0 ID 25 | MC0V, 8, // MAC 0 Valid 26 | MC0L, 32, // MAC Address 0 Low 27 | MC0H, 16, // MAC Address 0 High 28 | } 29 | 30 | Device (CPU0) 31 | { 32 | Name (_HID, "ACPI0007") 33 | Name (_UID, 0x0) 34 | 35 | Method (_STA) { 36 | Return (0xf) 37 | } 38 | } 39 | 40 | // Timers HAL extension 41 | Device (EPIT) 42 | { 43 | Name (_HID, "NXP0101") 44 | Name (_UID, 0x0) 45 | 46 | Method (_STA) { 47 | Return (0xf) 48 | } 49 | } 50 | 51 | // Platform Extension Plugin 52 | /*Device (PEP0) 53 | { 54 | Name (_HID, "NXP0102") 55 | Name (_UID, 0x0) 56 | 57 | Method (_STA) { 58 | Return (0xf) 59 | } 60 | Name (_CRS, ResourceTemplate () { 61 | // CCM request 1 62 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 119 } 63 | 64 | // CCM request 2 65 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 120 } 66 | 67 | // GPC request 1 68 | Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 121 } 69 | 70 | // UART1 71 | Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 58 } 72 | }) 73 | }*/ 74 | -------------------------------------------------------------------------------- /Library/PlatformLib/Arm/ArmPlatformHelper.S: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2012-2013, ARM Limited. All rights reserved. 3 | // 4 | // This program and the accompanying materials 5 | // are licensed and made available under the terms and conditions of the BSD License 6 | // which accompanies this distribution. The full text of the license may be found at 7 | // http://opensource.org/licenses/bsd-license.php 8 | // 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 | // 12 | // 13 | 14 | #include 15 | #include 16 | 17 | ASM_FUNC(ArmPlatformPeiBootAction) 18 | // Disable L2 cache 19 | mrc p15, 0, r0, c1, c0, 1 20 | bic r0, r0, #0x00000002 21 | mcr p15, 0, r0, c1, c0, 1 22 | // Disable Strict alignment checking & Enable Instruction cache 23 | mrc p15, 0, r0, c1, c0, 0 24 | bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 25 | bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */ 26 | bic r0, r0, #0x00000002 /* Clear bit 1 (Alignment faults) */ 27 | orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */ 28 | mcr p15, 0, r0, c1, c0, 0 29 | bx lr 30 | 31 | //UINTN 32 | //ArmPlatformGetCorePosition ( 33 | // IN UINTN MpId 34 | // ); 35 | ASM_FUNC(ArmPlatformGetCorePosition) 36 | and r1, r0, #ARM_CORE_MASK 37 | and r0, r0, #ARM_CLUSTER_MASK 38 | add r0, r1, r0, LSR #7 39 | bx lr 40 | 41 | //UINTN 42 | //ArmPlatformGetPrimaryCoreMpId ( 43 | // VOID 44 | // ); 45 | ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) 46 | MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore)) 47 | bx lr 48 | 49 | //UINTN 50 | //ArmPlatformIsPrimaryCore ( 51 | // IN UINTN MpId 52 | // ); 53 | ASM_FUNC(ArmPlatformIsPrimaryCore) 54 | MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) 55 | and r0, r0, r1 56 | MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore)) 57 | cmp r0, r1 58 | moveq r0, #1 59 | movne r0, #0 60 | bx lr 61 | -------------------------------------------------------------------------------- /Library/PlatformBootManagerLib/PlatformBm.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | Head file for BDS Platform specific code 3 | 4 | Copyright (C) 2015-2016, Red Hat, Inc. 5 | Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.
6 | Copyright (c) 2016, Linaro Ltd. All rights reserved.
7 | 8 | This program and the accompanying materials are licensed and made available 9 | under the terms and conditions of the BSD License which accompanies this 10 | distribution. The full text of the license may be found at 11 | http://opensource.org/licenses/bsd-license.php 12 | 13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT 14 | WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 | 16 | **/ 17 | 18 | #ifndef _PLATFORM_BM_H_ 19 | #define _PLATFORM_BM_H_ 20 | 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | 30 | /** 31 | Use SystemTable Conout to stop video based Simple Text Out consoles from 32 | going to the video device. Put up LogoFile on every video device that is a 33 | console. 34 | 35 | @param[in] LogoFile File name of logo to display on the center of the 36 | screen. 37 | 38 | @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo 39 | displayed. 40 | @retval EFI_UNSUPPORTED Logo not found 41 | **/ 42 | EFI_STATUS 43 | EnableQuietBoot ( 44 | IN EFI_GUID *LogoFile 45 | ); 46 | 47 | /** 48 | Use SystemTable Conout to turn on video based Simple Text Out consoles. The 49 | Simple Text Out screens will now be synced up with all non video output 50 | devices 51 | 52 | @retval EFI_SUCCESS UGA devices are back in text mode and synced up. 53 | **/ 54 | EFI_STATUS 55 | DisableQuietBoot ( 56 | VOID 57 | ); 58 | 59 | #endif // _PLATFORM_BM_H_ 60 | -------------------------------------------------------------------------------- /Drivers/ConSplitterDxe/ConSplitterDxe.uni: -------------------------------------------------------------------------------- 1 | // /** @file 2 | // This driver provides multi console supports. 3 | // 4 | // This driver acts as a virtual console, takes over the console I/O control from selected 5 | // standard console devices, and transmits console I/O to related console device drivers. 6 | // Consplitter could install Graphics Output protocol and/or UGA Draw protocol in system 7 | // table according PCD settings(PcdConOutGopSupport, and PcdConOutUgaSupport). It always 8 | // consumes Graphics Output protocol which is produced by display device, and consumes UGA Draw 9 | // protocol which is produced by display device according to PcdUgaConsumeSupport value. 10 | // Note: If only UGA Draw protocol is installed in system, PcdUgaConsumeSupport should be 11 | // set to TRUE. 12 | // 13 | // Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
14 | // 15 | // This program and the accompanying materials 16 | // are licensed and made available under the terms and conditions of the BSD License 17 | // which accompanies this distribution. The full text of the license may be found at 18 | // http://opensource.org/licenses/bsd-license.php 19 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 20 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 21 | // 22 | // **/ 23 | 24 | 25 | #string STR_MODULE_ABSTRACT #language en-US "Provides multi console support" 26 | 27 | #string STR_MODULE_DESCRIPTION #language en-US "This driver acts as a virtual console, takes over the console I/O control from selected standard console devices, and transmits console I/O to related console device drivers. Consplitter could install Graphics Output protocol and/or UGA Draw protocol in system table according PCD settings(PcdConOutGopSupport, and PcdConOutUgaSupport). It always consumes Graphics Output protocol, which is produced by display device, and consumes UGA Draw protocol, which is produced by display device according to PcdUgaConsumeSupport value. Note: If only UGA Draw protocol is installed in system, PcdUgaConsumeSupport should be set to TRUE." 28 | 29 | -------------------------------------------------------------------------------- /Include/Device/iMX6ClkPwr.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * Copyright 2018 NXP 5 | * 6 | * This program and the accompanying materials 7 | * are licensed and made available under the terms and conditions of the BSD License 8 | * which accompanies this distribution. The full text of the license may be found at 9 | * http://opensource.org/licenses/bsd-license.php 10 | * 11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | * 14 | **/ 15 | 16 | #ifndef _IMX6_CLK_PWR_H_ 17 | #define _IMX6_CLK_PWR_H_ 18 | 19 | // The valid value for PLL loop divider is 27-54 so define the range of valid 20 | // frequency for PLL5 below before divider is applied. 21 | #define PLL5_MIN_FREQ 648000000 22 | #define PLL5_MAX_FREQ 1296000000 23 | 24 | #include "iMX6ClkPwr_ULL.h" 25 | 26 | typedef enum { 27 | IMX_CLOCK_GATE_STATE_OFF = 0x0, 28 | IMX_CLOCK_GATE_STATE_ON_RUN = 0x1, 29 | IMX_CLOCK_GATE_STATE_ON = 0x3, 30 | } IMX_CLOCK_GATE_STATE; 31 | 32 | typedef struct { 33 | UINT32 Frequency; 34 | IMX_CLK Parent; 35 | } IMX_CLOCK_INFO; 36 | 37 | VOID 38 | ImxClkPwrSetClockGate ( 39 | IN IMX_CLK_GATE ClockGate, 40 | IN IMX_CLOCK_GATE_STATE State 41 | ); 42 | 43 | // Set multiple clock gates to a given state 44 | VOID 45 | ImxClkPwrSetClockGates ( 46 | IN CONST IMX_CLK_GATE *ClockGateList, 47 | IN UINTN ClockGateCount, 48 | IN IMX_CLOCK_GATE_STATE State 49 | ); 50 | 51 | IMX_CLOCK_GATE_STATE 52 | ImxClkPwrGetClockGate ( 53 | IN IMX_CLK_GATE ClockGate 54 | ); 55 | 56 | EFI_STATUS 57 | ImxClkPwrGetClockInfo ( 58 | IN IMX_CLK ClockId, 59 | OUT IMX_CLOCK_INFO *ClockInfo 60 | ); 61 | 62 | EFI_STATUS 63 | ImxClkPwrGpuEnable ( 64 | ); 65 | 66 | EFI_STATUS 67 | ImxClkPwrIpuDIxEnable ( 68 | ); 69 | 70 | EFI_STATUS ImxClkPwrIpuLDBxEnable ( 71 | ); 72 | 73 | EFI_STATUS 74 | ImxSetPll5ReferenceRate ( 75 | UINT32 ClockRate 76 | ); 77 | 78 | EFI_STATUS 79 | ImxClkPwrClkOut1Enable ( 80 | IMX_CLK Clock, 81 | UINT32 Divider 82 | ); 83 | 84 | VOID 85 | ImxClkPwrClkOut1Disable ( 86 | ); 87 | 88 | EFI_STATUS 89 | ImxClkPwrValidateClocks ( 90 | ); 91 | 92 | CONST CHAR16 93 | *StringFromImxClk ( 94 | IN IMX_CLK Value 95 | ); 96 | 97 | #endif // _IMX6_CLK_PWR_H_ 98 | -------------------------------------------------------------------------------- /Include/Device/regs-common.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Freescale i.MXS Register Accessors 3 | * 4 | * Copyright (C) 2011 Marek Vasut 5 | * on behalf of DENX Software Engineering GmbH 6 | * 7 | * SPDX-License-Identifier: GPL-2.0+ 8 | */ 9 | 10 | #ifndef __MXS_REGS_COMMON_H__ 11 | #define __MXS_REGS_COMMON_H__ 12 | 13 | #include 14 | 15 | /* 16 | * The i.MXS has interesting feature when it comes to register access. There 17 | * are four kinds of access to one particular register. Those are: 18 | * 19 | * 1) Common read/write access. To use this mode, just write to the address of 20 | * the register. 21 | * 2) Set bits only access. To set bits, write which bits you want to set to the 22 | * address of the register + 0x4. 23 | * 3) Clear bits only access. To clear bits, write which bits you want to clear 24 | * to the address of the register + 0x8. 25 | * 4) Toggle bits only access. To toggle bits, write which bits you want to 26 | * toggle to the address of the register + 0xc. 27 | * 28 | * IMPORTANT NOTE: Not all registers support accesses 2-4! Also, not all bits 29 | * can be set/cleared by pure write as in access type 1, some need to be 30 | * explicitly set/cleared by using access type 2-3. 31 | * 32 | * The following macros and structures allow the user to either access the 33 | * register in all aforementioned modes (by accessing reg_name, reg_name_set, 34 | * reg_name_clr, reg_name_tog) or pass the register structure further into 35 | * various functions with correct type information (by accessing reg_name_reg). 36 | * 37 | */ 38 | 39 | #define __mxs_reg_8(name) \ 40 | UINT8 name[4]; \ 41 | UINT8 name##_set[4]; \ 42 | UINT8 name##_clr[4]; \ 43 | UINT8 name##_tog[4]; \ 44 | 45 | #define __mxs_reg_32(name) \ 46 | UINT32 name; \ 47 | UINT32 name##_set; \ 48 | UINT32 name##_clr; \ 49 | UINT32 name##_tog; 50 | 51 | struct mxs_register_8 { 52 | __mxs_reg_8(reg) 53 | }; 54 | 55 | struct mxs_register_32 { 56 | __mxs_reg_32(reg) 57 | }; 58 | 59 | #define mxs_reg_8(name) \ 60 | union { \ 61 | struct { __mxs_reg_8(name) }; \ 62 | struct mxs_register_8 name##_reg; \ 63 | }; 64 | 65 | #define mxs_reg_32(name) \ 66 | union { \ 67 | struct { __mxs_reg_32(name) }; \ 68 | struct mxs_register_32 name##_reg; \ 69 | }; 70 | 71 | #endif /* __MXS_REGS_COMMON_H__ */ 72 | -------------------------------------------------------------------------------- /Library/MemoryInitPeiLib/MemoryInitPeiLib.inf: -------------------------------------------------------------------------------- 1 | #/** @file 2 | # 3 | # Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
4 | # This program and the accompanying materials 5 | # are licensed and made available under the terms and conditions of the BSD License 6 | # which accompanies this distribution. The full text of the license may be found at 7 | # http://opensource.org/licenses/bsd-license.php 8 | # 9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 | # 12 | #**/ 13 | 14 | [Defines] 15 | INF_VERSION = 0x00010005 16 | BASE_NAME = ArmMemoryInitPeiLib 17 | FILE_GUID = 55ddb6e0-70b5-11e0-b33e-0002a5d5c51b 18 | MODULE_TYPE = BASE 19 | VERSION_STRING = 1.0 20 | LIBRARY_CLASS = MemoryInitPeiLib|SEC PEIM 21 | 22 | [Sources] 23 | MemoryInitPeiLib.c 24 | 25 | 26 | [Packages] 27 | MdePkg/MdePkg.dec 28 | MdeModulePkg/MdeModulePkg.dec 29 | EmbeddedPkg/EmbeddedPkg.dec 30 | ArmPkg/ArmPkg.dec 31 | ArmPlatformPkg/ArmPlatformPkg.dec 32 | PrimeG2Pkg/PrimeG2Pkg.dec 33 | 34 | [LibraryClasses] 35 | DebugLib 36 | HobLib 37 | ArmMmuLib 38 | ArmPlatformLib 39 | 40 | [Guids] 41 | gEfiMemoryTypeInformationGuid 42 | 43 | [FeaturePcd] 44 | gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob 45 | 46 | [FixedPcd] 47 | gArmTokenSpaceGuid.PcdFdBaseAddress 48 | gArmTokenSpaceGuid.PcdFdSize 49 | 50 | gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize 51 | 52 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory 53 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS 54 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType 55 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData 56 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode 57 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode 58 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData 59 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode 60 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData 61 | 62 | [Pcd] 63 | gArmTokenSpaceGuid.PcdSystemMemoryBase 64 | gArmTokenSpaceGuid.PcdSystemMemorySize 65 | 66 | [Depex] 67 | TRUE 68 | -------------------------------------------------------------------------------- /PrimeG2Pkg.dec: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2019, Bingxing Wang. All rights reserved. 2 | [Defines] 3 | DEC_SPECIFICATION = 0x00010005 4 | PACKAGE_NAME = PrimeG2Pkg 5 | PACKAGE_GUID = 7d9a1985-bff2-467a-b584-6a46f02309e7 6 | PACKAGE_VERSION = 0.01 7 | 8 | [Includes.common] 9 | Include 10 | 11 | [Guids.common] 12 | gPrimeG2PkgTokenSpaceGuid = { 0x510d9e0a, 0xf906, 0x4ad0, { 0x8d, 0xe5, 0xd4, 0x6a, 0x7f, 0x42, 0xfe, 0x9b } } 13 | giMXPlatformTokenSpaceGuid = { 0x24b09abe, 0x4e47, 0x481c, { 0xa9, 0xad, 0xce, 0xf1, 0x2c, 0x39, 0x23, 0x27} } 14 | gInternalTestPayloadGuid = { 0x05cd7984, 0x5e27, 0x441d, { 0xa2, 0x1e, 0x5b, 0x69, 0x19, 0xbb, 0x82, 0xd7 } } 15 | 16 | [PcdsFixedAtBuild.common] 17 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferWidth|320|UINT32|0xa0000101 18 | gPrimeG2PkgTokenSpaceGuid.PcdFrameBufferHeight|240|UINT32|0xa0000102 19 | 20 | # MX6ULL_LCDIF1_BASE_ADDR 21 | gPrimeG2PkgTokenSpaceGuid.PcdLcdIfBaseAddress|0x021c8000|UINT32|0xb0000101 22 | gPrimeG2PkgTokenSpaceGuid.PcdEnableScreenSerial|TRUE|BOOLEAN|0xc0000001 23 | 24 | # PcdGpioBankMemoryRange - The memory range for 1 GPIO bank register (default 16KB) 25 | giMXPlatformTokenSpaceGuid.PcdGpioBankMemoryRange|16384|UINT32|0x15 26 | 27 | # PcdSerialRegisterBase - Define a base address of UEFI console UART 28 | # PcdKdUartInstance - UART instance that should be used for Windows 29 | giMXPlatformTokenSpaceGuid.PcdKdUartInstance|1|UINT32|0x11 30 | giMXPlatformTokenSpaceGuid.PcdSerialRegisterBase|0x00000000|UINT32|0x12 31 | 32 | # USB EHCI Controller 33 | gPrimeG2PkgTokenSpaceGuid.PcdEHCIBase|0x02184000|UINT32|0xE 34 | gPrimeG2PkgTokenSpaceGuid.PcdEHCILength|0x4000|UINT32|0xF 35 | gPrimeG2PkgTokenSpaceGuid.PcdIsUsbPortOTG|TRUE|BOOLEAN|0x10 36 | gPrimeG2PkgTokenSpaceGuid.PcdUSBOTGBase|0x02184000|UINT32|0x11 37 | 38 | # Keypad Interrupt 39 | giMXPlatformTokenSpaceGuid.PcdKeypadDeviceIrq|114|UINT32|0xd0000100 40 | 41 | # SMBIOS 42 | giMXPlatformTokenSpaceGuid.PcdSystemUuid|{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}|VOID*|0x3D 43 | giMXPlatformTokenSpaceGuid.PcdPhysicalMemoryMaximumCapacity|0x0|UINT32|0x4B 44 | 45 | # MPPark 46 | giMXPlatformTokenSpaceGuid.MpParkMailboxBase|0x80200000|UINT32|0xe0000001 47 | 48 | [PcdsFeatureFlag.common] 49 | gPrimeG2PkgTokenSpaceGuid.PcdLvdsEnable|FALSE|BOOLEAN|0x00001001 -------------------------------------------------------------------------------- /AcpiTables/Madt.asl: -------------------------------------------------------------------------------- 1 | [000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] 2 | [004h 0004 4] Table Length : 00000094 3 | [008h 0008 1] Revision : 08 4 | [009h 0009 1] Checksum : 00 5 | [00Ah 0010 6] Oem ID : "MCRSFT" 6 | [010h 0016 8] Oem Table ID : "IMX6EDK2" 7 | [018h 0024 4] Oem Revision : 01000101 8 | [01Ch 0028 4] Asl Compiler ID : "IMX6" 9 | [020h 0032 4] Asl Compiler Revision : 00000001 10 | 11 | [024h 0036 4] Local Apic Address : 00a02000 12 | [028h 0040 4] Flags (decoded below) : 00000000 13 | PC-AT Compatibility : 0 14 | 15 | [02Ch 0044 1] Subtable Type : 0B [Generic Interrupt Controller] 16 | [02Dh 0045 1] Length : 50 17 | [02Eh 0046 2] Reserved : 0000 18 | [030h 0048 4] CPU Interface Number : 00000000 19 | [034h 0052 4] Processor UID : 00000000 20 | [038h 0056 4] Flags (decoded below) : 00000001 21 | Processor Enabled : 1 22 | Performance Interrupt Trigger Mode : 0 23 | Virtual GIC Interrupt Trigger Mode : 0 24 | [03Ch 0060 4] Parking Protocol Version : 00000001 25 | [040h 0064 4] Performance Interrupt : 0000007e 26 | [044h 0068 8] Parked Address : 0000000080100000 27 | [04Ch 0076 8] Base Address : 0000000000a02000 28 | [054h 0084 8] Virtual GIC Base Address : 0000000000000000 29 | [05Ch 0092 8] Hypervisor GIC Base Address : 0000000000000000 30 | [064h 0100 4] Virtual GIC Interrupt : 00000000 31 | [068h 0104 8] Redistributor Base Address : 0000000000000000 32 | [070h 0112 8] ARM MPIDR : 0000000000000000 33 | [078h 0120 1] Efficiency Class : 00 34 | [079h 0121 1] Reserved : 00 35 | [07Ah 0122 2] SPE Overflow Interrupt : 0000 36 | 37 | [07Ch 0124 1] Subtable Type : 0C [Generic Interrupt Distributor] 38 | [07Dh 0125 1] Length : 18 39 | [07Eh 0126 2] Reserved : 0000 40 | [080h 0128 4] Local GIC Hardware ID : 00000000 41 | [084h 0132 8] Base Address : 0000000000a01000 42 | [08Ch 0140 4] Interrupt Base : 00000000 43 | [090h 0144 1] Version : 00 44 | [091h 0145 3] Reserved : 000000 45 | -------------------------------------------------------------------------------- /Include/Device/iMXGpio.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _IMX_GPIO_H_ 16 | #define _IMX_GPIO_H_ 17 | 18 | #include 19 | 20 | typedef enum { 21 | IMX_GPIO_LOW = 0, 22 | IMX_GPIO_HIGH = 1 23 | } IMX_GPIO_VALUE; 24 | 25 | typedef enum { 26 | IMX_GPIO_DIR_INPUT, 27 | IMX_GPIO_DIR_OUTPUT 28 | } IMX_GPIO_DIR; 29 | 30 | typedef enum { 31 | IMX_GPIO_BANK1 = 1, 32 | IMX_GPIO_BANK2, 33 | IMX_GPIO_BANK3, 34 | IMX_GPIO_BANK4, 35 | IMX_GPIO_BANK5, 36 | IMX_GPIO_BANK6, 37 | IMX_GPIO_BANK7, 38 | } IMX_GPIO_BANK; 39 | 40 | #pragma pack(push, 1) 41 | 42 | #define GPIO_RESERVED_SIZE \ 43 | ((FixedPcdGet32(PcdGpioBankMemoryRange) / 4) - 8) 44 | 45 | typedef struct { 46 | UINT32 DR; // 0x00 GPIO data register (GPIO1_DR) 47 | UINT32 GDIR; // 0x04 GPIO direction register (GPIO1_GDIR) 48 | UINT32 PSR; // 0x08 GPIO pad status register (GPIO1_PSR) 49 | UINT32 ICR1; // 0x0C GPIO interrupt configuration register1 (GPIO1_ICR1) 50 | UINT32 ICR2; // 0x10 GPIO interrupt configuration register2 (GPIO1_ICR2) 51 | UINT32 IMR; // 0x14 GPIO interrupt mask register (GPIO1_IMR) 52 | UINT32 ISR; // 0x18 GPIO interrupt status register (GPIO1_ISR) 53 | UINT32 EDGE_SEL; // 0x1C GPIO edge select register (GPIO1_EDGE_SEL) 54 | UINT32 reserved[GPIO_RESERVED_SIZE]; 55 | } IMX_GPIO_BANK_REGISTERS; 56 | 57 | #pragma pack(pop) 58 | 59 | typedef struct { 60 | IMX_GPIO_BANK_REGISTERS Banks[7]; 61 | } IMX_GPIO_REGISTERS; 62 | 63 | /** 64 | Set the specified GPIO to the specified direction. 65 | **/ 66 | VOID 67 | ImxGpioDirection ( 68 | IMX_GPIO_BANK Bank, 69 | UINT32 IoNumber, 70 | IMX_GPIO_DIR Direction 71 | ); 72 | 73 | /** 74 | Write a value to a GPIO pin. 75 | **/ 76 | VOID 77 | ImxGpioWrite ( 78 | IMX_GPIO_BANK Bank, 79 | UINT32 IoNumber, 80 | IMX_GPIO_VALUE Value 81 | ); 82 | 83 | /** 84 | Read a GPIO pin input value. 85 | **/ 86 | IMX_GPIO_VALUE 87 | ImxGpioRead ( 88 | IMX_GPIO_BANK Bank, 89 | UINT32 IoNumber 90 | ); 91 | 92 | #endif 93 | -------------------------------------------------------------------------------- /Drivers/GraphicsConsoleDxe/GraphicsConsoleDxe.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # Console support on graphic devices. 3 | # 4 | # This driver will install Simple Text Output protocol by consuming Graphices Output 5 | # protocol or UGA Draw protocol on graphic devices. 6 | # 7 | # Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
8 | # This program and the accompanying materials 9 | # are licensed and made available under the terms and conditions of the BSD License 10 | # which accompanies this distribution. The full text of the license may be found at 11 | # http://opensource.org/licenses/bsd-license.php 12 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 | # 15 | # 16 | ## 17 | 18 | [Defines] 19 | INF_VERSION = 0x00010005 20 | BASE_NAME = GraphicsConsoleDxe 21 | MODULE_UNI_FILE = GraphicsConsoleDxe.uni 22 | FILE_GUID = CCCB0C28-4B24-11d5-9A5A-0090273FC14D 23 | MODULE_TYPE = UEFI_DRIVER 24 | VERSION_STRING = 1.0 25 | ENTRY_POINT = InitializeGraphicsConsole 26 | 27 | # 28 | # The following information is for reference only and not required by the build tools. 29 | # 30 | # VALID_ARCHITECTURES = IA32 X64 IPF EBC 31 | # 32 | # DRIVER_BINDING = gGraphicsConsoleDriverBinding 33 | # COMPONENT_NAME = gGraphicsConsoleComponentName 34 | # COMPONENT_NAME2 = gGraphicsConsoleComponentName2 35 | # 36 | 37 | [Sources] 38 | ComponentName.c 39 | LaffStd.c 40 | GraphicsConsole.c 41 | GraphicsConsole.h 42 | 43 | [Packages] 44 | MdePkg/MdePkg.dec 45 | MdeModulePkg/MdeModulePkg.dec 46 | 47 | [LibraryClasses] 48 | UefiBootServicesTableLib 49 | MemoryAllocationLib 50 | BaseMemoryLib 51 | UefiLib 52 | UefiDriverEntryPoint 53 | DebugLib 54 | HiiLib 55 | PcdLib 56 | 57 | [Protocols] 58 | gEfiDevicePathProtocolGuid ## TO_START 59 | gEfiSimpleTextOutProtocolGuid ## BY_START 60 | gEfiGraphicsOutputProtocolGuid ## TO_START 61 | gEfiUgaDrawProtocolGuid ## TO_START 62 | gEfiHiiFontProtocolGuid ## TO_START 63 | ## TO_START 64 | ## NOTIFY 65 | gEfiHiiDatabaseProtocolGuid 66 | 67 | [FeaturePcd] 68 | gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport ## CONSUMES 69 | 70 | [Pcd] 71 | gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution ## SOMETIMES_CONSUMES 72 | gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution ## SOMETIMES_CONSUMES 73 | 74 | [UserExtensions.TianoCore."ExtraFiles"] 75 | GraphicsConsoleDxeExtra.uni 76 | -------------------------------------------------------------------------------- /Include/Device/MemoryMap.h: -------------------------------------------------------------------------------- 1 | #ifndef _DEVICE_MEMORY_MAP_H_ 2 | #define _DEVICE_MEMORY_MAP_H_ 3 | 4 | #include 5 | 6 | #define MAX_ARM_MEMORY_REGION_DESCRIPTOR_COUNT 8 7 | 8 | /* Below flag is used for system memory */ 9 | #define SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES \ 10 | EFI_RESOURCE_ATTRIBUTE_PRESENT | \ 11 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \ 12 | EFI_RESOURCE_ATTRIBUTE_TESTED | \ 13 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | \ 14 | EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | \ 15 | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | \ 16 | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | \ 17 | EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE 18 | 19 | typedef enum { 20 | NoHob, 21 | AddMem, 22 | AddDev, 23 | MaxMem 24 | } DeviceMemoryAddHob; 25 | 26 | typedef struct { 27 | EFI_PHYSICAL_ADDRESS Address; 28 | UINT64 Length; 29 | EFI_RESOURCE_TYPE ResourceType; 30 | EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute; 31 | ARM_MEMORY_REGION_ATTRIBUTES ArmAttributes; 32 | DeviceMemoryAddHob HobOption; 33 | EFI_MEMORY_TYPE MemoryType; 34 | } ARM_MEMORY_REGION_DESCRIPTOR_EX, *PARM_MEMORY_REGION_DESCRIPTOR_EX; 35 | 36 | static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = 37 | { 38 | /* Address, Length, ResourceType, Resource Attribute, ARM MMU Attribute, HobOption, EFI Memory Type */ 39 | { 40 | // Registers regions 41 | 0x00000000, 42 | 0x80000000, 43 | EFI_RESOURCE_MEMORY_MAPPED_IO, 44 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE, 45 | ARM_MEMORY_REGION_ATTRIBUTE_DEVICE, 46 | AddDev, 47 | EfiMemoryMappedIO 48 | }, 49 | { 50 | // Display Reserved 51 | 0x80000000, 52 | 0x00100000, 53 | EFI_RESOURCE_MEMORY_RESERVED, 54 | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE, 55 | ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH, 56 | AddMem, 57 | EfiMaxMemoryType 58 | }, 59 | { 60 | // MP Park 61 | 0x80100000, 62 | 0x00100000, 63 | EFI_RESOURCE_SYSTEM_MEMORY, 64 | SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, 65 | ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED, 66 | AddMem, 67 | EfiRuntimeServicesCode 68 | }, 69 | { 70 | // UEFI FD 71 | 0x80200000, 72 | 0x00100000, 73 | EFI_RESOURCE_SYSTEM_MEMORY, 74 | SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, 75 | ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK, 76 | AddMem, 77 | EfiBootServicesCode 78 | }, 79 | { 80 | // Free memory 81 | 0x80300000, 82 | 0x0f900000, 83 | EFI_RESOURCE_SYSTEM_MEMORY, 84 | SYSTEM_MEMORY_RESOURCE_ATTR_CAPABILITIES, 85 | ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK, 86 | AddMem, 87 | EfiConventionalMemory 88 | }, 89 | /* Terminator */ 90 | { 0 } 91 | }; 92 | 93 | #endif -------------------------------------------------------------------------------- /PrePi/PrePi.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2011-2015, ARM Limited. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _PREPI_H_ 16 | #define _PREPI_H_ 17 | 18 | #include 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | 30 | #include 31 | #include 32 | #include 33 | 34 | #define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1); 35 | 36 | extern UINT64 mSystemMemoryEnd; 37 | 38 | #pragma pack(1) 39 | 40 | typedef struct { 41 | UINT32 ProcessorId; 42 | UINT32 Reserved; 43 | UINT64 JumpAddress; 44 | } EFI_PROCESSOR_MAILBOX; 45 | 46 | #pragma pack() 47 | 48 | RETURN_STATUS 49 | EFIAPI 50 | TimerConstructor ( 51 | VOID 52 | ); 53 | 54 | VOID 55 | PrePiMain ( 56 | IN UINTN UefiMemoryBase, 57 | IN UINTN StacksBase, 58 | IN UINT64 StartTimeStamp 59 | ); 60 | 61 | EFI_STATUS 62 | EFIAPI 63 | MemoryPeim ( 64 | IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, 65 | IN UINT64 UefiMemorySize 66 | ); 67 | 68 | EFI_STATUS 69 | EFIAPI 70 | PlatformPeim ( 71 | VOID 72 | ); 73 | 74 | VOID 75 | PrimaryMain ( 76 | IN UINTN UefiMemoryBase, 77 | IN UINTN StacksBase, 78 | IN UINT64 StartTimeStamp 79 | ); 80 | 81 | VOID 82 | SecondaryMain ( 83 | IN UINTN MpId 84 | ); 85 | 86 | // Either implemented by PrePiLib or by MemoryInitPei 87 | VOID 88 | BuildMemoryTypeInformationHob ( 89 | VOID 90 | ); 91 | 92 | EFI_STATUS 93 | GetPlatformPpi ( 94 | IN EFI_GUID *PpiGuid, 95 | OUT VOID **Ppi 96 | ); 97 | 98 | // Initialize the Architecture specific controllers 99 | VOID 100 | ArchInitialize ( 101 | VOID 102 | ); 103 | 104 | VOID 105 | EFIAPI 106 | ProcessLibraryConstructorList ( 107 | VOID 108 | ); 109 | 110 | #endif /* _PREPI_H_ */ 111 | -------------------------------------------------------------------------------- /AcpiTables/Dsdt/Dsdt-Uart.asl: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * iMX6 Solo UART Controllers 4 | * 5 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 6 | * 7 | * This program and the accompanying materials 8 | * are licensed and made available under the terms and conditions of the BSD License 9 | * which accompanies this distribution. The full text of the license may be found at 10 | * http://opensource.org/licenses/bsd-license.php 11 | * 12 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 | * 15 | **/ 16 | 17 | Device (UAR1) 18 | { 19 | Name (_HID, "NXP0106") 20 | Name (_UID, 0x1) 21 | Name (_DDN, "UART1") 22 | Method (_STA) { 23 | Return (0xf) 24 | } 25 | Name (_CRS, ResourceTemplate () { 26 | MEMORY32FIXED (ReadWrite, 0x02020000, 0x4000, ) 27 | Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 58 } 28 | 29 | // UART1_TX_DATA - GPIO1 - GPIO1_IO16 - 16 30 | // UART1_RX_DATA - GPIO1 - GPIO1_IO17 - 17 31 | // MsftFunctionConfig (Exclusive, PullUp, IMX_ALT5, "\\_SB.GPIO", 0, 32 | // ResourceConsumer, ) { 16, 17 } 33 | // 34 | // MsftFunctionConfig (Arg0, Arg1, Arg2, Arg3, Arg4, Arg5, Arg6) { Pin List } 35 | VendorLong () { 36 | MSFT_UUID, // Vendor UUID (MSFT UUID) 37 | MSFT_FUNCTION_CONFIG, // Resource Identifier (MSFT Function Config) 38 | 0x1d,0x00, // Length (0xF + sizeof(PinList) + sizeof(ResourceName)) 39 | 0x01, // Revision (0x1) 40 | RESOURCECONSUMER_EXCLUSIVE, // Flags (Arg5 | Arg0: ResourceConsumer | Exclusive) 41 | PULL_UP, // Pin configuration (Arg1: PullUp) 42 | IMX_ALT5,0x00, // Function Number (Arg2: IMX_ALT5) 43 | PIN_TABLE_OFFSET, // Pin Table Offset (0x12) 44 | 0x00, // Resource Source Index (Arg4: 0) 45 | 0x16,0x00, // Resource Source Name Offset (0x12 + sizeof(PinList)) 46 | 0x20,0x00, // Vendor Data Offset (0x12 + sizeof(PinList) + sizeof(ResourceName)) 47 | 0x00,0x00, // Vendor Data Length (sizeof(Arg6) = 0) 48 | 0x10,0x00,0x11,0x00, // Pin List (16, 17) 49 | SB_GPIO // Resource Name (Arg3: \_SB.GPIO in ASCII) 50 | } 51 | 52 | UARTSerialBus ( 53 | 115200, 54 | DataBitsEight, 55 | StopBitsOne, 56 | 0, // LinesInUse 57 | LittleEndian, 58 | ParityTypeNone, 59 | FlowControlNone, 60 | 0, 61 | 0, 62 | "\\_SB.CPU0", 63 | 0, 64 | ResourceConsumer, 65 | ,) 66 | }) 67 | 68 | Name (_DSD, Package () { 69 | ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 70 | Package () { 71 | Package (2) {"SerCx-FriendlyName", "UART1"} 72 | } 73 | }) 74 | } 75 | -------------------------------------------------------------------------------- /Library/PlatformBootManagerLib/PlatformBootManagerLib.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # Implementation for PlatformBootManagerLib library class interfaces. 3 | # 4 | # Copyright (C) 2015-2016, Red Hat, Inc. 5 | # Copyright (c) 2014, ARM Ltd. All rights reserved.
6 | # Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
7 | # Copyright (c) 2016, Linaro Ltd. All rights reserved.
8 | # 9 | # This program and the accompanying materials are licensed and made available 10 | # under the terms and conditions of the BSD License which accompanies this 11 | # distribution. The full text of the license may be found at 12 | # http://opensource.org/licenses/bsd-license.php 13 | # 14 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 15 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 16 | # IMPLIED. 17 | # 18 | ## 19 | 20 | [Defines] 21 | INF_VERSION = 0x00010005 22 | BASE_NAME = PlatformBootManagerLib 23 | FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F 24 | MODULE_TYPE = DXE_DRIVER 25 | VERSION_STRING = 1.0 26 | LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER 27 | 28 | # 29 | # The following information is for reference only and not required by the build tools. 30 | # 31 | # VALID_ARCHITECTURES = ARM AARCH64 32 | # 33 | 34 | [Sources] 35 | PlatformBm.c 36 | 37 | [Packages] 38 | MdeModulePkg/MdeModulePkg.dec 39 | MdePkg/MdePkg.dec 40 | ShellPkg/ShellPkg.dec 41 | PrimeG2Pkg/PrimeG2Pkg.dec 42 | 43 | [LibraryClasses] 44 | BaseLib 45 | BaseMemoryLib 46 | BootLogoLib 47 | CapsuleLib 48 | DebugLib 49 | DevicePathLib 50 | DxeServicesLib 51 | HobLib 52 | MemoryAllocationLib 53 | PcdLib 54 | PrintLib 55 | UefiBootManagerLib 56 | UefiBootServicesTableLib 57 | UefiLib 58 | 59 | [FeaturePcd] 60 | gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport 61 | 62 | [FixedPcd] 63 | gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString 64 | gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate 65 | gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits 66 | gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity 67 | gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits 68 | gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType 69 | 70 | [Pcd] 71 | gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut 72 | 73 | [Guids] 74 | gEfiFileInfoGuid 75 | gEfiFileSystemInfoGuid 76 | gEfiFileSystemVolumeLabelInfoIdGuid 77 | gEfiEndOfDxeEventGroupGuid 78 | gEfiTtyTermGuid 79 | gUefiShellFileGuid 80 | 81 | [Protocols] 82 | gEfiDevicePathProtocolGuid 83 | gEfiGraphicsOutputProtocolGuid 84 | gEfiLoadedImageProtocolGuid 85 | gEfiPciRootBridgeIoProtocolGuid 86 | gEfiSimpleFileSystemProtocolGuid 87 | gEsrtManagementProtocolGuid 88 | -------------------------------------------------------------------------------- /AcpiTables/Platform.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * i.MX Platform specific defines for constructing ACPI tables 4 | * 5 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 6 | * 7 | * This program and the accompanying materials 8 | * are licensed and made available under the terms and conditions of the BSD License 9 | * which accompanies this distribution. The full text of the license may be found at 10 | * http://opensource.org/licenses/bsd-license.php 11 | * 12 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 | * 15 | **/ 16 | 17 | #ifndef _PLATFORM_IMX_H_ 18 | #define _PLATFORM_IMX_H_ 19 | 20 | #include 21 | 22 | // 23 | // Platform specific definition 24 | // 25 | #define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('I','M','X','6','E','D','K','2') // OEM table id 8 bytes long 26 | #define EFI_ACPI_OEM_REVISION 0x01000105 27 | #define EFI_ACPI_CREATOR_ID SIGNATURE_32('I','M','X','6') 28 | #define EFI_ACPI_CREATOR_REVISION 0x00000001 29 | 30 | #define EFI_ACPI_OEM_ID {'M','C','R','S','F','T'} // OEMID 6 bytes 31 | #define EFI_ACPI_VENDOR_ID SIGNATURE_32('N','X','P','I') 32 | #define EFI_ACPI_CSRT_REVISION 0x00000005 33 | #define EFI_ACPI_5_0_CSRT_REVISION 0x00000000 34 | 35 | // Resource Descriptor Types 36 | #define EFI_ACPI_CSRT_RD_TYPE_INTERRUPT 1 37 | #define EFI_ACPI_CSRT_RD_TYPE_TIMER 2 38 | #define EFI_ACPI_CSRT_RD_TYPE_DMA 3 39 | #define EFI_ACPI_CSRT_RD_TYPE_CACHE 4 40 | 41 | // Resource Descriptor Subtypes 42 | #define EFI_ACPI_CSRT_RD_SUBTYPE_INTERRUPT_LINES 0 43 | #define EFI_ACPI_CSRT_RD_SUBTYPE_INTERRUPT_CONTROLLER 1 44 | #define EFI_ACPI_CSRT_RD_SUBTYPE_TIMER 0 45 | #define EFI_ACPI_CSRT_RD_SUBTYPE_DMA_CHANNEL 0 46 | #define EFI_ACPI_CSRT_RD_SUBTYPE_DMA_CONTROLLER 1 47 | #define EFI_ACPI_CSRT_RD_SUBTYPE_CACHE 0 48 | 49 | #pragma pack(push, 1) 50 | //------------------------------------------------------------------------ 51 | // CSRT Resource Group header 24 bytes long 52 | //------------------------------------------------------------------------ 53 | typedef struct { 54 | UINT32 Length; 55 | UINT32 VendorID; 56 | UINT32 SubVendorId; 57 | UINT16 DeviceId; 58 | UINT16 SubdeviceId; 59 | UINT16 Revision; 60 | UINT16 Reserved; 61 | UINT32 SharedInfoLength; 62 | } EFI_ACPI_5_0_CSRT_RESOURCE_GROUP_HEADER; 63 | 64 | //------------------------------------------------------------------------ 65 | // CSRT Resource Descriptor 12 bytes total 66 | //------------------------------------------------------------------------ 67 | typedef struct { 68 | UINT32 Length; 69 | UINT16 ResourceType; 70 | UINT16 ResourceSubType; 71 | UINT32 UID; 72 | } EFI_ACPI_5_0_CSRT_RESOURCE_DESCRIPTOR_HEADER; 73 | #pragma pack (pop) 74 | 75 | #endif // !_PLATFORM_IMX_H_ 76 | -------------------------------------------------------------------------------- /Drivers/LedHeartbeatDxe/Heartbeat.c: -------------------------------------------------------------------------------- 1 | /* Heartbeat: periodically flash the LED to indicate firmware status */ 2 | 3 | #include 4 | #include 5 | 6 | #include 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include 14 | #include 15 | #include 16 | #include 17 | 18 | #include 19 | #include 20 | 21 | EFI_EVENT m_CallbackTimer = NULL; 22 | EFI_EVENT m_ExitBootServicesEvent = NULL; 23 | 24 | IMX_GPIO_VALUE LastLedValue = IMX_GPIO_HIGH; 25 | 26 | VOID EFIAPI LedHeartbeatCallback( 27 | IN EFI_EVENT Event, 28 | IN VOID *Context 29 | ) 30 | { 31 | // GPIO1_2: LED_GREEN_N 32 | LastLedValue = (LastLedValue == IMX_GPIO_LOW) ? IMX_GPIO_HIGH : IMX_GPIO_LOW; 33 | ImxGpioWrite(IMX_GPIO_BANK1, 2, LastLedValue); 34 | } 35 | 36 | VOID EFIAPI ExitBootServicesCallback( 37 | IN EFI_EVENT Event, 38 | IN VOID *Context 39 | ) 40 | { 41 | // Turn on all LEDs 42 | ImxGpioWrite(IMX_GPIO_BANK1, 2, IMX_GPIO_LOW); 43 | ImxGpioWrite(IMX_GPIO_BANK1, 7, IMX_GPIO_LOW); 44 | ImxGpioWrite(IMX_GPIO_BANK1, 9, IMX_GPIO_LOW); 45 | } 46 | 47 | EFI_STATUS 48 | EFIAPI 49 | HeartbeatInitialize( 50 | IN EFI_HANDLE ImageHandle, 51 | IN EFI_SYSTEM_TABLE *SystemTable 52 | ) 53 | { 54 | EFI_STATUS Status; 55 | 56 | // Set LED direction 57 | ImxGpioDirection(IMX_GPIO_BANK1, 2, IMX_GPIO_DIR_OUTPUT); 58 | ImxGpioDirection(IMX_GPIO_BANK1, 7, IMX_GPIO_DIR_OUTPUT); 59 | ImxGpioDirection(IMX_GPIO_BANK1, 9, IMX_GPIO_DIR_OUTPUT); 60 | 61 | // Turn on all LEDs 62 | ImxGpioWrite(IMX_GPIO_BANK1, 2, IMX_GPIO_LOW); 63 | ImxGpioWrite(IMX_GPIO_BANK1, 7, IMX_GPIO_LOW); 64 | ImxGpioWrite(IMX_GPIO_BANK1, 9, IMX_GPIO_LOW); 65 | 66 | // Wait a bit (screen will be unresponsive) 67 | MicroSecondDelay(10000000); 68 | 69 | // Turn off all LEDs 70 | ImxGpioWrite(IMX_GPIO_BANK1, 2, IMX_GPIO_HIGH); 71 | ImxGpioWrite(IMX_GPIO_BANK1, 7, IMX_GPIO_HIGH); 72 | ImxGpioWrite(IMX_GPIO_BANK1, 9, IMX_GPIO_HIGH); 73 | 74 | Status = gBS->CreateEvent( 75 | EVT_NOTIFY_SIGNAL | EVT_TIMER, 76 | TPL_CALLBACK, LedHeartbeatCallback, NULL, 77 | &m_CallbackTimer 78 | ); 79 | 80 | ASSERT_EFI_ERROR(Status); 81 | 82 | Status = gBS->CreateEventEx( 83 | EVT_NOTIFY_SIGNAL, 84 | TPL_NOTIFY, 85 | ExitBootServicesCallback, 86 | NULL, 87 | &gEfiEventExitBootServicesGuid, 88 | &m_ExitBootServicesEvent 89 | ); 90 | 91 | ASSERT_EFI_ERROR(Status); 92 | 93 | Status = gBS->SetTimer( 94 | m_CallbackTimer, TimerPeriodic, 95 | EFI_TIMER_PERIOD_MILLISECONDS(500) 96 | ); 97 | 98 | ASSERT_EFI_ERROR(Status); 99 | return Status; 100 | } 101 | -------------------------------------------------------------------------------- /Library/PlatformLib/ArmPlatformLib.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2011-2012, ARM Limited. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include 16 | #include 17 | #include 18 | #include 19 | 20 | #include 21 | 22 | /** 23 | Return the current Boot Mode 24 | 25 | This function returns the boot reason on the platform 26 | 27 | **/ 28 | EFI_BOOT_MODE 29 | ArmPlatformGetBootMode ( 30 | VOID 31 | ) 32 | { 33 | return BOOT_WITH_FULL_CONFIGURATION; 34 | } 35 | 36 | /** 37 | Initialize controllers that must setup in the normal world 38 | 39 | This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei 40 | in the PEI phase. 41 | 42 | **/ 43 | RETURN_STATUS 44 | ArmPlatformInitialize ( 45 | IN UINTN MpId 46 | ) 47 | { 48 | // Initialize the required timer 49 | TimerConstructor(); 50 | 51 | // This is a unicore platform 52 | return RETURN_SUCCESS; 53 | } 54 | 55 | ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = { 56 | { 57 | // Cluster 0, Core 0 58 | 0x0, 0x0, 59 | 60 | // MP Core MailBox Set/Get/Clear Addresses and Clear Value 61 | (EFI_PHYSICAL_ADDRESS)0, 62 | (EFI_PHYSICAL_ADDRESS)0, 63 | (EFI_PHYSICAL_ADDRESS)0, 64 | (UINT64)0xFFFFFFFF 65 | }, 66 | }; 67 | 68 | EFI_STATUS 69 | PrePeiCoreGetMpCoreInfo ( 70 | OUT UINTN *CoreCount, 71 | OUT ARM_CORE_INFO **ArmCoreTable 72 | ) 73 | { 74 | // This is a unicore platform - but reported as MpCore, why... 75 | if (ArmIsMpCore()) { 76 | *CoreCount = sizeof(mArmPlatformNullMpCoreInfoTable) / sizeof(ARM_CORE_INFO); 77 | *ArmCoreTable = mArmPlatformNullMpCoreInfoTable; 78 | return EFI_SUCCESS; 79 | } else { 80 | return EFI_UNSUPPORTED; 81 | } 82 | } 83 | 84 | ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; 85 | 86 | EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { 87 | { 88 | EFI_PEI_PPI_DESCRIPTOR_PPI, 89 | &gArmMpCoreInfoPpiGuid, 90 | &mMpCoreInfoPpi 91 | } 92 | }; 93 | 94 | VOID 95 | ArmPlatformGetPlatformPpiList ( 96 | OUT UINTN *PpiListSize, 97 | OUT EFI_PEI_PPI_DESCRIPTOR **PpiList 98 | ) 99 | { 100 | if (ArmIsMpCore()) { 101 | *PpiListSize = sizeof(gPlatformPpiTable); 102 | *PpiList = gPlatformPpiTable; 103 | } else { 104 | *PpiListSize = 0; 105 | *PpiList = NULL; 106 | } 107 | } 108 | -------------------------------------------------------------------------------- /AcpiTables/Gtdt.aslc: -------------------------------------------------------------------------------- 1 | /** @file 2 | * Generic Timer Description Table (GTDT) 3 | * 4 | * Copyright (c) 2012 - 2017, ARM Limited. All rights reserved. 5 | * 6 | * SPDX-License-Identifier: BSD-2-Clause-Patent 7 | * 8 | **/ 9 | 10 | #include "Platform.h" 11 | 12 | #include 13 | #include 14 | #include 15 | 16 | #define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT 17 | #define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0 18 | #define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE 19 | #define GTDT_GLOBAL_FLAGS_LEVEL 0 20 | 21 | // Note: We could have a build flag that switches between memory mapped/non-memory mapped timer 22 | #ifdef SYSTEM_TIMER_BASE_ADDRESS 23 | #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL) 24 | #else 25 | #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL) 26 | #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF 27 | #endif 28 | 29 | #define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE 30 | #define GTDT_TIMER_LEVEL_TRIGGERED 0 31 | #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY 32 | #define GTDT_TIMER_ACTIVE_HIGH 0 33 | 34 | #define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) 35 | 36 | #pragma pack (1) 37 | 38 | typedef struct { 39 | EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; 40 | } GENERIC_TIMER_DESCRIPTION_TABLE; 41 | 42 | #pragma pack () 43 | 44 | GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = { 45 | { 46 | { 47 | EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, 48 | sizeof (EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE), 49 | EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION, 50 | 0, 51 | EFI_ACPI_OEM_ID, 52 | EFI_ACPI_OEM_TABLE_ID, 53 | EFI_ACPI_OEM_REVISION, 54 | EFI_ACPI_CREATOR_ID, 55 | EFI_ACPI_CREATOR_REVISION 56 | }, 57 | SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress 58 | 0, // UINT32 Reserved 59 | FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV 60 | GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags 61 | FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV 62 | GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags 63 | FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV 64 | GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags 65 | FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV 66 | GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags 67 | 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress 68 | 0, // UINT32 PlatformTimerCount 69 | 0 70 | }, 71 | }; 72 | 73 | // 74 | // Reference the table being generated to prevent the optimizer from removing the 75 | // data structure from the executable 76 | // 77 | VOID* CONST ReferenceAcpiTable = &Gtdt; -------------------------------------------------------------------------------- /PrePi/PeiUniCore.inf: -------------------------------------------------------------------------------- 1 | #/** @file 2 | # 3 | # (C) Copyright 2015 Hewlett-Packard Development Company, L.P.
4 | # Copyright (c) 2011-2017, ARM Ltd. All rights reserved.
5 | # 6 | # This program and the accompanying materials 7 | # are licensed and made available under the terms and conditions of the BSD License 8 | # which accompanies this distribution. The full text of the license may be found at 9 | # http://opensource.org/licenses/bsd-license.php 10 | # 11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | # 14 | #**/ 15 | 16 | [Defines] 17 | INF_VERSION = 0x00010005 18 | BASE_NAME = ArmPlatformPrePiUniCore 19 | FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8 20 | MODULE_TYPE = SEC 21 | VERSION_STRING = 1.0 22 | 23 | [Sources] 24 | PrePi.c 25 | MainUniCore.c 26 | 27 | [Sources.ARM] 28 | Arm/ArchPrePi.c 29 | Arm/ModuleEntryPoint.S | GCC 30 | Arm/ModuleEntryPoint.asm | RVCT 31 | 32 | [Packages] 33 | MdePkg/MdePkg.dec 34 | MdeModulePkg/MdeModulePkg.dec 35 | EmbeddedPkg/EmbeddedPkg.dec 36 | ArmPkg/ArmPkg.dec 37 | ArmPlatformPkg/ArmPlatformPkg.dec 38 | PrimeG2Pkg/PrimeG2Pkg.dec 39 | 40 | [LibraryClasses] 41 | BaseLib 42 | DebugLib 43 | DebugAgentLib 44 | ArmLib 45 | IoLib 46 | TimerLib 47 | SerialPortLib 48 | ExtractGuidedSectionLib 49 | LzmaDecompressLib 50 | DebugAgentLib 51 | PrePiLib 52 | ArmPlatformLib 53 | ArmPlatformStackLib 54 | MemoryAllocationLib 55 | HobLib 56 | PrePiHobListPointerLib 57 | PlatformPeiLib 58 | MemoryInitPeiLib 59 | 60 | [Ppis] 61 | gArmMpCoreInfoPpiGuid 62 | 63 | [Guids] 64 | gArmMpCoreInfoGuid 65 | gEfiFirmwarePerformanceGuid 66 | 67 | [FeaturePcd] 68 | gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob 69 | gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores 70 | 71 | [Pcd] 72 | gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString 73 | 74 | [FixedPcd] 75 | gArmTokenSpaceGuid.PcdVFPEnabled 76 | 77 | gArmTokenSpaceGuid.PcdFdBaseAddress 78 | gArmTokenSpaceGuid.PcdFdSize 79 | 80 | gArmTokenSpaceGuid.PcdFvBaseAddress 81 | gArmTokenSpaceGuid.PcdFvSize 82 | 83 | gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize 84 | gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize 85 | 86 | gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize 87 | 88 | gArmPlatformTokenSpaceGuid.PcdCoreCount 89 | 90 | gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize 91 | 92 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory 93 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS 94 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType 95 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData 96 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode 97 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode 98 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData 99 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode 100 | gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData 101 | 102 | gPrimeG2PkgTokenSpaceGuid.PcdLcdIfBaseAddress 103 | giMXPlatformTokenSpaceGuid.MpParkMailboxBase 104 | 105 | gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz 106 | 107 | [Pcd] 108 | gArmTokenSpaceGuid.PcdSystemMemoryBase 109 | gArmTokenSpaceGuid.PcdSystemMemorySize 110 | -------------------------------------------------------------------------------- /Library/iMX6ULLResetSystemLib/iMX6ULLResetSystemLib.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | #include 9 | #include 10 | #include 11 | 12 | #include 13 | 14 | STATIC UINTN pWatchDog1ControlRegister = IMX_WDOG1_WCR; 15 | EFI_EVENT mRuntimeVirtualAddressChangedEvent; 16 | 17 | VOID EFIAPI RtConvertPointers(IN EFI_EVENT Event, IN VOID *Context) 18 | { 19 | gRT->ConvertPointer(0, (VOID **) &pWatchDog1ControlRegister); 20 | } 21 | 22 | VOID EFIAPI AssertWatchdogSwReset() 23 | { 24 | // TODO: Turn off the LCD interface 25 | 26 | MmioWrite16(pWatchDog1ControlRegister + WDT_WCR, 0x24); 27 | ArmDataMemoryBarrier(); 28 | 29 | if (MmioRead16(pWatchDog1ControlRegister + WDT_WCR) & WDT_WCR_WDE) { 30 | MmioWrite16(pWatchDog1ControlRegister + WDT_WSR, WDT_SEQ1); 31 | MmioWrite16(pWatchDog1ControlRegister + WDT_WSR, WDT_SEQ2); 32 | } 33 | 34 | MmioWrite16(pWatchDog1ControlRegister + WDT_WCR, 0x24); 35 | MmioWrite16(pWatchDog1ControlRegister + WDT_WCR, 0x24); 36 | CpuDeadLoop(); 37 | } 38 | 39 | /** 40 | Resets the entire platform. 41 | 42 | @param ResetType The type of reset to perform. 43 | @param ResetStatus The status code for the reset. 44 | @param DataSize The size, in bytes, of WatchdogData. 45 | @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or 46 | EfiResetShutdown the data buffer starts with a Null-terminated 47 | Unicode string, optionally followed by additional binary data. 48 | 49 | **/ 50 | EFI_STATUS 51 | EFIAPI 52 | LibResetSystem ( 53 | IN EFI_RESET_TYPE ResetType, 54 | IN EFI_STATUS ResetStatus, 55 | IN UINTN DataSize, 56 | IN CHAR16 *ResetData OPTIONAL 57 | ) 58 | { 59 | switch (ResetType) { 60 | case EfiResetPlatformSpecific: 61 | case EfiResetWarm: 62 | case EfiResetCold: 63 | case EfiResetShutdown: 64 | AssertWatchdogSwReset(); 65 | break; 66 | default: 67 | ASSERT (FALSE); 68 | return EFI_UNSUPPORTED; 69 | } 70 | 71 | DEBUG ((EFI_D_ERROR, "%a: WDOG Reset failed\n", __FUNCTION__)); 72 | CpuDeadLoop (); 73 | return EFI_UNSUPPORTED; 74 | } 75 | 76 | /** 77 | Initialize any infrastructure required for LibResetSystem () to function. 78 | 79 | @param ImageHandle The firmware allocated handle for the EFI image. 80 | @param SystemTable A pointer to the EFI System Table. 81 | 82 | @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. 83 | 84 | **/ 85 | EFI_STATUS 86 | EFIAPI 87 | LibInitializeResetSystem ( 88 | IN EFI_HANDLE ImageHandle, 89 | IN EFI_SYSTEM_TABLE *SystemTable 90 | ) 91 | { 92 | EFI_STATUS Status; 93 | EFI_GCD_MEMORY_SPACE_DESCRIPTOR pDescriptor; 94 | 95 | // Register the WDOG for runtime memory change 96 | Status = gDS->GetMemorySpaceDescriptor( 97 | ROUND_TO_PAGE(pWatchDog1ControlRegister), 98 | &pDescriptor 99 | ); 100 | 101 | if (EFI_ERROR (Status)) { 102 | goto exit; 103 | } 104 | 105 | Status = gDS->SetMemorySpaceAttributes( 106 | ROUND_TO_PAGE(pWatchDog1ControlRegister), 107 | 0x1000, /* 4K align */ 108 | pDescriptor.Attributes | EFI_MEMORY_RUNTIME 109 | ); 110 | ASSERT_EFI_ERROR (Status); 111 | 112 | // Register BS event for virtual address change 113 | Status = gBS->CreateEventEx( 114 | EVT_NOTIFY_SIGNAL, TPL_NOTIFY, RtConvertPointers, NULL, 115 | &gEfiEventVirtualAddressChangeGuid, 116 | &mRuntimeVirtualAddressChangedEvent 117 | ); 118 | 119 | exit: 120 | return Status; 121 | } 122 | -------------------------------------------------------------------------------- /Include/Device/common_epit.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Provides definitions for the EPIT (Enhanced Periodic Interrupt Timer) 4 | * module that are common to Freescale SoCs. 5 | * 6 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 7 | * Copyright (c) 2004-2010, Freescale Semiconductor, Inc. All Rights Reserved. 8 | * 9 | * This program and the accompanying materials 10 | * are licensed and made available under the terms and conditions of the BSD License 11 | * which accompanies this distribution. The full text of the license may be found at 12 | * http://opensource.org/licenses/bsd-license.php 13 | * 14 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 15 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 16 | * 17 | **/ 18 | 19 | #ifndef __COMMON_EPIT_H 20 | #define __COMMON_EPIT_H 21 | 22 | #include 23 | 24 | typedef struct { 25 | UINT32 CR; 26 | UINT32 SR; 27 | UINT32 LR; 28 | UINT32 CMPR; 29 | UINT32 CNT; 30 | } CSP_EPIT_REG, *PCSP_EPIT_REG; 31 | 32 | #define EPIT_CR_OFFSET 0x0000 33 | #define EPIT_SR_OFFSET 0x0004 34 | #define EPIT_LR_OFFSET 0x0008 35 | #define EPIT_CMPR_OFFSET 0x000C 36 | #define EPIT_CNR_OFFSET 0x0010 37 | 38 | #define EPIT_CR_EN_LSH 0 39 | #define EPIT_CR_ENMOD_LSH 1 40 | #define EPIT_CR_OCIEN_LSH 2 41 | #define EPIT_CR_RLD_LSH 3 42 | #define EPIT_CR_PRESCALAR_LSH 4 43 | #define EPIT_CR_SWR_LSH 16 44 | #define EPIT_CR_IOVW_LSH 17 45 | #define EPIT_CR_DBGEN_LSH 18 46 | #define EPIT_CR_WAITEN_LSH 19 47 | #define EPIT_CR_DOZEN_LSH 20 48 | #define EPIT_CR_STOPEN_LSH 21 49 | #define EPIT_CR_OM_LSH 22 50 | #define EPIT_CR_CLKSRC_LSH 24 51 | 52 | #define EPIT_SR_OCIF_LSH 0 53 | #define EPIT_LR_LOAD_LSH 0 54 | #define EPIT_CMPR_COMPARE_LSH 0 55 | #define EPIT_CNT_COUNT_LSH 0 56 | 57 | #define EPIT_CR_EN_WID 1 58 | #define EPIT_CR_ENMOD_WID 1 59 | #define EPIT_CR_OCIEN_WID 2 60 | #define EPIT_CR_RLD_WID 1 61 | #define EPIT_CR_PRESCALAR_WID 12 62 | #define EPIT_CR_SWR_WID 1 63 | #define EPIT_CR_IOVW_WID 1 64 | #define EPIT_CR_DBGEN_WID 1 65 | #define EPIT_CR_WAITEN_WID 1 66 | #define EPIT_CR_DOZEN_WID 1 67 | #define EPIT_CR_STOPEN_WID 1 68 | #define EPIT_CR_OM_WID 2 69 | #define EPIT_CR_CLKSRC_WID 2 70 | 71 | #define EPIT_SR_OCIF_WID 1 72 | #define EPIT_LR_LOAD_WID 32 73 | #define EPIT_CMPR_COMPARE_WID 32 74 | #define EPIT_CNT_COUNT_WID 32 75 | 76 | // CR 77 | #define EPIT_CR_EN_DISABLE 0 78 | #define EPIT_CR_EN_ENABLE 1 79 | 80 | #define EPIT_CR_ENMOD_RESUME 0 81 | #define EPIT_CR_ENMOD_LOAD 1 82 | 83 | #define EPIT_CR_OCIEN_DISABLE 0 84 | #define EPIT_CR_OCIEN_ENABLE 1 85 | 86 | #define EPIT_CR_RLD_ROLLOVER 0 87 | #define EPIT_CR_RLD_RELOAD 1 88 | 89 | #define EPIT_CR_SWR_NORESET 0 90 | #define EPIT_CR_SWR_RESET 1 91 | 92 | #define EPIT_CR_IOVW_NOOVR 0 93 | #define EPIT_CR_IOVW_OVR 1 94 | 95 | #define EPIT_CR_DBGEN_INACTIVE 0 96 | #define EPIT_CR_DBGEN_ACTIVE 1 97 | 98 | #define EPIT_CR_WAITEN_DISABLE 0 99 | #define EPIT_CR_WAITEN_ENABLE 1 100 | 101 | #define EPIT_CR_DOZEN_DISABLE 0 102 | #define EPIT_CR_DOZEN_ENABLE 1 103 | 104 | #define EPIT_CR_STOPEN_DISABLE 0 105 | #define EPIT_CR_STOPEN_ENABLE 1 106 | 107 | #define EPIT_CR_OM_DICONNECT 0 108 | #define EPIT_CR_OM_TOGGLE 1 109 | #define EPIT_CR_OM_CLEAR 2 110 | #define EPIT_CR_OM_SET 3 111 | 112 | #define EPIT_CR_CLKSRC_OFF 0 113 | #define EPIT_CR_CLKSRC_IPGCLK 1 114 | #define EPIT_CR_CLKSRC_HIGHFREQ 2 // High freq is sourcing from PERCLK 115 | #define EPIT_CR_CLKSRC_CKIL 3 116 | 117 | // CNT 118 | #define EPIT_CNT_COUNT_MAX 0xFFFFFFFF 119 | 120 | #endif // __COMMON_EPIT_H 121 | -------------------------------------------------------------------------------- /AcpiTables/Dsdt/Dsdt-Common.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | // IMX alternate settings codes 16 | #define IMX_ALT0 0x0 17 | #define IMX_ALT1 0x1 18 | #define IMX_ALT2 0x2 19 | #define IMX_ALT3 0x3 20 | #define IMX_ALT4 0x4 21 | #define IMX_ALT5 0x5 22 | #define IMX_ALT6 0x6 23 | #define IMX_ALT7 0x7 24 | 25 | // Vendor Macro defines for MsftFunctionConfig 26 | #define MSFT_UUID 0x00,0x60,0x44,0xd5,0xf3,0x1f,0x11,0x60,0x4a,0xb8,0xb0,0x9c,0x2d,0x23,0x30,0xdd,0x2f 27 | #define MSFT_FUNCTION_CONFIG 0x8d 28 | #define RESOURCEPRODUCER_EXCLUSIVE 0x00,0x00 29 | #define RESOURCEPRODUCER_SHARED 0x01,0x00 30 | #define RESOURCECONSUMER_EXCLUSIVE 0x10,0x00 31 | #define RESOURCECONSUMER_SHARED 0x11,0x00 32 | #define PULL_DEFAULT 0x0 33 | #define PULL_UP 0x1 34 | #define PULL_DOWN 0x2 35 | #define PULL_NONE 0x3 36 | #define PIN_TABLE_OFFSET 0x12,0x00 37 | #define SB_GPIO 0x5c,0x5f,0x53,0x42,0x2e,0x47,0x50,0x49,0x4f,0x00 // \_SB.GPIO in ASCII 38 | 39 | // IMX SDMA request lines. 40 | // These are logical values, the mapping to the SOC 41 | // actual DMA request lines are done in the HAL extension. 42 | #define SDMA_REQ_VPU 0 43 | #define SDMA_REQ_IPU2 1 44 | #define SDMA_REQ_IPU1 2 45 | #define SDMA_REQ_HDMI_AUDIO 3 46 | #define SDMA_REQ_ECSPI1_RX 4 47 | #define SDMA_REQ_ECSPI1_TX 5 48 | #define SDMA_REQ_ECSPI2_RX 6 49 | #define SDMA_REQ_ECSPI2_TX 7 50 | #define SDMA_REQ_ECSPI3_RX 8 51 | #define SDMA_REQ_ECSPI3_TX 9 52 | #define SDMA_REQ_ECSPI4_RX 10 53 | #define SDMA_REQ_ECSPI4_TX 11 54 | #define SDMA_REQ_ECSPI5_RX 12 55 | #define SDMA_REQ_ECSPI5_TX 13 56 | #define SDMA_REQ_I2C1_RX 14 57 | #define SDMA_REQ_I2C1_TX 15 58 | #define SDMA_REQ_I2C2_RX 16 59 | #define SDMA_REQ_I2C2_TX 17 60 | #define SDMA_REQ_I2C3_RX 18 61 | #define SDMA_REQ_I2C3_TX 19 62 | #define SDMA_REQ_UART1_RX 20 63 | #define SDMA_REQ_UART1_TX 21 64 | #define SDMA_REQ_UART2_RX 22 65 | #define SDMA_REQ_UART2_TX 23 66 | #define SDMA_REQ_UART3_RX 24 67 | #define SDMA_REQ_UART3_TX 25 68 | #define SDMA_REQ_UART4_RX 26 69 | #define SDMA_REQ_UART4_TX 27 70 | #define SDMA_REQ_UART5_RX 28 71 | #define SDMA_REQ_UART5_TX 29 72 | #define SDMA_REQ_SPDIF_RX 30 73 | #define SDMA_REQ_SPDIF_TX 31 74 | #define SDMA_REQ_EPIT1 32 75 | #define SDMA_REQ_EPIT2 33 76 | #define SDMA_REQ_GPT 34 77 | #define SDMA_REQ_ASRC_RXA 35 78 | #define SDMA_REQ_ASRC_RXB 36 79 | #define SDMA_REQ_ASRC_RXC 37 80 | #define SDMA_REQ_ASRC_TXA 38 81 | #define SDMA_REQ_ASRC_TXB 39 82 | #define SDMA_REQ_ASRC_TXC 40 83 | #define SDMA_REQ_ESAI_RX 41 84 | #define SDMA_REQ_ESAI_TX 42 85 | #define SDMA_REQ_ASRC_TXA_2_ESAI_TX 43 86 | #define SDMA_REQ_ASRC_TXB_2_ESAI_TX 44 87 | #define SDMA_REQ_ASRC_TXC_2_ESAI_TX 45 88 | #define SDMA_REQ_SSI1_RX1 46 89 | #define SDMA_REQ_SSI1_TX1 47 90 | #define SDMA_REQ_SSI1_RX0 48 91 | #define SDMA_REQ_SSI1_TX0 49 92 | #define SDMA_REQ_SSI2_RX1 50 93 | #define SDMA_REQ_SSI2_TX1 51 94 | #define SDMA_REQ_SSI2_RX0 52 95 | #define SDMA_REQ_SSI2_TX0 53 96 | #define SDMA_REQ_SSI3_RX1 54 97 | #define SDMA_REQ_SSI3_TX1 55 98 | #define SDMA_REQ_SSI3_RX0 56 99 | #define SDMA_REQ_SSI3_TX0 57 100 | #define SDMA_REQ_EXT1 58 101 | #define SDMA_REQ_EXT2 59 102 | #define SDMA_REQ_UART6_RX 60 103 | #define SDMA_REQ_UART6_TX 61 104 | #define SDMA_REQ_ADC1 62 105 | #define SDMA_REQ_ADC2 63 106 | #define SDMA_REQ_I2C4_RX 64 107 | #define SDMA_REQ_I2C4_TX 65 108 | #define SDMA_REQ_CSI1 66 109 | #define SDMA_REQ_CSI2 67 110 | #define SDMA_REQ_PXP 68 111 | #define SDMA_REQ_LCDIF1 69 112 | #define SDMA_REQ_LCDIF2 70 113 | #define SDMA_REQ_QSPI1_RX 71 114 | #define SDMA_REQ_QSPI1_TX 72 115 | #define SDMA_REQ_QSPI2_RX 73 116 | #define SDMA_REQ_QSPI2_TX 74 117 | #define SDMA_REQ_SAI1_TX 75 118 | #define SDMA_REQ_SAI1_RX 76 119 | #define SDMA_REQ_SAI2_TX 77 120 | #define SDMA_REQ_SAI2_RX 78 121 | -------------------------------------------------------------------------------- /Include/Resources/font5x12.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2008 The Android Open Source Project 3 | * All rights reserved. 4 | * 5 | * Redistribution and use in source and binary forms, with or without 6 | * modification, are permitted provided that the following conditions 7 | * are met: 8 | * * Redistributions of source code must retain the above copyright 9 | * notice, this list of conditions and the following disclaimer. 10 | * * Redistributions in binary form must reproduce the above copyright 11 | * notice, this list of conditions and the following disclaimer in 12 | * the documentation and/or other materials provided with the 13 | * distribution. 14 | * 15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 | * SUCH DAMAGE. 27 | */ 28 | 29 | #ifndef _FONT_5x12_DATA_ 30 | #define _FONT_5x12_DATA_ 31 | 32 | #define FONT_WIDTH 5 33 | #define FONT_HEIGHT 12 34 | 35 | #define SCALE_FACTOR 1 36 | 37 | unsigned font5x12[] = { 38 | 0x00000000, 0x00000000, 0x08421080, 0x00020084, 0x00052940, 0x00000000, 39 | 0x15f52800, 0x0000295f, 0x1c52f880, 0x00023e94, 0x08855640, 0x0004d542, 40 | 0x04528800, 0x000b2725, 0x00021080, 0x00000000, 0x04211088, 0x00821042, 41 | 0x10841082, 0x00221108, 0x09575480, 0x00000000, 0x3e420000, 0x00000084, 42 | 0x00000000, 0x00223000, 0x3e000000, 0x00000000, 0x00000000, 0x00471000, 43 | 0x08844200, 0x00008442, 0x2318a880, 0x00022a31, 0x08429880, 0x000f9084, 44 | 0x1108c5c0, 0x000f8444, 0x1c4443e0, 0x00074610, 0x14a62100, 0x000423e9, 45 | 0x26d087e0, 0x00074610, 0x1e10c5c0, 0x00074631, 0x088443e0, 0x00010844, 46 | 0x1d18c5c0, 0x00074631, 0x3d18c5c0, 0x00074610, 0x08e20000, 0x00471000, 47 | 0x08e20000, 0x00223000, 0x02222200, 0x00082082, 0x01f00000, 0x000003e0, 48 | 0x20820820, 0x00008888, 0x1108c5c0, 0x00020084, 0x2b98c5c0, 0x000f05b5, 49 | 0x2318a880, 0x0008c63f, 0x1d2949e0, 0x0007ca52, 0x0210c5c0, 0x00074421, 50 | 0x252949e0, 0x0007ca52, 0x1e1087e0, 0x000f8421, 0x1e1087e0, 0x00008421, 51 | 0x0210c5c0, 0x00074639, 0x3f18c620, 0x0008c631, 0x084211c0, 0x00071084, 52 | 0x10842380, 0x00032508, 0x0654c620, 0x0008c525, 0x02108420, 0x000f8421, 53 | 0x2b5dc620, 0x0008c631, 0x2b59ce20, 0x0008c739, 0x2318c5c0, 0x00074631, 54 | 0x1f18c5e0, 0x00008421, 0x2318c5c0, 0x01075631, 0x1f18c5e0, 0x0008c525, 55 | 0x1c10c5c0, 0x00074610, 0x084213e0, 0x00021084, 0x2318c620, 0x00074631, 56 | 0x1518c620, 0x0002114a, 0x2b18c620, 0x000556b5, 0x08a54620, 0x0008c54a, 57 | 0x08a54620, 0x00021084, 0x088443e0, 0x000f8442, 0x0421084e, 0x00e10842, 58 | 0x08210420, 0x00084108, 0x1084210e, 0x00e42108, 0x0008a880, 0x00000000, 59 | 0x00000000, 0x01f00000, 0x00000104, 0x00000000, 0x20e00000, 0x000b663e, 60 | 0x22f08420, 0x0007c631, 0x22e00000, 0x00074421, 0x23e84200, 0x000f4631, 61 | 0x22e00000, 0x0007443f, 0x1e214980, 0x00010842, 0x22e00000, 0x1d187a31, 62 | 0x26d08420, 0x0008c631, 0x08601000, 0x00071084, 0x10c02000, 0x0c94a108, 63 | 0x0a908420, 0x0008a4a3, 0x084210c0, 0x00071084, 0x2ab00000, 0x0008d6b5, 64 | 0x26d00000, 0x0008c631, 0x22e00000, 0x00074631, 0x22f00000, 0x0210be31, 65 | 0x23e00000, 0x21087a31, 0x26d00000, 0x00008421, 0x22e00000, 0x00074506, 66 | 0x04f10800, 0x00064842, 0x23100000, 0x000b6631, 0x23100000, 0x00022951, 67 | 0x23100000, 0x000556b5, 0x15100000, 0x0008a884, 0x23100000, 0x1d185b31, 68 | 0x11f00000, 0x000f8444, 0x06421098, 0x01821084, 0x08421080, 0x00021084, 69 | 0x30421083, 0x00321084, 0x0004d640, 0x00000000, 0x00000000, 0x00000000, 70 | }; 71 | 72 | #endif 73 | -------------------------------------------------------------------------------- /Library/MemoryInitPeiLib/MemoryInitPeiLib.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2011-2015, ARM Limited. All rights reserved. 4 | * Copyright (c), 2017-2018, Andrey Warkentin 5 | * 6 | * This program and the accompanying materials 7 | * are licensed and made available under the terms and conditions of the BSD License 8 | * which accompanies this distribution. The full text of the license may be found at 9 | * http://opensource.org/licenses/bsd-license.php 10 | * 11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | * 14 | **/ 15 | 16 | #include 17 | 18 | #include 19 | #include 20 | #include 21 | #include 22 | #include 23 | #include 24 | 25 | // See memory map here. 26 | #include 27 | 28 | extern UINT64 mSystemMemoryEnd; 29 | 30 | VOID 31 | BuildMemoryTypeInformationHob( 32 | VOID 33 | ); 34 | 35 | STATIC 36 | VOID 37 | InitMmu( 38 | IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable 39 | ) 40 | { 41 | 42 | VOID *TranslationTableBase; 43 | UINTN TranslationTableSize; 44 | RETURN_STATUS Status; 45 | 46 | //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in 47 | // DRAM (even at the top of DRAM as it is the first permanent memory allocation) 48 | Status = ArmConfigureMmu(MemoryTable, &TranslationTableBase, &TranslationTableSize); 49 | if (EFI_ERROR(Status)) { 50 | DEBUG((EFI_D_ERROR, "Error: Failed to enable MMU\n")); 51 | } 52 | } 53 | 54 | STATIC 55 | VOID 56 | AddHob 57 | ( 58 | PARM_MEMORY_REGION_DESCRIPTOR_EX Desc 59 | ) 60 | { 61 | BuildResourceDescriptorHob( 62 | Desc->ResourceType, 63 | Desc->ResourceAttribute, 64 | Desc->Address, 65 | Desc->Length 66 | ); 67 | 68 | BuildMemoryAllocationHob( 69 | Desc->Address, 70 | Desc->Length, 71 | Desc->MemoryType 72 | ); 73 | } 74 | 75 | /*++ 76 | 77 | Routine Description: 78 | 79 | 80 | 81 | Arguments: 82 | 83 | FileHandle - Handle of the file being invoked. 84 | PeiServices - Describes the list of possible PEI Services. 85 | 86 | Returns: 87 | 88 | Status - EFI_SUCCESS if the boot mode could be set 89 | 90 | --*/ 91 | EFI_STATUS 92 | EFIAPI 93 | MemoryPeim( 94 | IN EFI_PHYSICAL_ADDRESS UefiMemoryBase, 95 | IN UINT64 UefiMemorySize 96 | ) 97 | { 98 | PARM_MEMORY_REGION_DESCRIPTOR_EX MemoryDescriptorEx = gDeviceMemoryDescriptorEx; 99 | ARM_MEMORY_REGION_DESCRIPTOR MemoryDescriptor[MAX_ARM_MEMORY_REGION_DESCRIPTOR_COUNT]; 100 | UINTN Index = 0; 101 | 102 | // Ensure PcdSystemMemorySize has been set 103 | ASSERT(PcdGet64(PcdSystemMemorySize) != 0); 104 | 105 | // Run through each memory descriptor 106 | while (MemoryDescriptorEx->Length != 0) 107 | { 108 | switch (MemoryDescriptorEx->HobOption) 109 | { 110 | case AddMem: 111 | case AddDev: 112 | AddHob(MemoryDescriptorEx); 113 | break; 114 | case NoHob: 115 | default: 116 | goto update; 117 | } 118 | 119 | update: 120 | ASSERT(Index < MAX_ARM_MEMORY_REGION_DESCRIPTOR_COUNT); 121 | 122 | MemoryDescriptor[Index].PhysicalBase = MemoryDescriptorEx->Address; 123 | MemoryDescriptor[Index].VirtualBase = MemoryDescriptorEx->Address; 124 | MemoryDescriptor[Index].Length = MemoryDescriptorEx->Length; 125 | MemoryDescriptor[Index].Attributes = MemoryDescriptorEx->ArmAttributes; 126 | 127 | Index++; 128 | MemoryDescriptorEx++; 129 | } 130 | 131 | // Last one (terminator) 132 | ASSERT(Index < MAX_ARM_MEMORY_REGION_DESCRIPTOR_COUNT); 133 | MemoryDescriptor[Index].PhysicalBase = 0; 134 | MemoryDescriptor[Index].VirtualBase = 0; 135 | MemoryDescriptor[Index].Length = 0; 136 | MemoryDescriptor[Index].Attributes = 0; 137 | 138 | // Build Memory Allocation Hob 139 | InitMmu(MemoryDescriptor); 140 | 141 | if (FeaturePcdGet(PcdPrePiProduceMemoryTypeInformationHob)) 142 | { 143 | // Optional feature that helps prevent EFI memory map fragmentation. 144 | BuildMemoryTypeInformationHob(); 145 | } 146 | 147 | return EFI_SUCCESS; 148 | } 149 | -------------------------------------------------------------------------------- /Library/iMX6IoMuxLib/iMX6IoMux.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include 16 | 17 | #include 18 | #include 19 | 20 | #include 21 | #include 22 | 23 | // Muxing functions 24 | VOID 25 | ImxPadConfig ( 26 | IN IMX_PAD Pad, 27 | IN IMX_PADCFG PadConfig 28 | ) 29 | { 30 | // Configure Mux Control 31 | MmioWrite32 ( 32 | IMX_IOMUXC_BASE + IMX_IOMUX_PAD_MUX_OFFSET (Pad), 33 | _IMX_PADCFG_MUX_CTL (PadConfig)); 34 | 35 | // Configure Select Input Control 36 | if (_IMX_PADCFG_SEL_INP (PadConfig) != 0) { 37 | DEBUG ((DEBUG_INFO, "Setting INPUT_SELECT %x value %x\n", 38 | _IMX_SEL_INP_REGISTER (_IMX_PADCFG_SEL_INP (PadConfig)), 39 | _IMX_SEL_INP_VALUE (_IMX_PADCFG_SEL_INP (PadConfig)))); 40 | 41 | MmioWrite32 ( 42 | _IMX_SEL_INP_REGISTER (_IMX_PADCFG_SEL_INP (PadConfig)), 43 | _IMX_SEL_INP_VALUE (_IMX_PADCFG_SEL_INP (PadConfig))); 44 | } 45 | 46 | // Configure Pad Control 47 | MmioWrite32 ( 48 | IMX_IOMUXC_BASE + IMX_IOMUX_PAD_CTL_OFFSET (Pad), 49 | _IMX_PADCFG_PAD_CTL (PadConfig)); 50 | } 51 | 52 | VOID 53 | ImxPadDumpConfig ( 54 | IN CHAR8 *SignalFriendlyName, 55 | IN IMX_PAD Pad 56 | ) 57 | { 58 | IMX_IOMUXC_MUX_CTL MuxCtl; 59 | IMX_IOMUXC_PAD_CTL PadCtl; 60 | 61 | MuxCtl.AsUint32 = MmioRead32 ( 62 | IMX_IOMUXC_BASE + IMX_IOMUX_PAD_MUX_OFFSET (Pad)); 63 | 64 | DEBUG (( 65 | DEBUG_INIT, 66 | "- %a MUX_CTL(0x%p)=0x%08x: MUX_MODE:%d SION:%d | ", 67 | SignalFriendlyName, 68 | IMX_IOMUXC_BASE + IMX_IOMUX_PAD_MUX_OFFSET (Pad), 69 | MuxCtl.AsUint32, 70 | MuxCtl.Fields.MUX_MODE, 71 | MuxCtl.Fields.SION)); 72 | 73 | PadCtl.AsUint32 = MmioRead32 ( 74 | IMX_IOMUXC_BASE + IMX_IOMUX_PAD_CTL_OFFSET (Pad)); 75 | 76 | DEBUG (( 77 | DEBUG_INIT, 78 | "PAD_CTL(0x%p)=0x%08x: SRE:%d DSE:%d SPEED:%d ODE:%d PKE:%d PUE:%d PUS:%d HYS:%d\n", 79 | IMX_IOMUXC_BASE + IMX_IOMUX_PAD_CTL_OFFSET (Pad), 80 | PadCtl.AsUint32, 81 | PadCtl.Fields.SRE, 82 | PadCtl.Fields.DSE, 83 | PadCtl.Fields.SPEED, 84 | PadCtl.Fields.ODE, 85 | PadCtl.Fields.PKE, 86 | PadCtl.Fields.PUE, 87 | PadCtl.Fields.PUS, 88 | PadCtl.Fields.HYS)); 89 | } 90 | 91 | // GPIO functions 92 | VOID 93 | ImxGpioDirection ( 94 | IN IMX_GPIO_BANK Bank, 95 | IN UINT32 IoNumber, 96 | IN IMX_GPIO_DIR Direction 97 | ) 98 | { 99 | volatile IMX_GPIO_REGISTERS *gpioRegisters; 100 | 101 | ASSERT (IoNumber < 32); 102 | 103 | gpioRegisters = (IMX_GPIO_REGISTERS *) IMX_GPIO_BASE; 104 | if (Direction == IMX_GPIO_DIR_INPUT) { 105 | MmioAnd32 ((UINTN) &gpioRegisters->Banks[Bank - 1].GDIR, ~ (1 << IoNumber)); 106 | } else { 107 | MmioOr32 ((UINTN) &gpioRegisters->Banks[Bank - 1].GDIR, 1 << IoNumber); 108 | } 109 | } 110 | 111 | VOID 112 | ImxGpioWrite ( 113 | IN IMX_GPIO_BANK Bank, 114 | IN UINT32 IoNumber, 115 | IN IMX_GPIO_VALUE Value 116 | ) 117 | { 118 | volatile IMX_GPIO_REGISTERS *gpioRegisters; 119 | 120 | ASSERT (IoNumber < 32); 121 | 122 | gpioRegisters = (IMX_GPIO_REGISTERS *) IMX_GPIO_BASE; 123 | if (Value == IMX_GPIO_LOW) { 124 | MmioAnd32 ((UINTN) &gpioRegisters->Banks[Bank - 1].DR, ~ (1 << IoNumber)); 125 | } else { 126 | MmioOr32 ((UINTN) &gpioRegisters->Banks[Bank - 1].DR, 1 << IoNumber); 127 | } 128 | } 129 | 130 | IMX_GPIO_VALUE 131 | ImxGpioRead ( 132 | IN IMX_GPIO_BANK Bank, 133 | IN UINT32 IoNumber 134 | ) 135 | { 136 | volatile IMX_GPIO_REGISTERS *gpioRegisters; 137 | UINT32 Mask; 138 | UINT32 Psr; 139 | 140 | ASSERT (IoNumber < 32); 141 | 142 | gpioRegisters = (IMX_GPIO_REGISTERS *) IMX_GPIO_BASE; 143 | Mask = (1 << IoNumber); 144 | Psr = MmioRead32 ((UINTN) &gpioRegisters->Banks[Bank - 1].PSR); 145 | 146 | if (Psr & Mask) { 147 | return IMX_GPIO_HIGH; 148 | } else { 149 | return IMX_GPIO_LOW; 150 | } 151 | } 152 | -------------------------------------------------------------------------------- /PrePi/Arm/ModuleEntryPoint.S: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2011-2015, ARM Limited. All rights reserved. 3 | // 4 | // This program and the accompanying materials 5 | // are licensed and made available under the terms and conditions of the BSD License 6 | // which accompanies this distribution. The full text of the license may be found at 7 | // http://opensource.org/licenses/bsd-license.php 8 | // 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 | // 12 | // 13 | 14 | #include 15 | 16 | #include 17 | 18 | ASM_FUNC(_ModuleEntryPoint) 19 | // Do early platform specific actions 20 | bl ASM_PFX(ArmPlatformPeiBootAction) 21 | 22 | // Get ID of this CPU in Multicore system 23 | bl ASM_PFX(ArmReadMpidr) 24 | // Keep a copy of the MpId register value 25 | mov r8, r0 26 | 27 | _SetSVCMode: 28 | // Enter SVC mode, Disable FIQ and IRQ 29 | mov r1, #(CPSR_MODE_SVC | CPSR_IRQ | CPSR_FIQ) 30 | msr CPSR_c, r1 31 | 32 | // Check if we can install the stack at the top of the System Memory or if we need 33 | // to install the stacks at the bottom of the Firmware Device (case the FD is located 34 | // at the top of the DRAM) 35 | _SystemMemoryEndInit: 36 | ADRL (r1, mSystemMemoryEnd) 37 | ldrd r2, r3, [r1] 38 | teq r3, #0 39 | moveq r1, r2 40 | mvnne r1, #0 41 | 42 | _SetupStackPosition: 43 | // r1 = SystemMemoryTop 44 | 45 | // Calculate Top of the Firmware Device 46 | MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress)) 47 | MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1) 48 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize 49 | 50 | // UEFI Memory Size (stacks are allocated in this region) 51 | MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)) 52 | 53 | // 54 | // Reserve the memory for the UEFI region (contain stacks on its top) 55 | // 56 | 57 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory 58 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop 59 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM 60 | cmp r0, r4 61 | bge _SetupStack 62 | 63 | // Case the top of stacks is the FdBaseAddress 64 | mov r1, r2 65 | 66 | _SetupStack: 67 | // r1 contains the top of the stack (and the UEFI Memory) 68 | 69 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment 70 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the 71 | // top of the memory space) 72 | adds r9, r1, #1 73 | bcs _SetupOverflowStack 74 | 75 | _SetupAlignedStack: 76 | mov r1, r9 77 | b _GetBaseUefiMemory 78 | 79 | _SetupOverflowStack: 80 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE 81 | // aligned (4KB) 82 | MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF) 83 | and r1, r1, r9 84 | 85 | _GetBaseUefiMemory: 86 | // Calculate the Base of the UEFI Memory 87 | sub r9, r1, r4 88 | 89 | _GetStackBase: 90 | // r1 = The top of the Mpcore Stacks 91 | // Stack for the primary core = PrimaryCoreStack 92 | MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)) 93 | sub r10, r1, r2 94 | 95 | // Stack for the secondary core = Number of Cores - 1 96 | MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)) 97 | sub r10, r10, r1 98 | 99 | // r10 = The base of the MpCore Stacks (primary stack & secondary stacks) 100 | mov r0, r10 101 | mov r1, r8 102 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize) 103 | MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)) 104 | MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)) 105 | bl ASM_PFX(ArmPlatformStackSet) 106 | 107 | // Is it the Primary Core ? 108 | mov r0, r8 109 | bl ASM_PFX(ArmPlatformIsPrimaryCore) 110 | cmp r0, #1 111 | bne _PrepareArguments 112 | 113 | _PrepareArguments: 114 | mov r0, r8 115 | mov r1, r9 116 | mov r2, r10 117 | mov r3, sp 118 | 119 | // Move sec startup address into a data register 120 | // Ensure we're jumping to FV version of the code (not boot remapped alias) 121 | ldr r4, =ASM_PFX(CEntryPoint) 122 | 123 | // Jump to PrePiCore C code 124 | // r0 = MpId 125 | // r1 = UefiMemoryBase 126 | // r2 = StacksBase 127 | blx r4 128 | 129 | _NeverReturn: 130 | b _NeverReturn 131 | -------------------------------------------------------------------------------- /Library/PlatformLib/ArmPlatformLibMem.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2011, ARM Limited. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include 20 | 21 | #include 22 | #include 23 | 24 | #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16 25 | 26 | /** 27 | Return the Virtual Memory Map of your platform 28 | 29 | This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform. 30 | 31 | @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- 32 | Virtual Memory mapping. This array must be ended by a zero-filled 33 | entry 34 | 35 | **/ 36 | VOID 37 | ArmPlatformGetVirtualMemoryMap ( 38 | IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap 39 | ) 40 | { 41 | // You are not expected to call this 42 | ASSERT(FALSE); 43 | 44 | ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; 45 | UINTN Index = 0; 46 | ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; 47 | 48 | ASSERT (VirtualMemoryMap != NULL); 49 | DEBUG ((DEBUG_VERBOSE, "Enter: ArmPlatformGetVirtualMemoryMap\n")); 50 | VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR *) AllocatePages ( 51 | EFI_SIZE_TO_PAGES (sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * 52 | MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS)); 53 | if (VirtualMemoryTable == NULL) { 54 | return; 55 | } 56 | 57 | CacheAttributes = DDR_ATTRIBUTES_CACHED; 58 | 59 | // SOC registers region, DMA registers region and GIC-400 registers region 60 | // I doubt if it is really a GIC-400 anyway, but it should be something 61 | // compliant with GICv2 62 | VirtualMemoryTable[Index].PhysicalBase = SOC_REGISTERS_PHYSICAL_BASE1; 63 | VirtualMemoryTable[Index].VirtualBase = SOC_REGISTERS_PHYSICAL_BASE1; 64 | VirtualMemoryTable[Index].Length = SOC_REGISTERS_PHYSICAL_LENGTH1; 65 | VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_ATTRIBUTES; 66 | 67 | VirtualMemoryTable[++Index].PhysicalBase = APBH_DMA_REGISTERS_PHYSICAL_BASE; 68 | VirtualMemoryTable[Index].VirtualBase = APBH_DMA_REGISTERS_PHYSICAL_BASE; 69 | VirtualMemoryTable[Index].Length = APBH_DMA_REGISTERS_PHYSICAL_LENGTH; 70 | VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_ATTRIBUTES; 71 | 72 | VirtualMemoryTable[++Index].PhysicalBase = GIC_REGISTERS_PHYSICAL_BASE; 73 | VirtualMemoryTable[Index].VirtualBase = GIC_REGISTERS_PHYSICAL_BASE; 74 | VirtualMemoryTable[Index].Length = GIC_REGISTERS_PHYSICAL_LENGTH; 75 | VirtualMemoryTable[Index].Attributes = SOC_REGISTERS_ATTRIBUTES; 76 | 77 | // Rearranged system memory regions 78 | VirtualMemoryTable[++Index].PhysicalBase = 0x80000000; 79 | VirtualMemoryTable[Index].VirtualBase = 0x80000000; 80 | VirtualMemoryTable[Index].Length = 0x00100000; 81 | VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH; 82 | 83 | // MpPark 84 | VirtualMemoryTable[++Index].PhysicalBase = 0x80100000; 85 | VirtualMemoryTable[Index].VirtualBase = 0x80100000; 86 | VirtualMemoryTable[Index].Length = 0x00100000; 87 | VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_UNCACHED; 88 | 89 | // FD 90 | VirtualMemoryTable[++Index].PhysicalBase = 0x80200000; 91 | VirtualMemoryTable[Index].VirtualBase = 0x80200000; 92 | VirtualMemoryTable[Index].Length = 0x00100000; 93 | VirtualMemoryTable[Index].Attributes = CacheAttributes; 94 | 95 | // Free memory 96 | VirtualMemoryTable[++Index].PhysicalBase = 0x80300000; 97 | VirtualMemoryTable[Index].VirtualBase = 0x80300000; 98 | VirtualMemoryTable[Index].Length = 0x0fb00000; 99 | VirtualMemoryTable[Index].Attributes = CacheAttributes; 100 | 101 | // End of Table 102 | VirtualMemoryTable[++Index].PhysicalBase = 0; 103 | VirtualMemoryTable[Index].VirtualBase = 0; 104 | VirtualMemoryTable[Index].Length = 0; 105 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; 106 | 107 | ASSERT ((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); 108 | 109 | *VirtualMemoryMap = VirtualMemoryTable; 110 | } 111 | -------------------------------------------------------------------------------- /Drivers/ConSplitterDxe/ConSplitterDxe.inf: -------------------------------------------------------------------------------- 1 | ## @file 2 | # This driver provides multi console supports. 3 | # 4 | # This driver acts as a virtual console, takes over the console I/O control from selected 5 | # standard console devices, and transmits console I/O to related console device drivers. 6 | # Consplitter could install Graphics Output protocol and/or UGA Draw protocol in system 7 | # table according PCD settings(PcdConOutGopSupport, and PcdConOutUgaSupport). It always 8 | # consumes Graphics Output protocol which is produced by display device, and consumes UGA Draw 9 | # protocol which is produced by display device according to PcdUgaConsumeSupport value. 10 | # Note: If only UGA Draw protocol is installed in system, PcdUgaConsumeSupport should be 11 | # set to TRUE. 12 | # 13 | # Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
14 | # 15 | # This program and the accompanying materials 16 | # are licensed and made available under the terms and conditions of the BSD License 17 | # which accompanies this distribution. The full text of the license may be found at 18 | # http://opensource.org/licenses/bsd-license.php 19 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 20 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 21 | # 22 | # 23 | ## 24 | 25 | [Defines] 26 | INF_VERSION = 0x00010005 27 | BASE_NAME = ConSplitterDxe 28 | MODULE_UNI_FILE = ConSplitterDxe.uni 29 | FILE_GUID = 408edcec-cf6d-477c-a5a8-b4844e3de281 30 | MODULE_TYPE = UEFI_DRIVER 31 | VERSION_STRING = 1.0 32 | ENTRY_POINT = ConSplitterDriverEntry 33 | 34 | # 35 | # The following information is for reference only and not required by the build tools. 36 | # 37 | # VALID_ARCHITECTURES = IA32 X64 IPF EBC 38 | # 39 | # DRIVER_BINDING = gConSplitterConInDriverBinding 40 | # COMPONENT_NAME = gConSplitterConInComponentName 41 | # COMPONENT_NAME2 = gConSplitterConInComponentName2 42 | # DRIVER_BINDING = gConSplitterSimplePointerDriverBinding 43 | # COMPONENT_NAME = gConSplitterSimplePointerComponentName 44 | # COMPONENT_NAME2 = gConSplitterSimplePointerComponentName2 45 | # DRIVER_BINDING = gConSplitterConOutDriverBinding 46 | # COMPONENT_NAME = gConSplitterConOutComponentName 47 | # COMPONENT_NAME2 = gConSplitterConOutComponentName2 48 | # DRIVER_BINDING = gConSplitterStdErrDriverBinding 49 | # COMPONENT_NAME = gConSplitterStdErrComponentName 50 | # COMPONENT_NAME2 = gConSplitterStdErrComponentName2 51 | # 52 | 53 | [Sources] 54 | ConSplitterGraphics.c 55 | ComponentName.c 56 | ConSplitter.h 57 | ConSplitter.c 58 | 59 | [Packages] 60 | MdePkg/MdePkg.dec 61 | MdeModulePkg/MdeModulePkg.dec 62 | 63 | [LibraryClasses] 64 | UefiBootServicesTableLib 65 | MemoryAllocationLib 66 | BaseMemoryLib 67 | BaseLib 68 | UefiLib 69 | UefiDriverEntryPoint 70 | DebugLib 71 | PcdLib 72 | 73 | [Guids] 74 | gEfiConsoleInDeviceGuid ## SOMETIMES_CONSUMES ## UNDEFINED # protocol GUID installed on device handle 75 | gEfiStandardErrorDeviceGuid ## SOMETIMES_CONSUMES ## UNDEFINED # protocol GUID installed on device handle 76 | gEfiConsoleOutDeviceGuid ## SOMETIMES_CONSUMES ## UNDEFINED # protocol GUID installed on device handle 77 | ## SOMETIMES_PRODUCES ## Event 78 | ## SOMETIMES_CONSUMES ## Event 79 | gConnectConInEventGuid 80 | 81 | [Protocols] 82 | ## PRODUCES 83 | ## TO_START 84 | gEfiSimplePointerProtocolGuid 85 | ## PRODUCES 86 | ## TO_START 87 | gEfiAbsolutePointerProtocolGuid 88 | ## PRODUCES 89 | ## TO_START 90 | gEfiSimpleTextInProtocolGuid 91 | ## PRODUCES 92 | ## TO_START 93 | gEfiSimpleTextInputExProtocolGuid 94 | ## PRODUCES 95 | ## TO_START 96 | gEfiSimpleTextOutProtocolGuid 97 | ## SOMETIMES_PRODUCES 98 | ## SOMETIMES_CONSUMES 99 | gEfiGraphicsOutputProtocolGuid 100 | ## SOMETIMES_PRODUCES 101 | ## SOMETIMES_CONSUMES 102 | gEfiUgaDrawProtocolGuid 103 | 104 | [FeaturePcd] 105 | gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport ## CONSUMES 106 | gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport ## CONSUMES 107 | gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport ## CONSUMES 108 | 109 | [Pcd] 110 | ## SOMETIMES_PRODUCES 111 | ## SOMETIMES_CONSUMES 112 | gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow 113 | ## SOMETIMES_PRODUCES 114 | ## SOMETIMES_CONSUMES 115 | gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn 116 | gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand ## SOMETIMES_CONSUMES 117 | 118 | [UserExtensions.TianoCore."ExtraFiles"] 119 | ConSplitterDxeExtra.uni 120 | -------------------------------------------------------------------------------- /PrePi/Arm/ModuleEntryPoint.asm: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (c) 2011-2015, ARM Limited. All rights reserved. 3 | // 4 | // This program and the accompanying materials 5 | // are licensed and made available under the terms and conditions of the BSD License 6 | // which accompanies this distribution. The full text of the license may be found at 7 | // http://opensource.org/licenses/bsd-license.php 8 | // 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 | // 12 | // 13 | 14 | #include 15 | #include 16 | 17 | INCLUDE AsmMacroIoLib.inc 18 | 19 | IMPORT CEntryPoint 20 | IMPORT ArmPlatformIsPrimaryCore 21 | IMPORT ArmReadMpidr 22 | IMPORT ArmPlatformPeiBootAction 23 | IMPORT ArmPlatformStackSet 24 | IMPORT mSystemMemoryEnd 25 | 26 | EXPORT _ModuleEntryPoint 27 | 28 | PRESERVE8 29 | AREA PrePiCoreEntryPoint, CODE, READONLY 30 | 31 | StartupAddr DCD CEntryPoint 32 | 33 | _ModuleEntryPoint 34 | // Do early platform specific actions 35 | bl ArmPlatformPeiBootAction 36 | 37 | // Get ID of this CPU in Multicore system 38 | bl ArmReadMpidr 39 | // Keep a copy of the MpId register value 40 | mov r8, r0 41 | 42 | _SetSVCMode 43 | // Enter SVC mode, Disable FIQ and IRQ 44 | mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ) 45 | msr CPSR_c, r1 46 | 47 | // Check if we can install the stack at the top of the System Memory or if we need 48 | // to install the stacks at the bottom of the Firmware Device (case the FD is located 49 | // at the top of the DRAM) 50 | _SystemMemoryEndInit 51 | adrll r1, mSystemMemoryEnd 52 | ldrd r2, r3, [r1] 53 | teq r3, #0 54 | moveq r1, r2 55 | mvnne r1, #0 56 | 57 | _SetupStackPosition 58 | // r1 = SystemMemoryTop 59 | 60 | // Calculate Top of the Firmware Device 61 | mov32 r2, FixedPcdGet32(PcdFdBaseAddress) 62 | mov32 r3, FixedPcdGet32(PcdFdSize) 63 | sub r3, r3, #1 64 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize 65 | 66 | // UEFI Memory Size (stacks are allocated in this region) 67 | mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize) 68 | 69 | // 70 | // Reserve the memory for the UEFI region (contain stacks on its top) 71 | // 72 | 73 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory 74 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop 75 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM 76 | cmp r0, r4 77 | bge _SetupStack 78 | 79 | // Case the top of stacks is the FdBaseAddress 80 | mov r1, r2 81 | 82 | _SetupStack 83 | // r1 contains the top of the stack (and the UEFI Memory) 84 | 85 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment 86 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the 87 | // top of the memory space) 88 | adds r9, r1, #1 89 | bcs _SetupOverflowStack 90 | 91 | _SetupAlignedStack 92 | mov r1, r9 93 | b _GetBaseUefiMemory 94 | 95 | _SetupOverflowStack 96 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE 97 | // aligned (4KB) 98 | mov32 r9, EFI_PAGE_MASK 99 | and r9, r9, r1 100 | sub r1, r1, r9 101 | 102 | _GetBaseUefiMemory 103 | // Calculate the Base of the UEFI Memory 104 | sub r9, r1, r4 105 | 106 | _GetStackBase 107 | // r1 = The top of the Mpcore Stacks 108 | // Stack for the primary core = PrimaryCoreStack 109 | mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize) 110 | sub r10, r1, r2 111 | 112 | // Stack for the secondary core = Number of Cores - 1 113 | mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize) 114 | sub r10, r10, r1 115 | 116 | // r10 = The base of the MpCore Stacks (primary stack & secondary stacks) 117 | mov r0, r10 118 | mov r1, r8 119 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize) 120 | mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize) 121 | mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize) 122 | bl ArmPlatformStackSet 123 | 124 | // Is it the Primary Core ? 125 | mov r0, r8 126 | bl ArmPlatformIsPrimaryCore 127 | cmp r0, #1 128 | bne _PrepareArguments 129 | 130 | _PrepareArguments 131 | mov r0, r8 132 | mov r1, r9 133 | mov r2, r10 134 | 135 | // Move sec startup address into a data register 136 | // Ensure we're jumping to FV version of the code (not boot remapped alias) 137 | ldr r4, StartupAddr 138 | 139 | // Jump to PrePiCore C code 140 | // r0 = MpId 141 | // r1 = UefiMemoryBase 142 | // r2 = StacksBase 143 | blx r4 144 | 145 | _NeverReturn 146 | b _NeverReturn 147 | 148 | END 149 | -------------------------------------------------------------------------------- /CommonFdf.fdf.inc: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2011-2015, ARM Limited. All rights reserved. 3 | # Copyright (c) 2014-2016, Linaro Limited. All rights reserved. 4 | # Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. 5 | # 6 | # This program and the accompanying materials 7 | # are licensed and made available under the terms and conditions of the BSD License 8 | # which accompanies this distribution. The full text of the license may be found at 9 | # http://opensource.org/licenses/bsd-license.php 10 | # 11 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | # 14 | 15 | ################################################################################ 16 | # 17 | # Rules are use with the [FV] section's module INF type to define 18 | # how an FFS file is created for a given INF file. The following Rule are the default 19 | # rules for the different module type. User can add the customized rules to define the 20 | # content of the FFS file. 21 | # 22 | ################################################################################ 23 | 24 | 25 | ############################################################################ 26 | # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # 27 | ############################################################################ 28 | # 29 | #[Rule.Common.DXE_DRIVER] 30 | # FILE DRIVER = $(NAMED_GUID) { 31 | # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 32 | # COMPRESS PI_STD { 33 | # GUIDED { 34 | # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 35 | # UI STRING="$(MODULE_NAME)" Optional 36 | # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 37 | # } 38 | # } 39 | # } 40 | # 41 | ############################################################################ 42 | 43 | [Rule.Common.SEC] 44 | FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED FIXED { 45 | TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi 46 | } 47 | 48 | [Rule.Common.PEI_CORE] 49 | FILE PEI_CORE = $(NAMED_GUID) FIXED { 50 | TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi 51 | UI STRING ="$(MODULE_NAME)" Optional 52 | } 53 | 54 | [Rule.Common.PEIM] 55 | FILE PEIM = $(NAMED_GUID) FIXED { 56 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 57 | TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi 58 | UI STRING="$(MODULE_NAME)" Optional 59 | } 60 | 61 | [Rule.Common.PEIM.TIANOCOMPRESSED] 62 | FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { 63 | PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 64 | GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { 65 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 66 | UI STRING="$(MODULE_NAME)" Optional 67 | } 68 | } 69 | 70 | [Rule.Common.DXE_CORE] 71 | FILE DXE_CORE = $(NAMED_GUID) { 72 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 73 | UI STRING="$(MODULE_NAME)" Optional 74 | } 75 | 76 | [Rule.Common.UEFI_DRIVER] 77 | FILE DRIVER = $(NAMED_GUID) { 78 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 79 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 80 | UI STRING="$(MODULE_NAME)" Optional 81 | } 82 | 83 | [Rule.Common.DXE_DRIVER] 84 | FILE DRIVER = $(NAMED_GUID) { 85 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 86 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 87 | UI STRING="$(MODULE_NAME)" Optional 88 | RAW ACPI Optional |.acpi 89 | RAW ASL Optional |.aml 90 | } 91 | 92 | [Rule.Common.DXE_RUNTIME_DRIVER] 93 | FILE DRIVER = $(NAMED_GUID) { 94 | DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 95 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 96 | UI STRING="$(MODULE_NAME)" Optional 97 | } 98 | 99 | [Rule.Common.UEFI_APPLICATION] 100 | FILE APPLICATION = $(NAMED_GUID) { 101 | UI STRING ="$(MODULE_NAME)" Optional 102 | PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 103 | } 104 | 105 | [Rule.Common.UEFI_DRIVER.BINARY] 106 | FILE DRIVER = $(NAMED_GUID) { 107 | DXE_DEPEX DXE_DEPEX Optional |.depex 108 | PE32 PE32 |.efi 109 | UI STRING="$(MODULE_NAME)" Optional 110 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 111 | } 112 | 113 | [Rule.Common.UEFI_APPLICATION.BINARY] 114 | FILE APPLICATION = $(NAMED_GUID) { 115 | PE32 PE32 |.efi 116 | UI STRING="$(MODULE_NAME)" Optional 117 | VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 118 | } 119 | 120 | [Rule.Common.USER_DEFINED.ACPITABLE] 121 | FILE FREEFORM = $(NAMED_GUID) { 122 | RAW ACPI |.acpi 123 | RAW ASL |.aml 124 | UI STRING="$(MODULE_NAME)" Optional 125 | } -------------------------------------------------------------------------------- /Library/iMX6ClkPwrLib/iMX6ClkPwr_private.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * Copyright 2018 NXP 5 | * 6 | * This program and the accompanying materials 7 | * are licensed and made available under the terms and conditions of the BSD License 8 | * which accompanies this distribution. The full text of the license may be found at 9 | * http://opensource.org/licenses/bsd-license.php 10 | * 11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 | * 14 | **/ 15 | 16 | #ifndef _IMX6ULL_CLK_PWR_PRIVATE_H_ 17 | #define _IMX6ULL_CLK_PWR_PRIVATE_H_ 18 | 19 | #ifndef ARRAYSIZE 20 | #define ARRAYSIZE(a) (sizeof(a) / sizeof(a[0])) 21 | #endif // ARRAYSIZE 22 | 23 | #define _BITS_PER_UINTN (8 * sizeof(UINTN)) 24 | 25 | typedef enum { 26 | IMX_PLL_PFD0, 27 | IMX_PLL_PFD1, 28 | IMX_PLL_PFD2, 29 | IMX_PLL_PFD3, 30 | } IMX_PLL_PFD; 31 | 32 | typedef struct { 33 | IMX_CLK Clock; 34 | IMX_CLOCK_INFO Info; 35 | } IMX_CLOCK_CONTEXT; 36 | 37 | typedef struct { 38 | UINT16 RegisterIndex; // Register index (0-6) 39 | UINT16 GateNumber; // Gate number within register (0-15) 40 | } IMX_CCGR_INDEX; 41 | 42 | typedef struct { 43 | UINTN Valid[(IMX_CLK_MAX + _BITS_PER_UINTN) / _BITS_PER_UINTN]; 44 | IMX_CLOCK_INFO Table[IMX_CLK_MAX]; 45 | } IMX_CLOCK_TREE_CACHE; 46 | 47 | IMX_CCGR_INDEX 48 | ImxpCcgrIndexFromClkGate ( 49 | IN IMX_CLK_GATE ClockGate 50 | ); 51 | 52 | VOID 53 | ImxpClkPwrCacheReset ( 54 | VOID 55 | ); 56 | 57 | IMX_CLK 58 | ImxpClkFromBypassClkSource ( 59 | IN IMX_PLL_BYPASS_CLK_SRC BypassClockSource 60 | ); 61 | 62 | VOID 63 | ImxCcmConfigureGpuClockTree ( 64 | VOID 65 | ); 66 | 67 | VOID 68 | ImxCcmConfigureIPUDIxClockTree ( 69 | VOID 70 | ); 71 | 72 | VOID 73 | ImxCcmConfigureIPULDBxClockTree ( 74 | VOID 75 | ); 76 | 77 | VOID 78 | ImxSetClockRatePLL5 ( 79 | IN UINT32 ClockRate, 80 | IN IMX_CCM_PLL_VIDEO_CTRL_POST_DIV_SELECT PostDivSelect 81 | ); 82 | 83 | EFI_STATUS 84 | ImxpGetClockInfo ( 85 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 86 | IN IMX_CLK ClockId, 87 | OUT IMX_CLOCK_INFO *ClockInfo 88 | ); 89 | 90 | VOID 91 | ImxpGetOsc24ClkInfo ( 92 | OUT IMX_CLOCK_INFO *ClockInfo 93 | ); 94 | 95 | EFI_STATUS 96 | ImxpGetPll1MainClkInfo ( 97 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 98 | OUT IMX_CLOCK_INFO *ClockInfo 99 | ); 100 | 101 | EFI_STATUS 102 | ImxpGetPll2MainClkInfo ( 103 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 104 | OUT IMX_CLOCK_INFO *ClockInfo 105 | ); 106 | 107 | EFI_STATUS 108 | ImxpGetPll2PfdClkInfo ( 109 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 110 | IN IMX_PLL_PFD PfdIndex, 111 | OUT IMX_CLOCK_INFO *ClockInfo 112 | ); 113 | 114 | EFI_STATUS 115 | ImxpGetPll3MainClkInfo ( 116 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 117 | OUT IMX_CLOCK_INFO *ClockInfo 118 | ); 119 | 120 | EFI_STATUS 121 | ImxpGetPll3PfdClkInfo ( 122 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 123 | IN IMX_PLL_PFD PfdIndex, 124 | OUT IMX_CLOCK_INFO *ClockInfo 125 | ); 126 | 127 | EFI_STATUS 128 | ImxpGetPll3SwClkInfo ( 129 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 130 | OUT IMX_CLOCK_INFO *ClockInfo 131 | ); 132 | 133 | EFI_STATUS 134 | ImxpGetAxiClkRootInfo ( 135 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 136 | OUT IMX_CLOCK_INFO *ClockInfo 137 | ); 138 | 139 | EFI_STATUS 140 | ImxpGetPeriphClkInfo ( 141 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 142 | OUT IMX_CLOCK_INFO *ClockInfo 143 | ); 144 | 145 | EFI_STATUS 146 | ImxpGetPrePeriphClkInfo ( 147 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 148 | OUT IMX_CLOCK_INFO *ClockInfo 149 | ); 150 | 151 | EFI_STATUS 152 | ImxpGetPeriphClk2Info ( 153 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 154 | OUT IMX_CLOCK_INFO *ClockInfo 155 | ); 156 | 157 | EFI_STATUS 158 | ImxpGetArmClkRootInfo ( 159 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 160 | OUT IMX_CLOCK_INFO *ClockInfo 161 | ); 162 | 163 | EFI_STATUS 164 | ImxpGetMmdcCh0ClkRootInfo ( 165 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 166 | OUT IMX_CLOCK_INFO *ClockInfo 167 | ); 168 | 169 | EFI_STATUS 170 | ImxpGetAhbClkRootInfo ( 171 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 172 | OUT IMX_CLOCK_INFO *ClockInfo 173 | ); 174 | 175 | EFI_STATUS 176 | ImxpGetIpgClkRootInfo ( 177 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 178 | OUT IMX_CLOCK_INFO *ClockInfo 179 | ); 180 | 181 | EFI_STATUS 182 | ImxpGetGpu2dAxiClkRootInfo ( 183 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 184 | OUT IMX_CLOCK_INFO *ClockInfo 185 | ); 186 | 187 | EFI_STATUS 188 | ImxpGetGpu3dAxiClkRootInfo ( 189 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 190 | OUT IMX_CLOCK_INFO *ClockInfo 191 | ); 192 | 193 | EFI_STATUS 194 | ImxpGetGpu2dCoreClkInfo ( 195 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 196 | OUT IMX_CLOCK_INFO *ClockInfo 197 | ); 198 | 199 | EFI_STATUS 200 | ImxpGetGpu3dCoreClkInfo ( 201 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 202 | OUT IMX_CLOCK_INFO *ClockInfo 203 | ); 204 | 205 | EFI_STATUS 206 | ImxpGetGpu3dShaderClkInfo ( 207 | IN OUT IMX_CLOCK_TREE_CACHE *Cache, 208 | OUT IMX_CLOCK_INFO *ClockInfo 209 | ); 210 | 211 | VOID 212 | ImxEnableGpuVpuPowerDomain ( 213 | VOID 214 | ); 215 | 216 | VOID 217 | ImxDisableGpuVpuPowerDomain ( 218 | VOID 219 | ); 220 | 221 | #endif // _IMX6ULL_CLK_PWR_PRIVATE_H_ 222 | -------------------------------------------------------------------------------- /Drivers/LogoDxe/Logo.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | Logo DXE Driver, install Edkii Platform Logo protocol. 3 | 4 | Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
5 | This program and the accompanying materials 6 | are licensed and made available under the terms and conditions of the BSD License 7 | which accompanies this distribution. The full text of the license may be found at 8 | http://opensource.org/licenses/bsd-license.php 9 | 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | 13 | **/ 14 | #include 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include 20 | #include 21 | #include 22 | 23 | typedef struct { 24 | EFI_IMAGE_ID ImageId; 25 | EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE Attribute; 26 | INTN OffsetX; 27 | INTN OffsetY; 28 | } LOGO_ENTRY; 29 | 30 | EFI_HII_IMAGE_EX_PROTOCOL *mHiiImageEx; 31 | EFI_HII_HANDLE mHiiHandle; 32 | LOGO_ENTRY mLogos[] = { 33 | { 34 | IMAGE_TOKEN (IMG_LOGO), 35 | EdkiiPlatformLogoDisplayAttributeCenter, 36 | 0, 37 | 0 38 | } 39 | }; 40 | 41 | /** 42 | Load a platform logo image and return its data and attributes. 43 | 44 | @param This The pointer to this protocol instance. 45 | @param Instance The visible image instance is found. 46 | @param Image Points to the image. 47 | @param Attribute The display attributes of the image returned. 48 | @param OffsetX The X offset of the image regarding the Attribute. 49 | @param OffsetY The Y offset of the image regarding the Attribute. 50 | 51 | @retval EFI_SUCCESS The image was fetched successfully. 52 | @retval EFI_NOT_FOUND The specified image could not be found. 53 | **/ 54 | EFI_STATUS 55 | EFIAPI 56 | GetImage ( 57 | IN EDKII_PLATFORM_LOGO_PROTOCOL *This, 58 | IN OUT UINT32 *Instance, 59 | OUT EFI_IMAGE_INPUT *Image, 60 | OUT EDKII_PLATFORM_LOGO_DISPLAY_ATTRIBUTE *Attribute, 61 | OUT INTN *OffsetX, 62 | OUT INTN *OffsetY 63 | ) 64 | { 65 | UINT32 Current; 66 | if (Instance == NULL || Image == NULL || 67 | Attribute == NULL || OffsetX == NULL || OffsetY == NULL) { 68 | return EFI_INVALID_PARAMETER; 69 | } 70 | 71 | Current = *Instance; 72 | if (Current >= ARRAY_SIZE (mLogos)) { 73 | return EFI_NOT_FOUND; 74 | } 75 | 76 | (*Instance)++; 77 | *Attribute = mLogos[Current].Attribute; 78 | *OffsetX = mLogos[Current].OffsetX; 79 | *OffsetY = mLogos[Current].OffsetY; 80 | return mHiiImageEx->GetImageEx (mHiiImageEx, mHiiHandle, mLogos[Current].ImageId, Image); 81 | } 82 | 83 | EDKII_PLATFORM_LOGO_PROTOCOL mPlatformLogo = { 84 | GetImage 85 | }; 86 | 87 | /** 88 | Entrypoint of this module. 89 | 90 | This function is the entrypoint of this module. It installs the Edkii 91 | Platform Logo protocol. 92 | 93 | @param ImageHandle The firmware allocated handle for the EFI image. 94 | @param SystemTable A pointer to the EFI System Table. 95 | 96 | @retval EFI_SUCCESS The entry point is executed successfully. 97 | 98 | **/ 99 | EFI_STATUS 100 | EFIAPI 101 | InitializeLogo ( 102 | IN EFI_HANDLE ImageHandle, 103 | IN EFI_SYSTEM_TABLE *SystemTable 104 | ) 105 | { 106 | EFI_STATUS Status; 107 | EFI_HII_PACKAGE_LIST_HEADER *PackageList; 108 | EFI_HII_DATABASE_PROTOCOL *HiiDatabase; 109 | EFI_HANDLE Handle; 110 | 111 | Status = gBS->LocateProtocol ( 112 | &gEfiHiiDatabaseProtocolGuid, 113 | NULL, 114 | (VOID **) &HiiDatabase 115 | ); 116 | ASSERT_EFI_ERROR (Status); 117 | 118 | Status = gBS->LocateProtocol ( 119 | &gEfiHiiImageExProtocolGuid, 120 | NULL, 121 | (VOID **) &mHiiImageEx 122 | ); 123 | ASSERT_EFI_ERROR (Status); 124 | 125 | // 126 | // Retrieve HII package list from ImageHandle 127 | // 128 | Status = gBS->OpenProtocol ( 129 | ImageHandle, 130 | &gEfiHiiPackageListProtocolGuid, 131 | (VOID **) &PackageList, 132 | ImageHandle, 133 | NULL, 134 | EFI_OPEN_PROTOCOL_GET_PROTOCOL 135 | ); 136 | if (EFI_ERROR (Status)) { 137 | DEBUG ((DEBUG_ERROR, "HII Image Package with logo not found in PE/COFF resource section\n")); 138 | return Status; 139 | } 140 | 141 | // 142 | // Publish HII package list to HII Database. 143 | // 144 | Status = HiiDatabase->NewPackageList ( 145 | HiiDatabase, 146 | PackageList, 147 | NULL, 148 | &mHiiHandle 149 | ); 150 | if (!EFI_ERROR (Status)) { 151 | Handle = NULL; 152 | Status = gBS->InstallMultipleProtocolInterfaces ( 153 | &Handle, 154 | &gEdkiiPlatformLogoProtocolGuid, &mPlatformLogo, 155 | NULL 156 | ); 157 | } 158 | return Status; 159 | } 160 | -------------------------------------------------------------------------------- /PrimeG2.fdf: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2019, Bingxing Wang. All rights reserved. 2 | [FD.IMX6ULLPRIMEG2_EFI] 3 | # The initrd suggests that this place is probably safe for us to load FD 4 | BaseAddress = 0x80200000|gArmTokenSpaceGuid.PcdFdBaseAddress 5 | Size = 0x00100000|gArmTokenSpaceGuid.PcdFdSize 6 | ErasePolarity = 1 7 | BlockSize = 0x200 8 | NumBlocks = 0x800 9 | 10 | # 512 bytes of configuration header & 8 bytes of image header 11 | 0x00000000|0x00100000 12 | gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize 13 | FV = FVMAIN_COMPACT 14 | 15 | [FV.FvMain] 16 | FvNameGuid = af4d8612-adcb-4450-8dd8-955dead68e4e 17 | BlockSize = 0x40 18 | NumBlocks = 0 # This FV gets compressed so make it just big enough 19 | FvAlignment = 8 # FV alignment and FV attributes setting. 20 | ERASE_POLARITY = 1 21 | MEMORY_MAPPED = TRUE 22 | STICKY_WRITE = TRUE 23 | LOCK_CAP = TRUE 24 | LOCK_STATUS = TRUE 25 | WRITE_DISABLED_CAP = TRUE 26 | WRITE_ENABLED_CAP = TRUE 27 | WRITE_STATUS = TRUE 28 | WRITE_LOCK_CAP = TRUE 29 | WRITE_LOCK_STATUS = TRUE 30 | READ_DISABLED_CAP = TRUE 31 | READ_ENABLED_CAP = TRUE 32 | READ_STATUS = TRUE 33 | READ_LOCK_CAP = TRUE 34 | READ_LOCK_STATUS = TRUE 35 | 36 | APRIORI DXE { 37 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 38 | INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf 39 | INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf 40 | } 41 | 42 | INF MdeModulePkg/Core/Dxe/DxeMain.inf 43 | INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 44 | 45 | INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf 46 | INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf 47 | !if $(USE_ARM_GENERIC_TIMER) == 1 48 | INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf 49 | !else 50 | INF PrimeG2Pkg/Drivers/TimerDxe/TimerDxe.inf 51 | !endif 52 | 53 | INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf 54 | INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf 55 | INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf 56 | 57 | INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf 58 | INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf 59 | INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf 60 | INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf 61 | INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf 62 | INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf 63 | INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf 64 | INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf 65 | INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf 66 | INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf 67 | INF MdeModulePkg/Application/UiApp/UiApp.inf 68 | INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf 69 | INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf 70 | 71 | !if $(USE_GRAPHICAL_CONSOLE) == 1 72 | INF PrimeG2Pkg/Drivers/GraphicsConsoleDxe/GraphicsConsoleDxe.inf 73 | INF PrimeG2Pkg/Drivers/ConSplitterDxe/ConSplitterDxe.inf 74 | !else 75 | INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf 76 | !endif 77 | 78 | INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf 79 | INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf 80 | 81 | INF RuleOverride=ACPITABLE PrimeG2Pkg/AcpiTables/AcpiTables.inf 82 | INF PrimeG2Pkg/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.inf 83 | 84 | INF PrimeG2Pkg/Drivers/PciEmulation/PciEmulation.inf 85 | INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf 86 | INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf 87 | INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf 88 | INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf 89 | INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf 90 | 91 | INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf 92 | INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf 93 | INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf 94 | INF FatPkg/EnhancedFatDxe/Fat.inf 95 | INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf 96 | INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf 97 | 98 | INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf 99 | INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf 100 | INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf 101 | INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf 102 | 103 | !if $(UDK2019) == 1 104 | INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf 105 | !else 106 | INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf 107 | !endif 108 | 109 | INF PrimeG2Pkg/Drivers/LcdFbDxe/LcdFbDxe.inf 110 | INF PrimeG2Pkg/Drivers/LogoDxe/LogoDxe.inf 111 | INF PrimeG2Pkg/Drivers/LedHeartbeatDxe/LedHeartbeatDxe.inf 112 | # INF PrimeG2Pkg/Drivers/GpioKeypadDxe/GpioKeypadDxe.inf 113 | 114 | INF ShellPkg/Application/Shell/Shell.inf 115 | 116 | [FV.FVMAIN_COMPACT] 117 | FvAlignment = 8 118 | ERASE_POLARITY = 1 119 | MEMORY_MAPPED = TRUE 120 | STICKY_WRITE = TRUE 121 | LOCK_CAP = TRUE 122 | LOCK_STATUS = TRUE 123 | WRITE_DISABLED_CAP = TRUE 124 | WRITE_ENABLED_CAP = TRUE 125 | WRITE_STATUS = TRUE 126 | WRITE_LOCK_CAP = TRUE 127 | WRITE_LOCK_STATUS = TRUE 128 | READ_DISABLED_CAP = TRUE 129 | READ_ENABLED_CAP = TRUE 130 | READ_STATUS = TRUE 131 | READ_LOCK_CAP = TRUE 132 | READ_LOCK_STATUS = TRUE 133 | 134 | INF PrimeG2Pkg/PrePi/PeiUniCore.inf 135 | 136 | FILE FV_IMAGE = f0638b57-e970-4b5d-af05-a67154d44c94 { 137 | SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { 138 | SECTION FV_IMAGE = FVMAIN 139 | } 140 | } 141 | 142 | !include PrimeG2Pkg/CommonFdf.fdf.inc -------------------------------------------------------------------------------- /AcpiTables/Dbg2.aslc: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include "Platform.h" 16 | #include 17 | 18 | // DBG2 Definitions 19 | #pragma pack (1) 20 | 21 | typedef enum { 22 | DBG2_TYPE_SERIAL = 0x8000, 23 | DBG2_TYPE_1394, 24 | DBG2_TYPE_USB, 25 | DBG2_TYPE_NET 26 | } DBG2_PORT_TYPE; 27 | 28 | #define EFI_ACPI_DEBUG_PORT_2_TABLE_REVISION 0x00000000 29 | #define UART_NAME_SPACE_STRING_LENGTH sizeof("\\_SB.UAR1") 30 | #define UART_IMX6_UART_ADDRESS_SIZE 0x000000BC 31 | 32 | #if FixedPcdGet32(PcdKdUartInstance) == 1 33 | #define KD_UART_BASE_ADDR CSP_BASE_REG_PA_UART1 34 | #define KD_UART_ACPI_PATH "\\_SB.UAR1" 35 | #elif FixedPcdGet32(PcdKdUartInstance) == 2 36 | #define KD_UART_BASE_ADDR CSP_BASE_REG_PA_UART2 37 | #define KD_UART_ACPI_PATH "\\_SB.UAR2" 38 | #elif FixedPcdGet32(PcdKdUartInstance) == 3 39 | #define KD_UART_BASE_ADDR CSP_BASE_REG_PA_UART3 40 | #define KD_UART_ACPI_PATH "\\_SB.UAR3" 41 | #elif FixedPcdGet32(PcdKdUartInstance) == 4 42 | #define KD_UART_BASE_ADDR CSP_BASE_REG_PA_UART4 43 | #define KD_UART_ACPI_PATH "\\_SB.UAR4" 44 | #elif FixedPcdGet32(PcdKdUartInstance) == 5 45 | #define KD_UART_BASE_ADDR CSP_BASE_REG_PA_UART5 46 | #define KD_UART_ACPI_PATH "\\_SB.UAR5" 47 | #else 48 | #error "Invalid PcdKdUartInstance. Must be 1, 2, 3, 4, or 5" 49 | #endif 50 | 51 | // ACPI 5.0 DBG2 structure 52 | typedef struct { 53 | EFI_ACPI_DESCRIPTION_HEADER Header; 54 | UINT32 OffsetDbgDeviceInfo; 55 | UINT32 NumberDbgdeviceInfo; 56 | } EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_HEADER; 57 | 58 | typedef struct { 59 | UINT8 Revision; 60 | UINT16 Length; 61 | UINT8 NumberofGenericAddressRegisters; 62 | UINT16 NameSpaceStringLength; 63 | UINT16 NameSpaceStringOffset; 64 | UINT16 OemDataLength; 65 | UINT16 OemDataOffset; 66 | UINT16 PortType; 67 | UINT16 PortSubtype; 68 | UINT16 Reserved; 69 | UINT16 BaseAddressRegisterOffset; 70 | UINT16 AddressSizeOffset; 71 | } DEBUG_DEVICE_INFO; 72 | 73 | typedef struct { 74 | DEBUG_DEVICE_INFO DeviceInfo; 75 | EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; 76 | UINT32 AddressSize; 77 | char NameSpaceString[UART_NAME_SPACE_STRING_LENGTH]; 78 | } DEBUG_DEVICE_INFO_UART; 79 | 80 | typedef struct { 81 | EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_HEADER Header; 82 | DEBUG_DEVICE_INFO_UART Uart; 83 | } EFI_ACPI_5_0_DEBUG_PORT_2_TABLE; 84 | 85 | #pragma pack () 86 | 87 | // Debug Port 2 table 88 | STATIC EFI_ACPI_5_0_DEBUG_PORT_2_TABLE Dbg2 = { 89 | { 90 | // Header 91 | { 92 | EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE, // Signature "DBG2" 93 | sizeof (EFI_ACPI_5_0_DEBUG_PORT_2_TABLE), // Length 94 | EFI_ACPI_DEBUG_PORT_2_TABLE_REVISION, // Revision 95 | EFI_ACPI_5_0_UNDEFINED, // Checksum - updated at runtime 96 | EFI_ACPI_OEM_ID, // OEM ID[6] 97 | EFI_ACPI_OEM_TABLE_ID, // OEM Table ID 98 | EFI_ACPI_OEM_REVISION, // OEM Revision 99 | EFI_ACPI_CREATOR_ID, // Creator ID 100 | EFI_ACPI_CREATOR_REVISION // Creator Revision 101 | }, 102 | sizeof (EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_HEADER), // OffsetDbgDeviceinfo 103 | 1, // NumberDbgDeviceInfo 104 | }, 105 | { 106 | // Uart 107 | { 108 | // DeviceInfo 109 | EFI_ACPI_RESERVED_BYTE, // Revision 110 | sizeof (DEBUG_DEVICE_INFO_UART), // Length 111 | 1, // NumberofGenericAddressRegisters 112 | UART_NAME_SPACE_STRING_LENGTH, // NameSpaceStringLength 113 | OFFSET_OF (DEBUG_DEVICE_INFO_UART, NameSpaceString), // NameSpaceStringOffset 114 | 0, // OemDataLength 115 | EFI_ACPI_RESERVED_WORD, // OemDataOffset 116 | DBG2_TYPE_SERIAL, // PortType 117 | DBG_PORT_SUBTYPE_IMX6, // PortSubtype 000Ch 118 | EFI_ACPI_RESERVED_WORD, // Reserved 119 | OFFSET_OF (DEBUG_DEVICE_INFO_UART, BaseAddressRegister), // BaseAddressRegisterOffset 120 | OFFSET_OF (DEBUG_DEVICE_INFO_UART, AddressSize), // AddressSizeOffset 121 | }, 122 | { 123 | // BaseAddressRegister 124 | EFI_ACPI_5_0_SYSTEM_MEMORY, // AddressSpaceId 125 | 0x20, // RegisterBitWidth = 32 126 | 0, // RegisterBitOffset = 0 127 | 0x20, // AccessSize = 32 128 | KD_UART_BASE_ADDR, // Address 129 | }, 130 | UART_IMX6_UART_ADDRESS_SIZE, // AddressSize 131 | KD_UART_ACPI_PATH, // NameSpaceString 132 | }, 133 | }; 134 | 135 | // Reference the table being generated to prevent the optimizer from removing the 136 | // data structure from the executable 137 | VOID* CONST ReferenceAcpiTable = &Dbg2; 138 | -------------------------------------------------------------------------------- /Include/Device/iMX6IoMux.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _IMX6_IOMUX_H_ 16 | #define _IMX6_IOMUX_H_ 17 | 18 | // 19 | // IOMux common definition 20 | // 21 | #include "iMXIoMux.h" 22 | 23 | // 24 | // GPIO common definition 25 | // 26 | #include "iMXGpio.h" 27 | 28 | #include "iMX6IoMux_ULL.h" 29 | 30 | typedef UINT64 IMX_PADCFG; 31 | 32 | // 33 | // Pad control settings 34 | // 35 | typedef enum { 36 | IMX_HYS_DISABLED, 37 | IMX_HYS_ENABLED, 38 | } IMX_HYS; 39 | 40 | typedef enum { 41 | IMX_PUS_100K_OHM_PD, 42 | IMX_PUS_47K_OHM_PU, 43 | IMX_PUS_100K_OHM_PU, 44 | IMX_PUS_22K_OHM_PU, 45 | } IMX_PUS; 46 | 47 | typedef enum { 48 | IMX_PUE_KEEP, 49 | IMX_PUE_PULL, 50 | } IMX_PUE; 51 | 52 | typedef enum { 53 | IMX_PKE_DISABLE, 54 | IMX_PKE_ENABLE, 55 | } IMX_PKE; 56 | 57 | typedef enum { 58 | IMX_ODE_DISABLE, 59 | IMX_ODE_ENABLE, 60 | } IMX_ODE; 61 | 62 | typedef enum { 63 | IMX_SPEED_LOW, 64 | IMX_SPEED_MEDIUM = 2, 65 | IMX_SPEED_MAXIMUM, 66 | } IMX_SPEED; 67 | 68 | typedef enum { 69 | IMX_DSE_HIZ, 70 | IMX_DSE_260_OHM, 71 | IMX_DSE_130_OHM, 72 | IMX_DSE_90_OHM, 73 | IMX_DSE_60_OHM, 74 | IMX_DSE_50_OHM, 75 | IMX_DSE_40_OHM, 76 | IMX_DSE_33_OHM, 77 | } IMX_DSE; 78 | 79 | typedef enum { 80 | IMX_SRE_SLOW, 81 | IMX_SRE_FAST, 82 | } IMX_SRE; 83 | 84 | typedef enum { 85 | IMX_SION_DISABLED, 86 | IMX_SION_ENABLED, 87 | } IMX_IOMUXC_CTL_SION; 88 | 89 | typedef union { 90 | UINT32 AsUint32; 91 | struct { 92 | UINT32 SRE : 1; 93 | UINT32 reserved0 : 2; 94 | UINT32 DSE : 3; 95 | UINT32 SPEED : 2; 96 | UINT32 reserved1 : 3; 97 | UINT32 ODE : 1 ; 98 | UINT32 PKE : 1; 99 | UINT32 PUE : 1; 100 | UINT32 PUS : 2; 101 | UINT32 HYS : 1; 102 | UINT32 reserved2 : 15; 103 | } Fields; 104 | } IMX_IOMUXC_PAD_CTL; 105 | 106 | typedef union { 107 | UINT32 AsUint32; 108 | struct { 109 | UINT32 MUX_MODE : 3; 110 | UINT32 reserved0 : 1; 111 | UINT32 SION : 1; 112 | UINT32 reserved1 : 27; 113 | } Fields; 114 | } IMX_IOMUXC_MUX_CTL; 115 | 116 | typedef union { 117 | UINT32 AsUint32; 118 | struct { 119 | UINT32 DAISY : 3; 120 | UINT32 reserved : 29; 121 | } Fields; 122 | } IMX_IOMUXC_SEL_INP_CTL; 123 | 124 | #define _IMX_SEL_INP_VALUE(InpSel) \ 125 | (((InpSel) >> 8) & 0x07) 126 | 127 | #define _IMX_SEL_INP_REGISTER(InpSel) \ 128 | ((((InpSel) & 0xFF) * 4) + IOMUXC_SELECT_INPUT_BASE_ADDRESS) 129 | 130 | #define _IMX_MAKE_INP_SEL(InpSelReg, InpSelVal) \ 131 | (((((InpSelReg) - IOMUXC_SELECT_INPUT_BASE_ADDRESS) / 4) & 0xFF) | \ 132 | (((InpSelVal) & 0x7) << 8)) 133 | 134 | #define _IMX_MAKE_MUX_CTL(Sion, MuxAlt) \ 135 | (((MuxAlt) & 0x7) | \ 136 | (((Sion) & 0x1) << 4)) 137 | 138 | #define _IMX_MAKE_PAD_CTL(Sre, Dse, Speed, Ode, Pke, Pue, Pus, Hys) \ 139 | (((Sre) & 0x1) | \ 140 | (((Dse) & 0x7) << 3) | \ 141 | (((Speed) & 0x3) << 6) | \ 142 | (((Ode) & 0x1) << 11) | \ 143 | (((Pke) & 0x1) << 12) | \ 144 | (((Pue) & 0x1) << 13) | \ 145 | (((Pus) & 0x3) << 14) | \ 146 | (((Hys) & 0x1) << 16)) 147 | 148 | /** 149 | Define a configuration for a pad, including drive settings, 150 | MUX setting and Select Input setting and offset. 151 | 152 | Sre - IMX_SRE - Slew Rate setting 153 | Dse - IMX_DSE - Drive strength 154 | Speed - IMX_SPEED - Pad speed setting 155 | Ode - IMX_ODE - Open drain enable 156 | Pke - IMX_PKE - Pull/Keeper enable 157 | Pue - IMX_PUE - Pull/Keep mode select 158 | Pus - IMX_PUS - Pull strength 159 | Hys - IMX_HYS - Hysteresis enable/disable 160 | Sion - Software Input on Field 161 | MuxAlt- Alternate function number 162 | SelInpReg - select input register offset div 4 163 | SelInpVal - select input value 164 | 165 | NOTE: _IMX_MAKE_PADCFG_INPSEL cannot take SelInpValue of 4 or higher otherwise 166 | the macro overflows the size of an int. 167 | For SelInpValue higher than 4, set SELECT_INPUT register manually using 168 | IMX_IOMUXC_SEL_INP_CTL structure. 169 | **/ 170 | #define _IMX_MAKE_PADCFG_INPSEL(Sre, Dse, Speed, Ode, Pke, Pue, Pus, Hys, Sion, MuxAlt, SelInpReg, SelInpValue) \ 171 | (_IMX_MAKE_PAD_CTL(Sre, Dse, Speed, Ode, Pke, Pue, Pus, Hys) | \ 172 | (_IMX_MAKE_MUX_CTL(Sion, MuxAlt) << 17) | \ 173 | (_IMX_MAKE_INP_SEL(SelInpReg, SelInpValue) << 22)) 174 | 175 | #define _IMX_MAKE_PADCFG(Sre, Dse, Speed, Ode, Pke, Pue, Pus, Hys, Sion, MuxAlt) \ 176 | (_IMX_MAKE_PAD_CTL(Sre, Dse, Speed, Ode, Pke, Pue, Pus, Hys) | \ 177 | _IMX_MAKE_MUX_CTL(Sion, MuxAlt) << 17) 178 | 179 | #define _IMX_MAKE_PADCFG2(PadCtl, Sion, MuxAlt) \ 180 | ((PadCtl) | \ 181 | _IMX_MAKE_MUX_CTL(Sion, MuxAlt) << 17) 182 | 183 | #define _IMX_PADCFG_PAD_CTL(PadCfg) ((PadCfg) & 0x0001F8F9) 184 | #define _IMX_PADCFG_MUX_CTL(PadCfg) (((PadCfg) >> 17) & 0x00000017) 185 | #define _IMX_PADCFG_SEL_INP(PadCfg) (((PadCfg) >> 22) & 0x000007FF) 186 | 187 | /** 188 | Put a pad in the specified configuration. 189 | 190 | For example, to configure GPIO0 as CCM_CLK01 output: 191 | ImxPadConfig (IMX_PAD_GPIO_0, IMX_PAD_GPIO_0_CCM_CLKO1); 192 | 193 | **/ 194 | VOID ImxPadConfig (IMX_PAD Pad, IMX_PADCFG PadConfig); 195 | 196 | /** 197 | Dumps to console the specified PAD mux/control configuration. 198 | **/ 199 | VOID ImxPadDumpConfig (char *PadName, IMX_PAD Pad); 200 | 201 | #endif // _IMX6_IOMUX_H_ 202 | -------------------------------------------------------------------------------- /Drivers/PciEmulation/PciEmulation.c: -------------------------------------------------------------------------------- 1 | // 2 | // Copyright (C) Microsoft. All rights reserved 3 | // 4 | /** @file 5 | 6 | Copyright (c) 2008-2009, Apple Inc. All rights reserved. 7 | 8 | All rights reserved. This program and the accompanying materials 9 | are licensed and made available under the terms and conditions of the BSD License 10 | which accompanies this distribution. The full text of the license may be found at 11 | http://opensource.org/licenses/bsd-license.php 12 | 13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 | 16 | **/ 17 | 18 | #include 19 | 20 | #include 21 | #include 22 | #include 23 | #include 24 | 25 | #include 26 | 27 | #include 28 | #include 29 | #include 30 | #include 31 | 32 | #include 33 | 34 | #define SET_HIGH(b, i) ImxGpioDirection((b), (i), IMX_GPIO_DIR_OUTPUT); \ 35 | ImxGpioWrite((b), (i), IMX_GPIO_HIGH) 36 | 37 | // Prebaked pad configurations that include mux and drive settings where 38 | // each enum named as IMX__PADCFG contains configurations 39 | // for pads used by that module 40 | 41 | typedef enum { 42 | IMX_PAD_CFG_USB_OTG_PWR = _IMX_MAKE_PADCFG( 43 | IMX_SRE_SLOW, 44 | IMX_DSE_40_OHM, 45 | IMX_SPEED_LOW, 46 | IMX_ODE_DISABLE, 47 | IMX_PKE_ENABLE, 48 | IMX_PUE_PULL, 49 | IMX_PUS_100K_OHM_PU, 50 | IMX_HYS_ENABLED, 51 | IMX_SION_DISABLED, 52 | IMX_IOMUXC_GPIO_0_ALT2_USB_OTG), 53 | 54 | IMX_PAD_CFG_USB_OTG1_OC = _IMX_MAKE_PADCFG_INPSEL( 55 | IMX_SRE_SLOW, 56 | IMX_DSE_40_OHM, 57 | IMX_SPEED_LOW, 58 | IMX_ODE_DISABLE, 59 | IMX_PKE_ENABLE, 60 | IMX_PUE_PULL, 61 | IMX_PUS_100K_OHM_PU, 62 | IMX_HYS_ENABLED, 63 | IMX_SION_DISABLED, 64 | IMX_IOMUXC_GPIO_0_ALT2_USB_OTG, 65 | IOMUXC_USB_OTG1_OC_SELECT_INPUT, 66 | 0), 67 | IMX_PAD_CFG_USB_OTG2_OC = _IMX_MAKE_PADCFG_INPSEL( 68 | IMX_SRE_SLOW, 69 | IMX_DSE_40_OHM, 70 | IMX_SPEED_LOW, 71 | IMX_ODE_DISABLE, 72 | IMX_PKE_ENABLE, 73 | IMX_PUE_PULL, 74 | IMX_PUS_100K_OHM_PU, 75 | IMX_HYS_ENABLED, 76 | IMX_SION_DISABLED, 77 | IMX_IOMUXC_GPIO_0_ALT2_USB_OTG, 78 | IOMUXC_USB_OTG2_OC_SELECT_INPUT, 79 | 0), 80 | 81 | IMX_PAD_CFG_USB_OTG1_ID = _IMX_MAKE_PADCFG_INPSEL( 82 | IMX_SRE_FAST, 83 | IMX_DSE_90_OHM, 84 | IMX_SPEED_LOW, 85 | IMX_ODE_DISABLE, 86 | IMX_PKE_ENABLE, 87 | IMX_PUE_PULL, 88 | IMX_PUS_100K_OHM_PD, 89 | IMX_HYS_ENABLED, 90 | IMX_SION_DISABLED, 91 | IMX_IOMUXC_GPIO_0_ALT2_USB_OTG, 92 | IOMUXC_USB_OTG1_ID_SELECT_INPUT, 93 | 0), 94 | 95 | } IMX_EHCI_PADCFG; 96 | 97 | #define USB_OTHERREGS_OFFSET 0x800 98 | #define UCTRL_PWR_POL (1 << 9) 99 | 100 | EFI_STATUS 101 | EFIAPI 102 | PciEmulationEntryPoint ( 103 | IN EFI_HANDLE ImageHandle, 104 | IN EFI_SYSTEM_TABLE *SystemTable 105 | ) 106 | { 107 | static const IMX_CLK_GATE gatesToTurnOn[] = { 108 | IMX_USBOH3_CLK_ENABLE, 109 | }; 110 | 111 | struct usb_ehci *ehci = (struct usb_ehci *) (EFI_PHYSICAL_ADDRESS) FixedPcdGet32(PcdEHCIBase); 112 | UINT32 portsc; 113 | UINT32 usbnc_usb_ctrl; 114 | 115 | ImxClkPwrSetClockGates( 116 | gatesToTurnOn, 117 | sizeof(gatesToTurnOn) / sizeof(gatesToTurnOn[0]), 118 | IMX_CLOCK_GATE_STATE_ON); 119 | MicroSecondDelay(1); 120 | 121 | portsc = MmioRead32((UINTN) &ehci->portsc); 122 | if (portsc & PORT_PTS_PHCD) { 123 | DEBUG((EFI_D_INFO, "suspended: portsc %x, enabled it.\n", portsc)); 124 | MmioWrite32((UINTN) &ehci->portsc, portsc & ~PORT_PTS_PHCD); 125 | } 126 | 127 | /* Do board specific initialization */ 128 | /* ImxPadConfig (IMX_PAD_GPIO_0, IMX_PAD_CFG_USB_OTG1_ID); 129 | ImxPadConfig (IMX_PAD_GPIO_4, IMX_PAD_CFG_USB_OTG_PWR); */ 130 | 131 | /* Set Power polarity */ 132 | usbnc_usb_ctrl = MmioRead32((UINTN) FixedPcdGet32(PcdEHCIBase) + USB_OTHERREGS_OFFSET); 133 | MmioWrite32((UINTN) FixedPcdGet32(PcdEHCIBase) + USB_OTHERREGS_OFFSET, usbnc_usb_ctrl | UCTRL_PWR_POL); 134 | 135 | /* Configure power and OC */ 136 | ImxUsbPhyInit (IMX_USBPHY0); 137 | ImxUsbPhyInit (IMX_USBPHY1); 138 | 139 | /* Turn on VBus */ 140 | ImxGpioDirection(IMX_GPIO_BANK1, 4, IMX_GPIO_DIR_OUTPUT); 141 | ImxGpioWrite(IMX_GPIO_BANK1, 4, IMX_GPIO_HIGH); 142 | 143 | return RegisterNonDiscoverableMmioDevice ( 144 | NonDiscoverableDeviceTypeEhci, 145 | NonDiscoverableDeviceDmaTypeNonCoherent, 146 | NULL, 147 | NULL, 148 | 1, 149 | FixedPcdGet32(PcdEHCIBase) + 0x100, FixedPcdGet32(PcdEHCILength) - 0x100 150 | ); 151 | 152 | return EFI_SUCCESS; 153 | } 154 | -------------------------------------------------------------------------------- /Include/Device/iMX6ClkPwr_ULL.h: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #ifndef _IMX6_CLK_PWR_ULL_H_ 16 | #define _IMX6_CLK_PWR_ULL_H_ 17 | // Clock signal definitions for iMX6 ULL 18 | typedef enum { 19 | IMX_CLK_NONE, 20 | 21 | IMX_OSC_CLK, 22 | IMX_PLL1_MAIN_CLK, 23 | IMX_PLL2_MAIN_CLK, 24 | IMX_PLL2_PFD0, 25 | IMX_PLL2_PFD1, 26 | IMX_PLL2_PFD2, 27 | IMX_PLL3_MAIN_CLK, 28 | IMX_PLL3_PFD0, 29 | IMX_PLL3_PFD1, 30 | IMX_PLL3_PFD2, 31 | IMX_PLL3_PFD3, 32 | IMX_PLL4_MAIN_CLK, 33 | IMX_PLL5_MAIN_CLK, 34 | IMX_CLK1, 35 | IMX_CLK2, 36 | 37 | IMX_PLL1_SW_CLK, 38 | IMX_STEP_CLK, 39 | IMX_PLL3_SW_CLK, 40 | IMX_AXI_ALT, 41 | IMX_AXI_CLK_ROOT, 42 | IMX_PERIPH_CLK2, 43 | IMX_PERIPH_CLK, 44 | IMX_PRE_PERIPH_CLK, 45 | IMX_PRE_PERIPH2_CLK, 46 | IMX_PERIPH2_CLK, 47 | 48 | IMX_ARM_CLK_ROOT, 49 | IMX_MMDC_CH0_CLK_ROOT, 50 | IMX_MMDC_CH1_CLK_ROOT, 51 | IMX_AHB_CLK_ROOT, 52 | IMX_IPG_CLK_ROOT, 53 | IMX_PERCLK_CLK_ROOT, 54 | IMX_USDHC1_CLK_ROOT, 55 | IMX_USDHC2_CLK_ROOT, 56 | IMX_USDHC3_CLK_ROOT, 57 | IMX_USDHC4_CLK_ROOT, 58 | IMX_SSI1_CLK_ROOT, 59 | IMX_SSI2_CLK_ROOT, 60 | IMX_SSI3_CLK_ROOT, 61 | IMX_GPU2D_AXI_CLK_ROOT, 62 | IMX_GPU3D_AXI_CLK_ROOT, 63 | IMX_PCIE_AXI_CLK_ROOT, 64 | IMX_VDO_AXI_CLK_ROOT, 65 | IMX_IPU1_HSP_CLK_ROOT, 66 | IMX_IPU2_HSP_CLK_ROOT, 67 | IMX_GPU2D_CORE_CLK_ROOT, 68 | IMX_ACLK_EIM_SLOW_CLK_ROOT, 69 | IMX_ACLK_CLK_ROOT, 70 | IMX_ENFC_CLK_ROOT, 71 | IMX_GPU3D_CORE_CLK_ROOT, 72 | IMX_GPU3D_SHADER_CLK_ROOT, 73 | IMX_VPU_AXI_CLK_ROOT, 74 | IMX_IPU1_DI0_CLK_ROOT, 75 | IMX_IPU1_DI1_CLK_ROOT, 76 | IMX_IPU2_DI0_CLK_ROOT, 77 | IMX_IPU2_DI1_CLK_ROOT, 78 | IMX_LDB_DI0_SERIAL_CLK_ROOT, 79 | IMX_LDB_DI0_IPU, 80 | IMX_LDB_DI1_SERIAL_CLK_ROOT, 81 | IMX_LDB_DI1_IPU, 82 | IMX_SPDIF0_CLK_ROOT, 83 | IMX_SPDIF1_CLK_ROOT, 84 | IMX_ESAI_CLK_ROOT, 85 | IMX_HSI_TX_CLK_ROOT, 86 | IMX_CAN_CLK_ROOT, 87 | IMX_ECSPI_CLK_ROOT, 88 | IMX_UART_CLK_ROOT, 89 | IMX_VIDEO_27M_CLK_ROOT, 90 | 91 | IMX_CLK_MAX, 92 | } IMX_CLK; 93 | 94 | // Clock gate definitions 95 | typedef enum { 96 | IMX_AIPS_TZ1_CLK_ENABLE, 97 | IMX_AIPS_TZ2_CLK_ENABLE, 98 | IMX_APBHDMA_HCLK_ENABLE, 99 | IMX_ASRC_CLK_ENABLE, 100 | IMX_CAAM_SECURE_MEM_CLK_ENABLE, 101 | IMX_CAAM_WRAPPER_ACLK_ENABLE, 102 | IMX_CAAM_WRAPPER_IPG_ENABLE, 103 | IMX_CAN1_CLK_ENABLE, 104 | IMX_CAN1_SERIAL_CLK_ENABLE, 105 | IMX_CAN2_CLK_ENABLE, 106 | IMX_CAN2_SERIAL_CLK_ENABLE, 107 | IMX_ARM_DBG_CLK_ENABLE, 108 | IMX_DCIC1_CLK_ENABLE, 109 | IMX_GPT2_SERIAL_CLK_ENABLE, 110 | IMX_UART2_CLK_ENABLE, 111 | IMX_GPIO2_CLK_ENABLE, 112 | /* CCGR1 */ 113 | IMX_ECSPI1_CLK_ENABLE, 114 | IMX_ECSPI2_CLK_ENABLE, 115 | IMX_ECSPI3_CLK_ENABLE, 116 | IMX_ECSPI4_CLK_ENABLE, 117 | IMX_ADC2_CLK_ENABLE, 118 | IMX_UART3_CLK_ENABLE, 119 | IMX_EPIT1_CLK_ENABLE, 120 | IMX_EPIT2_CLK_ENABLE, 121 | IMX_ADC1_CLK_ENABLE, 122 | IMX_SIM_S_CLK_ENABLE, 123 | IMX_GPT_BUS_CLK_ENABLE, 124 | IMX_GPT_SERIAL_CLK_ENABLE, 125 | IMX_UART4_CLK_ENABLE, 126 | IMX_GPIO1_CLK_ENABLE, 127 | IMX_CSU_CLK_ENABLE, 128 | IMX_GPIO5_CLK_ENABLE, 129 | /* CCGR2 */ 130 | IMX_CSI_CLK_ENABLE, 131 | IMX_I2C1_SERIAL_CLK_ENABLE, 132 | IMX_I2C2_SERIAL_CLK_ENABLE, 133 | IMX_I2C3_SERIAL_CLK_ENABLE, 134 | IMX_IIM_CLK_ENABLE, 135 | IMX_IOMUX_IPT_CLK_IO_ENABLE, 136 | IMX_IPMUX1_CLK_ENABLE, 137 | IMX_IPMUX2_CLK_ENABLE, 138 | IMX_IPMUX3_CLK_ENABLE, 139 | IMX_IPSYNC_IP2APB_TZASC1_IPG_MASTER_CLK_ENABLE, 140 | IMX_GPIO3_CLK_ENABLE, 141 | IMX_LCD_CLK_ENABLE, 142 | IMX_PXP_CLK_ENABLE, 143 | /* CCGR3 */ 144 | IMX_UART5_CLK_ENABLE, 145 | IMX_ENET_CLK_ENABLE, 146 | IMX_UART6_CLK_ENABLE, 147 | IMX_CCM_DAP_CLK_ENABLE, 148 | IMX_LCDIF1_PIX_CLK_ENABLE, 149 | IMX_GPIO4_CLK_ENABLE, 150 | IMX_QSPI1_CLK_ENABLE, 151 | IMX_WDOG1_CLK_ENABLE, 152 | IMX_A7_CLKDIV_PATCH_CLK_ENABLE, 153 | IMX_MMDC_CORE_ACLK_FAST_CORE_P0_ENABLE, 154 | IMX_MMDC_CORE_IPG_CLK_P0_ENABLE, 155 | IMX_MMDC_CORE_IPG_CLK_P1_ENABLE, 156 | IMX_AXI_CLK_ENABLE, 157 | /* CCGR4 */ 158 | IMX_IOMUXC_CLK_ENABLE, 159 | IMX_IOMUXC_GPR_CLK_ENABLE, 160 | IMX_SIM_CPU_CLK_ENABLE, 161 | IMX_CXAPBSYNCBRIDGE_CLK_ENABLE, 162 | IMX_TSC_CLK_ENABLE, 163 | IMX_PL301_MX6QPER1_BCHCLK_ENABLE, 164 | IMX_PL301_MX6QPER2_MAINCLK_ENABLE, 165 | IMX_PWM1_CLK_ENABLE, 166 | IMX_PWM2_CLK_ENABLE, 167 | IMX_PWM3_CLK_ENABLE, 168 | IMX_PWM4_CLK_ENABLE, 169 | IMX_RAWNAND_U_BCH_INPUT_APB_CLK_ENABLE, 170 | IMX_RAWNAND_U_GPMI_BCH_INPUT_BCH_CLK_ENABLE, 171 | IMX_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_CLK_ENABLE, 172 | IMX_RAWNAND_U_GPMI_INPUT_APB_CLK_ENABLE, 173 | /* CCGR5 */ 174 | IMX_ROM_CLK_ENABLE, 175 | IMX_STCR_CLK_ENABLE, 176 | IMX_SNVS_DRYICE_CLK_ENABLE, 177 | IMX_SDMA_CLK_ENABLE, 178 | IMX_KPP_CLK_ENABLE, 179 | IMX_WDOG2_CLK_ENABLE, 180 | IMX_SPBA_CLK_ENABLE, 181 | IMX_SPDIF_CLK_ENABLE, 182 | IMX_SIM_MAIN_CLK_ENABLE, 183 | IMX_SNVS_HP_CLK_ENABLE, 184 | IMX_SNVS_LP_CLK_ENABLE, 185 | IMX_SAI3_CLK_ENABLE, 186 | IMX_UART_CLK_ENABLE, 187 | IMX_UART7_CLK_ENABLE, 188 | IMX_SAI1_CLK_ENABLE, 189 | IMX_SAI2_CLK_ENABLE, 190 | /* CCGR6 */ 191 | IMX_USBOH3_CLK_ENABLE, 192 | IMX_USDHC1_CLK_ENABLE, 193 | IMX_USDHC2_CLK_ENABLE, 194 | IMX_SIM1_CLK_ENABLE, 195 | IMX_SIM2_CLK_ENABLE, 196 | IMX_EIM_SLOW_CLK_ENABLE, 197 | IMX_UART8_CLK_ENABLE, 198 | IMX_PWM8_CLK_ENABLE, 199 | IMX_WDOG3_CLK_ENABLE, 200 | IMX_ANADIG_CLK_ENABLE, 201 | IMX_I2C4_SERIAL_CLK_ENABLE, 202 | IMX_PWM5_CLK_ENABLE, 203 | IMX_PWM6_CLK_ENABLE, 204 | IMX_PWM7_CLK_ENABLE, 205 | 206 | IMX_CLK_GATE_MAX, 207 | } IMX_CLK_GATE; 208 | 209 | #endif /* _IMX6_CLK_PWR_SDL_H_ */ 210 | -------------------------------------------------------------------------------- /AcpiTables/Fadt.aslc: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include "Platform.h" 4 | 5 | EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = 6 | { 7 | { 8 | EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, 9 | sizeof (EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE), 10 | EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, 11 | 0, 12 | EFI_ACPI_OEM_ID, 13 | EFI_ACPI_OEM_TABLE_ID, 14 | EFI_ACPI_OEM_REVISION, 15 | EFI_ACPI_CREATOR_ID, 16 | EFI_ACPI_CREATOR_REVISION 17 | }, 18 | 0, // UINT32 FirmwareCtrl 19 | 0, // UINT32 Dsdt 20 | EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0 21 | EFI_ACPI_6_0_PM_PROFILE_TABLET, // UINT8 PreferredPmProfile 22 | 0, // UINT16 SciInt 23 | 0, // UINT32 SmiCmd 24 | 0, // UINT8 AcpiEnable 25 | 0, // UINT8 AcpiDisable 26 | 0, // UINT8 S4BiosReq 27 | 0, // UINT8 PstateCnt 28 | 0, // UINT32 Pm1aEvtBlk 29 | 0, // UINT32 Pm1bEvtBlk 30 | 0, // UINT32 Pm1aCntBlk 31 | 0, // UINT32 Pm1bCntBlk 32 | 0, // UINT32 Pm2CntBlk 33 | 0, // UINT32 PmTmrBlk 34 | 0, // UINT32 Gpe0Blk 35 | 0, // UINT32 Gpe1Blk 36 | 0, // UINT8 Pm1EvtLen 37 | 0, // UINT8 Pm1CntLen 38 | 0, // UINT8 Pm2CntLen 39 | 0, // UINT8 PmTmrLen 40 | 0, // UINT8 Gpe0BlkLen 41 | 0, // UINT8 Gpe1BlkLen 42 | 0, // UINT8 Gpe1Base 43 | 0, // UINT8 CstCnt 44 | 0, // UINT16 PLvl2Lat 45 | 0, // UINT16 PLvl3Lat 46 | 0, // UINT16 FlushSize 47 | 0, // UINT16 FlushStride 48 | 0, // UINT8 DutyOffset 49 | 0, // UINT8 DutyWidth 50 | 0, // UINT8 DayAlrm 51 | 0, // UINT8 MonAlrm 52 | 0, // UINT8 Century 53 | 0, // UINT16 IaPcBootArch 54 | 0, // UINT8 Reserved1 55 | EFI_ACPI_6_0_HW_REDUCED_ACPI | EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags 56 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg 57 | 1, // UINT8 ResetValue 58 | 0, // UINT16 ArmBootArchFlags 59 | EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision 60 | 0, // UINT64 XFirmwareCtrl 61 | 0, // UINT64 XDsdt 62 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk 63 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk 64 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk 65 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk 66 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk 67 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk 68 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk 69 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk 70 | NULL_GAS, // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg 71 | NULL_GAS // EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg 72 | }; 73 | 74 | // 75 | // Reference the table being generated to prevent the optimizer from removing the 76 | // data structure from the executable 77 | // 78 | VOID* CONST ReferenceAcpiTable = &Fadt; 79 | -------------------------------------------------------------------------------- /Library/TimerLib/TimerLib.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 4 | * 5 | * This program and the accompanying materials 6 | * are licensed and made available under the terms and conditions of the BSD License 7 | * which accompanies this distribution. The full text of the license may be found at 8 | * http://opensource.org/licenses/bsd-license.php 9 | * 10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 | * 13 | **/ 14 | 15 | #include 16 | #include 17 | 18 | #include 19 | #include 20 | #include 21 | #include 22 | #include 23 | #include 24 | 25 | #include 26 | #include 27 | #include 28 | 29 | RETURN_STATUS 30 | EFIAPI 31 | TimerConstructor ( 32 | VOID 33 | ) 34 | { 35 | PCSP_GPT_REGS pGpt; 36 | UINT32 FreqPreScale; 37 | 38 | pGpt = (PCSP_GPT_REGS)CSP_BASE_REG_PA_GPT; 39 | 40 | ASSERT (SOC_OSC_FREQUENCY_REF_HZ >= PcdGet32 (PcdArmArchTimerFreqInHz)); 41 | 42 | // Set up this timer 43 | MmioWrite32((UINTN) &pGpt->CR, (GPT_CR_SWR_RESET << GPT_CR_SWR_LSH)); 44 | 45 | // MicroSecondDelay will break now 46 | for (UINTN i = 0; i < 100; i++) 47 | { 48 | MmioWrite32((UINTN) &pGpt->CR, 0); 49 | } 50 | 51 | // Calculate the scale factor since we are using the 24Mhz oscillator 52 | // as reference. 53 | FreqPreScale = SOC_OSC_FREQUENCY_REF_HZ / PcdGet32 (PcdArmArchTimerFreqInHz); 54 | ASSERT (FreqPreScale <= (1 << GPT_PR_PRESCALER_WID)); 55 | 56 | // Set the frequency scale 57 | MmioWrite32 ((UINTN)&pGpt->PR, FreqPreScale - 1); 58 | 59 | // Set GPT configuration: 60 | // - GPT Enabled 61 | // - Enable 24 Mhz Oscillator 62 | // - Use the 24Mhz oscillator source 63 | MmioWrite32 ((UINTN)&pGpt->CR, 64 | (GPT_CR_EN_ENABLE << GPT_CR_EN_LSH) | 65 | (GPT_CR_EN_24M_ENABLE << GPT_CR_EN_24M_LSH) | 66 | (GPT_CR_CLKSRC_CLK24M << GPT_CR_CLKSRC_LSH)); 67 | 68 | return EFI_SUCCESS; 69 | } 70 | 71 | /** 72 | Stalls the CPU for at least the given number of microseconds. 73 | 74 | Stalls the CPU for the number of microseconds specified by MicroSeconds. 75 | 76 | @param MicroSeconds The minimum number of microseconds to delay. 77 | 78 | @return The value of MicroSeconds inputted. 79 | 80 | **/ 81 | UINTN 82 | EFIAPI 83 | MicroSecondDelay ( 84 | IN UINTN MicroSeconds 85 | ) 86 | { 87 | UINT64 TimerTicks64; 88 | UINT32 CurCounterRead; 89 | UINT32 PrevCounterRead; 90 | UINT64 CountOffset; 91 | 92 | // Convert uSec delay to counter ticks: 93 | TimerTicks64 = ((UINT64)MicroSeconds * PcdGet32 ( 94 | PcdArmArchTimerFreqInHz)) / 1000000U; 95 | CurCounterRead = (UINT32)GetPerformanceCounter(); 96 | PrevCounterRead = CurCounterRead; 97 | TimerTicks64 += (UINT64)CurCounterRead; 98 | CountOffset = 0; 99 | 100 | // GPT is a 32bit counter, thus we need to handle rollover cases. 101 | while (((UINT64)CurCounterRead + CountOffset) < TimerTicks64) { 102 | CurCounterRead = (UINT32)GetPerformanceCounter(); 103 | if (CurCounterRead < PrevCounterRead) { 104 | CountOffset += 0x100000000; 105 | } 106 | PrevCounterRead = CurCounterRead; 107 | } 108 | 109 | return MicroSeconds; 110 | } 111 | 112 | /** 113 | Stalls the CPU for at least the given number of nanoseconds. 114 | 115 | Stalls the CPU for the number of nanoseconds specified by NanoSeconds. 116 | 117 | @param NanoSeconds The minimum number of nanoseconds to delay. 118 | 119 | @return The value of NanoSeconds inputted. 120 | 121 | **/ 122 | UINTN 123 | EFIAPI 124 | NanoSecondDelay ( 125 | IN UINTN NanoSeconds 126 | ) 127 | { 128 | if (NanoSeconds < (0xffffffff - 999)) { 129 | NanoSeconds += 999; 130 | } 131 | MicroSecondDelay (NanoSeconds / 1000); 132 | 133 | return 0; 134 | } 135 | 136 | /** 137 | Retrieves the current value of a 64-bit free running performance counter. 138 | 139 | The counter can either count up by 1 or count down by 1. If the physical 140 | performance counter counts by a larger increment, then the counter values 141 | must be translated. The properties of the counter can be retrieved from 142 | GetPerformanceCounterProperties(). 143 | 144 | @return The current value of the free running performance counter. 145 | 146 | **/ 147 | UINT64 148 | EFIAPI 149 | GetPerformanceCounter ( 150 | VOID 151 | ) 152 | { 153 | PCSP_GPT_REGS pGpt; 154 | 155 | pGpt = (PCSP_GPT_REGS)CSP_BASE_REG_PA_GPT; 156 | return MmioRead32 ((UINTN)(&pGpt->CNT)); 157 | } 158 | 159 | /** 160 | Retrieves the 64-bit frequency in Hz and the range of performance counter 161 | values. 162 | 163 | If StartValue is not NULL, then the value that the performance counter starts 164 | with immediately after is it rolls over is returned in StartValue. If 165 | EndValue is not NULL, then the value that the performance counter end with 166 | immediately before it rolls over is returned in EndValue. The 64-bit 167 | frequency of the performance counter in Hz is always returned. If StartValue 168 | is less than EndValue, then the performance counter counts up. If StartValue 169 | is greater than EndValue, then the performance counter counts down. For 170 | example, a 64-bit free running counter that counts up would have a StartValue 171 | of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter 172 | that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0. 173 | 174 | @param StartValue The value the performance counter starts with when it 175 | rolls over. 176 | @param EndValue The value that the performance counter ends with before 177 | it rolls over. 178 | 179 | @return The frequency in Hz. 180 | 181 | **/ 182 | UINT64 183 | EFIAPI 184 | GetPerformanceCounterProperties ( 185 | OUT UINT64 *StartValue, OPTIONAL 186 | OUT UINT64 *EndValue OPTIONAL 187 | ) 188 | { 189 | if (StartValue != NULL) { 190 | *StartValue = 0x0; 191 | } 192 | 193 | if (EndValue != NULL) { 194 | *EndValue = MAX_UINT64; 195 | } 196 | 197 | return PcdGet32 (PcdArmArchTimerFreqInHz); 198 | } 199 | 200 | /** 201 | Converts elapsed ticks of performance counter to time in nanoseconds. 202 | 203 | This function converts the elapsed ticks of running performance counter to 204 | time value in unit of nanoseconds. 205 | 206 | @param Ticks The number of elapsed ticks of running performance counter. 207 | 208 | @return The elapsed time in nanoseconds. 209 | 210 | **/ 211 | UINT64 212 | EFIAPI 213 | GetTimeInNanoSecond ( 214 | IN UINT64 Ticks 215 | ) 216 | { 217 | UINT64 NanoSeconds; 218 | UINT32 Remainder; 219 | UINT32 TimerFreq; 220 | 221 | TimerFreq = PcdGet32 (PcdArmArchTimerFreqInHz); 222 | 223 | // Ticks 224 | // Time = --------- x 1,000,000,000 225 | // Frequency 226 | NanoSeconds = MultU64x32 ( 227 | DivU64x32Remainder ( 228 | Ticks, 229 | TimerFreq, 230 | &Remainder), 231 | 1000000000U 232 | ); 233 | 234 | // Frequency < 0x100000000, so Remainder < 0x100000000, 235 | // then (Remainder * 1,000,000,000) will not overflow 64-bit. 236 | NanoSeconds += DivU64x32 ( 237 | MultU64x32 ( 238 | (UINT64) Remainder, 239 | 1000000000U), 240 | TimerFreq 241 | ); 242 | 243 | return NanoSeconds; 244 | } 245 | -------------------------------------------------------------------------------- /Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.c: -------------------------------------------------------------------------------- 1 | /** @file 2 | * 3 | * Implement EFI RealTimeClock runtime services based on ARM Performance Counter. 4 | * 5 | * Currently this driver does not support time setting, alarms, or runtime calls. 6 | * This special library is NOT meant to replace a HW RTC implementation to 7 | * measure date/time. Use this library ONLY to measure relative time between 8 | * two EFI_GET_TIME readings. 9 | * The performance counter will wrap-around eventually after a long time, make 10 | * sure to consider this limitation if you are depending on this library for 11 | * relative time measurement. e.g. For the ARM 64-bit counter with 19.2MHz 12 | * frequency, the counter will wrap-around after approximately 30465 year. 13 | * 14 | * Copyright (c) 2018 Microsoft Corporation. All rights reserved. 15 | * 16 | * This program and the accompanying materials 17 | * are licensed and made available under the terms and conditions of the BSD License 18 | * which accompanies this distribution. The full text of the license may be found at 19 | * http://opensource.org/licenses/bsd-license.php 20 | * 21 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 22 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 23 | * 24 | **/ 25 | 26 | #include 27 | 28 | #include 29 | #include 30 | #include 31 | #include 32 | #include 33 | 34 | #define LOG_FMT_HELPER(FMT, ...) \ 35 | "VirtualRealTimeClock:" FMT "%a\n", __VA_ARGS__ 36 | 37 | #define LOG_TRACE(...) \ 38 | DEBUG((DEBUG_BLKIO, LOG_FMT_HELPER(__VA_ARGS__, ""))) 39 | 40 | /** 41 | Returns the current time and date information, and the time-keeping capabilities 42 | of the virtual RTC. 43 | 44 | For simplicity, this LibGetTime does not report Years/Months, instead it will 45 | only report current Day, Hours, Minutes and Seconds starting from the beginning 46 | of CPU up-time. Otherwise, a more complex logic will be required to account 47 | for leap years and days/month differences. 48 | 49 | @param Time A pointer to storage to receive a snapshot of 50 | the current time. 51 | @param Capabilities An optional pointer to a buffer to receive the 52 | real time clock device's capabilities. 53 | 54 | @retval EFI_SUCCESS The operation completed successfully. 55 | @retval EFI_INVALID_PARAMETER Time is NULL. 56 | @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error. 57 | 58 | **/ 59 | EFI_STATUS 60 | EFIAPI 61 | LibGetTime ( 62 | OUT EFI_TIME *Time, 63 | OUT EFI_TIME_CAPABILITIES *Capabilities 64 | ) 65 | { 66 | UINT64 ElapsedSeconds; 67 | UINT64 TimerFreq; 68 | 69 | if (Time == NULL) { 70 | return EFI_INVALID_PARAMETER; 71 | } 72 | 73 | // Depend on ARM ARCH Timer (i.e. performance counter) to report date/time 74 | // relative to the start of CPU timer counting where date and time will always 75 | // be relative to the date/time 1/1/1900 00H:00M:00S 76 | if (PcdGet32 (PcdArmArchTimerFreqInHz) > 0) { 77 | TimerFreq = PcdGet32 (PcdArmArchTimerFreqInHz); 78 | } else { 79 | TimerFreq = GetPerformanceCounterProperties (NULL, NULL); 80 | } 81 | 82 | ASSERT (TimerFreq > 0); 83 | if (TimerFreq == 0) { 84 | return EFI_DEVICE_ERROR; 85 | } 86 | 87 | if (Capabilities) { 88 | Capabilities->Accuracy = 0; 89 | Capabilities->Resolution = TimerFreq; 90 | Capabilities->SetsToZero = FALSE; 91 | } 92 | 93 | ElapsedSeconds = GetPerformanceCounter () / TimerFreq; 94 | 95 | // Don't report Year/Month since Leap Year logic is not implemented. This should 96 | // be fine since the sole purpose of this special implementation is to be 97 | // used for relative time measurement. e.g. Windows Boot Manager. 98 | Time->Year = 0; 99 | Time->Month = 0; 100 | 101 | CONST UINT64 SECONDS_PER_DAY = 24 * 60 * 60; 102 | Time->Day = (ElapsedSeconds / SECONDS_PER_DAY); 103 | ElapsedSeconds %= SECONDS_PER_DAY; 104 | 105 | CONST UINT64 SECONDS_PER_HOUR = 60 * 60; 106 | Time->Hour = (ElapsedSeconds / SECONDS_PER_HOUR); 107 | ElapsedSeconds %= SECONDS_PER_HOUR; 108 | 109 | CONST UINT64 SECONDS_PER_MINUTE = 60; 110 | Time->Minute = (ElapsedSeconds / SECONDS_PER_MINUTE); 111 | ElapsedSeconds %= SECONDS_PER_MINUTE; 112 | 113 | Time->Second = ElapsedSeconds; 114 | Time->Nanosecond = 0; 115 | Time->TimeZone = 0; 116 | Time->Daylight = 0; 117 | 118 | LOG_TRACE ( 119 | "Time Elapsed Since Power-On: Day%d %dh:%dm:%ds", 120 | (UINT32)Time->Day, 121 | (UINT32)Time->Hour, 122 | (UINT32)Time->Minute, 123 | (UINT32)Time->Second); 124 | 125 | return EFI_SUCCESS; 126 | } 127 | 128 | /** 129 | Sets the current local time and date information. 130 | 131 | @param Time A pointer to the current time. 132 | 133 | @retval EFI_UNSUPPORTED This operation is not supported. 134 | 135 | **/ 136 | EFI_STATUS 137 | EFIAPI 138 | LibSetTime ( 139 | IN EFI_TIME *Time 140 | ) 141 | { 142 | // The virtual clock is read-only. 143 | return EFI_UNSUPPORTED; 144 | } 145 | 146 | /** 147 | Returns the current wakeup alarm clock setting. 148 | 149 | @param Enabled Indicates if the alarm is currently enabled or 150 | disabled. 151 | @param Pending Indicates if the alarm signal is pending and 152 | requires acknowledgement. 153 | @param Time The current alarm setting. 154 | 155 | @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform. 156 | 157 | **/ 158 | EFI_STATUS 159 | EFIAPI 160 | LibGetWakeupTime ( 161 | OUT BOOLEAN *Enabled, 162 | OUT BOOLEAN *Pending, 163 | OUT EFI_TIME *Time 164 | ) 165 | { 166 | return EFI_UNSUPPORTED; 167 | } 168 | 169 | /** 170 | Sets the system wakeup alarm clock time. 171 | 172 | @param Enabled Enable or disable the wakeup alarm. 173 | @param Time If Enable is TRUE, the time to set the wakeup alarm for. 174 | 175 | @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform. 176 | 177 | **/ 178 | EFI_STATUS 179 | EFIAPI 180 | LibSetWakeupTime ( 181 | IN BOOLEAN Enabled, 182 | OUT EFI_TIME *Time 183 | ) 184 | { 185 | return EFI_UNSUPPORTED; 186 | } 187 | 188 | /** 189 | This is the declaration of an EFI image entry point. This can be the entry point 190 | to an application written to this specification, an EFI boot service driver, 191 | or an EFI runtime driver. 192 | 193 | @param ImageHandle Handle that identifies the loaded image. 194 | @param SystemTable System Table for this image. 195 | 196 | @retval EFI_SUCCESS The operation completed successfully. 197 | 198 | **/ 199 | EFI_STATUS 200 | EFIAPI 201 | LibRtcInitialize ( 202 | IN EFI_HANDLE ImageHandle, 203 | IN EFI_SYSTEM_TABLE *SystemTable 204 | ) 205 | { 206 | // ARM ARCH Timer is already initialized in the SEC/PEI phase. 207 | return EFI_SUCCESS; 208 | } 209 | 210 | /** 211 | Fixup internal data so that EFI can be call in virtual mode. 212 | Call the passed in Child Notify event and convert any pointers in 213 | lib to virtual mode. 214 | 215 | @param[in] Event The Event that is being processed 216 | @param[in] Context Event Context 217 | **/ 218 | VOID 219 | EFIAPI 220 | LibRtcVirtualNotifyEvent ( 221 | IN EFI_EVENT Event, 222 | IN VOID *Context 223 | ) 224 | { 225 | // Not supporting OS calling RTC functions in virtual mode. 226 | return; 227 | } --------------------------------------------------------------------------------