├── .lint-revision ├── .gitattributes ├── .github ├── pull-request.yml └── lint.yml ├── .gitignore ├── aub_mem_dump ├── includes │ ├── setting_vars.inl │ ├── gfx_core_family.h │ └── setting_vars_base.inl ├── os_interface │ ├── CMakeLists.txt │ ├── os_calls.cpp │ └── os_calls.h ├── gen12lp │ ├── dg1 │ │ ├── enable_product_dg1.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_gen12lp_dg1.cpp │ ├── adln │ │ ├── enable_product_adln.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_gen12lp_adln.cpp │ ├── adlp │ │ ├── enable_product_adlp.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_gen12lp_adlp.cpp │ ├── adls │ │ ├── enable_product_adls.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_gen12lp_adls.cpp │ ├── tgllp │ │ ├── enable_product_tgllp.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_gen12lp_tgllp.cpp │ └── CMakeLists.txt ├── xe2_hpg_core │ ├── bmg │ │ ├── enable_product_bmg.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_xe2_hpg_core_bmg.cpp │ ├── lnl │ │ ├── enable_product_lnl.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_xe2_hpg_core_lnl.cpp │ ├── CMakeLists.txt │ └── command_streamer_helper_xe2_hpg_core.h ├── xe3_core │ ├── ptl │ │ ├── enable_product_ptl.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_xe3_core_ptl.cpp │ ├── CMakeLists.txt │ └── command_streamer_helper_xe3_core.h ├── xe3p_core │ ├── cri │ │ ├── enable_product_cri.cpp │ │ └── CMakeLists.txt │ └── CMakeLists.txt ├── xe_hpc_core │ ├── pvc │ │ ├── enable_product_pvc.cpp │ │ └── CMakeLists.txt │ ├── CMakeLists.txt │ └── command_streamer_helper_xe_hpc_core.h ├── xe_hpg_core │ ├── dg2 │ │ ├── enable_product_dg2.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_xe_hpg_core_dg2.cpp │ ├── mtl │ │ ├── enable_product_mtl.cpp │ │ ├── CMakeLists.txt │ │ └── command_streamer_helper_xe_hpg_core_mtl.cpp │ └── CMakeLists.txt ├── xe_core │ ├── CMakeLists.txt │ └── command_streamer_helper_xe_core.h ├── options.h ├── memcpy_s.h ├── misc_helpers.h ├── family_mapper.cpp ├── alloc_tools.h ├── memory_banks.cpp ├── align_helpers.h ├── page_table_entry_bits.h ├── page_table_pml5.h ├── settings_reader.h ├── page_table_walker.h ├── settings_reader.cpp ├── family_mapper.h ├── options.cpp ├── tbx_sockets.h ├── memory_bank_helper.h ├── null_hardware_context.h ├── memory_banks.h ├── page_table.cpp ├── tbx_stream.h ├── tbx_sockets_imp.h ├── tbx_shm_stream.h └── aub_header.h ├── tests ├── unit_tests │ ├── gen12lp │ │ ├── CMakeLists.txt │ │ ├── adln │ │ │ ├── CMakeLists.txt │ │ │ └── gpu_tests_adln.cpp │ │ └── dg1 │ │ │ ├── CMakeLists.txt │ │ │ ├── gpu_tests_dg1.cpp │ │ │ └── command_stream_helper_tests_dg1.cpp │ ├── white_box.h │ ├── xe3p_core │ │ ├── cri │ │ │ ├── CMakeLists.txt │ │ │ └── gpu_tests_cri.cpp │ │ ├── CMakeLists.txt │ │ ├── gpu_tests_xe3p_core.cpp │ │ └── command_streamer_helper_xe3p_tests.cpp │ ├── xe2_hpg_core │ │ ├── bmg │ │ │ ├── CMakeLists.txt │ │ │ └── gpu_tests_bmg.cpp │ │ ├── CMakeLists.txt │ │ └── lnl │ │ │ ├── CMakeLists.txt │ │ │ ├── gpu_tests_lnl.cpp │ │ │ └── command_stream_helper_tests_lnl.cpp │ ├── xe_hpc_core │ │ ├── pvc │ │ │ ├── CMakeLists.txt │ │ │ └── gpu_tests_pvc.cpp │ │ ├── CMakeLists.txt │ │ ├── command_streamer_xe_hpc_core_tests.cpp │ │ └── page_table_tests_xe_hpc_core.cpp │ ├── xe3_core │ │ ├── ptl │ │ │ ├── CMakeLists.txt │ │ │ ├── gpu_tests_ptl.cpp │ │ │ └── command_stream_helper_tests_ptl.cpp │ │ ├── CMakeLists.txt │ │ └── hardware_context_xe3_tests.cpp │ ├── xe_hpg_core │ │ ├── mtl │ │ │ ├── CMakeLists.txt │ │ │ └── command_stream_helper_tests_mtl.cpp │ │ ├── CMakeLists.txt │ │ ├── dg2 │ │ │ ├── CMakeLists.txt │ │ │ ├── page_table_tests_dg2.cpp │ │ │ ├── command_stream_helper_tests_dg2.cpp │ │ │ └── gpu_tests_dg2.cpp │ │ ├── hardware_context_xe_hpg_tests.cpp │ │ └── gpu_tests_xe_hpg_core.cpp │ ├── mock_stolen_memory.h │ ├── command_stream_helper_tests.h │ ├── mock_tbx_socket.h │ ├── hardware_context_tests.h │ ├── page_table_helper.h │ ├── test_misc_helpers.cpp │ ├── test_align_helpers.cpp │ ├── tbx_socket_tests.cpp │ ├── mock_gpu.h │ ├── command_stream_helper_xe_tests.cpp │ ├── settings_reader_tests.cpp │ ├── memory_bank_helper_tests.cpp │ ├── mock_physical_address_allocator.h │ └── CMakeLists.txt ├── empty_test_filters.cpp ├── test_traits │ ├── products │ │ ├── gen12lp │ │ │ ├── test_traits_dg1.cpp │ │ │ ├── test_traits_adln.cpp │ │ │ ├── test_traits_adlp.cpp │ │ │ ├── test_traits_adls.cpp │ │ │ ├── test_traits_tgllp.cpp │ │ │ └── CMakeLists.txt │ │ ├── xe_hpc_core │ │ │ ├── test_traits_pvc.cpp │ │ │ └── CMakeLists.txt │ │ ├── xe_hpg_core │ │ │ ├── test_traits_dg2.cpp │ │ │ ├── test_traits_mtl.cpp │ │ │ └── CMakeLists.txt │ │ ├── xe2_hpg_core │ │ │ ├── test_traits_bmg.cpp │ │ │ ├── test_traits_lnl.cpp │ │ │ └── CMakeLists.txt │ │ ├── xe3_core │ │ │ ├── test_traits_ptl.cpp │ │ │ └── CMakeLists.txt │ │ ├── xe3p_core │ │ │ ├── CMakeLists.txt │ │ │ └── test_traits_cri.cpp │ │ └── CMakeLists.txt │ ├── test_traits.cpp │ ├── CMakeLists.txt │ └── test_traits.h ├── aub_tests │ ├── aub_tests_filters.cpp │ ├── CMakeLists.txt │ └── simple_batch_buffer_fixture.h ├── mock_os_calls.h ├── simple_batch_buffer.h ├── mock_os_calls.cpp ├── variable_backup.h ├── simple_batch_buffer.cpp ├── tbx_tests │ ├── CMakeLists.txt │ ├── tbx_stream_tests.cpp │ └── aub_tbx_stream_tests.cpp ├── CMakeLists.txt ├── test_defaults.h ├── socket_stub.cpp └── test_defaults.cpp ├── Jenkinsfile ├── cmake └── fill_core_types.cmake ├── include └── aubstream │ ├── shared_mem_info.h │ ├── page_info.h │ ├── product_family.h │ ├── physical_allocation_info.h │ ├── engine_node.h │ ├── stepping_values.h │ ├── allocation_params.h │ ├── hardware_context.h │ ├── hint_values.h │ └── aub_manager.h ├── .config ├── third_party └── manifests.yml ├── LICENSE └── .clang-format /.lint-revision: -------------------------------------------------------------------------------- 1 | 1.2.43 2 | -------------------------------------------------------------------------------- /.gitattributes: -------------------------------------------------------------------------------- 1 | * text=auto 2 | -------------------------------------------------------------------------------- /.github/pull-request.yml: -------------------------------------------------------------------------------- 1 | defaultbranch: master 2 | draft: true 3 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | build/* 2 | build_master/* 3 | /third_party/googletest/ 4 | __pycache__ 5 | .vscode/* 6 | .vs/* 7 | -------------------------------------------------------------------------------- /aub_mem_dump/includes/setting_vars.inl: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/includes/setting_vars_base.inl" -------------------------------------------------------------------------------- /tests/unit_tests/gen12lp/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_GEN12LP) 8 | aub_stream_add_subdirectories("*") 9 | endif() 10 | -------------------------------------------------------------------------------- /aub_mem_dump/os_interface/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2023 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | target_sources(${PROJECT_NAME} 8 | PRIVATE 9 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 10 | ) 11 | -------------------------------------------------------------------------------- /tests/empty_test_filters.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gpu.h" 9 | #include 10 | 11 | using namespace aub_stream; 12 | std::string getTestFilter(const Gpu &gpu) { 13 | return std::string(); 14 | } -------------------------------------------------------------------------------- /tests/unit_tests/white_box.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | namespace aub_stream { 11 | template 12 | struct WhiteBox : public Type { 13 | using Type::Type; 14 | }; 15 | } // namespace aub_stream -------------------------------------------------------------------------------- /Jenkinsfile: -------------------------------------------------------------------------------- 1 | #!groovy 2 | 3 | /* 4 | * Copyright (C) 2022-2024 Intel Corporation 5 | * 6 | * SPDX-License-Identifier: MIT 7 | * 8 | */ 9 | 10 | buildConfig = [ 11 | 'master-build': ['gcc11', 'gcc12', 'gcc13', 'gcc14', 'clang18', 'msvc'], 12 | 'master-gate': ['gcc11', 'gcc12', 'gcc13', 'gcc14', 'clang18', 'msvc'], 13 | ] 14 | -------------------------------------------------------------------------------- /tests/test_traits/products/gen12lp/test_traits_dg1.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableDg1(DG1_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /aub_mem_dump/os_interface/os_calls.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include 9 | #include "os_calls.h" 10 | 11 | namespace aub_stream { 12 | namespace os_calls { 13 | getenvPtr getEnv = getenv; 14 | 15 | } 16 | 17 | } // namespace aub_stream 18 | -------------------------------------------------------------------------------- /tests/test_traits/products/gen12lp/test_traits_adln.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableAdln(ADLN_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/gen12lp/test_traits_adlp.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableAdlp(ADLP_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/gen12lp/test_traits_adls.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableAdls(ADLS_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/xe_hpc_core/test_traits_pvc.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enablePvc(PVC_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/xe_hpg_core/test_traits_dg2.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableDg2(DG2_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/xe_hpg_core/test_traits_mtl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableMtl(MTL_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/gen12lp/test_traits_tgllp.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableTgllp(TGLLP_CONFIG); 12 | } // namespace aub_stream -------------------------------------------------------------------------------- /tests/test_traits/products/xe2_hpg_core/test_traits_bmg.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableBmg(BMG_CONFIG); 12 | } // namespace aub_stream 13 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe2_hpg_core/test_traits_lnl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | EnableTestTraits enableLnl(LNL_CONFIG); 12 | } // namespace aub_stream 13 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe3_core/test_traits_ptl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | 12 | EnableTestTraits enablePtl(PTL_CONFIG); 13 | 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /tests/test_traits/test_traits.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | 10 | namespace aub_stream { 11 | 12 | const TestTraits *testTraits[static_cast(ProductFamily::MaxProduct)] = {}; 13 | 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /tests/aub_tests/aub_tests_filters.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gpu.h" 9 | #include 10 | 11 | using namespace aub_stream; 12 | std::string getTestFilter(const Gpu &gpu) { 13 | std::string filter = ""; 14 | return filter; 15 | } 16 | -------------------------------------------------------------------------------- /aub_mem_dump/os_interface/os_calls.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | namespace aub_stream { 12 | namespace os_calls { 13 | using getenvPtr = decltype(&getenv); 14 | extern getenvPtr getEnv; 15 | } // namespace os_calls 16 | 17 | } // namespace aub_stream 18 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3p_core/cri/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_CRI) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_cri.cpp 12 | ) 13 | endif() 14 | -------------------------------------------------------------------------------- /tests/unit_tests/gen12lp/adln/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_ADLN) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_adln.cpp 12 | ) 13 | endif() 14 | -------------------------------------------------------------------------------- /tests/unit_tests/xe2_hpg_core/bmg/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_BMG) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_bmg.cpp 12 | ) 13 | endif() 14 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpc_core/pvc/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_PVC) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_pvc.cpp 12 | ) 13 | endif() 14 | -------------------------------------------------------------------------------- /cmake/fill_core_types.cmake: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | list(APPEND ALL_CORE_TYPES "GEN12LP") 8 | list(APPEND ALL_CORE_TYPES "XE_HPG_CORE") 9 | list(APPEND ALL_CORE_TYPES "XE_HPC_CORE") 10 | list(APPEND ALL_CORE_TYPES "XE2_HPG_CORE") 11 | list(APPEND ALL_CORE_TYPES "XE3_CORE") 12 | list(APPEND ALL_CORE_TYPES "XE3P_CORE") 13 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/dg1/enable_product_dg1.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyDg1; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/bmg/enable_product_bmg.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | 11 | #include "aubstream/product_family.h" 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyBmg; 14 | } // namespace aub_stream -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adln/enable_product_adln.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyAdln; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adlp/enable_product_adlp.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyAdlp; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adls/enable_product_adls.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyAdls; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/lnl/enable_product_lnl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | 11 | #include "aubstream/product_family.h" 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyLnl; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3_core/ptl/enable_product_ptl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyPtl; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3p_core/cri/enable_product_cri.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyCri; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpc_core/pvc/enable_product_pvc.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | 11 | #include "aubstream/product_family.h" 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyPvc; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/dg2/enable_product_dg2.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyDg2; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/mtl/enable_product_mtl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyMtl; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/tgllp/enable_product_tgllp.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | static RegisterFamily registerFamilyTgllp; 14 | } // namespace aub_stream 15 | -------------------------------------------------------------------------------- /tests/mock_os_calls.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include 9 | #include 10 | 11 | namespace mock_os_calls { 12 | 13 | extern std::unordered_map environmentStrings; 14 | char *getEnv(const char *name) noexcept; 15 | 16 | void replaceCalls(); 17 | 18 | } // namespace mock_os_calls 19 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | target_sources(${PROJECT_NAME} 8 | PRIVATE 9 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 10 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_core.cpp 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_core.h 12 | ) 13 | -------------------------------------------------------------------------------- /include/aubstream/shared_mem_info.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | namespace aub_stream { 12 | 13 | struct SharedMemoryInfo { 14 | uint8_t *sysMemBase{}; 15 | uint64_t sysMemSize{}; 16 | 17 | uint8_t *localMemBase{}; 18 | uint64_t localMemSize{}; 19 | }; 20 | 21 | } // namespace aub_stream 22 | -------------------------------------------------------------------------------- /tests/unit_tests/xe2_hpg_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE2_HPG_CORE) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_tests_xe2_hpg_core.cpp 12 | ) 13 | 14 | aub_stream_add_subdirectories("*") 15 | endif() 16 | -------------------------------------------------------------------------------- /.config: -------------------------------------------------------------------------------- 1 | [review] 2 | maintainers = 3 | artur.harasimiuk@intel.com 4 | bartosz.dunajski@intel.com 5 | compute-runtime@intel.com 6 | filip.hazubski@intel.com 7 | jaroslaw.chodor@intel.com 8 | mateusz.hoppe@intel.com 9 | mateusz.jablonski@intel.com 10 | michal.mrozek@intel.com 11 | pawel.wilma@intel.com 12 | slawomir.milczarek@intel.com 13 | zbigniew.zdanowicz@intel.com 14 | owners = 15 | adam.cetnerowski@intel.com 16 | piotr.rozenfeld@intel.com 17 | -------------------------------------------------------------------------------- /tests/unit_tests/gen12lp/dg1/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_DG1) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests_dg1.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_dg1.cpp 13 | ) 14 | endif() 15 | -------------------------------------------------------------------------------- /tests/unit_tests/xe2_hpg_core/lnl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_LNL) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests_lnl.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_lnl.cpp 13 | ) 14 | endif() 15 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3_core/ptl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_PTL) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests_ptl.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_ptl.cpp 13 | ) 14 | endif() 15 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/mtl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_MTL) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_mtl.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests_mtl.cpp 13 | ) 14 | endif() 15 | -------------------------------------------------------------------------------- /aub_mem_dump/includes/gfx_core_family.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | namespace aub_stream { 12 | 13 | enum class CoreFamily : uint32_t { 14 | Gen12lp = 3, 15 | XeHpCore = 4, 16 | XeHpgCore = 5, 17 | XeHpcCore = 6, 18 | Xe2HpgCore = 7, 19 | Xe3Core = 8, 20 | Xe3pCore = 9, 21 | MaxCore, 22 | }; 23 | 24 | } // namespace aub_stream 25 | -------------------------------------------------------------------------------- /tests/unit_tests/gen12lp/adln/gpu_tests_adln.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "tests/unit_tests/mock_aub_stream.h" 10 | #include "test.h" 11 | 12 | using namespace aub_stream; 13 | using ::testing::_; 14 | 15 | TEST(Gpu, gpuAdlnReturnsCorrectDeviceId) { 16 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Adln); 17 | 18 | EXPECT_EQ(0x22, gpu->deviceId); 19 | } 20 | -------------------------------------------------------------------------------- /tests/simple_batch_buffer.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "gtest/gtest.h" 10 | #include "aub_mem_dump/aub_stream.h" 11 | #include "aub_mem_dump/command_streamer_helper.h" 12 | #include "aub_mem_dump/hardware_context_imp.h" 13 | #include "test_defaults.h" 14 | 15 | namespace aub_stream { 16 | 17 | void addSimpleBatchBuffer(HardwareContext *context, uint32_t memoryBank); 18 | } // namespace aub_stream 19 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe3_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE3_CORE) 8 | set(TEST_TRAITS_SOURCES 9 | ${TEST_TRAITS_SOURCES} 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_ptl.cpp 12 | ) 13 | 14 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 15 | 16 | GENERATE_CONFIG(PTL) 17 | endif() 18 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe_hpc_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE_HPC_CORE) 8 | set(TEST_TRAITS_SOURCES 9 | ${TEST_TRAITS_SOURCES} 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_pvc.cpp 12 | ) 13 | 14 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 15 | 16 | GENERATE_CONFIG(PVC) 17 | endif() 18 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE_HPG_CORE) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_xe_hpg_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/hardware_context_xe_hpg_tests.cpp 13 | ) 14 | 15 | aub_stream_add_subdirectories("*") 16 | endif() 17 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpc_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE_HPC_CORE) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_xe_hpc_core_tests.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_tests_xe_hpc_core.cpp 13 | ) 14 | 15 | aub_stream_add_subdirectories("*") 16 | endif() 17 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/dg2/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_DG2) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_dg2.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_tests_dg2.cpp 13 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests_dg2.cpp 14 | ) 15 | endif() 16 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe3p_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE3P_CORE) 8 | set(TEST_TRAITS_SOURCES 9 | ${TEST_TRAITS_SOURCES} 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_cri.cpp 12 | ) 13 | 14 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 15 | aub_stream_add_subdirectories("*") 16 | 17 | GENERATE_CONFIG(CRI) 18 | endif() 19 | -------------------------------------------------------------------------------- /aub_mem_dump/options.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_stream.h" 10 | #include 11 | #include 12 | #include 13 | #include 14 | 15 | namespace aub_stream { 16 | 17 | extern std::ostream &log; 18 | extern std::string tbxServerIp; 19 | extern uint16_t tbxServerPort; 20 | extern bool tbxFrontdoorMode; 21 | extern MMIOList MMIOListInjected; 22 | extern uint32_t aubStreamCaller; 23 | 24 | } // namespace aub_stream 25 | -------------------------------------------------------------------------------- /aub_mem_dump/memcpy_s.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #ifndef _WIN32 10 | #include 11 | #include 12 | 13 | inline int memcpy_s(void *dst, size_t destSize, const void *src, size_t count) { 14 | if ((dst == nullptr) || (src == nullptr)) { 15 | return -EINVAL; 16 | } 17 | if (destSize < count) { 18 | return -ERANGE; 19 | } 20 | 21 | memcpy(dst, src, count); 22 | 23 | return 0; 24 | } 25 | 26 | #endif 27 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/dg1/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_DG1) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp_dg1.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_dg1.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3p_core/cri/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_CRI) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3p_core_cri.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_cri.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adln/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_ADLN) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp_adln.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_adln.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adlp/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_ADLP) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp_adlp.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_adlp.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adls/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_ADLS) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp_adls.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_adls.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3_core/ptl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_PTL) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3_core_ptl.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_ptl.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/tgllp/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_TGLLP) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp_tgllp.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_tgllp.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/bmg/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_BMG) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe2_hpg_core_bmg.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_bmg.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/lnl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_LNL) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe2_hpg_core_lnl.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_lnl.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpc_core/pvc/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_PVC) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpc_core_pvc.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_pvc.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/dg2/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_DG2) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpg_core_dg2.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_dg2.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/mtl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_MTL) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpg_core_mtl.cpp 12 | ) 13 | 14 | target_sources(${PROJECT_NAME}_all_hw 15 | PRIVATE 16 | ${CMAKE_CURRENT_SOURCE_DIR}/enable_product_mtl.cpp 17 | ) 18 | 19 | endif() 20 | -------------------------------------------------------------------------------- /include/aubstream/page_info.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | struct PageInfo { 15 | uint64_t physicalAddress; 16 | size_t size; 17 | bool isLocalMemory; 18 | uint32_t memoryBank; 19 | }; 20 | 21 | static_assert(std::is_standard_layout_v && std::is_trivial_v && std::is_trivially_copyable_v, "PageInfo is not POD type"); 22 | 23 | } // namespace aub_stream -------------------------------------------------------------------------------- /include/aubstream/product_family.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | namespace aub_stream { 12 | 13 | enum class ProductFamily : uint32_t { 14 | Tgllp = 7u, 15 | Adls = 8u, 16 | Adlp = 9u, 17 | Adln = 10u, 18 | Dg1 = 11u, 19 | Dg2 = 13u, 20 | Pvc = 14u, 21 | Mtl = 15u, 22 | Arl = 15u, 23 | Bmg = 17u, 24 | Lnl = 18u, 25 | Ptl = 21u, 26 | Cri = 22u, 27 | MaxProduct, 28 | }; 29 | } // namespace aub_stream 30 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE3_CORE) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_tests_xe3_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_xe3_core.cpp 13 | ${CMAKE_CURRENT_SOURCE_DIR}/hardware_context_xe3_tests.cpp 14 | ) 15 | 16 | aub_stream_add_subdirectories("*") 17 | endif() 18 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe_hpg_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE_HPG_CORE) 8 | set(TEST_TRAITS_SOURCES 9 | ${TEST_TRAITS_SOURCES} 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_dg2.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_mtl.cpp 13 | ) 14 | 15 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 16 | 17 | GENERATE_CONFIG(DG2) 18 | GENERATE_CONFIG(MTL) 19 | endif() 20 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe2_hpg_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE2_HPG_CORE) 8 | set(TEST_TRAITS_SOURCES 9 | ${TEST_TRAITS_SOURCES} 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_bmg.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_lnl.cpp 13 | ) 14 | 15 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 16 | 17 | GENERATE_CONFIG(BMG) 18 | GENERATE_CONFIG(LNL) 19 | endif() 20 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3p_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_XE3P_CORE) 8 | target_sources(${TARGET_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_tests_xe3p_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests_xe3p_core.cpp 13 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3p_tests.cpp 14 | ) 15 | 16 | aub_stream_add_subdirectories("*") 17 | endif() 18 | -------------------------------------------------------------------------------- /aub_mem_dump/misc_helpers.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | constexpr uint16_t countBits(uint16_t v) { 15 | uint16_t r = ((v >> 1) & 0x5555) + (v & 0x5555); 16 | r = ((r >> 2) & 0x3333) + (r & 0x3333); 17 | r = ((r >> 4) & 0x0f0f) + (r & 0x0f0f); 18 | r = ((r >> 8) & 0x0ff) + (r & 0x0ff); 19 | return r & 0xff; 20 | } 21 | 22 | template 23 | constexpr size_t arrayCount(const T (&)[n]) { 24 | return n; 25 | } 26 | 27 | } // namespace aub_stream 28 | -------------------------------------------------------------------------------- /include/aubstream/physical_allocation_info.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | struct PhysicalAllocationInfo { 15 | uint64_t physicalAddress; 16 | size_t size; 17 | uint32_t memoryBank; 18 | size_t pageSize; 19 | }; 20 | 21 | static_assert(std::is_standard_layout_v && std::is_trivial_v && std::is_trivially_copyable_v, "PhysicalAllocationInfo is not POD type"); 22 | 23 | } // namespace aub_stream -------------------------------------------------------------------------------- /aub_mem_dump/family_mapper.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "family_mapper.h" 9 | #include "gpu.h" 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | std::unique_ptr()>>> productFamilyTable; 15 | 16 | std::function()> getGpu(ProductFamily productFamily) { 17 | if (productFamilyTable.get()->find(productFamily) != productFamilyTable.get()->end()) { 18 | return (*productFamilyTable.get())[productFamily]; 19 | } 20 | return {}; 21 | } 22 | } // namespace aub_stream 23 | -------------------------------------------------------------------------------- /aub_mem_dump/includes/setting_vars_base.inl: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | DECLARE_SETTING_VARIABLE(bool, PrintSettings, false, "Print all settings to stdout") 9 | DECLARE_SETTING_VARIABLE(int, ExeclistSubmitPortSubmission, -1, "Enable submission via ELSP") 10 | DECLARE_SETTING_VARIABLE(int, TbxConnectionDelayInSeconds, -1, "-1: default. >=0: seconds to wait before initializing TBX connection") 11 | DECLARE_SETTING_VARIABLE(int, LogLevel, 0, "Bitfield. 0: default - logs not printed. >=0: print logs of specific level") 12 | DECLARE_SETTING_VARIABLE(int, IndirectRingState, -1, "Enable indirect ring state") 13 | -------------------------------------------------------------------------------- /include/aubstream/engine_node.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | 11 | namespace aub_stream { 12 | 13 | enum EngineType : uint32_t { 14 | ENGINE_RCS = 0, 15 | ENGINE_BCS, 16 | ENGINE_VCS, 17 | ENGINE_VECS, 18 | ENGINE_CCS, 19 | ENGINE_CCS1, 20 | ENGINE_CCS2, 21 | ENGINE_CCS3, 22 | ENGINE_CCCS, 23 | ENGINE_BCS1, 24 | ENGINE_BCS2, 25 | ENGINE_BCS3, 26 | ENGINE_BCS4, 27 | ENGINE_BCS5, 28 | ENGINE_BCS6, 29 | ENGINE_BCS7, 30 | ENGINE_BCS8, 31 | NUM_ENGINES 32 | }; 33 | 34 | } // namespace aub_stream 35 | -------------------------------------------------------------------------------- /third_party/manifests.yml: -------------------------------------------------------------------------------- 1 | components: 2 | googletest: 3 | branch: main 4 | dest_dir: third_party/googletest 5 | repository: https://github.com/google/googletest.git 6 | revision: v1.14.0 7 | type: git 8 | aubstream-clang-format: 9 | dest_dir: tools/clang-format 10 | type: git 11 | branch: clang-format 12 | revision: 15.0.6 13 | aub_configs: 14 | branch: aub_configs 15 | dest_dir: aub_configs 16 | revision: 0c3193c602b64c2f746436bc18baf7d761e8db50 17 | type: git 18 | infra: 19 | branch: master 20 | dest_dir: infra 21 | revision: v7530 22 | fetch_tags: true 23 | type: git 24 | converter: E-1180 25 | version: '1' 26 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3p_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_XE3P_CORE) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3p_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3p_core.h 13 | ) 14 | 15 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 16 | 17 | foreach(subdir ${SUBDIRS}) 18 | MESSAGE(STATUS "Adding directory: ${subdir}") 19 | add_subdirectory(${subdir}) 20 | endforeach() 21 | endif() 22 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_GEN12LP) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_gen12lp.h 13 | ) 14 | 15 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 16 | 17 | foreach(subdir ${SUBDIRS}) 18 | MESSAGE(STATUS "Adding directory: gen12lp.${subdir}") 19 | add_subdirectory(${subdir}) 20 | endforeach() 21 | endif() 22 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_XE3_CORE) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe3_core.h 13 | ) 14 | 15 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 16 | 17 | foreach(subdir ${SUBDIRS}) 18 | MESSAGE(STATUS "Adding directory: ${subdir}") 19 | add_subdirectory(${subdir}) 20 | endforeach() 21 | endif() 22 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpc_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_XE_HPC_CORE) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpc_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpc_core.h 13 | ) 14 | 15 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 16 | 17 | foreach(subdir ${SUBDIRS}) 18 | MESSAGE(STATUS "Adding directory: xe_hpc_core.${subdir}") 19 | add_subdirectory(${subdir}) 20 | endforeach() 21 | endif() 22 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_XE_HPG_CORE) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpg_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe_hpg_core.h 13 | ) 14 | 15 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 16 | 17 | foreach(subdir ${SUBDIRS}) 18 | MESSAGE(STATUS "Adding directory: xe_hpg_core.${subdir}") 19 | add_subdirectory(${subdir}) 20 | endforeach() 21 | endif() 22 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2024-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_SUPPORT_XE2_HPG_CORE) 8 | target_sources(${PROJECT_NAME} 9 | PRIVATE 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe2_hpg_core.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/command_streamer_helper_xe2_hpg_core.h 13 | ) 14 | 15 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 16 | 17 | foreach(subdir ${SUBDIRS}) 18 | MESSAGE(STATUS "Adding directory: xe2_hpg_core.${subdir}") 19 | add_subdirectory(${subdir}) 20 | endforeach() 21 | endif() 22 | -------------------------------------------------------------------------------- /tests/mock_os_calls.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/os_interface/os_calls.h" 9 | 10 | #include 11 | #include 12 | 13 | namespace mock_os_calls { 14 | 15 | std::unordered_map environmentStrings; 16 | 17 | char *getEnv(const char *name) noexcept { 18 | if (const auto it = environmentStrings.find(name); it != environmentStrings.end()) { 19 | return const_cast(it->second.c_str()); 20 | } 21 | return nullptr; 22 | } 23 | 24 | void replaceCalls() { 25 | aub_stream::os_calls::getEnv = mock_os_calls::getEnv; 26 | } 27 | } // namespace mock_os_calls 28 | -------------------------------------------------------------------------------- /aub_mem_dump/alloc_tools.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #if defined(_WIN32) 10 | #include 11 | #else 12 | #include 13 | #endif 14 | 15 | namespace aub_stream { 16 | 17 | inline void *aligned_alloc(size_t s, size_t alignement) { 18 | #if defined(_WIN32) 19 | return _aligned_malloc(s, alignement); 20 | #else 21 | void *p = nullptr; 22 | if (posix_memalign(&p, alignement, s)) { 23 | p = nullptr; 24 | } 25 | return p; 26 | #endif 27 | } 28 | 29 | inline void aligned_free(void *p) { 30 | #if defined(_WIN32) 31 | _aligned_free(p); 32 | #else 33 | free(p); 34 | #endif 35 | } 36 | 37 | } // namespace aub_stream -------------------------------------------------------------------------------- /aub_mem_dump/memory_banks.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "memory_banks.h" 9 | #include 10 | 11 | namespace aub_stream { 12 | 13 | std::string memoryBanksToString(uint32_t memoryBanks, const std::string &separator) { 14 | std::ostringstream str; 15 | 16 | if (memoryBanks) { 17 | int i = 0; 18 | while (memoryBanks) { 19 | if (memoryBanks & 1) { 20 | str << separator << "bank" << i; 21 | } 22 | memoryBanks >>= 1; 23 | ++i; 24 | } 25 | } else { 26 | str << separator << "sys"; 27 | } 28 | 29 | return str.str(); 30 | } 31 | 32 | } // namespace aub_stream 33 | -------------------------------------------------------------------------------- /aub_mem_dump/align_helpers.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | constexpr uint64_t alignUp(uint64_t size, uint64_t alignementBits) { 15 | const uint64_t alignementVal = uint64_t(1) << alignementBits; 16 | const uint64_t alignementMask = alignementVal - 1; 17 | return (size + alignementMask) & ~alignementMask; 18 | } 19 | constexpr uint64_t alignDown(uint64_t address, uint64_t alignementBits) { 20 | const uint64_t alignementVal = uint64_t(1) << alignementBits; 21 | const uint64_t alignementMask = alignementVal - 1; 22 | return address & ~alignementMask; 23 | } 24 | 25 | } // namespace aub_stream 26 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adln/command_streamer_helper_gen12lp_adln.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aubstream/product_family.h" 9 | #include "aub_mem_dump/gen12lp/command_streamer_helper_gen12lp.h" 10 | 11 | namespace aub_stream { 12 | 13 | struct GpuAdln : public GpuGen12LP { 14 | GpuAdln() { 15 | productFamily = ProductFamily::Adln; 16 | gfxCoreFamily = CoreFamily::Gen12lp; 17 | productAbbreviation = "adln"; 18 | deviceId = 0x22; 19 | deviceCount = 1; 20 | } 21 | }; 22 | 23 | template <> 24 | std::function()> enableGpu() { 25 | return std::make_unique; 26 | } 27 | } // namespace aub_stream 28 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adlp/command_streamer_helper_gen12lp_adlp.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gen12lp/command_streamer_helper_gen12lp.h" 9 | 10 | #include "aubstream/product_family.h" 11 | namespace aub_stream { 12 | 13 | struct GpuAdlp : public GpuGen12LP { 14 | GpuAdlp() { 15 | productFamily = ProductFamily::Adlp; 16 | gfxCoreFamily = CoreFamily::Gen12lp; 17 | productAbbreviation = "adlp"; 18 | deviceId = 0x22; 19 | deviceCount = 1; 20 | } 21 | }; 22 | 23 | template <> 24 | std::function()> enableGpu() { 25 | return std::make_unique; 26 | } 27 | } // namespace aub_stream 28 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/adls/command_streamer_helper_gen12lp_adls.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gen12lp/command_streamer_helper_gen12lp.h" 9 | #include "aubstream/product_family.h" 10 | 11 | namespace aub_stream { 12 | 13 | struct GpuAdls : public GpuGen12LP { 14 | GpuAdls() { 15 | productFamily = ProductFamily::Adls; 16 | gfxCoreFamily = CoreFamily::Gen12lp; 17 | productAbbreviation = "adls"; 18 | deviceId = 0x25; 19 | deviceCount = 1; 20 | } 21 | }; 22 | 23 | template <> 24 | std::function()> enableGpu() { 25 | return std::make_unique; 26 | } 27 | } // namespace aub_stream 28 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/tgllp/command_streamer_helper_gen12lp_tgllp.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gen12lp/command_streamer_helper_gen12lp.h" 9 | 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | 14 | struct GpuTgllp : public GpuGen12LP { 15 | GpuTgllp() { 16 | productFamily = ProductFamily::Tgllp; 17 | gfxCoreFamily = CoreFamily::Gen12lp; 18 | productAbbreviation = "tgllp"; 19 | deviceId = 0x16; 20 | deviceCount = 1; 21 | } 22 | }; 23 | 24 | template <> 25 | std::function()> enableGpu() { 26 | return std::make_unique; 27 | } 28 | 29 | } // namespace aub_stream 30 | -------------------------------------------------------------------------------- /include/aubstream/stepping_values.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | namespace aub_stream { 10 | struct SteppingValues { 11 | enum { 12 | A = 0, 13 | B = 1, 14 | C = 2, 15 | D = 3, 16 | E = 4, 17 | F = 5, 18 | G = 6, 19 | H = 7, 20 | I = 8, 21 | J = 9, 22 | K = 10, 23 | L = 11, 24 | M = 12, 25 | N = 13, 26 | O = 14, 27 | P = 15, 28 | Q = 16, 29 | R = 17, 30 | S = 18, 31 | T = 19, 32 | U = 20, 33 | V = 21, 34 | W = 22, 35 | X = 23, 36 | Y = 24, 37 | Z = 25, 38 | }; 39 | }; 40 | } // namespace aub_stream 41 | -------------------------------------------------------------------------------- /tests/unit_tests/mock_stolen_memory.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/gpu.h" 10 | 11 | namespace aub_stream { 12 | 13 | struct MockStolenMemoryInStaticStorage : public StolenMemoryInStaticStorage { 14 | MockStolenMemoryInStaticStorage(uint64_t memoryBankSize, uint64_t size) : StolenMemoryInStaticStorage(memoryBankSize, size) { 15 | } 16 | using StolenMemoryInStaticStorage::staticMemoryBankSize; 17 | }; 18 | 19 | struct MockStolenMemoryInHeap : public StolenMemoryInHeap { 20 | MockStolenMemoryInHeap(uint32_t deviceCount, uint64_t size) : StolenMemoryInHeap(deviceCount, size) { 21 | } 22 | using StolenMemoryInHeap::localStolenStorage; 23 | }; 24 | 25 | } // namespace aub_stream 26 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3_core/ptl/gpu_tests_ptl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "gtest/gtest.h" 10 | #include "aub_mem_dump/memory_banks.h" 11 | 12 | #include "test.h" 13 | 14 | using namespace aub_stream; 15 | 16 | TEST(Gpu, gpuPtlReturnsCorrectDeviceId) { 17 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Ptl); 18 | 19 | EXPECT_EQ(51u, gpu->deviceId); 20 | } 21 | 22 | TEST(Ptl, allocatePML5) { 23 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Ptl); 24 | PhysicalAddressAllocatorSimple allocator; 25 | 26 | auto ppgtt = std::unique_ptr(gpu->allocatePPGTT(&allocator, MEMORY_BANK_0, maxNBitValue(57))); 27 | EXPECT_EQ(57u, ppgtt->getNumAddressBits()); 28 | } 29 | -------------------------------------------------------------------------------- /tests/unit_tests/xe2_hpg_core/bmg/gpu_tests_bmg.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "gtest/gtest.h" 10 | #include "aub_mem_dump/memory_banks.h" 11 | 12 | #include "test.h" 13 | 14 | using namespace aub_stream; 15 | 16 | TEST(Gpu, gpuBmgReturnsCorrectDeviceId) { 17 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Bmg); 18 | 19 | EXPECT_EQ(43u, gpu->deviceId); 20 | } 21 | 22 | TEST(Bmg, allocatePML5) { 23 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Bmg); 24 | PhysicalAddressAllocatorSimple allocator; 25 | 26 | auto ppgtt = std::unique_ptr(gpu->allocatePPGTT(&allocator, MEMORY_BANK_0, maxNBitValue(57))); 27 | EXPECT_EQ(57u, ppgtt->getNumAddressBits()); 28 | } 29 | -------------------------------------------------------------------------------- /tests/unit_tests/xe2_hpg_core/lnl/gpu_tests_lnl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "gtest/gtest.h" 10 | #include "aub_mem_dump/memory_banks.h" 11 | 12 | #include "test.h" 13 | 14 | using namespace aub_stream; 15 | 16 | TEST(Gpu, gpuLnlReturnsCorrectDeviceId) { 17 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Lnl); 18 | 19 | EXPECT_EQ(45u, gpu->deviceId); 20 | } 21 | 22 | TEST(Lnl, allocatePML5) { 23 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Lnl); 24 | PhysicalAddressAllocatorSimple allocator; 25 | 26 | auto ppgtt = std::unique_ptr(gpu->allocatePPGTT(&allocator, MEMORY_BANK_0, maxNBitValue(57))); 27 | EXPECT_EQ(57u, ppgtt->getNumAddressBits()); 28 | } 29 | -------------------------------------------------------------------------------- /.github/lint.yml: -------------------------------------------------------------------------------- 1 | use-configs: 2 | - lint/opensource/copyrights 3 | - lint/opensource/banned_words 4 | lint: 5 | clang-format: 6 | included: 7 | - \.cpp$ 8 | - \.h$ 9 | - \.inl$ 10 | - \.hpp$ 11 | excluded: 12 | - third_party/ 13 | - scripts/ 14 | 15 | cmake-format: 16 | included: 17 | - CMakeLists.txt$ 18 | - \.cmake$ 19 | excluded: 20 | - third_party/* 21 | 22 | copyright: 23 | excluded: 24 | - third_party/ 25 | mit_header: 26 | year_constraints: 27 | _default: 2022 28 | file_types: 29 | bat: 30 | comment_begin: "REM" 31 | comment_end: "REM" 32 | comment_char: "REM" 33 | 34 | ults-needed: 35 | disabled: true 36 | 37 | banned_words: 38 | master: 39 | todo: 40 | -------------------------------------------------------------------------------- /tests/test_traits/products/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | set(TEST_TRAITS_SOURCES 8 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 9 | ) 10 | 11 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 12 | 13 | if(NOT ("${BRANCH_TYPE}" STREQUAL "")) 14 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "${BRANCH_TYPE}") 15 | 16 | foreach(subdir ${SUBDIRS}) 17 | add_subdirectory(${subdir}) 18 | endforeach() 19 | endif() 20 | 21 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "gen*") 22 | 23 | foreach(subdir ${SUBDIRS}) 24 | add_subdirectory(${subdir}) 25 | endforeach() 26 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*_core") 27 | 28 | foreach(subdir ${SUBDIRS}) 29 | add_subdirectory(${subdir}) 30 | endforeach() -------------------------------------------------------------------------------- /tests/test_traits/products/gen12lp/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | if(AUBSTREAM_TESTS_GEN12LP) 8 | set(TEST_TRAITS_SOURCES 9 | ${TEST_TRAITS_SOURCES} 10 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 11 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_adln.cpp 12 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_adlp.cpp 13 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_adls.cpp 14 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_dg1.cpp 15 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits_tgllp.cpp 16 | ) 17 | 18 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 19 | 20 | GENERATE_CONFIG(ADLS) 21 | GENERATE_CONFIG(DG1) 22 | GENERATE_CONFIG(TGLLP) 23 | GENERATE_CONFIG(ADLN) 24 | GENERATE_CONFIG(ADLP) 25 | endif() 26 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/bmg/command_streamer_helper_xe2_hpg_core_bmg.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/xe2_hpg_core/command_streamer_helper_xe2_hpg_core.h" 9 | #include "aub_mem_dump/page_table_pml5.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | 14 | struct GpuBmg : public GpuXe2HpgCore { 15 | GpuBmg() { 16 | productFamily = ProductFamily::Bmg; 17 | gfxCoreFamily = CoreFamily::Xe2HpgCore; 18 | productAbbreviation = "bmg"; 19 | deviceId = 43; 20 | deviceCount = GpuXe2HpgCore::numSupportedDevices; 21 | } 22 | }; 23 | 24 | template <> 25 | std::function()> enableGpu() { 26 | return std::make_unique; 27 | } 28 | } // namespace aub_stream 29 | -------------------------------------------------------------------------------- /tests/unit_tests/gen12lp/dg1/gpu_tests_dg1.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/memory_banks.h" 9 | #include "test_defaults.h" 10 | #include "tests/unit_tests/mock_aub_stream.h" 11 | 12 | #include "test.h" 13 | 14 | using namespace aub_stream; 15 | 16 | TEST(Gpu, gpuDg1ReturnsCorrectDeviceId) { 17 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg1); 18 | 19 | EXPECT_EQ(0x1e, gpu->deviceId); 20 | } 21 | 22 | TEST(Gpu, dg1GivenOneDeviceSetMemoryBankSizeOnlyDefinesOneBank) { 23 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg1); 24 | 25 | MockAubStreamBase stream; 26 | EXPECT_CALL(stream, writeMMIO(0x4900, 0x00000201)).Times(1); 27 | 28 | auto deviceCount = 1; 29 | auto memoryBankSize = 2 * GB; 30 | gpu->setMemoryBankSize(stream, deviceCount, memoryBankSize); 31 | } 32 | -------------------------------------------------------------------------------- /tests/variable_backup.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | template 11 | class VariableBackup { 12 | public: 13 | VariableBackup(T *ptr) : pValue(ptr) { 14 | oldValue = *ptr; 15 | } 16 | VariableBackup(T *ptr, T &&newValue) : pValue(ptr) { 17 | oldValue = *ptr; 18 | *pValue = newValue; 19 | } 20 | VariableBackup(T *ptr, T &newValue) : pValue(ptr) { 21 | oldValue = *ptr; 22 | *pValue = newValue; 23 | } 24 | ~VariableBackup() { 25 | *pValue = oldValue; 26 | } 27 | void operator=(const T &val) { 28 | *pValue = val; 29 | } 30 | template 31 | bool operator==(const T2 &val) const { 32 | return *pValue == val; 33 | } 34 | 35 | private: 36 | T oldValue; 37 | T *pValue; 38 | }; 39 | -------------------------------------------------------------------------------- /aub_mem_dump/page_table_entry_bits.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include 11 | 12 | namespace aub_stream { 13 | constexpr uint64_t toBitValue(uint32_t bit) { 14 | return static_cast(1u) << static_cast(bit); 15 | } 16 | template 17 | inline uint64_t toBitValue(uint32_t bit, T... nextBits) { 18 | return static_cast(1u) << static_cast(bit) | toBitValue(nextBits...); 19 | } 20 | 21 | namespace PpgttEntryBits { 22 | const uint32_t presentBit = 0; 23 | const uint32_t writableBit = 1; 24 | const uint32_t userSupervisorBit = 2; 25 | const uint32_t intermediatePageSizeBit = 6; 26 | const uint32_t atomicEnableBit = 10; 27 | const uint32_t legacyIntermediatePageSizeBit = 11; 28 | const uint32_t localMemoryBit = 11; 29 | } // namespace PpgttEntryBits 30 | } // namespace aub_stream 31 | -------------------------------------------------------------------------------- /tests/simple_batch_buffer.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "simple_batch_buffer.h" 9 | 10 | namespace aub_stream { 11 | 12 | void addSimpleBatchBuffer(HardwareContext *context, uint32_t memoryBank) { 13 | auto ctxt = static_cast(context); 14 | ctxt->initialize(); 15 | 16 | // Initialize batch buffer 17 | uint32_t batchCommands[] = { 18 | 0x00000001, 19 | 0x00000002, 20 | 0x00000003, 21 | 0x00000004, 22 | 0x05000000, 23 | }; 24 | 25 | // Allocate an arbitrary address from the GGTT allocator. 26 | // Could be any valid GPU address 27 | auto &allocator = ctxt->ggtt.gfxAddressAllocator; 28 | uintptr_t ppgttBatchBuffer = allocator.alignedAlloc(0x1000, 0x1000); 29 | 30 | ctxt->writeAndSubmitBatchBuffer(ppgttBatchBuffer, batchCommands, sizeof(batchCommands), memoryBank, defaultPageSize); 31 | } 32 | } // namespace aub_stream 33 | -------------------------------------------------------------------------------- /tests/unit_tests/command_stream_helper_tests.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "mock_aub_stream.h" 9 | #include "gtest/gtest.h" 10 | 11 | #include 12 | #pragma once 13 | 14 | class CommandStreamerHelperTest : public aub_stream::MockAubStreamFixture, public ::testing::Test { 15 | public: 16 | bool checkLRIInLRCA(uint32_t *lrca, size_t sizeLrca, uint32_t mmioEngine, uint32_t address, uint32_t value) { 17 | bool lriFound = false; 18 | for (uint32_t i = 0; i < sizeLrca / sizeof(uint32_t); i += 2) { 19 | if (lrca[i] == (mmioEngine + address) && lrca[i + 1] == value) { 20 | lriFound = true; 21 | break; 22 | } 23 | } 24 | return lriFound; 25 | } 26 | 27 | void SetUp() override { 28 | aub_stream::MockAubStreamFixture::SetUp(); 29 | } 30 | 31 | void TearDown() override { 32 | aub_stream::MockAubStreamFixture::TearDown(); 33 | } 34 | }; 35 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/dg2/page_table_tests_dg2.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/memory_banks.h" 9 | #include "aub_mem_dump/page_table.h" 10 | #include "test_defaults.h" 11 | #include "gtest/gtest.h" 12 | 13 | #include "test.h" 14 | 15 | using namespace aub_stream; 16 | 17 | TEST(PageTableTestsDg2, getEntryValue) { 18 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 19 | 20 | uint64_t physicalAddress = 0x20000; 21 | PageTableMemory pageTable(*gpu, physicalAddress, MEMORY_BANK_0); 22 | 23 | auto extraEntryBits = gpu->getPPGTTExtraEntryBits({}); 24 | EXPECT_EQ(toBitValue(PpgttEntryBits::atomicEnableBit), extraEntryBits); 25 | 26 | auto expectedEntryValue = physicalAddress | 27 | toBitValue(PpgttEntryBits::atomicEnableBit, PpgttEntryBits::localMemoryBit, 28 | PpgttEntryBits::writableBit, PpgttEntryBits::presentBit); 29 | 30 | EXPECT_EQ(expectedEntryValue, pageTable.getEntryValue()); 31 | } 32 | -------------------------------------------------------------------------------- /tests/unit_tests/mock_tbx_socket.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/tbx_sockets_imp.h" 10 | #include "gmock/gmock.h" 11 | 12 | namespace aub_stream { 13 | 14 | struct MockTbxSocketsImp : public TbxSocketsImp { 15 | using TbxSocketsImp::checkServerConfig; 16 | using TbxSocketsImp::frontdoorMode; 17 | using TbxSocketsImp::inErrorState; 18 | 19 | public: 20 | MOCK_METHOD4(readMemoryExt, bool(uint64_t offset, void *data, size_t size, bool isLocalMem)); 21 | MOCK_METHOD4(writeMemoryExt, bool(uint64_t offset, const void *data, size_t size, bool isLocalMem)); 22 | MOCK_METHOD5(readPCICFG, bool(uint32_t bus, uint32_t device, uint32_t function, uint32_t offset, uint32_t *value)); 23 | MOCK_METHOD2(readMMIO, bool(uint32_t offset, uint32_t *data)); 24 | MOCK_METHOD2(sendWriteData, bool(const void *buffer, size_t sizeInBytes)); 25 | MOCK_METHOD2(getResponseData, bool(void *buffer, size_t sizeInBytes)); 26 | MOCK_METHOD0(close, void(void)); 27 | }; 28 | } // namespace aub_stream 29 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (C) 2022 Intel Corporation 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /tests/test_traits/products/xe3p_core/test_traits_cri.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "tests/test_traits/test_traits.h" 9 | #include "tests/test_defaults.h" 10 | #include 11 | 12 | namespace aub_stream { 13 | namespace { 14 | std::string getConfigCri(const TestTraits *traits, const GpuDescriptor &desc) { 15 | std::stringstream strConfig; 16 | 17 | strConfig << desc.deviceCount 18 | << "tx"; 19 | 20 | uint32_t xeCuCount = 1; 21 | uint32_t sliceCount = traits->deviceSliceCount; 22 | if (sliceCount > 4) { 23 | xeCuCount = sliceCount / 4; 24 | sliceCount = sliceCount / xeCuCount; 25 | } 26 | 27 | strConfig << xeCuCount 28 | << "x" 29 | << sliceCount 30 | << "x" 31 | << traits->deviceSubSliceCount 32 | << "x" 33 | << traits->deviceEuPerSubSlice; 34 | 35 | return strConfig.str(); 36 | }; 37 | EnableTestTraits enableCri(CRI_CONFIG); 38 | } // namespace 39 | } // namespace aub_stream 40 | -------------------------------------------------------------------------------- /aub_mem_dump/page_table_pml5.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/page_table.h" 10 | 11 | namespace aub_stream { 12 | 13 | struct PML5 : public PageTable { 14 | using AddressType = uint64_t; 15 | 16 | uint64_t getEntryValue() const override { 17 | return getPhysicalAddress() | toBitValue(PpgttEntryBits::writableBit, PpgttEntryBits::presentBit); 18 | } 19 | 20 | unsigned int getIndex(uint64_t gfxAddress) override { 21 | return (gfxAddress >> 48) & 0x1ff; 22 | } 23 | 24 | PageTable *allocateChild(const Gpu &gpu, size_t pageSize, uint32_t pageTableMemoryBank) override { 25 | assert(pageTableMemoryBank == memoryBank); 26 | return new PML4(gpu, allocator, pageTableMemoryBank); 27 | } 28 | 29 | PML5(const Gpu &gpu, PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank) 30 | : PageTable(gpu, physicalAddressAllocator, 4096u, 512u, memoryBank) { 31 | numAddressBits = 57; 32 | numLevels = 5; 33 | } 34 | }; 35 | 36 | } // namespace aub_stream 37 | -------------------------------------------------------------------------------- /tests/tbx_tests/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | set(TARGET_NAME ${PROJECT_NAME}_tbx_tests) 8 | message(STATUS "TBX tests: ${TARGET_NAME}") 9 | 10 | add_executable(${TARGET_NAME} 11 | ${SOURCES} 12 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 13 | ${CMAKE_CURRENT_SOURCE_DIR}/aub_tbx_stream_tests.cpp 14 | ${CMAKE_CURRENT_SOURCE_DIR}/tbx_stream_tests.cpp 15 | ${CMAKE_SOURCE_DIR}/tests/empty_test_filters.cpp 16 | ) 17 | 18 | get_property(TEST_TRAITS_MACROS GLOBAL PROPERTY TEST_TRAITS_MACROS_property) 19 | 20 | target_compile_definitions(${TARGET_NAME} PUBLIC ${TEST_TRAITS_MACROS}) 21 | 22 | if(WIN32) 23 | target_link_libraries(${TARGET_NAME} Ws2_32) 24 | endif() 25 | 26 | set_target_properties( 27 | ${TARGET_NAME} 28 | PROPERTIES 29 | VS_DEBUGGER_WORKING_DIRECTORY "$(OutDir)" 30 | VS_DEBUGGER_COMMAND_ARGUMENTS "--gtest_filter=* --gtest_catch_exceptions=0" 31 | ) 32 | 33 | aub_stream_create_source_tree(${TARGET_NAME}) 34 | -------------------------------------------------------------------------------- /aub_mem_dump/settings_reader.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | #include "aub_mem_dump/os_interface/os_calls.h" 12 | 13 | namespace aub_stream { 14 | 15 | class SettingsReader { 16 | public: 17 | virtual ~SettingsReader() = default; 18 | virtual int32_t getSetting(const char *settingName, int32_t defaultValue) = 0; 19 | virtual int64_t getSetting(const char *settingName, int64_t defaultValue) = 0; 20 | virtual bool getSetting(const char *settingName, bool defaultValue) = 0; 21 | virtual std::string getSetting(const char *settingName, const std::string &value) = 0; 22 | }; 23 | 24 | class EnvironmentReader : public SettingsReader { 25 | public: 26 | int32_t getSetting(const char *settingName, int32_t defaultValue) override; 27 | int64_t getSetting(const char *settingName, int64_t defaultValue) override; 28 | bool getSetting(const char *settingName, bool defaultValue) override; 29 | std::string getSetting(const char *settingName, const std::string &value) override; 30 | }; 31 | 32 | } // namespace aub_stream 33 | -------------------------------------------------------------------------------- /include/aubstream/allocation_params.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | #include 12 | 13 | namespace aub_stream { 14 | 15 | struct AllocationParams { 16 | AllocationParams() = delete; 17 | AllocationParams(uint64_t gfxAddress, const void *memory, size_t size, uint32_t memoryBanks, int hint, size_t pageSize) 18 | : gfxAddress(gfxAddress), memory(memory), size(size), memoryBanks(memoryBanks), hint(hint), pageSize(pageSize) { 19 | additionalParams = {}; 20 | } 21 | 22 | uint64_t gfxAddress = 0; 23 | const void *memory = nullptr; 24 | size_t size = 0; 25 | uint32_t memoryBanks = 0; 26 | int hint = 0; 27 | size_t pageSize = 0; 28 | 29 | struct AdditionalParams { 30 | bool compressionEnabled : 1; 31 | bool uncached : 1; 32 | bool padding : 6; 33 | }; 34 | 35 | AdditionalParams additionalParams; 36 | }; 37 | 38 | static_assert(std::is_standard_layout::value, "AllocationParams is not standard layout type"); 39 | 40 | } // namespace aub_stream 41 | -------------------------------------------------------------------------------- /aub_mem_dump/page_table_walker.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include "aub_mem_dump/page_table.h" 11 | #include "aubstream/page_info.h" 12 | #include "aubstream/allocation_params.h" 13 | 14 | namespace aub_stream { 15 | 16 | struct PageEntryInfo { 17 | uint64_t physicalAddress; 18 | uint64_t tableEntry; 19 | }; 20 | 21 | class PageTableWalker { 22 | public: 23 | enum class WalkMode { 24 | Reserve, 25 | Clone, 26 | Expect 27 | }; 28 | 29 | std::vector entries; 30 | std::vector pageWalkEntries[5]; 31 | std::vector pages64KB; 32 | 33 | void walkMemory(GGTT *pageTable, uint64_t gfxAddress, size_t size, uint32_t memoryBanks, size_t pageSize, WalkMode mode, const std::vector *pageInfos); 34 | void walkMemory(PageTable *pageTable, const AllocationParams &allocationParams, WalkMode mode, const std::vector *pageInfos); 35 | void walkMemory(PageTable *pageTable, const AllocationParams &allocationParams, WalkMode mode, const std::vector *pageInfos, uint64_t physicalAddress); 36 | }; 37 | 38 | } // namespace aub_stream 39 | -------------------------------------------------------------------------------- /aub_mem_dump/settings_reader.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "settings_reader.h" 9 | 10 | namespace aub_stream { 11 | 12 | int32_t EnvironmentReader::getSetting(const char *settingName, int32_t defaultValue) { 13 | return static_cast(getSetting(settingName, static_cast(defaultValue))); 14 | } 15 | 16 | int64_t EnvironmentReader::getSetting(const char *settingName, int64_t defaultValue) { 17 | int64_t value = defaultValue; 18 | char *envValue; 19 | 20 | envValue = os_calls::getEnv(settingName); 21 | if (envValue) { 22 | value = atoll(envValue); 23 | } 24 | return value; 25 | } 26 | 27 | bool EnvironmentReader::getSetting(const char *settingName, bool defaultValue) { 28 | return getSetting(settingName, static_cast(defaultValue)) ? true : false; 29 | } 30 | 31 | std::string EnvironmentReader::getSetting(const char *settingName, const std::string &value) { 32 | char *envValue; 33 | std::string keyValue; 34 | keyValue.assign(value); 35 | 36 | envValue = os_calls::getEnv(settingName); 37 | if (envValue) { 38 | keyValue.assign(envValue); 39 | } 40 | return keyValue; 41 | } 42 | 43 | } // namespace aub_stream 44 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpc_core/command_streamer_xe_hpc_core_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "tests/unit_tests/command_stream_helper_tests.h" 11 | 12 | #include "test_defaults.h" 13 | #include "gtest/gtest.h" 14 | 15 | #include "test.h" 16 | 17 | using namespace aub_stream; 18 | using ::testing::_; 19 | using ::testing::Return; 20 | 21 | struct XeHPCCoreMatcher { 22 | static bool isXeHpcCore(const aub_stream::Gpu *gpu) { 23 | return gpu->gfxCoreFamily == aub_stream::CoreFamily::XeHpcCore; 24 | } 25 | }; 26 | 27 | using XeHpcCoreCsTest = CommandStreamerHelperTest; 28 | HWTEST_F(XeHpcCoreCsTest, GivenCcsEngineWhenInitializingEngineThenMiModeNestedBBIsSetToZero, XeHPCCoreMatcher::isXeHpcCore) { 29 | auto &ccs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_CCS); 30 | 31 | PhysicalAddressAllocatorSimple allocator; 32 | PML4 pageTable(*gpu, &allocator, defaultMemoryBank); 33 | 34 | EXPECT_CALL(stream, writeMMIO(_, _)).WillRepeatedly(Return()); 35 | EXPECT_CALL(stream, writeMMIO(ccs.mmioEngine + 0x0209c, 0x10000000)).Times(1); 36 | ccs.initializeEngineMMIO(stream); 37 | } 38 | -------------------------------------------------------------------------------- /tests/unit_tests/hardware_context_tests.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aub_mem_dump/physical_address_allocator.h" 11 | #include "test_defaults.h" 12 | #include "tests/unit_tests/mock_aub_manager.h" 13 | #include "tests/unit_tests/mock_aub_stream.h" 14 | 15 | #include 16 | 17 | namespace aub_stream { 18 | 19 | class HardwareContextFixture : public MockAubStreamFixture { 20 | public: 21 | void SetUp() { 22 | MockAubStreamFixture::SetUp(); 23 | aubManager = std::make_unique<::testing::NiceMock>(createGpuFunc(), 1, defaultHBMSizePerDevice, 0u, true, mode::aubFile); 24 | } 25 | 26 | void TearDown() { 27 | MockAubStreamFixture::TearDown(); 28 | } 29 | 30 | PhysicalAddressAllocatorSimple allocator; 31 | std::unique_ptr<::testing::NiceMock> aubManager; 32 | }; 33 | 34 | class HardwareContextTest : public HardwareContextFixture, public ::testing::Test { 35 | public: 36 | void SetUp() override { 37 | HardwareContextFixture::SetUp(); 38 | } 39 | 40 | void TearDown() override { 41 | HardwareContextFixture::TearDown(); 42 | } 43 | }; 44 | } // namespace aub_stream 45 | -------------------------------------------------------------------------------- /aub_mem_dump/family_mapper.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "gfx_core_family.h" 10 | #include "aubstream/engine_node.h" 11 | #include 12 | #include 13 | #include 14 | 15 | namespace aub_stream { 16 | 17 | struct CommandStreamerHelper; 18 | struct Gpu; 19 | enum class ProductFamily : uint32_t; 20 | 21 | // Table of HW family specific Gpus 22 | extern std::unique_ptr()>>> productFamilyTable; 23 | 24 | // Helper method to access a productFamily Gpu 25 | template 26 | std::function()> enableGpu(); 27 | 28 | // Helper to register product families 29 | template 30 | struct RegisterFamily { 31 | RegisterFamily() { 32 | auto createGpuFunc = enableGpu(); 33 | if (!productFamilyTable) { 34 | productFamilyTable = std::make_unique()>>>(); 35 | } 36 | (*productFamilyTable.get())[productFamily] = std::move(createGpuFunc); 37 | } 38 | }; 39 | 40 | // Main accessor to get a Gpu 41 | std::function()> getGpu(ProductFamily productFamily); 42 | } // namespace aub_stream 43 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/dg2/command_streamer_helper_xe_hpg_core_dg2.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/xe_hpg_core/command_streamer_helper_xe_hpg_core.h" 9 | 10 | #include "aubstream/product_family.h" 11 | namespace aub_stream { 12 | 13 | struct GpuDg2 : public GpuXeHpgCore { 14 | GpuDg2() { 15 | productFamily = ProductFamily::Dg2; 16 | gfxCoreFamily = CoreFamily::XeHpgCore; 17 | productAbbreviation = "dg2"; 18 | deviceId = 0x24; 19 | deviceCount = GpuXeHpgCore::numSupportedDevices; 20 | } 21 | 22 | const std::vector getSupportedEngines() const override { 23 | static constexpr std::array engines = {{ENGINE_RCS, ENGINE_BCS, 24 | ENGINE_CCS, ENGINE_CCS1, ENGINE_CCS2, ENGINE_CCS3}}; 25 | return std::vector(engines.begin(), engines.end()); 26 | } 27 | 28 | uint64_t getPPGTTExtraEntryBits(const AllocationParams::AdditionalParams &allocationParams) const override { 29 | return toBitValue(PpgttEntryBits::atomicEnableBit); 30 | } 31 | }; 32 | 33 | template <> 34 | std::function()> enableGpu() { 35 | return std::make_unique; 36 | } 37 | } // namespace aub_stream 38 | -------------------------------------------------------------------------------- /tests/unit_tests/page_table_helper.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/page_table.h" 10 | #include "gtest/gtest.h" 11 | 12 | #include 13 | 14 | struct PageTableHelper { 15 | static inline uint64_t getEntry(aub_stream::PageTable *ppgtt, uint64_t gfxAddress) { 16 | aub_stream::PageTable *pageTable = ppgtt->getChild(ppgtt->getIndex(gfxAddress)); 17 | 18 | auto levels = ppgtt->getNumLevels() - 1; 19 | while (levels-- > 0) { 20 | EXPECT_NE(nullptr, pageTable); 21 | pageTable = pageTable->getChild(pageTable->getIndex(gfxAddress)); 22 | } 23 | 24 | if (pageTable) { 25 | return pageTable->getPhysicalAddress(); 26 | } 27 | return 0; 28 | } 29 | 30 | static inline uint64_t getPTEEntry(aub_stream::PageTable *ppgtt, uint64_t gfxAddress) { 31 | aub_stream::PageTable *pageTable = ppgtt; 32 | 33 | auto levels = ppgtt->getNumLevels() - 1; 34 | while (levels > 0) { 35 | EXPECT_NE(nullptr, pageTable); 36 | pageTable = pageTable->getChild(pageTable->getIndex(gfxAddress)); 37 | levels--; 38 | } 39 | 40 | if (pageTable) { 41 | return pageTable->getEntryValue(); 42 | } 43 | return 0; 44 | } 45 | }; 46 | -------------------------------------------------------------------------------- /tests/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2024 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | #Disable compiler warnings related to googletest and TR1 deprecation 8 | set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -D_SILENCE_TR1_NAMESPACE_DEPRECATION_WARNING") 9 | 10 | if(WIN32) 11 | add_library(Ws2_32_stub SHARED ${CMAKE_CURRENT_SOURCE_DIR}/socket_stub.cpp) 12 | else() 13 | add_library(socket_stubs STATIC ${CMAKE_CURRENT_SOURCE_DIR}/socket_stub.cpp) 14 | endif() 15 | 16 | add_subdirectory(test_traits) 17 | 18 | get_property(TEST_TRAITS_SOURCES GLOBAL PROPERTY TEST_TRAITS_SOURCES_property) 19 | 20 | set(SOURCES 21 | ${SOURCES} 22 | ${TEST_TRAITS_SOURCES} 23 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 24 | ${CMAKE_CURRENT_SOURCE_DIR}/main.cpp 25 | ${CMAKE_CURRENT_SOURCE_DIR}/simple_batch_buffer.cpp 26 | ${CMAKE_CURRENT_SOURCE_DIR}/simple_batch_buffer.h 27 | ${CMAKE_CURRENT_SOURCE_DIR}/test_defaults.cpp 28 | ${CMAKE_CURRENT_SOURCE_DIR}/test_defaults.h 29 | ${CMAKE_CURRENT_SOURCE_DIR}/variable_backup.h 30 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_os_calls.cpp 31 | ) 32 | 33 | include_directories(${CMAKE_CURRENT_SOURCE_DIR}) 34 | include_directories(BEFORE $) 35 | 36 | link_libraries( 37 | ${PROJECT_NAME} 38 | ${PROJECT_NAME}_all_hw 39 | gmock 40 | ) 41 | 42 | add_subdirectory(aub_tests) 43 | add_subdirectory(tbx_tests) 44 | add_subdirectory(unit_tests) 45 | -------------------------------------------------------------------------------- /tests/test_traits/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | set(TEST_TRAITS_SOURCES 8 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 9 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits.cpp 10 | ${CMAKE_CURRENT_SOURCE_DIR}/test_traits.h 11 | ) 12 | 13 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_SOURCES_property "${TEST_TRAITS_SOURCES}") 14 | 15 | set(AUBCONFIG_PATH "${AUB_STREAM_DIR}/../aub_configs/CMakeLists.txt") 16 | if(EXISTS ${AUBCONFIG_PATH}) 17 | include(${AUBCONFIG_PATH}) 18 | else() 19 | message(WARNING "aub_configs NOT FOUND. Using 1x2x3 as default config.") 20 | set(DEFAULT_CONFIG 0x100020003) 21 | endif() 22 | 23 | function(GENERATE_CONFIG Product) 24 | if(DEFINED ${Product}_CONFIG_HEX) 25 | set(VALUE "${${Product}_CONFIG_HEX}") 26 | else() 27 | if(DEFINED DEFAULT_CONFIG) 28 | set(VALUE "${DEFAULT_CONFIG}") 29 | else() 30 | message(FATAL_ERROR "${Product} config not defined in aub_configs") 31 | endif() 32 | endif() 33 | 34 | get_property(HasProperty GLOBAL PROPERTY TEST_TRAITS_MACROS_property) 35 | string(FIND "${HasProperty}" "${Product}_CONFIG" ConfigFound) 36 | 37 | if(ConfigFound EQUAL -1) 38 | set_property(GLOBAL APPEND PROPERTY TEST_TRAITS_MACROS_property "${Product}_CONFIG=${VALUE}") 39 | endif() 40 | endfunction() 41 | 42 | subdirlist(SUBDIRS ${CMAKE_CURRENT_SOURCE_DIR} "*") 43 | 44 | foreach(subdir ${SUBDIRS}) 45 | add_subdirectory(${subdir}) 46 | endforeach() 47 | -------------------------------------------------------------------------------- /aub_mem_dump/options.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/aub_stream.h" 9 | #include "aub_mem_dump/options.h" 10 | #include 11 | #include 12 | 13 | struct Buffer : public std::streambuf { 14 | int overflow(int c) override { 15 | return c; 16 | } 17 | }; 18 | static Buffer logBuffer; 19 | static std::ostream logNull(&logBuffer); 20 | 21 | namespace aub_stream { 22 | std::ostream &log = logNull; 23 | std::string tbxServerIp = "127.0.0.1"; 24 | uint16_t tbxServerPort = 4321; 25 | bool tbxFrontdoorMode = false; 26 | MMIOList MMIOListInjected; 27 | uint32_t aubStreamCaller = std::numeric_limits::max(); 28 | 29 | extern "C" { 30 | void injectMMIOListLegacy(MMIOList mmioList) { 31 | injectMMIOList(mmioList); 32 | } 33 | 34 | void injectMMIOList(MMIOList mmioList) { 35 | MMIOListInjected = mmioList; 36 | MMIOListInjected.shrink_to_fit(); 37 | } 38 | 39 | void setTbxServerPort(uint16_t port) { 40 | tbxServerPort = port; 41 | } 42 | 43 | void setTbxServerIpLegacy(std::string server) { 44 | setTbxServerIp(server); 45 | } 46 | 47 | void setTbxServerIp(std::string server) { 48 | tbxServerIp = server; 49 | tbxServerIp.shrink_to_fit(); 50 | } 51 | 52 | void setTbxFrontdoorMode(bool frontdoor) { 53 | tbxFrontdoorMode = frontdoor; 54 | } 55 | 56 | void setAubStreamCaller(uint32_t caller) { 57 | aubStreamCaller = caller; 58 | } 59 | } 60 | } // namespace aub_stream 61 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3_core/hardware_context_xe3_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/memory_banks.h" 9 | #include "aub_mem_dump/page_table.h" 10 | #include "aub_mem_dump/hardware_context_imp.h" 11 | #include "tests/unit_tests/mock_aub_stream.h" 12 | #include "tests/unit_tests/hardware_context_tests.h" 13 | #include "aub_mem_dump/command_streamer_helper.h" 14 | #include "test_defaults.h" 15 | 16 | #include "test.h" 17 | 18 | using namespace aub_stream; 19 | using ::testing::_; 20 | 21 | TEST_F(HardwareContextTest, givenContextWhenSubmittingThenSQSubmissionIsUsed) { 22 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::Xe3Core); 23 | 24 | PhysicalAddressAllocatorSimple allocator; 25 | GGTT ggtt(*gpu, &allocator, defaultMemoryBank); 26 | PML4 ppgtt(*gpu, &allocator, defaultMemoryBank); 27 | auto &csHelper = gpu->getCommandStreamerHelper(defaultDevice, defaultEngine); 28 | 29 | HardwareContextImp context0(0, stream, csHelper, ggtt, ppgtt, 0); 30 | context0.initialize(); 31 | 32 | ::testing::Mock::VerifyAndClearExpectations(&stream); 33 | 34 | for (int i = 0; i < 8; i++) { 35 | EXPECT_CALL(stream, writeMMIO(csHelper.mmioEngine + 0x2510 + (i * 8), _)).Times(1); 36 | EXPECT_CALL(stream, writeMMIO(csHelper.mmioEngine + 0x2514 + (i * 8), _)).Times(1); 37 | } 38 | EXPECT_CALL(stream, writeMMIO(csHelper.mmioEngine + 0x2550, 1)).Times(1); 39 | 40 | context0.submitBatchBuffer(0x100, false); 41 | } 42 | -------------------------------------------------------------------------------- /tests/unit_tests/test_misc_helpers.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gtest/gtest.h" 9 | #include "aub_mem_dump/misc_helpers.h" 10 | 11 | using namespace aub_stream; 12 | 13 | TEST(MiscHelpers, countBitsMustCalcCorrectValues) { 14 | EXPECT_EQ(1, countBits(1 << 1)); 15 | EXPECT_EQ(1, countBits(1 << 5)); 16 | EXPECT_EQ(1, countBits(1 << 14)); 17 | EXPECT_EQ(2, countBits(1 << 3 | 1 << 13)); 18 | EXPECT_EQ(2, countBits(1 << 2 | 1 << 11)); 19 | EXPECT_EQ(2, countBits(1 << 2 | 1 << 4)); 20 | EXPECT_EQ(2, countBits(1 << 2 | 1 << 3)); 21 | EXPECT_EQ(2, countBits(1 << 12 | 1 << 13)); 22 | EXPECT_EQ(3, countBits(1 | 1 << 5 | 1 << 12)); 23 | EXPECT_EQ(3, countBits(1 << 2 | 1 << 4 | 1 << 15)); 24 | EXPECT_EQ(3, countBits(1 << 3 | 1 << 9 | 1 << 10)); 25 | EXPECT_EQ(5, countBits(1 << 1 | 1 << 5 | 1 << 13 | 1 << 14 | 1 << 15)); 26 | EXPECT_EQ(5, countBits(1 << 1 | 1 << 5 | 1 << 13 | 1 << 14 | 1 << 15)); 27 | EXPECT_EQ(5, countBits(1 << 0 | 1 << 3 | 1 << 8 | 1 << 11 | 1 << 13)); 28 | EXPECT_EQ(8, countBits(0xff)); 29 | EXPECT_EQ(8, countBits(0xff00)); 30 | EXPECT_EQ(8, countBits(0x0ff0)); 31 | EXPECT_EQ(8, countBits(0xf00f)); 32 | EXPECT_EQ(8, countBits(0x0f0f)); 33 | EXPECT_EQ(8, countBits(0xf0f0)); 34 | EXPECT_EQ(8, countBits(0xcccc)); 35 | EXPECT_EQ(8, countBits(0x3333)); 36 | EXPECT_EQ(8, countBits(0xaaaa)); 37 | EXPECT_EQ(12, countBits(0xff0f)); 38 | EXPECT_EQ(16, countBits(0xffff)); 39 | } 40 | -------------------------------------------------------------------------------- /aub_mem_dump/tbx_sockets.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | class TbxSockets { 15 | protected: 16 | TbxSockets() = default; 17 | 18 | public: 19 | virtual ~TbxSockets() = default; 20 | virtual bool init(const std::string &hostNameOrIp, uint16_t port, bool frontdoor) = 0; 21 | virtual void close() = 0; 22 | virtual bool stillConnected() = 0; 23 | 24 | virtual bool writeGTT(uint32_t offset, uint64_t entry) = 0; 25 | 26 | virtual bool readMemory(uint64_t addr, void *memory, size_t size, bool isLocalMemory) = 0; 27 | virtual bool writeMemory(uint64_t addr, const void *memory, size_t size, bool isLocalMemory) = 0; 28 | 29 | virtual bool readMemoryExt(uint64_t offset, void *data, size_t size, bool isLocalMem) = 0; 30 | virtual bool writeMemoryExt(uint64_t offset, const void *data, size_t size, bool isLocalMem) = 0; 31 | 32 | virtual bool readMMIO(uint32_t offset, uint32_t *value) = 0; 33 | virtual bool writeMMIO(uint32_t offset, uint32_t value) = 0; 34 | 35 | virtual bool readPCICFG(uint32_t bus, uint32_t device, uint32_t function, uint32_t offset, uint32_t *value) = 0; 36 | virtual bool writePCICFG(uint32_t bus, uint32_t device, uint32_t function, uint32_t offset, uint32_t value) = 0; 37 | 38 | virtual void enableThrowOnError(bool enabled) = 0; 39 | 40 | static TbxSockets *create(); 41 | }; 42 | 43 | } // namespace aub_stream 44 | -------------------------------------------------------------------------------- /tests/test_defaults.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include 11 | #include 12 | #include "gfx_core_family.h" 13 | #include "aubstream/product_family.h" 14 | #include "aub_mem_dump/gpu.h" 15 | #include 16 | #include 17 | 18 | namespace aub_stream { 19 | struct TestTraits; 20 | 21 | constexpr uint64_t maxNBitValue(uint32_t N) { 22 | return (1ull << N) - 1; 23 | } 24 | 25 | constexpr uint64_t gpuAddressSpace48 = maxNBitValue(48); 26 | 27 | extern std::unique_ptr gpu; 28 | extern std::function()> createGpuFunc; 29 | 30 | extern uint32_t defaultDevice; 31 | extern uint32_t defaultStepping; 32 | extern uint32_t defaultDeviceCount; 33 | extern size_t defaultPageSize; 34 | extern size_t defaultHBMSizePerDevice; 35 | extern uint32_t defaultMemoryBank; 36 | extern uint32_t systemMemoryBank; 37 | extern EngineType defaultEngine; 38 | extern const bool localMemorySupportedInTests; 39 | 40 | extern std::string folderAUB; 41 | extern std::string fileSeparator; 42 | 43 | struct AubFileStream; 44 | std::string getAubConfigWithTile(const TestTraits *traits, const GpuDescriptor &desc); 45 | std::string getAubConfigWithoutTile(const TestTraits *traits, const GpuDescriptor &desc); 46 | std::string getAubFileName(const GpuDescriptor &desc); 47 | 48 | bool initializeAubStream(AubFileStream &stream); 49 | bool initializeAubStream(AubFileStream &stream, 50 | const GpuDescriptor &desc); 51 | 52 | } // namespace aub_stream 53 | -------------------------------------------------------------------------------- /tests/unit_tests/test_align_helpers.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gtest/gtest.h" 9 | #include "aub_mem_dump/align_helpers.h" 10 | 11 | using namespace aub_stream; 12 | 13 | TEST(AlignHelpers, alignUpMustDoCorrectCalculations) { 14 | EXPECT_EQ(alignUp(1, 5), 0x20); 15 | EXPECT_EQ(alignUp(1, 10), 0x400); 16 | EXPECT_EQ(alignUp(1, 20), 0x100000); 17 | EXPECT_EQ(alignUp(1, 30), 0x40000000); 18 | EXPECT_EQ(alignUp(0x20, 5), 0x20); 19 | EXPECT_EQ(alignUp(0x400, 10), 0x400); 20 | EXPECT_EQ(alignUp(0x100000, 20), 0x100000); 21 | EXPECT_EQ(alignUp(0x40000000, 30), 0x40000000); 22 | EXPECT_EQ(alignUp(0x21, 5), 0x40); 23 | EXPECT_EQ(alignUp(0x401, 10), 0x800); 24 | EXPECT_EQ(alignUp(0x100001, 20), 0x200000); 25 | EXPECT_EQ(alignUp(0x40000001, 30), 0x80000000); 26 | } 27 | 28 | TEST(AlignHelpers, alignDownMustDoCorrectCalculations) { 29 | EXPECT_EQ(alignDown(0x1, 30), 0); 30 | EXPECT_EQ(alignDown(0x10, 30), 0); 31 | EXPECT_EQ(alignDown(0x100, 30), 0); 32 | EXPECT_EQ(alignDown(0x1000, 30), 0); 33 | EXPECT_EQ(alignDown(0x80000000, 30), 0x80000000); 34 | EXPECT_EQ(alignDown(0x80000001, 30), 0x80000000); 35 | EXPECT_EQ(alignDown(0x80000500, 30), 0x80000000); 36 | EXPECT_EQ(alignDown(0x80400000, 30), 0x80000000); 37 | EXPECT_EQ(alignDown(0x86000000, 30), 0x80000000); 38 | EXPECT_EQ(alignDown(0xf6000000, 30), 0xc0000000); 39 | EXPECT_EQ(alignDown(0xf6000000, 31), 0x80000000); 40 | EXPECT_EQ(alignDown(0x80000000, 31), 0x80000000); 41 | } 42 | -------------------------------------------------------------------------------- /tests/socket_stub.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | typedef int SOCKET; 9 | typedef struct sockaddr SOCKADDR; 10 | typedef int LPWSADATA; 11 | typedef struct addrinfo ADDRINFO; 12 | 13 | #ifdef _WIN32 14 | #define EXPORT __declspec(dllexport) 15 | #else 16 | #define EXPORT 17 | #endif 18 | 19 | #ifdef __cplusplus 20 | extern "C" { 21 | #endif 22 | 23 | EXPORT int closesocket(SOCKET s) { return 0; } 24 | EXPORT int close(SOCKET s) { return 0; } 25 | EXPORT int connect(SOCKET s, const struct sockaddr *name, int namelen) { return 0; } 26 | EXPORT unsigned short htons(unsigned short hostlong) { return 0; } 27 | EXPORT unsigned long inet_addr(const char *cp) { return 0; } 28 | EXPORT int recv(SOCKET s, char *buf, int len, int flags) { return 0; } 29 | EXPORT int send(SOCKET s, const char *buf, int len, int flags) { return len; } 30 | EXPORT int shutdown(SOCKET s, int how) { return 0; } 31 | EXPORT SOCKET socket(int af, int type, int protocol) { return 0; } 32 | EXPORT struct hostent *gethostbyname(const char *name) { 33 | return nullptr; 34 | } 35 | EXPORT int WSAStartup(int wVersionRequired, LPWSADATA lpWSAData) { return 0; } 36 | EXPORT int WSACleanup(void) { return 0; } 37 | EXPORT void WSASetLastError(int iError) { return; } 38 | EXPORT int WSAGetLastError(void) { return 0; } 39 | 40 | EXPORT int getaddrinfo(const char *name, const char *service, const ADDRINFO *hint, ADDRINFO **results) { 41 | *results = nullptr; 42 | return 0; 43 | } 44 | EXPORT void freeaddrinfo(ADDRINFO *info) { return; } 45 | 46 | #ifdef __cplusplus 47 | } 48 | #endif 49 | -------------------------------------------------------------------------------- /aub_mem_dump/memory_bank_helper.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | #include 12 | 13 | namespace aub_stream { 14 | 15 | class MemoryBankHelper { 16 | public: 17 | const uint32_t memoryBanks; 18 | const uint64_t initialGfxAddress = 0; 19 | const size_t size = 0; 20 | size_t colorSize = 1; 21 | uint32_t numberOfBanks = 0; 22 | std::vector singleBanks; 23 | 24 | MemoryBankHelper(uint32_t memoryBanksIn, uint64_t initialGfxAddress, size_t size) : memoryBanks(memoryBanksIn), initialGfxAddress(initialGfxAddress), size(size) { 25 | uint32_t mask = 1; 26 | do { 27 | if (mask & memoryBanks) { 28 | singleBanks.push_back(mask); 29 | } 30 | mask <<= 1; 31 | } while (mask <= memoryBanks); 32 | 33 | numberOfBanks = uint32_t(singleBanks.size()); 34 | // split memory evenly to banks 35 | if (numberOfBanks > 0) { 36 | colorSize = size / numberOfBanks; 37 | } 38 | } 39 | uint32_t getMemoryBank(uint64_t gfxAddress) { 40 | if (numberOfBanks == 0) { 41 | return 0; 42 | } else if (numberOfBanks == 1) { 43 | return singleBanks[0]; 44 | } 45 | 46 | assert(gfxAddress >= initialGfxAddress); 47 | 48 | uint64_t diff = gfxAddress - initialGfxAddress; 49 | auto bank = singleBanks[(diff / colorSize) % numberOfBanks]; 50 | return bank; 51 | } 52 | }; 53 | 54 | } // namespace aub_stream 55 | -------------------------------------------------------------------------------- /aub_mem_dump/null_hardware_context.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aubstream/hardware_context.h" 10 | 11 | namespace aub_stream { 12 | 13 | struct NullHardwareContext : public HardwareContext { 14 | void initialize() override {} 15 | void pollForCompletion() override {} 16 | void writeAndSubmitBatchBuffer(uint64_t gfxAddress, const void *batchBuffer, size_t size, uint32_t memoryBanks, size_t pageSize) override {} 17 | void writeMemory(uint64_t gfxAddress, const void *memory, size_t size, uint32_t memoryBanks, int hint, size_t pageSize) override {} 18 | void freeMemory(uint64_t gfxAddress, size_t size) override {} 19 | void expectMemory(uint64_t gfxAddress, const void *memory, size_t size, uint32_t compareOperation) override {} 20 | void readMemory(uint64_t gfxAddress, void *memory, size_t size, uint32_t memoryBanks, size_t pageSize) override {} 21 | void readGttMemory(uint64_t gfxAddress, void *memory, size_t size, uint32_t memoryBanks, size_t pageSize); 22 | void dumpBufferBIN(uint64_t gfxAddress, size_t size) override {} 23 | void dumpSurface(const SurfaceInfo &surfaceInfo) override {} 24 | void submitBatchBuffer(uint64_t gfxAddress, bool overrideRingHead) override {} 25 | void writeMemory2(AllocationParams allocationParams) override {} 26 | void writeMMIO(uint32_t offset, uint32_t value) override {} 27 | void pollForFenceCompletion() override {} 28 | uint32_t getCurrentFence(void) override { return 0; } 29 | uint32_t getExpectedFence(void) override { return 0; } 30 | }; 31 | 32 | } // namespace aub_stream 33 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/hardware_context_xe_hpg_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/memory_banks.h" 10 | #include "aub_mem_dump/page_table.h" 11 | #include "aub_mem_dump/hardware_context_imp.h" 12 | #include "aub_mem_dump/settings.h" 13 | #include "tests/variable_backup.h" 14 | #include "tests/unit_tests/mock_aub_stream.h" 15 | #include "tests/unit_tests/hardware_context_tests.h" 16 | #include "test_defaults.h" 17 | 18 | #include "test.h" 19 | 20 | using namespace aub_stream; 21 | using ::testing::_; 22 | 23 | TEST_F(HardwareContextTest, givenExeclistSubmitPortSubmissionEnabledWhenSubmittingThenUseExeclistPortSubmission) { 24 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::XeHpgCore); 25 | 26 | auto settings = std::make_unique(); 27 | VariableBackup backup(&globalSettings); 28 | globalSettings = settings.get(); 29 | globalSettings->ExeclistSubmitPortSubmission.set(1); 30 | 31 | PhysicalAddressAllocatorSimple allocator; 32 | GGTT ggtt(*gpu, &allocator, defaultMemoryBank); 33 | PML4 ppgtt(*gpu, &allocator, defaultMemoryBank); 34 | auto &csHelper = gpu->getCommandStreamerHelper(defaultDevice, defaultEngine); 35 | 36 | HardwareContextImp context0(0, stream, csHelper, ggtt, ppgtt, nullptr, 0); 37 | context0.initialize(); 38 | 39 | ::testing::Mock::VerifyAndClearExpectations(&stream); 40 | 41 | EXPECT_CALL(stream, writeMMIO(csHelper.mmioEngine + 0x2230, _)).Times(16); 42 | EXPECT_CALL(stream, writeMMIO(csHelper.mmioEngine + 0x2550, 1)).Times(1); 43 | 44 | context0.submitBatchBuffer(0x100, false); 45 | } 46 | -------------------------------------------------------------------------------- /tests/unit_tests/tbx_socket_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/tbx_sockets_imp.h" 9 | #include "mock_tbx_socket.h" 10 | #include "gmock/gmock.h" 11 | 12 | using namespace aub_stream; 13 | using ::testing::_; 14 | 15 | TEST(TbxSocketsTest, givenTbxServerInFrontdoorModeWhenCheckServerConfigIsCalledThenReadPCICFGForLMEMBAR) { 16 | MockTbxSocketsImp tbxSocket; 17 | bool frontdoorMode = true; 18 | 19 | EXPECT_CALL(tbxSocket, readPCICFG(0, 2, 0, 0x18, _)).Times(1); 20 | EXPECT_CALL(tbxSocket, readPCICFG(0, 2, 0, 0x1C, _)).Times(1); 21 | 22 | tbxSocket.checkServerConfig(frontdoorMode); 23 | EXPECT_TRUE(tbxSocket.frontdoorMode); 24 | } 25 | 26 | TEST(TbxSocketsTest, givenTbxServerInFrontdoorModeWhenReadOrWriteMemoryIsCalledThenRedirectToReadOrWriteMemoryExtWithLMEMBAR) { 27 | MockTbxSocketsImp tbxSocket; 28 | tbxSocket.frontdoorMode = true; 29 | 30 | EXPECT_CALL(tbxSocket, readMemoryExt(_, _, _, true)).Times(1); 31 | EXPECT_CALL(tbxSocket, writeMemoryExt(_, _, _, true)).Times(1); 32 | 33 | tbxSocket.readMemory(0, nullptr, 0, true); 34 | tbxSocket.writeMemory(0, nullptr, 0, true); 35 | } 36 | 37 | TEST(TbxSocketsTest, givenTbxSocketInErrorStateWhenReadMMIOIsCalledThenReturnEarly) { 38 | MockTbxSocketsImp tbxSocket; 39 | tbxSocket.inErrorState = true; 40 | EXPECT_CALL(tbxSocket, readMMIO(_, _)).Times(1).WillOnce([&](uint32_t offset, uint32_t *data) { 41 | return tbxSocket.TbxSocketsImp::readMMIO(offset, data); 42 | }); 43 | 44 | EXPECT_CALL(tbxSocket, sendWriteData(_, _)).Times(0); 45 | EXPECT_CALL(tbxSocket, getResponseData(_, _)).Times(0); 46 | 47 | EXPECT_FALSE(tbxSocket.readMMIO(0, nullptr)); 48 | } 49 | -------------------------------------------------------------------------------- /include/aubstream/hardware_context.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | struct AllocationParams; 15 | struct SurfaceInfo; 16 | 17 | struct CompareOperationValues { 18 | enum { CompareNotEqual = 1, 19 | CompareEqual = 0 }; 20 | }; 21 | 22 | struct HardwareContext { 23 | virtual void initialize() = 0; 24 | virtual void pollForCompletion() = 0; 25 | virtual void writeAndSubmitBatchBuffer(uint64_t gfxAddress, const void *batchBuffer, size_t size, uint32_t memoryBanks, size_t pageSize) = 0; 26 | virtual void submitBatchBuffer(uint64_t gfxAddress, bool overrideRingHead) = 0; 27 | virtual void writeMemory(uint64_t gfxAddress, const void *memory, size_t size, uint32_t memoryBanks, int hint, size_t pageSize) = 0; 28 | virtual void freeMemory(uint64_t gfxAddress, size_t size) = 0; 29 | virtual void expectMemory(uint64_t gfxAddress, const void *memory, size_t size, uint32_t compareOperation) = 0; 30 | virtual void readMemory(uint64_t gfxAddress, void *memory, size_t size, uint32_t memoryBanks, size_t pageSize) = 0; 31 | virtual void dumpBufferBIN(uint64_t gfxAddress, size_t size) = 0; 32 | virtual void dumpSurface(const SurfaceInfo &surfaceInfo) = 0; 33 | virtual ~HardwareContext() = default; 34 | virtual void writeMemory2(AllocationParams allocationParams) = 0; 35 | virtual void writeMMIO(uint32_t offset, uint32_t value) = 0; 36 | virtual void pollForFenceCompletion() = 0; 37 | virtual void release(){}; 38 | virtual uint32_t getCurrentFence() { return 0; }; 39 | virtual uint32_t getExpectedFence() { return 0; }; 40 | }; 41 | 42 | } // namespace aub_stream 43 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpc_core/command_streamer_helper_xe_hpc_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/xe_core/command_streamer_helper_xe_core.h" 10 | 11 | namespace aub_stream { 12 | 13 | template 14 | struct CommandStreamerHelperXeHpcCore : public CommandStreamerHelperXeCore { 15 | using CommandStreamerHelperXeCore::CommandStreamerHelperXeCore; 16 | 17 | const MMIOList getEngineMMIO() const override; 18 | 19 | using Helper::mmioDevice; 20 | using Helper::mmioEngine; 21 | }; 22 | 23 | struct GpuXeHpcCore : public GpuXeCore { 24 | GpuXeHpcCore(); 25 | static const uint32_t numSupportedDevices = 4; 26 | static constexpr uint64_t patIndexBit0 = toBitValue(3); 27 | static constexpr uint64_t patIndexBit1 = toBitValue(4); 28 | static constexpr uint64_t patIndex0 = 0; // 0b0000 29 | static constexpr uint64_t patIndex3 = patIndexBit0 | patIndexBit1; // 0b0011 30 | 31 | CommandStreamerHelper &getCommandStreamerHelper(uint32_t device, EngineType engineType) const override; 32 | const std::vector getSupportedEngines() const override; 33 | 34 | static constexpr uint32_t getPatIndexMmioAddr(uint32_t index); 35 | 36 | const MMIOList getGlobalMMIO() const override; 37 | 38 | uint64_t getPPGTTExtraEntryBits(const AllocationParams::AdditionalParams &allocationParams) const override; 39 | 40 | PageTable *allocatePPGTT(PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gpuAddressSpace) const override; 41 | std::unique_ptr commandStreamerHelperTable[numSupportedDevices][EngineType::NUM_ENGINES]; 42 | }; 43 | 44 | } // namespace aub_stream 45 | -------------------------------------------------------------------------------- /tests/test_traits/test_traits.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include "aubstream/product_family.h" 11 | #include "aub_mem_dump/gpu.h" 12 | #include "tests/test_defaults.h" 13 | #include 14 | #include 15 | 16 | namespace aub_stream { 17 | 18 | struct TestTraits { 19 | TestTraits() = delete; 20 | 21 | TestTraits(uint32_t deviceSliceCount, uint32_t deviceSubSliceCount, uint32_t deviceEuPerSubSlice, const std::function &&func) 22 | : deviceSliceCount(deviceSliceCount), deviceSubSliceCount(deviceSubSliceCount), deviceEuPerSubSlice(deviceEuPerSubSlice), getAubConfig(func) {} 23 | 24 | uint32_t deviceSliceCount; 25 | uint32_t deviceSubSliceCount; 26 | uint32_t deviceEuPerSubSlice; 27 | std::function getAubConfig; 28 | }; 29 | 30 | extern const TestTraits *testTraits[static_cast(ProductFamily::MaxProduct)]; 31 | 32 | template 33 | struct EnableTestTraits { 34 | EnableTestTraits() = delete; 35 | 36 | EnableTestTraits(uint64_t config) { 37 | static TestTraits traits(static_cast((config >> 32) & 0xFFFF), 38 | static_cast((config >> 16) & 0xFFFF), 39 | static_cast(config & 0xFFFF), 40 | productFamily < ProductFamily::Bmg ? getAubConfigWithoutTile : getConfig); 41 | 42 | assert(!testTraits[static_cast(productFamily)]); 43 | 44 | testTraits[static_cast(productFamily)] = &traits; 45 | } 46 | }; 47 | 48 | } // namespace aub_stream 49 | -------------------------------------------------------------------------------- /tests/unit_tests/mock_gpu.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aub_mem_dump/command_streamer_helper.h" 11 | #include "aub_mem_dump/page_table.h" 12 | #include "gmock/gmock.h" 13 | 14 | namespace aub_stream { 15 | 16 | struct MockGpuBase : public Gpu { 17 | MOCK_CONST_METHOD4(initializeGlobalMMIO, void(AubStream &streamu, uint32_t devicesCount, uint64_t memoryBankSize, uint32_t stepping)); 18 | MOCK_CONST_METHOD2(isMemorySupported, bool(uint32_t memoryBanks, uint32_t alignment)); 19 | MOCK_CONST_METHOD1(isEngineSupported, bool(uint32_t engine)); 20 | MOCK_CONST_METHOD3(setMemoryBankSize, void(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize)); 21 | MOCK_CONST_METHOD3(setGGTTBaseAddresses, void(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize)); 22 | MOCK_CONST_METHOD2(getCommandStreamerHelper, CommandStreamerHelper &(uint32_t device, EngineType engineType)); 23 | MOCK_CONST_METHOD3(allocateGGTT, GGTT *(PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gttBaseAddress)); 24 | MOCK_CONST_METHOD3(allocatePPGTT, PageTable *(PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gpuAddressSpace)); 25 | MOCK_CONST_METHOD0(requireLocalMemoryForPageTables, bool()); 26 | MOCK_CONST_METHOD0(getGlobalMMIO, const MMIOList()); 27 | MOCK_CONST_METHOD0(getSupportedEngines, const std::vector()); 28 | MOCK_CONST_METHOD1(getGSMBaseAddress, uint64_t(uint32_t device)); 29 | }; 30 | 31 | using MockGpu = ::testing::NiceMock; 32 | 33 | struct MockGpuFixture { 34 | void SetUp() { 35 | } 36 | 37 | void TearDown() { 38 | } 39 | 40 | MockGpu gpu; 41 | }; 42 | 43 | } // namespace aub_stream 44 | -------------------------------------------------------------------------------- /aub_mem_dump/memory_banks.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | 12 | namespace aub_stream { 13 | 14 | static const uint32_t KB = 1024ul; 15 | static const uint32_t MB = 1024ul * KB; 16 | static const uint32_t GB = 1024ull * MB; 17 | 18 | enum MemoryBank : uint32_t { 19 | MEMORY_BANK_SYSTEM = 0, 20 | MEMORY_BANK_0 = 1, 21 | MEMORY_BANK_1 = 2, 22 | MEMORY_BANK_2 = 4, 23 | MEMORY_BANK_3 = 8, 24 | MEMORY_BANK_4 = 16, 25 | MEMORY_BANK_5 = 32, 26 | MEMORY_BANK_6 = 64, 27 | MEMORY_BANK_7 = 128, 28 | MEMORY_BANK_8 = 256, 29 | MEMORY_BANK_9 = 512, 30 | MEMORY_BANK_10 = 1024, 31 | MEMORY_BANK_11 = 2048, 32 | MEMORY_BANK_12 = 4096, 33 | MEMORY_BANK_13 = 8192, 34 | MEMORY_BANK_14 = 16384, 35 | MEMORY_BANK_15 = 32768, 36 | MEMORY_BANK_16 = 65536, 37 | MEMORY_BANK_17 = 131072, 38 | MEMORY_BANK_18 = 262144, 39 | MEMORY_BANK_19 = 524288, 40 | MEMORY_BANK_20 = 1048576, 41 | MEMORY_BANK_21 = 2097152, 42 | MEMORY_BANK_22 = 4194304, 43 | MEMORY_BANK_23 = 8388608, 44 | MEMORY_BANK_24 = 16777216, 45 | MEMORY_BANK_25 = 33554432, 46 | MEMORY_BANK_26 = 67108864, 47 | MEMORY_BANK_27 = 134217728, 48 | MEMORY_BANK_28 = 268435456, 49 | MEMORY_BANK_29 = 536870912, 50 | MEMORY_BANK_30 = 1073741824, 51 | MEMORY_BANK_31 = 2147483648, 52 | MEMORY_BANKS_ALL = 0xffffffff 53 | }; 54 | 55 | inline uint32_t MEMORY_BANK(uint32_t device) { 56 | return MEMORY_BANK_0 << device; 57 | } 58 | 59 | constexpr uint32_t toMemoryBankId(MemoryBank mb) { 60 | uint32_t id = 0; 61 | uint32_t bank = static_cast(mb); 62 | while (bank >>= 1) { 63 | id++; 64 | } 65 | return id; 66 | } 67 | 68 | std::string memoryBanksToString(uint32_t banks, const std::string &separator = ""); 69 | 70 | } // namespace aub_stream 71 | -------------------------------------------------------------------------------- /tests/unit_tests/gen12lp/dg1/command_stream_helper_tests_dg1.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | #include "aubstream/engine_node.h" 14 | 15 | #include "test_defaults.h" 16 | #include "tests/unit_tests/command_stream_helper_tests.h" 17 | #include "tests/unit_tests/mock_aub_stream.h" 18 | #include "test.h" 19 | 20 | #include 21 | 22 | using namespace aub_stream; 23 | 24 | TEST_F(CommandStreamerHelperTest, DG1MemoryAlignment4KB) { 25 | TEST_REQUIRES(gpu->productAbbreviation == "dg1"); 26 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 27 | auto pageSize = 4096u; 28 | 29 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 30 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 31 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 32 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 33 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 34 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 35 | } 36 | 37 | TEST_F(CommandStreamerHelperTest, DG1MemoryAlignment64KB) { 38 | TEST_REQUIRES(gpu->productAbbreviation == "dg1"); 39 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 40 | auto pageSize = 65536u; 41 | 42 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 43 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 44 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 45 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 46 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 47 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 48 | } 49 | -------------------------------------------------------------------------------- /tests/tbx_tests/tbx_stream_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gtest/gtest.h" 9 | #include "test_defaults.h" 10 | #include "aub_mem_dump/aub_manager_imp.h" 11 | #include "aub_mem_dump/family_mapper.h" 12 | #include "aub_mem_dump/tbx_stream.h" 13 | #include "aubstream/hardware_context.h" 14 | #include "aubstream/aubstream.h" 15 | #include "tests/simple_batch_buffer.h" 16 | 17 | using namespace aub_stream; 18 | struct TbxSimpleBatchBuffer : public ::testing::Test { 19 | TbxSimpleBatchBuffer() 20 | : desc(*gpu), 21 | mgr(nullptr), 22 | ctxt(nullptr) { 23 | } 24 | 25 | void SetUp() override; 26 | void TearDown() override; 27 | 28 | void initializeStream(const GpuDescriptor &desc); 29 | 30 | GpuDescriptor desc; 31 | AubManagerImp *mgr; 32 | HardwareContext *ctxt; 33 | }; 34 | 35 | void TbxSimpleBatchBuffer::initializeStream(const GpuDescriptor &desc) { 36 | auto gpu = createGpuFunc(); 37 | assert(!mgr); 38 | AubManagerOptions internal_options; 39 | internal_options.devicesCount = gpu->deviceCount; 40 | internal_options.memoryBankSize = defaultHBMSizePerDevice; 41 | internal_options.stepping = 0u; 42 | internal_options.localMemorySupported = true; 43 | internal_options.mode = mode::tbx; 44 | internal_options.gpuAddressSpace = gpuAddressSpace48; 45 | mgr = new AubManagerImp(std::move(gpu), internal_options); 46 | mgr->initialize(); 47 | } 48 | 49 | void TbxSimpleBatchBuffer::SetUp() { 50 | desc.deviceCount = 1; 51 | } 52 | 53 | void TbxSimpleBatchBuffer::TearDown() { 54 | delete ctxt; 55 | delete mgr; 56 | } 57 | 58 | TEST_F(TbxSimpleBatchBuffer, simpleBatchBufferRCS) { 59 | initializeStream(desc); 60 | 61 | ctxt = mgr->createHardwareContext(defaultDevice, ENGINE_RCS, 0); 62 | addSimpleBatchBuffer(ctxt, defaultMemoryBank); 63 | ctxt->pollForCompletion(); 64 | } 65 | -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/lnl/command_streamer_helper_xe2_hpg_core_lnl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/xe2_hpg_core/command_streamer_helper_xe2_hpg_core.h" 9 | #include "aub_mem_dump/page_table_pml5.h" 10 | #include "aubstream/product_family.h" 11 | 12 | namespace aub_stream { 13 | struct GpuLnl : public GpuXe2HpgCore { 14 | 15 | GpuLnl() { 16 | productFamily = ProductFamily::Lnl; 17 | gfxCoreFamily = CoreFamily::Xe2HpgCore; 18 | productAbbreviation = "lnl"; 19 | deviceId = 45; 20 | deviceCount = GpuXe2HpgCore::numSupportedDevices; 21 | } 22 | 23 | void setGGTTBaseAddresses(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize) const override { 24 | assert(deviceCount > 0u); 25 | assert(deviceCount <= this->deviceCount); 26 | assert(GpuLnl::numSupportedDevices == this->deviceCount); 27 | 28 | const uint32_t mmioDevice[1] = {0}; 29 | const uint32_t gsmBase = 0x108100; 30 | 31 | uint64_t gttBase = getGSMBaseAddress(0); 32 | stream.writeMMIO(mmioDevice[0] + gsmBase + 4, static_cast(gttBase >> 32)); 33 | stream.writeMMIO(mmioDevice[0] + gsmBase + 0, static_cast(gttBase & 0xFFF00000)); 34 | } 35 | 36 | bool isMemorySupported(uint32_t memoryBanks, uint32_t alignment) const override { 37 | assert(MEMORY_BANK_SYSTEM == 0); 38 | auto supportedBanks = MEMORY_BANK_SYSTEM; 39 | auto unsupportedBanks = MEMORY_BANKS_ALL ^ supportedBanks; 40 | 41 | if (unsupportedBanks & memoryBanks) { 42 | return false; 43 | } 44 | 45 | // MEMORY_BANK_SYSTEM 46 | return alignment == 4096 || alignment == 65536; 47 | } 48 | }; 49 | 50 | template <> 51 | std::function()> enableGpu() { 52 | return std::make_unique; 53 | } 54 | } // namespace aub_stream 55 | -------------------------------------------------------------------------------- /tests/aub_tests/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2025 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | set(TARGET_NAME ${PROJECT_NAME}_aub_tests) 8 | message(STATUS "AUB tests: ${TARGET_NAME}") 9 | 10 | add_executable(${TARGET_NAME} 11 | ${SOURCES} 12 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 13 | ${CMAKE_CURRENT_SOURCE_DIR}/aub_mem_dump_tests.cpp 14 | ${CMAKE_CURRENT_SOURCE_DIR}/aub_tests_filters.cpp 15 | ${CMAKE_CURRENT_SOURCE_DIR}/simple_batch_buffer_tests.cpp 16 | ${CMAKE_CURRENT_SOURCE_DIR}/simple_batch_buffer_fixture.h 17 | ) 18 | 19 | get_property(TEST_TRAITS_MACROS GLOBAL PROPERTY TEST_TRAITS_MACROS_property) 20 | 21 | target_compile_definitions(${TARGET_NAME} PUBLIC ${TEST_TRAITS_MACROS}) 22 | 23 | if(WIN32) 24 | target_link_libraries(${TARGET_NAME} Ws2_32_stub) 25 | endif() 26 | 27 | set_target_properties( 28 | ${TARGET_NAME} 29 | PROPERTIES 30 | VS_DEBUGGER_WORKING_DIRECTORY "$(OutDir)" 31 | VS_DEBUGGER_COMMAND_ARGUMENTS "--gtest_filter=* --gtest_catch_exceptions=0" 32 | ) 33 | 34 | set(RUN_UNIT_TESTS_TARGET run_${TARGET_NAME}) 35 | add_custom_target(${RUN_UNIT_TESTS_TARGET} ALL DEPENDS ${TARGET_NAME}) 36 | add_custom_command( 37 | TARGET ${RUN_UNIT_TESTS_TARGET} 38 | POST_BUILD 39 | COMMAND echo Running ${TARGET_NAME} in $ 40 | COMMAND WORKING_DIRECTORY $ 41 | COMMAND ${AUBSTREAM_RUN_INTERCEPTOR_LIST} ${TARGET_NAME} --gtest_catch_exceptions=0 42 | ) 43 | if(DO_NOT_RUN_AUB_TESTS) 44 | set_target_properties(run_${TARGET_NAME} PROPERTIES 45 | EXCLUDE_FROM_DEFAULT_BUILD TRUE 46 | EXCLUDE_FROM_ALL TRUE 47 | ) 48 | endif() 49 | 50 | aub_stream_create_source_tree(${TARGET_NAME}) 51 | -------------------------------------------------------------------------------- /aub_mem_dump/gen12lp/dg1/command_streamer_helper_gen12lp_dg1.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gen12lp/command_streamer_helper_gen12lp.h" 9 | 10 | #include "aubstream/product_family.h" 11 | namespace aub_stream { 12 | 13 | struct GpuDg1 : public GpuGen12LP { 14 | GpuDg1() { 15 | productFamily = ProductFamily::Dg1; 16 | gfxCoreFamily = CoreFamily::Gen12lp; 17 | productAbbreviation = "dg1"; 18 | deviceId = 0x1e; 19 | deviceCount = 1; 20 | } 21 | 22 | bool isMemorySupported(uint32_t memoryBanks, uint32_t alignment) const override { 23 | assert(MEMORY_BANK_SYSTEM == 0); 24 | auto supportedBanks = MEMORY_BANK_SYSTEM | MEMORY_BANK_0; 25 | auto unsupportedBanks = MEMORY_BANKS_ALL ^ supportedBanks; 26 | 27 | if (unsupportedBanks & memoryBanks) { 28 | return false; 29 | } 30 | 31 | // Local MEMORY_BANKs 32 | if (memoryBanks & supportedBanks) { 33 | return alignment == 4096 || alignment == 65536; 34 | } 35 | 36 | // MEMORY_BANK_SYSTEM 37 | return alignment == 4096 || alignment == 65536; 38 | } 39 | 40 | void setMemoryBankSize(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize) const override { 41 | assert(deviceCount == 1); 42 | assert(deviceCount <= this->deviceCount); 43 | 44 | auto gb = memoryBankSize / GB; 45 | assert(gb > 0); 46 | assert(gb < 128); 47 | 48 | size_t base = 0u; 49 | uint32_t offset = 0x4900; 50 | uint32_t value = 0; 51 | value |= gb << 8; 52 | value |= base << 1; 53 | value |= 1; 54 | 55 | stream.writeMMIO(offset, value); 56 | } 57 | }; 58 | 59 | template <> 60 | std::function()> enableGpu() { 61 | return std::make_unique; 62 | } 63 | } // namespace aub_stream 64 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3_core/ptl/command_streamer_helper_xe3_core_ptl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/xe3_core/command_streamer_helper_xe3_core.h" 9 | #include "aubstream/product_family.h" 10 | #include "aub_mem_dump/page_table_pml5.h" 11 | 12 | namespace aub_stream { 13 | 14 | struct GpuPtl : public GpuXe3Core { 15 | static constexpr uint32_t numSupportedDevices = 1; 16 | 17 | GpuPtl() { 18 | productFamily = ProductFamily::Ptl; 19 | gfxCoreFamily = CoreFamily::Xe3Core; 20 | productAbbreviation = "ptl"; 21 | deviceId = 51; 22 | deviceCount = GpuPtl::numSupportedDevices; 23 | } 24 | 25 | void setGGTTBaseAddresses(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize) const override { 26 | assert(deviceCount > 0u); 27 | assert(deviceCount <= this->deviceCount); 28 | assert(GpuPtl::numSupportedDevices == this->deviceCount); 29 | 30 | const uint32_t mmioDevice[1] = {0}; 31 | const uint32_t gsmBase = 0x108100; 32 | 33 | uint64_t gttBase = getGSMBaseAddress(0); 34 | stream.writeMMIO(mmioDevice[0] + gsmBase + 4, static_cast(gttBase >> 32)); 35 | stream.writeMMIO(mmioDevice[0] + gsmBase + 0, static_cast(gttBase & 0xFFF00000)); 36 | } 37 | 38 | bool isMemorySupported(uint32_t memoryBanks, uint32_t alignment) const override { 39 | assert(MEMORY_BANK_SYSTEM == 0); 40 | auto supportedBanks = MEMORY_BANK_SYSTEM; 41 | auto unsupportedBanks = MEMORY_BANKS_ALL ^ supportedBanks; 42 | 43 | if (unsupportedBanks & memoryBanks) { 44 | return false; 45 | } 46 | 47 | // MEMORY_BANK_SYSTEM 48 | return alignment == 4096 || alignment == 65536; 49 | } 50 | }; 51 | 52 | template <> 53 | std::function()> enableGpu() { 54 | return std::make_unique; 55 | } 56 | } // namespace aub_stream 57 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpc_core/pvc/gpu_tests_pvc.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "unit_tests/mock_aub_stream.h" 10 | #include "test.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | using namespace aub_stream; 14 | using ::testing::_; 15 | using ::testing::AtLeast; 16 | 17 | TEST(Gpu, gpuPvcReturnsCorrectDeviceId) { 18 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Pvc); 19 | 20 | EXPECT_EQ(0x27, gpu->deviceId); 21 | } 22 | 23 | TEST(Pvc, allocatePML5) { 24 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Pvc); 25 | PhysicalAddressAllocatorSimple allocator; 26 | 27 | auto ppgtt = std::unique_ptr(gpu->allocatePPGTT(&allocator, MEMORY_BANK_0, maxNBitValue(57))); 28 | EXPECT_EQ(57u, ppgtt->getNumAddressBits()); 29 | } 30 | 31 | TEST(Pvc, givenInitializeGlobalMMIOWhenPvcSteppingA0ThenWritesMmioLtcdregWithSetSleepModeDisabled) { 32 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Pvc); 33 | MockAubStream stream; 34 | uint32_t LTCDREG = 0x0000b120; 35 | uint32_t valueWithSleepModeDisabled = 0x54000002; 36 | 37 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(AtLeast(0)); 38 | EXPECT_CALL(stream, writeMMIO(LTCDREG, valueWithSleepModeDisabled)).Times(1); 39 | 40 | uint32_t stepping = SteppingValues::A; 41 | gpu->initializeGlobalMMIO(stream, 1, 1, stepping); 42 | } 43 | 44 | TEST(Pvc, givenInitializeGlobalMMIOWhenPvcSteppingNotA0ThenWritesMmioLtcdregWithoutSetSleepModeDisabled) { 45 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Pvc); 46 | MockAubStream stream; 47 | uint32_t LTCDREG = 0x0000b120; 48 | uint32_t valueWithSleepModeDisabled = 0x14000002; 49 | 50 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(AtLeast(0)); 51 | EXPECT_CALL(stream, writeMMIO(LTCDREG, valueWithSleepModeDisabled)).Times(1); 52 | 53 | uint32_t stepping = SteppingValues::B; 54 | gpu->initializeGlobalMMIO(stream, 1, 1, stepping); 55 | } 56 | -------------------------------------------------------------------------------- /aub_mem_dump/page_table.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gpu.h" 9 | #include "page_table.h" 10 | #include 11 | #include 12 | 13 | namespace aub_stream { 14 | 15 | PageTable::PageTable(const Gpu &gpu, PhysicalAddressAllocator *physicalAddressAllocator, size_t size, unsigned int tableCount, uint32_t memoryBank) 16 | : gpu(gpu), 17 | allocator(physicalAddressAllocator), 18 | physicalAddress(0u), 19 | memoryBank(memoryBank) { 20 | // Allocate dedicate memory for table if requested 21 | if (size) { 22 | size = std::max(size, size_t(4096)); 23 | physicalAddress = allocator->reservePhysicalMemory(memoryBank, size, size); 24 | } 25 | } 26 | 27 | uint64_t PageTable::getEntryValue() const { 28 | auto bits = toBitValue(PpgttEntryBits::writableBit, PpgttEntryBits::presentBit); 29 | bits |= isLocalMemory() ? toBitValue(PpgttEntryBits::localMemoryBit) : 0; 30 | bits |= gpu.getPPGTTExtraEntryBits(additionalAllocParams); 31 | return getPhysicalAddress() | bits; 32 | } 33 | 34 | PageTable::~PageTable() { 35 | if (allocator) { 36 | allocator->freePhysicalMemory(memoryBank, physicalAddress); 37 | } 38 | for (auto &entry : table) { 39 | delete entry; 40 | } 41 | } 42 | 43 | GGTT::GGTT(const Gpu &gpu, PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gttBaseAddress) 44 | : PageTable(gpu, physicalAddressAllocator, 0u, 1u << 20, memoryBank), 45 | entryOffset(0), 46 | gfxAddressAllocator(0u), 47 | gttTableOffset(gttBaseAddress) { 48 | numAddressBits = 32; 49 | numLevels = 1; 50 | // must be system memory or only have 1 bit set. No coloring for GGTT 51 | assert(0 == memoryBank || 0 == (memoryBank & (memoryBank - 1))); 52 | 53 | while (memoryBank && !(memoryBank & 1)) { 54 | entryOffset += 0x1000000; 55 | memoryBank >>= 1; 56 | } 57 | } 58 | 59 | } // namespace aub_stream 60 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/mtl/command_stream_helper_tests_mtl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | #include "aubstream/engine_node.h" 14 | #include "tests/unit_tests/command_stream_helper_tests.h" 15 | 16 | #include "test_defaults.h" 17 | #include "test.h" 18 | 19 | #include 20 | 21 | using namespace aub_stream; 22 | 23 | TEST_F(CommandStreamerHelperTest, givenMtlAndMemoryAlignment4KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemIsReturnedTrue) { 24 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Mtl); 25 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 26 | auto pageSize = 4096u; 27 | 28 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 29 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 30 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 31 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 32 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 33 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 34 | } 35 | 36 | TEST_F(CommandStreamerHelperTest, givenMtlAndMemoryAlignment64KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemIsReturnedTrue) { 37 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Mtl); 38 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 39 | auto pageSize = 65536u; 40 | 41 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 42 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 43 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 44 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 45 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 46 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 47 | } 48 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/dg2/command_stream_helper_tests_dg2.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | #include "aubstream/engine_node.h" 14 | #include "tests/unit_tests/command_stream_helper_tests.h" 15 | 16 | #include "test_defaults.h" 17 | #include "test.h" 18 | 19 | #include 20 | 21 | using namespace aub_stream; 22 | 23 | TEST_F(CommandStreamerHelperTest, givenDg2AndMemoryAlignment4KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemAndBank0IsReturnedTrue) { 24 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 25 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 26 | auto pageSize = 4096u; 27 | 28 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 29 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 30 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 31 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 32 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 33 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 34 | } 35 | 36 | TEST_F(CommandStreamerHelperTest, givenDg2AndMemoryAlignment64KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemAndBank0IsReturnedTrue) { 37 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 38 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 39 | auto pageSize = 65536u; 40 | 41 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 42 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 43 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 44 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 45 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 46 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 47 | } 48 | -------------------------------------------------------------------------------- /tests/unit_tests/command_stream_helper_xe_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | #include "aubstream/allocation_params.h" 14 | #include "aubstream/engine_node.h" 15 | #include "tests/unit_tests/command_stream_helper_tests.h" 16 | 17 | #include "test.h" 18 | #include "test_defaults.h" 19 | 20 | #include 21 | #include 22 | 23 | using namespace aub_stream; 24 | 25 | HWTEST_F(CommandStreamerHelperTest, WhenCommandStreamHelperIsInitializedThenLRCAIncludesContextSRWithInhibitContextRestoreAndSynchronousContextSwitch, HwMatcher::coreBelowEqualXeHpc) { 26 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 27 | 28 | auto sizeLRCA = rcs.sizeLRCA; 29 | auto pLRCA = std::unique_ptr(new uint32_t[rcs.sizeLRCA / sizeof(uint32_t)]); 30 | PhysicalAddressAllocatorSimple allocator; 31 | PML4 pageTable(*gpu, &allocator, defaultMemoryBank); 32 | rcs.initialize(reinterpret_cast(pLRCA.get()), &pageTable, 0); 33 | 34 | EXPECT_TRUE(checkLRIInLRCA(pLRCA.get(), sizeLRCA, rcs.mmioEngine, 0x2244, 0x00090009)); 35 | } 36 | 37 | HWTEST_F(CommandStreamerHelperTest, WhenCommandStreamHelperIsInitializedWithFlagsThenLRCAIncludesContextSRWithSpecidfiedFlags, HwMatcher::coreBelowEqualXeHpc) { 38 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 39 | 40 | auto sizeLRCA = rcs.sizeLRCA; 41 | uint32_t additionalFlags = 0x800080; 42 | auto pLRCA = std::unique_ptr(new uint32_t[rcs.sizeLRCA / sizeof(uint32_t)]); 43 | PhysicalAddressAllocatorSimple allocator; 44 | PML4 pageTable(*gpu, &allocator, defaultMemoryBank); 45 | rcs.initialize(reinterpret_cast(pLRCA.get()), &pageTable, additionalFlags); 46 | 47 | EXPECT_TRUE(checkLRIInLRCA(pLRCA.get(), sizeLRCA, rcs.mmioEngine, 0x2244, (0x00090009 | additionalFlags))); 48 | } 49 | -------------------------------------------------------------------------------- /aub_mem_dump/tbx_stream.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_stream.h" 10 | #include "tbx_sockets.h" 11 | 12 | namespace aub_stream { 13 | struct AubTbxStream; 14 | class TbxSockets; 15 | 16 | struct TbxStream : public AubStream { 17 | virtual ~TbxStream(); 18 | 19 | void addComment(const char *message) override; 20 | void expectMemoryTable(const void *memory, size_t size, const std::vector &writeInfoTable, uint32_t compareOperation) override; 21 | void declareContextForDumping(uint32_t handleDumpContext, PageTable *pageTable) override; 22 | void dumpBufferBIN(PageTableType gttType, uint64_t gfxAddress, size_t size, uint32_t handleDumpContext) override; 23 | void dumpSurface(PageTableType gttType, const SurfaceInfo &surfaceInfo, uint32_t handleDumpContext) override; 24 | bool init(int steppingValue, const GpuDescriptor &gpu) override; 25 | void registerPoll(uint32_t registerOffset, uint32_t mask, uint32_t value, bool pollNotEqual, uint32_t timeoutAction) override; 26 | void reserveContiguousPages(const std::vector &entries) override; 27 | void writeMMIO(uint32_t offset, uint32_t value) override; 28 | uint32_t readMMIO(uint32_t offset) override; 29 | void writePCICFG(uint32_t offset, uint32_t value) override; 30 | uint32_t readPCICFG(uint32_t offset) override; 31 | 32 | uint32_t getStreamMode() const override { return aub_stream::mode::tbx; }; 33 | 34 | TbxSockets *socket = nullptr; 35 | friend AubTbxStream; 36 | 37 | protected: 38 | void writeGttPages(GGTT *ggtt, const std::vector &writeInfoTable) override; 39 | 40 | void readContiguousPages(void *memory, size_t size, uint64_t physAddress, int addressSpace, int hint); 41 | void readDiscontiguousPages(void *memory, size_t size, const std::vector &writeInfoTable) override; 42 | void writeContiguousPages(const void *memory, size_t size, uint64_t physAddress, int addressSpace, int hint) override; 43 | void writeDiscontiguousPages(const void *memory, size_t size, const std::vector &writeInfoTable, int hint) override; 44 | void writeDiscontiguousPages(const std::vector &writeInfoTable, int addressSpace, int hint) override; 45 | }; 46 | 47 | } // namespace aub_stream 48 | -------------------------------------------------------------------------------- /aub_mem_dump/tbx_sockets_imp.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "tbx_sockets.h" 10 | #include 11 | #include 12 | 13 | #ifdef _WIN32 14 | #ifndef _WIN32_LEAN_AND_MEAN 15 | #define _WIN32_LEAN_AND_MEAN 16 | #include 17 | #endif 18 | #else 19 | typedef int SOCKET; 20 | #endif 21 | 22 | namespace aub_stream { 23 | class TbxSocketsImp : public TbxSockets { 24 | public: 25 | explicit TbxSocketsImp(std::ostream &err = std::cerr); 26 | ~TbxSocketsImp() override = default; 27 | 28 | bool stillConnected() override; 29 | 30 | bool init(const std::string &hostNameOrIp, uint16_t port, bool frontdoor) override; 31 | void close() override; 32 | 33 | bool writeGTT(uint32_t gttOffset, uint64_t entry) override; 34 | 35 | bool readMemory(uint64_t offset, void *data, size_t size, bool isLocalMem) override; 36 | bool writeMemory(uint64_t offset, const void *data, size_t size, bool isLocalMem) override; 37 | 38 | bool readMemoryExt(uint64_t offset, void *data, size_t size, bool isLocalMem) override; 39 | bool writeMemoryExt(uint64_t offset, const void *data, size_t size, bool isLocalMem) override; 40 | 41 | bool readMMIO(uint32_t offset, uint32_t *data) override; 42 | bool writeMMIO(uint32_t offset, uint32_t data) override; 43 | 44 | bool readPCICFG(uint32_t bus, uint32_t device, uint32_t function, uint32_t offset, uint32_t *value) override; 45 | bool writePCICFG(uint32_t bus, uint32_t device, uint32_t function, uint32_t offset, uint32_t data) override; 46 | 47 | void enableThrowOnError(bool enabled) override; 48 | 49 | protected: 50 | std::ostream &cerrStream; 51 | SOCKET m_socket = 0; 52 | 53 | bool connectToServer(const std::string &hostNameOrIp, uint16_t port); 54 | bool checkServerConfig(bool frontdoor); 55 | bool sendWriteData(const void *buffer, size_t sizeInBytes); 56 | bool getResponseData(void *buffer, size_t sizeInBytes); 57 | 58 | inline uint32_t getNextTransID() { return transID++; } 59 | 60 | void logErrorInfo(const char *tag); 61 | 62 | uint32_t transID = 0; 63 | 64 | bool frontdoorMode = false; 65 | uint64_t lmembar = 0; 66 | 67 | bool inErrorState = false; 68 | std::mutex socket_mutex{}; 69 | 70 | bool throwOnError = false; 71 | }; 72 | 73 | } // namespace aub_stream 74 | -------------------------------------------------------------------------------- /tests/aub_tests/simple_batch_buffer_fixture.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/gpu.h" 9 | #include "aub_mem_dump/memory_banks.h" 10 | #include "aub_mem_dump/aub_stream.h" 11 | #include "aubstream/aubstream.h" 12 | #include "aubstream/hardware_context.h" 13 | #include "aub_mem_dump/settings.h" 14 | #include "test_defaults.h" 15 | #include "tests/unit_tests/mock_aub_manager.h" 16 | #include "gtest/gtest.h" 17 | #include "aub_mem_dump/options.h" 18 | #include "variable_backup.h" 19 | 20 | namespace aub_stream { 21 | 22 | struct SimpleBatchBuffer : public ::testing::TestWithParam { 23 | SimpleBatchBuffer() 24 | : desc(*gpu), 25 | mgr(nullptr), 26 | ctxt(nullptr) { 27 | } 28 | 29 | void SetUp() override { 30 | // Default to the minimal sku 31 | desc.deviceCount = 1; 32 | } 33 | 34 | void TearDown() override { 35 | delete ctxt; 36 | delete mgr; 37 | } 38 | 39 | void initializeStream(const GpuDescriptor &desc) { 40 | auto gpu = createGpuFunc(); 41 | gpu->deviceCount = desc.deviceCount; 42 | gpu->deviceId = desc.deviceId; 43 | 44 | assert(gpu->gfxCoreFamily == desc.gfxCoreFamily); 45 | assert(gpu->productAbbreviation == desc.productAbbreviation); 46 | assert(gpu->productFamily == desc.productFamily); 47 | 48 | auto fileName = getAubFileName(*gpu); 49 | assert(!mgr); 50 | auto supportsLocalMemory = 51 | gpu->isMemorySupported(MEMORY_BANK_0, 4096u) || 52 | gpu->isMemorySupported(MEMORY_BANK_0, 65536u); 53 | AubManagerOptions internal_options; 54 | internal_options.devicesCount = gpu->deviceCount; 55 | internal_options.memoryBankSize = defaultHBMSizePerDevice; 56 | internal_options.stepping = SteppingValues::A; 57 | internal_options.localMemorySupported = supportsLocalMemory; 58 | internal_options.mode = streamMode; 59 | internal_options.gpuAddressSpace = gpuAddressSpace48; 60 | mgr = new AubManagerImp(std::move(gpu), internal_options); 61 | mgr->initialize(); 62 | mgr->open(fileName); 63 | } 64 | 65 | GpuDescriptor desc; 66 | AubManagerImp *mgr; 67 | HardwareContext *ctxt; 68 | const uint32_t streamMode = mode::aubFile; 69 | }; 70 | } // namespace aub_stream 71 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3p_core/gpu_tests_xe3p_core.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/family_mapper.h" 9 | #include "aub_mem_dump/gpu.h" 10 | #include "aub_mem_dump/memory_banks.h" 11 | #include "aub_mem_dump/command_streamer_helper.h" 12 | #include "aub_mem_dump/settings.h" 13 | #include "tests/unit_tests/mock_aub_stream.h" 14 | 15 | #include "test.h" 16 | #include "gmock/gmock.h" 17 | #include "test_defaults.h" 18 | #include "tests/variable_backup.h" 19 | 20 | using namespace aub_stream; 21 | using ::testing::_; 22 | 23 | TEST(GpuXe3p, givenXe3pWhenCheckingIndirectRingStateEnableThenTrueReturned) { 24 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::Xe3pCore); 25 | 26 | EXPECT_TRUE(gpu->getCommandStreamerHelper(defaultDevice, defaultEngine).isRingDataEnabled()); 27 | } 28 | 29 | TEST(GpuXe3p, givenXe3pWhenInitializingGlobalMmiosThenProgramCorrectRegisters) { 30 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::Xe3pCore); 31 | MockAubFileStream stream; 32 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(::testing::AtLeast(0)); 33 | 34 | EXPECT_CALL(stream, writeMMIO(0x00004b80, 0xffff1001)).Times(1); 35 | EXPECT_CALL(stream, writeMMIO(0x00007000, 0xffff0000)).Times(1); 36 | EXPECT_CALL(stream, writeMMIO(0x00007004, 0xffff0000)).Times(1); 37 | EXPECT_CALL(stream, writeMMIO(0x00009008, 0x00000200)).Times(1); 38 | EXPECT_CALL(stream, writeMMIO(0x0000900c, 0x00001b40)).Times(1); 39 | EXPECT_CALL(stream, writeMMIO(0x0000b120, 0x14000002)).Times(1); 40 | EXPECT_CALL(stream, writeMMIO(0x0000b134, 0xa0000000)).Times(1); 41 | EXPECT_CALL(stream, writeMMIO(0x0000b234, 0xa0000000)).Times(1); 42 | EXPECT_CALL(stream, writeMMIO(0x0000ce90, 0x00030003)).Times(1); 43 | EXPECT_CALL(stream, writeMMIO(0x0000cf58, 0x80000000)).Times(1); 44 | EXPECT_CALL(stream, writeMMIO(0x0000e194, 0xffff0002)).Times(1); 45 | EXPECT_CALL(stream, writeMMIO(0x00014800, 0x00010001)).Times(1); 46 | EXPECT_CALL(stream, writeMMIO(0x00014804, 0x0fff0000)).Times(1); 47 | EXPECT_CALL(stream, writeMMIO(0x0001a0d8, 0x00020000)).Times(1); 48 | EXPECT_CALL(stream, writeMMIO(0x00042080, 0x00000000)).Times(1); 49 | EXPECT_CALL(stream, writeMMIO(0x0000e7c8, 0x00400000)).Times(1); 50 | EXPECT_CALL(stream, writeMMIO(0x0000e7cc, 0x00001000)).Times(1); 51 | 52 | gpu->initializeGlobalMMIO(stream, 1, 1, 0); 53 | } 54 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_hpg_core/mtl/command_streamer_helper_xe_hpg_core_mtl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/xe_hpg_core/command_streamer_helper_xe_hpg_core.h" 9 | 10 | #include "aubstream/product_family.h" 11 | namespace aub_stream { 12 | 13 | struct GpuMtl : public GpuXeHpgCore { 14 | GpuMtl() { 15 | productFamily = ProductFamily::Mtl; 16 | gfxCoreFamily = CoreFamily::XeHpgCore; 17 | productAbbreviation = "mtl"; 18 | deviceId = 42; 19 | deviceCount = GpuXeHpgCore::numSupportedDevices; 20 | } 21 | 22 | uint64_t getPPGTTExtraEntryBits(const AllocationParams::AdditionalParams &allocationParams) const override { 23 | auto bits = toBitValue(PpgttEntryBits::atomicEnableBit); 24 | 25 | bits |= allocationParams.uncached ? patIndex2 : patIndex0; 26 | 27 | return bits; 28 | } 29 | 30 | void initializeDefaultMemoryPools(AubStream &stream, uint32_t devicesCount, uint64_t memoryBankSize) const override {} 31 | 32 | const MMIOList getGlobalMMIOPlatformSpecific() const override { 33 | const MMIOList globalMMIOPlatformSpecific = { 34 | 35 | // bits: 3-2: L4_CACHE_POLICY, 1-0: COH_MODE 36 | MMIOPair(getPatIndexMmioAddr(0), 0b0000), // PAT_INDEX 0: WB, Non-Coherent 37 | MMIOPair(getPatIndexMmioAddr(1), 0b0100), // PAT_INDEX 1: WT, Non-Coherent 38 | MMIOPair(getPatIndexMmioAddr(2), 0b1100), // PAT_INDEX 2: UC, Non-Coherent 39 | MMIOPair(getPatIndexMmioAddr(3), 0b0010), // PAT_INDEX 3: WB, 1-Way Coherent 40 | MMIOPair(getPatIndexMmioAddr(4), 0b0011), // PAT_INDEX 4: WB, 2-Way Coherent 41 | }; 42 | return globalMMIOPlatformSpecific; 43 | }; 44 | 45 | bool isMemorySupported(uint32_t memoryBanks, uint32_t alignment) const override { 46 | assert(MEMORY_BANK_SYSTEM == 0); 47 | auto supportedBanks = MEMORY_BANK_SYSTEM; 48 | auto unsupportedBanks = MEMORY_BANKS_ALL ^ supportedBanks; 49 | 50 | if (unsupportedBanks & memoryBanks) { 51 | return false; 52 | } 53 | 54 | // MEMORY_BANK_SYSTEM 55 | return alignment == 4096 || alignment == 65536; 56 | } 57 | }; 58 | 59 | template <> 60 | std::function()> enableGpu() { 61 | return std::make_unique; 62 | } 63 | } // namespace aub_stream 64 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpc_core/page_table_tests_xe_hpc_core.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/memory_banks.h" 9 | #include "aub_mem_dump/page_table.h" 10 | #include "aub_mem_dump/xe_hpc_core/command_streamer_helper_xe_hpc_core.h" 11 | 12 | #include "test_defaults.h" 13 | #include "gtest/gtest.h" 14 | 15 | #include "test.h" 16 | 17 | using namespace aub_stream; 18 | 19 | struct MockPageTableMemory : PageTableMemory { 20 | using PageTableMemory::additionalAllocParams; 21 | using PageTableMemory::PageTableMemory; 22 | }; 23 | 24 | TEST(PageTableTestsXeHpcCore, getEntryValue) { 25 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::XeHpcCore); 26 | 27 | uint64_t physicalAddress = 0x20000; 28 | MockPageTableMemory pageTable(*gpu, physicalAddress, MEMORY_BANK_0); 29 | 30 | // cached 31 | { 32 | AllocationParams::AdditionalParams params = {}; 33 | params.uncached = false; 34 | 35 | pageTable.additionalAllocParams = params; 36 | 37 | auto expectedExtraBits = toBitValue(PpgttEntryBits::atomicEnableBit) | GpuXeHpcCore::patIndex3; 38 | 39 | auto extraEntryBits = gpu->getPPGTTExtraEntryBits(params); 40 | EXPECT_EQ(expectedExtraBits, extraEntryBits); 41 | 42 | auto expectedEntryValue = physicalAddress | expectedExtraBits | 43 | toBitValue(PpgttEntryBits::localMemoryBit, 44 | PpgttEntryBits::writableBit, PpgttEntryBits::presentBit); 45 | 46 | EXPECT_EQ(expectedEntryValue, pageTable.getEntryValue()); 47 | } 48 | 49 | // uncached 50 | { 51 | AllocationParams::AdditionalParams params = {}; 52 | params.uncached = true; 53 | 54 | pageTable.additionalAllocParams = params; 55 | 56 | auto expectedExtraBits = toBitValue(PpgttEntryBits::atomicEnableBit) | GpuXeHpcCore::patIndex0; 57 | 58 | auto extraEntryBits = gpu->getPPGTTExtraEntryBits(params); 59 | EXPECT_EQ(expectedExtraBits, extraEntryBits); 60 | 61 | auto expectedEntryValue = physicalAddress | expectedExtraBits | 62 | toBitValue(PpgttEntryBits::localMemoryBit, 63 | PpgttEntryBits::writableBit, PpgttEntryBits::presentBit); 64 | 65 | EXPECT_EQ(expectedEntryValue, pageTable.getEntryValue()); 66 | } 67 | } 68 | -------------------------------------------------------------------------------- /aub_mem_dump/xe_core/command_streamer_helper_xe_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include "aub_mem_dump/aub_stream.h" 11 | #include "aub_mem_dump/tbx_shm_stream.h" 12 | #include "aub_mem_dump/command_streamer_helper.h" 13 | #include "aub_mem_dump/family_mapper.h" 14 | #include "aub_mem_dump/gpu.h" 15 | #include "aub_mem_dump/memory_banks.h" 16 | #include "aub_mem_dump/options.h" 17 | 18 | namespace aub_stream { 19 | 20 | template 21 | struct CommandStreamerHelperXeCore : public Helper { 22 | using Helper::Helper; 23 | 24 | void setPriority(MiContextDescriptorReg &contextDescriptor, uint32_t priority) const override { 25 | 26 | if (priority != 0) { 27 | contextDescriptor.sData.FunctionType = priority & 0x3; 28 | } 29 | } 30 | 31 | void submitContext(AubStream &stream, std::vector &contextDescriptor) const override { 32 | assert(contextDescriptor.size() <= 8); 33 | 34 | for (uint32_t i = 0; i < 8; i++) { 35 | stream.writeMMIO(mmioEngine + 0x2510 + (i * 8), contextDescriptor[i].ulData[0]); 36 | stream.writeMMIO(mmioEngine + 0x2514 + (i * 8), contextDescriptor[i].ulData[1]); 37 | } 38 | 39 | // Load our new exec list 40 | stream.writeMMIO(mmioEngine + 0x2550, 1); 41 | } 42 | 43 | uint32_t getPollForCompletionMask() const override { return 0x00008000; } 44 | 45 | const MMIOList getEngineMMIO() const override; 46 | 47 | using Helper::mmioDevice; 48 | using Helper::mmioEngine; 49 | }; 50 | 51 | struct GpuXeCore : public Gpu { 52 | void setMemoryBankSize(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize) const override; 53 | 54 | void setGGTTBaseAddresses(AubStream &stream, uint32_t deviceCount, uint64_t memoryBankSize) const override; 55 | 56 | PageTable *allocatePPGTT(PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gpuAddressSpace) const override; 57 | 58 | void initializeDefaultMemoryPools(AubStream &stream, uint32_t devicesCount, uint64_t memoryBankSize) const override; 59 | 60 | void initializeFlatCcsBaseAddressMmio(AubStream &stream, uint32_t deviceIndex, uint64_t flatCcsBaseAddress) const; 61 | 62 | bool isMemorySupported(uint32_t memoryBanks, uint32_t alignment) const override; 63 | }; 64 | 65 | } // namespace aub_stream 66 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3p_core/command_streamer_helper_xe3p_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | 12 | #include "aubstream/engine_node.h" 13 | #include "tests/unit_tests/command_stream_helper_tests.h" 14 | 15 | #include "test.h" 16 | #include "test_defaults.h" 17 | 18 | #include 19 | 20 | using namespace aub_stream; 21 | 22 | bool coreEqualXe3p(const aub_stream::Gpu *gpu) { 23 | return gpu->gfxCoreFamily == aub_stream::CoreFamily::Xe3pCore; 24 | } 25 | 26 | HWTEST_F(CommandStreamerHelperTest, CheckCCSFlushCommandsXe3p, coreEqualXe3p) { 27 | TEST_REQUIRES(gpu->isEngineSupported(ENGINE_CCS)); 28 | 29 | auto &ccs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_CCS); 30 | std::vector testRingBuffer{}; 31 | 32 | ccs.addFlushCommands(testRingBuffer); 33 | 34 | size_t sizeOfCommands = 0; 35 | // Verify the first Pipe Control 36 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0x7a001004); // QueueDrainMode set 37 | // We are testing for: 38 | // no CSStallEnable 39 | // DCFlushEnable 40 | // IndirectStatePointersDisable 41 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0x00000220); 42 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 43 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 44 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 45 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 46 | 47 | // Verify the second Pipe Control 48 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0x7a001004); 49 | // We are testing for: 50 | // no CSStallEnable 51 | // IndirectStatePointersDisable 52 | // StateCacheInvalidationEnable 53 | // ConstantCacheInvalidationEnable 54 | // DCFlushEnable 55 | // TextureCacheInvalidateEnable 56 | // InstructionCacheInvalidateEnable 57 | // CommandCacheInvalidateEnable 58 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0x20000E2C); 59 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 60 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 61 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 62 | EXPECT_EQ(testRingBuffer[sizeOfCommands++], 0); 63 | 64 | // Finally make sure that we don't have any more commands 65 | // which the test doesn't know about 66 | EXPECT_EQ(sizeOfCommands, testRingBuffer.size()); 67 | } 68 | -------------------------------------------------------------------------------- /aub_mem_dump/xe3_core/command_streamer_helper_xe3_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/xe_core/command_streamer_helper_xe_core.h" 10 | 11 | namespace aub_stream { 12 | 13 | template 14 | struct CommandStreamerHelperXe3Core : public CommandStreamerHelperXeCore { 15 | using CommandStreamerHelperXeCore::CommandStreamerHelperXeCore; 16 | 17 | const MMIOList getEngineMMIO() const override; 18 | 19 | using Helper::mmioDevice; 20 | using Helper::mmioEngine; 21 | }; 22 | 23 | struct GpuXe3Core : public GpuXeCore { 24 | GpuXe3Core(); 25 | static constexpr uint32_t numSupportedDevices = 1; 26 | static constexpr uint64_t patIndexBit0 = toBitValue(3); 27 | static constexpr uint64_t patIndexBit1 = toBitValue(4); 28 | static constexpr uint64_t patIndexBit2 = toBitValue(7); 29 | static constexpr uint64_t patIndexBit3 = toBitValue(62); 30 | static constexpr uint64_t patIndex0 = 0; // 0b0000 31 | static constexpr uint64_t patIndex3 = patIndexBit1 | patIndexBit0; // 0b0011 32 | static constexpr uint64_t patIndex9 = patIndexBit3 | patIndexBit0; // 0b1001 33 | static constexpr uint64_t patIndex12 = patIndexBit3 | patIndexBit2; // 0b1100 34 | 35 | CommandStreamerHelper &getCommandStreamerHelper(uint32_t device, EngineType engineType) const override; 36 | const std::vector getSupportedEngines() const override; 37 | 38 | static constexpr uint32_t getPatIndexMmioAddr(uint32_t index); 39 | 40 | const MMIOList getGlobalMMIO() const override; 41 | 42 | uint64_t getPPGTTExtraEntryBits(const AllocationParams::AdditionalParams &allocationParams) const override; 43 | PageTable *allocatePPGTT(PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gpuAddressSpace) const override; 44 | bool isValidDataStolenMemorySize(uint64_t dataStolenMemorySize) const override; 45 | uint32_t sizeToGMS(uint64_t dataStolenMemorySize) const; 46 | 47 | void initializeDefaultMemoryPools(AubStream &stream, uint32_t devicesCount, uint64_t memoryBankSize) const override; 48 | void initializeFlatCcsBaseAddressMmio(AubStream &stream, uint32_t deviceIndex, uint64_t flatCcsBaseAddress, uint64_t size) const; 49 | void initializeTileRangeMmio(AubStream &stream, uint32_t deviceIndex, uint64_t lmemBaseAddress, uint64_t lmemSize) const; 50 | std::unique_ptr commandStreamerHelperTable[numSupportedDevices][EngineType::NUM_ENGINES]; 51 | }; 52 | 53 | } // namespace aub_stream 54 | -------------------------------------------------------------------------------- /tests/tbx_tests/aub_tbx_stream_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gtest/gtest.h" 9 | #include "test_defaults.h" 10 | #include "aub_mem_dump/aub_manager_imp.h" 11 | #include "aub_mem_dump/family_mapper.h" 12 | #include "aub_mem_dump/aub_tbx_stream.h" 13 | #include "aubstream/hardware_context.h" 14 | #include "aubstream/aubstream.h" 15 | #include "tests/simple_batch_buffer.h" 16 | 17 | #include "test.h" 18 | 19 | using namespace aub_stream; 20 | struct AubTbxSimpleBatchBuffer : public ::testing::Test { 21 | AubTbxSimpleBatchBuffer() 22 | : desc(*gpu), 23 | mgr(nullptr), 24 | ctxt(nullptr) { 25 | } 26 | 27 | void SetUp() override; 28 | void TearDown() override; 29 | 30 | void initializeStream(const GpuDescriptor &desc); 31 | 32 | GpuDescriptor desc; 33 | AubManagerImp *mgr; 34 | HardwareContext *ctxt; 35 | }; 36 | 37 | void AubTbxSimpleBatchBuffer::initializeStream(const GpuDescriptor &desc) { 38 | auto gpu = createGpuFunc(); 39 | assert(!mgr); 40 | AubManagerOptions internal_options; 41 | internal_options.devicesCount = gpu->deviceCount; 42 | internal_options.memoryBankSize = defaultHBMSizePerDevice; 43 | internal_options.stepping = 0u; 44 | internal_options.localMemorySupported = true; 45 | internal_options.mode = mode::aubFileAndTbx; 46 | internal_options.gpuAddressSpace = gpuAddressSpace48; 47 | mgr = new AubManagerImp(std::move(gpu), internal_options); 48 | mgr->initialize(); 49 | auto fileName = getAubFileName(desc); 50 | mgr->open(fileName); 51 | } 52 | 53 | void AubTbxSimpleBatchBuffer::SetUp() { 54 | desc.deviceCount = 1; 55 | } 56 | 57 | void AubTbxSimpleBatchBuffer::TearDown() { 58 | delete ctxt; 59 | delete mgr; 60 | } 61 | 62 | TEST_F(AubTbxSimpleBatchBuffer, simpleBatchBufferRCS) { 63 | initializeStream(desc); 64 | 65 | ctxt = mgr->createHardwareContext(defaultDevice, ENGINE_RCS, 0); 66 | addSimpleBatchBuffer(ctxt, defaultMemoryBank); 67 | ctxt->pollForCompletion(); 68 | } 69 | 70 | TEST_F(AubTbxSimpleBatchBuffer, simpleBatchBufferCCS) { 71 | TEST_REQUIRES(gpu->isEngineSupported(ENGINE_CCS)); 72 | initializeStream(desc); 73 | 74 | ctxt = mgr->createHardwareContext(defaultDevice, ENGINE_CCS, 0); 75 | addSimpleBatchBuffer(ctxt, defaultMemoryBank); 76 | ctxt->pollForCompletion(); 77 | } 78 | 79 | TEST_F(AubTbxSimpleBatchBuffer, pollForCompletion) { 80 | initializeStream(desc); 81 | 82 | ctxt = mgr->createHardwareContext(defaultDevice, ENGINE_RCS, 0); 83 | ctxt->pollForCompletion(); 84 | } 85 | -------------------------------------------------------------------------------- /tests/unit_tests/settings_reader_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gtest/gtest.h" 9 | #include "aub_mem_dump/settings.h" 10 | #include "aub_mem_dump/settings_reader.h" 11 | #include 12 | #include 13 | 14 | using namespace aub_stream; 15 | 16 | namespace mock_os_calls { 17 | extern std::unordered_map environmentStrings; 18 | } 19 | 20 | TEST(EnvReader, givenEnvironmentWhenReadingSettingThenCorrectValuesReturned) { 21 | 22 | mock_os_calls::environmentStrings["first"] = "6"; 23 | mock_os_calls::environmentStrings["second"] = "test"; 24 | mock_os_calls::environmentStrings["third"] = "123456789"; 25 | mock_os_calls::environmentStrings["fourth"] = "0"; 26 | 27 | EnvironmentReader reader; 28 | 29 | int32_t value = reader.getSetting("first", 0); 30 | int64_t value64 = reader.getSetting("third", 0); 31 | bool logical = reader.getSetting("fourth", true); 32 | std::string test = reader.getSetting("second", std::string("abc")); 33 | 34 | EXPECT_EQ(6, value); 35 | EXPECT_EQ(123456789, value64); 36 | EXPECT_FALSE(logical); 37 | EXPECT_STREQ("test", test.c_str()); 38 | 39 | mock_os_calls::environmentStrings.clear(); 40 | 41 | value = reader.getSetting("first", 4); 42 | value64 = reader.getSetting("third", 5); 43 | logical = reader.getSetting("fourth", true); 44 | test = reader.getSetting("second", std::string("abc")); 45 | 46 | EXPECT_EQ(4, value); 47 | EXPECT_EQ(5, value64); 48 | EXPECT_TRUE(logical); 49 | EXPECT_STREQ("abc", test.c_str()); 50 | } 51 | 52 | TEST(Settings, givenEnvironmentSettingPresentWhenGettingSettingThenCorrectValueReturned) { 53 | if (Settings::disabled()) { 54 | GTEST_SKIP(); 55 | } 56 | mock_os_calls::environmentStrings["AUBSTREAM_PrintSettings"] = "1"; 57 | std::stringstream outStream; 58 | Settings settings(&outStream); 59 | 60 | EXPECT_TRUE(settings.PrintSettings.get()); 61 | 62 | EXPECT_STREQ("AUBSTREAM_PrintSettings = 1\n", outStream.str().c_str()); 63 | 64 | mock_os_calls::environmentStrings.clear(); 65 | } 66 | 67 | TEST(Settings, givenPrintSettingsEnvWhenSettingsCreatedThenNonDefaultSettingsArePrinted) { 68 | if (Settings::disabled()) { 69 | GTEST_SKIP(); 70 | } 71 | mock_os_calls::environmentStrings["AUBSTREAM_PrintSettings"] = "1"; 72 | 73 | ::testing::internal::CaptureStdout(); 74 | Settings settings; 75 | 76 | std::string output = testing::internal::GetCapturedStdout(); 77 | EXPECT_STREQ("AUBSTREAM_PrintSettings = 1\n", output.c_str()); 78 | 79 | mock_os_calls::environmentStrings.clear(); 80 | } -------------------------------------------------------------------------------- /aub_mem_dump/xe2_hpg_core/command_streamer_helper_xe2_hpg_core.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/xe_core/command_streamer_helper_xe_core.h" 10 | 11 | namespace aub_stream { 12 | 13 | template 14 | struct CommandStreamerHelperXe2HpgCore : public CommandStreamerHelperXeCore { 15 | using CommandStreamerHelperXeCore::CommandStreamerHelperXeCore; 16 | 17 | const MMIOList getEngineMMIO() const override; 18 | 19 | using Helper::mmioDevice; 20 | using Helper::mmioEngine; 21 | }; 22 | 23 | struct GpuXe2HpgCore : public GpuXeCore { 24 | GpuXe2HpgCore(); 25 | static constexpr uint32_t numSupportedDevices = 1; 26 | static constexpr uint64_t patIndexBit0 = toBitValue(3); 27 | static constexpr uint64_t patIndexBit1 = toBitValue(4); 28 | static constexpr uint64_t patIndexBit2 = toBitValue(7); 29 | static constexpr uint64_t patIndexBit3 = toBitValue(62); 30 | static constexpr uint64_t patIndex0 = 0; // 0b0000 31 | static constexpr uint64_t patIndex3 = patIndexBit1 | patIndexBit0; // 0b0011 32 | static constexpr uint64_t patIndex9 = patIndexBit3 | patIndexBit0; // 0b1001 33 | static constexpr uint64_t patIndex12 = patIndexBit3 | patIndexBit2; // 0b1100 34 | 35 | CommandStreamerHelper &getCommandStreamerHelper(uint32_t device, EngineType engineType) const override; 36 | const std::vector getSupportedEngines() const override; 37 | 38 | static constexpr uint32_t getPatIndexMmioAddr(uint32_t index); 39 | const MMIOList getGlobalMMIO() const override; 40 | 41 | uint64_t getPPGTTExtraEntryBits(const AllocationParams::AdditionalParams &allocationParams) const override; 42 | PageTable *allocatePPGTT(PhysicalAddressAllocator *physicalAddressAllocator, uint32_t memoryBank, uint64_t gpuAddressSpace) const override; 43 | bool isValidDataStolenMemorySize(uint64_t dataStolenMemorySize) const override; 44 | uint32_t sizeToGMS(uint64_t dataStolenMemorySize) const; 45 | 46 | void initializeDefaultMemoryPools(AubStream &stream, uint32_t devicesCount, uint64_t memoryBankSize) const override; 47 | void initializeFlatCcsBaseAddressMmio(AubStream &stream, uint32_t deviceIndex, uint64_t flatCcsBaseAddress, uint64_t size) const; 48 | void initializeTileRangeMmio(AubStream &stream, uint32_t deviceIndex, uint64_t lmemBaseAddress, uint64_t lmemSize) const; 49 | 50 | bool isMemorySupported(uint32_t memoryBanks, uint32_t alignment) const override; 51 | std::unique_ptr commandStreamerHelperTable[numSupportedDevices][EngineType::NUM_ENGINES]; 52 | }; 53 | } // namespace aub_stream 54 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3_core/ptl/command_stream_helper_tests_ptl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | #include "aubstream/engine_node.h" 14 | #include "tests/unit_tests/command_stream_helper_tests.h" 15 | 16 | #include "test_defaults.h" 17 | #include "test.h" 18 | 19 | #include 20 | 21 | using namespace aub_stream; 22 | 23 | TEST_F(CommandStreamerHelperTest, givenPtlAndMemoryAlignment4KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemIsReturnedTrue) { 24 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Ptl); 25 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 26 | auto pageSize = 4096u; 27 | 28 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 29 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 30 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 31 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 32 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 33 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 34 | } 35 | 36 | TEST_F(CommandStreamerHelperTest, givenPtlAndMemoryAlignment64KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemIsReturnedTrue) { 37 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Ptl); 38 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 39 | auto pageSize = 65536u; 40 | 41 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 42 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 43 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 44 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 45 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 46 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 47 | } 48 | 49 | TEST_F(CommandStreamerHelperTest, givenPtlAndMemoryAlignment1bWhenCheckIsMemorySupportedThenReturnFalse) { 50 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Ptl); 51 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 52 | auto pageSize = 1u; 53 | 54 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 55 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 56 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 57 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 58 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 59 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 60 | } 61 | -------------------------------------------------------------------------------- /tests/unit_tests/xe2_hpg_core/lnl/command_stream_helper_tests_lnl.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/command_streamer_helper.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | 13 | #include "aubstream/engine_node.h" 14 | #include "tests/unit_tests/command_stream_helper_tests.h" 15 | 16 | #include "test_defaults.h" 17 | #include "test.h" 18 | 19 | #include 20 | 21 | using namespace aub_stream; 22 | 23 | TEST_F(CommandStreamerHelperTest, givenLnlAndMemoryAlignment4KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemIsReturnedTrue) { 24 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Lnl); 25 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 26 | auto pageSize = 4096u; 27 | 28 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 29 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 30 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 31 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 32 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 33 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 34 | } 35 | 36 | TEST_F(CommandStreamerHelperTest, givenLnlAndMemoryAlignment64KbWhenCheckIsMemorySupportedThenOnlyForMemoryBankSystemIsReturnedTrue) { 37 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Lnl); 38 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 39 | auto pageSize = 65536u; 40 | 41 | EXPECT_TRUE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 42 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 43 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 44 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 45 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 46 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 47 | } 48 | 49 | TEST_F(CommandStreamerHelperTest, givenLnlAndMemoryAlignment1bWhenCheckIsMemorySupportedThenReturnFalse) { 50 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Lnl); 51 | auto &rcs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_RCS); 52 | auto pageSize = 1u; 53 | 54 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_SYSTEM, pageSize)); 55 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_0, pageSize)); 56 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_1, pageSize)); 57 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_2, pageSize)); 58 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_3, pageSize)); 59 | EXPECT_FALSE(rcs.isMemorySupported(MEMORY_BANK_4, pageSize)); 60 | } 61 | -------------------------------------------------------------------------------- /tests/unit_tests/memory_bank_helper_tests.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "gtest/gtest.h" 9 | #include "aub_mem_dump/memory_bank_helper.h" 10 | 11 | using namespace aub_stream; 12 | 13 | TEST(MemoryBankHelper, whenZeroMemoryBankPassedThenGetMemoryBankReturnsZero) { 14 | MemoryBankHelper bankHelper(0, 0x1000, 0x1000); 15 | 16 | EXPECT_EQ(0u, bankHelper.getMemoryBank(0)); 17 | EXPECT_EQ(0u, bankHelper.getMemoryBank(0x1000)); 18 | } 19 | 20 | TEST(MemoryBankHelper, whenSinlgeMemoryBankPassedThenGetMemoryBankReturnsTheCorrectBank) { 21 | MemoryBankHelper bankHelper(2, 0x1000, 0x2000); 22 | 23 | EXPECT_EQ(2u, bankHelper.getMemoryBank(0x1000)); 24 | EXPECT_EQ(2u, bankHelper.getMemoryBank(0x2000)); 25 | } 26 | 27 | TEST(MemoryBankHelper, whenTwoMemoryBanksPassedThenNumberOfBanksIsCorrect) { 28 | MemoryBankHelper bankHelper(9, 0x1000, 0x2000); 29 | 30 | EXPECT_EQ(2u, bankHelper.numberOfBanks); 31 | EXPECT_EQ(1u, bankHelper.singleBanks[0]); 32 | EXPECT_EQ(8u, bankHelper.singleBanks[1]); 33 | } 34 | 35 | TEST(MemoryBankHelper, whenMultipleMemoryBanksPassedThenGetMemoryBankReturnsBankBasedOnCurrentAddressAndStepSize) { 36 | uint64_t initialGfxAddress = 0x1000; 37 | uint64_t gfxAddress = 0x1000; 38 | size_t numberOfBanks = 3; 39 | size_t totalSize = 0x3000; 40 | size_t stepSize = totalSize / numberOfBanks; 41 | 42 | MemoryBankHelper bankHelper(7, initialGfxAddress, totalSize); 43 | 44 | EXPECT_EQ(1u, bankHelper.getMemoryBank(gfxAddress)); 45 | gfxAddress += stepSize; 46 | EXPECT_EQ(2u, bankHelper.getMemoryBank(gfxAddress)); 47 | gfxAddress += stepSize; 48 | EXPECT_EQ(4u, bankHelper.getMemoryBank(gfxAddress)); 49 | } 50 | 51 | TEST(MemoryBankHelper, givenMultipleMemoryBanksWhenPassingAddressWithinOneColorSizeThenGetMemoryBankReturnsCorrectBank) { 52 | uint64_t initialGfxAddress = 0x1000; 53 | uint64_t gfxAddress = 0x1000; 54 | size_t totalSize = 0x9000; 55 | MemoryBankHelper bankHelper(7, initialGfxAddress, totalSize); 56 | 57 | EXPECT_EQ(1u, bankHelper.getMemoryBank(gfxAddress)); 58 | gfxAddress += 0x1000; 59 | EXPECT_EQ(1u, bankHelper.getMemoryBank(gfxAddress)); 60 | gfxAddress += 0x1000; 61 | EXPECT_EQ(1u, bankHelper.getMemoryBank(gfxAddress)); 62 | gfxAddress += 0x1000; 63 | EXPECT_EQ(2u, bankHelper.getMemoryBank(gfxAddress)); 64 | gfxAddress += 0x1000; 65 | EXPECT_EQ(2u, bankHelper.getMemoryBank(gfxAddress)); 66 | gfxAddress += 0x1000; 67 | EXPECT_EQ(2u, bankHelper.getMemoryBank(gfxAddress)); 68 | gfxAddress += 0x1000; 69 | EXPECT_EQ(4u, bankHelper.getMemoryBank(gfxAddress)); 70 | } 71 | 72 | TEST(MemoryBankHelper, givenMultipleMemoryBanksWhenBankHelperIsCreatedThenCorrectColorSizeIsUsed) { 73 | uint64_t initialGfxAddress = 0x1000; 74 | size_t totalSize = 0x20000; 75 | MemoryBankHelper bankHelper(0xf, initialGfxAddress, totalSize); 76 | 77 | EXPECT_EQ(totalSize / 4, bankHelper.colorSize); 78 | } 79 | -------------------------------------------------------------------------------- /include/aubstream/hint_values.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | namespace aub_stream { 10 | struct DataTypeHintValues { 11 | enum { 12 | TraceNotype = 0, 13 | TraceBatchBuffer = 1, 14 | TraceBinBuffer = 2, 15 | TraceBinPointerList = 3, 16 | TraceSlowStateBuffer = 4, 17 | TraceVertexBufferState = 5, 18 | Trace2DMap = 6, 19 | TraceCubeMap = 7, 20 | TraceIndirectStateBuffer = 8, 21 | TraceVolumeMap = 9, 22 | Trace1DMap = 10, 23 | TraceConstantBuffer = 11, 24 | TraceConstantUrbEntry = 12, 25 | TraceIndexBuffer = 13, 26 | TraceVertexShaderState = 16, 27 | TraceGeometryShaderState = 17, 28 | TraceClipperState = 18, 29 | TraceStripsFansState = 19, 30 | TraceWindowerIzState = 20, 31 | TraceColorCalcState = 21, 32 | TraceClipViewport = 22, 33 | TraceSfViewport = 23, 34 | TraceCcViewport = 24, 35 | TraceSamplerState = 25, 36 | TraceKernelInstructions = 26, 37 | TraceScratchSpace = 27, 38 | TraceSamplerDefaultColor = 28, 39 | TraceInterfaceDescriptor = 29, 40 | TraceVldState = 30, 41 | TraceVfeState = 31, 42 | TraceBlendState = 32, 43 | TraceDepthStencilState = 33, 44 | TraceBindingTableState = 34, 45 | TraceRenderSurfaceState = 35, 46 | TraceMediaObjectIndirectData = 36, 47 | TraceRemap = 37, 48 | TraceCommandBuffer = 38, 49 | TraceCommandBufferPrimary = 39, 50 | TraceCommandBufferBlt = 40, 51 | TraceCommandBufferMfx = 41, 52 | TraceBatchBufferPrimary = 42, 53 | TraceBatchBufferBlt = 43, 54 | TraceBatchBufferMfx = 44, 55 | TraceAudioCommandBuffer = 45, 56 | TraceAudioLinkTable = 46, 57 | TraceAudioData = 47, 58 | TraceLogicalRingContextRcs = 48, 59 | TraceLogicalRingContextBcs = 49, 60 | TraceLogicalRingContextVcs = 50, 61 | TraceLogicalRingContextVecs = 51, 62 | TraceExtendedRootTableEntry = 52, 63 | TraceExtendedContextTableEntry = 53, 64 | TracePasidTableEntry = 54, 65 | TraceRingContextRcs = 55, 66 | TraceRingContextBcs = 56, 67 | TraceRingContextVcs = 57, 68 | TraceRingContextVecs = 58, 69 | TraceLri = 59, 70 | TraceGucProcessDescriptor = 60, 71 | TraceGucContextDescriptor = 61, 72 | TraceDummyGgttEntry = 62, 73 | TraceLogicalRingContextCcs = 64, 74 | TracePpgttLevel1 = 65, 75 | TracePpgttLevel2 = 66, 76 | TracePpgttLevel3 = 67, 77 | TracePpgttLevel4 = 68, 78 | TracePpgttLevel5 = 69, 79 | TraceIndirectRingContextRcs = 70, 80 | TraceIndirectRingContextBcs = 71, 81 | TraceIndirectRingContextVcs = 72, 82 | TraceIndirectRingContextVecs = 73, 83 | TraceIndirectRingContextCcs = 74, 84 | }; 85 | }; 86 | } // namespace aub_stream 87 | -------------------------------------------------------------------------------- /.clang-format: -------------------------------------------------------------------------------- 1 | --- 2 | Language: Cpp 3 | # BasedOnStyle: LLVM 4 | AccessModifierOffset: -2 5 | AlignAfterOpenBracket: Align 6 | AlignConsecutiveAssignments: false 7 | AlignConsecutiveDeclarations: false 8 | AlignEscapedNewlinesLeft: false 9 | AlignOperands: true 10 | AlignTrailingComments: true 11 | AllowAllParametersOfDeclarationOnNextLine: true 12 | AllowShortBlocksOnASingleLine: false 13 | AllowShortCaseLabelsOnASingleLine: false 14 | AllowShortFunctionsOnASingleLine: All 15 | AllowShortIfStatementsOnASingleLine: false 16 | AllowShortLoopsOnASingleLine: false 17 | AlwaysBreakAfterDefinitionReturnType: None 18 | AlwaysBreakAfterReturnType: None 19 | AlwaysBreakBeforeMultilineStrings: false 20 | AlwaysBreakTemplateDeclarations: false 21 | BinPackArguments: true 22 | BinPackParameters: true 23 | BraceWrapping: 24 | AfterClass: false 25 | AfterControlStatement: false 26 | AfterEnum: false 27 | AfterFunction: false 28 | AfterNamespace: false 29 | AfterObjCDeclaration: false 30 | AfterStruct: false 31 | AfterUnion: false 32 | BeforeCatch: false 33 | BeforeElse: false 34 | IndentBraces: false 35 | BreakBeforeBinaryOperators: false 36 | BreakBeforeBraces: Attach 37 | BreakBeforeTernaryOperators: true 38 | BreakConstructorInitializersBeforeComma: false 39 | # clang-format > v3.8.0: BreakAfterJavaFieldAnnotations: false 40 | # clang-format > v3.8.0: BreakStringLiterals: true 41 | ColumnLimit: 0 42 | CommentPragmas: '^ IWYU pragma:' 43 | ConstructorInitializerAllOnOneLineOrOnePerLine: false 44 | ConstructorInitializerIndentWidth: 4 45 | ContinuationIndentWidth: 4 46 | Cpp11BracedListStyle: true 47 | DerivePointerAlignment: false 48 | DisableFormat: false 49 | ExperimentalAutoDetectBinPacking: false 50 | ForEachMacros: [ foreach, Q_FOREACH, BOOST_FOREACH ] 51 | IncludeCategories: 52 | - Regex: '^"(llvm|llvm-c|clang|clang-c)/' 53 | Priority: 2 54 | - Regex: '^(<|"(gtest|isl|json)/)' 55 | Priority: 3 56 | - Regex: '.*' 57 | Priority: 1 58 | IndentCaseLabels: false 59 | IndentWidth: 4 60 | IndentWrappedFunctionNames: false 61 | KeepEmptyLinesAtTheStartOfBlocks: true 62 | MacroBlockBegin: '' 63 | MacroBlockEnd: '' 64 | MaxEmptyLinesToKeep: 1 65 | NamespaceIndentation: None 66 | ObjCBlockIndentWidth: 2 67 | ObjCSpaceAfterProperty: false 68 | ObjCSpaceBeforeProtocolList: true 69 | PenaltyBreakBeforeFirstCallParameter: 19 70 | PenaltyBreakComment: 300 71 | PenaltyBreakFirstLessLess: 120 72 | PenaltyBreakString: 1000 73 | PenaltyExcessCharacter: 1000000 74 | PenaltyReturnTypeOnItsOwnLine: 60 75 | PointerAlignment: Right 76 | ReflowComments: true 77 | SortIncludes: false 78 | SpaceAfterCStyleCast: false 79 | SpaceBeforeAssignmentOperators: true 80 | SpaceBeforeParens: ControlStatements 81 | SpaceInEmptyParentheses: false 82 | SpacesBeforeTrailingComments: 1 83 | SpacesInAngles: false 84 | SpacesInContainerLiterals: true 85 | SpacesInCStyleCastParentheses: false 86 | SpacesInParentheses: false 87 | SpacesInSquareBrackets: false 88 | Standard: Cpp11 89 | TabWidth: 8 90 | UseTab: Never 91 | ... 92 | 93 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/gpu_tests_xe_hpg_core.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/memory_banks.h" 9 | #include "aub_mem_dump/options.h" 10 | #include "aub_mem_dump/family_mapper.h" 11 | #include "aub_mem_dump/command_streamer_helper.h" 12 | #include "tests/unit_tests/command_stream_helper_tests.h" 13 | 14 | #include "test_defaults.h" 15 | #include "tests/unit_tests/mock_aub_stream.h" 16 | #include "test.h" 17 | 18 | using namespace aub_stream; 19 | using ::testing::_; 20 | using ::testing::AtLeast; 21 | using ::testing::Return; 22 | 23 | TEST(Gpu, givenOneDeviceWhenSetMemoryBankSizeThenOnlyDefinedOneBank) { 24 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::XeHpgCore); 25 | 26 | MockAubStreamBase stream; 27 | EXPECT_CALL(stream, writeMMIO(0x4900, _)).Times(0); 28 | EXPECT_CALL(stream, writeMMIO(0x4904, _)).Times(0); 29 | EXPECT_CALL(stream, writeMMIO(0x4908, _)).Times(0); 30 | EXPECT_CALL(stream, writeMMIO(0x490c, _)).Times(0); 31 | 32 | auto deviceCount = 1; 33 | auto memoryBankSize = 2 * GB; 34 | gpu->setMemoryBankSize(stream, deviceCount, memoryBankSize); 35 | } 36 | 37 | TEST(Gpu, givenOneDeviceWhenSetGGTTBaseAddressThenIsProgrammedForOneTile) { 38 | TEST_REQUIRES(gpu->gfxCoreFamily == CoreFamily::XeHpgCore); 39 | 40 | MockAubStreamBase stream; 41 | EXPECT_CALL(stream, writeMMIO(0x108100, 0xff000000)).Times(1); 42 | EXPECT_CALL(stream, writeMMIO(0x108104, 0x00000007)).Times(1); 43 | EXPECT_CALL(stream, writeMMIO(0x108108, _)).Times(0); 44 | EXPECT_CALL(stream, writeMMIO(0x10810c, _)).Times(0); 45 | EXPECT_CALL(stream, writeMMIO(0x108110, _)).Times(0); 46 | EXPECT_CALL(stream, writeMMIO(0x108114, _)).Times(0); 47 | EXPECT_CALL(stream, writeMMIO(0x108118, _)).Times(0); 48 | EXPECT_CALL(stream, writeMMIO(0x1108100, _)).Times(0); 49 | EXPECT_CALL(stream, writeMMIO(0x1108104, _)).Times(0); 50 | EXPECT_CALL(stream, writeMMIO(0x2108100, _)).Times(0); 51 | EXPECT_CALL(stream, writeMMIO(0x2108104, _)).Times(0); 52 | EXPECT_CALL(stream, writeMMIO(0x3108100, _)).Times(0); 53 | EXPECT_CALL(stream, writeMMIO(0x3108104, _)).Times(0); 54 | 55 | auto deviceCount = 1; 56 | auto memoryBankSize = 32ull * GB; 57 | gpu->stolenMemory = StolenMemory::CreateStolenMemory(false, deviceCount, memoryBankSize, gpu->getStolenMemorySize(memoryBankSize)); 58 | gpu->setGGTTBaseAddresses(stream, deviceCount, memoryBankSize); 59 | } 60 | 61 | struct XeHPGCoreMatcher { 62 | static bool isXeHpgCore(const aub_stream::Gpu *gpu) { 63 | return gpu->gfxCoreFamily == aub_stream::CoreFamily::XeHpgCore; 64 | } 65 | }; 66 | 67 | using XeHpgCoreCsTest = CommandStreamerHelperTest; 68 | HWTEST_F(XeHpgCoreCsTest, GivenCcsEngineWhenInitializingEngineThenMiModeNestedBBIsSetToZero, XeHPGCoreMatcher::isXeHpgCore) { 69 | auto &ccs = gpu->getCommandStreamerHelper(defaultDevice, ENGINE_CCS); 70 | 71 | PhysicalAddressAllocatorSimple allocator; 72 | PML4 pageTable(*gpu, &allocator, defaultMemoryBank); 73 | 74 | EXPECT_CALL(stream, writeMMIO(_, _)).WillRepeatedly(Return()); 75 | EXPECT_CALL(stream, writeMMIO(ccs.mmioEngine + 0x0209c, 0x10000000)).Times(1); 76 | ccs.initializeEngineMMIO(stream); 77 | } 78 | -------------------------------------------------------------------------------- /tests/unit_tests/xe3p_core/cri/gpu_tests_cri.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "gtest/gtest.h" 10 | #include "aub_mem_dump/memory_banks.h" 11 | #include "tests/unit_tests/mock_aub_stream.h" 12 | 13 | #include "gmock/gmock.h" 14 | #include "test.h" 15 | 16 | using namespace aub_stream; 17 | using ::testing::_; 18 | 19 | TEST(Cri, gpuCriWhenCheckingDeviceIdThenReturnCorrectDeviceId) { 20 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Cri); 21 | 22 | EXPECT_EQ(0u, gpu->deviceId); 23 | } 24 | 25 | TEST(Cri, givenCriWhenAllocatePpgttThenUseAllocatePML5) { 26 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Cri); 27 | PhysicalAddressAllocatorSimple allocator; 28 | 29 | auto ppgtt = std::unique_ptr(gpu->allocatePPGTT(&allocator, MEMORY_BANK_0, maxNBitValue(57))); 30 | EXPECT_EQ(57u, ppgtt->getNumAddressBits()); 31 | } 32 | 33 | TEST(Cri, givenCriWhenInitializingGlobalMmiosThenProgramMocsAndPatIndex) { 34 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Cri); 35 | MockAubFileStream stream; 36 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(::testing::AtLeast(0)); 37 | 38 | // MOCS 39 | EXPECT_CALL(stream, writeMMIO(0x4000, 0b0000'0000'1100)).Times(1); 40 | EXPECT_CALL(stream, writeMMIO(0x4004, 0b0001'0011'1100)).Times(1); 41 | EXPECT_CALL(stream, writeMMIO(0x4008, 0b0001'0000'1100)).Times(1); 42 | EXPECT_CALL(stream, writeMMIO(0x400C, 0b0001'0011'0000)).Times(1); 43 | EXPECT_CALL(stream, writeMMIO(0x4010, 0b0001'0000'0000)).Times(1); 44 | 45 | // PAT 46 | EXPECT_CALL(stream, writeMMIO(0x4800, 0b0000'0000'0000)).Times(1); 47 | EXPECT_CALL(stream, writeMMIO(0x4804, 0b0000'0000'0010)).Times(1); 48 | EXPECT_CALL(stream, writeMMIO(0x4808, 0b0000'0000'0011)).Times(1); 49 | EXPECT_CALL(stream, writeMMIO(0x480C, 0b0000'0011'1100)).Times(1); 50 | EXPECT_CALL(stream, writeMMIO(0x4810, 0b0000'0011'1110)).Times(1); 51 | EXPECT_CALL(stream, writeMMIO(0x4814, 0b0000'0011'0000)).Times(1); 52 | EXPECT_CALL(stream, writeMMIO(0x4818, 0b0000'0011'0010)).Times(1); 53 | EXPECT_CALL(stream, writeMMIO(0x481C, 0b0000'0011'0011)).Times(1); 54 | EXPECT_CALL(stream, writeMMIO(0x4848, 0b0000'0000'1100)).Times(1); 55 | EXPECT_CALL(stream, writeMMIO(0x484C, 0b0000'0000'1110)).Times(1); 56 | EXPECT_CALL(stream, writeMMIO(0x4850, 0b0000'0000'1111)).Times(1); 57 | EXPECT_CALL(stream, writeMMIO(0x4884, 0b0000'0100'0000)).Times(1); 58 | EXPECT_CALL(stream, writeMMIO(0x4888, 0b0000'0100'0010)).Times(1); 59 | EXPECT_CALL(stream, writeMMIO(0x488C, 0b0000'0100'0011)).Times(1); 60 | EXPECT_CALL(stream, writeMMIO(0x4890, 0b0000'1000'0000)).Times(1); 61 | EXPECT_CALL(stream, writeMMIO(0x4894, 0b0000'1000'0010)).Times(1); 62 | EXPECT_CALL(stream, writeMMIO(0x4898, 0b0000'1000'0011)).Times(1); 63 | EXPECT_CALL(stream, writeMMIO(0x489C, 0b0000'1100'0000)).Times(1); 64 | EXPECT_CALL(stream, writeMMIO(0x48A0, 0b0000'1100'0010)).Times(1); 65 | EXPECT_CALL(stream, writeMMIO(0x48A4, 0b0000'1100'0011)).Times(1); 66 | 67 | EXPECT_CALL(stream, writeMMIO(0x47FC, 0b0000'0000'0011)).Times(1); 68 | EXPECT_CALL(stream, writeMMIO(0x4820, 0b0000'0000'0000)).Times(1); 69 | 70 | gpu->initializeGlobalMMIO(stream, 1, 1, 0); 71 | } 72 | -------------------------------------------------------------------------------- /tests/unit_tests/xe_hpg_core/dg2/gpu_tests_dg2.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "aub_mem_dump/memory_banks.h" 9 | #include "aub_mem_dump/options.h" 10 | #include "test_defaults.h" 11 | #include "tests/unit_tests/mock_aub_stream.h" 12 | #include "test.h" 13 | 14 | using namespace aub_stream; 15 | using ::testing::_; 16 | using ::testing::AtLeast; 17 | 18 | TEST(Gpu, gpuDg2ReturnsCorrectDeviceId) { 19 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 20 | 21 | EXPECT_EQ(0x24, gpu->deviceId); 22 | } 23 | 24 | TEST(Gpu, givenDg2WhenInitializeDefaultMemoryPoolsThenNotInitializeFlatCcsBaseAddressPtr) { 25 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 26 | constexpr uint32_t mmioDeviceOffset = 16 * MB; 27 | constexpr uint32_t numDevices = 4; 28 | constexpr uint64_t perDeviceHbmSize = 8llu * GB; 29 | 30 | MockTbxStream stream; 31 | gpu->stolenMemory = StolenMemory::CreateStolenMemory(false, numDevices, perDeviceHbmSize, 1 * MB); 32 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(AtLeast(0)); 33 | 34 | for (uint32_t i = 0; i > numDevices; i++) { 35 | uint64_t flatCcsBaseAddress = perDeviceHbmSize * (i + 1); // device local memory ending 36 | flatCcsBaseAddress -= 9 * MB; // wopcm and ggtt 37 | flatCcsBaseAddress -= (perDeviceHbmSize / 256); // flat_ccs size 38 | uint32_t mmioValue = static_cast(flatCcsBaseAddress >> 8); // [8:31] base ptr 39 | mmioValue |= 1; // [0] enable bit 40 | 41 | EXPECT_CALL(stream, writeMMIO((i * mmioDeviceOffset) + 0x00004910, mmioValue)).Times(0); 42 | } 43 | 44 | gpu->initializeDefaultMemoryPools(stream, numDevices, perDeviceHbmSize); 45 | } 46 | 47 | TEST(Gpu, givenDg2AndFileStreamWhenInitializeDefaultMemoryPoolsThenFlatCcsBaseAddressIsProgrammed) { 48 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 49 | 50 | MockAubFileStream stream; 51 | gpu->stolenMemory = StolenMemory::CreateStolenMemory(false, 1, 1, 1 & MB); 52 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(AtLeast(0)); 53 | EXPECT_CALL(stream, writeMMIO(0x00004910, _)).Times(0); 54 | 55 | gpu->initializeDefaultMemoryPools(stream, 1, 1); 56 | } 57 | 58 | TEST(Gpu, givenDg2AndTbxStreamInitializeDefaultMemoryPoolsThenFlatCcsBaseAddressIsProgrammed) { 59 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 60 | 61 | MockTbxStream stream; 62 | gpu->stolenMemory = StolenMemory::CreateStolenMemory(false, 1, 16 * MB, 1 * MB); 63 | EXPECT_CALL(stream, writeMMIO(_, _)).Times(AtLeast(0)); 64 | EXPECT_CALL(stream, writeMMIO(0x00004910, _)).Times(1); 65 | 66 | gpu->initializeDefaultMemoryPools(stream, 1, 1); 67 | } 68 | TEST(Gpu, givenDg2WhenCheckEngineSuportThenAllExpectedEnginesAreSupported) { 69 | TEST_REQUIRES(gpu->productFamily == ProductFamily::Dg2); 70 | EXPECT_TRUE(gpu->isEngineSupported(ENGINE_RCS)); 71 | EXPECT_TRUE(gpu->isEngineSupported(ENGINE_BCS)); 72 | EXPECT_TRUE(gpu->isEngineSupported(ENGINE_CCS)); 73 | EXPECT_TRUE(gpu->isEngineSupported(ENGINE_CCS1)); 74 | EXPECT_TRUE(gpu->isEngineSupported(ENGINE_CCS2)); 75 | EXPECT_TRUE(gpu->isEngineSupported(ENGINE_CCS3)); 76 | } 77 | -------------------------------------------------------------------------------- /tests/unit_tests/mock_physical_address_allocator.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_mem_dump/physical_address_allocator.h" 10 | #include "gmock/gmock.h" 11 | 12 | namespace aub_stream { 13 | 14 | template 15 | struct MockSimpleAllocator : public SimpleAllocator { 16 | using BaseClass = SimpleAllocator; 17 | using BaseClass::freeAllocationsMap; 18 | using BaseClass::nextAddress; 19 | using BaseClass::usedAllocationsMap; 20 | 21 | explicit MockSimpleAllocator(AddressType firstAddress) 22 | : BaseClass(firstAddress) { 23 | } 24 | 25 | virtual AddressType alignedAlloc(size_t size, AddressType alignment) override { 26 | alignedAllocCalled = true; 27 | return BaseClass::alignedAlloc(size, alignment); 28 | } 29 | 30 | virtual void alignedFree(uint64_t address) override { 31 | alignedFreeCalled = true; 32 | return BaseClass::alignedFree(address); 33 | } 34 | bool alignedAllocCalled = false; 35 | bool alignedFreeCalled = false; 36 | }; 37 | 38 | struct MockPhysicalAddressAllocatorSimple : public PhysicalAddressAllocatorSimple { 39 | MockPhysicalAddressAllocatorSimple() : PhysicalAddressAllocatorSimple() { 40 | } 41 | 42 | MockPhysicalAddressAllocatorSimple(uint32_t numberOfAllocators, size_t singleAllocatorSize, bool localMemorySupport) : PhysicalAddressAllocatorSimple(numberOfAllocators, singleAllocatorSize, localMemorySupport) { 43 | } 44 | 45 | using PhysicalAddressAllocatorSimple::allocators; 46 | using PhysicalAddressAllocatorSimple::mainAllocator; 47 | using PhysicalAddressAllocatorSimple::numberOfAllocators; 48 | }; 49 | 50 | struct MockPhysicalAddressAllocatorHeap : public PhysicalAddressAllocatorHeap { 51 | MockPhysicalAddressAllocatorHeap() : PhysicalAddressAllocatorHeap() { 52 | } 53 | 54 | using PhysicalAddressAllocatorHeap::storage; 55 | }; 56 | 57 | struct MockPhysicalAddressAllocatorSimpleAndSHM4Mapper : public PhysicalAddressAllocatorSimpleAndSHM4Mapper { 58 | MockPhysicalAddressAllocatorSimpleAndSHM4Mapper(uint32_t numberOfAllocators, uint64_t singleAllocatorSize, bool localMemorySupport, SharedMemoryInfo *smInfo) : PhysicalAddressAllocatorSimpleAndSHM4Mapper(numberOfAllocators, singleAllocatorSize, localMemorySupport, smInfo) { 59 | } 60 | MOCK_METHOD3(reservePhysicalMemory, uint64_t(uint32_t memoryBank, size_t size, size_t alignment)); 61 | MOCK_METHOD5(translatePhysicalAddressToSystemMemory, void(uint64_t physAddress, size_t size, bool isLocalMemory, void *&p, size_t &availableSize)); 62 | uint64_t reservePhysicalMemoryBase(uint32_t memoryBank, size_t size, size_t alignment) { return PhysicalAddressAllocatorSimpleAndSHM4Mapper::reservePhysicalMemory(memoryBank, size, alignment); }; 63 | void translatePhysicalAddressToSystemMemoryBase(uint64_t physAddress, size_t size, bool isLocalMemory, void *&p, size_t &availableSize) { PhysicalAddressAllocatorSimpleAndSHM4Mapper::translatePhysicalAddressToSystemMemory(physAddress, size, isLocalMemory, p, availableSize); }; 64 | using PhysicalAddressAllocatorSimple::allocators; 65 | using PhysicalAddressAllocatorSimple::numberOfAllocators; 66 | using PhysicalAddressAllocatorSimpleAndSHM4Mapper::storage; 67 | }; 68 | 69 | } // namespace aub_stream 70 | -------------------------------------------------------------------------------- /include/aubstream/aub_manager.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include 10 | #include 11 | #include 12 | #include "allocation_params.h" 13 | #include "page_info.h" 14 | #include "shared_mem_info.h" 15 | #include "physical_allocation_info.h" 16 | 17 | namespace aub_stream { 18 | 19 | struct HardwareContext; 20 | struct CreateHardwareContext2Params; 21 | struct HardwareContextParamsHeader; 22 | 23 | struct AubManagerOptions { 24 | uint32_t version{}; 25 | uint32_t productFamily{}; 26 | uint32_t devicesCount{}; 27 | uint64_t memoryBankSize{}; 28 | uint32_t stepping{}; 29 | bool localMemorySupported{}; 30 | uint32_t mode{}; 31 | uint64_t gpuAddressSpace{}; 32 | SharedMemoryInfo sharedMemoryInfo{}; 33 | bool throwOnError{}; 34 | uint64_t dataStolenMemorySize{}; 35 | }; 36 | 37 | class AubManager { 38 | public: 39 | virtual ~AubManager() = default; 40 | 41 | virtual HardwareContext *createHardwareContext(uint32_t device, uint32_t engine, uint32_t flags) = 0; 42 | 43 | virtual void open(const std::string &aubFileName) = 0; 44 | virtual void close() = 0; 45 | virtual bool isOpen() = 0; 46 | virtual const std::string getFileName() = 0; 47 | virtual void pause(bool onoff) = 0; 48 | 49 | virtual void addComment(const char *message) = 0; 50 | virtual void writeMemory(uint64_t gfxAddress, const void *memory, size_t size, uint32_t memoryBanks, int hint, size_t pageSize) = 0; 51 | virtual void writePageTableEntries(uint64_t gfxAddress, size_t size, uint32_t memoryBanks, int hint, 52 | std::vector &lastLevelPages, size_t pageSize) = 0; 53 | 54 | virtual void writePhysicalMemoryPages(const void *memory, std::vector &pages, size_t size, int hint) = 0; 55 | virtual void freeMemory(uint64_t gfxAddress, size_t size) = 0; 56 | 57 | virtual void writeMemory2(AllocationParams allocationParams) = 0; 58 | 59 | static AubManager *create(const struct AubManagerOptions &options); 60 | 61 | virtual bool reservePhysicalMemory(AllocationParams allocationParams, PhysicalAllocationInfo &physicalAllocInfo) = 0; 62 | virtual bool mapGpuVa(uint64_t gfxAddress, size_t size, PhysicalAllocationInfo physicalAllocInfo) = 0; 63 | virtual bool mapGpuVa2(uint64_t physicalAddress, AllocationParams params) { return false; } 64 | 65 | virtual bool reserveOnlyPhysicalSpace(AllocationParams allocationParams, PhysicalAllocationInfo &physicalAllocInfo) { return false; } 66 | virtual bool mapSystemMemoryToPhysicalAddress(uint64_t physAddress, size_t size, size_t alignment, bool isLocalMemory, const void *p) { return false; } 67 | virtual void *translatePhysicalAddressToSystemMemory(uint64_t physicalAddress, bool isLocalMemory) { return nullptr; } 68 | virtual void writeMMIO(uint32_t offset, uint32_t value) {} 69 | virtual uint32_t readMMIO(uint32_t offset) { return 0; } 70 | virtual void writePCICFG(uint32_t offset, uint32_t value) {} 71 | virtual uint32_t readPCICFG(uint32_t offset) { return 0; } 72 | 73 | virtual void blockMemWritesViaTbx(bool onoff) {} 74 | 75 | virtual bool releaseHardwareContext(HardwareContext *context) { return false; }; 76 | virtual HardwareContext *createHardwareContext2(const CreateHardwareContext2Params ¶ms, uint32_t device, uint32_t engine, uint32_t flags) { return nullptr; }; 77 | 78 | virtual void setCCSMode(uint32_t ccsCount) {} 79 | virtual void closeSocket(void) {} 80 | virtual HardwareContext *createHardwareContext3(const HardwareContextParamsHeader *params) { return nullptr; } 81 | }; 82 | 83 | } // namespace aub_stream 84 | -------------------------------------------------------------------------------- /tests/unit_tests/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (C) 2022-2023 Intel Corporation 3 | # 4 | # SPDX-License-Identifier: MIT 5 | # 6 | 7 | set(TARGET_NAME ${PROJECT_NAME}_unit_tests) 8 | message(STATUS "Unit tests: ${TARGET_NAME}") 9 | 10 | add_executable(${TARGET_NAME} 11 | ${SOURCES} 12 | ${CMAKE_CURRENT_SOURCE_DIR}/CMakeLists.txt 13 | ${CMAKE_CURRENT_SOURCE_DIR}/aub_manager_tests.cpp 14 | ${CMAKE_CURRENT_SOURCE_DIR}/aub_stream_tests.cpp 15 | ${CMAKE_CURRENT_SOURCE_DIR}/aub_tbx_stream_tests.cpp 16 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_xe_tests.cpp 17 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests.cpp 18 | ${CMAKE_CURRENT_SOURCE_DIR}/command_stream_helper_tests.h 19 | ${CMAKE_CURRENT_SOURCE_DIR}/gpu_tests.cpp 20 | ${CMAKE_CURRENT_SOURCE_DIR}/stolen_memory_tests.cpp 21 | ${CMAKE_CURRENT_SOURCE_DIR}/test_align_helpers.cpp 22 | ${CMAKE_CURRENT_SOURCE_DIR}/test_misc_helpers.cpp 23 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_stolen_memory.h 24 | ${CMAKE_CURRENT_SOURCE_DIR}/hardware_context_tests.cpp 25 | ${CMAKE_CURRENT_SOURCE_DIR}/legacy_page_table_tests.cpp 26 | ${CMAKE_CURRENT_SOURCE_DIR}/memory_bank_helper_tests.cpp 27 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_aub_manager.h 28 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_aub_stream.h 29 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_gpu.h 30 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_physical_address_allocator.h 31 | ${CMAKE_CURRENT_SOURCE_DIR}/mock_tbx_socket.h 32 | ${CMAKE_CURRENT_SOURCE_DIR}/options_tests.cpp 33 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_helper.h 34 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_pml5_tests.cpp 35 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_tests.cpp 36 | ${CMAKE_CURRENT_SOURCE_DIR}/page_table_walker_tests.cpp 37 | ${CMAKE_CURRENT_SOURCE_DIR}/physical_allocator_tests.cpp 38 | ${CMAKE_CURRENT_SOURCE_DIR}/settings_reader_tests.cpp 39 | ${CMAKE_CURRENT_SOURCE_DIR}/tbx_socket_tests.cpp 40 | ${CMAKE_CURRENT_SOURCE_DIR}/white_box.h 41 | ${CMAKE_SOURCE_DIR}/tests/empty_test_filters.cpp 42 | ) 43 | 44 | get_property(TEST_TRAITS_MACROS GLOBAL PROPERTY TEST_TRAITS_MACROS_property) 45 | 46 | target_compile_definitions(${TARGET_NAME} PUBLIC ${TEST_TRAITS_MACROS}) 47 | 48 | if(WIN32) 49 | target_link_libraries(${TARGET_NAME} Ws2_32_stub) 50 | else() 51 | target_link_libraries(${TARGET_NAME} socket_stubs) 52 | endif() 53 | 54 | set_target_properties( 55 | ${TARGET_NAME} 56 | PROPERTIES 57 | VS_DEBUGGER_WORKING_DIRECTORY "$(OutDir)" 58 | VS_DEBUGGER_COMMAND_ARGUMENTS "--gtest_filter=* --gtest_catch_exceptions=0" 59 | ) 60 | 61 | set(RUN_UNIT_TESTS_TARGET run_${TARGET_NAME}) 62 | add_custom_target(${RUN_UNIT_TESTS_TARGET} ALL DEPENDS ${TARGET_NAME}) 63 | add_custom_command( 64 | TARGET ${RUN_UNIT_TESTS_TARGET} 65 | POST_BUILD 66 | COMMAND echo Running ${TARGET_NAME} in $ 67 | COMMAND WORKING_DIRECTORY $ 68 | COMMAND ${AUBSTREAM_RUN_INTERCEPTOR_LIST} ${TARGET_NAME} --gtest_catch_exceptions=0 69 | ) 70 | 71 | if(NOT ("${BRANCH_TYPE}" STREQUAL "")) 72 | add_subdirectory("${BRANCH_TYPE}") 73 | endif() 74 | 75 | aub_stream_add_subdirectories("gen*") 76 | aub_stream_add_subdirectories("*_core") 77 | aub_stream_create_source_tree(${TARGET_NAME}) 78 | -------------------------------------------------------------------------------- /aub_mem_dump/tbx_shm_stream.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2024 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | #include "aub_stream.h" 10 | #include "tbx_sockets.h" 11 | #include "aubstream/shared_mem_info.h" 12 | #include "alloc_tools.h" 13 | #include 14 | #include 15 | #include 16 | #include 17 | 18 | namespace aub_stream { 19 | struct AubTbxStream; 20 | struct AubShmStream; 21 | class TbxSockets; 22 | 23 | struct TbxShmStream : public AubStream { 24 | typedef std::function TranslatePhysicalAddressToSystemMemoryFn; 25 | 26 | TbxShmStream(uint32_t m) : mode(m){}; 27 | virtual ~TbxShmStream(); 28 | 29 | void addComment(const char *message) override; 30 | void expectMemoryTable(const void *memory, size_t size, const std::vector &writeInfoTable, uint32_t compareOperation) override; 31 | void declareContextForDumping(uint32_t handleDumpContext, PageTable *pageTable) override; 32 | void dumpBufferBIN(PageTableType gttType, uint64_t gfxAddress, size_t size, uint32_t handleDumpContext) override; 33 | void dumpSurface(PageTableType gttType, const SurfaceInfo &surfaceInfo, uint32_t handleDumpContext) override; 34 | bool init(int steppingValue, const GpuDescriptor &gpu) override; 35 | void registerPoll(uint32_t registerOffset, uint32_t mask, uint32_t value, bool pollNotEqual, uint32_t timeoutAction) override; 36 | void reserveContiguousPages(const std::vector &entries) override; 37 | void writeMMIO(uint32_t offset, uint32_t value) override; 38 | uint32_t readMMIO(uint32_t offset) override; 39 | void writePCICFG(uint32_t offset, uint32_t value) override; 40 | uint32_t readPCICFG(uint32_t offset) override; 41 | 42 | bool init(TranslatePhysicalAddressToSystemMemoryFn fn); 43 | void readMemory(PageTable *ppgtt, uint64_t gfxAddress, void *memory, size_t size, uint32_t memoryBanks, size_t pageSize); 44 | void readMemory(GGTT *gtt, uint64_t gfxAddress, void *memory, size_t size, uint32_t memoryBanks, size_t pageSize); 45 | 46 | std::vector writeMemory(GGTT *ggtt, uint64_t gfxAddress, const void *memory, size_t size, uint32_t memoryBanks, int hint, size_t pageSize = 4096); 47 | std::vector writeMemory(PageTable *ppgtt, uint64_t gfxAddress, const void *memory, size_t size, uint32_t memoryBanks, int hint, size_t pageSize = 4096); 48 | 49 | uint32_t getStreamMode() const override { return mode; }; 50 | 51 | TbxSockets *socket = nullptr; 52 | friend AubTbxStream; 53 | friend AubShmStream; 54 | SharedMemoryInfo *sharedMemoryInfo = nullptr; 55 | 56 | void writeGttPages(GGTT *ggtt, const std::vector &writeInfoTable) override; 57 | 58 | void enableThrowOnError(bool enabled); 59 | 60 | protected: 61 | void readContiguousPages(void *memory, size_t size, uint64_t physAddress, int addressSpace, int hint); 62 | void readDiscontiguousPages(void *memory, size_t size, const std::vector &writeInfoTable) override; 63 | void writeContiguousPages(const void *memory, size_t size, uint64_t physAddress, int addressSpace, int hint) override; 64 | void writeDiscontiguousPages(const void *memory, size_t size, const std::vector &writeInfoTable, int hint) override; 65 | void writeDiscontiguousPages(const std::vector &writeInfoTable, int addressSpace, int hint) override; 66 | 67 | std::chrono::time_point lastTimeCheck{}; 68 | virtual void checkSocketAlive(); 69 | 70 | TranslatePhysicalAddressToSystemMemoryFn translatePhysicalAddressToSystemMemory; 71 | uint32_t mode; 72 | }; 73 | 74 | } // namespace aub_stream 75 | -------------------------------------------------------------------------------- /aub_mem_dump/aub_header.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2023 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #pragma once 9 | 10 | #include 11 | #include 12 | 13 | #ifndef _WIN32 14 | #pragma pack(4) 15 | #else 16 | #pragma pack(push, 4) 17 | #endif 18 | 19 | inline void setMisalignedUint64(void *address, const uint64_t value) { 20 | uint32_t *addressBits = reinterpret_cast(address); 21 | addressBits[0] = static_cast(value); 22 | addressBits[1] = static_cast(value >> 32); 23 | } 24 | 25 | inline uint64_t getMisalignedUint64(const void *address) { 26 | const uint32_t *addressBits = reinterpret_cast(address); 27 | return static_cast(static_cast(addressBits[1]) << 32) | addressBits[0]; 28 | } 29 | 30 | struct AubCmdHdr { 31 | uint32_t DwordLength : 16, 32 | SubOp : 7, 33 | Opcode : 6, 34 | Type : 3; 35 | }; 36 | static_assert(4 == sizeof(AubCmdHdr), "Invalid size for AubCmdHdr"); 37 | 38 | struct AubCmdDumpBmpHd { 39 | AubCmdHdr Header; 40 | uint32_t Xmin; 41 | uint32_t Ymin; 42 | uint32_t BufferPitch; 43 | uint32_t BitsPerPixel : 8, 44 | Format : 8, 45 | Reserved_0 : 16; 46 | uint32_t Xsize; 47 | uint32_t Ysize; 48 | uint64_t BaseAddr; 49 | uint32_t Secure : 1, 50 | UseFence : 1, 51 | TileOn : 1, 52 | WalkY : 1, 53 | UsePPGTT : 1, 54 | Use32BitDump : 1, 55 | UseFullFormat : 1, 56 | Reserved_1 : 25; 57 | uint32_t DirectoryHandle; 58 | uint64_t getBaseAddr() const { 59 | return getMisalignedUint64(&this->BaseAddr); 60 | } 61 | void setBaseAddr(const uint64_t baseAddr) { 62 | setMisalignedUint64(&this->BaseAddr, baseAddr); 63 | } 64 | }; 65 | static_assert(44 == sizeof(AubCmdDumpBmpHd), "Invalid size for AubCmdDumpBmpHd"); 66 | 67 | struct AubPpgttContextCreate { 68 | AubCmdHdr Header; 69 | uint32_t Handle; 70 | uint32_t AdvancedContext : 1, 71 | SixtyFourBit : 1, 72 | Reserved_31_2 : 30; 73 | uint64_t PageDirPointer[4]; 74 | }; 75 | static_assert(44 == sizeof(AubPpgttContextCreate), "Invalid size for AubPpgttContextCreate"); 76 | 77 | struct AubCaptureBinaryDumpHD { 78 | AubCmdHdr Header; 79 | uint64_t BaseAddr; 80 | uint64_t Width; 81 | uint64_t Height; 82 | uint64_t Pitch; 83 | uint32_t SurfaceType : 4, 84 | GttType : 2, 85 | Reserved_31_6 : 26; 86 | uint32_t DirectoryHandle; 87 | uint32_t ReservedDW1; 88 | uint32_t ReservedDW2; 89 | char OutputFile[4]; 90 | uint64_t getBaseAddr() const { 91 | return getMisalignedUint64(&this->BaseAddr); 92 | } 93 | void setBaseAddr(const uint64_t baseAddr) { 94 | setMisalignedUint64(&this->BaseAddr, baseAddr); 95 | } 96 | uint64_t getWidth() const { 97 | return getMisalignedUint64(&this->Width); 98 | } 99 | void setWidth(const uint64_t width) { 100 | setMisalignedUint64(&this->Width, width); 101 | } 102 | uint64_t getHeight() const { 103 | return getMisalignedUint64(&this->Height); 104 | } 105 | void setHeight(const uint64_t height) { 106 | setMisalignedUint64(&this->Height, height); 107 | } 108 | uint64_t getPitch() const { 109 | return getMisalignedUint64(&this->Pitch); 110 | } 111 | void setPitch(const uint64_t pitch) { 112 | setMisalignedUint64(&this->Pitch, pitch); 113 | } 114 | }; 115 | static_assert(56 == sizeof(AubCaptureBinaryDumpHD), "Invalid size for AubCaptureBinaryDumpHD"); 116 | 117 | #ifndef _WIN32 118 | #pragma pack() 119 | #else 120 | #pragma pack(pop) 121 | #endif 122 | -------------------------------------------------------------------------------- /tests/test_defaults.cpp: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (C) 2022-2025 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: MIT 5 | * 6 | */ 7 | 8 | #include "test_defaults.h" 9 | #include "aub_mem_dump/family_mapper.h" 10 | #include "aub_mem_dump/gpu.h" 11 | #include "aub_mem_dump/memory_banks.h" 12 | #include "aub_mem_dump/aub_file_stream.h" 13 | #include "aub_mem_dump/tbx_stream.h" 14 | #include "tests/test_traits/test_traits.h" 15 | #include "gtest/gtest.h" 16 | #include 17 | #include 18 | #include 19 | 20 | #include "test.h" 21 | 22 | namespace aub_stream { 23 | 24 | std::unique_ptr gpu; 25 | std::function()> createGpuFunc = nullptr; 26 | 27 | uint32_t defaultDevice = 0; 28 | uint32_t defaultStepping = 0; 29 | uint32_t defaultDeviceCount = 1; 30 | size_t defaultHBMSizePerDevice = 0x80000000; 31 | size_t defaultPageSize = 65536; 32 | uint32_t defaultMemoryBank = MEMORY_BANK_0; 33 | uint32_t systemMemoryBank = MEMORY_BANK_SYSTEM; 34 | EngineType defaultEngine = EngineType::NUM_ENGINES; 35 | 36 | const bool localMemorySupportedInTests = defaultMemoryBank != MEMORY_BANK_SYSTEM; 37 | 38 | std::string folderAUB = "."; 39 | std::string fileSeparator = "/"; 40 | 41 | template 42 | std::string getAubConfig(const TestTraits *traits, const GpuDescriptor &desc) { 43 | std::stringstream strConfig; 44 | if (requireTile || desc.deviceCount > 1) { 45 | strConfig << desc.deviceCount 46 | << "tx"; 47 | } 48 | 49 | strConfig << traits->deviceSliceCount 50 | << "x" 51 | << traits->deviceSubSliceCount 52 | << "x" 53 | << traits->deviceEuPerSubSlice; 54 | 55 | return strConfig.str(); 56 | } 57 | 58 | std::string getAubConfigWithoutTile(const TestTraits *traits, const GpuDescriptor &desc) { 59 | return getAubConfig(traits, desc); 60 | } 61 | std::string getAubConfigWithTile(const TestTraits *traits, const GpuDescriptor &desc) { 62 | return getAubConfig(traits, desc); 63 | } 64 | 65 | std::string getAubFileName(const GpuDescriptor &desc) { 66 | 67 | const ::testing::TestInfo *const testInfo = ::testing::UnitTest::GetInstance()->current_test_info(); 68 | std::string testName = testInfo->test_case_name(); 69 | testName += std::string("_"); 70 | testName += testInfo->name(); 71 | 72 | std::stringstream strfilename; 73 | strfilename << desc.productAbbreviation 74 | << "_"; 75 | 76 | auto traits = testTraits[static_cast(desc.productFamily)]; 77 | assert(traits); 78 | 79 | auto config = traits->getAubConfig(traits, desc); 80 | 81 | strfilename << config 82 | << "_" 83 | << testName 84 | << ".aub"; 85 | 86 | // clean-up any fileName issues because of the file system incompatibilities 87 | auto fileName = strfilename.str(); 88 | for (char &i : fileName) { 89 | i = i == '/' ? '_' : i; 90 | } 91 | 92 | std::string filePath(folderAUB); 93 | filePath.append(fileSeparator); 94 | filePath.append(fileName); 95 | 96 | return filePath; 97 | } 98 | 99 | bool initializeAubStream(AubFileStream &stream, 100 | const GpuDescriptor &desc) { 101 | 102 | auto filePath = getAubFileName(desc); 103 | 104 | stream.fileHandle.open(filePath.c_str(), std::ofstream::binary); 105 | return stream.init(SteppingValues::A, desc); 106 | } 107 | 108 | bool initializeAubStream(AubFileStream &stream) { 109 | GpuDescriptor desc = *gpu; 110 | desc.deviceCount = defaultDeviceCount; 111 | 112 | return initializeAubStream( 113 | stream, 114 | desc); 115 | } 116 | 117 | } // namespace aub_stream 118 | 119 | bool MatchMemory::hasBank0(const aub_stream::Gpu *gpu) { 120 | return gpu->isMemorySupported(aub_stream::MemoryBank::MEMORY_BANK_0, 64 * aub_stream::KB); 121 | } 122 | --------------------------------------------------------------------------------