├── CODE_OF_CONDUCT.md ├── CONTRIBUTING.md ├── COPYING ├── README ├── SUMS ├── ixgbe.7 ├── ixgbe.spec ├── pci.updates ├── scripts └── set_irq_affinity ├── security.md └── src ├── Makefile ├── Module.supported ├── auxiliary_compat.h ├── common.mk ├── ixgbe.h ├── ixgbe_82598.c ├── ixgbe_82598.h ├── ixgbe_82599.c ├── ixgbe_82599.h ├── ixgbe_api.c ├── ixgbe_api.h ├── ixgbe_common.c ├── ixgbe_common.h ├── ixgbe_dcb.c ├── ixgbe_dcb.h ├── ixgbe_dcb_82598.c ├── ixgbe_dcb_82598.h ├── ixgbe_dcb_82599.c ├── ixgbe_dcb_82599.h ├── ixgbe_dcb_nl.c ├── ixgbe_debugfs.c ├── ixgbe_devlink.c ├── ixgbe_devlink.h ├── ixgbe_e610.c ├── ixgbe_e610.h ├── ixgbe_ethtool.c ├── ixgbe_fcoe.c ├── ixgbe_fcoe.h ├── ixgbe_fw_update.c ├── ixgbe_fw_update.h ├── ixgbe_lib.c ├── ixgbe_main.c ├── ixgbe_mbx.c ├── ixgbe_mbx.h ├── ixgbe_model.h ├── ixgbe_osdep.h ├── ixgbe_osdep2.h ├── ixgbe_param.c ├── ixgbe_phy.c ├── ixgbe_phy.h ├── ixgbe_procfs.c ├── ixgbe_ptp.c ├── ixgbe_ptp_e600.c ├── ixgbe_ptp_e600.h ├── ixgbe_sriov.c ├── ixgbe_sriov.h ├── ixgbe_sysfs.c ├── ixgbe_txrx_common.h ├── ixgbe_type.h ├── ixgbe_type_e610.h ├── ixgbe_x540.c ├── ixgbe_x540.h ├── ixgbe_x550.c ├── ixgbe_x550.h ├── ixgbe_xsk.c ├── kcompat-generator.sh ├── kcompat-lib.sh ├── kcompat.c ├── kcompat.h ├── kcompat_cleanup.h ├── kcompat_defs.h ├── kcompat_ethtool.c ├── kcompat_gcc.h ├── kcompat_impl.h ├── kcompat_kthread.h ├── kcompat_overflow.h ├── kcompat_packing.c ├── kcompat_packing.h ├── kcompat_pldmfw.c ├── kcompat_pldmfw.h ├── kcompat_rhel_defs.h ├── kcompat_sigil.h ├── kcompat_sles_defs.h ├── kcompat_std_defs.h ├── kcompat_ubuntu_defs.h ├── kcompat_xarray.c └── kcompat_xarray.h /CODE_OF_CONDUCT.md: -------------------------------------------------------------------------------- 1 | # Contributor Covenant Code of Conduct 2 | 3 | ## Our Pledge 4 | 5 | We as members, contributors, and leaders pledge to make participation in our 6 | community a harassment-free experience for everyone, regardless of age, body 7 | size, visible or invisible disability, ethnicity, sex characteristics, gender 8 | identity and expression, level of experience, education, socio-economic status, 9 | nationality, personal appearance, race, caste, color, religion, or sexual 10 | identity and orientation. 11 | 12 | We pledge to act and interact in ways that contribute to an open, welcoming, 13 | diverse, inclusive, and healthy community. 14 | 15 | ## Our Standards 16 | 17 | Examples of behavior that contributes to a positive environment for our 18 | community include: 19 | 20 | * Demonstrating empathy and kindness toward other people 21 | * Being respectful of differing opinions, viewpoints, and experiences 22 | * Giving and gracefully accepting constructive feedback 23 | * Accepting responsibility and apologizing to those affected by our mistakes, 24 | and learning from the experience 25 | * Focusing on what is best not just for us as individuals, but for the overall 26 | community 27 | 28 | Examples of unacceptable behavior include: 29 | 30 | * The use of sexualized language or imagery, and sexual attention or advances of 31 | any kind 32 | * Trolling, insulting or derogatory comments, and personal or political attacks 33 | * Public or private harassment 34 | * Publishing others' private information, such as a physical or email address, 35 | without their explicit permission 36 | * Other conduct which could reasonably be considered inappropriate in a 37 | professional setting 38 | 39 | ## Enforcement Responsibilities 40 | 41 | Community leaders are responsible for clarifying and enforcing our standards of 42 | acceptable behavior and will take appropriate and fair corrective action in 43 | response to any behavior that they deem inappropriate, threatening, offensive, 44 | or harmful. 45 | 46 | Community leaders have the right and responsibility to remove, edit, or reject 47 | comments, commits, code, wiki edits, issues, and other contributions that are 48 | not aligned to this Code of Conduct, and will communicate reasons for moderation 49 | decisions when appropriate. 50 | 51 | ## Scope 52 | 53 | This Code of Conduct applies within all community spaces, and also applies when 54 | an individual is officially representing the community in public spaces. 55 | Examples of representing our community include using an official e-mail address, 56 | posting via an official social media account, or acting as an appointed 57 | representative at an online or offline event. 58 | 59 | ## Enforcement 60 | 61 | Instances of abusive, harassing, or otherwise unacceptable behavior may be 62 | reported to the community leaders responsible for enforcement at 63 | CommunityCodeOfConduct AT intel DOT com. 64 | All complaints will be reviewed and investigated promptly and fairly. 65 | 66 | All community leaders are obligated to respect the privacy and security of the 67 | reporter of any incident. 68 | 69 | ## Enforcement Guidelines 70 | 71 | Community leaders will follow these Community Impact Guidelines in determining 72 | the consequences for any action they deem in violation of this Code of Conduct: 73 | 74 | ### 1. Correction 75 | 76 | **Community Impact**: Use of inappropriate language or other behavior deemed 77 | unprofessional or unwelcome in the community. 78 | 79 | **Consequence**: A private, written warning from community leaders, providing 80 | clarity around the nature of the violation and an explanation of why the 81 | behavior was inappropriate. A public apology may be requested. 82 | 83 | ### 2. Warning 84 | 85 | **Community Impact**: A violation through a single incident or series of 86 | actions. 87 | 88 | **Consequence**: A warning with consequences for continued behavior. No 89 | interaction with the people involved, including unsolicited interaction with 90 | those enforcing the Code of Conduct, for a specified period of time. This 91 | includes avoiding interactions in community spaces as well as external channels 92 | like social media. Violating these terms may lead to a temporary or permanent 93 | ban. 94 | 95 | ### 3. Temporary Ban 96 | 97 | **Community Impact**: A serious violation of community standards, including 98 | sustained inappropriate behavior. 99 | 100 | **Consequence**: A temporary ban from any sort of interaction or public 101 | communication with the community for a specified period of time. No public or 102 | private interaction with the people involved, including unsolicited interaction 103 | with those enforcing the Code of Conduct, is allowed during this period. 104 | Violating these terms may lead to a permanent ban. 105 | 106 | ### 4. Permanent Ban 107 | 108 | **Community Impact**: Demonstrating a pattern of violation of community 109 | standards, including sustained inappropriate behavior, harassment of an 110 | individual, or aggression toward or disparagement of classes of individuals. 111 | 112 | **Consequence**: A permanent ban from any sort of public interaction within the 113 | community. 114 | 115 | ## Attribution 116 | 117 | This Code of Conduct is adapted from the [Contributor Covenant][homepage], 118 | version 2.1, available at 119 | [https://www.contributor-covenant.org/version/2/1/code_of_conduct.html][v2.1]. 120 | 121 | Community Impact Guidelines were inspired by 122 | [Mozilla's code of conduct enforcement ladder][Mozilla CoC]. 123 | 124 | For answers to common questions about this code of conduct, see the FAQ at 125 | [https://www.contributor-covenant.org/faq][FAQ]. Translations are available at 126 | [https://www.contributor-covenant.org/translations][translations]. 127 | 128 | [homepage]: https://www.contributor-covenant.org 129 | [v2.1]: https://www.contributor-covenant.org/version/2/1/code_of_conduct.html 130 | [Mozilla CoC]: https://github.com/mozilla/diversity 131 | [FAQ]: https://www.contributor-covenant.org/faq 132 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | # Contributing 2 | 3 | ### License 4 | 5 | The ethernet-linux-ixgbe is licensed under the terms in [COPYING](./COPYING). 6 | By contributing to the project, you agree to the license and copyright terms 7 | therein and release your contribution under these terms. 8 | 9 | ### Sign your work 10 | 11 | Please use the sign-off line at the end of the patch. Your signature certifies 12 | that you wrote the patch or otherwise have the right to pass it on as an 13 | open-source patch. The rules are pretty simple: if you can certify the below 14 | (from [developercertificate.org](http://developercertificate.org/)): 15 | 16 | ``` 17 | Developer Certificate of Origin 18 | Version 1.1 19 | 20 | Copyright (C) 2004, 2006 The Linux Foundation and its contributors. 21 | 660 York Street, Suite 102, 22 | San Francisco, CA 94110 USA 23 | 24 | Everyone is permitted to copy and distribute verbatim copies of this 25 | license document, but changing it is not allowed. 26 | 27 | Developer's Certificate of Origin 1.1 28 | 29 | By making a contribution to this project, I certify that: 30 | 31 | (a) The contribution was created in whole or in part by me and I 32 | have the right to submit it under the open source license 33 | indicated in the file; or 34 | 35 | (b) The contribution is based upon previous work that, to the best 36 | of my knowledge, is covered under an appropriate open source 37 | license and I have the right under that license to submit that 38 | work with modifications, whether created in whole or in part 39 | by me, under the same open source license (unless I am 40 | permitted to submit under a different license), as indicated 41 | in the file; or 42 | 43 | (c) The contribution was provided directly to me by some other 44 | person who certified (a), (b) or (c) and I have not modified 45 | it. 46 | 47 | (d) I understand and agree that this project and the contribution 48 | are public and that a record of the contribution (including all 49 | personal information I submit with it, including my sign-off) is 50 | maintained indefinitely and may be redistributed consistent with 51 | this project or the open source license(s) involved. 52 | ``` 53 | 54 | Then you just add a line to every git commit message: 55 | 56 | Signed-off-by: Joe Smith 57 | 58 | Use your real name (sorry, no pseudonyms or anonymous contributions.) 59 | 60 | If you set your `user.name` and `user.email` git configs, you can sign your 61 | commit automatically with `git commit -s`. 62 | -------------------------------------------------------------------------------- /SUMS: -------------------------------------------------------------------------------- 1 | 20257 48 ixgbe-6.1.4/src/ixgbe_dcb_nl.c 2 | 00732 40 ixgbe-6.1.4/src/ixgbe_debugfs.c 3 | 44882 45 ixgbe-6.1.4/src/ixgbe_devlink.c 4 | 38563 2 ixgbe-6.1.4/src/ixgbe_devlink.h 5 | 04497 183 ixgbe-6.1.4/src/ixgbe_ethtool.c 6 | 49274 30 ixgbe-6.1.4/src/ixgbe_fcoe.c 7 | 60429 2 ixgbe-6.1.4/src/ixgbe_fcoe.h 8 | 11001 28 ixgbe-6.1.4/src/ixgbe_fw_update.c 9 | 06360 1 ixgbe-6.1.4/src/ixgbe_fw_update.h 10 | 56392 44 ixgbe-6.1.4/src/ixgbe.h 11 | 64528 39 ixgbe-6.1.4/src/ixgbe_lib.c 12 | 20924 446 ixgbe-6.1.4/src/ixgbe_main.c 13 | 20172 3 ixgbe-6.1.4/src/ixgbe_model.h 14 | 55492 2 ixgbe-6.1.4/src/ixgbe_osdep2.h 15 | 58376 6 ixgbe-6.1.4/src/ixgbe_osdep.h 16 | 23908 32 ixgbe-6.1.4/src/ixgbe_param.c 17 | 13702 25 ixgbe-6.1.4/src/ixgbe_procfs.c 18 | 40828 53 ixgbe-6.1.4/src/ixgbe_ptp.c 19 | 61224 38 ixgbe-6.1.4/src/ixgbe_ptp_e600.c 20 | 53270 1 ixgbe-6.1.4/src/ixgbe_ptp_e600.h 21 | 50098 59 ixgbe-6.1.4/src/ixgbe_sriov.c 22 | 13883 3 ixgbe-6.1.4/src/ixgbe_sriov.h 23 | 47171 8 ixgbe-6.1.4/src/ixgbe_sysfs.c 24 | 39509 3 ixgbe-6.1.4/src/ixgbe_txrx_common.h 25 | 23695 27 ixgbe-6.1.4/src/ixgbe_xsk.c 26 | 29569 39 ixgbe-6.1.4/src/ixgbe_82598.c 27 | 63663 2 ixgbe-6.1.4/src/ixgbe_82598.h 28 | 64706 76 ixgbe-6.1.4/src/ixgbe_82599.c 29 | 64835 2 ixgbe-6.1.4/src/ixgbe_82599.h 30 | 15024 49 ixgbe-6.1.4/src/ixgbe_api.c 31 | 46289 10 ixgbe-6.1.4/src/ixgbe_api.h 32 | 21610 143 ixgbe-6.1.4/src/ixgbe_common.c 33 | 29206 7 ixgbe-6.1.4/src/ixgbe_common.h 34 | 51212 10 ixgbe-6.1.4/src/ixgbe_dcb_82598.c 35 | 29132 3 ixgbe-6.1.4/src/ixgbe_dcb_82598.h 36 | 36792 17 ixgbe-6.1.4/src/ixgbe_dcb_82599.c 37 | 44320 4 ixgbe-6.1.4/src/ixgbe_dcb_82599.h 38 | 38143 20 ixgbe-6.1.4/src/ixgbe_dcb.c 39 | 04088 5 ixgbe-6.1.4/src/ixgbe_dcb.h 40 | 21077 168 ixgbe-6.1.4/src/ixgbe_e610.c 41 | 06484 10 ixgbe-6.1.4/src/ixgbe_e610.h 42 | 64852 31 ixgbe-6.1.4/src/ixgbe_mbx.c 43 | 46786 8 ixgbe-6.1.4/src/ixgbe_mbx.h 44 | 03664 71 ixgbe-6.1.4/src/ixgbe_phy.c 45 | 60751 8 ixgbe-6.1.4/src/ixgbe_phy.h 46 | 22699 86 ixgbe-6.1.4/src/ixgbe_type_e610.h 47 | 10526 173 ixgbe-6.1.4/src/ixgbe_type.h 48 | 02277 30 ixgbe-6.1.4/src/ixgbe_x540.c 49 | 53693 2 ixgbe-6.1.4/src/ixgbe_x540.h 50 | 14520 126 ixgbe-6.1.4/src/ixgbe_x550.c 51 | 25819 5 ixgbe-6.1.4/src/ixgbe_x550.h 52 | 50286 5 ixgbe-6.1.4/src/kcompat_gcc.h 53 | 31490 210 ixgbe-6.1.4/src/kcompat.h 54 | 31873 102 ixgbe-6.1.4/src/kcompat_impl.h 55 | 35333 31 ixgbe-6.1.4/src/kcompat-generator.sh 56 | 61569 12 ixgbe-6.1.4/src/kcompat-lib.sh 57 | 32178 1 ixgbe-6.1.4/src/kcompat_defs.h 58 | 21592 2 ixgbe-6.1.4/src/kcompat_sigil.h 59 | 17638 7 ixgbe-6.1.4/src/kcompat_sles_defs.h 60 | 23579 5 ixgbe-6.1.4/src/kcompat_rhel_defs.h 61 | 50584 2 ixgbe-6.1.4/src/kcompat_ubuntu_defs.h 62 | 50139 8 ixgbe-6.1.4/src/kcompat_std_defs.h 63 | 47912 73 ixgbe-6.1.4/src/kcompat.c 64 | 55698 29 ixgbe-6.1.4/src/kcompat_ethtool.c 65 | 30775 17 ixgbe-6.1.4/src/kcompat_overflow.h 66 | 24089 12 ixgbe-6.1.4/src/kcompat_cleanup.h 67 | 53040 59 ixgbe-6.1.4/src/kcompat_xarray.h 68 | 47819 61 ixgbe-6.1.4/src/kcompat_xarray.c 69 | 39151 17 ixgbe-6.1.4/src/kcompat_packing.h 70 | 45701 17 ixgbe-6.1.4/src/kcompat_packing.c 71 | 12240 5 ixgbe-6.1.4/src/auxiliary_compat.h 72 | 49935 33 ixgbe-6.1.4/src/kcompat_pldmfw.c 73 | 61459 6 ixgbe-6.1.4/src/kcompat_pldmfw.h 74 | 42683 2 ixgbe-6.1.4/src/kcompat_kthread.h 75 | 40945 7 ixgbe-6.1.4/src/Makefile 76 | 25857 18 ixgbe-6.1.4/src/common.mk 77 | 12190 1 ixgbe-6.1.4/src/Module.supported 78 | 58887 9 ixgbe-6.1.4/scripts/set_irq_affinity 79 | 39221 8 ixgbe-6.1.4/pci.updates 80 | 27626 1 ixgbe-6.1.4/security.md 81 | 12529 18 ixgbe-6.1.4/COPYING 82 | 31188 70 ixgbe-6.1.4/README 83 | 57235 75 ixgbe-6.1.4/ixgbe.7 84 | 40181 11 ixgbe-6.1.4/ixgbe.spec 85 | -------------------------------------------------------------------------------- /ixgbe.spec: -------------------------------------------------------------------------------- 1 | Name: ixgbe 2 | Summary: Intel(R) 10GbE PCI Express Linux Network Driver 3 | Version: 6.1.4 4 | Release: 1 5 | Source: %{name}-%{version}.tar.gz 6 | Vendor: Intel Corporation 7 | License: GPLv2 8 | ExclusiveOS: linux 9 | Group: System Environment/Kernel 10 | Provides: %{name} 11 | URL: http://support.intel.com 12 | BuildRoot: %{_tmppath}/%{name}-%{version}-root 13 | %global debug_package %{nil} 14 | # macros for finding system files to update at install time (pci.ids, pcitable) 15 | %define find() %(for f in %*; do if [ -e $f ]; then echo $f; break; fi; done) 16 | %define _pciids /usr/share/pci.ids /usr/share/hwdata/pci.ids 17 | %define _pcitable /usr/share/kudzu/pcitable /usr/share/hwdata/pcitable /dev/null 18 | %define pciids %find %{_pciids} 19 | %define pcitable %find %{_pcitable} 20 | Requires: kernel, findutils, gawk, bash 21 | 22 | %global __strip /bin/true 23 | 24 | %if 0%{?BUILD_KERNEL:1} 25 | %define kernel_ver %{BUILD_KERNEL} 26 | %define check_aux_args_kernel -b %{BUILD_KERNEL} 27 | %else 28 | %define kernel_ver %(uname -r) 29 | %endif 30 | 31 | %if 0%{?KSRC:1} 32 | %define check_aux_args_ksrc -k %{KSRC} 33 | %endif 34 | 35 | %define check_aux_args %check_aux_args_kernel %check_aux_args_ksrc 36 | 37 | # Check for existence of variable kernel_module_package_buildreqs ... 38 | %if 0%{?!kernel_module_package_buildreqs:1} 39 | # ... and provide a suitable definition if it is not defined 40 | %define kernel_module_package_buildreqs kernel-devel 41 | %endif 42 | 43 | %define kernel_module_package_buildreqs_fixed %(/bin/bash -fc 'if [[ %{kernel_ver} == *uek* ]]; 44 | then echo %kernel_module_package_buildreqs | sed 's/kernel-devel/kernel-uek-devel/g' ; else echo %kernel_module_package_buildreqs ; fi') 45 | 46 | BuildRequires: %kernel_module_package_buildreqs_fixed 47 | 48 | %description 49 | This package contains the Intel(R) 10GbE PCI Express Linux Network Driver. 50 | 51 | %prep 52 | %setup 53 | 54 | %build 55 | make -C src clean 56 | make -C src 57 | 58 | %install 59 | make -C src INSTALL_MOD_PATH=%{buildroot} MANDIR=%{_mandir} modules_install mandocs_install 60 | # Remove modules files that we do not want to include 61 | find %{buildroot}/lib/modules/ -name 'modules.*' -exec rm -f {} \; 62 | cd %{buildroot} 63 | find lib -name "ixgbe.ko" -printf "/%p\n" \ 64 | >%{_builddir}/%{name}-%{version}/file.list 65 | 66 | export _ksrc=%{_usrsrc}/kernels/%{kernel_ver} 67 | cd %{buildroot} 68 | # Sign the modules(s) 69 | %if %{?_with_modsign:1}%{!?_with_modsign:0} 70 | %define __strip /bin/true 71 | %{!?privkey: %define privkey %{_sysconfdir}/pki/SECURE-BOOT-KEY.priv} 72 | %{!?pubkey: %define pubkey %{_sysconfdir}/pki/SECURE-BOOT-KEY.der} 73 | %{!?_signfile: %define _signfile ${_ksrc}/scripts/sign-file} 74 | for module in `find . -type f -name *.ko`; 75 | do 76 | strip --strip-debug ${module} 77 | $(KSRC=${_ksrc} %{_signfile} sha512 %{privkey} %{pubkey} ${module} > /dev/null 2>&1) 78 | done 79 | %endif 80 | 81 | 82 | 83 | %clean 84 | rm -rf %{buildroot} 85 | 86 | %files -f file.list 87 | 88 | %defattr(-,root,root) 89 | %{_mandir}/man7/ixgbe.7.gz 90 | %doc COPYING 91 | %doc README 92 | %doc file.list 93 | %doc pci.updates 94 | 95 | %post 96 | if [ -d /usr/local/share/%{name} ]; then 97 | rm -rf /usr/local/share/%{name} 98 | fi 99 | mkdir /usr/local/share/%{name} 100 | cp --parents %{pciids} /usr/local/share/%{name}/ 101 | echo "original pci.ids saved in /usr/local/share/%{name}"; 102 | if [ "%{pcitable}" != "/dev/null" ]; then 103 | cp --parents %{pcitable} /usr/local/share/%{name}/ 104 | echo "original pcitable saved in /usr/local/share/%{name}"; 105 | fi 106 | 107 | LD="%{_docdir}/%{name}"; 108 | if [ -d %{_docdir}/%{name}-%{version} ]; then 109 | LD="%{_docdir}/%{name}-%{version}"; 110 | fi 111 | 112 | #Yes, this really needs bash 113 | bash -s %{pciids} \ 114 | %{pcitable} \ 115 | $LD/pci.updates \ 116 | $LD/pci.ids.new \ 117 | $LD/pcitable.new \ 118 | %{name} \ 119 | <<"END" 120 | #! /bin/bash 121 | # Copyright (C) 2017 - 2023 Intel Corporation 122 | # For licensing information, see the file 'LICENSE' in the root folder 123 | # $1 = system pci.ids file to update 124 | # $2 = system pcitable file to update 125 | # $3 = file with new entries in pci.ids file format 126 | # $4 = pci.ids output file 127 | # $5 = pcitable output file 128 | # $6 = driver name for use in pcitable file 129 | 130 | exec 3<$1 131 | exec 4<$2 132 | exec 5<$3 133 | exec 6>$4 134 | exec 7>$5 135 | driver=$6 136 | IFS= 137 | 138 | # pattern matching strings 139 | ID="[[:xdigit:]][[:xdigit:]][[:xdigit:]][[:xdigit:]]" 140 | VEN="${ID}*" 141 | DEV=" ${ID}*" 142 | SUB=" ${ID}*" 143 | TABLE_DEV="0x${ID} 0x${ID} \"*" 144 | TABLE_SUB="0x${ID} 0x${ID} 0x${ID} 0x${ID} \"*" 145 | 146 | line= 147 | table_line= 148 | ids_in= 149 | table_in= 150 | vendor= 151 | device= 152 | ids_device= 153 | table_device= 154 | subven= 155 | ids_subven= 156 | table_subven= 157 | subdev= 158 | ids_subdev= 159 | table_subdev= 160 | ven_str= 161 | dev_str= 162 | sub_str= 163 | 164 | # force a sub-shell to fork with a new stdin 165 | # this is needed if the shell is reading these instructions from stdin 166 | while true 167 | do 168 | # get the first line of each data file to jump start things 169 | exec 0<&3 170 | read -r ids_in 171 | if [ "$2" != "/dev/null" ];then 172 | exec 0<&4 173 | read -r table_in 174 | fi 175 | 176 | # outer loop reads lines from the updates file 177 | exec 0<&5 178 | while read -r line 179 | do 180 | # vendor entry 181 | if [[ $line == $VEN ]] 182 | then 183 | vendor=0x${line:0:4} 184 | ven_str=${line#${line:0:6}} 185 | # add entry to pci.ids 186 | exec 0<&3 187 | exec 1>&6 188 | while [[ $ids_in != $VEN || 189 | 0x${ids_in:0:4} < $vendor ]] 190 | do 191 | echo "$ids_in" 192 | read -r ids_in 193 | done 194 | echo "$line" 195 | if [[ 0x${ids_in:0:4} == $vendor ]] 196 | then 197 | read -r ids_in 198 | fi 199 | 200 | # device entry 201 | elif [[ $line == $DEV ]] 202 | then 203 | device=`echo ${line:1:4} | tr "[:upper:]" "[:lower:]"` 204 | table_device=0x${line:1:4} 205 | dev_str=${line#${line:0:7}} 206 | ids_device=`echo ${ids_in:1:4} | tr "[:upper:]" "[:lower:]"` 207 | table_line="$vendor $table_device \"$driver\" \"$ven_str|$dev_str\"" 208 | # add entry to pci.ids 209 | exec 0<&3 210 | exec 1>&6 211 | while [[ $ids_in != $DEV || 212 | $ids_device < $device ]] 213 | do 214 | if [[ $ids_in == $VEN ]] 215 | then 216 | break 217 | fi 218 | if [[ $ids_device != ${ids_in:1:4} ]] 219 | then 220 | echo "${ids_in:0:1}$ids_device${ids_in#${ids_in:0:5}}" 221 | else 222 | echo "$ids_in" 223 | fi 224 | read -r ids_in 225 | ids_device=`echo ${ids_in:1:4} | tr "[:upper:]" "[:lower:]"` 226 | done 227 | if [[ $device != ${line:1:4} ]] 228 | then 229 | echo "${line:0:1}$device${line#${line:0:5}}" 230 | else 231 | echo "$line" 232 | fi 233 | if [[ $ids_device == $device ]] 234 | then 235 | read -r ids_in 236 | fi 237 | # add entry to pcitable 238 | if [ "$2" != "/dev/null" ];then 239 | exec 0<&4 240 | exec 1>&7 241 | while [[ $table_in != $TABLE_DEV || 242 | ${table_in:0:6} < $vendor || 243 | ( ${table_in:0:6} == $vendor && 244 | ${table_in:7:6} < $table_device ) ]] 245 | do 246 | echo "$table_in" 247 | read -r table_in 248 | done 249 | echo "$table_line" 250 | if [[ ${table_in:0:6} == $vendor && 251 | ${table_in:7:6} == $table_device ]] 252 | then 253 | read -r table_in 254 | fi 255 | fi 256 | # subsystem entry 257 | elif [[ $line == $SUB ]] 258 | then 259 | subven=`echo ${line:2:4} | tr "[:upper:]" "[:lower:]"` 260 | subdev=`echo ${line:7:4} | tr "[:upper:]" "[:lower:]"` 261 | table_subven=0x${line:2:4} 262 | table_subdev=0x${line:7:4} 263 | sub_str=${line#${line:0:13}} 264 | ids_subven=`echo ${ids_in:2:4} | tr "[:upper:]" "[:lower:]"` 265 | ids_subdev=`echo ${ids_in:7:4} | tr "[:upper:]" "[:lower:]"` 266 | table_line="$vendor $table_device $table_subven $table_subdev \"$driver\" \"$ven_str|$sub_str\"" 267 | # add entry to pci.ids 268 | exec 0<&3 269 | exec 1>&6 270 | while [[ $ids_in != $SUB || 271 | $ids_subven < $subven || 272 | ( $ids_subven == $subven && 273 | $ids_subdev < $subdev ) ]] 274 | do 275 | if [[ $ids_in == $VEN || 276 | $ids_in == $DEV ]] 277 | then 278 | break 279 | fi 280 | if [[ ! (${ids_in:2:4} == "1014" && 281 | ${ids_in:7:4} == "052C") ]] 282 | then 283 | if [[ $ids_subven != ${ids_in:2:4} || $ids_subdev != ${ids_in:7:4} ]] 284 | then 285 | echo "${ids_in:0:2}$ids_subven $ids_subdev${ids_in#${ids_in:0:11}}" 286 | else 287 | echo "$ids_in" 288 | fi 289 | fi 290 | read -r ids_in 291 | ids_subven=`echo ${ids_in:2:4} | tr "[:upper:]" "[:lower:]"` 292 | ids_subdev=`echo ${ids_in:7:4} | tr "[:upper:]" "[:lower:]"` 293 | done 294 | if [[ $subven != ${line:2:4} || $subdev != ${line:7:4} ]] 295 | then 296 | echo "${line:0:2}$subven $subdev${line#${line:0:11}}" 297 | else 298 | echo "$line" 299 | fi 300 | if [[ $ids_subven == $subven && 301 | $ids_subdev == $subdev ]] 302 | then 303 | read -r ids_in 304 | fi 305 | # add entry to pcitable 306 | if [ "$2" != "/dev/null" ];then 307 | exec 0<&4 308 | exec 1>&7 309 | while [[ $table_in != $TABLE_SUB || 310 | ${table_in:14:6} < $table_subven || 311 | ( ${table_in:14:6} == $table_subven && 312 | ${table_in:21:6} < $table_subdev ) ]] 313 | do 314 | if [[ $table_in == $TABLE_DEV ]] 315 | then 316 | break 317 | fi 318 | if [[ ! (${table_in:14:6} == "0x1014" && 319 | ${table_in:21:6} == "0x052C") ]] 320 | then 321 | echo "$table_in" 322 | fi 323 | read -r table_in 324 | done 325 | echo "$table_line" 326 | if [[ ${table_in:14:6} == $table_subven && 327 | ${table_in:21:6} == $table_subdev ]] 328 | then 329 | read -r table_in 330 | fi 331 | fi 332 | fi 333 | 334 | exec 0<&5 335 | done 336 | 337 | # print the remainder of the original files 338 | exec 0<&3 339 | exec 1>&6 340 | echo "$ids_in" 341 | while read -r ids_in 342 | do 343 | echo "$ids_in" 344 | done 345 | 346 | if [ "$2" != "/dev/null" ];then 347 | exec 0>&4 348 | exec 1>&7 349 | echo "$table_in" 350 | while read -r table_in 351 | do 352 | echo "$table_in" 353 | done 354 | fi 355 | 356 | break 357 | done <&5 358 | 359 | exec 3<&- 360 | exec 4<&- 361 | exec 5<&- 362 | exec 6>&- 363 | exec 7>&- 364 | 365 | END 366 | 367 | mv -f $LD/pci.ids.new %{pciids} 368 | if [ "%{pcitable}" != "/dev/null" ]; then 369 | mv -f $LD/pcitable.new %{pcitable} 370 | fi 371 | 372 | uname -r | grep BOOT || /sbin/depmod -a > /dev/null 2>&1 || true 373 | 374 | if [ -x "/usr/sbin/weak-modules" ]; then 375 | modules=( $(cat $LD/file.list | grep '\.ko$' | xargs realpath) ) 376 | printf '%s\n' "${modules[@]}" | /usr/sbin/weak-modules --no-initramfs --add-modules 377 | fi 378 | 379 | if which dracut >/dev/null 2>&1; then 380 | echo "Updating initramfs with dracut..." 381 | if dracut --force ; then 382 | echo "Successfully updated initramfs." 383 | else 384 | echo "Failed to update initramfs." 385 | echo "You must update your initramfs image for changes to take place." 386 | exit -1 387 | fi 388 | elif which mkinitrd >/dev/null 2>&1; then 389 | echo "Updating initrd with mkinitrd..." 390 | if mkinitrd; then 391 | echo "Successfully updated initrd." 392 | else 393 | echo "Failed to update initrd." 394 | echo "You must update your initrd image for changes to take place." 395 | exit -1 396 | fi 397 | else 398 | echo "Unable to determine utility to update initrd image." 399 | echo "You must update your initrd manually for changes to take place." 400 | exit -1 401 | fi 402 | 403 | %preun 404 | LD="%{_docdir}/%{name}"; 405 | if [ -d %{_docdir}/%{name}-%{version} ]; then 406 | LD="%{_docdir}/%{name}-%{version}"; 407 | fi 408 | 409 | # save tmp list of installed kernel modules for weak-modules 410 | cat $LD/file.list | grep '\.ko$' | xargs realpath > /var/run/rpm-%{name}-modules.list 411 | 412 | rm -rf /usr/local/share/%{name} 413 | 414 | %postun 415 | uname -r | grep BOOT || /sbin/depmod -a > /dev/null 2>&1 || true 416 | 417 | if [ -x "/usr/sbin/weak-modules" ]; then 418 | modules=( $(cat /var/run/rpm-%{name}-modules.list) ) 419 | printf '%s\n' "${modules[@]}" | /usr/sbin/weak-modules --no-initramfs --remove-modules 420 | fi 421 | rm /var/run/rpm-%{name}-modules.list 422 | 423 | if which dracut >/dev/null 2>&1; then 424 | echo "Updating initramfs with dracut..." 425 | if dracut --force ; then 426 | echo "Successfully updated initramfs." 427 | else 428 | echo "Failed to update initramfs." 429 | echo "You must update your initramfs image for changes to take place." 430 | exit -1 431 | fi 432 | elif which mkinitrd >/dev/null 2>&1; then 433 | echo "Updating initrd with mkinitrd..." 434 | if mkinitrd; then 435 | echo "Successfully updated initrd." 436 | else 437 | echo "Failed to update initrd." 438 | echo "You must update your initrd image for changes to take place." 439 | exit -1 440 | fi 441 | else 442 | echo "Unable to determine utility to update initrd image." 443 | echo "You must update your initrd manually for changes to take place." 444 | exit -1 445 | fi 446 | 447 | -------------------------------------------------------------------------------- /pci.updates: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: GPL-2.0-only 2 | # Copyright (C) 1999 - 2025 Intel Corporation 3 | 4 | # updates for the system pci.ids file 5 | # 6 | # IMPORTANT! Entries in this list must be sorted as they 7 | # would appear in the system pci.ids file. Entries 8 | # are sorted by ven, dev, subven, subdev 9 | # (numerical order). 10 | # 11 | 8086 Intel(R) 12 | 10b6 82598 10GbE PCI-Express Ethernet Controller 13 | 10c6 82598EB 10-Gigabit AF Dual Port Network Connection 14 | 8086 a05f 10-Gigabit XF SR Dual Port Server Adapter 15 | 8086 a15f 10-Gigabit XF SR Dual Port Server Adapter 16 | 10c7 82598EB 10-Gigabit AF Network Connection 17 | 1014 037f 10-Gigabit XF SR Server Adapter 18 | 1014 0380 10-Gigabit XF LR Server Adapter 19 | 8086 a05f 10-Gigabit XF SR Server Adapter 20 | 8086 a15f 10-Gigabit XF SR Server Adapter 21 | 8086 a16f 10-Gigabit XF SR Server Adapter 22 | 10c8 82598EB 10-Gigabit AT Network Connection 23 | 8086 a10c 10-Gigabit AT Server Adapter 24 | 8086 a11c 10-Gigabit AT Server Adapter 25 | 8086 a12c 10-Gigabit AT Server Adapter 26 | 10db 82598EB 10-Gigabit Dual Port Network Connection 27 | 10dd 82598EB 10-Gigabit AT CX4 Network Connection 28 | 10e1 82598EB 10-Gigabit AF Dual Port Network Connection 29 | 8086 a15f 10-Gigabit SR Dual Port Express Module 30 | 10ec 82598EB 10-Gigabit AT CX4 Network Connection 31 | 8086 a01f 10-Gigabit CX4 Dual Port Server Adapter 32 | 8086 a11f 10-Gigabit CX4 Dual Port Server Adapter 33 | 10f1 82598EB 10-Gigabit AF Dual Port Network Connection 34 | 8086 a20f 10-Gigabit AF DA Dual Port Server Adapter 35 | 8086 a21f 10-Gigabit AF DA Dual Port Server Adapter 36 | 10f4 82598EB 10-Gigabit AF Network Connection 37 | 8086 106f 10-Gigabit XF LR Server Adapter 38 | 8086 a06f 10-Gigabit XF LR Server Adapter 39 | 10f7 10-Gigabit BR KX4 Dual Port Network Connection 40 | 108e 7b12 Sun Dual 10GbE PCIe 2.0 FEM 41 | 8086 000d Ethernet Mezzanine Adapter X520-KX4-2 42 | 10f8 82599 10 Gigabit Dual Port Backplane Connection 43 | 1028 1f63 10GbE 2P X520k bNDC 44 | 103c 17d2 HPE Ethernet 10Gb 2-port 560M Adapter 45 | 103c 18d0 HPE Ethernet 10Gb 2-port 560FLB Adapter 46 | 8086 000c Ethernet X520 10GbE Dual Port KX4-KR Mezz 47 | 10f9 82599 10 Gigabit CX4 Dual Port Network Connection 48 | 10fb 82599 10 Gigabit Dual Port Network Connection 49 | 1028 06ee Ethernet 10G X520 LOM 50 | 1028 1f72 Ethernet 10G 4P X520/I350 rNDC 51 | 103c 17d0 HPE Ethernet 10Gb 2-port 560FLR-SFP+ Adapter 52 | 103c 17d3 HPE Ethernet 10Gb 2-port 560SFP+ Adapter 53 | 103c 211b HPE Ethernet 10Gb 1-port P560FLR-SFP+ Adapter 54 | 103c 2159 HPE Ethernet 10Gb 2-port 562i Adapter 55 | 108e 7b11 Ethernet Server Adapter X520-2 56 | 17aa 1071 ThinkServer X520-2 AnyFabric 57 | 8086 0002 Ethernet Server Adapter X520-DA2 58 | 8086 0003 Ethernet Server Adapter X520-2 59 | 8086 0006 Ethernet Server Adapter X520-1 60 | 8086 0008 Ethernet OCP Server Adapter X520-2 61 | 8086 000a Ethernet Server Adapter X520-1 62 | 8086 000c Ethernet Server Adapter X520-2 63 | 8086 000d Ethernet Server Adapter X520-1OCP 64 | 8086 0470 Ethernet 10GSFP+ DP Embedded CNA X520-2 65 | 8086 7a11 Ethernet Server Adapter X520-2 66 | 8086 7a12 Ethernet Server Adapter X520-2 67 | 10fc 82599 10 Gigabit Dual Port Network Connection 68 | 1507 Ethernet Express Module X520-P2 69 | 108e 7b10 Ethernet Express Module X520-P2 70 | 1508 82598EB Gigabit BX Network Connection 71 | 150b 10-Gigabit AT2 Server Adapter 72 | 8086 a10c 10-Gigabit AT2 Server Adapter 73 | 8086 a11c 10-Gigabit AT2 Server Adapter 74 | 8086 a12c 10-Gigabit AT2 Server Adapter 75 | 1514 Ethernet X520 10GbE Dual Port KX4 Mezz 76 | 8086 000b Ethernet X520 10GbE Dual Port KX4 Mezz 77 | 1517 82599ES 10 Gigabit Network Connection 78 | 1137 006a Cisco UCS CNA M61KR-I Intel Converged Network Adapter 79 | 151c 82599 10 Gigabit TN Network Connection 80 | 108e 7b13 Sun Dual 10GBASE-T LP 81 | 8086 a02c Ethernet Server Adapter X520-T2 82 | 8086 a03c Ethernet Server Adapter X520-T2 83 | 8086 a21c Ethernet Server Adapter X520-T2 84 | 1528 Ethernet Controller X540-AT2 85 | 1028 1f61 Ethernet 10G 4P X540/I350 rNDC 86 | 103c 192d HPE Ethernet 10Gb 2-port 561FLR-T Adapter 87 | 103c 211a HPE Ethernet 10Gb 2-port 561T Adapter 88 | 108e 7b14 Sun Dual Port 10 GbE PCIe 2.0 ExpressModule, Base-T 89 | 108e 7b15 Sun Dual Port 10 GbE PCIe 2.0 Low Profile Adapter, Base-T 90 | 1137 00bf Ethernet Converged Network Adapter X540-T2 91 | 17aa 1073 ThinkServer X540-T2 AnyFabric 92 | 8086 0001 Ethernet Converged Network Adapter X540-T2 93 | 8086 0002 Ethernet Converged Network Adapter X540-T1 94 | 8086 001a Ethernet Converged Network Adapter X540-T2 95 | 8086 00a2 Ethernet Converged Network Adapter X540-T1 96 | 8086 0471 Ethernet 10GBT DP Embedded CNA X540-T2 97 | 8086 5003 Ethernet 10G 2P X540-t Adapter 98 | 8086 5004 Ethernet 10G 2P X540-t Adapter 99 | 1529 82599 10 Gigabit Dual Port Network Connection with FCoE 100 | 152a 82599 10 Gigabit Dual Port Backplane Connection with FCoE 101 | 154a Ethernet Converged Network Adapter X520-4 102 | 8086 011a Ethernet Converged Network Adapter X520-4 103 | 8086 011b Ethernet Converged Network Adapter X520-4 104 | 8086 011c Ethernet Converged Network Adapter X520-4 105 | 154d Ethernet 10G 2P X520 Adapter 106 | 8086 7b11 Ethernet 10G 2P X520 Adapter 107 | 1557 82599 10 Gigabit Network Connection 108 | 8086 0001 Ethernet OCP Server Adapter X520-1 109 | 1558 Ethernet Converged Network Adapter X520-Q1 110 | 8086 011a Ethernet Converged Network Adapter X520-Q1 111 | 8086 011b Ethernet Converged Network Adapter X520-Q1 112 | 1560 Ethernet Controller X540 113 | 1563 Ethernet Controller 10G X550T 114 | 1028 1fa8 Intel(R) Ethernet 10G 4P X550/I350 rNDC 115 | 1028 1fa9 Intel(R) Ethernet 10G 4P X550 rNDC 116 | 1137 02b2 Cisco X550-TX 10 Gig LOM 117 | 1137 02b3 Cisco X550-TX 10 Gig LOM 118 | 1590 00d1 HPE Ethernet 10Gb 2-port 562T Adapter 119 | 1590 00d2 HPE Ethernet 10Gb 2-port 562FLR-T Adapter 120 | 8086 0001 Ethernet Converged Network Adapter X550-T2 121 | 8086 001a Ethernet Converged Network Adapter X550-T2 122 | 8086 001b Ethernet Server Adapter X550-T2 for OCP 123 | 8086 001d Ethernet 10G 2P X550-t Adapter 124 | 8086 0022 Ethernet Converged Network Adapter X550-T2 125 | 15aa Ethernet Connection X552 10 GbE Backplane 126 | 15ab Ethernet Connection X552 10 GbE Backplane 127 | 15ac Ethernet Connection X552 10 GbE SFP+ 128 | 15ad Ethernet Connection X552/X557-AT 10GBASE-T 129 | 15ae Ethernet Connection X552 1000BASE-T 130 | 15b0 Ethernet Connection X552 Backplane 131 | 15c2 Ethernet Connection X553 Backplane 132 | 15c3 Ethernet Connection X553 Backplane 133 | 15c4 Ethernet Connection X553 10 GbE SFP+ 134 | 15c6 Ethernet Connection X553 1GbE 135 | 15c7 Ethernet Connection X553 1GbE 136 | 15c8 Ethernet Connection X553/X557-AT 10GBASE-T 137 | 15ca Ethernet Connection X553 QSFP+ 138 | 15cc Ethernet Connection X553 QSFP+ 139 | 15ce Ethernet Connection X553 10 GbE SFP+ 140 | 15d1 Ethernet Controller 10G X550T 141 | 8086 0002 Ethernet Converged Network Adapter X550-T1 142 | 8086 001b Ethernet Server Adapter X550-T1 for OCP 143 | 8086 0021 Ethernet Converged Network Adapter X550-T1 144 | 8086 00a2 Ethernet Converged Network Adapter X550-T1 145 | 15e4 Ethernet Connection X553 1GbE 146 | 15e5 Ethernet Connection X553 1GbE 147 | 57ae Ethernet Controller E610 Backplane 148 | 57af Ethernet Controller E610 SFP 149 | 57b0 Ethernet Controller E610 10GBASE T 150 | 8086 0001 Ethernet Network Adapter E610-XT4 151 | 8086 0002 Ethernet Network Adapter E610-XT2 152 | 8086 0003 Ethernet Network Adapter E610-XT4 for OCP 3.0 153 | 8086 0004 Ethernet Network Adapter E610-XT2 for OCP 3.0 154 | 57b1 Ethernet Controller E610 2.5GBASE T 155 | 8086 0000 Ethernet Converged Network Adapter E610 156 | 8086 0002 Ethernet Network Adapter E610-IT4 157 | 8086 0003 Ethernet Network Adapter E610-IT4 for OCP 3.0 158 | 57b2 Ethernet Controller E610 SGMII 159 | -------------------------------------------------------------------------------- /scripts/set_irq_affinity: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | # SPDX-License-Identifier: BSD-3-Clause 3 | # Copyright (C) 2015 - 2023 Intel Corporation 4 | # 5 | # Affinitize interrupts to cores 6 | # 7 | # typical usage is (as root): 8 | # set_irq_affinity -x local eth1 9 | # set_irq_affinity -s eth1 10 | # 11 | # to get help: 12 | # set_irq_affinity 13 | 14 | usage() 15 | { 16 | echo 17 | echo "Usage: option -s to show current settings only" 18 | echo "Usage: $0 [-x|-X] [all|local|remote []|one |custom|] ..." 19 | echo " Options: " 20 | echo " -s Shows current affinity settings" 21 | echo " -x Configure XPS as well as smp_affinity" 22 | echo " -X Disable XPS but set smp_affinity" 23 | echo " [all] is the default value" 24 | echo " [remote []] can be followed by a specific node number" 25 | echo " Examples:" 26 | echo " $0 -s eth1 # Show settings on eth1" 27 | 28 | echo " $0 all eth1 eth2 # eth1 and eth2 to all cores" 29 | echo " $0 one 2 eth1 # eth1 to core 2 only" 30 | echo " $0 local eth1 # eth1 to local cores only" 31 | echo " $0 remote eth1 # eth1 to remote cores only" 32 | echo " $0 custom eth1 # prompt for eth1 interface" 33 | echo " $0 0-7,16-23 eth0 # eth1 to cores 0-7 and 16-23" 34 | echo 35 | exit 1 36 | } 37 | 38 | usageX() 39 | { 40 | echo "options -x and -X cannot both be specified, pick one" 41 | exit 1 42 | } 43 | 44 | if [ "$1" == "-x" ]; then 45 | XPS_ENA=1 46 | shift 47 | fi 48 | 49 | if [ "$1" == "-s" ]; then 50 | SHOW=1 51 | echo Show affinity settings 52 | shift 53 | fi 54 | 55 | if [ "$1" == "-X" ]; then 56 | if [ -n "$XPS_ENA" ]; then 57 | usageX 58 | fi 59 | XPS_DIS=2 60 | shift 61 | fi 62 | 63 | if [ "$1" == -x ]; then 64 | usageX 65 | fi 66 | 67 | if [ -n "$XPS_ENA" ] && [ -n "$XPS_DIS" ]; then 68 | usageX 69 | fi 70 | 71 | if [ -z "$XPS_ENA" ]; then 72 | XPS_ENA=$XPS_DIS 73 | fi 74 | 75 | SED=`which sed` 76 | if [[ ! -x $SED ]]; then 77 | echo " $0: ERROR: sed not found in path, this script requires sed" 78 | exit 1 79 | fi 80 | 81 | num='^[0-9]+$' 82 | 83 | # search helpers 84 | NOZEROCOMMA="s/^[0,]*//" 85 | # Vars 86 | AFF=$1 87 | shift 88 | 89 | case "$AFF" in 90 | remote) [[ $1 =~ $num ]] && rnode=$1 && shift ;; 91 | one) [[ $1 =~ $num ]] && cnt=$1 && shift ;; 92 | all) ;; 93 | local) ;; 94 | custom) ;; 95 | [0-9]*) ;; 96 | -h|--help) usage ;; 97 | "") usage ;; 98 | *) IFACES=$AFF && AFF=all ;; # Backwards compat mode 99 | esac 100 | 101 | # append the interfaces listed to the string with spaces 102 | while [ "$#" -ne "0" ] ; do 103 | IFACES+=" $1" 104 | shift 105 | done 106 | 107 | # for now the user must specify interfaces 108 | if [ -z "$IFACES" ]; then 109 | usage 110 | exit 2 111 | fi 112 | 113 | notfound() 114 | { 115 | echo $MYIFACE: not found 116 | exit 15 117 | } 118 | 119 | # check the interfaces exist 120 | for MYIFACE in $IFACES; do 121 | grep -q $MYIFACE /proc/net/dev || notfound 122 | done 123 | 124 | # support functions 125 | 126 | build_mask() 127 | { 128 | VEC=$core 129 | if [ $VEC -ge 32 ] 130 | then 131 | MASK_FILL="" 132 | MASK_ZERO="00000000" 133 | let "IDX = $VEC / 32" 134 | for ((i=1; i<=$IDX;i++)) 135 | do 136 | MASK_FILL="${MASK_FILL},${MASK_ZERO}" 137 | done 138 | 139 | let "VEC -= 32 * $IDX" 140 | MASK_TMP=$((1<<$VEC)) 141 | MASK=$(printf "%X%s" $MASK_TMP $MASK_FILL) 142 | else 143 | MASK_TMP=$((1<<$VEC)) 144 | MASK=$(printf "%X" $MASK_TMP) 145 | fi 146 | } 147 | 148 | show_affinity() 149 | { 150 | # returns the MASK variable 151 | build_mask 152 | 153 | SMP_I=`sed -E "${NOZEROCOMMA}" /proc/irq/$IRQ/smp_affinity` 154 | HINT=`sed -E "${NOZEROCOMMA}" /proc/irq/$IRQ/affinity_hint` 155 | printf "ACTUAL %s %d %s <- /proc/irq/$IRQ/smp_affinity\n" $IFACE $core $SMP_I 156 | printf "HINT %s %d %s <- /proc/irq/$IRQ/affinity_hint\n" $IFACE $core $HINT 157 | IRQ_CHECK=`grep '[-,]' /proc/irq/$IRQ/smp_affinity_list` 158 | if [ ! -z $IRQ_CHECK ]; then 159 | printf " WARNING -- SMP_AFFINITY is assigned to multiple cores $IRQ_CHECK\n" 160 | fi 161 | if [ "$SMP_I" != "$HINT" ]; then 162 | printf " WARNING -- SMP_AFFINITY VALUE does not match AFFINITY_HINT \n" 163 | fi 164 | printf "NODE %s %d %s <- /proc/irq/$IRQ/node\n" $IFACE $core `cat /proc/irq/$IRQ/node` 165 | printf "LIST %s %d [%s] <- /proc/irq/$IRQ/smp_affinity_list\n" $IFACE $core `cat /proc/irq/$IRQ/smp_affinity_list` 166 | printf "XPS %s %d %s <- /sys/class/net/%s/queues/tx-%d/xps_cpus\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/tx-$((n-1))/xps_cpus` $IFACE $((n-1)) 167 | if [ -z `ls /sys/class/net/$IFACE/queues/tx-$((n-1))/xps_rxqs` ]; then 168 | echo "WARNING: xps rxqs not supported on $IFACE" 169 | else 170 | printf "XPSRXQs %s %d %s <- /sys/class/net/%s/queues/tx-%d/xps_rxqs\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/tx-$((n-1))/xps_rxqs` $IFACE $((n-1)) 171 | fi 172 | printf "TX_MAX %s %d %s <- /sys/class/net/%s/queues/tx-%d/tx_maxrate\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/tx-$((n-1))/tx_maxrate` $IFACE $((n-1)) 173 | printf "BQLIMIT %s %d %s <- /sys/class/net/%s/queues/tx-%d/byte_queue_limits/limit\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/tx-$((n-1))/byte_queue_limits/limit` $IFACE $((n-1)) 174 | printf "BQL_MAX %s %d %s <- /sys/class/net/%s/queues/tx-%d/byte_queue_limits/limit_max\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/tx-$((n-1))/byte_queue_limits/limit_max` $IFACE $((n-1)) 175 | printf "BQL_MIN %s %d %s <- /sys/class/net/%s/queues/tx-%d/byte_queue_limits/limit_min\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/tx-$((n-1))/byte_queue_limits/limit_min` $IFACE $((n-1)) 176 | if [ -z `ls /sys/class/net/$IFACE/queues/rx-$((n-1))/rps_flow_cnt` ]; then 177 | echo "WARNING: aRFS is not supported on $IFACE" 178 | else 179 | printf "RPSFCNT %s %d %s <- /sys/class/net/%s/queues/rx-%d/rps_flow_cnt\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/rx-$((n-1))/rps_flow_cnt` $IFACE $((n-1)) 180 | fi 181 | if [ -z `ls /sys/class/net/$IFACE/queues/rx-$((n-1))/rps_cpus` ]; then 182 | echo "WARNING: rps_cpus is not available on $IFACE" 183 | else 184 | printf "RPSCPU %s %d %s <- /sys/class/net/%s/queues/rx-%d/rps_cpus\n" $IFACE $core `cat /sys/class/net/$IFACE/queues/rx-$((n-1))/rps_cpus` $IFACE $((n-1)) 185 | fi 186 | echo 187 | } 188 | 189 | set_affinity() 190 | { 191 | # returns the MASK variable 192 | build_mask 193 | 194 | printf "%s" $MASK > /proc/irq/$IRQ/smp_affinity 195 | printf "%s %d %s -> /proc/irq/$IRQ/smp_affinity\n" $IFACE $core $MASK 196 | SMP_I=`sed -E "${NOZEROCOMMA}" /proc/irq/$IRQ/smp_affinity` 197 | if [ "$SMP_I" != "$MASK" ]; then 198 | printf " ACTUAL\t%s %d %s <- /proc/irq/$IRQ/smp_affinity\n" $IFACE $core $SMP_I 199 | printf " WARNING -- SMP_AFFINITY setting failed\n" 200 | fi 201 | case "$XPS_ENA" in 202 | 1) 203 | printf "%s %d %s -> /sys/class/net/%s/queues/tx-%d/xps_cpus\n" $IFACE $core $MASK $IFACE $((n-1)) 204 | printf "%s" $MASK > /sys/class/net/$IFACE/queues/tx-$((n-1))/xps_cpus 205 | ;; 206 | 2) 207 | MASK=0 208 | printf "%s %d %s -> /sys/class/net/%s/queues/tx-%d/xps_cpus\n" $IFACE $core $MASK $IFACE $((n-1)) 209 | printf "%s" $MASK > /sys/class/net/$IFACE/queues/tx-$((n-1))/xps_cpus 210 | ;; 211 | *) 212 | esac 213 | } 214 | 215 | # Allow usage of , or - 216 | # 217 | parse_range () { 218 | RANGE=${@//,/ } 219 | RANGE=${RANGE//-/..} 220 | LIST="" 221 | for r in $RANGE; do 222 | # eval lets us use vars in {#..#} range 223 | [[ $r =~ '..' ]] && r="$(eval echo {$r})" 224 | LIST+=" $r" 225 | done 226 | echo $LIST 227 | } 228 | 229 | # Affinitize interrupts 230 | # 231 | doaff() 232 | { 233 | CORES=$(parse_range $CORES) 234 | ncores=$(echo $CORES | wc -w) 235 | n=1 236 | 237 | # this script only supports interrupt vectors in pairs, 238 | # modification would be required to support a single Tx or Rx queue 239 | # per interrupt vector 240 | 241 | queues="${IFACE}-.*TxRx" 242 | 243 | irqs=$(grep "$queues" /proc/interrupts | cut -f1 -d:) 244 | [ -z "$irqs" ] && irqs=$(grep $IFACE /proc/interrupts | cut -f1 -d:) 245 | [ -z "$irqs" ] && irqs=$(for i in `ls -1 /sys/class/net/${IFACE}/device/msi_irqs | sort -n` ;do grep -w $i: /proc/interrupts | egrep -v 'fdir|async|misc|ctrl' | cut -f 1 -d :; done) 246 | [ -z "$irqs" ] && echo "Error: Could not find interrupts for $IFACE" 247 | 248 | if [ "$SHOW" == "1" ] ; then 249 | echo "TYPE IFACE CORE MASK -> FILE" 250 | echo "============================" 251 | else 252 | echo "IFACE CORE MASK -> FILE" 253 | echo "=======================" 254 | fi 255 | 256 | for IRQ in $irqs; do 257 | [ "$n" -gt "$ncores" ] && n=1 258 | j=1 259 | # much faster than calling cut for each 260 | for i in $CORES; do 261 | [ $((j++)) -ge $n ] && break 262 | done 263 | core=$i 264 | if [ "$SHOW" == "1" ] ; then 265 | show_affinity 266 | else 267 | set_affinity 268 | fi 269 | ((n++)) 270 | done 271 | } 272 | 273 | # these next 2 lines would allow script to auto-determine interfaces 274 | #[ -z "$IFACES" ] && IFACES=$(ls /sys/class/net) 275 | #[ -z "$IFACES" ] && echo "Error: No interfaces up" && exit 1 276 | 277 | # echo IFACES is $IFACES 278 | 279 | CORES=$(/dev/null) 105 | 106 | # Enable higher warning level 107 | checkwarnings: clean 108 | @+$(call devkernelbuild,modules,W=1) 109 | 110 | # Run sparse static analyzer 111 | sparse: clean 112 | @+$(call devkernelbuild,modules,C=2 CF="-D__CHECK_ENDIAN__ -Wbitwise -Wcontext") 113 | 114 | # Run coccicheck static analyzer 115 | ccc: clean 116 | @+$(call devkernelbuild,modules,coccicheck MODE=report)) 117 | 118 | # Build manfiles 119 | manfile: 120 | @gzip -c ../${DRIVER}.${MANSECTION} > ${DRIVER}.${MANSECTION}.gz 121 | # Clean the module subdirectories 122 | clean: 123 | @+$(call devkernelbuild,clean) 124 | @-rm -rf *.${MANSECTION}.gz *.ko 125 | # Install the modules and manpage 126 | mandocs_install: manfile 127 | @echo "Copying manpages..." 128 | @install -D -m 644 ${DRIVER}.${MANSECTION}.gz ${INSTALL_MOD_PATH}${MANDIR}/man${MANSECTION}/${DRIVER}.${MANSECTION}.gz 129 | # Install kernel module files. This target is called by the RPM specfile 130 | # when generating binary RPMs, and is not expected to modify files outside 131 | # of the build root. Thus, it must not update initramfs, or run depmod. 132 | modules_install: default 133 | @echo "Installing modules..." 134 | @+$(call devkernelbuild,modules_install) 135 | 136 | # After installing all the files, perform necessary work to ensure the 137 | # system will use the new modules. This includes running depmod to update 138 | # module dependencies and updating the initramfs image in case the module is 139 | # loaded during early boot. 140 | install: modules_install mandocs_install 141 | @echo "Running depmod..." 142 | $(call cmd_depmod) 143 | $(call cmd_initramfs) 144 | 145 | mandocs_uninstall: 146 | if [ -e ${INSTALL_MOD_PATH}${MANDIR}/man${MANSECTION}/${DRIVER}.${MANSECTION}.gz ] ; then \ 147 | rm -f ${INSTALL_MOD_PATH}${MANDIR}/man${MANSECTION}/${DRIVER}.${MANSECTION}.gz ; \ 148 | fi; 149 | 150 | # Remove installed module files. This target is called by the RPM specfile 151 | # when generating binary RPMs, and is not expected to modify files outside 152 | # of the build root. Thus, it must not update the initramfs image or run 153 | # depmod. 154 | modules_uninstall: 155 | rm -f ${INSTALL_MOD_PATH}/lib/modules/${KVER}/${INSTALL_MOD_DIR}/${DRIVER}.ko; 156 | 157 | # After uninstalling all the files, perform necessary work to restore the 158 | # system back to using the default kernel modules. This includes running 159 | # depmod to update module dependencies and updating the initramfs image. 160 | uninstall: modules_uninstall mandocs_uninstall 161 | $(call cmd_depmod) 162 | $(call cmd_initramfs) 163 | 164 | ######## 165 | # Help # 166 | ######## 167 | help: 168 | @echo 'Build targets:' 169 | @echo ' default - Build module(s) with standard verbosity' 170 | @echo ' noisy - Build module(s) with V=1 verbosity -- very noisy' 171 | @echo ' silent - Build module(s), squelching all output' 172 | @echo '' 173 | @echo 'Static Analysis:' 174 | @echo ' checkwarnings - Clean, then build module(s) with W=1 warnings enabled' 175 | @echo ' sparse - Clean, then check module(s) using sparse' 176 | @echo ' ccc - Clean, then check module(s) using coccicheck' 177 | @echo '' 178 | @echo 'Cleaning targets:' 179 | @echo ' clean - Clean files generated by kernel module build' 180 | @echo '' 181 | @echo 'Other targets:' 182 | @echo ' manfile - Generate a gzipped manpage' 183 | @echo ' modules_install - Install the module(s) only' 184 | @echo ' mandocs_install - Install the manpage only' 185 | @echo ' install - Build then install the module(s) and manpage, and update initramfs' 186 | @echo ' modules_uninstall - Uninstall the module(s) only' 187 | @echo ' mandocs_uninstall - Uninstall the manpage only' 188 | @echo ' uninstall - Uninstall the module(s) and manpage, and update initramfs' 189 | @echo ' help - Display this help message' 190 | @echo '' 191 | @echo 'Variables:' 192 | @echo ' LINUX_VERSION - Debug tool to force kernel LINUX_VERSION_CODE. Use at your own risk.' 193 | @echo ' W=N - Kernel variable for setting warning levels' 194 | @echo ' V=N - Kernel variable for setting output verbosity' 195 | @echo ' INSTALL_MOD_PATH - Add prefix for the module and manpage installation path' 196 | @echo ' INSTALL_MOD_DIR - Use module directory other than updates/drivers/net/ethernet/intel/${DRIVER}' 197 | @echo ' Other variables may be available for tuning make process, see' 198 | @echo ' Kernel Kbuild documentation for more information' 199 | .PHONY: default noisy clean manfile silent sparse ccc install uninstall help 200 | endif # ifneq($(KERNELRELEASE),) 201 | -------------------------------------------------------------------------------- /src/Module.supported: -------------------------------------------------------------------------------- 1 | ixgbe.ko external 2 | -------------------------------------------------------------------------------- /src/auxiliary_compat.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _AUXILIARY_COMPAT_H_ 5 | #define _AUXILIARY_COMPAT_H_ 6 | 7 | /* This file contains only the minimal set of kernel compatibility backports 8 | * required by auxiliary.c to build. It is similar to the kcompat.h file, but 9 | * reduced to an absolute minimum in order to reduce the risk of generating 10 | * different kernel symbol CRC values at build time. 11 | * 12 | * For a detailed discussion of kernel symbol CRCs, please read: 13 | * 14 | * Documentation/kernel-symbol-crc.rst 15 | * 16 | * Include only the minimum required kernel compatibility implementations from 17 | * kcompat_generated_defs.h and kcompat_impl.h. If a new fix is required, 18 | * please first implement it as part of the kcompat project before porting it 19 | * to this file. 20 | * 21 | * The current list of required implementations is: 22 | * 23 | * NEED_BUS_FIND_DEVICE_CONST_DATA 24 | * NEED_DEV_PM_DOMAIN_ATTACH 25 | * NEED_DEV_PM_DOMAIN_DETACH 26 | * 27 | * Note that kernels since v5.11 support auxiliary as a built-in config 28 | * option. Using this is always preferred to using an out-of-tree module when 29 | * available. 30 | */ 31 | 32 | #include "kcompat_generated_defs.h" 33 | 34 | /**************************** 35 | * Backport implementations * 36 | ****************************/ 37 | 38 | #ifdef NEED_BUS_FIND_DEVICE_CONST_DATA 39 | /* NEED_BUS_FIND_DEVICE_CONST_DATA 40 | * 41 | * bus_find_device() was updated in upstream commit 418e3ea157ef 42 | * ("bus_find_device: Unify the match callback with class_find_device") 43 | * to take a const void *data parameter and also have the match() function 44 | * passed in take a const void *data parameter. 45 | * 46 | * all of the kcompat below makes it so the caller can always just call 47 | * bus_find_device() according to the upstream kernel without having to worry 48 | * about const vs. non-const arguments. 49 | */ 50 | struct _kc_bus_find_device_custom_data { 51 | const void *real_data; 52 | int (*real_match)(struct device *dev, const void *data); 53 | }; 54 | 55 | static inline int _kc_bus_find_device_wrapped_match(struct device *dev, void *data) 56 | { 57 | struct _kc_bus_find_device_custom_data *custom_data = data; 58 | 59 | return custom_data->real_match(dev, custom_data->real_data); 60 | } 61 | 62 | static inline struct device * 63 | _kc_bus_find_device(struct bus_type *type, struct device *start, 64 | const void *data, 65 | int (*match)(struct device *dev, const void *data)) 66 | { 67 | struct _kc_bus_find_device_custom_data custom_data = {}; 68 | 69 | custom_data.real_data = data; 70 | custom_data.real_match = match; 71 | 72 | return bus_find_device(type, start, &custom_data, 73 | _kc_bus_find_device_wrapped_match); 74 | } 75 | 76 | /* force callers of bus_find_device() to call _kc_bus_find_device() on kernels 77 | * where NEED_BUS_FIND_DEVICE_CONST_DATA is defined 78 | */ 79 | #define bus_find_device(type, start, data, match) \ 80 | _kc_bus_find_device(type, start, data, match) 81 | #endif /* NEED_BUS_FIND_DEVICE_CONST_DATA */ 82 | 83 | #if defined(NEED_DEV_PM_DOMAIN_ATTACH) && defined(NEED_DEV_PM_DOMAIN_DETACH) 84 | #include 85 | /* NEED_DEV_PM_DOMAIN_ATTACH and NEED_DEV_PM_DOMAIN_DETACH 86 | * 87 | * dev_pm_domain_attach() and dev_pm_domain_detach() were added in upstream 88 | * commit 46420dd73b80 ("PM / Domains: Add APIs to attach/detach a PM domain for 89 | * a device"). To support older kernels and OSVs that don't have these API, just 90 | * implement how older versions worked by directly calling acpi_dev_pm_attach() 91 | * and acpi_dev_pm_detach(). 92 | */ 93 | static inline int dev_pm_domain_attach(struct device *dev, bool power_on) 94 | { 95 | if (dev->pm_domain) 96 | return 0; 97 | 98 | if (ACPI_HANDLE(dev)) 99 | return acpi_dev_pm_attach(dev, true); 100 | 101 | return 0; 102 | } 103 | 104 | static inline void dev_pm_domain_detach(struct device *dev, bool power_off) 105 | { 106 | if (ACPI_HANDLE(dev)) 107 | acpi_dev_pm_detach(dev, true); 108 | } 109 | #else /* NEED_DEV_PM_DOMAIN_ATTACH && NEED_DEV_PM_DOMAIN_DETACH */ 110 | /* it doesn't make sense to compat only one of these functions, and it is 111 | * likely either a failure in kcompat-generator.sh or a failed distribution 112 | * backport if this occurs. Don't try to support it. 113 | */ 114 | #ifdef NEED_DEV_PM_DOMAIN_ATTACH 115 | #error "NEED_DEV_PM_DOMAIN_ATTACH defined but NEED_DEV_PM_DOMAIN_DETACH not defined???" 116 | #endif /* NEED_DEV_PM_DOMAIN_ATTACH */ 117 | #ifdef NEED_DEV_PM_DOMAIN_DETACH 118 | #error "NEED_DEV_PM_DOMAIN_DETACH defined but NEED_DEV_PM_DOMAIN_ATTACH not defined???" 119 | #endif /* NEED_DEV_PM_DOMAIN_DETACH */ 120 | #endif /* NEED_DEV_PM_DOMAIN_ATTACH && NEED_DEV_PM_DOMAIN_DETACH */ 121 | 122 | #endif /* _AUXILIARY_COMPAT_H_ */ 123 | -------------------------------------------------------------------------------- /src/ixgbe_82598.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_82598_H_ 5 | #define _IXGBE_82598_H_ 6 | 7 | u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw); 8 | s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw); 9 | s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw); 10 | s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 11 | s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, 12 | bool vlvf_bypass); 13 | s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val); 14 | s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val); 15 | s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, 16 | u8 *eeprom_data); 17 | u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw); 18 | s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw); 19 | void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw); 20 | void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw); 21 | s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval); 22 | #endif /* _IXGBE_82598_H_ */ 23 | -------------------------------------------------------------------------------- /src/ixgbe_82599.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_82599_H_ 5 | #define _IXGBE_82599_H_ 6 | 7 | s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, 8 | ixgbe_link_speed *speed, bool *autoneg); 9 | enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw); 10 | void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw); 11 | void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw); 12 | void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw); 13 | void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw, 14 | ixgbe_link_speed speed); 15 | s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw, 16 | ixgbe_link_speed speed, 17 | bool autoneg_wait_to_complete); 18 | s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw, 19 | bool autoneg_wait_to_complete); 20 | s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed speed, 21 | bool autoneg_wait_to_complete); 22 | s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw); 23 | void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw); 24 | s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw); 25 | s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val); 26 | s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val); 27 | s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw); 28 | s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw); 29 | s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw); 30 | u64 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw); 31 | s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval); 32 | s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val); 33 | s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 reg_val, bool locked); 34 | #endif /* _IXGBE_82599_H_ */ 35 | -------------------------------------------------------------------------------- /src/ixgbe_api.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_API_H_ 5 | #define _IXGBE_API_H_ 6 | 7 | #include "ixgbe_type.h" 8 | 9 | void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map); 10 | 11 | s32 ixgbe_init_shared_code(struct ixgbe_hw *hw); 12 | 13 | extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 14 | extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 15 | extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw); 16 | extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw); 17 | extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw); 18 | extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw); 19 | extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw); 20 | extern s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw); 21 | 22 | s32 ixgbe_set_mac_type(struct ixgbe_hw *hw); 23 | s32 ixgbe_init_hw(struct ixgbe_hw *hw); 24 | s32 ixgbe_reset_hw(struct ixgbe_hw *hw); 25 | s32 ixgbe_start_hw(struct ixgbe_hw *hw); 26 | s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw); 27 | enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw); 28 | s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr); 29 | s32 ixgbe_get_bus_info(struct ixgbe_hw *hw); 30 | u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw); 31 | u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw); 32 | s32 ixgbe_stop_adapter(struct ixgbe_hw *hw); 33 | s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size); 34 | 35 | s32 ixgbe_identify_phy(struct ixgbe_hw *hw); 36 | s32 ixgbe_reset_phy(struct ixgbe_hw *hw); 37 | s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 38 | u16 *phy_data); 39 | s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 40 | u16 phy_data); 41 | 42 | s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); 43 | s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw); 44 | s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, 45 | ixgbe_link_speed *speed, 46 | bool *link_up); 47 | s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, 48 | ixgbe_link_speed speed, 49 | bool autoneg_wait_to_complete); 50 | s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on); 51 | void ixgbe_disable_tx_laser(struct ixgbe_hw *hw); 52 | void ixgbe_enable_tx_laser(struct ixgbe_hw *hw); 53 | void ixgbe_flap_tx_laser(struct ixgbe_hw *hw); 54 | s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 55 | bool autoneg_wait_to_complete); 56 | s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 57 | bool autoneg_wait_to_complete); 58 | s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 59 | bool *link_up, bool link_up_wait_to_complete); 60 | s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 61 | bool *autoneg); 62 | s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index); 63 | s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index); 64 | s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index); 65 | s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index); 66 | 67 | s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw); 68 | s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data); 69 | s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 70 | u16 words, u16 *data); 71 | s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data); 72 | s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 73 | u16 words, u16 *data); 74 | 75 | s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val); 76 | s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw); 77 | 78 | s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); 79 | s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 80 | u32 enable_addr); 81 | s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index); 82 | s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 83 | s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq); 84 | s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 85 | s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw); 86 | u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw); 87 | s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 88 | u32 addr_count, ixgbe_mc_addr_itr func); 89 | s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 90 | u32 mc_addr_count, ixgbe_mc_addr_itr func, 91 | bool clear); 92 | void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq); 93 | s32 ixgbe_enable_mc(struct ixgbe_hw *hw); 94 | s32 ixgbe_disable_mc(struct ixgbe_hw *hw); 95 | s32 ixgbe_clear_vfta(struct ixgbe_hw *hw); 96 | s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, 97 | u32 vind, bool vlan_on, bool vlvf_bypass); 98 | s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 99 | bool vlan_on, u32 *vfta_delta, u32 vfta, 100 | bool vlvf_bypass); 101 | s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind); 102 | s32 ixgbe_fc_enable(struct ixgbe_hw *hw); 103 | s32 ixgbe_setup_fc(struct ixgbe_hw *hw); 104 | s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 105 | u8 ver, u16 len, char *driver_ver); 106 | bool ixgbe_get_fw_tsam_mode(struct ixgbe_hw *hw); 107 | s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw); 108 | s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw); 109 | void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr); 110 | s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, 111 | u16 *firmware_version); 112 | s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val); 113 | s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val); 114 | s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw); 115 | s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data); 116 | u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw); 117 | s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval); 118 | s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw); 119 | s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw); 120 | s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw); 121 | s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl); 122 | s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl, 123 | bool cloud_mode); 124 | void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, 125 | union ixgbe_atr_hash_dword input, 126 | union ixgbe_atr_hash_dword common, 127 | u8 queue); 128 | s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw, 129 | union ixgbe_atr_input *input_mask, bool cloud_mode); 130 | s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw, 131 | union ixgbe_atr_input *input, 132 | u16 soft_id, u8 queue, bool cloud_mode); 133 | s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw, 134 | union ixgbe_atr_input *input, 135 | u16 soft_id); 136 | s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, 137 | union ixgbe_atr_input *input, 138 | union ixgbe_atr_input *mask, 139 | u16 soft_id, 140 | u8 queue, 141 | bool cloud_mode); 142 | void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input, 143 | union ixgbe_atr_input *mask); 144 | u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input, 145 | union ixgbe_atr_hash_dword common); 146 | bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw); 147 | s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 148 | u8 *data); 149 | s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 150 | u8 dev_addr, u8 *data); 151 | s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val); 152 | s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val); 153 | s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 154 | u8 data); 155 | void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue); 156 | s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 157 | u8 dev_addr, u8 data); 158 | s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val); 159 | s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val); 160 | s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data); 161 | s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr); 162 | s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr); 163 | s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps); 164 | s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask); 165 | void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask); 166 | void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw); 167 | s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 168 | u16 *wwpn_prefix); 169 | s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs); 170 | s32 ixgbe_dmac_config(struct ixgbe_hw *hw); 171 | s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw); 172 | s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw); 173 | s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee); 174 | void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable, 175 | unsigned int vf); 176 | void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, 177 | int vf); 178 | s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, 179 | u32 device_type, u32 *phy_data); 180 | s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, 181 | u32 device_type, u32 phy_data); 182 | void ixgbe_disable_mdd(struct ixgbe_hw *hw); 183 | void ixgbe_enable_mdd(struct ixgbe_hw *hw); 184 | void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap); 185 | void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf); 186 | bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw); 187 | bool ixgbe_fw_rollback_mode(struct ixgbe_hw *hw); 188 | s32 ixgbe_enter_lplu(struct ixgbe_hw *hw); 189 | s32 ixgbe_handle_lasi(struct ixgbe_hw *hw); 190 | void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed); 191 | void ixgbe_disable_rx(struct ixgbe_hw *hw); 192 | void ixgbe_enable_rx(struct ixgbe_hw *hw); 193 | s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg, 194 | u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm); 195 | s32 ixgbe_get_fw_version(struct ixgbe_hw *hw); 196 | s32 ixgbe_get_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); 197 | #endif /* _IXGBE_API_H_ */ 198 | -------------------------------------------------------------------------------- /src/ixgbe_common.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_COMMON_H_ 5 | #define _IXGBE_COMMON_H_ 6 | 7 | #include "ixgbe_type.h" 8 | 9 | void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map); 10 | 11 | u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); 12 | s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); 13 | s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); 14 | s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); 15 | void ixgbe_start_hw_gen2(struct ixgbe_hw *hw); 16 | s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); 17 | s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, 18 | u32 pba_num_size); 19 | s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); 20 | s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); 21 | void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status); 22 | void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); 23 | s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); 24 | 25 | s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); 26 | s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); 27 | s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw); 28 | 29 | s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); 30 | s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 31 | s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 32 | u16 words, u16 *data); 33 | s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); 34 | s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, 35 | u16 words, u16 *data); 36 | s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); 37 | s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, 38 | u16 words, u16 *data); 39 | s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 40 | u16 *data); 41 | s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, 42 | u16 words, u16 *data); 43 | s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); 44 | s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, 45 | u16 *checksum_val); 46 | s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); 47 | s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); 48 | 49 | s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 50 | u32 enable_addr); 51 | s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); 52 | s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); 53 | s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, 54 | u32 mc_addr_count, 55 | ixgbe_mc_addr_itr func, bool clear); 56 | s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, 57 | u32 addr_count, ixgbe_mc_addr_itr func); 58 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); 59 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); 60 | s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); 61 | s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw); 62 | s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw); 63 | 64 | s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); 65 | bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); 66 | void ixgbe_fc_autoneg(struct ixgbe_hw *hw); 67 | s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw); 68 | 69 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); 70 | s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); 71 | void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); 72 | s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw); 73 | 74 | s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); 75 | s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); 76 | 77 | s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); 78 | s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); 79 | 80 | s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 81 | s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); 82 | 83 | s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 84 | s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); 85 | s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); 86 | s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); 87 | s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); 88 | s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, 89 | u32 vind, bool vlan_on, bool vlvf_bypass); 90 | s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, 91 | bool vlan_on, u32 *vfta_delta, u32 vfta, 92 | bool vlvf_bypass); 93 | s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); 94 | s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass); 95 | s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind); 96 | 97 | s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, 98 | ixgbe_link_speed *speed, 99 | bool *link_up, bool link_up_wait_to_complete); 100 | 101 | s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, 102 | u16 *wwpn_prefix); 103 | 104 | s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); 105 | void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 106 | void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); 107 | s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); 108 | void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, 109 | int strategy); 110 | s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, 111 | u8 build, u8 ver, u16 len, const char *str); 112 | u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); 113 | s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, 114 | u32 length, u32 timeout, bool return_data); 115 | s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout); 116 | s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *); 117 | s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity, 118 | u32 (*data)[FW_PHY_ACT_DATA_COUNT]); 119 | void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); 120 | 121 | extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw); 122 | extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); 123 | bool ixgbe_mng_present(struct ixgbe_hw *hw); 124 | bool ixgbe_mng_enabled(struct ixgbe_hw *hw); 125 | 126 | #define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 127 | #define IXGBE_EMC_INTERNAL_DATA 0x00 128 | #define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 129 | #define IXGBE_EMC_DIODE1_DATA 0x01 130 | #define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 131 | #define IXGBE_EMC_DIODE2_DATA 0x23 132 | #define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A 133 | #define IXGBE_EMC_DIODE3_DATA 0x2A 134 | #define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30 135 | 136 | s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw); 137 | s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw); 138 | 139 | void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver); 140 | void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, 141 | struct ixgbe_nvm_version *nvm_ver); 142 | void ixgbe_get_orom_version(struct ixgbe_hw *hw, 143 | struct ixgbe_nvm_version *nvm_ver); 144 | void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); 145 | void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); 146 | s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, 147 | ixgbe_link_speed speed, 148 | bool autoneg_wait_to_complete); 149 | void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, 150 | ixgbe_link_speed speed); 151 | #endif /* IXGBE_COMMON */ 152 | -------------------------------------------------------------------------------- /src/ixgbe_dcb.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_DCB_H_ 5 | #define _IXGBE_DCB_H_ 6 | 7 | #include "ixgbe_type.h" 8 | 9 | /* DCB defines */ 10 | /* DCB credit calculation defines */ 11 | #define IXGBE_DCB_CREDIT_QUANTUM 64 12 | #define IXGBE_DCB_MAX_CREDIT_REFILL 511 /* 0x1FF * 64B = 32704B */ 13 | #define IXGBE_DCB_MAX_TSO_SIZE (32 * 1024) /* Max TSO pkt size in DCB*/ 14 | #define IXGBE_DCB_MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1024 / 64B */ 15 | 16 | /* 513 for 32KB TSO packet */ 17 | #define IXGBE_DCB_MIN_TSO_CREDIT \ 18 | ((IXGBE_DCB_MAX_TSO_SIZE / IXGBE_DCB_CREDIT_QUANTUM) + 1) 19 | 20 | /* DCB configuration defines */ 21 | #define IXGBE_DCB_MAX_USER_PRIORITY 8 22 | #define IXGBE_DCB_MAX_BW_GROUP 8 23 | #define IXGBE_DCB_BW_PERCENT 100 24 | 25 | #define IXGBE_DCB_TX_CONFIG 0 26 | #define IXGBE_DCB_RX_CONFIG 1 27 | 28 | /* DCB capability defines */ 29 | #define IXGBE_DCB_PG_SUPPORT 0x00000001 30 | #define IXGBE_DCB_PFC_SUPPORT 0x00000002 31 | #define IXGBE_DCB_BCN_SUPPORT 0x00000004 32 | #define IXGBE_DCB_UP2TC_SUPPORT 0x00000008 33 | #define IXGBE_DCB_GSP_SUPPORT 0x00000010 34 | 35 | struct ixgbe_dcb_support { 36 | u32 capabilities; /* DCB capabilities */ 37 | 38 | /* Each bit represents a number of TCs configurable in the hw. 39 | * If 8 traffic classes can be configured, the value is 0x80. */ 40 | u8 traffic_classes; 41 | u8 pfc_traffic_classes; 42 | }; 43 | 44 | enum ixgbe_dcb_tsa { 45 | ixgbe_dcb_tsa_ets = 0, 46 | ixgbe_dcb_tsa_group_strict_cee, 47 | ixgbe_dcb_tsa_strict 48 | }; 49 | 50 | /* Traffic class bandwidth allocation per direction */ 51 | struct ixgbe_dcb_tc_path { 52 | u8 bwg_id; /* Bandwidth Group (BWG) ID */ 53 | u8 bwg_percent; /* % of BWG's bandwidth */ 54 | u8 link_percent; /* % of link bandwidth */ 55 | u8 up_to_tc_bitmap; /* User Priority to Traffic Class mapping */ 56 | u16 data_credits_refill; /* Credit refill amount in 64B granularity */ 57 | u16 data_credits_max; /* Max credits for a configured packet buffer 58 | * in 64B granularity.*/ 59 | enum ixgbe_dcb_tsa tsa; /* Link or Group Strict Priority */ 60 | }; 61 | 62 | enum ixgbe_dcb_pfc { 63 | ixgbe_dcb_pfc_disabled = 0, 64 | ixgbe_dcb_pfc_enabled, 65 | ixgbe_dcb_pfc_enabled_txonly, 66 | ixgbe_dcb_pfc_enabled_rxonly 67 | }; 68 | 69 | /* Traffic class configuration */ 70 | struct ixgbe_dcb_tc_config { 71 | struct ixgbe_dcb_tc_path path[2]; /* One each for Tx/Rx */ 72 | enum ixgbe_dcb_pfc pfc; /* Class based flow control setting */ 73 | 74 | u16 desc_credits_max; /* For Tx Descriptor arbitration */ 75 | u8 tc; /* Traffic class (TC) */ 76 | }; 77 | 78 | enum ixgbe_dcb_pba { 79 | /* PBA[0-7] each use 64KB FIFO */ 80 | ixgbe_dcb_pba_equal = PBA_STRATEGY_EQUAL, 81 | /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */ 82 | ixgbe_dcb_pba_80_48 = PBA_STRATEGY_WEIGHTED 83 | }; 84 | 85 | struct ixgbe_dcb_num_tcs { 86 | u8 pg_tcs; 87 | u8 pfc_tcs; 88 | }; 89 | 90 | struct ixgbe_dcb_config { 91 | struct ixgbe_dcb_tc_config tc_config[IXGBE_DCB_MAX_TRAFFIC_CLASS]; 92 | struct ixgbe_dcb_support support; 93 | struct ixgbe_dcb_num_tcs num_tcs; 94 | u8 bw_percentage[2][IXGBE_DCB_MAX_BW_GROUP]; /* One each for Tx/Rx */ 95 | bool pfc_mode_enable; 96 | bool round_robin_enable; 97 | 98 | enum ixgbe_dcb_pba rx_pba_cfg; 99 | 100 | u32 dcb_cfg_version; /* Not used...OS-specific? */ 101 | u32 link_speed; /* For bandwidth allocation validation purpose */ 102 | bool vt_mode; 103 | }; 104 | 105 | /* DCB driver APIs */ 106 | 107 | /* DCB rule checking */ 108 | s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *); 109 | 110 | /* DCB credits calculation */ 111 | s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int); 112 | s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *, 113 | struct ixgbe_dcb_config *, u32, u8); 114 | 115 | /* DCB PFC */ 116 | s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *, u8, u8 *); 117 | s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *); 118 | 119 | /* DCB stats */ 120 | s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *); 121 | s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8); 122 | s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8); 123 | 124 | /* DCB config arbiters */ 125 | s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *, 126 | struct ixgbe_dcb_config *); 127 | s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *, 128 | struct ixgbe_dcb_config *); 129 | s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *, 130 | struct ixgbe_dcb_config *); 131 | 132 | /* DCB unpack routines */ 133 | void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *, u8 *, u8 *); 134 | void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *, int, u16 *); 135 | void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *, u16 *); 136 | void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *, int, u8 *); 137 | void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *, int, u8 *); 138 | void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *, int, u8 *); 139 | u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *, int, u8); 140 | 141 | /* DCB initialization */ 142 | s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, u16 *, u16 *, u8 *, u8 *, u8 *); 143 | s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *); 144 | #endif /* _IXGBE_DCB_H_ */ 145 | -------------------------------------------------------------------------------- /src/ixgbe_dcb_82598.c: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #include "ixgbe_type.h" 5 | #include "ixgbe_dcb.h" 6 | #include "ixgbe_dcb_82598.h" 7 | 8 | /** 9 | * ixgbe_dcb_get_tc_stats_82598 - Return status data for each traffic class 10 | * @hw: pointer to hardware structure 11 | * @stats: pointer to statistics structure 12 | * @tc_count: Number of elements in bwg_array. 13 | * 14 | * This function returns the status data for each of the Traffic Classes in use. 15 | */ 16 | s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *hw, 17 | struct ixgbe_hw_stats *stats, 18 | u8 tc_count) 19 | { 20 | int tc; 21 | 22 | DEBUGFUNC("dcb_get_tc_stats"); 23 | 24 | if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) 25 | return IXGBE_ERR_PARAM; 26 | 27 | /* Statistics pertaining to each traffic class */ 28 | for (tc = 0; tc < tc_count; tc++) { 29 | /* Transmitted Packets */ 30 | stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); 31 | /* Transmitted Bytes */ 32 | stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC(tc)); 33 | /* Received Packets */ 34 | stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); 35 | /* Received Bytes */ 36 | stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC(tc)); 37 | 38 | #if 0 39 | /* Can we get rid of these?? Consequently, getting rid 40 | * of the tc_stats structure. 41 | */ 42 | tc_stats_array[up]->in_overflow_discards = 0; 43 | tc_stats_array[up]->out_overflow_discards = 0; 44 | #endif 45 | } 46 | 47 | return IXGBE_SUCCESS; 48 | } 49 | 50 | /** 51 | * ixgbe_dcb_get_pfc_stats_82598 - Returns CBFC status data 52 | * @hw: pointer to hardware structure 53 | * @stats: pointer to statistics structure 54 | * @tc_count: Number of elements in bwg_array. 55 | * 56 | * This function returns the CBFC status data for each of the Traffic Classes. 57 | */ 58 | s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *hw, 59 | struct ixgbe_hw_stats *stats, 60 | u8 tc_count) 61 | { 62 | int tc; 63 | 64 | DEBUGFUNC("dcb_get_pfc_stats"); 65 | 66 | if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) 67 | return IXGBE_ERR_PARAM; 68 | 69 | for (tc = 0; tc < tc_count; tc++) { 70 | /* Priority XOFF Transmitted */ 71 | stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc)); 72 | /* Priority XOFF Received */ 73 | stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(tc)); 74 | } 75 | 76 | return IXGBE_SUCCESS; 77 | } 78 | 79 | /** 80 | * ixgbe_dcb_config_rx_arbiter_82598 - Config Rx data arbiter 81 | * @hw: pointer to hardware structure 82 | * @refill: refill credits index by traffic class 83 | * @max: max credits index by traffic class 84 | * @tsa: transmission selection algorithm indexed by traffic class 85 | * 86 | * Configure Rx Data Arbiter and credits for each traffic class. 87 | */ 88 | s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *hw, u16 *refill, 89 | u16 *max, u8 *tsa) 90 | { 91 | u32 reg = 0; 92 | u32 credit_refill = 0; 93 | u32 credit_max = 0; 94 | u8 i = 0; 95 | 96 | reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; 97 | IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); 98 | 99 | reg = IXGBE_READ_REG(hw, IXGBE_RMCS); 100 | /* Enable Arbiter */ 101 | reg &= ~IXGBE_RMCS_ARBDIS; 102 | /* Enable Receive Recycle within the BWG */ 103 | reg |= IXGBE_RMCS_RRM; 104 | /* Enable Deficit Fixed Priority arbitration*/ 105 | reg |= IXGBE_RMCS_DFP; 106 | 107 | IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); 108 | 109 | /* Configure traffic class credits and priority */ 110 | for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 111 | credit_refill = refill[i]; 112 | credit_max = max[i]; 113 | 114 | reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); 115 | 116 | if (tsa[i] == ixgbe_dcb_tsa_strict) 117 | reg |= IXGBE_RT2CR_LSP; 118 | 119 | IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg); 120 | } 121 | 122 | reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 123 | reg |= IXGBE_RDRXCTL_RDMTS_1_2; 124 | reg |= IXGBE_RDRXCTL_MPBEN; 125 | reg |= IXGBE_RDRXCTL_MCEN; 126 | IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); 127 | 128 | reg = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 129 | /* Make sure there is enough descriptors before arbitration */ 130 | reg &= ~IXGBE_RXCTRL_DMBYPS; 131 | IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg); 132 | 133 | return IXGBE_SUCCESS; 134 | } 135 | 136 | /** 137 | * ixgbe_dcb_config_tx_desc_arbiter_82598 - Config Tx Desc. arbiter 138 | * @hw: pointer to hardware structure 139 | * @refill: refill credits index by traffic class 140 | * @max: max credits index by traffic class 141 | * @bwg_id: bandwidth grouping indexed by traffic class 142 | * @tsa: transmission selection algorithm indexed by traffic class 143 | * 144 | * Configure Tx Descriptor Arbiter and credits for each traffic class. 145 | */ 146 | s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *hw, 147 | u16 *refill, u16 *max, u8 *bwg_id, 148 | u8 *tsa) 149 | { 150 | u32 reg, max_credits; 151 | u8 i; 152 | 153 | reg = IXGBE_READ_REG(hw, IXGBE_DPMCS); 154 | 155 | /* Enable arbiter */ 156 | reg &= ~IXGBE_DPMCS_ARBDIS; 157 | reg |= IXGBE_DPMCS_TSOEF; 158 | 159 | /* Configure Max TSO packet size 34KB including payload and headers */ 160 | reg |= (0x4 << IXGBE_DPMCS_MTSOS_SHIFT); 161 | 162 | IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg); 163 | 164 | /* Configure traffic class credits and priority */ 165 | for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 166 | max_credits = max[i]; 167 | reg = max_credits << IXGBE_TDTQ2TCCR_MCL_SHIFT; 168 | reg |= (u32)(refill[i]); 169 | reg |= (u32)(bwg_id[i]) << IXGBE_TDTQ2TCCR_BWG_SHIFT; 170 | 171 | if (tsa[i] == ixgbe_dcb_tsa_group_strict_cee) 172 | reg |= IXGBE_TDTQ2TCCR_GSP; 173 | 174 | if (tsa[i] == ixgbe_dcb_tsa_strict) 175 | reg |= IXGBE_TDTQ2TCCR_LSP; 176 | 177 | IXGBE_WRITE_REG(hw, IXGBE_TDTQ2TCCR(i), reg); 178 | } 179 | 180 | return IXGBE_SUCCESS; 181 | } 182 | 183 | /** 184 | * ixgbe_dcb_config_tx_data_arbiter_82598 - Config Tx data arbiter 185 | * @hw: pointer to hardware structure 186 | * @refill: refill credits index by traffic class 187 | * @max: max credits index by traffic class 188 | * @bwg_id: bandwidth grouping indexed by traffic class 189 | * @tsa: transmission selection algorithm indexed by traffic class 190 | * 191 | * Configure Tx Data Arbiter and credits for each traffic class. 192 | */ 193 | s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *hw, 194 | u16 *refill, u16 *max, u8 *bwg_id, 195 | u8 *tsa) 196 | { 197 | u32 reg; 198 | u8 i; 199 | 200 | reg = IXGBE_READ_REG(hw, IXGBE_PDPMCS); 201 | /* Enable Data Plane Arbiter */ 202 | reg &= ~IXGBE_PDPMCS_ARBDIS; 203 | /* Enable DFP and Transmit Recycle Mode */ 204 | reg |= (IXGBE_PDPMCS_TPPAC | IXGBE_PDPMCS_TRM); 205 | 206 | IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg); 207 | 208 | /* Configure traffic class credits and priority */ 209 | for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 210 | reg = refill[i]; 211 | reg |= (u32)(max[i]) << IXGBE_TDPT2TCCR_MCL_SHIFT; 212 | reg |= (u32)(bwg_id[i]) << IXGBE_TDPT2TCCR_BWG_SHIFT; 213 | 214 | if (tsa[i] == ixgbe_dcb_tsa_group_strict_cee) 215 | reg |= IXGBE_TDPT2TCCR_GSP; 216 | 217 | if (tsa[i] == ixgbe_dcb_tsa_strict) 218 | reg |= IXGBE_TDPT2TCCR_LSP; 219 | 220 | IXGBE_WRITE_REG(hw, IXGBE_TDPT2TCCR(i), reg); 221 | } 222 | 223 | /* Enable Tx packet buffer division */ 224 | reg = IXGBE_READ_REG(hw, IXGBE_DTXCTL); 225 | reg |= IXGBE_DTXCTL_ENDBUBD; 226 | IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg); 227 | 228 | return IXGBE_SUCCESS; 229 | } 230 | 231 | /** 232 | * ixgbe_dcb_config_pfc_82598 - Config priority flow control 233 | * @hw: pointer to hardware structure 234 | * @pfc_en: enabled pfc bitmask 235 | * 236 | * Configure Priority Flow Control for each traffic class. 237 | */ 238 | s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en) 239 | { 240 | u32 fcrtl, reg; 241 | u8 i; 242 | 243 | /* Enable Transmit Priority Flow Control */ 244 | reg = IXGBE_READ_REG(hw, IXGBE_RMCS); 245 | reg &= ~IXGBE_RMCS_TFCE_802_3X; 246 | reg |= IXGBE_RMCS_TFCE_PRIORITY; 247 | IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); 248 | 249 | /* Enable Receive Priority Flow Control */ 250 | reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); 251 | reg &= ~(IXGBE_FCTRL_RPFCE | IXGBE_FCTRL_RFCE); 252 | 253 | if (pfc_en) 254 | reg |= IXGBE_FCTRL_RPFCE; 255 | 256 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg); 257 | 258 | /* Configure PFC Tx thresholds per TC */ 259 | for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { 260 | if (!(pfc_en & (1 << i))) { 261 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); 262 | IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); 263 | continue; 264 | } 265 | 266 | fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; 267 | reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; 268 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl); 269 | IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), reg); 270 | } 271 | 272 | /* Configure pause time */ 273 | reg = hw->fc.pause_time | (hw->fc.pause_time << 16); 274 | for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) 275 | IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); 276 | 277 | /* Configure flow control refresh threshold value */ 278 | IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); 279 | 280 | return IXGBE_SUCCESS; 281 | } 282 | 283 | /** 284 | * ixgbe_dcb_config_tc_stats_82598 - Configure traffic class statistics 285 | * @hw: pointer to hardware structure 286 | * 287 | * Configure queue statistics registers, all queues belonging to same traffic 288 | * class uses a single set of queue statistics counters. 289 | */ 290 | s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *hw) 291 | { 292 | u32 reg = 0; 293 | u8 i = 0; 294 | u8 j = 0; 295 | 296 | /* Receive Queues stats setting - 8 queues per statistics reg */ 297 | for (i = 0, j = 0; i < 15 && j < 8; i = i + 2, j++) { 298 | reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i)); 299 | reg |= ((0x1010101) * j); 300 | IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); 301 | reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i + 1)); 302 | reg |= ((0x1010101) * j); 303 | IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i + 1), reg); 304 | } 305 | /* Transmit Queues stats setting - 4 queues per statistics reg*/ 306 | for (i = 0; i < 8; i++) { 307 | reg = IXGBE_READ_REG(hw, IXGBE_TQSMR(i)); 308 | reg |= ((0x1010101) * i); 309 | IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i), reg); 310 | } 311 | 312 | return IXGBE_SUCCESS; 313 | } 314 | 315 | /** 316 | * ixgbe_dcb_hw_config_82598 - Config and enable DCB 317 | * @hw: pointer to hardware structure 318 | * @link_speed: unused 319 | * @refill: refill credits index by traffic class 320 | * @max: max credits index by traffic class 321 | * @bwg_id: bandwidth grouping indexed by traffic class 322 | * @tsa: transmission selection algorithm indexed by traffic class 323 | * 324 | * Configure dcb settings and enable dcb mode. 325 | */ 326 | s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *hw, int link_speed, 327 | u16 *refill, u16 *max, u8 *bwg_id, 328 | u8 *tsa) 329 | { 330 | UNREFERENCED_1PARAMETER(link_speed); 331 | 332 | ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa); 333 | ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id, 334 | tsa); 335 | ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id, 336 | tsa); 337 | ixgbe_dcb_config_tc_stats_82598(hw); 338 | 339 | return IXGBE_SUCCESS; 340 | } 341 | -------------------------------------------------------------------------------- /src/ixgbe_dcb_82598.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_DCB_82598_H_ 5 | #define _IXGBE_DCB_82598_H_ 6 | 7 | /* DCB register definitions */ 8 | 9 | #define IXGBE_DPMCS_MTSOS_SHIFT 16 10 | #define IXGBE_DPMCS_TDPAC 0x00000001 /* 0 Round Robin, 11 | * 1 DFP - Deficit Fixed Priority */ 12 | #define IXGBE_DPMCS_TRM 0x00000010 /* Transmit Recycle Mode */ 13 | #define IXGBE_DPMCS_ARBDIS 0x00000040 /* DCB arbiter disable */ 14 | #define IXGBE_DPMCS_TSOEF 0x00080000 /* TSO Expand Factor: 0=x4, 1=x2 */ 15 | 16 | #define IXGBE_RUPPBMR_MQA 0x80000000 /* Enable UP to queue mapping */ 17 | 18 | #define IXGBE_RT2CR_MCL_SHIFT 12 /* Offset to Max Credit Limit setting */ 19 | #define IXGBE_RT2CR_LSP 0x80000000 /* LSP enable bit */ 20 | 21 | #define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet 22 | * buffers enable */ 23 | #define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores 24 | * (RSS) enable */ 25 | 26 | #define IXGBE_TDTQ2TCCR_MCL_SHIFT 12 27 | #define IXGBE_TDTQ2TCCR_BWG_SHIFT 9 28 | #define IXGBE_TDTQ2TCCR_GSP 0x40000000 29 | #define IXGBE_TDTQ2TCCR_LSP 0x80000000 30 | 31 | #define IXGBE_TDPT2TCCR_MCL_SHIFT 12 32 | #define IXGBE_TDPT2TCCR_BWG_SHIFT 9 33 | #define IXGBE_TDPT2TCCR_GSP 0x40000000 34 | #define IXGBE_TDPT2TCCR_LSP 0x80000000 35 | 36 | #define IXGBE_PDPMCS_TPPAC 0x00000020 /* 0 Round Robin, 37 | * 1 DFP - Deficit Fixed Priority */ 38 | #define IXGBE_PDPMCS_ARBDIS 0x00000040 /* Arbiter disable */ 39 | #define IXGBE_PDPMCS_TRM 0x00000100 /* Transmit Recycle Mode enable */ 40 | 41 | #define IXGBE_DTXCTL_ENDBUBD 0x00000004 /* Enable DBU buffer division */ 42 | 43 | #define IXGBE_TXPBSIZE_40KB 0x0000A000 /* 40KB Packet Buffer */ 44 | #define IXGBE_RXPBSIZE_48KB 0x0000C000 /* 48KB Packet Buffer */ 45 | #define IXGBE_RXPBSIZE_64KB 0x00010000 /* 64KB Packet Buffer */ 46 | #define IXGBE_RXPBSIZE_80KB 0x00014000 /* 80KB Packet Buffer */ 47 | 48 | /* DCB driver APIs */ 49 | 50 | /* DCB PFC */ 51 | s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *, u8); 52 | 53 | /* DCB stats */ 54 | s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *); 55 | s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *, 56 | struct ixgbe_hw_stats *, u8); 57 | s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *, 58 | struct ixgbe_hw_stats *, u8); 59 | 60 | /* DCB config arbiters */ 61 | s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, 62 | u8 *, u8 *); 63 | s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, 64 | u8 *, u8 *); 65 | s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, u8 *); 66 | 67 | /* DCB initialization */ 68 | s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *, int, u16 *, u16 *, u8 *, u8 *); 69 | #endif /* _IXGBE_DCB_82958_H_ */ 70 | -------------------------------------------------------------------------------- /src/ixgbe_dcb_82599.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_DCB_82599_H_ 5 | #define _IXGBE_DCB_82599_H_ 6 | 7 | /* DCB register definitions */ 8 | #define IXGBE_RTTDCS_TDPAC 0x00000001 /* 0 Round Robin, 9 | * 1 WSP - Weighted Strict Priority 10 | */ 11 | #define IXGBE_RTTDCS_VMPAC 0x00000002 /* 0 Round Robin, 12 | * 1 WRR - Weighted Round Robin 13 | */ 14 | #define IXGBE_RTTDCS_TDRM 0x00000010 /* Transmit Recycle Mode */ 15 | #define IXGBE_RTTDCS_BDPM 0x00400000 /* Bypass Data Pipe - must clear! */ 16 | #define IXGBE_RTTDCS_BPBFSM 0x00800000 /* Bypass PB Free Space - must 17 | * clear! 18 | */ 19 | #define IXGBE_RTTDCS_SPEED_CHG 0x80000000 /* Link speed change */ 20 | 21 | /* Receive UP2TC mapping */ 22 | #define IXGBE_RTRUP2TC_UP_SHIFT 3 23 | #define IXGBE_RTRUP2TC_UP_MASK 7 24 | /* Transmit UP2TC mapping */ 25 | #define IXGBE_RTTUP2TC_UP_SHIFT 3 26 | 27 | #define IXGBE_RTRPT4C_MCL_SHIFT 12 /* Offset to Max Credit Limit setting */ 28 | #define IXGBE_RTRPT4C_BWG_SHIFT 9 /* Offset to BWG index */ 29 | #define IXGBE_RTRPT4C_GSP 0x40000000 /* GSP enable bit */ 30 | #define IXGBE_RTRPT4C_LSP 0x80000000 /* LSP enable bit */ 31 | 32 | #define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet 33 | * buffers enable 34 | */ 35 | #define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores 36 | * (RSS) enable 37 | */ 38 | 39 | /* RTRPCS Bit Masks */ 40 | #define IXGBE_RTRPCS_RRM 0x00000002 /* Receive Recycle Mode enable */ 41 | /* Receive Arbitration Control: 0 Round Robin, 1 DFP */ 42 | #define IXGBE_RTRPCS_RAC 0x00000004 43 | #define IXGBE_RTRPCS_ARBDIS 0x00000040 /* Arbitration disable bit */ 44 | 45 | /* RTTDT2C Bit Masks */ 46 | #define IXGBE_RTTDT2C_MCL_SHIFT 12 47 | #define IXGBE_RTTDT2C_BWG_SHIFT 9 48 | #define IXGBE_RTTDT2C_GSP 0x40000000 49 | #define IXGBE_RTTDT2C_LSP 0x80000000 50 | 51 | #define IXGBE_RTTPT2C_MCL_SHIFT 12 52 | #define IXGBE_RTTPT2C_BWG_SHIFT 9 53 | #define IXGBE_RTTPT2C_GSP 0x40000000 54 | #define IXGBE_RTTPT2C_LSP 0x80000000 55 | 56 | /* RTTPCS Bit Masks */ 57 | #define IXGBE_RTTPCS_TPPAC 0x00000020 /* 0 Round Robin, 58 | * 1 SP - Strict Priority 59 | */ 60 | #define IXGBE_RTTPCS_ARBDIS 0x00000040 /* Arbiter disable */ 61 | #define IXGBE_RTTPCS_TPRM 0x00000100 /* Transmit Recycle Mode enable */ 62 | #define IXGBE_RTTPCS_ARBD_SHIFT 22 63 | #define IXGBE_RTTPCS_ARBD_DCB 0x4 /* Arbitration delay in DCB mode */ 64 | 65 | #define IXGBE_TXPBTHRESH_DCB 0xA /* THRESH value for DCB mode */ 66 | 67 | /* SECTXMINIFG DCB */ 68 | #define IXGBE_SECTX_DCB 0x00001F00 /* DCB TX Buffer SEC IFG */ 69 | 70 | /* DCB driver APIs */ 71 | 72 | /* DCB PFC */ 73 | s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *, u8, u8 *); 74 | 75 | /* DCB stats */ 76 | s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *, 77 | struct ixgbe_dcb_config *); 78 | s32 ixgbe_dcb_get_tc_stats_82599(struct ixgbe_hw *, 79 | struct ixgbe_hw_stats *, u8); 80 | s32 ixgbe_dcb_get_pfc_stats_82599(struct ixgbe_hw *, 81 | struct ixgbe_hw_stats *, u8); 82 | 83 | /* DCB config arbiters */ 84 | s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, 85 | u8 *, u8 *); 86 | s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, 87 | u8 *, u8 *, u8 *); 88 | s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, u8 *, 89 | u8 *, u8 *); 90 | 91 | /* DCB initialization */ 92 | s32 ixgbe_dcb_config_82599(struct ixgbe_hw *, 93 | struct ixgbe_dcb_config *); 94 | 95 | s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *, int, u16 *, u16 *, u8 *, 96 | u8 *, u8 *); 97 | #endif /* _IXGBE_DCB_82959_H_ */ 98 | -------------------------------------------------------------------------------- /src/ixgbe_devlink.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_DEVLINK_H_ 5 | #define _IXGBE_DEVLINK_H_ 6 | 7 | #if IS_ENABLED(CONFIG_NET_DEVLINK) 8 | 9 | struct ixgbe_adapter **ixgbe_allocate_devlink(struct ixgbe_adapter *adapter); 10 | 11 | void ixgbe_devlink_register(struct ixgbe_adapter *adapter); 12 | void ixgbe_devlink_unregister(struct ixgbe_adapter *adapter); 13 | 14 | int ixgbe_devlink_register_params(struct ixgbe_adapter *adapter); 15 | void ixgbe_devlink_unregister_params(struct ixgbe_adapter *adapter); 16 | 17 | int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter); 18 | void ixgbe_devlink_unregister_port(struct ixgbe_adapter *adapter); 19 | 20 | #else /* CONFIG_NET_DEVLINK */ 21 | 22 | struct ixgbe_adapter **ixgbe_allocate_devlink(struct ixgbe_adapter *adapter) 23 | { 24 | return NULL 25 | } 26 | 27 | static inline void ixgbe_devlink_register(struct ixgbe_adapter *adapter) { } 28 | static inline void ixgbe_devlink_unregister(struct ixgbe_adapter *adapter) { } 29 | 30 | static inline int ixgbe_devlink_register_params(struct ixgbe_adapter *adapter) { return 0; } 31 | static inline void ixgbe_devlink_unregister_params(struct ixgbe_adapter *adapter) { } 32 | 33 | static inline int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter) { return 0; } 34 | static inline void ixgbe_devlink_unregister_port(struct ixgbe_adapter *adapter) { } 35 | 36 | #endif /* !CONFIG_NET_DEVLINK */ 37 | 38 | #if IS_ENABLED(CONFIG_NET_DEVLINK) && defined(HAVE_DEVLINK_REGIONS) 39 | 40 | void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter); 41 | void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter); 42 | 43 | #else 44 | 45 | static inline void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter) { } 46 | static inline void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter) { } 47 | 48 | #endif 49 | 50 | #endif /* _IXGBE_DEVLINK_H_ */ 51 | -------------------------------------------------------------------------------- /src/ixgbe_e610.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_E610_H_ 5 | #define _IXGBE_E610_H_ 6 | 7 | #include "ixgbe_type.h" 8 | 9 | void ixgbe_init_aci(struct ixgbe_hw *hw); 10 | void ixgbe_shutdown_aci(struct ixgbe_hw *hw); 11 | 12 | s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, 13 | void *buf, u16 buf_size); 14 | bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw); 15 | s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e, 16 | bool *pending); 17 | 18 | void ixgbe_fill_dflt_direct_cmd_desc(struct ixgbe_aci_desc *desc, u16 opcode); 19 | 20 | s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw); 21 | s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv); 22 | s32 ixgbe_aci_set_pf_context(struct ixgbe_hw *hw, u8 pf_id); 23 | 24 | s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, 25 | enum ixgbe_aci_res_access_type access, u32 timeout); 26 | void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res); 27 | s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size, 28 | u32 *cap_count, enum ixgbe_aci_opc opc); 29 | s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw, 30 | struct ixgbe_hw_dev_caps *dev_caps); 31 | s32 ixgbe_discover_func_caps(struct ixgbe_hw* hw, 32 | struct ixgbe_hw_func_caps* func_caps); 33 | s32 ixgbe_get_caps(struct ixgbe_hw *hw); 34 | s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw); 35 | s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode, 36 | struct ixgbe_aci_cmd_get_phy_caps_data *pcaps); 37 | bool ixgbe_phy_caps_equals_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, 38 | struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); 39 | void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, 40 | struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); 41 | s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, 42 | struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); 43 | s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link); 44 | s32 ixgbe_update_link_info(struct ixgbe_hw *hw); 45 | s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up); 46 | s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse, 47 | struct ixgbe_link_status *link); 48 | s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask); 49 | s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask); 50 | 51 | #ifndef NO_PTP_SUPPORT 52 | s32 ixgbe_set_ptp_by_phy(struct ixgbe_hw *hw, u8 ptp_request, u8 flags); 53 | s32 ixgbe_get_ptp_by_phy(struct ixgbe_hw *hw, u8 *ptp_config, u8 *flags, 54 | u16 *max_drift_thresh); 55 | #endif /* !NO_PTP_SUPPORT */ 56 | 57 | s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw, 58 | struct ixgbe_aci_cmd_get_link_topo *cmd, 59 | u8 *node_part_number, u16 *node_handle); 60 | #if !defined(NO_PTP_SUPPORT) 61 | s32 ixgbe_aci_get_netlist_node_pin(struct ixgbe_hw *hw, 62 | struct ixgbe_aci_cmd_get_link_topo_pin *cmd, 63 | u16 *node_handle); 64 | #endif /* !NO_PTP_SUPPORT */ 65 | s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx, 66 | u8 node_part_number, u16 *node_handle); 67 | s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw, 68 | struct ixgbe_aci_cmd_link_topo_addr topo_addr, 69 | u16 bus_addr, __le16 addr, u8 params, u8 *data); 70 | s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw, 71 | struct ixgbe_aci_cmd_link_topo_addr topo_addr, 72 | u16 bus_addr, __le16 addr, u8 params, u8 *data); 73 | s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode); 74 | s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 75 | bool value); 76 | s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, 77 | bool *value); 78 | s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr, 79 | u16 mem_addr, u8 page, u8 page_bank_ctrl, u8 *data, 80 | u8 length, bool write); 81 | s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw, 82 | struct ixgbe_aci_cmd_link_topo_params *topo_params); 83 | s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw, 84 | struct ixgbe_aci_cmd_link_topo_params *topo_params, 85 | u32 start_address, u8 *data, u8 data_size); 86 | 87 | s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw, 88 | enum ixgbe_aci_res_access_type access); 89 | void ixgbe_release_nvm(struct ixgbe_hw *hw); 90 | 91 | s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset, 92 | u16 length, void *data, bool last_command, 93 | bool read_shadow_ram); 94 | 95 | s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid); 96 | s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid, 97 | u32 offset, u16 length, void *data, 98 | bool last_command, u8 command_flags); 99 | 100 | s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw); 101 | s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw); 102 | 103 | s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags, 104 | u8 *response_flags); 105 | 106 | s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs); 107 | s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs); 108 | s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); 109 | s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); 110 | s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, struct ixgbe_netlist_info *netlist); 111 | s32 ixgbe_init_nvm(struct ixgbe_hw *hw); 112 | 113 | s32 ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw); 114 | s32 ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag, 115 | u8 *data, u16 length); 116 | s32 ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length, 117 | u8 transfer_flag, u8 *comp_response, 118 | u8 *comp_response_code); 119 | 120 | s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw); 121 | s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values); 122 | 123 | s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data); 124 | s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, u16 *data); 125 | s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length, 126 | u8 *data, bool read_shadow_ram); 127 | 128 | s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0, 129 | u32 reg_val0, u32 reg_addr1, u32 reg_val1); 130 | s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0, 131 | u32 *reg_val0, u32 reg_addr1, u32 *reg_val1); 132 | s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode, 133 | bool *reset_needed); 134 | s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw); 135 | 136 | s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id, 137 | u16 table_id, u32 start, void *buf, 138 | u16 buf_size, u16 *ret_buf_size, 139 | u16 *ret_next_cluster, u16 *ret_next_table, 140 | u32 *ret_next_index); 141 | 142 | s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw, 143 | struct ixgbe_nvm_access_cmd *cmd, 144 | struct ixgbe_nvm_access_data *data); 145 | 146 | s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source); 147 | bool ixgbe_fwlog_supported(struct ixgbe_hw *hw); 148 | s32 ixgbe_fwlog_set(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg); 149 | s32 ixgbe_fwlog_update_modules(struct ixgbe_hw *hw, 150 | struct ixgbe_fwlog_module_entry *entries, 151 | u16 num_entries); 152 | s32 ixgbe_fwlog_register(struct ixgbe_hw *hw); 153 | s32 ixgbe_fwlog_unregister(struct ixgbe_hw *hw); 154 | void ixgbe_fwlog_set_support_ena(struct ixgbe_hw *hw); 155 | s32 ixgbe_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg); 156 | void ixgbe_fwlog_event_dump(struct ixgbe_hw *hw, 157 | struct ixgbe_aci_desc *desc, void *buf); 158 | 159 | /* E610 operations */ 160 | s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw); 161 | s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw); 162 | enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw); 163 | u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw); 164 | s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed, 165 | bool autoneg_wait); 166 | s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 167 | bool *link_up, bool link_up_wait_to_complete); 168 | s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw, 169 | ixgbe_link_speed *speed, 170 | bool *autoneg); 171 | s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw, 172 | struct ixgbe_aci_cmd_set_phy_cfg_data *cfg, 173 | enum ixgbe_fc_mode req_mode); 174 | s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw); 175 | void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw); 176 | s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 177 | u8 sub, u16 len, const char *driver_ver); 178 | void ixgbe_disable_rx_E610(struct ixgbe_hw *hw); 179 | s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee); 180 | bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw); 181 | bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw); 182 | bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw); 183 | s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw); 184 | s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw); 185 | s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw); 186 | s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw); 187 | s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw, 188 | u16 *firmware_version); 189 | s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset, 190 | u8 *sff8472_data); 191 | s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, 192 | u8 *eeprom_data); 193 | s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, 194 | u8 eeprom_data); 195 | s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw); 196 | s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on); 197 | s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw); 198 | s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw); 199 | s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data); 200 | s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, 201 | u16 words, u16 *data); 202 | s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw); 203 | s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw); 204 | s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val); 205 | s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size); 206 | 207 | #endif /* _IXGBE_E610_H_ */ 208 | -------------------------------------------------------------------------------- /src/ixgbe_fcoe.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_FCOE_H_ 5 | #define _IXGBE_FCOE_H_ 6 | 7 | #if IS_ENABLED(CONFIG_FCOE) 8 | 9 | #include 10 | #include 11 | 12 | /* shift bits within STAT fo FCSTAT */ 13 | #define IXGBE_RXDADV_FCSTAT_SHIFT 4 14 | 15 | /* ddp user buffer */ 16 | #define IXGBE_BUFFCNT_MAX 256 /* 8 bits bufcnt */ 17 | #define IXGBE_FCPTR_ALIGN 16 18 | #define IXGBE_FCPTR_MAX (IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t)) 19 | #define IXGBE_FCBUFF_4KB 0x0 20 | #define IXGBE_FCBUFF_8KB 0x1 21 | #define IXGBE_FCBUFF_16KB 0x2 22 | #define IXGBE_FCBUFF_64KB 0x3 23 | #define IXGBE_FCBUFF_MAX 65536 /* 64KB max */ 24 | #define IXGBE_FCBUFF_MIN 4096 /* 4KB min */ 25 | #define IXGBE_FCOE_DDP_MAX 512 /* 9 bits xid */ 26 | #define IXGBE_FCOE_DDP_MAX_X550 2048 /* 11 bits xid */ 27 | 28 | /* Default user priority to use for FCoE */ 29 | #define IXGBE_FCOE_DEFUP 3 30 | 31 | /* fcerr */ 32 | #define IXGBE_FCERR_BADCRC 0x00100000 33 | #define IXGBE_FCERR_EOFSOF 0x00200000 34 | #define IXGBE_FCERR_NOFIRST 0x00300000 35 | #define IXGBE_FCERR_OOOSEQ 0x00400000 36 | #define IXGBE_FCERR_NODMA 0x00500000 37 | #define IXGBE_FCERR_PKTLOST 0x00600000 38 | 39 | /* FCoE DDP for target mode */ 40 | #define __IXGBE_FCOE_TARGET 1 41 | 42 | struct ixgbe_fcoe_ddp { 43 | int len; 44 | u32 err; 45 | unsigned int sgc; 46 | struct scatterlist *sgl; 47 | dma_addr_t udp; 48 | u64 *udl; 49 | struct dma_pool *pool; 50 | }; 51 | 52 | /* per cpu variables */ 53 | struct ixgbe_fcoe_ddp_pool { 54 | struct dma_pool *pool; 55 | u64 noddp; 56 | u64 noddp_ext_buff; 57 | }; 58 | 59 | struct ixgbe_fcoe { 60 | struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool; 61 | atomic_t refcnt; 62 | spinlock_t lock; 63 | struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX_X550]; 64 | void *extra_ddp_buffer; 65 | dma_addr_t extra_ddp_buffer_dma; 66 | unsigned long mode; 67 | u8 up; 68 | u8 up_set; 69 | }; 70 | #endif /* CONFIG_FCOE */ 71 | 72 | #endif /* _IXGBE_FCOE_H */ 73 | -------------------------------------------------------------------------------- /src/ixgbe_fw_update.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_FW_UPDATE_H_ 5 | #define _IXGBE_FW_UPDATE_H_ 6 | 7 | int ixgbe_flash_pldm_image(struct devlink *devlink, 8 | struct devlink_flash_update_params *params, 9 | struct netlink_ext_ack *extack); 10 | int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending, 11 | struct netlink_ext_ack *extack); 12 | int ixgbe_write_one_nvm_block(struct ixgbe_adapter *adapter, 13 | u16 module, u32 offset, 14 | u16 block_size, u8 *block, bool last_cmd, 15 | u8 *reset_level, 16 | struct netlink_ext_ack *extack); 17 | 18 | #endif 19 | -------------------------------------------------------------------------------- /src/ixgbe_mbx.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_MBX_H_ 5 | #define _IXGBE_MBX_H_ 6 | 7 | struct ixgbe_hw; 8 | 9 | struct ixgbe_mbx_operations { 10 | void (*init_params)(struct ixgbe_hw *hw); 11 | void (*release)(struct ixgbe_hw *hw, u16 mbx_id); 12 | s32 (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); 13 | s32 (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); 14 | s32 (*check_for_msg)(struct ixgbe_hw *hw, u16 vf_number); 15 | s32 (*check_for_ack)(struct ixgbe_hw *hw, u16 vf_number); 16 | s32 (*check_for_rst)(struct ixgbe_hw *hw, u16 vf_number); 17 | s32 (*clear)(struct ixgbe_hw *hw, u16 vf_number); 18 | }; 19 | 20 | struct ixgbe_mbx_stats { 21 | u32 msgs_tx; 22 | u32 msgs_rx; 23 | 24 | u32 acks; 25 | u32 reqs; 26 | u32 rsts; 27 | }; 28 | 29 | struct ixgbe_mbx_info { 30 | /* 31 | * PF: One set of operations for each VF to handle various API versions 32 | * at the same time 33 | * VF: Only the very first (0) set should be used 34 | */ 35 | struct ixgbe_mbx_operations ops[64]; 36 | struct ixgbe_mbx_stats stats; 37 | u32 timeout; 38 | u32 usec_delay; 39 | u32 vf_mailbox; 40 | u16 size; 41 | }; 42 | 43 | #define IXGBE_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */ 44 | 45 | #define IXGBE_VFMAILBOX 0x002FC 46 | #define IXGBE_VFMBMEM 0x00200 47 | 48 | /* Define mailbox register bits */ 49 | #define IXGBE_VFMAILBOX_REQ 0x00000001 /* Request for PF Ready bit */ 50 | #define IXGBE_VFMAILBOX_ACK 0x00000002 /* Ack PF message received */ 51 | #define IXGBE_VFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ 52 | #define IXGBE_VFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ 53 | #define IXGBE_VFMAILBOX_PFSTS 0x00000010 /* PF wrote a message in the MB */ 54 | #define IXGBE_VFMAILBOX_PFACK 0x00000020 /* PF ack the previous VF msg */ 55 | #define IXGBE_VFMAILBOX_RSTI 0x00000040 /* PF has reset indication */ 56 | #define IXGBE_VFMAILBOX_RSTD 0x00000080 /* PF has indicated reset done */ 57 | #define IXGBE_VFMAILBOX_R2C_BITS 0x000000B0 /* All read to clear bits */ 58 | 59 | #define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */ 60 | #define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */ 61 | #define IXGBE_PFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ 62 | #define IXGBE_PFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ 63 | #define IXGBE_PFMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */ 64 | 65 | #define IXGBE_PFMBICR_VFREQ_MASK 0x0000FFFF /* bits for VF messages */ 66 | #define IXGBE_PFMBICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */ 67 | #define IXGBE_PFMBICR_VFACK_MASK 0xFFFF0000 /* bits for VF acks */ 68 | #define IXGBE_PFMBICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */ 69 | 70 | /* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the 71 | * PF. The reverse is true if it is IXGBE_PF_*. 72 | * Message results are the value or'd with 0xF0000000 73 | */ 74 | #define IXGBE_VT_MSGTYPE_SUCCESS 0x80000000 /* Messages or'd with this 75 | * have succeeded 76 | */ 77 | #define IXGBE_VT_MSGTYPE_FAILURE 0x40000000 /* Messages or'd with this 78 | * have failed 79 | */ 80 | #define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still 81 | * clear to send requests 82 | */ 83 | #define IXGBE_VT_MSGINFO_SHIFT 16 84 | /* bits 23:16 are used for extra info for certain messages */ 85 | #define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT) 86 | 87 | /* definitions to support mailbox API version negotiation */ 88 | 89 | /* 90 | * each element denotes a version of the API; existing numbers may not 91 | * change; any additions must go at the end 92 | */ 93 | enum ixgbe_pfvf_api_rev { 94 | ixgbe_mbox_api_10, /* API version 1.0, linux/freebsd VF driver */ 95 | ixgbe_mbox_api_20, /* API version 2.0, solaris Phase1 VF driver */ 96 | ixgbe_mbox_api_11, /* API version 1.1, linux/freebsd VF driver */ 97 | ixgbe_mbox_api_12, /* API version 1.2, linux/freebsd VF driver */ 98 | ixgbe_mbox_api_13, /* API version 1.3, linux/freebsd VF driver */ 99 | /* API 1.4 is being used in the upstream for IPsec */ 100 | ixgbe_mbox_api_14, /* API version 1.4, linux/freebsd VF driver */ 101 | ixgbe_mbox_api_15, /* API version 1.5, linux/freebsd VF driver */ 102 | /* This value should always be last */ 103 | ixgbe_mbox_api_unknown, /* indicates that API version is not known */ 104 | }; 105 | 106 | /* mailbox API, legacy requests */ 107 | #define IXGBE_VF_RESET 0x01 /* VF requests reset */ 108 | #define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */ 109 | #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */ 110 | #define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */ 111 | 112 | /* mailbox API, version 1.0 VF requests */ 113 | #define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */ 114 | #define IXGBE_VF_SET_MACVLAN 0x06 /* VF requests PF for unicast filter */ 115 | #define IXGBE_VF_API_NEGOTIATE 0x08 /* negotiate API version */ 116 | 117 | /* mailbox API, version 1.1 VF requests */ 118 | #define IXGBE_VF_GET_QUEUES 0x09 /* get queue configuration */ 119 | 120 | /* mailbox API, version 1.2 VF requests */ 121 | #define IXGBE_VF_GET_RETA 0x0a /* VF request for RETA */ 122 | #define IXGBE_VF_GET_RSS_KEY 0x0b /* get RSS key */ 123 | #define IXGBE_VF_UPDATE_XCAST_MODE 0x0c 124 | #define IXGBE_VF_GET_LINK_STATE 0x10 /* get vf link state */ 125 | 126 | /* mode choices for IXGBE_VF_UPDATE_XCAST_MODE */ 127 | enum ixgbevf_xcast_modes { 128 | IXGBEVF_XCAST_MODE_NONE = 0, 129 | IXGBEVF_XCAST_MODE_MULTI, 130 | IXGBEVF_XCAST_MODE_ALLMULTI, 131 | IXGBEVF_XCAST_MODE_PROMISC, 132 | }; 133 | 134 | /* GET_QUEUES return data indices within the mailbox */ 135 | #define IXGBE_VF_TX_QUEUES 1 /* number of Tx queues supported */ 136 | #define IXGBE_VF_RX_QUEUES 2 /* number of Rx queues supported */ 137 | #define IXGBE_VF_TRANS_VLAN 3 /* Indication of port vlan */ 138 | #define IXGBE_VF_DEF_QUEUE 4 /* Default queue offset */ 139 | 140 | /* length of permanent address message returned from PF */ 141 | #define IXGBE_VF_PERMADDR_MSG_LEN 4 142 | /* word in permanent address message with the current multicast type */ 143 | #define IXGBE_VF_MC_TYPE_WORD 3 144 | 145 | #define IXGBE_PF_CONTROL_MSG 0x0100 /* PF control message */ 146 | 147 | /* mailbox API, version 2.0 VF requests */ 148 | #define IXGBE_VF_API_NEGOTIATE 0x08 /* negotiate API version */ 149 | #define IXGBE_VF_GET_QUEUES 0x09 /* get queue configuration */ 150 | #define IXGBE_VF_ENABLE_MACADDR 0x0A /* enable MAC address */ 151 | #define IXGBE_VF_DISABLE_MACADDR 0x0B /* disable MAC address */ 152 | #define IXGBE_VF_GET_MACADDRS 0x0C /* get all configured MAC addrs */ 153 | #define IXGBE_VF_SET_MCAST_PROMISC 0x0D /* enable multicast promiscuous */ 154 | #define IXGBE_VF_GET_MTU 0x0E /* get bounds on MTU */ 155 | #define IXGBE_VF_SET_MTU 0x0F /* set a specific MTU */ 156 | 157 | /* mailbox API, version 2.0 PF requests */ 158 | #define IXGBE_PF_TRANSPARENT_VLAN 0x0101 /* enable transparent vlan */ 159 | 160 | #define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */ 161 | #define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */ 162 | 163 | s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); 164 | s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); 165 | s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); 166 | s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id); 167 | s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id); 168 | s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id); 169 | s32 ixgbe_clear_mbx(struct ixgbe_hw *hw, u16 vf_number); 170 | void ixgbe_init_mbx_params_vf(struct ixgbe_hw *); 171 | void ixgbe_upgrade_mbx_params_vf(struct ixgbe_hw *hw); 172 | void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw); 173 | void ixgbe_init_mbx_params_pf_id(struct ixgbe_hw *hw, u16 vf_id); 174 | void ixgbe_upgrade_mbx_params_pf(struct ixgbe_hw *hw, u16 vf_id); 175 | 176 | #endif /* _IXGBE_MBX_H_ */ 177 | -------------------------------------------------------------------------------- /src/ixgbe_model.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_MODEL_H_ 5 | #define _IXGBE_MODEL_H_ 6 | 7 | #include "ixgbe.h" 8 | #include "ixgbe_type.h" 9 | 10 | struct ixgbe_mat_field { 11 | unsigned int off; 12 | int (*val)(struct ixgbe_fdir_filter *input, 13 | union ixgbe_atr_input *mask, 14 | u32 val, u32 m); 15 | unsigned int type; 16 | }; 17 | 18 | struct ixgbe_jump_table { 19 | struct ixgbe_mat_field *mat; 20 | struct ixgbe_fdir_filter *input; 21 | union ixgbe_atr_input *mask; 22 | u32 link_hdl; 23 | unsigned long child_loc_map[32]; 24 | }; 25 | 26 | #define IXGBE_MAX_HW_ENTRIES 2045 27 | 28 | static inline int ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input, 29 | union ixgbe_atr_input *mask, 30 | u32 val, u32 m) 31 | { 32 | input->filter.formatted.src_ip[0] = val; 33 | mask->formatted.src_ip[0] = m; 34 | return 0; 35 | } 36 | 37 | static inline int ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input, 38 | union ixgbe_atr_input *mask, 39 | u32 val, u32 m) 40 | { 41 | input->filter.formatted.dst_ip[0] = val; 42 | mask->formatted.dst_ip[0] = m; 43 | return 0; 44 | } 45 | 46 | static struct ixgbe_mat_field ixgbe_ipv4_fields[] = { 47 | { .off = 12, .val = ixgbe_mat_prgm_sip, 48 | .type = IXGBE_ATR_FLOW_TYPE_IPV4}, 49 | { .off = 16, .val = ixgbe_mat_prgm_dip, 50 | .type = IXGBE_ATR_FLOW_TYPE_IPV4}, 51 | { .val = NULL } /* terminal node */ 52 | }; 53 | 54 | static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input, 55 | union ixgbe_atr_input *mask, 56 | u32 val, u32 m) 57 | { 58 | input->filter.formatted.src_port = val & 0xffff; 59 | mask->formatted.src_port = m & 0xffff; 60 | 61 | input->filter.formatted.dst_port = val >> 16; 62 | mask->formatted.dst_port = m >> 16; 63 | 64 | return 0; 65 | }; 66 | 67 | static struct ixgbe_mat_field ixgbe_tcp_fields[] = { 68 | {.off = 0, .val = ixgbe_mat_prgm_ports, 69 | .type = IXGBE_ATR_FLOW_TYPE_TCPV4}, 70 | { .val = NULL } /* terminal node */ 71 | }; 72 | 73 | static struct ixgbe_mat_field ixgbe_udp_fields[] = { 74 | {.off = 0, .val = ixgbe_mat_prgm_ports, 75 | .type = IXGBE_ATR_FLOW_TYPE_UDPV4}, 76 | { .val = NULL } /* terminal node */ 77 | }; 78 | 79 | struct ixgbe_nexthdr { 80 | /* offset, shift, and mask of position to next header */ 81 | unsigned int o; 82 | u32 s; 83 | u32 m; 84 | /* match criteria to make this jump*/ 85 | unsigned int off; 86 | u32 val; 87 | u32 mask; 88 | /* location of jump to make */ 89 | struct ixgbe_mat_field *jump; 90 | }; 91 | 92 | static struct ixgbe_nexthdr ixgbe_ipv4_jumps[] = { 93 | { .o = 0, .s = 6, .m = 0xf, 94 | .off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields}, 95 | { .o = 0, .s = 6, .m = 0xf, 96 | .off = 8, .val = 0x1100, .mask = 0xff00, .jump = ixgbe_udp_fields}, 97 | { .jump = NULL } /* terminal node */ 98 | }; 99 | #endif /* _IXGBE_MODEL_H_ */ 100 | -------------------------------------------------------------------------------- /src/ixgbe_osdep.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | /* glue for the OS independent part of ixgbe 5 | * includes register access macros 6 | */ 7 | 8 | #ifndef _IXGBE_OSDEP_H_ 9 | #define _IXGBE_OSDEP_H_ 10 | 11 | #include 12 | #include 13 | #include 14 | #include 15 | #include 16 | #include "kcompat.h" 17 | 18 | #define IXGBE_CPU_TO_BE16(_x) cpu_to_be16(_x) 19 | #define IXGBE_BE16_TO_CPU(_x) be16_to_cpu(_x) 20 | #define IXGBE_CPU_TO_BE32(_x) cpu_to_be32(_x) 21 | #define IXGBE_BE32_TO_CPU(_x) be32_to_cpu(_x) 22 | 23 | #define msec_delay(_x) msleep(_x) 24 | 25 | #define usec_delay(_x) udelay(_x) 26 | 27 | #define STATIC static 28 | 29 | #define IOMEM __iomem 30 | 31 | #ifdef DBG 32 | #define ASSERT(_x) BUG_ON(!(_x)) 33 | #else 34 | #define ASSERT(_x) do {} while (0) 35 | #endif 36 | 37 | #define DEBUGFUNC(S) do {} while (0) 38 | 39 | #define IXGBE_SFP_DETECT_RETRIES 2 40 | 41 | struct ixgbe_hw; 42 | struct ixgbe_msg { 43 | u16 msg_enable; 44 | }; 45 | struct net_device *ixgbe_hw_to_netdev(const struct ixgbe_hw *hw); 46 | struct ixgbe_msg *ixgbe_hw_to_msg(const struct ixgbe_hw *hw); 47 | 48 | #define ixgbe_info_fwlog(hw, rowsize, groupsize, buf, len) \ 49 | print_hex_dump(KERN_INFO, " FWLOG: ", DUMP_PREFIX_NONE, \ 50 | rowsize, groupsize, buf, len, false) 51 | 52 | #define hw_dbg(hw, format, arg...) \ 53 | netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg) 54 | #define hw_err(hw, format, arg...) \ 55 | netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg) 56 | #define e_dev_info(format, arg...) \ 57 | dev_info(ixgbe_pf_to_dev(adapter), format, ## arg) 58 | #define e_dev_warn(format, arg...) \ 59 | dev_warn(ixgbe_pf_to_dev(adapter), format, ## arg) 60 | #define e_dev_err(format, arg...) \ 61 | dev_err(ixgbe_pf_to_dev(adapter), format, ## arg) 62 | #define e_dev_notice(format, arg...) \ 63 | dev_notice(ixgbe_pf_to_dev(adapter), format, ## arg) 64 | #define e_dbg(msglvl, format, arg...) \ 65 | netif_dbg(adapter, msglvl, adapter->netdev, format, ## arg) 66 | #define e_info(msglvl, format, arg...) \ 67 | netif_info(adapter, msglvl, adapter->netdev, format, ## arg) 68 | #define e_err(msglvl, format, arg...) \ 69 | netif_err(adapter, msglvl, adapter->netdev, format, ## arg) 70 | #define e_warn(msglvl, format, arg...) \ 71 | netif_warn(adapter, msglvl, adapter->netdev, format, ## arg) 72 | #define e_crit(msglvl, format, arg...) \ 73 | netif_crit(adapter, msglvl, adapter->netdev, format, ## arg) 74 | 75 | #define IXGBE_DEAD_READ_RETRIES 10 76 | #define IXGBE_DEAD_READ_REG 0xdeadbeefU 77 | #define IXGBE_FAILED_READ_REG 0xffffffffU 78 | #define IXGBE_FAILED_READ_RETRIES 5 79 | #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU 80 | #define IXGBE_FAILED_READ_CFG_WORD 0xffffU 81 | #define IXGBE_FAILED_READ_CFG_BYTE 0xffU 82 | 83 | #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \ 84 | IXGBE_WRITE_REG((a), (reg) + ((offset) << 2), (value)) 85 | 86 | #define IXGBE_READ_REG(h, r) ixgbe_read_reg(h, r, false) 87 | #define IXGBE_R32_Q(h, r) ixgbe_read_reg(h, r, true) 88 | #define IXGBE_R8_Q(h, r) readb(READ_ONCE(h->hw_addr) + r) 89 | 90 | #define IXGBE_READ_REG_ARRAY(a, reg, offset) ( \ 91 | IXGBE_READ_REG((a), (reg) + ((offset) << 2))) 92 | 93 | #ifndef writeq 94 | #define writeq(val, addr) do { writel((u32) (val), addr); \ 95 | writel((u32) (val >> 32), (addr + 4)); \ 96 | } while (0); 97 | #endif 98 | 99 | #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) 100 | 101 | u32 ixgbe_read_reg(struct ixgbe_hw *, u32 reg, bool quiet); 102 | extern u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg); 103 | extern void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value); 104 | extern void ewarn(struct ixgbe_hw *hw, const char *str); 105 | 106 | #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg_word 107 | #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg_word 108 | #define IXGBE_EEPROM_GRANT_ATTEMPS 100 109 | #define IXGBE_HTONL(_i) htonl(_i) 110 | #define IXGBE_NTOHL(_i) ntohl(_i) 111 | #define IXGBE_NTOHS(_i) ntohs(_i) 112 | #define IXGBE_CPU_TO_LE64(_i) cpu_to_le64(_i) 113 | #define IXGBE_CPU_TO_LE32(_i) cpu_to_le32(_i) 114 | #define IXGBE_CPU_TO_LE16(_i) cpu_to_le16(_i) 115 | #define IXGBE_LE16_TO_CPU(_i) le16_to_cpu(_i) 116 | #define IXGBE_LE32_TO_CPU(_i) le32_to_cpu(_i) 117 | #define IXGBE_LE32_TO_CPUS(_i) le32_to_cpus(_i) 118 | #define IXGBE_LE64_TO_CPU(_i) le64_to_cpu(_i) 119 | #define EWARN(H, W) ewarn(H, W) 120 | 121 | #undef TRUE 122 | #define TRUE true 123 | #undef FALSE 124 | #define FALSE false 125 | 126 | enum { 127 | IXGBE_ERROR_SOFTWARE, 128 | IXGBE_ERROR_POLLING, 129 | IXGBE_ERROR_INVALID_STATE, 130 | IXGBE_ERROR_UNSUPPORTED, 131 | IXGBE_ERROR_ARGUMENT, 132 | IXGBE_ERROR_CAUTION, 133 | }; 134 | 135 | #define ERROR_REPORT(level, format, arg...) do { \ 136 | switch (level) { \ 137 | case IXGBE_ERROR_SOFTWARE: \ 138 | case IXGBE_ERROR_CAUTION: \ 139 | case IXGBE_ERROR_POLLING: \ 140 | netif_warn(ixgbe_hw_to_msg(hw), drv, ixgbe_hw_to_netdev(hw), \ 141 | format, ## arg); \ 142 | break; \ 143 | case IXGBE_ERROR_INVALID_STATE: \ 144 | case IXGBE_ERROR_UNSUPPORTED: \ 145 | case IXGBE_ERROR_ARGUMENT: \ 146 | netif_err(ixgbe_hw_to_msg(hw), hw, ixgbe_hw_to_netdev(hw), \ 147 | format, ## arg); \ 148 | break; \ 149 | default: \ 150 | break; \ 151 | } \ 152 | } while (0) 153 | 154 | #define ERROR_REPORT1 ERROR_REPORT 155 | #define ERROR_REPORT2 ERROR_REPORT 156 | #define ERROR_REPORT3 ERROR_REPORT 157 | 158 | #define UNREFERENCED_XPARAMETER 159 | #define UNREFERENCED_1PARAMETER(_p) do { \ 160 | uninitialized_var(_p); \ 161 | } while (0) 162 | #define UNREFERENCED_2PARAMETER(_p, _q) do { \ 163 | uninitialized_var(_p); \ 164 | uninitialized_var(_q); \ 165 | } while (0) 166 | #define UNREFERENCED_3PARAMETER(_p, _q, _r) do { \ 167 | uninitialized_var(_p); \ 168 | uninitialized_var(_q); \ 169 | uninitialized_var(_r); \ 170 | } while (0) 171 | #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) do { \ 172 | uninitialized_var(_p); \ 173 | uninitialized_var(_q); \ 174 | uninitialized_var(_r); \ 175 | uninitialized_var(_s); \ 176 | } while (0) 177 | 178 | #define ixgbe_malloc(hw, size) kzalloc(size, GFP_KERNEL) 179 | #define ixgbe_calloc(hw, cnt, size) kcalloc(cnt, size, GFP_KERNEL) 180 | #define ixgbe_free(hw, mptr) kfree(mptr) 181 | 182 | #define ixgbe_lock mutex 183 | #define ixgbe_init_lock(lock) mutex_init(lock) 184 | #define ixgbe_destroy_lock(lock) mutex_destroy(lock) 185 | #define ixgbe_acquire_lock(lock) mutex_lock(lock) 186 | #define ixgbe_release_lock(lock) mutex_unlock(lock) 187 | 188 | #endif /* _IXGBE_OSDEP_H_ */ 189 | -------------------------------------------------------------------------------- /src/ixgbe_osdep2.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_OSDEP2_H_ 5 | #define _IXGBE_OSDEP2_H_ 6 | 7 | static inline bool ixgbe_removed(void __iomem *addr) 8 | { 9 | return unlikely(!addr); 10 | } 11 | #define IXGBE_REMOVED(a) ixgbe_removed(a) 12 | 13 | static inline void IXGBE_WRITE_REG(struct ixgbe_hw *hw, u32 reg, u32 value) 14 | { 15 | u8 __iomem *reg_addr; 16 | 17 | reg_addr = READ_ONCE(hw->hw_addr); 18 | if (IXGBE_REMOVED(reg_addr)) 19 | return; 20 | #ifdef DBG 21 | { 22 | struct net_device *netdev = ixgbe_hw_to_netdev(hw); 23 | 24 | switch (reg) { 25 | case IXGBE_EIMS: 26 | case IXGBE_EIMC: 27 | case IXGBE_EIAM: 28 | case IXGBE_EIAC: 29 | case IXGBE_EICR: 30 | case IXGBE_EICS: 31 | netdev_info(netdev, 32 | "%s: Reg - 0x%05X, value - 0x%08X\n", 33 | __func__, reg, value); 34 | } 35 | } 36 | #endif /* DBG */ 37 | writel(value, reg_addr + reg); 38 | } 39 | 40 | static inline void IXGBE_WRITE_REG64(struct ixgbe_hw *hw, u32 reg, u64 value) 41 | { 42 | u8 __iomem *reg_addr; 43 | 44 | reg_addr = READ_ONCE(hw->hw_addr); 45 | if (IXGBE_REMOVED(reg_addr)) 46 | return; 47 | writeq(value, reg_addr + reg); 48 | } 49 | 50 | #endif /* _IXGBE_OSDEP2_H_ */ 51 | -------------------------------------------------------------------------------- /src/ixgbe_phy.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_PHY_H_ 5 | #define _IXGBE_PHY_H_ 6 | 7 | #include "ixgbe_type.h" 8 | #define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0 9 | #define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2 10 | #define IXGBE_I2C_EEPROM_BANK_LEN 0xFF 11 | 12 | /* EEPROM byte offsets */ 13 | #define IXGBE_SFF_IDENTIFIER 0x0 14 | #define IXGBE_SFF_IDENTIFIER_SFP 0x3 15 | #define IXGBE_SFF_VENDOR_OUI_BYTE0 0x25 16 | #define IXGBE_SFF_VENDOR_OUI_BYTE1 0x26 17 | #define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27 18 | #define IXGBE_SFF_1GBE_COMP_CODES 0x6 19 | #define IXGBE_SFF_10GBE_COMP_CODES 0x3 20 | #define IXGBE_SFF_CABLE_TECHNOLOGY 0x8 21 | #define IXGBE_SFF_CABLE_SPEC_COMP 0x3C 22 | #define IXGBE_SFF_SFF_8472_SWAP 0x5C 23 | #define IXGBE_SFF_SFF_8472_COMP 0x5E 24 | #define IXGBE_SFF_SFF_8472_OSCB 0x6E 25 | #define IXGBE_SFF_SFF_8472_ESCB 0x76 26 | #define IXGBE_SFF_IDENTIFIER_QSFP_PLUS 0xD 27 | #define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE0 0xA5 28 | #define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE1 0xA6 29 | #define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE2 0xA7 30 | #define IXGBE_SFF_QSFP_CONNECTOR 0x82 31 | #define IXGBE_SFF_QSFP_10GBE_COMP 0x83 32 | #define IXGBE_SFF_QSFP_1GBE_COMP 0x86 33 | #define IXGBE_SFF_QSFP_CABLE_LENGTH 0x92 34 | #define IXGBE_SFF_QSFP_DEVICE_TECH 0x93 35 | 36 | /* Bitmasks */ 37 | #define IXGBE_SFF_DA_PASSIVE_CABLE 0x4 38 | #define IXGBE_SFF_DA_ACTIVE_CABLE 0x8 39 | #define IXGBE_SFF_DA_SPEC_ACTIVE_LIMITING 0x4 40 | #define IXGBE_SFF_1GBASESX_CAPABLE 0x1 41 | #define IXGBE_SFF_1GBASELX_CAPABLE 0x2 42 | #define IXGBE_SFF_1GBASET_CAPABLE 0x8 43 | #define IXGBE_SFF_10GBASESR_CAPABLE 0x10 44 | #define IXGBE_SFF_10GBASELR_CAPABLE 0x20 45 | #define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8 46 | #define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8 47 | #define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0 48 | #define IXGBE_SFF_ADDRESSING_MODE 0x4 49 | #define IXGBE_SFF_QSFP_DA_ACTIVE_CABLE 0x1 50 | #define IXGBE_SFF_QSFP_DA_PASSIVE_CABLE 0x8 51 | #define IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE 0x23 52 | #define IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL 0x0 53 | #define IXGBE_I2C_EEPROM_READ_MASK 0x100 54 | #define IXGBE_I2C_EEPROM_STATUS_MASK 0x3 55 | #define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0 56 | #define IXGBE_I2C_EEPROM_STATUS_PASS 0x1 57 | #define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2 58 | #define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 59 | 60 | #define IXGBE_CS4227 0xBE /* CS4227 address */ 61 | #define IXGBE_CS4227_GLOBAL_ID_LSB 0 62 | #define IXGBE_CS4227_GLOBAL_ID_MSB 1 63 | #define IXGBE_CS4227_SCRATCH 2 64 | #define IXGBE_CS4227_GLOBAL_ID_VALUE 0x03E5 65 | #define IXGBE_CS4227_EFUSE_PDF_SKU 0x19F 66 | #define IXGBE_CS4223_SKU_ID 0x0010 /* Quad port */ 67 | #define IXGBE_CS4227_SKU_ID 0x0014 /* Dual port */ 68 | #define IXGBE_CS4227_RESET_PENDING 0x1357 69 | #define IXGBE_CS4227_RESET_COMPLETE 0x5AA5 70 | #define IXGBE_CS4227_RETRIES 15 71 | #define IXGBE_CS4227_EFUSE_STATUS 0x0181 72 | #define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD /* Reg to program speed */ 73 | #define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0 /* Reg to program EDC */ 74 | #define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD /* Reg to program speed */ 75 | #define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0 /* Reg to program EDC */ 76 | #define IXGBE_CS4227_EEPROM_STATUS 0x5001 77 | #define IXGBE_CS4227_EEPROM_LOAD_OK 0x0001 78 | #define IXGBE_CS4227_SPEED_1G 0x8000 79 | #define IXGBE_CS4227_SPEED_10G 0 80 | #define IXGBE_CS4227_EDC_MODE_CX1 0x0002 81 | #define IXGBE_CS4227_EDC_MODE_SR 0x0004 82 | #define IXGBE_CS4227_EDC_MODE_DIAG 0x0008 83 | #define IXGBE_CS4227_RESET_HOLD 500 /* microseconds */ 84 | #define IXGBE_CS4227_RESET_DELAY 450 /* milliseconds */ 85 | #define IXGBE_CS4227_CHECK_DELAY 30 /* milliseconds */ 86 | #define IXGBE_PE 0xE0 /* Port expander address */ 87 | #define IXGBE_PE_OUTPUT 1 /* Output register offset */ 88 | #define IXGBE_PE_CONFIG 3 /* Config register offset */ 89 | #define IXGBE_PE_BIT1 (1 << 1) 90 | 91 | /* Flow control defines */ 92 | #define IXGBE_TAF_SYM_PAUSE 0x400 93 | #define IXGBE_TAF_ASM_PAUSE 0x800 94 | 95 | /* Bit-shift macros */ 96 | #define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24 97 | #define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16 98 | #define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8 99 | 100 | /* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */ 101 | #define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600 102 | #define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 103 | #define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 104 | #define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100 105 | 106 | /* I2C SDA and SCL timing parameters for standard mode */ 107 | #define IXGBE_I2C_T_HD_STA 4 108 | #define IXGBE_I2C_T_LOW 5 109 | #define IXGBE_I2C_T_HIGH 4 110 | #define IXGBE_I2C_T_SU_STA 5 111 | #define IXGBE_I2C_T_HD_DATA 5 112 | #define IXGBE_I2C_T_SU_DATA 1 113 | #define IXGBE_I2C_T_RISE 1 114 | #define IXGBE_I2C_T_FALL 1 115 | #define IXGBE_I2C_T_SU_STO 4 116 | #define IXGBE_I2C_T_BUF 5 117 | 118 | #ifndef IXGBE_SFP_DETECT_RETRIES 119 | #define IXGBE_SFP_DETECT_RETRIES 10 120 | 121 | #endif /* IXGBE_SFP_DETECT_RETRIES */ 122 | #define IXGBE_TN_LASI_STATUS_REG 0x9005 123 | #define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008 124 | 125 | /* SFP+ SFF-8472 Compliance */ 126 | #define IXGBE_SFF_SFF_8472_UNSUP 0x00 127 | 128 | s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw); 129 | bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr); 130 | enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id); 131 | s32 ixgbe_get_phy_id(struct ixgbe_hw *hw); 132 | s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw); 133 | s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw); 134 | void ixgbe_restart_auto_neg(struct ixgbe_hw *hw); 135 | s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 136 | u16 *phy_data); 137 | s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 138 | u16 phy_data); 139 | s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 140 | u32 device_type, u16 *phy_data); 141 | s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 142 | u32 device_type, u16 phy_data); 143 | s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw); 144 | s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, 145 | ixgbe_link_speed speed, 146 | bool autoneg_wait_to_complete); 147 | s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, 148 | ixgbe_link_speed *speed, 149 | bool *autoneg); 150 | s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw); 151 | 152 | /* PHY specific */ 153 | s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, 154 | ixgbe_link_speed *speed, 155 | bool *link_up); 156 | s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw); 157 | s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, 158 | u16 *firmware_version); 159 | s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, 160 | u16 *firmware_version); 161 | 162 | s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); 163 | s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on); 164 | s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw); 165 | s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); 166 | u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw); 167 | s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw); 168 | s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, 169 | u16 *list_offset, 170 | u16 *data_offset); 171 | s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw); 172 | s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 173 | u8 dev_addr, u8 *data); 174 | s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 175 | u8 dev_addr, u8 *data); 176 | s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, 177 | u8 dev_addr, u8 data); 178 | s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, 179 | u8 dev_addr, u8 data); 180 | s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 181 | u8 *eeprom_data); 182 | s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, 183 | u8 eeprom_data); 184 | void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); 185 | s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, 186 | u16 *val, bool lock); 187 | s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, 188 | u16 val, bool lock); 189 | #endif /* _IXGBE_PHY_H_ */ 190 | -------------------------------------------------------------------------------- /src/ixgbe_ptp_e600.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_PTP_E600_H_ 5 | #define _IXGBE_PTP_E600_H_ 6 | 7 | #include 8 | 9 | int ixgbe_ptp_set_timestamp_mode_e600(struct ixgbe_adapter *adapter, 10 | struct hwtstamp_config *config); 11 | void ixgbe_ptp_cfg_phy_vlan_e600(struct ixgbe_adapter *adapter, bool enabled); 12 | bool ixgbe_ptp_is_tx_ptp(struct ixgbe_adapter *adapter, struct sk_buff *skb); 13 | void ixgbe_ptp_link_up_e600(struct ixgbe_adapter *adapter); 14 | void ixgbe_ptp_reset_e600(struct ixgbe_adapter *adapter); 15 | void ixgbe_ptp_init_e600(struct ixgbe_adapter *adapter); 16 | void ixgbe_ptp_release_e600(struct ixgbe_adapter *adapter); 17 | 18 | #endif /* _IXGBE_PTP_E600_H_ */ 19 | -------------------------------------------------------------------------------- /src/ixgbe_sriov.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_SRIOV_H_ 5 | #define _IXGBE_SRIOV_H_ 6 | 7 | /* ixgbe driver limit the max number of VFs could be enabled to 8 | * 63 (IXGBE_MAX_VF_FUNCTIONS - 1) 9 | */ 10 | #define IXGBE_MAX_VFS_DRV_LIMIT (IXGBE_MAX_VF_FUNCTIONS - 1) 11 | #define IXGBE_MAX_VFS_1TC IXGBE_MAX_VFS_DRV_LIMIT 12 | #define IXGBE_MAX_VFS_4TC 31 13 | #define IXGBE_MAX_VFS_8TC 15 14 | 15 | void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter); 16 | int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, u32 vf); 17 | void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe); 18 | int ixgbe_check_mdd_event(struct ixgbe_adapter *adapter); 19 | void ixgbe_msg_task(struct ixgbe_adapter *adapter); 20 | int ixgbe_set_vf_mac(struct ixgbe_adapter *adapter, 21 | int vf, unsigned char *mac_addr); 22 | void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter); 23 | void ixgbe_set_all_vfs(struct ixgbe_adapter *adapter); 24 | #ifdef IFLA_VF_MAX 25 | int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int queue, u8 *mac); 26 | #ifdef IFLA_VF_VLAN_INFO_MAX 27 | int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int queue, u16 vlan, 28 | u8 qos, __be16 vlan_proto); 29 | #else 30 | int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int queue, u16 vlan, 31 | u8 qos); 32 | #endif 33 | #ifdef HAVE_NDO_SET_VF_MIN_MAX_TX_RATE 34 | int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate, 35 | int max_tx_rate); 36 | #else 37 | int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate); 38 | #endif /* HAVE_NDO_SET_VF_MIN_MAX_TX_RATE */ 39 | #ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN 40 | int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf, 41 | bool setting); 42 | #endif 43 | #ifdef HAVE_NDO_SET_VF_TRUST 44 | int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting); 45 | #endif 46 | int ixgbe_ndo_get_vf_config(struct net_device *netdev, 47 | int vf, struct ifla_vf_info *ivi); 48 | #endif /* IFLA_VF_MAX */ 49 | int ixgbe_disable_sriov(struct ixgbe_adapter *adapter); 50 | #ifdef CONFIG_PCI_IOV 51 | int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask); 52 | void ixgbe_enable_sriov(struct ixgbe_adapter *adapter); 53 | int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting); 54 | #endif 55 | #ifdef HAVE_NDO_SET_VF_LINK_STATE 56 | int ixgbe_ndo_set_vf_link_state(struct net_device *netdev, int vf, int state); 57 | #endif 58 | int ixgbe_pci_sriov_configure(struct pci_dev *dev, int num_vfs); 59 | #ifdef IFLA_VF_MAX 60 | void ixgbe_check_vf_rate_limit(struct ixgbe_adapter *adapter); 61 | #endif /* IFLA_VF_MAX */ 62 | void ixgbe_set_vf_link_state(struct ixgbe_adapter *adapter, int vf, int state); 63 | void ixgbe_dump_registers(struct ixgbe_adapter *adapter); 64 | 65 | /* 66 | * These are defined in ixgbe_type.h on behalf of the VF driver 67 | * but we need them here unwrapped for the PF driver. 68 | */ 69 | #define IXGBE_DEV_ID_E610_VF 0x57AD 70 | #define IXGBE_DEV_ID_82599_VF 0x10ED 71 | #define IXGBE_DEV_ID_X540_VF 0x1515 72 | #define IXGBE_DEV_ID_X550_VF 0x1565 73 | #define IXGBE_DEV_ID_X550EM_X_VF 0x15A8 74 | #define IXGBE_DEV_ID_X550EM_A_VF 0x15C5 75 | #endif /* _IXGBE_SRIOV_H_ */ 76 | 77 | -------------------------------------------------------------------------------- /src/ixgbe_sysfs.c: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #include "ixgbe.h" 5 | #include "ixgbe_common.h" 6 | #include "ixgbe_type.h" 7 | 8 | #ifdef IXGBE_SYSFS 9 | 10 | #include 11 | #include 12 | #include 13 | #include 14 | #include 15 | #include 16 | #include 17 | #ifdef IXGBE_HWMON 18 | #include 19 | #endif 20 | 21 | #ifdef IXGBE_HWMON 22 | /* hwmon callback functions */ 23 | static ssize_t ixgbe_hwmon_show_location(struct device __always_unused *dev, 24 | struct device_attribute *attr, 25 | char *buf) 26 | { 27 | struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, 28 | dev_attr); 29 | return snprintf(buf, PAGE_SIZE, "loc%u\n", 30 | ixgbe_attr->sensor->location); 31 | } 32 | 33 | static ssize_t ixgbe_hwmon_show_temp(struct device __always_unused *dev, 34 | struct device_attribute *attr, 35 | char *buf) 36 | { 37 | struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, 38 | dev_attr); 39 | unsigned int value; 40 | 41 | /* reset the temp field */ 42 | ixgbe_attr->hw->mac.ops.get_thermal_sensor_data(ixgbe_attr->hw); 43 | 44 | value = ixgbe_attr->sensor->temp; 45 | 46 | /* display millidegree */ 47 | value *= 1000; 48 | 49 | return snprintf(buf, PAGE_SIZE, "%u\n", value); 50 | } 51 | 52 | static ssize_t ixgbe_hwmon_show_cautionthresh(struct device __always_unused *dev, 53 | struct device_attribute *attr, 54 | char *buf) 55 | { 56 | struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, 57 | dev_attr); 58 | unsigned int value = ixgbe_attr->sensor->caution_thresh; 59 | 60 | /* display millidegree */ 61 | value *= 1000; 62 | 63 | return snprintf(buf, PAGE_SIZE, "%u\n", value); 64 | } 65 | 66 | static ssize_t ixgbe_hwmon_show_maxopthresh(struct device __always_unused *dev, 67 | struct device_attribute *attr, 68 | char *buf) 69 | { 70 | struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, 71 | dev_attr); 72 | unsigned int value = ixgbe_attr->sensor->max_op_thresh; 73 | 74 | /* display millidegree */ 75 | value *= 1000; 76 | 77 | return snprintf(buf, PAGE_SIZE, "%u\n", value); 78 | } 79 | 80 | /** 81 | * ixgbe_add_hwmon_attr - Create hwmon attr table for a hwmon sysfs file. 82 | * @adapter: pointer to the adapter structure 83 | * @offset: offset in the eeprom sensor data table 84 | * @type: type of sensor data to display 85 | * 86 | * For each file we want in hwmon's sysfs interface we need a device_attribute 87 | * This is included in our hwmon_attr struct that contains the references to 88 | * the data structures we need to get the data to display. 89 | */ 90 | static int ixgbe_add_hwmon_attr(struct ixgbe_adapter *adapter, 91 | unsigned int offset, int type) { 92 | unsigned int n_attr; 93 | struct hwmon_attr *ixgbe_attr; 94 | #ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS 95 | 96 | n_attr = adapter->ixgbe_hwmon_buff->n_hwmon; 97 | ixgbe_attr = &adapter->ixgbe_hwmon_buff->hwmon_list[n_attr]; 98 | #else 99 | int rc; 100 | 101 | n_attr = adapter->ixgbe_hwmon_buff.n_hwmon; 102 | ixgbe_attr = &adapter->ixgbe_hwmon_buff.hwmon_list[n_attr]; 103 | #endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ 104 | 105 | switch (type) { 106 | case IXGBE_HWMON_TYPE_LOC: 107 | ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_location; 108 | snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), 109 | "temp%u_label", offset + 1); 110 | break; 111 | case IXGBE_HWMON_TYPE_TEMP: 112 | ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_temp; 113 | snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), 114 | "temp%u_input", offset + 1); 115 | break; 116 | case IXGBE_HWMON_TYPE_CAUTION: 117 | ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_cautionthresh; 118 | snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), 119 | "temp%u_max", offset + 1); 120 | break; 121 | case IXGBE_HWMON_TYPE_MAX: 122 | ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_maxopthresh; 123 | snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), 124 | "temp%u_crit", offset + 1); 125 | break; 126 | default: 127 | return -EPERM; 128 | } 129 | 130 | /* These always the same regardless of type */ 131 | ixgbe_attr->sensor = 132 | &adapter->hw.mac.thermal_sensor_data.sensor[offset]; 133 | ixgbe_attr->hw = &adapter->hw; 134 | ixgbe_attr->dev_attr.store = NULL; 135 | ixgbe_attr->dev_attr.attr.mode = 0444; 136 | ixgbe_attr->dev_attr.attr.name = ixgbe_attr->name; 137 | 138 | #ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS 139 | sysfs_attr_init(&ixgbe_attr->dev_attr.attr); 140 | 141 | adapter->ixgbe_hwmon_buff->attrs[n_attr] = &ixgbe_attr->dev_attr.attr; 142 | 143 | ++adapter->ixgbe_hwmon_buff->n_hwmon; 144 | 145 | return 0; 146 | #else 147 | rc = device_create_file(ixgbe_pf_to_dev(adapter), 148 | &ixgbe_attr->dev_attr); 149 | 150 | if (rc == 0) 151 | ++adapter->ixgbe_hwmon_buff.n_hwmon; 152 | 153 | return rc; 154 | #endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ 155 | } 156 | #endif /* IXGBE_HWMON */ 157 | 158 | static void ixgbe_sysfs_del_adapter(struct ixgbe_adapter __maybe_unused *adapter) 159 | { 160 | #ifdef IXGBE_HWMON 161 | #ifndef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS 162 | int i; 163 | 164 | if (adapter == NULL) 165 | return; 166 | 167 | for (i = 0; i < adapter->ixgbe_hwmon_buff.n_hwmon; i++) { 168 | device_remove_file(ixgbe_pf_to_dev(adapter), 169 | &adapter->ixgbe_hwmon_buff.hwmon_list[i].dev_attr); 170 | } 171 | 172 | kfree(adapter->ixgbe_hwmon_buff.hwmon_list); 173 | 174 | if (adapter->ixgbe_hwmon_buff.device) 175 | hwmon_device_unregister(adapter->ixgbe_hwmon_buff.device); 176 | #endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ 177 | #endif /* IXGBE_HWMON */ 178 | } 179 | 180 | /* called from ixgbe_main.c */ 181 | void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter) 182 | { 183 | ixgbe_sysfs_del_adapter(adapter); 184 | } 185 | 186 | /* called from ixgbe_main.c */ 187 | int ixgbe_sysfs_init(struct ixgbe_adapter *adapter) 188 | { 189 | int rc = 0; 190 | #ifdef IXGBE_HWMON 191 | #ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS 192 | struct hwmon_buff *ixgbe_hwmon; 193 | struct device *hwmon_dev; 194 | #else 195 | struct hwmon_buff *ixgbe_hwmon = &adapter->ixgbe_hwmon_buff; 196 | int n_attrs; 197 | #endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ 198 | unsigned int i; 199 | #endif /* IXGBE_HWMON */ 200 | 201 | #ifdef IXGBE_HWMON 202 | /* If this method isn't defined we don't support thermals */ 203 | if (adapter->hw.mac.ops.init_thermal_sensor_thresh == NULL) { 204 | goto no_thermal; 205 | } 206 | 207 | /* Don't create thermal hwmon interface if no sensors present */ 208 | if (adapter->hw.mac.ops.init_thermal_sensor_thresh(&adapter->hw)) 209 | goto no_thermal; 210 | 211 | #ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS 212 | ixgbe_hwmon = devm_kzalloc(&adapter->pdev->dev, sizeof(*ixgbe_hwmon), 213 | GFP_KERNEL); 214 | 215 | if (!ixgbe_hwmon) { 216 | rc = -ENOMEM; 217 | goto exit; 218 | } 219 | 220 | adapter->ixgbe_hwmon_buff = ixgbe_hwmon; 221 | #else 222 | /* 223 | * Allocation space for max attributs 224 | * max num sensors * values (loc, temp, max, caution) 225 | */ 226 | n_attrs = IXGBE_MAX_SENSORS * 4; 227 | ixgbe_hwmon->hwmon_list = kcalloc(n_attrs, sizeof(struct hwmon_attr), 228 | GFP_KERNEL); 229 | 230 | if (!ixgbe_hwmon->hwmon_list) { 231 | rc = -ENOMEM; 232 | goto err; 233 | } 234 | #endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ 235 | 236 | for (i = 0; i < IXGBE_MAX_SENSORS; i++) { 237 | /* 238 | * Only create hwmon sysfs entries for sensors that have 239 | * meaningful data for. 240 | */ 241 | if (adapter->hw.mac.thermal_sensor_data.sensor[i].location == 0) 242 | continue; 243 | 244 | /* Bail if any hwmon attr struct fails to initialize */ 245 | rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_CAUTION); 246 | if (rc) 247 | goto err; 248 | rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_LOC); 249 | if (rc) 250 | goto err; 251 | rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_TEMP); 252 | if (rc) 253 | goto err; 254 | rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_MAX); 255 | if (rc) 256 | goto err; 257 | } 258 | 259 | #ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS 260 | ixgbe_hwmon->groups[0] = &ixgbe_hwmon->group; 261 | ixgbe_hwmon->group.attrs = ixgbe_hwmon->attrs; 262 | 263 | hwmon_dev = devm_hwmon_device_register_with_groups(&adapter->pdev->dev, 264 | "ixgbe", 265 | ixgbe_hwmon, 266 | ixgbe_hwmon->groups); 267 | 268 | if (IS_ERR(hwmon_dev)) { 269 | rc = PTR_ERR(hwmon_dev); 270 | goto exit; 271 | } 272 | 273 | #else 274 | ixgbe_hwmon->device = 275 | hwmon_device_register(ixgbe_pf_to_dev(adapter)); 276 | 277 | if (IS_ERR(ixgbe_hwmon->device)) { 278 | rc = PTR_ERR(ixgbe_hwmon->device); 279 | goto err; 280 | } 281 | 282 | #endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ 283 | no_thermal: 284 | #endif /* IXGBE_HWMON */ 285 | 286 | goto exit; 287 | 288 | err: 289 | ixgbe_sysfs_del_adapter(adapter); 290 | exit: 291 | return rc; 292 | } 293 | #endif /* IXGBE_SYSFS */ 294 | -------------------------------------------------------------------------------- /src/ixgbe_txrx_common.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_TXRX_COMMON_H_ 5 | #define _IXGBE_TXRX_COMMON_H_ 6 | 7 | #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \ 8 | IXGBE_TXD_CMD_RS) 9 | 10 | #define IXGBE_XDP_PASS 0 11 | #define IXGBE_XDP_CONSUMED BIT(0) 12 | #define IXGBE_XDP_TX BIT(1) 13 | #define IXGBE_XDP_REDIR BIT(2) 14 | 15 | #define IXGBE_PKT_HDR_PAD (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2)) 16 | 17 | void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring); 18 | void ixgbe_xdp_ring_update_tail_locked(struct ixgbe_ring *ring); 19 | 20 | #ifdef HAVE_XDP_SUPPORT 21 | #ifdef HAVE_XDP_FRAME_STRUCT 22 | int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, struct xdp_frame *xdpf); 23 | #else 24 | int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, struct xdp_buff *xdp); 25 | #endif 26 | #ifdef HAVE_AF_XDP_ZC_SUPPORT 27 | void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring); 28 | void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring); 29 | 30 | #ifndef HAVE_NETDEV_BPF_XSK_POOL 31 | struct xdp_umem *ixgbe_xsk_umem(struct ixgbe_adapter *adapter, 32 | struct ixgbe_ring *ring); 33 | int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xdp_umem *umem, 34 | u16 qid); 35 | #else 36 | struct xsk_buff_pool *ixgbe_xsk_umem(struct ixgbe_adapter *adapter, 37 | struct ixgbe_ring *ring); 38 | int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xsk_buff_pool *umem, 39 | u16 qid); 40 | #endif /* HAVE_NETDEV_BPF_XSK_POOL */ 41 | 42 | #ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL 43 | void ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 cleaned_count); 44 | void ixgbe_zca_free(struct zero_copy_allocator *alloc, unsigned long handle); 45 | #else 46 | bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 cleaned_count); 47 | #endif 48 | int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector, 49 | struct ixgbe_ring *rx_ring, 50 | const int budget); 51 | void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring); 52 | bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector, 53 | struct ixgbe_ring *tx_ring); 54 | #ifdef HAVE_NDO_XSK_WAKEUP 55 | int ixgbe_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags); 56 | #else 57 | int ixgbe_xsk_async_xmit(struct net_device *dev, u32 queue_id); 58 | #endif 59 | void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring); 60 | bool ixgbe_xsk_any_rx_ring_enabled(struct ixgbe_adapter *adapter); 61 | #endif /* HAVE_AF_XDP_ZC_SUPPORT */ 62 | #endif /* HAVE_XDP_SUPPORT */ 63 | 64 | bool ixgbe_cleanup_headers(struct ixgbe_ring __maybe_unused *rx_ring, 65 | union ixgbe_adv_rx_desc *rx_desc, 66 | struct sk_buff *skb); 67 | void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring, 68 | union ixgbe_adv_rx_desc *rx_desc, 69 | struct sk_buff *skb); 70 | void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector, 71 | struct ixgbe_ring *rx_ring, 72 | union ixgbe_adv_rx_desc *rx_desc, 73 | struct sk_buff *skb); 74 | 75 | void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, u64 qmask); 76 | #endif /* _IXGBE_TXRX_COMMON_H_ */ 77 | -------------------------------------------------------------------------------- /src/ixgbe_x540.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_X540_H_ 5 | #define _IXGBE_X540_H_ 6 | 7 | #include "ixgbe_type.h" 8 | 9 | s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw, 10 | ixgbe_link_speed *speed, bool *autoneg); 11 | enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw); 12 | s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed, 13 | bool link_up_wait_to_complete); 14 | s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw); 15 | s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw); 16 | u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw); 17 | 18 | s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw); 19 | s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data); 20 | s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words, 21 | u16 *data); 22 | s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data); 23 | s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words, 24 | u16 *data); 25 | s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw); 26 | s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val); 27 | s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw); 28 | s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw); 29 | 30 | s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask); 31 | void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask); 32 | void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw); 33 | 34 | s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index); 35 | s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index); 36 | #endif /* _IXGBE_X540_H_ */ 37 | 38 | -------------------------------------------------------------------------------- /src/ixgbe_x550.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _IXGBE_X550_H_ 5 | #define _IXGBE_X550_H_ 6 | 7 | #include "ixgbe_type.h" 8 | 9 | s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw); 10 | s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw); 11 | s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw); 12 | 13 | s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw); 14 | s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw); 15 | s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw); 16 | s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw); 17 | s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size); 18 | s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val); 19 | s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw); 20 | s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw, 21 | u16 offset, u16 words, u16 *data); 22 | s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, 23 | u16 data); 24 | s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw, 25 | u16 offset, u16 words, u16 *data); 26 | s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, 27 | u16 *data); 28 | s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset, 29 | u16 data); 30 | void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw, bool enable, 31 | unsigned int pool); 32 | void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw, 33 | bool enable, int vf); 34 | s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, 35 | u32 device_type, u32 data); 36 | s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, 37 | u32 device_type, u32 *data); 38 | s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min, 39 | u8 build, u8 ver, u16 len, const char *str); 40 | s32 ixgbe_get_phy_token(struct ixgbe_hw *); 41 | s32 ixgbe_put_phy_token(struct ixgbe_hw *); 42 | void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw); 43 | void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw); 44 | void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap); 45 | void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf); 46 | enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw); 47 | s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw); 48 | s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw, 49 | ixgbe_link_speed *speed, bool *autoneg); 50 | void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw); 51 | s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw); 52 | s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw); 53 | s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw); 54 | s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw); 55 | s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw); 56 | s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw); 57 | u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw); 58 | void ixgbe_disable_rx_x550(struct ixgbe_hw *hw); 59 | s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed); 60 | s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw); 61 | s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask); 62 | void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask); 63 | s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw); 64 | s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw, 65 | ixgbe_link_speed speed, 66 | bool autoneg_wait_to_complete); 67 | s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw, 68 | ixgbe_link_speed speed, 69 | bool autoneg_wait_to_complete); 70 | s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, 71 | u32 device_type, u16 *phy_data); 72 | s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, 73 | u32 device_type, u16 phy_data); 74 | s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw); 75 | void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw); 76 | void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw); 77 | void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw); 78 | s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw); 79 | s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw, 80 | ixgbe_link_speed speed, 81 | bool autoneg_wait_to_complete); 82 | s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 83 | bool *link_up, bool link_up_wait_to_complete); 84 | s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw); 85 | s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw); 86 | s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx); 87 | s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx); 88 | bool ixgbe_fw_recovery_mode_X550(struct ixgbe_hw *hw); 89 | #endif /* _IXGBE_X550_H_ */ 90 | -------------------------------------------------------------------------------- /src/kcompat_cleanup.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | /* SPDX-License-Identifier: GPL-2.0 */ 5 | #ifndef _KCOMPAT_CLEANUP_H_ 6 | #define _KCOMPAT_CLEANUP_H_ 7 | 8 | #include 9 | 10 | #ifndef typeof_member 11 | #define typeof_member(T, m) typeof(((T*)0)->m) 12 | #endif 13 | #ifndef GCC_VERSION 14 | #define GCC_VERSION (__GNUC__ * 10000 \ 15 | + __GNUC_MINOR__ * 100 \ 16 | + __GNUC_PATCHLEVEL__) 17 | #endif /* GCC_VERSION */ 18 | #define GCC_IS_BELOW(x) (GCC_VERSION < (x)) 19 | 20 | #if defined __has_attribute 21 | #if __has_attribute(cleanup) 22 | #define HAVE_ATTRIBUTE_CLEANUP 23 | #endif 24 | #else 25 | #if !GCC_IS_BELOW(30306) 26 | #define HAVE_ATTRIBUTE_CLEANUP 27 | #endif 28 | #endif 29 | 30 | #ifndef HAVE_ATTRIBUTE_CLEANUP 31 | #error "This compiler is too old, cleanup extension (GCC 3.3.6) is required." 32 | #endif 33 | 34 | #if defined(__clang__) 35 | /* 36 | * Clang prior to 17 is being silly and considers many __cleanup() variables 37 | * as unused (because they are, their sole purpose is to go out of scope). 38 | * 39 | * https://reviews.llvm.org/D152180 40 | */ 41 | #define __cleanup(func) __maybe_unused __attribute__((__cleanup__(func))) 42 | #else /* __clang__ */ 43 | /* 44 | * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-cleanup-variable-attribute 45 | * clang: https://clang.llvm.org/docs/AttributeReference.html#cleanup 46 | */ 47 | #define __cleanup(func) __attribute__((__cleanup__(func))) 48 | #endif /* __clang__ */ 49 | 50 | /* 51 | * DEFINE_FREE(name, type, free): 52 | * simple helper macro that defines the required wrapper for a __free() 53 | * based cleanup function. @free is an expression using '_T' to access the 54 | * variable. @free should typically include a NULL test before calling a 55 | * function, see the example below. 56 | * 57 | * __free(name): 58 | * variable attribute to add a scoped based cleanup to the variable. 59 | * 60 | * no_free_ptr(var): 61 | * like a non-atomic xchg(var, NULL), such that the cleanup function will 62 | * be inhibited -- provided it sanely deals with a NULL value. 63 | * 64 | * NOTE: this has __must_check semantics so that it is harder to accidentally 65 | * leak the resource. 66 | * 67 | * return_ptr(p): 68 | * returns p while inhibiting the __free(). 69 | * 70 | * Ex. 71 | * 72 | * DEFINE_FREE(kfree, void *, if (_T) kfree(_T)) 73 | * 74 | * void *alloc_obj(...) 75 | * { 76 | * struct obj *p __free(kfree) = kmalloc(...); 77 | * if (!p) 78 | * return NULL; 79 | * 80 | * if (!init_obj(p)) 81 | * return NULL; 82 | * 83 | * return_ptr(p); 84 | * } 85 | * 86 | * NOTE: the DEFINE_FREE()'s @free expression includes a NULL test even though 87 | * kfree() is fine to be called with a NULL value. This is on purpose. This way 88 | * the compiler sees the end of our alloc_obj() function as: 89 | * 90 | * tmp = p; 91 | * p = NULL; 92 | * if (p) 93 | * kfree(p); 94 | * return tmp; 95 | * 96 | * And through the magic of value-propagation and dead-code-elimination, it 97 | * eliminates the actual cleanup call and compiles into: 98 | * 99 | * return p; 100 | * 101 | * Without the NULL test it turns into a mess and the compiler can't help us. 102 | */ 103 | 104 | #define DEFINE_FREE(_name, _type, _free) \ 105 | static inline void __free_##_name(void *p) { _type _T = *(_type *)p; _free; } 106 | 107 | #define __free(_name) __cleanup(__free_##_name) 108 | 109 | #define __get_and_null_ptr(p) \ 110 | ({ __auto_type __ptr = &(p); \ 111 | __auto_type __val = *__ptr; \ 112 | *__ptr = NULL; __val; }) 113 | 114 | static inline __must_check 115 | const volatile void * __must_check_fn(const volatile void *val) 116 | { return val; } 117 | 118 | #define no_free_ptr(p) \ 119 | ((typeof(p)) __must_check_fn(__get_and_null_ptr(p))) 120 | 121 | #define return_ptr(p) return no_free_ptr(p) 122 | 123 | /* 124 | * DEFINE_CLASS(name, type, exit, init, init_args...): 125 | * helper to define the destructor and constructor for a type. 126 | * @exit is an expression using '_T' -- similar to FREE above. 127 | * @init is an expression in @init_args resulting in @type 128 | * 129 | * EXTEND_CLASS(name, ext, init, init_args...): 130 | * extends class @name to @name@ext with the new constructor 131 | * 132 | * CLASS(name, var)(args...): 133 | * declare the variable @var as an instance of the named class 134 | * 135 | * Ex. 136 | * 137 | * DEFINE_CLASS(fdget, struct fd, fdput(_T), fdget(fd), int fd) 138 | * 139 | * CLASS(fdget, f)(fd); 140 | * if (!f.file) 141 | * return -EBADF; 142 | * 143 | * // use 'f' without concern 144 | */ 145 | 146 | #define DEFINE_CLASS(_name, _type, _exit, _init, _init_args...) \ 147 | typedef _type class_##_name##_t; \ 148 | static inline void class_##_name##_destructor(_type *p) \ 149 | { _type _T = *p; _exit; } \ 150 | static inline _type class_##_name##_constructor(_init_args) \ 151 | { _type t = _init; return t; } 152 | 153 | #define EXTEND_CLASS(_name, ext, _init, _init_args...) \ 154 | typedef class_##_name##_t class_##_name##ext##_t; \ 155 | static inline void class_##_name##ext##_destructor(class_##_name##_t *p)\ 156 | { class_##_name##_destructor(p); } \ 157 | static inline class_##_name##_t class_##_name##ext##_constructor(_init_args) \ 158 | { class_##_name##_t t = _init; return t; } 159 | 160 | #define CLASS(_name, var) \ 161 | class_##_name##_t var __cleanup(class_##_name##_destructor) = \ 162 | class_##_name##_constructor 163 | /* 164 | * DEFINE_GUARD(name, type, lock, unlock): 165 | * trivial wrapper around DEFINE_CLASS() above specifically 166 | * for locks. 167 | * 168 | * DEFINE_GUARD_COND(name, ext, condlock) 169 | * wrapper around EXTEND_CLASS above to add conditional lock 170 | * variants to a base class, eg. mutex_trylock() or 171 | * mutex_lock_interruptible(). 172 | * 173 | * guard(name): 174 | * an anonymous instance of the (guard) class, not recommended for 175 | * conditional locks. 176 | * 177 | * scoped_guard (name, args...) { }: 178 | * similar to CLASS(name, scope)(args), except the variable (with the 179 | * explicit name 'scope') is declard in a for-loop such that its scope is 180 | * bound to the next (compound) statement. 181 | * 182 | * for conditional locks the loop body is skipped when the lock is not 183 | * acquired. 184 | * 185 | * scoped_cond_guard (name, fail, args...) { }: 186 | * similar to scoped_guard(), except it does fail when the lock 187 | * acquire fails. 188 | * 189 | */ 190 | 191 | #define DEFINE_GUARD(_name, _type, _lock, _unlock) \ 192 | DEFINE_CLASS(_name, _type, if (_T) { _unlock; }, ({ _lock; _T; }), _type _T); \ 193 | static inline void * class_##_name##_lock_ptr(class_##_name##_t *_T) \ 194 | { return *_T; } 195 | 196 | #define DEFINE_GUARD_COND(_name, _ext, _condlock) \ 197 | EXTEND_CLASS(_name, _ext, \ 198 | ({ void *_t = _T; if (_T && !(_condlock)) _t = NULL; _t; }), \ 199 | class_##_name##_t _T) \ 200 | static inline void * class_##_name##_ext##_lock_ptr(class_##_name##_t *_T) \ 201 | { return class_##_name##_lock_ptr(_T); } 202 | 203 | #define guard(_name) \ 204 | CLASS(_name, __UNIQUE_ID(guard)) 205 | 206 | #define __guard_ptr(_name) class_##_name##_lock_ptr 207 | 208 | #define scoped_guard(_name, args...) \ 209 | for (CLASS(_name, scope)(args), \ 210 | *done = NULL; __guard_ptr(_name)(&scope) && !done; done = (void *)1) 211 | 212 | #define scoped_cond_guard(_name, _fail, args...) \ 213 | for (CLASS(_name, scope)(args), \ 214 | *done = NULL; !done; done = (void *)1) \ 215 | if (!__guard_ptr(_name)(&scope)) _fail; \ 216 | else 217 | /* 218 | * Additional helper macros for generating lock guards with types, either for 219 | * locks that don't have a native type (eg. RCU, preempt) or those that need a 220 | * 'fat' pointer (eg. spin_lock_irqsave). 221 | * 222 | * DEFINE_LOCK_GUARD_0(name, lock, unlock, ...) 223 | * DEFINE_LOCK_GUARD_1(name, type, lock, unlock, ...) 224 | * DEFINE_LOCK_GUARD_1_COND(name, ext, condlock) 225 | * 226 | * will result in the following type: 227 | * 228 | * typedef struct { 229 | * type *lock; // 'type := void' for the _0 variant 230 | * __VA_ARGS__; 231 | * } class_##name##_t; 232 | * 233 | * As above, both _lock and _unlock are statements, except this time '_T' will 234 | * be a pointer to the above struct. 235 | */ 236 | 237 | #define __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, ...) \ 238 | typedef struct { \ 239 | _type *lock; \ 240 | __VA_ARGS__; \ 241 | } class_##_name##_t; \ 242 | \ 243 | static inline void class_##_name##_destructor(class_##_name##_t *_T) \ 244 | { \ 245 | if (_T->lock) { _unlock; } \ 246 | } \ 247 | \ 248 | static inline void *class_##_name##_lock_ptr(class_##_name##_t *_T) \ 249 | { \ 250 | return _T->lock; \ 251 | } 252 | 253 | #define __DEFINE_LOCK_GUARD_1(_name, _type, _lock) \ 254 | static inline class_##_name##_t class_##_name##_constructor(_type *l) \ 255 | { \ 256 | class_##_name##_t _t = { .lock = l }, *_T = &_t; \ 257 | _lock; \ 258 | return _t; \ 259 | } 260 | 261 | #define __DEFINE_LOCK_GUARD_0(_name, _lock) \ 262 | static inline class_##_name##_t class_##_name##_constructor(void) \ 263 | { \ 264 | class_##_name##_t _t = { .lock = (void*)1 }, \ 265 | *_T __maybe_unused = &_t; \ 266 | _lock; \ 267 | return _t; \ 268 | } 269 | 270 | #define DEFINE_LOCK_GUARD_1(_name, _type, _lock, _unlock, ...) \ 271 | __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, __VA_ARGS__) \ 272 | __DEFINE_LOCK_GUARD_1(_name, _type, _lock) 273 | 274 | #define DEFINE_LOCK_GUARD_0(_name, _lock, _unlock, ...) \ 275 | __DEFINE_UNLOCK_GUARD(_name, void, _unlock, __VA_ARGS__) \ 276 | __DEFINE_LOCK_GUARD_0(_name, _lock) 277 | 278 | #define DEFINE_LOCK_GUARD_1_COND(_name, _ext, _condlock) \ 279 | EXTEND_CLASS(_name, _ext, \ 280 | ({ class_##_name##_t _t = { .lock = l }, *_T = &_t;\ 281 | if (_T->lock && !(_condlock)) _T->lock = NULL; \ 282 | _t; }), \ 283 | typeof_member(class_##_name##_t, lock) l) \ 284 | static inline void * class_##_name##_ext##_lock_ptr(class_##_name##_t *_T) \ 285 | { return class_##_name##_lock_ptr(_T); } 286 | 287 | #include 288 | 289 | DEFINE_GUARD(mutex, struct mutex *, mutex_lock(_T), mutex_unlock(_T)) 290 | DEFINE_FREE(mutex, struct mutex *, if (_T) mutex_unlock(_T)) 291 | 292 | #include 293 | 294 | DEFINE_FREE(kfree, void *, if (_T) kfree(_T)) 295 | 296 | #include 297 | 298 | DEFINE_LOCK_GUARD_1(raw_spinlock, raw_spinlock_t, 299 | raw_spin_lock(_T->lock), 300 | raw_spin_unlock(_T->lock)) 301 | 302 | DEFINE_LOCK_GUARD_1_COND(raw_spinlock, _try, raw_spin_trylock(_T->lock)) 303 | 304 | DEFINE_LOCK_GUARD_1(raw_spinlock_nested, raw_spinlock_t, 305 | raw_spin_lock_nested(_T->lock, SINGLE_DEPTH_NESTING), 306 | raw_spin_unlock(_T->lock)) 307 | 308 | DEFINE_LOCK_GUARD_1(raw_spinlock_irq, raw_spinlock_t, 309 | raw_spin_lock_irq(_T->lock), 310 | raw_spin_unlock_irq(_T->lock)) 311 | 312 | DEFINE_LOCK_GUARD_1_COND(raw_spinlock_irq, _try, raw_spin_trylock_irq(_T->lock)) 313 | 314 | DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t, 315 | raw_spin_lock_irqsave(_T->lock, _T->flags), 316 | raw_spin_unlock_irqrestore(_T->lock, _T->flags), 317 | unsigned long flags) 318 | 319 | DEFINE_LOCK_GUARD_1_COND(raw_spinlock_irqsave, _try, 320 | raw_spin_trylock_irqsave(_T->lock, _T->flags)) 321 | 322 | DEFINE_LOCK_GUARD_1(spinlock, spinlock_t, 323 | spin_lock(_T->lock), 324 | spin_unlock(_T->lock)) 325 | 326 | DEFINE_LOCK_GUARD_1_COND(spinlock, _try, spin_trylock(_T->lock)) 327 | 328 | DEFINE_LOCK_GUARD_1(spinlock_irq, spinlock_t, 329 | spin_lock_irq(_T->lock), 330 | spin_unlock_irq(_T->lock)) 331 | 332 | DEFINE_LOCK_GUARD_1_COND(spinlock_irq, _try, 333 | spin_trylock_irq(_T->lock)) 334 | 335 | DEFINE_LOCK_GUARD_1(spinlock_irqsave, spinlock_t, 336 | spin_lock_irqsave(_T->lock, _T->flags), 337 | spin_unlock_irqrestore(_T->lock, _T->flags), 338 | unsigned long flags) 339 | 340 | DEFINE_LOCK_GUARD_1_COND(spinlock_irqsave, _try, 341 | spin_trylock_irqsave(_T->lock, _T->flags)) 342 | 343 | DEFINE_LOCK_GUARD_1(read_lock, rwlock_t, 344 | read_lock(_T->lock), 345 | read_unlock(_T->lock)) 346 | 347 | DEFINE_LOCK_GUARD_1(read_lock_irq, rwlock_t, 348 | read_lock_irq(_T->lock), 349 | read_unlock_irq(_T->lock)) 350 | 351 | DEFINE_LOCK_GUARD_1(read_lock_irqsave, rwlock_t, 352 | read_lock_irqsave(_T->lock, _T->flags), 353 | read_unlock_irqrestore(_T->lock, _T->flags), 354 | unsigned long flags) 355 | 356 | DEFINE_LOCK_GUARD_1(write_lock, rwlock_t, 357 | write_lock(_T->lock), 358 | write_unlock(_T->lock)) 359 | 360 | DEFINE_LOCK_GUARD_1(write_lock_irq, rwlock_t, 361 | write_lock_irq(_T->lock), 362 | write_unlock_irq(_T->lock)) 363 | 364 | DEFINE_LOCK_GUARD_1(write_lock_irqsave, rwlock_t, 365 | write_lock_irqsave(_T->lock, _T->flags), 366 | write_unlock_irqrestore(_T->lock, _T->flags), 367 | unsigned long flags) 368 | 369 | #include 370 | 371 | DEFINE_LOCK_GUARD_0(rcu, rcu_read_lock(), rcu_read_unlock()) 372 | 373 | #include 374 | 375 | DEFINE_GUARD(devl, struct devlink *, devl_lock(_T), devl_unlock(_T)); 376 | 377 | #endif /* _KCOMPAT_CLENAUP_H_ */ 378 | -------------------------------------------------------------------------------- /src/kcompat_defs.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_DEFS_H_ 5 | #define _KCOMPAT_DEFS_H_ 6 | 7 | #ifndef LINUX_VERSION_CODE 8 | #include 9 | #else 10 | #ifndef KERNEL_VERSION 11 | #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) 12 | #endif 13 | #endif /* LINUX_VERSION_CODE */ 14 | 15 | #ifndef UTS_RELEASE 16 | #include 17 | #endif 18 | 19 | /* 20 | * Include the definitions file for HAVE/NEED flags for the standard upstream 21 | * kernels. 22 | * 23 | * Then, based on the distribution we detect, load the distribution specific 24 | * definitions file that customizes the definitions for the target 25 | * distribution. 26 | */ 27 | #include "kcompat_std_defs.h" 28 | 29 | #ifdef CONFIG_SUSE_KERNEL 30 | #include "kcompat_sles_defs.h" 31 | #elif UBUNTU_VERSION_CODE 32 | #include "kcompat_ubuntu_defs.h" 33 | #elif RHEL_RELEASE_CODE 34 | #include "kcompat_rhel_defs.h" 35 | #endif 36 | 37 | #include "kcompat_generated_defs.h" 38 | 39 | #endif /* _KCOMPAT_DEFS_H_ */ 40 | -------------------------------------------------------------------------------- /src/kcompat_gcc.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_GCC_H_ 5 | #define _KCOMPAT_GCC_H_ 6 | 7 | #ifndef GCC_VERSION 8 | #define GCC_VERSION (__GNUC__ * 10000 \ 9 | + __GNUC_MINOR__ * 100 \ 10 | + __GNUC_PATCHLEVEL__) 11 | #endif /* GCC_VERSION */ 12 | 13 | /* as GCC_VERSION yields 40201 for any modern clang (checked on clang 7 & 13) 14 | * we want other means to add workarounds for "old GCC" */ 15 | #ifdef __clang__ 16 | #define GCC_IS_BELOW(x) 0 17 | #else 18 | #define GCC_IS_BELOW(x) (GCC_VERSION < (x)) 19 | #endif 20 | 21 | #ifdef __has_attribute 22 | #if __has_attribute(__fallthrough__) 23 | # define fallthrough __attribute__((__fallthrough__)) 24 | #else 25 | # define fallthrough do {} while (0) /* fallthrough */ 26 | #endif /* __has_attribute(fallthrough) */ 27 | #else 28 | # define fallthrough do {} while (0) /* fallthrough */ 29 | #endif /* __has_attribute */ 30 | 31 | /* 32 | * upstream commit 4eb6bd55cfb2 ("compiler.h: drop fallback overflow checkers") 33 | * removed bunch of code for builitin overflow fallback implementations, that 34 | * we need for gcc prior to 5.1 35 | */ 36 | #if !GCC_IS_BELOW(50100) 37 | #ifndef COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 38 | #define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1 39 | #endif 40 | #endif /* GCC_VERSION >= 50100 */ 41 | 42 | #include "kcompat_overflow.h" 43 | 44 | /* Backport macros for controlling GCC diagnostics */ 45 | #if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0) ) 46 | /* Compilers before gcc-4.6 do not understand "#pragma GCC diagnostic push" */ 47 | #if GCC_VERSION >= 40600 48 | #define __diag_str1(s) #s 49 | #define __diag_str(s) __diag_str1(s) 50 | #define __diag(s) _Pragma(__diag_str(GCC diagnostic s)) 51 | #else 52 | #define __diag(s) 53 | #endif /* GCC_VERSION >= 4.6 */ 54 | #define __diag_push() __diag(push) 55 | #define __diag_pop() __diag(pop) 56 | #endif /* LINUX_VERSION < 4.18.0 */ 57 | 58 | #if GCC_IS_BELOW(50000) 59 | /* Workaround for gcc bug - not accepting "(type)" before "{ ... }" as part of 60 | * static struct initializers [when used with -std=gnu11 switch] 61 | * https://bugzilla.redhat.com/show_bug.cgi?id=1672652 62 | * 63 | * fix was backported to gcc 4.8.5-39 by RedHat, contained in RHEL 7.7 64 | * workaround here is to just drop that redundant (commented out below) part and 65 | * redefine kernel macros used by us. 66 | */ 67 | 68 | /* Since problematic code could be triggered by print-family (incl. wrappers) 69 | * invocation, we have to first include headers that contain macros that we are 70 | * redefining, and only later proceed with the rest of includes. 71 | */ 72 | #include 73 | #include 74 | #include 75 | #include 76 | 77 | #ifdef __SPIN_LOCK_INITIALIZER 78 | #undef __SPIN_LOCK_UNLOCKED 79 | #define __SPIN_LOCK_UNLOCKED(lockname) \ 80 | /* (spinlock_t) */ __SPIN_LOCK_INITIALIZER(lockname) 81 | #endif /* __SPIN_LOCK_INITIALIZER */ 82 | 83 | #ifdef __RAW_SPIN_LOCK_INITIALIZER 84 | #undef __RAW_SPIN_LOCK_UNLOCKED 85 | #define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ 86 | /* (raw_spinlock_t) */ __RAW_SPIN_LOCK_INITIALIZER(lockname) 87 | #endif /* __RAW_SPIN_LOCK_INITIALIZER */ 88 | 89 | #ifndef CONFIG_DEBUG_SPINLOCK 90 | /* raw_spin_lock_init needs __RAW_SPIN_LOCK_UNLOCKED with typecast, so keep the 91 | * original impl, 92 | * but enhance it with typecast dropped from __RAW_SPIN_LOCK_UNLOCKED() */ 93 | #undef raw_spin_lock_init 94 | #define raw_spin_lock_init(lock) \ 95 | do { *(lock) = (raw_spinlock_t) __RAW_SPIN_LOCK_UNLOCKED(lock); \ 96 | } while (0) 97 | #endif /* !CONFIG_DEBUG_SPINLOCK */ 98 | 99 | #undef STATIC_KEY_INIT_TRUE 100 | #define STATIC_KEY_INIT_TRUE \ 101 | { .enabled = { 1 }, \ 102 | { .type = 1UL } } 103 | 104 | #undef STATIC_KEY_INIT_FALSE 105 | #define STATIC_KEY_INIT_FALSE \ 106 | { .enabled = { 0 } } 107 | 108 | #undef STATIC_KEY_TRUE_INIT 109 | #define STATIC_KEY_TRUE_INIT \ 110 | /* (struct static_key_true) */ { .key = STATIC_KEY_INIT_TRUE } 111 | 112 | #undef STATIC_KEY_FALSE_INIT 113 | #define STATIC_KEY_FALSE_INIT \ 114 | /* (struct static_key_false) */ { .key = STATIC_KEY_INIT_FALSE } 115 | 116 | #ifdef HAVE_JUMP_LABEL 117 | /* dd_key_init() is used (indirectly) with arg like "(STATIC_KEY_INIT_FALSE)" 118 | * from DEFINE_DYNAMIC_DEBUG_METADATA(), which, depending on config has many 119 | * different definitions (including helper macros). 120 | * To reduce compat code, just consume parens from the arg instead copy-pasting 121 | * all definitions and slightly changing them. */ 122 | #define _KC_SLURP_PARENS(...) __VA_ARGS__ 123 | #undef dd_key_init 124 | #define dd_key_init(key, init) key = _KC_SLURP_PARENS init 125 | #endif /* HAVE_JUMP_LABEL */ 126 | 127 | #undef UUID_INIT 128 | #define UUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ 129 | {{ ((a) >> 24) & 0xff, ((a) >> 16) & 0xff, \ 130 | ((a) >> 8) & 0xff, (a) & 0xff, \ 131 | ((b) >> 8) & 0xff, (b) & 0xff, \ 132 | ((c) >> 8) & 0xff, (c) & 0xff, \ 133 | (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) \ 134 | }} 135 | 136 | #endif /* old GCC < 5.0 */ 137 | 138 | #endif /* _KCOMPAT_GCC_H_ */ 139 | -------------------------------------------------------------------------------- /src/kcompat_kthread.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | /* SPDX-License-Identifier: GPL-2.0 */ 5 | 6 | #ifndef _KCOMPAT_KTHREAD_H_ 7 | #define _KCOMPAT_KTHREAD_H_ 8 | 9 | /* Kernels since 4.9 have supported delayed work items for kthreads. In order 10 | * to allow seamless transition from old to new kernels, this header defines 11 | * a set of macros to switch out kthread usage with a work queue on the older 12 | * kernels that do not have support for kthread_delayed_work. 13 | */ 14 | #ifdef HAVE_KTHREAD_DELAYED_API 15 | #include 16 | #else /* HAVE_KTHREAD_DELAYED_API */ 17 | #include 18 | #undef kthread_work 19 | #define kthread_work work_struct 20 | #undef kthread_delayed_work 21 | #define kthread_delayed_work delayed_work 22 | #undef kthread_worker 23 | #define kthread_worker workqueue_struct 24 | #undef kthread_queue_work 25 | #define kthread_queue_work(worker, work) queue_work(worker, work) 26 | #undef kthread_queue_delayed_work 27 | #define kthread_queue_delayed_work(worker, dwork, delay) \ 28 | queue_delayed_work(worker, dwork, delay) 29 | #undef kthread_init_work 30 | #define kthread_init_work(work, fn) INIT_WORK(work, fn) 31 | #undef kthread_init_delayed_work 32 | #define kthread_init_delayed_work(dwork, fn) \ 33 | INIT_DELAYED_WORK(dwork, fn) 34 | #undef kthread_flush_worker 35 | #define kthread_flush_worker(worker) flush_workqueue(worker) 36 | #undef kthread_cancel_work_sync 37 | #define kthread_cancel_work_sync(work) cancel_work_sync(work) 38 | #undef kthread_cancel_delayed_work_sync 39 | #define kthread_cancel_delayed_work_sync(dwork) \ 40 | cancel_delayed_work_sync(dwork) 41 | #undef kthread_create_worker 42 | #define kthread_create_worker(flags, namefmt, ...) \ 43 | alloc_workqueue(namefmt, 0, 0, ##__VA_ARGS__) 44 | #undef kthread_destroy_worker 45 | #define kthread_destroy_worker(worker) destroy_workqueue(worker) 46 | #endif /* !HAVE_KTHREAD_DELAYED_API */ 47 | 48 | #endif /* _KCOMPAT_KTHREAD_H_ */ 49 | -------------------------------------------------------------------------------- /src/kcompat_pldmfw.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | /* SPDX-License-Identifier: GPL-2.0 */ 5 | /* Copyright (C) 2021 - 2023 Intel Corporation. */ 6 | 7 | /* This is taken from upstream */ 8 | 9 | #ifndef _KCOMPAT_PLDMFW_H_ 10 | #define _KCOMPAT_PLDMFW_H_ 11 | 12 | #ifdef _PLDMFW_H_ 13 | #error "Do not include both kcompat_pldmfw.h and " 14 | #endif 15 | 16 | #if IS_ENABLED(CONFIG_PLDMFW) 17 | #error "CONFIG_PLDMFW is enabled, use " 18 | #endif 19 | 20 | #include 21 | #include 22 | 23 | #define PLDM_DEVICE_UPDATE_CONTINUE_AFTER_FAIL BIT(0) 24 | 25 | #define PLDM_STRING_TYPE_UNKNOWN 0 26 | #define PLDM_STRING_TYPE_ASCII 1 27 | #define PLDM_STRING_TYPE_UTF8 2 28 | #define PLDM_STRING_TYPE_UTF16 3 29 | #define PLDM_STRING_TYPE_UTF16LE 4 30 | #define PLDM_STRING_TYPE_UTF16BE 5 31 | 32 | struct pldmfw_record { 33 | struct list_head entry; 34 | 35 | /* List of descriptor TLVs */ 36 | struct list_head descs; 37 | 38 | /* Component Set version string*/ 39 | const u8 *version_string; 40 | u8 version_type; 41 | u8 version_len; 42 | 43 | /* Package Data length */ 44 | u16 package_data_len; 45 | 46 | /* Bitfield of Device Update Flags */ 47 | u32 device_update_flags; 48 | 49 | /* Package Data block */ 50 | const u8 *package_data; 51 | 52 | /* Bitmap of components applicable to this record */ 53 | unsigned long *component_bitmap; 54 | u16 component_bitmap_len; 55 | }; 56 | 57 | /* Standard descriptor TLV identifiers */ 58 | #define PLDM_DESC_ID_PCI_VENDOR_ID 0x0000 59 | #define PLDM_DESC_ID_IANA_ENTERPRISE_ID 0x0001 60 | #define PLDM_DESC_ID_UUID 0x0002 61 | #define PLDM_DESC_ID_PNP_VENDOR_ID 0x0003 62 | #define PLDM_DESC_ID_ACPI_VENDOR_ID 0x0004 63 | #define PLDM_DESC_ID_PCI_DEVICE_ID 0x0100 64 | #define PLDM_DESC_ID_PCI_SUBVENDOR_ID 0x0101 65 | #define PLDM_DESC_ID_PCI_SUBDEV_ID 0x0102 66 | #define PLDM_DESC_ID_PCI_REVISION_ID 0x0103 67 | #define PLDM_DESC_ID_PNP_PRODUCT_ID 0x0104 68 | #define PLDM_DESC_ID_ACPI_PRODUCT_ID 0x0105 69 | #define PLDM_DESC_ID_VENDOR_DEFINED 0xFFFF 70 | 71 | struct pldmfw_desc_tlv { 72 | struct list_head entry; 73 | 74 | const u8 *data; 75 | u16 type; 76 | u16 size; 77 | }; 78 | 79 | #define PLDM_CLASSIFICATION_UNKNOWN 0x0000 80 | #define PLDM_CLASSIFICATION_OTHER 0x0001 81 | #define PLDM_CLASSIFICATION_DRIVER 0x0002 82 | #define PLDM_CLASSIFICATION_CONFIG_SW 0x0003 83 | #define PLDM_CLASSIFICATION_APP_SW 0x0004 84 | #define PLDM_CLASSIFICATION_INSTRUMENTATION 0x0005 85 | #define PLDM_CLASSIFICATION_BIOS 0x0006 86 | #define PLDM_CLASSIFICATION_DIAGNOSTIC_SW 0x0007 87 | #define PLDM_CLASSIFICATION_OS 0x0008 88 | #define PLDM_CLASSIFICATION_MIDDLEWARE 0x0009 89 | #define PLDM_CLASSIFICATION_FIRMWARE 0x000A 90 | #define PLDM_CLASSIFICATION_CODE 0x000B 91 | #define PLDM_CLASSIFICATION_SERVICE_PACK 0x000C 92 | #define PLDM_CLASSIFICATION_SOFTWARE_BUNDLE 0x000D 93 | 94 | #define PLDM_ACTIVATION_METHOD_AUTO BIT(0) 95 | #define PLDM_ACTIVATION_METHOD_SELF_CONTAINED BIT(1) 96 | #define PLDM_ACTIVATION_METHOD_MEDIUM_SPECIFIC BIT(2) 97 | #define PLDM_ACTIVATION_METHOD_REBOOT BIT(3) 98 | #define PLDM_ACTIVATION_METHOD_DC_CYCLE BIT(4) 99 | #define PLDM_ACTIVATION_METHOD_AC_CYCLE BIT(5) 100 | 101 | #define PLDMFW_COMPONENT_OPTION_FORCE_UPDATE BIT(0) 102 | #define PLDMFW_COMPONENT_OPTION_USE_COMPARISON_STAMP BIT(1) 103 | 104 | struct pldmfw_component { 105 | struct list_head entry; 106 | 107 | /* component identifier */ 108 | u16 classification; 109 | u16 identifier; 110 | 111 | u16 options; 112 | u16 activation_method; 113 | 114 | u32 comparison_stamp; 115 | 116 | u32 component_size; 117 | const u8 *component_data; 118 | 119 | /* Component version string */ 120 | const u8 *version_string; 121 | u8 version_type; 122 | u8 version_len; 123 | 124 | /* component index */ 125 | u8 index; 126 | 127 | }; 128 | 129 | /* Transfer flag used for sending components to the firmware */ 130 | #define PLDM_TRANSFER_FLAG_START BIT(0) 131 | #define PLDM_TRANSFER_FLAG_MIDDLE BIT(1) 132 | #define PLDM_TRANSFER_FLAG_END BIT(2) 133 | 134 | struct pldmfw_ops; 135 | 136 | /* Main entry point to the PLDM firmware update engine. Device drivers 137 | * should embed this in a private structure and use container_of to obtain 138 | * a pointer to their own data, used to implement the device specific 139 | * operations. 140 | */ 141 | struct pldmfw { 142 | const struct pldmfw_ops *ops; 143 | struct device *dev; 144 | }; 145 | 146 | bool pldmfw_op_pci_match_record(struct pldmfw *context, struct pldmfw_record *record); 147 | 148 | /* Operations invoked by the generic PLDM firmware update engine. Used to 149 | * implement device specific logic. 150 | * 151 | * @match_record: check if the device matches the given record. For 152 | * convenience, a standard implementation is provided for PCI devices. 153 | * 154 | * @send_package_data: send the package data associated with the matching 155 | * record to firmware. 156 | * 157 | * @send_component_table: send the component data associated with a given 158 | * component to firmware. Called once for each applicable component. 159 | * 160 | * @flash_component: Flash the data for a given component to the device. 161 | * Called once for each applicable component, after all component tables have 162 | * been sent. 163 | * 164 | * @finalize_update: (optional) Finish the update. Called after all components 165 | * have been flashed. 166 | */ 167 | struct pldmfw_ops { 168 | bool (*match_record)(struct pldmfw *context, struct pldmfw_record *record); 169 | int (*send_package_data)(struct pldmfw *context, const u8 *data, u16 length); 170 | int (*send_component_table)(struct pldmfw *context, struct pldmfw_component *component, 171 | u8 transfer_flag); 172 | int (*flash_component)(struct pldmfw *context, struct pldmfw_component *component); 173 | int (*finalize_update)(struct pldmfw *context); 174 | }; 175 | 176 | int pldmfw_flash_image(struct pldmfw *context, const struct firmware *fw); 177 | 178 | #endif 179 | -------------------------------------------------------------------------------- /src/kcompat_rhel_defs.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_RHEL_DEFS_H_ 5 | #define _KCOMPAT_RHEL_DEFS_H_ 6 | 7 | /* This is the RedHat Enterprise Linux distribution specific definitions file. 8 | * It defines what features need backports for a given version of the RHEL 9 | * kernel. 10 | * 11 | * It checks the RHEL_RELEASE_CODE and RHEL_RELEASE_VERSION macros to decide 12 | * what support the target kernel has. 13 | * 14 | * It assumes that kcompat_std_defs.h has already been processed, and will 15 | * #define or #undef any flags that have changed based on backports done by 16 | * RHEL. 17 | */ 18 | 19 | #if !RHEL_RELEASE_CODE 20 | #error "RHEL_RELEASE_CODE is 0 or undefined" 21 | #endif 22 | 23 | #ifndef RHEL_RELEASE_VERSION 24 | #error "RHEL_RELEASE_VERSION is undefined" 25 | #endif 26 | 27 | /*****************************************************************************/ 28 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,3)) 29 | #define NEED_NETDEV_TXQ_BQL_PREFETCH 30 | #else /* >= 7.3 */ 31 | #endif /* 7.3 */ 32 | 33 | /*****************************************************************************/ 34 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,4)) 35 | #define NEED_BUILD_BUG_ON 36 | #else /* >= 7.4 */ 37 | #define HAVE_RHEL7_EXTENDED_OFFLOAD_STATS 38 | #endif /* 7.4 */ 39 | 40 | /*****************************************************************************/ 41 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)) 42 | #else /* >= 7.5 */ 43 | #define HAVE_FLOW_DISSECTOR_KEY_IP 44 | #endif /* 7.5 */ 45 | 46 | /*****************************************************************************/ 47 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,6)) 48 | #undef HAVE_XDP_BUFF_RXQ 49 | #undef HAVE_XDP_RXQ_INFO_REG_3_PARAMS 50 | #else /* >= 7.6 */ 51 | #undef NEED_JIFFIES_64_TIME_IS_MACROS 52 | #undef NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 53 | #undef NEED_TC_SETUP_QDISC_MQPRIO 54 | #endif /* 7.6 */ 55 | 56 | /*****************************************************************************/ 57 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,7)) 58 | #else /* >= 7.7 */ 59 | #define HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR 60 | #define HAVE_ETHTOOL_NEW_100G_BITS 61 | #undef NEED_IN_TASK 62 | #define HAVE_FLOW_DISSECTOR_KEY_ENC_IP 63 | #endif /* 7.7 */ 64 | 65 | /*****************************************************************************/ 66 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)) 67 | #else /* >= 8.0 */ 68 | #undef HAVE_ETHTOOL_NEW_100G_BITS 69 | #define HAVE_NDO_OFFLOAD_STATS 70 | #undef HAVE_RHEL7_EXTENDED_OFFLOAD_STATS 71 | #endif /* 8.0 */ 72 | 73 | /*****************************************************************************/ 74 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,1)) 75 | #define NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE 76 | #else /* >= 8.1 */ 77 | #define HAVE_ETHTOOL_NEW_100G_BITS 78 | #undef NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE 79 | #undef NEED_INDIRECT_CALL_WRAPPER_MACROS 80 | #define HAVE_INDIRECT_CALL_WRAPPER_HEADER 81 | #define HAVE_LINKMODE 82 | #endif /* 8.1 */ 83 | 84 | /*****************************************************************************/ 85 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,2)) 86 | #else /* >= 8.2 */ 87 | #undef NEED_FLOW_INDR_BLOCK_CB_REGISTER 88 | #define HAVE_FLOW_INDR_BLOCK_LOCK 89 | #define HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID 90 | #define HAVE_NETDEV_SB_DEV 91 | #endif /* 8.2 */ 92 | 93 | /*****************************************************************************/ 94 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,3)) 95 | #else /* >= 8.3 */ 96 | #undef NEED_CPU_LATENCY_QOS_RENAME 97 | #define HAVE_RT_IRQ_SCHED_FIX 98 | #endif /* 8.3 */ 99 | 100 | /*****************************************************************************/ 101 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,4)) 102 | #else /* >= 8.4 */ 103 | #undef NEED_DEVLINK_PORT_ATTRS_SET_STRUCT 104 | #undef HAVE_XDP_QUERY_PROG 105 | #define HAVE_AF_XDP_ZC_SUPPORT 106 | #define HAVE_MEM_TYPE_XSK_BUFF_POOL 107 | #define HAVE_NDO_XSK_WAKEUP 108 | #define XSK_UMEM_RETURNS_XDP_DESC 109 | #undef NEED_XSK_UMEM_GET_RX_FRAME_SIZE 110 | #define HAVE_ETHTOOL_COALESCE_PARAMS_SUPPORT 111 | #endif /* 8.4 */ 112 | 113 | /*****************************************************************************/ 114 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,5)) 115 | #else /* >= 8.5 */ 116 | #undef HAVE_NAPI_BUSY_LOOP 117 | #undef HAVE_XDP_RXQ_INFO_REG_3_PARAMS 118 | #define NO_XDP_QUERY_XSK_UMEM 119 | #undef NEED_XSK_BUFF_POOL_RENAME 120 | #define HAVE_NETDEV_BPF_XSK_POOL 121 | #define HAVE_AF_XDP_NETDEV_UMEM 122 | #define HAVE_DEVLINK_OPS_CREATE_DEL 123 | #endif /* 8.5 */ 124 | 125 | /*****************************************************************************/ 126 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,7)) 127 | #else /* >= 8.7 */ 128 | #undef NEED_DEVLINK_ALLOC_SETS_DEV 129 | #define HAVE_DEVLINK_SET_STATE_3_PARAM 130 | #endif /* 8.7 */ 131 | 132 | /*****************************************************************************/ 133 | #if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(9,0)) 134 | #else /* >= 9.0 */ 135 | #define HAVE_XDP_BUFF_RXQ 136 | #endif /* 9.0 */ 137 | 138 | /*****************************************************************************/ 139 | #endif /* _KCOMPAT_RHEL_DEFS_H_ */ 140 | -------------------------------------------------------------------------------- /src/kcompat_sigil.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_SIGIL_H_ 5 | #define _KCOMPAT_SIGIL_H_ 6 | 7 | #define _STUB_0(code_if_true, code_if_false) code_if_false 8 | #define _STUB_1(code_if_true, code_if_false) code_if_true 9 | #define _PASTE(x, y) x ## y 10 | #define PASTE(x, y) _PASTE(x, y) 11 | #define _STUB_CODE(flag) PASTE(_STUB_, IS_ENABLED(flag)) 12 | 13 | #define DECLARE_OR_STUB(flag, stub_ret, ...) \ 14 | _STUB_CODE(flag)(,static inline) __VA_ARGS__ \ 15 | _STUB_CODE(flag)(;, { return stub_ret; }) 16 | 17 | /* 18 | * DEPAREN ... VANISH taken from SO https://stackoverflow.com/a/62984543 19 | * It is used to allow wraping $() params in (), so they could contain a comma. 20 | */ 21 | #define DEPAREN(X) ESC(ISH X) 22 | #define ISH(...) ISH __VA_ARGS__ 23 | #define ESC(...) ESC_(__VA_ARGS__) 24 | #define ESC_(...) VAN ## __VA_ARGS__ 25 | #define VANISH 26 | 27 | #define KC_COMMA , 28 | 29 | #ifndef __CHECKER__ 30 | 31 | /* isn't it cool to write $(FLAG, some code, optional alternative code) ? :) */ 32 | #define $(flag, code_if_true, ...) \ 33 | _STUB_CODE(flag)(DEPAREN(code_if_true), DEPAREN(__VA_ARGS__)) 34 | 35 | #define $__(X) X KC_COMMA 36 | #define __$(X) KC_COMMA X 37 | 38 | //~ $_(HAVE_NDO_FDB_ADD_VID, u16 vid) 39 | //~ -> 40 | //~ $(HAVE_NDO_FDB_ADD_VID, (u16 vid, )) 41 | #define $_(flag, param_if_true) \ 42 | $(flag, ($__(param_if_true))) 43 | 44 | //~ _$(HAVE_FOO, u16 val) 45 | //~ -> 46 | //~ $(HAVE_FOO, (, u16 val)) 47 | #define _$(flag, param_if_true) \ 48 | $(flag, (__$(param_if_true))) 49 | 50 | #else /* __CHECKER__ */ 51 | /* $ replaced by KC_LOOKUP, for sparse */ 52 | #define KC_LOOKUP(flag, code_if_true, ...) \ 53 | _STUB_CODE(flag)(DEPAREN(code_if_true), DEPAREN(__VA_ARGS__)) 54 | #define KC_LOOKUP__(X) X KC_COMMA 55 | #define __KC_LOOKUP(X) KC_COMMA X 56 | #define KC_LOOKUP_(flag, param_if_true) \ 57 | KC_LOOKUP(flag, (KC_LOOKUP__(param_if_true))) 58 | #define _KC_LOOKUP(flag, param_if_true) \ 59 | KC_LOOKUP(flag, (__KC_LOOKUP(param_if_true))) 60 | #endif /* __CHECKER__ */ 61 | 62 | #endif /* _KCOMPAT_SIGIL_H_ */ 63 | -------------------------------------------------------------------------------- /src/kcompat_sles_defs.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_SLES_DEFS_H_ 5 | #define _KCOMPAT_SLES_DEFS_H_ 6 | 7 | /* This is the SUSE Linux Enterprise distribution specific definitions file. 8 | * It defines what features need backports for a given version of the SUSE 9 | * Linux Enterprise kernel. 10 | * 11 | * It checks a combination of the LINUX_VERSION code and the 12 | * SLE_LOCALVERSION_CODE to determine what support the kernel has. 13 | * 14 | * It assumes that kcompat_std_defs.h has already been processed, and will 15 | * #define or #undef any flags that have changed based on backports done by 16 | * SUSE. 17 | */ 18 | 19 | #ifndef LINUX_VERSION_CODE 20 | #error "LINUX_VERSION_CODE is undefined" 21 | #endif 22 | 23 | #ifndef KERNEL_VERSION 24 | #error "KERNEL_VERSION is undefined" 25 | #endif 26 | 27 | #if !SLE_KERNEL_REVISION 28 | #error "SLE_KERNEL_REVISION is 0 or undefined" 29 | #endif 30 | 31 | #if SLE_KERNEL_REVISION > 65535 32 | #error "SLE_KERNEL_REVISION is unexpectedly large" 33 | #endif 34 | 35 | /* SLE kernel versions are a combination of the LINUX_VERSION_CODE along with 36 | * an extra digit that indicates the SUSE specific revision of that kernel. 37 | * This value is found in the CONFIG_LOCALVERSION of the SUSE kernel, which is 38 | * extracted by common.mk and placed into SLE_KERNEL_REVISION_CODE. 39 | * 40 | * We combine the value of SLE_KERNEL_REVISION along with the LINUX_VERSION code 41 | * to generate the useful value that determines what specific kernel we're 42 | * dealing with. 43 | * 44 | * Just in case the SLE_KERNEL_REVISION ever goes above 255, we reserve 16 bits 45 | * instead of 8 for this value. 46 | */ 47 | #define SLE_KERNEL_CODE ((LINUX_VERSION_CODE << 16) + SLE_KERNEL_REVISION) 48 | #define SLE_KERNEL_VERSION(a,b,c,d) ((KERNEL_VERSION(a,b,c) << 16) + (d)) 49 | 50 | /* Unlike RHEL, SUSE kernels are not always tied to a single service pack. For 51 | * example, 4.12.14 was used as the base for SLE 15 SP1, SLE 12 SP4, and SLE 12 52 | * SP5. 53 | * 54 | * You can find the patches that SUSE applied to the kernel tree at 55 | * https://github.com/SUSE/kernel-source. 56 | * 57 | * You can find the correct kernel version for a check by using steps similar 58 | * to the following 59 | * 60 | * 1) download the kernel-source repo 61 | * 2) checkout the relevant branch, i.e SLE15-SP3 62 | * 3) find the relevant backport you're interested in the patches.suse 63 | * directory 64 | * 4) git log to locate the commit that introduced the backport 65 | * 5) git describe --contains to find the relevant tag that includes that 66 | * commit, i.e. rpm-5.3.18-37 67 | * 6) those digits represent the SLE kernel that introduced that backport. 68 | * 69 | * Try to keep the checks in SLE_KERNEL_CODE order and condense where 70 | * possible. 71 | */ 72 | 73 | /*****************************************************************************/ 74 | #if (SLE_KERNEL_CODE > SLE_KERNEL_VERSION(4,12,14,23) && \ 75 | SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,94)) 76 | /* 77 | * 4.12.14 is used as the base for SLE 12 SP4, SLE 12 SP5, SLE 15, and SLE 15 78 | * SP1. Unfortunately the revision codes do not line up cleanly. SLE 15 79 | * launched with 4.12.14-23. It appears that SLE 12 SP4 and SLE 15 SP1 both 80 | * diverged from this point, with SLE 12 SP4 kernels starting around 81 | * 4.12.14-94. A few backports for SLE 15 SP1 landed in some alpha and beta 82 | * kernels tagged between 4.12.14-25 up to 4.12.14-32. These changes did not 83 | * make it into SLE 12 SP4. This was cleaned up with SLE 12 SP5 by an apparent 84 | * merge in 4.12.14-111. The official launch of SLE 15 SP1 ended up with 85 | * version 4.12.14-195. 86 | * 87 | * Because of this inconsistency and because all of these kernels appear to be 88 | * alpha or beta kernel releases for SLE 15 SP1, we do not rely on version 89 | * checks between this range. Issue a warning to indicate that we do not 90 | * support these. 91 | */ 92 | #warning "SLE kernel versions between 4.12.14-23 and 4.12.14-94 are not supported" 93 | #endif 94 | 95 | /*****************************************************************************/ 96 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,10)) 97 | #else /* >= 4.12.14-10 */ 98 | #undef NEED_INDIRECT_CALL_WRAPPER_MACROS 99 | #define HAVE_INDIRECT_CALL_WRAPPER_HEADER 100 | #endif /* 4.12.14-10 */ 101 | 102 | /*****************************************************************************/ 103 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,111)) 104 | #define NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE 105 | #else /* >= 4.12.14-111 */ 106 | #define HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR 107 | #undef NEED_MACVLAN_ACCEL_PRIV 108 | #undef NEED_MACVLAN_RELEASE_L2FW_OFFLOAD 109 | #undef NEED_MACVLAN_SUPPORTS_DEST_FILTER 110 | #undef NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE 111 | #endif /* 4.12.14-111 */ 112 | 113 | /*****************************************************************************/ 114 | /* SLES 12-SP5 base kernel version */ 115 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,115)) 116 | #else /* >= 4.12.14-115 */ 117 | #define HAVE_NDO_SELECT_QUEUE_SB_DEV 118 | #undef NEED_TC_SETUP_QDISC_MQPRIO 119 | #undef NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 120 | #define HAVE_LINKMODE 121 | #endif /* 4.12.14-115 */ 122 | 123 | /*****************************************************************************/ 124 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,8,2)) 125 | #else /* >= 5.3.8-2 */ 126 | #undef NEED_FLOW_INDR_BLOCK_CB_REGISTER 127 | #define HAVE_FLOW_INDR_BLOCK_LOCK 128 | #endif /* 5.3.8-2 */ 129 | 130 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,18,26)) 131 | #else /* >= 5.3.18-26 */ 132 | #undef NEED_CPU_LATENCY_QOS_RENAME 133 | #endif 134 | 135 | /*****************************************************************************/ 136 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,18,34)) 137 | #else /* >= 5.3.18-34 */ 138 | #undef NEED_DEVLINK_PORT_ATTRS_SET_STRUCT 139 | #endif /* 5.3.18-34 */ 140 | 141 | /*****************************************************************************/ 142 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,18,41)) 143 | #define NEED_XSK_BUFF_POOL_RENAME 144 | #else /* >= 5.3.18-41 */ 145 | #define HAVE_XDP_BUFF_FRAME_SZ 146 | #define HAVE_NETDEV_BPF_XSK_POOL 147 | #undef NEED_XSK_UMEM_GET_RX_FRAME_SIZE 148 | #undef NEED_XSK_BUFF_POOL_RENAME 149 | #define HAVE_MEM_TYPE_XSK_BUFF_POOL 150 | #endif /* 5.3.18-41 */ 151 | 152 | /*****************************************************************************/ 153 | #if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,14,21,9)) 154 | #else /* >= 5.14.21-150400.9 */ 155 | #undef NEED_DEVLINK_ALLOC_SETS_DEV 156 | #define HAVE_DEVLINK_OPS_CREATE_DEL 157 | #define HAVE_DEVLINK_SET_STATE_3_PARAM 158 | #endif /* 5.14.21-150400.9 */ 159 | 160 | #endif /* _KCOMPAT_SLES_DEFS_H_ */ 161 | -------------------------------------------------------------------------------- /src/kcompat_std_defs.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_STD_DEFS_H_ 5 | #define _KCOMPAT_STD_DEFS_H_ 6 | 7 | /* This file contains the definitions for what kernel features need backports 8 | * for a given kernel. It targets only the standard stable kernel releases. 9 | * It must check only LINUX_VERSION_CODE and assume the kernel is a standard 10 | * release, and not a custom distribution. 11 | * 12 | * It must define HAVE_ and NEED_ for features. It must not 13 | * implement any backports, instead leaving the implementation to the 14 | * kcompat_impl.h header. 15 | * 16 | * If a feature can be easily implemented as a replacement macro or fully 17 | * backported, use a NEED_ to indicate that the feature needs 18 | * a backport. (If NEED_ is undefined, then no backport for that feature 19 | * is needed). 20 | * 21 | * If a feature cannot be easily implemented in kcompat directly, but 22 | * requires drivers to make specific changes such as stripping out an entire 23 | * feature or modifying a function pointer prototype, use a HAVE_. 24 | */ 25 | 26 | #ifndef LINUX_VERSION_CODE 27 | #error "LINUX_VERSION_CODE is undefined" 28 | #endif 29 | 30 | #ifndef KERNEL_VERSION 31 | #error "KERNEL_VERSION is undefined" 32 | #endif 33 | 34 | /*****************************************************************************/ 35 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0)) 36 | #else /* >= 4,8,0 */ 37 | #define HAVE_PCI_ALLOC_IRQ 38 | #endif /* 4,8,0 */ 39 | 40 | /*****************************************************************************/ 41 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0)) 42 | #define NEED_JIFFIES_64_TIME_IS_MACROS 43 | #else /* >= 4,9,0 */ 44 | #define HAVE_KTHREAD_DELAYED_API 45 | #define HAVE_NDO_OFFLOAD_STATS 46 | #endif /* 4,9,0 */ 47 | 48 | /*****************************************************************************/ 49 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,9,62)) 50 | #define NEED_IN_TASK 51 | #else /* >= 4,9,62 */ 52 | #endif /* 4,9,62 */ 53 | 54 | /*****************************************************************************/ 55 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)) 56 | #else /* >= 4,12,0 */ 57 | #define HAVE_NAPI_BUSY_LOOP 58 | #endif /* 4,12,0 */ 59 | 60 | /*****************************************************************************/ 61 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0)) 62 | #else /* >= 4,13,0 */ 63 | #define HAVE_FLOW_DISSECTOR_KEY_IP 64 | #endif /* 4,13,0 */ 65 | 66 | /*****************************************************************************/ 67 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) 68 | #define NEED_TC_SETUP_QDISC_MQPRIO 69 | #define NEED_NETDEV_XDP_STRUCT 70 | #else /* >= 4,15,0 */ 71 | #define HAVE_NDO_BPF 72 | #endif /* 4,15,0 */ 73 | 74 | /*****************************************************************************/ 75 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)) 76 | #define NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 77 | #else /* >= 4,16,0 */ 78 | #define HAVE_XDP_BUFF_RXQ 79 | #define HAVE_XDP_RXQ_INFO_REG_3_PARAMS 80 | #endif /* 4,16,0 */ 81 | 82 | /*****************************************************************************/ 83 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,17,0)) 84 | #define NEED_CONVERT_ART_NS_TO_TSC 85 | #else /* >= 4,17,0 */ 86 | #endif /* 4,17,0 */ 87 | 88 | /*****************************************************************************/ 89 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0)) 90 | #define NEED_MACVLAN_ACCEL_PRIV 91 | #define NEED_MACVLAN_RELEASE_L2FW_OFFLOAD 92 | #define NEED_MACVLAN_SUPPORTS_DEST_FILTER 93 | #else /* >= 4,18,0 */ 94 | #define HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR 95 | #endif /* 4,18,0 */ 96 | 97 | /*****************************************************************************/ 98 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0)) 99 | #define NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE 100 | #else /* >= 4,19,0 */ 101 | #define HAVE_TC_ETF_QOPT_OFFLOAD 102 | #define HAVE_FLOW_DISSECTOR_KEY_ENC_IP 103 | #endif /* 4,19,0 */ 104 | 105 | /*****************************************************************************/ 106 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0)) 107 | #else /* >= 4.20.0 */ 108 | #define HAVE_LINKMODE 109 | #endif /* 4.20.0 */ 110 | 111 | /*****************************************************************************/ 112 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,0,0)) 113 | #define NEED_INDIRECT_CALL_WRAPPER_MACROS 114 | #else /* >= 5.0.0 */ 115 | #define HAVE_INDIRECT_CALL_WRAPPER_HEADER 116 | #endif /* 5.0.0 */ 117 | 118 | /*****************************************************************************/ 119 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,1,0)) 120 | #else /* >= 5.1.0 */ 121 | #define HAVE_ETHTOOL_200G_BITS 122 | #define HAVE_ETHTOOL_NEW_100G_BITS 123 | #endif /* 5.1.0 */ 124 | 125 | /*****************************************************************************/ 126 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0)) 127 | #else /* >= 5.2.0 */ 128 | #define HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID 129 | #endif /* 5.2.0 */ 130 | 131 | /*****************************************************************************/ 132 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)) 133 | #define NEED_FLOW_INDR_BLOCK_CB_REGISTER 134 | #else /* >= 5.4.0 */ 135 | #define HAVE_FLOW_INDR_BLOCK_LOCK 136 | #define HAVE_XSK_UNALIGNED_CHUNK_PLACEMENT 137 | #endif /* 5.4.0 */ 138 | 139 | /*****************************************************************************/ 140 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,7,0)) 141 | #define NEED_CPU_LATENCY_QOS_RENAME 142 | #else /* >= 5.7.0 */ 143 | #endif /* 5.7.0 */ 144 | 145 | /*****************************************************************************/ 146 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,8,0)) 147 | #define NEED_XSK_UMEM_GET_RX_FRAME_SIZE 148 | #else /* >= 5.8.0 */ 149 | #undef HAVE_XSK_UNALIGNED_CHUNK_PLACEMENT 150 | #define HAVE_RT_IRQ_SCHED_FIX 151 | #endif /* 5.8.0 */ 152 | 153 | /*****************************************************************************/ 154 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,9,0)) 155 | #define NEED_DEVLINK_PORT_ATTRS_SET_STRUCT 156 | #define HAVE_XDP_QUERY_PROG 157 | #define NEED_INDIRECT_CALL_3_AND_4 158 | #else /* >= 5.9.0 */ 159 | #define HAVE_TASKLET_SETUP 160 | #endif /* 5.9.0 */ 161 | 162 | /*****************************************************************************/ 163 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,10,0)) 164 | #define NEED_XSK_BUFF_POOL_RENAME 165 | #else /* >= 5.10.0 */ 166 | #define HAVE_UDP_TUNNEL_NIC_SHARED 167 | #define HAVE_NETDEV_BPF_XSK_POOL 168 | #endif /* 5.10.0 */ 169 | 170 | /*****************************************************************************/ 171 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0)) 172 | #else /* >= 5.11.0 */ 173 | #define HAVE_XSK_BATCHED_DESCRIPTOR_INTERFACES 174 | #undef HAVE_XDP_RXQ_INFO_REG_3_PARAMS 175 | #define HAVE_XSK_TX_PEEK_RELEASE_DESC_BATCH_3_PARAMS 176 | #endif /* 5.11.0 */ 177 | 178 | /*****************************************************************************/ 179 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)) 180 | #define NEED_EXPORT_INDIRECT_CALLABLE 181 | #else /* >= 5.12.0 */ 182 | #define HAVE_DEVLINK_OPS_CREATE_DEL 183 | #endif /* 5.12.0 */ 184 | 185 | /*****************************************************************************/ 186 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,13,0)) 187 | #else /* >= 5.13.0 */ 188 | #define HAVE_XPS_MAP_TYPE 189 | #endif /* 5.13.0 */ 190 | 191 | /*****************************************************************************/ 192 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,14,0)) 193 | #else /* >= 5.14.0 */ 194 | #define HAVE_TTY_WRITE_ROOM_UINT 195 | #endif /* 5.14.0 */ 196 | 197 | /*****************************************************************************/ 198 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) 199 | #define NEED_DEVLINK_ALLOC_SETS_DEV 200 | #else /* >= 5.15.0 */ 201 | #define HAVE_DEVICE_IN_MDEV_PARENT_OPS 202 | #define NEED_PCI_IOV_VF_ID 203 | #define HAVE_DEVLINK_SET_STATE_3_PARAM 204 | #endif /* 5.15.0 */ 205 | 206 | /*****************************************************************************/ 207 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) 208 | #else /* >= 5.16.0 */ 209 | #define HAVE_XSK_BATCHED_RX_ALLOC 210 | #endif /* 5.16.0 */ 211 | 212 | /*****************************************************************************/ 213 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0)) 214 | #else /* >=5.18.0*/ 215 | #undef NEED_PCI_IOV_VF_ID 216 | #undef HAVE_XSK_TX_PEEK_RELEASE_DESC_BATCH_3_PARAMS 217 | #endif /* 5.18.0 */ 218 | 219 | /*****************************************************************************/ 220 | #if (LINUX_VERSION_CODE < KERNEL_VERSION(6,1,0)) 221 | #else /* >=6.1.0 */ 222 | #define HAVE_FLOW_DISSECTOR_KEY_L2TPV3 223 | #define HAVE_TTY_TERMIOS_CONST_STRUCT 224 | #endif /* 6.1.0 */ 225 | 226 | #endif /* _KCOMPAT_STD_DEFS_H_ */ 227 | -------------------------------------------------------------------------------- /src/kcompat_ubuntu_defs.h: -------------------------------------------------------------------------------- 1 | /* SPDX-License-Identifier: GPL-2.0-only */ 2 | /* Copyright (C) 1999 - 2025 Intel Corporation */ 3 | 4 | #ifndef _KCOMPAT_UBUNTU_DEFS_H_ 5 | #define _KCOMPAT_UBUNTU_DEFS_H_ 6 | 7 | /* This file contains the definitions for the Ubuntu specific distribution of 8 | * the Linux kernel. 9 | * 10 | * It checks the UBUNTU_VERSION_CODE to decide which features are available in 11 | * the target kernel. It assumes that kcompat_std_defs.h has already been 12 | * processed, and will #define or #undef the relevant flags based on what 13 | * features were backported by Ubuntu. 14 | */ 15 | 16 | #if !UTS_UBUNTU_RELEASE_ABI 17 | #error "UTS_UBUNTU_RELEASE_ABI is 0 or undefined" 18 | #endif 19 | 20 | #if !UBUNTU_VERSION_CODE 21 | #error "UBUNTU_VERSION_CODE is 0 or undefined" 22 | #endif 23 | 24 | #ifndef UBUNTU_VERSION 25 | #error "UBUNTU_VERSION is undefined" 26 | #endif 27 | 28 | /*****************************************************************************/ 29 | #if (UBUNTU_VERSION_CODE >= UBUNTU_VERSION(4,15,0,159) && \ 30 | UBUNTU_VERSION_CODE < UBUNTU_VERSION(4,15,0,999)) 31 | #endif 32 | 33 | /*****************************************************************************/ 34 | #endif /* _KCOMPAT_UBUNTU_DEFS_H_ */ 35 | --------------------------------------------------------------------------------