├── README.md └── fpga_oneapi_lab ├── Assets ├── active_code_box.png ├── asterisk_running_code.png ├── command_anatomy.png ├── emulation.png ├── emulation_code.png ├── emulation_command.png ├── fpga_flow.png ├── full_compile.png ├── full_compile_cmd.png ├── gray_code_box.png ├── hough_explanation.pdf ├── improved_loops_report.png ├── kernel_restart.png ├── line_votes.png ├── loops_analysis.png ├── messed_up_text_section.png ├── optimization_command.png ├── optimization_report_stage.png ├── pic.bmp ├── play_button.png ├── report_image.png └── server_not_running.png ├── License.txt ├── README.md ├── bin-original ├── golden_check_file.txt ├── pic.bmp └── sin_cos_values.h ├── bin ├── golden_check_file.txt ├── pic.bmp └── sin_cos_values.h ├── build_fpga_hw_a10.sh ├── build_fpga_hw_s10.sh ├── fpga_dev_flow.ipynb ├── lab ├── .gitkeep ├── golden_check_file.txt ├── hough_transform_local_mem.cpp ├── pic.bmp └── sin_cos_values.h ├── profile.sh ├── readme_pics ├── browse_to_lab.png ├── click_plus.png ├── launch_notebook.png ├── launch_terminal.png └── start_jupyter.png ├── run_fpga_hw_a10.sh └── run_fpga_hw_s10.sh /README.md: -------------------------------------------------------------------------------- 1 | # DISCONTINUATION OF PROJECT 2 | This project will no longer be maintained by Intel. 3 | Intel has ceased development and contributions including, but not limited to, maintenance, bug fixes, new releases, or updates, to this project. 4 | Intel no longer accepts patches to this project. 5 | If you have an ongoing need to use this project, are interested in independently developing it, or would like to maintain patches for the open source software community, please create your own fork of this project. 6 | 7 | # fpga-training 8 | 9 | This repository contains hands-on labs produced by the Intel FPGA Technical Training team. 10 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/Assets/active_code_box.png: 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/fpga_oneapi_lab/License.txt: -------------------------------------------------------------------------------- 1 | Copyright 2020 Intel Corporation 2 | 3 | Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: 4 | 5 | The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. 6 | 7 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 8 | 9 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/README.md: -------------------------------------------------------------------------------- 1 | # Using FPGAs with oneAPI Lab 2 | 3 | 1. If you do not have a Intel® DevCloud account, sign up for one at this [website](https://www.intel.com/content/www/us/en/forms/idz/devcloud-registration.html?tgt=https://www.intel.com/content/www/us/en/secure/forms/devcloud-enrollment/account-provisioning.html). Use the event code from your event if you have been given one. 4 | 5 | 2. Once you have an Intel DevCloud account, go to the [Get Started page](https://devcloud.intel.com/oneapi/get_started/) and scroll to the bottom. Click on the "Sign In to Connect" button shown below that is beneath the "Connect with Jupyter* Notebook" heading. 6 | ![Launch Jupyter](readme_pics/start_jupyter.png) 7 | 8 | 3. You may see a screen indicating you are waiting for the kernel for Jupyter to start up. If you see this screen for more than a few minutes, go back to the [Get Started page](https://devcloud.intel.com/oneapi/get_started/) and launch JupyterLab again from the bottom of that page. 9 | 10 | 4. Once JupyterLab has launched, you will see menu options at the top. From the menu, select File -> New -> Terminal, as shown below. 11 | ![Launch Terminal](readme_pics/launch_terminal.png) 12 | 13 | 5. At the prompt, clone this repository. 14 | 15 | $ `git clone https://github.com/intel/fpga-training` 16 | 17 | 6. On the pane to the left in JupyterLab, browse to the ~/fpga-training/fpga_oneapi_lab/ directory, as shown below. 18 | ![Browse to the lab directory](readme_pics/browse_to_lab.png) 19 | 20 | 7. Double-click the fpga_dev_flow.ipynb file in the file browser pane to launch the Jupyter Notebook for the lab, as shown below. Work the Jupyter Notebook. 21 | 22 | ![Launch Notebook](readme_pics/launch_notebook.png) 23 | 24 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/bin-original/pic.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/bin-original/pic.bmp -------------------------------------------------------------------------------- /fpga_oneapi_lab/bin-original/sin_cos_values.h: -------------------------------------------------------------------------------- 1 | //============================================================== 2 | // Copyright © 2020 Intel Corporation 3 | // 4 | // SPDX-License-Identifier: MIT 5 | // ============================================================= 6 | 7 | static float sinvals[180] = { 8 | 0.00000000, 9 | 0.01745241, 10 | 0.03489950, 11 | 0.05233596, 12 | 0.06975647, 13 | 0.08715574, 14 | 0.10452846, 15 | 0.12186934, 16 | 0.13917311, 17 | 0.15643446, 18 | 0.17364818, 19 | 0.19080900, 20 | 0.20791169, 21 | 0.22495106, 22 | 0.24192190, 23 | 0.25881904, 24 | 0.27563736, 25 | 0.29237169, 26 | 0.30901700, 27 | 0.32556814, 28 | 0.34202015, 29 | 0.35836795, 30 | 0.37460658, 31 | 0.39073113, 32 | 0.40673664, 33 | 0.42261827, 34 | 0.43837115, 35 | 0.45399049, 36 | 0.46947157, 37 | 0.48480961, 38 | 0.50000000, 39 | 0.51503807, 40 | 0.52991927, 41 | 0.54463905, 42 | 0.55919290, 43 | 0.57357645, 44 | 0.58778524, 45 | 0.60181504, 46 | 0.61566150, 47 | 0.62932038, 48 | 0.64278764, 49 | 0.65605903, 50 | 0.66913062, 51 | 0.68199837, 52 | 0.69465840, 53 | 0.70710677, 54 | 0.71933979, 55 | 0.73135370, 56 | 0.74314481, 57 | 0.75470960, 58 | 0.76604444, 59 | 0.77714598, 60 | 0.78801078, 61 | 0.79863548, 62 | 0.80901700, 63 | 0.81915206, 64 | 0.82903755, 65 | 0.83867055, 66 | 0.84804809, 67 | 0.85716730, 68 | 0.86602539, 69 | 0.87461972, 70 | 0.88294756, 71 | 0.89100653, 72 | 0.89879405, 73 | 0.90630776, 74 | 0.91354543, 75 | 0.92050487, 76 | 0.92718387, 77 | 0.93358040, 78 | 0.93969262, 79 | 0.94551855, 80 | 0.95105654, 81 | 0.95630473, 82 | 0.96126169, 83 | 0.96592581, 84 | 0.97029573, 85 | 0.97437006, 86 | 0.97814763, 87 | 0.98162717, 88 | 0.98480773, 89 | 0.98768836, 90 | 0.99026805, 91 | 0.99254614, 92 | 0.99452192, 93 | 0.99619472, 94 | 0.99756408, 95 | 0.99862951, 96 | 0.99939084, 97 | 0.99984771, 98 | 1.00000000, 99 | 0.99984771, 100 | 0.99939084, 101 | 0.99862951, 102 | 0.99756408, 103 | 0.99619472, 104 | 0.99452192, 105 | 0.99254614, 106 | 0.99026805, 107 | 0.98768836, 108 | 0.98480773, 109 | 0.98162717, 110 | 0.97814763, 111 | 0.97437006, 112 | 0.97029573, 113 | 0.96592581, 114 | 0.96126169, 115 | 0.95630473, 116 | 0.95105654, 117 | 0.94551855, 118 | 0.93969262, 119 | 0.93358040, 120 | 0.92718387, 121 | 0.92050487, 122 | 0.91354543, 123 | 0.90630782, 124 | 0.89879405, 125 | 0.89100653, 126 | 0.88294762, 127 | 0.87461972, 128 | 0.86602539, 129 | 0.85716730, 130 | 0.84804809, 131 | 0.83867055, 132 | 0.82903755, 133 | 0.81915206, 134 | 0.80901700, 135 | 0.79863548, 136 | 0.78801078, 137 | 0.77714598, 138 | 0.76604444, 139 | 0.75470960, 140 | 0.74314481, 141 | 0.73135370, 142 | 0.71933979, 143 | 0.70710677, 144 | 0.69465840, 145 | 0.68199837, 146 | 0.66913062, 147 | 0.65605903, 148 | 0.64278764, 149 | 0.62932038, 150 | 0.61566150, 151 | 0.60181504, 152 | 0.58778524, 153 | 0.57357645, 154 | 0.55919290, 155 | 0.54463905, 156 | 0.52991927, 157 | 0.51503807, 158 | 0.50000000, 159 | 0.48480964, 160 | 0.46947157, 161 | 0.45399049, 162 | 0.43837115, 163 | 0.42261827, 164 | 0.40673664, 165 | 0.39073113, 166 | 0.37460661, 167 | 0.35836795, 168 | 0.34202015, 169 | 0.32556817, 170 | 0.30901700, 171 | 0.29237172, 172 | 0.27563736, 173 | 0.25881904, 174 | 0.24192190, 175 | 0.22495106, 176 | 0.20791170, 177 | 0.19080900, 178 | 0.17364818, 179 | 0.15643446, 180 | 0.13917311, 181 | 0.12186935, 182 | 0.10452846, 183 | 0.08715574, 184 | 0.06975648, 185 | 0.05233596, 186 | 0.03489950, 187 | 0.01745241, 188 | }; 189 | 190 | static float cosvals[180] = { 191 | 1.00000000, 192 | 0.99984771, 193 | 0.99939084, 194 | 0.99862951, 195 | 0.99756408, 196 | 0.99619472, 197 | 0.99452192, 198 | 0.99254614, 199 | 0.99026805, 200 | 0.98768836, 201 | 0.98480773, 202 | 0.98162717, 203 | 0.97814763, 204 | 0.97437006, 205 | 0.97029573, 206 | 0.96592581, 207 | 0.96126169, 208 | 0.95630473, 209 | 0.95105654, 210 | 0.94551855, 211 | 0.93969262, 212 | 0.93358040, 213 | 0.92718387, 214 | 0.92050487, 215 | 0.91354543, 216 | 0.90630782, 217 | 0.89879405, 218 | 0.89100653, 219 | 0.88294756, 220 | 0.87461972, 221 | 0.86602539, 222 | 0.85716730, 223 | 0.84804809, 224 | 0.83867055, 225 | 0.82903755, 226 | 0.81915206, 227 | 0.80901700, 228 | 0.79863548, 229 | 0.78801078, 230 | 0.77714598, 231 | 0.76604444, 232 | 0.75470960, 233 | 0.74314481, 234 | 0.73135370, 235 | 0.71933979, 236 | 0.70710677, 237 | 0.69465840, 238 | 0.68199837, 239 | 0.66913062, 240 | 0.65605903, 241 | 0.64278764, 242 | 0.62932038, 243 | 0.61566150, 244 | 0.60181504, 245 | 0.58778524, 246 | 0.57357645, 247 | 0.55919290, 248 | 0.54463905, 249 | 0.52991927, 250 | 0.51503807, 251 | 0.50000000, 252 | 0.48480961, 253 | 0.46947157, 254 | 0.45399049, 255 | 0.43837115, 256 | 0.42261827, 257 | 0.40673664, 258 | 0.39073113, 259 | 0.37460661, 260 | 0.35836795, 261 | 0.34202015, 262 | 0.32556817, 263 | 0.30901700, 264 | 0.29237172, 265 | 0.27563736, 266 | 0.25881904, 267 | 0.24192190, 268 | 0.22495106, 269 | 0.20791169, 270 | 0.19080900, 271 | 0.17364818, 272 | 0.15643446, 273 | 0.13917311, 274 | 0.12186935, 275 | 0.10452846, 276 | 0.08715574, 277 | 0.06975648, 278 | 0.05233596, 279 | 0.03489950, 280 | 0.01745241, 281 | 0.00000000, 282 | -0.01745240, 283 | -0.03489950, 284 | -0.05233596, 285 | -0.06975647, 286 | -0.08715574, 287 | -0.10452846, 288 | -0.12186934, 289 | -0.13917311, 290 | -0.15643446, 291 | -0.17364818, 292 | -0.19080900, 293 | -0.20791169, 294 | -0.22495106, 295 | -0.24192189, 296 | -0.25881904, 297 | -0.27563736, 298 | -0.29237169, 299 | -0.30901700, 300 | -0.32556814, 301 | -0.34202015, 302 | -0.35836795, 303 | -0.37460658, 304 | -0.39073113, 305 | -0.40673664, 306 | -0.42261827, 307 | -0.43837115, 308 | -0.45399049, 309 | -0.46947157, 310 | -0.48480961, 311 | -0.50000000, 312 | -0.51503807, 313 | -0.52991927, 314 | -0.54463905, 315 | -0.55919290, 316 | -0.57357645, 317 | -0.58778524, 318 | -0.60181504, 319 | -0.61566150, 320 | -0.62932038, 321 | -0.64278764, 322 | -0.65605903, 323 | -0.66913062, 324 | -0.68199837, 325 | -0.69465834, 326 | -0.70710677, 327 | -0.71933979, 328 | -0.73135370, 329 | -0.74314481, 330 | -0.75470960, 331 | -0.76604444, 332 | -0.77714598, 333 | -0.78801078, 334 | -0.79863548, 335 | -0.80901700, 336 | -0.81915206, 337 | -0.82903755, 338 | -0.83867055, 339 | -0.84804809, 340 | -0.85716730, 341 | -0.86602539, 342 | -0.87461972, 343 | -0.88294756, 344 | -0.89100653, 345 | -0.89879405, 346 | -0.90630776, 347 | -0.91354543, 348 | -0.92050487, 349 | -0.92718387, 350 | -0.93358040, 351 | -0.93969262, 352 | -0.94551855, 353 | -0.95105654, 354 | -0.95630473, 355 | -0.96126169, 356 | -0.96592581, 357 | -0.97029573, 358 | -0.97437006, 359 | -0.97814763, 360 | -0.98162717, 361 | -0.98480773, 362 | -0.98768836, 363 | -0.99026805, 364 | -0.99254614, 365 | -0.99452192, 366 | -0.99619472, 367 | -0.99756408, 368 | -0.99862951, 369 | -0.99939084, 370 | -0.9998477, 371 | }; 372 | 373 | 374 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/bin/pic.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/bin/pic.bmp -------------------------------------------------------------------------------- /fpga_oneapi_lab/bin/sin_cos_values.h: -------------------------------------------------------------------------------- 1 | //============================================================== 2 | // Copyright © 2020 Intel Corporation 3 | // 4 | // SPDX-License-Identifier: MIT 5 | // ============================================================= 6 | 7 | static float sinvals[180] = { 8 | 0.00000000, 9 | 0.01745241, 10 | 0.03489950, 11 | 0.05233596, 12 | 0.06975647, 13 | 0.08715574, 14 | 0.10452846, 15 | 0.12186934, 16 | 0.13917311, 17 | 0.15643446, 18 | 0.17364818, 19 | 0.19080900, 20 | 0.20791169, 21 | 0.22495106, 22 | 0.24192190, 23 | 0.25881904, 24 | 0.27563736, 25 | 0.29237169, 26 | 0.30901700, 27 | 0.32556814, 28 | 0.34202015, 29 | 0.35836795, 30 | 0.37460658, 31 | 0.39073113, 32 | 0.40673664, 33 | 0.42261827, 34 | 0.43837115, 35 | 0.45399049, 36 | 0.46947157, 37 | 0.48480961, 38 | 0.50000000, 39 | 0.51503807, 40 | 0.52991927, 41 | 0.54463905, 42 | 0.55919290, 43 | 0.57357645, 44 | 0.58778524, 45 | 0.60181504, 46 | 0.61566150, 47 | 0.62932038, 48 | 0.64278764, 49 | 0.65605903, 50 | 0.66913062, 51 | 0.68199837, 52 | 0.69465840, 53 | 0.70710677, 54 | 0.71933979, 55 | 0.73135370, 56 | 0.74314481, 57 | 0.75470960, 58 | 0.76604444, 59 | 0.77714598, 60 | 0.78801078, 61 | 0.79863548, 62 | 0.80901700, 63 | 0.81915206, 64 | 0.82903755, 65 | 0.83867055, 66 | 0.84804809, 67 | 0.85716730, 68 | 0.86602539, 69 | 0.87461972, 70 | 0.88294756, 71 | 0.89100653, 72 | 0.89879405, 73 | 0.90630776, 74 | 0.91354543, 75 | 0.92050487, 76 | 0.92718387, 77 | 0.93358040, 78 | 0.93969262, 79 | 0.94551855, 80 | 0.95105654, 81 | 0.95630473, 82 | 0.96126169, 83 | 0.96592581, 84 | 0.97029573, 85 | 0.97437006, 86 | 0.97814763, 87 | 0.98162717, 88 | 0.98480773, 89 | 0.98768836, 90 | 0.99026805, 91 | 0.99254614, 92 | 0.99452192, 93 | 0.99619472, 94 | 0.99756408, 95 | 0.99862951, 96 | 0.99939084, 97 | 0.99984771, 98 | 1.00000000, 99 | 0.99984771, 100 | 0.99939084, 101 | 0.99862951, 102 | 0.99756408, 103 | 0.99619472, 104 | 0.99452192, 105 | 0.99254614, 106 | 0.99026805, 107 | 0.98768836, 108 | 0.98480773, 109 | 0.98162717, 110 | 0.97814763, 111 | 0.97437006, 112 | 0.97029573, 113 | 0.96592581, 114 | 0.96126169, 115 | 0.95630473, 116 | 0.95105654, 117 | 0.94551855, 118 | 0.93969262, 119 | 0.93358040, 120 | 0.92718387, 121 | 0.92050487, 122 | 0.91354543, 123 | 0.90630782, 124 | 0.89879405, 125 | 0.89100653, 126 | 0.88294762, 127 | 0.87461972, 128 | 0.86602539, 129 | 0.85716730, 130 | 0.84804809, 131 | 0.83867055, 132 | 0.82903755, 133 | 0.81915206, 134 | 0.80901700, 135 | 0.79863548, 136 | 0.78801078, 137 | 0.77714598, 138 | 0.76604444, 139 | 0.75470960, 140 | 0.74314481, 141 | 0.73135370, 142 | 0.71933979, 143 | 0.70710677, 144 | 0.69465840, 145 | 0.68199837, 146 | 0.66913062, 147 | 0.65605903, 148 | 0.64278764, 149 | 0.62932038, 150 | 0.61566150, 151 | 0.60181504, 152 | 0.58778524, 153 | 0.57357645, 154 | 0.55919290, 155 | 0.54463905, 156 | 0.52991927, 157 | 0.51503807, 158 | 0.50000000, 159 | 0.48480964, 160 | 0.46947157, 161 | 0.45399049, 162 | 0.43837115, 163 | 0.42261827, 164 | 0.40673664, 165 | 0.39073113, 166 | 0.37460661, 167 | 0.35836795, 168 | 0.34202015, 169 | 0.32556817, 170 | 0.30901700, 171 | 0.29237172, 172 | 0.27563736, 173 | 0.25881904, 174 | 0.24192190, 175 | 0.22495106, 176 | 0.20791170, 177 | 0.19080900, 178 | 0.17364818, 179 | 0.15643446, 180 | 0.13917311, 181 | 0.12186935, 182 | 0.10452846, 183 | 0.08715574, 184 | 0.06975648, 185 | 0.05233596, 186 | 0.03489950, 187 | 0.01745241, 188 | }; 189 | 190 | static float cosvals[180] = { 191 | 1.00000000, 192 | 0.99984771, 193 | 0.99939084, 194 | 0.99862951, 195 | 0.99756408, 196 | 0.99619472, 197 | 0.99452192, 198 | 0.99254614, 199 | 0.99026805, 200 | 0.98768836, 201 | 0.98480773, 202 | 0.98162717, 203 | 0.97814763, 204 | 0.97437006, 205 | 0.97029573, 206 | 0.96592581, 207 | 0.96126169, 208 | 0.95630473, 209 | 0.95105654, 210 | 0.94551855, 211 | 0.93969262, 212 | 0.93358040, 213 | 0.92718387, 214 | 0.92050487, 215 | 0.91354543, 216 | 0.90630782, 217 | 0.89879405, 218 | 0.89100653, 219 | 0.88294756, 220 | 0.87461972, 221 | 0.86602539, 222 | 0.85716730, 223 | 0.84804809, 224 | 0.83867055, 225 | 0.82903755, 226 | 0.81915206, 227 | 0.80901700, 228 | 0.79863548, 229 | 0.78801078, 230 | 0.77714598, 231 | 0.76604444, 232 | 0.75470960, 233 | 0.74314481, 234 | 0.73135370, 235 | 0.71933979, 236 | 0.70710677, 237 | 0.69465840, 238 | 0.68199837, 239 | 0.66913062, 240 | 0.65605903, 241 | 0.64278764, 242 | 0.62932038, 243 | 0.61566150, 244 | 0.60181504, 245 | 0.58778524, 246 | 0.57357645, 247 | 0.55919290, 248 | 0.54463905, 249 | 0.52991927, 250 | 0.51503807, 251 | 0.50000000, 252 | 0.48480961, 253 | 0.46947157, 254 | 0.45399049, 255 | 0.43837115, 256 | 0.42261827, 257 | 0.40673664, 258 | 0.39073113, 259 | 0.37460661, 260 | 0.35836795, 261 | 0.34202015, 262 | 0.32556817, 263 | 0.30901700, 264 | 0.29237172, 265 | 0.27563736, 266 | 0.25881904, 267 | 0.24192190, 268 | 0.22495106, 269 | 0.20791169, 270 | 0.19080900, 271 | 0.17364818, 272 | 0.15643446, 273 | 0.13917311, 274 | 0.12186935, 275 | 0.10452846, 276 | 0.08715574, 277 | 0.06975648, 278 | 0.05233596, 279 | 0.03489950, 280 | 0.01745241, 281 | 0.00000000, 282 | -0.01745240, 283 | -0.03489950, 284 | -0.05233596, 285 | -0.06975647, 286 | -0.08715574, 287 | -0.10452846, 288 | -0.12186934, 289 | -0.13917311, 290 | -0.15643446, 291 | -0.17364818, 292 | -0.19080900, 293 | -0.20791169, 294 | -0.22495106, 295 | -0.24192189, 296 | -0.25881904, 297 | -0.27563736, 298 | -0.29237169, 299 | -0.30901700, 300 | -0.32556814, 301 | -0.34202015, 302 | -0.35836795, 303 | -0.37460658, 304 | -0.39073113, 305 | -0.40673664, 306 | -0.42261827, 307 | -0.43837115, 308 | -0.45399049, 309 | -0.46947157, 310 | -0.48480961, 311 | -0.50000000, 312 | -0.51503807, 313 | -0.52991927, 314 | -0.54463905, 315 | -0.55919290, 316 | -0.57357645, 317 | -0.58778524, 318 | -0.60181504, 319 | -0.61566150, 320 | -0.62932038, 321 | -0.64278764, 322 | -0.65605903, 323 | -0.66913062, 324 | -0.68199837, 325 | -0.69465834, 326 | -0.70710677, 327 | -0.71933979, 328 | -0.73135370, 329 | -0.74314481, 330 | -0.75470960, 331 | -0.76604444, 332 | -0.77714598, 333 | -0.78801078, 334 | -0.79863548, 335 | -0.80901700, 336 | -0.81915206, 337 | -0.82903755, 338 | -0.83867055, 339 | -0.84804809, 340 | -0.85716730, 341 | -0.86602539, 342 | -0.87461972, 343 | -0.88294756, 344 | -0.89100653, 345 | -0.89879405, 346 | -0.90630776, 347 | -0.91354543, 348 | -0.92050487, 349 | -0.92718387, 350 | -0.93358040, 351 | -0.93969262, 352 | -0.94551855, 353 | -0.95105654, 354 | -0.95630473, 355 | -0.96126169, 356 | -0.96592581, 357 | -0.97029573, 358 | -0.97437006, 359 | -0.97814763, 360 | -0.98162717, 361 | -0.98480773, 362 | -0.98768836, 363 | -0.99026805, 364 | -0.99254614, 365 | -0.99452192, 366 | -0.99619472, 367 | -0.99756408, 368 | -0.99862951, 369 | -0.99939084, 370 | -0.9998477, 371 | }; 372 | 373 | 374 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/build_fpga_hw_a10.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | export PATH=/glob/intel-python/python3/bin/:/glob/intel-python/python2/bin/:${PATH} 3 | source /opt/intel/oneapi/setvars.sh > /dev/null 2>&1 4 | rm -Rf bin 5 | cp -pR bin-original bin 6 | echo "Got here" 7 | dpcpp -fintelfpga ./lab/hough_transform_local_mem.cpp -Xshardware -Xsboard=/opt/intel/oneapi/intel_a10gx_pac:pac_a10 -Xsprofile -o ./bin/hough_transform_local_mem.fpga 8 | echo "Got here2" 9 | echo "Got here3" 10 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/build_fpga_hw_s10.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | export PATH=/glob/intel-python/python3/bin/:/glob/intel-python/python2/bin/:${PATH} 3 | source /opt/intel/oneapi/setvars.sh > /dev/null 2>&1 4 | rm -Rf bin_s10 5 | cp -pR bin-original bin_s10 6 | echo "Got here" 7 | dpcpp -fintelfpga ./lab_s10/hough_transform_local_mem.cpp -Xshardware -Xsboard=/opt/intel/oneapi/intel_s10sx_pac:pac_s10 -Xsprofile -o ./bin_s10/hough_transform_local_mem_stratix10.fpga 8 | echo "Got here2" -------------------------------------------------------------------------------- /fpga_oneapi_lab/fpga_dev_flow.ipynb: -------------------------------------------------------------------------------- 1 | { 2 | "cells": [ 3 | { 4 | "cell_type": "markdown", 5 | "metadata": {}, 6 | "source": [ 7 | "# Lab: Practice the FPGA Development Flow" 8 | ] 9 | }, 10 | { 11 | "cell_type": "markdown", 12 | "metadata": {}, 13 | "source": [ 14 | "##### Sections\n", 15 | "\n", 16 | "- [How Do I Use a Jupyter Notebook?](#How-Do-I-Use-a-Jupyter-Notebook?)\n", 17 | "- [A Quick FAQ of Common Jupyter Issues](#A-Quick-FAQ-of-Common-Jupyter-Issues:)\n", 18 | "- [Development Flow for Using oneAPI with Intel® FPGAs](#Development-Flow-for-Using-oneAPI-with-Intel®-FPGAs)\n", 19 | "- [Anatomy of a Compilation Command](#Anatomy-of-a-Compilation-Command)\n", 20 | "- [Stage 1: Emulation](#Stage-1:-Emulation)\n", 21 | "- [Stage 2: Optimization Report Generation](#Stage-2:-Optimization-Report-Generation)\n", 22 | "- [Stage 3: Full Compile](#Stage-3:-Full-Compile)\n", 23 | "- [To Learn More](#To-Learn-More)" 24 | ] 25 | }, 26 | { 27 | "cell_type": "markdown", 28 | "metadata": {}, 29 | "source": [ 30 | "## Learning Objectives\n", 31 | "\n", 32 | "* Learn to use a Jupyter Notebook in the JupyterLab environment\n", 33 | "* Understand the development flow for Intel® FPGAs with the Intel® oneAPI Toolkits\n", 34 | "* Practice using the flow\n", 35 | "* Know where to go to continue your learning\n" 36 | ] 37 | }, 38 | { 39 | "cell_type": "markdown", 40 | "metadata": {}, 41 | "source": [] 42 | }, 43 | { 44 | "cell_type": "markdown", 45 | "metadata": {}, 46 | "source": [ 47 | "***\n", 48 | "# How Do I Use a Jupyter Notebook?\n", 49 | "\n", 50 | "Jupyter notebooks are a great learning tool, and are very easy once you get used to it. Here are the very basics. Look online or ask your instructor or the chat channel (if implemented for your class) for more help if needed. You will also be using more features of the Jupyter Lab environment as the lab progresses. Each new feature will be introduced within the notebook before you are asked to use it.\n", 51 | "\n", 52 | "When you see a section of code, it will show up in a light gray box, like the screenshot shows below.\n", 53 | "\n", 54 | "\n", 55 | "\n", 56 | "When you click once within the box, a blue bar will show up beside it, indicating that it is the active section of the notebook, as shown below:\n", 57 | "\n", 58 | "\n", 59 | "\n", 60 | "When a section is active, you can execute it. To execute it, you click inside it, make sure the blue bar is showing beside it, and then click the ▶ at the top of the notebook to run that code. The screenshot below has a box drawn around the ▶ so you will know where to find it.\n", 61 | "\n", 62 | "\n", 63 | "\n", 64 | "This notebook has been set up to compile and execute code in two steps:\n", 65 | "* In the first section of code, you will see a program with %%writefile {a filename} as the top line. In this first step, we write the code you see (and sometimes edit) to a file.\n", 66 | "* In the next section of code, you will see commands meant to run on the DevCloud host. These begin with a ! and are Linux commands. These commands compile the code you have written.\n", 67 | "\n" 68 | ] 69 | }, 70 | { 71 | "cell_type": "markdown", 72 | "metadata": {}, 73 | "source": [ 74 | "__To begin, we will first set up our bash profile to enable us use DPCPP commands effectively. Click on the cell below to make it active and then click ▶ to make it run.__" 75 | ] 76 | }, 77 | { 78 | "cell_type": "code", 79 | "execution_count": 4, 80 | "metadata": {}, 81 | "outputs": [], 82 | "source": [ 83 | "! cat profile.sh > ~/.bash_profile\n", 84 | "! source ~/.bash_profile" 85 | ] 86 | }, 87 | { 88 | "cell_type": "markdown", 89 | "metadata": {}, 90 | "source": [ 91 | "_Once you have run the code above, Restart your account by Logging out of your devcloud account using the Log Out button at the top right corner of this window and then logging back into the account. Note that without doing this, you will have challenges when calling the DPCPP compiler. When you log back in,continue to the next instruction below._" 92 | ] 93 | }, 94 | { 95 | "cell_type": "markdown", 96 | "metadata": {}, 97 | "source": [ 98 | "__Hold up!! Have you completed the instruction above? If no, go back to complete the instruction. If yes, you are ready to proceed.__\n", 99 | "\n", 100 | "__Now, let's practice!__\n", 101 | "The code box below writes a simple hello world example program. Click on it now to make it active (you'll see a blue bar beside it), and then click ▶ to make it run. You will see dialog indicating the file has been written after you've made it run." 102 | ] 103 | }, 104 | { 105 | "cell_type": "code", 106 | "execution_count": 1, 107 | "metadata": {}, 108 | "outputs": [ 109 | { 110 | "name": "stdout", 111 | "output_type": "stream", 112 | "text": [ 113 | "Overwriting lab/hello_world_example.cpp\n" 114 | ] 115 | } 116 | ], 117 | "source": [ 118 | "%%writefile lab/hello_world_example.cpp\n", 119 | "#include \n", 120 | "int main() {\n", 121 | " std::cout << \"Hello world! \\n\" << std::endl;\n", 122 | "}" 123 | ] 124 | }, 125 | { 126 | "cell_type": "markdown", 127 | "metadata": {}, 128 | "source": [ 129 | "__Did you see the \"Writing lab/hello_world_example.cpp\" dialog appear?__ Now, let's compile and execute the simple hello world program you just wrote to a file. Click on the code box below and then click ▶. Remember, the code commands that start with ! are calling the DevCloud host (a Linux host) to execute something. Here, we are telling it to compile the code using the dpcpp compiler, and then to run the resulting executable file." 130 | ] 131 | }, 132 | { 133 | "cell_type": "code", 134 | "execution_count": 1, 135 | "metadata": {}, 136 | "outputs": [ 137 | { 138 | "name": "stdout", 139 | "output_type": "stream", 140 | "text": [ 141 | "Hello world! \n", 142 | "\n" 143 | ] 144 | } 145 | ], 146 | "source": [ 147 | "! dpcpp lab/hello_world_example.cpp -o bin/hello_world\n", 148 | "! bin/hello_world" 149 | ] 150 | }, 151 | { 152 | "cell_type": "markdown", 153 | "metadata": {}, 154 | "source": [ 155 | "__Do you see the \"Hello world!\" output?__ Great! The compute node you are logged into compiled and executed the code that was written to a file in the first cell you ran.\n", 156 | "\n", 157 | "If the code is taking a while to run, you will see an asterisk within the brackets beside the gray code box, like is shown below.\n", 158 | "\n", 159 | "\n", 160 | "\n", 161 | "__When the asterisk, turns to a number, the code is finished running.__\n", 162 | "\n", 163 | "Unless you are told otherwise within the notebook, assume all code should take no longer than a minute to run. If you are seeing longer times, follow the steps in the FAQ below for the question __What if my code is taking too long to run?__\n", 164 | "\n", 165 | "__Now, you're ready to get started with the rest of the lab! Remember, more features of Jupyter Lab will be introduced as needed during the labs. They will always be explained before use.__\n", 166 | "\n", 167 | "__In case you run into any issues, consult the FAQ below first.__\n", 168 | "\n", 169 | "***\n", 170 | "# A Quick FAQ of Common Jupyter Issues:\n", 171 | "\n", 172 | "__What if my code is taking too long to run?__ or __What if I get a popup saying my server is not running?__\n", 173 | "\n", 174 | "If the Jupyter cells are not responsive or if they error out when you compile the code samples, please restart the Jupyter Kernel. Select the following menu item within the Jupyter Lab window: \"Kernel->Restart Kernel and Clear All Outputs,\" and compile the code samples again.\n", 175 | "\n", 176 | "__What if a part of the notebook that is supposed to be text looks funny like the screenshot below?__\n", 177 | "\n", 178 | "\n", 179 | "\n", 180 | "If a text section looks like this, simply click on it and make it the active section (it will have a blue vertical bar beside it), and click ▶ (like you were running a code section). It will then go back to looking like a regular text section.\n", 181 | "\n", 182 | "__What if I get a popup saying my server is not running, like the one shown below?__\n", 183 | "\n", 184 | "\n", 185 | "\n", 186 | "If you get this pop-up, select Restart. Be aware you may need to re-open the Jupyter Notebook and work some steps. (Or, you might be able to go back to the browser tab you were using when you got this pop-up and resume.)" 187 | ] 188 | }, 189 | { 190 | "cell_type": "markdown", 191 | "metadata": {}, 192 | "source": [ 193 | "***\n", 194 | "# Development Flow for Using oneAPI with Intel® FPGAs\n", 195 | "\n", 196 | "\n", 197 | "\n", 198 | "The development flow for Intel FPGAs with oneAPI involves several stages. The purpose of these stages is so that you can do the following without having to endure a lengthy compile:\n", 199 | "* Ensure functionality of your code (you get the correct answers from your computation)\n", 200 | "* Ensure the custom hardware built to implement your code has optimal performance\n", 201 | "\n", 202 | "In this lab, we will practice the 3 stages of the flow - emulating your code to make sure your code is function, compiling to an early design representation to generate an optimization report, and compiling to an executable that includes an FPGA bitstream. The last stage will be done like a cooking show - I've got the bitstream fully compiled already to demonstrate." 203 | ] 204 | }, 205 | { 206 | "cell_type": "markdown", 207 | "metadata": {}, 208 | "source": [ 209 | "***\n", 210 | "# Anatomy of a Compilation Command\n", 211 | "\n", 212 | "" 213 | ] 214 | }, 215 | { 216 | "cell_type": "markdown", 217 | "metadata": {}, 218 | "source": [ 219 | "***\n", 220 | "# Stage 1: Emulation\n", 221 | "\n", 222 | "__Seconds of Compilation__\n", 223 | "\n", 224 | "\n", 225 | "\n", 226 | "The first stage of development for FPGAs with oneAPI is __emulation__. The purpose of emulation is to make sure that your code is __functional__, or in other words, that you __get the correct answers from your computations__.\n", 227 | "\n", 228 | "For this stage, your kernel will be compiled into an x86 executable that will be run on the host. Since it is a software compile, the compile time for this stage will be very quick, usually seconds.\n", 229 | "\n", 230 | "This quick compile time allows you to iterate through this stage many times, until your code is functionally correct.\n", 231 | "\n", 232 | "Some more things that are quick and easy during emulation:\n", 233 | "* Identify quickly syntax and pointer implementation errors\n", 234 | "* Ability to debug with GDB, even within the kernel scope\n", 235 | "* Functional debug of SYCL code with FPGA extensions\n", 236 | "\n", 237 | "Emulation is enabled by choosing a special FPGA emulator device as your device selector within your DPC++ code. The snippet below shows how we recommend writing your DPC++ code to easily allow compiling either for a real FPGA or an emulation device.\n", 238 | "\n", 239 | "\n", 240 | "\n", 241 | "The compilation command used is shown below.\n", 242 | "\n", 243 | "\n", 244 | "\n", 245 | "__Now, let's give it a try!__\n", 246 | "\n", 247 | "__Before working with any code, run the cell below. It will reset the kernel for this notebook, to ensure we start fresh. (Similar to doing a \"make clean\" if you're used to using make flows). You will see a pop up that looks like the picture below.__\n", 248 | "\n", 249 | "__Click OK when the popup appears.__\n", 250 | "\n", 251 | "" 252 | ] 253 | }, 254 | { 255 | "cell_type": "code", 256 | "execution_count": null, 257 | "metadata": {}, 258 | "outputs": [], 259 | "source": [ 260 | "import os\n", 261 | "os._exit(00)" 262 | ] 263 | }, 264 | { 265 | "cell_type": "markdown", 266 | "metadata": {}, 267 | "source": [ 268 | "__The notebook section below will write the DPC++ code to a file. Take a look at the code before running the cell.__\n", 269 | "\n", 270 | "The code implements a simple cumulative sum on an array of values.\n", 271 | "\n", 272 | "The code is heavily commented, so that you can easily understand what it is implementing if you want to take some time to look at it.. (Also - keep in mind this is a simple example. It wouldn't be worth it to ever use a lookaside acceleator to sum 1024 integers!)\n", 273 | "\n", 274 | "Things to notice in the code:\n", 275 | "* Lines marked with **!!!!!!!!!!!!!Look here 1**: Pre-compiler directive determining whether this will be compiled for emulation or a true bitstream\n", 276 | "* Lines marked with **!!!!!!!!!!!!!Look here 2**: The vector add kernel that is the portion of code that would be compiled for the FPGA in a full bitstream compile" 277 | ] 278 | }, 279 | { 280 | "cell_type": "code", 281 | "execution_count": 1, 282 | "metadata": {}, 283 | "outputs": [ 284 | { 285 | "name": "stdout", 286 | "output_type": "stream", 287 | "text": [ 288 | "Overwriting lab/fpga_compile.cpp\n" 289 | ] 290 | } 291 | ], 292 | "source": [ 293 | "%%writefile lab/fpga_compile.cpp\n", 294 | "//==============================================================\n", 295 | "// Copyright Intel Corporation\n", 296 | "//\n", 297 | "// SPDX-License-Identifier: MIT\n", 298 | "// =============================================================\n", 299 | "#include \n", 300 | "#include \n", 301 | "#include \n", 302 | "#include \n", 303 | "\n", 304 | "// dpc_common.hpp can be found in the dev-utilities include folder.\n", 305 | "// e.g., $ONEAPI_ROOT/dev-utilities//include/dpc_common.hpp\n", 306 | "#include \"dpc_common.hpp\"\n", 307 | "\n", 308 | "using namespace sycl;\n", 309 | "\n", 310 | "// Vector size for this example\n", 311 | "constexpr size_t kSize = 1024;\n", 312 | "\n", 313 | "// Forward declare the kernel name in the global scope to reduce name mangling. \n", 314 | "// This is an FPGA best practice that makes it easier to identify the kernel in \n", 315 | "// the optimization reports.\n", 316 | "class VectorAdd;\n", 317 | "\n", 318 | "\n", 319 | "int main() {\n", 320 | "\n", 321 | " // Set up three vectors and fill two with random values.\n", 322 | " std::vector vec_a(kSize), vec_b(kSize), vec_r(kSize);\n", 323 | " for (int i = 0; i < kSize; i++) {\n", 324 | " vec_a[i] = rand();\n", 325 | " vec_b[i] = rand();\n", 326 | " }\n", 327 | "\n", 328 | " \n", 329 | " //!!!!!!!!!!!!!Look here 1\n", 330 | " // Select either:\n", 331 | " // - the FPGA emulator device (CPU emulation of the FPGA)\n", 332 | " // - the FPGA device (a real FPGA)\n", 333 | "#if defined(FPGA_EMULATOR)\n", 334 | " ext::intel::fpga_emulator_selector device_selector;\n", 335 | "#else\n", 336 | " ext::intel::fpga_selector device_selector;\n", 337 | "#endif\n", 338 | "\n", 339 | " try {\n", 340 | "\n", 341 | " // Create a queue bound to the chosen device.\n", 342 | " // If the device is unavailable, a SYCL runtime exception is thrown.\n", 343 | " queue q(device_selector, dpc_common::exception_handler);\n", 344 | "\n", 345 | " // Print out the device information.\n", 346 | " std::cout << \"Running on device: \"\n", 347 | " << q.get_device().get_info() << \"\\n\";\n", 348 | "\n", 349 | " {\n", 350 | " // Create buffers to share data between host and device.\n", 351 | " // The runtime will copy the necessary data to the FPGA device memory\n", 352 | " // when the kernel is launched.\n", 353 | " buffer buf_a(vec_a);\n", 354 | " buffer buf_b(vec_b);\n", 355 | " buffer buf_r(vec_r);\n", 356 | "\n", 357 | "\n", 358 | " // Submit a command group to the device queue.\n", 359 | " q.submit([&](handler& h) {\n", 360 | "\n", 361 | " // The SYCL runtime uses the accessors to infer data dependencies.\n", 362 | " // A \"read\" accessor must wait for data to be copied to the device\n", 363 | " // before the kernel can start. A \"write no_init\" accessor does not.\n", 364 | " accessor a(buf_a, h, read_only);\n", 365 | " accessor b(buf_b, h, read_only);\n", 366 | " accessor r(buf_r, h, write_only, no_init);\n", 367 | "\n", 368 | " //!!!!!!!!!!!!!Look here 2\n", 369 | " // The kernel uses single_task rather than parallel_for.\n", 370 | " // The task's for loop is executed in pipeline parallel on the FPGA,\n", 371 | " // exploiting the same parallelism as an equivalent parallel_for.\n", 372 | " //\n", 373 | " // The \"kernel_args_restrict\" tells the compiler that a, b, and r\n", 374 | " // do not alias. For a full explanation, see:\n", 375 | " // DPC++FPGA/Tutorials/Features/kernel_args_restrict\n", 376 | " h.single_task([=]() [[intel::kernel_args_restrict]] {\n", 377 | " for (int i = 0; i < kSize; ++i) {\n", 378 | " r[i] = a[i] + b[i];\n", 379 | " }\n", 380 | " });\n", 381 | " });\n", 382 | "\n", 383 | " // The buffer destructor is invoked when the buffers pass out of scope.\n", 384 | " // buf_r's destructor updates the content of vec_r on the host.\n", 385 | " }\n", 386 | "\n", 387 | " // The queue destructor is invoked when q passes out of scope.\n", 388 | " // q's destructor invokes q's exception handler on any device exceptions.\n", 389 | " }\n", 390 | " catch (sycl::exception const& e) {\n", 391 | " // Catches exceptions in the host code\n", 392 | " std::cerr << \"Caught a SYCL host exception:\\n\" << e.what() << \"\\n\";\n", 393 | "\n", 394 | " // Most likely the runtime couldn't find FPGA hardware!\n", 395 | " if (e.code().value() == CL_DEVICE_NOT_FOUND) {\n", 396 | " std::cerr << \"If you are targeting an FPGA, please ensure that your \"\n", 397 | " \"system has a correctly configured FPGA board.\\n\";\n", 398 | " std::cerr << \"Run sys_check in the oneAPI root directory to verify.\\n\";\n", 399 | " std::cerr << \"If you are targeting the FPGA emulator, compile with \"\n", 400 | " \"-DFPGA_EMULATOR.\\n\";\n", 401 | " }\n", 402 | " std::terminate();\n", 403 | " }\n", 404 | "\n", 405 | " // Check the results.\n", 406 | " int correct = 0;\n", 407 | " for (int i = 0; i < kSize; i++) {\n", 408 | " if ( vec_r[i] == vec_a[i] + vec_b[i] ) {\n", 409 | " correct++;\n", 410 | " }\n", 411 | " }\n", 412 | "\n", 413 | " // Summarize and return.\n", 414 | " if (correct == kSize) {\n", 415 | " std::cout << \"PASSED: results are correct\\n\";\n", 416 | " } else {\n", 417 | " std::cout << \"FAILED: results are incorrect\\n\";\n", 418 | " }\n", 419 | "\n", 420 | " return !(correct == kSize);\n", 421 | "}" 422 | ] 423 | }, 424 | { 425 | "cell_type": "markdown", 426 | "metadata": {}, 427 | "source": [ 428 | "__Now, we will compile the code using the fpga_emulator_selector.__" 429 | ] 430 | }, 431 | { 432 | "cell_type": "code", 433 | "execution_count": 2, 434 | "metadata": {}, 435 | "outputs": [ 436 | { 437 | "name": "stdout", 438 | "output_type": "stream", 439 | "text": [ 440 | "The emulation compile is finished.\n" 441 | ] 442 | } 443 | ], 444 | "source": [ 445 | "! dpcpp -fintelfpga -DFPGA_EMULATOR lab/fpga_compile.cpp -o bin/fpga_compile.emu\n", 446 | "! echo \"The emulation compile is finished.\"" 447 | ] 448 | }, 449 | { 450 | "cell_type": "code", 451 | "execution_count": 3, 452 | "metadata": {}, 453 | "outputs": [ 454 | { 455 | "name": "stdout", 456 | "output_type": "stream", 457 | "text": [ 458 | "Running on device: Intel(R) FPGA Emulation Device\n", 459 | "PASSED: results are correct\n" 460 | ] 461 | } 462 | ], 463 | "source": [ 464 | "! bin/fpga_compile.emu" 465 | ] 466 | }, 467 | { 468 | "cell_type": "markdown", 469 | "metadata": {}, 470 | "source": [ 471 | "__You should have seen output that looked like the below:__\n", 472 | "\n", 473 | "Running on device: Intel(R) FPGA Emulation Device
\n", 474 | "PASSED: results are correct\n", 475 | "\n", 476 | "Keep in mind, this was just running on the x86 host as an emulator. No FPGA was used, which is why we did not have to login to a special node on the DevCloud with an FPGA card, and also why it compiled so quickly.\n", 477 | "\n", 478 | "__It's always useful to see what happens when things don't go perfectly.__\n", 479 | "\n", 480 | "When you have time, go back to the code you just executed and introduce a syntax error (or a few). Then, click ▶ for the section of the notebook with the code, and ▶ for the section of the notebook to compile and execute the code with the FPGA emulator.\n", 481 | "\n", 482 | "__You can see how fast and easy emulating your code is!__\n", 483 | "\n", 484 | "That was fast, like the software compiles most software developers are used to! This fast compile and execution are why you stay at this stage until your code is functional. (ie - You're getting the correct answers from your code!)" 485 | ] 486 | }, 487 | { 488 | "cell_type": "markdown", 489 | "metadata": {}, 490 | "source": [ 491 | "***\n", 492 | "## Stage 2: Optimization Report Generation\n", 493 | "__Minutes of Compilation__\n", 494 | "\n", 495 | "\n", 496 | "\n", 497 | "In this next section of the lab, you will compile the kernel using command line options to create an optimization report.\n", 498 | "\n", 499 | "The optimization report is an HTML report that will be quickly generated, and give you information to guide your optimization efforts.\n", 500 | "\n", 501 | "More specifically, the report will provide information to\n", 502 | "* Identify any memory, performance, data-flow bottlenecks in their design\n", 503 | "* Receive suggestions for optimization techniques to resolve said bottlenecks\n", 504 | "* Get area and timing estimates of their designs for the desired FPGA\n", 505 | "\n", 506 | "For this part of the lab, we'll need to work with a more complicated piece of code to demonstrate the usefulness of the optimization report. A very high-level explanation of what the code is doing is explained below. If you'd like to learn more, you can download read this document. Or, you can just simply think of this as a convenient piece of code at the correct difficulty level to demonstrate optimization.\n", 507 | "\n", 508 | "The Hough Transform is a computer algorithm that transforms pixels into votes for lines. It is used as a step in edge detection.\n", 509 | "\n", 510 | "**Image**\n", 511 | "\n", 512 | "\n", 513 | "\n", 514 | "**Line Votes**\n", 515 | "\n", 516 | "\n", 517 | "\n", 518 | "The command to compile to an early image with an optimization report output is shown below.\n", 519 | "\n", 520 | "\n", 521 | "\n", 522 | "__Now, let's try it.__\n", 523 | "\n", 524 | "__First, write the program to a file.__" 525 | ] 526 | }, 527 | { 528 | "cell_type": "code", 529 | "execution_count": 4, 530 | "metadata": {}, 531 | "outputs": [ 532 | { 533 | "name": "stdout", 534 | "output_type": "stream", 535 | "text": [ 536 | "Overwriting lab/hough_transform.cpp\n" 537 | ] 538 | } 539 | ], 540 | "source": [ 541 | "%%writefile lab/hough_transform.cpp\n", 542 | "//==============================================================\n", 543 | "// Copyright © 2021 Intel Corporation\n", 544 | "//\n", 545 | "// SPDX-License-Identifier: MIT\n", 546 | "// =============================================================\n", 547 | "\n", 548 | "#include \n", 549 | "#include \n", 550 | "#include \n", 551 | "#include \n", 552 | "#include \n", 553 | "\n", 554 | "// This file defines the sin and cos values for each degree up to 180\n", 555 | "#include \"sin_cos_values.h\"\n", 556 | "\n", 557 | "#define WIDTH 180\n", 558 | "#define HEIGHT 120\n", 559 | "#define IMAGE_SIZE WIDTH*HEIGHT\n", 560 | "#define THETAS 180\n", 561 | "#define RHOS 217 //Size of the image diagonally: (sqrt(180^2+120^2))\n", 562 | "#define NS (1000000000.0) // number of nanoseconds in a second\n", 563 | "\n", 564 | "using namespace std;\n", 565 | "using namespace sycl;\n", 566 | "\n", 567 | "// This function reads in a bitmap and outputs an array of pixels\n", 568 | "void read_image(char *image_array);\n", 569 | "\n", 570 | "class Hough_Transform_kernel;\n", 571 | "\n", 572 | "int main() {\n", 573 | "\n", 574 | " //Declare arrays\n", 575 | " char pixels[IMAGE_SIZE];\n", 576 | " short accumulators[THETAS*RHOS*2];\n", 577 | "\n", 578 | " //Initialize the accumulators\n", 579 | " fill(accumulators, accumulators + THETAS*RHOS*2, 0);\n", 580 | "\n", 581 | " //Read bitmap\n", 582 | " //Read in the bitmap file and get a vector of pixels\n", 583 | " read_image(pixels);\n", 584 | "\n", 585 | " //Block off this code\n", 586 | " //Putting all SYCL work within here ensures it concludes before this block\n", 587 | " // goes out of scope. Destruction of the buffers is blocking until the\n", 588 | " // host retrieves data from the buffer.\n", 589 | " {\n", 590 | " //Profiling setup\n", 591 | " //Set things up for profiling at the host\n", 592 | " chrono::high_resolution_clock::time_point t1_host, t2_host;\n", 593 | " event queue_event;\n", 594 | " cl_ulong t1_kernel, t2_kernel;\n", 595 | " double time_kernel;\n", 596 | " auto property_list = sycl::property_list{sycl::property::queue::enable_profiling()};\n", 597 | "\n", 598 | " //Buffer setup\n", 599 | " //Define the sizes of the buffers\n", 600 | " //The sycl buffer creation expects a type of sycl:: range for the size\n", 601 | " range<1> num_pixels{IMAGE_SIZE};\n", 602 | " range<1> num_accumulators{THETAS*RHOS*2};\n", 603 | " range<1> num_table_values{180};\n", 604 | "\n", 605 | " //Create the buffers which will pass data between the host and FPGA\n", 606 | " sycl::buffer pixels_buf(pixels, num_pixels);\n", 607 | " sycl::buffer accumulators_buf(accumulators,num_accumulators);\n", 608 | " sycl::buffer sin_table_buf(sinvals,num_table_values);\n", 609 | " sycl::buffer cos_table_buf(cosvals,num_table_values);\n", 610 | " \n", 611 | " //Device selection\n", 612 | " //We will explicitly compile for the FPGA_EMULATOR, CPU_HOST, or FPGA\n", 613 | " #if defined(FPGA_EMULATOR)\n", 614 | " ext::intel::fpga_emulator_selector device_selector;\n", 615 | " #else\n", 616 | " ext::intel::fpga_selector device_selector;\n", 617 | " #endif\n", 618 | "\n", 619 | " //Create queue\n", 620 | " sycl::queue device_queue(device_selector,NULL,property_list);\n", 621 | " \n", 622 | " //Query platform and device\n", 623 | " sycl::platform platform = device_queue.get_context().get_platform();\n", 624 | " sycl::device device = device_queue.get_device();\n", 625 | " std::cout << \"Platform name: \" << platform.get_info().c_str() << std::endl;\n", 626 | " std::cout << \"Device name: \" << device.get_info().c_str() << std::endl;\n", 627 | "\n", 628 | " //Device queue submit\n", 629 | " queue_event = device_queue.submit([&](sycl::handler &cgh) {\n", 630 | " //Uncomment if you need to output to the screen within your kernel\n", 631 | " //sycl::stream os(1024,128,cgh);\n", 632 | " //Example of how to output to the screen\n", 633 | " //os<<\"Hello world \"<<8+5<(cgh);\n", 637 | " auto _sin_table = sin_table_buf.get_access(cgh);\n", 638 | " auto _cos_table = cos_table_buf.get_access(cgh);\n", 639 | " auto _accumulators = accumulators_buf.get_access(cgh);\n", 640 | "\n", 641 | " //Call the kernel\n", 642 | " cgh.single_task([=]() [[intel::kernel_args_restrict]] {\n", 643 | " for (uint y=0; y();\n", 667 | " t2_kernel = queue_event.get_profiling_info();\n", 668 | " time_kernel = (t2_kernel - t1_kernel) / NS;\n", 669 | " std::cout << \"Kernel execution time: \" << time_kernel << \" seconds\" << std::endl;\n", 670 | " }\n", 671 | "\n", 672 | " //Test the results against the golden results\n", 673 | " ifstream myFile;\n", 674 | " myFile.open(\"golden_check_file.txt\",ifstream::in);\n", 675 | " ofstream checkFile;\n", 676 | " checkFile.open(\"compare_results.txt\",ofstream::out);\n", 677 | " vector myList;\n", 678 | "\n", 679 | " int number;\n", 680 | " while (myFile >> number) {\n", 681 | " myList.push_back(number);\n", 682 | " }\n", 683 | "\n", 684 | " bool failed = false;\n", 685 | " for (int i=0; iaccumulators[i]+1) || (myList[i](&im[i]),sizeof(PIXEL));\n", 730 | "\n", 731 | " //The image is black and white (passed through a Sobel filter already)\n", 732 | " //Store 1 in the array for a white pixel, 0 for a black pixel\n", 733 | " if (im[i].r==0 && im[i].g==0 && im[i].b==0) {\n", 734 | " image_array[i] = 0;\n", 735 | " } else {\n", 736 | " image_array[i] = 1;\n", 737 | " }\n", 738 | "\n", 739 | " }\n", 740 | "\n", 741 | "}" 742 | ] 743 | }, 744 | { 745 | "cell_type": "markdown", 746 | "metadata": {}, 747 | "source": [ 748 | "__Now, we'll run the command to compile to an early image and take a look at the resulting optimization report.__\n", 749 | "\n", 750 | "__This compilation takes a couple of minutes.__" 751 | ] 752 | }, 753 | { 754 | "cell_type": "code", 755 | "execution_count": 5, 756 | "metadata": {}, 757 | "outputs": [ 758 | { 759 | "name": "stdout", 760 | "output_type": "stream", 761 | "text": [ 762 | "The compile is finished.\n" 763 | ] 764 | } 765 | ], 766 | "source": [ 767 | "! dpcpp -fintelfpga lab/hough_transform.cpp -fsycl-link=early -Xshardware -o bin/hough_transform.a\n", 768 | "! echo \"The compile is finished.\"" 769 | ] 770 | }, 771 | { 772 | "cell_type": "markdown", 773 | "metadata": {}, 774 | "source": [ 775 | "__When you see \"The compile is finished.\" above, an optimization report file will have been generated for the code.__\n", 776 | "\n", 777 | "__Run the following command to zip the optimization report so you can look at it locally.__\n", 778 | "__Important note: The optimization reports will show up as empty in the JupyterLab environment. They must be looked at locally.__" 779 | ] 780 | }, 781 | { 782 | "cell_type": "code", 783 | "execution_count": 6, 784 | "metadata": {}, 785 | "outputs": [ 786 | { 787 | "name": "stdout", 788 | "output_type": "stream", 789 | "text": [ 790 | "The zipped report file will appear in the file browser pane.\n" 791 | ] 792 | } 793 | ], 794 | "source": [ 795 | "! cd bin/hough_transform.prj; zip -r ../../report.zip reports > /dev/null\n", 796 | "! echo \"The zipped report file will appear in the file browser pane.\"" 797 | ] 798 | }, 799 | { 800 | "cell_type": "markdown", 801 | "metadata": {}, 802 | "source": [ 803 | "__Now, let's examine that report file.__\n", 804 | "\n", 805 | "Within the Jupyter Lab environment, you will see a file browser pane on the left side. Right-click the file report.zip and select download.\n", 806 | "\n", 807 | "On your local machine, put the report.zip file in a working directory, and unzip it. Then, double-click on the file report.html.\n", 808 | "\n", 809 | "It should look like the picture shown below.\n", 810 | "\n", 811 | "\n", 812 | "\n", 813 | "In the report, navigate to the **Loops Analysis** section of the report by pulling down the **Throughput Analysis** menu at the top. Select Hough_Transform_kernel.B1 in the menu at the left.\n", 814 | "\n", 815 | "You will see a matrix of metrics relating to the performance of your loops. II, which stands for initiation interval, is a measure corresponding to how often the pipeline built from your loop can be fed new data. Or, in other words, how often a new iteration of your loop can be launched. This metric is like golf, a low number is good, and 1 is the best you can do. Notice the number is 233. That is a very bad number, and something you will want to optimize if this is a loop that gets executed many times in your code. (In this particular piece of code, this loop is executed many times.)\n", 816 | "\n", 817 | "\n", 818 | "\n", 819 | "__We won't go deeply into the optimization technique here (Shameless plug: take one of our free workshops to learn more about optimization when targetting FPGAs!), but moving the operation from operating on an accessor to a buffer to working on an array which gets implemented as on-chip memory in the FPGA will greatly improve this situation. Let's compile that improved code now and re-examine the report.__\n", 820 | "\n", 821 | "This compile will take a couple of minutes." 822 | ] 823 | }, 824 | { 825 | "cell_type": "code", 826 | "execution_count": 19, 827 | "metadata": {}, 828 | "outputs": [ 829 | { 830 | "name": "stdout", 831 | "output_type": "stream", 832 | "text": [ 833 | "The compile is finished.\n" 834 | ] 835 | } 836 | ], 837 | "source": [ 838 | "! dpcpp -fintelfpga lab/hough_transform_local_mem.cpp -fsycl-link=early -Xshardware -o bin/hough_transform_local_mem.a\n", 839 | "! echo \"The compile is finished.\"" 840 | ] 841 | }, 842 | { 843 | "cell_type": "markdown", 844 | "metadata": {}, 845 | "source": [ 846 | "__Run the following command to create a zip file that includes the report, like you did before.__" 847 | ] 848 | }, 849 | { 850 | "cell_type": "code", 851 | "execution_count": 8, 852 | "metadata": {}, 853 | "outputs": [ 854 | { 855 | "name": "stdout", 856 | "output_type": "stream", 857 | "text": [ 858 | "The zipped report file will appear in the file browser pane.\n" 859 | ] 860 | } 861 | ], 862 | "source": [ 863 | "! cd bin/hough_transform_local_mem.prj; zip -r ../../report_improved.zip reports > /dev/null\n", 864 | "! echo \"The zipped report file will appear in the file browser pane.\"" 865 | ] 866 | }, 867 | { 868 | "cell_type": "markdown", 869 | "metadata": {}, 870 | "source": [ 871 | "__Open up the report locally like you did before, and browse to the Loops Analysis section.__\n", 872 | "\n", 873 | "The II metrics have gone down considerably. Our highest is now just 2 clock cycles. Much better! Can you do more to improve the kernel performance? (Yes! And shameless plug :) Attend a free workshop to learn more!)\n", 874 | "\n", 875 | "The report is shown in the screenshot below.\n", 876 | "\n", 877 | "" 878 | ] 879 | }, 880 | { 881 | "cell_type": "markdown", 882 | "metadata": {}, 883 | "source": [ 884 | "***\n", 885 | "## Stage 3: Full Compile\n", 886 | "\n", 887 | "**Hours of compilation**\n", 888 | "\n", 889 | "\n", 890 | "\n", 891 | "The next step is to do a full compile of your code resulting in an executable that will contain an FPGA bitstream. When run, this executable will execute the portion of code within the kernel scope on the FPGA.\n", 892 | "\n", 893 | "During this stage, you can\n", 894 | "* Compile an FPGA bitstream for your design and run it on an FPGA\n", 895 | "* Attain automated timing closure\n", 896 | "* Obtain In-hardware verification\n", 897 | "* Take advantage of Intel® VTune™ Profiler for real-time analysis of design.\n", 898 | "\n", 899 | "The command to run this stage of the compilation is shown below.\n", 900 | "\n", 901 | "\n", 902 | "\n", 903 | "Full compiles on the DevCloud must be done on nodes with the fpga_compile attribute. The command to do this is done below.\n", 904 | "\n", 905 | "The build_fpga_hw_s10.sh script contains the command shown above within it. The qsub command is used to submit the job to the work queue of the DevCloud.\n", 906 | "\n", 907 | "To learn more about running on the DevCloud including the types of nodes and more about the qsub command, see the Hello World! tutorial at this link.\n", 908 | "\n", 909 | "__This command will take a few hours to run.__\n", 910 | "
\n", 911 | "When you execute the cell below, it will give you a job ID as output." 912 | ] 913 | }, 914 | { 915 | "cell_type": "code", 916 | "execution_count": 2, 917 | "metadata": {}, 918 | "outputs": [ 919 | { 920 | "name": "stdout", 921 | "output_type": "stream", 922 | "text": [ 923 | "2076830.v-qsvr-1.aidevcloud\n" 924 | ] 925 | } 926 | ], 927 | "source": [ 928 | "! qsub -l nodes=1:fpga_compile:ppn=2 -l walltime=24:00:00 -d . build_fpga_hw_a10.sh" 929 | ] 930 | }, 931 | { 932 | "cell_type": "markdown", 933 | "metadata": {}, 934 | "source": [ 935 | "__To check the status of the compilation kicked off above while it is running, execute the cell below.__
\n", 936 | "When you execute the cell below, if you still see the job ID from the last code cell in the list, the job is still executing. If it is missing, the job is done.
\n", 937 | "Check the files build_fpga_hw_s10.sh.o(job ID) and build_fpga_hw_s10.sh.e(job ID) to assess any errors that might occur." 938 | ] 939 | }, 940 | { 941 | "cell_type": "code", 942 | "execution_count": 6, 943 | "metadata": {}, 944 | "outputs": [ 945 | { 946 | "name": "stdout", 947 | "output_type": "stream", 948 | "text": [ 949 | "\n", 950 | "v-qsvr-1.aidevcloud: \n", 951 | " Req'd Req'd Elap\n", 952 | "Job ID Username Queue Jobname SessID NDS TSK Memory Time S Time\n", 953 | "----------------------- ----------- -------- ---------------- ------ ----- ------ --------- --------- - ---------\n", 954 | "2076826.v-qsvr-1.aidev u174795 jupyterh jupyterhub-singl 101465 1 1 94gb 04:02:00 R 01:17:57 s001-n004/0\n" 955 | ] 956 | } 957 | ], 958 | "source": [ 959 | "! qstat -n -1" 960 | ] 961 | }, 962 | { 963 | "cell_type": "markdown", 964 | "metadata": {}, 965 | "source": [ 966 | "## Now it's time to run the kernel on the FPGA!\n", 967 | "\n", 968 | "To run on the FPGA, you must run on an fpga_runtime node with the correct board. Since the code was compiled using the default board, which is a board containing an Stratix 10 FPGA, we choose a Stratix10 board.\n", 969 | "\n", 970 | "Since the code was compiled with the -Xsprofile switch, you can profile it using VTune. Read more about using VTune with FPGA in the Intel® oneAPI DPC++ FPGA Optimization Guide.\n", 971 | "\n", 972 | "__The command below will cause the compiled code to be run on a host with an FPGA attached, and the code in the kernel scope will run on the FPGA.__\n", 973 | "
The command is submitted to the queue for the node using the qsub command. The shell script being run here simply contains a cd command to the directory, and a call to the executable. When you run the executable, the code in kernel scope is being run on the FPGA with the custom bitstream that was built from your code.
\n", 974 | "When you execute the cell below, it will give you a job ID as output." 975 | ] 976 | }, 977 | { 978 | "cell_type": "code", 979 | "execution_count": null, 980 | "metadata": {}, 981 | "outputs": [], 982 | "source": [ 983 | "! qsub -l nodes=1:fpga_runtime:arria10:ppn=2 -d . run_fpga_hw_a10.sh" 984 | ] 985 | }, 986 | { 987 | "cell_type": "markdown", 988 | "metadata": {}, 989 | "source": [ 990 | "__To check the status of the compilation kicked off above while it is running, execute the cell below.__
\n", 991 | "When you execute the cell below, if you still see the job ID from the last code cell in the list, the job is still executing. If it is missing, the job is done.
\n", 992 | "Check the files build_fpga_hw_s10.sh.o(job ID) and build_fpga_hw_s10.sh.e(job ID) to assess any errors that might occur." 993 | ] 994 | }, 995 | { 996 | "cell_type": "code", 997 | "execution_count": 26, 998 | "metadata": {}, 999 | "outputs": [ 1000 | { 1001 | "name": "stdout", 1002 | "output_type": "stream", 1003 | "text": [ 1004 | "\n", 1005 | "v-qsvr-1.aidevcloud: \n", 1006 | " Req'd Req'd Elap\n", 1007 | "Job ID Username Queue Jobname SessID NDS TSK Memory Time S Time\n", 1008 | "----------------------- ----------- -------- ---------------- ------ ----- ------ --------- --------- - ---------\n", 1009 | "2076826.v-qsvr-1.aidev u174795 jupyterh jupyterhub-singl 101465 1 1 94gb 04:02:00 R 02:14:03 s001-n004/0\n", 1010 | "2076898.v-qsvr-1.aidev u174795 batch STDIN 31398 1 2 -- 35:00:00 R 00:00:17 s001-n081/0-1\n" 1011 | ] 1012 | } 1013 | ], 1014 | "source": [ 1015 | "! qstat -n -1" 1016 | ] 1017 | }, 1018 | { 1019 | "cell_type": "markdown", 1020 | "metadata": {}, 1021 | "source": [ 1022 | "**Congratulations!** You have completed all of the steps to develop using oneAPI with Intel® FPGAs! The sections below are for reference and if you would like to try using a different FPGA board in the future." 1023 | ] 1024 | }, 1025 | { 1026 | "cell_type": "markdown", 1027 | "metadata": {}, 1028 | "source": [ 1029 | "***\n", 1030 | "**Note:** If you would like to compile and run on a card that contains Intel® Stratix 10 FPGA card instead of an Arria 10, you can run the commands below. The first command will take hours to complete. You might have to wait a long time for a Stratix 10 board to be available during the command that runs the run_fpga_hw_s10.sh script." 1031 | ] 1032 | }, 1033 | { 1034 | "cell_type": "code", 1035 | "execution_count": 45, 1036 | "metadata": {}, 1037 | "outputs": [ 1038 | { 1039 | "name": "stdout", 1040 | "output_type": "stream", 1041 | "text": [ 1042 | "2076771.v-qsvr-1.aidevcloud\n" 1043 | ] 1044 | } 1045 | ], 1046 | "source": [ 1047 | "! qsub -l nodes=1:fpga_compile:ppn=2 -l walltime=24:00:00 -d . build_fpga_hw_s10.sh" 1048 | ] 1049 | }, 1050 | { 1051 | "cell_type": "code", 1052 | "execution_count": 7, 1053 | "metadata": {}, 1054 | "outputs": [ 1055 | { 1056 | "name": "stdout", 1057 | "output_type": "stream", 1058 | "text": [ 1059 | "\n", 1060 | "v-qsvr-1.aidevcloud: \n", 1061 | " Req'd Req'd Elap\n", 1062 | "Job ID Username Queue Jobname SessID NDS TSK Memory Time S Time\n", 1063 | "----------------------- ----------- -------- ---------------- ------ ----- ------ --------- --------- - ---------\n", 1064 | "2076826.v-qsvr-1.aidev u174795 jupyterh jupyterhub-singl 101465 1 1 94gb 04:02:00 R 01:22:11 s001-n004/0\n" 1065 | ] 1066 | } 1067 | ], 1068 | "source": [ 1069 | "! qstat -n -1" 1070 | ] 1071 | }, 1072 | { 1073 | "cell_type": "code", 1074 | "execution_count": 16, 1075 | "metadata": {}, 1076 | "outputs": [ 1077 | { 1078 | "name": "stdout", 1079 | "output_type": "stream", 1080 | "text": [ 1081 | "2076895.v-qsvr-1.aidevcloud\n" 1082 | ] 1083 | } 1084 | ], 1085 | "source": [ 1086 | "! qsub -l nodes=1:fpga_runtime:stratix10:ppn=2 -d . run_fpga_hw_s10.sh" 1087 | ] 1088 | }, 1089 | { 1090 | "cell_type": "code", 1091 | "execution_count": 17, 1092 | "metadata": {}, 1093 | "outputs": [ 1094 | { 1095 | "name": "stdout", 1096 | "output_type": "stream", 1097 | "text": [ 1098 | "\n", 1099 | "v-qsvr-1.aidevcloud: \n", 1100 | " Req'd Req'd Elap\n", 1101 | "Job ID Username Queue Jobname SessID NDS TSK Memory Time S Time\n", 1102 | "----------------------- ----------- -------- ---------------- ------ ----- ------ --------- --------- - ---------\n", 1103 | "2076826.v-qsvr-1.aidev u174795 jupyterh jupyterhub-singl 101465 1 1 94gb 04:02:00 R 01:45:33 s001-n004/0\n", 1104 | "2076895.v-qsvr-1.aidev u174795 batch run_fpga_hw_s10. -- 1 2 -- 35:00:00 Q -- -- \n" 1105 | ] 1106 | } 1107 | ], 1108 | "source": [ 1109 | "! qstat -n -1" 1110 | ] 1111 | }, 1112 | { 1113 | "cell_type": "markdown", 1114 | "metadata": {}, 1115 | "source": [ 1116 | "***\n", 1117 | "## To Learn More\n", 1118 | "\n", 1119 | "The next best step in your learning is to work through the tutorials available at our GitHub. These are also available by running the **oneapi-cli** command within a terminal on a host where the Base Toolkit is installed.\n", 1120 | "\n", 1121 | "Use the Samples Navigation Guide to know which tutorials to run as you progress in your learning, and the Intel® oneAPI DPC++ FPGA Optimization Guide to learn about the techniques more deeply." 1122 | ] 1123 | } 1124 | ], 1125 | "metadata": { 1126 | "kernelspec": { 1127 | "display_name": "Python 3 (Intel® oneAPI 2022.3)", 1128 | "language": "python", 1129 | "name": "c009-intel_distribution_of_python_3_oneapi-beta05-python" 1130 | }, 1131 | "language_info": { 1132 | "codemirror_mode": { 1133 | "name": "ipython", 1134 | "version": 3 1135 | }, 1136 | "file_extension": ".py", 1137 | "mimetype": "text/x-python", 1138 | "name": "python", 1139 | "nbconvert_exporter": "python", 1140 | "pygments_lexer": "ipython3", 1141 | "version": "3.9.13" 1142 | }, 1143 | "toc": { 1144 | "base_numbering": 1, 1145 | "nav_menu": {}, 1146 | "number_sections": true, 1147 | "sideBar": true, 1148 | "skip_h1_title": false, 1149 | "title_cell": "Table of Contents", 1150 | "title_sidebar": "Contents", 1151 | "toc_cell": false, 1152 | "toc_position": { 1153 | "height": "525.6px", 1154 | "left": "28px", 1155 | "top": "137.8px", 1156 | "width": "301.109px" 1157 | }, 1158 | "toc_section_display": true, 1159 | "toc_window_display": true 1160 | } 1161 | }, 1162 | "nbformat": 4, 1163 | "nbformat_minor": 4 1164 | } 1165 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/lab/.gitkeep: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/lab/.gitkeep -------------------------------------------------------------------------------- /fpga_oneapi_lab/lab/hough_transform_local_mem.cpp: -------------------------------------------------------------------------------- 1 | //============================================================== 2 | // Copyright © 2021 Intel Corporation 3 | // 4 | // SPDX-License-Identifier: MIT 5 | // ============================================================= 6 | 7 | //#include new header file 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | 14 | // This file defines the sin and cos values for each degree up to 180 15 | #include "sin_cos_values.h" 16 | 17 | #define WIDTH 180 18 | #define HEIGHT 120 19 | #define IMAGE_SIZE WIDTH*HEIGHT 20 | #define THETAS 180 21 | #define RHOS 217 //Size of the image diagonally: (sqrt(180^2+120^2)) 22 | #define NS (1000000000.0) // number of nanoseconds in a second 23 | 24 | using namespace std; 25 | using namespace sycl; 26 | 27 | // This function reads in a bitmap and outputs an array of pixels 28 | void read_image(char *image_array); 29 | 30 | class Hough_Transform_kernel; 31 | 32 | int main() { 33 | 34 | //Declare arrays 35 | char pixels[IMAGE_SIZE]; 36 | short accumulators[THETAS*RHOS*2]; 37 | 38 | //Initialize the accumulators 39 | fill(accumulators, accumulators + THETAS*RHOS*2, 0); 40 | 41 | //Read bitmap 42 | //Read in the bitmap file and get a vector of pixels 43 | read_image(pixels); 44 | 45 | //Block off this code 46 | //Putting all SYCL work within here ensures it concludes before this block 47 | // goes out of scope. Destruction of the buffers is blocking until the 48 | // host retrieves data from the buffer. 49 | { 50 | //Profiling setup 51 | //Set things up for profiling at the host 52 | chrono::high_resolution_clock::time_point t1_host, t2_host; 53 | event queue_event; 54 | cl_ulong t1_kernel, t2_kernel; 55 | double time_kernel; 56 | auto property_list = sycl::property_list{sycl::property::queue::enable_profiling()}; 57 | 58 | //Buffer setup 59 | //Define the sizes of the buffers 60 | //The sycl buffer creation expects a type of sycl:: range for the size 61 | range<1> num_pixels{IMAGE_SIZE}; 62 | range<1> num_accumulators{THETAS*RHOS*2}; 63 | range<1> num_table_values{180}; 64 | 65 | //Create the buffers which will pass data between the host and FPGA 66 | sycl::buffer pixels_buf(pixels, num_pixels); 67 | sycl::buffer accumulators_buf(accumulators,num_accumulators); 68 | sycl::buffer sin_table_buf(sinvals,num_table_values); 69 | sycl::buffer cos_table_buf(cosvals,num_table_values); 70 | 71 | //Device selection 72 | //We will explicitly compile for the FPGA_EMULATOR, CPU_HOST, or FPGA 73 | #if defined(FPGA_EMULATOR) 74 | ext::intel::fpga_emulator_selector device_selector; 75 | #else 76 | ext::intel::fpga_selector device_selector; 77 | #endif 78 | 79 | //Create queue 80 | sycl::queue device_queue(device_selector,NULL,property_list); 81 | 82 | //Query platform and device 83 | sycl::platform platform = device_queue.get_context().get_platform(); 84 | sycl::device device = device_queue.get_device(); 85 | std::cout << "Platform name: " << platform.get_info().c_str() << std::endl; 86 | std::cout << "Device name: " << device.get_info().c_str() << std::endl; 87 | 88 | //Device queue submit 89 | queue_event = device_queue.submit([&](sycl::handler &cgh) { 90 | //Uncomment if you need to output to the screen within your kernel 91 | //sycl::stream os(1024,128,cgh); 92 | //Example of how to output to the screen 93 | //os<<"Hello world "<<8+5<(cgh); 97 | auto _sin_table = sin_table_buf.get_access(cgh); 98 | auto _cos_table = cos_table_buf.get_access(cgh); 99 | auto _accumulators = accumulators_buf.get_access(cgh); 100 | 101 | //Call the kernel 102 | cgh.single_task([=]() [[intel::kernel_args_restrict]] { 103 | 104 | short accum_local[RHOS*2*THETAS]; 105 | 106 | for (int i = 0; i < RHOS*2*THETAS; i++) { 107 | accum_local[i] = 0; 108 | } 109 | 110 | for (uint y=0; y(); 139 | t2_kernel = queue_event.get_profiling_info(); 140 | time_kernel = (t2_kernel - t1_kernel) / NS; 141 | std::cout << "Kernel execution time: " << time_kernel << " seconds" << std::endl; 142 | } 143 | 144 | //Test the results against the golden results 145 | ifstream myFile; 146 | myFile.open("golden_check_file.txt",ifstream::in); 147 | ofstream checkFile; 148 | checkFile.open("compare_results.txt",ofstream::out); 149 | vector myList; 150 | 151 | int number; 152 | while (myFile >> number) { 153 | myList.push_back(number); 154 | } 155 | 156 | bool failed = false; 157 | for (int i=0; iaccumulators[i]+1) || (myList[i](&im[i]),sizeof(PIXEL)); 202 | 203 | //The image is black and white (passed through a Sobel filter already) 204 | //Store 1 in the array for a white pixel, 0 for a black pixel 205 | if (im[i].r==0 && im[i].g==0 && im[i].b==0) { 206 | image_array[i] = 0; 207 | } else { 208 | image_array[i] = 1; 209 | } 210 | 211 | } 212 | 213 | } 214 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/lab/pic.bmp: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/lab/pic.bmp -------------------------------------------------------------------------------- /fpga_oneapi_lab/lab/sin_cos_values.h: -------------------------------------------------------------------------------- 1 | //============================================================== 2 | // Copyright © 2020 Intel Corporation 3 | // 4 | // SPDX-License-Identifier: MIT 5 | // ============================================================= 6 | 7 | static float sinvals[180] = { 8 | 0.00000000, 9 | 0.01745241, 10 | 0.03489950, 11 | 0.05233596, 12 | 0.06975647, 13 | 0.08715574, 14 | 0.10452846, 15 | 0.12186934, 16 | 0.13917311, 17 | 0.15643446, 18 | 0.17364818, 19 | 0.19080900, 20 | 0.20791169, 21 | 0.22495106, 22 | 0.24192190, 23 | 0.25881904, 24 | 0.27563736, 25 | 0.29237169, 26 | 0.30901700, 27 | 0.32556814, 28 | 0.34202015, 29 | 0.35836795, 30 | 0.37460658, 31 | 0.39073113, 32 | 0.40673664, 33 | 0.42261827, 34 | 0.43837115, 35 | 0.45399049, 36 | 0.46947157, 37 | 0.48480961, 38 | 0.50000000, 39 | 0.51503807, 40 | 0.52991927, 41 | 0.54463905, 42 | 0.55919290, 43 | 0.57357645, 44 | 0.58778524, 45 | 0.60181504, 46 | 0.61566150, 47 | 0.62932038, 48 | 0.64278764, 49 | 0.65605903, 50 | 0.66913062, 51 | 0.68199837, 52 | 0.69465840, 53 | 0.70710677, 54 | 0.71933979, 55 | 0.73135370, 56 | 0.74314481, 57 | 0.75470960, 58 | 0.76604444, 59 | 0.77714598, 60 | 0.78801078, 61 | 0.79863548, 62 | 0.80901700, 63 | 0.81915206, 64 | 0.82903755, 65 | 0.83867055, 66 | 0.84804809, 67 | 0.85716730, 68 | 0.86602539, 69 | 0.87461972, 70 | 0.88294756, 71 | 0.89100653, 72 | 0.89879405, 73 | 0.90630776, 74 | 0.91354543, 75 | 0.92050487, 76 | 0.92718387, 77 | 0.93358040, 78 | 0.93969262, 79 | 0.94551855, 80 | 0.95105654, 81 | 0.95630473, 82 | 0.96126169, 83 | 0.96592581, 84 | 0.97029573, 85 | 0.97437006, 86 | 0.97814763, 87 | 0.98162717, 88 | 0.98480773, 89 | 0.98768836, 90 | 0.99026805, 91 | 0.99254614, 92 | 0.99452192, 93 | 0.99619472, 94 | 0.99756408, 95 | 0.99862951, 96 | 0.99939084, 97 | 0.99984771, 98 | 1.00000000, 99 | 0.99984771, 100 | 0.99939084, 101 | 0.99862951, 102 | 0.99756408, 103 | 0.99619472, 104 | 0.99452192, 105 | 0.99254614, 106 | 0.99026805, 107 | 0.98768836, 108 | 0.98480773, 109 | 0.98162717, 110 | 0.97814763, 111 | 0.97437006, 112 | 0.97029573, 113 | 0.96592581, 114 | 0.96126169, 115 | 0.95630473, 116 | 0.95105654, 117 | 0.94551855, 118 | 0.93969262, 119 | 0.93358040, 120 | 0.92718387, 121 | 0.92050487, 122 | 0.91354543, 123 | 0.90630782, 124 | 0.89879405, 125 | 0.89100653, 126 | 0.88294762, 127 | 0.87461972, 128 | 0.86602539, 129 | 0.85716730, 130 | 0.84804809, 131 | 0.83867055, 132 | 0.82903755, 133 | 0.81915206, 134 | 0.80901700, 135 | 0.79863548, 136 | 0.78801078, 137 | 0.77714598, 138 | 0.76604444, 139 | 0.75470960, 140 | 0.74314481, 141 | 0.73135370, 142 | 0.71933979, 143 | 0.70710677, 144 | 0.69465840, 145 | 0.68199837, 146 | 0.66913062, 147 | 0.65605903, 148 | 0.64278764, 149 | 0.62932038, 150 | 0.61566150, 151 | 0.60181504, 152 | 0.58778524, 153 | 0.57357645, 154 | 0.55919290, 155 | 0.54463905, 156 | 0.52991927, 157 | 0.51503807, 158 | 0.50000000, 159 | 0.48480964, 160 | 0.46947157, 161 | 0.45399049, 162 | 0.43837115, 163 | 0.42261827, 164 | 0.40673664, 165 | 0.39073113, 166 | 0.37460661, 167 | 0.35836795, 168 | 0.34202015, 169 | 0.32556817, 170 | 0.30901700, 171 | 0.29237172, 172 | 0.27563736, 173 | 0.25881904, 174 | 0.24192190, 175 | 0.22495106, 176 | 0.20791170, 177 | 0.19080900, 178 | 0.17364818, 179 | 0.15643446, 180 | 0.13917311, 181 | 0.12186935, 182 | 0.10452846, 183 | 0.08715574, 184 | 0.06975648, 185 | 0.05233596, 186 | 0.03489950, 187 | 0.01745241, 188 | }; 189 | 190 | static float cosvals[180] = { 191 | 1.00000000, 192 | 0.99984771, 193 | 0.99939084, 194 | 0.99862951, 195 | 0.99756408, 196 | 0.99619472, 197 | 0.99452192, 198 | 0.99254614, 199 | 0.99026805, 200 | 0.98768836, 201 | 0.98480773, 202 | 0.98162717, 203 | 0.97814763, 204 | 0.97437006, 205 | 0.97029573, 206 | 0.96592581, 207 | 0.96126169, 208 | 0.95630473, 209 | 0.95105654, 210 | 0.94551855, 211 | 0.93969262, 212 | 0.93358040, 213 | 0.92718387, 214 | 0.92050487, 215 | 0.91354543, 216 | 0.90630782, 217 | 0.89879405, 218 | 0.89100653, 219 | 0.88294756, 220 | 0.87461972, 221 | 0.86602539, 222 | 0.85716730, 223 | 0.84804809, 224 | 0.83867055, 225 | 0.82903755, 226 | 0.81915206, 227 | 0.80901700, 228 | 0.79863548, 229 | 0.78801078, 230 | 0.77714598, 231 | 0.76604444, 232 | 0.75470960, 233 | 0.74314481, 234 | 0.73135370, 235 | 0.71933979, 236 | 0.70710677, 237 | 0.69465840, 238 | 0.68199837, 239 | 0.66913062, 240 | 0.65605903, 241 | 0.64278764, 242 | 0.62932038, 243 | 0.61566150, 244 | 0.60181504, 245 | 0.58778524, 246 | 0.57357645, 247 | 0.55919290, 248 | 0.54463905, 249 | 0.52991927, 250 | 0.51503807, 251 | 0.50000000, 252 | 0.48480961, 253 | 0.46947157, 254 | 0.45399049, 255 | 0.43837115, 256 | 0.42261827, 257 | 0.40673664, 258 | 0.39073113, 259 | 0.37460661, 260 | 0.35836795, 261 | 0.34202015, 262 | 0.32556817, 263 | 0.30901700, 264 | 0.29237172, 265 | 0.27563736, 266 | 0.25881904, 267 | 0.24192190, 268 | 0.22495106, 269 | 0.20791169, 270 | 0.19080900, 271 | 0.17364818, 272 | 0.15643446, 273 | 0.13917311, 274 | 0.12186935, 275 | 0.10452846, 276 | 0.08715574, 277 | 0.06975648, 278 | 0.05233596, 279 | 0.03489950, 280 | 0.01745241, 281 | 0.00000000, 282 | -0.01745240, 283 | -0.03489950, 284 | -0.05233596, 285 | -0.06975647, 286 | -0.08715574, 287 | -0.10452846, 288 | -0.12186934, 289 | -0.13917311, 290 | -0.15643446, 291 | -0.17364818, 292 | -0.19080900, 293 | -0.20791169, 294 | -0.22495106, 295 | -0.24192189, 296 | -0.25881904, 297 | -0.27563736, 298 | -0.29237169, 299 | -0.30901700, 300 | -0.32556814, 301 | -0.34202015, 302 | -0.35836795, 303 | -0.37460658, 304 | -0.39073113, 305 | -0.40673664, 306 | -0.42261827, 307 | -0.43837115, 308 | -0.45399049, 309 | -0.46947157, 310 | -0.48480961, 311 | -0.50000000, 312 | -0.51503807, 313 | -0.52991927, 314 | -0.54463905, 315 | -0.55919290, 316 | -0.57357645, 317 | -0.58778524, 318 | -0.60181504, 319 | -0.61566150, 320 | -0.62932038, 321 | -0.64278764, 322 | -0.65605903, 323 | -0.66913062, 324 | -0.68199837, 325 | -0.69465834, 326 | -0.70710677, 327 | -0.71933979, 328 | -0.73135370, 329 | -0.74314481, 330 | -0.75470960, 331 | -0.76604444, 332 | -0.77714598, 333 | -0.78801078, 334 | -0.79863548, 335 | -0.80901700, 336 | -0.81915206, 337 | -0.82903755, 338 | -0.83867055, 339 | -0.84804809, 340 | -0.85716730, 341 | -0.86602539, 342 | -0.87461972, 343 | -0.88294756, 344 | -0.89100653, 345 | -0.89879405, 346 | -0.90630776, 347 | -0.91354543, 348 | -0.92050487, 349 | -0.92718387, 350 | -0.93358040, 351 | -0.93969262, 352 | -0.94551855, 353 | -0.95105654, 354 | -0.95630473, 355 | -0.96126169, 356 | -0.96592581, 357 | -0.97029573, 358 | -0.97437006, 359 | -0.97814763, 360 | -0.98162717, 361 | -0.98480773, 362 | -0.98768836, 363 | -0.99026805, 364 | -0.99254614, 365 | -0.99452192, 366 | -0.99619472, 367 | -0.99756408, 368 | -0.99862951, 369 | -0.99939084, 370 | -0.9998477, 371 | }; 372 | 373 | 374 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/profile.sh: -------------------------------------------------------------------------------- 1 | # .bash_profile 2 | 3 | # Get the aliases and functions 4 | if [ -f ~/.bashrc ]; then 5 | . ~/.bashrc 6 | fi 7 | 8 | # User specific environment and startup programs 9 | export PATH=$PATH:$HOME/.local/bin:$HOME/bin 10 | 11 | # Enable Intel tools 12 | export INTEL_LICENSE_FILE=/usr/local/licenseserver/psxe.lic 13 | export PATH=/glob/intel-python/python3/bin/:/glob/intel-python/python2/bin/:${PATH} 14 | source /glob/development-tools/parallel-studio/bin/compilervars.sh intel64 15 | export PATH=$PATH:/bin 16 | if [ -d /opt/intel/inteloneapi ]; then source /opt/intel/inteloneapi/setvars.sh > /dev/null 2>&1; fi 17 | 18 | # Make sure that most programs (in particular, pip) leave temp files locally 19 | if [ ! -d ${HOME}/tmp ]; then 20 | mkdir ${HOME}/tmp 21 | fi 22 | export TMPDIR=${HOME}/tmp 23 | #export PBS_DEFAULT=v-qsvr-nda -------------------------------------------------------------------------------- /fpga_oneapi_lab/readme_pics/browse_to_lab.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/readme_pics/browse_to_lab.png -------------------------------------------------------------------------------- /fpga_oneapi_lab/readme_pics/click_plus.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/readme_pics/click_plus.png -------------------------------------------------------------------------------- /fpga_oneapi_lab/readme_pics/launch_notebook.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/readme_pics/launch_notebook.png -------------------------------------------------------------------------------- /fpga_oneapi_lab/readme_pics/launch_terminal.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/readme_pics/launch_terminal.png -------------------------------------------------------------------------------- /fpga_oneapi_lab/readme_pics/start_jupyter.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/fpga-training/604fa9210c2d949325ccb823d190d11e8f7edde1/fpga_oneapi_lab/readme_pics/start_jupyter.png -------------------------------------------------------------------------------- /fpga_oneapi_lab/run_fpga_hw_a10.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | export PATH=/glob/intel-python/python3/bin/:/glob/intel-python/python2/bin/:${PATH} 3 | source /opt/intel/oneapi/setvars.sh > /dev/null 2>&1 4 | echo $HOSTNAME 5 | cd bin 6 | aocl initialize acl0 pac_a10 7 | ./hough_transform_local_mem.fpga 8 | -------------------------------------------------------------------------------- /fpga_oneapi_lab/run_fpga_hw_s10.sh: -------------------------------------------------------------------------------- 1 | #!/bin/bash 2 | export PATH=/glob/intel-python/python3/bin/:/glob/intel-python/python2/bin/:${PATH} 3 | source /opt/intel/oneapi/setvars.sh > /dev/null 2>&1 4 | cd bin_s10 5 | aocl initialize acl0 pac_s10 6 | ./hough_transform_local_mem.fpga --------------------------------------------------------------------------------