├── igzip ├── flatten_ll.h ├── igzip_decode_block_stateless_01.asm ├── igzip_decode_block_stateless_04.asm ├── igzip_update_histogram_01.asm ├── igzip_update_histogram_04.asm ├── igzip_checksums.h ├── igzip_build_hash_table_perf.c ├── encode_df.c ├── flatten_ll.c ├── encode_df.h ├── igzip_level_buf_structs.h ├── aarch64 │ ├── igzip_inflate_multibinary_arm64.S │ ├── stdmac_aarch64.h │ ├── igzip_multibinary_arm64.S │ ├── bitbuf2_aarch64.h │ └── options_aarch64.h ├── riscv64 │ ├── Makefile.am │ └── igzip_multibinary_riscv64_dispatcher.c ├── shim │ ├── shim_inflate.h │ └── README.md ├── igzip_inflate_multibinary.asm ├── igzip_wrapper.h ├── bitbuf2.asm ├── adler32_base.c └── options.asm ├── tools ├── remove_trailing_whitespace.sh ├── test_tools.sh ├── nasm-filter.sh ├── format.sh └── test_autorun.sh ├── cmake ├── ISALConfig.cmake.in └── isa-l.h.in ├── .clang-format-ignore ├── tests └── fuzz │ ├── Makefile.unx │ ├── igzip_simple_inflate_fuzz_test.c │ ├── igzip_dump_inflate_corpus.c │ ├── igzip_fuzz_inflate.c │ └── Makefile.am ├── libisal.pc.in ├── include ├── aarch64_label.h └── mem_routines.h ├── examples ├── crc │ └── Makefile └── ec │ ├── Makefile │ └── Makefile.am ├── SECURITY.md ├── autogen.sh ├── .gitignore ├── erasure_code ├── ppc64le │ ├── Makefile.am │ ├── gf_vect_mad_vsx.c │ ├── gf_vect_mul_vsx.c │ └── gf_2vect_mad_vsx.c ├── aarch64 │ └── ec_multibinary_arm.S ├── gf_vect_gfni.inc └── ec_base_aliases.c ├── programs ├── igzip.1.h2m ├── Makefile.am └── igzip.1 ├── MAINTAINERS.md ├── Doxyfile ├── CONTRIBUTING.md ├── LICENSE ├── mem ├── aarch64 │ ├── mem_multibinary_arm.S │ ├── Makefile.am │ └── mem_aarch64_dispatcher.c ├── riscv64 │ ├── Makefile.am │ ├── mem_multibinary_riscv64.S │ ├── mem_multibinary_riscv64_dispatcher.c │ └── mem_zero_detect_rvv.S ├── mem_zero_detect_base_aliases.c ├── mem_multibinary.asm ├── Makefile.am ├── mem_zero_detect_perf.c └── mem_zero_detect_base.c ├── raid ├── aarch64 │ ├── raid_multibinary_arm.S │ └── Makefile.am ├── riscv64 │ ├── Makefile.am │ ├── raid_multibinary_riscv64.S │ └── raid_multibinary_riscv64_dispatcher.c ├── raid_base_aliases.c └── Makefile.am ├── crc ├── aarch64 │ ├── crc64_iso_norm_pmull.S │ ├── crc64_iso_refl_pmull.S │ ├── crc32_gzip_refl_pmull.S │ ├── crc32_ieee_norm_pmull.S │ ├── crc64_ecma_norm_pmull.S │ ├── crc64_ecma_refl_pmull.S │ ├── crc64_jones_norm_pmull.S │ ├── crc64_jones_refl_pmull.S │ ├── crc64_rocksoft_norm_pmull.S │ ├── crc64_rocksoft_refl_pmull.S │ ├── crc_multibinary_arm.S │ ├── crc32_iscsi_refl_pmull.S │ ├── crc32_iscsi_crc_ext.S │ ├── crc32_gzip_refl_crc_ext.S │ ├── Makefile.am │ ├── crc32_mix_neoverse_n1.S │ └── crc32c_mix_neoverse_n1.S ├── crc64_jones_norm_by8.asm ├── crc64_jones_refl_by8.asm ├── crc64_rocksoft_norm_by8.asm ├── crc64_rocksoft_refl_by8.asm ├── crc64_ecma_norm_by8.asm ├── crc64_ecma_refl_by8.asm ├── crc64_ecma_norm_by16_10.asm ├── crc64_ecma_refl_by16_10.asm ├── crc64_jones_norm_by16_10.asm ├── crc64_jones_refl_by16_10.asm ├── crc64_rocksoft_norm_by16_10.asm ├── crc64_rocksoft_refl_by16_10.asm └── crc_simple_test.c ├── .clang-format ├── doc ├── build.md └── test.md ├── .travis.yml └── Makefile.unx /igzip/flatten_ll.h: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | void 4 | flatten_ll(uint32_t *ll_hist); 5 | -------------------------------------------------------------------------------- /tools/remove_trailing_whitespace.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | sed -i -i.bak 's/[[:blank:]]*$//' "$@" 3 | -------------------------------------------------------------------------------- /igzip/igzip_decode_block_stateless_01.asm: -------------------------------------------------------------------------------- 1 | %define ARCH 01 2 | 3 | %include "igzip_decode_block_stateless.asm" 4 | -------------------------------------------------------------------------------- /igzip/igzip_decode_block_stateless_04.asm: -------------------------------------------------------------------------------- 1 | %define ARCH 04 2 | %define USE_HSWNI 3 | 4 | %include "igzip_decode_block_stateless.asm" 5 | -------------------------------------------------------------------------------- /cmake/ISALConfig.cmake.in: -------------------------------------------------------------------------------- 1 | @PACKAGE_INIT@ 2 | 3 | include("${CMAKE_CURRENT_LIST_DIR}/ISALTargets.cmake") 4 | 5 | check_required_components(ISAL) 6 | -------------------------------------------------------------------------------- /.clang-format-ignore: -------------------------------------------------------------------------------- 1 | include/aarch64_multibinary.h 2 | include/aarch64_label.h 3 | **/aarch64/*.h 4 | 5 | include/riscv64_multibinary.h 6 | **/riscv64/*.h 7 | -------------------------------------------------------------------------------- /igzip/igzip_update_histogram_01.asm: -------------------------------------------------------------------------------- 1 | %define ARCH 01 2 | 3 | %ifndef COMPARE_TYPE 4 | %define COMPARE_TYPE 2 5 | %endif 6 | 7 | %include "igzip_update_histogram.asm" 8 | -------------------------------------------------------------------------------- /igzip/igzip_update_histogram_04.asm: -------------------------------------------------------------------------------- 1 | %define ARCH 04 2 | %define USE_HSWNI 3 | 4 | %ifndef COMPARE_TYPE 5 | %define COMPARE_TYPE 3 6 | %endif 7 | 8 | %include "igzip_update_histogram.asm" 9 | -------------------------------------------------------------------------------- /tools/test_tools.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | function test_start() 4 | { 5 | echo "entering test: $1" 6 | } 7 | 8 | function test_end() 9 | { 10 | echo "leaving test: $1 status: $2" 11 | } 12 | -------------------------------------------------------------------------------- /tests/fuzz/Makefile.unx: -------------------------------------------------------------------------------- 1 | 2 | default: llvm_fuzz_tests 3 | 4 | include ../../igzip/Makefile.am 5 | include Makefile.am 6 | include ../../make.inc 7 | 8 | CC = clang 9 | CXX = clang++ 10 | CXXFLAGS += $(DEFINES) 11 | 12 | VPATH = . ../../igzip ../../include 13 | -------------------------------------------------------------------------------- /libisal.pc.in: -------------------------------------------------------------------------------- 1 | prefix=@prefix@ 2 | exec_prefix=@exec_prefix@ 3 | libdir=@libdir@ 4 | includedir=@includedir@ 5 | 6 | Name: libisal 7 | Description: Library for storage systems 8 | Version: @VERSION@ 9 | Libs: -L${libdir} -lisal 10 | Libs.private: 11 | Cflags: -I${includedir} 12 | -------------------------------------------------------------------------------- /igzip/igzip_checksums.h: -------------------------------------------------------------------------------- 1 | #ifndef IGZIP_CHECKSUMS_H 2 | #define IGZIP_CHECKSUMS_H 3 | 4 | #include 5 | 6 | #define MAX_ADLER_BUF (1 << 28) 7 | #define ADLER_MOD 65521 8 | 9 | uint32_t 10 | isal_adler32(uint32_t init_crc, const unsigned char *buf, uint64_t len); 11 | uint32_t 12 | isal_adler32_bam1(uint32_t init_crc, const unsigned char *buf, uint64_t len); 13 | 14 | #endif 15 | -------------------------------------------------------------------------------- /include/aarch64_label.h: -------------------------------------------------------------------------------- 1 | #ifndef __AARCH64_LABEL_H__ 2 | #define __AARCH64_LABEL_H__ 3 | 4 | #ifdef __USER_LABEL_PREFIX__ 5 | #define CONCAT1(a, b) CONCAT2(a, b) 6 | #define CONCAT2(a, b) a ## b 7 | #define cdecl(x) CONCAT1 (__USER_LABEL_PREFIX__, x) 8 | #else 9 | #define cdecl(x) x 10 | #endif 11 | 12 | #ifdef __APPLE__ 13 | #define ASM_DEF_RODATA .section __TEXT,__const 14 | #else 15 | #define ASM_DEF_RODATA .section .rodata 16 | #endif 17 | 18 | #endif 19 | -------------------------------------------------------------------------------- /examples/crc/Makefile: -------------------------------------------------------------------------------- 1 | # Build examples from installed lib 2 | 3 | examples = crc_combine_example 4 | 5 | CFLAGS = -Wall -O2 6 | LDFLAGS = $(shell pkg-config --libs libisal) 7 | 8 | progs = $(notdir $(examples)) 9 | 10 | ex: $(progs) 11 | run: $(addsuffix .run,$(progs)) 12 | 13 | $(progs): % : %.c 14 | $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) 15 | 16 | $(addsuffix .run,$(progs)): %.run : % 17 | ./$< 18 | @echo Completed run: $< 19 | 20 | clean: 21 | $(RM) $(progs) 22 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # ISA-L Security Policy 2 | 3 | ## Report a Vulnerability 4 | 5 | Please report security issues or vulnerabilities to the [Intel Security Center]. 6 | 7 | For more information on how Intel works to resolve security issues, see 8 | [Vulnerability Handling Guidelines]. 9 | 10 | [Intel Security Center]:https://www.intel.com/security 11 | [Vulnerability Handling Guidelines]:https://www.intel.com/content/www/us/en/security-center/vulnerability-handling-guidelines.html 12 | -------------------------------------------------------------------------------- /autogen.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh -e 2 | 3 | autoreconf --install --symlink -f -Wno-obsolete 4 | 5 | libdir() { 6 | echo $(cd $1/$(gcc -print-multi-os-directory); pwd) 7 | } 8 | 9 | args="--prefix=/usr --libdir=$(libdir /usr/lib)" 10 | 11 | echo 12 | echo "----------------------------------------------------------------" 13 | echo "Initialized build system. For a common configuration please run:" 14 | echo "----------------------------------------------------------------" 15 | echo 16 | echo "./configure $args" 17 | echo 18 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | # Objects 2 | *~ 3 | *.o 4 | *.lo 5 | *.so 6 | *.dll 7 | *.exp 8 | *.lib 9 | bin 10 | 11 | # Autobuild 12 | Makefile 13 | Makefile.in 14 | aclocal.m4 15 | autom4te.cache 16 | build-aux 17 | config.* 18 | configure 19 | .deps 20 | .dirstamp 21 | .libs 22 | libtool 23 | 24 | # Generated files 25 | isa-l.h 26 | /libisal.la 27 | libisal.pc 28 | crc/*_perf 29 | crc/*_test 30 | erasure_code/*_perf 31 | erasure_code/*_test 32 | erasure_code/gf_vect_dot_prod_1tbl 33 | igzip/*_perf 34 | igzip/*_test 35 | igzip/shim/build 36 | mem/*_perf 37 | mem/*_test 38 | programs/igzip 39 | raid/*_perf 40 | raid/*_test 41 | -------------------------------------------------------------------------------- /examples/ec/Makefile: -------------------------------------------------------------------------------- 1 | # Build examples from installed lib 2 | 3 | include Makefile.am 4 | 5 | incdir = $(shell pkg-config --variable=includedir libisal) 6 | 7 | CFLAGS += -include $(incdir)/isa-l.h # Add standard header 8 | CFLAGS += -I $(incdir)/isa-l # Add path to remove error 9 | LDFLAGS = $(shell pkg-config --libs libisal) 10 | 11 | progs = $(notdir $(examples)) 12 | 13 | ex: $(progs) 14 | run: $(addsuffix .run,$(progs)) 15 | 16 | $(progs): % : %.c 17 | $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) 18 | 19 | $(addsuffix .run,$(progs)): %.run : % 20 | ./$< 21 | @echo Completed run: $< 22 | 23 | clean: 24 | $(RM) $(progs) 25 | -------------------------------------------------------------------------------- /tests/fuzz/igzip_simple_inflate_fuzz_test.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "igzip_lib.h" 5 | 6 | int 7 | LLVMFuzzerTestOneInput(const uint8_t *data, size_t size) 8 | { 9 | struct inflate_state state; 10 | uint8_t *isal_out_buf = (uint8_t *) (malloc(size * 2)); 11 | size_t out_buf_size = 2 * size; 12 | 13 | isal_inflate_init(&state); 14 | state.next_in = (uint8_t *) data; 15 | state.avail_in = size; 16 | state.next_out = isal_out_buf; 17 | state.avail_out = out_buf_size; 18 | 19 | isal_inflate_stateless(&state); 20 | 21 | free(isal_out_buf); 22 | return 0; 23 | } 24 | -------------------------------------------------------------------------------- /erasure_code/ppc64le/Makefile.am: -------------------------------------------------------------------------------- 1 | lsrc_ppc64le += erasure_code/ppc64le/ec_base_vsx.c \ 2 | erasure_code/ppc64le/gf_vect_mul_vsx.c \ 3 | erasure_code/ppc64le/gf_vect_dot_prod_vsx.c \ 4 | erasure_code/ppc64le/gf_vect_mad_vsx.c \ 5 | erasure_code/ppc64le/gf_2vect_dot_prod_vsx.c \ 6 | erasure_code/ppc64le/gf_2vect_mad_vsx.c \ 7 | erasure_code/ppc64le/gf_3vect_dot_prod_vsx.c \ 8 | erasure_code/ppc64le/gf_3vect_mad_vsx.c \ 9 | erasure_code/ppc64le/gf_4vect_dot_prod_vsx.c \ 10 | erasure_code/ppc64le/gf_4vect_mad_vsx.c \ 11 | erasure_code/ppc64le/gf_5vect_dot_prod_vsx.c \ 12 | erasure_code/ppc64le/gf_5vect_mad_vsx.c \ 13 | erasure_code/ppc64le/gf_6vect_dot_prod_vsx.c \ 14 | erasure_code/ppc64le/gf_6vect_mad_vsx.c 15 | 16 | -------------------------------------------------------------------------------- /cmake/isa-l.h.in: -------------------------------------------------------------------------------- 1 | /** 2 | * @file isa-l.h 3 | * @brief Include for ISA-L library 4 | */ 5 | 6 | #ifndef _ISAL_H_ 7 | #define _ISAL_H_ 8 | 9 | #define ISAL_MAJOR_VERSION @PROJECT_VERSION_MAJOR@ 10 | #define ISAL_MINOR_VERSION @PROJECT_VERSION_MINOR@ 11 | #define ISAL_PATCH_VERSION @PROJECT_VERSION_PATCH@ 12 | #define ISAL_MAKE_VERSION(maj, min, patch) ((maj) * 0x10000 + (min) * 0x100 + (patch)) 13 | #define ISAL_VERSION ISAL_MAKE_VERSION(ISAL_MAJOR_VERSION, ISAL_MINOR_VERSION, ISAL_PATCH_VERSION) 14 | 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include 20 | #include 21 | #include 22 | #include 23 | 24 | #endif //_ISAL_H_ 25 | -------------------------------------------------------------------------------- /programs/igzip.1.h2m: -------------------------------------------------------------------------------- 1 | [Name] 2 | igzip \- compress or decompress files similar to gzip 3 | 4 | [Description] 5 | 6 | Compress or decompress files similar to gzip using the ISA-L fast deflate library. 7 | 8 | Output .gz files are compatible with gzip and [RFC-1952]. 9 | 10 | Options are similar to gzip except --keep is default. 11 | 12 | [Examples] 13 | 14 | Make compressed file1.gz and file2.gz and keep file1 and file2. 15 | .RS 16 | .B igzip file1 file2 17 | .RE 18 | 19 | Piped compression and decompression. 20 | .RS 21 | .B igzip -c file.txt | igzip -d -c - 22 | .RE 23 | 24 | Streaming compression from output of tar, compress level 2. 25 | .RS 26 | .B tar cf - dir1 | igzip -2 > dir1.tar.gz 27 | .RE 28 | 29 | [Reporting Bugs] 30 | 31 | Report bugs to https://github.com/intel/isa-l/issues 32 | -------------------------------------------------------------------------------- /MAINTAINERS.md: -------------------------------------------------------------------------------- 1 | ISA-L Maintainers 2 | ================= 3 | 4 | The intention of this file is to provide a set of names that we can rely on 5 | for assisting with pull requests and questions. 6 | 7 | A pull request targeting architecture optimizations requires the approval 8 | of the maintainer of that architecture.\ 9 | A pull request targeting the base implementation, general API or broader project 10 | changes requires the approval of the general maintainer. 11 | 12 | Descriptions of section entries: 13 | 14 | M: Maintainer's Full Name 15 | 16 | General Project Administration 17 | ------------------------------ 18 | M: Pablo de Lara 19 | 20 | Base Implementations 21 | -------------------- 22 | M: Pablo de Lara 23 | 24 | x86 Architecture 25 | ---------------- 26 | M: Pablo de Lara 27 | 28 | ARM Architecture 29 | ---------------- 30 | M: Liu Qinfei 31 | 32 | RISC-V Architecture 33 | ------------------- 34 | M: Sun Yuechi 35 | -------------------------------------------------------------------------------- /tools/nasm-filter.sh: -------------------------------------------------------------------------------- 1 | #!/bin/sh 2 | 3 | # Filter out unnecessary options added by automake 4 | 5 | while [ -n "$*" ]; do 6 | case "$1" in 7 | -f | -o | -D ) 8 | # Supported options with arg 9 | options="$options $1 $2" 10 | shift 11 | shift 12 | ;; 13 | -I | -i ) 14 | options="$options $1 $2/" 15 | shift 16 | shift 17 | ;; 18 | -isysroot | -iframeworkwithsysroot | -iwithsysroot | -framework | -arch ) 19 | # Unsupported options with arg 20 | shift 21 | shift 22 | ;; 23 | --prefix* ) 24 | # Supported options without arg 25 | options="$options $1" 26 | shift 27 | ;; 28 | -I* | -i* ) 29 | options="$options $1/" 30 | shift 31 | ;; 32 | -D* ) # For defines we need to remove spaces 33 | case "$1" in 34 | *' '* ) ;; 35 | *) options="$options $1" ;; 36 | esac 37 | shift 38 | ;; 39 | #-blah ) 40 | # Unsupported options with args - none known 41 | -* ) 42 | # Unsupported options with no args 43 | shift 44 | ;; 45 | * ) 46 | args="$args $1" 47 | shift 48 | ;; 49 | esac 50 | done 51 | 52 | nasm $options $args 53 | -------------------------------------------------------------------------------- /igzip/igzip_build_hash_table_perf.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include "igzip_lib.h" 7 | #include "test.h" 8 | #include "huff_codes.h" 9 | 10 | #define DICT_LEN 32 * 1024 11 | 12 | extern void 13 | isal_deflate_hash(struct isal_zstream *stream, uint8_t *dict, int dict_len); 14 | 15 | void 16 | create_rand_data(uint8_t *data, uint32_t size) 17 | { 18 | int i; 19 | for (i = 0; i < size; i++) { 20 | data[i] = rand() % 256; 21 | } 22 | } 23 | 24 | int 25 | main(int argc, char *argv[]) 26 | { 27 | int time = BENCHMARK_TIME; 28 | struct isal_zstream stream; 29 | uint8_t dict[DICT_LEN]; 30 | uint32_t dict_len = DICT_LEN; 31 | 32 | stream.level = 0; 33 | stream.internal_state.hash_mask = LVL0_HASH_MASK; 34 | create_rand_data(dict, dict_len); 35 | 36 | struct perf start; 37 | BENCHMARK(&start, time, isal_deflate_hash(&stream, dict, dict_len)); 38 | 39 | printf("igzip_build_hash_table_perf: in_size=%u ", dict_len); 40 | perf_print(start, (long long) dict_len); 41 | 42 | return 0; 43 | } 44 | -------------------------------------------------------------------------------- /tools/format.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | verbose=0 4 | clang_format_min_version=18 5 | 6 | function clang_format_version() { 7 | version_str=$($clang_format --version) 8 | regex="[0-9]+" 9 | if [[ $version_str =~ $regex ]]; then 10 | major_version="${BASH_REMATCH[0]}" 11 | echo $major_version 12 | fi 13 | } 14 | 15 | # set clang-format binary if not set externally 16 | if [[ -z $CLANGFORMAT ]]; then 17 | clang_format="clang-format" 18 | else 19 | clang_format=$CLANGFORMAT 20 | fi 21 | 22 | while [ -n "$*" ]; do 23 | case "$1" in 24 | -v ) 25 | verbose=1 26 | shift 27 | ;; 28 | -h ) 29 | echo format.sh [-h -v] 30 | exit 0 31 | ;; 32 | esac 33 | done 34 | 35 | if [ $(clang_format_version) -ge $clang_format_min_version ]; then 36 | echo "Formatting files using clang-format v$(clang_format_version)..." 37 | for f in `git ls-files '*.[c|h]'`; do 38 | [ "$verbose" -gt 0 ] && echo "formatting $f" 39 | $clang_format -style=file -i "$f" & 40 | done 41 | else 42 | echo "clang-format version ${clang_format_min_version}+ is required!" 43 | fi 44 | 45 | # wait for background processes to finish 46 | wait 47 | -------------------------------------------------------------------------------- /igzip/encode_df.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | 7 | #if __x86_64__ || __i386__ || _M_X64 || _M_IX86 8 | #ifdef _MSC_VER 9 | #include 10 | #else 11 | #include 12 | #endif 13 | #endif //__x86_64__ || __i386__ || _M_X64 || _M_IX86 14 | 15 | #include "encode_df.h" 16 | #include "bitbuf2.h" 17 | 18 | struct deflate_icf * 19 | encode_deflate_icf_base(struct deflate_icf *next_in, struct deflate_icf *end_in, struct BitBuf2 *bb, 20 | struct hufftables_icf *hufftables) 21 | { 22 | struct huff_code lsym, dsym; 23 | 24 | while (next_in < end_in && !is_full(bb)) { 25 | lsym = hufftables->lit_len_table[next_in->lit_len]; 26 | dsym = hufftables->dist_lit_table[next_in->lit_dist]; 27 | 28 | // insert ll code, dist_code, and extra_bits 29 | write_bits_unsafe(bb, lsym.code_and_extra, lsym.length); 30 | write_bits_unsafe(bb, dsym.code, dsym.length); 31 | write_bits_unsafe(bb, next_in->dist_extra, dsym.extra_bit_count); 32 | flush_bits(bb); 33 | 34 | next_in++; 35 | } 36 | 37 | return next_in; 38 | } 39 | -------------------------------------------------------------------------------- /igzip/flatten_ll.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | #include "flatten_ll.h" 6 | 7 | void 8 | flatten_ll(uint32_t *ll_hist) 9 | { 10 | uint32_t i, j; 11 | uint32_t *s = ll_hist, x, *p; 12 | 13 | s[265] += s[266]; 14 | s[266] = s[267] + s[268]; 15 | s[267] = s[269] + s[270]; 16 | s[268] = s[271] + s[272]; 17 | s[269] = s[273] + s[274] + s[275] + s[276]; 18 | s[270] = s[277] + s[278] + s[279] + s[280]; 19 | s[271] = s[281] + s[282] + s[283] + s[284]; 20 | s[272] = s[285] + s[286] + s[287] + s[288]; 21 | p = s + 289; 22 | for (i = 273; i < 277; i++) { 23 | x = *(p++); 24 | for (j = 1; j < 8; j++) 25 | x += *(p++); 26 | s[i] = x; 27 | } 28 | for (; i < 281; i++) { 29 | x = *(p++); 30 | for (j = 1; j < 16; j++) 31 | x += *(p++); 32 | s[i] = x; 33 | } 34 | for (; i < 285; i++) { 35 | x = *(p++); 36 | for (j = 1; j < 32; j++) 37 | x += *(p++); 38 | s[i] = x; 39 | } 40 | s[284] -= s[512]; 41 | s[285] = s[512]; 42 | } 43 | -------------------------------------------------------------------------------- /Doxyfile: -------------------------------------------------------------------------------- 1 | PROJECT_NAME = "Intel Intelligent Storage Acceleration Library" 2 | PROJECT_BRIEF = "ISA-L API reference doc" 3 | 4 | OUTPUT_DIRECTORY = generated_doc 5 | FULL_PATH_NAMES = NO 6 | TAB_SIZE = 8 7 | ALIASES = "requires=\xrefitem requires \"Requires\" \"Instruction Set Requirements for arch-specific functions (non-multibinary)\"" 8 | OPTIMIZE_OUTPUT_FOR_C = YES 9 | HIDE_UNDOC_MEMBERS = YES 10 | USE_MDFILE_AS_MAINPAGE = README.md 11 | 12 | INPUT = isa-l.h \ 13 | include \ 14 | README.md \ 15 | CONTRIBUTING.md \ 16 | SECURITY.md \ 17 | Release_notes.txt \ 18 | doc/functions.md \ 19 | doc/test.md \ 20 | doc/build.md 21 | 22 | EXCLUDE = include/test.h include/unaligned.h 23 | EXCLUDE_PATTERNS = */include/*_multibinary.h 24 | EXAMPLE_PATH = . crc raid erasure_code igzip 25 | PAPER_TYPE = letter 26 | LATEX_SOURCE_CODE = YES 27 | GENERATE_TREEVIEW = YES 28 | MACRO_EXPANSION = YES 29 | EXPAND_ONLY_PREDEF = YES 30 | PREDEFINED = "DECLARE_ALIGNED(n, a)=ALIGN n" \ 31 | __declspec(x)='x' \ 32 | align(x)='ALIGN \ 33 | x' 34 | EXPAND_AS_DEFINED = DECLARE_ALIGNED 35 | EXTENSION_MAPPING = "txt=md" 36 | -------------------------------------------------------------------------------- /tests/fuzz/igzip_dump_inflate_corpus.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include "inflate_std_vects.h" 5 | 6 | #define DNAME_MAX 256 7 | #define FNAME_MAX (DNAME_MAX + 81) 8 | 9 | int 10 | main(int argc, char *argv[]) 11 | { 12 | uint8_t *buf; 13 | int i, len, err; 14 | FILE *fout = NULL; 15 | char fname[FNAME_MAX]; 16 | char dname[DNAME_MAX]; 17 | 18 | if (argc != 2) { 19 | fprintf(stderr, "Usage: %s \n", argv[0]); 20 | exit(1); 21 | } 22 | strncpy(dname, argv[1], DNAME_MAX - 1); 23 | 24 | for (i = 0; i < sizeof(std_vect_array) / sizeof(struct vect_result); i++) { 25 | buf = std_vect_array[i].vector; 26 | len = std_vect_array[i].vector_length; 27 | err = std_vect_array[i].expected_error; 28 | 29 | snprintf(fname, FNAME_MAX, "%s/inflate_corp_n%04d_e%04d", dname, i, err); 30 | printf(" writing %s\n", fname); 31 | fout = fopen(fname, "w+"); 32 | if (!fout) { 33 | fprintf(stderr, "Can't open %s for writing\n", fname); 34 | exit(1); 35 | } 36 | fwrite(buf, len, 1, fout); 37 | fclose(fout); 38 | } 39 | 40 | return 0; 41 | } 42 | -------------------------------------------------------------------------------- /igzip/encode_df.h: -------------------------------------------------------------------------------- 1 | #ifndef ENCODE_DF_H 2 | #define ENCODE_DF_H 3 | 4 | #include 5 | #include "igzip_lib.h" 6 | #include "huff_codes.h" 7 | 8 | /* Deflate Intermediate Compression Format */ 9 | #define LIT_LEN_BIT_COUNT 10 10 | #define LIT_LEN_MASK ((1 << LIT_LEN_BIT_COUNT) - 1) 11 | #define DIST_LIT_BIT_COUNT 9 12 | #define DIST_LIT_MASK ((1 << DIST_LIT_BIT_COUNT) - 1) 13 | #define ICF_DIST_OFFSET LIT_LEN_BIT_COUNT 14 | #define NULL_DIST_SYM 30 15 | 16 | #define LEN_START ISAL_DEF_LIT_SYMBOLS 17 | #define LEN_OFFSET (LEN_START - ISAL_DEF_MIN_MATCH) 18 | #define LEN_MAX (LEN_OFFSET + ISAL_DEF_MAX_MATCH) 19 | #define LIT_START (NULL_DIST_SYM + 1) 20 | #define ICF_CODE_LEN 32 21 | 22 | struct deflate_icf { 23 | #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ 24 | uint32_t lit_len : LIT_LEN_BIT_COUNT; 25 | uint32_t lit_dist : DIST_LIT_BIT_COUNT; 26 | uint32_t dist_extra : ICF_CODE_LEN - DIST_LIT_BIT_COUNT - ICF_DIST_OFFSET; 27 | #else 28 | uint32_t dist_extra : ICF_CODE_LEN - DIST_LIT_BIT_COUNT - ICF_DIST_OFFSET; 29 | uint32_t lit_dist : DIST_LIT_BIT_COUNT; 30 | uint32_t lit_len : LIT_LEN_BIT_COUNT; 31 | #endif 32 | }; 33 | 34 | struct deflate_icf * 35 | encode_deflate_icf(struct deflate_icf *next_in, struct deflate_icf *end_in, struct BitBuf2 *bb, 36 | struct hufftables_icf *hufftables); 37 | #endif 38 | -------------------------------------------------------------------------------- /igzip/igzip_level_buf_structs.h: -------------------------------------------------------------------------------- 1 | #ifndef IGZIP_LEVEL_BUF_STRUCTS_H 2 | #define IGZIP_LEVEL_BUF_STRUCTS_H 3 | 4 | #include "igzip_lib.h" 5 | #include "huff_codes.h" 6 | #include "encode_df.h" 7 | 8 | #define MATCH_BUF_SIZE (4 * 1024) 9 | 10 | struct hash8k_buf { 11 | uint16_t hash_table[IGZIP_HASH8K_HASH_SIZE]; 12 | }; 13 | 14 | struct hash_hist_buf { 15 | uint16_t hash_table[IGZIP_HASH_HIST_SIZE]; 16 | }; 17 | 18 | struct hash_map_buf { 19 | uint16_t hash_table[IGZIP_HASH_MAP_HASH_SIZE]; 20 | struct deflate_icf *matches_next; 21 | struct deflate_icf *matches_end; 22 | struct deflate_icf matches[MATCH_BUF_SIZE]; 23 | struct deflate_icf overflow[ISAL_LOOK_AHEAD]; 24 | }; 25 | 26 | #define MAX_LVL_BUF_SIZE sizeof(struct hash_map_buf) 27 | 28 | struct level_buf { 29 | struct hufftables_icf encode_tables; 30 | struct isal_mod_hist hist; 31 | uint32_t deflate_hdr_count; 32 | uint32_t deflate_hdr_extra_bits; 33 | uint8_t deflate_hdr[ISAL_DEF_MAX_HDR_SIZE]; 34 | struct deflate_icf *icf_buf_next; 35 | uint64_t icf_buf_avail_out; 36 | struct deflate_icf *icf_buf_start; 37 | union { 38 | struct hash8k_buf hash8k; 39 | struct hash_hist_buf hash_hist; 40 | struct hash_map_buf hash_map; 41 | 42 | struct hash8k_buf lvl1; 43 | struct hash_hist_buf lvl2; 44 | struct hash_map_buf lvl3; 45 | }; 46 | }; 47 | 48 | #endif 49 | -------------------------------------------------------------------------------- /CONTRIBUTING.md: -------------------------------------------------------------------------------- 1 | # Contributing to ISA-L 2 | 3 | Everyone is welcome to contribute. Patches may be submitted using GitHub pull 4 | requests (PRs). All commits must be signed off by the developer (--signoff) 5 | which indicates that you agree to the Developer Certificate of Origin. Patch 6 | discussion will happen directly on the GitHub PR. Design pre-work and general 7 | discussion occurs on the [mailing list]. Anyone can provide feedback in either 8 | location and all discussion is welcome. Decisions on whether to merge patches 9 | will be handled by the maintainer. 10 | 11 | ## License 12 | 13 | ISA-L is licensed using a BSD 3-clause [license]. All code submitted to 14 | the project is required to carry that license. 15 | 16 | ## Certificate of Origin 17 | 18 | In order to get a clear contribution chain of trust we use the 19 | [signed-off-by language] used by the Linux kernel project. 20 | 21 | ## Mailing List 22 | 23 | Contributors and users are welcome to submit new request on our roadmap, submit 24 | patches, file issues, and ask questions on our [mailing list]. 25 | 26 | ## Coding Style 27 | 28 | The coding style for ISA-L C code is roughly based on LLVM style with 29 | some customizations. Use the included format script to format C code. 30 | 31 | ./tools/format.sh 32 | 33 | And use check format script before submitting. 34 | 35 | ./tools/check_format.sh 36 | 37 | [mailing list]:https://lists.01.org/hyperkitty/list/isal@lists.01.org/ 38 | [license]:LICENSE 39 | [signed-off-by language]:https://01.org/community/signed-process 40 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Copyright(c) 2011-2024 Intel Corporation All rights reserved. 2 | 3 | Redistribution and use in source and binary forms, with or without 4 | modification, are permitted provided that the following conditions 5 | are met: 6 | * Redistributions of source code must retain the above copyright 7 | notice, this list of conditions and the following disclaimer. 8 | * Redistributions in binary form must reproduce the above copyright 9 | notice, this list of conditions and the following disclaimer in 10 | the documentation and/or other materials provided with the 11 | distribution. 12 | * Neither the name of Intel Corporation nor the names of its 13 | contributors may be used to endorse or promote products derived 14 | from this software without specific prior written permission. 15 | 16 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 | 28 | SPDX-License-Identifier: BSD-3-Clause 29 | -------------------------------------------------------------------------------- /tests/fuzz/igzip_fuzz_inflate.c: -------------------------------------------------------------------------------- 1 | #define _FILE_OFFSET_BITS 64 2 | #include 3 | #include 4 | #include 5 | #include 6 | #include "huff_codes.h" 7 | #include "igzip_lib.h" 8 | #include "test.h" 9 | 10 | extern int 11 | LLVMFuzzerTestOneInput(const uint8_t *data, size_t size); 12 | 13 | int 14 | main(int argc, char *argv[]) 15 | { 16 | FILE *in = NULL; 17 | unsigned char *in_buf = NULL; 18 | uint64_t in_file_size; 19 | 20 | if (argc != 2) { 21 | fprintf(stderr, "Usage: isal_fuzz_inflate \n"); 22 | exit(1); 23 | } 24 | in = fopen(argv[1], "rb"); 25 | if (!in) { 26 | fprintf(stderr, "Can't open %s for reading\n", argv[1]); 27 | exit(1); 28 | } 29 | in_file_size = get_filesize(in); 30 | if (in_file_size == 0) { 31 | /* Check if it's a real error or just an empty file */ 32 | if (fseek(in, 0, SEEK_END) != 0 || ftell(in) < 0) 33 | fprintf(stderr, "Failed to get file size for %s\n", argv[1]); 34 | else 35 | fprintf(stderr, "Input file %s has zero length\n", argv[1]); 36 | exit(1); 37 | } 38 | in_buf = malloc(in_file_size); 39 | 40 | if (in_buf == NULL) { 41 | fprintf(stderr, "Failed to malloc input and outputs buffers\n"); 42 | exit(1); 43 | } 44 | 45 | if (fread(in_buf, 1, in_file_size, in) != in_file_size) { 46 | fprintf(stderr, "Failed to read from %s\n", argv[1]); 47 | exit(1); 48 | } 49 | 50 | return LLVMFuzzerTestOneInput(in_buf, in_file_size); 51 | } 52 | -------------------------------------------------------------------------------- /erasure_code/ppc64le/gf_vect_mad_vsx.c: -------------------------------------------------------------------------------- 1 | #include "ec_base_vsx.h" 2 | 3 | void 4 | gf_vect_mad_vsx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src, 5 | unsigned char *dest) 6 | { 7 | unsigned char *s, *t0; 8 | vector unsigned char vX1, vY1; 9 | vector unsigned char vX2, vY2; 10 | vector unsigned char vX3, vY3; 11 | vector unsigned char vX4, vY4; 12 | vector unsigned char vhi0, vlo0; 13 | int i, head; 14 | 15 | s = (unsigned char *) src; 16 | t0 = (unsigned char *) dest; 17 | 18 | head = len % 64; 19 | if (head != 0) { 20 | gf_vect_mad_base(head, vec, vec_i, &gftbls[0 * 32 * vec], src, dest); 21 | } 22 | 23 | vlo0 = EC_vec_xl(0, gftbls + (((0 * vec) << 5) + (vec_i << 5))); 24 | vhi0 = EC_vec_xl(16, gftbls + (((0 * vec) << 5) + (vec_i << 5))); 25 | 26 | for (i = head; i < len - 63; i += 64) { 27 | vX1 = vec_xl(0, s + i); 28 | vX2 = vec_xl(16, s + i); 29 | vX3 = vec_xl(32, s + i); 30 | vX4 = vec_xl(48, s + i); 31 | 32 | vY1 = vec_xl(0, t0 + i); 33 | vY2 = vec_xl(16, t0 + i); 34 | vY3 = vec_xl(32, t0 + i); 35 | vY4 = vec_xl(48, t0 + i); 36 | 37 | vY1 = vY1 ^ EC_vec_permxor(vhi0, vlo0, vX1); 38 | vY2 = vY2 ^ EC_vec_permxor(vhi0, vlo0, vX2); 39 | vY3 = vY3 ^ EC_vec_permxor(vhi0, vlo0, vX3); 40 | vY4 = vY4 ^ EC_vec_permxor(vhi0, vlo0, vX4); 41 | 42 | vec_xst(vY1, 0, t0 + i); 43 | vec_xst(vY2, 16, t0 + i); 44 | vec_xst(vY3, 32, t0 + i); 45 | vec_xst(vY4, 48, t0 + i); 46 | } 47 | 48 | return; 49 | } 50 | -------------------------------------------------------------------------------- /tools/test_autorun.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | set -e #exit on fail 4 | 5 | # Override defaults if exist 6 | READLINK=readlink 7 | command -V greadlink >/dev/null 2>&1 && READLINK=greadlink 8 | 9 | # Run in build directory 10 | out="$PWD" 11 | src=$($READLINK -f $(dirname $0))/.. 12 | cd "$src" 13 | 14 | # Echo environment info 15 | if test -d .git; then 16 | branch=$(git describe --always) 17 | commitid=$(git rev-parse HEAD) 18 | brief=$(git log -1 --format='%s') 19 | branch_changes=$(git diff --shortstat) 20 | fi 21 | if command -V uname >/dev/null 2>&1; then 22 | node=$(uname -n) 23 | os_name=$(uname -s) 24 | os_all=$(uname -a) 25 | fi 26 | 27 | echo "Test report v1" 28 | echo "branch: $branch" 29 | echo "brief: $brief" 30 | echo "commitid: $commitid" 31 | echo "node: $node" 32 | echo "os_name: $os_name" 33 | echo "os_all: $os_all" 34 | echo "test_args: $@" 35 | echo "changes: $branch_changes" 36 | command -V lscpu > /dev/null 2>&1 && lscpu 37 | 38 | # Start tests 39 | 40 | # Check style first 41 | ./tools/check_format.sh 42 | 43 | [ -z "$1" ] && ./tools/test_checks.sh 44 | 45 | while [ -n "$1" ]; do 46 | case "$1" in 47 | check ) 48 | ./tools/test_checks.sh 49 | shift ;; 50 | ext ) 51 | # Drop first argument, to pass the rest of the arguments to test_extended.sh 52 | shift ; 53 | ./tools/test_extended.sh $@ 54 | shift ;; 55 | format ) 56 | shift ;; 57 | all ) 58 | # Drop first argument, to pass the rest of the arguments to test_extended.sh 59 | shift ; 60 | ./tools/test_checks.sh 61 | ./tools/test_extended.sh $@ 62 | shift ;; 63 | * ) 64 | echo $0 undefined option: $1 65 | shift ;; 66 | esac 67 | done 68 | 69 | -------------------------------------------------------------------------------- /igzip/aarch64/igzip_inflate_multibinary_arm64.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2019 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "aarch64_multibinary.h" 31 | 32 | mbin_interface decode_huffman_code_block_stateless 33 | -------------------------------------------------------------------------------- /mem/aarch64/mem_multibinary_arm.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include 31 | 32 | mbin_interface isal_zero_detect 33 | 34 | -------------------------------------------------------------------------------- /mem/aarch64/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | lsrc_aarch64 += \ 31 | mem/aarch64/mem_zero_detect_neon.S \ 32 | mem/aarch64/mem_multibinary_arm.S \ 33 | mem/aarch64/mem_aarch64_dispatcher.c 34 | -------------------------------------------------------------------------------- /examples/ec/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Intel Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | src_include += -I $(srcdir)/examples/ec 31 | 32 | examples += examples/ec/ec_simple_example 33 | examples += examples/ec/ec_piggyback_example 34 | -------------------------------------------------------------------------------- /mem/riscv64/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of ISCAS nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | lsrc_riscv64 += \ 31 | mem/riscv64/mem_multibinary_riscv64_dispatcher.c \ 32 | mem/riscv64/mem_multibinary_riscv64.S \ 33 | mem/riscv64/mem_zero_detect_rvv.S 34 | -------------------------------------------------------------------------------- /raid/aarch64/raid_multibinary_arm.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "aarch64_multibinary.h" 31 | 32 | 33 | mbin_interface xor_gen 34 | mbin_interface xor_check 35 | mbin_interface pq_gen 36 | mbin_interface pq_check 37 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_iso_norm_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_iso_norm_pmull.h" 32 | #include "crc64_norm_common_pmull.h" 33 | 34 | crc64_norm_func crc64_iso_norm_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_iso_refl_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_iso_refl_pmull.h" 32 | #include "crc64_refl_common_pmull.h" 33 | 34 | crc64_refl_func crc64_iso_refl_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc32_gzip_refl_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc32_gzip_refl_pmull.h" 32 | #include "crc32_refl_common_pmull.h" 33 | 34 | crc32_refl_func crc32_gzip_refl_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc32_ieee_norm_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc32_ieee_norm_pmull.h" 32 | #include "crc32_norm_common_pmull.h" 33 | 34 | crc32_norm_func crc32_ieee_norm_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_ecma_norm_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_ecma_norm_pmull.h" 32 | #include "crc64_norm_common_pmull.h" 33 | 34 | crc64_norm_func crc64_ecma_norm_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_ecma_refl_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_ecma_refl_pmull.h" 32 | #include "crc64_refl_common_pmull.h" 33 | 34 | crc64_refl_func crc64_ecma_refl_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_jones_norm_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_jones_norm_pmull.h" 32 | #include "crc64_norm_common_pmull.h" 33 | 34 | crc64_norm_func crc64_jones_norm_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_jones_refl_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_jones_refl_pmull.h" 32 | #include "crc64_refl_common_pmull.h" 33 | 34 | crc64_refl_func crc64_jones_refl_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_rocksoft_norm_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2025 Tim Burke All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_rocksoft_norm_pmull.h" 32 | #include "crc64_norm_common_pmull.h" 33 | 34 | crc64_norm_func crc64_rocksoft_norm_pmull 35 | -------------------------------------------------------------------------------- /crc/aarch64/crc64_rocksoft_refl_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2025 Tim Burke All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc64_rocksoft_refl_pmull.h" 32 | #include "crc64_refl_common_pmull.h" 33 | 34 | crc64_refl_func crc64_rocksoft_refl_pmull 35 | -------------------------------------------------------------------------------- /igzip/riscv64/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of ISCAS nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | lsrc_riscv64 += \ 31 | igzip/riscv64/igzip_multibinary_riscv64_dispatcher.c \ 32 | igzip/riscv64/igzip_multibinary_riscv64.S \ 33 | igzip/riscv64/igzip_isal_adler32_rvv.S 34 | -------------------------------------------------------------------------------- /mem/riscv64/mem_multibinary_riscv64.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of ISCAS nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "riscv64_multibinary.h" 31 | 32 | #if HAVE_RVV 33 | mbin_interface isal_zero_detect 34 | #else 35 | mbin_interface_base isal_zero_detect mem_zero_detect_base 36 | #endif 37 | -------------------------------------------------------------------------------- /raid/riscv64/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of ISCAS nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | lsrc_riscv64 += \ 31 | raid/riscv64/raid_multibinary_riscv64_dispatcher.c \ 32 | raid/riscv64/raid_multibinary_riscv64.S \ 33 | raid/riscv64/raid_pq_gen_rvv.S \ 34 | raid/riscv64/raid_xor_gen_rvv.S 35 | -------------------------------------------------------------------------------- /erasure_code/aarch64/ec_multibinary_arm.S: -------------------------------------------------------------------------------- 1 | /************************************************************** 2 | Copyright (c) 2019 Huawei Technologies Co., Ltd. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Huawei Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "aarch64_multibinary.h" 31 | 32 | mbin_interface ec_encode_data 33 | mbin_interface gf_vect_mul 34 | mbin_interface gf_vect_dot_prod 35 | mbin_interface gf_vect_mad 36 | mbin_interface ec_encode_data_update 37 | mbin_interface ec_init_tables 38 | -------------------------------------------------------------------------------- /mem/mem_zero_detect_base_aliases.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include 31 | #include "mem_routines.h" 32 | 33 | int 34 | mem_zero_detect_base(void *buf, size_t n); 35 | 36 | int 37 | isal_zero_detect(void *mem, size_t len) 38 | { 39 | return mem_zero_detect_base(mem, len); 40 | } 41 | -------------------------------------------------------------------------------- /raid/aarch64/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | lsrc_aarch64 += \ 31 | raid/aarch64/xor_gen_neon.S \ 32 | raid/aarch64/pq_gen_neon.S \ 33 | raid/aarch64/xor_check_neon.S \ 34 | raid/aarch64/pq_check_neon.S \ 35 | raid/aarch64/raid_multibinary_arm.S \ 36 | raid/aarch64/raid_aarch64_dispatcher.c 37 | -------------------------------------------------------------------------------- /programs/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Intel Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | 31 | bin_PROGRAMS += programs/igzip 32 | programs_igzip_SOURCES = programs/igzip_cli.c 33 | programs_igzip_LDADD = libisal.la 34 | dist_man_MANS = programs/igzip.1 35 | other_src += programs/igzip.1.h2m 36 | 37 | programs/igzip.1: % : %.h2m programs/igzip_cli.c programs/igzip 38 | -help2man -o $@ -i $< -N ./programs/igzip 39 | -------------------------------------------------------------------------------- /raid/riscv64/raid_multibinary_riscv64.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of ISCAS nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "riscv64_multibinary.h" 31 | 32 | #if HAVE_RVV 33 | mbin_interface pq_gen 34 | mbin_interface xor_gen 35 | #else 36 | mbin_interface_base pq_gen pq_gen_base 37 | mbin_interface_base xor_gen xor_gen_base 38 | #endif 39 | 40 | mbin_interface_base pq_check pq_check_base 41 | mbin_interface_base xor_check xor_check_base 42 | -------------------------------------------------------------------------------- /igzip/shim/shim_inflate.h: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2025 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "shim_deflate.h" 31 | #include "igzip_lib.h" 32 | 33 | typedef struct internal_state2 { 34 | z_streamp strm; 35 | int level; 36 | int w_bits; 37 | struct inflate_state *isal_strm_inflate; 38 | int trailer_overconsumption_fixed; /* Indicates if fix has been applied for gzip trailer 39 | overconsumption issue */ 40 | } inflate_state2; 41 | -------------------------------------------------------------------------------- /.clang-format: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2024, Intel Corporation 2 | # 3 | # Redistribution and use in source and binary forms, with or without 4 | # modification, are permitted provided that the following conditions are met: 5 | # 6 | # * Redistributions of source code must retain the above copyright notice, 7 | # this list of conditions and the following disclaimer. 8 | # * Redistributions in binary form must reproduce the above copyright 9 | # notice, this list of conditions and the following disclaimer in the 10 | # documentation and/or other materials provided with the distribution. 11 | # * Neither the name of Intel Corporation nor the names of its contributors 12 | # may be used to endorse or promote products derived from this software 13 | # without specific prior written permission. 14 | # 15 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 | # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 | # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 | # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 19 | # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 | # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 | # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 22 | # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 | # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 24 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 | 26 | BasedOnStyle: LLVM 27 | IndentWidth: 8 28 | Language: Cpp 29 | BreakBeforeBraces: Linux 30 | AllowShortIfStatementsOnASingleLine: false 31 | IndentCaseLabels: false 32 | UseTab: Never 33 | AlignConsecutiveMacros: true 34 | AlignTrailingComments: true 35 | AlwaysBreakAfterReturnType: All 36 | SortIncludes: false 37 | BreakBeforeInheritanceComma: true 38 | AllowAllParametersOfDeclarationOnNextLine: false 39 | BinPackParameters: true 40 | BinPackArguments: true 41 | ReflowComments: true 42 | ColumnLimit: 100 43 | Cpp11BracedListStyle: false 44 | MaxEmptyLinesToKeep: 1 45 | ContinuationIndentWidth: 8 46 | SpaceAfterCStyleCast: true 47 | -------------------------------------------------------------------------------- /mem/mem_multibinary.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %include "reg_sizes.asm" 31 | %include "multibinary.asm" 32 | 33 | default rel 34 | [bits 64] 35 | 36 | extern mem_zero_detect_avx512 37 | extern mem_zero_detect_avx2 38 | extern mem_zero_detect_avx 39 | extern mem_zero_detect_sse 40 | extern mem_zero_detect_base 41 | 42 | mbin_interface isal_zero_detect 43 | 44 | mbin_dispatch_init6 isal_zero_detect, mem_zero_detect_base, mem_zero_detect_sse, mem_zero_detect_avx, mem_zero_detect_avx2, mem_zero_detect_avx512 45 | -------------------------------------------------------------------------------- /doc/build.md: -------------------------------------------------------------------------------- 1 | # ISA-L Build Details 2 | 3 | ## Build tools 4 | 5 | NASM: For x86-64 builds it is highly recommended to get an up-to-date version of 6 | [nasm] that can understand the latest instruction sets. 7 | Minimum version of NASM is 2.14.01, supporting all the ISA needed for the library. 8 | The configure or make tools can check for this minimum version. 9 | 10 | checking for nasm... yes 11 | checking for modern nasm... yes 12 | 13 | If an appropriate nasm is not available from your distro, it is simple to build 14 | from source or download an executable from [nasm]. 15 | 16 | git clone --depth=10 https://github.com/netwide-assembler/nasm 17 | cd nasm 18 | ./autogen.sh 19 | ./configure 20 | make 21 | sudo make install 22 | 23 | ## Windows Build Environment Details 24 | 25 | The windows dynamic and static libraries can be built with the nmake tool on the 26 | windows command line when appropriate paths and tools are setup as follows. 27 | 28 | ### Download nasm and put into path 29 | 30 | Download and install [nasm] and add location to path. 31 | 32 | set PATH=%PATH%;C:\Program Files\NASM 33 | 34 | ### Setup compiler environment 35 | 36 | Install compiler and run environment setup script. 37 | 38 | Compilers for windows usually have a batch file to setup environment variables 39 | for the command line called `vcvarsall.bat` or `compilervars.bat` or a link to 40 | run these. For Visual Studio this may be as follows for Community edition. 41 | 42 | C:\Program Files (x86)\Microsoft Visual Studio\2019\Community\VC\Auxiliary\Build\vcvarsall.bat x64 43 | 44 | For the Intel compiler the path is typically as follows where yyyy, x, zzz 45 | represent the version. 46 | 47 | C:\Program Files (x86)\IntelSWTools\system_studio_for_windows_yyyy.x.zzz\compilers_and_libraries_yyyy\bin\compilervars.bat intel64 48 | 49 | ### Build ISA-L libs and copy to appropriate place 50 | 51 | Run `nmake /f Makefile.nmake` 52 | 53 | This should build isa-l.dll, isa-l.lib and isa-l_static.lib. You may want to 54 | copy the libs to a system directory in the dynamic linking path such as 55 | `C:\windows\system32` or to a project directory. 56 | 57 | To build a simple program with a static library. 58 | 59 | cl /Fe: test.exe test.c isa-l_static.lib 60 | 61 | [nasm]: https://www.nasm.us 62 | -------------------------------------------------------------------------------- /igzip/riscv64/igzip_multibinary_riscv64_dispatcher.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of ISCAS nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | #include "riscv64_multibinary.h" 30 | 31 | extern uint32_t 32 | adler32_rvv(uint32_t, uint8_t *, uint64_t); 33 | extern uint32_t 34 | adler32_base(uint32_t, uint8_t *, uint64_t); 35 | 36 | DEFINE_INTERFACE_DISPATCHER(isal_adler32) 37 | { 38 | #if HAVE_RVV 39 | const unsigned long hwcap = getauxval(AT_HWCAP); 40 | if (hwcap & HWCAP_RV('V')) 41 | return adler32_rvv; 42 | else 43 | #endif 44 | return adler32_base; 45 | } 46 | -------------------------------------------------------------------------------- /crc/aarch64/crc_multibinary_arm.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | #include 30 | 31 | 32 | mbin_interface crc32_iscsi 33 | mbin_interface crc16_t10dif 34 | mbin_interface crc16_t10dif_copy 35 | mbin_interface crc32_ieee 36 | mbin_interface crc32_gzip_refl 37 | mbin_interface crc64_ecma_refl 38 | mbin_interface crc64_ecma_norm 39 | mbin_interface crc64_iso_refl 40 | mbin_interface crc64_iso_norm 41 | mbin_interface crc64_jones_refl 42 | mbin_interface crc64_jones_norm 43 | mbin_interface crc64_rocksoft_refl 44 | mbin_interface crc64_rocksoft_norm 45 | -------------------------------------------------------------------------------- /mem/riscv64/mem_multibinary_riscv64_dispatcher.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of ISCAS nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | #include "riscv64_multibinary.h" 30 | #include 31 | 32 | extern int 33 | mem_zero_detect_rvv(void *buf, size_t n); 34 | extern int 35 | mem_zero_detect_base(void *buf, size_t n); 36 | 37 | DEFINE_INTERFACE_DISPATCHER(isal_zero_detect) 38 | { 39 | #if HAVE_RVV 40 | const unsigned long hwcap = getauxval(AT_HWCAP); 41 | if (hwcap & HWCAP_RV('V')) 42 | return mem_zero_detect_rvv; 43 | else 44 | #endif 45 | return mem_zero_detect_base; 46 | } 47 | -------------------------------------------------------------------------------- /programs/igzip.1: -------------------------------------------------------------------------------- 1 | .\" DO NOT MODIFY THIS FILE! It was generated by help2man 1.47.13. 2 | .TH IGZIP "1" "December 2024" "igzip 2.31.1" "User Commands" 3 | .SH NAME 4 | igzip \- compress or decompress files similar to gzip 5 | .SH SYNOPSIS 6 | .B igzip 7 | [\fI\,options\/\fR] [\fI\,infiles\/\fR] 8 | .SH DESCRIPTION 9 | 10 | Compress or decompress files similar to gzip using the ISA-L fast deflate library. 11 | 12 | Output .gz files are compatible with gzip and [RFC-1952]. 13 | 14 | Options are similar to gzip except --keep is default. 15 | .SH OPTIONS 16 | .TP 17 | \fB\-h\fR, \fB\-\-help\fR 18 | help, print this message 19 | .TP 20 | \-# 21 | use compression level # with 0 <= # <= 3 22 | .TP 23 | \fB\-o\fR 24 | output file 25 | .TP 26 | \fB\-c\fR, \fB\-\-stdout\fR 27 | write to stdout 28 | .TP 29 | \fB\-d\fR, \fB\-\-decompress\fR 30 | decompress file 31 | .TP 32 | \fB\-z\fR, \fB\-\-compress\fR 33 | compress file (default) 34 | .TP 35 | \fB\-f\fR, \fB\-\-force\fR 36 | overwrite output without prompting 37 | .TP 38 | \fB\-\-rm\fR 39 | remove source files after successful (de)compression 40 | .TP 41 | \fB\-k\fR, \fB\-\-keep\fR 42 | keep source files (default) 43 | .TP 44 | \fB\-S\fR, \fB\-\-suffix\fR <.suf> 45 | suffix to use while (de)compressing 46 | .TP 47 | \fB\-V\fR, \fB\-\-version\fR 48 | show version number 49 | .TP 50 | \fB\-v\fR, \fB\-\-verbose\fR 51 | verbose mode 52 | .TP 53 | \fB\-N\fR, \fB\-\-name\fR 54 | save/use file name and timestamp in compress/decompress 55 | .TP 56 | \fB\-n\fR, \fB\-\-no\-name\fR 57 | do not save/use file name and timestamp in compress/decompress 58 | .TP 59 | \fB\-t\fR, \fB\-\-test\fR 60 | test compressed file integrity 61 | .TP 62 | \fB\-T\fR, \fB\-\-threads\fR 63 | use n threads to compress if enabled 64 | .TP 65 | \fB\-q\fR, \fB\-\-quiet\fR 66 | suppress warnings 67 | .PP 68 | with no infile, or when infile is \- , read standard input 69 | .SH EXAMPLES 70 | 71 | Make compressed file1.gz and file2.gz and keep file1 and file2. 72 | .RS 73 | .B igzip file1 file2 74 | .RE 75 | 76 | Piped compression and decompression. 77 | .RS 78 | .B igzip -c file.txt | igzip -d -c - 79 | .RE 80 | 81 | Streaming compression from output of tar, compress level 2. 82 | .RS 83 | .B tar cf - dir1 | igzip -2 > dir1.tar.gz 84 | .RE 85 | .SH "REPORTING BUGS" 86 | 87 | Report bugs to https://github.com/intel/isa-l/issues 88 | -------------------------------------------------------------------------------- /raid/raid_base_aliases.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2017 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "raid.h" 31 | 32 | int 33 | pq_gen(int vects, int len, void **array) 34 | { 35 | return pq_gen_base(vects, len, array); 36 | } 37 | 38 | int 39 | pq_check(int vects, int len, void **array) 40 | { 41 | return pq_check_base(vects, len, array); 42 | } 43 | 44 | int 45 | xor_gen(int vects, int len, void **array) 46 | { 47 | return xor_gen_base(vects, len, array); 48 | } 49 | 50 | int 51 | xor_check(int vects, int len, void **array) 52 | { 53 | return xor_check_base(vects, len, array); 54 | } 55 | -------------------------------------------------------------------------------- /mem/aarch64/mem_aarch64_dispatcher.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2019 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | #include 30 | #include 31 | 32 | extern int 33 | mem_zero_detect_neon(void *, size_t); 34 | extern int 35 | mem_zero_detect_base(void *, size_t); 36 | 37 | DEFINE_INTERFACE_DISPATCHER(isal_zero_detect) 38 | { 39 | #if defined(__linux__) 40 | unsigned long auxval = getauxval(AT_HWCAP); 41 | if (auxval & HWCAP_ASIMD) 42 | return mem_zero_detect_neon; 43 | #elif defined(__APPLE__) 44 | return mem_zero_detect_neon; 45 | #endif 46 | return mem_zero_detect_base; 47 | } 48 | -------------------------------------------------------------------------------- /mem/riscv64/mem_zero_detect_rvv.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of ISCAS nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | #if HAVE_RVV 30 | .option arch, +v 31 | .global mem_zero_detect_rvv 32 | .type mem_zero_detect_rvv, %function 33 | mem_zero_detect_rvv: 34 | 1: 35 | vsetvli t0, a1, e8, m8, ta, ma 36 | vle8.v v8, (a0) 37 | vmsne.vi v0, v8, 0 38 | vfirst.m t1, v0 39 | bgez t1, 2f 40 | sub a1, a1, t0 41 | add a0, a0, t0 42 | bnez a1, 1b 43 | li a0, 0 44 | ret 45 | 2: 46 | li a0, -1 47 | ret 48 | 49 | #endif 50 | -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | language: c 2 | sudo: required 3 | matrix: 4 | include: 5 | ### OS X 6 | - os: osx 7 | osx_image: xcode12.5 8 | addons: 9 | homebrew: 10 | packages: 11 | - nasm 12 | env: C_COMPILER=clang 13 | 14 | ### linux gcc and format check 15 | - os: linux 16 | dist: bionic 17 | addons: 18 | apt: 19 | packages: 20 | - nasm 21 | install: 22 | # Install newer indent to check formatting 23 | - sudo apt-get install texinfo 24 | - wget http://archive.ubuntu.com/ubuntu/pool/main/i/indent/indent_2.2.12.orig.tar.xz -O /tmp/indent.tar.xz 25 | - tar -xJf /tmp/indent.tar.xz -C /tmp/ 26 | - pushd /tmp/indent-2.2.12 && ./configure --prefix=/usr && make && sudo make install && popd 27 | env: C_COMPILER=gcc 28 | 29 | ### linux clang 30 | - os: linux 31 | dist: bionic 32 | addons: 33 | apt: 34 | packages: 35 | - nasm 36 | env: C_COMPILER=clang 37 | 38 | ### linux older gcc 39 | - os: linux 40 | dist: xenial 41 | addons: 42 | apt: 43 | sources: 44 | - ubuntu-toolchain-r-test 45 | packages: 46 | - g++-4.7 47 | - nasm 48 | env: C_COMPILER=gcc-4.7 49 | 50 | ### arm64: gcc-5.4 51 | - os: linux 52 | dist: bionic 53 | arch: arm64 54 | env: C_COMPILER=gcc 55 | 56 | ### arm64: gcc-5.4 extended tests 57 | - os: linux 58 | dist: bionic 59 | arch: arm64 60 | env: TEST_TYPE=ext 61 | 62 | ### linux extended tests 63 | - os: linux 64 | dist: xenial 65 | addons: 66 | apt: 67 | sources: 68 | - ubuntu-toolchain-r-test 69 | packages: 70 | - binutils-mingw-w64-x86-64 71 | - gcc-mingw-w64-x86-64 72 | - wine 73 | - nasm 74 | env: TEST_TYPE=ext 75 | 76 | before_install: 77 | - if [ -n "${C_COMPILER}" ]; then export CC="${C_COMPILER}"; fi 78 | - if [ -n "${AS_ASSEMBL}" ]; then export AS="${AS_ASSEMBL}"; fi 79 | 80 | before_script: 81 | - if [ $TRAVIS_OS_NAME = linux ]; then sudo apt-get -q update; fi 82 | 83 | script: 84 | - if [ -n "${CC}" ]; then $CC --version; fi 85 | - if [ -n "${AS}" ]; then $AS --version || echo No version; fi 86 | - ./tools/test_autorun.sh "${TEST_TYPE}" 87 | -------------------------------------------------------------------------------- /igzip/igzip_inflate_multibinary.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | default rel 31 | [bits 64] 32 | 33 | %include "reg_sizes.asm" 34 | 35 | extern decode_huffman_code_block_stateless_base 36 | extern decode_huffman_code_block_stateless_01 37 | extern decode_huffman_code_block_stateless_04 38 | 39 | section .text 40 | 41 | %include "multibinary.asm" 42 | 43 | 44 | mbin_interface decode_huffman_code_block_stateless 45 | mbin_dispatch_init5 decode_huffman_code_block_stateless, decode_huffman_code_block_stateless_base, decode_huffman_code_block_stateless_01, decode_huffman_code_block_stateless_01, decode_huffman_code_block_stateless_04 46 | -------------------------------------------------------------------------------- /igzip/igzip_wrapper.h: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #ifndef IGZIP_WRAPPER_H 31 | 32 | #define DEFLATE_METHOD 8 33 | #define ZLIB_DICT_FLAG (1 << 5) 34 | #define TEXT_FLAG (1 << 0) 35 | #define HCRC_FLAG (1 << 1) 36 | #define EXTRA_FLAG (1 << 2) 37 | #define NAME_FLAG (1 << 3) 38 | #define COMMENT_FLAG (1 << 4) 39 | #define UNDEFINED_FLAG (-1) 40 | 41 | #define GZIP_HDR_BASE 10 42 | #define GZIP_EXTRA_LEN 2 43 | #define GZIP_HCRC_LEN 2 44 | #define GZIP_TRAILER_LEN 8 45 | 46 | #define ZLIB_HDR_BASE 2 47 | #define ZLIB_DICT_LEN 4 48 | #define ZLIB_INFO_OFFSET 4 49 | #define ZLIB_LEVEL_OFFSET 6 50 | #define ZLIB_TRAILER_LEN 4 51 | 52 | #endif 53 | -------------------------------------------------------------------------------- /doc/test.md: -------------------------------------------------------------------------------- 1 | # ISA-L Testing 2 | 3 | Tests are divided into check tests, unit tests and fuzz tests. Check tests, 4 | built with `make check`, should have no additional dependencies. Other unit 5 | tests built with `make test` may have additional dependencies in order to make 6 | comparisons of the output of ISA-L to other standard libraries and ensure 7 | compatibility. Fuzz tests are meant to be run with a fuzzing tool such as [AFL] 8 | or [llvm libFuzzer] fuzzing to direct the input data based on coverage. There 9 | are a number of scripts in the /tools directory to help with automating the 10 | running of tests. 11 | 12 | ## Test check 13 | 14 | `./tools/test_autorun.sh` is a helper script for kicking off check tests, that 15 | typically run for a few minutes, or extended tests that could run much 16 | longer. The command `test_autorun.sh check` build and runs all check tests with 17 | autotools and runs other short tests to ensure check tests, unit tests, 18 | examples, install, exe stack, format are correct. Each run of `test_autorun.sh` 19 | builds tests with a new random test seed that ensures that each run is unique to 20 | the seed but deterministic for debugging. Tests are also built with sanitizers 21 | and Electric Fence if available. 22 | 23 | ## Extended tests 24 | 25 | Extended tests are initiated with the command `./tools/test_autorun.sh 26 | ext`. These build and run check tests, unit tests, and other utilities that can 27 | take much longer than check tests alone. This includes special compression tools 28 | and some cross targets such as the no-arch build of base functions only and 29 | mingw build if tools are available. 30 | 31 | ## Fuzz testing 32 | 33 | `./tools/test_fuzz.sh` is a helper script for fuzzing to setup, build and run 34 | the ISA-L inflate fuzz tests on multiple fuzz tools. Fuzzing with 35 | [llvm libFuzzer] requires clang compiler tools with `-fsanitize=fuzzer` or 36 | `libFuzzer` installed. You can invoke the default fuzz tests under llvm with 37 | 38 | ./tools/test_fuzz.sh -e checked 39 | 40 | To use [AFL], install tools and system setup for `afl-fuzz` and run 41 | 42 | ./tools/test_fuzz.sh -e checked --afl 1 --llvm -1 -d 1 43 | 44 | This uses internal vectors as a seed. You can also specify a sample file to use 45 | as a seed instead with `-f `. One of three fuzz tests can be invoked: 46 | checked, simple, and round_trip. 47 | 48 | [llvm libFuzzer]: https://llvm.org/docs/LibFuzzer.html 49 | [AFL]: https://github.com/google/AFL 50 | -------------------------------------------------------------------------------- /mem/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Intel Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | include mem/aarch64/Makefile.am 31 | 32 | include mem/riscv64/Makefile.am 33 | 34 | lsrc += mem/mem_zero_detect_base.c 35 | 36 | lsrc_base_aliases += mem/mem_zero_detect_base_aliases.c 37 | lsrc_ppc64le += mem/mem_zero_detect_base_aliases.c 38 | 39 | lsrc_x86_64 += mem/mem_zero_detect_avx512.asm \ 40 | mem/mem_zero_detect_avx2.asm \ 41 | mem/mem_zero_detect_avx.asm \ 42 | mem/mem_zero_detect_sse.asm \ 43 | mem/mem_multibinary.asm 44 | 45 | extern_hdrs += include/mem_routines.h 46 | 47 | other_src += include/test.h 48 | 49 | check_tests += mem/mem_zero_detect_test 50 | 51 | perf_tests += mem/mem_zero_detect_perf 52 | -------------------------------------------------------------------------------- /crc/aarch64/crc32_iscsi_refl_pmull.S: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2019 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | #include "../include/aarch64_label.h" 31 | #include "crc32_iscsi_refl_pmull.h" 32 | #include "crc32_refl_common_pmull.h" 33 | 34 | crc32_refl_func crc32_iscsi_refl_pmull_internal 35 | 36 | .arch armv8-a+crc+crypto 37 | .text 38 | .align 3 39 | .global cdecl(crc32_iscsi_refl_pmull) 40 | #ifndef __APPLE__ 41 | .type crc32_iscsi_refl_pmull, %function 42 | #endif 43 | cdecl(crc32_iscsi_refl_pmull): 44 | stp x29, x30, [sp, -32]! 45 | mov x29, sp 46 | 47 | mov w7, w2 48 | sxtw x2, w1 49 | mov x1, x0 50 | mov w0, w7 51 | mvn w0, w0 52 | 53 | bl cdecl(crc32_iscsi_refl_pmull_internal) 54 | mvn w0, w0 55 | ldp x29, x30, [sp], 32 56 | ret 57 | -------------------------------------------------------------------------------- /Makefile.unx: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2011-2015 Intel Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Intel Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | units = erasure_code raid crc igzip programs mem 31 | 32 | default: lib 33 | 34 | ifeq (,$(findstring crc,$(units))) 35 | ifneq (,$(findstring igzip,$(units))) 36 | override units += crc 37 | endif 38 | endif 39 | 40 | include $(foreach unit,$(units), $(unit)/Makefile.am) 41 | 42 | ifneq (,$(findstring igzip,$(units))) 43 | include tests/fuzz/Makefile.am 44 | endif 45 | 46 | ifneq (,$(findstring erasure_code,$(units))) 47 | include examples/ec/Makefile.am 48 | endif 49 | 50 | # Override individual lib names to make one inclusive library. 51 | lib_name := bin/isa-l.a 52 | 53 | include make.inc 54 | include tools/gen_nmake.mk 55 | 56 | VPATH = . $(units) include tests/fuzz examples/ec 57 | -------------------------------------------------------------------------------- /igzip/aarch64/stdmac_aarch64.h: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2019 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #ifndef __STDMAC_AARCH64_H__ 31 | #define __STDMAC_AARCH64_H__ 32 | 33 | #ifdef __ASSEMBLY__ 34 | 35 | #define DEBUG_STACK 144 36 | 37 | .macro push_stack 38 | stp x29, x30,[sp,0-DEBUG_STACK]! 39 | mov x29, sp 40 | stp x19, x20, [sp, 16] 41 | stp x21, x22, [sp, 32] 42 | stp x23, x24, [sp, 48] 43 | stp x25, x26, [sp, 64] 44 | stp x27, x28, [sp, 80] 45 | .endm 46 | .macro pop_stack 47 | ldp x19, x20, [sp, 16] 48 | ldp x21, x22, [sp, 32] 49 | ldp x23, x24, [sp, 48] 50 | ldp x25, x26, [sp, 64] 51 | ldp x27, x28, [sp, 80] 52 | 53 | ldp x29, x30, [sp], DEBUG_STACK 54 | .endm 55 | 56 | #endif 57 | #endif 58 | -------------------------------------------------------------------------------- /igzip/aarch64/igzip_multibinary_arm64.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2019 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "aarch64_multibinary.h" 31 | 32 | 33 | mbin_interface isal_deflate_icf_body_lvl1 34 | mbin_interface isal_deflate_icf_body_lvl2 35 | mbin_interface isal_deflate_icf_body_lvl3 36 | mbin_interface isal_deflate_icf_finish_lvl1 37 | mbin_interface isal_deflate_icf_finish_lvl2 38 | mbin_interface isal_deflate_icf_finish_lvl3 39 | mbin_interface isal_update_histogram 40 | mbin_interface encode_deflate_icf 41 | mbin_interface set_long_icf_fg 42 | mbin_interface gen_icf_map_lh1 43 | mbin_interface isal_deflate_hash_lvl0 44 | mbin_interface isal_deflate_hash_lvl1 45 | mbin_interface isal_deflate_hash_lvl2 46 | mbin_interface isal_deflate_hash_lvl3 47 | 48 | mbin_interface isal_deflate_body 49 | mbin_interface isal_deflate_finish 50 | mbin_interface isal_adler32 51 | -------------------------------------------------------------------------------- /include/mem_routines.h: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include 31 | 32 | /** 33 | * @file mem_routines.h 34 | * @brief Interface to storage mem operations 35 | * 36 | * Defines the interface for vector versions of common memory functions. 37 | */ 38 | 39 | #ifndef _MEM_ROUTINES_H_ 40 | #define _MEM_ROUTINES_H_ 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /** 47 | * @brief Detect if a memory region is all zero 48 | * 49 | * Zero detect function with optimizations for large blocks > 128 bytes 50 | * 51 | * @param mem Pointer to memory region to test 52 | * @param len Length of region in bytes 53 | * @returns 0 - region is all zeros 54 | * other - region has non zero bytes 55 | */ 56 | int 57 | isal_zero_detect(void *mem, size_t len); 58 | 59 | #ifdef __cplusplus 60 | } 61 | #endif 62 | 63 | #endif // _MEM_ROUTINES_H_ 64 | -------------------------------------------------------------------------------- /mem/mem_zero_detect_perf.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include 31 | #include 32 | #include 33 | #include "mem_routines.h" 34 | #include "test.h" 35 | 36 | #define TEST_LEN 8 * 1024 37 | #define TEST_TYPE_STR "_warm" 38 | 39 | int 40 | main(int argc, char *argv[]) 41 | { 42 | void *buf; 43 | struct perf start; 44 | 45 | printf("Test mem_zero_detect_perf %d bytes\n", TEST_LEN); 46 | 47 | if (posix_memalign(&buf, 64, TEST_LEN)) { 48 | printf("alloc error: Fail"); 49 | return -1; 50 | } 51 | 52 | memset(buf, 0, TEST_LEN); 53 | BENCHMARK(&start, BENCHMARK_TIME, isal_zero_detect(buf, TEST_LEN)); 54 | 55 | printf("mem_zero_detect_perf" TEST_TYPE_STR ": "); 56 | perf_print(start, (long long) TEST_LEN); 57 | 58 | aligned_free(buf); 59 | return 0; 60 | } 61 | -------------------------------------------------------------------------------- /igzip/bitbuf2.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %include "options.asm" 31 | %include "stdmac.asm" 32 | 33 | ; Assumes m_out_buf is a register 34 | ; Clobbers RCX 35 | ; code is clobbered 36 | ; write_bits_always m_bits, m_bit_count, code, count, m_out_buf 37 | %macro write_bits 5 38 | %define %%m_bits %1 39 | %define %%m_bit_count %2 40 | %define %%code %3 41 | %define %%count %4 42 | %define %%m_out_buf %5 43 | 44 | SHLX %%code, %%code, %%m_bit_count 45 | 46 | or %%m_bits, %%code 47 | add %%m_bit_count, %%count 48 | 49 | mov [%%m_out_buf], %%m_bits 50 | mov rcx, %%m_bit_count 51 | shr rcx, 3 ; rcx = bytes 52 | add %%m_out_buf, rcx 53 | shl rcx, 3 ; rcx = bits 54 | and %%m_bit_count, 0x7 55 | 56 | SHRX %%m_bits, %%m_bits, rcx 57 | %endm 58 | 59 | %macro write_dword 2 60 | %define %%data %1d 61 | %define %%addr %2 62 | mov [%%addr], %%data 63 | add %%addr, 4 64 | %endm 65 | -------------------------------------------------------------------------------- /igzip/aarch64/bitbuf2_aarch64.h: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2019 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #ifndef __BITBUF2_AARCH64_H__ 31 | #define __BITBUF2_AARCH64_H__ 32 | #include "options_aarch64.h" 33 | 34 | #ifdef __ASSEMBLY__ 35 | .macro update_bits stream:req,code:req,code_len:req,m_bits:req,m_bit_count:req \ 36 | m_out_buf:req 37 | 38 | lsl x_\code,x_\code,x_\m_bit_count 39 | orr x_\m_bits,x_\code,x_\m_bits 40 | add x_\m_bit_count,x_\code_len,x_\m_bit_count 41 | 42 | str x_\m_bits,[x_\m_out_buf] 43 | 44 | and w_\code,w_\m_bit_count,-8 45 | lsr w_\code_len,w_\m_bit_count,3 46 | add x_\m_out_buf,x_\m_out_buf,w_\code_len,uxtw 47 | sub w_\m_bit_count,w_\m_bit_count,w_\code 48 | lsr x_\m_bits,x_\m_bits,x_\code 49 | 50 | str x_\m_bits,[stream,_internal_state_bitbuf_m_bits] 51 | str w_\m_bit_count,[stream,_internal_state_bitbuf_m_bit_count] 52 | str x_\m_out_buf,[stream,_internal_state_bitbuf_m_out_buf] 53 | 54 | 55 | .endm 56 | #endif 57 | #endif 58 | -------------------------------------------------------------------------------- /erasure_code/ppc64le/gf_vect_mul_vsx.c: -------------------------------------------------------------------------------- 1 | #include "ec_base_vsx.h" 2 | 3 | /* 4 | * Same as gf_vect_mul_base in "ec_base.h" but without the size restriction. 5 | */ 6 | static void 7 | _gf_vect_mul_base(int len, unsigned char *a, unsigned char *src, unsigned char *dest) 8 | { 9 | // 2nd element of table array is ref value used to fill it in 10 | unsigned char c = a[1]; 11 | 12 | while (len-- > 0) 13 | *dest++ = gf_mul(c, *src++); 14 | return; 15 | } 16 | 17 | void 18 | gf_vect_mul_vsx(int len, unsigned char *gftbl, unsigned char *src, unsigned char *dest) 19 | { 20 | unsigned char *s, *t0; 21 | vector unsigned char vX1, vY1; 22 | vector unsigned char vX2, vY2; 23 | vector unsigned char vX3, vY3; 24 | vector unsigned char vX4, vY4; 25 | vector unsigned char vX5, vY5; 26 | vector unsigned char vX6, vY6; 27 | vector unsigned char vX7, vY7; 28 | vector unsigned char vX8, vY8; 29 | vector unsigned char vhi0, vlo0; 30 | int i, head; 31 | 32 | s = (unsigned char *) src; 33 | t0 = (unsigned char *) dest; 34 | 35 | head = len % 128; 36 | if (head != 0) { 37 | _gf_vect_mul_base(head, gftbl, src, dest); 38 | } 39 | 40 | vlo0 = EC_vec_xl(0, gftbl); 41 | vhi0 = EC_vec_xl(16, gftbl); 42 | 43 | for (i = head; i < len - 127; i += 128) { 44 | vX1 = vec_xl(0, s + i); 45 | vX2 = vec_xl(16, s + i); 46 | vX3 = vec_xl(32, s + i); 47 | vX4 = vec_xl(48, s + i); 48 | 49 | vX5 = vec_xl(64, s + i); 50 | vX6 = vec_xl(80, s + i); 51 | vX7 = vec_xl(96, s + i); 52 | vX8 = vec_xl(112, s + i); 53 | 54 | vY1 = EC_vec_permxor(vhi0, vlo0, vX1); 55 | vY2 = EC_vec_permxor(vhi0, vlo0, vX2); 56 | vY3 = EC_vec_permxor(vhi0, vlo0, vX3); 57 | vY4 = EC_vec_permxor(vhi0, vlo0, vX4); 58 | 59 | vY5 = EC_vec_permxor(vhi0, vlo0, vX5); 60 | vY6 = EC_vec_permxor(vhi0, vlo0, vX6); 61 | vY7 = EC_vec_permxor(vhi0, vlo0, vX7); 62 | vY8 = EC_vec_permxor(vhi0, vlo0, vX8); 63 | 64 | vec_xst(vY1, 0, t0 + i); 65 | vec_xst(vY2, 16, t0 + i); 66 | vec_xst(vY3, 32, t0 + i); 67 | vec_xst(vY4, 48, t0 + i); 68 | 69 | vec_xst(vY5, 64, t0 + i); 70 | vec_xst(vY6, 80, t0 + i); 71 | vec_xst(vY7, 96, t0 + i); 72 | vec_xst(vY8, 112, t0 + i); 73 | } 74 | 75 | return; 76 | } 77 | -------------------------------------------------------------------------------- /raid/riscv64/raid_multibinary_riscv64_dispatcher.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright (c) 2025 Institute of Software Chinese Academy of Sciences (ISCAS). 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of ISCAS nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | #include "riscv64_multibinary.h" 30 | 31 | extern int 32 | pq_gen_rvv(int vects, int len, void **array); 33 | extern int 34 | pq_gen_base(int vects, int len, void **array); 35 | extern int 36 | xor_gen_rvv(int vects, int len, void **array); 37 | extern int 38 | xor_gen_base(int vects, int len, void **array); 39 | 40 | DEFINE_INTERFACE_DISPATCHER(pq_gen) 41 | { 42 | #if HAVE_RVV 43 | const unsigned long hwcap = getauxval(AT_HWCAP); 44 | if (hwcap & HWCAP_RV('V')) 45 | return pq_gen_rvv; 46 | else 47 | #endif 48 | return pq_gen_base; 49 | } 50 | 51 | DEFINE_INTERFACE_DISPATCHER(xor_gen) 52 | { 53 | #if HAVE_RVV 54 | const unsigned long hwcap = getauxval(AT_HWCAP); 55 | if (hwcap & HWCAP_RV('V')) 56 | return xor_gen_rvv; 57 | else 58 | #endif 59 | return xor_gen_base; 60 | } 61 | -------------------------------------------------------------------------------- /crc/crc64_jones_norm_by8.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_jones_norm_by8 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk1: 34 | DQ 0x4445ed2750017038 35 | rk2: 36 | DQ 0x698b74157cfbd736 37 | rk3: 38 | DQ 0x0cfcfb5101c4b775 39 | rk4: 40 | DQ 0x65403fd47cbec866 41 | rk5: 42 | DQ 0x4445ed2750017038 43 | rk6: 44 | DQ 0x0000000000000000 45 | rk7: 46 | DQ 0xddf3eeb298be6cf8 47 | rk8: 48 | DQ 0xad93d23594c935a9 49 | rk9: 50 | DQ 0xd8dc208e2ba527b4 51 | rk10: 52 | DQ 0xf032cfec76bb2bc5 53 | rk11: 54 | DQ 0xb536044f357f4238 55 | rk12: 56 | DQ 0xfdbf104d938ba67a 57 | rk13: 58 | DQ 0xeeddad9297a843e7 59 | rk14: 60 | DQ 0x3550bce629466473 61 | rk15: 62 | DQ 0x4e501e58ca43d25e 63 | rk16: 64 | DQ 0x13c961588f27f643 65 | rk17: 66 | DQ 0x3b60d00dcb1099bc 67 | rk18: 68 | DQ 0x44bf1f468c53b9a3 69 | rk19: 70 | DQ 0x96f2236e317179ee 71 | rk20: 72 | DQ 0xf00839aa0dd64bac 73 | %endm 74 | 75 | %include "crc64_iso_norm_by8.asm" 76 | -------------------------------------------------------------------------------- /crc/crc64_jones_refl_by8.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_jones_refl_by8 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk1: 34 | DQ 0x381d0015c96f4444 35 | rk2: 36 | DQ 0xd9d7be7d505da32c 37 | rk3: 38 | DQ 0x768361524d29ed0b 39 | rk4: 40 | DQ 0xcc26fa7c57f8054c 41 | rk5: 42 | DQ 0x381d0015c96f4444 43 | rk6: 44 | DQ 0x0000000000000000 45 | rk7: 46 | DQ 0x3e6cfa329aef9f77 47 | rk8: 48 | DQ 0x2b5926535897936a 49 | rk9: 50 | DQ 0x5bc94ba8e2087636 51 | rk10: 52 | DQ 0x6cf09c8f37710b75 53 | rk11: 54 | DQ 0x3885fd59e440d95a 55 | rk12: 56 | DQ 0xbccba3936411fb7e 57 | rk13: 58 | DQ 0xe4dd0d81cbfce585 59 | rk14: 60 | DQ 0xb715e37b96ed8633 61 | rk15: 62 | DQ 0xf49784a634f014e4 63 | rk16: 64 | DQ 0xaf86efb16d9ab4fb 65 | rk17: 66 | DQ 0x7b3211a760160db8 67 | rk18: 68 | DQ 0xa062b2319d66692f 69 | rk19: 70 | DQ 0xef3d1d18ed889ed2 71 | rk20: 72 | DQ 0x6ba4d760ab38201e 73 | %endm 74 | 75 | %include "crc64_iso_refl_by8.asm" 76 | -------------------------------------------------------------------------------- /crc/crc64_rocksoft_norm_by8.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2023 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_rocksoft_norm_by8 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk1: 34 | DQ 0x6b08c948f0dd2f08 35 | rk2: 36 | DQ 0x08578ba97f0476ae 37 | rk3: 38 | DQ 0x769362f0dbe943f4 39 | rk4: 40 | DQ 0x0473f99cf02ca70a 41 | rk5: 42 | DQ 0x6b08c948f0dd2f08 43 | rk6: 44 | DQ 0x0000000000000000 45 | rk7: 46 | DQ 0xddf3eeb298be6fc8 47 | rk8: 48 | DQ 0xad93d23594c93659 49 | rk9: 50 | DQ 0x7a76a57804234c52 51 | rk10: 52 | DQ 0xde8b0150a1beb44f 53 | rk11: 54 | DQ 0x12ecd688e48b5e58 55 | rk12: 56 | DQ 0x25d6d64f613c7e21 57 | rk13: 58 | DQ 0xe2801cfa1cf1efd9 59 | rk14: 60 | DQ 0xff203e17611aa1bc 61 | rk15: 62 | DQ 0xb4414e6a0488488c 63 | rk16: 64 | DQ 0xa42a30f19b669860 65 | rk17: 66 | DQ 0x0f3bfc1a64bec9d3 67 | rk18: 68 | DQ 0x1e0a4b0ee06bd77a 69 | rk19: 70 | DQ 0x644bd74573ba0f0e 71 | rk20: 72 | DQ 0x015e409234e87a1a 73 | %endm 74 | 75 | %include "crc64_iso_norm_by8.asm" 76 | -------------------------------------------------------------------------------- /crc/crc64_rocksoft_refl_by8.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2023 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_rocksoft_refl_by8 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk1: 34 | DQ 0x21e9761e252621ac 35 | rk2: 36 | DQ 0xeadc41fd2ba3d420 37 | rk3: 38 | DQ 0x5f852fb61e8d92dc 39 | rk4: 40 | DQ 0xa1ca681e733f9c40 41 | rk5: 42 | DQ 0x21e9761e252621ac 43 | rk6: 44 | DQ 0x0000000000000000 45 | rk7: 46 | DQ 0x27ecfa329aef9f77 47 | rk8: 48 | DQ 0x34d926535897936a 49 | rk9: 50 | DQ 0x946588403d4adcbc 51 | rk10: 52 | DQ 0xd083dd594d96319d 53 | rk11: 54 | DQ 0x34f5a24e22d66e90 55 | rk12: 56 | DQ 0x3c255f5ebc414423 57 | rk13: 58 | DQ 0x03363823e6e791e5 59 | rk14: 60 | DQ 0x7b0ab10dd0f809fe 61 | rk15: 62 | DQ 0x62242240ace5045a 63 | rk16: 64 | DQ 0x0c32cdb31e18a84a 65 | rk17: 66 | DQ 0xa3ffdc1fe8e82a8b 67 | rk18: 68 | DQ 0xbdd7ac0ee1a4a0f0 69 | rk19: 70 | DQ 0xe1e0bb9d45d7a44c 71 | rk20: 72 | DQ 0xb0bc2e589204f500 73 | %endm 74 | 75 | %include "crc64_iso_refl_by8.asm" 76 | -------------------------------------------------------------------------------- /igzip/aarch64/options_aarch64.h: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2019 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #ifndef __OPTIONS_AARCH64_H__ 31 | #define __OPTIONS_AARCH64_H__ 32 | 33 | 34 | #ifdef __ASSEMBLY__ 35 | 36 | /// Options:dir 37 | /// m - reschedule mem reads 38 | /// e b - bitbuff style 39 | /// t s x - compare style 40 | /// h - limit hash updates 41 | /// l - use longer huffman table 42 | /// f - fix cache read 43 | 44 | #ifndef IGZIP_HIST_SIZE 45 | #define IGZIP_HIST_SIZE (32 * 1024) 46 | #endif 47 | 48 | #if (IGZIP_HIST_SIZE > (32 * 1024)) 49 | #undef IGZIP_HIST_SIZE 50 | #define IGZIP_HIST_SIZE (32 * 1024) 51 | #endif 52 | 53 | #ifdef LONGER_HUFFTABLE 54 | #if (IGZIP_HIST_SIZE > 8 * 1024) 55 | #undef IGZIP_HIST_SIZE 56 | #define IGZIP_HIST_SIZE (8 * 1024) 57 | #endif 58 | #endif 59 | 60 | /// (h) limit hash update 61 | #define LIMIT_HASH_UPDATE 62 | 63 | /// (f) fix cache read problem 64 | #define FIX_CACHE_READ 65 | 66 | #define ISAL_DEF_MAX_HDR_SIZE 328 67 | 68 | 69 | 70 | #endif 71 | #endif 72 | -------------------------------------------------------------------------------- /crc/crc64_ecma_norm_by8.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_ecma_norm_by8 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk1 : 34 | DQ 0x05f5c3c7eb52fab6 35 | rk2 : 36 | DQ 0x4eb938a7d257740e 37 | rk3 : 38 | DQ 0x05cf79dea9ac37d6 39 | rk4 : 40 | DQ 0x001067e571d7d5c2 41 | rk5 : 42 | DQ 0x05f5c3c7eb52fab6 43 | rk6 : 44 | DQ 0x0000000000000000 45 | rk7 : 46 | DQ 0x578d29d06cc4f872 47 | rk8 : 48 | DQ 0x42f0e1eba9ea3693 49 | rk9 : 50 | DQ 0xe464f4df5fb60ac1 51 | rk10 : 52 | DQ 0xb649c5b35a759cf2 53 | rk11 : 54 | DQ 0x9af04e1eff82d0dd 55 | rk12 : 56 | DQ 0x6e82e609297f8fe8 57 | rk13 : 58 | DQ 0x097c516e98bd2e73 59 | rk14 : 60 | DQ 0x0b76477b31e22e7b 61 | rk15 : 62 | DQ 0x5f6843ca540df020 63 | rk16 : 64 | DQ 0xddf4b6981205b83f 65 | rk17 : 66 | DQ 0x54819d8713758b2c 67 | rk18 : 68 | DQ 0x4a6b90073eb0af5a 69 | rk19 : 70 | DQ 0x571bee0a227ef92b 71 | rk20 : 72 | DQ 0x44bef2a201b5200c 73 | %endm 74 | 75 | %include "crc64_iso_norm_by8.asm" 76 | -------------------------------------------------------------------------------- /crc/crc64_ecma_refl_by8.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_ecma_refl_by8 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk1 : 34 | DQ 0xdabe95afc7875f40 35 | rk2 : 36 | DQ 0xe05dd497ca393ae4 37 | rk3 : 38 | DQ 0xd7d86b2af73de740 39 | rk4 : 40 | DQ 0x8757d71d4fcc1000 41 | rk5 : 42 | DQ 0xdabe95afc7875f40 43 | rk6 : 44 | DQ 0x0000000000000000 45 | rk7 : 46 | DQ 0x9c3e466c172963d5 47 | rk8 : 48 | DQ 0x92d8af2baf0e1e84 49 | rk9 : 50 | DQ 0x947874de595052cb 51 | rk10 : 52 | DQ 0x9e735cb59b4724da 53 | rk11 : 54 | DQ 0xe4ce2cd55fea0037 55 | rk12 : 56 | DQ 0x2fe3fd2920ce82ec 57 | rk13 : 58 | DQ 0x0e31d519421a63a5 59 | rk14 : 60 | DQ 0x2e30203212cac325 61 | rk15 : 62 | DQ 0x081f6054a7842df4 63 | rk16 : 64 | DQ 0x6ae3efbb9dd441f3 65 | rk17 : 66 | DQ 0x69a35d91c3730254 67 | rk18 : 68 | DQ 0xb5ea1af9c013aca4 69 | rk19 : 70 | DQ 0x3be653a30fe1af51 71 | rk20 : 72 | DQ 0x60095b008a9efa44 73 | %endm 74 | 75 | %include "crc64_iso_refl_by8.asm" 76 | -------------------------------------------------------------------------------- /erasure_code/ppc64le/gf_2vect_mad_vsx.c: -------------------------------------------------------------------------------- 1 | #include "ec_base_vsx.h" 2 | 3 | void 4 | gf_2vect_mad_vsx(int len, int vec, int vec_i, unsigned char *gftbls, unsigned char *src, 5 | unsigned char **dest) 6 | { 7 | unsigned char *s, *t0, *t1; 8 | vector unsigned char vX1, vX2, vX3, vX4; 9 | vector unsigned char vY1, vY2, vY3, vY4; 10 | vector unsigned char vYD, vYE, vYF, vYG; 11 | vector unsigned char vhi0, vlo0, vhi1, vlo1; 12 | int i, head; 13 | 14 | s = (unsigned char *) src; 15 | t0 = (unsigned char *) dest[0]; 16 | t1 = (unsigned char *) dest[1]; 17 | 18 | head = len % 64; 19 | if (head != 0) { 20 | gf_vect_mad_base(head, vec, vec_i, &gftbls[0 * 32 * vec], src, t0); 21 | gf_vect_mad_base(head, vec, vec_i, &gftbls[1 * 32 * vec], src, t1); 22 | } 23 | 24 | vlo0 = EC_vec_xl(0, gftbls + (((0 * vec) << 5) + (vec_i << 5))); 25 | vhi0 = EC_vec_xl(16, gftbls + (((0 * vec) << 5) + (vec_i << 5))); 26 | vlo1 = EC_vec_xl(0, gftbls + (((1 * vec) << 5) + (vec_i << 5))); 27 | vhi1 = EC_vec_xl(16, gftbls + (((1 * vec) << 5) + (vec_i << 5))); 28 | 29 | for (i = head; i < len - 63; i += 64) { 30 | vX1 = vec_xl(0, s + i); 31 | vX2 = vec_xl(16, s + i); 32 | vX3 = vec_xl(32, s + i); 33 | vX4 = vec_xl(48, s + i); 34 | 35 | vY1 = vec_xl(0, t0 + i); 36 | vY2 = vec_xl(16, t0 + i); 37 | vYD = vec_xl(32, t0 + i); 38 | vYE = vec_xl(48, t0 + i); 39 | 40 | vY1 = vY1 ^ EC_vec_permxor(vhi0, vlo0, vX1); 41 | vY2 = vY2 ^ EC_vec_permxor(vhi0, vlo0, vX2); 42 | vYD = vYD ^ EC_vec_permxor(vhi0, vlo0, vX3); 43 | vYE = vYE ^ EC_vec_permxor(vhi0, vlo0, vX4); 44 | 45 | vY3 = vec_xl(0, t1 + i); 46 | vY4 = vec_xl(16, t1 + i); 47 | vYF = vec_xl(32, t1 + i); 48 | vYG = vec_xl(48, t1 + i); 49 | 50 | vec_xst(vY1, 0, t0 + i); 51 | vec_xst(vY2, 16, t0 + i); 52 | vec_xst(vYD, 32, t0 + i); 53 | vec_xst(vYE, 48, t0 + i); 54 | 55 | vY3 = vY3 ^ EC_vec_permxor(vhi1, vlo1, vX1); 56 | vY4 = vY4 ^ EC_vec_permxor(vhi1, vlo1, vX2); 57 | vYF = vYF ^ EC_vec_permxor(vhi1, vlo1, vX3); 58 | vYG = vYG ^ EC_vec_permxor(vhi1, vlo1, vX4); 59 | 60 | vec_xst(vY3, 0, t1 + i); 61 | vec_xst(vY4, 16, t1 + i); 62 | vec_xst(vYF, 32, t1 + i); 63 | vec_xst(vYG, 48, t1 + i); 64 | } 65 | return; 66 | } 67 | -------------------------------------------------------------------------------- /igzip/adler32_base.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2017 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include 31 | #include "igzip_checksums.h" 32 | 33 | uint32_t 34 | adler32_base(uint32_t adler32, uint8_t *start, uint64_t length) 35 | { 36 | uint8_t *end, *next = start; 37 | uint64_t A, B; 38 | 39 | A = adler32 & 0xffff; 40 | B = adler32 >> 16; 41 | 42 | while (length > MAX_ADLER_BUF) { 43 | end = next + MAX_ADLER_BUF; 44 | for (; next < end; next++) { 45 | A += *next; 46 | B += A; 47 | } 48 | 49 | A = A % ADLER_MOD; 50 | B = B % ADLER_MOD; 51 | length -= MAX_ADLER_BUF; 52 | } 53 | 54 | end = next + length; 55 | for (; next < end; next++) { 56 | A += *next; 57 | B += A; 58 | } 59 | 60 | A = A % ADLER_MOD; 61 | B = B % ADLER_MOD; 62 | 63 | return B << 16 | A; 64 | } 65 | -------------------------------------------------------------------------------- /crc/aarch64/crc32_iscsi_crc_ext.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2020 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | .text 31 | .align 6 32 | .arch armv8-a+crc 33 | 34 | 35 | #include "crc32_aarch64_common.h" 36 | BUF .req x0 37 | LEN .req x1 38 | wCRC .req w2 39 | data0 .req x4 40 | data1 .req x5 41 | data2 .req x6 42 | data3 .req x7 43 | wdata .req w3 44 | .macro crc32_u64 dst,src,data 45 | crc32cx \dst,\src,\data 46 | .endm 47 | .macro crc32_u32 dst,src,data 48 | crc32cw \dst,\src,\data 49 | .endm 50 | .macro crc32_u16 dst,src,data 51 | crc32ch \dst,\src,\data 52 | .endm 53 | .macro crc32_u8 dst,src,data 54 | crc32cb \dst,\src,\data 55 | .endm 56 | 57 | /** 58 | * uint32_t crc32_iscsi_crc_ext(const unsigned char *BUF, 59 | * uint64_t LEN,uint32_t wCRC); 60 | */ 61 | .global cdecl(crc32_iscsi_crc_ext) 62 | #ifndef __APPLE__ 63 | .type crc32_iscsi_crc_ext, %function 64 | #endif 65 | cdecl(crc32_iscsi_crc_ext): 66 | crc32_hw_common crc32c 67 | #ifndef __APPLE__ 68 | .size crc32_iscsi_crc_ext, .-crc32_iscsi_crc_ext 69 | #endif 70 | -------------------------------------------------------------------------------- /crc/aarch64/crc32_gzip_refl_crc_ext.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2020 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | .text 31 | .align 6 32 | .arch armv8-a+crc 33 | 34 | 35 | #include "crc32_aarch64_common.h" 36 | 37 | BUF .req x1 38 | LEN .req x2 39 | wCRC .req w0 40 | data0 .req x4 41 | data1 .req x5 42 | data2 .req x6 43 | data3 .req x7 44 | wdata .req w3 45 | .macro crc32_u64 dst,src,data 46 | crc32x \dst,\src,\data 47 | .endm 48 | .macro crc32_u32 dst,src,data 49 | crc32w \dst,\src,\data 50 | .endm 51 | .macro crc32_u16 dst,src,data 52 | crc32h \dst,\src,\data 53 | .endm 54 | .macro crc32_u8 dst,src,data 55 | crc32b \dst,\src,\data 56 | .endm 57 | 58 | /** 59 | * uint32_t crc32_gzip_refl_crc_ext(const unsigned char *BUF, 60 | * uint64_t LEN,uint32_t wCRC); 61 | */ 62 | .global cdecl(crc32_gzip_refl_crc_ext) 63 | #ifndef __APPLE__ 64 | .type crc32_gzip_refl_crc_ext, %function 65 | #endif 66 | cdecl(crc32_gzip_refl_crc_ext): 67 | crc32_hw_common crc32 68 | #ifndef __APPLE__ 69 | .size crc32_gzip_refl_crc_ext, .-crc32_gzip_refl_crc_ext 70 | #endif 71 | -------------------------------------------------------------------------------- /raid/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2011-2015 Intel Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Intel Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | include raid/aarch64/Makefile.am 31 | 32 | include raid/riscv64/Makefile.am 33 | 34 | lsrc += raid/raid_base.c 35 | 36 | lsrc_base_aliases += raid/raid_base_aliases.c 37 | lsrc_ppc64le += raid/raid_base_aliases.c 38 | 39 | lsrc_x86_64 += \ 40 | raid/xor_gen_sse.asm \ 41 | raid/pq_gen_sse.asm \ 42 | raid/xor_check_sse.asm \ 43 | raid/pq_check_sse.asm \ 44 | raid/pq_gen_avx.asm \ 45 | raid/xor_gen_avx.asm \ 46 | raid/pq_gen_avx2.asm \ 47 | raid/pq_gen_avx2_gfni.asm \ 48 | raid/xor_gen_avx512.asm \ 49 | raid/pq_gen_avx512.asm \ 50 | raid/pq_gen_avx512_gfni.asm \ 51 | raid/raid_multibinary.asm 52 | 53 | extern_hdrs += include/raid.h 54 | 55 | other_src += include/test.h 56 | 57 | check_tests += raid/xor_gen_test raid/pq_gen_test raid/xor_check_test raid/pq_check_test 58 | 59 | perf_tests += raid/xor_gen_perf raid/pq_gen_perf raid/raid_funcs_perf 60 | 61 | raid_raid_funcs_perf_LDFLAGS = -lpthread 62 | 63 | examples += raid/xor_example 64 | -------------------------------------------------------------------------------- /tests/fuzz/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2011-2017 Intel Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Intel Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################## 29 | 30 | src_include += -I $(srcdir)/tests/fuzz 31 | 32 | # AFL fuzz tests 33 | other_tests += tests/fuzz/igzip_fuzz_inflate 34 | igzip_fuzz_inflate: igzip_checked_inflate_fuzz_test.o 35 | igzip_fuzz_inflate: LDLIBS += -lz 36 | tests_fuzz_igzip_fuzz_inflate_LDADD = tests/fuzz/igzip_checked_inflate_fuzz_test.o libisal.la 37 | tests_fuzz_igzip_fuzz_inflate_LDFLAGS = -lz 38 | 39 | other_tests += tests/fuzz/igzip_dump_inflate_corpus 40 | tests_fuzz_igzip_dump_inflate_corpus_LDADD = libisal.la 41 | 42 | # LLVM fuzz tests 43 | llvm_fuzz_tests = tests/fuzz/igzip_simple_inflate_fuzz_test 44 | other_src += tests/fuzz/igzip_simple_inflate_fuzz_test.c 45 | 46 | llvm_fuzz_tests += tests/fuzz/igzip_checked_inflate_fuzz_test 47 | other_src += tests/fuzz/igzip_checked_inflate_fuzz_test.c 48 | 49 | llvm_fuzz_tests += tests/fuzz/igzip_simple_round_trip_fuzz_test 50 | other_src += tests/fuzz/igzip_simple_round_trip_fuzz_test.c 51 | 52 | igzip_checked_inflate_fuzz_test: LDLIBS += -lz 53 | -------------------------------------------------------------------------------- /crc/crc64_ecma_norm_by16_10.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2019 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_ecma_norm_by16_10 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk_1: dq 0x7f52691a60ddc70d 34 | rk_2: dq 0x7036b0389f6a0c82 35 | rk1: dq 0x05f5c3c7eb52fab6 36 | rk2: dq 0x4eb938a7d257740e 37 | rk3: dq 0x05cf79dea9ac37d6 38 | rk4: dq 0x001067e571d7d5c2 39 | rk5: dq 0x05f5c3c7eb52fab6 40 | rk6: dq 0x0000000000000000 41 | rk7: dq 0x578d29d06cc4f872 42 | rk8: dq 0x42f0e1eba9ea3693 43 | rk9: dq 0xe464f4df5fb60ac1 44 | rk10: dq 0xb649c5b35a759cf2 45 | rk11: dq 0x9af04e1eff82d0dd 46 | rk12: dq 0x6e82e609297f8fe8 47 | rk13: dq 0x097c516e98bd2e73 48 | rk14: dq 0x0b76477b31e22e7b 49 | rk15: dq 0x5f6843ca540df020 50 | rk16: dq 0xddf4b6981205b83f 51 | rk17: dq 0x54819d8713758b2c 52 | rk18: dq 0x4a6b90073eb0af5a 53 | rk19: dq 0x571bee0a227ef92b 54 | rk20: dq 0x44bef2a201b5200c 55 | rk_1b: dq 0x05f5c3c7eb52fab6 56 | rk_2b: dq 0x4eb938a7d257740e 57 | dq 0x0000000000000000 58 | dq 0x0000000000000000 59 | %endm 60 | 61 | %include "crc64_iso_norm_by16_10.asm" 62 | -------------------------------------------------------------------------------- /crc/crc64_ecma_refl_by16_10.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2019 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_ecma_refl_by16_10 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk_1: dq 0xf31fd9271e228b79 34 | rk_2: dq 0x8260adf2381ad81c 35 | rk1: dq 0xdabe95afc7875f40 36 | rk2: dq 0xe05dd497ca393ae4 37 | rk3: dq 0xd7d86b2af73de740 38 | rk4: dq 0x8757d71d4fcc1000 39 | rk5: dq 0xdabe95afc7875f40 40 | rk6: dq 0x0000000000000000 41 | rk7: dq 0x9c3e466c172963d5 42 | rk8: dq 0x92d8af2baf0e1e84 43 | rk9: dq 0x947874de595052cb 44 | rk10: dq 0x9e735cb59b4724da 45 | rk11: dq 0xe4ce2cd55fea0037 46 | rk12: dq 0x2fe3fd2920ce82ec 47 | rk13: dq 0x0e31d519421a63a5 48 | rk14: dq 0x2e30203212cac325 49 | rk15: dq 0x081f6054a7842df4 50 | rk16: dq 0x6ae3efbb9dd441f3 51 | rk17: dq 0x69a35d91c3730254 52 | rk18: dq 0xb5ea1af9c013aca4 53 | rk19: dq 0x3be653a30fe1af51 54 | rk20: dq 0x60095b008a9efa44 55 | rk_1b: dq 0xdabe95afc7875f40 56 | rk_2b: dq 0xe05dd497ca393ae4 57 | dq 0x0000000000000000 58 | dq 0x0000000000000000 59 | %endm 60 | 61 | %include "crc64_iso_refl_by16_10.asm" 62 | -------------------------------------------------------------------------------- /crc/crc64_jones_norm_by16_10.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2019 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_jones_norm_by16_10 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk_1: dq 0x44ff5212394b1c52 34 | rk_2: dq 0x956d6cb0582122b2 35 | rk1: dq 0x4445ed2750017038 36 | rk2: dq 0x698b74157cfbd736 37 | rk3: dq 0x0cfcfb5101c4b775 38 | rk4: dq 0x65403fd47cbec866 39 | rk5: dq 0x4445ed2750017038 40 | rk6: dq 0x0000000000000000 41 | rk7: dq 0xddf3eeb298be6cf8 42 | rk8: dq 0xad93d23594c935a9 43 | rk9: dq 0xd8dc208e2ba527b4 44 | rk10: dq 0xf032cfec76bb2bc5 45 | rk11: dq 0xb536044f357f4238 46 | rk12: dq 0xfdbf104d938ba67a 47 | rk13: dq 0xeeddad9297a843e7 48 | rk14: dq 0x3550bce629466473 49 | rk15: dq 0x4e501e58ca43d25e 50 | rk16: dq 0x13c961588f27f643 51 | rk17: dq 0x3b60d00dcb1099bc 52 | rk18: dq 0x44bf1f468c53b9a3 53 | rk19: dq 0x96f2236e317179ee 54 | rk20: dq 0xf00839aa0dd64bac 55 | rk_1b: dq 0x4445ed2750017038 56 | rk_2b: dq 0x698b74157cfbd736 57 | dq 0x0000000000000000 58 | dq 0x0000000000000000 59 | %endm 60 | 61 | %include "crc64_iso_norm_by16_10.asm" 62 | -------------------------------------------------------------------------------- /crc/crc64_jones_refl_by16_10.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2019 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_jones_refl_by16_10 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk_1: dq 0x9471a5389095fe44 34 | rk_2: dq 0x9a8908341a6d6d52 35 | rk1: dq 0x381d0015c96f4444 36 | rk2: dq 0xd9d7be7d505da32c 37 | rk3: dq 0x768361524d29ed0b 38 | rk4: dq 0xcc26fa7c57f8054c 39 | rk5: dq 0x381d0015c96f4444 40 | rk6: dq 0x0000000000000000 41 | rk7: dq 0x3e6cfa329aef9f77 42 | rk8: dq 0x2b5926535897936a 43 | rk9: dq 0x5bc94ba8e2087636 44 | rk10: dq 0x6cf09c8f37710b75 45 | rk11: dq 0x3885fd59e440d95a 46 | rk12: dq 0xbccba3936411fb7e 47 | rk13: dq 0xe4dd0d81cbfce585 48 | rk14: dq 0xb715e37b96ed8633 49 | rk15: dq 0xf49784a634f014e4 50 | rk16: dq 0xaf86efb16d9ab4fb 51 | rk17: dq 0x7b3211a760160db8 52 | rk18: dq 0xa062b2319d66692f 53 | rk19: dq 0xef3d1d18ed889ed2 54 | rk20: dq 0x6ba4d760ab38201e 55 | rk_1b: dq 0x381d0015c96f4444 56 | rk_2b: dq 0xd9d7be7d505da32c 57 | dq 0x0000000000000000 58 | dq 0x0000000000000000 59 | %endm 60 | 61 | %include "crc64_iso_refl_by16_10.asm" 62 | -------------------------------------------------------------------------------- /crc/crc64_rocksoft_norm_by16_10.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2023 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_rocksoft_norm_by16_10 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk_1: dq 0x215befd5f6cab253 34 | rk_2: dq 0x7aa72c050f9667d8 35 | rk1: dq 0x6b08c948f0dd2f08 36 | rk2: dq 0x08578ba97f0476ae 37 | rk3: dq 0x769362f0dbe943f4 38 | rk4: dq 0x0473f99cf02ca70a 39 | rk5: dq 0x6b08c948f0dd2f08 40 | rk6: dq 0x0000000000000000 41 | rk7: dq 0xddf3eeb298be6fc8 42 | rk8: dq 0xad93d23594c93659 43 | rk9: dq 0x7a76a57804234c52 44 | rk10: dq 0xde8b0150a1beb44f 45 | rk11: dq 0x12ecd688e48b5e58 46 | rk12: dq 0x25d6d64f613c7e21 47 | rk13: dq 0xe2801cfa1cf1efd9 48 | rk14: dq 0xff203e17611aa1bc 49 | rk15: dq 0xb4414e6a0488488c 50 | rk16: dq 0xa42a30f19b669860 51 | rk17: dq 0x0f3bfc1a64bec9d3 52 | rk18: dq 0x1e0a4b0ee06bd77a 53 | rk19: dq 0x644bd74573ba0f0e 54 | rk20: dq 0x015e409234e87a1a 55 | rk_1b: dq 0x6b08c948f0dd2f08 56 | rk_2b: dq 0x08578ba97f0476ae 57 | dq 0x0000000000000000 58 | dq 0x0000000000000000 59 | %endm 60 | 61 | %include "crc64_iso_norm_by16_10.asm" 62 | -------------------------------------------------------------------------------- /crc/crc64_rocksoft_refl_by16_10.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2023 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | %define FUNCTION_NAME crc64_rocksoft_refl_by16_10 31 | %define USE_CONSTS 32 | %macro INCLUDE_CONSTS 0 33 | rk_1: dq 0xa043808c0f782663 34 | rk_2: dq 0x37ccd3e14069cabc 35 | rk1: dq 0x21e9761e252621ac 36 | rk2: dq 0xeadc41fd2ba3d420 37 | rk3: dq 0x5f852fb61e8d92dc 38 | rk4: dq 0xa1ca681e733f9c40 39 | rk5: dq 0x21e9761e252621ac 40 | rk6: dq 0x0000000000000000 41 | rk7: dq 0x27ecfa329aef9f77 42 | rk8: dq 0x34d926535897936a 43 | rk9: dq 0x946588403d4adcbc 44 | rk10: dq 0xd083dd594d96319d 45 | rk11: dq 0x34f5a24e22d66e90 46 | rk12: dq 0x3c255f5ebc414423 47 | rk13: dq 0x03363823e6e791e5 48 | rk14: dq 0x7b0ab10dd0f809fe 49 | rk15: dq 0x62242240ace5045a 50 | rk16: dq 0x0c32cdb31e18a84a 51 | rk17: dq 0xa3ffdc1fe8e82a8b 52 | rk18: dq 0xbdd7ac0ee1a4a0f0 53 | rk19: dq 0xe1e0bb9d45d7a44c 54 | rk20: dq 0xb0bc2e589204f500 55 | rk1_b: dq 0x21e9761e252621ac 56 | rk2_b: dq 0xeadc41fd2ba3d420 57 | dq 0x0000000000000000 58 | dq 0x0000000000000000 59 | %endm 60 | 61 | %include "crc64_iso_refl_by16_10.asm" 62 | -------------------------------------------------------------------------------- /crc/crc_simple_test.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2013 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include 31 | #include 32 | #include "crc.h" 33 | 34 | const uint16_t init_crc_16 = 0x1234; 35 | const uint16_t t10_dif_expected = 0x60b3; 36 | const uint32_t init_crc_32 = 0x12345678; 37 | const uint32_t ieee_expected = 0x2ceadbe3; 38 | 39 | int 40 | main(void) 41 | { 42 | unsigned char p_buf[48]; 43 | uint16_t t10_dif_computed; 44 | uint32_t ieee_computed; 45 | int i; 46 | 47 | for (i = 0; i < 48; i++) 48 | p_buf[i] = i; 49 | 50 | t10_dif_computed = crc16_t10dif(init_crc_16, p_buf, 48); 51 | 52 | if (t10_dif_computed != t10_dif_expected) 53 | printf("WRONG CRC-16(T10 DIF) value\n"); 54 | else 55 | printf("CORRECT CRC-16(T10 DIF) value\n"); 56 | 57 | ieee_computed = crc32_ieee(init_crc_32, p_buf, 48); 58 | 59 | if (ieee_computed != ieee_expected) 60 | printf("WRONG CRC-32(IEEE) value\n"); 61 | else 62 | printf("CORRECT CRC-32(IEEE) value\n"); 63 | 64 | return 0; 65 | } 66 | -------------------------------------------------------------------------------- /igzip/options.asm: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | default rel 31 | 32 | %ifndef __OPTIONS_ASM__ 33 | %define __OPTIONS_ASM__ 34 | 35 | ; Options:dir 36 | ; m - reschedule mem reads 37 | ; e b - bitbuff style 38 | ; t s x - compare style 39 | ; h - limit hash updates 40 | ; l - use longer huffman table 41 | ; f - fix cache read 42 | 43 | %ifndef IGZIP_HIST_SIZE 44 | %define IGZIP_HIST_SIZE (32 * 1024) 45 | %endif 46 | 47 | %if (IGZIP_HIST_SIZE > (32 * 1024)) 48 | %undef IGZIP_HIST_SIZE 49 | %define IGZIP_HIST_SIZE (32 * 1024) 50 | %endif 51 | 52 | %ifdef LONGER_HUFFTABLE 53 | %if (IGZIP_HIST_SIZE > 8 * 1024) 54 | %undef IGZIP_HIST_SIZE 55 | %define IGZIP_HIST_SIZE (8 * 1024) 56 | %endif 57 | %endif 58 | 59 | ; (h) limit hash update 60 | %define LIMIT_HASH_UPDATE 61 | 62 | ; (f) fix cache read problem 63 | %define FIX_CACHE_READ 64 | 65 | %define ISAL_DEF_MAX_HDR_SIZE 328 66 | 67 | %ifidn __OUTPUT_FORMAT__, elf64 68 | %ifndef __NASM_VER__ 69 | %define WRT_OPT wrt ..sym 70 | %else 71 | %define WRT_OPT 72 | %endif 73 | %else 74 | %define WRT_OPT 75 | %endif 76 | 77 | %endif ; ifndef __OPTIONS_ASM__ 78 | -------------------------------------------------------------------------------- /crc/aarch64/Makefile.am: -------------------------------------------------------------------------------- 1 | ######################################################################## 2 | # Copyright(c) 2020 Arm Corporation All rights reserved. 3 | # 4 | # Redistribution and use in source and binary forms, with or without 5 | # modification, are permitted provided that the following conditions 6 | # are met: 7 | # * Redistributions of source code must retain the above copyright 8 | # notice, this list of conditions and the following disclaimer. 9 | # * Redistributions in binary form must reproduce the above copyright 10 | # notice, this list of conditions and the following disclaimer in 11 | # the documentation and/or other materials provided with the 12 | # distribution. 13 | # * Neither the name of Arm Corporation nor the names of its 14 | # contributors may be used to endorse or promote products derived 15 | # from this software without specific prior written permission. 16 | # 17 | # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ######################################################################### 29 | 30 | lsrc_aarch64 += \ 31 | crc/aarch64/crc_multibinary_arm.S \ 32 | crc/aarch64/crc_aarch64_dispatcher.c 33 | 34 | lsrc_aarch64 += \ 35 | crc/aarch64/crc16_t10dif_pmull.S \ 36 | crc/aarch64/crc16_t10dif_copy_pmull.S \ 37 | crc/aarch64/crc32_ieee_norm_pmull.S \ 38 | crc/aarch64/crc64_ecma_refl_pmull.S \ 39 | crc/aarch64/crc64_ecma_norm_pmull.S \ 40 | crc/aarch64/crc64_iso_refl_pmull.S \ 41 | crc/aarch64/crc64_iso_norm_pmull.S \ 42 | crc/aarch64/crc64_jones_refl_pmull.S \ 43 | crc/aarch64/crc64_jones_norm_pmull.S \ 44 | crc/aarch64/crc64_rocksoft_refl_pmull.S \ 45 | crc/aarch64/crc64_rocksoft_norm_pmull.S 46 | 47 | 48 | #CRC32/CRC32C for micro-architecture 49 | lsrc_aarch64 += \ 50 | crc/aarch64/crc32_iscsi_refl_pmull.S \ 51 | crc/aarch64/crc32_gzip_refl_pmull.S \ 52 | crc/aarch64/crc32_iscsi_3crc_fold.S \ 53 | crc/aarch64/crc32_gzip_refl_3crc_fold.S \ 54 | crc/aarch64/crc32_iscsi_crc_ext.S \ 55 | crc/aarch64/crc32_gzip_refl_crc_ext.S \ 56 | crc/aarch64/crc32_mix_default.S \ 57 | crc/aarch64/crc32c_mix_default.S \ 58 | crc/aarch64/crc32_mix_neoverse_n1.S \ 59 | crc/aarch64/crc32c_mix_neoverse_n1.S 60 | 61 | -------------------------------------------------------------------------------- /crc/aarch64/crc32_mix_neoverse_n1.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2020 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | .text 31 | .align 6 32 | .arch armv8-a+crypto+crc 33 | 34 | #include "crc32_common_mix_neoverse_n1.S" 35 | .Lconstants: 36 | .octa 0x00000001c6e415960000000154442bd4 37 | .octa 0x00000000ccaa009e00000001751997d0 38 | .octa 0x00000001F701164100000001DB710641 39 | .quad 0x0000000163cd6124 40 | .quad 0x00000000FFFFFFFF 41 | .quad 0x000000001753ab84 42 | .macro crc32_u64 dst,src,data 43 | crc32x \dst,\src,\data 44 | .endm 45 | .macro crc32_u32 dst,src,data 46 | crc32w \dst,\src,\data 47 | .endm 48 | .macro crc32_u16 dst,src,data 49 | crc32h \dst,\src,\data 50 | .endm 51 | .macro crc32_u8 dst,src,data 52 | crc32b \dst,\src,\data 53 | .endm 54 | 55 | 56 | /** 57 | * uint32_t crc32_mix_neoverse_n1(uint CRC ,uint8_t * BUF, 58 | * size_t LEN) 59 | */ 60 | BUF .req x1 61 | LEN .req x2 62 | CRC .req x0 63 | wCRC .req w0 64 | .align 6 65 | .global cdecl(crc32_mix_neoverse_n1) 66 | #ifndef __APPLE__ 67 | .type crc32_mix_neoverse_n1, %function 68 | #endif 69 | cdecl(crc32_mix_neoverse_n1): 70 | crc32_common_mix crc32 71 | #ifndef __APPLE__ 72 | .size crc32_mix_neoverse_n1, .-crc32_mix_neoverse_n1 73 | #endif 74 | -------------------------------------------------------------------------------- /crc/aarch64/crc32c_mix_neoverse_n1.S: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2020 Arm Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Arm Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | .text 31 | .align 6 32 | .arch armv8-a+crypto+crc 33 | 34 | #include "crc32_common_mix_neoverse_n1.S" 35 | .Lconstants: 36 | .octa 0x000000009e4addf800000000740eef02 37 | .octa 0x000000014cd00bd600000000f20c0dfe 38 | .octa 0x00000000dea713f10000000105ec76f0 39 | .quad 0x00000000dd45aab8 40 | .quad 0x00000000FFFFFFFF 41 | .quad 0x000000009ef68d35 42 | 43 | .macro crc32_u64 dst,src,data 44 | crc32cx \dst,\src,\data 45 | .endm 46 | .macro crc32_u32 dst,src,data 47 | crc32cw \dst,\src,\data 48 | .endm 49 | .macro crc32_u16 dst,src,data 50 | crc32ch \dst,\src,\data 51 | .endm 52 | .macro crc32_u8 dst,src,data 53 | crc32cb \dst,\src,\data 54 | .endm 55 | /** 56 | * uint32_t crc32c_mix_neoverse_n1(uint8_t * BUF, 57 | * size_t LEN, uint CRC) 58 | */ 59 | BUF .req x0 60 | LEN .req x1 61 | CRC .req x2 62 | wCRC .req w2 63 | .align 6 64 | .global cdecl(crc32c_mix_neoverse_n1) 65 | #ifndef __APPLE__ 66 | .type crc32c_mix_neoverse_n1, %function 67 | #endif 68 | cdecl(crc32c_mix_neoverse_n1): 69 | crc32_common_mix crc32c 70 | #ifndef __APPLE__ 71 | .size crc32c_mix_neoverse_n1, .-crc32c_mix_neoverse_n1 72 | #endif 73 | -------------------------------------------------------------------------------- /erasure_code/gf_vect_gfni.inc: -------------------------------------------------------------------------------- 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 2 | ; Copyright(c) 2023 Intel Corporation All rights reserved. 3 | ; 4 | ; Redistribution and use in source and binary forms, with or without 5 | ; modification, are permitted provided that the following conditions 6 | ; are met: 7 | ; * Redistributions of source code must retain the above copyright 8 | ; notice, this list of conditions and the following disclaimer. 9 | ; * Redistributions in binary form must reproduce the above copyright 10 | ; notice, this list of conditions and the following disclaimer in 11 | ; the documentation and/or other materials provided with the 12 | ; distribution. 13 | ; * Neither the name of Intel Corporation nor the names of its 14 | ; contributors may be used to endorse or promote products derived 15 | ; from this software without specific prior written permission. 16 | ; 17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 29 | 30 | ; 31 | ; Multiply 1 source register to up to 6 different GF table registers 32 | ; and XOR the results to partial registers 33 | ; 34 | %macro GF_MUL_XOR 5-20 35 | %define %%ENCODING %1 36 | %define %%SRC %2 37 | %define %%GFTABLE1 %3 38 | %define %%TMP1 %4 39 | %define %%PARTIAL1 %5 40 | %define %%GFTABLE2 %6 41 | %define %%TMP2 %7 42 | %define %%PARTIAL2 %8 43 | %define %%GFTABLE3 %9 44 | %define %%TMP3 %10 45 | %define %%PARTIAL3 %11 46 | %define %%GFTABLE4 %12 47 | %define %%TMP4 %13 48 | %define %%PARTIAL4 %14 49 | %define %%GFTABLE5 %15 50 | %define %%TMP5 %16 51 | %define %%PARTIAL5 %17 52 | %define %%GFTABLE6 %18 53 | %define %%TMP6 %19 54 | %define %%PARTIAL6 %20 55 | 56 | %define %%N_BLOCKS ((%0 - 2) / 3) 57 | 58 | %assign %%I 1 59 | %rep %%N_BLOCKS 60 | vgf2p8affineqb %%TMP %+ %%I, %%SRC, %%GFTABLE %+ %%I, 0x00 61 | %assign %%I (%%I + 1) 62 | %endrep 63 | %assign %%I 1 64 | %rep %%N_BLOCKS 65 | %ifidn %%ENCODING, VEX 66 | vpxor %%PARTIAL %+ %%I, %%TMP %+ %%I 67 | %else 68 | vpxorq %%PARTIAL %+ %%I, %%TMP %+ %%I 69 | %endif 70 | %assign %%I (%%I + 1) 71 | %endrep 72 | %endmacro 73 | -------------------------------------------------------------------------------- /mem/mem_zero_detect_base.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2018 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include 31 | #include 32 | #include "unaligned.h" 33 | 34 | int 35 | mem_zero_detect_base(void *buf, size_t n) 36 | { 37 | uint8_t *c = buf; 38 | uintmax_t a = 0; 39 | 40 | // Check buffer in native machine width comparisons 41 | while (n >= sizeof(uintmax_t)) { 42 | n -= sizeof(uintmax_t); 43 | if (load_le_umax(c) != 0) 44 | return -1; 45 | c += sizeof(uintmax_t); 46 | } 47 | 48 | // Check remaining bytes 49 | switch (n) { 50 | case 7: 51 | a |= *c++; // fall through to case 6,5,4 52 | case 6: 53 | a |= *c++; // fall through to case 5,4 54 | case 5: 55 | a |= *c++; // fall through to case 4 56 | case 4: 57 | a |= load_le_u32(c); 58 | break; 59 | case 3: 60 | a |= *c++; // fall through to case 2 61 | case 2: 62 | a |= load_le_u16(c); 63 | break; 64 | case 1: 65 | a |= *c; 66 | break; 67 | } 68 | 69 | return (a == 0) ? 0 : -1; 70 | } 71 | -------------------------------------------------------------------------------- /erasure_code/ec_base_aliases.c: -------------------------------------------------------------------------------- 1 | /********************************************************************** 2 | Copyright(c) 2011-2017 Intel Corporation All rights reserved. 3 | 4 | Redistribution and use in source and binary forms, with or without 5 | modification, are permitted provided that the following conditions 6 | are met: 7 | * Redistributions of source code must retain the above copyright 8 | notice, this list of conditions and the following disclaimer. 9 | * Redistributions in binary form must reproduce the above copyright 10 | notice, this list of conditions and the following disclaimer in 11 | the documentation and/or other materials provided with the 12 | distribution. 13 | * Neither the name of Intel Corporation nor the names of its 14 | contributors may be used to endorse or promote products derived 15 | from this software without specific prior written permission. 16 | 17 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 | **********************************************************************/ 29 | 30 | #include "erasure_code.h" 31 | 32 | void 33 | gf_vect_dot_prod(int len, int vlen, unsigned char *v, unsigned char **src, unsigned char *dest) 34 | { 35 | gf_vect_dot_prod_base(len, vlen, v, src, dest); 36 | } 37 | 38 | void 39 | gf_vect_mad(int len, int vec, int vec_i, unsigned char *v, unsigned char *src, unsigned char *dest) 40 | { 41 | gf_vect_mad_base(len, vec, vec_i, v, src, dest); 42 | } 43 | 44 | void 45 | ec_encode_data(int len, int srcs, int dests, unsigned char *v, unsigned char **src, 46 | unsigned char **dest) 47 | { 48 | ec_encode_data_base(len, srcs, dests, v, src, dest); 49 | } 50 | 51 | void 52 | ec_encode_data_update(int len, int k, int rows, int vec_i, unsigned char *v, unsigned char *data, 53 | unsigned char **dest) 54 | { 55 | ec_encode_data_update_base(len, k, rows, vec_i, v, data, dest); 56 | } 57 | 58 | int 59 | gf_vect_mul(int len, unsigned char *a, void *src, void *dest) 60 | { 61 | return gf_vect_mul_base(len, a, (unsigned char *) src, (unsigned char *) dest); 62 | } 63 | 64 | void 65 | ec_init_tables(int k, int rows, unsigned char *a, unsigned char *g_tbls) 66 | { 67 | return ec_init_tables_base(k, rows, a, g_tbls); 68 | } 69 | -------------------------------------------------------------------------------- /igzip/shim/README.md: -------------------------------------------------------------------------------- 1 | # Shim Library for zlib API with ISA-L (Experimental) 2 | 3 | This library provides an experimental shim layer that implements the zlib API while utilizing the Intel® Storage Acceleration Library (ISA-L) for enhanced performance. It enables seamless integration of ISA-L's optimized compression and decompression routines into applications designed for the zlib interface. 4 | 5 | **Note:** This is an experimental feature and may not be suitable for all production environments without thorough testing. 6 | 7 | ## Features 8 | 9 | - **zlib API Compatibility**: Drop-in replacement for zlib with minimal code changes. 10 | - **ISA-L**: Leverages ISA-L for high-performance data compression and decompression. 11 | 12 | ## Requirements 13 | 14 | - **ISA-L**: Ensure ISA-L is installed and available on your system. 15 | 16 | ## Installation 17 | 18 | 1. Clone the repository: 19 | ```bash 20 | git clone https://github.com/intel/isa-l 21 | cd isa-l/igzip/shim 22 | ``` 23 | 24 | 2. Build isal-shim.so: 25 | ```bash 26 | mkdir build 27 | cd build 28 | 29 | cmake .. 30 | 31 | # Enable debug mode. 32 | cmake -DCMAKE_BUILD_TYPE=Debug .. 33 | 34 | # Specify the custom installation directory for ISA-L. 35 | cmake -DISAL_INSTALL_DIR=/path/to/isal/install/ .. 36 | 37 | make 38 | ``` 39 | 40 | ## Usage 41 | 42 | To use the ISA-L shim library with your application: 43 | 44 | 1. Use LD_PRELOAD 45 | ```bash 46 | LD_PRELOAD=/path/to/isa-l/shim/build/isal-shim.so ./app 47 | LD_PRELOAD=/path/to/isa-l/shim/build/isal-shim.so python test.py 48 | ``` 49 | 50 | 2. Set LD_PRELOAD environment variable 51 | ```bash 52 | export LD_PRELOAD=/path/to/isa-l/shim/build/isal-shim.so 53 | ./your_application 54 | ``` 55 | 56 | ## API Compatibility 57 | 58 | The API remains compatible with zlib for the supported functions listed in the "Intercepted Zlib Functions" section. For unsupported zlib functions, the system's zlib implementation will be used. 59 | 60 | ## Scope/Constraints 61 | 62 | This library is a drop-in replacement for zlib that utilizes Intel's Storage Acceleration Library (ISA-L) for improved compression/decompression performance. However, it has the following limitations: 63 | 64 | - **Platform Support**: Currently only tested and supported on Linux systems 65 | - **Function Interception**: Only intercepts specific zlib functions (see Intercepted Zlib Functions section below) 66 | - **API Compatibility**: While designed as a drop-in replacement, some zlib functions are not supported yet 67 | 68 | For production use, thorough testing in your specific environment is recommended before deployment. 69 | 70 | ## Intercepted Zlib Functions 71 | 72 | deflate/inflate and related functions 73 | - deflateInit, deflateInit2, deflateSetDictionary, deflate, deflateEnd, deflateSetHeader 74 | - inflateInit, inflateInit2, inflateSetDictionary, inflate, inflateEnd, inflateReset 75 | 76 | checksum functions 77 | - crc32, adler32 78 | 79 | utility functions 80 | - compress, uncompress 81 | - compress2, uncompress2 82 | --------------------------------------------------------------------------------