├── FW_VERSION ├── LICENSE ├── LICENSE_A ├── LICENSE_B ├── README.md ├── SECURITY.md ├── apps ├── capabilities │ ├── pse_base │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── pse_sram.overlay │ │ ├── sample.yaml │ │ └── src │ │ │ ├── main.c │ │ │ ├── sleep.c │ │ │ └── utility.c │ ├── pse_eclite_oob │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── sample.yaml │ │ └── src │ │ │ └── main.c │ └── pse_network_proxy │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── pse_sram.overlay │ │ ├── sample.yaml │ │ └── src │ │ └── main.c ├── ref_apps │ └── codec │ │ ├── capture │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── prj_single.conf │ │ ├── sample.yaml │ │ └── src │ │ │ └── main.c │ │ └── playback │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── prj_single.conf │ │ ├── sample.yaml │ │ └── src │ │ ├── main.c │ │ └── test_audio.h └── samples │ ├── base_fw │ ├── flexible_code_samples │ │ ├── ccm │ │ │ ├── CMakeLists.txt │ │ │ ├── README.rst │ │ │ ├── prj.conf │ │ │ ├── pse_sram.overlay │ │ │ ├── sample.yaml │ │ │ └── src │ │ │ │ ├── code_iccm.c │ │ │ │ ├── code_l2sram.c │ │ │ │ ├── code_tx_bss_data_split.c │ │ │ │ └── main.c │ │ └── l2sram │ │ │ ├── CMakeLists.txt │ │ │ ├── README.rst │ │ │ ├── prj.conf │ │ │ ├── pse_sram.overlay │ │ │ ├── sample.yaml │ │ │ └── src │ │ │ ├── code_iccm.c │ │ │ ├── code_l2sram.c │ │ │ ├── code_tx_bss_data_split.c │ │ │ └── main.c │ ├── heci │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── sample.yaml │ │ └── src │ │ │ ├── host_client │ │ │ ├── Makefile │ │ │ └── heci_sample_app.c │ │ │ ├── main.c │ │ │ └── smpl_client.h │ ├── pmc │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── resource_table.c │ │ ├── sample.yaml │ │ └── src │ │ │ └── main.c │ ├── power_management │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── sample.yaml │ │ └── src │ │ │ └── main.c │ ├── user_mode_samples │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── resource_table.c │ │ ├── sample.yaml │ │ ├── user_mode_apps │ │ │ ├── simple_app_example │ │ │ │ └── app0_simple_app_example.c │ │ │ └── sub_task_example │ │ │ │ └── app1_sub_task_example.c │ │ └── user_mode_services │ │ │ ├── common.h │ │ │ └── inter_service_comm │ │ │ ├── serv0_service_example.c │ │ │ └── serv1_service_example.c │ └── vnic │ │ ├── CMakeLists.txt │ │ ├── README.rst │ │ ├── prj.conf │ │ ├── sample.yaml │ │ └── src │ │ ├── host_client │ │ ├── Makefile │ │ └── udp_service.c │ │ ├── main.c │ │ ├── send_ping.c │ │ ├── sock_udp.c │ │ └── upd_arp.c │ └── drivers │ ├── can │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── dma │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── gpio │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── i2c │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── i2c_bme280 │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── i2s │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── prj_single.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── pwm │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── prj_single.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── qep │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── spi │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── spi_bme280 │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── tgpio │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── prj_single.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ ├── tsn │ ├── CMakeLists.txt │ ├── Kconfig │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ │ └── main.c │ └── uart │ ├── CMakeLists.txt │ ├── README.rst │ ├── prj.conf │ ├── sample.yaml │ └── src │ └── main.c ├── build.sh ├── docs └── Intel®-Programmable-Services-Engine-SDK-Get-Started-Guide.pdf ├── libs ├── LICENSE ├── VERSION.txt ├── libsedi_base.a └── libsedi_base_bm.a ├── scripts └── tag_checkout.sh ├── services ├── CMakeLists.txt ├── Kconfig ├── eclite_fw │ ├── CMakeLists.txt │ ├── Kconfig │ └── src │ │ ├── agents │ │ ├── eclite_dispatcher.c │ │ ├── eclite_hostcomm.c │ │ ├── eclite_opregion.c │ │ ├── eclite_service.c │ │ └── include │ │ │ ├── eclite_dispatcher.h │ │ │ ├── eclite_hostcomm.h │ │ │ ├── eclite_opregion.h │ │ │ └── eclite_service.h │ │ ├── drivers │ │ ├── battery_driver │ │ │ ├── bq40z40.c │ │ │ └── bq40z40.h │ │ ├── charger_driver │ │ │ ├── bq24610.c │ │ │ └── bq24610.h │ │ ├── fan_driver │ │ │ ├── fan.c │ │ │ └── fan.h │ │ ├── include │ │ │ ├── ccg.h │ │ │ ├── charger.h │ │ │ ├── fan.h │ │ │ ├── fulgauge.h │ │ │ └── thermal.h │ │ ├── thermal_driver │ │ │ ├── cpu.c │ │ │ ├── cpu.h │ │ │ ├── tmp102.c │ │ │ └── tmp102.h │ │ └── usbc_pd_driver │ │ │ ├── ccg.c │ │ │ └── ccg.h │ │ ├── ext │ │ └── pal │ │ │ ├── eclite_gpio.c │ │ │ ├── eclite_i2c.c │ │ │ ├── eclite_pmc.c │ │ │ ├── eclite_pwm.c │ │ │ ├── eclite_tacho.c │ │ │ └── include │ │ │ ├── common.h │ │ │ └── eclite_hw_interface.h │ │ ├── frameworks │ │ ├── charger_framework │ │ │ ├── charger_framework.c │ │ │ └── include │ │ │ │ └── charger_framework.h │ │ ├── device_framework │ │ │ ├── eclite_device.c │ │ │ └── include │ │ │ │ └── eclite_device.h │ │ ├── thermal_framework │ │ │ ├── include │ │ │ │ └── thermal_framework.h │ │ │ └── thermal_framework.c │ │ └── usbc_framework │ │ │ ├── include │ │ │ └── ucsi.h │ │ │ └── ucsi.c │ │ └── main │ │ ├── include │ │ └── platform.h │ │ └── platform.c ├── ehl-oob │ ├── CMakeLists.txt │ ├── Kconfig │ ├── adapter │ │ ├── CMakeLists.txt │ │ ├── adapter.c │ │ ├── adapter.h │ │ ├── azure_iot.c │ │ ├── azure_iot.h │ │ ├── telit.c │ │ ├── telit.h │ │ ├── thingsboard.c │ │ └── thingsboard.h │ ├── common │ │ ├── CMakeLists.txt │ │ ├── credentials.c │ │ ├── credentials.h │ │ ├── oob_errors.h │ │ ├── pse_app_framework.h │ │ └── utils.h │ ├── ehl │ │ ├── CMakeLists.txt │ │ ├── ehl-oob.c │ │ ├── ehl-oob.h │ │ └── main.c │ ├── mqtt_client │ │ ├── CMakeLists.txt │ │ ├── mqtt_client.c │ │ └── mqtt_client.h │ ├── pmc_client │ │ ├── CMakeLists.txt │ │ └── pmc_client.c │ ├── prj_sam_e70_xplained.conf │ ├── readme.md │ └── sec_bios_ipc │ │ ├── CMakeLists.txt │ │ ├── pse_oob_sec.c │ │ ├── pse_oob_sec.h │ │ ├── pse_oob_sec_base.h │ │ ├── pse_oob_sec_enum.h │ │ ├── pse_oob_sec_heci_client.c │ │ ├── pse_oob_sec_heci_client.h │ │ ├── pse_oob_sec_heci_client_internal.h │ │ ├── pse_oob_sec_internal.c │ │ ├── pse_oob_sec_internal.h │ │ ├── pse_oob_sec_status_code.h │ │ ├── unit_test_pse_oob_sec_internal.c │ │ └── unit_test_sideband_drng.c ├── fw_version │ ├── CMakeLists.txt │ ├── Kconfig │ ├── fw_version.c │ ├── fw_version.cmake │ └── include │ │ └── fw_version.h.in ├── sys_service │ ├── CMakeLists.txt │ ├── Kconfig │ ├── host_service │ │ ├── CMakeLists.txt │ │ ├── Kconfig │ │ ├── heci │ │ │ ├── CMakeLists.txt │ │ │ ├── Kconfig │ │ │ ├── heci.c │ │ │ ├── heci_dma.c │ │ │ ├── heci_dma.h │ │ │ ├── heci_internal.h │ │ │ ├── smhi_client.c │ │ │ └── smhi_client.h │ │ ├── host_ipc_service.c │ │ ├── host_service_common.h │ │ ├── include │ │ │ └── ipc_helper.h │ │ └── sys_mng.c │ ├── include │ │ ├── heci.h │ │ ├── heci.rst │ │ ├── host_ipc_service.h │ │ ├── index.rst │ │ ├── ipc.rst │ │ ├── pm_index.rst │ │ ├── pm_service.h │ │ ├── pmc_index.rst │ │ ├── pmc_service.h │ │ ├── pse_sys_service.h │ │ └── wol_service.h │ ├── pm_service │ │ ├── Kconfig │ │ └── pm_service.c │ ├── pm_syscall_handler.c │ ├── pmc_service │ │ ├── Kconfig │ │ ├── pmc_service.c │ │ └── pmc_service_common.h │ ├── resource_table.c │ ├── sys_service.c │ └── wol │ │ ├── Kconfig │ │ └── wol_service.c ├── tsn_network_service │ ├── CMakeLists.txt │ ├── Kconfig │ └── src │ │ ├── ip_region.h │ │ ├── mac_region.h │ │ ├── main.c │ │ ├── phyif_region.h │ │ └── tsn_region.h ├── user_app_framework │ ├── CMakeLists.txt │ ├── Kconfig │ ├── include │ │ └── user_app_framework │ │ │ ├── user_app_config.h │ │ │ ├── user_app_framework.h │ │ │ ├── user_app_fw.rst │ │ │ └── user_app_utils.h │ ├── non_user_mode_framework.c │ └── user_app_framework.c └── zephyr │ └── module.yml ├── tools ├── bin │ ├── LICENSE │ ├── VERSION.txt │ ├── aon_task.bin │ └── bringup.bin ├── capsule_script │ ├── OOBCapsule_template.json │ ├── azure.pem │ ├── azure_credentials.py │ ├── capsule_json_script.sh │ ├── ip_template.json │ ├── mac_template.json │ └── telit.pem ├── host │ └── trace_dump │ │ ├── readme.txt │ │ └── trace_dump.c ├── pse_image_tool │ ├── baremetal_image_parse.py │ ├── makefile │ ├── pse_image_tool.py │ ├── pse_template.xml │ └── zephyr_image_parse.py └── sdk_installer │ └── install_sdk_env_2.sh └── west.yml /FW_VERSION: -------------------------------------------------------------------------------- 1 | MAJOR = 0 2 | MINOR = 24 3 | PATCH = 0 4 | HW_IP = PSE_0_00 5 | PERSONA = Base 6 | CUSTOMER_TAG = None 7 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Source codes, libaries and binaries are distributed under different licenses. 2 | 3 | 1. All sources file are distributed under LICENSE_A 4 | 5 | 2. All binary files , libraries / files not released in source form are 6 | distributed under LICENSE_B 7 | -------------------------------------------------------------------------------- /LICENSE_B: -------------------------------------------------------------------------------- 1 | Copyright (c) Intel Corporation. 2 | 3 | Redistribution. Redistribution and use in binary form, without 4 | modification, are permitted provided that the following conditions are 5 | met: 6 | 7 | * Redistributions must reproduce the above copyright notice and the 8 | following disclaimer in the documentation and/or other materials 9 | provided with the distribution. 10 | * Neither the name of Intel Corporation nor the names of its suppliers 11 | may be used to endorse or promote products derived from this software 12 | without specific prior written permission. 13 | * No reverse engineering, decompilation, or disassembly of this software 14 | is permitted. 15 | 16 | Limited patent license. Intel Corporation grants a world-wide, 17 | royalty-free, non-exclusive license under patents it now or hereafter 18 | owns or controls to make, have made, use, import, offer to sell and 19 | sell ("Utilize") this software, but solely to the extent that any 20 | such patent is necessary to Utilize the software alone, or in 21 | combination with an operating system licensed under an approved Open 22 | Source license as listed by the Open Source Initiative at 23 | http://opensource.org/licenses. The patent license shall not apply to 24 | any other combinations which include this software. No hardware per 25 | se is licensed hereunder. 26 | 27 | DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 28 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, 29 | BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND 30 | FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 34 | OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 35 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 | TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 | USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 38 | DAMAGE. 39 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Intel Elkhart Lake PSE 2 | This is the primary repository that hosts firmware, services, sample 3 | applications and pre-built binaries for development of software for PSE. 4 | Elkhart Lake PSE relies on code from multple repositories fetched using 5 | west tool to compile the applications. 6 | Please refer to the documentation in docs folder for more details. 7 | 8 | ## License 9 | Source code and binaries are distributed under different licenses. 10 | Please read the licenses applicable to them carefully. 11 | 12 | ## Documentation 13 | Detailed documentation with dependencies, build environment setup 14 | and compilation steps have been provided in the docs folder. 15 | Please refer the documents to get started with PSE development. 16 | 17 | 18 | ### Steps for getting PSE code(requires west & related tools) 19 | 1. west init -m https://github.com/intel/pse-fw.git --mr main 20 | 2. west update 21 | 22 | # Steps for checking out a specific release tag 23 | 1. west init -m https://github.com/intel/pse-fw.git --mr main 24 | 2. west update 25 | 3. ./ehl_pse-fw/scripts/tag_checkout.sh 26 | 27 | ### Basic PSE Firmware Build Steps: 28 | 29 | 1. Building default hello world application: 30 | ./build.sh 31 | 2. Building any other app 32 | ./build.sh 33 | 3. Cleaninig 34 | ./build.sh clean 35 | 36 | Final generated binary has the name PSE_FW.bin which can be used to generate a 37 | signed firmware image for flashing. 38 | -------------------------------------------------------------------------------- /SECURITY.md: -------------------------------------------------------------------------------- 1 | # Security Policy 2 | Intel is committed to rapidly addressing security vulnerabilities affecting our customers and providing clear guidance on the solution, impact, severity and mitigation. 3 | 4 | ## Reporting a Vulnerability 5 | Please report any security vulnerabilities in this project utilizing the guidelines [here](https://www.intel.com/content/www/us/en/security-center/vulnerability-handling-guidelines.html). 6 | -------------------------------------------------------------------------------- /apps/capabilities/pse_base/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.8.2) 2 | 3 | #set(DTC_OVERLAY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/pse_sram.overlay) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | project(pse_base) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | target_sources(app PRIVATE src/utility.c) 10 | zephyr_sources_ifdef(CONFIG_PM_SERVICE src/sleep.c) 11 | 12 | -------------------------------------------------------------------------------- /apps/capabilities/pse_base/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_main_app: 2 | 3 | PSE Base and default image with Shell 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple application with shell for intel_ehl_crb board. 9 | 10 | 11 | Building and Running 12 | ******************** 13 | Standard build and run procdure defined for intel_ehl_crb target to be 14 | followed. 15 | 16 | Sample Output 17 | ============= 18 | 19 | .. code-block:: console 20 | 21 | FW VERSION: 0.8.0 22 | FW HW IP: PSE_0_00 23 | FW BUILD: DATE 09092019, TIME 141557, BY xxxxx@xxxxx 24 | 25 | PSE Base Application [intel_pse] 26 | 27 | 28 | uart:~$ fw_version 29 | 30 | FW VERSION: 0.8.0 31 | FW HW IP: PSE_0_00 32 | FW BUILD: DATE 09092019, TIME 141557, BY xxxxx@xxxxx 33 | 34 | -------------------------------------------------------------------------------- /apps/capabilities/pse_base/prj.conf: -------------------------------------------------------------------------------- 1 | # ** Base configuration ** 2 | CONFIG_PRINTK=y 3 | CONFIG_SHELL=y 4 | CONFIG_LOG=y 5 | CONFIG_LOG_STRDUP_MAX_STRING=80 6 | CONFIG_LOG_STRDUP_BUF_COUNT=32 7 | CONFIG_KERNEL_SHELL=y 8 | CONFIG_THREAD_MONITOR=y 9 | CONFIG_INIT_STACKS=y 10 | CONFIG_BOOT_BANNER=y 11 | CONFIG_THREAD_NAME=y 12 | CONFIG_DEVICE_SHELL=y 13 | CONFIG_SHELL_BACKEND_SERIAL_TX_RING_BUFFER_SIZE=64 14 | CONFIG_TIMESLICING=n 15 | 16 | # ** Start of ECLite section ** 17 | CONFIG_ECLITE_SERVICE=y 18 | CONFIG_ECLITE_LOG_LEVEL_ERR=y 19 | CONFIG_PWM=y 20 | CONFIG_PWM_SEDI=y 21 | CONFIG_PWM_LOG_LEVEL_ERR=y 22 | CONFIG_I2C=y 23 | CONFIG_I2C_SEDI=y 24 | CONFIG_I2C_LOG_LEVEL_ERR=y 25 | CONFIG_GPIO=y 26 | CONFIG_GPIO_SEDI=y 27 | CONFIG_GPIO_LOG_LEVEL_ERR=y 28 | 29 | CONFIG_ECLITE_I2C_SLAVE_NAME="I2C_2" 30 | CONFIG_ECLITE_CHARGING_FRAMEWORK=y 31 | CONFIG_THERMAL_ENABLE=y 32 | CONFIG_ECLITE_THERMAL_SENSOR_GPIO_PIN=11 33 | CONFIG_ECLITE_THERMAL_SENSOR_GPIO_NAME="GPIO_1" 34 | CONFIG_THERM_SEN_0_I2C_SLAVE_ADDR=72 35 | CONFIG_THERM_SEN_1_I2C_SLAVE_ADDR=73 36 | CONFIG_THERM_SEN_2_I2C_SLAVE_ADDR=74 37 | CONFIG_THERM_SEN_3_I2C_SLAVE_ADDR=75 38 | CONFIG_ECLITE_FAN_PWM_PIN=7 39 | CONFIG_ECLITE_FAN_PWM_NAME="PWM_1" 40 | CONFIG_ECLITE_FAN_TGPIO_PIN=6 41 | CONFIG_ECLITE_FAN_TGPIO_NAME="TGPIO_0" 42 | CONFIG_ECLITE_UCSI_I2C_SLAVE_NAME="I2C_7" 43 | CONFIG_ECLITE_UCSI_GPIO_NAME="GPIO_1" 44 | CONFIG_ECLITE_UCSI_GPIO_PIN=14 45 | CONFIG_ECLITE_UCSI_I2C_SLAVE_ADDR=8 46 | CONFIG_ECLITE_UCSI_FRAMEWORK=y 47 | CONFIG_ECLITE_BATTERY_BTP_GPIO_PIN=27 48 | CONFIG_ECLITE_CHG_GPIO_PIN=5 49 | CONFIG_ECLITE_CHG_CTRL_GPIO_PIN=5 50 | CONFIG_CHG_I2C_SLAVE_ADDR=12 51 | 52 | CONFIG_DMA=y 53 | CONFIG_DMA_SEDI=y 54 | 55 | # ** User Mode Configuration ** 56 | CONFIG_USERSPACE=y 57 | CONFIG_USER_APP_FRAMEWORK=y 58 | CONFIG_APP_FRAMEWORK_LOG=1 59 | CONFIG_NUM_USER_APP_AND_SERVICE=4 60 | CONFIG_HEAP_MEM_POOL_SIZE=16384 61 | CONFIG_IDLE_STACK_SIZE=1024 62 | CONFIG_MAX_NUM_DEVICE_LIST=7 63 | 64 | # ** Services ** 65 | CONFIG_PMC_SERVICE=y 66 | CONFIG_SYS_SERVICE=y 67 | CONFIG_PM_SERVICE=y 68 | CONFIG_PM=y 69 | CONFIG_PM_DEVICE=y 70 | CONFIG_PM_POLICY_RESIDENCY=y 71 | CONFIG_HECI=y 72 | CONFIG_HOST_SERVICE=y 73 | CONFIG_IPC_LOG_LEVEL_ERR=y 74 | CONFIG_HECI_LOG_LEVEL_ERR=y 75 | 76 | # ** WOL configuration ** 77 | CONFIG_WOL_SERVICE=y 78 | -------------------------------------------------------------------------------- /apps/capabilities/pse_base/pse_sram.overlay: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2019 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | / { 8 | 9 | l2sram: memory@60000000{ 10 | device_type = "memory"; 11 | compatible = "mmio-sram"; 12 | label = "l2sram"; 13 | reg = <0x60000000 0x100000>; 14 | }; 15 | 16 | iccm: memory@0{ 17 | device_type = "memory"; 18 | compatible = "mmio-sram"; 19 | label = "iccm"; 20 | reg = <0 0x00020000>; 21 | }; 22 | 23 | dccm: memory@20000000{ 24 | device_type = "memory"; 25 | compatible = "mmio-sram"; 26 | label = "dccm"; 27 | reg = <0x20020000 0x00040000>; 28 | }; 29 | 30 | aon_rf: memory@70000000{ 31 | device_type = "memory"; 32 | compatible = "mmio-sram"; 33 | label = "aonrf"; 34 | reg = <0x70000000 0x10000>; 35 | }; 36 | 37 | }; 38 | 39 | / { 40 | model = "INTEL PSE"; 41 | compatible = "intel,pse"; 42 | chosen { 43 | zephyr,flash = &iccm; 44 | zephyr,sram = &dccm; 45 | zephyr,l2sram = &l2sram; 46 | zephyr,iccm = &iccm; 47 | zephyr,dccm = &dccm; 48 | zephyr,aonrf = &aon_rf; 49 | }; 50 | }; 51 | -------------------------------------------------------------------------------- /apps/capabilities/pse_base/sample.yaml: -------------------------------------------------------------------------------- 1 | sample: 2 | description: PSE BASE APP. 3 | name: pse_base 4 | platforms: intel_pse 5 | common: 6 | tags: samples 7 | harness: console 8 | harness_config: 9 | type: one_line 10 | tests: 11 | singlethread: 12 | extra_args: CONF_FILE=prj_single.conf 13 | test: 14 | tags: samples 15 | 16 | -------------------------------------------------------------------------------- /apps/capabilities/pse_eclite_oob/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.8.2) 2 | 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(pse_eclite_oob) 5 | 6 | target_sources(app PRIVATE src/main.c) 7 | -------------------------------------------------------------------------------- /apps/capabilities/pse_eclite_oob/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_main_app: 2 | 3 | PSE Base with ECLITE And OOB without shell 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A application for EClite and OOB without shell. 9 | 10 | 11 | Building and Running 12 | ******************** 13 | Standard build and run procdure defined for EHL target to be 14 | followed. 15 | 16 | Sample Output 17 | ============= 18 | 19 | .. code-block:: console 20 | 21 | PSE ECLite and OOB services ehl_pse_crb 22 | -------------------------------------------------------------------------------- /apps/capabilities/pse_eclite_oob/sample.yaml: -------------------------------------------------------------------------------- 1 | sample: 2 | description: PSE ECLITE OOB APP without Shell. 3 | name: pse_eclite_oob 4 | platforms: ehl_pse_crb 5 | common: 6 | tags: samples 7 | harness: console 8 | harness_config: 9 | type: one_line 10 | tests: 11 | singlethread: 12 | extra_args: CONF_FILE=prj_single.conf 13 | test: 14 | tags: samples 15 | 16 | -------------------------------------------------------------------------------- /apps/capabilities/pse_eclite_oob/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief Sample Application for ECLite(Embedded Controller Lite) 10 | * and OOB(Out-of-Band Manageability) service. 11 | * This example demonstrates how to enable ECLite and 12 | * OOB service. 13 | * @{ 14 | */ 15 | 16 | /** 17 | * @brief How to Build sample application. 18 | * Please refer “IntelPSE_SDK_Get_Started_Guide” for more details on how to 19 | * build the sample codes. 20 | */ 21 | 22 | /** 23 | * @brief Hardware setup. 24 | * Please refer to the Intel(R) PSE SDK User Guide for more details 25 | * regarding hardware setup. 26 | */ 27 | 28 | /* Local Includes */ 29 | #include 30 | #include 31 | #include 32 | #include 33 | #include 34 | #include 35 | #include 36 | #include 37 | #include 38 | #include 39 | 40 | /* @brief firmware version 41 | * Display PSE firmware version 42 | */ 43 | static int cmd_fw_version(const struct shell *shell, size_t argc, char **argv) 44 | { 45 | 46 | ARG_UNUSED(shell); 47 | ARG_UNUSED(argc); 48 | ARG_UNUSED(argv); 49 | 50 | printk("\nFW VERSION: %s.%s.%s\n", FWVER_MAJOR, FWVER_MINOR, 51 | FWVER_PATCH); 52 | printk("FW HW IP: %s\n", FWVER_HW_IP); 53 | printk("FW BUILD: DATE %s, TIME %s, BY %s@%s\n", FWVER_BUILD_DATE, 54 | FWVER_BUILD_TIME, FWVER_WHOAMI, FWVER_HOST_NAME); 55 | 56 | printk("\n"); 57 | return 0; 58 | } 59 | 60 | SHELL_CMD_REGISTER(fw_version, NULL, "Display PSE FW version", cmd_fw_version); 61 | 62 | static void app_config(void) 63 | { 64 | sedi_pm_switch_core_clock(CLOCK_FREQ_100M); 65 | } 66 | 67 | /* @brief main function 68 | * Enable PSE ECLite and OOB services. For both services, 69 | * the service main thread will be invoked in cooperative mode 70 | * and service main entry will invoke even before application main function. 71 | */ 72 | void app_main(void *p1, void *p2, void *p3) 73 | { 74 | ARG_UNUSED(p1); 75 | ARG_UNUSED(p2); 76 | ARG_UNUSED(p3); 77 | printk("PSE ECLite and OOB services [%s]\n", CONFIG_BOARD); 78 | } 79 | 80 | DEFINE_USER_MODE_APP(3, USER_MODE_APP | K_PART_GLOBAL, app_main, 1024, NULL, 0, app_config); 81 | 82 | /** 83 | * @} 84 | */ 85 | -------------------------------------------------------------------------------- /apps/capabilities/pse_network_proxy/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | set(DTC_OVERLAY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/pse_sram.overlay) 6 | 7 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 8 | project(pse_network_proxy) 9 | 10 | target_sources(app PRIVATE src/main.c) 11 | -------------------------------------------------------------------------------- /apps/capabilities/pse_network_proxy/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_network_proxy: 2 | 3 | PSE NETWORK PROXY 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple ECMA-393 Network Proxy Technology sample for intel_pse board. 9 | 10 | Building and Running 11 | ******************** 12 | Standard build and run procedure defined for intel_pse target to be 13 | followed. 14 | 15 | Sample Output 16 | ============= 17 | 18 | .. code-block:: console 19 | 20 | ECMA-393 Network Proxy Technology test application 21 | -------------------------------------------------------------------------------- /apps/capabilities/pse_network_proxy/prj.conf: -------------------------------------------------------------------------------- 1 | # 2 | # Remove the symbol # which is placed in front of the following configurations 3 | # if you want to enable Network Proxy debug log 4 | # 5 | # CONFIG_NET_LOG=y 6 | # CONFIG_ETHERNET_LOG_LEVEL_DBG=y 7 | # CONFIG_NET_SHELL=y 8 | 9 | # 10 | # Enable Marvell 88E1512 Ethernet PHY driver 11 | # 12 | CONFIG_ETH_PHY=y 13 | CONFIG_ETH_PHY_USE_C22=y 14 | CONFIG_ETH_PHY_USE_C45=y 15 | CONFIG_ETH_PHY_MARVELL=y 16 | CONFIG_ETH_PHY_88E1512=y 17 | 18 | # 19 | # Enable DesginWare(R) Cores Ethernet Quality-of-Service (DWC EQOS) driver 20 | # 21 | CONFIG_ETH_DWC_EQOS=y 22 | CONFIG_ETH_DWC_EQOS_TX_QUEUES=2 23 | CONFIG_ETH_DWC_EQOS_RX_QUEUES=2 24 | CONFIG_ETH_DWC_EQOS_DMA_RING_SIZE=16 25 | CONFIG_ETH_DWC_EQOS_IRQ_MODE=y 26 | CONFIG_ETH_DWC_EQOS_INTEL_PSE_PLATDATA=y 27 | 28 | # Remove the symbol # which is placed in front of the following configurations 29 | # if you want to enable Flexible RX Parser on DWC EQOS Ethernet driver 30 | # CONFIG_ETH_DWC_EQOS_FLEX_RX_PARSER=y 31 | 32 | # 33 | # Remove the symbol # which is placed in front of the following configurations 34 | # if you want to enable Receive New API (Rx NAPI) on DWC EQOS Ethernet driver 35 | # 36 | #CONFIG_ETH_DWC_EQOS_RX_NAPI=y 37 | #CONFIG_ETH_DWC_EQOS_POLL_INTERVAL=10 38 | 39 | # 40 | # Enable DWC EQOS GbE Port 0 41 | # 42 | CONFIG_ETH_DWC_EQOS_0=y 43 | CONFIG_ETH_DWC_EQOS_0_NAME="ETH_DWC_EQOS_0" 44 | CONFIG_ETH_DWC_EQOS_0_AUTONEG=y 45 | CONFIG_ETH_DWC_EQOS_0_NETWORK_PROXY=y 46 | CONFIG_ETH_DWC_EQOS_0_EEE=y 47 | 48 | # 49 | # Networking 50 | # 51 | CONFIG_NETWORKING=y 52 | CONFIG_NET_L2_ETHERNET=y 53 | CONFIG_NET_IPV4=y 54 | CONFIG_NET_TCP=y 55 | #CONFIG_NET_TCP1=y 56 | CONFIG_NET_TCP_ISN_RFC6528=n 57 | 58 | # 59 | # DFU options 60 | # 61 | CONFIG_TEST_RANDOM_GENERATOR=y 62 | 63 | # 64 | # Other Kernel Object Options 65 | # 66 | CONFIG_HEAP_MEM_POOL_SIZE=256 67 | 68 | # 69 | # Work Queue Options 70 | # 71 | # CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096 72 | 73 | CONFIG_SYS_SERVICE=y 74 | CONFIG_HOST_SERVICE=y 75 | CONFIG_NUM_USER_APP_AND_SERVICE=4 76 | -------------------------------------------------------------------------------- /apps/capabilities/pse_network_proxy/pse_sram.overlay: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | / { 8 | l2sram: memory@60000000{ 9 | device_type = "memory"; 10 | compatible = "mmio-sram"; 11 | label = "l2sram"; 12 | reg = <0x60000000 0xe0000>; 13 | }; 14 | }; 15 | -------------------------------------------------------------------------------- /apps/capabilities/pse_network_proxy/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE NETWORK PROXY TECHNOLOGY TEST APP. 7 | name: pse network proxy 8 | platforms: intel_pse 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | test: 16 | tags: samples 17 | -------------------------------------------------------------------------------- /apps/capabilities/pse_network_proxy/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | */ 7 | 8 | /** 9 | * @file 10 | * @brief Sample Application for ECMA-393 Network Proxy Service. 11 | * This example demonstates how to setup a Network Proxy Agent on DesginWare(R) 12 | * Cores Ethernet Quality-of-Service (DWC EQOS) GbE Port 0 by enabling 13 | * appropriate configuration macros in prj.conf file. Besides, this sample app 14 | * shows how to add shared memory support by relocating L2SRAM in 15 | * pse_sram.overlay. Once Host enters low power mode (S0ix), Network Proxy Agent 16 | * will take the ownership of DWC EQOS GbE Port 0 and reacts to incoming 17 | * packets according to the handling decisions configured by Host. 18 | * @{ 19 | */ 20 | 21 | /** 22 | * @brief How to build sample application. 23 | * Please refer to section 6.0 in "Intel(R) Programmable Seriveces Engine SDK 24 | * Get Started Guide" for detailed instructions on how to build the sample 25 | * application. 26 | */ 27 | 28 | /** 29 | * @brief Hardware setup. 30 | * Please refer section 4.3.2.4 in "Intel(R) Programmable Seriveces Engine SDK 31 | * User Guide" for detailed instructions on how to setup the hardware for 32 | * Network Proxy service. 33 | */ 34 | 35 | /* Local Includes */ 36 | #include 37 | #include 38 | #include 39 | 40 | /* @brief main function 41 | * Switch ARM core clock frequency and High Bandwidth (HBW) clock frequency to 42 | * 100 MHz at the beginning of Network Proxy service. This step is to make sure 43 | * Network Proxy service meets low-power energy requirement. 44 | * 45 | * Note: 46 | * When Network Proxy service is integrated/combined with other PSE services, 47 | * e.g. EClite, user should develop centralized power management API to 48 | * coordinate ARM core clock frequency and HBW clock frequency switching. 49 | */ 50 | void main(void) 51 | { 52 | printk("PSE ECMA-393 Network Proxy Sample Application\n"); 53 | 54 | /* Switch ARM core clock frequency and HBW clock frequency to 100 MHz */ 55 | sedi_pm_switch_core_clock(CLOCK_FREQ_100M); 56 | } 57 | 58 | /** 59 | * @} 60 | */ 61 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/capture/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(capture) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/capture/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_codec: 2 | 3 | PSE I2S 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE Codec application example for ehl_pse_crb board. 9 | This test application perform tests for ALC codec functionalities- 10 | TX operation at 16KHz sampling frequency, 16-bit samples and Philips I2S mode 11 | 12 | Building and Running 13 | ******************** 14 | Standard build and run procdure defined for ehl_pse_crb target to be 15 | followed. 16 | 17 | .. code-block:: codec 18 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/capture/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_I2S=y 2 | CONFIG_I2S_SEDI=y 3 | CONFIG_DCACHE_I2S_DMA_WRITEBACK=y 4 | CONFIG_CACHE_DISABLE=n 5 | CONFIG_MAIN_STACK_SIZE=8096 6 | 7 | CONFIG_DMA=y 8 | CONFIG_DMA_SEDI=y 9 | 10 | CONFIG_I2C=y 11 | CONFIG_I2C_SEDI=y 12 | 13 | CONFIG_GPIO=y 14 | CONFIG_GPIO_SEDI=y 15 | 16 | CONFIG_AUDIO=y 17 | CONFIG_AUDIO_CODEC=y 18 | CONFIG_AUDIO_ALC_5660I=y 19 | CONFIG_AUDIO_CODEC_INIT_PRIORITY=60 20 | CONFIG_ALC_CODEC_ADDR=28 21 | CONFIG_ALC_CODEC_I2C_MASTER_NAME="I2C_5" 22 | CONFIG_ALC_CODEC_GPIO_NAME="GPIO_0" 23 | CONFIG_GPIO_CODEC_DET_PLUGIN=n 24 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/capture/prj_single.conf: -------------------------------------------------------------------------------- 1 | CONFIG_MULTITHREADING=y 2 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/capture/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE Codec test app. 7 | name: pse codec 8 | platforms: intel_pse 9 | common: 10 | tags: drivers samples 11 | depends_on: i2c i2s 12 | harness: i2s 13 | harness_config: 14 | type: one_line 15 | tests: 16 | singlethread: 17 | extra_args: CONF_FILE=prj_single.conf 18 | test: 19 | tags: samples 20 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/playback/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 5 | project(playback) 6 | 7 | target_sources(app PRIVATE src/main.c) 8 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/playback/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_codec: 2 | 3 | PSE I2S 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE Codec application example for ehl_pse_crb board. 9 | This test application perform tests for ALC codec functionalities- 10 | TX operation at 16KHz sampling frequency, 16-bit samples and Philips I2S mode 11 | 12 | Building and Running 13 | ******************** 14 | Standard build and run procdure defined for ehl_pse_crb target to be 15 | followed. 16 | 17 | .. code-block:: codec 18 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/playback/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_I2S=y 2 | CONFIG_I2S_SEDI=y 3 | CONFIG_DCACHE_I2S_DMA_WRITEBACK=y 4 | CONFIG_CACHE_DISABLE=n 5 | CONFIG_MAIN_STACK_SIZE=8096 6 | 7 | CONFIG_DMA=y 8 | CONFIG_DMA_SEDI=y 9 | 10 | CONFIG_I2C=y 11 | CONFIG_I2C_SEDI=y 12 | 13 | CONFIG_GPIO=y 14 | CONFIG_GPIO_SEDI=y 15 | 16 | CONFIG_AUDIO=y 17 | CONFIG_AUDIO_CODEC=y 18 | CONFIG_AUDIO_ALC_5660I=y 19 | CONFIG_AUDIO_CODEC_INIT_PRIORITY=60 20 | CONFIG_ALC_CODEC_ADDR=28 21 | CONFIG_ALC_CODEC_I2C_MASTER_NAME="I2C_5" 22 | CONFIG_ALC_CODEC_GPIO_NAME="GPIO_0" 23 | CONFIG_GPIO_CODEC_DET_PLUGIN=n 24 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/playback/prj_single.conf: -------------------------------------------------------------------------------- 1 | CONFIG_MULTITHREADING=y 2 | -------------------------------------------------------------------------------- /apps/ref_apps/codec/playback/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE Codec test app. 7 | name: pse codec 8 | platforms: intel_pse 9 | common: 10 | tags: drivers samples 11 | depends_on: i2c i2s 12 | harness: i2s 13 | harness_config: 14 | type: one_line 15 | tests: 16 | singlethread: 17 | extra_args: CONF_FILE=prj_single.conf 18 | test: 19 | tags: samples 20 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | set(DTC_OVERLAY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/pse_sram.overlay) 6 | 7 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 8 | project(code_relocation_ccm) 9 | 10 | 11 | target_sources(app PRIVATE src/main.c) 12 | target_sources(app PRIVATE src/code_l2sram.c) 13 | target_sources(app PRIVATE src/code_iccm.c) 14 | target_sources(app PRIVATE src/code_tx_bss_data_split.c) 15 | 16 | #This example will use ICCM and DCCM for Base FW and hence 17 | #can only use L2SRAM memory for relocating Apps code 18 | zephyr_code_relocate(src/code_l2sram.c L2SRAM) 19 | 20 | zephyr_code_relocate(src/code_tx_bss_data_split.c L2SRAM_TEXT) 21 | zephyr_code_relocate(src/code_tx_bss_data_split.c L2SRAM_BSS) 22 | zephyr_code_relocate(src/code_tx_bss_data_split.c L2SRAM_DATA) 23 | 24 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_code_relocation_ccm: 2 | 3 | Code Relocation CCM 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple example for PSE CODE RELOCATION CCM for intel_ehl board. 9 | The sample application will demonstrate how to relocate the application 10 | code text, data and bss section to available memory options, such as 11 | ICCM, DCCM, L2SRAM, and AONRF memory. 12 | This sample app will use ICCM and DCCM for Base FW. 13 | There is a BSS section of the DCCM, L2SRAM, and AONRF that is used 14 | especially for uninitialized variables. 15 | The sample app will print the address of a variable stored in data 16 | section and address of a varible stored in bss section for all the 17 | available memory options. 18 | CMakeLists file controls which memory is used for each of the helper C files 19 | All the instructions, initialized and uninitialized variables in a helper 20 | C file will be stored in the memory option mentioned in CMakeLists. 21 | 22 | Building and Running 23 | ******************** 24 | Standard build and run procedure defined for intel_pse target to be 25 | followed. 26 | 27 | Sample Output 28 | ============= 29 | 30 | .. code-block:: console 31 | 32 | main 33 | invoke function in L2SRAM.. 34 | function in L2SRAM at address:0x60000001 35 | var_in_data_section in L2SRAM at address:0x60000100 36 | var_in_bss in L2SRAM at address:0x60000108 37 | invoke function in CCM.. 38 | function in CCM at address:0x0000098d 39 | var_in_data_section in DCCM at address:0x20027cf8 40 | var_in_bss in DCCM at address:0x200205c0 41 | invoke function in split memory.. 42 | function in split mem at address:0x60000039 43 | var_in_data_section in split mem (L2SRAM) at address:0x60000104 44 | var_in_bss in split mem (L2SRAM) at address:0x6000010c 45 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_CODE_DATA_RELOCATION=y 2 | CONFIG_LOG=n 3 | CONFIG_EN_MPU_ICCM_MEM_ACCESS=y 4 | CONFIG_EN_MPU_DCCM_MEM_ACCESS=y 5 | CONFIG_EN_MPU_L2SRAM_MEM_ACCESS=y 6 | CONFIG_EN_L2SRAM_RELOCATION_MEM=y 7 | CONFIG_MPU_LOG_LEVEL=4 8 | CONFIG_FLASH_SIZE=128 9 | CONFIG_XIP=y 10 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/pse_sram.overlay: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2019 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | / { 8 | 9 | l2sram: memory@60000000{ 10 | device_type = "memory"; 11 | compatible = "mmio-sram"; 12 | label = "l2sram"; 13 | reg = <0x60000000 0x100000>; 14 | }; 15 | 16 | iccm: memory@0{ 17 | device_type = "memory"; 18 | compatible = "mmio-sram"; 19 | label = "iccm"; 20 | reg = <0 0x00020000>; 21 | }; 22 | 23 | dccm: memory@20000000{ 24 | device_type = "memory"; 25 | compatible = "mmio-sram"; 26 | label = "dccm"; 27 | reg = <0x20020000 0x00040000>; 28 | }; 29 | 30 | aon_rf: memory@70000000{ 31 | device_type = "memory"; 32 | compatible = "mmio-sram"; 33 | label = "aonrf"; 34 | reg = <0x70000000 0x10000>; 35 | }; 36 | 37 | }; 38 | 39 | / { 40 | model = "INTEL PSE"; 41 | compatible = "intel,pse"; 42 | chosen { 43 | zephyr,flash = &iccm; 44 | zephyr,sram = &dccm; 45 | zephyr,l2sram = &l2sram; 46 | zephyr,iccm = &iccm; 47 | zephyr,dccm = &dccm; 48 | zephyr,aonrf = &aon_rf; 49 | zephyr,console = &uart2; 50 | zephyr,shell-uart = &uart2; 51 | }; 52 | }; 53 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE CODE RELOCATION CCM EXAMPLE. 7 | name: code relocation ccm 8 | common: 9 | tags: samples 10 | harness: console 11 | harness_config: 12 | type: one_line 13 | tests: 14 | tags: samples 15 | platform_whitelist: pse_sram 16 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/src/code_iccm.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @brief An elementary function to use with the Closely Coupled Memory (CCM) 9 | * sample application (main.c) 10 | * 11 | * This function uses one initialized variable, one uninitialized variable, 12 | * and prints the address of the variables and the function itself. 13 | * Both variables will be stored in Data Closely Coupled Memory (DCCM). 14 | * The uninitialized variable will be stored in "BSS" section of the DCCM 15 | * that is used especially for uninitialized variables. 16 | */ 17 | 18 | /* Local Includes */ 19 | #include 20 | #include 21 | 22 | /* Initialized Variable to be stored in DCCM */ 23 | uint32_t dccm_var_in_data_section = 10U; 24 | /* Uninitialized Variable to be stored in the BSS section of the DCCM */ 25 | uint32_t dccm_var_in_bss; 26 | 27 | /* Invoke function in CCM */ 28 | void function_in_ccm(void) 29 | { 30 | printk("function in CCM at address:%p\n", function_in_ccm); 31 | printk("var_in_data_section in DCCM at address:%p\n", 32 | &dccm_var_in_data_section); 33 | printk("var_in_bss in DCCM at address:%p\n", &dccm_var_in_bss); 34 | } 35 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/src/code_l2sram.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @brief An elementary function to use with the Closely Coupled Memory (CCM) 9 | * sample application (main.c) 10 | * 11 | * This function uses one initialized variable, one uninitialized variable, 12 | * and prints the address of the variables and the function itself. 13 | * Both variables will be stored in L2 SRAM Cache (L2SRAM). 14 | * The uninitialized variable will be stored in "BSS" section of the L2SRAM 15 | * that is used especially for uninitialized variables. 16 | */ 17 | 18 | /* Local Includes */ 19 | #include 20 | #include 21 | 22 | /* Initialized Variable to be stored in L2SRAM */ 23 | uint32_t l2sram_var2_in_data_section = 10U; 24 | /* Uninitialized Variable to be stored in the BSS section of the L2SRAM */ 25 | uint32_t l2sram_var2_in_bss; 26 | 27 | /* Invoke function in L2SRAM */ 28 | void function_in_l2sram(void) 29 | { 30 | printk("function in L2SRAM at address:%p\n", function_in_l2sram); 31 | printk("var_in_data_section in L2SRAM at address:%p\n", 32 | &l2sram_var2_in_data_section); 33 | printk("var_in_bss in L2SRAM at address:%p\n", &l2sram_var2_in_bss); 34 | } 35 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/src/code_tx_bss_data_split.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @brief An elementary function to use with the Closely Coupled Memory (CCM) 9 | * sample application (main.c) 10 | * 11 | * This function demonstrates using two types of memory for one source file. 12 | * It uses one initialized variable, one uninitialized variable, 13 | * and prints the address of the varibles and the function itself. 14 | * The initialized variable will be stored in the L2SRAM Data section. 15 | * The uninitialized variable will be stored in "BSS" section of the 16 | * L2SRAM that is used especially for uninitialized variables. 17 | */ 18 | 19 | /* Local Includes */ 20 | #include 21 | #include 22 | 23 | /* Initialized Variable to be stored in L2SRAM Data section */ 24 | uint32_t split_var_in_data_section = 10U; 25 | /* Uninitialized Variable to be stored in the BSS section of the L2SRAM */ 26 | uint32_t split_var_in_bss; 27 | 28 | /* Invoke function in split memory. 29 | * Code text and bss sections are stored in L2SRAM 30 | * and data section in AONRF. 31 | */ 32 | void function_in_split_mem(void) 33 | { 34 | printk("function in split mem at address:%p\n", function_in_split_mem); 35 | printk("var_in_data_section in split mem (L2SRAM) at address:%p\n", 36 | &split_var_in_data_section); 37 | printk("var_in_bss in split mem (L2SRAM) at address:%p\n", 38 | &split_var_in_bss); 39 | } 40 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/ccm/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief Sample Application for code relocation 10 | * The sample application will demonstrate how to relocate the application 11 | * code text, data and bss section to available memory options, such as 12 | * ICCM, DCCM and L2SRAM memory. 13 | * This sample app will use ICCM and DCCM for Base FW. 14 | * There is a BSS section of the DCCM and L2SRAM that is used 15 | * especially for uninitialized variables. 16 | * Refer to the helper C files in this folder for the functions used 17 | * in the main function below. 18 | * The functions used below print the address of a variable stored in data 19 | * section and address of a varible stored in bss section of that memory. 20 | * CMakeLists file controls which memory is used for each of the helper C files 21 | * All the instructions, initialized and uninitialized variables in a helper 22 | * C file will be stored in the memory option mentioned in CMakeLists. 23 | * @{ 24 | */ 25 | 26 | /** 27 | * @brief How to Build sample application. 28 | * Please refer “IntelPSE_SDK_Get_Started_Guide” for more details how 29 | * to build the sample codes. 30 | */ 31 | 32 | /** 33 | * @brief Hardware setup. 34 | * There is no specific external hardware setup required for the flexible 35 | * code relocation sample application. 36 | */ 37 | 38 | /* Local Includes */ 39 | #include 40 | #include 41 | 42 | extern void function_in_ccm(void); 43 | extern void function_in_l2sram(void); 44 | extern void function_in_split_mem(void); 45 | 46 | /* @brief main function 47 | * Code relocation using CCM for Base FW 48 | * and L2SRAM for code text, data and bss sections. 49 | */ 50 | void main(void) 51 | { 52 | printk("%s\n", __func__); 53 | 54 | printk("invoke function in L2SRAM..\n"); 55 | function_in_l2sram(); 56 | 57 | printk("invoke function in CCM..\n"); 58 | function_in_ccm(); 59 | 60 | printk("invoke function in split memory..\n"); 61 | function_in_split_mem(); 62 | } 63 | 64 | /** 65 | * @} 66 | */ 67 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | set(DTC_OVERLAY_FILE ${CMAKE_CURRENT_SOURCE_DIR}/pse_sram.overlay) 6 | 7 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 8 | project(code_relocation_l2sram) 9 | 10 | 11 | target_sources(app PRIVATE src/main.c) 12 | target_sources(app PRIVATE src/code_l2sram.c) 13 | target_sources(app PRIVATE src/code_iccm.c) 14 | target_sources(app PRIVATE src/code_tx_bss_data_split.c) 15 | 16 | #This example will use L2SRAM for Base FW and hence 17 | #can only use CCM memory for relocating Apps code 18 | zephyr_code_relocate(src/code_iccm.c ICCM_TEXT) 19 | zephyr_code_relocate(src/code_iccm.c DCCM_DATA) 20 | zephyr_code_relocate(src/code_iccm.c DCCM_BSS) 21 | 22 | zephyr_code_relocate(src/code_tx_bss_data_split.c ICCM_TEXT) 23 | zephyr_code_relocate(src/code_tx_bss_data_split.c DCCM_DATA) 24 | zephyr_code_relocate(src/code_tx_bss_data_split.c DCCM_BSS) 25 | 26 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_code_relocation_l2sram: 2 | 3 | Code Relocation L2SRAM 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple example for PSE CODE RELOCATION L2SRAM for intel_ehl board. 9 | The sample application will demonstrate how to relocate the application 10 | code text, data and bss section to available memory options, such as 11 | ICCM, DCCM, L2SRAM, and AONRF memory. 12 | This sample app will use L2SRAM for Base FW. 13 | There is a BSS section of the DCCM, L2SRAM, and AONRF that is used 14 | especially for uninitialized variables. 15 | The sample app will print the address of a variable stored in data 16 | section and address of a varible stored in bss section for all the 17 | available memory options. 18 | CMakeLists file controls which memory is used for each of the helper C files 19 | All the instructions, initialized and uninitialized variables in a helper 20 | C file will be stored in the memory option mentioned in CMakeLists. 21 | 22 | Building and Running 23 | ******************** 24 | Standard build and run procedure defined for intel_pse target to be 25 | followed. 26 | 27 | Sample Output 28 | ============= 29 | 30 | .. code-block:: console 31 | 32 | main 33 | invoke function in L2SRAM.. 34 | function in L2SRAM at address:0x60000b75 35 | var_in_data_section in L2SRAM at address:0x60027af8 36 | var_in_bss in L2SRAM at address:0x600203c0 37 | invoke function in CCM.. 38 | function in CCM at address:0x00000001 39 | var_in_data_section in DCCM at address:0x20020000 40 | var_in_bss in DCCM at address:0x20020008 41 | invoke function in split memory.. 42 | function in split mem at address:0x00000039 43 | var_in_data_section in split mem (DCCM) at address:0x20020004 44 | var_in_bss in split mem (DCCM) at address:0x2002000c 45 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_CODE_DATA_RELOCATION=y 2 | CONFIG_LOG=n 3 | CONFIG_EN_MPU_ICCM_MEM_ACCESS=y 4 | CONFIG_EN_MPU_DCCM_MEM_ACCESS=y 5 | CONFIG_EN_MPU_L2SRAM_MEM_ACCESS=y 6 | CONFIG_EN_L2SRAM_RELOCATION_MEM=n 7 | CONFIG_MPU_LOG_LEVEL=4 8 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/pse_sram.overlay: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2019 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | / { 8 | 9 | l2sram: memory@60000000{ 10 | device_type = "memory"; 11 | compatible = "mmio-sram"; 12 | label = "l2sram"; 13 | reg = <0x60000000 0x100000>; 14 | }; 15 | 16 | iccm: memory@0{ 17 | device_type = "memory"; 18 | compatible = "mmio-sram"; 19 | label = "iccm"; 20 | reg = <0 0x00020000>; 21 | }; 22 | 23 | dccm: memory@20000000{ 24 | device_type = "memory"; 25 | compatible = "mmio-sram"; 26 | label = "dccm"; 27 | reg = <0x20020000 0x00040000>; 28 | }; 29 | 30 | aon_rf: memory@70000000{ 31 | device_type = "memory"; 32 | compatible = "mmio-sram"; 33 | label = "aonrf"; 34 | reg = <0x70000000 0x10000>; 35 | }; 36 | 37 | }; 38 | 39 | / { 40 | model = "INTEL PSE"; 41 | compatible = "intel,pse"; 42 | chosen { 43 | zephyr,sram = &l2sram; 44 | zephyr,l2sram = &l2sram; 45 | zephyr,iccm = &iccm; 46 | zephyr,dccm = &dccm; 47 | zephyr,aonrf = &aon_rf; 48 | zephyr,console = &uart2; 49 | zephyr,shell-uart = &uart2; 50 | }; 51 | }; 52 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE CODE RELOCATION L2SRAM EXAMPLE. 7 | name: code relocation l2sram 8 | common: 9 | tags: samples 10 | harness: console 11 | harness_config: 12 | type: one_line 13 | tests: 14 | tags: samples 15 | platform_whitelist: pse_sram 16 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/src/code_iccm.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @brief An elementary function to use with the L2 SRAM 9 | * sample application (main.c) 10 | * 11 | * This function uses one initialized variable, one uninitialized variable, 12 | * and prints the address of the variables and the function itself. 13 | * Both variables will be stored in Data Closely Coupled Memory (DCCM) 14 | * The uninitialized variable will be stored in "BSS" section of the DCCM 15 | * that is used especially for uninitialized variables. 16 | */ 17 | 18 | /* Local Includes */ 19 | #include 20 | #include 21 | 22 | /* Initialized Variable to be stored in DCCM */ 23 | uint32_t dccm_var_in_data_section = 10U; 24 | /* Uninitialized Variable to be stored in the BSS section of the DCCM */ 25 | uint32_t dccm_var_in_bss; 26 | 27 | /* Invoke function in CCM */ 28 | void function_in_ccm(void) 29 | { 30 | printk("function in CCM at address:%p\n", function_in_ccm); 31 | printk("var_in_data_section in DCCM at address:%p\n", 32 | &dccm_var_in_data_section); 33 | printk("var_in_bss in DCCM at address:%p\n", &dccm_var_in_bss); 34 | } 35 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/src/code_l2sram.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @brief An elementary function to use with the L2 SRAM 9 | * sample application (main.c) 10 | * 11 | * This function uses one initialized variable, one uninitialized variable, 12 | * and prints the address of the variables and the function itself. 13 | * Both variables will be stored in the L2 SRAM memory (L2SRAM). 14 | * The uninitialized variable will be stored in "BSS" section of the L2SRAM 15 | * that is used especially for uninitialized variables. 16 | */ 17 | 18 | /* Local Includes */ 19 | #include 20 | #include 21 | 22 | /* Initialized Variable to be stored in L2SRAM */ 23 | uint32_t l2sram_var2_in_data_section = 10U; 24 | /* Uninitialized Variable to be stored in the BSS section of the L2SRAM */ 25 | uint32_t l2sram_var2_in_bss; 26 | 27 | /* Invoke function in L2SRAM */ 28 | void function_in_l2sram(void) 29 | { 30 | printk("function in L2SRAM at address:%p\n", function_in_l2sram); 31 | printk("var_in_data_section in L2SRAM at address:%p\n", 32 | &l2sram_var2_in_data_section); 33 | printk("var_in_bss in L2SRAM at address:%p\n", &l2sram_var2_in_bss); 34 | } 35 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/src/code_tx_bss_data_split.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @brief An elementary function to use with the L2 SRAM 9 | * sample application (main.c) 10 | * 11 | * This function demonstrates using two types of memory for one source file. 12 | * It uses one initialized variable, one uninitialized variable, 13 | * and prints the address of the varibles and the function itself. 14 | * The initialized variable will be stored in DCCM Data section. 15 | * The uninitialized variable will be stored in "BSS" section of the 16 | * DCCM that is used especially for uninitialized variables. 17 | */ 18 | 19 | /* Local Includes */ 20 | #include 21 | #include 22 | 23 | /* Initialized Variable to be stored in data section of DCCM */ 24 | uint32_t split_var_in_data_section = 10U; 25 | /* Uninitialized Variable to be stored in the BSS section of DCCM */ 26 | uint32_t split_var_in_bss; 27 | 28 | /* Invoke function in split memory. 29 | * Code text, data and bss sections are stored in CCM 30 | */ 31 | void function_in_split_mem(void) 32 | { 33 | printk("function in split mem at address:%p\n", function_in_split_mem); 34 | printk("var_in_data_section in split mem (DCCM) at address:%p\n", 35 | &split_var_in_data_section); 36 | printk("var_in_bss in split mem (DCCM) at address:%p\n", 37 | &split_var_in_bss); 38 | } 39 | -------------------------------------------------------------------------------- /apps/samples/base_fw/flexible_code_samples/l2sram/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief Sample Application for code relocation 10 | * The sample application will demonstrate how to relocate the application 11 | * code text, data and bss section to available memory options, such as 12 | * ICCM, DCCM, and L2SRAM memory. 13 | * This sample app will use L2SRAM for Base FW. 14 | * There is a BSS section of the DCCM and L2SRAM that is used 15 | * especially for uninitialized variables. 16 | * Refer to the helper C files in this folder for the functions used 17 | * in the main function below. 18 | * The functions used below print the address of a variable stored in data 19 | * section and address of a varible stored in bss section of that memory. 20 | * CMakeLists file controls which memory is used for each of the helper C files 21 | * All the instructions, initialized and uninitialized variables in a helper 22 | * C file will be stored in the memory option mentioned in CMakeLists. 23 | * @{ 24 | */ 25 | 26 | /** 27 | * @brief How to Build sample application. 28 | * Please refer “IntelPSE_SDK_Get_Started_Guide” for more details how 29 | * to build the sample codes. 30 | */ 31 | 32 | /** 33 | * @brief Hardware setup. 34 | * There is no specific external hardware setup required for the flexible 35 | * code relocation sample application. 36 | */ 37 | 38 | /* Local Includes */ 39 | #include 40 | #include 41 | 42 | extern void function_in_ccm(void); 43 | extern void function_in_l2sram(void); 44 | extern void function_in_split_mem(void); 45 | 46 | /* @brief main function 47 | * Code relocation using L2SRAM for Base FW. 48 | * and CCM for code text, data and bss sections. 49 | */ 50 | void main(void) 51 | { 52 | printk("%s\n", __func__); 53 | 54 | printk("invoke function in L2SRAM..\n"); 55 | function_in_l2sram(); 56 | 57 | printk("invoke function in CCM..\n"); 58 | function_in_ccm(); 59 | 60 | printk("invoke function in split memory..\n"); 61 | function_in_split_mem(); 62 | } 63 | /** 64 | * @} 65 | */ 66 | -------------------------------------------------------------------------------- /apps/samples/base_fw/heci/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 5 | project(heci_samples) 6 | 7 | target_sources(app PRIVATE src/main.c) 8 | -------------------------------------------------------------------------------- /apps/samples/base_fw/heci/README.rst: -------------------------------------------------------------------------------- 1 | .. _heci-sample: 2 | 3 | PSE HECI 4 | ########### 5 | 6 | Overview 7 | ******** 8 | 9 | This sample demonstrates how to use the HECI API. 10 | 11 | Building and Running 12 | ******************** 13 | 14 | The sample can be built and executed on boards supporting IPC hardware. 15 | 1: build HECI sample project. 16 | 2: stitch ifwi with the fw generated 17 | 3: copy host_client/heci_sample_app.c and Makefile to yocto. compile it with local gcc 18 | 4: run the execution binary in yocto 19 | 20 | Sample output 21 | ============= 22 | 23 | .. code-block:: console 24 | 25 | enter 26 | smpl new heci event 1 27 | new conn: 0 28 | smpl new heci event 1 29 | smpl cmd = 1 30 | get SMPL_GET_VERSION command 31 | smpl new heci event 2 32 | disconnect request conn 0 33 | 34 | .. note:: The values shown above might differ. 35 | -------------------------------------------------------------------------------- /apps/samples/base_fw/heci/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_SYS_SERVICE=y 2 | CONFIG_HOST_SERVICE=y 3 | CONFIG_SYS_MNG=y 4 | CONFIG_HECI=y 5 | CONFIG_NUM_USER_APP_AND_SERVICE=4 6 | CONFIG_SMHI=n 7 | -------------------------------------------------------------------------------- /apps/samples/base_fw/heci/sample.yaml: -------------------------------------------------------------------------------- 1 | sample: 2 | name: HECI sample 3 | platforms: intel_pse 4 | tests: 5 | sample.base_fw.heci: 6 | tags: HECI 7 | depends_on: heci 8 | -------------------------------------------------------------------------------- /apps/samples/base_fw/heci/src/host_client/Makefile: -------------------------------------------------------------------------------- 1 | heci_smpl: 2 | gcc heci_sample_app.c -o heci_smpl 3 | 4 | clean: 5 | rm heci_smpl 6 | -------------------------------------------------------------------------------- /apps/samples/base_fw/heci/src/smpl_client.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef __SMPL_CLIENT_H 8 | #define __SMPL_CLIENT_H 9 | 10 | #include "heci.h" 11 | #include 12 | #include 13 | 14 | #define REBOOT_FLAG BIT(0) 15 | #define SMPL_CONN_FLAG BIT(1) 16 | 17 | #define SMPL_MAJOR_VERSION 0 18 | #define SMPL_MINOR_VERSION 1 19 | #define SMPL_HOTFIX_VERSION 2 20 | #define SMPL_BUILD_VERSION 3 21 | 22 | /* SMPL Commands */ 23 | typedef enum { 24 | /* retrieve PSE system info */ 25 | SMPL_GET_VERSION = 0x1, 26 | SMPL_COMMAND_LAST 27 | } smpl_command_id; 28 | 29 | typedef struct { 30 | uint8_t command : 7; 31 | uint8_t is_response : 1; 32 | uint16_t has_next : 1; 33 | uint16_t reserved : 15; 34 | uint8_t status; 35 | } __packed smpl_msg_hdr_t; 36 | 37 | typedef struct { 38 | uint16_t major; 39 | uint16_t minor; 40 | uint16_t hotfix; 41 | uint16_t build; 42 | } __packed smpl_get_version_resp; 43 | 44 | #endif /* __SMPL_CLIENT_H */ 45 | -------------------------------------------------------------------------------- /apps/samples/base_fw/pmc/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | project(NONE) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | target_sources(app PRIVATE resource_table.c) 10 | -------------------------------------------------------------------------------- /apps/samples/base_fw/pmc/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_pmc_example: 2 | 3 | PSE PMC example 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE PMC service example for intel_pse board. 9 | 10 | This application demonstrates how to communicate to the PMC subsystem 11 | securely and issue platform control functionalities such as power down, 12 | restart and wakeup from Sx state. 13 | It also demonstrates how to use the peci short and long format commands. 14 | 15 | Building and Running 16 | ******************** 17 | Standard build and run procdure defined for intel_pse target to be 18 | followed. 19 | 20 | Sample Output 21 | ============= 22 | .. code-block:: console 23 | 24 | PSE PMC App intel_ehl_crb 25 | Enter 1 to Shutdown 26 | Enter 2 to Reset 27 | Enter 3 to Power up 28 | Enter 4 to Get Host Temperature 29 | Enter 5 to Trigger PME assert (hostwakeup) 30 | Sending PMC short msg to shutdown 31 | Sx Entry 32 | Enter 1 to Shutdown 33 | Enter 2 to Reset 34 | Enter 3 to Power up 35 | Enter 4 to Get Host Temperature 36 | Enter 5 to Trigger PME assert (hostwakeup) 37 | Sending HW PME_ASSERT to wake up host. 38 | Sx Exit 39 | Enter 1 to Shutdown 40 | Enter 2 to Reset 41 | Enter 3 to Power up 42 | Enter 4 to Get Host Temperature 43 | Enter 5 to Trigger PME assert (hostwakeup) 44 | Sending PMC short msg to reset 45 | Enter 1 to Shutdown 46 | Enter 2 to Reset 47 | Enter 3 to Power up 48 | Enter 4 to Get Host Temperature 49 | Enter 5 to Trigger PME assert (hostwakeup) 50 | Sx Entry 51 | Sx Exit 52 | Enter 1 to Shutdown 53 | Enter 2 to Reset 54 | Enter 3 to Power up 55 | Enter 4 to Get Host Temperature 56 | Enter 5 to Trigger PME assert (hostwakeup) 57 | LSB CPU Temp: 128 58 | MSB CPU Temp: 228 59 | -------------------------------------------------------------------------------- /apps/samples/base_fw/pmc/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_SIDEBAND=y 2 | CONFIG_LOG=n 3 | CONFIG_PMC_LOG_LEVEL_DBG=n 4 | 5 | CONFIG_APP_FRAMEWORK_LOG=4 6 | CONFIG_NUM_USER_APP_AND_SERVICE=4 7 | CONFIG_HEAP_MEM_POOL_SIZE=16384 8 | CONFIG_MAX_THREAD_BYTES=4 9 | CONFIG_IDLE_STACK_SIZE=1024 10 | CONFIG_MAIN_STACK_SIZE=4096 11 | 12 | CONFIG_PMC_SERVICE=y 13 | CONFIG_SYS_SERVICE=y 14 | CONFIG_HOST_SERVICE=y 15 | 16 | CONFIG_IPC=y 17 | CONFIG_IPC_SEDI=y 18 | -------------------------------------------------------------------------------- /apps/samples/base_fw/pmc/resource_table.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | 11 | struct user_app_res_table_t 12 | global_resource_info[CONFIG_NUM_USER_APP_AND_SERVICE] = { 13 | /*PMC/System service. */ 14 | { .app_id = 0, .priority = SERV_BOOT_PRIO_0, 15 | .dev_list = { "IPC_HOST", "IPC_PMC" }, 16 | .dev_cnt = 2 }, 17 | /* ECLite service. */ 18 | { .app_id = 1, .priority = SERV_BOOT_PRIO_1, 19 | .sys_service = PMC_SERVICE, 20 | .dev_list = { "I2C_0", "GPIO_0", "PWM_0" }, 21 | .dev_cnt = 3 }, 22 | /* OOB service. */ 23 | { .app_id = 2, .priority = SERV_BOOT_PRIO_2, 24 | .sys_service = PMC_SERVICE }, 25 | /* PMC sample App. */ 26 | { .app_id = 3, .priority = APP_BOOT_PRIO_4, 27 | .sys_service = PMC_SERVICE, 28 | .dev_list = { "UART_2" }, 29 | .dev_cnt = 1 }, 30 | }; 31 | -------------------------------------------------------------------------------- /apps/samples/base_fw/pmc/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE PMC example. 7 | name: pse pmc example 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/base_fw/power_management/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | project(pse_power_management) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/base_fw/power_management/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_power_management: 2 | 3 | PSE Power Management 4 | ########### 5 | 6 | Overview 7 | ******** 8 | Enable Zephyr Power managment application (PMA). 9 | Building and Running 10 | ******************** 11 | Standard build and run procdure defined for intel_pse target to be 12 | followed. 13 | 14 | Sample Output 15 | ============= 16 | .. code-block:: console 17 | 18 | Application thread woke up from D0i0 state. 19 | Application thread woke up from D0i0 state. 20 | Application thread woke up from D0i1 state. 21 | Application thread woke up from D0i1 state. 22 | Application thread woke up from D0i2 state. 23 | Application thread woke up from D0i3 state. 24 | 25 | -------------------------------------------------------------------------------- /apps/samples/base_fw/power_management/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_PM_SERVICE=y 2 | CONFIG_SYS_SERVICE=y 3 | CONFIG_TIMESLICING=n 4 | 5 | CONFIG_PRINTK=y 6 | CONFIG_SHELL=y 7 | CONFIG_KERNEL_SHELL=y 8 | CONFIG_THREAD_MONITOR=y 9 | CONFIG_INIT_STACKS=y 10 | CONFIG_BOOT_BANNER=n 11 | CONFIG_THREAD_NAME=y 12 | CONFIG_DEVICE_SHELL=y 13 | CONFIG_LOG=n 14 | 15 | #sys_services 16 | CONFIG_PM=y 17 | CONFIG_PM_DEVICE=y 18 | CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 19 | 20 | CONFIG_PWM=n 21 | CONFIG_PWM_SEDI=n 22 | 23 | CONFIG_GPIO=n 24 | CONFIG_GPIO_SEDI=n 25 | 26 | CONFIG_SPI=n 27 | CONFIG_SPI_SEDI=n 28 | 29 | CONFIG_I2C=n 30 | CONFIG_I2C_SEDI=n 31 | 32 | CONFIG_MAIN_STACK_SIZE=16384 33 | CONFIG_IDLE_STACK_SIZE=8192 34 | CONFIG_ISR_STACK_SIZE=8192 35 | 36 | CONFIG_BOOT_BANNER=y 37 | 38 | CONFIG_NUM_USER_APP_AND_SERVICE=4 39 | -------------------------------------------------------------------------------- /apps/samples/base_fw/power_management/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE Power Management app. 7 | name: pse power management 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | 7 | project(user_mode_samples) 8 | 9 | include_directories( 10 | user_mode_services 11 | ) 12 | 13 | target_sources(app PRIVATE user_mode_apps/simple_app_example/app0_simple_app_example.c) 14 | target_sources(app PRIVATE user_mode_apps/sub_task_example/app1_sub_task_example.c) 15 | target_sources(app PRIVATE user_mode_services/inter_service_comm/serv0_service_example.c) 16 | target_sources(app PRIVATE user_mode_services/inter_service_comm/serv1_service_example.c) 17 | target_sources(app PRIVATE resource_table.c) 18 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_user_mode_app_and_services: 2 | 3 | PSE User Mode App and Services Example 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple examples for PSE USER MODE APPLICATION AND SERVICE for intel_pse_crb 9 | board. 10 | 11 | User mode apps and services - 12 | 13 | Simple app with user mode framework 14 | App which need to access some kernel objects and have multiple sub task 15 | App which need to access some kernel objects and device drivers 16 | Service which will execute immediately after post kernel init but 17 | before Apps main 18 | 19 | Building and Running 20 | ******************** 21 | Standard build and run procdure defined for intel_pse_crb target to be 22 | followed. 23 | 24 | Sample Output 25 | ============= 26 | 27 | .. code-block:: console 28 | 29 | Service 4 Main 30 | Service 4 Main return 31 | Service 5 Main 32 | Service 5 Main return 33 | App 6, g_cnt:1 34 | App 7 Main 35 | App 7 Main return 36 | App 8 Main 37 | Main Service 4 Task 0 38 | Main Service 4 Task 0 done 39 | Main Service 5 Task 0 40 | Main Service 5 Task 0 done 41 | Main APP 7 Task 1 started 42 | Sem given 1 43 | Sem given 2 44 | Sem given 3 45 | Sem given 4 46 | Sem given 5 47 | Sem given 6 48 | Main APP 7 Task 1 done 49 | Main Service 4 Task 1 50 | hello this message from task 0 Service 0 51 | Main Service 4 Task 1 done 52 | Main Service 5 Task 1 53 | hello this message from task 0 Service 1 54 | Main Service 5 Task 1 done 55 | Main APP 7 Task 2 started 56 | Sem taken 6 57 | Sem taken 5 58 | Sem taken 4 59 | Sem taken 3 60 | Sem taken 2 61 | Sem taken 1 62 | Main APP 7 Task 2 done 63 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/prj.conf: -------------------------------------------------------------------------------- 1 | #See “IntelPSE_SDK_Developer_Guide” for more information on each of 2 | #these configuration settings. 3 | 4 | CONFIG_USERSPACE=y 5 | CONFIG_USER_APP_FRAMEWORK=y 6 | CONFIG_APP_FRAMEWORK_LOG=4 7 | CONFIG_NUM_USER_APP_AND_SERVICE=9 8 | CONFIG_LOG=n 9 | CONFIG_HEAP_MEM_POOL_SIZE=16384 10 | CONFIG_MAX_THREAD_BYTES=4 11 | CONFIG_ASSERT=y 12 | CONFIG_IDLE_STACK_SIZE=1024 13 | CONFIG_STACK_CANARIES=y 14 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/resource_table.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | */ 7 | 8 | #include 9 | #include 10 | #include 11 | 12 | struct user_app_res_table_t 13 | global_resource_info[CONFIG_NUM_USER_APP_AND_SERVICE] = { 14 | /*PMC/System service. */ 15 | { .app_id = 0, .priority = SERV_BOOT_PRIO_0 }, 16 | /* ECLite service. */ 17 | { .app_id = 1, 18 | .priority = SERV_BOOT_PRIO_1, 19 | /* .sys_service = PMC_SERVICE, TODO */ 20 | .dev_list = { "I2C_0", "GPIO_0", "PWM_0", "TGPIO_0" }, 21 | .dev_cnt = 4 }, 22 | /* OOB service. */ 23 | { .app_id = 2, .priority = SERV_BOOT_PRIO_2, 24 | /* .sys_service = PMC_SERVICE }, TODO */ 25 | }, 26 | /* Hello World sample App. */ 27 | { .app_id = 3, .priority = APP_BOOT_PRIO_1 }, 28 | /* User Mode Sample Services */ 29 | { .app_id = 4, .priority = SERV_BOOT_PRIO_3 }, 30 | { .app_id = 5, .priority = SERV_BOOT_PRIO_4 }, 31 | /* User Mode Sample Apps */ 32 | { .app_id = 6, .priority = APP_BOOT_PRIO_2 }, 33 | { .app_id = 7, .priority = APP_BOOT_PRIO_3 }, 34 | { .app_id = 8, 35 | .priority = APP_BOOT_PRIO_4, 36 | .dev_list = { "DMA_0", "I2S_0" }, 37 | .dev_cnt = 2 } 38 | }; 39 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2019 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE USER MODE APP AND SERVICES EXAMPLE. 7 | name: user mode samples 8 | platforms: intel_pse 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/user_mode_apps/simple_app_example/app0_simple_app_example.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | */ 7 | 8 | /** 9 | * @file 10 | * @brief Sample Application for simple user mode application. 11 | * This example demonstrates how to declare and use global 12 | * variables in User Mode. 13 | * @{ 14 | */ 15 | 16 | /** 17 | * @brief How to Build sample application. 18 | * Please refer “IntelPSE_SDK_Get_Started_Guide” for more details how to 19 | * build the sample codes. 20 | */ 21 | 22 | /** 23 | * @brief Hardware setup. 24 | * There is no specific external hardware setup required for the 25 | * User Mode sample application. 26 | */ 27 | 28 | /* Local Includes */ 29 | #include 30 | #include 31 | #include 32 | #include 33 | #include 34 | 35 | /** Declare a global varible which only this App(6) can access. */ 36 | APP_GLOBAL_VAR(6) static char g_cnt; 37 | 38 | /* @brief main function 39 | * Access and prints the value of global variable g_cnt. 40 | */ 41 | static void app_main(void *p1, void *p2, void *p3) 42 | { 43 | /* Use ARG_UNUSED([arg]) to avoid compiler warnings about 44 | * unused arguments. 45 | */ 46 | ARG_UNUSED(p1); 47 | ARG_UNUSED(p2); 48 | ARG_UNUSED(p3); 49 | 50 | printk("App 6, g_cnt:%d\n", ++g_cnt); 51 | } 52 | 53 | /* Define a Simple App which does not require any kernel object access. */ 54 | DEFINE_USER_MODE_APP(6, USER_MODE_APP | K_PART_GLOBAL, app_main, 1024, NULL, 0, 55 | NULL); 56 | 57 | /** 58 | * @} 59 | */ 60 | -------------------------------------------------------------------------------- /apps/samples/base_fw/user_mode_samples/user_mode_services/common.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef COMMON_H 8 | #define COMMON_H 9 | struct data_item_t { 10 | void *fifo_reserved; /* 1st word reserved for use by fifo */ 11 | char buff[100]; 12 | }; 13 | #endif 14 | -------------------------------------------------------------------------------- /apps/samples/base_fw/vnic/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | include_directories($ENV{ZEPHYR_BASE}/subsys/net/l2/) 7 | include_directories($ENV{ZEPHYR_BASE}/subsys/net/ip/) 8 | project(NONE) 9 | 10 | target_sources(app PRIVATE src/main.c) 11 | target_sources(app PRIVATE src/upd_arp.c) 12 | target_sources(app PRIVATE src/sock_udp.c) 13 | target_sources(app PRIVATE src/send_ping.c) 14 | -------------------------------------------------------------------------------- /apps/samples/base_fw/vnic/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_ethernet: 2 | 3 | PSE Ethernet Test 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE VNIC example for intel_pse board. The sample application tests 9 | virtual network interface communication between zephyr and linux host. 10 | It pings the IP address of the linux host vnic driver and prints the response. 11 | This sample appilication requires vnic driver on yocto 12 | to be installed for successful execution. 13 | 14 | Building and Running 15 | ******************** 16 | 17 | Standard build and run procedure defined for intel_pse target to be 18 | followed. 19 | 20 | Sample Output 21 | ============= 22 | ########## PSE VNIC Test Application ####### 23 | uart:~$ [00:00:00.000,003] vnic: Heci Regn successful 24 | uart:~$ [00:00:00.000,004] vnic: VNIC MAC: a8:c:d5:a4:37:bf 25 | uart:~$ [00:00:00.000,009] net_config: Initializing network 26 | uart:~$ [00:00:00.000,009] net_config: IPv4 address: 192.168.0.1 27 | uart:~$ [00:00:00.000,011] vnic: Connection not ready, tx failure 28 | uart:~$ [00:00:00.177,588] ping: Sent a ping to 192.168.0.2 29 | uart:~$ [00:00:00.178,372] ping: Received echo reply from 192.168.0.2 to 30 | 192.168.0.1 31 | Starting socket app in 10 seconds.. 32 | Starting socket app in 9 seconds.. 33 | Starting socket app in 8 seconds.. 34 | Starting socket app in 7 seconds.. 35 | Starting socket app in 6 seconds.. 36 | Starting socket app in 5 seconds.. 37 | Starting socket app in 4 seconds.. 38 | Starting socket app in 3 seconds.. 39 | Starting socket app in 2 seconds.. 40 | Starting socket app in 1 seconds.. 41 | Sender task started 42 | Sending to dst,count=0 43 | Sent =5 bytes 44 | Receiver task started 45 | RX MSG Len:5 46 | HELLO 47 | .. code-block:: console 48 | 49 | -------------------------------------------------------------------------------- /apps/samples/base_fw/vnic/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_ASSERT=y 2 | CONFIG_ENTROPY_GENERATOR=y 3 | CONFIG_NET_CONFIG_INIT_TIMEOUT=10 4 | CONFIG_NET_DEBUG_NET_PKT_ALLOC=y 5 | CONFIG_HECI=y 6 | CONFIG_SYS_SERVICE=y 7 | CONFIG_HOST_SERVICE=y 8 | CONFIG_PMC_SERVICE=y 9 | CONFIG_SYS_MNG=y 10 | CONFIG_SMHI=y 11 | # 12 | #Ethernet configuration 13 | # 14 | CONFIG_ETH_PSE_VNIC=y 15 | CONFIG_ETH_PSE_VNIC_MAC0=0xA8 16 | CONFIG_ETH_PSE_VNIC_MAC1=0x0C 17 | CONFIG_ETH_PSE_VNIC_MAC2=0xD5 18 | CONFIG_ETH_PSE_VNIC_MAC3=0xA4 19 | CONFIG_ETH_PSE_VNIC_MAC4=0x37 20 | CONFIG_ETH_PSE_VNIC_MAC5=0xBF 21 | CONFIG_NET_DEFAULT_IF_ETHERNET=y 22 | CONFIG_NET_TCP_ISN_RFC6528=y 23 | # 24 | # Networking 25 | # 26 | CONFIG_NETWORKING=y 27 | 28 | # 29 | # Link layer options 30 | # 31 | CONFIG_NET_L2_ETHERNET=y 32 | CONFIG_NET_L2_ETHERNET_MGMT=y 33 | CONFIG_NET_ARP=y 34 | 35 | # 36 | # IP stack 37 | # 38 | CONFIG_NET_LOG=y 39 | CONFIG_NET_IPV6=n 40 | CONFIG_NET_IPV4=y 41 | CONFIG_NET_IF_MAX_IPV4_COUNT=6 42 | CONFIG_NET_DHCPV4=n 43 | CONFIG_NET_SHELL=n 44 | CONFIG_NET_TC_TX_COUNT=2 45 | CONFIG_NET_TC_RX_COUNT=2 46 | CONFIG_NET_TC_MAPPING_STRICT=y 47 | CONFIG_NET_TCP=y 48 | CONFIG_NET_UDP=y 49 | CONFIG_NET_PKT_TX_COUNT=40 50 | CONFIG_NET_PKT_RX_COUNT=40 51 | CONFIG_NET_BUF_TX_COUNT=300 52 | CONFIG_NET_BUF_RX_COUNT=300 53 | CONFIG_NET_PKT_TIMESTAMP=n 54 | CONFIG_NET_CONTEXT_PRIORITY=y 55 | 56 | # 57 | # Stack usage 58 | # 59 | CONFIG_NET_MGMT=y 60 | CONFIG_NET_STATISTICS=y 61 | CONFIG_NET_STATISTICS_USER_API=y 62 | CONFIG_NET_STATISTICS_ETHERNET_VENDOR=y 63 | 64 | # 65 | # Other Kernel Object Options 66 | # 67 | CONFIG_HEAP_MEM_POOL_SIZE=16384 68 | CONFIG_MAIN_STACK_SIZE=8048 69 | CONFIG_TEST_RANDOM_GENERATOR=y 70 | CONFIG_INIT_STACKS=y 71 | CONFIG_PRINTK=y 72 | CONFIG_NET_MAX_CONTEXTS=10 73 | CONFIG_NET_CONFIG_SETTINGS=y 74 | CONFIG_NET_CONFIG_NEED_IPV6=n 75 | CONFIG_NET_CONFIG_NEED_IPV4=y 76 | CONFIG_NET_CONFIG_MY_IPV4_ADDR="192.168.0.1" 77 | CONFIG_NET_CONFIG_PEER_IPV4_ADDR="192.168.0.2" 78 | 79 | # 80 | # Network Libraries 81 | # 82 | CONFIG_NET_SOCKETS=y 83 | CONFIG_NET_SOCKETS_POSIX_NAMES=y 84 | CONFIG_USERSPACE=y 85 | CONFIG_USER_APP_FRAMEWORK=y 86 | CONFIG_NUM_USER_APP_AND_SERVICE=4 87 | CONFIG_HEAP_MEM_POOL_SIZE=16384 88 | CONFIG_MAX_THREAD_BYTES=4 89 | CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=2048 90 | -------------------------------------------------------------------------------- /apps/samples/base_fw/vnic/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2019 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | 6 | sample: 7 | description: PSE VNIC test application 8 | name: pse ethernet 9 | platforms: intel_pse 10 | common: 11 | tags: samples 12 | harness: console 13 | harness_config: 14 | type: one_line 15 | tests: 16 | test: 17 | tags: samples 18 | -------------------------------------------------------------------------------- /apps/samples/base_fw/vnic/src/host_client/Makefile: -------------------------------------------------------------------------------- 1 | # Comment/uncomment the following line to disable/enable debugging 2 | DEBUG = y 3 | 4 | ifeq ($(DEBUG),y) 5 | DEBFLAGS = -O -g -DDEBUG # "-O" is needed to expand inlines 6 | else 7 | DEBFLAGS = -O2 8 | endif 9 | 10 | ccflags-y += $(DEBFLAGS) 11 | 12 | PWD := $(shell pwd) 13 | 14 | all: 15 | $(CC) -o udp_service udp_service.c 16 | 17 | clean: 18 | rm -rf *.o 19 | 20 | -------------------------------------------------------------------------------- /apps/samples/base_fw/vnic/src/host_client/udp_service.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | #include 5 | #include 6 | 7 | /* Sixe of RX buffer */ 8 | #define RX_BUFFER_SIZE 1024 9 | /* IP address of host*/ 10 | #define LINUX_HOST_IP "192.168.0.2" 11 | /* Port to start the server on */ 12 | #define SERVER_PORT 4242 13 | 14 | int main(int argc, char *argv[]) 15 | { 16 | /* socket address used for the server */ 17 | struct sockaddr_in server_address; 18 | struct sockaddr_in zephyr_address; 19 | 20 | memset(&server_address, 0, sizeof(server_address)); 21 | server_address.sin_family = AF_INET; 22 | 23 | /* htons: host to network short: transforms a value in host byte 24 | * ordering format to a short value in network byte ordering format 25 | */ 26 | server_address.sin_port = htons(SERVER_PORT); 27 | 28 | /* htons: host to network long: same as htons but to long 29 | * server_address.sin_addr.s_addr = htonl(INADDR_ANY); 30 | */ 31 | int rv = inet_pton(AF_INET, LINUX_HOST_IP, &server_address.sin_addr); 32 | 33 | if (rv != 1) { 34 | printf("Failed to set ip in socket\n"); 35 | return -1; 36 | } 37 | 38 | 39 | /* create a UDP socket, creation returns -1 on failure */ 40 | int sock = socket(PF_INET, SOCK_DGRAM, 0); 41 | 42 | if (sock < 0) { 43 | printf("could not create socket\n"); 44 | return -1; 45 | } 46 | 47 | /* bind it to listen to the incoming connections on the created server 48 | * address, will return -1 on error 49 | */ 50 | if ((bind(sock, (struct sockaddr *)&server_address, 51 | sizeof(server_address))) < 0) { 52 | printf("could not bind socket\n"); 53 | return -1; 54 | } 55 | 56 | /* socket address used to store client address */ 57 | struct sockaddr_in client_address; 58 | 59 | int client_address_len = sizeof(client_address); 60 | 61 | printf("Server loop started, port =%d\n", SERVER_PORT); 62 | char buffer[RX_BUFFER_SIZE]; 63 | 64 | /* run indefinitely */ 65 | while (true) { 66 | 67 | memset(&client_address, 0, sizeof(client_address)); 68 | 69 | /* read content into buffer from an incoming client */ 70 | int len = recvfrom(sock, buffer, sizeof(buffer), 0, 71 | (struct sockaddr *)&client_address, 72 | &client_address_len); 73 | 74 | /* inet_ntoa prints user friendly representation of the 75 | * ip address 76 | */ 77 | buffer[len] = '\0'; 78 | printf("received: '%s' from client %s\n", buffer, 79 | inet_ntoa(client_address.sin_addr)); 80 | 81 | } 82 | 83 | return 0; 84 | } 85 | -------------------------------------------------------------------------------- /apps/samples/drivers/can/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 5 | project(can) 6 | 7 | target_include_directories(app PRIVATE $ENV{ZEPHYR_BASE}/drivers/can) 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/can/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_can: 2 | 3 | PSE CAN 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE CAN example for intel_pse board. 9 | This test application perform tests for CAN functionalities- 10 | RX/TX operations in various operational modes like Normal, FD, 11 | and extended. 12 | 13 | Building and Running 14 | ******************** 15 | Standard build and run procdure defined for intel_pse target to be 16 | followed. 17 | 18 | .. code-block:: can 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/can/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_CAN=y 2 | CONFIG_CAN_SEDI=y 3 | CONFIG_USERSPACE=n 4 | CONFIG_CAN_DISABLE_AUTO_RETRANSMIT=n 5 | -------------------------------------------------------------------------------- /apps/samples/drivers/can/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE CAN test app. 7 | name: pse can 8 | platforms: intel_pse 9 | common: 10 | tags: samples 11 | harness: can 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/dma/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 5 | project(dma) 6 | 7 | target_sources(app PRIVATE src/main.c) 8 | -------------------------------------------------------------------------------- /apps/samples/drivers/dma/README.rst: -------------------------------------------------------------------------------- 1 | .. _dma-sample: 2 | 3 | Overview 4 | ******** 5 | 6 | This sample demonstrates how to use the DMA API. 7 | 8 | Building and Running 9 | ******************** 10 | 11 | The sample can be built and executed on boards supporting DMA. 12 | 13 | Sample output 14 | ============= 15 | 16 | .. code-block:: console 17 | testing DMA normal reload mode 18 | 19 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 20 | Starting the transfer 21 | DMA transfer done 22 | potato 23 | DMA Passed 24 | 25 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 26 | Starting the transfer 27 | reload block 1 28 | DMA transfer done 29 | likes 30 | potato 31 | DMA Passed 32 | 33 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 34 | Starting the transfer 35 | reload block 1 36 | reload block 2 37 | DMA transfer done 38 | horse 39 | likes 40 | potato 41 | DMA Passed 42 | 43 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 44 | Starting the transfer 45 | reload block 1 46 | reload block 2 47 | reload block 3 48 | DMA transfer done 49 | my 50 | horse 51 | likes 52 | potato 53 | DMA Passed 54 | 55 | testing DMA linked list mode 56 | 57 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 58 | Starting the transfer 59 | DMA transfer done 60 | block count = 1 61 | potato 62 | DMA Passed 63 | 64 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 65 | Starting the transfer 66 | DMA transfer done 67 | block count = 2 68 | likes 69 | potato 70 | DMA Passed 71 | 72 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 73 | Starting the transfer 74 | DMA transfer done 75 | block count = 3 76 | horse 77 | likes 78 | potato 79 | DMA Passed 80 | 81 | Preparing DMA Controller: Chan_ID=0, BURST_LEN=8 82 | Starting the transfer 83 | DMA transfer done 84 | block count = 4 85 | my 86 | horse 87 | likes 88 | potato 89 | DMA Passed 90 | 91 | .. note:: The values shown above might differ. 92 | -------------------------------------------------------------------------------- /apps/samples/drivers/dma/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_DMA=y 2 | CONFIG_DMA_SEDI=y 3 | -------------------------------------------------------------------------------- /apps/samples/drivers/dma/sample.yaml: -------------------------------------------------------------------------------- 1 | sample: 2 | name: DMA driver sample 3 | platforms: ehl_pse_crb 4 | tests: 5 | sample.drivers.dma: 6 | tags: DMA 7 | depends_on: dma 8 | -------------------------------------------------------------------------------- /apps/samples/drivers/gpio/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(gpio) 7 | 8 | target_sources(app PRIVATE src/main.c) -------------------------------------------------------------------------------- /apps/samples/drivers/gpio/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_GPIO: 2 | 3 | PSE GPIO 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE GPIO example for intel_pse board. 9 | This application needs connection between two pins. GPIO0 pin 26 is used as output, 10 | and GPIO1 pin 9 is input pin. While output pin is toggled, the input pin will 11 | generate an interrupt and call callback function defined in sample. The 12 | callback function prints out a log to show it entered into callback. 13 | 14 | Building and Running 15 | ******************** 16 | Standard build and run procdure defined for intel_pse target to be 17 | followed. 18 | 19 | .. code-block:: GPIO 20 | -------------------------------------------------------------------------------- /apps/samples/drivers/gpio/prj.conf: -------------------------------------------------------------------------------- 1 | # nothing here 2 | CONFIG_ASSERT=y 3 | CONFIG_GPIO=y 4 | CONFIG_GPIO_SEDI=y 5 | -------------------------------------------------------------------------------- /apps/samples/drivers/gpio/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE gpio test app 7 | name: pse gpio 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(i2c) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_i2c: 2 | 3 | PSE I2C 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE I2C example for ehl_pse_crb board. 9 | This test application perform I2C slave scan and I2C read write from 10 | external EEPROM FM24V10. 11 | 12 | Building and Running 13 | ******************** 14 | Standard build and run procdure defined for ehl_pse_crb target to be 15 | followed. 16 | 17 | .. code-block:: i2c 18 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c/prj.conf: -------------------------------------------------------------------------------- 1 | # nothing here 2 | CONFIG_ASSERT=y 3 | CONFIG_I2C=y 4 | CONFIG_I2C_SEDI=y 5 | CONFIG_USERSPACE=n 6 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE i2c test app 7 | name: pse i2c 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c_bme280/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(i2c_bme280) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c_bme280/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_i2c: 2 | 3 | PSE I2C 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE I2C example for ehl_pse_crb board. 9 | This test application perform I2C read from external sensor BME280. 10 | 11 | Building and Running 12 | ******************** 13 | Standard build and run procdure defined for intel_pse target to be 14 | followed. 15 | 16 | .. code-block:: i2c 17 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c_bme280/prj.conf: -------------------------------------------------------------------------------- 1 | # nothing here 2 | CONFIG_ASSERT=y 3 | CONFIG_I2C=y 4 | CONFIG_I2C_SEDI=y 5 | CONFIG_USERSPACE=n 6 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c_bme280/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | 6 | sample: 7 | description: PSE i2c sample app 8 | name: pse i2c bme280 9 | platforms: ehl_pse_crb 10 | common: 11 | tags: samples 12 | harness: console 13 | harness_config: 14 | type: one_line 15 | tests: 16 | singlethread: 17 | extra_args: CONF_FILE=prj_single.conf 18 | test: 19 | tags: samples 20 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2c_bme280/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * @file 7 | * @brief Sample Application for I2C bus driver connect with BME280 sensor. 8 | * This sample shows how to use I2C to read/write from BME280 sensor. 9 | * The external sensor device is BKE280 chip. Detailed information for this 10 | * chip, you can see https://www.bosch-sensortec.com/products/environmental- 11 | * sensors/humidity-sensors-bme280/. 12 | * This sample read out BME280 chip id to show how to read a BME280 register. 13 | * 14 | * @brief How to Build sample application. 15 | * Please refer “IntelPSE_SDK_Get_Started_Guide” for more details 16 | * how to build the sample codes. 17 | * 18 | * @brief Hardware setup. 19 | * Please refer section 3.7.1 in “IntelPSE_SDK_User_Guide” for more 20 | * details for I2C hardware setup. 21 | * @{ 22 | */ 23 | 24 | /* Local Includes */ 25 | #include 26 | #include 27 | #include 28 | #include 29 | 30 | /* BME280 device slave address */ 31 | #define DEVICE_ADDR (0x76) 32 | /* I2C master device used for this sample */ 33 | #define I2C_DEV_NAME ("I2C_1") 34 | /* BME280 chip ID register */ 35 | #define BME_CHIP_ID_OFFSET (0xD0) 36 | 37 | int main(int argc, char *argv[]) 38 | { 39 | int ret; 40 | uint8_t id = 0; 41 | 42 | /* Get the device handle for I2C device by 'I2C_DEV_NAME' */ 43 | const struct device *i2c_dev = device_get_binding(I2C_DEV_NAME); 44 | /* I2C Module configuration 45 | * I2C SPEED : Fast speed (400K) 46 | * MASTER OR SLAVE : Master 47 | */ 48 | uint32_t i2c_cfg = I2C_SPEED_SET(I2C_SPEED_FAST) | I2C_MODE_MASTER; 49 | 50 | if (!i2c_dev) { 51 | printk("Cannot get I2C device\n"); 52 | return -1; 53 | } 54 | printk("I2C: %s binding successful\n", I2C_DEV_NAME); 55 | 56 | if (i2c_configure(i2c_dev, i2c_cfg)) { 57 | printk("I2C config Fail.\n"); 58 | return -1; 59 | } 60 | printk("I2C: %s config successful\n", I2C_DEV_NAME); 61 | 62 | /* Read data from BME280 */ 63 | printk("Read chip ID from BME280...\n"); 64 | 65 | ret = i2c_burst_read(i2c_dev, DEVICE_ADDR, BME_CHIP_ID_OFFSET, &id, 1); 66 | if (ret) { 67 | printk("I2C read Error %d.\n", ret); 68 | return ret; 69 | } 70 | printk("BME280 chip ID is 0x%x!\n", id); 71 | 72 | return 0; 73 | } 74 | 75 | /** 76 | * @} 77 | */ 78 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2s/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(i2s) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2s/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_i2s: 2 | 3 | PSE I2S 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE I2S example for ehl_pse_crb board. 9 | This test application perform tests for I2S functionalities- 10 | TX operation at 48KHz sampling frequency, 16-bit samples and Philips I2S mode 11 | 12 | Building and Running 13 | ******************** 14 | Standard build and run procdure defined for ehl_pse_crb target to be 15 | followed. 16 | 17 | .. code-block:: i2s 18 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2s/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_I2S=y 2 | CONFIG_I2S_SEDI=y 3 | CONFIG_DCACHE_I2S_DMA_WRITEBACK=y 4 | CONFIG_CACHE_DISABLE=n 5 | CONFIG_MAIN_STACK_SIZE=8192 6 | CONFIG_IDLE_STACK_SIZE=2048 7 | CONFIG_LOG=y 8 | CONFIG_I2S_LOG_LEVEL_DBG=y 9 | CONFIG_DMA_LOG_LEVEL_DBG=y 10 | CONFIG_DMA=y 11 | CONFIG_DMA_SEDI=y 12 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2s/prj_single.conf: -------------------------------------------------------------------------------- 1 | CONFIG_MULTITHREADING=y 2 | -------------------------------------------------------------------------------- /apps/samples/drivers/i2s/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE I2S test app. 7 | name: pse i2s 8 | platforms: intel_pse 9 | common: 10 | tags: samples 11 | harness: i2s 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/pwm/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | project(NONE) 7 | 8 | target_include_directories(app PRIVATE $ENV{ZEPHYR_BASE}/drivers/pwm) 9 | target_sources(app PRIVATE src/main.c) 10 | -------------------------------------------------------------------------------- /apps/samples/drivers/pwm/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_pwm_counter_test: 2 | 3 | PSE Test for PWM and counters 4 | ########### 5 | 6 | Overview 7 | ******** 8 | This is a sample PSE PWM application for the intel_pse board. 9 | This test verifies the APIs for PWM IP in following modes - 10 | 1. PWM mode (Using pwm driver) 11 | 2. Counter mode (Using counter driver) 12 | 13 | Two separate drivers are used by this test application. 14 | Both drivers are for the same IP but for different functionalities. 15 | 16 | To validate the output in PWM mode, you need to connect the oscilloscope 17 | to pin3 on PWM_0 and pin7 on PWM_1. 18 | 19 | Building and Running 20 | ******************** 21 | Standard build procedure. 22 | 23 | Sample Output 24 | ============= 25 | 26 | PWM_0 - Bind Success 27 | PWM_1 - Bind Success 28 | COUNTER_11 - Bind Success 29 | COUNTER_4 - Bind Success 30 | Running rate: 20000000 31 | configured pin 3 (Period: 20, pulse: 5) 32 | Stop pulses on pin 3, No o/p produced 33 | Start pulses on pin 3, o/p restored 34 | [call_back] Timer 11 expired 35 | [call_back] Timer 11 expired 36 | [call_back] Timer 11 expired 37 | [call_back] Timer 11 expired 38 | [call_back] Timer 11 expired 39 | [call_back] Timer 4 expired 40 | [call_back] Timer 11 expired 41 | 42 | 43 | 44 | -------------------------------------------------------------------------------- /apps/samples/drivers/pwm/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_BOOT_BANNER=y 2 | CONFIG_PWM=y 3 | CONFIG_PWM_SEDI=y 4 | CONFIG_COUNTER=y 5 | CONFIG_COUNTER_PWM_SEDI=y 6 | -------------------------------------------------------------------------------- /apps/samples/drivers/pwm/prj_single.conf: -------------------------------------------------------------------------------- 1 | CONFIG_MULTITHREADING=n 2 | -------------------------------------------------------------------------------- /apps/samples/drivers/pwm/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE test app for pwm and counter 7 | name: pwm 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | regex: 15 | tests: 16 | singlethread: 17 | extra_args: CONF_FILE=prj_single.conf 18 | test: 19 | tags: samples 20 | -------------------------------------------------------------------------------- /apps/samples/drivers/qep/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(qep) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/qep/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_qep: 2 | 3 | PSE QEP 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE QEP example for intel_pse board. 9 | The application demonstarates the event capturing and qudarature decoding mode 10 | for qep. The application requries qep module to be interfaced with an optical 11 | quadrature encoder. 12 | 13 | This application can be built into modes: 14 | 15 | * single thread 16 | * multi threading 17 | 18 | Building and Running 19 | ******************** 20 | Standard build and run procdure defined for intel_pse target to be 21 | followed. 22 | 23 | Sample Output 24 | ============= 25 | Testing Edge Capture Mode 26 | 27 | Waiting for 5 Edges 28 | Capture done for given count. 29 | Edge cap done , len =5 30 | Timestamp 0: 2928186996 31 | Timestamp 1: 2936668216 32 | Timestamp 2: 2937311706 33 | Timestamp 3: 2937744256 34 | Timestamp 4: 2938228056 35 | Passed 36 | 37 | Testing QEP Decode Mode 38 | Disabled Watchdog timeout 39 | Position counter reset to counting up. 40 | Disabled Direction change 41 | Position Count = 25 42 | Clockwise 43 | Decode Stopped 44 | 45 | .. code-block:: console 46 | -------------------------------------------------------------------------------- /apps/samples/drivers/qep/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_QEP=y 2 | CONFIG_QEP_SEDI=y 3 | CONFIG_USERSPACE=y 4 | -------------------------------------------------------------------------------- /apps/samples/drivers/qep/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE QEP test app. 7 | name: pse qep 8 | platforms: intel_pse 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(spi) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_SPI: 2 | 3 | PSE SPI 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE SPI example for ehl_pse_crb board. 9 | This application perform SPI read/write from external NOR flash FM25V10. 10 | 11 | Building and Running 12 | ******************** 13 | Standard build and run procdure defined for ehl_pse_crb target to be 14 | followed. 15 | 16 | .. code-block:: SPI 17 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi/prj.conf: -------------------------------------------------------------------------------- 1 | # nothing here 2 | CONFIG_ASSERT=y 3 | CONFIG_SPI=y 4 | CONFIG_SPI_SEDI=y 5 | CONFIG_USERSPACE=n 6 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE spi test app 7 | name: pse spi 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi_bme280/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | 4 | cmake_minimum_required(VERSION 3.13.1) 5 | 6 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 7 | project(spi_bme280) 8 | 9 | target_sources(app PRIVATE src/main.c) 10 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi_bme280/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_SPI: 2 | 3 | PSE SPI 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE SPI example for ehl_pse_crb board. 9 | This application perform SPI read from sensor BME280. 10 | 11 | Building and Running 12 | ******************** 13 | Standard build and run procdure defined for intel_pse target to be 14 | followed. 15 | 16 | .. code-block:: SPI 17 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi_bme280/prj.conf: -------------------------------------------------------------------------------- 1 | # nothing here 2 | CONFIG_ASSERT=y 3 | CONFIG_SPI=y 4 | CONFIG_SPI_SEDI=y 5 | CONFIG_USERSPACE=n 6 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi_bme280/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE spi sample app 7 | name: pse spi bme280 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/spi_bme280/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | * 6 | * @file 7 | * @brief Sample Application for SPI bus driver. 8 | * This sample shows how to use SPI to read/write from external sensor. 9 | * The external sensor device is BME280 chip. Detailed information for this 10 | * chip, you can see you can see https://www.bosch-sensortec.com/products/ 11 | * environmental-sensors/humidity-sensors-bme280/. 12 | * This sample read out BME280 chip id to show how to read a BME280 register. 13 | * 14 | * @brief How to Build sample application. 15 | * Please refer “IntelPSE_SDK_Get_Started_Guide” for more details 16 | * how to build the sample codes. 17 | * 18 | * @brief Hardware setup. 19 | * Please refer section 3.3.1 in “IntelPSE_SDK_User_Guide” for 20 | * more details for SPI hardware setup. 21 | * @{ 22 | */ 23 | 24 | /* Local Includes */ 25 | #include 26 | #include 27 | #include 28 | 29 | /* SPI master device used for this sample */ 30 | #define SPI_DEVICE ("SPI_0") 31 | /* SPI mode 0 */ 32 | #define SPI_MODE_0 ((0 << 1) | (0 << 2)) 33 | 34 | #define BME_CHIP_ID_OFFSET (0xD0) 35 | 36 | /* SPI Module configuration 37 | * SPI SPEED : 2M 38 | * MASTER OR SLAVE : Master 39 | * MODE: Mode 0 40 | * MSB OR LSB: MSB 41 | * FRAME SIZE: 8 bits 42 | * DATA LINE NUM: Single line 43 | */ 44 | struct spi_config spi_cfg_1 = { 45 | .frequency = 2000000, 46 | .operation = SPI_OP_MODE_MASTER | SPI_MODE_0 | SPI_TRANSFER_MSB | 47 | SPI_WORD_SET(8) | SPI_LINES_SINGLE, 48 | .slave = BIT(0), 49 | .cs = NULL, 50 | }; 51 | 52 | int main(int argc, char *argv[]) 53 | { 54 | /* Get the device handle for SPI device by 'SPI_DEVICE' */ 55 | const struct device *dev = device_get_binding(SPI_DEVICE); 56 | int ret; 57 | uint8_t id = 0, addr = BME_CHIP_ID_OFFSET; 58 | 59 | const struct spi_buf tx_buf = { 60 | .buf = &addr, 61 | .len = 1 62 | }; 63 | const struct spi_buf_set tx = { 64 | .buffers = &tx_buf, 65 | .count = 1 66 | }; 67 | struct spi_buf rx_buf[2]; 68 | const struct spi_buf_set rx = { 69 | .buffers = rx_buf, 70 | .count = 2 71 | }; 72 | 73 | if (!dev) { 74 | printk("Cannot get SPI device\n"); 75 | return -1; 76 | } 77 | 78 | rx_buf[0].buf = NULL; 79 | rx_buf[0].len = 1; 80 | 81 | rx_buf[1].len = 1; 82 | rx_buf[1].buf = &id; 83 | 84 | printk("Start to read BME280 ID...\n"); 85 | ret = spi_transceive(dev, &spi_cfg_1, &tx, &rx); 86 | if (ret) { 87 | printk("spi_transceive FAIL %d\n", ret); 88 | return ret; 89 | } 90 | 91 | printk("BME280 ID is 0x%x\n", id); 92 | 93 | return 0; 94 | } 95 | 96 | /** 97 | * @} 98 | */ 99 | -------------------------------------------------------------------------------- /apps/samples/drivers/tgpio/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | project(NONE) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/tgpio/prj.conf: -------------------------------------------------------------------------------- 1 | CONFIG_BOOT_BANNER=y 2 | CONFIG_GPIO_TIMED_SEDI=y 3 | -------------------------------------------------------------------------------- /apps/samples/drivers/tgpio/prj_single.conf: -------------------------------------------------------------------------------- 1 | CONFIG_MULTITHREADING=n 2 | -------------------------------------------------------------------------------- /apps/samples/drivers/tgpio/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE tgpio test app 7 | name: pse tgpio 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /apps/samples/drivers/tsn/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.13.1) 4 | 5 | find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) 6 | project(tsn) 7 | 8 | zephyr_include_directories( 9 | ${ZEPHYR_BASE}/kernel/include/ 10 | ${ARCH_DIR}/${ARCH}/include 11 | ) 12 | 13 | target_sources(app PRIVATE src/main.c) 14 | -------------------------------------------------------------------------------- /apps/samples/drivers/tsn/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_tsn: 2 | 3 | TSN Sample Application 4 | ###################### 5 | 6 | Overview 7 | ******** 8 | A simple PSE TSN example for intel_pse board. 9 | 10 | Building and Running 11 | ******************** 12 | 13 | Standard build and run procedure defined for intel_pse target to be followed. 14 | 15 | Sample Output 16 | ============= 17 | 18 | .. code-block:: console 19 | 20 | PSE TSN Sample Application 21 | -------------------------------------------------------------------------------- /apps/samples/drivers/tsn/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: TSN sample application 7 | name: pse tsn 8 | platforms: intel_pse 9 | common: 10 | tags: samples 11 | harness: net 12 | harness_config: 13 | type: one_line 14 | tests: 15 | test: 16 | tags: samples 17 | -------------------------------------------------------------------------------- /apps/samples/drivers/uart/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | cmake_minimum_required(VERSION 3.8.2) 4 | 5 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 6 | project(NONE) 7 | 8 | target_sources(app PRIVATE src/main.c) 9 | -------------------------------------------------------------------------------- /apps/samples/drivers/uart/README.rst: -------------------------------------------------------------------------------- 1 | .. _pse_uart: 2 | 3 | PSE Uart 4 | ########### 5 | 6 | Overview 7 | ******** 8 | A simple PSE UART example for intel ehl_pse_crb board. 9 | Tests UART for polled and interrupt based operation. 10 | Application assumes that UART_2 console is being used for printk and 11 | executes tests on UART_1. 12 | This application can be built into modes: 13 | 14 | * single thread 15 | * multi threading 16 | 17 | Building and Running 18 | ******************** 19 | Standard build and run procedure defined for ehl_pse_crb target to be 20 | followed. 21 | 22 | Sample Output 23 | ============= 24 | UART_2 Console Output 25 | 26 | PSE UART Test Application 27 | Testing Device UART_1 28 | 29 | Buffered polled Mode on UART_1 30 | Buffered Polled Write passed 31 | 32 | Buffered polled read , input 5 characters on test port 33 | Data entered by User : 12345 34 | Buffered Polled Read passed 35 | 36 | Asynchronous write on UART_1 37 | Write Data : len =31 status =0 38 | Asynchronous Write passed 39 | 40 | Asynchronous read on UART_1 41 | Waiting for 10 characters on UART_1 42 | Data Entered by User : 1234567890 43 | Read Data : len =10 status =0 44 | Asynchronous Read passed 45 | 46 | Exiting UART App. 47 | 48 | UART_1 Console Output 49 | 50 | 12345 51 | 12345 52 | Test Async Output for UART. 53 | 1231234567 54 | 55 | .. code-block:: console 56 | -------------------------------------------------------------------------------- /apps/samples/drivers/uart/prj.conf: -------------------------------------------------------------------------------- 1 | # UART instances can be enabled from PSE device tree 2 | CONFIG_SERIAL=y 3 | CONFIG_UART_SEDI=y 4 | CONFIG_UART_INTERRUPT_DRIVEN=y 5 | -------------------------------------------------------------------------------- /apps/samples/drivers/uart/sample.yaml: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2019 Intel Corporation 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | sample: 6 | description: PSE UART test app. 7 | name: pse uart 8 | platforms: ehl_pse_crb 9 | common: 10 | tags: samples 11 | harness: console 12 | harness_config: 13 | type: one_line 14 | tests: 15 | singlethread: 16 | extra_args: CONF_FILE=prj_single.conf 17 | test: 18 | tags: samples 19 | -------------------------------------------------------------------------------- /build.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | # 3 | # Copyright (c) 2021 Intel Corporation 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | ws_dir=$(pwd) 8 | SERVICES=$(pwd)/services 9 | pse_image_tools_dir=$ws_dir/tools/pse_image_tool 10 | bootloader_dir=$ws_dir/../modules/bootloader 11 | CUSTOMER_FLAG=CUSTOMER 12 | 13 | clean() { 14 | if [ -d "build" ]; then 15 | rm -rf build 16 | fi 17 | if [ -d $pse_image_tools_dir/fragments ]; then 18 | rm -rf $pse_image_tools_dir/fragments 19 | fi 20 | if [ -d $pse_image_tools_dir/output ]; then 21 | rm -rf $pse_image_tools_dir/output 22 | fi 23 | 24 | if [ -d $bootloader_dir ]; then 25 | pushd $bootloader_dir > /dev/null 26 | cd aon_task; 27 | if [ -f aon_task.bin ]; then 28 | make clean; 29 | fi 30 | cd ../bringup 31 | if [ -f bringup.bin ]; then 32 | make clean; 33 | fi 34 | popd > /dev/null 35 | fi 36 | 37 | } 38 | 39 | if [ "$1" == "clean" ]; then 40 | echo "Cleaning.." 41 | clean 42 | echo "done" 43 | exit 0 44 | fi 45 | 46 | 47 | if [ "$1" == "" ] 48 | then 49 | app=$ws_dir/apps/capabilities/pse_base 50 | echo "Building pse_base app" 51 | else 52 | app=$1 53 | fi 54 | clean 55 | source ../zephyr/zephyr-env.sh 56 | west build -b ehl_pse_crb $app -DZEPHYR_EXTRA_MODULES=$SERVICES 57 | 58 | if [ ! -d "build" ]; then 59 | echo "Build Failed" 60 | exit 0 61 | fi 62 | if [ $(test) -n "$(find build -name zephyr.elf)" ]; then 63 | echo "build passed" 64 | ZEPHYR_ELF=$(find build -name zephyr.elf) 65 | ZEPHYR_MAP=$(find build -name zephyr.map) 66 | mkdir $pse_image_tools_dir/fragments 67 | cp $ZEPHYR_ELF $ZEPHYR_MAP $pse_image_tools_dir/fragments 68 | if [ "$CUSTOMER_FLAG" == "CUSTOMER" ]; then 69 | echo "CUSTOMER BUILD" 70 | if [ -f "tools/bin/aon_task.bin" ]; then 71 | echo "found aon_task bin" 72 | cp tools/bin/aon_task.bin $pse_image_tools_dir/fragments 73 | fi 74 | if [ -f "tools/bin/bringup.bin" ]; then 75 | echo "found bringup bin" 76 | cp tools/bin/bringup.bin $pse_image_tools_dir/fragments 77 | fi 78 | else 79 | pushd $bootloader_dir > /dev/null 80 | cd aon_task; make SILICON; 81 | cp aon_task.bin $pse_image_tools_dir/fragments 82 | cd ../bringup; make SILICON 83 | cp bringup.bin $pse_image_tools_dir/fragments 84 | popd > /dev/null 85 | fi 86 | pushd $pse_image_tools_dir > /dev/null 87 | python3 zephyr_image_parse.py 88 | make 89 | if [ -f output/PSE_FW.bin ]; then 90 | echo -e "Stiched Firmware binary at:\n" $(pwd)/output/PSE_FW.bin 91 | fi 92 | popd > /dev/null 93 | else 94 | echo "build failed" 95 | fi 96 | -------------------------------------------------------------------------------- /docs/Intel®-Programmable-Services-Engine-SDK-Get-Started-Guide.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/pse-fw/b19072692dfa17d33491ca08ac29943c6604a3a3/docs/Intel®-Programmable-Services-Engine-SDK-Get-Started-Guide.pdf -------------------------------------------------------------------------------- /libs/LICENSE: -------------------------------------------------------------------------------- 1 | Copyright (c) 2022 Intel Corporation 2 | 3 | Redistribution. Redistribution and use in binary form, without 4 | modification, are permitted provided that the following conditions are 5 | met: 6 | 7 | * Redistributions must reproduce the above copyright notice and the 8 | following disclaimer in the documentation and/or other materials 9 | provided with the distribution. 10 | * Neither the name of Intel Corporation nor the names of its suppliers 11 | may be used to endorse or promote products derived from this software 12 | without specific prior written permission. 13 | * No reverse engineering, decompilation, or disassembly of this software 14 | is permitted. 15 | 16 | Limited patent license. Intel Corporation grants a world-wide, 17 | royalty-free, non-exclusive license under patents it now or hereafter 18 | owns or controls to make, have made, use, import, offer to sell and 19 | sell ("Utilize") this software, but solely to the extent that any 20 | such patent is necessary to Utilize the software alone. The patent 21 | license shall not apply to any other combinations which include this 22 | software. No hardware per se is licensed hereunder. 23 | 24 | DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 25 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, 26 | BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND 27 | FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 28 | COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 29 | INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 30 | BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 31 | OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 32 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 33 | TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 34 | USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 35 | DAMAGE. 36 | -------------------------------------------------------------------------------- /libs/VERSION.txt: -------------------------------------------------------------------------------- 1 | Version Info: 2 | 1. libsedi_base.a - Release: MR7 Tag:pse_fw_main_z2px_weekly_2325.3_1025 3 | 2. libsedi_base_bm.a - Release: MR7 Tag:pse_fw_main_z2px_weekly_2325.3_1025 4 | -------------------------------------------------------------------------------- /libs/libsedi_base.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/pse-fw/b19072692dfa17d33491ca08ac29943c6604a3a3/libs/libsedi_base.a -------------------------------------------------------------------------------- /libs/libsedi_base_bm.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/pse-fw/b19072692dfa17d33491ca08ac29943c6604a3a3/libs/libsedi_base_bm.a -------------------------------------------------------------------------------- /scripts/tag_checkout.sh: -------------------------------------------------------------------------------- 1 | #! /bin/bash 2 | # 3 | # Copyright (c) 2021 Intel Corporation 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | 8 | # This script checks out a specific release tag of PSE codebase after PSE 9 | #code has been fetched using west init and west update. 10 | # The script must be run from the workspace folder (where west init is called) 11 | # Example usage: 12 | # (workspace)$ ./ehl_pse-fw/scripts/tag_checkout.sh 13 | 14 | if [ $# -eq 0 ]; then 15 | echo "No tag provided.. exiting" 16 | exit 1 17 | fi 18 | 19 | cd ehl_pse-fw; git checkout $1; cd - 20 | cd modules/hal/sedi; git checkout $1; cd - 21 | cd zephyr; git checkout $1; cd - 22 | cd zephyr-iotg; git checkout $1; cd - 23 | -------------------------------------------------------------------------------- /services/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | #Placeholder for adding other services like eclite, oob, etc. 2 | 3 | zephyr_include_directories(sys_service/include) 4 | 5 | add_subdirectory(eclite_fw) 6 | 7 | add_subdirectory(tsn_network_service) 8 | add_subdirectory(user_app_framework) 9 | add_subdirectory(sys_service) 10 | add_subdirectory(fw_version) 11 | add_subdirectory(ehl-oob) 12 | -------------------------------------------------------------------------------- /services/Kconfig: -------------------------------------------------------------------------------- 1 | #Placeholder to add Kconfig other services like eclite, oob, etc 2 | #Uncomment below placeholder when the respective services is enabled. 3 | 4 | rsource "sys_service/Kconfig" 5 | rsource "ehl-oob/Kconfig" 6 | rsource "eclite_fw/Kconfig" 7 | rsource "tsn_network_service/Kconfig" 8 | rsource "user_app_framework/Kconfig" 9 | rsource "fw_version/Kconfig" 10 | -------------------------------------------------------------------------------- /services/eclite_fw/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # SPDX-License-Identifier: Apache-2.0 2 | 3 | if (CONFIG_SOC_ELKHART_LAKE_PSE) 4 | 5 | FILE(GLOB_RECURSE app_sources src/*.c) 6 | 7 | zephyr_include_directories( 8 | src/main/include 9 | src/agents/include 10 | src/frameworks/charger_framework/include 11 | src/frameworks/device_framework/include 12 | src/frameworks/thermal_framework/include 13 | src/frameworks/usbc_framework/include 14 | src/ext/pal/include 15 | src/drivers/battery_driver 16 | src/drivers/charger_driver 17 | src/drivers/thermal_driver 18 | src/drivers/fan_driver 19 | src/drivers/usbc_pd_driver 20 | src/drivers/include 21 | ) 22 | 23 | zephyr_sources_ifdef(CONFIG_ECLITE_SERVICE ${app_sources}) 24 | 25 | else() 26 | 27 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 28 | 29 | project(NONE) 30 | 31 | FILE(GLOB_RECURSE app_sources src/*.c) 32 | 33 | include_directories( 34 | src/main/include 35 | src/agents/include 36 | src/frameworks/charger_framework/include 37 | src/frameworks/device_framework/include 38 | src/frameworks/thermal_framework/include 39 | src/frameworks/usbc_framework/include 40 | src/ext/pal/include 41 | src/drivers/battery_driver 42 | src/drivers/charger_driver 43 | src/drivers/thermal_driver 44 | src/drivers/fan_driver 45 | src/drivers/usbc_pd_driver 46 | src/drivers/include 47 | ) 48 | 49 | target_sources(app PRIVATE ${app_sources}) 50 | 51 | target_compile_definitions(app PRIVATE CONFIG_EHL_IPHFPGA=1) 52 | target_compile_definitions(app PRIVATE CONFIG_FG=1 CONFIG_CHG=1) 53 | target_compile_definitions(app PRIVATE CONFIG_THERM=1 CONFIG_FAN=1) 54 | 55 | endif() 56 | -------------------------------------------------------------------------------- /services/eclite_fw/src/agents/include/eclite_dispatcher.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file eclite_dispatcher.h 9 | * 10 | * @brief eclite dispatcher for handling various events, 11 | */ 12 | 13 | #ifndef __ECLITE_DISPATCHER_H__ 14 | #define __ECLITE_DISPATCHER_H__ 15 | 16 | #include 17 | #include 18 | #include 19 | /** @brief eclite events. 20 | * 21 | * eclite event codes. 22 | */ 23 | enum eclite_events { 24 | /** HECI Driver Event */ 25 | HECI_EVENT, 26 | /** Periodic Timer Event */ 27 | TIMER_EVENT, 28 | /** GPIO Event */ 29 | GPIO_EVENT, 30 | /** Charger Event */ 31 | CHG_EVENT, 32 | /** Fuelgauge Event */ 33 | FG_EVENT, 34 | /** Thermal Event */ 35 | THERMAL_EVENT, 36 | /** UCSI Event */ 37 | UCSI_EVENT, 38 | }; 39 | 40 | /** @brief eclite queue data table. 41 | * 42 | * event queue data structure for posting event data to dispatcher. 43 | */ 44 | struct dispatcher_queue_data { 45 | /** Dispatcher event */ 46 | enum eclite_events event_type; 47 | /** Data for dispatcher */ 48 | uint32_t data; 49 | }; 50 | 51 | /** 52 | * @brief This routine insert event for EClite dispatcher processing. 53 | * 54 | * @note Can be called by ISRs. 55 | * 56 | * @param event_data data for event. 57 | * 58 | * @retval 0 Event inserted successfully. 59 | * @retval -ENOMSG Returned without waiting or queue purged. 60 | * @retval -EAGAIN Waiting period timed out. 61 | */ 62 | int eclite_post_dispatcher_event(struct dispatcher_queue_data *event_data); 63 | 64 | /** 65 | * @brief This routine initialize and starts dispatcher services. 66 | * 67 | * @retval Fail initialization failed, dispatcher services not started. 68 | * @retval SUCCESS initialization successful. 69 | */ 70 | int dispatcher_init(void); 71 | 72 | /** 73 | * @brief @brief Kernel objects used by dispatcher. 74 | * 75 | */ 76 | extern struct k_thread dispatcher_task; 77 | extern struct k_msgq dispatcher_queue; 78 | extern struct k_timer dispatcher_timer; 79 | 80 | /** 81 | * @brief Timer callback functions 82 | * 83 | */ 84 | extern void timer_periodic_callback(struct k_timer *timer); 85 | extern void timer_stop_callback(struct k_timer *timer); 86 | extern int eclite_sx_state; 87 | 88 | #endif /*_ECLITE_DISPATCHER_H_ */ 89 | -------------------------------------------------------------------------------- /services/eclite_fw/src/agents/include/eclite_opregion.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file exposes APIs to access opregion 10 | */ 11 | 12 | #ifndef _ECLITE_OPREGION_H_ 13 | #define _ECLITE_OPREGION_H_ 14 | 15 | #include 16 | #include 17 | #include 18 | 19 | /** 20 | * @brief This function is used to update communicate data with host/OS. 21 | * 22 | * @param device :is eclite device id for which opregion need to be updated. 23 | * 24 | * @retval None. 25 | */ 26 | void update_opregion(uint8_t device); 27 | 28 | /** 29 | * @brief This function is used to initialize opregion data. 30 | * 31 | * @param device :is eclite device id for which opregion need to be initialized 32 | * 33 | * @retval None. 34 | */ 35 | void initialize_opregion(uint8_t device); 36 | 37 | #endif /* _ECLITE_OPREGION_H_ */ 38 | -------------------------------------------------------------------------------- /services/eclite_fw/src/agents/include/eclite_service.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file exposes APIs to for GPIO and interrupt service 10 | */ 11 | 12 | #ifndef _ECLITE_SERVICE_H_ 13 | #define _ECLITE_SERVICE_H_ 14 | #include 15 | #include 16 | 17 | /** 18 | * @brief Function initializes GPIO and does interrupt callback registration. 19 | * 20 | * @param platform_device_ptr is eclite device list 21 | * @param platform_gpio_ptr is GPIO table 22 | * @param no_of_devices is number of devices EClite application manages. 23 | * @param no_of_gpios is number of GPIOs connected to device. 24 | * 25 | * @retval : error. 26 | */ 27 | int eclite_service_gpio_config(void *platform_device_ptr[], 28 | void *platform_gpio_ptr[], 29 | uint32_t no_of_devices, 30 | uint32_t no_of_gpios); 31 | 32 | /** 33 | * @brief This function does application initialization. 34 | * 35 | * @param port is GPIO device structure return from device_get_binding(). 36 | * @param cb hold GPIO callback data for interrupt. 37 | * @param pins hold GPIO bit mask of the interrupt. 38 | * 39 | * @retval : None. 40 | */ 41 | void eclite_service_isr(const struct device *port, 42 | struct gpio_callback *cb, uint32_t pins); 43 | 44 | #endif /*_ECLITE_SERVICE_H_ */ 45 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/battery_driver/bq40z40.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file exposes interface for charger BQ40Z40. 10 | */ 11 | 12 | #ifndef _BQ40Z40_H_ 13 | #define _BQ40Z40_H_ 14 | 15 | #include 16 | #include 17 | #include 18 | 19 | /** bq40z40 fuel gauge device.*/ 20 | extern struct eclite_device bq40z40_device_fg; 21 | 22 | /** @brief register map for BQ40Z40. 23 | * 24 | * Enum "bq40z40_battery_register" provides register map for BQ40Z40. 25 | */ 26 | enum bq40z40_battery_register { 27 | BQ40Z40_AT_RATE_REG = 0x4, 28 | BQ40Z40_VOLTAGE_REG = 0x9, 29 | BQ40Z40_CURRENT_REG = 0xA, 30 | BQ40Z40_RELATIVE_STATE_OF_CHARGE_REG = 0xD, 31 | BQ40Z40_ABSOLUTE_STATE_OF_CHARGE_REG = 0xE, 32 | BQ40Z40_REMAINING_BATTERY_REG = 0xF, 33 | BQ40Z40_FULL_CHARGE_CAPACITY_REG = 0x10, 34 | BQ40Z40_CHARGE_VOLTAGE_REG = 0x14, 35 | BQ40Z40_CHARGE_CURRENT_REG = 0x15, 36 | BQ40Z40_ALARM_WARNING_REG = 0x16, 37 | BQ40Z40_DESIGN_CAPACITY_REG = 0x18, 38 | BQ40Z40_CYCLE_COUNT_REG = 0x17, 39 | BQ40Z40_DESIGN_VOLTAGE_REG = 0x19, 40 | BQ40Z40_BTP_DISCHARGE = 0x4A, 41 | BQ40Z40_BTP_CHARGE = 0x4B, 42 | BQ40Z40_MFG_ACCESS = 0x0, 43 | BQ40Z40_MFG_BLOCK_ACCESS = 0x44, 44 | BQ40Z40_MFG_OP_STATUS = 0x0054, 45 | BQ40Z40_DATAFLASH_IO_CONFIG = 0x47CC, 46 | BQ40Z40_MFG_DATA_BUF_SIZE = 0x20, 47 | BQ40Z40_BTP_EN = 0x1, 48 | BQ40Z40_BTP_POL = 0x2, 49 | BQ40Z40_EM_SHUT = 0x20, 50 | BQ40Z40_BAT_INIT_DONE = 0x80, 51 | BQ40Z40_BAT_STATUS = 0x16, 52 | }; 53 | 54 | /** @brief GPIO configuration per GPIO. 55 | * 56 | * battery status bit map. 57 | */ 58 | struct bq40z40_alarm_warning_reg { 59 | /** Reserved.*/ 60 | uint8_t reserved1; 61 | /** Reserved.*/ 62 | uint8_t reserved2 : 4; 63 | /** over temperature alarm.*/ 64 | uint8_t over_temprature_alarm : 1; 65 | /** Reserved.*/ 66 | uint8_t reserved3 : 1; 67 | /** discharge alarm.*/ 68 | uint8_t terminate_discharge_alarm : 1; 69 | /** overcharged alarm.*/ 70 | uint8_t over_charged_alarm_alarm : 1; 71 | }; 72 | #endif /*_BQ40Z40_H_ */ 73 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/charger_driver/bq24610.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file exposes interface for charger BQ24610. 10 | */ 11 | 12 | #ifndef _BQ24610_H_ 13 | #define _BQ24610_H_ 14 | #include 15 | #include "platform.h" 16 | 17 | /** GPIO to detect AC presence.*/ 18 | #define CHARGER_GPIO_AC_PRESENT CHARGER_GPIO 19 | /** GPIO to control charging.*/ 20 | #define CHARGER_GPIO_CE CHARGER_CONTROL 21 | 22 | /** Enable Charging.*/ 23 | #define ENABLE_CHARGING 1 24 | /** Disable charging.*/ 25 | #define DISABLE_CHARGING 0 26 | 27 | /** bq24610 charger device.*/ 28 | extern struct eclite_device bq24610_device_charger; 29 | 30 | #endif /*_BQ24610_H_ */ 31 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/fan_driver/fan.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file Fan device interface file. 9 | * 10 | * @brief This file provides interface to fan device. 11 | */ 12 | 13 | #ifndef _FAN_H_ 14 | #define _FAN_H_ 15 | #include 16 | #include 17 | 18 | #define ECLITE_PWM_PIN 0 19 | /** 25 kHz */ 20 | #define ECLITE_PWM_FREQ 4000 21 | /** Fan device.*/ 22 | extern struct eclite_device fan_device; 23 | #endif /* _FAN_H_ */ 24 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/include/ccg.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/include/charger.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file is to select charger if more number of devices available. 10 | */ 11 | 12 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/include/fan.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file is to select fan if more number of devices available. 10 | */ 11 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/include/fulgauge.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file is to select fuel gauge if more number of devices 10 | * available. 11 | */ 12 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/include/thermal.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief This file is to select thermal sensor if more number of devices 10 | * available. 11 | */ 12 | 13 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/thermal_driver/cpu.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include "eclite_device.h" 8 | #include "eclite_hw_interface.h" 9 | #include "thermal_framework.h" 10 | #include "platform.h" 11 | #include "cpu.h" 12 | #include 13 | 14 | LOG_MODULE_REGISTER(cpu, CONFIG_ECLITE_LOG_LEVEL); 15 | 16 | struct cpu_interface { 17 | uint16_t crit_temp; 18 | }; 19 | 20 | static int get_cpu_temperature(void *cpu, int16_t *data) 21 | { 22 | int ret; 23 | 24 | if (eclite_sx_state != PM_RESET_TYPE_S0) { 25 | LOG_ERR("%s() in non-S0\n", __func__); 26 | return ERROR; 27 | } 28 | if (eclite_s0ix_state) { 29 | LOG_ERR("%s() in S0ix\n", __func__); 30 | return ERROR; 31 | } 32 | 33 | ret = pmc_command(GET_TEMP, (uint8_t *)data); 34 | 35 | if (ret) { 36 | LOG_ERR("Get temp failed: %d", ret); 37 | return ret; 38 | } 39 | 40 | return 0; 41 | } 42 | 43 | static enum device_err_code cpu_init(void *cpu) 44 | { 45 | struct eclite_device *cpu_dev = cpu; 46 | struct thermal_driver_data *cpu_data = 47 | cpu_dev->driver_data; 48 | 49 | cpu_data->high_threshold = CPU_HIGH_TEMPERATURE; 50 | cpu_data->low_threshold = CPU_LOW_TEMPERATURE; 51 | cpu_data->critical = TEMP_CPU_CRIT_SHUTDOWN; 52 | 53 | return 0; 54 | } 55 | 56 | static enum device_err_code cpu_isr(void *cpu) 57 | { 58 | /*ToDO: hook for future need.*/ 59 | return 0; 60 | } 61 | 62 | /* CPU interface APIs. */ 63 | static APP_GLOBAL_VAR(1) struct thermal_driver_api cpu_api = { 64 | .read_data = get_cpu_temperature, 65 | }; 66 | 67 | /* CPU - thermal reading.*/ 68 | static APP_GLOBAL_VAR_BSS(1) struct thermal_driver_data cpu_data; 69 | /* device private interface */ 70 | static APP_GLOBAL_VAR(1) struct cpu_interface cpu_internal = { 71 | .crit_temp = TEMP_CPU_CRIT_SHUTDOWN, 72 | }; 73 | /* HW interface configuration for CPU. */ 74 | static APP_GLOBAL_VAR(1) struct hw_configuration cpu_hw_interface = { 75 | .device = &cpu_internal, 76 | }; 77 | 78 | APP_GLOBAL_VAR(1) struct eclite_device thermal_cpu = { 79 | .name = "DEV_THERMAL_CPU", 80 | .device_typ = DEV_THERMAL_CPU, 81 | .instance = INSTANCE_1, 82 | .init = cpu_init, 83 | .driver_api = &cpu_api, 84 | .driver_data = &cpu_data, 85 | .isr = cpu_isr, 86 | .hw_interface = &cpu_hw_interface, 87 | }; 88 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/thermal_driver/cpu.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include "eclite_device.h" 9 | 10 | extern struct eclite_device thermal_cpu; 11 | extern int eclite_sx_state; 12 | extern bool eclite_s0ix_state; 13 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/thermal_driver/tmp102.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef _TMP102_H_ 8 | #define _TMP102_H_ 9 | /** 10 | * @file thermal device TMP102 device interface file 11 | * 12 | * @brief This file provides interface to control thermal sensor/devices TMP102. 13 | */ 14 | #include 15 | #include 16 | enum tmp102_temperature_format { 17 | TMP102_REG_FORMAT = 0, 18 | TMP102_READABLE_FORMAT, 19 | }; 20 | 21 | /** @brief TMP102 register map 22 | * 23 | * Enum "tmp102_register_map" provides register map for TMP102. 24 | */ 25 | enum tmp102_register_map { 26 | /** Read Only.*/ 27 | TMP102_TEMPERATURE_REG = 0X0, 28 | /** Read / Write.*/ 29 | TMP102_CONFIGURATION_REG, 30 | TMP102_T_LOW_REG, 31 | TMP102_T_HIGH_REG, 32 | }; 33 | 34 | enum tmp102_conversion_rate { 35 | TMP102_CONVERSION_0_25_HZ = 0, 36 | TMP102_CONVERSION_1_HZ, 37 | TMP102_CONVERSION_4, 38 | TMP102_CONVERSION_8, 39 | }; 40 | 41 | enum tmp102_mode_rate { 42 | TMP102_EM_NORAML_MODE = 0, 43 | TMP102_EM_EXTENDED_MODE, 44 | }; 45 | 46 | enum tmp102_thermostat_mode_rate { 47 | TMP102_TM_COMPARATOR_MODE = 0, 48 | TMP102_TM_INTERRUPT_MODE, 49 | }; 50 | 51 | enum tmp102_shutdown_mode { 52 | TMP102_SD_ACTIVE_MODE = 0, 53 | TMP102_SD_SHUTDOWN_MODE, 54 | }; 55 | 56 | enum tmp102_active_pin_polarity { 57 | TMP102_POL_ACTIVE_LOW = 0, 58 | TMP102_POL_ACTIVE_HIGH, 59 | }; 60 | 61 | enum tmp102_fault_queue { 62 | TMP102_FX_RETRY_1 = 0, 63 | TMP102_FX_RETRY_2, 64 | TMP102_FX_RETRY_4, 65 | TMP102_FX_RETRY_6, 66 | }; 67 | 68 | struct tmp102_configuration { 69 | 70 | /** MSB.*/ 71 | /** shutdown mode.*/ 72 | uint8_t shutdown_mode : 1; 73 | /** thermostat mode.*/ 74 | uint8_t thermostat_mode : 1; 75 | /** polarity.*/ 76 | uint8_t pol : 1; 77 | /** fault queue.*/ 78 | uint8_t fault_queue : 2; 79 | /** converster resulution bit(read only).*/ 80 | uint8_t converter_resolution : 2; 81 | /** onse shot conversion. This is useful in shutdown mode.*/ 82 | uint8_t one_shot : 1; 83 | 84 | /** LSB.*/ 85 | /** reserved bit fields.*/ 86 | uint8_t reserved_1 : 4; 87 | /** It decides temperature format.*/ 88 | uint8_t extended_mode : 1; 89 | /** alert status read only.*/ 90 | uint8_t alert_status : 1; 91 | /** converstion rate. default is 4Hz.*/ 92 | uint8_t conversion_rate : 2; 93 | 94 | }; 95 | 96 | /** Tmp102 sensor devices.*/ 97 | extern struct eclite_device tmp102_sensor1; 98 | extern struct eclite_device tmp102_sensor2; 99 | extern struct eclite_device tmp102_sensor3; 100 | extern struct eclite_device tmp102_sensor4; 101 | 102 | #endif /* _TMP102_H_ */ 103 | -------------------------------------------------------------------------------- /services/eclite_fw/src/drivers/usbc_pd_driver/ccg.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | 9 | #define DATA_ROLE 1 10 | #define POWER_ROLE 2 11 | #define PARTNER_ATTACHED 3 12 | #define CONNECTION_STATUS 4 13 | #define PD_VERSION 5 14 | 15 | extern struct eclite_device ccg_pd_device; 16 | 17 | -------------------------------------------------------------------------------- /services/eclite_fw/src/ext/pal/eclite_gpio.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include "eclite_hw_interface.h" 10 | #include 11 | #include "platform.h" 12 | #include "common.h" 13 | 14 | LOG_MODULE_REGISTER(eclite_gpio, CONFIG_ECLITE_LOG_LEVEL); 15 | 16 | struct device *eclite_get_gpio_device(const char *name) 17 | { 18 | return (struct device *)device_get_binding(name); 19 | } 20 | 21 | int eclite_gpio_configure(void *dev, uint32_t pin, uint32_t flags) 22 | { 23 | const struct device *gpio_dev = (const struct device *)dev; 24 | 25 | return gpio_pin_configure(gpio_dev, (gpio_pin_t)pin, flags); 26 | } 27 | 28 | int eclite_gpio_register_callback(void *dev, void *cb, 29 | gpio_callback_handler_t handler, 30 | uint32_t pin) 31 | { 32 | const struct device *gpio_dev = (const struct device *)dev; 33 | struct gpio_callback *callback = cb; 34 | int ret; 35 | 36 | gpio_init_callback(callback, handler, BIT(pin)); 37 | ret = gpio_add_callback(gpio_dev, callback); 38 | if (ret) { 39 | LOG_ERR("Callback setup failed"); 40 | return ret; 41 | } 42 | return 0; 43 | } 44 | 45 | int eclite_set_gpio(void *dev, uint32_t pin, uint32_t value) 46 | { 47 | const struct device *gpio_dev = (const struct device *)dev; 48 | 49 | return gpio_pin_set_raw(gpio_dev, pin, value); 50 | } 51 | 52 | int eclite_get_gpio(void *dev, uint32_t pin, uint32_t *value) 53 | { 54 | const struct device *gpio_dev = (const struct device *)dev; 55 | 56 | *value = gpio_pin_get_raw(gpio_dev, pin); 57 | return SUCCESS; 58 | } 59 | 60 | int eclite_gpio_pin_enable_callback(void *dev, uint32_t pin, uint32_t flags) 61 | { 62 | const struct device *gpio_dev = (const struct device *)dev; 63 | 64 | return gpio_pin_interrupt_configure(gpio_dev, (gpio_pin_t)pin, flags); 65 | } 66 | 67 | int eclite_gpio_pin_disable_callback(void *dev, uint32_t pin) 68 | { 69 | const struct device *gpio_dev = (const struct device *)dev; 70 | uint32_t flags = GPIO_INPUT | GPIO_INT_DISABLE; 71 | 72 | return gpio_pin_interrupt_configure(gpio_dev, pin, flags); 73 | } 74 | -------------------------------------------------------------------------------- /services/eclite_fw/src/ext/pal/eclite_pwm.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | 11 | struct device *eclite_get_pwm_device(const char *name) 12 | { 13 | return (struct device *)device_get_binding(name); 14 | } 15 | 16 | int eclite_init_pwm(void *dev, void *cfg) 17 | { 18 | /* Referene API like all other drivers */ 19 | return 0; 20 | } 21 | 22 | int eclite_write_pwm(void *dev, uint32_t pwm, uint32_t period, 23 | uint32_t pulse) 24 | { 25 | pwm_flags_t flags = 0; 26 | 27 | return pwm_pin_set_cycles(dev, pwm, period, pulse, flags); 28 | } 29 | -------------------------------------------------------------------------------- /services/eclite_fw/src/ext/pal/include/common.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /** 8 | * @file 9 | * @brief provide common function and macro for application. 10 | */ 11 | 12 | #ifndef _COMMON_H_ 13 | #define _COMMON_H_ 14 | 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include 20 | 21 | /** Error codes.*/ 22 | #define SUCCESS 0 23 | /** Error codes.*/ 24 | #define FAILURE 1 25 | 26 | 27 | /** Error codes.*/ 28 | #define ERROR -1 29 | 30 | /** 31 | * @cond INTERNAL_HIDDEN 32 | * 33 | * These are used internally. 34 | */ 35 | #define BIT0 BIT(0) 36 | #define BIT1 BIT(1) 37 | #define BIT2 BIT(2) 38 | #define BIT3 BIT(3) 39 | #define BIT4 BIT(4) 40 | #define BIT5 BIT(5) 41 | #define BIT6 BIT(6) 42 | #define BIT7 BIT(7) 43 | #define BIT8 BIT(8) 44 | #define BIT9 BIT(9) 45 | #define BIT10 BIT(10) 46 | #define BIT11 BIT(11) 47 | #define BIT12 BIT(12) 48 | #define BIT13 BIT(13) 49 | #define BIT14 BIT(14) 50 | #define BIT15 BIT(15) 51 | #define BIT16 BIT(16) 52 | #define BIT17 BIT(17) 53 | #define BIT18 BIT(18) 54 | #define BIT19 BIT(19) 55 | #define BIT20 BIT(20) 56 | #define BIT21 BIT(21) 57 | #define BIT22 BIT(22) 58 | #define BIT23 BIT(23) 59 | #define BIT24 BIT(24) 60 | #define BIT25 BIT(25) 61 | #define BIT26 BIT(26) 62 | #define BIT27 BIT(27) 63 | #define BIT28 BIT(28) 64 | #define BIT29 BIT(29) 65 | #define BIT30 BIT(30) 66 | #define BIT31 BIT(31) 67 | /** 68 | * @endcond 69 | */ 70 | 71 | 72 | /** 73 | * @brief This function finds bit position from given mask. 74 | * 75 | * @Param mask is bit map. 76 | * 77 | * @retval is bit position. 78 | */ 79 | static inline uint8_t find_bit_position(uint32_t mask) 80 | { 81 | int position = -1; 82 | 83 | while (mask) { 84 | mask >>= 1; 85 | position++; 86 | } 87 | return position; 88 | } 89 | 90 | #ifdef CONFIG_ECLITE_DEBUG 91 | /** EClite debug macro.*/ 92 | #define ECLITE_LOG_DEBUG(param ...) printk("\n[ECL_DBG] " param) 93 | #else 94 | /** EClite debug macro.*/ 95 | #define ECLITE_LOG_DEBUG(param ...) 96 | 97 | #endif /* CONFIG_ECLITE_DEBUG */ 98 | 99 | #endif /* _COMMON_H_ */ 100 | -------------------------------------------------------------------------------- /services/eclite_fw/src/frameworks/usbc_framework/ucsi.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2020 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | 10 | LOG_MODULE_REGISTER(ucsi, CONFIG_ECLITE_LOG_LEVEL); 11 | 12 | /* This framework will be called in PD INT context */ 13 | int ucsi_framework(uint8_t cmd_id) 14 | { 15 | int ret; 16 | struct eclite_device *dev = find_dev_by_type(DEV_UCSI); 17 | 18 | /* Look for USCI device, if not found return error */ 19 | if (!dev) { 20 | LOG_ERR("No UCSI device found"); 21 | return ERROR; 22 | } 23 | 24 | struct ucsi_api_t *api = dev->driver_api; 25 | 26 | /* Look for driver api, if not found return error */ 27 | if (!api) { 28 | LOG_ERR("No UCSI driver APIs"); 29 | return ERROR; 30 | } 31 | 32 | ECLITE_LOG_DEBUG(" "); 33 | 34 | /* call commands from the command table */ 35 | ret = api->ucsi_fn(dev); 36 | 37 | ARG_UNUSED(cmd_id); 38 | 39 | return ret; 40 | } 41 | 42 | /* This framework will be called in HECI / when framework wants 43 | * to send data context read and write data to and from HECI buffer 44 | * framework buffer 45 | */ 46 | 47 | int ucsi_command(uint8_t cmd, uint8_t len, uint8_t *buf) 48 | { 49 | int ret = 0; 50 | struct eclite_device *dev = find_dev_by_type(DEV_UCSI); 51 | 52 | /* Look for USCI device, if not found return error */ 53 | if (!dev) { 54 | LOG_ERR("No UCSI device found"); 55 | return ERROR; 56 | } 57 | 58 | struct ucsi_data_t *data = dev->driver_data; 59 | 60 | /* Look for driver data, if not found return error */ 61 | if (!data) { 62 | LOG_ERR("No UCSI driver data"); 63 | return ERROR; 64 | } 65 | 66 | ECLITE_LOG_DEBUG(" "); 67 | 68 | ARG_UNUSED(len); 69 | 70 | switch (cmd) { 71 | case USBC_MSG_IN: 72 | memcpy(buf, &data->msg_in, sizeof(data->msg_in)); 73 | memcpy(buf + sizeof(data->msg_in), &data->cci, 74 | sizeof(data->cci)); 75 | break; 76 | case USBC_MSG_OUT: 77 | memcpy(&data->msg_out, buf, sizeof(data->msg_out)); 78 | memcpy(&data->control, buf + sizeof(data->msg_out), 79 | sizeof(data->control)); 80 | break; 81 | default: 82 | LOG_ERR("Unknown UCSI command"); 83 | ret = ERROR; 84 | break; 85 | } 86 | 87 | return ret; 88 | } 89 | 90 | -------------------------------------------------------------------------------- /services/ehl-oob/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(DEFINED ENV{BOARD}) 3 | if($ENV{BOARD} STREQUAL "sam_e70_xplained") 4 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 5 | endif($ENV{BOARD} STREQUAL "sam_e70_xplained") 6 | endif(DEFINED ENV{BOARD}) 7 | 8 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 9 | project(ehl-oob) 10 | target_include_directories(app PRIVATE .) 11 | message(STATUS "OOB being built as Application") 12 | FILE(GLOB app_sources adapter/*.c common/*.c mqtt_client/*.c ehl/ehl-oob.c pmc_client/pmc_client.c ehl/main.c) 13 | target_sources(app PRIVATE ${app_sources}) 14 | elseif(CONFIG_SOC_INTEL_PSE) 15 | message(STATUS "OOB being built as Library") 16 | add_subdirectory(adapter) 17 | add_subdirectory(mqtt_client) 18 | add_subdirectory(common) 19 | add_subdirectory(pmc_client) 20 | add_subdirectory(sec_bios_ipc) 21 | add_subdirectory(ehl) 22 | zephyr_include_directories(.) 23 | endif() 24 | -------------------------------------------------------------------------------- /services/ehl-oob/adapter/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(ehl_oob) 5 | target_sources(app PRIVATE adapter.c) 6 | elseif(CONFIG_SOC_INTEL_PSE) 7 | zephyr_sources_ifdef(CONFIG_OOB_SERVICE telit.c adapter.c thingsboard.c 8 | azure_iot.c) 9 | endif() 10 | -------------------------------------------------------------------------------- /services/ehl-oob/common/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(ehl_oob) 5 | target_sources(app PRIVATE credentials.c) 6 | elseif(CONFIG_SOC_INTEL_PSE) 7 | zephyr_sources_ifdef(CONFIG_OOB_SERVICE credentials.c) 8 | endif() 9 | -------------------------------------------------------------------------------- /services/ehl-oob/common/credentials.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * \file credentials.h 8 | * 9 | * \brief This contains declaration for all the structures and variables 10 | * needed by managability to establish connection with the cloud. 11 | * 12 | */ 13 | 14 | #ifndef _COMMON_CREDENTIALS_H_ 15 | #define _COMMON_CREDENTIALS_H_ 16 | 17 | #if defined(CONFIG_SOC_INTEL_PSE) 18 | #include "pse_app_framework.h" 19 | #elif defined(CONFIG_BOARD_SAM_E70_XPLAINED) 20 | #include 21 | #endif 22 | 23 | #include "utils.h" 24 | 25 | #define MAX_ARR_LEN 64 26 | #define MAX_ID_LEN 512 27 | #define MAX_CERT_LEN 2048 28 | 29 | /** 30 | * cloud_credentials structure 31 | * 32 | * @details structure variable to hold all credentials info. The fields are 33 | * self-explanatory and structure variable is initialized in ehl_oob by 34 | * calling function populate_credentials 35 | * 36 | * This is passed down to different parts of managability code 37 | * where it is derefernced. 38 | * 39 | */ 40 | struct cloud_credentials { 41 | const char cloud_type[MAX_ARR_LEN]; 42 | const char cloud_host[MAX_ARR_LEN]; 43 | const char cloud_port[MAX_ARR_LEN]; 44 | const char token[MAX_ID_LEN]; 45 | size_t token_size; 46 | const char username[MAX_ID_LEN]; 47 | size_t username_size; 48 | const char mqtt_client_id[MAX_ID_LEN]; 49 | size_t mqtt_client_id_size; 50 | const char proxy_url[MAX_ARR_LEN]; 51 | const char proxy_port[MAX_ARR_LEN]; 52 | unsigned char trusted_ca[MAX_CERT_LEN]; 53 | size_t trusted_ca_size; 54 | enum cloud_adapter cloud_adapter; 55 | #if defined(CONFIG_MQTT_LIB_TLS) 56 | const char cloud_tls_sni[MAX_ARR_LEN]; 57 | #endif 58 | }; 59 | 60 | /** 61 | * Pointer to cloud_credentials structure type 62 | */ 63 | extern VAR_DEFINER_BSS struct cloud_credentials cred_var; 64 | extern VAR_DEFINER_BSS struct cloud_credentials *creds; 65 | 66 | /* 67 | * OOB thread commands states are handled through 68 | * managability fifo after processing each command OOB thread 69 | * was suspend on fifo, sec heci thread once not needed for PSE 70 | * this thread can send cancel request to oob thread using same fifo 71 | * to exit wait loop 72 | */ 73 | extern VAR_DEFINER_BSS struct k_fifo managability_fifo; 74 | 75 | /** 76 | * Function used to interface with sec_bios_ipc and populate 77 | * fields from the bios into the creds 78 | * 79 | * @retval nonzero on failure and 0 on success 80 | **/ 81 | int oob_set_provision_state(unsigned int oob_prov_state); 82 | bool oob_get_provision_state(void); 83 | int populate_credentials(void); 84 | void oob_release_credentials(void); 85 | #endif 86 | -------------------------------------------------------------------------------- /services/ehl-oob/common/oob_errors.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * \file oob_errors.h 8 | * 9 | * \brief This contains declaration for all the structures and variables 10 | * needed by managability to establish connection with the cloud. 11 | * 12 | */ 13 | 14 | #ifndef _OOB_ERRORS_H_ 15 | #define _OOB_ERRORS_H_ 16 | 17 | /** 18 | * OOB ERROR CODES 19 | */ 20 | 21 | /* OOB SUCCESS codes*/ 22 | #define OOB_SUCCESS 0 23 | 24 | /* Use to make OOB thread entry point exit*/ 25 | #define OOB_ERR_THREAD_ABORT 1 26 | 27 | /* OOB Network Interface found */ 28 | #define OOB_ERR_NO_INTERFACE_FOUND 2 29 | 30 | /* OOB TLS credentials add err */ 31 | #define OOB_ERR_TLS_CREDENTIALS_ADD 3 32 | 33 | /* OOB PMC client related errors */ 34 | #define OOB_ERR_PMC_FAILED 4 35 | #define OOB_ERR_PMC_INVALID_ACTION_ARGUMENT 5 36 | 37 | /* OOB Buffer related */ 38 | #define OOB_ERR_BUFFER_OVERFLOW 6 39 | #define OOB_ERR_MESSAGE_FAILED 7 40 | 41 | /* OOB cloud credentials fetch */ 42 | #define OOB_ERR_FETCH_ERROR 8 43 | 44 | #define OOB_ERR_FETCH_CLOUD_ADAPTER 9 45 | #define OOB_ERR_FETCH_CLOUD_USERNAME 10 46 | #define OOB_ERR_FETCH_CLOUD_PASSWORD 11 47 | #define OOB_ERR_FETCH_CLOUD_HOST_URL 12 48 | #define OOB_ERR_FETCH_CLOUD_HOST_PORT 13 49 | #define OOB_ERR_FETCH_PROXY_HOST_URL 14 50 | #define OOB_ERR_FETCH_PROXY_HOST_PORT 15 51 | #define OOB_ERR_FETCH_ROOT_CA 16 52 | #define OOB_ERR_FETCH_CLOUD_MQTT_CLIENT_ID 17 53 | 54 | /* OOB memory allocation */ 55 | #define OOB_ERR_MALLOC 18 56 | 57 | /* sub topic, subscription error */ 58 | #define OOB_ERR_ADAPTER_SUB_TOPIC_CPY 19 59 | #define OOB_ERR_MQTT_SUBSCRIPTION_ERR 20 60 | 61 | /* OOB Network errors */ 62 | #define OOB_ERR_DNS_RESOLUTION_ERR 21 63 | #define OOB_ERR_NO_IPV4_ADDR 22 64 | #define OOB_DECOMM_COMPLETED 23 65 | 66 | /* OOB MQTT connection error */ 67 | #define OOB_ERR_MQTT_DISCONNECT 24 68 | #define OOB_ERR_MQTT_RECONNECT 25 69 | 70 | #endif /* END _OOB_ERRORS_H_ */ 71 | -------------------------------------------------------------------------------- /services/ehl-oob/common/pse_app_framework.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * \file common/pse_app_framework.h 8 | * 9 | * \brief This file contains all the includes 10 | * required for registering with PSE framework 11 | * 12 | */ 13 | #if defined(CONFIG_SOC_INTEL_PSE) 14 | #ifndef PSE_APP_FRAMEWORK_H 15 | #define PSE_APP_FRAMEWORK_H 16 | #include 17 | #endif /* end PSE_APP_FRAMEWORK_H */ 18 | #endif /* end CONFIG_SOC_INTEL_PSE */ 19 | -------------------------------------------------------------------------------- /services/ehl-oob/common/utils.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * \file utils.h 8 | * 9 | * \brief This file contains all declarations and macro definiitons & 10 | * preprocesor directives needed as common include for all files 11 | * in managability 12 | * 13 | */ 14 | 15 | #ifndef _COMMON_UTILS_H_ 16 | #define _COMMON_UTILS_H_ 17 | 18 | #include "oob_errors.h" 19 | #include "pse_app_framework.h" 20 | #include 21 | 22 | #define GENERAL_BUF_SIZE 512 23 | #define BIG_GENERAL_BUF_SIZE 1024 24 | 25 | /* OOB Variable Definer */ 26 | #if defined(CONFIG_SOC_INTEL_PSE) 27 | #define VAR_DEFINER \ 28 | APP_GLOBAL_VAR(2) 29 | 30 | #define VAR_DEFINER_BSS \ 31 | APP_GLOBAL_VAR_BSS(2) 32 | #endif 33 | 34 | /** Application wait times(millisecs) */ 35 | #define APP_MINI_LOOP_TIME 1000 36 | 37 | /** Meaningful string to print instead of RC_STR */ 38 | #define RC_STR(rc) ((rc) == 0 ? "OK" : "ERROR") 39 | 40 | /** enum type used in extract_adapter and henceforth to use pass 41 | * around the cloud_adapter enum type 42 | */ 43 | enum cloud_adapter { NOADAPTER = -1, TELIT, AZURE, THINGSBOARD }; 44 | 45 | /** enum messages to identify the type of incoming messages from server. 46 | * Currently these are the only types for all possible incoming messages 47 | * from cloud adapter of any type. 48 | */ 49 | enum oob_messages { REBOOT, DECOMMISSION, POWERON, POWEROFF, IGNORE, 50 | RELAY, PLT_STATE_CHANGE_EVENT, PLT_STATE_TIMER_EVENT, 51 | TLS_SESSION_STATE_EVENT, MQTT_STATE_CHANGE_EVENT, 52 | PLT_NW_MGMT_EVENT }; 53 | 54 | /** enum pmc_messages to identify different kinds of 55 | * power management commands 56 | */ 57 | enum pmc_messages { PMC_ACTION_REBOOT_HOST, 58 | PMC_ACTION_REBOOT_PLATFORM, 59 | PMC_ACTION_POWERON, 60 | PMC_ACTION_POWEROFF }; 61 | 62 | /** 63 | * managability fifo queue 64 | * 65 | * @details This is first-in-first-out queue used to share messages between 66 | * MQTT publish_rx_tc callback thread and wait_for_events which run in 67 | * the main thread. The message is by itself is cloud agnostic. 68 | */ 69 | struct fifo_message { 70 | void *fifo_reserved; 71 | uint8_t *next_msg; 72 | enum oob_messages current_msg_type; 73 | }; 74 | 75 | /** 76 | * enum type used to differentiate outgoing messages 77 | */ 78 | enum app_message_type { STATIC, DYNAMIC, EVENT, API }; 79 | 80 | /** 81 | * enum type to identify or track the pm state status 82 | */ 83 | enum pm_status { ACTIVE_POWER, LOW_POWER }; 84 | 85 | /** 86 | * enum type to identify or track TLS session & NW event status 87 | */ 88 | enum oob_conn_state { NW_MGMT_EVENT_INIT, 89 | NW_MGMT_EVENT_RECEIVED, 90 | NW_MGMT_EVENT_STOP, 91 | TLS_SESSION_INIT, 92 | TLS_SESSION_RECONNECT }; 93 | 94 | 95 | #endif /* endif _COMMON_UTILS_H */ 96 | -------------------------------------------------------------------------------- /services/ehl-oob/ehl/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(ehl_oob) 5 | zephyr_include_directories(.) 6 | target_sources(app PRIVATE ehl-oob.c) 7 | elseif(CONFIG_SOC_INTEL_PSE) 8 | zephyr_sources_ifdef(CONFIG_OOB_SERVICE ehl-oob.c) 9 | zephyr_include_directories(.) 10 | endif() 11 | -------------------------------------------------------------------------------- /services/ehl-oob/ehl/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * \brief Entry point to ehl-oob manageability. Performs 8 | * the following: 9 | * 10 | * Starts the Manageability application by calling 11 | * the ehl_oob_bootstrap 12 | * 13 | **/ 14 | 15 | #include 16 | #include 17 | 18 | int main(void) 19 | { 20 | ehl_oob_bootstrap(); 21 | return OOB_SUCCESS; 22 | } 23 | -------------------------------------------------------------------------------- /services/ehl-oob/mqtt_client/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(ehl_oob) 5 | target_sources(app PRIVATE mqtt_client.c) 6 | elseif(CONFIG_SOC_INTEL_PSE) 7 | zephyr_sources_ifdef(CONFIG_OOB_SERVICE mqtt_client.c) 8 | endif() 9 | -------------------------------------------------------------------------------- /services/ehl-oob/pmc_client/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(ehl_oob) 5 | target_sources(app PRIVATE pmc_client.c) 6 | elseif(CONFIG_SOC_INTEL_PSE) 7 | zephyr_sources_ifdef(CONFIG_OOB_SERVICE pmc_client.c) 8 | endif() 9 | -------------------------------------------------------------------------------- /services/ehl-oob/pmc_client/pmc_client.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * \file pmc_client.c 8 | * 9 | * \brief This file is the OOB PMC client implementation 10 | * which interfaces with apis of the PMC service to trigger 11 | * system POWER UP, POWER DOWN, REBOOT etc 12 | * 13 | */ 14 | 15 | #include 16 | #include 17 | #if defined(CONFIG_SOC_INTEL_PSE) 18 | #include 19 | 20 | /* PMC short msg codes 21 | * These are sent over IPC 22 | */ 23 | #define PMC_CMD 0x14 24 | #define PMC_GLOBAL_POWEROFF_CODE 1 25 | #define PMC_GLOBAL_REBOOT_CODE 2 26 | #define PMC_HOST_REBOOT_CODE 4 27 | #define PMC_HOST_REBOOT_WITHOUT_POWERCYCLE 8 28 | #define PMC_HOST_POWEROFF_CODE 16 29 | #define PMC_HOST_WAKE_CODE 32 30 | 31 | #endif /* CONFIG_SOC_INTEL_PSE */ 32 | 33 | LOG_MODULE_REGISTER(OOB_PMC_CLIENT, CONFIG_OOB_LOGGING); 34 | 35 | /** 36 | * This function is a wrapper around PMC 37 | * apis and is used EHL OOB to invoke 38 | * Power commands on the SOC 39 | * 40 | * @param [in] enum pmc_messages pmc_action 41 | * @retval 0 on success and any other value on failure 42 | * 43 | * \see common/utils.h 44 | **/ 45 | int pmc_action(enum pmc_messages pmc_action) 46 | { 47 | #if defined(CONFIG_SOC_INTEL_PSE) 48 | int status = OOB_ERR_PMC_FAILED; 49 | #else 50 | int status = 0; 51 | #endif 52 | 53 | #if defined(CONFIG_SOC_INTEL_PSE) 54 | struct pmc_msg_t usr_msg = { 0 }; 55 | 56 | usr_msg.client_id = PMC_CLIENT_OOB; 57 | 58 | switch (pmc_action) { 59 | case PMC_ACTION_POWERON: 60 | usr_msg.format = FORMAT_SHORT; 61 | usr_msg.u.short_msg.cmd_id = PMC_CMD; 62 | usr_msg.u.short_msg.payload = PMC_HOST_WAKE_CODE; 63 | break; 64 | 65 | case PMC_ACTION_POWEROFF: 66 | usr_msg.format = FORMAT_SHORT; 67 | usr_msg.u.short_msg.cmd_id = PMC_CMD; 68 | usr_msg.u.short_msg.payload = PMC_HOST_POWEROFF_CODE; 69 | break; 70 | 71 | case PMC_ACTION_REBOOT_PLATFORM: 72 | usr_msg.format = FORMAT_SHORT; 73 | usr_msg.u.short_msg.cmd_id = PMC_CMD; 74 | usr_msg.u.short_msg.payload = PMC_GLOBAL_REBOOT_CODE; 75 | break; 76 | 77 | case PMC_ACTION_REBOOT_HOST: 78 | usr_msg.format = FORMAT_SHORT; 79 | usr_msg.u.short_msg.cmd_id = PMC_CMD; 80 | usr_msg.u.short_msg.payload = PMC_HOST_REBOOT_CODE; 81 | break; 82 | } 83 | 84 | status = pmc_sync_send_msg(&usr_msg); 85 | if (status != 0) { 86 | LOG_ERR("Error in request processed by pmc service\n"); 87 | if (pmc_action != PMC_ACTION_POWEROFF) { 88 | usr_msg.format = FORMAT_WIRE_GLOBAL_RESET; 89 | status = pmc_sync_send_msg(&usr_msg); 90 | if (status != 0) { 91 | LOG_ERR("Failed to trigger wired global reset"); 92 | } 93 | } 94 | } 95 | #endif 96 | return status; 97 | } 98 | -------------------------------------------------------------------------------- /services/ehl-oob/sec_bios_ipc/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.13.1) 2 | if(CONFIG_BOARD_SAM_E70_XPLAINED) 3 | include($ENV{ZEPHYR_BASE}/cmake/app/boilerplate.cmake NO_POLICY_SCOPE) 4 | project(ehl_oob) 5 | target_sources(app PRIVATE) 6 | elseif(CONFIG_SOC_INTEL_PSE) 7 | zephyr_sources_ifdef(CONFIG_OOB_BIOS_IPC pse_oob_sec_internal.c pse_oob_sec.c pse_oob_sec_heci_client.c) 8 | endif() 9 | -------------------------------------------------------------------------------- /services/ehl-oob/sec_bios_ipc/pse_oob_sec_enum.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #pragma once 8 | 9 | #ifndef PSE_OOB_SEC_ENUM_H 10 | #define PSE_OOB_SEC_ENUM_H 11 | 12 | /* 13 | * Define provision state 14 | * e.g. provisioned, decommissioned, 15 | * pending decommissioned/reprovisioned. 16 | */ 17 | enum sec_prov_state { 18 | SEC_PROV, 19 | SEC_DECOM, 20 | SEC_RPROV, 21 | SEC_PEND 22 | }; 23 | 24 | /* 25 | * This defines the type of mode OOB_SEC 26 | * is working in.It is default to daemon 27 | * mode per PSE architecture. Normal 28 | * mode is not supported currently. 29 | */ 30 | enum sec_mode { 31 | SEC_NORMAL, 32 | SEC_DAEMON 33 | }; 34 | 35 | /* 36 | * This defines the type of credentials 37 | * to be decommissioned/reprovisioned 38 | * between OOB_AGENT and OOB_SEC. 39 | */ 40 | enum sec_info_type { 41 | SEC_DEV_ID, 42 | SEC_TOK_ID, 43 | SEC_CLD_HOST_URL, 44 | SEC_CLD_HOST_PORT, 45 | SEC_PXY_HOST_URL, 46 | SEC_PXY_HOST_PORT, 47 | SEC_PROV_STATE 48 | }; 49 | 50 | /* 51 | * This is a flag indicating 52 | * a decommissioned/reprovisioned 53 | * is pending prior to warm reset. 54 | */ 55 | enum reprov_pend_flag { 56 | SEC_REPROV_NONE, 57 | SEC_REPROV_PEND, 58 | SEC_DECOMM_PEND 59 | }; 60 | 61 | #endif /* PSE_OOB_SEC_ENUM_H */ 62 | -------------------------------------------------------------------------------- /services/ehl-oob/sec_bios_ipc/pse_oob_sec_heci_client_internal.h: -------------------------------------------------------------------------------- 1 | /** 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | /** 7 | * @file 8 | * 9 | * @brief Private APIs for the BIOS OOB IPC handler. 10 | */ 11 | 12 | #ifndef PSE_OOB_SEC_HECI_CLIENT_INTERNAL_H 13 | #define PSE_OOB_SEC_HECI_CLIENT_INTERNAL_H 14 | 15 | #ifdef __cplusplus 16 | extern "C" { 17 | #endif 18 | 19 | /* {892D1D46-6B91-4B62-8A99-EBF72878667E} */ 20 | #define SEC_HC_GUID { \ 21 | 0x892D1D46, 0x6B91, 0x4B62, { \ 22 | 0x8A, 0x99, 0xEB, 0xF7, 0x28, 0x78, 0x66, 0x7E \ 23 | } \ 24 | } 25 | 26 | #define SEC_HC_MAX_RX_SIZE 4096 27 | #define SEC_HC_STACK_SIZE 4096*2 28 | #define SEC_HC_HEAP_SIZE 4096 29 | 30 | #define SEC_HC_MAJOR_MINOR_VERSION 0x2 31 | /* 1.00 = 0x0 32 | * 1.01 = 0x1 33 | * 1.02 = 0x2 34 | */ 35 | 36 | #ifdef __cplusplus 37 | } 38 | #endif 39 | 40 | #endif /* PSE_OOB_SEC_HECI_CLIENT_INTERNAL_H */ 41 | -------------------------------------------------------------------------------- /services/ehl-oob/sec_bios_ipc/pse_oob_sec_status_code.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #pragma once 8 | 9 | #ifndef PSE_OOB_SEC_STATUS_CODE_H 10 | #define PSE_OOB_SEC_STATUS_CODE_H 11 | 12 | #define SEC_FAILED_OOB_DISABLED 0x10000000 13 | #define SEC_FAILED_OOB_BUFFER_OVERFLOW 0x10000001 14 | #define SEC_FAILED_OOB_HASH_MISMATCH 0x10000002 15 | #define SEC_FAILED_OOB_TIMEOUT 0x10000003 16 | 17 | #define SEC_STATUS_OOB_READY 0x20000000 18 | #define SEC_STATUS_OOB_STARTING 0x20000001 19 | #define SEC_STATUS_OOB_NOT_STARTED 0x20000002 20 | 21 | 22 | #endif /* PSE_OOB_SEC_STATUS_CODE_H */ 23 | -------------------------------------------------------------------------------- /services/ehl-oob/sec_bios_ipc/unit_test_sideband_drng.c: -------------------------------------------------------------------------------- 1 | /** 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include "driver/sedi_driver_sideband.h" 8 | #include 9 | 10 | LOG_MODULE_REGISTER(OOB_SEC_UNITTEST, CONFIG_OOB_LOGGING); 11 | 12 | /* 13 | * FWD [PSE][SB][IPC][HFPGA]PSE can not communicate with PMC by 14 | * PSE->PMC SB in HFPGA due to SBR table setting in PSE IP-FPGA 15 | * URL: https://hsdes.intel.com/resource/1507024351 16 | */ 17 | 18 | enum DRNG_REGS { 19 | EGETDATA24 = 0x0054 20 | }; 21 | 22 | void test_sideband_drng_reg(u32_t addr, unsigned char *reg_name) 23 | { 24 | 25 | u64_t read_val; 26 | int ret; 27 | 28 | LOG_INF( 29 | "Begin to test sideband DRNG %s\n", 30 | reg_name); 31 | 32 | ret = sedi_sideband_send(0, SB_DRNG, SEDI_SIDEBAND_ACTION_READ, 33 | addr, 0); 34 | 35 | if (ret != 0) { 36 | LOG_INF( 37 | "Error in send! return value is 0x%04x\n", 38 | ret); 39 | } 40 | 41 | LOG_INF("Read command finished!\n"); 42 | 43 | ret = sedi_sideband_wait_ack(0, SB_DRNG, SEDI_SIDEBAND_ACTION_READ, 44 | &read_val); 45 | 46 | if (ret != 0) { 47 | LOG_INF( 48 | "Error in read! return value is 0x%04x", 49 | ret); 50 | } 51 | 52 | LOG_INF("Read %s value is 0x%04x\n", 53 | reg_name, 54 | (u32_t)read_val); 55 | 56 | } 57 | 58 | void test_sideband_drng(void) 59 | { 60 | /* Enable the following if test_sideband_pmc() is not called 61 | * isesi_sideband_init(0); 62 | * isesi_sideband_set_power(0, ISESI_POWER_FULL); 63 | */ 64 | LOG_INF("Begin to test sideband DRNG\n"); 65 | LOG_INF("===========================\n"); 66 | 67 | test_sideband_drng_reg(EGETDATA24, "EGETDATA24"); 68 | test_sideband_drng_reg(EGETDATA24, "EGETDATA24 x2"); 69 | 70 | } 71 | -------------------------------------------------------------------------------- /services/fw_version/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation. 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | if(CONFIG_MISC_FW_VERSION) 6 | zephyr_include_directories(${PROJECT_BINARY_DIR}/fw_version) 7 | 8 | add_custom_target(fw_version 9 | COMMAND ${CMAKE_COMMAND} -D PROJECT_BINARY_DIR=${PROJECT_BINARY_DIR} -P ${CMAKE_CURRENT_SOURCE_DIR}/fw_version.cmake 10 | WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} 11 | ) 12 | add_dependencies(zephyr fw_version) 13 | 14 | zephyr_sources(fw_version.c) 15 | endif() 16 | -------------------------------------------------------------------------------- /services/fw_version/Kconfig: -------------------------------------------------------------------------------- 1 | # Kconfig - FW Version configuration options 2 | # 3 | # Copyright (c) 2021 Intel Corporation. 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | 8 | config MISC_FW_VERSION 9 | bool "print FW Version strings" 10 | default y 11 | -------------------------------------------------------------------------------- /services/fw_version/fw_version.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | 10 | #include 11 | 12 | void __weak fwver_user_print(void) 13 | { 14 | } 15 | 16 | static int fwver_print(const struct device *arg) 17 | { 18 | ARG_UNUSED(arg); 19 | 20 | printk("\nFW VERSION: %s.%s.%s\n", 21 | FWVER_MAJOR, FWVER_MINOR, FWVER_PATCH); 22 | printk("FW HW IP: %s\n", FWVER_HW_IP); 23 | printk("FW BUILD: DATE %s, TIME %s, BY %s@%s\n", FWVER_BUILD_DATE, 24 | FWVER_BUILD_TIME, FWVER_WHOAMI, FWVER_HOST_NAME); 25 | 26 | fwver_user_print(); 27 | printk("\n"); 28 | return 0; 29 | } 30 | 31 | SYS_INIT(fwver_print, APPLICATION, 0); 32 | -------------------------------------------------------------------------------- /services/fw_version/fw_version.cmake: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2021 Intel Corporation. 2 | # 3 | # SPDX-License-Identifier: Apache-2.0 4 | 5 | cmake_minimum_required(VERSION 3.2) 6 | set(fwver_in_file ${CMAKE_CURRENT_SOURCE_DIR}/../../FW_VERSION) 7 | set(fwver_out_file ${PROJECT_BINARY_DIR}/fw_version/fw_version.h) 8 | set(fwver_env_file ${PROJECT_BINARY_DIR}/fw_version/fw_version_env) 9 | unset(fwver_str_list) 10 | file(REMOVE ${fwver_out_file} ${fwver_env_file}) 11 | 12 | if(EXISTS ${fwver_in_file}) 13 | file(STRINGS ${fwver_in_file} fwver_in) 14 | foreach(line ${fwver_in}) 15 | string(REGEX MATCH "([A-Z_]*) = ([0-9A-Za-z_]*)" _ ${line}) 16 | set(FWVER_${CMAKE_MATCH_1} ${CMAKE_MATCH_2}) 17 | set(fwver_str_list ${fwver_str_list} FWVER_${CMAKE_MATCH_1}) 18 | endforeach() 19 | else() 20 | message(FATAL_ERROR "FW_VERSION file is missing!") 21 | endif() 22 | 23 | string(TIMESTAMP FWVER_BUILD_DATE %m%d%Y) 24 | set(fwver_str_list ${fwver_str_list} FWVER_BUILD_DATE) 25 | string(TIMESTAMP FWVER_BUILD_TIME %H%M%S) 26 | set(fwver_str_list ${fwver_str_list} FWVER_BUILD_TIME) 27 | 28 | execute_process(COMMAND hostname 29 | WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} 30 | OUTPUT_VARIABLE FWVER_HOST_NAME) 31 | string(STRIP ${FWVER_HOST_NAME} FWVER_HOST_NAME) 32 | set(fwver_str_list ${fwver_str_list} FWVER_HOST_NAME) 33 | 34 | execute_process(COMMAND whoami 35 | WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} 36 | OUTPUT_VARIABLE FWVER_WHOAMI) 37 | string(STRIP ${FWVER_WHOAMI} FWVER_WHOAMI) 38 | set(fwver_str_list ${fwver_str_list} FWVER_WHOAMI) 39 | 40 | macro(gen_git_ver git_dir) 41 | execute_process(COMMAND git diff-index --name-only HEAD 42 | WORKING_DIRECTORY ${git_dir} 43 | OUTPUT_VARIABLE git_dirty) 44 | 45 | execute_process(COMMAND git rev-parse --verify --short HEAD 46 | WORKING_DIRECTORY ${git_dir} 47 | OUTPUT_VARIABLE _git_ver) 48 | if(NOT ${_git_ver} STREQUAL "") 49 | string(STRIP ${_git_ver} git_ver) 50 | endif() 51 | 52 | if(NOT "${git_dirty}" STREQUAL "") 53 | string(APPEND git_ver "-dirty") 54 | endif() 55 | endmacro() 56 | 57 | 58 | configure_file(include/fw_version.h.in ${fwver_out_file}) 59 | 60 | 61 | file(APPEND ${fwver_out_file} "\n\n/* user defined */\n") 62 | file(READ ${fwver_out_file} fwver_out) 63 | foreach(ver_str ${fwver_str_list}) 64 | file(APPEND ${fwver_env_file} "${ver_str}=${${ver_str}}\n") 65 | string(REGEX MATCH "#define ${ver_str} " out_matched ${fwver_out}) 66 | if(NOT "${out_matched}" STREQUAL "") 67 | continue() 68 | endif() 69 | 70 | file(APPEND ${fwver_out_file} "#define ${ver_str} \"${${ver_str}}\"\n") 71 | endforeach() 72 | -------------------------------------------------------------------------------- /services/fw_version/include/fw_version.h.in: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #define FWVER_MAJOR "@FWVER_MAJOR@" 8 | #define FWVER_MINOR "@FWVER_MINOR@" 9 | #define FWVER_PATCH "@FWVER_PATCH@" 10 | #define FWVER_HW_IP "@FWVER_HW_IP@" 11 | 12 | #define FWVER_BUILD_DATE "@FWVER_BUILD_DATE@" 13 | #define FWVER_BUILD_TIME "@FWVER_BUILD_TIME@" 14 | #define FWVER_HOST_NAME "@FWVER_HOST_NAME@" 15 | #define FWVER_WHOAMI "@FWVER_WHOAMI@" 16 | -------------------------------------------------------------------------------- /services/sys_service/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | add_subdirectory_ifdef(CONFIG_HOST_SERVICE host_service) 2 | zephyr_sources_ifdef(CONFIG_SYS_SERVICE resource_table.c) 3 | zephyr_sources_ifdef(CONFIG_SYS_SERVICE sys_service.c) 4 | zephyr_sources_ifdef(CONFIG_PMC_SERVICE pmc_service/pmc_service.c) 5 | zephyr_sources_ifdef(CONFIG_PM_SERVICE pm_service/pm_service.c) 6 | zephyr_sources_ifdef(CONFIG_WOL_SERVICE wol/wol_service.c) 7 | zephyr_sources_ifdef(CONFIG_SYS_SERVICE pm_syscall_handler.c) 8 | zephyr_include_directories(include) 9 | -------------------------------------------------------------------------------- /services/sys_service/Kconfig: -------------------------------------------------------------------------------- 1 | config SYS_SERVICE 2 | bool "SYS Service" 3 | help 4 | Enable System service. 5 | 6 | if SYS_SERVICE 7 | rsource "host_service/Kconfig" 8 | endif 9 | 10 | rsource "pm_service/Kconfig" 11 | rsource "pmc_service/Kconfig" 12 | rsource "wol/Kconfig" 13 | -------------------------------------------------------------------------------- /services/sys_service/host_service/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | add_library(subsys__host_service INTERFACE) 2 | 3 | zephyr_include_directories(include) 4 | zephyr_sources_ifdef(CONFIG_HOST_SERVICE host_ipc_service.c) 5 | zephyr_sources_ifdef(CONFIG_SYS_MNG sys_mng.c) 6 | add_subdirectory_ifdef(CONFIG_HECI heci) 7 | -------------------------------------------------------------------------------- /services/sys_service/host_service/Kconfig: -------------------------------------------------------------------------------- 1 | # Kconfig - pse-host communication configuration options 2 | # 3 | # Copyright (c) 2021 Intel Corporation 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | 8 | menu "host_service" 9 | 10 | config HOST_SERVICE 11 | bool "HOST_SERVICE support" 12 | select IPC 13 | select IPC_SEDI 14 | help 15 | this option enables pse-host communication support. 16 | 17 | if HOST_SERVICE 18 | config SYS_MNG 19 | bool "System Management Protocol support" 20 | default y 21 | help 22 | pse-host system management commands handling. 23 | 24 | config HOST_TIME_SYNC 25 | bool "Sync POSIX REALTIME with host UTC time" 26 | default y 27 | select POSIX_CLOCK 28 | help 29 | Sync POSIX REALTIME with host UTC time passed by host driver 30 | 31 | config HECI 32 | bool "HECI Protocol support" 33 | default y 34 | help 35 | host HECI protocol 36 | 37 | if HECI 38 | rsource "heci/Kconfig" 39 | endif 40 | 41 | endif 42 | endmenu 43 | -------------------------------------------------------------------------------- /services/sys_service/host_service/heci/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | zephyr_sources(heci.c) 2 | zephyr_sources_ifdef(CONFIG_SMHI smhi_client.c) 3 | zephyr_sources_ifdef(CONFIG_HECI_USE_DMA heci_dma.c) 4 | -------------------------------------------------------------------------------- /services/sys_service/host_service/heci/Kconfig: -------------------------------------------------------------------------------- 1 | # Kconfig - host communication configuration options 2 | # 3 | # Copyright (c) 2021 Intel Corporation 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | 8 | comment "pse-host HECI protocol support" 9 | 10 | module = HECI 11 | module-str = heci 12 | source "subsys/logging/Kconfig.template.log_config" 13 | 14 | config SMHI 15 | bool "enable the SMHI client" 16 | default y 17 | help 18 | SMHI is a basic system HECI client used by host to get basic 19 | fw status and info 20 | 21 | if SMHI 22 | module = SMHI 23 | module-str = smhi 24 | source "subsys/logging/Kconfig.template.log_config" 25 | endif 26 | 27 | config HECI_MSG_DUMP 28 | bool "if HECI message dumping is neeed for debugging" 29 | depends on LOG 30 | help 31 | this configuration is used for HECI debugging, to print all 32 | HECI in/out message 33 | 34 | config HECI_MAX_MSG_SIZE 35 | int "max message size of HECI protocol" 36 | default 4096 37 | help 38 | set this to config max message size of HECI protocol 39 | 40 | config HECI_PAGE_SIZE 41 | int "max page size of HECI protocol" 42 | default 4096 43 | help 44 | set this to config page size of HECI protocol, 45 | equals the page size of pse sram 46 | 47 | config HECI_USE_DMA 48 | bool "if HECI use dma to tranfer dma, as an extension of ipc" 49 | select DMA 50 | select DMA_SEDI 51 | help 52 | set the HECI_USE_DMA to config HECI to use dma, while data 53 | length is too long. 54 | 55 | config HECI_FLOW_CONTROL_WAIT_TIMEOUT 56 | int "timeout in ms to wait flow control when send heci message" 57 | default 5000 58 | help 59 | the max time in ms that the heci client message sending will 60 | wait for the flow control from peer client. 61 | 62 | if HECI_USE_DMA 63 | config HECI_DMA_THRESHOLD 64 | int "the threshold when using dma in HECI" 65 | default 372 66 | help 67 | when data length exceeds the max length of ipc msg size, HECI 68 | should use dma, and the threshold should no larger than max 69 | size of ipc msg field. 70 | 71 | config DMA_ALIGN_SIZE 72 | int "dma align size" 73 | default 32 74 | help 75 | dma align size 76 | 77 | endif 78 | -------------------------------------------------------------------------------- /services/sys_service/host_service/heci/heci_dma.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include "heci_internal.h" 8 | 9 | #define GET_NUM_PAGE_BITMAPS(size) \ 10 | ((size + BITS_PER_DW - 1) / BITS_PER_DW) 11 | #define GET_NUM_PAGES(size) \ 12 | ((size + CONFIG_HECI_PAGE_SIZE - 1) / CONFIG_HECI_PAGE_SIZE) 13 | #define BITMAP_SLC(idx) ((idx) / BITS_PER_DW) 14 | #define BITMAP_BIT(idx) ((idx) % BITS_PER_DW) 15 | 16 | #define GET_MSB(data64) ((uint32_t)(data64 >> 32)) 17 | #define GET_LSB(data64) ((uint32_t)(data64)) 18 | 19 | #define HECI_DMA_DEV_NAME "DMA_0" 20 | #define HECI_DMA_DEV SEDI_DMA_0 21 | #define HECI_DMA_DEV_CHN 1 22 | #define DMA_TIMEOUT_MS 500 23 | 24 | extern heci_device_t heci_dev; 25 | extern struct k_mutex dev_lock; 26 | 27 | bool send_client_msg_dma(heci_conn_t *conn, mrd_t *msg); 28 | 29 | void heci_dma_alloc_notification(heci_bus_msg_t *msg); 30 | 31 | void heci_dma_xfer_ack(heci_bus_msg_t *msg); 32 | -------------------------------------------------------------------------------- /services/sys_service/host_service/heci/smhi_client.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef __SMHI_CLIENT_H 8 | #define __SMHI_CLIENT_H 9 | 10 | #include 11 | #include 12 | #include "heci.h" 13 | 14 | #define REBOOT_FLAG BIT(0) 15 | #define SMHI_CONN_FLAG BIT(1) 16 | 17 | #define PSE_VNN_STATUS_REG0 0x4050003c 18 | #define PSE_VNN_STATUS_REG1 0x4050006c 19 | 20 | /* SMHI Commands */ 21 | typedef enum { 22 | /*retrieve PSE system info*/ 23 | SMHI_GET_VERSION = 0x1, 24 | SMHI_GET_TIME = 0x8, 25 | /* System control*/ 26 | SMHI_PSE_RESET = 0x2, 27 | SMHI_COMMAND_LAST 28 | } smhi_command_id; 29 | 30 | typedef struct { 31 | uint8_t command : 7; 32 | uint8_t is_response : 1; 33 | uint16_t has_next : 1; 34 | uint16_t reserved : 15; 35 | uint8_t status; 36 | } __packed smhi_msg_hdr_t; 37 | 38 | typedef struct { 39 | uint16_t major; 40 | uint16_t minor; 41 | uint16_t hotfix; 42 | uint16_t build; 43 | } __packed smhi_get_version_resp; 44 | 45 | typedef struct { 46 | uint64_t rtc_us; 47 | /*below reserved to adapt ISH*/ 48 | uint64_t tsync_counter; 49 | uint64_t rtc_us_do_sync; 50 | uint64_t tsync_counter_do_sync; 51 | uint64_t mia_frequency; 52 | uint64_t tsync_freq; 53 | } __packed smhi_get_time_resp; 54 | 55 | typedef struct { 56 | uint32_t reserved; 57 | } __packed smhi_reset_resp; 58 | #endif /* __SMHI_CLIENT_H */ 59 | -------------------------------------------------------------------------------- /services/sys_service/host_service/host_service_common.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef HOST_SERVICE_COMMON_H 8 | #define HOST_SERVICE_COMMON_H 9 | 10 | #if defined(CONFIG_HOST_SERVICE) 11 | extern __kernel struct k_thread host_service_thread; 12 | K_THREAD_STACK_EXTERN(host_service_stack); 13 | extern __kernel struct k_sem sem_ipc_read; 14 | 15 | #define HOST_K_OBJ_LIST \ 16 | &sem_ipc_read, &host_service_thread, &host_service_stack 17 | 18 | #define HOST_K_OBJ_LIST_SIZE (3) 19 | 20 | void host_config(void); 21 | void host_service_init(void); 22 | 23 | #ifdef CONFIG_HECI 24 | int heci_init(struct device *arg); 25 | #endif 26 | #ifdef CONFIG_SYS_MNG 27 | int mng_and_boot_init(struct device *dev); 28 | #endif 29 | 30 | 31 | #else 32 | #define HOST_K_OBJ_LIST [] 33 | #define HOST_K_OBJ_LIST_SIZE (0) 34 | #endif 35 | 36 | #endif 37 | -------------------------------------------------------------------------------- /services/sys_service/host_service/include/ipc_helper.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | /****** IPC helper definitions *****/ 8 | 9 | #ifndef __IPC_HELPER_H 10 | #define __IPC_HELPER_H 11 | 12 | #include "driver/sedi_driver_ipc.h" 13 | #include "device.h" 14 | 15 | #define MNG_CAP_SUPPORTED 1 16 | 17 | #define IPC_PROTOCOL_BOOT 0 18 | #define IPC_PROTOCOL_HECI 1 19 | #define IPC_PROTOCOL_MCTP 2 20 | #define IPC_PROTOCOL_MNG 3 21 | #define IPC_PROTOCOL_INVAILD 0xF 22 | 23 | #define IPC_DATA_LEN_MAX (128) 24 | 25 | #define IPC_HEADER_LENGTH_MASK (0x03FF) 26 | #define IPC_HEADER_PROTOCOL_MASK (0x0F) 27 | #define IPC_HEADER_MNG_CMD_MASK (0x0F) 28 | 29 | #define IPC_HEADER_LENGTH_OFFSET 0 30 | #define IPC_HEADER_PROTOCOL_OFFSET 10 31 | #define IPC_HEADER_MNG_CMD_OFFSET 16 32 | #define IPC_DRBL_BUSY_OFFS 31 33 | 34 | #define IPC_HEADER_GET_LENGTH(drbl_reg) \ 35 | (((drbl_reg) >> IPC_HEADER_LENGTH_OFFSET) & IPC_HEADER_LENGTH_MASK) 36 | #define IPC_HEADER_GET_PROTOCOL(drbl_reg) \ 37 | (((drbl_reg) >> IPC_HEADER_PROTOCOL_OFFSET) & IPC_HEADER_PROTOCOL_MASK) 38 | #define IPC_HEADER_GET_MNG_CMD(drbl_reg) \ 39 | (((drbl_reg) >> IPC_HEADER_MNG_CMD_OFFSET) & IPC_HEADER_MNG_CMD_MASK) 40 | 41 | #define IPC_BUILD_DRBL(length, protocol) \ 42 | ((1 << IPC_DRBL_BUSY_OFFS) \ 43 | | ((protocol) << IPC_HEADER_PROTOCOL_OFFSET) \ 44 | | ((length) << IPC_HEADER_LENGTH_OFFSET)) 45 | 46 | #define IPC_BUILD_MNG_DRBL(cmd, length) \ 47 | (((1) << IPC_DRBL_BUSY_OFFS) \ 48 | | ((IPC_PROTOCOL_MNG) << IPC_HEADER_PROTOCOL_OFFSET) \ 49 | | ((cmd) << IPC_HEADER_MNG_CMD_OFFSET) \ 50 | | ((length) << IPC_HEADER_LENGTH_OFFSET)) 51 | 52 | #ifdef CONFIG_SYS_MNG 53 | int send_rx_complete(const struct device *dev); 54 | #define RTD3_NOTIFIED_STUCK ((int32_t)-1) 55 | #define RTD3_SWITCH_TO_SX ((int32_t)-2) 56 | 57 | void mng_sx_entry(void); 58 | 59 | #endif 60 | 61 | #if CONFIG_HECI 62 | void heci_reset(void); 63 | #endif 64 | 65 | #endif /* __IPC_HELPER_H */ 66 | -------------------------------------------------------------------------------- /services/sys_service/include/heci.rst: -------------------------------------------------------------------------------- 1 | .. _heci_interface: 2 | 3 | HECI Services API Reference 4 | *************************** 5 | 6 | .. doxygengroup:: heci_interface 7 | :project: Zephyr 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /services/sys_service/include/host_ipc_service.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef __IPC_SERVICE_H 8 | #define __IPC_SERVICE_H 9 | /** 10 | * @brief IPC Services APIs 11 | * @defgroup ipc_interface IPC Service APIs 12 | * @{ 13 | */ 14 | #include 15 | #include 16 | #include 17 | 18 | /** 19 | * @brief 20 | * callback function being called to handle protocol message 21 | * @retval 0 If successful. 22 | */ 23 | typedef int (*ipc_msg_handler_f)(const struct device *ipc_dev, uint32_t drbl); 24 | 25 | /** 26 | * @brief 27 | * add function cb in pse-host ipc service task 28 | * to handle ipc message. 29 | * @retval 0 If successful. 30 | */ 31 | int host_protocol_register(uint8_t protocol_id, ipc_msg_handler_f handler); 32 | 33 | /* 34 | * @brief 35 | * request host access to send ipc or DMA to DDR memory 36 | * host_access_dereq() must be paired after every successful host_access_req(), 37 | * otherwise, will lead to RTD3 instabilty 38 | * @param timeout: max timeout wait for access request(in milliseconds) 39 | * @retval handler for the request, <0 if failure 40 | */ 41 | int host_access_req(int32_t timeout); 42 | 43 | /* 44 | * @brief 45 | * release host access 46 | * @param request_handler: handler id returned by host_access_req 47 | * @retval <0 if failure 48 | */ 49 | int host_access_dereq(int request_handler); 50 | 51 | /** 52 | * @} 53 | */ 54 | 55 | #endif /* __IPC_SERVICE_H */ 56 | -------------------------------------------------------------------------------- /services/sys_service/include/index.rst: -------------------------------------------------------------------------------- 1 | .. _reference_services_interface: 2 | 3 | Reference Capabilities 4 | ###################### 5 | 6 | .. toctree:: 7 | :maxdepth: 1 8 | 9 | ipc.rst 10 | heci.rst 11 | pm_index.rst 12 | pmc_index.rst 13 | -------------------------------------------------------------------------------- /services/sys_service/include/ipc.rst: -------------------------------------------------------------------------------- 1 | .. _ipc_interface: 2 | 3 | IPC Services API Reference 4 | ************************** 5 | 6 | .. doxygengroup:: ipc_interface 7 | :project: Zephyr 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /services/sys_service/include/pm_index.rst: -------------------------------------------------------------------------------- 1 | .. _pm_services_interface: 2 | 3 | PM Services API Reference 4 | ************************* 5 | 6 | .. doxygengroup:: pm_services_interface 7 | :project: Zephyr 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /services/sys_service/include/pm_service.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #ifndef _PMA_SERVICE_H_ 14 | #define _PMA_SERVICE_H_ 15 | 16 | /** 17 | * @brief PM Services APIs 18 | * @defgroup pm_services_interface PM Service APIs 19 | * @{ 20 | */ 21 | 22 | #define PM_DBG_LOG(...) 23 | #define PM_INFO(...) 24 | #define NVIC_INTR_PNED_STATUS_REG (0xE000E200) 25 | 26 | /** 27 | * Initiate ARM Core Clock gate. 28 | * 29 | * @retval 0 on success. 30 | * @retval Negative @ref errno for possible error codes. 31 | */ 32 | static inline int power_arm_cg(void) 33 | { 34 | PM_DBG_LOG("%s\n ", __func__); 35 | 36 | return sedi_pm_set_power_state(PSE_D0i0); 37 | 38 | } 39 | 40 | /** 41 | * Get Atom device status. 42 | * 43 | * @retval 0 on success. 44 | * @retval Negative @ref errno for possible error codes. 45 | */ 46 | static inline int get_atom_dev_status(void) 47 | { 48 | PM_DBG_LOG("%s\n ", __func__); 49 | 50 | return sedi_pm_check_host_device_status(); 51 | } 52 | 53 | /** 54 | * Request PSE to enter sleep where PSE put Trunk level clock gate state. 55 | * 56 | * @retval 0 on success. 57 | * @retval Negative @ref errno for possible error codes. 58 | */ 59 | static inline int power_soc_shallow_sleep(void) 60 | { 61 | sedi_pm_set_power_state(PSE_D0i1); 62 | PM_DBG_LOG("reason %x\n", *((uint32_t *)NVIC_INTR_PNED_STATUS_REG)); 63 | 64 | return 0; 65 | } 66 | 67 | /** 68 | * Verify any pending interrupt in NVIC. 69 | * 70 | * @retval 0 on success. 71 | * @retval Negative @ref errno for possible error codes. 72 | */ 73 | static inline int verify_pend_interrupt(void) 74 | { 75 | PM_DBG_LOG("%s\n ", __func__); 76 | return sedi_pm_check_pending_interrupt(); 77 | } 78 | 79 | /** 80 | * Request PSE to enter sleep where PSE put Trunk level clock gate 81 | * state with SRAM in retention state. 82 | * 83 | * @retval 0 on success. 84 | * @retval Negative @ref errno for possible error codes. 85 | */ 86 | static inline int power_soc_sleep(void) 87 | { 88 | return sedi_pm_set_power_state(PSE_D0i2); 89 | } 90 | 91 | /** 92 | * Request PSE to enter deep sleep where PSE put into power gate state. 93 | * 94 | * @retval 0 on success. 95 | * @retval Negative @ref errno for possible error codes. 96 | */ 97 | static inline int power_soc_deep_sleep(void) 98 | { 99 | return sedi_pm_set_power_state(PSE_D0i3); 100 | } 101 | 102 | __syscall int power_trigger_pme(uint32_t pci_func); 103 | 104 | #include 105 | 106 | /** 107 | * @} 108 | */ 109 | 110 | #endif 111 | -------------------------------------------------------------------------------- /services/sys_service/include/pmc_index.rst: -------------------------------------------------------------------------------- 1 | .. _pmc_services_interface: 2 | 3 | PMC Services API Reference 4 | ************************** 5 | 6 | .. doxygengroup:: pmc_services_interface 7 | :project: Zephyr 8 | 9 | 10 | 11 | -------------------------------------------------------------------------------- /services/sys_service/include/pmc_service.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef PMC_SERVICE_H 8 | #define PMC_SERVICE_H 9 | /** 10 | * @brief PSE Services APIs 11 | * @defgroup pmc_services_interface PSE Service APIs 12 | * @{ 13 | */ 14 | 15 | #include 16 | 17 | #define MAX_PECI_MSG_SIZE (20) 18 | 19 | #define PMC_CLIENT_ECLITE (0) 20 | #define PMC_CLIENT_OOB (1) 21 | 22 | #define FORMAT_SHORT (0) 23 | #define FORMAT_LONG (1) 24 | #define FORMAT_SB_RAW_WRITE (2) 25 | #define FORMAT_SB_RAW_READ (3) 26 | #define FORMAT_HWSB_PME_REQ (4) 27 | #define FORMAT_WIRE_GLOBAL_RESET (5) 28 | 29 | #define PMC_WAIT_ACK (1) 30 | #define PMC_NO_WAIT_ACK (0) 31 | 32 | struct short_msg_t { 33 | uint8_t cmd_id; 34 | uint8_t payload; 35 | uint32_t drbl_val; 36 | }; 37 | 38 | struct pmc_msg_t { 39 | uint32_t client_id : 8; 40 | uint32_t format : 3; 41 | uint32_t wait_for_ack : 1; 42 | uint32_t msg_size : 10; 43 | union _msg_payload { 44 | struct short_msg_t short_msg; 45 | struct sb_raw_message raw_msg; 46 | uint8_t msg[MAX_PECI_MSG_SIZE]; 47 | } u; 48 | }; 49 | 50 | /** 51 | * @brief send pmc sync message. 52 | * 53 | * This routine sends a pmc sync message. 54 | * 55 | * @param usr_msg Pointer to user message 56 | * 57 | * @retval 0 If successful. 58 | * @retval -EIO General input / output error. 59 | * @retval -EINVAL if length > 8. 60 | */ 61 | int pmc_sync_send_msg(struct pmc_msg_t *usr_msg); 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | #endif 68 | 69 | -------------------------------------------------------------------------------- /services/sys_service/include/pse_sys_service.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef SYS_SERVICE_H 8 | #define SYS_SERVICE_H 9 | 10 | /* 11 | * if adding a service, grow the size here. 12 | * if service not configured set according size to 0 13 | */ 14 | #define SYS_K_OBJ_LIST_SIZE (PMC_K_OBJ_LIST_SIZE + HOST_K_OBJ_LIST_SIZE) 15 | #define SYS_SERV_MAIN_STACK_SIZE (1024) 16 | 17 | #if defined(CONFIG_PMC_SERVICE) 18 | #include "pmc_service.h" 19 | #endif 20 | #include "host_ipc_service.h" 21 | 22 | #endif 23 | -------------------------------------------------------------------------------- /services/sys_service/include/wol_service.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | void wol_config(void); 8 | void wol_service_init(void); 9 | 10 | -------------------------------------------------------------------------------- /services/sys_service/pm_service/Kconfig: -------------------------------------------------------------------------------- 1 | # Kconfig - PM Service Options 2 | # 3 | # Copyright (c) 2021 Intel Corporation 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | 8 | menu "PM Service Options" 9 | 10 | config PM_SERVICE 11 | bool "PM Service" 12 | select SYS_POWER_MANAGEMENT 13 | select DEVICE_PM 14 | select RUNTIME_NMI 15 | select TICKLESS_KERNEL 16 | help 17 | pse power management. 18 | 19 | module = PM_SERV 20 | module-str = pm_serv 21 | source "subsys/logging/Kconfig.template.log_config" 22 | 23 | endmenu 24 | -------------------------------------------------------------------------------- /services/sys_service/pm_service/pm_service.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include "sedi.h" 14 | #include "pm_service.h" 15 | 16 | #define PMU_WAKE_ENABLE (0x40500010) 17 | 18 | #define LOG_LEVEL CONFIG_PM_SERV_LOG_LEVEL 19 | #include 20 | LOG_MODULE_REGISTER(pm_serv); 21 | 22 | extern void sedi_pm_wake_isr(void); 23 | extern void sedi_pm_pciedev_isr(void); 24 | extern void sedi_pm_reset_prep_isr(void); 25 | extern void sedi_pm_pmu2nvic_isr(void); 26 | extern void pm_hpet_timer_1_isr(void); 27 | extern void sedi_cru_clk_ack_isr(void); 28 | void pm_hw_event_handler(void *dummy1, void *dummy2, void *dummy3); 29 | 30 | static const struct pm_state_info pm_min_residency[] = 31 | PM_STATE_INFO_DT_ITEMS_LIST(DT_NODELABEL(cpu0)); 32 | 33 | void pm_power_state_set(struct pm_state_info info) 34 | { 35 | PM_DBG_LOG("%s\n ", __func__); 36 | 37 | if (verify_pend_interrupt() != 0) { 38 | return; 39 | } 40 | 41 | if (get_atom_dev_status() != 0 || pm_device_is_any_busy() != 0) { 42 | /*if any of atom owned device or PSE peripheral is busy, then 43 | * we can enter only ARM CG. 44 | */ 45 | power_arm_cg(); 46 | return; 47 | } 48 | 49 | if (ARRAY_SIZE(pm_min_residency) < 1) { 50 | return; 51 | } 52 | 53 | if (info.state == PM_STATE_SUSPEND_TO_IDLE) { 54 | /* D0i0 or D0i1*/ 55 | if (info.min_residency_us == 56 | pm_min_residency[0].min_residency_us) { 57 | power_arm_cg(); 58 | } else if ((ARRAY_SIZE(pm_min_residency) > 1) && 59 | (info.min_residency_us == 60 | pm_min_residency[1].min_residency_us)) { 61 | power_soc_shallow_sleep(); 62 | } 63 | } else if (info.state == PM_STATE_SUSPEND_TO_RAM) { 64 | /* D0i2 or D0i3*/ 65 | if ((ARRAY_SIZE(pm_min_residency) > 2) && 66 | (info.min_residency_us == 67 | pm_min_residency[2].min_residency_us)) { 68 | power_soc_sleep(); 69 | } else if ((ARRAY_SIZE(pm_min_residency) > 3) && 70 | (info.min_residency_us == 71 | pm_min_residency[3].min_residency_us)) { 72 | power_soc_deep_sleep(); 73 | } 74 | } else { 75 | LOG_ERR("Power state not supported\n"); 76 | } 77 | } 78 | 79 | void pm_power_state_exit_post_ops(struct pm_state_info info) 80 | { 81 | PM_DBG_LOG("%s\n ", __func__); 82 | 83 | irq_unlock(0); 84 | /* clear PRIMASK */ 85 | __enable_irq(); 86 | } 87 | 88 | -------------------------------------------------------------------------------- /services/sys_service/pm_syscall_handler.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "sedi.h" 3 | #include "pm_service.h" 4 | 5 | int z_impl_power_trigger_pme(uint32_t pci_func) 6 | { 7 | return sedi_pm_trigger_pme(pci_func); 8 | } 9 | 10 | #ifdef CONFIG_USERSPACE 11 | int z_vrfy_power_trigger_pme(uint32_t pci_func) 12 | { 13 | Z_OOPS(Z_SYSCALL_VERIFY((pci_func >= 0) && (pci_func < 36))); 14 | 15 | return z_impl_power_trigger_pme(pci_func); 16 | } 17 | 18 | #include 19 | #endif /* CONFIG_USERSPACE */ 20 | 21 | -------------------------------------------------------------------------------- /services/sys_service/pmc_service/Kconfig: -------------------------------------------------------------------------------- 1 | 2 | module = PMC 3 | module-str = pmc 4 | source "subsys/logging/Kconfig.template.log_config" 5 | 6 | menu "PMC Service Options" 7 | 8 | config PMC_SERVICE 9 | bool "PMC Service" 10 | select SYS_SERVICE 11 | select SIDEBAND 12 | help 13 | Provide PMC IPC communication interface. 14 | 15 | config PMC_DUMMY_RESP 16 | bool "PMC Dummy response - only for debugging" 17 | help 18 | user can enable dummy PMC response to verify their code flow. 19 | 20 | config RUN_PMC_SERV_SUPERVISORY 21 | bool "RUN PMC Service in supervisory mode" 22 | default y 23 | help 24 | Enable PMC service to run in supervisory mode. 25 | 26 | config PMC_MAX_CLIENT 27 | int "Max number of PMC Client" 28 | default 2 29 | help 30 | Max number of PMC Client supported. 31 | 32 | endmenu 33 | -------------------------------------------------------------------------------- /services/sys_service/pmc_service/pmc_service_common.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #ifndef PMC_SERVICE_COMMON_H 8 | #define PMC_SERVICE_COMMON_H 9 | 10 | #if defined(CONFIG_PMC_SERVICE) 11 | extern __kernel struct k_thread pmc_msg_thread_handle; 12 | K_THREAD_STACK_EXTERN(pmc_msg_thread_stack); 13 | extern __kernel struct k_fifo pmc_serv_fifo; 14 | extern __kernel struct k_mutex pmc_msg_mutex; 15 | extern __kernel struct k_sem pmc_msg_alert; 16 | 17 | #define PMC_K_OBJ_LIST &pmc_msg_mutex, &pmc_msg_alert, \ 18 | &pmc_serv_fifo, &pmc_msg_thread_handle, &pmc_msg_thread_stack 19 | 20 | #define PMC_K_OBJ_LIST_SIZE (5) 21 | 22 | void pmc_config(void); 23 | void pmc_service_init(void); 24 | 25 | #else 26 | 27 | #define PMC_K_OBJ_LIST [] 28 | #define PMC_K_OBJ_LIST_SIZE (0) 29 | 30 | #endif 31 | 32 | #endif 33 | -------------------------------------------------------------------------------- /services/sys_service/resource_table.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | 11 | __attribute__((weak)) struct user_app_res_table_t 12 | global_resource_info[CONFIG_NUM_USER_APP_AND_SERVICE] = { 13 | #ifdef CONFIG_SYS_SERVICE 14 | /* PMC/System service. */ 15 | { .app_id = 0, .priority = SERV_BOOT_PRIO_0, 16 | .dev_list = { "IPC_HOST", "IPC_PMC"}, 17 | .dev_cnt = 2 }, 18 | #endif 19 | #ifdef CONFIG_ECLITE_SERVICE 20 | /* ECLite service. */ 21 | { .app_id = 1, .priority = SERV_BOOT_PRIO_1, 22 | .sys_service = PMC_SERVICE | HOST_SERVICE, 23 | .dev_list = { "I2C_2", "I2C_7", "IPC_HOST", "GPIO_0", "GPIO_1", "PWM_1" }, 24 | .dev_cnt = 6 }, 25 | #endif 26 | #ifdef CONFIG_OOB_SERVICE 27 | /* OOB service. */ 28 | { .app_id = 2, .priority = SERV_BOOT_PRIO_2, 29 | .sys_service = PMC_SERVICE | HOST_SERVICE }, 30 | #endif 31 | /* Hello World sample App. */ 32 | { .app_id = 3, .priority = APP_BOOT_PRIO_1 }, 33 | }; 34 | -------------------------------------------------------------------------------- /services/sys_service/sys_service.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include "pse_sys_service.h" 13 | 14 | #include "pmc_service/pmc_service_common.h" 15 | #include "host_service/host_service_common.h" 16 | #if defined(CONFIG_WOL_SERVICE) 17 | #include "wol_service.h" 18 | #endif 19 | #include "pm_service.h" 20 | 21 | static void sys_config(void) 22 | { 23 | #if defined(CONFIG_PMC_SERVICE) 24 | pmc_config(); 25 | #endif 26 | #if defined(CONFIG_HOST_SERVICE) 27 | host_config(); 28 | #endif 29 | #if defined(CONFIG_WOL_SERVICE) 30 | wol_config(); 31 | #endif 32 | } 33 | 34 | static void sys_service_main(void *p1, void *p2, void *p3) 35 | { 36 | #if defined(CONFIG_PMC_SERVICE) 37 | pmc_service_init(); 38 | #endif 39 | #if defined(CONFIG_HOST_SERVICE) 40 | host_service_init(); 41 | #endif 42 | #if defined(CONFIG_WOL_SERVICE) 43 | wol_service_init(); 44 | #endif 45 | } 46 | 47 | /* Add the requried sys service local kernel object pointer into list. */ 48 | static const void *obj_list[] = { 49 | #if defined(CONFIG_PMC_SERVICE) 50 | PMC_K_OBJ_LIST, 51 | #endif 52 | #if defined(CONFIG_HOST_SERVICE) 53 | HOST_K_OBJ_LIST 54 | #endif 55 | }; 56 | /* Define system service. */ 57 | DEFINE_USER_MODE_APP(0, USER_MODE_SERVICE | K_PART_GLOBAL, sys_service_main, 58 | 1024, (void **)obj_list, SYS_K_OBJ_LIST_SIZE, sys_config); 59 | -------------------------------------------------------------------------------- /services/sys_service/wol/Kconfig: -------------------------------------------------------------------------------- 1 | # Kconfig - WOL service options 2 | # 3 | # Copyright (c) 2021 Intel Corporation 4 | # 5 | # SPDX-License-Identifier: Apache-2.0 6 | # 7 | 8 | menu "WOL Service Options" 9 | 10 | config WOL_SERVICE 11 | bool "WOL Service" 12 | select CONFIG_GPIO 13 | select CONFIG_GPIO_SEDI 14 | default n 15 | help 16 | Enable WOL service. 17 | 18 | config GBE0_WOL_SERVICE 19 | bool "GBE0 WOL Service" 20 | depends on WOL_SERVICE 21 | default y 22 | help 23 | GBE0 WOL configure. 24 | 25 | config GBE1_WOL_SERVICE 26 | bool "GBE1 WOL Service" 27 | depends on WOL_SERVICE 28 | default y 29 | help 30 | GBE1 WOL configure. 31 | 32 | config RGMII_INT_0 33 | int "RGMII_INT input GPIO PIN" 34 | depends on GBE0_WOL_SERVICE 35 | default 4 36 | help 37 | Configure RGMII INT pin. 38 | 39 | config RGMII_INT_1 40 | int "RGMII_INT input GPIO PIN" 41 | depends on GBE1_WOL_SERVICE 42 | default 5 43 | help 44 | Configure RGMII INT pin. 45 | 46 | config GBE0_GPIO_DEV 47 | string "GPIO driver name" 48 | default "GPIO_WOL" 49 | help 50 | Sets device name for GPIO. 51 | 52 | config GBE1_GPIO_DEV 53 | string "GPIO driver name" 54 | default "GPIO_WOL" 55 | help 56 | Sets device name for GPIO. 57 | 58 | config GPIO_INT_DIS_ON_D3_EXIT 59 | bool "disable gpio interrupt on GBE D3 exit" 60 | depends on WOL_SERVICE 61 | default y 62 | help 63 | Disable GPIO interrupt on GBE D3 exit. 64 | 65 | endmenu 66 | 67 | 68 | -------------------------------------------------------------------------------- /services/tsn_network_service/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | FILE(GLOB_RECURSE tsn_net_service_source src/*.c) 2 | 3 | zephyr_sources_ifdef(CONFIG_TSN_NET_SERVICE ${tsn_net_service_source}) 4 | -------------------------------------------------------------------------------- /services/tsn_network_service/Kconfig: -------------------------------------------------------------------------------- 1 | menuconfig TSN_NET_SERVICE 2 | bool "Enable TSN Network Service" 3 | default n 4 | depends on ETH_DWC_EQOS && NET_L2_ETHERNET_MGMT 5 | help 6 | Enable TSN network service to initialize MAC address, 7 | IP address configuration & TSN parameters configuration 8 | from BIOS. 9 | 10 | if TSN_NET_SERVICE 11 | 12 | module = TSN_NET_SERVICE 13 | module-dep = LOG 14 | module-str = Log level for TSN Network Service 15 | module-help = Sets log level for TSN Network Service. 16 | 17 | choice 18 | prompt "$(module-str)" 19 | default $(module)_LOG_LEVEL_DEFAULT 20 | depends on $(module-dep) 21 | help 22 | $(module-help) 23 | 24 | config $(module)_LOG_LEVEL_OFF 25 | bool "Off" 26 | help 27 | Do not write to log. 28 | 29 | config $(module)_LOG_LEVEL_ERR 30 | bool "Error" 31 | help 32 | Only write to log when NET_ERR or LOG_ERR is used. 33 | 34 | config $(module)_LOG_LEVEL_WRN 35 | bool "Warning" 36 | help 37 | Write to log with NET_WARN or LOG_WRN in addition to previous level. 38 | 39 | config $(module)_LOG_LEVEL_INF 40 | bool "Info" 41 | help 42 | Write to log with NET_INFO or LOG_INF in addition to previous levels. 43 | 44 | config $(module)_LOG_LEVEL_DBG 45 | bool "Debug" 46 | help 47 | Write to log with NET_DBG or LOG_DBG in addition to previous levels. 48 | 49 | config $(module)_LOG_LEVEL_DEFAULT 50 | bool "Default" 51 | help 52 | Use default log level. 53 | 54 | endchoice 55 | 56 | config $(module)_LOG_LEVEL 57 | int 58 | default 0 if $(module)_LOG_LEVEL_OFF || !$(module-dep) 59 | default 1 if $(module)_LOG_LEVEL_ERR 60 | default 2 if $(module)_LOG_LEVEL_WRN 61 | default 3 if $(module)_LOG_LEVEL_INF 62 | default 4 if $(module)_LOG_LEVEL_DBG 63 | default LOG_DEFAULT_LEVEL if $(module)_LOG_LEVEL_DEFAULT 64 | 65 | endif # TSN_NET_SERVICE 66 | -------------------------------------------------------------------------------- /services/tsn_network_service/src/ip_region.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #define IP_SUB_REGION_SIZE_MAX (4096) 8 | #define PSE_GBE_PORT_MAX (4) 9 | #define DNS_SERVER_ENTRY_MAX (4) 10 | #define IP_SUB_REGION_SIGNATURE_SIZE (256) /* assume SHA256 */ 11 | 12 | /* This struct will be consumed by PSE FW only */ 13 | struct pse_tsn_ip_config { 14 | uint32_t bus_dev_fnc; /* associated PCI(Bus:Dev:Fnc), ECAM format */ 15 | uint32_t valid; /* 0 = not valid, else = valid */ 16 | 17 | uint32_t static_ip; /* 0 = Dynamic IP from DHCPv4, else = Static IP */ 18 | /* 32bit ipv4 address associated with this port */ 19 | uint8_t ipv4_addr[4]; 20 | /* 128bit ipv6 address associated with this port */ 21 | uint8_t ipv6_addr[16]; 22 | /* 32bit ipv4 subnet address associated with this port */ 23 | uint8_t subnet_mask[4]; 24 | /* 32bit ipv4 gateway address associated with this port */ 25 | uint8_t gateway[4]; 26 | uint32_t dns_srv_num; 27 | /* 32bit ipv4 dns server address associated with this port */ 28 | uint8_t dns_srv_addr[DNS_SERVER_ENTRY_MAX][4]; 29 | /* 32bit ipv4 proxy server address associated with this port */ 30 | uint8_t proxy_addr[4]; 31 | uint32_t proxy_port; 32 | } __attribute__((packed)); 33 | 34 | union pse_ip_config_sub_region_u { 35 | /* ensures the data structure consumes SIZE_MAX */ 36 | uint8_t u8_data[IP_SUB_REGION_SIZE_MAX]; 37 | 38 | struct ip_config_data { 39 | /* data format version */ 40 | uint32_t version; 41 | /* number of valid pse_tsn_ip_addrs in this structure */ 42 | uint32_t num_ports; 43 | /* IP Addresses structures */ 44 | struct pse_tsn_ip_config port[PSE_GBE_PORT_MAX]; 45 | /* signature of the relevant data in this structure */ 46 | uint8_t signature[IP_SUB_REGION_SIGNATURE_SIZE]; 47 | } config; 48 | } pse_ip_config_sub_region; 49 | -------------------------------------------------------------------------------- /services/tsn_network_service/src/mac_region.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #define MAC_ADDR_SUB_REGION_SIZE_MAX (4096) 8 | #ifndef TSN_PORT_MAX 9 | #define TSN_PORT_MAX (4) 10 | #endif 11 | #define MAC_ADDR_SUB_REGION_SIGNATURE_SIZE (256) /* assume SHA256 */ 12 | 13 | /* This struct will be consumed by BIOS & PSE FW */ 14 | struct tsn_mac_addr { 15 | uint32_t bus_dev_fnc; /* associated PCI(Bus:Dev:Fnc), ECAM format */ 16 | 17 | union { 18 | uint64_t u64_mac_addr; 19 | uint32_t u32_mac_addr[2]; 20 | uint8_t u8_mac_addr[6]; 21 | } mac_addr; /* MAC address associated with this port */ 22 | } __attribute__((packed)); 23 | 24 | union { 25 | /* ensures the data structure consumes SIZE_MAX */ 26 | uint8_t u8_data[MAC_ADDR_SUB_REGION_SIZE_MAX]; 27 | 28 | struct mac_config_data { 29 | /* data format version */ 30 | uint32_t version; 31 | /* number of valid ia_tsn_mac_addrs in this structure */ 32 | uint32_t num_ports; 33 | /* TSN MAC Address structures */ 34 | struct tsn_mac_addr port[TSN_PORT_MAX]; 35 | /* signature of the relevant data in this structure */ 36 | uint8_t signature[MAC_ADDR_SUB_REGION_SIGNATURE_SIZE]; 37 | } config; 38 | } tsn_mac_addr_sub_region; 39 | -------------------------------------------------------------------------------- /services/tsn_network_service/src/phyif_region.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | 7 | #include "sedi.h" 8 | 9 | struct phyif_config_data tsn_phyif_region; 10 | 11 | -------------------------------------------------------------------------------- /services/user_app_framework/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | zephyr_include_directories(include) 2 | zephyr_sources_ifdef(CONFIG_USER_APP_FRAMEWORK user_app_framework.c) 3 | zephyr_sources_ifndef(CONFIG_USER_APP_FRAMEWORK non_user_mode_framework.c) 4 | -------------------------------------------------------------------------------- /services/user_app_framework/Kconfig: -------------------------------------------------------------------------------- 1 | menu "General Kernel Options" 2 | 3 | config USER_APP_FRAMEWORK 4 | bool "User mode App framework" 5 | select STACK_CANARIES 6 | select TEST_RANDOM_GENERATOR 7 | select CONFIG_USERSPACE 8 | help 9 | This is a wrapper around Zephyr User mode and 10 | memory domain for defining logical Apps and service. 11 | 12 | config NUM_USER_APP_AND_SERVICE 13 | int "Number of user mode App" 14 | default 0 15 | help 16 | Set how many user mode application needed. 17 | 18 | config NUM_USER_SERVICE 19 | int "Number of user mode service" 20 | default 0 21 | help 22 | Set how many user mode service needed. 23 | config OVERRIDE_APP_RES_TABLE 24 | bool "Enable override default Apps resource table" 25 | default n 26 | help 27 | Enable override default Apps resource table 28 | 29 | config MAX_NUM_DEVICE_LIST 30 | int "Max Number of device access list" 31 | default 8 32 | help 33 | Max Number of device access list. 34 | 35 | config MAX_DEVICE_NAME_LEN 36 | int "Max length of device name" 37 | default 14 38 | help 39 | Max length of device name. 40 | 41 | config APP_FRAMEWORK_LOG 42 | int "Enable user mode framework log" 43 | default 0 44 | help 45 | Enable User mode framework log. 46 | 47 | endmenu 48 | -------------------------------------------------------------------------------- /services/user_app_framework/include/user_app_framework/user_app_config.h: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2021 Intel Corporation. 3 | * 4 | * SPDX-License-Identifier: Apache-2.0 5 | */ 6 | #define PMC_SERVICE (1 << 0) 7 | #define HOST_SERVICE (1 << 1) 8 | 9 | struct user_app_res_table_t { 10 | uint8_t app_id; 11 | int8_t priority; 12 | uint8_t sys_service; 13 | const int8_t dev_list[CONFIG_MAX_NUM_DEVICE_LIST] 14 | [CONFIG_MAX_DEVICE_NAME_LEN]; 15 | uint32_t dev_cnt; 16 | struct k_thread *app_handle; 17 | }; 18 | 19 | extern struct user_app_res_table_t global_resource_info[]; 20 | 21 | static inline struct user_app_res_table_t 22 | *get_user_app_res_table(uint32_t app_id) 23 | { 24 | uint32_t i; 25 | 26 | for (i = 0; i < CONFIG_NUM_USER_APP_AND_SERVICE; i++) { 27 | if (global_resource_info[i].app_id == app_id) { 28 | return &global_resource_info[i]; 29 | } 30 | } 31 | return NULL; 32 | } 33 | -------------------------------------------------------------------------------- /services/user_app_framework/include/user_app_framework/user_app_fw.rst: -------------------------------------------------------------------------------- 1 | .. _usr_app_fw_interface: 2 | 3 | User App Framework 4 | ################## 5 | 6 | .. toctree:: 7 | :maxdepth: 1 8 | 9 | Usermode Framework API Reference 10 | ******************************** 11 | 12 | .. doxygengroup:: usr_app_fw_interface 13 | :project: Zephyr 14 | -------------------------------------------------------------------------------- /services/zephyr/module.yml: -------------------------------------------------------------------------------- 1 | name: services 2 | build: 3 | cmake: . 4 | kconfig: Kconfig 5 | -------------------------------------------------------------------------------- /tools/bin/LICENSE: -------------------------------------------------------------------------------- 1 | Copyright (c) 2022 Intel Corporation 2 | 3 | Redistribution. Redistribution and use in binary form, without 4 | modification, are permitted provided that the following conditions are 5 | met: 6 | 7 | * Redistributions must reproduce the above copyright notice and the 8 | following disclaimer in the documentation and/or other materials 9 | provided with the distribution. 10 | * Neither the name of Intel Corporation nor the names of its suppliers 11 | may be used to endorse or promote products derived from this software 12 | without specific prior written permission. 13 | * No reverse engineering, decompilation, or disassembly of this software 14 | is permitted. 15 | 16 | Limited patent license. Intel Corporation grants a world-wide, 17 | royalty-free, non-exclusive license under patents it now or hereafter 18 | owns or controls to make, have made, use, import, offer to sell and 19 | sell ("Utilize") this software, but solely to the extent that any 20 | such patent is necessary to Utilize the software alone. The patent 21 | license shall not apply to any other combinations which include this 22 | software. No hardware per se is licensed hereunder. 23 | 24 | DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 25 | CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, 26 | BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND 27 | FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 28 | COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 29 | INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 30 | BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 31 | OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 32 | ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 33 | TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 34 | USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 35 | DAMAGE. 36 | -------------------------------------------------------------------------------- /tools/bin/VERSION.txt: -------------------------------------------------------------------------------- 1 | Version Info: 2 | 1. bringup.bin - Release: MR7 Tag:pse_fw_main_z2px_weekly_2325.3_1025 3 | 2. aon_task.bin - Release: MR7 Tag:pse_fw_main_z2px_weekly_2325.3_1025 4 | -------------------------------------------------------------------------------- /tools/bin/aon_task.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/pse-fw/b19072692dfa17d33491ca08ac29943c6604a3a3/tools/bin/aon_task.bin -------------------------------------------------------------------------------- /tools/bin/bringup.bin: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/intel/pse-fw/b19072692dfa17d33491ca08ac29943c6604a3a3/tools/bin/bringup.bin -------------------------------------------------------------------------------- /tools/capsule_script/OOBCapsule_template.json: -------------------------------------------------------------------------------- 1 | { 2 | "FmpGuid": "A7EE90B1-FB4A-4478-B868-367EE9EC97E2", 3 | "Version": 1, 4 | "FV" : 5 | { 6 | "FvGuid": "775F2E50-7441-4DAD-B71E-5DBD5AAC57A6", 7 | "FfsFiles": 8 | [ 9 | { 10 | "FileGuid": "4DB2A373-C936-4544-AA6D-8A194AA9CA7F", 11 | "Compression": false, 12 | "Data" : 13 | [ 14 | [ "a_oob_prov_state", "DECIMAL", 4, 1 ], 15 | [ "a_oob_device_id_size", "DECIMAL", 4, unique_device_id_size ], 16 | [ "a_oob_device_id", "STRING", 512, "unique_device_id" ], 17 | [ "a_oob_token_id_size", "DECIMAL", 4, tenant_token_id_size ], 18 | [ "a_oob_token_id", "STRING", 512, "tenant_token_id" ], 19 | [ "a_oob_cloud_type_size", "DECIMAL", 4, cloud_type_size ], 20 | [ "a_oob_cloud_type", "STRING", 16, "cloud_type" ], 21 | [ "a_oob_cloud_host_url_size", "DECIMAL", 4, cloud_url_size ], 22 | [ "a_oob_cloud_host_url", "STRING", 512, "cloud_url" ], 23 | [ "a_oob_cloud_host_port", "DECIMAL", 4, cloud_port ], 24 | [ "a_proxy_host_url_size", "DECIMAL", 4, proxy_url_size ], 25 | [ "a_proxy_host_url", "STRING", 512, "proxy_url"], 26 | [ "a_proxy_host_port", "DECIMAL", 4, proxy_port ], 27 | [ "a_owner_pub_key_size", "DECIMAL", 4, 8 ], 28 | [ "a_owner_pub_key", "STRING", 512, "abcd1234" ], 29 | [ "a_mqtt_client_id_size", "DECIMAL", 4, unique_client_id_size ], 30 | [ "a_mqtt_client_id", "STRING", 512, "unique_client_id" ] 31 | ] 32 | }, 33 | { 34 | "FileGuid": "2F4DE35A-0D52-44FC-ABF3-75B8AA51F434", 35 | "Compression": false, 36 | "Data" : 37 | [ 38 | [ "a_oob_root_ca", "FILE", pem_file_size, "pem_file_path"] 39 | ] 40 | } 41 | ] 42 | } 43 | } 44 | 45 | 46 | 47 | -------------------------------------------------------------------------------- /tools/capsule_script/azure.pem: -------------------------------------------------------------------------------- 1 | -----BEGIN CERTIFICATE----- 2 | MIIDdzCCAl+gAwIBAgIEAgAAuTANBgkqhkiG9w0BAQUFADBaMQswCQYDVQQGEwJJ 3 | RTESMBAGA1UEChMJQmFsdGltb3JlMRMwEQYDVQQLEwpDeWJlclRydXN0MSIwIAYD 4 | VQQDExlCYWx0aW1vcmUgQ3liZXJUcnVzdCBSb290MB4XDTAwMDUxMjE4NDYwMFoX 5 | DTI1MDUxMjIzNTkwMFowWjELMAkGA1UEBhMCSUUxEjAQBgNVBAoTCUJhbHRpbW9y 6 | ZTETMBEGA1UECxMKQ3liZXJUcnVzdDEiMCAGA1UEAxMZQmFsdGltb3JlIEN5YmVy 7 | VHJ1c3QgUm9vdDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKMEuyKr 8 | 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/tools/capsule_script/mac_template.json: -------------------------------------------------------------------------------- 1 | { 2 | "FmpGuid": "6FEE88FF-49ED-48F1-B77B-EAD15771ABE7", 3 | "Version": 1, 4 | "FV" : 5 | { 6 | "FvGuid": "1A803C55-F034-4E60-AD9E-9D3F32CE273C", 7 | "FfsFiles": 8 | [ 9 | { 10 | "FileGuid": "12E29FB4-AA56-4172-B34E-DD5F4B440AA9", 11 | "Compression": false, 12 | "Data" : 13 | [ 14 | ["Version", "DECIMAL", 4, 1], 15 | ["NumPorts", "DECIMAL", 4, 4], 16 | 17 | ["BDF", "HEXADECIMAL", 4, "000F4000"], 18 | ["MacAddressLow", "HEXADECIMAL", 4, "PCH_Gbe_Low_Mac"], 19 | ["MacAddressHigh", "HEXADECIMAL", 4, "PCH_Gbe_High_Mac"], 20 | 21 | ["BDF", "HEXADECIMAL", 4, "000E9000"], 22 | ["MacAddressLow", "HEXADECIMAL", 4, "PSE_Gbe_0_Low_Mac"], 23 | ["MacAddressHigh", "HEXADECIMAL", 4, "PSE_Gbe_0_High_Mac"], 24 | 25 | ["BDF", "HEXADECIMAL", 4, "000EA000"], 26 | ["MacAddressLow", "HEXADECIMAL", 4, "PSE_Gbe_1_Low_Mac"], 27 | ["MacAddressHigh", "HEXADECIMAL", 4, "PSE_Gbe_1_High_Mac"], 28 | 29 | ["BDF", "HEXADECIMAL", 4, "00000000"], 30 | ["MacAddressLow", "HEXADECIMAL", 4, "AABBCCDD"], 31 | ["MacAddressHigh", "HEXADECIMAL", 4, "00001122"] 32 | ] 33 | } 34 | ] 35 | } 36 | } 37 | -------------------------------------------------------------------------------- /tools/capsule_script/telit.pem: -------------------------------------------------------------------------------- 1 | -----BEGIN CERTIFICATE----- 2 | MIIDXzCCAkegAwIBAgILBAAAAAABIVhTCKIwDQYJKoZIhvcNAQELBQAwTDEgMB4G 3 | A1UECxMXR2xvYmFsU2lnbiBSb290IENBIC0gUjMxEzARBgNVBAoTCkdsb2JhbFNp 4 | Z24xEzARBgNVBAMTCkdsb2JhbFNpZ24wHhcNMDkwMzE4MTAwMDAwWhcNMjkwMzE4 5 | MTAwMDAwWjBMMSAwHgYDVQQLExdHbG9iYWxTaWduIFJvb3QgQ0EgLSBSMzETMBEG 6 | A1UEChMKR2xvYmFsU2lnbjETMBEGA1UEAxMKR2xvYmFsU2lnbjCCASIwDQYJKoZI 7 | hvcNAQEBBQADggEPADCCAQoCggEBAMwldpB5BngiFvXAg7aEyiie/QV2EcWtiHL8 8 | RgJDx7KKnQRfJMsuS+FggkbhUqsMgUdwbN1k0ev1LKMPgj0MK66X17YUhhB5uzsT 9 | gHeMCOFJ0mpiLx9e+pZo34knlTifBtc+ycsmWQ1z3rDI6SYOgxXG71uL0gRgykmm 10 | KPZpO/bLyCiR5Z2KYVc3rHQU3HTgOu5yLy6c+9C7v/U9AOEGM+iCK65TpjoWc4zd 11 | QQ4gOsC0p6Hpsk+QLjJg6VfLuQSSaGjlOCZgdbKfd/+RFO+uIEn8rUAVSNECMWEZ 12 | XriX7613t2Saer9fwRPvm2L7DWzgVGkWqQPabumDk3F2xmmFghcCAwEAAaNCMEAw 13 | DgYDVR0PAQH/BAQDAgEGMA8GA1UdEwEB/wQFMAMBAf8wHQYDVR0OBBYEFI/wS3+o 14 | LkUkrk1Q+mOai97i3Ru8MA0GCSqGSIb3DQEBCwUAA4IBAQBLQNvAUKr+yAzv95ZU 15 | RUm7lgAJQayzE4aGKAczymvmdLm6AC2upArT9fHxD4q/c2dKg8dEe3jgr25sbwMp 16 | jjM5RcOO5LlXbKr8EpbsU8Yt5CRsuZRj+9xTaGdWPoO4zzUhw8lo/s7awlOqzJCK 17 | 6fBdRoyV3XpYKBovHd7NADdBj+1EbddTKJd+82cEHhXXipa0095MJ6RMG3NzdvQX 18 | mcIfeg7jLQitChws/zyrVQ4PkX4268NXSb7hLi18YIvDQVETI53O9zJrlAGomecs 19 | Mx86OyXShkDOOyyGeMlhLxS67ttVb9+E7gUJTb0o2HLO02JQZR7rkpeDMdmztcpH 20 | WD9f 21 | -----END CERTIFICATE----- 22 | -------------------------------------------------------------------------------- /tools/host/trace_dump/readme.txt: -------------------------------------------------------------------------------- 1 | This is a Yocto tool to dump PSE tracing data 2 | 3 | usages: 4 | - Enable FW tracing in the prj.conf of your app 5 | add those configuration options: 6 | CONFIG_TRACING=y 7 | CONFIG_TRACING_CTF=y 8 | CONFIG_TRACING_BACKEND_PSE_SHMEM=y 9 | set "CONFIG_THREAD_NAME=y" to show thread name strings in tracing. Not 10 | MUST, but highly suggest to have. 11 | The default trace buffer size is 64K. To change it, set 12 | "CONFIG_PSE_SHMEM_TRACING_BUFFER_SIZE=xxx", xxx must be (N * 4096). 13 | 14 | - Rebuild your zephyr app, burn and run on board 15 | 16 | - add "iomem=relaxed" into linux boot option while booting 17 | 18 | - scp or copy trace_dump.c onto Yocto /data/ 19 | 20 | - in Yocto shell: 21 | echo on >/sys/bus/pci/devices/0000\:00\:1d.0/power/control #disable RTD3 22 | cd /data/ 23 | gcc -o ptdump ./trace_dump.c 24 | ./ptdump 25 | CTRL + C (stop dumping, there will be a new file /data/channel0_0) 26 | 27 | - Parsing on Ubuntu, there are two tools to use, either of them. 28 | - babeltrace2 (https://babeltrace.org/) 29 | apt-add-repository ppa:lttng/ppa 30 | apt-get update 31 | apt-get install babeltrace2 32 | - TraceCompass (https://www.eclipse.org/tracecompass/) 33 | download in the web 34 | 35 | create an empty directory 36 | copy /zephyr/subsys/tracing/ctf/tsdl/metadata 37 | into it 38 | scp or copy /data/channel0_0 of Yocto into it 39 | 40 | in the directory, run "babeltrace2 convert --clock-cycles ./". 41 | or open TraceCompass, click "File->Open Trace", browse into the 42 | directory, double click file channel0_0 43 | -------------------------------------------------------------------------------- /tools/pse_image_tool/makefile: -------------------------------------------------------------------------------- 1 | # 2 | # Copyright (c) 2019-2021 Intel Corporation. 3 | # 4 | # SPDX-License-Identifier: Apache-2.0 5 | # 6 | 7 | OUT_PATH := ./output 8 | FRAGMENTS_PATH := ./fragments 9 | BASE_DIR := ./ 10 | 11 | XML_OUTPUT_PATH="$(OUT_PATH)/PSE_FW.bin" 12 | ifneq ("$(wildcard $(FRAGMENTS_PATH)/iccm.bin)","") 13 | XML_ICCM_PATH="$(FRAGMENTS_PATH)/iccm.bin" 14 | endif 15 | ifneq ("$(wildcard $(FRAGMENTS_PATH)/aon_task.bin)","") 16 | XML_AON_PATH="$(FRAGMENTS_PATH)/aon_task.bin" 17 | endif 18 | ifneq ("$(wildcard $(FRAGMENTS_PATH)/dccm.bin)","") 19 | XML_DCCM_PATH="$(FRAGMENTS_PATH)/dccm.bin" 20 | endif 21 | ifneq ("$(wildcard $(FRAGMENTS_PATH)/bringup.bin)","") 22 | XML_BRINGUP_PATH="$(FRAGMENTS_PATH)/bringup.bin" 23 | endif 24 | ifneq ("$(wildcard $(FRAGMENTS_PATH)/sram.bin)","") 25 | XML_SRAM_PATH="$(FRAGMENTS_PATH)/sram.bin" 26 | endif 27 | 28 | BUILD_H_PATH := $(BASE_DIR)/build.h 29 | TARGET_XML :=$(OUT_PATH)/image_tool_setting.xml 30 | 31 | TEMPLATE_XML := $(BASE_DIR)/pse_template.xml 32 | 33 | CROSS_COMPILE := ${ZEPHYR_SDK_INSTALL_DIR}/arm-zephyr-eabi/bin/arm-zephyr-eabi- 34 | CC := $(CROSS_COMPILE)gcc 35 | 36 | 37 | C_FLAGS= 38 | C_FLAGS += -D__XML_OUTPUT_PATH=$(XML_OUTPUT_PATH) 39 | 40 | ifneq ($(XML_ICCM_PATH),) 41 | C_FLAGS += -D__XML_ICCM_PATH=$(XML_ICCM_PATH) 42 | endif 43 | 44 | ifneq ($(XML_DCCM_PATH),) 45 | C_FLAGS += -D__XML_DCCM_PATH=$(XML_DCCM_PATH) 46 | endif 47 | 48 | ifneq ($(XML_SRAM_PATH),) 49 | C_FLAGS += -D__XML_SRAM_PATH=$(XML_SRAM_PATH) 50 | endif 51 | 52 | ifneq ($(XML_AON_PATH),) 53 | C_FLAGS += -D__XML_AON_PATH=$(XML_AON_PATH) 54 | endif 55 | 56 | ifneq ($(XML_BRINGUP_PATH),) 57 | C_FLAGS += -D__XML_BRINGUP_PATH=$(XML_BRINGUP_PATH) 58 | endif 59 | 60 | all: $(XML_OUTPUT_PATH) 61 | 62 | $(XML_OUTPUT_PATH): $(TARGET_XML) 63 | @echo ---------------------------------------------------------------- 64 | @echo Generating final image 65 | @echo -------------------- Stitching PSE firmware -------------------- 66 | @/usr/bin/env python3 pse_image_tool.py 67 | FORCE: 68 | 69 | .PHONY:xml_only 70 | xml_only:$(TARGET_XML) 71 | 72 | $(TARGET_XML): FORCE 73 | mkdir -p $(OUT_PATH) 74 | @echo Generating $(TARGET_XML) 75 | @$(CC) -x c -E -P "$(TEMPLATE_XML)" $(C_FLAGS) > "$(TARGET_XML)" 76 | 77 | .PHONY: clean 78 | clean: 79 | rm -rf $(OUT_PATH) 80 | rm -r $(FRAGMENTS_PATH)/*.* 81 | -------------------------------------------------------------------------------- /tools/pse_image_tool/pse_template.xml: -------------------------------------------------------------------------------- 1 | 2 | __XML_OUTPUT_PATH 3 | 1 4 | 5 | #ifdef __XML_BRINGUP_PATH 6 | 7 | __XML_BRINGUP_PATH 8 | 1 9 | 1 10 | BRINGUP 11 | INTL 12 | 1 13 | 1 14 | 0x7000D000 15 | 16 | #endif 17 | #ifdef __XML_AON_PATH 18 | 19 | __XML_AON_PATH 20 | 1 21 | 1 22 | AON 23 | INTL 24 | 1 25 | 1 26 | 0x70000000 27 | 28 | #endif 29 | #ifdef __XML_ICCM_PATH 30 | 31 | __XML_ICCM_PATH 32 | 1 33 | 1 34 | ICCM 35 | INTL 36 | 1 37 | 1 38 | 0x0 39 | 40 | #endif 41 | #ifdef __XML_DCCM_PATH 42 | 43 | __XML_DCCM_PATH 44 | 1 45 | 1 46 | DCCM 47 | INTL 48 | 1 49 | 1 50 | 0x20000000 51 | 52 | #endif 53 | #ifdef __XML_SRAM_PATH 54 | 55 | __XML_SRAM_PATH 56 | 1 57 | 2 58 | SRAM 59 | INTL 60 | 1 61 | 1 62 | 0x60000000 63 | 64 | #endif 65 | 66 | 67 | -------------------------------------------------------------------------------- /west.yml: -------------------------------------------------------------------------------- 1 | # The west manifest file for upstream Zephyr. 2 | # 3 | # The per-installation west configuration file, .west/config, sets the 4 | # path to the project containing this file in the [manifest] section's 5 | # "path" variable. 6 | # 7 | # You are free to create your own manifest files and put them in any 8 | # repository you want, to create your own custom Zephyr installations. 9 | # For example, you could create a manifest file in your own out of 10 | # tree application directory, which would pull this zephyr repository 11 | # in as an ordinary project. 12 | # 13 | # You can pass your manifest repositories to west init when creating a 14 | # new Zephyr installation. See the west documentation for more 15 | # information. 16 | 17 | manifest: 18 | defaults: 19 | remote: upstream 20 | 21 | remotes: 22 | - name: upstream 23 | url-base: https://github.com/zephyrproject-rtos 24 | - name: intel_public_github 25 | url-base: https://github.com/intel 26 | 27 | # 28 | # Please add items below based on alphabetical order 29 | projects: 30 | - name: sedi-drivers 31 | path: modules/hal/sedi 32 | revision: pse 33 | remote: intel_public_github 34 | - name: zephyr 35 | path: zephyr 36 | revision: intel-pse 37 | remote: intel_public_github 38 | import: 39 | name-whitelist: 40 | - mbedtls 41 | - cmsis 42 | - name: rtos-if-drivers 43 | revision: zephyr-pse 44 | path: zephyr-iotg 45 | remote: intel_public_github 46 | self: 47 | path: ehl_pse-fw 48 | --------------------------------------------------------------------------------