├── .github ├── contoller_rover.jpg ├── controller.jpg ├── full.jpg ├── interface.jpg └── render.png ├── .gitignore ├── CAD ├── Controller v64.f3z └── STL │ ├── back.stl │ ├── front.stl │ ├── holder_l_bottom.stl │ ├── holder_l_top.stl │ ├── holder_r_bottom.stl │ ├── holder_r_top.stl │ ├── knob.stl │ ├── knob_marker.stl │ ├── text_e.stl │ ├── text_inner_o.stl │ ├── text_o.stl │ ├── text_r1.stl │ ├── text_r2.stl │ └── text_v.stl ├── CMakeLists.txt ├── LICENSE ├── README.md ├── components ├── ads1115 │ ├── CMakeLists.txt │ ├── README.md │ ├── ads1115.c │ ├── component.mk │ ├── include │ │ └── ads1115.h │ └── lora.c └── lora │ ├── CMakeLists.txt │ ├── Kconfig │ ├── README.md │ ├── component.mk │ ├── include │ └── lora.h │ └── lora.c ├── esp-idf-patch └── no_delay.patch ├── main ├── CMakeLists.txt ├── certs │ ├── cacert.crt │ ├── cacert.pem │ └── prvtkey.pem ├── config.h ├── controller_input.c ├── controller_input.h ├── leds.c ├── leds.h ├── main.c ├── rover_controller.c ├── rover_controller.h ├── rover_telematics.c ├── rover_telematics.h ├── rover_utils.h ├── transport_lora.c ├── transport_lora.h ├── transport_wifi.c ├── transport_wifi.h ├── web_server.c └── web_server.h └── sdkconfig /.github/contoller_rover.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/jakkra/RoverController/dbc4d13fb7690288601ccecb292507cf9eb1bcac/.github/contoller_rover.jpg -------------------------------------------------------------------------------- /.github/controller.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/jakkra/RoverController/dbc4d13fb7690288601ccecb292507cf9eb1bcac/.github/controller.jpg -------------------------------------------------------------------------------- /.github/full.jpg: -------------------------------------------------------------------------------- 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order for cmake to work correctly 3 | cmake_minimum_required(VERSION 3.5) 4 | 5 | set(EXTRA_COMPONENT_DIRS ${CMAKE_CURRENT_LIST_DIR}/components) 6 | 7 | include($ENV{IDF_PATH}/tools/cmake/project.cmake) 8 | project(template-app) -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2020 Jakob Krantz 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Rover Controller 2 | Controller for driving [https://github.com/jakkra/Mars-Rover](https://github.com/jakkra/Mars-Rover). 3 | Webpage for viewing telematics graphs on phone [https://github.com/jakkra/Rover-Mission-Control](https://github.com/jakkra/Rover-Mission-Control). 4 | 5 | ## How it works 6 | Sets up an AP, the Rover will automatically connect if it's in range. 7 | The Rover is controlled by sending joystick and switch state over either LoRa or a websocket. If the Rover isn't connected to the AP, then data will be sent over LoRa instead. There is a switch to override this behaviour and always send data over LoRa even if the Rover is connected to the AP. 8 | 9 | When the Rover is connected to the local AP it will send telematics data over the websocket, or over LoRa if the Rover is outside of WiFi range. The data is then in turn passed on to a phone if one is connected. When the Rover is close by telematics will arrive about 10/s over WiFi, if outide of range then telematics are transported over LoRa. As LoRa modules cannot do true duplex data transfer we need to switch between sending and receiving, meaning telematics sent by the rover while we are sending joystick data will be lost. From experimentation LoRa telematics arrive about every 500ms. 10 | 11 | A phone can connect to the Controller AP to view the telematics from the Rover. Phone opens a websocket connection to the Controller and receives the telematic data the Rover sends. Telematics website can be found here: https://github.com/jakkra/Rover-Mission-Control. 12 | 13 | ## CAD model 14 | Full Fusion 360 project is found in `CAD` folder. 15 | 16 | ## Hardware 17 | - [ESP32 + LoRa module](https://www.banggood.com/2Pcs-LILYGO-TTGO-LORA32-868Mhz-ESP32-LoRa-OLED-0_96-Inch-Blue-Display-bluetooth-WIFI-ESP-32-Development-Board-Module-With-Antenna-p-1507044.html?rmmds=myorder&cur_warehouse=CN) 18 | - 2x [Joysticks](https://www.ebay.com/sch/i.html?_from=R40&_trksid=m570.l1313&_nkw=JH-D400X-R4-10K-4D&_sacat=0) 19 | - 1x ADS1115 (ESP32 does not have enough ADCs for all the pots) 20 | - A few on-off-on switches 21 | - 2 potentiometers 22 | - 2 colored LEDs 23 | 24 | ## Config 25 | For pinmapping see: https://github.com/jakkra/RoverController/blob/master/main/controller_input.c#L46 26 | 27 | ## Images 28 | 29 | 30 | 31 | 32 | 33 | 34 | ## Compiling 35 | Follow instruction on [https://github.com/espressif/esp-idf](https://github.com/espressif/esp-idf) to set up the esp-idf, then just run `idf.py build` or use the [VSCode extension](https://github.com/espressif/vscode-esp-idf-extension). 36 | 37 | ## Building the controller 38 | TBD upon request. 39 | 40 | ## esp-idf patches 41 | Run `git apply esp-idf-patch/no_delay.patch` in your esp-idf folder. This decreases lag for TCP as it will flush the buffers after every write instead of LWIP buffering TCP data to send it in chunks. 42 | 43 | -------------------------------------------------------------------------------- /components/ads1115/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | 2 | idf_component_register(SRCS "ads1115.c" 3 | INCLUDE_DIRS "include") -------------------------------------------------------------------------------- /components/ads1115/README.md: -------------------------------------------------------------------------------- 1 | 2 | By Blake Felt - blake.w.felt@gmail.com 3 | 4 | ESP32 ADS1115 5 | ============= 6 | 7 | A component for TI ADS1115 on ESP-IDF. For an example, see https://github.com/Molorius/ESP32-Examples. 8 | 9 | To add to a project, type: 10 | `git submodule add https://github.com/Molorius/esp32-ads1115.git components/ads1115` 11 | into the base directory of your project. 12 | 13 | The datasheet can be found [here](http://www.ti.com/lit/ds/symlink/ads1115.pdf). 14 | 15 | This has not been tested with more than one ADS1115 connected. 16 | Any suggestions or fixes are gladly appreciated. 17 | 18 | Table of Contents 19 | ================= 20 | 21 | * [Enumerations](#enumerations) 22 | * [ads11115_mux_t](#enum-ads1115_mux_t) 23 | * [ads1115_fsr_t](#enum-ads1115_fsr_t) 24 | * [ads1115_sps_t](#enum-ads1115_sps_t) 25 | * [ads1115_mode_t](#enum-ads1115_mode_t) 26 | * [Functions](#functions) 27 | * [ads1115_config](#ads1115_t-ads1115_configi2c_port_t-i2c_portuint8_t-address) 28 | * [ads1115_set_rdy_pin](#void-ads1115_set_rdy_pinads1115_t-adsgpio_num_t-gpio) 29 | * [ads1115_set_mux](#void-ads1115_set_muxads1115_t-adsads1115_mux_t-mux) 30 | * [ads1115_set_pga](#void-ads1115_set_pgaads1115_t-adsads1115_fsr_t-fsr) 31 | * [ads1115_set_mode](#void-ads1115_set_modeads1115_t-adsads1115_mode_t-mode) 32 | * [ads1115_set_sps](#void-ads1115_set_spsads1115_t-adsads1115_sps_t-sps) 33 | * [ads1115_set_max_ticks](#void-ads1115_set_max_ticksads1115_t-adsticktype_t-max_ticks) 34 | * [ads1115_get_raw](#int16_t-ads1115_get_rawads1115_t-ads) 35 | * [ads1115_get_voltage](#double-ads1115_get_voltageads1115_t-ads) 36 | 37 | Enumerations 38 | ============ 39 | 40 | enum ads1115_mux_t 41 | ------------------ 42 | 43 | The different multiplexer options on the ADS1115. 44 | 45 | *Values* 46 | * `ADS1115_MUX_0_1`: Connect pins 0 and 1. 47 | * `ADS1115_MUX_0_3`: Connect pins 0 and 3. 48 | * `ADS1115_MUX_1_3`: Connect pins 1 and 3. 49 | * `ADS1115_MUX_2_3`: Connect pins 2 and 3. 50 | * `ADS1115_MUX_0_GND`: Connect pin 0 to ground. 51 | * `ADS1115_MUX_1_GND`: Connect pin 1 to ground. 52 | * `ADS1115_MUX_2_GND`: Connect pin 2 to ground. 53 | * `ADS1115_MUX_3_GND`: Connect pin 3 to ground. 54 | 55 | enum ads1115_fsr_t 56 | ------------------ 57 | 58 | The different full-scale resolution options. 59 | 60 | *Values* 61 | * `ADS1115_FSR_6_144`: 6.144 volts 62 | * `ADS1115_FSR_4_096`: 4.096 volts 63 | * `ADS1115_FSR_2_048`: 2.048 volts 64 | * `ADS1115_FSR_1_024`: 1.024 volts 65 | * `ADS1115_FSR_0_512`: 0.512 volts 66 | * `ADS1115_FSR_0_256`: 0.256 volts 67 | 68 | enum ads1115_sps_t 69 | ------------------ 70 | 71 | The different samples per second, or data rate, options. 72 | 73 | *Values* 74 | * `ADS1115_SPS_8`: 8 samples per second 75 | * `ADS1115_SPS_16`: 16 samples per second 76 | * `ADS1115_SPS_32`: 32 samples per second 77 | * `ADS1115_SPS_64`: 64 samples per second 78 | * `ADS1115_SPS_128`: 128 samples per second 79 | * `ADS1115_SPS_250`: 250 samples per second 80 | * `ADS1115_SPS_475`: 475 samples per second 81 | * `ADS1115_SPS_860`: 860 samples per second 82 | 83 | enum ads1115_mode_t 84 | ------------------- 85 | 86 | Continuous or single-shot mode. 87 | 88 | *Values* 89 | * `ADS1115_MODE_CONTINUOUS`: continuous mode. 90 | * `ADS1115_MODE_SINGLE`: single-shot mode. 91 | 92 | Functions 93 | ========= 94 | 95 | ads1115_t ads1115_config(i2c_port_t i2c_port,uint8_t address) 96 | ------------------------------------------------------------- 97 | 98 | Setup of the device. 99 | 100 | *Parameters* 101 | * `i2c_port`: the i2c bus number. 102 | * `address`: the device's i2c address. 103 | 104 | *Returns* 105 | * The configuration file, which is passed to all subsequent functions. 106 | 107 | *Notes* 108 | * This does not setup the i2c bus, this must be done before passing to this function. 109 | 110 | void ads1115_set_rdy_pin(ads1115_t* ads,gpio_num_t gpio) 111 | -------------------------------------------------------- 112 | 113 | Sets up an optional data-ready pin to verify when conversions are complete. 114 | Connect to ALRT/RDY pin on ADS1115. 115 | 116 | *Parameters* 117 | * `ads`: The configuration file. 118 | * `gpio`: The esp32 gpio. Do not setup beforehand. 119 | 120 | void ads1115_set_mux(ads1115_t* ads,ads1115_mux_t mux) 121 | ------------------------------------------------------ 122 | 123 | Sets the pins to be multiplexed. 124 | 125 | *Parameters* 126 | * `ads`: the configuration file. 127 | * `mux`: the desired multiplex option (see enumeration). 128 | 129 | void ads1115_set_pga(ads1115_t* ads,ads1115_fsr_t fsr) 130 | ------------------------------------------------------ 131 | 132 | Sets the full-scale range, or the programmable-gain amplifier. 133 | 134 | *Parameters* 135 | * `ads`: the configuration file. 136 | * `fsr`: the desired full-scale range option (see enumeration). 137 | 138 | void ads1115_set_mode(ads1115_t* ads,ads1115_mode_t mode) 139 | --------------------------------------------------------- 140 | 141 | Sets the read mode. 142 | 143 | *Paremeters* 144 | * `ads`: the configuration file. 145 | * `mode`: the desired mode (see enumeration). 146 | 147 | *Notes* 148 | * To end continuous mode, set it to single-shot mode and make one voltage read. 149 | 150 | void ads1115_set_sps(ads1115_t* ads,ads1115_sps_t sps) 151 | ------------------------------------------------------ 152 | 153 | Sets the sampling speed. 154 | 155 | *Parameters* 156 | * `ads`: the configuration file. 157 | * `sps`: the desired samples per second (see enumeration). 158 | 159 | void ads1115_set_max_ticks(ads1115_t* ads,TickType_t max_ticks) 160 | --------------------------------------------------------------- 161 | 162 | Sets the maximum wait ticks for the i2c reads and writes. See the [i2c documentation](http://esp-idf.readthedocs.io/en/latest/api-reference/peripherals/i2c.html#_CPPv220i2c_master_cmd_begin10i2c_port_t16i2c_cmd_handle_t10TickType_t). 163 | 164 | *Parameters* 165 | * `ads`: the configuration file. 166 | * `max_ticks`: maximum wait ticks. 167 | 168 | int16_t ads1115_get_raw(ads1115_t* ads) 169 | --------------------------------------- 170 | 171 | Reads the voltage based on the current configuration. 172 | 173 | *Parameters* 174 | * `ads`: the configuration file. 175 | 176 | *Returns* 177 | * The 16 bit raw voltage value directly from the ADS1115. 178 | 179 | double ads1115_get_voltage(ads1115_t* ads) 180 | ------------------------------------------ 181 | 182 | Reads the voltage based on the current configuration. 183 | 184 | *Parameters* 185 | * `ads`: the configuration file. 186 | 187 | *Returns* 188 | * The voltage, based on the current full-scale range. This is just a conversion from the raw value. 189 | -------------------------------------------------------------------------------- /components/ads1115/ads1115.c: -------------------------------------------------------------------------------- 1 | 2 | #include "ads1115.h" 3 | #include "freertos/FreeRTOS.h" 4 | #include "freertos/task.h" 5 | #include "freertos/queue.h" 6 | #include "esp_log.h" 7 | 8 | static void IRAM_ATTR gpio_isr_handler(void* arg) { 9 | const bool ret = 1; // dummy value to pass to queue 10 | xQueueHandle gpio_evt_queue = (xQueueHandle) arg; // find which queue to write 11 | xQueueSendFromISR(gpio_evt_queue, &ret, NULL); 12 | } 13 | 14 | static esp_err_t ads1115_write_register(ads1115_t* ads, ads1115_register_addresses_t reg, uint16_t data) { 15 | i2c_cmd_handle_t cmd; 16 | esp_err_t ret; 17 | uint8_t out[2]; 18 | 19 | out[0] = data >> 8; // get 8 greater bits 20 | out[1] = data & 0xFF; // get 8 lower bits 21 | cmd = i2c_cmd_link_create(); 22 | i2c_master_start(cmd); // generate a start command 23 | i2c_master_write_byte(cmd,(ads->address<<1) | I2C_MASTER_WRITE,1); // specify address and write command 24 | i2c_master_write_byte(cmd,reg,1); // specify register 25 | i2c_master_write(cmd,out,2,1); // write it 26 | i2c_master_stop(cmd); // generate a stop command 27 | ret = i2c_master_cmd_begin(ads->i2c_port, cmd, ads->max_ticks); // send the i2c command 28 | i2c_cmd_link_delete(cmd); 29 | ads->last_reg = reg; // change the internally saved register 30 | return ret; 31 | } 32 | 33 | static esp_err_t ads1115_read_register(ads1115_t* ads, ads1115_register_addresses_t reg, uint8_t* data, uint8_t len) { 34 | i2c_cmd_handle_t cmd; 35 | esp_err_t ret; 36 | 37 | if(ads->last_reg != reg) { // if we're not on the correct register, change it 38 | cmd = i2c_cmd_link_create(); 39 | i2c_master_start(cmd); 40 | i2c_master_write_byte(cmd,(ads->address<<1) | I2C_MASTER_WRITE,1); 41 | i2c_master_write_byte(cmd,reg,1); 42 | i2c_master_stop(cmd); 43 | i2c_master_cmd_begin(ads->i2c_port, cmd, ads->max_ticks); 44 | i2c_cmd_link_delete(cmd); 45 | ads->last_reg = reg; 46 | } 47 | cmd = i2c_cmd_link_create(); 48 | i2c_master_start(cmd); // generate start command 49 | i2c_master_write_byte(cmd,(ads->address<<1) | I2C_MASTER_READ,1); // specify address and read command 50 | i2c_master_read(cmd, data, len, 0); // read all wanted data 51 | i2c_master_stop(cmd); // generate stop command 52 | ret = i2c_master_cmd_begin(ads->i2c_port, cmd, ads->max_ticks); // send the i2c command 53 | i2c_cmd_link_delete(cmd); 54 | return ret; 55 | } 56 | 57 | ads1115_t ads1115_config(i2c_port_t i2c_port, uint8_t address) { 58 | ads1115_t ads; // setup configuration with default values 59 | ads.config.bit.OS = 1; // always start conversion 60 | ads.config.bit.MUX = ADS1115_MUX_0_GND; 61 | ads.config.bit.PGA = ADS1115_FSR_4_096; 62 | ads.config.bit.MODE = ADS1115_MODE_SINGLE; 63 | ads.config.bit.DR = ADS1115_SPS_64; 64 | ads.config.bit.COMP_MODE = 0; 65 | ads.config.bit.COMP_POL = 0; 66 | ads.config.bit.COMP_LAT = 0; 67 | ads.config.bit.COMP_QUE = 0b11; 68 | 69 | ads.i2c_port = i2c_port; // save i2c port 70 | ads.address = address; // save i2c address 71 | ads.rdy_pin.in_use = 0; // state that rdy_pin not used 72 | ads.last_reg = ADS1115_MAX_REGISTER_ADDR; // say that we accessed invalid register last 73 | ads.changed = 1; // say we changed the configuration 74 | ads.max_ticks = 10/portTICK_PERIOD_MS; 75 | return ads; // return the completed configuration 76 | } 77 | 78 | void ads1115_set_mux(ads1115_t* ads, ads1115_mux_t mux) { 79 | ads->config.bit.MUX = mux; 80 | ads->changed = 1; 81 | } 82 | 83 | void ads1115_set_rdy_pin(ads1115_t* ads, gpio_num_t gpio) { 84 | const static char* TAG = "ads1115_set_rdy_pin"; 85 | gpio_config_t io_conf; 86 | esp_err_t err; 87 | 88 | io_conf.intr_type = GPIO_PIN_INTR_NEGEDGE; // positive to negative (pulled down) 89 | io_conf.pin_bit_mask = 1<rdy_pin.gpio_evt_queue = xQueueCreate(1, sizeof(bool)); 96 | gpio_install_isr_service(0); 97 | 98 | ads->rdy_pin.in_use = 1; 99 | ads->rdy_pin.pin = gpio; 100 | ads->config.bit.COMP_QUE = 0b00; // assert after one conversion 101 | ads->changed = 1; 102 | 103 | err = ads1115_write_register(ads, ADS1115_LO_THRESH_REGISTER_ADDR,0); // set lo threshold to minimum 104 | if(err) ESP_LOGE(TAG,"could not set low threshold: %s",esp_err_to_name(err)); 105 | err = ads1115_write_register(ads, ADS1115_HI_THRESH_REGISTER_ADDR,0xFFFF); // set hi threshold to maximum 106 | if(err) ESP_LOGE(TAG,"could not set high threshold: %s",esp_err_to_name(err)); 107 | } 108 | 109 | void ads1115_set_pga(ads1115_t* ads, ads1115_fsr_t fsr) { 110 | ads->config.bit.PGA = fsr; 111 | ads->changed = 1; 112 | } 113 | 114 | void ads1115_set_mode(ads1115_t* ads, ads1115_mode_t mode) { 115 | ads->config.bit.MODE = mode; 116 | ads->changed = 1; 117 | } 118 | 119 | void ads1115_set_sps(ads1115_t* ads, ads1115_sps_t sps) { 120 | ads->config.bit.DR = sps; 121 | ads->changed = 1; 122 | } 123 | 124 | void ads1115_set_max_ticks(ads1115_t* ads, TickType_t max_ticks) { 125 | ads->max_ticks = max_ticks; 126 | } 127 | 128 | int16_t ads1115_get_raw(ads1115_t* ads) { 129 | const static char* TAG = "ads1115_get_raw"; 130 | const static uint16_t sps[] = {8,16,32,64,128,250,475,860}; 131 | const static uint8_t len = 2; 132 | uint8_t data[2]; 133 | esp_err_t err; 134 | bool tmp; // temporary bool for reading from queue 135 | 136 | if(ads->rdy_pin.in_use) { 137 | gpio_isr_handler_add(ads->rdy_pin.pin, gpio_isr_handler, (void*)ads->rdy_pin.gpio_evt_queue); 138 | xQueueReset(ads->rdy_pin.gpio_evt_queue); 139 | } 140 | // see if we need to send configuration data 141 | if((ads->config.bit.MODE==ADS1115_MODE_SINGLE) || (ads->changed)) { // if it's single-ended or a setting changed 142 | err = ads1115_write_register(ads, ADS1115_CONFIG_REGISTER_ADDR, ads->config.reg); 143 | if(err) { 144 | ESP_LOGE(TAG,"could not write to device: %s",esp_err_to_name(err)); 145 | if(ads->rdy_pin.in_use) { 146 | gpio_isr_handler_remove(ads->rdy_pin.pin); 147 | xQueueReset(ads->rdy_pin.gpio_evt_queue); 148 | } 149 | return 0; 150 | } 151 | ads->changed = 0; // say that the data is unchanged now 152 | } 153 | 154 | if(ads->rdy_pin.in_use) { 155 | xQueueReceive(ads->rdy_pin.gpio_evt_queue, &tmp, portMAX_DELAY); 156 | gpio_isr_handler_remove(ads->rdy_pin.pin); 157 | } 158 | else { 159 | // wait for 1 ms longer than the sampling rate, plus a little bit for rounding 160 | vTaskDelay((((1000/sps[ads->config.bit.DR]) + 1) / portTICK_PERIOD_MS)+1); 161 | } 162 | 163 | err = ads1115_read_register(ads, ADS1115_CONVERSION_REGISTER_ADDR, data, len); 164 | if(err) { 165 | ESP_LOGE(TAG,"could not read from device: %s",esp_err_to_name(err)); 166 | return 0; 167 | } 168 | return ((uint16_t)data[0] << 8) | (uint16_t)data[1]; 169 | } 170 | 171 | double ads1115_get_voltage(ads1115_t* ads) { 172 | const double fsr[] = {6.144, 4.096, 2.048, 1.024, 0.512, 0.256}; 173 | const int16_t bits = (1L<<15)-1; 174 | int16_t raw; 175 | 176 | raw = ads1115_get_raw(ads); 177 | return (double)raw * fsr[ads->config.bit.PGA] / (double)bits; 178 | } 179 | 180 | double ads1115_get_voltage_from_raw(ads1115_t* ads, int16_t raw) { 181 | const double fsr[] = {6.144, 4.096, 2.048, 1.024, 0.512, 0.256}; 182 | const int16_t bits = (1L<<15)-1; 183 | 184 | return (double)raw * fsr[ads->config.bit.PGA] / (double)bits; 185 | } -------------------------------------------------------------------------------- /components/ads1115/component.mk: -------------------------------------------------------------------------------- 1 | # 2 | # ADS1115 Component Makefile 3 | # 4 | 5 | COMPONENT_ADD_INCLUDEDIRS := . 6 | -------------------------------------------------------------------------------- /components/ads1115/include/ads1115.h: -------------------------------------------------------------------------------- 1 | #ifdef __cplusplus 2 | extern "C" { 3 | #endif 4 | 5 | #ifndef ADS1115_H 6 | #define ADS1115_H 7 | 8 | #include 9 | #include "driver/i2c.h" 10 | #include "driver/gpio.h" 11 | 12 | typedef enum { // register address 13 | ADS1115_CONVERSION_REGISTER_ADDR = 0, 14 | ADS1115_CONFIG_REGISTER_ADDR, 15 | ADS1115_LO_THRESH_REGISTER_ADDR, 16 | ADS1115_HI_THRESH_REGISTER_ADDR, 17 | ADS1115_MAX_REGISTER_ADDR 18 | } ads1115_register_addresses_t; 19 | 20 | typedef enum { // multiplex options 21 | ADS1115_MUX_0_1 = 0, 22 | ADS1115_MUX_0_3, 23 | ADS1115_MUX_1_3, 24 | ADS1115_MUX_2_3, 25 | ADS1115_MUX_0_GND, 26 | ADS1115_MUX_1_GND, 27 | ADS1115_MUX_2_GND, 28 | ADS1115_MUX_3_GND, 29 | } ads1115_mux_t; 30 | 31 | typedef enum { // full-scale resolution options 32 | ADS1115_FSR_6_144 = 0, 33 | ADS1115_FSR_4_096, 34 | ADS1115_FSR_2_048, 35 | ADS1115_FSR_1_024, 36 | ADS1115_FSR_0_512, 37 | ADS1115_FSR_0_256, 38 | } ads1115_fsr_t; 39 | 40 | typedef enum { // samples per second 41 | ADS1115_SPS_8 = 0, 42 | ADS1115_SPS_16, 43 | ADS1115_SPS_32, 44 | ADS1115_SPS_64, 45 | ADS1115_SPS_128, 46 | ADS1115_SPS_250, 47 | ADS1115_SPS_475, 48 | ADS1115_SPS_860 49 | } ads1115_sps_t; 50 | 51 | typedef enum { 52 | ADS1115_MODE_CONTINUOUS = 0, 53 | ADS1115_MODE_SINGLE 54 | } ads1115_mode_t; 55 | 56 | typedef union { // configuration register 57 | struct { 58 | uint16_t COMP_QUE:2; // bits 0.. 1 Comparator queue and disable 59 | uint16_t COMP_LAT:1; // bit 2 Latching Comparator 60 | uint16_t COMP_POL:1; // bit 3 Comparator Polarity 61 | uint16_t COMP_MODE:1; // bit 4 Comparator Mode 62 | uint16_t DR:3; // bits 5.. 7 Data rate 63 | uint16_t MODE:1; // bit 8 Device operating mode 64 | uint16_t PGA:3; // bits 9.. 11 Programmable gain amplifier configuration 65 | uint16_t MUX:3; // bits 12.. 14 Input multiplexer configuration 66 | uint16_t OS:1; // bit 15 Operational status or single-shot conversion start 67 | } bit; 68 | uint16_t reg; 69 | } ADS1115_CONFIG_REGISTER_Type; 70 | 71 | typedef struct { 72 | bool in_use; // gpio is used 73 | gpio_num_t pin; // ready pin 74 | xQueueHandle gpio_evt_queue; // pin triggered queue 75 | } ads1115_rdy_pin_t; 76 | 77 | typedef struct { 78 | ADS1115_CONFIG_REGISTER_Type config; 79 | i2c_port_t i2c_port; 80 | int address; 81 | ads1115_rdy_pin_t rdy_pin; 82 | ads1115_register_addresses_t last_reg; // save last accessed register 83 | bool changed; // save if a value was changed or not 84 | TickType_t max_ticks; // maximum wait ticks for i2c bus 85 | } ads1115_t; 86 | 87 | // initialize device 88 | ads1115_t ads1115_config(i2c_port_t i2c_port, uint8_t address); // set up configuration 89 | 90 | // set configuration 91 | void ads1115_set_rdy_pin(ads1115_t* ads, gpio_num_t gpio); // set up data-ready pin 92 | void ads1115_set_mux(ads1115_t* ads, ads1115_mux_t mux); // set multiplexer 93 | void ads1115_set_pga(ads1115_t* ads, ads1115_fsr_t fsr); // set fsr 94 | void ads1115_set_mode(ads1115_t* ads, ads1115_mode_t mode); // set read mode 95 | void ads1115_set_sps(ads1115_t* ads, ads1115_sps_t sps); // set sampling speed 96 | void ads1115_set_max_ticks(ads1115_t* ads, TickType_t max_ticks); // maximum wait ticks for i2c bus 97 | 98 | int16_t ads1115_get_raw(ads1115_t* ads); // get voltage in bits 99 | double ads1115_get_voltage(ads1115_t* ads); // get voltage in volts 100 | double ads1115_get_voltage_from_raw(ads1115_t* ads, int16_t raw); // Get voltage from a raw reading 101 | 102 | 103 | #endif // ifdef ADS1115_H 104 | 105 | #ifdef __cplusplus 106 | } 107 | #endif 108 | -------------------------------------------------------------------------------- /components/ads1115/lora.c: -------------------------------------------------------------------------------- 1 | 2 | #include "freertos/FreeRTOS.h" 3 | #include "freertos/task.h" 4 | #include "esp_system.h" 5 | #include "driver/spi_master.h" 6 | #include "soc/gpio_struct.h" 7 | #include "driver/gpio.h" 8 | #include 9 | 10 | /* 11 | * Register definitions 12 | */ 13 | #define REG_FIFO 0x00 14 | #define REG_OP_MODE 0x01 15 | #define REG_FRF_MSB 0x06 16 | #define REG_FRF_MID 0x07 17 | #define REG_FRF_LSB 0x08 18 | #define REG_PA_CONFIG 0x09 19 | #define REG_LNA 0x0c 20 | #define REG_FIFO_ADDR_PTR 0x0d 21 | #define REG_FIFO_TX_BASE_ADDR 0x0e 22 | #define REG_FIFO_RX_BASE_ADDR 0x0f 23 | #define REG_FIFO_RX_CURRENT_ADDR 0x10 24 | #define REG_IRQ_FLAGS 0x12 25 | #define REG_RX_NB_BYTES 0x13 26 | #define REG_PKT_SNR_VALUE 0x19 27 | #define REG_PKT_RSSI_VALUE 0x1a 28 | #define REG_MODEM_CONFIG_1 0x1d 29 | #define REG_MODEM_CONFIG_2 0x1e 30 | #define REG_PREAMBLE_MSB 0x20 31 | #define REG_PREAMBLE_LSB 0x21 32 | #define REG_PAYLOAD_LENGTH 0x22 33 | #define REG_MODEM_CONFIG_3 0x26 34 | #define REG_RSSI_WIDEBAND 0x2c 35 | #define REG_DETECTION_OPTIMIZE 0x31 36 | #define REG_DETECTION_THRESHOLD 0x37 37 | #define REG_SYNC_WORD 0x39 38 | #define REG_DIO_MAPPING_1 0x40 39 | #define REG_VERSION 0x42 40 | 41 | /* 42 | * Transceiver modes 43 | */ 44 | #define MODE_LONG_RANGE_MODE 0x80 45 | #define MODE_SLEEP 0x00 46 | #define MODE_STDBY 0x01 47 | #define MODE_TX 0x03 48 | #define MODE_RX_CONTINUOUS 0x05 49 | #define MODE_RX_SINGLE 0x06 50 | 51 | /* 52 | * PA configuration 53 | */ 54 | #define PA_BOOST 0x80 55 | 56 | /* 57 | * IRQ masks 58 | */ 59 | #define IRQ_TX_DONE_MASK 0x08 60 | #define IRQ_PAYLOAD_CRC_ERROR_MASK 0x20 61 | #define IRQ_RX_DONE_MASK 0x40 62 | 63 | #define PA_OUTPUT_RFO_PIN 0 64 | #define PA_OUTPUT_PA_BOOST_PIN 1 65 | 66 | #define TIMEOUT_RESET 100 67 | 68 | static spi_device_handle_t __spi; 69 | 70 | static int __implicit; 71 | static long __frequency; 72 | 73 | /** 74 | * Write a value to a register. 75 | * @param reg Register index. 76 | * @param val Value to write. 77 | */ 78 | void 79 | lora_write_reg(int reg, int val) 80 | { 81 | uint8_t out[2] = { 0x80 | reg, val }; 82 | uint8_t in[2]; 83 | 84 | spi_transaction_t t = { 85 | .flags = 0, 86 | .length = 8 * sizeof(out), 87 | .tx_buffer = out, 88 | .rx_buffer = in 89 | }; 90 | 91 | gpio_set_level(CONFIG_CS_GPIO, 0); 92 | spi_device_transmit(__spi, &t); 93 | gpio_set_level(CONFIG_CS_GPIO, 1); 94 | } 95 | 96 | /** 97 | * Read the current value of a register. 98 | * @param reg Register index. 99 | * @return Value of the register. 100 | */ 101 | int 102 | lora_read_reg(int reg) 103 | { 104 | uint8_t out[2] = { reg, 0xff }; 105 | uint8_t in[2]; 106 | 107 | spi_transaction_t t = { 108 | .flags = 0, 109 | .length = 8 * sizeof(out), 110 | .tx_buffer = out, 111 | .rx_buffer = in 112 | }; 113 | 114 | gpio_set_level(CONFIG_CS_GPIO, 0); 115 | spi_device_transmit(__spi, &t); 116 | gpio_set_level(CONFIG_CS_GPIO, 1); 117 | return in[1]; 118 | } 119 | 120 | /** 121 | * Perform physical reset on the Lora chip 122 | */ 123 | void 124 | lora_reset(void) 125 | { 126 | gpio_set_level(CONFIG_RST_GPIO, 0); 127 | vTaskDelay(pdMS_TO_TICKS(1)); 128 | gpio_set_level(CONFIG_RST_GPIO, 1); 129 | vTaskDelay(pdMS_TO_TICKS(10)); 130 | } 131 | 132 | /** 133 | * Configure explicit header mode. 134 | * Packet size will be included in the frame. 135 | */ 136 | void 137 | lora_explicit_header_mode(void) 138 | { 139 | __implicit = 0; 140 | lora_write_reg(REG_MODEM_CONFIG_1, lora_read_reg(REG_MODEM_CONFIG_1) & 0xfe); 141 | } 142 | 143 | /** 144 | * Configure implicit header mode. 145 | * All packets will have a predefined size. 146 | * @param size Size of the packets. 147 | */ 148 | void 149 | lora_implicit_header_mode(int size) 150 | { 151 | __implicit = 1; 152 | lora_write_reg(REG_MODEM_CONFIG_1, lora_read_reg(REG_MODEM_CONFIG_1) | 0x01); 153 | lora_write_reg(REG_PAYLOAD_LENGTH, size); 154 | } 155 | 156 | /** 157 | * Sets the radio transceiver in idle mode. 158 | * Must be used to change registers and access the FIFO. 159 | */ 160 | void 161 | lora_idle(void) 162 | { 163 | lora_write_reg(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_STDBY); 164 | } 165 | 166 | /** 167 | * Sets the radio transceiver in sleep mode. 168 | * Low power consumption and FIFO is lost. 169 | */ 170 | void 171 | lora_sleep(void) 172 | { 173 | lora_write_reg(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_SLEEP); 174 | } 175 | 176 | /** 177 | * Sets the radio transceiver in receive mode. 178 | * Incoming packets will be received. 179 | */ 180 | void 181 | lora_receive(void) 182 | { 183 | lora_write_reg(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS); 184 | } 185 | 186 | /** 187 | * Configure power level for transmission 188 | * @param level 2-17, from least to most power 189 | */ 190 | void 191 | lora_set_tx_power(int level) 192 | { 193 | // RF9x module uses PA_BOOST pin 194 | if (level < 2) level = 2; 195 | else if (level > 17) level = 17; 196 | lora_write_reg(REG_PA_CONFIG, PA_BOOST | (level - 2)); 197 | } 198 | 199 | /** 200 | * Set carrier frequency. 201 | * @param frequency Frequency in Hz 202 | */ 203 | void 204 | lora_set_frequency(long frequency) 205 | { 206 | __frequency = frequency; 207 | 208 | uint64_t frf = ((uint64_t)frequency << 19) / 32000000; 209 | 210 | lora_write_reg(REG_FRF_MSB, (uint8_t)(frf >> 16)); 211 | lora_write_reg(REG_FRF_MID, (uint8_t)(frf >> 8)); 212 | lora_write_reg(REG_FRF_LSB, (uint8_t)(frf >> 0)); 213 | } 214 | 215 | /** 216 | * Set spreading factor. 217 | * @param sf 6-12, Spreading factor to use. 218 | */ 219 | void 220 | lora_set_spreading_factor(int sf) 221 | { 222 | if (sf < 6) sf = 6; 223 | else if (sf > 12) sf = 12; 224 | 225 | if (sf == 6) { 226 | lora_write_reg(REG_DETECTION_OPTIMIZE, 0xc5); 227 | lora_write_reg(REG_DETECTION_THRESHOLD, 0x0c); 228 | } else { 229 | lora_write_reg(REG_DETECTION_OPTIMIZE, 0xc3); 230 | lora_write_reg(REG_DETECTION_THRESHOLD, 0x0a); 231 | } 232 | 233 | lora_write_reg(REG_MODEM_CONFIG_2, (lora_read_reg(REG_MODEM_CONFIG_2) & 0x0f) | ((sf << 4) & 0xf0)); 234 | } 235 | 236 | /** 237 | * Set bandwidth (bit rate) 238 | * @param sbw Bandwidth in Hz (up to 500000) 239 | */ 240 | void 241 | lora_set_bandwidth(long sbw) 242 | { 243 | int bw; 244 | 245 | if (sbw <= 7.8E3) bw = 0; 246 | else if (sbw <= 10.4E3) bw = 1; 247 | else if (sbw <= 15.6E3) bw = 2; 248 | else if (sbw <= 20.8E3) bw = 3; 249 | else if (sbw <= 31.25E3) bw = 4; 250 | else if (sbw <= 41.7E3) bw = 5; 251 | else if (sbw <= 62.5E3) bw = 6; 252 | else if (sbw <= 125E3) bw = 7; 253 | else if (sbw <= 250E3) bw = 8; 254 | else bw = 9; 255 | lora_write_reg(REG_MODEM_CONFIG_1, (lora_read_reg(REG_MODEM_CONFIG_1) & 0x0f) | (bw << 4)); 256 | } 257 | 258 | /** 259 | * Set coding rate 260 | * @param denominator 5-8, Denominator for the coding rate 4/x 261 | */ 262 | void 263 | lora_set_coding_rate(int denominator) 264 | { 265 | if (denominator < 5) denominator = 5; 266 | else if (denominator > 8) denominator = 8; 267 | 268 | int cr = denominator - 4; 269 | lora_write_reg(REG_MODEM_CONFIG_1, (lora_read_reg(REG_MODEM_CONFIG_1) & 0xf1) | (cr << 1)); 270 | } 271 | 272 | /** 273 | * Set the size of preamble. 274 | * @param length Preamble length in symbols. 275 | */ 276 | void 277 | lora_set_preamble_length(long length) 278 | { 279 | lora_write_reg(REG_PREAMBLE_MSB, (uint8_t)(length >> 8)); 280 | lora_write_reg(REG_PREAMBLE_LSB, (uint8_t)(length >> 0)); 281 | } 282 | 283 | /** 284 | * Change radio sync word. 285 | * @param sw New sync word to use. 286 | */ 287 | void 288 | lora_set_sync_word(int sw) 289 | { 290 | lora_write_reg(REG_SYNC_WORD, sw); 291 | } 292 | 293 | /** 294 | * Enable appending/verifying packet CRC. 295 | */ 296 | void 297 | lora_enable_crc(void) 298 | { 299 | lora_write_reg(REG_MODEM_CONFIG_2, lora_read_reg(REG_MODEM_CONFIG_2) | 0x04); 300 | } 301 | 302 | /** 303 | * Disable appending/verifying packet CRC. 304 | */ 305 | void 306 | lora_disable_crc(void) 307 | { 308 | lora_write_reg(REG_MODEM_CONFIG_2, lora_read_reg(REG_MODEM_CONFIG_2) & 0xfb); 309 | } 310 | 311 | /** 312 | * Perform hardware initialization. 313 | */ 314 | int 315 | lora_init(void) 316 | { 317 | esp_err_t ret; 318 | 319 | /* 320 | * Configure CPU hardware to communicate with the radio chip 321 | */ 322 | gpio_pad_select_gpio(CONFIG_RST_GPIO); 323 | gpio_set_direction(CONFIG_RST_GPIO, GPIO_MODE_OUTPUT); 324 | gpio_pad_select_gpio(CONFIG_CS_GPIO); 325 | gpio_set_direction(CONFIG_CS_GPIO, GPIO_MODE_OUTPUT); 326 | 327 | spi_bus_config_t bus = { 328 | .miso_io_num = CONFIG_MISO_GPIO, 329 | .mosi_io_num = CONFIG_MOSI_GPIO, 330 | .sclk_io_num = CONFIG_SCK_GPIO, 331 | .quadwp_io_num = -1, 332 | .quadhd_io_num = -1, 333 | .max_transfer_sz = 0 334 | }; 335 | 336 | ret = spi_bus_initialize(VSPI_HOST, &bus, 0); 337 | assert(ret == ESP_OK); 338 | 339 | spi_device_interface_config_t dev = { 340 | .clock_speed_hz = 9000000, 341 | .mode = 0, 342 | .spics_io_num = -1, 343 | .queue_size = 1, 344 | .flags = 0, 345 | .pre_cb = NULL 346 | }; 347 | ret = spi_bus_add_device(VSPI_HOST, &dev, &__spi); 348 | assert(ret == ESP_OK); 349 | 350 | /* 351 | * Perform hardware reset. 352 | */ 353 | lora_reset(); 354 | 355 | /* 356 | * Check version. 357 | */ 358 | uint8_t version; 359 | uint8_t i = 0; 360 | while(i++ < TIMEOUT_RESET) { 361 | version = lora_read_reg(REG_VERSION); 362 | if(version == 0x12) break; 363 | vTaskDelay(2); 364 | } 365 | printf("LORA_VER: %d\n", version); 366 | if (version == 0) { 367 | return -1; 368 | } 369 | assert(i <= TIMEOUT_RESET + 1); // at the end of the loop above, the max value i can reach is TIMEOUT_RESET + 1 370 | 371 | /* 372 | * Default configuration. 373 | */ 374 | lora_sleep(); 375 | lora_write_reg(REG_FIFO_RX_BASE_ADDR, 0); 376 | lora_write_reg(REG_FIFO_TX_BASE_ADDR, 0); 377 | lora_write_reg(REG_LNA, lora_read_reg(REG_LNA) | 0x03); 378 | lora_write_reg(REG_MODEM_CONFIG_3, 0x04); 379 | lora_set_tx_power(17); 380 | 381 | lora_idle(); 382 | return ESP_OK; 383 | } 384 | 385 | /** 386 | * Send a packet. 387 | * @param buf Data to be sent 388 | * @param size Size of data. 389 | */ 390 | void 391 | lora_send_packet(uint8_t *buf, int size) 392 | { 393 | /* 394 | * Transfer data to radio. 395 | */ 396 | lora_idle(); 397 | lora_write_reg(REG_FIFO_ADDR_PTR, 0); 398 | 399 | for(int i=0; i size) len = size; 445 | for(int i=0; i 25 | #include "freertos/FreeRTOS.h" 26 | #include "freertos/task.h" 27 | #include "lora.h" 28 | 29 | void task_tx(void *p) 30 | { 31 | for(;;) { 32 | vTaskDelay(pdMS_TO_TICKS(5000)); 33 | lora_send_packet((uint8_t*)"Hello", 5); 34 | printf("packet sent...\n"); 35 | } 36 | } 37 | 38 | void app_main() 39 | { 40 | lora_init(); 41 | lora_set_frequency(915e6); 42 | lora_enable_crc(); 43 | xTaskCreate(&task_tx, "task_tx", 2048, NULL, 5, NULL); 44 | } 45 | 46 | ``` 47 | Meanwhile in the **receiver** program... 48 | ```c 49 | #include 50 | #include "freertos/FreeRTOS.h" 51 | #include "freertos/task.h" 52 | #include "lora.h" 53 | 54 | uint8_t but[32]; 55 | 56 | void task_rx(void *p) 57 | { 58 | int x; 59 | for(;;) { 60 | lora_receive(); // put into receive mode 61 | while(lora_received()) { 62 | x = lora_receive_packet(buf, sizeof(buf)); 63 | buf[x] = 0; 64 | printf("Received: %s\n", buf); 65 | lora_receive(); 66 | } 67 | vTaskDelay(1); 68 | } 69 | } 70 | 71 | void app_main() 72 | { 73 | lora_init(); 74 | lora_set_frequency(915e6); 75 | lora_enable_crc(); 76 | xTaskCreate(&task_rx, "task_rx", 2048, NULL, 5, NULL); 77 | } 78 | ``` 79 | 80 | ## Connection with the RF module 81 | By default, the pins used to control the RF transceiver are-- 82 | 83 | Pin | Signal 84 | --- | ------ 85 | CS | IO15 86 | RST | IO32 87 | MISO | IO13 88 | MOSI | IO12 89 | SCK | IO14 90 | 91 | but you can reconfigure the pins using ```make menuconfig``` and changing the options in the "LoRa Options --->" 92 | -------------------------------------------------------------------------------- /components/lora/component.mk: -------------------------------------------------------------------------------- 1 | # 2 | # "main" pseudo-component makefile. 3 | # 4 | # (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.) 5 | 6 | -------------------------------------------------------------------------------- /components/lora/include/lora.h: -------------------------------------------------------------------------------- 1 | 2 | #ifndef __LORA_H__ 3 | #define __LORA_H__ 4 | 5 | void lora_reset(void); 6 | void lora_explicit_header_mode(void); 7 | void lora_implicit_header_mode(int size); 8 | void lora_idle(void); 9 | void lora_sleep(void); 10 | void lora_receive(void); 11 | void lora_set_tx_power(int level); 12 | void lora_set_frequency(long frequency); 13 | void lora_set_spreading_factor(int sf); 14 | void lora_set_bandwidth(long sbw); 15 | void lora_set_coding_rate(int denominator); 16 | void lora_set_preamble_length(long length); 17 | void lora_set_sync_word(int sw); 18 | void lora_enable_crc(void); 19 | void lora_disable_crc(void); 20 | int lora_init(void); 21 | void lora_send_packet(uint8_t *buf, int size); 22 | int lora_receive_packet(uint8_t *buf, int size); 23 | int lora_received(void); 24 | int lora_packet_rssi(void); 25 | float lora_packet_snr(void); 26 | void lora_close(void); 27 | int lora_initialized(void); 28 | void lora_dump_registers(void); 29 | 30 | #endif 31 | -------------------------------------------------------------------------------- /components/lora/lora.c: -------------------------------------------------------------------------------- 1 | 2 | #include "freertos/FreeRTOS.h" 3 | #include "freertos/task.h" 4 | #include "esp_system.h" 5 | #include "driver/spi_master.h" 6 | #include "soc/gpio_struct.h" 7 | #include "driver/gpio.h" 8 | #include 9 | 10 | /* 11 | * Register definitions 12 | */ 13 | #define REG_FIFO 0x00 14 | #define REG_OP_MODE 0x01 15 | #define REG_FRF_MSB 0x06 16 | #define REG_FRF_MID 0x07 17 | #define REG_FRF_LSB 0x08 18 | #define REG_PA_CONFIG 0x09 19 | #define REG_LNA 0x0c 20 | #define REG_FIFO_ADDR_PTR 0x0d 21 | #define REG_FIFO_TX_BASE_ADDR 0x0e 22 | #define REG_FIFO_RX_BASE_ADDR 0x0f 23 | #define REG_FIFO_RX_CURRENT_ADDR 0x10 24 | #define REG_IRQ_FLAGS 0x12 25 | #define REG_RX_NB_BYTES 0x13 26 | #define REG_PKT_SNR_VALUE 0x19 27 | #define REG_PKT_RSSI_VALUE 0x1a 28 | #define REG_MODEM_CONFIG_1 0x1d 29 | #define REG_MODEM_CONFIG_2 0x1e 30 | #define REG_PREAMBLE_MSB 0x20 31 | #define REG_PREAMBLE_LSB 0x21 32 | #define REG_PAYLOAD_LENGTH 0x22 33 | #define REG_MODEM_CONFIG_3 0x26 34 | #define REG_RSSI_WIDEBAND 0x2c 35 | #define REG_DETECTION_OPTIMIZE 0x31 36 | #define REG_DETECTION_THRESHOLD 0x37 37 | #define REG_SYNC_WORD 0x39 38 | #define REG_DIO_MAPPING_1 0x40 39 | #define REG_VERSION 0x42 40 | 41 | /* 42 | * Transceiver modes 43 | */ 44 | #define MODE_LONG_RANGE_MODE 0x80 45 | #define MODE_SLEEP 0x00 46 | #define MODE_STDBY 0x01 47 | #define MODE_TX 0x03 48 | #define MODE_RX_CONTINUOUS 0x05 49 | #define MODE_RX_SINGLE 0x06 50 | 51 | /* 52 | * PA configuration 53 | */ 54 | #define PA_BOOST 0x80 55 | 56 | /* 57 | * IRQ masks 58 | */ 59 | #define IRQ_TX_DONE_MASK 0x08 60 | #define IRQ_PAYLOAD_CRC_ERROR_MASK 0x20 61 | #define IRQ_RX_DONE_MASK 0x40 62 | 63 | #define PA_OUTPUT_RFO_PIN 0 64 | #define PA_OUTPUT_PA_BOOST_PIN 1 65 | 66 | #define TIMEOUT_RESET 100 67 | 68 | static spi_device_handle_t __spi; 69 | 70 | static int __implicit; 71 | static long __frequency; 72 | 73 | /** 74 | * Write a value to a register. 75 | * @param reg Register index. 76 | * @param val Value to write. 77 | */ 78 | void 79 | lora_write_reg(int reg, int val) 80 | { 81 | uint8_t out[2] = { 0x80 | reg, val }; 82 | uint8_t in[2]; 83 | 84 | spi_transaction_t t = { 85 | .flags = 0, 86 | .length = 8 * sizeof(out), 87 | .tx_buffer = out, 88 | .rx_buffer = in 89 | }; 90 | 91 | gpio_set_level(CONFIG_CS_GPIO, 0); 92 | spi_device_transmit(__spi, &t); 93 | gpio_set_level(CONFIG_CS_GPIO, 1); 94 | } 95 | 96 | /** 97 | * Read the current value of a register. 98 | * @param reg Register index. 99 | * @return Value of the register. 100 | */ 101 | int 102 | lora_read_reg(int reg) 103 | { 104 | uint8_t out[2] = { reg, 0xff }; 105 | uint8_t in[2]; 106 | 107 | spi_transaction_t t = { 108 | .flags = 0, 109 | .length = 8 * sizeof(out), 110 | .tx_buffer = out, 111 | .rx_buffer = in 112 | }; 113 | 114 | gpio_set_level(CONFIG_CS_GPIO, 0); 115 | spi_device_transmit(__spi, &t); 116 | gpio_set_level(CONFIG_CS_GPIO, 1); 117 | return in[1]; 118 | } 119 | 120 | /** 121 | * Perform physical reset on the Lora chip 122 | */ 123 | void 124 | lora_reset(void) 125 | { 126 | gpio_set_level(CONFIG_RST_GPIO, 0); 127 | vTaskDelay(pdMS_TO_TICKS(1)); 128 | gpio_set_level(CONFIG_RST_GPIO, 1); 129 | vTaskDelay(pdMS_TO_TICKS(10)); 130 | } 131 | 132 | /** 133 | * Configure explicit header mode. 134 | * Packet size will be included in the frame. 135 | */ 136 | void 137 | lora_explicit_header_mode(void) 138 | { 139 | __implicit = 0; 140 | lora_write_reg(REG_MODEM_CONFIG_1, lora_read_reg(REG_MODEM_CONFIG_1) & 0xfe); 141 | } 142 | 143 | /** 144 | * Configure implicit header mode. 145 | * All packets will have a predefined size. 146 | * @param size Size of the packets. 147 | */ 148 | void 149 | lora_implicit_header_mode(int size) 150 | { 151 | __implicit = 1; 152 | lora_write_reg(REG_MODEM_CONFIG_1, lora_read_reg(REG_MODEM_CONFIG_1) | 0x01); 153 | lora_write_reg(REG_PAYLOAD_LENGTH, size); 154 | } 155 | 156 | /** 157 | * Sets the radio transceiver in idle mode. 158 | * Must be used to change registers and access the FIFO. 159 | */ 160 | void 161 | lora_idle(void) 162 | { 163 | lora_write_reg(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_STDBY); 164 | } 165 | 166 | /** 167 | * Sets the radio transceiver in sleep mode. 168 | * Low power consumption and FIFO is lost. 169 | */ 170 | void 171 | lora_sleep(void) 172 | { 173 | lora_write_reg(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_SLEEP); 174 | } 175 | 176 | /** 177 | * Sets the radio transceiver in receive mode. 178 | * Incoming packets will be received. 179 | */ 180 | void 181 | lora_receive(void) 182 | { 183 | lora_write_reg(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS); 184 | } 185 | 186 | /** 187 | * Configure power level for transmission 188 | * @param level 2-17, from least to most power 189 | */ 190 | void 191 | lora_set_tx_power(int level) 192 | { 193 | // RF9x module uses PA_BOOST pin 194 | if (level < 2) level = 2; 195 | else if (level > 17) level = 17; 196 | lora_write_reg(REG_PA_CONFIG, PA_BOOST | (level - 2)); 197 | } 198 | 199 | /** 200 | * Set carrier frequency. 201 | * @param frequency Frequency in Hz 202 | */ 203 | void 204 | lora_set_frequency(long frequency) 205 | { 206 | __frequency = frequency; 207 | 208 | uint64_t frf = ((uint64_t)frequency << 19) / 32000000; 209 | 210 | lora_write_reg(REG_FRF_MSB, (uint8_t)(frf >> 16)); 211 | lora_write_reg(REG_FRF_MID, (uint8_t)(frf >> 8)); 212 | lora_write_reg(REG_FRF_LSB, (uint8_t)(frf >> 0)); 213 | } 214 | 215 | /** 216 | * Set spreading factor. 217 | * @param sf 6-12, Spreading factor to use. 218 | */ 219 | void 220 | lora_set_spreading_factor(int sf) 221 | { 222 | if (sf < 6) sf = 6; 223 | else if (sf > 12) sf = 12; 224 | 225 | if (sf == 6) { 226 | lora_write_reg(REG_DETECTION_OPTIMIZE, 0xc5); 227 | lora_write_reg(REG_DETECTION_THRESHOLD, 0x0c); 228 | } else { 229 | lora_write_reg(REG_DETECTION_OPTIMIZE, 0xc3); 230 | lora_write_reg(REG_DETECTION_THRESHOLD, 0x0a); 231 | } 232 | 233 | lora_write_reg(REG_MODEM_CONFIG_2, (lora_read_reg(REG_MODEM_CONFIG_2) & 0x0f) | ((sf << 4) & 0xf0)); 234 | } 235 | 236 | /** 237 | * Set bandwidth (bit rate) 238 | * @param sbw Bandwidth in Hz (up to 500000) 239 | */ 240 | void 241 | lora_set_bandwidth(long sbw) 242 | { 243 | int bw; 244 | 245 | if (sbw <= 7.8E3) bw = 0; 246 | else if (sbw <= 10.4E3) bw = 1; 247 | else if (sbw <= 15.6E3) bw = 2; 248 | else if (sbw <= 20.8E3) bw = 3; 249 | else if (sbw <= 31.25E3) bw = 4; 250 | else if (sbw <= 41.7E3) bw = 5; 251 | else if (sbw <= 62.5E3) bw = 6; 252 | else if (sbw <= 125E3) bw = 7; 253 | else if (sbw <= 250E3) bw = 8; 254 | else bw = 9; 255 | lora_write_reg(REG_MODEM_CONFIG_1, (lora_read_reg(REG_MODEM_CONFIG_1) & 0x0f) | (bw << 4)); 256 | } 257 | 258 | /** 259 | * Set coding rate 260 | * @param denominator 5-8, Denominator for the coding rate 4/x 261 | */ 262 | void 263 | lora_set_coding_rate(int denominator) 264 | { 265 | if (denominator < 5) denominator = 5; 266 | else if (denominator > 8) denominator = 8; 267 | 268 | int cr = denominator - 4; 269 | lora_write_reg(REG_MODEM_CONFIG_1, (lora_read_reg(REG_MODEM_CONFIG_1) & 0xf1) | (cr << 1)); 270 | } 271 | 272 | /** 273 | * Set the size of preamble. 274 | * @param length Preamble length in symbols. 275 | */ 276 | void 277 | lora_set_preamble_length(long length) 278 | { 279 | lora_write_reg(REG_PREAMBLE_MSB, (uint8_t)(length >> 8)); 280 | lora_write_reg(REG_PREAMBLE_LSB, (uint8_t)(length >> 0)); 281 | } 282 | 283 | /** 284 | * Change radio sync word. 285 | * @param sw New sync word to use. 286 | */ 287 | void 288 | lora_set_sync_word(int sw) 289 | { 290 | lora_write_reg(REG_SYNC_WORD, sw); 291 | } 292 | 293 | /** 294 | * Enable appending/verifying packet CRC. 295 | */ 296 | void 297 | lora_enable_crc(void) 298 | { 299 | lora_write_reg(REG_MODEM_CONFIG_2, lora_read_reg(REG_MODEM_CONFIG_2) | 0x04); 300 | } 301 | 302 | /** 303 | * Disable appending/verifying packet CRC. 304 | */ 305 | void 306 | lora_disable_crc(void) 307 | { 308 | lora_write_reg(REG_MODEM_CONFIG_2, lora_read_reg(REG_MODEM_CONFIG_2) & 0xfb); 309 | } 310 | 311 | /** 312 | * Perform hardware initialization. 313 | */ 314 | int 315 | lora_init(void) 316 | { 317 | esp_err_t ret; 318 | 319 | /* 320 | * Configure CPU hardware to communicate with the radio chip 321 | */ 322 | gpio_pad_select_gpio(CONFIG_RST_GPIO); 323 | gpio_set_direction(CONFIG_RST_GPIO, GPIO_MODE_OUTPUT); 324 | gpio_pad_select_gpio(CONFIG_CS_GPIO); 325 | gpio_set_direction(CONFIG_CS_GPIO, GPIO_MODE_OUTPUT); 326 | 327 | spi_bus_config_t bus = { 328 | .miso_io_num = CONFIG_MISO_GPIO, 329 | .mosi_io_num = CONFIG_MOSI_GPIO, 330 | .sclk_io_num = CONFIG_SCK_GPIO, 331 | .quadwp_io_num = -1, 332 | .quadhd_io_num = -1, 333 | .max_transfer_sz = 0 334 | }; 335 | 336 | ret = spi_bus_initialize(VSPI_HOST, &bus, 0); 337 | assert(ret == ESP_OK); 338 | 339 | spi_device_interface_config_t dev = { 340 | .clock_speed_hz = 9000000, 341 | .mode = 0, 342 | .spics_io_num = -1, 343 | .queue_size = 1, 344 | .flags = 0, 345 | .pre_cb = NULL 346 | }; 347 | ret = spi_bus_add_device(VSPI_HOST, &dev, &__spi); 348 | assert(ret == ESP_OK); 349 | 350 | /* 351 | * Perform hardware reset. 352 | */ 353 | lora_reset(); 354 | 355 | /* 356 | * Check version. 357 | */ 358 | uint8_t version; 359 | uint8_t i = 0; 360 | while(i++ < TIMEOUT_RESET) { 361 | version = lora_read_reg(REG_VERSION); 362 | if(version == 0x12) break; 363 | vTaskDelay(2); 364 | } 365 | printf("LORA_VER: %d\n", version); 366 | if (version == 0) { 367 | return -1; 368 | } 369 | assert(i <= TIMEOUT_RESET + 1); // at the end of the loop above, the max value i can reach is TIMEOUT_RESET + 1 370 | 371 | /* 372 | * Default configuration. 373 | */ 374 | lora_sleep(); 375 | lora_write_reg(REG_FIFO_RX_BASE_ADDR, 0); 376 | lora_write_reg(REG_FIFO_TX_BASE_ADDR, 0); 377 | lora_write_reg(REG_LNA, lora_read_reg(REG_LNA) | 0x03); 378 | lora_write_reg(REG_MODEM_CONFIG_3, 0x04); 379 | lora_set_tx_power(17); 380 | 381 | lora_idle(); 382 | return ESP_OK; 383 | } 384 | 385 | /** 386 | * Send a packet. 387 | * @param buf Data to be sent 388 | * @param size Size of data. 389 | */ 390 | void 391 | lora_send_packet(uint8_t *buf, int size) 392 | { 393 | /* 394 | * Transfer data to radio. 395 | */ 396 | lora_idle(); 397 | lora_write_reg(REG_FIFO_ADDR_PTR, 0); 398 | 399 | for(int i=0; i size) len = size; 445 | for(int i=0; isock, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv)); 7 | setsockopt(tcp->sock, SOL_SOCKET, SO_SNDTIMEO, &tv, sizeof(tv)); 8 | 9 | + int flag = 1; // Minimizes TCP delay. Makes pretty big difference. 10 | + setsockopt(tcp->sock, IPPROTO_TCP, TCP_NODELAY, &flag, sizeof(flag)); 11 | + 12 | ESP_LOGD(TAG, "[sock=%d],connecting to server IP:%s,Port:%d...", 13 | tcp->sock, ipaddr_ntoa((const ip_addr_t*)&remote_ip.sin_addr.s_addr), port); 14 | if (connect(tcp->sock, (struct sockaddr *)(&remote_ip), sizeof(struct sockaddr)) != 0) { 15 | -------------------------------------------------------------------------------- /main/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | idf_component_register( 2 | SRCS "transport_wifi.c" "leds.c" "transport_lora.c" "rover_telematics.c" "transport_lora.c" "rover_controller.c" "controller_input.c" "main.c" "web_server.c" 3 | INCLUDE_DIRS "" 4 | EMBED_TXTFILES "certs/cacert.pem" 5 | "certs/prvtkey.pem" 6 | ) 7 | -------------------------------------------------------------------------------- /main/certs/cacert.crt: -------------------------------------------------------------------------------- 1 | -----BEGIN CERTIFICATE----- 2 | MIIDrzCCApegAwIBAgIUFnXtE2NOvIKia0WH/AoTJ9M0pJwwDQYJKoZIhvcNAQEL 3 | BQAwZzELMAkGA1UEBhMCU0UxDjAMBgNVBAgMBVNrYW5lMREwDwYDVQQHDAhNYWxt 4 | w4PCtjEhMB8GA1UECgwYSW50ZXJuZXQgV2lkZ2l0cyBQdHkgTHRkMRIwEAYDVQQD 5 | DAlSb3ZlciBTU0wwHhcNMjAwNDE4MTkwNTQwWhcNMzAwNDE2MTkwNTQwWjBnMQsw 6 | CQYDVQQGEwJTRTEOMAwGA1UECAwFU2thbmUxETAPBgNVBAcMCE1hbG3Dg8K2MSEw 7 | HwYDVQQKDBhJbnRlcm5ldCBXaWRnaXRzIFB0eSBMdGQxEjAQBgNVBAMMCVJvdmVy 8 | IFNTTDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKbAbi+duv4BWohJ 9 | 4Mwabn/OsjrX+N2xP0kGwJmj2Ryl0LH7Fq/krVHorBAERppugClbalMM5RyoirZl 10 | mxMT6d98By3K06A5r0MDB+JPw6TmM3/IguadAFlJ/Gzn23Bm2LTBSNKG1bI8vBG0 11 | x1kRBbdPhacm4TJ9LREFExw7LcG3ZQFTqwVlTp38wo959L/ZR+st+FrjbZIbDQsl 12 | LBDvbDuikoWNUSsc8YwdX9wKukMq8eJ4BBZTHZ0rgbktuN23hvjTirov2pd46sF+ 13 | y+3x+uXYUug5Ji6Y/549qHZzhvqNyq/mwwNedpujq9P34hkWQemhgS6ABu89T4S6 14 | KI+o2asCAwEAAaNTMFEwHQYDVR0OBBYEFI8SddmKSdhnQIQHofbYPcKY0yK1MB8G 15 | A1UdIwQYMBaAFI8SddmKSdhnQIQHofbYPcKY0yK1MA8GA1UdEwEB/wQFMAMBAf8w 16 | DQYJKoZIhvcNAQELBQADggEBAIwK46C3TKg+YoufgZpR3GAw6MErMRJlaN622W1U 17 | Ymj7pTS9zn7dvi54bZdhUiEesFxcZPWwkH1QwBI6PhD0E3bpgftbyJc/Cl5GJprP 18 | S0RNVnCmJqNGZU+5bV84Fvx9NH4oQd6zxuGAtRrmBWUvAjZiRCf8T85n6j921VPX 19 | OZz20Ddn+yiixcZxGt5qLNGLiHWXD9kOCdGi8BOCWCr7OjAPQklduRrTVrnnuKDn 20 | bZyrnKb81Q8lSt0NvlRAdiH7twrXJahvsrL5ZR/MvWAQ2J28KSDomBiRuDM5WV/P 21 | MQXqmxTNcvy1mrn/ftD8h56Tt1tF5hOL994xcvvoto+bm2I= 22 | -----END CERTIFICATE----- 23 | -------------------------------------------------------------------------------- /main/certs/cacert.pem: -------------------------------------------------------------------------------- 1 | -----BEGIN CERTIFICATE----- 2 | MIIDrzCCApegAwIBAgIUFnXtE2NOvIKia0WH/AoTJ9M0pJwwDQYJKoZIhvcNAQEL 3 | BQAwZzELMAkGA1UEBhMCU0UxDjAMBgNVBAgMBVNrYW5lMREwDwYDVQQHDAhNYWxt 4 | w4PCtjEhMB8GA1UECgwYSW50ZXJuZXQgV2lkZ2l0cyBQdHkgTHRkMRIwEAYDVQQD 5 | DAlSb3ZlciBTU0wwHhcNMjAwNDE4MTkwNTQwWhcNMzAwNDE2MTkwNTQwWjBnMQsw 6 | CQYDVQQGEwJTRTEOMAwGA1UECAwFU2thbmUxETAPBgNVBAcMCE1hbG3Dg8K2MSEw 7 | HwYDVQQKDBhJbnRlcm5ldCBXaWRnaXRzIFB0eSBMdGQxEjAQBgNVBAMMCVJvdmVy 8 | IFNTTDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKbAbi+duv4BWohJ 9 | 4Mwabn/OsjrX+N2xP0kGwJmj2Ryl0LH7Fq/krVHorBAERppugClbalMM5RyoirZl 10 | mxMT6d98By3K06A5r0MDB+JPw6TmM3/IguadAFlJ/Gzn23Bm2LTBSNKG1bI8vBG0 11 | x1kRBbdPhacm4TJ9LREFExw7LcG3ZQFTqwVlTp38wo959L/ZR+st+FrjbZIbDQsl 12 | LBDvbDuikoWNUSsc8YwdX9wKukMq8eJ4BBZTHZ0rgbktuN23hvjTirov2pd46sF+ 13 | y+3x+uXYUug5Ji6Y/549qHZzhvqNyq/mwwNedpujq9P34hkWQemhgS6ABu89T4S6 14 | KI+o2asCAwEAAaNTMFEwHQYDVR0OBBYEFI8SddmKSdhnQIQHofbYPcKY0yK1MB8G 15 | A1UdIwQYMBaAFI8SddmKSdhnQIQHofbYPcKY0yK1MA8GA1UdEwEB/wQFMAMBAf8w 16 | DQYJKoZIhvcNAQELBQADggEBAIwK46C3TKg+YoufgZpR3GAw6MErMRJlaN622W1U 17 | Ymj7pTS9zn7dvi54bZdhUiEesFxcZPWwkH1QwBI6PhD0E3bpgftbyJc/Cl5GJprP 18 | S0RNVnCmJqNGZU+5bV84Fvx9NH4oQd6zxuGAtRrmBWUvAjZiRCf8T85n6j921VPX 19 | OZz20Ddn+yiixcZxGt5qLNGLiHWXD9kOCdGi8BOCWCr7OjAPQklduRrTVrnnuKDn 20 | bZyrnKb81Q8lSt0NvlRAdiH7twrXJahvsrL5ZR/MvWAQ2J28KSDomBiRuDM5WV/P 21 | MQXqmxTNcvy1mrn/ftD8h56Tt1tF5hOL994xcvvoto+bm2I= 22 | -----END CERTIFICATE----- 23 | -------------------------------------------------------------------------------- /main/certs/prvtkey.pem: -------------------------------------------------------------------------------- 1 | -----BEGIN PRIVATE KEY----- 2 | MIIEvQIBADANBgkqhkiG9w0BAQEFAASCBKcwggSjAgEAAoIBAQCmwG4vnbr+AVqI 3 | SeDMGm5/zrI61/jdsT9JBsCZo9kcpdCx+xav5K1R6KwQBEaaboApW2pTDOUcqIq2 4 | ZZsTE+nffActytOgOa9DAwfiT8Ok5jN/yILmnQBZSfxs59twZti0wUjShtWyPLwR 5 | tMdZEQW3T4WnJuEyfS0RBRMcOy3Bt2UBU6sFZU6d/MKPefS/2UfrLfha422SGw0L 6 | JSwQ72w7opKFjVErHPGMHV/cCrpDKvHieAQWUx2dK4G5Lbjdt4b404q6L9qXeOrB 7 | fsvt8frl2FLoOSYumP+ePah2c4b6jcqv5sMDXnabo6vT9+IZFkHpoYEugAbvPU+E 8 | uiiPqNmrAgMBAAECggEAep8tJ8TEmj7ilTBGp7CUK1YTCGSDNHs//3KAtTqg0Ik6 9 | 03bB8yylK4N+6/RI+w1hH4iCwnnMDWv/PSuwgrH1HIu3N7xcLQneUNfst0ZSp3NE 10 | 0aXgZLd1ZzOZ9Xf2jUyD9T/hTjcq8/vnjNm0clGrM2a98PINTjRwrIBf0jXOaxFC 11 | lFgJYqJyEurf5Fb19LWNekWTysf7UeqvlkYH0CeAcoBt4J8/RIPl2CTEHTj/kAUe 12 | X+XNJuhu3JL+A4qMY/FLXR4kJhovB1DOIv3qSnZNE2oKcZJgHGo4sAPutKS30OTz 13 | CLxa4WQerrmwSBmbY93yECSvPGdVy8INgH1Lh2nDWQKBgQDWrbyBKZBES7wDIe4b 14 | ZhJlCgVLN9hXQclbryE7v1thw7fOZD6cqjZAXNQgsDFvu3FYwIx4/TuSclcPWHgK 15 | uNuMf7g2HGSFwQyFEi+CfhhzNFCf9USGgHrJzm8fdvzEAHBVvWq1UuQTxa8s/TmK 16 | BP0DiQIFP61y3FSebF5k3tSzVQKBgQDG2Rkvp+SBSU7N5Cs06jpg0nMiSQfLDz34 17 | 2oA3nXE2XzN60F+f00SKzNdjdncrYs73VcDfOwmmEon6+6V5SYePEsjp8KSzt6mk 18 | UcKf0Bw1WqQ4QqsDGElkBPSBsjm9k6iweu0H1ORDk1tbRALt/vBxWGl5qgpDRd4W 19 | czcuRZFY/wKBgQDU3SpXzDWvcoT3ejJV2o0MwLXlEneidanKDkneq2xZ8S4VKVLo 20 | FuJ6SVFRJEOwrWTDgxEGetoR6OwoXCmTQB76Hj4y8U4/Td8zJ4gSVSO7P7leEl2j 21 | HEwkRFvtEBer5V99tLbVGl7quA5thp0CHNYgJj7po21BwfTprTyfuk+fjQKBgHLD 22 | WYXnoDn91T1/MnCXvpmi3FAtVhIb+ehmMxnmBDEdQNjg6k+T3zs8fhMpjB2+KTUW 23 | iPpNWIRAruHr2tTlWxd3//0EpgoTNhVgGrOhqKYiaiUOVSS0H6daNMOl2S1Qy0sP 24 | pz2d4SAfK9rApfA18w93t2hAeyvYZxUN6gsKm5iBAoGAHcEiuFVA2OpSPATQu3vy 25 | QvzCyWLRve+Uo4ZSM9LfpB/FGsgYP/yqnaeaMh/u8XMQ9dEgMtXo1hW291I5rVrU 26 | jrhXbCGhnsMAzH+EKiXdPEYmlTW8o9YQzmtnnwtyS5qSgjPqrL8sSaglzDUwkbRP 27 | ggsf6nsJSmdHUNhnSheDDsE= 28 | -----END PRIVATE KEY----- 29 | -------------------------------------------------------------------------------- /main/config.h: -------------------------------------------------------------------------------- 1 | #define WS_SERVER_PORT 80 2 | 3 | #define AP_SSID "RoverController" 4 | #define AP_PASS "" 5 | 6 | #define ROVER_WS_URL "ws://192.168.4.5:80/ws" 7 | 8 | // TODO could use mdns instead of hardcoding 9 | #define ROVER_CONTROLLER_STATIC_IP "192.168.4.1" 10 | #define ROVER_STATIC_IP "192.168.4.5" 11 | #define ROVER_CAM_STATIC_IP "192.168.4.6" 12 | 13 | #define ROVER_CONTROLLER_MIN_TX_VALUE 1000 14 | #define ROVER_CONTROLLER_MAX_TX_VALUE 2000 15 | 16 | #define ROVER_CONTROLLER_SDA GPIO_NUM_22 17 | #define ROVER_CONTROLLER_SCL GPIO_NUM_23 18 | 19 | #define LED_RIGHT_GPIO GPIO_NUM_15 20 | #define LED_LEFT_GPIO GPIO_NUM_12 21 | -------------------------------------------------------------------------------- /main/controller_input.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "controller_input.h" 3 | #include "config.h" 4 | #include "freertos/FreeRTOS.h" 5 | #include "freertos/task.h" 6 | #include "driver/gpio.h" 7 | #include "driver/i2c.h" 8 | #include "driver/adc.h" 9 | #include "esp_adc_cal.h" 10 | #include "soc/adc_channel.h" 11 | #include "rover_utils.h" 12 | #include "esp_log.h" 13 | #include "ads1115.h" 14 | 15 | #define DEFAULT_VREF 1100 16 | #define NO_OF_SAMPLES 32 17 | 18 | #define ATTENUATION ADC_ATTEN_DB_11 19 | #define ADC_WIDTH ADC_WIDTH_BIT_10 20 | 21 | #define I2C_NUM I2C_NUM_0 22 | 23 | #define LAST_SWITCH INPUT_SWITCH_3_UP 24 | 25 | 26 | static uint16_t rover_channel_map[INPUTS_END] = { 27 | INPUT_LEFT_JOYSTICK_X, 28 | INPUT_LEFT_JOYSTICK_Y, 29 | INPUT_LEFT_JOYSTICK_ROTATE, 30 | INPUT_RIGHT_JOYSTICK_X, 31 | INPUT_RIGHT_JOYSTICK_Y, 32 | INPUT_RIGHT_JOYSTICK_ROTATE, 33 | INPUT_POT_LEFT, 34 | INPUT_POT_RIGHT, 35 | INPUT_SWITCH_1_UP, 36 | INPUT_SWITCH_1_DOWN, 37 | INPUT_SWITCH_2_UP, 38 | INPUT_SWITCH_2_DOWN, 39 | INPUT_SWITCH_3_UP, 40 | INPUT_SWITCH_3_DOWN, 41 | INPUT_SWITCH_4_UP, 42 | INPUT_SWITCH_4_DOWN, 43 | INPUT_SWITCH_5_UP, 44 | INPUT_SWITCH_5_DOWN, 45 | }; 46 | 47 | // Mapping of all inputs to GPIO/ADC num 48 | static uint16_t rover_pin_map[INPUTS_END] = { 49 | [INPUT_LEFT_JOYSTICK_X] = ADC1_GPIO39_CHANNEL, 50 | [INPUT_LEFT_JOYSTICK_Y] = ADC1_GPIO36_CHANNEL, 51 | [INPUT_LEFT_JOYSTICK_ROTATE] = ADC1_GPIO33_CHANNEL, 52 | [INPUT_RIGHT_JOYSTICK_X] = ADC1_GPIO34_CHANNEL, 53 | [INPUT_RIGHT_JOYSTICK_Y] = ADC1_GPIO35_CHANNEL, 54 | [INPUT_RIGHT_JOYSTICK_ROTATE] = ADC1_GPIO32_CHANNEL, 55 | [INPUT_POT_LEFT] = ADS1115_MUX_0_GND, 56 | [INPUT_POT_RIGHT] = ADS1115_MUX_1_GND, 57 | [INPUT_SWITCH_1_UP] = GPIO_NUM_25, 58 | [INPUT_SWITCH_1_DOWN] = GPIO_NUM_13, 59 | [INPUT_SWITCH_2_UP] = GPIO_NUM_17, 60 | [INPUT_SWITCH_2_DOWN] = GPIO_NUM_21, 61 | [INPUT_SWITCH_3_UP] = GPIO_NUM_22, 62 | [INPUT_SWITCH_3_DOWN] = GPIO_NUM_23, 63 | [INPUT_SWITCH_4_UP] = GPIO_NUM_15, 64 | [INPUT_SWITCH_4_DOWN] = GPIO_NUM_2, 65 | [INPUT_SWITCH_5_UP] = GPIO_NUM_4, 66 | [INPUT_SWITCH_5_DOWN] = GPIO_NUM_12, // Note: ESP32 won't start if pulled high at boot 67 | }; 68 | 69 | 70 | static void print_char_val_type(esp_adc_cal_value_t val_type); 71 | static void sample_task(void* params); 72 | 73 | static controller_sample_t samples[INPUTS_END]; 74 | static esp_adc_cal_characteristics_t* adc_chars; 75 | static uint16_t sleep_time; 76 | static samples_callback* on_sample_done_callback; 77 | static ads1115_t ads; 78 | 79 | void controller_input_init(uint16_t time_between_samples_ms, samples_callback* callback) 80 | { 81 | assert(callback != NULL); 82 | memset(samples, 0, sizeof(samples)); 83 | 84 | on_sample_done_callback = callback; 85 | sleep_time = time_between_samples_ms; 86 | 87 | adc_chars = calloc(1, sizeof(esp_adc_cal_characteristics_t)); 88 | esp_adc_cal_value_t val_type = esp_adc_cal_characterize(ADC_UNIT_1, ATTENUATION, ADC_WIDTH, DEFAULT_VREF, adc_chars); 89 | print_char_val_type(val_type); 90 | 91 | adc1_config_width(ADC_WIDTH); 92 | for (uint8_t i = 0; i < INPUT_ANALOG_END; i++) { 93 | adc1_config_channel_atten((adc1_channel_t)rover_pin_map[i], ATTENUATION); 94 | } 95 | 96 | for (uint8_t i = INPUT_ANALOG_I2C_END; i < LAST_SWITCH; i++) { 97 | gpio_pad_select_gpio((gpio_num_t)rover_pin_map[i]); 98 | gpio_set_direction((gpio_num_t)rover_pin_map[i], GPIO_MODE_INPUT); 99 | gpio_set_pull_mode((gpio_num_t)rover_pin_map[i], GPIO_PULLDOWN_ONLY); 100 | } 101 | 102 | ESP_ERROR_CHECK(i2c_driver_install(I2C_NUM, I2C_MODE_MASTER, 0, 0, 0)); 103 | ESP_ERROR_CHECK(i2c_set_pin(I2C_NUM, ROVER_CONTROLLER_SDA, ROVER_CONTROLLER_SCL, true, true, I2C_MODE_MASTER)); 104 | i2c_config_t conf = { 105 | .mode = I2C_MODE_MASTER, 106 | .sda_io_num = GPIO_NUM_22, 107 | .sda_pullup_en = GPIO_PULLUP_ENABLE, 108 | .scl_io_num = GPIO_NUM_23, 109 | .scl_pullup_en = GPIO_PULLUP_ENABLE, 110 | .master.clk_speed = 100000 111 | }; 112 | ESP_ERROR_CHECK(i2c_param_config(I2C_NUM, &conf)); 113 | 114 | ads = ads1115_config(I2C_NUM, 0x48); 115 | ads1115_set_sps(&ads, ADS1115_SPS_860); 116 | 117 | TaskHandle_t handle; 118 | BaseType_t status = xTaskCreate(sample_task, "gpio_sample_task", 4096, NULL, tskIDLE_PRIORITY, &handle); 119 | assert(status == pdPASS); 120 | } 121 | 122 | uint32_t controller_input_get_map(uint8_t id, uint32_t min, uint32_t max) 123 | { 124 | assert(id < INPUT_ANALOG_END); 125 | uint32_t max_reading; 126 | switch (ADC_WIDTH) { 127 | case ADC_WIDTH_BIT_9: 128 | max_reading = 512; 129 | break; 130 | case ADC_WIDTH_BIT_10: 131 | max_reading = 1024; 132 | break; 133 | case ADC_WIDTH_BIT_11: 134 | max_reading = 2048; 135 | break; 136 | case ADC_WIDTH_BIT_12: 137 | max_reading = 4096; 138 | break; 139 | default: 140 | assert(false); 141 | 142 | } 143 | 144 | return map(samples[id].raw_value, 0, max_reading, min, max); 145 | } 146 | 147 | static void sample_task(void* params) 148 | { 149 | while (true) { 150 | for (uint8_t i = 0; i < INPUT_ANALOG_END; i++) { 151 | uint32_t adc_reading = 0; 152 | for (int sample = 0; sample < NO_OF_SAMPLES; sample++) { 153 | adc_reading += (uint32_t)adc1_get_raw((adc1_channel_t)rover_pin_map[i]); 154 | } 155 | adc_reading /= NO_OF_SAMPLES; 156 | samples[i].raw_value = adc_reading; 157 | samples[i].voltage = esp_adc_cal_raw_to_voltage(adc_reading, adc_chars); 158 | } 159 | 160 | for (uint8_t i = INPUT_ANALOG_END; i < INPUT_ANALOG_I2C_END; i++) { 161 | // Not used right now so skip 162 | //ads1115_set_mux(&ads, rover_pin_map[i]); 163 | //samples[i].raw_value = ads1115_get_raw(&ads); 164 | //samples[i].voltage = ads1115_get_voltage_from_raw(&ads, samples[i].raw_value) * 1000; 165 | } 166 | 167 | for (uint8_t i = INPUT_ANALOG_I2C_END; i < LAST_SWITCH; i++) { 168 | samples[i].raw_value = gpio_get_level((gpio_num_t)rover_pin_map[i]); 169 | samples[i].voltage = samples[i].raw_value == 0 ? 0 : 3300; 170 | } 171 | 172 | on_sample_done_callback(samples, INPUTS_END); 173 | vTaskDelay(pdMS_TO_TICKS(sleep_time)); 174 | } 175 | } 176 | 177 | static void print_char_val_type(esp_adc_cal_value_t val_type) 178 | { 179 | if (val_type == ESP_ADC_CAL_VAL_EFUSE_TP) { 180 | printf("Characterized using Two Point Value\n"); 181 | } else if (val_type == ESP_ADC_CAL_VAL_EFUSE_VREF) { 182 | printf("Characterized using eFuse Vref\n"); 183 | } else { 184 | printf("Characterized using Default Vref\n"); 185 | } 186 | } -------------------------------------------------------------------------------- /main/controller_input.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "driver/gpio.h" 4 | #include "driver/adc.h" 5 | #include "esp_adc_cal.h" 6 | #include "soc/adc_channel.h" 7 | 8 | typedef struct controller_sample_t { 9 | uint32_t raw_value; 10 | uint32_t voltage; 11 | } controller_sample_t; 12 | 13 | typedef enum inputs { 14 | INPUT_LEFT_JOYSTICK_X, 15 | INPUT_LEFT_JOYSTICK_Y, 16 | INPUT_LEFT_JOYSTICK_ROTATE, 17 | INPUT_RIGHT_JOYSTICK_X, 18 | INPUT_RIGHT_JOYSTICK_Y, 19 | INPUT_RIGHT_JOYSTICK_ROTATE, 20 | INPUT_ANALOG_END, 21 | INPUT_POT_LEFT = INPUT_ANALOG_END, 22 | INPUT_POT_RIGHT, 23 | INPUT_ANALOG_I2C_END, 24 | INPUT_SWITCH_1_UP = INPUT_ANALOG_I2C_END, 25 | INPUT_SWITCH_1_DOWN, 26 | INPUT_SWITCH_2_UP, 27 | INPUT_SWITCH_2_DOWN, 28 | INPUT_SWITCH_3_UP, 29 | INPUT_SWITCH_3_DOWN, 30 | INPUT_SWITCH_4_UP, 31 | INPUT_SWITCH_4_DOWN, 32 | INPUT_SWITCH_5_UP, 33 | INPUT_SWITCH_5_DOWN, 34 | INPUTS_END 35 | } inputs; 36 | 37 | typedef void samples_callback(controller_sample_t* samples, uint8_t num_samples); 38 | 39 | void controller_input_init(uint16_t time_between_samples_ms, samples_callback* callback); 40 | uint32_t controller_input_get_map(uint8_t id, uint32_t min, uint32_t max); 41 | 42 | -------------------------------------------------------------------------------- /main/leds.c: -------------------------------------------------------------------------------- 1 | #include "leds.h" 2 | 3 | #include "freertos/FreeRTOS.h" 4 | #include "freertos/task.h" 5 | #include "freertos/semphr.h" 6 | 7 | #include "string.h" 8 | #include "driver/gpio.h" 9 | #include "config.h" 10 | #include "esp_log.h" 11 | 12 | static const char* TAG = "LEDS"; 13 | 14 | #define LED_UNACTIVE_LIMIT 500 15 | 16 | typedef struct LedState { 17 | gpio_num_t gpio; 18 | bool on; 19 | uint32_t toggle_ms; 20 | } LedState; 21 | 22 | static void blink_task(void* args); 23 | 24 | static LedState leds[LED_END]; 25 | static SemaphoreHandle_t mutex = NULL; 26 | 27 | void leds_init(void) 28 | { 29 | assert(mutex == NULL); 30 | memset(&leds, 0, sizeof(leds)); 31 | leds[LED_RIGHT].gpio = (gpio_num_t)LED_RIGHT_GPIO; 32 | leds[LED_LEFT].gpio = (gpio_num_t)LED_LEFT_GPIO; 33 | 34 | gpio_pad_select_gpio(LED_RIGHT_GPIO); 35 | gpio_pad_select_gpio(LED_LEFT_GPIO); 36 | gpio_set_direction(LED_RIGHT_GPIO, GPIO_MODE_OUTPUT); 37 | gpio_set_direction(LED_LEFT_GPIO, GPIO_MODE_OUTPUT); 38 | gpio_set_level(LED_RIGHT_GPIO, 1); 39 | gpio_set_level(LED_LEFT_GPIO, 1); 40 | 41 | mutex = xSemaphoreCreateMutex(); 42 | assert(mutex != NULL); 43 | xSemaphoreGive(mutex); 44 | 45 | TaskHandle_t handle; 46 | BaseType_t status = xTaskCreate(blink_task, "blink_task", 2048, NULL, tskIDLE_PRIORITY, &handle); 47 | assert(status == pdPASS); 48 | } 49 | 50 | void leds_toggle(Led num) 51 | { 52 | assert(num < LED_END); 53 | assert(mutex != NULL); 54 | if (xSemaphoreTake(mutex, pdMS_TO_TICKS(10))) { 55 | leds[num].toggle_ms = pdTICKS_TO_MS(xTaskGetTickCount()); 56 | xSemaphoreGive(mutex); 57 | } else { 58 | assert(false); 59 | } 60 | } 61 | 62 | static void blink_task(void* args) 63 | { 64 | while (true) { 65 | uint32_t ms_now = pdTICKS_TO_MS(xTaskGetTickCount()); 66 | xSemaphoreTake(mutex, portMAX_DELAY); 67 | for (uint8_t i = 0; i < LED_END; i++) { 68 | if (ms_now - leds[i].toggle_ms <= LED_UNACTIVE_LIMIT) { 69 | leds[i].on = !leds[i].on; 70 | gpio_set_level(leds[i].gpio, leds[i].on); 71 | } else { 72 | leds[i].on = false; 73 | gpio_set_level(leds[i].gpio, 0); 74 | } 75 | } 76 | xSemaphoreGive(mutex); 77 | vTaskDelay(pdMS_TO_TICKS(200)); 78 | } 79 | } -------------------------------------------------------------------------------- /main/leds.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | typedef enum Led { 4 | LED_RIGHT, 5 | LED_LEFT, 6 | LED_END 7 | } Led; 8 | 9 | void leds_init(void); 10 | void leds_toggle(Led num); -------------------------------------------------------------------------------- /main/main.c: -------------------------------------------------------------------------------- 1 | 2 | #include 3 | #include "string.h" 4 | #include "freertos/FreeRTOS.h" 5 | #include "freertos/task.h" 6 | #include "esp_system.h" 7 | #include "freertos/FreeRTOS.h" 8 | #include "freertos/task.h" 9 | #include "esp_system.h" 10 | #include "esp_wifi.h" 11 | #include "esp_event.h" 12 | #include "esp_log.h" 13 | #include "nvs_flash.h" 14 | #include "transport_wifi.h" 15 | #include "controller_input.h" 16 | #include "rover_controller.h" 17 | #include "leds.h" 18 | 19 | #include "lwip/err.h" 20 | #include "lwip/sys.h" 21 | 22 | #include "web_server.h" 23 | #include "config.h" 24 | #include "transport_lora.h" 25 | 26 | static const char *TAG = "main"; 27 | 28 | static void wifi_event_handler(void* arg, esp_event_base_t event_base, int32_t event_id, void* event_data) 29 | { 30 | 31 | switch (event_id) { 32 | case WIFI_EVENT_AP_START: 33 | webserver_start(); 34 | break; 35 | case WIFI_EVENT_AP_STOP: 36 | webserver_stop(); 37 | break; 38 | case WIFI_EVENT_AP_STACONNECTED: 39 | { 40 | wifi_event_ap_staconnected_t* event = (wifi_event_ap_staconnected_t*) event_data; 41 | ESP_LOGW(TAG, "station "MACSTR" join, AID=%d", MAC2STR(event->mac), event->aid); 42 | break; 43 | } 44 | case WIFI_EVENT_AP_STADISCONNECTED: 45 | { 46 | wifi_event_ap_stadisconnected_t* event = (wifi_event_ap_stadisconnected_t*) event_data; 47 | ESP_LOGW(TAG, "station "MACSTR" leave, AID=%d", MAC2STR(event->mac), event->aid); 48 | break; 49 | } 50 | } 51 | } 52 | 53 | static void start_ap(void) { 54 | esp_netif_t* netif = esp_netif_create_default_wifi_ap(); 55 | ESP_ERROR_CHECK(esp_netif_dhcps_stop(netif)); 56 | esp_netif_ip_info_t ip_info; 57 | 58 | ip_info.ip.addr = esp_ip4addr_aton(ROVER_CONTROLLER_STATIC_IP);; 59 | IP4_ADDR(&ip_info.gw, 192, 168, 1, 1); 60 | IP4_ADDR(&ip_info.netmask, 255, 255, 255, 0); 61 | ESP_ERROR_CHECK(esp_netif_set_ip_info(netif, &ip_info)); 62 | 63 | wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); 64 | ESP_ERROR_CHECK(esp_wifi_init(&cfg)); 65 | 66 | ESP_ERROR_CHECK(esp_event_handler_instance_register(WIFI_EVENT, ESP_EVENT_ANY_ID, &wifi_event_handler, NULL, NULL)); 67 | 68 | wifi_config_t wifi_config = { 69 | .ap = { 70 | .ssid = AP_SSID, 71 | .ssid_len = strlen(AP_SSID), 72 | .password = AP_PASS, 73 | .max_connection = 3, 74 | .authmode = WIFI_AUTH_WPA2_PSK 75 | }, 76 | }; 77 | if (strlen(AP_PASS) == 0) { 78 | wifi_config.ap.authmode = WIFI_AUTH_OPEN; 79 | } 80 | 81 | ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_AP)); 82 | ESP_ERROR_CHECK(esp_wifi_set_config(ESP_IF_WIFI_AP, &wifi_config)); 83 | ESP_ERROR_CHECK(esp_wifi_start()); 84 | 85 | ESP_LOGI(TAG, "wifi_init_softap finished. SSID:%s password:%s", AP_SSID, AP_PASS); 86 | } 87 | 88 | void app_main(void) 89 | { 90 | ESP_ERROR_CHECK(nvs_flash_init()); 91 | ESP_ERROR_CHECK(esp_netif_init()); 92 | ESP_ERROR_CHECK(esp_event_loop_create_default()); 93 | 94 | leds_init(); 95 | transport_lora_init(); 96 | webserver_init(); 97 | transport_ws_init(); 98 | rover_controller_init(); 99 | transport_ws_start(); 100 | 101 | start_ap(); 102 | } 103 | -------------------------------------------------------------------------------- /main/rover_controller.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "freertos/FreeRTOS.h" 3 | #include "freertos/task.h" 4 | #include "freertos/semphr.h" 5 | #include "esp_log.h" 6 | 7 | #include "rover_controller.h" 8 | #include "controller_input.h" 9 | #include "transport_wifi.h" 10 | #include "transport_lora.h" 11 | #include "rover_utils.h" 12 | #include "config.h" 13 | 14 | #define ADC_SAMPLE_DELAY 100 15 | #define MAX_TX_BUF_LEN 100 16 | 17 | #define ADC_DATA_NOTIFICATION 1 18 | 19 | static void sample_readings_done_callback(controller_sample_t* samples, uint8_t num_samples); 20 | static void periodic_send_data(void* params); 21 | static bool build_rover_payload(void); 22 | static uint16_t convert_3_way_switch(uint32_t raw1, uint32_t raw2); 23 | static bool should_use_wifi_transport(void); 24 | 25 | 26 | static const char* TAG = "ROVER_CONTROLLER"; 27 | 28 | static TaskHandle_t task_handle; 29 | static xSemaphoreHandle sem_handle; 30 | static controller_sample_t controller_samples[INPUTS_END]; 31 | 32 | static uint16_t tx_buf[MAX_TX_BUF_LEN]; 33 | static uint16_t tx_buf_payload_len; 34 | 35 | void rover_controller_init(void) 36 | { 37 | sem_handle = xSemaphoreCreateBinary(); 38 | assert(sem_handle != NULL); 39 | xSemaphoreGive(sem_handle); 40 | BaseType_t status = xTaskCreate(periodic_send_data, "send_values", 4096, NULL, tskIDLE_PRIORITY, &task_handle); 41 | assert(status == pdPASS); 42 | 43 | controller_input_init(ADC_SAMPLE_DELAY, &sample_readings_done_callback); 44 | } 45 | 46 | static void periodic_send_data(void* params) 47 | { 48 | while (true) { 49 | uint32_t notification; 50 | assert(xTaskNotifyWait(ADC_DATA_NOTIFICATION, 0, ¬ification, portMAX_DELAY)); 51 | assert(notification == ADC_DATA_NOTIFICATION); 52 | assert(xSemaphoreTake(sem_handle, portMAX_DELAY) == pdPASS); 53 | 54 | for (uint8_t i = 0; i < INPUTS_END; i++) { 55 | //printf("%d: Raw: %d ", i, controller_samples[i].raw_value); 56 | } 57 | //printf("\n"); 58 | bool payload_changed = build_rover_payload(); 59 | xSemaphoreGive(sem_handle); 60 | if (true) { 61 | if (should_use_wifi_transport()) { 62 | transport_ws_send((uint8_t*)tx_buf, tx_buf_payload_len); 63 | } else { 64 | transport_lora_send((uint8_t*)tx_buf, tx_buf_payload_len); 65 | } 66 | } 67 | } 68 | } 69 | 70 | static bool build_rover_payload(void) 71 | { 72 | bool payload_changed = true; 73 | uint16_t temp_tx_buf[MAX_TX_BUF_LEN]; 74 | 75 | tx_buf_payload_len = 6 * sizeof(uint16_t); // Rover RC controller have 6 channels, limit to that for now for compatability 76 | 77 | temp_tx_buf[0] = 2000 + 1000 - map(controller_samples[INPUT_RIGHT_JOYSTICK_X].voltage, 0, 3300, 1000, 2000); // Steer joystick is inverted 78 | temp_tx_buf[1] = map(controller_samples[INPUT_RIGHT_JOYSTICK_Y].voltage, 0, 3300, 1000, 2000); 79 | temp_tx_buf[2] = map(controller_samples[INPUT_LEFT_JOYSTICK_X].voltage, 0, 3300, 1000, 2000); 80 | temp_tx_buf[3] = map(controller_samples[INPUT_LEFT_JOYSTICK_Y].voltage, 0, 3300, 1000, 2000); 81 | temp_tx_buf[4] = convert_3_way_switch(controller_samples[INPUT_SWITCH_1_UP].raw_value, controller_samples[INPUT_SWITCH_1_DOWN].raw_value); 82 | temp_tx_buf[5] = 1500; 83 | 84 | 85 | //TODO("Could do more here, like only send if something changed more than x") 86 | if (memcmp(temp_tx_buf, tx_buf, tx_buf_payload_len) == 0) { 87 | payload_changed = false; 88 | } else { 89 | memcpy(tx_buf, temp_tx_buf, tx_buf_payload_len); 90 | } 91 | //ESP_LOGW(TAG, "Send: %d, %d \t %d, %d \t %d, %d", tx_buf[0], tx_buf[1], tx_buf[2], tx_buf[3], tx_buf[4], tx_buf[5]); 92 | return payload_changed; 93 | } 94 | 95 | static void sample_readings_done_callback(controller_sample_t* samples, uint8_t num_samples) 96 | { 97 | assert(num_samples == INPUTS_END); 98 | if (xSemaphoreTake(sem_handle, pdMS_TO_TICKS(5)) == pdPASS) { 99 | memcpy(controller_samples, samples, sizeof(controller_sample_t) * num_samples); 100 | xSemaphoreGive(sem_handle); 101 | } else { 102 | ESP_LOGE(TAG, "Failed getting adc sample copy semaphore"); 103 | } 104 | 105 | assert(xTaskNotify(task_handle, ADC_DATA_NOTIFICATION, eSetValueWithOverwrite) == pdPASS); 106 | } 107 | 108 | static uint16_t convert_3_way_switch(uint32_t up, uint32_t down) 109 | { 110 | uint16_t value; 111 | 112 | if (up == 0 && down == 0) { 113 | value = 1500; 114 | } else if (up == 1) { 115 | value = 1000; 116 | } else { 117 | value = 2000; 118 | } 119 | 120 | return value; 121 | } 122 | 123 | static bool should_use_wifi_transport(void) 124 | { 125 | return convert_3_way_switch(controller_samples[INPUT_SWITCH_2_UP].raw_value, controller_samples[INPUT_SWITCH_2_DOWN].raw_value) == 2000; 126 | } 127 | -------------------------------------------------------------------------------- /main/rover_controller.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void rover_controller_init(void); -------------------------------------------------------------------------------- /main/rover_telematics.c: -------------------------------------------------------------------------------- 1 | #include "rover_telematics.h" 2 | #include "assert.h" 3 | #include "leds.h" 4 | 5 | static on_telematics* on_data = NULL; 6 | 7 | 8 | void rover_telematics_register_on_data(on_telematics* callback) 9 | { 10 | assert(on_data == NULL); 11 | assert(callback != NULL); 12 | on_data = callback; 13 | } 14 | 15 | void rover_telematics_put(uint8_t* telematics, uint16_t length) 16 | { 17 | // Later one LED will be used for something else. 18 | leds_toggle(LED_LEFT); 19 | leds_toggle(LED_RIGHT); 20 | if (on_data) { 21 | on_data(telematics, length); 22 | } 23 | } -------------------------------------------------------------------------------- /main/rover_telematics.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include 4 | #include 5 | 6 | typedef void on_telematics(uint8_t* telematics, uint16_t length); 7 | 8 | void rover_telematics_register_on_data(on_telematics* callback); 9 | 10 | void rover_telematics_put(uint8_t* telematics, uint16_t length); -------------------------------------------------------------------------------- /main/rover_utils.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | inline long map(long x, long in_min, long in_max, long out_min, long out_max) { 4 | return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min; 5 | } -------------------------------------------------------------------------------- /main/transport_lora.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include "freertos/FreeRTOS.h" 3 | #include "freertos/task.h" 4 | #include "freertos/semphr.h" 5 | #include "lora.h" 6 | #include "transport_lora.h" 7 | #include "rover_telematics.h" 8 | #include "esp_log.h" 9 | #include "esp_err.h" 10 | #include "assert.h" 11 | #include "driver/gpio.h" 12 | 13 | #define DIO0_PIN GPIO_NUM_26 14 | 15 | #define LORA_DIO0_HIGH 2 16 | 17 | #define MAX_LORA_PAYLOAD 100 18 | 19 | static const char* TAG = "TRANSPORT_LORA"; 20 | 21 | static void IRAM_ATTR gpio_dio0_isr_handler(void* arg); 22 | static void lora_receive_task(void* arg); 23 | 24 | 25 | static TaskHandle_t lora_receive_task_handle; 26 | static xSemaphoreHandle lora_sem; 27 | static bool lora_modem_detected = false; 28 | 29 | void transport_lora_init(void) 30 | { 31 | if (lora_init() == ESP_OK) { 32 | lora_modem_detected = true; 33 | } else { 34 | lora_modem_detected = false; 35 | ESP_LOGE(TAG, "No LoRa modem detected"); 36 | return; 37 | } 38 | 39 | lora_sem = xSemaphoreCreateBinary(); 40 | assert(lora_sem != NULL); 41 | 42 | lora_set_frequency(868e6); 43 | lora_enable_crc(); 44 | lora_set_spreading_factor(7); 45 | lora_set_tx_power(17); 46 | lora_set_bandwidth(500E3); 47 | lora_set_coding_rate(5); 48 | 49 | gpio_config_t io_conf; 50 | io_conf.intr_type = GPIO_PIN_INTR_POSEDGE; 51 | io_conf.pin_bit_mask = 1ULL << DIO0_PIN; 52 | io_conf.mode = GPIO_MODE_INPUT; 53 | io_conf.pull_down_en = 0; 54 | io_conf.pull_up_en = 0; 55 | gpio_config(&io_conf); 56 | 57 | gpio_install_isr_service(0); 58 | 59 | BaseType_t status = xTaskCreate(lora_receive_task, "lora_receive_task", 2048, NULL, 2, &lora_receive_task_handle); 60 | assert(status == pdPASS); 61 | 62 | gpio_isr_handler_add(DIO0_PIN, gpio_dio0_isr_handler, (void*) DIO0_PIN); 63 | lora_receive(); 64 | xSemaphoreGive(lora_sem); 65 | 66 | ESP_LOGI(TAG, "Init successful"); 67 | } 68 | 69 | void transport_lora_send(uint8_t* data, uint16_t length) 70 | { 71 | if (lora_modem_detected) { 72 | assert(xSemaphoreTake(lora_sem, pdMS_TO_TICKS(50)) == pdTRUE); 73 | gpio_isr_handler_remove(DIO0_PIN); 74 | lora_send_packet(data, length); 75 | gpio_isr_handler_add(DIO0_PIN, gpio_dio0_isr_handler, (void*) DIO0_PIN); 76 | lora_receive(); 77 | xSemaphoreGive(lora_sem); 78 | } 79 | } 80 | 81 | static void lora_receive_task(void* arg) 82 | { 83 | while (true) { 84 | uint8_t buf[MAX_LORA_PAYLOAD]; 85 | uint32_t notification; 86 | 87 | assert(xTaskNotifyWait(LORA_DIO0_HIGH, 0, ¬ification, portMAX_DELAY)); 88 | assert(notification == LORA_DIO0_HIGH); 89 | assert(xSemaphoreTake(lora_sem, pdMS_TO_TICKS(50)) == pdTRUE); 90 | while (lora_received()) { 91 | uint32_t x = lora_receive_packet(buf, sizeof(buf)); 92 | if (x == -1) { 93 | printf("crc err\n"); 94 | } else { 95 | printf("Received: %d\n", x); 96 | rover_telematics_put(buf, x); 97 | } 98 | } 99 | gpio_isr_handler_add(DIO0_PIN, gpio_dio0_isr_handler, (void*) DIO0_PIN); 100 | xSemaphoreGive(lora_sem); 101 | } 102 | } 103 | 104 | static void IRAM_ATTR gpio_dio0_isr_handler(void* arg) 105 | { 106 | gpio_isr_handler_remove(DIO0_PIN); 107 | assert(xTaskNotifyFromISR(lora_receive_task_handle, LORA_DIO0_HIGH, eSetValueWithOverwrite, NULL) == pdPASS); 108 | } 109 | -------------------------------------------------------------------------------- /main/transport_lora.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void transport_lora_init(void); 4 | void transport_lora_send(uint8_t* data, uint16_t length); 5 | -------------------------------------------------------------------------------- /main/transport_wifi.c: -------------------------------------------------------------------------------- 1 | #include "esp_system.h" 2 | #include "esp_event.h" 3 | 4 | #include "freertos/FreeRTOS.h" 5 | #include "freertos/task.h" 6 | #include "freertos/semphr.h" 7 | #include "freertos/event_groups.h" 8 | 9 | #include "esp_log.h" 10 | #include "esp_websocket_client.h" 11 | #include "esp_event.h" 12 | #include "esp_wifi.h" 13 | #include "transport_wifi.h" 14 | 15 | #include "lwip/err.h" 16 | #include "lwip/sockets.h" 17 | #include "lwip/sys.h" 18 | #include 19 | 20 | #include "rover_telematics.h" 21 | 22 | #include "config.h" 23 | 24 | #define WS_TIMEOUT_MS 1500 25 | 26 | #define PORT 8080 27 | 28 | static void wifi_event_handler(void* arg, esp_event_base_t event_base, int32_t event_id, void* event_data); 29 | static void websocket_event_handler(void *handler_args, esp_event_base_t base, int32_t event_id, void *event_data); 30 | static bool check_rover_connected(void); 31 | static void ws_timed_out(void* arg); 32 | static void async_ws_connect(void); 33 | static void handle_rover_connection(void* args); 34 | static void udp_server_task(void *args); 35 | 36 | 37 | static const char *TAG = "TRANSPORT_WS"; 38 | 39 | static bool rover_connected = false; 40 | static esp_websocket_client_handle_t client = NULL; 41 | static xSemaphoreHandle connect_semaphore; 42 | static esp_timer_handle_t ws_timeout_timer; 43 | 44 | void transport_ws_init(void) 45 | { 46 | connect_semaphore = xSemaphoreCreateBinary(); 47 | assert(connect_semaphore != NULL); 48 | xSemaphoreGive(connect_semaphore); 49 | ESP_ERROR_CHECK(esp_event_handler_instance_register(WIFI_EVENT, ESP_EVENT_ANY_ID, &wifi_event_handler, NULL, NULL)); 50 | 51 | const esp_timer_create_args_t oneshot_timer_args = { 52 | .callback = &ws_timed_out, 53 | .name = "ws_timeout" 54 | }; 55 | 56 | ESP_ERROR_CHECK(esp_timer_create(&oneshot_timer_args, &ws_timeout_timer)); 57 | 58 | TaskHandle_t task_handle; 59 | BaseType_t status = xTaskCreate(handle_rover_connection, "connect_rover", 4096, NULL, tskIDLE_PRIORITY, &task_handle); 60 | assert(status == pdPASS); 61 | 62 | status = xTaskCreate(udp_server_task, "udp_server", 4096, (void*)AF_INET, 5, NULL); 63 | assert(status == pdPASS); 64 | } 65 | 66 | void transport_ws_start(void) 67 | { 68 | esp_websocket_client_config_t websocket_cfg = {}; 69 | websocket_cfg.uri = ROVER_WS_URL; 70 | websocket_cfg.disable_auto_reconnect = true; 71 | 72 | client = esp_websocket_client_init(&websocket_cfg); 73 | ESP_ERROR_CHECK(esp_websocket_register_events(client, WEBSOCKET_EVENT_ANY, websocket_event_handler, (void *)client)); 74 | } 75 | 76 | esp_err_t transport_ws_send(uint8_t* buf, uint16_t len) 77 | { 78 | esp_err_t res = ESP_FAIL; 79 | if (esp_websocket_client_is_connected(client) && rover_connected) { 80 | uint32_t len_sent = esp_websocket_client_send_bin(client, (char*)buf, len, pdMS_TO_TICKS(1000)); 81 | if (len_sent > 0) { 82 | if (len_sent != len) { 83 | ESP_LOGE(TAG, "Need logic to handle partial writes"); 84 | } 85 | res = ESP_OK; 86 | } 87 | } 88 | 89 | return res; 90 | } 91 | 92 | static void handle_rover_connection(void* args) 93 | { 94 | while (true) { 95 | if (!rover_connected/* && xQueuePeek((xQueueHandle)connect_semaphore, NULL, 0) == pdTRUE*/) { 96 | wifi_sta_list_t sta_list; 97 | if (esp_wifi_ap_get_sta_list(&sta_list) == ESP_OK) { 98 | if (sta_list.num > 0) { 99 | async_ws_connect(); 100 | } 101 | } 102 | }; 103 | vTaskDelay(pdMS_TO_TICKS(1000)); 104 | } 105 | } 106 | 107 | 108 | static void ws_timed_out(void* arg) 109 | { 110 | ESP_LOGE(TAG, "WS Timeout Rover lost"); 111 | rover_connected = false; 112 | esp_websocket_client_stop(client); 113 | } 114 | 115 | static void restart_communication_timer(void) { 116 | rover_connected = true; 117 | esp_timer_stop(ws_timeout_timer); 118 | ESP_ERROR_CHECK(esp_timer_start_once(ws_timeout_timer, WS_TIMEOUT_MS * 1000)); 119 | } 120 | 121 | static void websocket_event_handler(void *handler_args, esp_event_base_t base, int32_t event_id, void *event_data) 122 | { 123 | esp_websocket_event_data_t *data = (esp_websocket_event_data_t *)event_data; 124 | switch (event_id) { 125 | case WEBSOCKET_EVENT_CONNECTED: 126 | ESP_LOGW(TAG, "WEBSOCKET_EVENT_CONNECTED"); 127 | rover_connected = true; 128 | xSemaphoreGive(connect_semaphore); 129 | restart_communication_timer(); 130 | break; 131 | case WEBSOCKET_EVENT_DISCONNECTED: 132 | ESP_LOGW(TAG, "WEBSOCKET_EVENT_DISCONNECTED"); 133 | if (!rover_connected) { 134 | ESP_LOGD(TAG, "Not Rover"); 135 | xSemaphoreGive(connect_semaphore); 136 | } 137 | break; 138 | case WEBSOCKET_EVENT_DATA: 139 | restart_communication_timer(); 140 | if (data->data_len != data->payload_len && data->data_len > 1) { 141 | ESP_LOGE(TAG, "Need to implement segmented websocket data => discarding"); 142 | } else { 143 | rover_telematics_put(data->data_ptr, data->data_len); 144 | } 145 | break; 146 | case WEBSOCKET_EVENT_ERROR: 147 | ESP_LOGW(TAG, "WEBSOCKET_EVENT_ERROR"); 148 | break; 149 | default: 150 | break; 151 | } 152 | } 153 | 154 | static void wifi_event_handler(void* arg, esp_event_base_t event_base, int32_t event_id, void* event_data) 155 | { 156 | switch (event_id) { 157 | case WIFI_EVENT_AP_STACONNECTED: 158 | { 159 | ESP_LOGW(TAG, "WIFI_EVENT_AP_STACONNECTED"); 160 | wifi_event_ap_staconnected_t* event = (wifi_event_ap_staconnected_t*) event_data; 161 | if (!check_rover_connected()) { 162 | async_ws_connect(); 163 | } 164 | break; 165 | } 166 | case WIFI_EVENT_AP_STADISCONNECTED: 167 | { 168 | ESP_LOGW(TAG, "WIFI_EVENT_AP_STADISCONNECTED"); 169 | break; 170 | } 171 | } 172 | } 173 | 174 | static void async_ws_connect(void) 175 | { 176 | if (xSemaphoreTake(connect_semaphore, 0)) { 177 | ESP_LOGD(TAG, "Try connect to Rover"); 178 | if (esp_websocket_client_start(client) != ESP_OK) { 179 | ESP_LOGD(TAG, "esp_websocket_client_start failed"); 180 | xSemaphoreGive(connect_semaphore); 181 | } 182 | } else { 183 | ESP_LOGE(TAG, "Failed getting connect semaphore, connect already in progress"); 184 | } 185 | } 186 | 187 | static bool check_rover_connected(void) 188 | { 189 | return /*esp_websocket_client_is_connected(client) ||*/ rover_connected; 190 | } 191 | 192 | static void udp_server_task(void *pvParameters) 193 | { 194 | uint8_t rx_buffer[128]; 195 | char addr_str[128]; 196 | int ip_protocol = 0; 197 | struct sockaddr_in6 dest_addr; 198 | 199 | while (true) { 200 | 201 | struct sockaddr_in *dest_addr_ip4 = (struct sockaddr_in *)&dest_addr; 202 | dest_addr_ip4->sin_addr.s_addr = htonl(INADDR_ANY); 203 | dest_addr_ip4->sin_family = AF_INET; 204 | dest_addr_ip4->sin_port = htons(PORT); 205 | ip_protocol = IPPROTO_IP; 206 | 207 | 208 | int sock = socket(AF_INET, SOCK_DGRAM, ip_protocol); 209 | if (sock < 0) { 210 | ESP_LOGE(TAG, "Unable to create socket: errno %d", errno); 211 | break; 212 | } 213 | ESP_LOGI(TAG, "Socket created"); 214 | 215 | int err = bind(sock, (struct sockaddr *)&dest_addr, sizeof(dest_addr)); 216 | if (err < 0) { 217 | ESP_LOGE(TAG, "Socket unable to bind: errno %d", errno); 218 | } 219 | ESP_LOGI(TAG, "Socket bound, port %d", PORT); 220 | 221 | while (1) { 222 | memset(rx_buffer, 0, sizeof(rx_buffer)); 223 | struct sockaddr_in6 source_addr; 224 | socklen_t socklen = sizeof(source_addr); 225 | int len = recvfrom(sock, rx_buffer, sizeof(rx_buffer) - 1, 0, (struct sockaddr *)&source_addr, &socklen); 226 | 227 | if (len < 0) { 228 | ESP_LOGE(TAG, "recvfrom failed: errno %d", errno); 229 | break; 230 | } 231 | else { 232 | inet_ntoa_r(((struct sockaddr_in *)&source_addr)->sin_addr.s_addr, addr_str, sizeof(addr_str) - 1); 233 | if (rx_buffer[0] == '[' && rx_buffer[len - 1] == ']') { 234 | rover_telematics_put(&rx_buffer[1], len - 2); 235 | } else { 236 | ESP_LOGI(TAG, "start: %c, end: %c", rx_buffer[0], rx_buffer[len - 1]); 237 | } 238 | } 239 | } 240 | 241 | if (sock != -1) { 242 | ESP_LOGE(TAG, "Shutting down socket and restarting..."); 243 | shutdown(sock, 0); 244 | close(sock); 245 | } 246 | } 247 | vTaskDelete(NULL); 248 | } -------------------------------------------------------------------------------- /main/transport_wifi.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "esp_system.h" 4 | 5 | void transport_ws_init(void); 6 | void transport_ws_start(void); 7 | esp_err_t transport_ws_send(uint8_t* buf, uint16_t len); -------------------------------------------------------------------------------- /main/web_server.c: -------------------------------------------------------------------------------- 1 | #include "web_server.h" 2 | #include "esp_err.h" 3 | #include "esp_log.h" 4 | #include "esp_netif.h" 5 | #include 6 | #include 7 | #include "lwip/err.h" 8 | #include "lwip/sys.h" 9 | #include "esp_http_server.h" 10 | #include "esp_https_server.h" 11 | 12 | #include "esp_timer.h" 13 | 14 | #include "rover_telematics.h" 15 | #include "leds.h" 16 | 17 | #include "config.h" 18 | 19 | // Browsers don't like unsecure websockets 20 | //#define ROVER_WS_SSL 21 | 22 | #define MAX_WS_INCOMING_SIZE 100 23 | #define WS_CONNECT_MESSAGE "CONNECT" 24 | #define MAX_WS_CONNECTIONS 2 25 | #define INVALID_FD -1 26 | #define TX_BUF_SIZE 100 27 | 28 | typedef struct ws_client { 29 | int fd; 30 | bool tx_in_progress; 31 | } ws_client; 32 | 33 | typedef struct web_server { 34 | httpd_handle_t handle; 35 | bool running; 36 | ws_client clients[MAX_WS_CONNECTIONS]; 37 | xSemaphoreHandle tx_sem; 38 | uint8_t tx_buf[TX_BUF_SIZE]; 39 | uint16_t tx_buf_len; 40 | } web_server; 41 | 42 | 43 | static ws_client* find_ws_client(int fd); 44 | static void on_client_disconnect(httpd_handle_t hd, int sockfd); 45 | static bool any_client_tx(); 46 | static bool any_client_connected(); 47 | 48 | static esp_err_t ws_handler(httpd_req_t *req); 49 | static void on_telematics_data(uint8_t* telemetics, uint16_t length); 50 | 51 | static const httpd_uri_t ws = { 52 | .uri = "/ws", 53 | .method = HTTP_GET, 54 | .handler = ws_handler, 55 | .user_ctx = NULL, 56 | .is_websocket = true 57 | }; 58 | static const char *TAG = "web_server"; 59 | 60 | static web_server server; 61 | 62 | void webserver_init(void) 63 | { 64 | memset(&server, 0, sizeof(web_server)); 65 | server.running = false; 66 | ESP_LOGI(TAG, "webserver_init"); 67 | server.handle = NULL; 68 | 69 | for (uint8_t i = 0; i < MAX_WS_CONNECTIONS; i++) { 70 | server.clients[i].fd = INVALID_FD; 71 | server.clients[i].tx_in_progress = false; 72 | } 73 | 74 | server.tx_sem = xSemaphoreCreateBinary(); 75 | assert(server.tx_sem != NULL); 76 | xSemaphoreGive(server.tx_sem); 77 | 78 | 79 | rover_telematics_register_on_data(&on_telematics_data); 80 | } 81 | 82 | void webserver_start(void) 83 | { 84 | assert(!server.running); 85 | ESP_LOGI(TAG, "webserver_start"); 86 | esp_err_t err; 87 | 88 | #ifdef ROVER_WS_SSL 89 | httpd_ssl_config_t config = HTTPD_SSL_CONFIG_DEFAULT(); 90 | 91 | extern const unsigned char cacert_pem_start[] asm("_binary_cacert_pem_start"); 92 | extern const unsigned char cacert_pem_end[] asm("_binary_cacert_pem_end"); 93 | config.cacert_pem = cacert_pem_start; 94 | config.cacert_len = cacert_pem_end - cacert_pem_start; 95 | 96 | extern const unsigned char prvtkey_pem_start[] asm("_binary_prvtkey_pem_start"); 97 | extern const unsigned char prvtkey_pem_end[] asm("_binary_prvtkey_pem_end"); 98 | config.prvtkey_pem = prvtkey_pem_start; 99 | config.prvtkey_len = prvtkey_pem_end - prvtkey_pem_start; 100 | 101 | config.httpd.server_port = WS_SERVER_PORT; 102 | config.httpd.close_fn = on_client_disconnect; 103 | config.httpd.max_open_sockets = MAX_WS_CONNECTIONS; 104 | 105 | err = httpd_ssl_start(&server.handle, &config); 106 | assert(err == ESP_OK); 107 | 108 | err = httpd_register_uri_handler(server.handle, &ws); 109 | assert(err == ESP_OK); 110 | server.running = true; 111 | ESP_LOGI(TAG, "Web Server started on port %d, server handle %p", config.httpd.server_port, server.handle); 112 | #else 113 | httpd_config_t config = HTTPD_DEFAULT_CONFIG(); 114 | 115 | config.server_port = WS_SERVER_PORT; 116 | config.close_fn = on_client_disconnect; 117 | config.max_open_sockets = MAX_WS_CONNECTIONS; 118 | err = httpd_start(&server.handle, &config); 119 | assert(err == ESP_OK); 120 | 121 | err = httpd_register_uri_handler(server.handle, &ws); 122 | assert(err == ESP_OK); 123 | server.running = true; 124 | ESP_LOGI(TAG, "Web Server started on port %d, server handle %p", config.server_port, server.handle); 125 | #endif 126 | 127 | 128 | } 129 | 130 | void webserver_stop(void) 131 | { 132 | assert(false); 133 | // Stop the httpd server 134 | assert(httpd_stop(server.handle) == ESP_OK); 135 | server.running = false; 136 | } 137 | 138 | static ws_client* find_ws_client(int fd) 139 | { 140 | uint8_t i = 0; 141 | for (i = 0; i < MAX_WS_CONNECTIONS; i++) { 142 | if (server.clients[i].fd == fd) { 143 | return &server.clients[i]; 144 | } 145 | } 146 | return NULL; 147 | } 148 | 149 | static void on_client_disconnect(httpd_handle_t hd, int sockfd) 150 | { 151 | ESP_LOGI(TAG, "Client disconnected"); 152 | 153 | ws_client* client = find_ws_client(sockfd); 154 | if (client == NULL) return; 155 | 156 | bool tx_ongoing = any_client_tx(); 157 | 158 | client->tx_in_progress = false; 159 | client->fd = INVALID_FD; 160 | if (tx_ongoing && !any_client_tx()) { 161 | xSemaphoreGive(server.tx_sem); 162 | } 163 | } 164 | 165 | static bool any_client_tx() 166 | { 167 | uint8_t i = 0; 168 | for (i = 0; i < MAX_WS_CONNECTIONS; i++) { 169 | if (server.clients[i].fd != INVALID_FD && server.clients[i].tx_in_progress) { 170 | return true; 171 | } 172 | } 173 | return false; 174 | } 175 | 176 | static bool any_client_connected() 177 | { 178 | uint8_t i = 0; 179 | for (i = 0; i < MAX_WS_CONNECTIONS; i++) { 180 | if (server.clients[i].fd != INVALID_FD) { 181 | return true; 182 | } 183 | } 184 | return false; 185 | } 186 | 187 | static esp_err_t ws_handler(httpd_req_t *req) 188 | { 189 | ESP_LOGW(TAG, "server: %p, req: %p", server.handle, req->handle); 190 | assert(server.handle == req->handle); 191 | uint8_t buf[MAX_WS_INCOMING_SIZE] = { 0 }; 192 | httpd_ws_frame_t packet; 193 | 194 | memset(&packet, 0, sizeof(httpd_ws_frame_t)); 195 | packet.payload = buf; 196 | 197 | esp_err_t ret = httpd_ws_recv_frame(req, &packet, MAX_WS_INCOMING_SIZE); 198 | if (ret != ESP_OK) { 199 | ESP_LOGE(TAG, "httpd_ws_recv_frame failed with %d", ret); 200 | return ret; 201 | } 202 | 203 | // Currently ESP-IDF WS Server library does not seem to have any "WS_CONNECTED" event, and therefore no way for the server to send 204 | // any data to the client until the client first sent something to the server. This is where we make a copy of the ws fd so we can 205 | // send async data to it later. 206 | if (packet.type == HTTPD_WS_TYPE_TEXT) { 207 | if (packet.len == strlen(WS_CONNECT_MESSAGE) && strncmp((char*)packet.payload, WS_CONNECT_MESSAGE, packet.len) == 0) { 208 | ESP_LOGI(TAG, "Got CONNECT"); 209 | uint8_t i = 0; 210 | for (i = 0; i < MAX_WS_CONNECTIONS; i++) { 211 | if (server.clients[i].fd == INVALID_FD) { 212 | server.clients[i].fd = httpd_req_to_sockfd(req); 213 | server.clients[i].tx_in_progress = false; 214 | break; 215 | } 216 | } 217 | assert(i < MAX_WS_CONNECTIONS); 218 | } 219 | } 220 | 221 | return ESP_OK; 222 | } 223 | 224 | static void ws_async_send(void *arg) 225 | { 226 | esp_err_t err; 227 | httpd_ws_frame_t packet; 228 | ws_client* client = (ws_client*)arg; 229 | 230 | memset(&packet, 0, sizeof(httpd_ws_frame_t)); 231 | packet.payload = server.tx_buf; 232 | packet.len = server.tx_buf_len; 233 | packet.type = HTTPD_WS_TYPE_BINARY; 234 | packet.final = true; 235 | 236 | err = httpd_ws_send_frame_async(server.handle, client->fd, &packet); 237 | if (err != ESP_OK) { 238 | ESP_LOGW(TAG, "httpd_ws_send_frame_async failed: %d", err); 239 | } 240 | client->tx_in_progress = false; 241 | if (!any_client_tx()) { 242 | xSemaphoreGive(server.tx_sem); 243 | } 244 | } 245 | 246 | static void on_telematics_data(uint8_t* telemetics, uint16_t length) 247 | { 248 | assert(length <= TX_BUF_SIZE); 249 | 250 | if (!any_client_connected()) { 251 | return; 252 | } 253 | 254 | 255 | 256 | if (xSemaphoreTake(server.tx_sem, 0) == pdPASS) { 257 | memcpy(server.tx_buf, telemetics, length); 258 | server.tx_buf_len = length; 259 | for (uint8_t i = 0; i < MAX_WS_CONNECTIONS; i++) { 260 | if (server.clients[i].fd != INVALID_FD) { 261 | server.clients[i].tx_in_progress = true; 262 | esp_err_t err; 263 | err = httpd_queue_work(server.handle, ws_async_send, &server.clients[i]); 264 | if (err != ESP_OK) { 265 | server.clients[i].tx_in_progress = false; 266 | } 267 | } 268 | } 269 | if (!any_client_tx()) { 270 | ESP_LOGE(TAG, "Failed queueing data transmission on all websockets, releasing semaphore"); 271 | xSemaphoreGive(server.tx_sem); 272 | } 273 | } 274 | 275 | } 276 | -------------------------------------------------------------------------------- /main/web_server.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void webserver_init(void); 4 | void webserver_start(void); 5 | void webserver_stop(void); 6 | -------------------------------------------------------------------------------- /sdkconfig: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file. DO NOT EDIT. 3 | # Espressif IoT Development Framework (ESP-IDF) Project Configuration 4 | # 5 | CONFIG_IDF_CMAKE=y 6 | CONFIG_IDF_TARGET="esp32" 7 | CONFIG_IDF_TARGET_ESP32=y 8 | CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 9 | 10 | # 11 | # SDK tool configuration 12 | # 13 | CONFIG_SDK_TOOLPREFIX="xtensa-esp32-elf-" 14 | # CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set 15 | # end of SDK tool configuration 16 | 17 | # 18 | # Build type 19 | # 20 | CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y 21 | # CONFIG_APP_BUILD_TYPE_ELF_RAM is not set 22 | CONFIG_APP_BUILD_GENERATE_BINARIES=y 23 | CONFIG_APP_BUILD_BOOTLOADER=y 24 | CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y 25 | # end of Build type 26 | 27 | # 28 | # Application manager 29 | # 30 | CONFIG_APP_COMPILE_TIME_DATE=y 31 | # CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set 32 | # CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set 33 | # CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set 34 | CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 35 | # end of Application manager 36 | 37 | # 38 | # Bootloader config 39 | # 40 | CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y 41 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set 42 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set 43 | # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set 44 | # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set 45 | # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set 46 | # CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set 47 | CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y 48 | # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set 49 | # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set 50 | CONFIG_BOOTLOADER_LOG_LEVEL=3 51 | # CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set 52 | CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y 53 | # CONFIG_BOOTLOADER_FACTORY_RESET is not set 54 | # CONFIG_BOOTLOADER_APP_TEST is not set 55 | CONFIG_BOOTLOADER_WDT_ENABLE=y 56 | # CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set 57 | CONFIG_BOOTLOADER_WDT_TIME_MS=9000 58 | # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set 59 | # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set 60 | CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 61 | # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set 62 | # end of Bootloader config 63 | 64 | # 65 | # Security features 66 | # 67 | # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set 68 | # CONFIG_SECURE_BOOT is not set 69 | # CONFIG_SECURE_FLASH_ENC_ENABLED is not set 70 | # end of Security features 71 | 72 | # 73 | # Serial flasher config 74 | # 75 | CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 76 | # CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set 77 | # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set 78 | CONFIG_ESPTOOLPY_FLASHMODE_DIO=y 79 | # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set 80 | CONFIG_ESPTOOLPY_FLASHMODE="dio" 81 | # CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set 82 | CONFIG_ESPTOOLPY_FLASHFREQ_40M=y 83 | # CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set 84 | # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set 85 | CONFIG_ESPTOOLPY_FLASHFREQ="40m" 86 | # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set 87 | # CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set 88 | CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y 89 | # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set 90 | # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set 91 | CONFIG_ESPTOOLPY_FLASHSIZE="4MB" 92 | CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y 93 | CONFIG_ESPTOOLPY_BEFORE_RESET=y 94 | # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set 95 | CONFIG_ESPTOOLPY_BEFORE="default_reset" 96 | CONFIG_ESPTOOLPY_AFTER_RESET=y 97 | # CONFIG_ESPTOOLPY_AFTER_NORESET is not set 98 | CONFIG_ESPTOOLPY_AFTER="hard_reset" 99 | # CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set 100 | # CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set 101 | CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y 102 | # CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set 103 | # CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set 104 | # CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set 105 | # CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set 106 | CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200 107 | CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 108 | # end of Serial flasher config 109 | 110 | # 111 | # Partition Table 112 | # 113 | CONFIG_PARTITION_TABLE_SINGLE_APP=y 114 | # CONFIG_PARTITION_TABLE_TWO_OTA is not set 115 | # CONFIG_PARTITION_TABLE_CUSTOM is not set 116 | CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" 117 | CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" 118 | CONFIG_PARTITION_TABLE_OFFSET=0x8000 119 | CONFIG_PARTITION_TABLE_MD5=y 120 | # end of Partition Table 121 | 122 | # 123 | # Compiler options 124 | # 125 | CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y 126 | # CONFIG_COMPILER_OPTIMIZATION_SIZE is not set 127 | # CONFIG_COMPILER_OPTIMIZATION_PERF is not set 128 | # CONFIG_COMPILER_OPTIMIZATION_NONE is not set 129 | CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y 130 | # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set 131 | # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set 132 | # CONFIG_COMPILER_CXX_EXCEPTIONS is not set 133 | # CONFIG_COMPILER_CXX_RTTI is not set 134 | CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y 135 | # CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set 136 | # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set 137 | # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set 138 | # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set 139 | # CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set 140 | # end of Compiler options 141 | 142 | # 143 | # Component config 144 | # 145 | 146 | # 147 | # Application Level Tracing 148 | # 149 | # CONFIG_APPTRACE_DEST_TRAX is not set 150 | CONFIG_APPTRACE_DEST_NONE=y 151 | CONFIG_APPTRACE_LOCK_ENABLE=y 152 | # end of Application Level Tracing 153 | 154 | # 155 | # Bluetooth 156 | # 157 | # CONFIG_BT_ENABLED is not set 158 | CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF=0 159 | CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF=0 160 | CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF=0 161 | CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF=0 162 | CONFIG_BTDM_CTRL_PINNED_TO_CORE=0 163 | CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1 164 | CONFIG_BT_RESERVE_DRAM=0 165 | # end of Bluetooth 166 | 167 | # 168 | # CoAP Configuration 169 | # 170 | CONFIG_COAP_MBEDTLS_PSK=y 171 | # CONFIG_COAP_MBEDTLS_PKI is not set 172 | # CONFIG_COAP_MBEDTLS_DEBUG is not set 173 | CONFIG_COAP_LOG_DEFAULT_LEVEL=0 174 | # end of CoAP Configuration 175 | 176 | # 177 | # Driver configurations 178 | # 179 | 180 | # 181 | # ADC configuration 182 | # 183 | # CONFIG_ADC_FORCE_XPD_FSM is not set 184 | CONFIG_ADC_DISABLE_DAC=y 185 | # end of ADC configuration 186 | 187 | # 188 | # SPI configuration 189 | # 190 | # CONFIG_SPI_MASTER_IN_IRAM is not set 191 | CONFIG_SPI_MASTER_ISR_IN_IRAM=y 192 | # CONFIG_SPI_SLAVE_IN_IRAM is not set 193 | CONFIG_SPI_SLAVE_ISR_IN_IRAM=y 194 | # end of SPI configuration 195 | 196 | # 197 | # UART configuration 198 | # 199 | # CONFIG_UART_ISR_IN_IRAM is not set 200 | # end of UART configuration 201 | 202 | # 203 | # RTCIO configuration 204 | # 205 | # CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC is not set 206 | # end of RTCIO configuration 207 | # end of Driver configurations 208 | 209 | # 210 | # eFuse Bit Manager 211 | # 212 | # CONFIG_EFUSE_CUSTOM_TABLE is not set 213 | # CONFIG_EFUSE_VIRTUAL is not set 214 | # CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set 215 | CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y 216 | # CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set 217 | CONFIG_EFUSE_MAX_BLK_LEN=192 218 | # end of eFuse Bit Manager 219 | 220 | # 221 | # ESP-TLS 222 | # 223 | CONFIG_ESP_TLS_USING_MBEDTLS=y 224 | CONFIG_ESP_TLS_SERVER=y 225 | # CONFIG_ESP_TLS_PSK_VERIFICATION is not set 226 | # end of ESP-TLS 227 | 228 | # 229 | # ESP32-specific 230 | # 231 | CONFIG_ESP32_REV_MIN_0=y 232 | # CONFIG_ESP32_REV_MIN_1 is not set 233 | # CONFIG_ESP32_REV_MIN_2 is not set 234 | # CONFIG_ESP32_REV_MIN_3 is not set 235 | CONFIG_ESP32_REV_MIN=0 236 | CONFIG_ESP32_DPORT_WORKAROUND=y 237 | # CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set 238 | # CONFIG_ESP32_DEFAULT_CPU_FREQ_160 is not set 239 | CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y 240 | CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 241 | # CONFIG_ESP32_SPIRAM_SUPPORT is not set 242 | # CONFIG_ESP32_TRAX is not set 243 | CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 244 | # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set 245 | CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y 246 | CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 247 | # CONFIG_ESP32_ULP_COPROC_ENABLED is not set 248 | CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0 249 | CONFIG_ESP32_DEBUG_OCDAWARE=y 250 | CONFIG_ESP32_BROWNOUT_DET=y 251 | CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y 252 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_1 is not set 253 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_2 is not set 254 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_3 is not set 255 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_4 is not set 256 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5 is not set 257 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set 258 | # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set 259 | CONFIG_ESP32_BROWNOUT_DET_LVL=0 260 | CONFIG_ESP32_REDUCE_PHY_TX_POWER=y 261 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y 262 | # CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set 263 | # CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set 264 | # CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set 265 | CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y 266 | # CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set 267 | # CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set 268 | # CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set 269 | CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 270 | CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 271 | # CONFIG_ESP32_XTAL_FREQ_40 is not set 272 | CONFIG_ESP32_XTAL_FREQ_26=y 273 | # CONFIG_ESP32_XTAL_FREQ_AUTO is not set 274 | CONFIG_ESP32_XTAL_FREQ=26 275 | # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set 276 | # CONFIG_ESP32_NO_BLOBS is not set 277 | # CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set 278 | # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set 279 | CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5 280 | # end of ESP32-specific 281 | 282 | # 283 | # Power Management 284 | # 285 | # CONFIG_PM_ENABLE is not set 286 | # end of Power Management 287 | 288 | # 289 | # ADC-Calibration 290 | # 291 | CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y 292 | CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y 293 | CONFIG_ADC_CAL_LUT_ENABLE=y 294 | # end of ADC-Calibration 295 | 296 | # 297 | # Common ESP-related 298 | # 299 | CONFIG_ESP_ERR_TO_NAME_LOOKUP=y 300 | CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 301 | CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 302 | CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 303 | CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 304 | CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y 305 | CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 306 | CONFIG_ESP_CONSOLE_UART_DEFAULT=y 307 | # CONFIG_ESP_CONSOLE_UART_CUSTOM is not set 308 | # CONFIG_ESP_CONSOLE_UART_NONE is not set 309 | CONFIG_ESP_CONSOLE_UART_NUM=0 310 | CONFIG_ESP_CONSOLE_UART_TX_GPIO=1 311 | CONFIG_ESP_CONSOLE_UART_RX_GPIO=3 312 | CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 313 | CONFIG_ESP_INT_WDT=y 314 | CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 315 | CONFIG_ESP_INT_WDT_CHECK_CPU1=y 316 | CONFIG_ESP_TASK_WDT=y 317 | # CONFIG_ESP_TASK_WDT_PANIC is not set 318 | CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 319 | CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 320 | CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 321 | # CONFIG_ESP_PANIC_HANDLER_IRAM is not set 322 | CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y 323 | CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y 324 | CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y 325 | CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y 326 | # end of Common ESP-related 327 | 328 | # 329 | # Ethernet 330 | # 331 | CONFIG_ETH_ENABLED=y 332 | CONFIG_ETH_USE_ESP32_EMAC=y 333 | CONFIG_ETH_PHY_INTERFACE_RMII=y 334 | # CONFIG_ETH_PHY_INTERFACE_MII is not set 335 | CONFIG_ETH_RMII_CLK_INPUT=y 336 | # CONFIG_ETH_RMII_CLK_OUTPUT is not set 337 | CONFIG_ETH_RMII_CLK_IN_GPIO=0 338 | CONFIG_ETH_DMA_BUFFER_SIZE=512 339 | CONFIG_ETH_DMA_RX_BUFFER_NUM=10 340 | CONFIG_ETH_DMA_TX_BUFFER_NUM=10 341 | CONFIG_ETH_USE_SPI_ETHERNET=y 342 | # CONFIG_ETH_SPI_ETHERNET_DM9051 is not set 343 | # CONFIG_ETH_USE_OPENETH is not set 344 | # end of Ethernet 345 | 346 | # 347 | # Event Loop Library 348 | # 349 | # CONFIG_ESP_EVENT_LOOP_PROFILING is not set 350 | CONFIG_ESP_EVENT_POST_FROM_ISR=y 351 | CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y 352 | # end of Event Loop Library 353 | 354 | # 355 | # GDB Stub 356 | # 357 | # end of GDB Stub 358 | 359 | # 360 | # ESP HTTP client 361 | # 362 | CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y 363 | # CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set 364 | # end of ESP HTTP client 365 | 366 | # 367 | # HTTP Server 368 | # 369 | CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 370 | CONFIG_HTTPD_MAX_URI_LEN=1024 371 | CONFIG_HTTPD_ERR_RESP_NO_DELAY=y 372 | CONFIG_HTTPD_PURGE_BUF_LEN=32 373 | # CONFIG_HTTPD_LOG_PURGE_DATA is not set 374 | CONFIG_HTTPD_WS_SUPPORT=y 375 | # end of HTTP Server 376 | 377 | # 378 | # ESP HTTPS OTA 379 | # 380 | # CONFIG_OTA_ALLOW_HTTP is not set 381 | # end of ESP HTTPS OTA 382 | 383 | # 384 | # ESP HTTPS server 385 | # 386 | CONFIG_ESP_HTTPS_SERVER_ENABLE=y 387 | # end of ESP HTTPS server 388 | 389 | # 390 | # ESP NETIF Adapter 391 | # 392 | CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 393 | CONFIG_ESP_NETIF_TCPIP_LWIP=y 394 | # CONFIG_ESP_NETIF_LOOPBACK is not set 395 | CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y 396 | # end of ESP NETIF Adapter 397 | 398 | # 399 | # ESP System Settings 400 | # 401 | # CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set 402 | CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y 403 | # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set 404 | # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set 405 | # end of ESP System Settings 406 | 407 | # 408 | # High resolution timer (esp_timer) 409 | # 410 | # CONFIG_ESP_TIMER_PROFILING is not set 411 | CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 412 | # CONFIG_ESP_TIMER_IMPL_FRC2 is not set 413 | CONFIG_ESP_TIMER_IMPL_TG0_LAC=y 414 | # end of High resolution timer (esp_timer) 415 | 416 | # 417 | # Wi-Fi 418 | # 419 | CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 420 | CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 421 | # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set 422 | CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y 423 | CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 424 | CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 425 | # CONFIG_ESP32_WIFI_CSI_ENABLED is not set 426 | CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y 427 | CONFIG_ESP32_WIFI_TX_BA_WIN=6 428 | CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y 429 | CONFIG_ESP32_WIFI_RX_BA_WIN=6 430 | CONFIG_ESP32_WIFI_NVS_ENABLED=y 431 | CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y 432 | # CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set 433 | CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 434 | CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 435 | # CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set 436 | CONFIG_ESP32_WIFI_IRAM_OPT=y 437 | CONFIG_ESP32_WIFI_RX_IRAM_OPT=y 438 | # CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set 439 | # end of Wi-Fi 440 | 441 | # 442 | # PHY 443 | # 444 | CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y 445 | # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set 446 | CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 447 | CONFIG_ESP32_PHY_MAX_TX_POWER=20 448 | # end of PHY 449 | 450 | # 451 | # Core dump 452 | # 453 | # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set 454 | # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set 455 | CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y 456 | # end of Core dump 457 | 458 | # 459 | # FAT Filesystem support 460 | # 461 | # CONFIG_FATFS_CODEPAGE_DYNAMIC is not set 462 | CONFIG_FATFS_CODEPAGE_437=y 463 | # CONFIG_FATFS_CODEPAGE_720 is not set 464 | # CONFIG_FATFS_CODEPAGE_737 is not set 465 | # CONFIG_FATFS_CODEPAGE_771 is not set 466 | # CONFIG_FATFS_CODEPAGE_775 is not set 467 | # CONFIG_FATFS_CODEPAGE_850 is not set 468 | # CONFIG_FATFS_CODEPAGE_852 is not set 469 | # CONFIG_FATFS_CODEPAGE_855 is not set 470 | # CONFIG_FATFS_CODEPAGE_857 is not set 471 | # CONFIG_FATFS_CODEPAGE_860 is not set 472 | # CONFIG_FATFS_CODEPAGE_861 is not set 473 | # CONFIG_FATFS_CODEPAGE_862 is not set 474 | # CONFIG_FATFS_CODEPAGE_863 is not set 475 | # CONFIG_FATFS_CODEPAGE_864 is not set 476 | # CONFIG_FATFS_CODEPAGE_865 is not set 477 | # CONFIG_FATFS_CODEPAGE_866 is not set 478 | # CONFIG_FATFS_CODEPAGE_869 is not set 479 | # CONFIG_FATFS_CODEPAGE_932 is not set 480 | # CONFIG_FATFS_CODEPAGE_936 is not set 481 | # CONFIG_FATFS_CODEPAGE_949 is not set 482 | # CONFIG_FATFS_CODEPAGE_950 is not set 483 | CONFIG_FATFS_CODEPAGE=437 484 | CONFIG_FATFS_LFN_NONE=y 485 | # CONFIG_FATFS_LFN_HEAP is not set 486 | # CONFIG_FATFS_LFN_STACK is not set 487 | CONFIG_FATFS_FS_LOCK=0 488 | CONFIG_FATFS_TIMEOUT_MS=10000 489 | CONFIG_FATFS_PER_FILE_CACHE=y 490 | # end of FAT Filesystem support 491 | 492 | # 493 | # Modbus configuration 494 | # 495 | CONFIG_FMB_COMM_MODE_RTU_EN=y 496 | CONFIG_FMB_COMM_MODE_ASCII_EN=y 497 | CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND=150 498 | CONFIG_FMB_MASTER_DELAY_MS_CONVERT=200 499 | CONFIG_FMB_QUEUE_LENGTH=20 500 | CONFIG_FMB_SERIAL_TASK_STACK_SIZE=2048 501 | CONFIG_FMB_SERIAL_BUF_SIZE=256 502 | CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8 503 | CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000 504 | CONFIG_FMB_SERIAL_TASK_PRIO=10 505 | # CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set 506 | CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20 507 | CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 508 | CONFIG_FMB_CONTROLLER_STACK_SIZE=4096 509 | CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20 510 | CONFIG_FMB_TIMER_PORT_ENABLED=y 511 | CONFIG_FMB_TIMER_GROUP=0 512 | CONFIG_FMB_TIMER_INDEX=0 513 | # CONFIG_FMB_TIMER_ISR_IN_IRAM is not set 514 | # end of Modbus configuration 515 | 516 | # 517 | # FreeRTOS 518 | # 519 | # CONFIG_FREERTOS_UNICORE is not set 520 | CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF 521 | CONFIG_FREERTOS_CORETIMER_0=y 522 | # CONFIG_FREERTOS_CORETIMER_1 is not set 523 | CONFIG_FREERTOS_HZ=100 524 | CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y 525 | # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set 526 | # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set 527 | CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y 528 | # CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set 529 | CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y 530 | CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 531 | CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y 532 | # CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set 533 | # CONFIG_FREERTOS_ASSERT_DISABLE is not set 534 | CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 535 | CONFIG_FREERTOS_ISR_STACKSIZE=1536 536 | # CONFIG_FREERTOS_LEGACY_HOOKS is not set 537 | CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 538 | CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y 539 | # CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set 540 | CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 541 | CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 542 | CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 543 | CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 544 | # CONFIG_FREERTOS_USE_TRACE_FACILITY is not set 545 | # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set 546 | CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y 547 | CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y 548 | # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set 549 | CONFIG_FREERTOS_DEBUG_OCDAWARE=y 550 | # CONFIG_FREERTOS_FPU_IN_ISR is not set 551 | # end of FreeRTOS 552 | 553 | # 554 | # Heap memory debugging 555 | # 556 | CONFIG_HEAP_POISONING_DISABLED=y 557 | # CONFIG_HEAP_POISONING_LIGHT is not set 558 | # CONFIG_HEAP_POISONING_COMPREHENSIVE is not set 559 | CONFIG_HEAP_TRACING_OFF=y 560 | # CONFIG_HEAP_TRACING_STANDALONE is not set 561 | # CONFIG_HEAP_TRACING_TOHOST is not set 562 | # end of Heap memory debugging 563 | 564 | # 565 | # jsmn 566 | # 567 | # CONFIG_JSMN_PARENT_LINKS is not set 568 | # CONFIG_JSMN_STRICT is not set 569 | # end of jsmn 570 | 571 | # 572 | # libsodium 573 | # 574 | # end of libsodium 575 | 576 | # 577 | # Log output 578 | # 579 | # CONFIG_LOG_DEFAULT_LEVEL_NONE is not set 580 | # CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set 581 | # CONFIG_LOG_DEFAULT_LEVEL_WARN is not set 582 | CONFIG_LOG_DEFAULT_LEVEL_INFO=y 583 | # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set 584 | # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set 585 | CONFIG_LOG_DEFAULT_LEVEL=3 586 | CONFIG_LOG_COLORS=y 587 | CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y 588 | # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set 589 | # end of Log output 590 | 591 | # 592 | # LWIP 593 | # 594 | CONFIG_LWIP_LOCAL_HOSTNAME="espressif" 595 | CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y 596 | # CONFIG_LWIP_L2_TO_L3_COPY is not set 597 | # CONFIG_LWIP_IRAM_OPTIMIZATION is not set 598 | CONFIG_LWIP_TIMERS_ONDEMAND=y 599 | CONFIG_LWIP_MAX_SOCKETS=10 600 | # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set 601 | CONFIG_LWIP_SO_REUSE=y 602 | CONFIG_LWIP_SO_REUSE_RXTOALL=y 603 | # CONFIG_LWIP_SO_RCVBUF is not set 604 | # CONFIG_LWIP_NETBUF_RECVINFO is not set 605 | CONFIG_LWIP_IP_FRAG=y 606 | # CONFIG_LWIP_IP_REASSEMBLY is not set 607 | # CONFIG_LWIP_STATS is not set 608 | # CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set 609 | CONFIG_LWIP_ESP_GRATUITOUS_ARP=y 610 | CONFIG_LWIP_GARP_TMR_INTERVAL=60 611 | CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 612 | CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y 613 | # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set 614 | 615 | # 616 | # DHCP server 617 | # 618 | CONFIG_LWIP_DHCPS_LEASE_UNIT=60 619 | CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 620 | # end of DHCP server 621 | 622 | # CONFIG_LWIP_AUTOIP is not set 623 | # CONFIG_LWIP_IPV6_AUTOCONFIG is not set 624 | CONFIG_LWIP_NETIF_LOOPBACK=y 625 | CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 626 | 627 | # 628 | # TCP 629 | # 630 | CONFIG_LWIP_MAX_ACTIVE_TCP=16 631 | CONFIG_LWIP_MAX_LISTENING_TCP=16 632 | CONFIG_LWIP_TCP_MAXRTX=12 633 | CONFIG_LWIP_TCP_SYNMAXRTX=6 634 | CONFIG_LWIP_TCP_MSS=1440 635 | CONFIG_LWIP_TCP_TMR_INTERVAL=250 636 | CONFIG_LWIP_TCP_MSL=60000 637 | CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 638 | CONFIG_LWIP_TCP_WND_DEFAULT=5744 639 | CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 640 | CONFIG_LWIP_TCP_QUEUE_OOSEQ=y 641 | # CONFIG_LWIP_TCP_SACK_OUT is not set 642 | # CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set 643 | CONFIG_LWIP_TCP_OVERSIZE_MSS=y 644 | # CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set 645 | # CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set 646 | # end of TCP 647 | 648 | # 649 | # UDP 650 | # 651 | CONFIG_LWIP_MAX_UDP_PCBS=16 652 | CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 653 | # end of UDP 654 | 655 | CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 656 | CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 657 | # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set 658 | # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set 659 | CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF 660 | # CONFIG_LWIP_PPP_SUPPORT is not set 661 | 662 | # 663 | # ICMP 664 | # 665 | # CONFIG_LWIP_MULTICAST_PING is not set 666 | # CONFIG_LWIP_BROADCAST_PING is not set 667 | # end of ICMP 668 | 669 | # 670 | # LWIP RAW API 671 | # 672 | CONFIG_LWIP_MAX_RAW_PCBS=16 673 | # end of LWIP RAW API 674 | 675 | # 676 | # SNTP 677 | # 678 | CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 679 | CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 680 | # end of SNTP 681 | 682 | CONFIG_LWIP_ESP_LWIP_ASSERT=y 683 | # end of LWIP 684 | 685 | # 686 | # mbedTLS 687 | # 688 | CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y 689 | # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set 690 | # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set 691 | CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y 692 | CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 693 | CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 694 | # CONFIG_MBEDTLS_DEBUG is not set 695 | 696 | # 697 | # Certificate Bundle 698 | # 699 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y 700 | CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y 701 | # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set 702 | # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set 703 | # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set 704 | # end of Certificate Bundle 705 | 706 | # CONFIG_MBEDTLS_ECP_RESTARTABLE is not set 707 | # CONFIG_MBEDTLS_CMAC_C is not set 708 | CONFIG_MBEDTLS_HARDWARE_AES=y 709 | CONFIG_MBEDTLS_HARDWARE_MPI=y 710 | CONFIG_MBEDTLS_HARDWARE_SHA=y 711 | CONFIG_MBEDTLS_HAVE_TIME=y 712 | # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set 713 | CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y 714 | # CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set 715 | # CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set 716 | # CONFIG_MBEDTLS_TLS_DISABLED is not set 717 | CONFIG_MBEDTLS_TLS_SERVER=y 718 | CONFIG_MBEDTLS_TLS_CLIENT=y 719 | CONFIG_MBEDTLS_TLS_ENABLED=y 720 | 721 | # 722 | # TLS Key Exchange Methods 723 | # 724 | CONFIG_MBEDTLS_PSK_MODES=y 725 | CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y 726 | CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y 727 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y 728 | CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y 729 | CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y 730 | CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y 731 | CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y 732 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y 733 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y 734 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y 735 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y 736 | # end of TLS Key Exchange Methods 737 | 738 | CONFIG_MBEDTLS_SSL_RENEGOTIATION=y 739 | # CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set 740 | CONFIG_MBEDTLS_SSL_PROTO_TLS1=y 741 | CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y 742 | CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y 743 | CONFIG_MBEDTLS_SSL_PROTO_DTLS=y 744 | CONFIG_MBEDTLS_SSL_ALPN=y 745 | CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y 746 | CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y 747 | 748 | # 749 | # Symmetric Ciphers 750 | # 751 | CONFIG_MBEDTLS_AES_C=y 752 | # CONFIG_MBEDTLS_CAMELLIA_C is not set 753 | # CONFIG_MBEDTLS_DES_C is not set 754 | CONFIG_MBEDTLS_RC4_DISABLED=y 755 | # CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set 756 | # CONFIG_MBEDTLS_RC4_ENABLED is not set 757 | # CONFIG_MBEDTLS_BLOWFISH_C is not set 758 | # CONFIG_MBEDTLS_XTEA_C is not set 759 | CONFIG_MBEDTLS_CCM_C=y 760 | CONFIG_MBEDTLS_GCM_C=y 761 | # end of Symmetric Ciphers 762 | 763 | # CONFIG_MBEDTLS_RIPEMD160_C is not set 764 | 765 | # 766 | # Certificates 767 | # 768 | CONFIG_MBEDTLS_PEM_PARSE_C=y 769 | CONFIG_MBEDTLS_PEM_WRITE_C=y 770 | CONFIG_MBEDTLS_X509_CRL_PARSE_C=y 771 | CONFIG_MBEDTLS_X509_CSR_PARSE_C=y 772 | # end of Certificates 773 | 774 | CONFIG_MBEDTLS_ECP_C=y 775 | CONFIG_MBEDTLS_ECDH_C=y 776 | CONFIG_MBEDTLS_ECDSA_C=y 777 | CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y 778 | CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y 779 | CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y 780 | CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y 781 | CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y 782 | CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y 783 | CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y 784 | CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y 785 | CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y 786 | CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y 787 | CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y 788 | CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y 789 | CONFIG_MBEDTLS_ECP_NIST_OPTIM=y 790 | # CONFIG_MBEDTLS_SECURITY_RISKS is not set 791 | # end of mbedTLS 792 | 793 | # 794 | # mDNS 795 | # 796 | CONFIG_MDNS_MAX_SERVICES=10 797 | CONFIG_MDNS_TASK_PRIORITY=1 798 | # CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set 799 | CONFIG_MDNS_TASK_AFFINITY_CPU0=y 800 | # CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set 801 | CONFIG_MDNS_TASK_AFFINITY=0x0 802 | CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000 803 | CONFIG_MDNS_TIMER_PERIOD_MS=100 804 | # end of mDNS 805 | 806 | # 807 | # ESP-MQTT Configurations 808 | # 809 | CONFIG_MQTT_PROTOCOL_311=y 810 | CONFIG_MQTT_TRANSPORT_SSL=y 811 | CONFIG_MQTT_TRANSPORT_WEBSOCKET=y 812 | CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y 813 | # CONFIG_MQTT_USE_CUSTOM_CONFIG is not set 814 | # CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set 815 | # CONFIG_MQTT_CUSTOM_OUTBOX is not set 816 | # end of ESP-MQTT Configurations 817 | 818 | # 819 | # Newlib 820 | # 821 | CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y 822 | # CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set 823 | # CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set 824 | # CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set 825 | # CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set 826 | CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y 827 | # CONFIG_NEWLIB_NANO_FORMAT is not set 828 | # end of Newlib 829 | 830 | # 831 | # NVS 832 | # 833 | # end of NVS 834 | 835 | # 836 | # OpenSSL 837 | # 838 | # CONFIG_OPENSSL_DEBUG is not set 839 | # CONFIG_OPENSSL_ASSERT_DO_NOTHING is not set 840 | CONFIG_OPENSSL_ASSERT_EXIT=y 841 | # end of OpenSSL 842 | 843 | # 844 | # PThreads 845 | # 846 | CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 847 | CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 848 | CONFIG_PTHREAD_STACK_MIN=768 849 | CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y 850 | # CONFIG_PTHREAD_DEFAULT_CORE_0 is not set 851 | # CONFIG_PTHREAD_DEFAULT_CORE_1 is not set 852 | CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 853 | CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" 854 | # end of PThreads 855 | 856 | # 857 | # SPI Flash driver 858 | # 859 | # CONFIG_SPI_FLASH_VERIFY_WRITE is not set 860 | # CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set 861 | CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y 862 | CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y 863 | # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set 864 | # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set 865 | # CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set 866 | 867 | # 868 | # Auto-detect flash chips 869 | # 870 | CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y 871 | CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y 872 | # end of Auto-detect flash chips 873 | # end of SPI Flash driver 874 | 875 | # 876 | # SPIFFS Configuration 877 | # 878 | CONFIG_SPIFFS_MAX_PARTITIONS=3 879 | 880 | # 881 | # SPIFFS Cache Configuration 882 | # 883 | CONFIG_SPIFFS_CACHE=y 884 | CONFIG_SPIFFS_CACHE_WR=y 885 | # CONFIG_SPIFFS_CACHE_STATS is not set 886 | # end of SPIFFS Cache Configuration 887 | 888 | CONFIG_SPIFFS_PAGE_CHECK=y 889 | CONFIG_SPIFFS_GC_MAX_RUNS=10 890 | # CONFIG_SPIFFS_GC_STATS is not set 891 | CONFIG_SPIFFS_PAGE_SIZE=256 892 | CONFIG_SPIFFS_OBJ_NAME_LEN=32 893 | # CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set 894 | CONFIG_SPIFFS_USE_MAGIC=y 895 | CONFIG_SPIFFS_USE_MAGIC_LENGTH=y 896 | CONFIG_SPIFFS_META_LENGTH=4 897 | CONFIG_SPIFFS_USE_MTIME=y 898 | 899 | # 900 | # Debug Configuration 901 | # 902 | # CONFIG_SPIFFS_DBG is not set 903 | # CONFIG_SPIFFS_API_DBG is not set 904 | # CONFIG_SPIFFS_GC_DBG is not set 905 | # CONFIG_SPIFFS_CACHE_DBG is not set 906 | # CONFIG_SPIFFS_CHECK_DBG is not set 907 | # CONFIG_SPIFFS_TEST_VISUALISATION is not set 908 | # end of Debug Configuration 909 | # end of SPIFFS Configuration 910 | 911 | # 912 | # TinyUSB 913 | # 914 | 915 | # 916 | # Descriptor configuration 917 | # 918 | CONFIG_USB_DESC_CUSTOM_VID=0x1234 919 | CONFIG_USB_DESC_CUSTOM_PID=0x5678 920 | # end of Descriptor configuration 921 | # end of TinyUSB 922 | 923 | # 924 | # Unity unit testing library 925 | # 926 | CONFIG_UNITY_ENABLE_FLOAT=y 927 | CONFIG_UNITY_ENABLE_DOUBLE=y 928 | # CONFIG_UNITY_ENABLE_COLOR is not set 929 | CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y 930 | # CONFIG_UNITY_ENABLE_FIXTURE is not set 931 | # CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set 932 | # end of Unity unit testing library 933 | 934 | # 935 | # Virtual file system 936 | # 937 | CONFIG_VFS_SUPPORT_IO=y 938 | CONFIG_VFS_SUPPORT_DIR=y 939 | CONFIG_VFS_SUPPORT_SELECT=y 940 | CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y 941 | CONFIG_VFS_SUPPORT_TERMIOS=y 942 | 943 | # 944 | # Host File System I/O (Semihosting) 945 | # 946 | CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 947 | CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 948 | # end of Host File System I/O (Semihosting) 949 | # end of Virtual file system 950 | 951 | # 952 | # Wear Levelling 953 | # 954 | # CONFIG_WL_SECTOR_SIZE_512 is not set 955 | CONFIG_WL_SECTOR_SIZE_4096=y 956 | CONFIG_WL_SECTOR_SIZE=4096 957 | # end of Wear Levelling 958 | 959 | # 960 | # Wi-Fi Provisioning Manager 961 | # 962 | CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 963 | CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 964 | # end of Wi-Fi Provisioning Manager 965 | 966 | # 967 | # Supplicant 968 | # 969 | CONFIG_WPA_MBEDTLS_CRYPTO=y 970 | # CONFIG_WPA_DEBUG_PRINT is not set 971 | # end of Supplicant 972 | 973 | # 974 | # LoRa Configuration 975 | # 976 | CONFIG_CS_GPIO=18 977 | CONFIG_RST_GPIO=14 978 | CONFIG_MISO_GPIO=19 979 | CONFIG_MOSI_GPIO=27 980 | CONFIG_SCK_GPIO=5 981 | # end of LoRa Configuration 982 | # end of Component config 983 | 984 | # 985 | # Compatibility options 986 | # 987 | # CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set 988 | # end of Compatibility options 989 | 990 | # Deprecated options for backward compatibility 991 | CONFIG_TOOLPREFIX="xtensa-esp32-elf-" 992 | # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set 993 | # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set 994 | # CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set 995 | CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y 996 | # CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set 997 | # CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set 998 | CONFIG_LOG_BOOTLOADER_LEVEL=3 999 | # CONFIG_APP_ROLLBACK_ENABLE is not set 1000 | # CONFIG_FLASH_ENCRYPTION_ENABLED is not set 1001 | # CONFIG_FLASHMODE_QIO is not set 1002 | # CONFIG_FLASHMODE_QOUT is not set 1003 | CONFIG_FLASHMODE_DIO=y 1004 | # CONFIG_FLASHMODE_DOUT is not set 1005 | # CONFIG_MONITOR_BAUD_9600B is not set 1006 | # CONFIG_MONITOR_BAUD_57600B is not set 1007 | CONFIG_MONITOR_BAUD_115200B=y 1008 | # CONFIG_MONITOR_BAUD_230400B is not set 1009 | # CONFIG_MONITOR_BAUD_921600B is not set 1010 | # CONFIG_MONITOR_BAUD_2MB is not set 1011 | # CONFIG_MONITOR_BAUD_OTHER is not set 1012 | CONFIG_MONITOR_BAUD_OTHER_VAL=115200 1013 | CONFIG_MONITOR_BAUD=115200 1014 | CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y 1015 | # CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set 1016 | CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y 1017 | # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set 1018 | # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set 1019 | # CONFIG_CXX_EXCEPTIONS is not set 1020 | CONFIG_STACK_CHECK_NONE=y 1021 | # CONFIG_STACK_CHECK_NORM is not set 1022 | # CONFIG_STACK_CHECK_STRONG is not set 1023 | # CONFIG_STACK_CHECK_ALL is not set 1024 | # CONFIG_WARN_WRITE_STRINGS is not set 1025 | # CONFIG_DISABLE_GCC8_WARNINGS is not set 1026 | # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set 1027 | CONFIG_ESP32_APPTRACE_DEST_NONE=y 1028 | CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y 1029 | CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=0 1030 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=0 1031 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 1032 | CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0 1033 | CONFIG_ADC2_DISABLE_DAC=y 1034 | # CONFIG_SPIRAM_SUPPORT is not set 1035 | CONFIG_TRACEMEM_RESERVE_DRAM=0x0 1036 | # CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set 1037 | CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y 1038 | CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 1039 | # CONFIG_ULP_COPROC_ENABLED is not set 1040 | CONFIG_ULP_COPROC_RESERVE_MEM=0 1041 | CONFIG_BROWNOUT_DET=y 1042 | CONFIG_BROWNOUT_DET_LVL_SEL_0=y 1043 | # CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set 1044 | # CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set 1045 | # CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set 1046 | # CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set 1047 | # CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set 1048 | # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set 1049 | # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set 1050 | CONFIG_BROWNOUT_DET_LVL=0 1051 | CONFIG_REDUCE_PHY_TX_POWER=y 1052 | CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y 1053 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set 1054 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set 1055 | # CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set 1056 | # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set 1057 | # CONFIG_NO_BLOBS is not set 1058 | # CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set 1059 | CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 1060 | CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 1061 | CONFIG_MAIN_TASK_STACK_SIZE=3584 1062 | CONFIG_IPC_TASK_STACK_SIZE=1024 1063 | CONFIG_CONSOLE_UART_DEFAULT=y 1064 | # CONFIG_CONSOLE_UART_CUSTOM is not set 1065 | # CONFIG_CONSOLE_UART_NONE is not set 1066 | CONFIG_CONSOLE_UART_NUM=0 1067 | CONFIG_CONSOLE_UART_TX_GPIO=1 1068 | CONFIG_CONSOLE_UART_RX_GPIO=3 1069 | CONFIG_CONSOLE_UART_BAUDRATE=115200 1070 | CONFIG_INT_WDT=y 1071 | CONFIG_INT_WDT_TIMEOUT_MS=300 1072 | CONFIG_INT_WDT_CHECK_CPU1=y 1073 | CONFIG_TASK_WDT=y 1074 | # CONFIG_TASK_WDT_PANIC is not set 1075 | CONFIG_TASK_WDT_TIMEOUT_S=5 1076 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 1077 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 1078 | # CONFIG_EVENT_LOOP_PROFILING is not set 1079 | CONFIG_POST_EVENTS_FROM_ISR=y 1080 | CONFIG_POST_EVENTS_FROM_IRAM_ISR=y 1081 | # CONFIG_ESP32S2_PANIC_PRINT_HALT is not set 1082 | CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y 1083 | # CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set 1084 | # CONFIG_ESP32S2_PANIC_GDBSTUB is not set 1085 | CONFIG_TIMER_TASK_STACK_SIZE=3584 1086 | CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150 1087 | CONFIG_MB_MASTER_DELAY_MS_CONVERT=200 1088 | CONFIG_MB_QUEUE_LENGTH=20 1089 | CONFIG_MB_SERIAL_TASK_STACK_SIZE=2048 1090 | CONFIG_MB_SERIAL_BUF_SIZE=256 1091 | CONFIG_MB_SERIAL_TASK_PRIO=10 1092 | # CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT is not set 1093 | CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 1094 | CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 1095 | CONFIG_MB_CONTROLLER_STACK_SIZE=4096 1096 | CONFIG_MB_EVENT_QUEUE_TIMEOUT=20 1097 | CONFIG_MB_TIMER_PORT_ENABLED=y 1098 | CONFIG_MB_TIMER_GROUP=0 1099 | CONFIG_MB_TIMER_INDEX=0 1100 | CONFIG_SUPPORT_STATIC_ALLOCATION=y 1101 | # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set 1102 | CONFIG_TIMER_TASK_PRIORITY=1 1103 | CONFIG_TIMER_TASK_STACK_DEPTH=2048 1104 | CONFIG_TIMER_QUEUE_LENGTH=10 1105 | # CONFIG_L2_TO_L3_COPY is not set 1106 | # CONFIG_USE_ONLY_LWIP_SELECT is not set 1107 | CONFIG_ESP_GRATUITOUS_ARP=y 1108 | CONFIG_GARP_TMR_INTERVAL=60 1109 | CONFIG_TCPIP_RECVMBOX_SIZE=32 1110 | CONFIG_TCP_MAXRTX=12 1111 | CONFIG_TCP_SYNMAXRTX=6 1112 | CONFIG_TCP_MSS=1440 1113 | CONFIG_TCP_MSL=60000 1114 | CONFIG_TCP_SND_BUF_DEFAULT=5744 1115 | CONFIG_TCP_WND_DEFAULT=5744 1116 | CONFIG_TCP_RECVMBOX_SIZE=6 1117 | CONFIG_TCP_QUEUE_OOSEQ=y 1118 | # CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set 1119 | CONFIG_TCP_OVERSIZE_MSS=y 1120 | # CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set 1121 | # CONFIG_TCP_OVERSIZE_DISABLE is not set 1122 | CONFIG_UDP_RECVMBOX_SIZE=6 1123 | CONFIG_TCPIP_TASK_STACK_SIZE=3072 1124 | CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 1125 | # CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set 1126 | # CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set 1127 | CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF 1128 | # CONFIG_PPP_SUPPORT is not set 1129 | CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 1130 | CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 1131 | CONFIG_ESP32_PTHREAD_STACK_MIN=768 1132 | CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y 1133 | # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set 1134 | # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set 1135 | CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 1136 | CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" 1137 | CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y 1138 | # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set 1139 | # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set 1140 | CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y 1141 | CONFIG_SUPPORT_TERMIOS=y 1142 | # End of deprecated options 1143 | --------------------------------------------------------------------------------