├── Cpu.dig ├── Cpu.svg ├── README.md ├── alu ├── ALUOpDiodeMatrix.hex ├── adder.dig ├── adder.svg ├── alu.dig ├── alu.svg ├── diode-matrix-readme.txt ├── flags.dig ├── flags.svg ├── logic.dig ├── logic.svg ├── shift.dig ├── shift.svg ├── universal-logic-8bit.dig └── universal-logic-8bit.svg ├── mainbus ├── 62256.dig ├── buscontrol.dig ├── buscontrol.svg ├── clock_reset.dig ├── clock_reset.svg ├── mainbus.dig ├── mainbus.svg ├── memory.dig ├── memory.svg ├── program-memory.dig ├── program-memory.hex ├── reg-16bit-updownload.dig ├── reg-16bit-updownload.svg ├── reg-16bit-xfer.dig ├── reg-16bit-xfer.svg ├── reg-8bit-generalpurpose.dig ├── reg-8bit-generalpurpose.svg ├── reg-constant.dig └── reg-constant.svg ├── pipeline ├── pipeline-stage0.dig ├── pipeline-stage0.svg ├── pipeline-stage1-rom1.dig ├── pipeline-stage1-rom1.hex ├── pipeline-stage1-rom2.dig ├── pipeline-stage1-rom2.hex ├── pipeline-stage1.dig ├── pipeline-stage1.svg ├── pipeline-stage2-rom1.dig ├── pipeline-stage2-rom1.hex ├── pipeline-stage2-rom2.dig ├── pipeline-stage2-rom2.hex ├── pipeline-stage2.dig ├── pipeline-stage2.svg └── pipeline.dig └── tests ├── test0-annotated.svg ├── test0.csv └── test0.svg /README.md: -------------------------------------------------------------------------------- 1 | # 8-bit Pipelined CPU Simulated (James Sharman's design) 2 | This project is a Logic Simulation of [James Sharman's 8-bit Pipelined CPU](https://www.youtube.com/watch?v=3iHag4k4yEg&list=PLFhc0MFC8MiCDOh3cGFji3qQfXziB9yOw) built with [Digital](https://github.com/hneemann/Digital). 3 | 4 | This project (once complete) will allow for complete simulation of the CPU (and some peripherals). 5 | 6 | ## Motivation 7 | 8 | There are two major techniques for being able to simulate a CPU on a desktop computer. 9 | 10 | The first way is to write software to implement all the instructions, and to build a simulator that parses the assembly and executes those instructions. This technique is very straightforward, and allows for very fast simulation of a program. It's a great way to test your programs before having to run them on actual hardware, giving you a much faster "developer feedback loop" (the loop that defines the time between writing code and seeing the results of that code). It's also excellent in that you can simulate in near realtime. 11 | 12 | The downside of this technique is that it takes the hardware aspect out of the picture, and while it provides a small amount of value to helping you design the CPU--that value is very limited. Every time you add hardware or instructions to the CPU, you have to implement software versions of those new instructions, and those two tasks are very duplicative. Sometimes you'll implement some instruction in software first, thinking it will be easy in hardware, only to find out it wasn't, and you have to rethink the whole design--after you've already become attached to having that new instruction. Similarly, this technique provides some value as a learning tool for people to play with the architecture without having to build the hardware, but the experience is very limited. The person using it never gets to experience *why* an instruction is implemented, or why it's implemented in a particularly way. Because there's no interaction with the hardware, it really just ends up feeling like a less efficient way of writing code. 13 | 14 | The other way to simulate a CPU is to re-implement the building blocks of the CPU in software, then build a simulation of the CPU using those building blocks--matched 1:1 with the actual hardware of the CPU. This is a lot more work and generally isn't as fast, but it provides a much richer experience to the user. This is the technique that this project uses. This project would never have been possible without the hard work of the [Digital](https://github.com/hneemann/Digital) project, providing a framework and implementation of most of the building blocks of the CPU, and obviously without the hard work of [James Sharman](https://www.youtube.com/c/weirdboyjim/)'s [8-bit Pipelined CPU](https://www.youtube.com/watch?v=3iHag4k4yEg&list=PLFhc0MFC8MiCDOh3cGFji3qQfXziB9yOw) design. 15 | 16 | One advantage of this technique is that you can run pieces of the CPU build in isolation and interact with their inputs manually, seeing how their outputs behave. Another advantage is that you can write extensive test cases for each of those modules, so that you're relatively confident in the concepts of your design and how they behave under a variety of scenarios--that of course is no guarantee that the hardware will behave exactly the same, but it will at least narrow your problems down to a hardware vs conceptual design issue. Additionally, it allows you to experiement with those circuits, trying different "hardware" implementations to see how it would behave before building it out on a breadboard. This, to me, is the real value of this project. The time commitment and cost of building the entire CPU in hardware is prohibitive for many, and my aim is to reduce that barrier to entry and allow more people to learn from the great work that went into this CPU design and build. 17 | 18 | Additionally, selfishly, I plan on building this CPU's conceptual design in hardware, but with my own hardware designs for some of the modules--and ultimately, I'd like to experiment with different microcode and my own assembler and compiler, potentially building a pipelined "z80" or pipelined "6502" processor, where the instructions match those architectures, but the implementation of the hardware is different. 19 | 20 | # Work In Progress 21 | 22 | I've just started building this, so I haven't built everything yet, and I haven't fully tested everything that's here. 23 | 24 | You can find the .dig files (use [Digital](https://github.com/hneemann/Digital) to open them) in the respective directories for each major component section of the CPU. 25 | 26 | Right now, I'm generally leaning toward using modules for any ICs that are more complex than single gates--and staying true to the IC choices used in the build, with exception to simple gates. I'll likely fork this for my own build, where I'll likely choose differeng ICs, simply because it's what I have on hand, or personal preference, but I'll try to keep this repository matched with the official build. 27 | 28 | # Contribution 29 | 30 | I very much welcome contributions and forks of this project! If you'd like to help with the primary build, please reach out to me. If you'd like to fork it and use it to implement something different, feel free! 31 | 32 | # Tests 33 | ## First mostly-successful run!!! 34 | ![Test](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/tests/test0-annotated.svg) 35 | 36 | 37 | # Main CPU 38 | ## CPU 39 | ![CPU](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/Cpu.svg) 40 | 41 | # Pipeline 42 | 43 | ## Stage 0 - Fetch 44 | ![Stage 0](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/pipeline/pipeline-stage0.svg) 45 | 46 | ## Stage 1 47 | ![Stage 1](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/pipeline/pipeline-stage1.svg) 48 | 49 | 50 | ## Stage 2 51 | ![Stage 2](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/pipeline/pipeline-stage2.svg) 52 | 53 | # ALU 54 | 55 | ## LHS (Shift Unit) 56 | ![Shift](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/alu/shift.svg) 57 | 58 | ## Adder 59 | ![Adder](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/alu/adder.svg) 60 | 61 | ## Flags 62 | ![Flags](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/alu/flags.svg) 63 | 64 | # Core 65 | 66 | ## Bus Control 67 | ![Bus Control](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/mainbus/buscontrol.svg) 68 | 69 | ## 8-bit General Purpose Register 70 | ![8-bit GPR](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/mainbus/reg-8bit-generalpurpose.svg) 71 | 72 | ## 16-bit Up/Down/Load Register (PCRA0, PCRA1, SP, SI, DI) 73 | ![16-bit Up/Down/Load](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/mainbus/reg-16bit-updownload.svg) 74 | 75 | ## Constant Register 76 | ![Constant Register](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/mainbus/reg-constant.svg) 77 | 78 | ## Transfer Register 79 | ![Transfer Register](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/mainbus/reg-16bit-xfer.svg) 80 | 81 | ## Memory 82 | ![Memory](https://raw.githubusercontent.com/jamon/jamessharman-8bit-cpu-sim/main/mainbus/memory.svg) 83 | 84 | -------------------------------------------------------------------------------- /alu/ALUOpDiodeMatrix.hex: -------------------------------------------------------------------------------- 1 | v2.0 raw 2 | 0 3 | 10 4 | 20 5 | c 6 | 4c 7 | 80 8 | 40 9 | 83 10 | 43 11 | f 12 | 38 13 | 3e 14 | 36 15 | 33 16 | -------------------------------------------------------------------------------- /alu/alu.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | Width 7 | 15 8 | 9 | 10 | 11 | 12 | adder.dig 13 | 14 | 15 | 16 | 17 | shift.dig 18 | 19 | 20 | 21 | 22 | In 23 | 24 | 25 | Label 26 | CarrySelectB 27 | 28 | 29 | 30 | 31 | 32 | In 33 | 34 | 35 | Label 36 | CarrySelectA 37 | 38 | 39 | 40 | 41 | 42 | In 43 | 44 | 45 | Label 46 | LHSIn 47 | 48 | 49 | Bits 50 | 8 51 | 52 | 53 | intFormat 54 | dec 55 | 56 | 57 | 58 | 59 | 60 | Out 61 | 62 | 63 | Label 64 | ArithCarryFlag 65 | 66 | 67 | 68 | 69 | 70 | Out 71 | 72 | 73 | Label 74 | AdderOut 75 | 76 | 77 | Bits 78 | 8 79 | 80 | 81 | intFormat 82 | dec 83 | 84 | 85 | 86 | 87 | 88 | In 89 | 90 | 91 | Label 92 | RHSIn 93 | 94 | 95 | Bits 96 | 8 97 | 98 | 99 | intFormat 100 | dec 101 | 102 | 103 | 104 | 105 | 106 | Clock 107 | 108 | 109 | Label 110 | ClockIn 111 | 112 | 113 | 114 | 115 | 116 | flags.dig 117 | 118 | 119 | 120 | 121 | Tunnel 122 | 123 | 124 | NetName 125 | ArithCarryFlag 126 | 127 | 128 | 129 | 130 | 131 | Tunnel 132 | 133 | 134 | NetName 135 | ZeroFlag 136 | 137 | 138 | 139 | 140 | 141 | Tunnel 142 | 143 | 144 | NetName 145 | ClockIn 146 | 147 | 148 | 149 | 150 | 151 | Tunnel 152 | 153 | 154 | rotation 155 | 156 | 157 | 158 | NetName 159 | LogicCarryFlag 160 | 161 | 162 | 163 | 164 | 165 | Tunnel 166 | 167 | 168 | NetName 169 | LogicCarry 170 | 171 | 172 | 173 | 174 | 175 | Tunnel 176 | 177 | 178 | NetName 179 | LHSOut 180 | 181 | 182 | 183 | 184 | 185 | Tunnel 186 | 187 | 188 | rotation 189 | 190 | 191 | 192 | NetName 193 | LHS 194 | 195 | 196 | 197 | 198 | 199 | Tunnel 200 | 201 | 202 | rotation 203 | 204 | 205 | 206 | NetName 207 | ShiftSelectB 208 | 209 | 210 | 211 | 212 | 213 | Tunnel 214 | 215 | 216 | rotation 217 | 218 | 219 | 220 | NetName 221 | ShiftSelectA 222 | 223 | 224 | 225 | 226 | 227 | Tunnel 228 | 229 | 230 | rotation 231 | 232 | 233 | 234 | NetName 235 | ClockIn 236 | 237 | 238 | 239 | 240 | 241 | Tunnel 242 | 243 | 244 | NetName 245 | LogicCarryFlag 246 | 247 | 248 | 249 | 250 | 251 | Tunnel 252 | 253 | 254 | rotation 255 | 256 | 257 | 258 | NetName 259 | ClockIn 260 | 261 | 262 | 263 | 264 | 265 | Tunnel 266 | 267 | 268 | rotation 269 | 270 | 271 | 272 | NetName 273 | LogicCarry 274 | 275 | 276 | 277 | 278 | 279 | Tunnel 280 | 281 | 282 | rotation 283 | 284 | 285 | 286 | NetName 287 | ArithCarry 288 | 289 | 290 | 291 | 292 | 293 | Tunnel 294 | 295 | 296 | NetName 297 | ArithCarry 298 | 299 | 300 | 301 | 302 | 303 | Tunnel 304 | 305 | 306 | NetName 307 | Data 308 | 309 | 310 | 311 | 312 | 313 | Tunnel 314 | 315 | 316 | rotation 317 | 318 | 319 | 320 | NetName 321 | Data 322 | 323 | 324 | 325 | 326 | 327 | Tunnel 328 | 329 | 330 | rotation 331 | 332 | 333 | 334 | NetName 335 | ArithCarryFlag 336 | 337 | 338 | 339 | 340 | 341 | Tunnel 342 | 343 | 344 | rotation 345 | 346 | 347 | 348 | NetName 349 | LHSOut 350 | 351 | 352 | 353 | 354 | 355 | Tunnel 356 | 357 | 358 | rotation 359 | 360 | 361 | 362 | NetName 363 | Data 364 | 365 | 366 | 367 | 368 | 369 | Out 370 | 371 | 372 | Label 373 | LogicCarryFlag 374 | 375 | 376 | 377 | 378 | 379 | Out 380 | 381 | 382 | Label 383 | ZeroFlag 384 | 385 | 386 | 387 | 388 | 389 | Tunnel 390 | 391 | 392 | rotation 393 | 394 | 395 | 396 | NetName 397 | ArithCarryFlag 398 | 399 | 400 | 401 | 402 | 403 | Tunnel 404 | 405 | 406 | rotation 407 | 408 | 409 | 410 | NetName 411 | ZeroFlag 412 | 413 | 414 | 415 | 416 | 417 | Tunnel 418 | 419 | 420 | rotation 421 | 422 | 423 | 424 | NetName 425 | LogicCarryFlag 426 | 427 | 428 | 429 | 430 | 431 | In 432 | 433 | 434 | Label 435 | ShiftSelectB 436 | 437 | 438 | 439 | 440 | 441 | In 442 | 443 | 444 | Label 445 | ShiftSelectA 446 | 447 | 448 | 449 | 450 | 451 | Tunnel 452 | 453 | 454 | NetName 455 | ShiftSelectB 456 | 457 | 458 | 459 | 460 | 461 | Tunnel 462 | 463 | 464 | NetName 465 | ShiftSelectA 466 | 467 | 468 | 469 | 470 | 471 | Tunnel 472 | 473 | 474 | NetName 475 | CarrySelectB 476 | 477 | 478 | 479 | 480 | 481 | Tunnel 482 | 483 | 484 | NetName 485 | CarrySelectA 486 | 487 | 488 | 489 | 490 | 491 | Tunnel 492 | 493 | 494 | rotation 495 | 496 | 497 | 498 | NetName 499 | CarrySelectB 500 | 501 | 502 | 503 | 504 | 505 | Tunnel 506 | 507 | 508 | rotation 509 | 510 | 511 | 512 | NetName 513 | CarrySelectA 514 | 515 | 516 | 517 | 518 | 519 | Tunnel 520 | 521 | 522 | NetName 523 | RHS 524 | 525 | 526 | 527 | 528 | 529 | Tunnel 530 | 531 | 532 | NetName 533 | LHS 534 | 535 | 536 | 537 | 538 | 539 | Tunnel 540 | 541 | 542 | rotation 543 | 544 | 545 | 546 | NetName 547 | RHS 548 | 549 | 550 | 551 | 552 | 553 | Tunnel 554 | 555 | 556 | NetName 557 | SignFlag 558 | 559 | 560 | 561 | 562 | 563 | Tunnel 564 | 565 | 566 | NetName 567 | OverflowFlag 568 | 569 | 570 | 571 | 572 | 573 | Out 574 | 575 | 576 | Label 577 | SignFlag 578 | 579 | 580 | 581 | 582 | 583 | Out 584 | 585 | 586 | Label 587 | OverflowFlag 588 | 589 | 590 | 591 | 592 | 593 | Tunnel 594 | 595 | 596 | rotation 597 | 598 | 599 | 600 | NetName 601 | OverflowFlag 602 | 603 | 604 | 605 | 606 | 607 | Tunnel 608 | 609 | 610 | rotation 611 | 612 | 613 | 614 | NetName 615 | SignFlag 616 | 617 | 618 | 619 | 620 | 621 | Tunnel 622 | 623 | 624 | rotation 625 | 626 | 627 | 628 | NetName 629 | RHS 630 | 631 | 632 | 633 | 634 | 635 | Tunnel 636 | 637 | 638 | rotation 639 | 640 | 641 | 642 | NetName 643 | LHS 644 | 645 | 646 | 647 | 648 | 649 | 650 | 651 | 652 | 653 | 654 | 655 | 656 | 657 | 658 | 659 | 660 | 661 | 662 | 663 | 664 | 665 | 666 | 667 | 668 | 669 | 670 | 671 | 672 | 673 | 674 | 675 | 676 | 677 | 678 | 679 | 680 | 681 | 682 | 683 | 684 | 685 | 686 | 687 | 688 | 689 | 690 | 691 | 692 | 693 | 694 | 695 | 696 | 697 | 698 | 699 | 700 | 701 | 702 | 703 | 704 | 705 | 706 | 707 | 708 | 709 | 710 | 711 | 712 | 713 | 714 | 715 | 716 | 717 | 718 | 719 | 720 | 721 | 722 | 723 | 724 | 725 | 726 | 727 | 728 | 729 | 730 | 731 | 732 | 733 | 734 | 735 | 736 | 737 | 738 | 739 | 740 | 741 | 742 | 743 | 744 | 745 | 746 | 747 | 748 | 749 | 750 | 751 | 752 | 753 | 754 | 755 | 756 | 757 | 758 | 759 | 760 | 761 | 762 | 763 | 764 | 765 | 766 | 767 | 768 | 769 | 770 | 771 | 772 | 773 | 774 | 775 | 776 | 777 | 778 | 779 | 780 | 781 | 782 | 783 | 784 | 785 | 786 | 787 | 788 | 789 | 790 | 791 | 792 | 793 | 794 | 795 | 796 | 797 | 798 | 799 | 800 | 801 | 802 | 803 | 804 | -------------------------------------------------------------------------------- /alu/alu.svg: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | ClockIn 55 | CarryFlag 56 | LHS 57 | RHS 58 | CarrySelectA 59 | CarrySelectB 60 | CarryOut 61 | AdderOut 62 | Adder 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | 73 | 74 | 75 | SelectA 76 | SelectB 77 | LHSIn 78 | CarryIn 79 | CarryOut 80 | LHSOut 81 | shift 82 | 83 | 84 | 85 | 86 | 87 | 88 | 89 | 90 | 91 | 92 | CarrySelectB 93 | 94 | 95 | 96 | 97 | 98 | CarrySelectA 99 | 100 | 101 | 102 | 103 | 104 | LHSIn 105 | 106 | 107 | 108 | 109 | 110 | ArithCarryFlag 111 | 112 | 113 | 114 | 115 | 116 | AdderOut 117 | 118 | 119 | 120 | 121 | 122 | RHSIn 123 | 124 | 125 | 126 | 127 | ClockIn 128 | 129 | 130 | 131 | 132 | 133 | 134 | 135 | ClockIn 136 | ArithCarryIn 137 | DataIn 138 | LogicCarryIn 139 | LHS 140 | RHS 141 | ArithCarryFlag 142 | ZeroFlag 143 | LogicCarryFlag 144 | SignFlag 145 | OverflowFlag 146 | Flags 147 | 148 | 149 | 150 | 151 | 152 | 153 | 154 | 155 | 156 | 157 | 158 | 159 | 160 | 161 | ArithCarryFlag 162 | 163 | 164 | 165 | 166 | ZeroFlag 167 | 168 | 169 | 170 | 171 | ClockIn 172 | 173 | 174 | 175 | 176 | LogicCarryFlag 177 | 178 | 179 | 180 | 181 | LogicCarry 182 | 183 | 184 | 185 | 186 | LHSOut 187 | 188 | 189 | 190 | 191 | LHS 192 | 193 | 194 | 195 | 196 | ShiftSelectB 197 | 198 | 199 | 200 | 201 | ShiftSelectA 202 | 203 | 204 | 205 | 206 | ClockIn 207 | 208 | 209 | 210 | 211 | LogicCarryFlag 212 | 213 | 214 | 215 | 216 | ClockIn 217 | 218 | 219 | 220 | 221 | LogicCarry 222 | 223 | 224 | 225 | 226 | ArithCarry 227 | 228 | 229 | 230 | 231 | ArithCarry 232 | 233 | 234 | 235 | 236 | Data 237 | 238 | 239 | 240 | 241 | Data 242 | 243 | 244 | 245 | 246 | ArithCarryFlag 247 | 248 | 249 | 250 | 251 | LHSOut 252 | 253 | 254 | 255 | 256 | Data 257 | 258 | 259 | 260 | 261 | 262 | LogicCarryFlag 263 | 264 | 265 | 266 | 267 | 268 | ZeroFlag 269 | 270 | 271 | 272 | 273 | ArithCarryFlag 274 | 275 | 276 | 277 | 278 | ZeroFlag 279 | 280 | 281 | 282 | 283 | LogicCarryFlag 284 | 285 | 286 | 287 | 288 | 289 | ShiftSelectB 290 | 291 | 292 | 293 | 294 | 295 | ShiftSelectA 296 | 297 | 298 | 299 | 300 | ShiftSelectB 301 | 302 | 303 | 304 | 305 | ShiftSelectA 306 | 307 | 308 | 309 | 310 | CarrySelectB 311 | 312 | 313 | 314 | 315 | CarrySelectA 316 | 317 | 318 | 319 | 320 | CarrySelectB 321 | 322 | 323 | 324 | 325 | CarrySelectA 326 | 327 | 328 | 329 | 330 | RHS 331 | 332 | 333 | 334 | 335 | LHS 336 | 337 | 338 | 339 | 340 | RHS 341 | 342 | 343 | 344 | 345 | SignFlag 346 | 347 | 348 | 349 | 350 | OverflowFlag 351 | 352 | 353 | 354 | 355 | 356 | SignFlag 357 | 358 | 359 | 360 | 361 | 362 | OverflowFlag 363 | 364 | 365 | 366 | 367 | OverflowFlag 368 | 369 | 370 | 371 | 372 | SignFlag 373 | 374 | 375 | 376 | -------------------------------------------------------------------------------- /alu/diode-matrix-readme.txt: -------------------------------------------------------------------------------- 1 | ; Carry Select 2 | Zero 00 3 | Previous Carry 01 4 | One 10 5 | Zero 11 6 | 7 | ; LHS Select 8 | Unchanged 00 9 | Shift Left 01 10 | Shift Right 10 11 | Zero 11 12 | 13 | ; RHS Select 14 | RHS 1100 15 | ~RHS 0011 16 | Zero 0000 17 | 255 1111 18 | LHS·RHS (AND) 1000 19 | LHS+RHS (OR ) 1110 20 | LHS⊕RHS (XOR) 0110 21 | 22 | 23 | 24 | 25 | L R 26 | C H H 27 | S S S Carry LHS RHS 28 | 0 noop 0000 0000 0 0 0 29 | 1 shift left 0001 0000 0 << 0 30 | 2 shift right 0010 0000 0 >> 0 31 | 3 add 0000 1100 0 LHS RHS 32 | 4 addc 0100 1100 Previous LHS RHS 33 | 5 inc 1000 0000 1 LHS 0 34 | 6 incc 0100 0000 Previous, LHS 0 35 | 7 sub 1000 0011 1 LHS ~RHS 36 | 8 subb 0100 0011 Previous LHS ~RHS 37 | 9 dec 0000 1111 0 LHS 255 38 | a and 0011 1000 0 0 LHS·RHS (AND) 39 | b or 0011 1110 0 0 LHS+RHS (OR ) 40 | c xor 0011 0110 0 0 LHS⊕RHS (XOR) 41 | d not 0011 0011 0 0 ~RHS 42 | e clear carry 0011 0000 0 0 0 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | ~OE LogicSelect B A Y 54 | # output enable test 55 | 1 0x0 0 0 z 56 | 57 | # always LOW 58 | 0 0x0 0b11001100 0b10101010 0b00000000 59 | # nor 60 | 0 0x1 0b11001100 0b10101010 0b00010001 61 | # A !B 62 | 0 0x2 0b11001100 0b10101010 0b00100010 63 | # !B Pass 64 | 0 0x3 0b11001100 0b10101010 0b00110011 65 | # !A B 66 | 0 0x4 0b11001100 0b10101010 0b01000100 67 | # !A Pass 68 | 0 0x5 0b11001100 0b10101010 0b01010101 69 | # XOR 70 | 0 0x6 0b11001100 0b10101010 0b01100110 71 | # NAND 72 | 0 0x7 0b11001100 0b10101010 0b01110111 73 | # AND 74 | 0 0x8 0b11001100 0b10101010 0b10001000 75 | # XNOR 76 | 0 0x9 0b11001100 0b10101010 0b10011001 77 | # A Pass 78 | 0 0xa 0b11001100 0b10101010 0b10101010 79 | # !B+A 80 | 0 0xb 0b11001100 0b10101010 0b10111011 81 | # B Pass 82 | 0 0xc 0b11001100 0b10101010 0b11001100 83 | # B+!A 84 | 0 0xd 0b11001100 0b10101010 0b11011101 85 | # OR 86 | 0 0xe 0b11001100 0b10101010 0b11101110 87 | # always HIGH 88 | 0 0xf 0b11001100 0b10101010 0b11111111 89 | -------------------------------------------------------------------------------- /alu/logic.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | backgroundColor 7 | 8 | 204 9 | 255 10 | 204 11 | 255 12 | 13 | 14 | 15 | Width 16 | 10 17 | 18 | 19 | 20 | 21 | Clock 22 | 23 | 24 | Label 25 | Clock 26 | 27 | 28 | 29 | 30 | 31 | Out 32 | 33 | 34 | Label 35 | RHSOut 36 | 37 | 38 | Bits 39 | 8 40 | 41 | 42 | 43 | 44 | 45 | In 46 | 47 | 48 | Label 49 | LogicSelect 50 | 51 | 52 | Bits 53 | 4 54 | 55 | 56 | 57 | 58 | 59 | universal-logic-8bit.dig 60 | 61 | 62 | 63 | 64 | 74574.dig 65 | 66 | 67 | 68 | 69 | Ground 70 | 71 | 72 | 73 | 74 | VDD 75 | 76 | 77 | 78 | 79 | Splitter 80 | 81 | 82 | mirror 83 | true 84 | 85 | 86 | splitterSpreading 87 | 2 88 | 89 | 90 | Input Splitting 91 | 8 92 | 93 | 94 | Output Splitting 95 | 1,1,1,1,1,1,1,1 96 | 97 | 98 | 99 | 100 | 101 | Splitter 102 | 103 | 104 | mirror 105 | true 106 | 107 | 108 | splitterSpreading 109 | 2 110 | 111 | 112 | Input Splitting 113 | 1,1,1,1,1,1,1,1 114 | 115 | 116 | 117 | 118 | 119 | Ground 120 | 121 | 122 | 123 | 124 | Tunnel 125 | 126 | 127 | NetName 128 | LogicSelect 129 | 130 | 131 | 132 | 133 | 134 | Tunnel 135 | 136 | 137 | NetName 138 | LHS 139 | 140 | 141 | 142 | 143 | 144 | Tunnel 145 | 146 | 147 | NetName 148 | RHS 149 | 150 | 151 | 152 | 153 | 154 | Tunnel 155 | 156 | 157 | rotation 158 | 159 | 160 | 161 | NetName 162 | RHS 163 | 164 | 165 | 166 | 167 | 168 | Tunnel 169 | 170 | 171 | rotation 172 | 173 | 174 | 175 | NetName 176 | LHS 177 | 178 | 179 | 180 | 181 | 182 | Tunnel 183 | 184 | 185 | rotation 186 | 187 | 188 | 189 | NetName 190 | LogicSelect 191 | 192 | 193 | 194 | 195 | 196 | Tunnel 197 | 198 | 199 | rotation 200 | 201 | 202 | 203 | NetName 204 | RHSOut 205 | 206 | 207 | 208 | 209 | 210 | Tunnel 211 | 212 | 213 | NetName 214 | RHSOut 215 | 216 | 217 | 218 | 219 | 220 | In 221 | 222 | 223 | Label 224 | RHS 225 | 226 | 227 | Bits 228 | 8 229 | 230 | 231 | 232 | 233 | 234 | Tunnel 235 | 236 | 237 | NetName 238 | Clock 239 | 240 | 241 | 242 | 243 | 244 | Tunnel 245 | 246 | 247 | NetName 248 | Clock 249 | 250 | 251 | 252 | 253 | 254 | In 255 | 256 | 257 | Label 258 | LHS 259 | 260 | 261 | Bits 262 | 8 263 | 264 | 265 | 266 | 267 | 268 | 269 | 270 | 271 | 272 | 273 | 274 | 275 | 276 | 277 | 278 | 279 | 280 | 281 | 282 | 283 | 284 | 285 | 286 | 287 | 288 | 289 | 290 | 291 | 292 | 293 | 294 | 295 | 296 | 297 | 298 | 299 | 300 | 301 | 302 | 303 | 304 | 305 | 306 | 307 | 308 | 309 | 310 | 311 | 312 | 313 | 314 | 315 | 316 | 317 | 318 | 319 | 320 | 321 | 322 | 323 | 324 | 325 | 326 | 327 | 328 | 329 | 330 | 331 | 332 | 333 | 334 | 335 | 336 | 337 | 338 | 339 | 340 | 341 | 342 | 343 | 344 | 345 | 346 | 347 | 348 | 349 | 350 | 351 | 352 | 353 | 354 | 355 | 356 | 357 | 358 | 359 | 360 | 361 | 362 | 363 | 364 | 365 | 366 | 367 | 368 | 369 | 370 | 371 | 372 | 373 | 374 | 375 | 376 | 377 | 378 | 379 | 380 | 381 | 382 | 383 | 384 | 385 | 386 | 387 | 388 | 389 | 390 | 391 | 392 | 393 | 394 | 395 | 396 | 397 | 398 | 399 | 400 | 401 | 402 | 403 | 404 | 405 | 406 | 407 | 408 | 409 | 410 | 411 | -------------------------------------------------------------------------------- /alu/logic.svg: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | Clock 68 | 69 | 70 | 71 | 72 | 73 | 74 | RHSOut 75 | 76 | 77 | 78 | 79 | 80 | LogicSelect 81 | 82 | 83 | 84 | 85 | 86 | OE 87 | LogicSelect 88 | B 89 | A 90 | Y 91 | universal-logic-8bit 92 | 93 | 94 | 95 | 96 | 97 | 98 | 99 | 100 | OC 101 | 102 | VCC 103 | 104 | D0 105 | 106 | Q0 107 | 108 | D1 109 | 110 | Q1 111 | 112 | D2 113 | 114 | Q2 115 | 116 | D3 117 | 118 | Q3 119 | 120 | D4 121 | 122 | Q4 123 | 124 | D5 125 | 126 | Q5 127 | 128 | D6 129 | 130 | Q6 131 | 132 | D7 133 | 134 | Q7 135 | 136 | GND 137 | 138 | CLK 139 | 140 | 74574 141 | 142 | 143 | 144 | 145 | 146 | 147 | 148 | 149 | 150 | 151 | 152 | 153 | 154 | 155 | 156 | 157 | 158 | 159 | 160 | 161 | 162 | 163 | 164 | 165 | 166 | 167 | 168 | 169 | 170 | 0-7 171 | 0 172 | 1 173 | 2 174 | 3 175 | 4 176 | 5 177 | 6 178 | 7 179 | 180 | 181 | 182 | 183 | 184 | 185 | 186 | 187 | 188 | 189 | 190 | 191 | 0 192 | 1 193 | 2 194 | 3 195 | 4 196 | 5 197 | 6 198 | 7 199 | 0-7 200 | 201 | 202 | 203 | 204 | 205 | 206 | 207 | 208 | 209 | 210 | 211 | 212 | 213 | 214 | 215 | 216 | LogicSelect 217 | 218 | 219 | 220 | 221 | LHS 222 | 223 | 224 | 225 | 226 | RHS 227 | 228 | 229 | 230 | 231 | RHS 232 | 233 | 234 | 235 | 236 | LHS 237 | 238 | 239 | 240 | 241 | LogicSelect 242 | 243 | 244 | 245 | 246 | RHSOut 247 | 248 | 249 | 250 | 251 | RHSOut 252 | 253 | 254 | 255 | 256 | 257 | RHS 258 | 259 | 260 | 261 | 262 | Clock 263 | 264 | 265 | 266 | 267 | Clock 268 | 269 | 270 | 271 | 272 | 273 | LHS 274 | 275 | 276 | 277 | -------------------------------------------------------------------------------- /mainbus/62256.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | shapeType 7 | DIL 8 | 9 | 10 | pinCount 11 | 28 12 | 13 | 14 | Width 15 | 11 16 | 17 | 18 | 19 | 20 | In 21 | 22 | 23 | Label 24 | ~CE 25 | 26 | 27 | pinNumber 28 | 20 29 | 30 | 31 | InDefault 32 | 33 | 34 | 35 | 36 | 37 | 38 | In 39 | 40 | 41 | Label 42 | ~OE 43 | 44 | 45 | pinNumber 46 | 22 47 | 48 | 49 | InDefault 50 | 51 | 52 | 53 | 54 | 55 | 56 | In 57 | 58 | 59 | Label 60 | ~WE 61 | 62 | 63 | pinNumber 64 | 27 65 | 66 | 67 | InDefault 68 | 69 | 70 | 71 | 72 | 73 | 74 | PowerSupply 75 | 76 | 77 | 78 | 79 | In 80 | 81 | 82 | Label 83 | VCC 84 | 85 | 86 | pinNumber 87 | 28 88 | 89 | 90 | InDefault 91 | 92 | 93 | 94 | 95 | 96 | 97 | In 98 | 99 | 100 | Label 101 | GND 102 | 103 | 104 | pinNumber 105 | 14 106 | 107 | 108 | 109 | 110 | 111 | In 112 | 113 | 114 | rotation 115 | 116 | 117 | 118 | Label 119 | I/O0 120 | 121 | 122 | pinNumber 123 | 11 124 | 125 | 126 | InDefault 127 | 128 | 129 | 130 | isHighZ 131 | true 132 | 133 | 134 | 135 | 136 | 137 | In 138 | 139 | 140 | rotation 141 | 142 | 143 | 144 | Label 145 | I/O1 146 | 147 | 148 | pinNumber 149 | 12 150 | 151 | 152 | InDefault 153 | 154 | 155 | 156 | isHighZ 157 | true 158 | 159 | 160 | 161 | 162 | 163 | In 164 | 165 | 166 | rotation 167 | 168 | 169 | 170 | Label 171 | I/O2 172 | 173 | 174 | pinNumber 175 | 13 176 | 177 | 178 | InDefault 179 | 180 | 181 | 182 | isHighZ 183 | true 184 | 185 | 186 | 187 | 188 | 189 | In 190 | 191 | 192 | rotation 193 | 194 | 195 | 196 | Label 197 | I/O3 198 | 199 | 200 | pinNumber 201 | 15 202 | 203 | 204 | InDefault 205 | 206 | 207 | 208 | isHighZ 209 | true 210 | 211 | 212 | 213 | 214 | 215 | In 216 | 217 | 218 | rotation 219 | 220 | 221 | 222 | Label 223 | I/O4 224 | 225 | 226 | pinNumber 227 | 16 228 | 229 | 230 | InDefault 231 | 232 | 233 | 234 | isHighZ 235 | true 236 | 237 | 238 | 239 | 240 | 241 | In 242 | 243 | 244 | rotation 245 | 246 | 247 | 248 | Label 249 | I/O5 250 | 251 | 252 | pinNumber 253 | 17 254 | 255 | 256 | InDefault 257 | 258 | 259 | 260 | isHighZ 261 | true 262 | 263 | 264 | 265 | 266 | 267 | In 268 | 269 | 270 | rotation 271 | 272 | 273 | 274 | Label 275 | I/O6 276 | 277 | 278 | pinNumber 279 | 18 280 | 281 | 282 | InDefault 283 | 284 | 285 | 286 | isHighZ 287 | true 288 | 289 | 290 | 291 | 292 | 293 | In 294 | 295 | 296 | rotation 297 | 298 | 299 | 300 | Label 301 | I/O7 302 | 303 | 304 | pinNumber 305 | 19 306 | 307 | 308 | InDefault 309 | 310 | 311 | 312 | isHighZ 313 | true 314 | 315 | 316 | 317 | 318 | 319 | BusSplitter 320 | 321 | 322 | splitterSpreading 323 | 2 324 | 325 | 326 | Bits 327 | 8 328 | 329 | 330 | 331 | 332 | 333 | NOr 334 | 335 | 336 | inverterConfig 337 | 338 | In_2 339 | 340 | 341 | 342 | Inputs 343 | 3 344 | 345 | 346 | 347 | 348 | 349 | Splitter 350 | 351 | 352 | splitterSpreading 353 | 2 354 | 355 | 356 | Input Splitting 357 | 1*15 358 | 359 | 360 | Output Splitting 361 | 15 362 | 363 | 364 | 365 | 366 | 367 | In 368 | 369 | 370 | Label 371 | A0 372 | 373 | 374 | pinNumber 375 | 10 376 | 377 | 378 | 379 | 380 | 381 | In 382 | 383 | 384 | Label 385 | A1 386 | 387 | 388 | pinNumber 389 | 9 390 | 391 | 392 | 393 | 394 | 395 | In 396 | 397 | 398 | Label 399 | A2 400 | 401 | 402 | pinNumber 403 | 8 404 | 405 | 406 | 407 | 408 | 409 | In 410 | 411 | 412 | Label 413 | A3 414 | 415 | 416 | pinNumber 417 | 7 418 | 419 | 420 | 421 | 422 | 423 | In 424 | 425 | 426 | Label 427 | A4 428 | 429 | 430 | pinNumber 431 | 6 432 | 433 | 434 | 435 | 436 | 437 | In 438 | 439 | 440 | Label 441 | A5 442 | 443 | 444 | pinNumber 445 | 5 446 | 447 | 448 | 449 | 450 | 451 | In 452 | 453 | 454 | Label 455 | A6 456 | 457 | 458 | pinNumber 459 | 4 460 | 461 | 462 | 463 | 464 | 465 | In 466 | 467 | 468 | Label 469 | A7 470 | 471 | 472 | pinNumber 473 | 3 474 | 475 | 476 | 477 | 478 | 479 | In 480 | 481 | 482 | Label 483 | A8 484 | 485 | 486 | pinNumber 487 | 25 488 | 489 | 490 | 491 | 492 | 493 | In 494 | 495 | 496 | Label 497 | A9 498 | 499 | 500 | pinNumber 501 | 24 502 | 503 | 504 | 505 | 506 | 507 | In 508 | 509 | 510 | Label 511 | A10 512 | 513 | 514 | pinNumber 515 | 21 516 | 517 | 518 | 519 | 520 | 521 | In 522 | 523 | 524 | Label 525 | A11 526 | 527 | 528 | pinNumber 529 | 23 530 | 531 | 532 | 533 | 534 | 535 | In 536 | 537 | 538 | Label 539 | A12 540 | 541 | 542 | pinNumber 543 | 2 544 | 545 | 546 | 547 | 548 | 549 | In 550 | 551 | 552 | Label 553 | A13 554 | 555 | 556 | pinNumber 557 | 26 558 | 559 | 560 | 561 | 562 | 563 | In 564 | 565 | 566 | Label 567 | A14 568 | 569 | 570 | pinNumber 571 | 1 572 | 573 | 574 | 575 | 576 | 577 | Testcase 578 | 579 | 580 | Testdata 581 | 582 | ~CE ~WE ~OE A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 I/O7_out I/O6_out I/O5_out I/O4_out I/O3_out I/O2_out I/O1_out I/O0_out 583 | 584 | let r = random(240) ; 585 | 586 | loop (a,8) 587 | 1 1 1 bits(15,a) bits(8,0) x x x x x x x x 588 | 0 0 1 bits(15,a) bits(8,0) x x x x x x x x 589 | 0 0 1 bits(15,a) bits(8,a+r) x x x x x x x x 590 | 1 1 1 bits(15,a) bits(8,a+r) x x x x x x x x 591 | end loop 592 | 593 | loop (a,8) 594 | 0 1 0 bits(15,a) z z z z z z z z bits(8,a+r) 595 | end loop 596 | 597 | 598 | 599 | 600 | 601 | 602 | RAMSinglePortSel 603 | 604 | 605 | AddrBits 606 | 15 607 | 608 | 609 | Label 610 | 2\_RAM 611 | 612 | 613 | Bits 614 | 8 615 | 616 | 617 | inverterConfig 618 | 619 | CS 620 | OE 621 | WE 622 | 623 | 624 | 625 | 626 | 627 | 628 | 629 | 630 | 631 | 632 | 633 | 634 | 635 | 636 | 637 | 638 | 639 | 640 | 641 | 642 | 643 | 644 | 645 | 646 | 647 | 648 | 649 | 650 | 651 | 652 | 653 | 654 | 655 | 656 | 657 | 658 | 659 | 660 | 661 | 662 | 663 | 664 | 665 | 666 | 667 | 668 | 669 | 670 | 671 | 672 | 673 | 674 | 675 | 676 | 677 | 678 | 679 | 680 | 681 | 682 | 683 | 684 | 685 | 686 | 687 | 688 | 689 | 690 | 691 | 692 | 693 | 694 | 695 | 696 | 697 | 698 | 699 | 700 | 701 | 702 | 703 | 704 | 705 | 706 | 707 | 708 | 709 | 710 | 711 | 712 | 713 | 714 | 715 | 716 | 717 | 718 | 719 | 720 | 721 | 722 | 723 | 724 | 725 | 726 | 727 | 728 | 729 | 730 | 731 | 732 | 733 | 734 | 735 | 736 | 737 | 738 | 739 | 740 | 741 | 742 | 743 | 744 | 745 | 746 | 747 | 748 | 749 | 750 | 751 | 752 | 753 | 754 | 755 | 756 | 757 | 758 | 759 | 760 | 761 | 762 | 763 | 764 | 765 | 766 | 767 | 768 | 769 | 770 | 771 | 772 | 773 | 774 | 775 | 776 | 777 | 778 | 779 | 780 | 781 | 782 | 783 | 784 | 785 | 786 | 787 | 788 | 789 | 790 | 791 | 792 | 793 | 794 | 795 | 796 | 797 | 798 | 799 | 800 | 801 | 802 | 803 | 804 | 805 | 806 | 807 | 808 | 809 | 810 | 811 | 812 | 813 | 814 | 815 | -------------------------------------------------------------------------------- /mainbus/clock_reset.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | Width 7 | 15 8 | 9 | 10 | 11 | 12 | Clock 13 | 14 | 15 | Label 16 | ClockIn 17 | 18 | 19 | 20 | 21 | 22 | Tunnel 23 | 24 | 25 | NetName 26 | Clock 27 | 28 | 29 | 30 | 31 | 32 | 74193.dig 33 | 34 | 35 | 36 | 37 | Ground 38 | 39 | 40 | 41 | 42 | VDD 43 | 44 | 45 | 46 | 47 | Ground 48 | 49 | 50 | 51 | 52 | VDD 53 | 54 | 55 | 56 | 57 | Tunnel 58 | 59 | 60 | rotation 61 | 62 | 63 | 64 | NetName 65 | CountDown 66 | 67 | 68 | 69 | 70 | 71 | Ground 72 | 73 | 74 | 75 | 76 | Ground 77 | 78 | 79 | 80 | 81 | Ground 82 | 83 | 84 | 85 | 86 | LED 87 | 88 | 89 | 90 | 91 | LED 92 | 93 | 94 | 95 | 96 | LED 97 | 98 | 99 | 100 | 101 | LED 102 | 103 | 104 | 105 | 106 | Tunnel 107 | 108 | 109 | rotation 110 | 111 | 112 | 113 | NetName 114 | C1 115 | 116 | 117 | 118 | 119 | 120 | Tunnel 121 | 122 | 123 | rotation 124 | 125 | 126 | 127 | NetName 128 | C0 129 | 130 | 131 | 132 | 133 | 134 | Tunnel 135 | 136 | 137 | rotation 138 | 139 | 140 | 141 | NetName 142 | C2 143 | 144 | 145 | 146 | 147 | 148 | Tunnel 149 | 150 | 151 | rotation 152 | 153 | 154 | 155 | NetName 156 | C3 157 | 158 | 159 | 160 | 161 | 162 | Tunnel 163 | 164 | 165 | rotation 166 | 167 | 168 | 169 | NetName 170 | C2 171 | 172 | 173 | 174 | 175 | 176 | Tunnel 177 | 178 | 179 | rotation 180 | 181 | 182 | 183 | NetName 184 | C3 185 | 186 | 187 | 188 | 189 | 190 | Tunnel 191 | 192 | 193 | rotation 194 | 195 | 196 | 197 | NetName 198 | C1 199 | 200 | 201 | 202 | 203 | 204 | Tunnel 205 | 206 | 207 | rotation 208 | 209 | 210 | 211 | NetName 212 | C0 213 | 214 | 215 | 216 | 217 | 218 | 7400.dig 219 | 220 | 221 | 222 | 223 | VDD 224 | 225 | 226 | 227 | 228 | Ground 229 | 230 | 231 | 232 | 233 | LED 234 | 235 | 236 | Color 237 | 238 | 0 239 | 51 240 | 255 241 | 255 242 | 243 | 244 | 245 | 246 | 247 | 248 | LED 249 | 250 | 251 | Color 252 | 253 | 0 254 | 51 255 | 255 256 | 255 257 | 258 | 259 | 260 | 261 | 262 | 263 | Tunnel 264 | 265 | 266 | rotation 267 | 268 | 269 | 270 | NetName 271 | LatchQ 272 | 273 | 274 | 275 | 276 | 277 | Tunnel 278 | 279 | 280 | rotation 281 | 282 | 283 | 284 | NetName 285 | ~LatchQ 286 | 287 | 288 | 289 | 290 | 291 | Tunnel 292 | 293 | 294 | rotation 295 | 296 | 297 | 298 | NetName 299 | LatchReset 300 | 301 | 302 | 303 | 304 | 305 | Tunnel 306 | 307 | 308 | rotation 309 | 310 | 311 | 312 | NetName 313 | LatchQ 314 | 315 | 316 | 317 | 318 | 319 | Tunnel 320 | 321 | 322 | rotation 323 | 324 | 325 | 326 | NetName 327 | ~LatchQ 328 | 329 | 330 | 331 | 332 | 333 | Tunnel 334 | 335 | 336 | NetName 337 | LatchReset 338 | 339 | 340 | 341 | 342 | 343 | Tunnel 344 | 345 | 346 | NetName 347 | Reset 348 | 349 | 350 | 351 | 352 | 353 | Tunnel 354 | 355 | 356 | NetName 357 | Clock 358 | 359 | 360 | 361 | 362 | 363 | Tunnel 364 | 365 | 366 | NetName 367 | CountDown 368 | 369 | 370 | 371 | 372 | 373 | Tunnel 374 | 375 | 376 | NetName 377 | ~LatchQ 378 | 379 | 380 | 381 | 382 | 383 | Tunnel 384 | 385 | 386 | NetName 387 | Reset 388 | 389 | 390 | 391 | 392 | 393 | In 394 | 395 | 396 | Label 397 | ResetIn 398 | 399 | 400 | InDefault 401 | 402 | 403 | 404 | 405 | 406 | 407 | Tunnel 408 | 409 | 410 | rotation 411 | 412 | 413 | 414 | NetName 415 | Reset 416 | 417 | 418 | 419 | 420 | 421 | Tunnel 422 | 423 | 424 | rotation 425 | 426 | 427 | 428 | NetName 429 | LatchQ 430 | 431 | 432 | 433 | 434 | 435 | Tunnel 436 | 437 | 438 | rotation 439 | 440 | 441 | 442 | NetName 443 | ~LatchQ 444 | 445 | 446 | 447 | 448 | 449 | Out 450 | 451 | 452 | Label 453 | ResetOut 454 | 455 | 456 | 457 | 458 | 459 | Out 460 | 461 | 462 | Label 463 | ~ResetOut 464 | 465 | 466 | 467 | 468 | 469 | 470 | 471 | 472 | 473 | 474 | 475 | 476 | 477 | 478 | 479 | 480 | 481 | 482 | 483 | 484 | 485 | 486 | 487 | 488 | 489 | 490 | 491 | 492 | 493 | 494 | 495 | 496 | 497 | 498 | 499 | 500 | 501 | 502 | 503 | 504 | 505 | 506 | 507 | 508 | 509 | 510 | 511 | 512 | 513 | 514 | 515 | 516 | 517 | 518 | 519 | 520 | 521 | 522 | 523 | 524 | 525 | 526 | 527 | 528 | 529 | 530 | 531 | 532 | 533 | 534 | 535 | 536 | 537 | 538 | 539 | 540 | 541 | 542 | 543 | 544 | 545 | 546 | 547 | 548 | 549 | 550 | 551 | 552 | 553 | 554 | 555 | 556 | 557 | 558 | 559 | 560 | 561 | 562 | 563 | 564 | 565 | 566 | 567 | 568 | 569 | 570 | 571 | 572 | 573 | 574 | 575 | 576 | 577 | 578 | 579 | 580 | 581 | 582 | 583 | 584 | 585 | 586 | 587 | 588 | 589 | 590 | 591 | 592 | 593 | 594 | 595 | 596 | 597 | 598 | 599 | 600 | 601 | 602 | 603 | 604 | 605 | 606 | 607 | 608 | 609 | 610 | 611 | 612 | 613 | 614 | 615 | 616 | 617 | 618 | 619 | 620 | 621 | 622 | 623 | 624 | 625 | 626 | 627 | 628 | 629 | 630 | 631 | 632 | 633 | 634 | 635 | 636 | 637 | 638 | 639 | 640 | 641 | 642 | 643 | 644 | 645 | 646 | 647 | 648 | 649 | 650 | 651 | 652 | 653 | 654 | 655 | 656 | 657 | 658 | 659 | 660 | 661 | 662 | 663 | 664 | 665 | 666 | 667 | 668 | 669 | 670 | 671 | 672 | 673 | 674 | 675 | 676 | 677 | 678 | 679 | 680 | 681 | 682 | 683 | 684 | 685 | 686 | 687 | 688 | 689 | 690 | 691 | 692 | 693 | 694 | 695 | 696 | -------------------------------------------------------------------------------- /mainbus/clock_reset.svg: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | ClockIn 69 | 70 | 71 | 72 | 73 | 74 | Clock 75 | 76 | 77 | 78 | 79 | D1 80 | 81 | VCC 82 | 83 | Q1 84 | 85 | D0 86 | 87 | Q0 88 | 89 | CLR 90 | 91 | DN 92 | 93 | BO 94 | 95 | UP 96 | 97 | CO 98 | 99 | Q2 100 | 101 | LD 102 | 103 | Q3 104 | 105 | D2 106 | 107 | GND 108 | 109 | D3 110 | 111 | 74193 112 | 113 | 114 | 115 | 116 | 117 | 118 | 119 | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | 132 | 133 | 134 | 135 | 136 | 137 | 138 | 139 | 140 | 141 | 142 | 143 | 144 | 145 | CountDown 146 | 147 | 148 | 149 | 150 | 151 | 152 | 153 | 154 | 155 | 156 | 157 | 158 | 159 | 160 | 161 | 162 | 163 | 164 | 165 | 166 | 167 | 168 | 169 | 170 | 171 | 172 | 173 | 174 | 175 | 176 | 177 | 178 | 179 | C1 180 | 181 | 182 | 183 | 184 | C0 185 | 186 | 187 | 188 | 189 | C2 190 | 191 | 192 | 193 | 194 | C3 195 | 196 | 197 | 198 | 199 | C2 200 | 201 | 202 | 203 | 204 | C3 205 | 206 | 207 | 208 | 209 | C1 210 | 211 | 212 | 213 | 214 | C0 215 | 216 | 217 | 218 | 219 | 1A 220 | 221 | VCC 222 | 223 | 1B 224 | 225 | 4B 226 | 227 | 1Y 228 | 229 | 4A 230 | 231 | 2A 232 | 233 | 4Y 234 | 235 | 2B 236 | 237 | 3B 238 | 239 | 2Y 240 | 241 | 3A 242 | 243 | GND 244 | 245 | 3Y 246 | 247 | 7400 248 | 249 | 250 | 251 | 252 | 253 | 254 | 255 | 256 | 257 | 258 | 259 | 260 | 261 | 262 | 263 | 264 | 265 | 266 | 267 | 268 | 269 | 270 | 271 | 272 | 273 | 274 | 275 | 276 | 277 | 278 | 279 | 280 | 281 | 282 | LatchQ 283 | 284 | 285 | 286 | 287 | LatchQ 288 | 289 | 290 | 291 | 292 | LatchReset 293 | 294 | 295 | 296 | 297 | LatchQ 298 | 299 | 300 | 301 | 302 | LatchQ 303 | 304 | 305 | 306 | 307 | LatchReset 308 | 309 | 310 | 311 | 312 | Reset 313 | 314 | 315 | 316 | 317 | Clock 318 | 319 | 320 | 321 | 322 | CountDown 323 | 324 | 325 | 326 | 327 | LatchQ 328 | 329 | 330 | 331 | 332 | Reset 333 | 334 | 335 | 336 | 337 | 338 | ResetIn 339 | 340 | 341 | 342 | 343 | Reset 344 | 345 | 346 | 347 | 348 | LatchQ 349 | 350 | 351 | 352 | 353 | LatchQ 354 | 355 | 356 | 357 | 358 | 359 | ResetOut 360 | 361 | 362 | 363 | 364 | 365 | ResetOut 366 | 367 | 368 | 369 | -------------------------------------------------------------------------------- /mainbus/program-memory.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | shapeType 7 | DIL 8 | 9 | 10 | pinCount 11 | 28 12 | 13 | 14 | Description 15 | 256K (32K x 8) Paged Parallel EEPROM; 16 | DATA Polling for End of Write Detection not implemented! 17 | 18 | 19 | Width 20 | 11 21 | 22 | 23 | 24 | 25 | EEPROM 26 | 27 | 28 | AddrBits 29 | 15 30 | 31 | 32 | isProgramMemory 33 | true 34 | 35 | 36 | Label 37 | 1\_PROGMEM 38 | 39 | 40 | Bits 41 | 8 42 | 43 | 44 | Data 45 | 0,0,0,0,0,0,1,aa,72,72,72,72,72,72,72,72,72,1,a,2,b,88,88,88,88,88,88,88,88,78,79, 46 | 7a,7b,7c,7d 47 | 48 | 49 | inverterConfig 50 | 51 | CS 52 | OE 53 | WE 54 | 55 | 56 | 57 | lastDataFile 58 | C:\code\jamessharman-8bit-cpu-sim\mainbus\program-memory.hex 59 | 60 | 61 | intFormat 62 | hex 63 | 64 | 65 | 66 | 67 | 68 | In 69 | 70 | 71 | Label 72 | ~CE 73 | 74 | 75 | pinNumber 76 | 20 77 | 78 | 79 | InDefault 80 | 81 | 82 | 83 | 84 | 85 | 86 | In 87 | 88 | 89 | Label 90 | ~OE 91 | 92 | 93 | pinNumber 94 | 22 95 | 96 | 97 | InDefault 98 | 99 | 100 | 101 | 102 | 103 | 104 | In 105 | 106 | 107 | Label 108 | ~WE 109 | 110 | 111 | pinNumber 112 | 27 113 | 114 | 115 | InDefault 116 | 117 | 118 | 119 | 120 | 121 | 122 | PowerSupply 123 | 124 | 125 | 126 | 127 | In 128 | 129 | 130 | Label 131 | VCC 132 | 133 | 134 | pinNumber 135 | 28 136 | 137 | 138 | InDefault 139 | 140 | 141 | 142 | 143 | 144 | 145 | In 146 | 147 | 148 | Label 149 | GND 150 | 151 | 152 | pinNumber 153 | 14 154 | 155 | 156 | 157 | 158 | 159 | In 160 | 161 | 162 | rotation 163 | 164 | 165 | 166 | Label 167 | I/O0 168 | 169 | 170 | pinNumber 171 | 11 172 | 173 | 174 | InDefault 175 | 176 | 177 | 178 | isHighZ 179 | true 180 | 181 | 182 | 183 | 184 | 185 | In 186 | 187 | 188 | rotation 189 | 190 | 191 | 192 | Label 193 | I/O1 194 | 195 | 196 | pinNumber 197 | 12 198 | 199 | 200 | InDefault 201 | 202 | 203 | 204 | isHighZ 205 | true 206 | 207 | 208 | 209 | 210 | 211 | In 212 | 213 | 214 | rotation 215 | 216 | 217 | 218 | Label 219 | I/O2 220 | 221 | 222 | pinNumber 223 | 13 224 | 225 | 226 | InDefault 227 | 228 | 229 | 230 | isHighZ 231 | true 232 | 233 | 234 | 235 | 236 | 237 | In 238 | 239 | 240 | rotation 241 | 242 | 243 | 244 | Label 245 | I/O3 246 | 247 | 248 | pinNumber 249 | 15 250 | 251 | 252 | InDefault 253 | 254 | 255 | 256 | isHighZ 257 | true 258 | 259 | 260 | 261 | 262 | 263 | In 264 | 265 | 266 | rotation 267 | 268 | 269 | 270 | Label 271 | I/O4 272 | 273 | 274 | pinNumber 275 | 16 276 | 277 | 278 | InDefault 279 | 280 | 281 | 282 | isHighZ 283 | true 284 | 285 | 286 | 287 | 288 | 289 | In 290 | 291 | 292 | rotation 293 | 294 | 295 | 296 | Label 297 | I/O5 298 | 299 | 300 | pinNumber 301 | 17 302 | 303 | 304 | InDefault 305 | 306 | 307 | 308 | isHighZ 309 | true 310 | 311 | 312 | 313 | 314 | 315 | In 316 | 317 | 318 | rotation 319 | 320 | 321 | 322 | Label 323 | I/O6 324 | 325 | 326 | pinNumber 327 | 18 328 | 329 | 330 | InDefault 331 | 332 | 333 | 334 | isHighZ 335 | true 336 | 337 | 338 | 339 | 340 | 341 | In 342 | 343 | 344 | rotation 345 | 346 | 347 | 348 | Label 349 | I/O7 350 | 351 | 352 | pinNumber 353 | 19 354 | 355 | 356 | InDefault 357 | 358 | 359 | 360 | isHighZ 361 | true 362 | 363 | 364 | 365 | 366 | 367 | BusSplitter 368 | 369 | 370 | splitterSpreading 371 | 2 372 | 373 | 374 | Bits 375 | 8 376 | 377 | 378 | 379 | 380 | 381 | NOr 382 | 383 | 384 | inverterConfig 385 | 386 | In_2 387 | 388 | 389 | 390 | Inputs 391 | 3 392 | 393 | 394 | 395 | 396 | 397 | Splitter 398 | 399 | 400 | splitterSpreading 401 | 2 402 | 403 | 404 | Input Splitting 405 | 1*15 406 | 407 | 408 | Output Splitting 409 | 15 410 | 411 | 412 | 413 | 414 | 415 | In 416 | 417 | 418 | Label 419 | A0 420 | 421 | 422 | pinNumber 423 | 10 424 | 425 | 426 | 427 | 428 | 429 | In 430 | 431 | 432 | Label 433 | A1 434 | 435 | 436 | pinNumber 437 | 9 438 | 439 | 440 | 441 | 442 | 443 | In 444 | 445 | 446 | Label 447 | A2 448 | 449 | 450 | pinNumber 451 | 8 452 | 453 | 454 | 455 | 456 | 457 | In 458 | 459 | 460 | Label 461 | A3 462 | 463 | 464 | pinNumber 465 | 7 466 | 467 | 468 | 469 | 470 | 471 | In 472 | 473 | 474 | Label 475 | A4 476 | 477 | 478 | pinNumber 479 | 6 480 | 481 | 482 | 483 | 484 | 485 | In 486 | 487 | 488 | Label 489 | A5 490 | 491 | 492 | pinNumber 493 | 5 494 | 495 | 496 | 497 | 498 | 499 | In 500 | 501 | 502 | Label 503 | A6 504 | 505 | 506 | pinNumber 507 | 4 508 | 509 | 510 | 511 | 512 | 513 | In 514 | 515 | 516 | Label 517 | A7 518 | 519 | 520 | pinNumber 521 | 3 522 | 523 | 524 | 525 | 526 | 527 | In 528 | 529 | 530 | Label 531 | A8 532 | 533 | 534 | pinNumber 535 | 25 536 | 537 | 538 | 539 | 540 | 541 | In 542 | 543 | 544 | Label 545 | A9 546 | 547 | 548 | pinNumber 549 | 24 550 | 551 | 552 | 553 | 554 | 555 | In 556 | 557 | 558 | Label 559 | A10 560 | 561 | 562 | pinNumber 563 | 21 564 | 565 | 566 | 567 | 568 | 569 | In 570 | 571 | 572 | Label 573 | A11 574 | 575 | 576 | pinNumber 577 | 23 578 | 579 | 580 | 581 | 582 | 583 | In 584 | 585 | 586 | Label 587 | A12 588 | 589 | 590 | pinNumber 591 | 2 592 | 593 | 594 | 595 | 596 | 597 | In 598 | 599 | 600 | Label 601 | A13 602 | 603 | 604 | pinNumber 605 | 26 606 | 607 | 608 | 609 | 610 | 611 | In 612 | 613 | 614 | Label 615 | A14 616 | 617 | 618 | pinNumber 619 | 1 620 | 621 | 622 | 623 | 624 | 625 | Testcase 626 | 627 | 628 | Testdata 629 | 630 | ~CE ~WE ~OE A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 I/O7_out I/O6_out I/O5_out I/O4_out I/O3_out I/O2_out I/O1_out I/O0_out 631 | 632 | let r = random(240) ; 633 | 634 | loop (a,8) 635 | 1 1 1 bits(15,a) bits(8,0) x x x x x x x x 636 | 0 0 1 bits(15,a) bits(8,0) x x x x x x x x 637 | 0 0 1 bits(15,a) bits(8,a+r) x x x x x x x x 638 | 1 1 1 bits(15,a) bits(8,a+r) x x x x x x x x 639 | end loop 640 | 641 | loop (a,8) 642 | 0 1 0 bits(15,a) z z z z z z z z bits(8,a+r) 643 | end loop 644 | 645 | 646 | 647 | 648 | 649 | 650 | 651 | 652 | 653 | 654 | 655 | 656 | 657 | 658 | 659 | 660 | 661 | 662 | 663 | 664 | 665 | 666 | 667 | 668 | 669 | 670 | 671 | 672 | 673 | 674 | 675 | 676 | 677 | 678 | 679 | 680 | 681 | 682 | 683 | 684 | 685 | 686 | 687 | 688 | 689 | 690 | 691 | 692 | 693 | 694 | 695 | 696 | 697 | 698 | 699 | 700 | 701 | 702 | 703 | 704 | 705 | 706 | 707 | 708 | 709 | 710 | 711 | 712 | 713 | 714 | 715 | 716 | 717 | 718 | 719 | 720 | 721 | 722 | 723 | 724 | 725 | 726 | 727 | 728 | 729 | 730 | 731 | 732 | 733 | 734 | 735 | 736 | 737 | 738 | 739 | 740 | 741 | 742 | 743 | 744 | 745 | 746 | 747 | 748 | 749 | 750 | 751 | 752 | 753 | 754 | 755 | 756 | 757 | 758 | 759 | 760 | 761 | 762 | 763 | 764 | 765 | 766 | 767 | 768 | 769 | 770 | 771 | 772 | 773 | 774 | 775 | 776 | 777 | 778 | 779 | 780 | 781 | 782 | 783 | 784 | 785 | 786 | 787 | 788 | 789 | 790 | 791 | 792 | 793 | 794 | 795 | 796 | 797 | 798 | 799 | 800 | 801 | 802 | 803 | 804 | 805 | 806 | 807 | 808 | 809 | 810 | 811 | 812 | 813 | 814 | 815 | 816 | 817 | 818 | 819 | 820 | 821 | 822 | 823 | 824 | 825 | 826 | 827 | 828 | 829 | 830 | 831 | 832 | 833 | 834 | 835 | 836 | 837 | -------------------------------------------------------------------------------- /mainbus/program-memory.hex: -------------------------------------------------------------------------------- 1 | v2.0 raw 2 | 6*0 3 | 1 4 | aa 5 | 9*72 6 | 1 7 | a 8 | 2 9 | b 10 | 8*88 11 | 78 12 | 79 13 | 7a 14 | 7b 15 | 7c 16 | 7d 17 | -------------------------------------------------------------------------------- /mainbus/reg-constant.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | backgroundColor 7 | 8 | 255 9 | 204 10 | 204 11 | 255 12 | 13 | 14 | 15 | Width 16 | 15 17 | 18 | 19 | 20 | 21 | 74574.dig 22 | 23 | 24 | Label 25 | 8bit GPR 26 | 27 | 28 | 29 | 30 | 31 | Ground 32 | 33 | 34 | 35 | 36 | Tunnel 37 | 38 | 39 | NetName 40 | Reg\_Load 41 | 42 | 43 | 44 | 45 | 46 | VDD 47 | 48 | 49 | 50 | 51 | Splitter 52 | 53 | 54 | mirror 55 | true 56 | 57 | 58 | splitterSpreading 59 | 2 60 | 61 | 62 | Input Splitting 63 | 8 64 | 65 | 66 | Output Splitting 67 | 1,1,1,1,1,1,1,1 68 | 69 | 70 | 71 | 72 | 73 | Tunnel 74 | 75 | 76 | rotation 77 | 78 | 79 | 80 | NetName 81 | MEMDATAIn 82 | 83 | 84 | 85 | 86 | 87 | Splitter 88 | 89 | 90 | mirror 91 | true 92 | 93 | 94 | splitterSpreading 95 | 2 96 | 97 | 98 | Input Splitting 99 | 1,1,1,1,1,1,1,1 100 | 101 | 102 | 103 | 104 | 105 | Tunnel 106 | 107 | 108 | NetName 109 | Reg\_Assert 110 | 111 | 112 | 113 | 114 | 115 | Tunnel 116 | 117 | 118 | NetName 119 | MEMDATAIn 120 | 121 | 122 | 123 | 124 | 125 | In 126 | 127 | 128 | Label 129 | MEMDATAIn 130 | 131 | 132 | Bits 133 | 8 134 | 135 | 136 | InDefault 137 | 138 | 139 | 140 | 141 | 142 | 143 | Out 144 | 145 | 146 | Label 147 | MainBusOut 148 | 149 | 150 | Bits 151 | 8 152 | 153 | 154 | 155 | 156 | 157 | In 158 | 159 | 160 | Label 161 | Reg\_Assert 162 | 163 | 164 | InDefault 165 | 166 | 167 | 168 | 169 | 170 | 171 | Tunnel 172 | 173 | 174 | NetName 175 | Reg\_Load 176 | 177 | 178 | 179 | 180 | 181 | In 182 | 183 | 184 | Label 185 | Reg\_Load 186 | 187 | 188 | InDefault 189 | 190 | 191 | 192 | 193 | 194 | 195 | Tunnel 196 | 197 | 198 | rotation 199 | 200 | 201 | 202 | NetName 203 | MainBusOut 204 | 205 | 206 | 207 | 208 | 209 | Tunnel 210 | 211 | 212 | NetName 213 | MainBusOut 214 | 215 | 216 | 217 | 218 | 219 | NAnd 220 | 221 | 222 | wideShape 223 | true 224 | 225 | 226 | 227 | 228 | 229 | NAnd 230 | 231 | 232 | wideShape 233 | true 234 | 235 | 236 | 237 | 238 | 239 | NAnd 240 | 241 | 242 | wideShape 243 | true 244 | 245 | 246 | 247 | 248 | 249 | NAnd 250 | 251 | 252 | wideShape 253 | true 254 | 255 | 256 | 257 | 258 | 259 | Tunnel 260 | 261 | 262 | rotation 263 | 264 | 265 | 266 | NetName 267 | Reg\_Load 268 | 269 | 270 | 271 | 272 | 273 | Tunnel 274 | 275 | 276 | rotation 277 | 278 | 279 | 280 | NetName 281 | Reg\_Assert 282 | 283 | 284 | 285 | 286 | 287 | Tunnel 288 | 289 | 290 | NetName 291 | Reg\_Valid 292 | 293 | 294 | 295 | 296 | 297 | Tunnel 298 | 299 | 300 | rotation 301 | 302 | 303 | 304 | NetName 305 | Reg\_Assert 306 | 307 | 308 | 309 | 310 | 311 | Text 312 | 313 | 314 | Description 315 | Leaving this on for now, but I think this is 316 | only used for driving the LEDs? 317 | 318 | 319 | 320 | 321 | 322 | 323 | 324 | 325 | 326 | 327 | 328 | 329 | 330 | 331 | 332 | 333 | 334 | 335 | 336 | 337 | 338 | 339 | 340 | 341 | 342 | 343 | 344 | 345 | 346 | 347 | 348 | 349 | 350 | 351 | 352 | 353 | 354 | 355 | 356 | 357 | 358 | 359 | 360 | 361 | 362 | 363 | 364 | 365 | 366 | 367 | 368 | 369 | 370 | 371 | 372 | 373 | 374 | 375 | 376 | 377 | 378 | 379 | 380 | 381 | 382 | 383 | 384 | 385 | 386 | 387 | 388 | 389 | 390 | 391 | 392 | 393 | 394 | 395 | 396 | 397 | 398 | 399 | 400 | 401 | 402 | 403 | 404 | 405 | 406 | 407 | 408 | 409 | 410 | 411 | 412 | 413 | 414 | 415 | 416 | 417 | 418 | 419 | 420 | 421 | 422 | 423 | 424 | 425 | 426 | 427 | 428 | 429 | 430 | 431 | 432 | 433 | 434 | 435 | 436 | 437 | 438 | 439 | 440 | 441 | 442 | 443 | 444 | 445 | 446 | 447 | 448 | 449 | 450 | 451 | 452 | 453 | 454 | 455 | 456 | 457 | 458 | 459 | 460 | 461 | 462 | 463 | 464 | 465 | 466 | 467 | 468 | 469 | 470 | 471 | 472 | 473 | 474 | 475 | 476 | 477 | 478 | 479 | 480 | 481 | 482 | 483 | 484 | 485 | 486 | 487 | 488 | 489 | 490 | 491 | 492 | 493 | 494 | 495 | 496 | 497 | 498 | 499 | 500 | 501 | 502 | 503 | 504 | 505 | 506 | 507 | 508 | 509 | 510 | 511 | 512 | 513 | 514 | 515 | 516 | 517 | 518 | 519 | 520 | 521 | 522 | 523 | 524 | 525 | 526 | 527 | 528 | 529 | 530 | 531 | 532 | 533 | 534 | 535 | 536 | 537 | -------------------------------------------------------------------------------- /mainbus/reg-constant.svg: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | 64 | 65 | 66 | 67 | 68 | 69 | 70 | 71 | 72 | OC 73 | 74 | VCC 75 | 76 | D0 77 | 78 | Q0 79 | 80 | D1 81 | 82 | Q1 83 | 84 | D2 85 | 86 | Q2 87 | 88 | D3 89 | 90 | Q3 91 | 92 | D4 93 | 94 | Q4 95 | 96 | D5 97 | 98 | Q5 99 | 100 | D6 101 | 102 | Q6 103 | 104 | D7 105 | 106 | Q7 107 | 108 | GND 109 | 110 | CLK 111 | 112 | 74574 113 | 8bit GPR 114 | 115 | 116 | 117 | 118 | 119 | 120 | 121 | 122 | 123 | 124 | 125 | 126 | 127 | 128 | 129 | 130 | 131 | 132 | 133 | 134 | 135 | 136 | 137 | 138 | 139 | 140 | Reg_Load 141 | 142 | 143 | 144 | 145 | 146 | 147 | 148 | 0-7 149 | 0 150 | 1 151 | 2 152 | 3 153 | 4 154 | 5 155 | 6 156 | 7 157 | 158 | 159 | 160 | 161 | 162 | 163 | 164 | 165 | 166 | 167 | 168 | 169 | 170 | MEMDATAIn 171 | 172 | 173 | 174 | 0 175 | 1 176 | 2 177 | 3 178 | 4 179 | 5 180 | 6 181 | 7 182 | 0-7 183 | 184 | 185 | 186 | 187 | 188 | 189 | 190 | 191 | 192 | 193 | 194 | 195 | 196 | Reg_Assert 197 | 198 | 199 | 200 | 201 | MEMDATAIn 202 | 203 | 204 | 205 | 206 | 207 | MEMDATAIn 208 | 209 | 210 | 211 | 212 | 213 | MainBusOut 214 | 215 | 216 | 217 | 218 | 219 | Reg_Assert 220 | 221 | 222 | 223 | 224 | Reg_Load 225 | 226 | 227 | 228 | 229 | 230 | Reg_Load 231 | 232 | 233 | 234 | 235 | MainBusOut 236 | 237 | 238 | 239 | 240 | MainBusOut 241 | 242 | 243 | 244 | 245 | 246 | 247 | 248 | 249 | 250 | 251 | 252 | 253 | 254 | 255 | 256 | 257 | 258 | 259 | 260 | 261 | 262 | 263 | 264 | 265 | 266 | 267 | 268 | 269 | 270 | 271 | 272 | 273 | Reg_Load 274 | 275 | 276 | 277 | 278 | Reg_Assert 279 | 280 | 281 | 282 | 283 | Reg_Valid 284 | 285 | 286 | 287 | 288 | Reg_Assert 289 | 290 | 291 | 292 | Leaving this on for now, but I think this is 293 | only used for driving the LEDs? 294 | 295 | 296 | -------------------------------------------------------------------------------- /pipeline/pipeline.dig: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | 7 | pipeline-stage0.dig 8 | 9 | 10 | 11 | 12 | pipeline-stage1.dig 13 | 14 | 15 | 16 | 17 | 18 | 19 | -------------------------------------------------------------------------------- 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