├── .gitignore ├── .gitmodules ├── LICENSE ├── README.md ├── components ├── esp32-port │ ├── .clang-format │ ├── CMakeLists.txt │ ├── awtk_config.h │ ├── component.mk │ ├── format.sh │ ├── lcd_esp32_raw.c │ ├── main_loop_esp32_raw.c │ └── platform.c └── lcd_driver │ ├── CMakeLists.txt │ ├── component.mk │ ├── esp32-spi.c │ ├── esp32-spi.h │ ├── ili9341.c │ └── ili9341.h └── example ├── CMakeLists.txt ├── Makefile ├── esp32-awtk-partitions.csv ├── main ├── CMakeLists.txt ├── component.mk ├── esp32_awtk_main.c ├── rgb565_piexl └── test_file │ ├── sony.mp3 │ └── sony.rgb └── sdkconfig /.gitignore: -------------------------------------------------------------------------------- 1 | .config 2 | *.o 3 | *.pyc 4 | 5 | # gtags 6 | GTAGS 7 | GRTAGS 8 | GPATH 9 | 10 | # emacs 11 | .dir-locals.el 12 | 13 | 14 | # eclipse setting 15 | .settings 16 | 17 | # MacOS directory files 18 | .DS_Store 19 | 20 | # Example project files 21 | # example/**/sdkconfig 22 | example/**/sdkconfig.old 23 | example/**/build 24 | 25 | # gcov coverage reports 26 | *.gcda 27 | *.gcno 28 | coverage.info 29 | coverage_report/ 30 | 31 | # VS Code Settings 32 | .vscode/ 33 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "esp-idf"] 2 | path = esp-idf 3 | url = https://github.com/espressif/esp-idf.git 4 | [submodule "components/awtk"] 5 | path = components/awtk 6 | url = https://github.com/jason-mao/awtk.git 7 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 2, June 1991 3 | 4 | Copyright (C) 1989, 1991 Free Software Foundation, Inc., 5 | 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 6 | Everyone is permitted to copy and distribute verbatim copies 7 | of this license document, but changing it is not allowed. 8 | 9 | Preamble 10 | 11 | The licenses for most software are designed to take away your 12 | freedom to share and change it. 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If this is what you want to do, use the GNU Lesser General 339 | Public License instead of this License. 340 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # esp32-awtk 2 | 3 | [ESP32](https://github.com/espressif/esp-idf) is a very popular IOT chips in the world. 4 | 5 | [AWTK](https://github.com/zlgopen/awtk) is an open source GUI. It's easy to support embedded system, Wechat, WEB, Mobile phone and PC. 6 | 7 | # Quick Start 8 | 9 | Clone the `esp32-awtk` repository, set up `IDF_PATH`, and then compile, flash and monitor applications in the same way as when working with ESP-IDF. 10 | 11 | ``` 12 | git clone --recursive https://github.com/jason-mao/esp32-awtk.git 13 | cd esp32-awtk/example 14 | export IDF_PATH=$PWD/../esp-idf 15 | make flash monitor 16 | ``` 17 | 18 | # Todo list 19 | - [x] Porting awtk to support ESP32 20 | - [x] Running first demo on ESP-WROVER-KIT with WROVER module 21 | - [ ] Support touch input events 22 | - [ ] Implement framebuffer to improve speed 23 | -------------------------------------------------------------------------------- /components/esp32-port/.clang-format: -------------------------------------------------------------------------------- 1 | --- 2 | Language: Cpp 3 | # BasedOnStyle: Google 4 | AccessModifierOffset: -1 5 | AlignAfterOpenBracket: Align 6 | AlignConsecutiveAssignments: false 7 | AlignConsecutiveDeclarations: false 8 | AlignEscapedNewlines: Left 9 | AlignOperands: true 10 | AlignTrailingComments: true 11 | AllowAllParametersOfDeclarationOnNextLine: true 12 | AllowShortBlocksOnASingleLine: false 13 | AllowShortCaseLabelsOnASingleLine: false 14 | AllowShortFunctionsOnASingleLine: false 15 | AllowShortIfStatementsOnASingleLine: true 16 | AllowShortLoopsOnASingleLine: true 17 | AlwaysBreakAfterDefinitionReturnType: None 18 | AlwaysBreakAfterReturnType: None 19 | AlwaysBreakBeforeMultilineStrings: true 20 | AlwaysBreakTemplateDeclarations: true 21 | BinPackArguments: true 22 | BinPackParameters: true 23 | BraceWrapping: 24 | AfterClass: false 25 | AfterControlStatement: false 26 | AfterEnum: false 27 | AfterFunction: false 28 | AfterNamespace: false 29 | AfterObjCDeclaration: false 30 | AfterStruct: false 31 | AfterUnion: false 32 | AfterExternBlock: false 33 | BeforeCatch: false 34 | BeforeElse: false 35 | IndentBraces: false 36 | SplitEmptyFunction: true 37 | SplitEmptyRecord: true 38 | SplitEmptyNamespace: true 39 | BreakBeforeBinaryOperators: None 40 | BreakBeforeBraces: Attach 41 | BreakBeforeInheritanceComma: false 42 | BreakBeforeTernaryOperators: true 43 | BreakConstructorInitializersBeforeComma: false 44 | BreakConstructorInitializers: BeforeColon 45 | BreakAfterJavaFieldAnnotations: false 46 | BreakStringLiterals: true 47 | ColumnLimit: 100 48 | CommentPragmas: '^ IWYU pragma:' 49 | CompactNamespaces: false 50 | ConstructorInitializerAllOnOneLineOrOnePerLine: true 51 | ConstructorInitializerIndentWidth: 4 52 | ContinuationIndentWidth: 4 53 | Cpp11BracedListStyle: true 54 | DerivePointerAlignment: false 55 | DisableFormat: false 56 | ExperimentalAutoDetectBinPacking: false 57 | FixNamespaceComments: true 58 | ForEachMacros: 59 | - foreach 60 | - Q_FOREACH 61 | - BOOST_FOREACH 62 | IncludeCategories: 63 | - Regex: '^' 64 | Priority: 2 65 | - Regex: '^<.*\.h>' 66 | Priority: 1 67 | - Regex: '^<.*' 68 | Priority: 2 69 | - Regex: '.*' 70 | Priority: 3 71 | IncludeIsMainRegex: '([-_](test|unittest))?$' 72 | IndentCaseLabels: true 73 | IndentPPDirectives: None 74 | IndentWidth: 2 75 | IndentWrappedFunctionNames: false 76 | JavaScriptQuotes: Leave 77 | JavaScriptWrapImports: true 78 | KeepEmptyLinesAtTheStartOfBlocks: false 79 | MacroBlockBegin: '' 80 | MacroBlockEnd: '' 81 | MaxEmptyLinesToKeep: 1 82 | NamespaceIndentation: None 83 | ObjCBlockIndentWidth: 2 84 | ObjCSpaceAfterProperty: false 85 | ObjCSpaceBeforeProtocolList: false 86 | PenaltyBreakAssignment: 2 87 | PenaltyBreakBeforeFirstCallParameter: 1 88 | PenaltyBreakComment: 300 89 | PenaltyBreakFirstLessLess: 100 90 | PenaltyBreakString: 1000 91 | PenaltyExcessCharacter: 1000000 92 | PenaltyReturnTypeOnItsOwnLine: 200 93 | PointerAlignment: Left 94 | RawStringFormats: 95 | - Delimiter: pb 96 | Language: TextProto 97 | BasedOnStyle: google 98 | ReflowComments: true 99 | SortIncludes: false 100 | SortUsingDeclarations: true 101 | SpaceAfterCStyleCast: false 102 | SpaceAfterTemplateKeyword: true 103 | SpaceBeforeAssignmentOperators: true 104 | SpaceBeforeParens: ControlStatements 105 | SpaceInEmptyParentheses: false 106 | SpacesBeforeTrailingComments: 2 107 | SpacesInAngles: false 108 | SpacesInContainerLiterals: true 109 | SpacesInCStyleCastParentheses: false 110 | SpacesInParentheses: false 111 | SpacesInSquareBrackets: false 112 | Standard: Auto 113 | TabWidth: 2 114 | UseTab: Never 115 | ... 116 | 117 | -------------------------------------------------------------------------------- /components/esp32-port/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(COMPONENT_SRCS "lcd_esp32_raw.c" "main_loop_esp32_raw.c" "platform.c") 2 | set(COMPONENT_ADD_INCLUDEDIRS "awtk_config.h") 3 | 4 | register_component() 5 | -------------------------------------------------------------------------------- /components/esp32-port/awtk_config.h: -------------------------------------------------------------------------------- 1 | 2 | /** 3 | * File: awtk_config.h 4 | * Author: AWTK Develop Team 5 | * Brief: config 6 | * 7 | * Copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd. 8 | * 9 | * This program is distributed in the hope that it will be useful, 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | * License file for more details. 13 | * 14 | */ 15 | 16 | /** 17 | * History: 18 | * ================================================================ 19 | * 2018-09-12 Li XianJing created 20 | * 21 | */ 22 | 23 | #ifndef AWTK_CONFIG_H 24 | #define AWTK_CONFIG_H 25 | 26 | /** 27 | * 嵌入式系统有自己的main函数时，请定义本宏。 28 | * 29 | */ 30 | #define USE_GUI_MAIN 1 31 | 32 | /** 33 | * 如果需要支持预先解码的图片，请定义本宏。一般只在RAM极小时，才启用本宏。 34 | */ 35 | #define WITH_BITMAP_FONT 1 36 | 37 | /** 38 | * 如果不需输入法，请定义本宏 39 | * 40 | */ 41 | #define WITH_NULL_IM 1 42 | 43 | /** 44 | * 如果支持极速模式，请定义本宏。极速模式不支持控件透明半透明效果，只有在CPU配置极低时启用。 45 | * 46 | * #define USE_FAST_MODE 1 47 | */ 48 | 49 | /** 50 | * 如果有标准的malloc/free/calloc等函数，请定义本宏 51 | * 52 | */ 53 | // #define HAS_STD_MALLOC 1 54 | 55 | /** 56 | * 如果有标准的fopen/fclose等函数，请定义本宏 57 | * 58 | */ 59 | #define HAS_STDIO 1 60 | 61 | /** 62 | * 如果有优化版本的memcpy函数，请定义本宏 63 | * 64 | */ 65 | #define HAS_FAST_MEMCPY 1 66 | 67 | /** 68 | * 如果禁用控件动画，请定义本宏 69 | * 70 | */ 71 | #define WITHOUT_WIDGET_ANIMATORS 1 72 | 73 | /** 74 | * 如果禁用窗口动画，请定义本宏 75 | * 76 | */ 77 | #define WITHOUT_WINDOW_ANIMATORS 1 78 | 79 | /** 80 | * 如果对话框高亮策略，请定义本宏 81 | * 82 | */ 83 | #define WITHOUT_DIALOG_HIGHLIGHTER 1 84 | 85 | #define WITHOUT_EXT_WIDGETS 1 86 | 87 | #define FRAGMENT_FRAME_BUFFER_SIZE 32 * 1024 88 | 89 | #endif/*AWTK_CONFIG_H*/ 90 | -------------------------------------------------------------------------------- /components/esp32-port/component.mk: -------------------------------------------------------------------------------- 1 | # 2 | # "main" pseudo-component makefile. 3 | # 4 | # (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.) 5 | 6 | COMPONENT_ADD_INCLUDEDIRS := ./ 7 | COMPONENT_SRCDIRS := ./ 8 | -------------------------------------------------------------------------------- /components/esp32-port/format.sh: -------------------------------------------------------------------------------- 1 | find . -name \*.c -exec clang-format -i {} \; 2 | 3 | -------------------------------------------------------------------------------- /components/esp32-port/lcd_esp32_raw.c: -------------------------------------------------------------------------------- 1 | /** 2 | * File: lcd_stm32_raw.c 3 | * Author: AWTK Develop Team 4 | * Brief: stm32_raw implemented lcd interface 5 | * 6 | * Copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd. 7 | * 8 | * This program is distributed in the hope that it will be useful, 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 | * License file for more details. 12 | * 13 | */ 14 | 15 | /** 16 | * History: 17 | * ================================================================ 18 | * 2018-02-16 Li XianJing created 19 | * 20 | */ 21 | 22 | #include "ili9341.h" 23 | 24 | #include "lcd/lcd_reg.h" 25 | #include "stdio.h" 26 | typedef uint16_t pixel_t; 27 | 28 | #define LCD_FORMAT BITMAP_FMT_BGR565 29 | #define pixel_from_rgb(r, g, b) ((((r) >> 3) << 11) | (((g) >> 2) << 5) | ((b) >> 3)) 30 | #define pixel_to_rgba(p) {(0xff & ((p >> 11) << 3)), (0xff & ((p >> 5) << 2)), (0xff & (p << 3))} 31 | 32 | extern ili9341_lcd_t *lcd; 33 | extern void write_data_func(uint16_t dat); 34 | extern void set_window_func(uint16_t x_start, uint16_t y_start, uint16_t x_end, uint16_t y_end); 35 | 36 | void write_data_func(uint16_t dat) 37 | { 38 | ili9341_start_pixels(lcd); 39 | ili9341_write_pixel(lcd, dat); 40 | ili9341_end_pixels(lcd); 41 | } 42 | void set_window_func(uint16_t x_start, uint16_t y_start, uint16_t x_end, uint16_t y_end) 43 | { 44 | uint16_t w = (x_end - x_start + 1); 45 | uint16_t h = (y_end - y_start + 1); 46 | ESP_LOGI("LCD_SET_W", "%d-%d, %d-%d, w:%d,h:%d", x_start, x_end, y_start, y_end, w,h ); 47 | ili9341_start_pixels(lcd); 48 | ili9341_set_window(lcd, x_start, y_start, w, h); 49 | ili9341_end_pixels(lcd); 50 | } 51 | 52 | #include "base/pixel.h" 53 | #include "blend/pixel_ops.inc" 54 | #include "lcd/lcd_reg.inc" 55 | -------------------------------------------------------------------------------- /components/esp32-port/main_loop_esp32_raw.c: -------------------------------------------------------------------------------- 1 | /** 2 | * file: main_loop_aworks_raw.c 3 | * Author: AWTK Develop Team 4 | * brief: main loop for aworks 5 | * 6 | * copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd. 7 | * 8 | * this program is distributed in the hope that it will be useful, 9 | * but without any warranty; without even the implied warranty of 10 | * merchantability or fitness for a particular purpose. see the 11 | * license file for more details. 12 | * 13 | */ 14 | 15 | /** 16 | * history: 17 | * ================================================================ 18 | * 2018-05-23 li xianjing created 19 | * 20 | */ 21 | 22 | #include "freertos/FreeRTOS.h" 23 | #include "freertos/task.h" 24 | #include "esp_log.h" 25 | #include "base/idle.h" 26 | #include "base/timer.h" 27 | #include "lcd/lcd_reg.h" 28 | #include "lcd/lcd_mem_bgr565.h" 29 | #include "main_loop/main_loop_simple.h" 30 | 31 | /*----------------------------------------------------------------------------*/ 32 | /* 触摸屏输入消息分派 */ 33 | /*----------------------------------------------------------------------------*/ 34 | 35 | // static struct aw_ts_state s_ts_state = {0}; 36 | typedef struct { 37 | int x; 38 | int y; 39 | int pressed; 40 | } touch_info_t; 41 | 42 | static lcd_t* platform_create_lcd(wh_t w, wh_t h) { 43 | return lcd_reg_create(w, h); 44 | } 45 | #define TS_STACK_SIZE 2 * 1024 46 | static void __awtk_loop_task_entry(void *p_arg) 47 | { 48 | int tsret = 0; 49 | touch_info_t ts_state; 50 | while (1) { 51 | memset(&ts_state, 0x00, sizeof(ts_state)); 52 | // tsret = aw_ts_exec(p_arg, &ts_state, 1); 53 | // TODO: get the touch pad information 54 | if (tsret >= 0) { 55 | // s_ts_state = ts_state; 56 | if (ts_state.pressed) { 57 | main_loop_post_pointer_event(main_loop(), ts_state.pressed, ts_state.x, 58 | ts_state.y); 59 | } else { 60 | main_loop_post_pointer_event(main_loop(), ts_state.pressed, ts_state.x, 61 | ts_state.y); 62 | } 63 | } 64 | 65 | if (ts_state.pressed) { 66 | vTaskDelay(2); 67 | } else { 68 | vTaskDelay(10); 69 | } 70 | } 71 | } 72 | ret_t platform_disaptch_input(main_loop_t* l) { 73 | return RET_OK; 74 | } 75 | 76 | // ret_t platform_disaptch_input(main_loop_t* loop) { 77 | // static TaskHandle_t loop_handle = NULL; 78 | // if(loop_handle==NULL) { 79 | // if (xTaskCreatePinnedToCore(__awtk_loop_task_entry, 80 | // "awtk_loop_task_entry", 81 | // 4096, 82 | // NULL, 83 | // 5, 84 | // &loop_handle, 0) != pdTRUE) { 85 | // ESP_LOGE("TAG", "Error create AWTK main loop task"); 86 | // } 87 | 88 | // } 89 | 90 | // return RET_OK; 91 | // } 92 | 93 | /*----------------------------------------------------------------------------*/ 94 | /* frame buffer刷新操作 */ 95 | /*----------------------------------------------------------------------------*/ 96 | // #define SUPPORT_FRAME_BUFFER 0 97 | #if 0 98 | 99 | extern uint32_t* aworks_get_online_fb(void); 100 | extern uint32_t* aworks_get_offline_fb(void); 101 | extern aw_emwin_fb_info_t* aworks_get_fb(void); 102 | extern int aworks_get_fb_size(); 103 | static lcd_flush_t s_lcd_flush_default = NULL; 104 | 105 | static ret_t lcd_aworks_fb_flush(lcd_t* lcd) { 106 | #if 0 // 是否等待垂直同步 107 | // aw_emwin_fb_vram_addr_set 与 aw_cache_flush 配合用效果最好，但有等待时间 108 | aw_emwin_fb_vram_addr_set(aworks_get_fb(), aworks_get_online_fb()); // max 13ms wait 109 | #endif 110 | 111 | if (s_lcd_flush_default != NULL) { 112 | s_lcd_flush_default(lcd); 113 | } 114 | 115 | // 单用 aw_cache_flush 能极大改善干扰线问题，但不能完全去除 116 | aw_cache_flush(aworks_get_online_fb(), aworks_get_fb_size()); // max 2ms wait 117 | return RET_OK; 118 | } 119 | 120 | #ifndef WITH_THREE_FB 121 | 122 | /*----------------------------------------------------------------------------*/ 123 | /* 双缓冲模式 */ 124 | /*----------------------------------------------------------------------------*/ 125 | 126 | static ret_t lcd_aworks_begin_frame(lcd_t* lcd, rect_t* dirty_rect) { 127 | if (lcd_is_swappable(lcd)) { 128 | lcd_mem_t* mem = (lcd_mem_t*)lcd; 129 | (void)mem; 130 | 131 | #if 0 // 拷贝上一屏数据到offline fb作为背景, begin_frame之后只绘制脏矩形区域 132 | // 当前的awtk脏矩形实现机制: 每帧begin_frame时的脏矩形是与上一帧的脏矩形合并一次 133 | // 这样, 当前帧绘制时也会把上一帧的脏区域也绘制一次, 这样就无需执行这里的memcpy(拷贝上一屏数据到offline fb作为背景) 134 | // 但如果以后awtk修改了这个机制, 就必须执行这里的memcpy了 135 | memcpy(mem->offline_fb, mem->online_fb, aworks_get_fb_size()); 136 | #endif 137 | 138 | #if 0 // 测试用代码, offline fb 填充空白, 这样可以观察每次绘制的脏矩形 139 | memset(mem->offline_fb, 0, aworks_get_fb_size()); 140 | #endif 141 | } 142 | 143 | return RET_OK; 144 | } 145 | 146 | static ret_t lcd_aworks_swap(lcd_t* lcd) { 147 | lcd_mem_t* mem = (lcd_mem_t*)lcd; 148 | 149 | uint8_t* next_online_fb = mem->offline_fb; 150 | mem->offline_fb = mem->online_fb; 151 | mem->online_fb = next_online_fb; 152 | 153 | aw_cache_flush(next_online_fb, aworks_get_fb_size()); // max 2ms wait 154 | aw_emwin_fb_vram_addr_set(aworks_get_fb(), (uintptr_t)next_online_fb); // max 13ms wait, 等待垂直同步并交换fb 155 | return RET_OK; 156 | } 157 | 158 | lcd_t* platform_create_lcd(wh_t w, wh_t h) { 159 | lcd_t* lcd = lcd_mem_bgr565_create_double_fb(w, h, (uint8_t*) aworks_get_online_fb(), 160 | (uint8_t*) aworks_get_offline_fb()); 161 | 162 | if (lcd != NULL) { 163 | // 改进flush机制, 每次flush后加入cache_flush (旋转屏幕方向后进入flush流程) 164 | s_lcd_flush_default = lcd->flush; 165 | lcd->flush = lcd_aworks_fb_flush; 166 | 167 | // 使用swap机制(正常屏幕方向进入swap流程) 168 | lcd->begin_frame = lcd_aworks_begin_frame; 169 | lcd->swap = lcd_aworks_swap; 170 | } 171 | 172 | return lcd; 173 | } 174 | 175 | #else // WITH_THREE_FB 176 | 177 | /*----------------------------------------------------------------------------*/ 178 | /* 三缓冲模式 */ 179 | /*----------------------------------------------------------------------------*/ 180 | 181 | AW_MUTEX_DECL(__lock_fblist); 182 | static uint32_t* s_fblist_readys = NULL; 183 | static uint32_t* s_fblist_frees = NULL; 184 | static uint8_t* s_dirty_offline = NULL; // 指向mem->offline_fb, 代表当前offline缓冲是否已经被写脏 185 | 186 | static uint32_t* aworks_fblist_pop_ready() { 187 | AW_MUTEX_LOCK( __lock_fblist, AW_SEM_WAIT_FOREVER ); 188 | uint32_t* fb = s_fblist_readys; 189 | s_fblist_readys = NULL; 190 | AW_MUTEX_UNLOCK(__lock_fblist); 191 | return fb; 192 | } 193 | 194 | static void aworks_fblist_push_ready(uint32_t* fb) { 195 | AW_MUTEX_LOCK( __lock_fblist, AW_SEM_WAIT_FOREVER ); 196 | assert(s_fblist_readys == NULL); 197 | s_fblist_readys = fb; 198 | AW_MUTEX_UNLOCK(__lock_fblist); 199 | } 200 | 201 | static uint32_t* aworks_fblist_pop_free() { 202 | AW_MUTEX_LOCK( __lock_fblist, AW_SEM_WAIT_FOREVER ); 203 | uint32_t* fb = s_fblist_frees; 204 | s_fblist_frees = NULL; 205 | AW_MUTEX_UNLOCK(__lock_fblist); 206 | return fb; 207 | } 208 | 209 | static void aworks_fblist_push_free(uint32_t* fb) { 210 | AW_MUTEX_LOCK( __lock_fblist, AW_SEM_WAIT_FOREVER ); 211 | assert(s_fblist_frees == NULL); 212 | s_fblist_frees = fb; 213 | AW_MUTEX_UNLOCK(__lock_fblist); 214 | } 215 | 216 | #define SWAP_STACK_SIZE 1 * 1024 217 | aw_local void __swap_task_entry(void *p_arg) 218 | { 219 | uint32_t* current_vram = (uint32_t*)p_arg; 220 | 221 | while (1) { 222 | uint32_t* ready = aworks_fblist_pop_ready(); 223 | if (ready) { 224 | uint32_t* last_online = current_vram; 225 | aw_emwin_fb_vram_addr_set(aworks_get_fb(), (uintptr_t)(current_vram = ready)); 226 | aworks_fblist_push_free(last_online); 227 | } else { 228 | aw_mdelay(2); 229 | } 230 | } 231 | } 232 | 233 | static ret_t __swap_idle_entry(const idle_info_t* idle) { 234 | lcd_mem_t* mem = (lcd_mem_t*)idle->ctx; 235 | 236 | // 检查是否有脏的offline滞留, 如果有, 则强制更新到ready, 下一次循环把最新的帧刷新到online 237 | // 并且将mem->offline_fb指向最新的free区域 238 | if (s_dirty_offline) { 239 | uint32_t* freefb = aworks_fblist_pop_free(); 240 | if (freefb) { 241 | aw_cache_flush(mem->offline_fb, aworks_get_fb_size()); 242 | aworks_fblist_push_ready((uint32_t*)mem->offline_fb); 243 | 244 | mem->offline_fb = (uint8_t*)freefb; 245 | s_dirty_offline = NULL; 246 | } 247 | } 248 | return RET_REPEAT; 249 | } 250 | 251 | static void aworks_fblist_init(lcd_t* lcd) { 252 | lcd_mem_t* mem = (lcd_mem_t*)lcd; 253 | uint32_t* frame_buffer = (uint32_t*)mem->online_fb; 254 | uint32_t* next_frame_buffer = (uint32_t*)mem->next_fb; 255 | int fb_size = aworks_get_fb_size(); 256 | 257 | assert(frame_buffer && next_frame_buffer); 258 | memset(next_frame_buffer, 0x00, fb_size); 259 | 260 | AW_MUTEX_INIT(__lock_fblist, AW_SEM_INVERSION_SAFE); 261 | s_fblist_frees = next_frame_buffer; 262 | s_fblist_readys = NULL; 263 | s_dirty_offline = NULL; 264 | 265 | AW_TASK_DECL_STATIC(swap_task, SWAP_STACK_SIZE); 266 | AW_TASK_INIT(swap_task, /* 任务实体 */ 267 | "swap_task", /* 任务名字 */ 268 | 1, /* 任务优先级 */ 269 | SWAP_STACK_SIZE, /* 任务堆栈大小 */ 270 | __swap_task_entry, /* 任务入口函数 */ 271 | frame_buffer); /* 任务入口参数 */ 272 | AW_TASK_STARTUP(swap_task); /* 启动任务 */ 273 | 274 | // 创建idle任务(同gui线程), 检查是否有滞留的脏offline缓冲, 并刷新到online 275 | idle_add(__swap_idle_entry, lcd); 276 | } 277 | 278 | static ret_t lcd_aworks_begin_frame(lcd_t* lcd, rect_t* dirty_rect) { 279 | if (lcd_is_swappable(lcd)) { 280 | lcd_mem_t* mem = (lcd_mem_t*)lcd; 281 | (void)mem; 282 | s_dirty_offline = NULL; // 新的一帧开始绘制 283 | } 284 | return RET_OK; 285 | } 286 | 287 | static ret_t lcd_aworks_swap(lcd_t* lcd) { 288 | lcd_mem_t* mem = (lcd_mem_t*)lcd; 289 | 290 | uint32_t* freefb = aworks_fblist_pop_free(); 291 | if (freefb) { 292 | aw_cache_flush(mem->offline_fb, aworks_get_fb_size()); 293 | aworks_fblist_push_ready((uint32_t*)mem->offline_fb); 294 | 295 | mem->offline_fb = (uint8_t*)freefb; 296 | } else { 297 | // 当前帧已经被更新到offline, 但由于没有可切换的free缓冲器(正在swap过程中) 298 | // 所以当前offline没有被及时更新到ready区, 会导致最后一帧内容滞留在offline中 299 | // 需要swap线程检测出来并强制将最新的offline放回ready, 保证最新的内容更新到online 300 | // 301 | s_dirty_offline = mem->offline_fb; 302 | } 303 | return RET_OK; 304 | } 305 | 306 | lcd_t* platform_create_lcd(wh_t w, wh_t h) { 307 | lcd_t* lcd = lcd_mem_bgr565_create_three_fb(w, h, (uint8_t*) aworks_get_online_fb(), 308 | (uint8_t*) aworks_get_offline_fb(), aw_mem_align(aworks_get_fb_size(), AW_CACHE_LINE_SIZE)); 309 | 310 | if (lcd != NULL) { 311 | // 改进flush机制, 每次flush后加入cache_flush (旋转屏幕方向后进入flush流程) 312 | s_lcd_flush_default = lcd->flush; 313 | lcd->flush = lcd_aworks_fb_flush; 314 | 315 | // 使用swap机制(正常屏幕方向进入swap流程) 316 | lcd->begin_frame = lcd_aworks_begin_frame; 317 | lcd->swap = lcd_aworks_swap; 318 | } 319 | 320 | aworks_fblist_init(lcd); 321 | return lcd; 322 | } 323 | 324 | #endif // WITH_THREE_FB 325 | 326 | #endif // SUPPORT_FRAME_BUFFER 327 | 328 | #include "main_loop/main_loop_raw.inc" 329 | -------------------------------------------------------------------------------- /components/esp32-port/platform.c: -------------------------------------------------------------------------------- 1 | /** 2 | * File: platform.c 3 | * Author: AWTK Develop Team 4 | * Brief: platform dependent function of stm32 5 | * 6 | * Copyright (c) 2018 - 2018 Guangzhou ZHIYUAN Electronics Co.,Ltd. 7 | * 8 | * this program is distributed in the hope that it will be useful, 9 | * but without any warranty; without even the implied warranty of 10 | * merchantability or fitness for a particular purpose. see the 11 | * license file for more details. 12 | * 13 | */ 14 | 15 | /** 16 | * history: 17 | * ================================================================ 18 | * 2018-10-20 li xianjing created 19 | * 20 | */ 21 | 22 | #include "tkc/mem.h" 23 | #include "base/timer.h" 24 | #include "tkc/types_def.h" 25 | #include "tkc/date_time.h" 26 | 27 | #include "freertos/FreeRTOS.h" 28 | #include "freertos/semphr.h" 29 | #include "freertos/task.h" 30 | #include 31 | #include 32 | 33 | static bool_t s_inited = FALSE; 34 | #define AWTK_MEM_SIZE 1 * 1024 * 1024 35 | 36 | static ret_t date_time_get_now_impl(date_time_t* dt) { 37 | time_t now = time(0); 38 | struct tm timeinfo; 39 | localtime_r(&now, &timeinfo); 40 | dt->second = timeinfo.tm_sec; 41 | dt->minute = timeinfo.tm_min; 42 | dt->hour = timeinfo.tm_hour; 43 | dt->day = timeinfo.tm_mday; 44 | dt->month = timeinfo.tm_mon + 1; 45 | dt->year = timeinfo.tm_year + 1900; 46 | dt->wday = timeinfo.tm_wday; 47 | 48 | return RET_OK; 49 | } 50 | 51 | ret_t platform_prepare(void) { 52 | if(!s_inited) { 53 | s_inited = TRUE; 54 | uint32_t* s_heam_mem = heap_caps_malloc(AWTK_MEM_SIZE, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT); 55 | if (s_heam_mem == NULL) { 56 | log_error("s_heam_mem allocate %d bytes memory fail", AWTK_MEM_SIZE); 57 | } 58 | tk_mem_init(s_heam_mem, AWTK_MEM_SIZE); 59 | } 60 | date_time_set_impl(date_time_get_now_impl); 61 | return RET_OK; 62 | } 63 | -------------------------------------------------------------------------------- /components/lcd_driver/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(COMPONENT_SRCS "esp32-spi.c" "ili9341.c") 2 | set(COMPONENT_ADD_INCLUDEDIRS "ili9341.h" "esp32-spi.h") 3 | 4 | register_component() 5 | -------------------------------------------------------------------------------- /components/lcd_driver/component.mk: -------------------------------------------------------------------------------- 1 | # 2 | # "main" pseudo-component makefile. 3 | # 4 | # (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.) 5 | 6 | COMPONENT_ADD_INCLUDEDIRS := ./ 7 | COMPONENT_SRCDIRS := ./ 8 | -------------------------------------------------------------------------------- /components/lcd_driver/esp32-spi.c: -------------------------------------------------------------------------------- 1 | // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD 2 | // 3 | // Licensed under the Apache License, Version 2.0 (the "License"); 4 | // you may not use this file except in compliance with the License. 5 | // You may obtain a copy of the License at 6 | 7 | // http://www.apache.org/licenses/LICENSE-2.0 8 | // 9 | // Unless required by applicable law or agreed to in writing, software 10 | // distributed under the License is distributed on an "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | // See the License for the specific language governing permissions and 13 | // limitations under the License. 14 | 15 | #include 16 | #include "esp32-spi.h" 17 | #include "freertos/FreeRTOS.h" 18 | #include "freertos/task.h" 19 | #include "freertos/semphr.h" 20 | #include "rom/ets_sys.h" 21 | #include "esp_attr.h" 22 | #include "esp_intr.h" 23 | #include "rom/gpio.h" 24 | #include "soc/spi_reg.h" 25 | #include "soc/spi_struct.h" 26 | #include "soc/io_mux_reg.h" 27 | #include "soc/gpio_sig_map.h" 28 | #include "soc/dport_reg.h" 29 | #include "soc/rtc.h" 30 | 31 | 32 | #define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0)))) 33 | #define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0)))) 34 | #define SPI_MOSI_IDX(p) ((p==0)?SPID_IN_IDX:((p==1)?SPID_IN_IDX:((p==2)?HSPID_IN_IDX:((p==3)?VSPID_IN_IDX:0)))) 35 | 36 | #define SPI_SPI_SS_IDX(n) ((n==0)?SPICS0_OUT_IDX:((n==1)?SPICS1_OUT_IDX:((n==2)?SPICS2_OUT_IDX:SPICS0_OUT_IDX))) 37 | #define SPI_HSPI_SS_IDX(n) ((n==0)?HSPICS0_OUT_IDX:((n==1)?HSPICS1_OUT_IDX:((n==2)?HSPICS2_OUT_IDX:HSPICS0_OUT_IDX))) 38 | #define SPI_VSPI_SS_IDX(n) ((n==0)?VSPICS0_OUT_IDX:((n==1)?VSPICS1_OUT_IDX:((n==2)?VSPICS2_OUT_IDX:VSPICS0_OUT_IDX))) 39 | #define SPI_SS_IDX(p, n) ((p==0)?SPI_SPI_SS_IDX(n):((p==1)?SPI_SPI_SS_IDX(n):((p==2)?SPI_HSPI_SS_IDX(n):((p==3)?SPI_VSPI_SS_IDX(n):0)))) 40 | 41 | #define SPI_INUM(u) (2) 42 | #define SPI_INTR_SOURCE(u) ((u==0)?ETS_SPI0_INTR_SOURCE:((u==1)?ETS_SPI1_INTR_SOURCE:((u==2)?ETS_SPI2_INTR_SOURCE:((p==3)?ETS_SPI3_INTR_SOURCE:0)))) 43 | 44 | struct spi_struct_t { 45 | spi_dev_t * dev; 46 | uint8_t num; 47 | uint32_t tmp[16]; 48 | }; 49 | 50 | static spi_t _spi_bus_array[4] = { 51 | {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), 0, {0,}}, 52 | {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), 1, {0,}}, 53 | {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), 2, {0,}}, 54 | {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), 3, {0,}} 55 | }; 56 | 57 | typedef union { 58 | uint32_t value; 59 | struct { 60 | uint32_t clkcnt_l: 6; /*it must be equal to spi_clkcnt_N.*/ 61 | uint32_t clkcnt_h: 6; /*it must be floor((spi_clkcnt_N+1)/2-1).*/ 62 | uint32_t clkcnt_n: 6; /*it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)*/ 63 | uint32_t clkdiv_pre: 13; /*it is pre-divider of spi_clk.*/ 64 | uint32_t clk_equ_sysclk: 1; /*1: spi_clk is eqaul to system 0: spi_clk is divided from system clock.*/ 65 | }; 66 | } spiClk_t; 67 | 68 | #define ClkRegToFreq(reg) (apb_freq / (((reg)->clkdiv_pre + 1) * ((reg)->clkcnt_n + 1))) 69 | 70 | uint32_t spi_frequency_to_div(uint32_t freq) 71 | { 72 | uint32_t apb_freq = 80000000UL; 73 | 74 | if(freq >= apb_freq) { 75 | return SPI_CLK_EQU_SYSCLK; 76 | } 77 | 78 | const spiClk_t minFreqReg = { 0x7FFFF000 }; 79 | uint32_t minFreq = ClkRegToFreq((spiClk_t*) &minFreqReg); 80 | if(freq < minFreq) { 81 | return minFreqReg.value; 82 | } 83 | 84 | uint8_t calN = 1; 85 | spiClk_t bestReg = { 0 }; 86 | int32_t bestFreq = 0; 87 | 88 | while(calN <= 0x3F) { 89 | spiClk_t reg = { 0 }; 90 | int32_t calFreq; 91 | int32_t calPre; 92 | int8_t calPreVari = -2; 93 | 94 | reg.clkcnt_n = calN; 95 | 96 | while(calPreVari++ <= 1) { 97 | calPre = (((apb_freq / (reg.clkcnt_n + 1)) / freq) - 1) + calPreVari; 98 | if(calPre > 0x1FFF) { 99 | reg.clkdiv_pre = 0x1FFF; 100 | } else if(calPre <= 0) { 101 | reg.clkdiv_pre = 0; 102 | } else { 103 | reg.clkdiv_pre = calPre; 104 | } 105 | reg.clkcnt_l = ((reg.clkcnt_n + 1) / 2); 106 | calFreq = ClkRegToFreq(®); 107 | if(calFreq == (int32_t) freq) { 108 | memcpy(&bestReg, ®, sizeof(bestReg)); 109 | break; 110 | } else if(calFreq < (int32_t) freq) { 111 | if(abs(freq - calFreq) < abs(freq - bestFreq)) { 112 | bestFreq = calFreq; 113 | memcpy(&bestReg, ®, sizeof(bestReg)); 114 | } 115 | } 116 | } 117 | if(calFreq == (int32_t) freq) { 118 | break; 119 | } 120 | calN++; 121 | } 122 | return bestReg.value; 123 | } 124 | 125 | static void pinMode(int8_t pin, gpio_mode_t mode) 126 | { 127 | gpio_config_t conf = { 128 | .pin_bit_mask = 1LL << pin, 129 | .mode = mode, 130 | .pull_up_en = GPIO_PULLDOWN_DISABLE, 131 | .pull_down_en = GPIO_PULLDOWN_DISABLE, 132 | .intr_type = GPIO_INTR_DISABLE 133 | }; 134 | gpio_config(&conf); 135 | } 136 | 137 | 138 | void spi_init(uint8_t spi_num, int8_t sck, int8_t miso, int8_t mosi, uint32_t freq, uint8_t dataMode, uint8_t bitOrder) 139 | { 140 | if(spi_num > 3){ 141 | return; 142 | } 143 | 144 | spi_t * spi = &_spi_bus_array[spi_num]; 145 | 146 | if(spi_num == HSPI) { 147 | DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN); 148 | DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST); 149 | } else if(spi_num == VSPI) { 150 | DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_2); 151 | DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_2); 152 | } else { 153 | DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_1); 154 | DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_1); 155 | } 156 | 157 | spi->dev->slave.trans_done = 0; 158 | spi->dev->slave.slave_mode = 0; 159 | spi->dev->pin.val = 0; 160 | spi->dev->user.val = 0; 161 | spi->dev->user1.val = 0; 162 | spi->dev->ctrl.val = 0; 163 | spi->dev->ctrl1.val = 0; 164 | spi->dev->ctrl2.val = 0; 165 | spi->dev->clock.val = 0; 166 | 167 | switch (dataMode) { 168 | case SPI_MODE1: 169 | spi->dev->pin.ck_idle_edge = 0; 170 | spi->dev->user.ck_out_edge = 1; 171 | break; 172 | case SPI_MODE2: 173 | spi->dev->pin.ck_idle_edge = 1; 174 | spi->dev->user.ck_out_edge = 1; 175 | break; 176 | case SPI_MODE3: 177 | spi->dev->pin.ck_idle_edge = 1; 178 | spi->dev->user.ck_out_edge = 0; 179 | break; 180 | case SPI_MODE0: 181 | default: 182 | spi->dev->pin.ck_idle_edge = 0; 183 | spi->dev->user.ck_out_edge = 0; 184 | break; 185 | } 186 | 187 | if (SPI_MSBFIRST == bitOrder) { 188 | spi->dev->ctrl.wr_bit_order = 0; 189 | spi->dev->ctrl.rd_bit_order = 0; 190 | } else if (SPI_LSBFIRST == bitOrder) { 191 | spi->dev->ctrl.wr_bit_order = 1; 192 | spi->dev->ctrl.rd_bit_order = 1; 193 | } 194 | 195 | spi->dev->clock.val = spi_frequency_to_div(freq); 196 | 197 | spi->dev->user.usr_mosi = 1;//mosi >= 0; 198 | spi->dev->user.usr_miso = 1;//miso >= 0; 199 | spi->dev->user.doutdin = 1;//(mosi >= 0) && (miso >= 0); 200 | 201 | int i; 202 | for(i=0; i<16; i++) { 203 | spi->dev->data_buf[i] = 0x00000000; 204 | } 205 | 206 | if (sck >= 0) { 207 | pinMode(sck, GPIO_MODE_OUTPUT); 208 | gpio_matrix_out(sck, SPI_CLK_IDX(spi_num), false, false); 209 | } 210 | 211 | if (mosi >= 0) { 212 | pinMode(mosi, GPIO_MODE_OUTPUT); 213 | gpio_matrix_out(mosi, SPI_MOSI_IDX(spi_num), false, false); 214 | } 215 | 216 | if (miso >= 0) { 217 | pinMode(miso, GPIO_MODE_INPUT); 218 | gpio_matrix_in(miso, SPI_MISO_IDX(spi_num), false); 219 | } 220 | 221 | return; 222 | } 223 | 224 | #define SPI_MUTEX_LOCK() //do {} while (xSemaphoreTake(spi->lock, portMAX_DELAY) != pdPASS) 225 | #define SPI_MUTEX_UNLOCK() //xSemaphoreGive(spi->lock) 226 | 227 | void spi_begin_transaction(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder) 228 | { 229 | if(spi_num > 3){ 230 | return; 231 | } 232 | 233 | spi_t * spi = &_spi_bus_array[spi_num]; 234 | SPI_MUTEX_LOCK(); 235 | spi->dev->clock.val = clockDiv; 236 | switch (dataMode) { 237 | case SPI_MODE1: 238 | spi->dev->pin.ck_idle_edge = 0; 239 | spi->dev->user.ck_out_edge = 1; 240 | break; 241 | case SPI_MODE2: 242 | spi->dev->pin.ck_idle_edge = 1; 243 | spi->dev->user.ck_out_edge = 1; 244 | break; 245 | case SPI_MODE3: 246 | spi->dev->pin.ck_idle_edge = 1; 247 | spi->dev->user.ck_out_edge = 0; 248 | break; 249 | case SPI_MODE0: 250 | default: 251 | spi->dev->pin.ck_idle_edge = 0; 252 | spi->dev->user.ck_out_edge = 0; 253 | break; 254 | } 255 | if (SPI_MSBFIRST == bitOrder) { 256 | spi->dev->ctrl.wr_bit_order = 0; 257 | spi->dev->ctrl.rd_bit_order = 0; 258 | } else if (SPI_LSBFIRST == bitOrder) { 259 | spi->dev->ctrl.wr_bit_order = 1; 260 | spi->dev->ctrl.rd_bit_order = 1; 261 | } 262 | } 263 | 264 | void spi_end_transaction(uint8_t spi_num) 265 | { 266 | if(spi_num > 3){ 267 | return; 268 | } 269 | 270 | spi_t * spi = &_spi_bus_array[spi_num]; 271 | SPI_MUTEX_UNLOCK(); 272 | } 273 | 274 | uint8_t spi_transfer_byte(uint8_t spi_num, uint8_t data) 275 | { 276 | if(spi_num > 3){ 277 | return 0xFF; 278 | } 279 | 280 | spi_t * spi = &_spi_bus_array[spi_num]; 281 | spi->dev->user.usr_mosi = 1; 282 | spi->dev->user.usr_miso = 1; 283 | spi->dev->user.doutdin = 1; 284 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 7; 285 | spi->dev->miso_dlen.usr_miso_dbitlen = 7; 286 | spi->dev->data_buf[0] = data; 287 | spi->dev->cmd.usr = 1; 288 | while(spi->dev->cmd.usr); 289 | data = spi->dev->data_buf[0] & 0xFF; 290 | return data; 291 | } 292 | 293 | void spi_write_byte(uint8_t spi_num, uint8_t data) 294 | { 295 | if(spi_num > 3){ 296 | return; 297 | } 298 | 299 | spi_t * spi = &_spi_bus_array[spi_num]; 300 | spi->dev->user.usr_mosi = 1; 301 | spi->dev->user.usr_miso = 0; 302 | spi->dev->user.doutdin = 0; 303 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 7; 304 | spi->dev->miso_dlen.usr_miso_dbitlen = 0; 305 | spi->dev->data_buf[0] = data; 306 | spi->dev->cmd.usr = 1; 307 | while(spi->dev->cmd.usr); 308 | spi->dev->user.usr_mosi = 1; 309 | spi->dev->user.usr_miso = 1; 310 | spi->dev->user.doutdin = 1; 311 | } 312 | 313 | #define MSB_16_SET(var, val) { (var) = (((val) & 0xFF00) >> 8) | (((val) & 0xFF) << 8); } 314 | void spi_write_short(uint8_t spi_num, uint16_t data) 315 | { 316 | if(spi_num > 3){ 317 | return; 318 | } 319 | 320 | spi_t * spi = &_spi_bus_array[spi_num]; 321 | spi->dev->user.usr_mosi = 1; 322 | spi->dev->user.usr_miso = 0; 323 | spi->dev->user.doutdin = 0; 324 | if(!spi->dev->ctrl.wr_bit_order){ 325 | MSB_16_SET(data, data); 326 | } 327 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 15; 328 | spi->dev->miso_dlen.usr_miso_dbitlen = 0; 329 | spi->dev->data_buf[0] = data; 330 | spi->dev->cmd.usr = 1; 331 | while(spi->dev->cmd.usr); 332 | spi->dev->user.usr_mosi = 1; 333 | spi->dev->user.usr_miso = 1; 334 | spi->dev->user.doutdin = 1; 335 | } 336 | 337 | #define MSB_32_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[3] | (d[2] << 8) | (d[1] << 16) | (d[0] << 24); } 338 | void spi_write_long(uint8_t spi_num, uint32_t data) 339 | { 340 | if(spi_num > 3){ 341 | return; 342 | } 343 | 344 | spi_t * spi = &_spi_bus_array[spi_num]; 345 | spi->dev->user.usr_mosi = 1; 346 | spi->dev->user.usr_miso = 0; 347 | spi->dev->user.doutdin = 0; 348 | if(!spi->dev->ctrl.wr_bit_order){ 349 | MSB_32_SET(data, data); 350 | } 351 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 31; 352 | spi->dev->miso_dlen.usr_miso_dbitlen = 0; 353 | spi->dev->data_buf[0] = data; 354 | spi->dev->cmd.usr = 1; 355 | while(spi->dev->cmd.usr); 356 | spi->dev->user.usr_mosi = 1; 357 | spi->dev->user.usr_miso = 1; 358 | spi->dev->user.doutdin = 1; 359 | } 360 | 361 | void spi_write(uint8_t spi_num, const void * data_in, size_t len){ 362 | if(spi_num > 3){ 363 | return; 364 | } 365 | 366 | spi_t * spi = &_spi_bus_array[spi_num]; 367 | 368 | uint32_t * data = (uint32_t*)data_in; 369 | size_t longs = len >> 2; 370 | if(len & 3){ 371 | longs++; 372 | } 373 | 374 | spi->dev->user.usr_mosi = 1; 375 | spi->dev->user.usr_miso = 0; 376 | spi->dev->user.doutdin = 0; 377 | spi->dev->miso_dlen.usr_miso_dbitlen = 0; 378 | 379 | if(len > 64) { 380 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 511; 381 | while(len > 64){ 382 | for (int i=0; i<16; i++) { 383 | spi->dev->data_buf[i] = data[i]; 384 | } 385 | spi->dev->cmd.usr = 1; 386 | data += 16; 387 | longs -= 16; 388 | len -= 64; 389 | while(spi->dev->cmd.usr); 390 | } 391 | } 392 | 393 | if(len){ 394 | spi->dev->mosi_dlen.usr_mosi_dbitlen = (len*8)-1; 395 | for (int i=0; idev->data_buf[i] = data[i]; 397 | } 398 | spi->dev->cmd.usr = 1; 399 | while(spi->dev->cmd.usr); 400 | } 401 | 402 | spi->dev->user.usr_mosi = 1; 403 | spi->dev->user.usr_miso = 1; 404 | spi->dev->user.doutdin = 1; 405 | } 406 | 407 | void spi_read(uint8_t spi_num, void * data_out, size_t len){ 408 | if(spi_num > 3){ 409 | return; 410 | } 411 | 412 | spi_t * spi = &_spi_bus_array[spi_num]; 413 | 414 | uint32_t * data = (uint32_t*)data_out; 415 | uint32_t temp = 0; 416 | size_t longs = len >> 2; 417 | if(len & 3){ 418 | longs++; 419 | } 420 | 421 | spi->dev->user.usr_mosi = 0; 422 | spi->dev->user.usr_miso = 1; 423 | spi->dev->user.doutdin = 0; 424 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 0; 425 | 426 | if(len > 64) { 427 | spi->dev->miso_dlen.usr_miso_dbitlen = 511; 428 | while(len > 64){ 429 | spi->dev->cmd.usr = 1; 430 | while(spi->dev->cmd.usr); 431 | for (int i=0; i<16; i++) { 432 | data[i] = spi->dev->data_buf[i]; 433 | } 434 | data += 16; 435 | longs -= 16; 436 | len -= 64; 437 | } 438 | } 439 | 440 | if(len){ 441 | spi->dev->miso_dlen.usr_miso_dbitlen = (len*8)-1; 442 | spi->dev->cmd.usr = 1; 443 | while(spi->dev->cmd.usr); 444 | for (int i=0; idev->data_buf[i]; 447 | memcpy(&data[i], &temp, len & 3); 448 | } else { 449 | data[i] = spi->dev->data_buf[i]; 450 | } 451 | } 452 | } 453 | 454 | spi->dev->user.usr_mosi = 1; 455 | spi->dev->user.usr_miso = 1; 456 | spi->dev->user.doutdin = 1; 457 | } 458 | 459 | void spi_transfer(uint8_t spi_num, const void * data_in, void * data_out, size_t len){ 460 | if(spi_num > 3 || len == 0 || (data_in == NULL && data_out == NULL)){ 461 | return; 462 | } 463 | 464 | if(data_in == NULL){ 465 | return spi_read(spi_num, data_out, len); 466 | } else if(data_out == NULL){ 467 | return spi_write(spi_num, data_in, len); 468 | } 469 | 470 | spi_t * spi = &_spi_bus_array[spi_num]; 471 | 472 | uint32_t * data_o = (uint32_t*)data_out; 473 | uint32_t * data_i = (uint32_t*)data_in; 474 | uint32_t temp = 0; 475 | size_t longs = len >> 2; 476 | if(len & 3){ 477 | longs++; 478 | } 479 | 480 | spi->dev->user.usr_mosi = 1; 481 | spi->dev->user.usr_miso = 1; 482 | spi->dev->user.doutdin = 1; 483 | 484 | if(len > 64) { 485 | spi->dev->miso_dlen.usr_miso_dbitlen = 511; 486 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 511; 487 | while(len > 64){ 488 | for (int i=0; i<16; i++) { 489 | spi->dev->data_buf[i] = data_i[i]; 490 | } 491 | spi->dev->cmd.usr = 1; 492 | while(spi->dev->cmd.usr); 493 | for (int i=0; i<16; i++) { 494 | data_o[i] = spi->dev->data_buf[i]; 495 | } 496 | data_o += 16; 497 | data_i += 16; 498 | longs -= 16; 499 | len -= 64; 500 | } 501 | } 502 | 503 | if(len){ 504 | spi->dev->miso_dlen.usr_miso_dbitlen = (len*8)-1; 505 | spi->dev->mosi_dlen.usr_mosi_dbitlen = (len*8)-1; 506 | for (int i=0; idev->data_buf[i] = data_i[i]; 508 | } 509 | spi->dev->cmd.usr = 1; 510 | while(spi->dev->cmd.usr); 511 | for (int i=0; idev->data_buf[i]; 514 | memcpy(&data_o[i], &temp, len & 3); 515 | } else { 516 | data_o[i] = spi->dev->data_buf[i]; 517 | } 518 | } 519 | } 520 | } 521 | 522 | #define MSB_PIX_SET(var, val) { uint8_t * d = (uint8_t *)&(val); (var) = d[1] | (d[0] << 8) | (d[3] << 16) | (d[2] << 24); } 523 | 524 | void spi_write_pixels(uint8_t spi_num, const void * data_in, size_t len){ 525 | if(spi_num > 3){ 526 | return; 527 | } 528 | len *= 2; 529 | 530 | spi_t * spi = &_spi_bus_array[spi_num]; 531 | uint32_t * data = (uint32_t*)data_in; 532 | 533 | size_t longs = len >> 2; 534 | if(len & 3){ 535 | longs++; 536 | } 537 | while(spi->dev->cmd.usr); 538 | 539 | spi->dev->user.usr_mosi = 1; 540 | spi->dev->user.usr_miso = 0; 541 | spi->dev->user.doutdin = 0; 542 | spi->dev->miso_dlen.usr_miso_dbitlen = 0; 543 | 544 | if(len > 64) { 545 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 511; 546 | while(len > 64){ 547 | for (int i=0; i<16; i++) { 548 | MSB_PIX_SET(spi->tmp[i], data[i]); 549 | } 550 | data += 16; 551 | longs -= 16; 552 | len -= 64; 553 | while(spi->dev->cmd.usr); 554 | for (int i=0; i<16; i++) { 555 | spi->dev->data_buf[i] = spi->tmp[i]; 556 | } 557 | spi->dev->cmd.usr = 1; 558 | } 559 | } 560 | 561 | if(len){ 562 | for (int i=0; itmp[i], data[i]); 564 | } 565 | while(spi->dev->cmd.usr); 566 | spi->dev->mosi_dlen.usr_mosi_dbitlen = (len*8)-1; 567 | for (int i=0; idev->data_buf[i] = spi->tmp[i]; 569 | } 570 | spi->dev->cmd.usr = 1; 571 | } 572 | while(spi->dev->cmd.usr); 573 | 574 | spi->dev->user.usr_mosi = 1; 575 | spi->dev->user.usr_miso = 1; 576 | spi->dev->user.doutdin = 1; 577 | } 578 | 579 | void spi_write_color(uint8_t spi_num, uint16_t color, size_t len){ 580 | if(spi_num > 3){ 581 | return; 582 | } 583 | len *= 2; 584 | color = color >> 8 | color << 8; 585 | 586 | spi_t * spi = &_spi_bus_array[spi_num]; 587 | uint32_t data = color << 16 | color; 588 | size_t longs = len >> 2; 589 | if(len & 3){ 590 | longs++; 591 | } 592 | 593 | spi->dev->user.usr_mosi = 1; 594 | spi->dev->user.usr_miso = 0; 595 | spi->dev->user.doutdin = 0; 596 | spi->dev->miso_dlen.usr_miso_dbitlen = 0; 597 | 598 | if(len > 64) { 599 | spi->dev->mosi_dlen.usr_mosi_dbitlen = 511; 600 | while(len > 64){ 601 | for (int i=0; i<16; i++) { 602 | spi->dev->data_buf[i] = data; 603 | } 604 | spi->dev->cmd.usr = 1; 605 | longs -= 16; 606 | len -= 64; 607 | while(spi->dev->cmd.usr); 608 | } 609 | } 610 | 611 | if(len){ 612 | spi->dev->mosi_dlen.usr_mosi_dbitlen = (len*8)-1; 613 | for (int i=0; idev->data_buf[i] = data; 615 | } 616 | spi->dev->cmd.usr = 1; 617 | while(spi->dev->cmd.usr); 618 | } 619 | 620 | spi->dev->user.usr_mosi = 1; 621 | spi->dev->user.usr_miso = 1; 622 | spi->dev->user.doutdin = 1; 623 | } 624 | 625 | //Select DMA channel. 626 | // DPORT_SET_PERI_REG_BITS(DPORT_SPI_DMA_CHAN_SEL_REG, 3, dma_chan, ((host - 1) * 2)); 627 | 628 | -------------------------------------------------------------------------------- /components/lcd_driver/esp32-spi.h: -------------------------------------------------------------------------------- 1 | // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD 2 | // 3 | // Licensed under the Apache License, Version 2.0 (the "License"); 4 | // you may not use this file except in compliance with the License. 5 | // You may obtain a copy of the License at 6 | 7 | // http://www.apache.org/licenses/LICENSE-2.0 8 | // 9 | // Unless required by applicable law or agreed to in writing, software 10 | // distributed under the License is distributed on an "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | // See the License for the specific language governing permissions and 13 | // limitations under the License. 14 | 15 | #ifndef _ESP32_SPI_H_ 16 | #define _ESP32_SPI_H_ 17 | 18 | #ifdef __cplusplus 19 | extern "C" { 20 | #endif 21 | 22 | #include 23 | #include 24 | #include "esp_types.h" 25 | 26 | #define FSPI 1 //SPI bus attached to the flash (can use the same data lines but different SS) 27 | #define HSPI 2 //SPI bus normally mapped to pins 12 - 15, but can be matrixed to any pins 28 | #define VSPI 3 //SPI bus normally attached to pins 5, 18, 19 and 23, but can be matrixed to any pins 29 | 30 | #define SPI_MODE0 0 31 | #define SPI_MODE1 1 32 | #define SPI_MODE2 2 33 | #define SPI_MODE3 3 34 | 35 | #define SPI_LSBFIRST 0 36 | #define SPI_MSBFIRST 1 37 | 38 | struct spi_struct_t; 39 | typedef struct spi_struct_t spi_t; 40 | 41 | void spi_init(uint8_t spi_num, int8_t sck, int8_t miso, int8_t mosi, uint32_t freq, uint8_t dataMode, uint8_t bitOrder); 42 | 43 | void spi_begin_transaction(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder); 44 | void spi_end_transaction(uint8_t spi_num); 45 | 46 | void spi_write(uint8_t spi_num, const void * data, size_t len); 47 | void spi_read(uint8_t spi_num, void * data, size_t len); 48 | void spi_transfer(uint8_t spi_num, const void * data_in, void * data_out, size_t len); 49 | 50 | uint8_t spi_transfer_byte(uint8_t spi_num, uint8_t data); 51 | void spi_write_byte(uint8_t spi_num, uint8_t data); 52 | void spi_write_short(uint8_t spi_num, uint16_t data); 53 | void spi_write_long(uint8_t spi_num, uint32_t data); 54 | 55 | void spi_write_pixels(uint8_t spi_num, const void * data, size_t len); 56 | void spi_write_color(uint8_t spi_num, uint16_t color, size_t len); 57 | 58 | uint32_t spi_frequency_to_div(uint32_t freq); 59 | 60 | #ifdef __cplusplus 61 | } 62 | #endif 63 | 64 | #endif /* _ESP32_SPI_H_ */ 65 | -------------------------------------------------------------------------------- /components/lcd_driver/ili9341.c: -------------------------------------------------------------------------------- 1 | // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD 2 | // 3 | // Licensed under the Apache License, Version 2.0 (the "License"); 4 | // you may not use this file except in compliance with the License. 5 | // You may obtain a copy of the License at 6 | 7 | // http://www.apache.org/licenses/LICENSE-2.0 8 | // 9 | // Unless required by applicable law or agreed to in writing, software 10 | // distributed under the License is distributed on an "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | // See the License for the specific language governing permissions and 13 | // limitations under the License. 14 | 15 | #include 16 | #include 17 | #include 18 | #include 19 | #include "sdkconfig.h" 20 | #include "rom/ets_sys.h" 21 | #include "rom/gpio.h" 22 | #include "soc/gpio_reg.h" 23 | #include "soc/gpio_sig_map.h" 24 | #include "soc/gpio_struct.h" 25 | #include "soc/io_mux_reg.h" 26 | #include "soc/spi_reg.h" 27 | #include "soc/spi_struct.h" 28 | #include "freertos/FreeRTOS.h" 29 | #include "freertos/semphr.h" 30 | #include "freertos/task.h" 31 | #include "ili9341.h" 32 | 33 | const uint8_t ili9341_init_data[] = { 34 | 0xEF, 3, 0x03,0x80,0x02, 35 | 0xCF, 3, 0x00,0XC1,0X30, 36 | 0xED, 4, 0x64,0x03,0X12,0X81, 37 | 0xE8, 3, 0x85,0x00,0x78, 38 | 0xCB, 5, 0x39,0x2C,0x00,0x34,0x02, 39 | 0xF7, 1, 0x20, 40 | 0xEA, 2, 0x00,0x00, 41 | 0xC0, 1, 0x23, 42 | 0xC1, 1, 0x10, 43 | 0xC5, 2, 0x3e,0x28, 44 | 0xC7, 1, 0x86, 45 | 0x36, 1, 0x48, 46 | 0x3A, 1, 0x55, 47 | 0xB1, 2, 0x00,0x18, 48 | 0xB6, 3, 0x08,0x82,0x27, 49 | 0xF2, 1, 0x00, 50 | 0x26, 1, 0x01, 51 | 0xE0, 15, 0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,0x0E,0x09,0x00, 52 | 0xE1, 15, 0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,0x08,0x0F,0x0C,0x31,0x36,0x0F, 53 | 0x00 54 | }; 55 | 56 | const uint8_t st7789v_init_data[] = { 57 | 0x36, 1, 0, 58 | 0x3A, 1, 0x55, 59 | 0xB2, 5, 0x0C,0x0C,0x00,0x33,0x33, 60 | 0xB7, 1, 0x35, 61 | 0xBB, 1, 0x2B, 62 | 0xC0, 1, 0x2C, 63 | 0xC2, 2, 0x01,0xFF, 64 | 0xC3, 1, 0x11, 65 | 0xC4, 1, 0x20, 66 | 0xC6, 1, 0x0F, 67 | 0xD0, 2, 0xA4,0xA1, 68 | 0xE0, 14, 0xD0,0x00,0x05,0x0E,0x15,0x0D,0x37,0x43,0x47,0x09,0x15,0x12,0x16,0x19, 69 | 0xE1, 14, 0xD0,0x00,0x05,0x0D,0x0C,0x06,0x2D,0x44,0x40,0x0E,0x1C,0x18,0x16,0x19, 70 | 0x00 71 | }; 72 | 73 | typedef struct ili9341_lcd_s { 74 | uint32_t id; 75 | struct { 76 | uint8_t cs; 77 | uint8_t dc; 78 | uint8_t reset; 79 | uint8_t backlight; 80 | } pins; 81 | uint8_t spi; 82 | uint32_t spi_div; 83 | uint16_t width; 84 | uint16_t height; 85 | uint8_t rotation; 86 | } ili9341_lcd_t; 87 | 88 | static void _ili9341_command(ili9341_lcd_t * lcd, const uint8_t cmd){ 89 | gpio_set_level((gpio_num_t)lcd->pins.dc, 0); 90 | spi_write_byte(lcd->spi, cmd); 91 | gpio_set_level((gpio_num_t)lcd->pins.dc, 1); 92 | } 93 | 94 | static void _ili9341_write_init(ili9341_lcd_t * lcd, const uint8_t * data){ 95 | uint8_t cmd, len, i; 96 | while(true){ 97 | cmd = *data++; 98 | if(!cmd){ //END 99 | return; 100 | } 101 | len = *data++; 102 | _ili9341_command(lcd, cmd); 103 | for(i=0;ispi, *data++); 105 | } 106 | } 107 | } 108 | 109 | void ili9341_set_window(ili9341_lcd_t * lcd, const uint16_t x, const uint16_t y, const uint16_t width, const uint16_t height){ 110 | _ili9341_command(lcd, 0x2A); 111 | spi_write_long(lcd->spi, ((uint32_t)x << 16) | (x+width-1)); 112 | _ili9341_command(lcd, 0x2B); 113 | spi_write_long(lcd->spi, ((uint32_t)y << 16) | (y+height-1)); 114 | _ili9341_command(lcd, 0x2C); 115 | } 116 | 117 | void ili9341_write_pixel(ili9341_lcd_t * lcd, const uint16_t color){ 118 | spi_write_short(lcd->spi, color); 119 | } 120 | 121 | void ili9341_write_pixels(ili9341_lcd_t * lcd, const uint16_t * data, size_t length){ 122 | spi_write_pixels(lcd->spi, data , length); 123 | } 124 | 125 | void ili9341_write_color(ili9341_lcd_t * lcd, const uint16_t color, size_t length){ 126 | size_t blen = (length > 128)?128:length; 127 | uint16_t temp[blen]; 128 | uint8_t tlen = 0; 129 | 130 | for (int t=0; tblen)?blen:length; 136 | spi_write_pixels(lcd->spi, temp, tlen); 137 | length -= tlen; 138 | } 139 | } 140 | 141 | void ili9341_start_pixels(ili9341_lcd_t * lcd){ 142 | spi_begin_transaction(lcd->spi, lcd->spi_div, SPI_MODE0, SPI_MSBFIRST); 143 | gpio_set_level((gpio_num_t)lcd->pins.cs, 0); 144 | } 145 | 146 | void ili9341_end_pixels(ili9341_lcd_t * lcd){ 147 | gpio_set_level((gpio_num_t)lcd->pins.cs, 1); 148 | spi_end_transaction(lcd->spi); 149 | } 150 | 151 | uint32_t _ili9341_read_id(ili9341_lcd_t * lcd) { 152 | uint32_t read_div = spi_frequency_to_div(24000000); 153 | uint32_t old_div = lcd->spi_div; 154 | lcd->spi_div = read_div; 155 | 156 | ili9341_start_pixels(lcd); 157 | 158 | _ili9341_command(lcd, 0xD9); 159 | spi_write_byte(lcd->spi, 0x10); 160 | _ili9341_command(lcd, 0x04); 161 | uint32_t r = spi_transfer_byte(lcd->spi, 0) << 16; 162 | r |= spi_transfer_byte(lcd->spi, 0) << 8; 163 | r |= spi_transfer_byte(lcd->spi, 0); 164 | ili9341_end_pixels(lcd); 165 | lcd->spi_div = old_div; 166 | 167 | //log_i("LCD ID: 0x%06X", r); 168 | return r; 169 | } 170 | 171 | static void ili9341_init_lcd(ili9341_lcd_t * lcd) 172 | { 173 | ili9341_start_pixels(lcd); 174 | _ili9341_write_init(lcd, (lcd->id)?st7789v_init_data:ili9341_init_data); 175 | _ili9341_command(lcd, 0x11); //Exit Sleep 176 | vTaskDelay(100 / portTICK_PERIOD_MS); 177 | _ili9341_command(lcd, 0x29); //Display on 178 | vTaskDelay(100 / portTICK_PERIOD_MS); 179 | ili9341_end_pixels(lcd); 180 | } 181 | 182 | static void pinMode(int8_t pin, gpio_mode_t mode) 183 | { 184 | gpio_config_t conf = { 185 | .pin_bit_mask = 1LL << pin, 186 | .mode = mode, 187 | .pull_up_en = GPIO_PULLDOWN_DISABLE, 188 | .pull_down_en = GPIO_PULLDOWN_DISABLE, 189 | .intr_type = GPIO_INTR_DISABLE 190 | }; 191 | gpio_config(&conf); 192 | } 193 | 194 | ili9341_lcd_t * ili9341_init(uint8_t spi_num, uint32_t frequency, uint8_t cs, uint8_t dc, uint8_t reset, uint8_t backlight) 195 | { 196 | ili9341_lcd_t * lcd = (ili9341_lcd_t *)malloc(sizeof(ili9341_lcd_t)); 197 | if(!lcd){ 198 | return NULL; 199 | } 200 | 201 | lcd->spi = spi_num; 202 | lcd->spi_div = spi_frequency_to_div(frequency); 203 | lcd->pins.cs = cs; 204 | lcd->pins.dc = dc; 205 | lcd->pins.reset = reset; 206 | lcd->pins.backlight = backlight; 207 | lcd->width = 320; 208 | lcd->height = 240; 209 | lcd->rotation = 0; 210 | 211 | pinMode(lcd->pins.cs, GPIO_MODE_OUTPUT); 212 | gpio_set_level((gpio_num_t)lcd->pins.cs, 1); 213 | 214 | pinMode(lcd->pins.dc, GPIO_MODE_OUTPUT); 215 | gpio_set_level((gpio_num_t)lcd->pins.dc, 0); 216 | 217 | if(lcd->pins.backlight < 34){ 218 | pinMode(lcd->pins.backlight, GPIO_MODE_OUTPUT); 219 | //gpio_set_level((gpio_num_t)lcd->pins.backlight, 1); 220 | gpio_set_level((gpio_num_t)lcd->pins.backlight, 0); 221 | } 222 | 223 | if(lcd->pins.reset < 34){ 224 | pinMode(lcd->pins.reset, GPIO_MODE_OUTPUT); 225 | gpio_set_level((gpio_num_t)lcd->pins.reset, 1); 226 | vTaskDelay(100 / portTICK_PERIOD_MS); 227 | gpio_set_level((gpio_num_t)lcd->pins.reset, 0); 228 | vTaskDelay(200 / portTICK_PERIOD_MS); 229 | gpio_set_level((gpio_num_t)lcd->pins.reset, 1); 230 | vTaskDelay(200 / portTICK_PERIOD_MS); 231 | } 232 | 233 | lcd->id = _ili9341_read_id(lcd); 234 | if(lcd->id == 0xFFFFFF){ 235 | lcd->id = 0; 236 | } 237 | 238 | ili9341_init_lcd(lcd); 239 | 240 | return lcd; 241 | } 242 | 243 | #define MADCTL_MY 0x80 244 | #define MADCTL_MX 0x40 245 | #define MADCTL_MV 0x20 246 | #define MADCTL_ML 0x10 247 | #define MADCTL_RGB 0x00 248 | #define MADCTL_BGR 0x08 249 | #define MADCTL_MH 0x04 250 | 251 | typedef struct { 252 | uint8_t madctl; 253 | uint8_t bmpctl; 254 | uint16_t width; 255 | uint16_t height; 256 | } rotation_data_t; 257 | 258 | const rotation_data_t ili9341_rotations[4] = { 259 | {(MADCTL_BGR),(MADCTL_MX|MADCTL_MY|MADCTL_BGR),ILI9341_WIDTH,ILI9341_HEIGHT}, 260 | {(MADCTL_MV|MADCTL_BGR),(MADCTL_MV|MADCTL_MX|MADCTL_BGR),ILI9341_HEIGHT,ILI9341_WIDTH}, 261 | {(MADCTL_MY|MADCTL_MX|MADCTL_BGR),(MADCTL_BGR),ILI9341_WIDTH,ILI9341_HEIGHT}, 262 | {(MADCTL_MX|MADCTL_MY|MADCTL_MV|MADCTL_BGR),(MADCTL_MY|MADCTL_MV|MADCTL_BGR),ILI9341_HEIGHT,ILI9341_WIDTH} 263 | }; 264 | 265 | const rotation_data_t st7789v_rotations[4] = { 266 | {0,MADCTL_MY,ILI9341_WIDTH,ILI9341_HEIGHT}, 267 | {(MADCTL_MV|MADCTL_MX),MADCTL_MV,ILI9341_HEIGHT,ILI9341_WIDTH}, 268 | {(MADCTL_MY|MADCTL_MX),MADCTL_MX,ILI9341_WIDTH,ILI9341_HEIGHT}, 269 | {(MADCTL_MY|MADCTL_MV),(MADCTL_MX|MADCTL_MY|MADCTL_MV),ILI9341_HEIGHT,ILI9341_WIDTH} 270 | }; 271 | 272 | void ili9341_set_rotation(ili9341_lcd_t * lcd, uint8_t m) 273 | { 274 | lcd->rotation = m % 4; // can't be higher than 3 275 | 276 | if(lcd->id){ 277 | m = st7789v_rotations[lcd->rotation].madctl; 278 | lcd->width = st7789v_rotations[lcd->rotation].width; 279 | lcd->height = st7789v_rotations[lcd->rotation].height; 280 | } else { 281 | m = ili9341_rotations[lcd->rotation].madctl; 282 | lcd->width = ili9341_rotations[lcd->rotation].width; 283 | lcd->height = ili9341_rotations[lcd->rotation].height; 284 | } 285 | 286 | ili9341_start_pixels(lcd); 287 | _ili9341_command(lcd, 0x36); 288 | spi_write_byte(lcd->spi, m); 289 | ili9341_end_pixels(lcd); 290 | } 291 | -------------------------------------------------------------------------------- /components/lcd_driver/ili9341.h: -------------------------------------------------------------------------------- 1 | // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD 2 | // 3 | // Licensed under the Apache License, Version 2.0 (the "License"); 4 | // you may not use this file except in compliance with the License. 5 | // You may obtain a copy of the License at 6 | 7 | // http://www.apache.org/licenses/LICENSE-2.0 8 | // 9 | // Unless required by applicable law or agreed to in writing, software 10 | // distributed under the License is distributed on an "AS IS" BASIS, 11 | // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 | // See the License for the specific language governing permissions and 13 | // limitations under the License. 14 | #ifndef _ILI9341_H_ 15 | #define _ILI9341_H_ 16 | #include 17 | #include "esp32-spi.h" 18 | 19 | #ifdef __cplusplus 20 | extern "C" 21 | { 22 | #endif 23 | 24 | #define ILI9341_WIDTH 320 25 | #define ILI9341_HEIGHT 240 26 | 27 | // Color definitions 28 | #define ILI9341_BLACK 0x0000 /* 0, 0, 0 */ 29 | #define ILI9341_NAVY 0x000F /* 0, 0, 128 */ 30 | #define ILI9341_DARKGREEN 0x03E0 /* 0, 128, 0 */ 31 | #define ILI9341_DARKCYAN 0x03EF /* 0, 128, 128 */ 32 | #define ILI9341_MAROON 0x7800 /* 128, 0, 0 */ 33 | #define ILI9341_PURPLE 0x780F /* 128, 0, 128 */ 34 | #define ILI9341_OLIVE 0x7BE0 /* 128, 128, 0 */ 35 | #define ILI9341_LIGHTGREY 0xC618 /* 192, 192, 192 */ 36 | #define ILI9341_DARKGREY 0x7BEF /* 128, 128, 128 */ 37 | #define ILI9341_BLUE 0x001F /* 0, 0, 255 */ 38 | #define ILI9341_GREEN 0x07E0 /* 0, 255, 0 */ 39 | #define ILI9341_CYAN 0x07FF /* 0, 255, 255 */ 40 | #define ILI9341_RED 0xF800 /* 255, 0, 0 */ 41 | #define ILI9341_MAGENTA 0xF81F /* 255, 0, 255 */ 42 | #define ILI9341_YELLOW 0xFFE0 /* 255, 255, 0 */ 43 | #define ILI9341_WHITE 0xFFFF /* 255, 255, 255 */ 44 | #define ILI9341_ORANGE 0xFD20 /* 255, 165, 0 */ 45 | #define ILI9341_GREENYELLOW 0xAFE5 /* 173, 255, 47 */ 46 | #define ILI9341_PINK 0xF81F 47 | 48 | #define ili9341_rgb565(r,g,b) ((uint16_t)((((uint16_t)(r) & 0xF8) << 8) | (((uint16_t)(g) & 0xFC) << 3) | ((uint8_t)(b) >> 3))) 49 | 50 | struct ili9341_lcd_s; 51 | typedef struct ili9341_lcd_s ili9341_lcd_t; 52 | 53 | ili9341_lcd_t * ili9341_init(uint8_t spi_num, uint32_t frequency, uint8_t cs, uint8_t dc, uint8_t reset, uint8_t backlight); 54 | 55 | void ili9341_set_rotation (ili9341_lcd_t * lcd, uint8_t rotation);//0&2 portrait, 1%3 landscape 56 | void ili9341_start_pixels (ili9341_lcd_t * lcd); 57 | void ili9341_set_window (ili9341_lcd_t * lcd, const uint16_t x, const uint16_t y, const uint16_t width, const uint16_t height); 58 | void ili9341_write_pixel (ili9341_lcd_t * lcd, const uint16_t color); 59 | void ili9341_write_pixels (ili9341_lcd_t * lcd, const uint16_t * data, size_t length); 60 | void ili9341_write_color (ili9341_lcd_t * lcd, const uint16_t color, size_t length); 61 | void ili9341_end_pixels (ili9341_lcd_t * lcd); 62 | 63 | #ifdef __cplusplus 64 | } 65 | #endif 66 | 67 | #endif /* _ILI9341_H_ */ 68 | -------------------------------------------------------------------------------- /example/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | # The following lines of boilerplate have to be in your project's 2 | # CMakeLists in this exact order for cmake to work correctly 3 | cmake_minimum_required(VERSION 3.5) 4 | 5 | include($ENV{IDF_PATH}/tools/cmake/project.cmake) 6 | project(video-play) 7 | -------------------------------------------------------------------------------- /example/Makefile: -------------------------------------------------------------------------------- 1 | # 2 | # This is a project Makefile. It is assumed the directory this Makefile resides in is a 3 | # project subdirectory. 4 | # 5 | 6 | PROJECT_NAME := esp32_awtk_demo 7 | 8 | EXTRA_COMPONENT_DIRS += ../components/ 9 | include $(IDF_PATH)/make/project.mk 10 | 11 | # include $(ADF_PATH)/project.mk 12 | 13 | -------------------------------------------------------------------------------- /example/esp32-awtk-partitions.csv: -------------------------------------------------------------------------------- 1 | # Espressif ESP32 Partition Table 2 | # 3 | # Note: if you change the phy_init or app partition offset 4 | # make sure to change the offset in Kconfig.projbuild 5 | # 6 | # Name, Type, SubType, Offset, Size, Flags 7 | nvs, data, nvs, 0x9000, 0x6000, 8 | phy_init, data, phy, 0xf000, 0x1000, 9 | factory, app, factory, 0x10000, 2000000, 10 | -------------------------------------------------------------------------------- /example/main/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(COMPONENT_SRCS "video_play.c") 2 | set(COMPONENT_ADD_INCLUDEDIRS "") 3 | 4 | register_component() 5 | -------------------------------------------------------------------------------- /example/main/component.mk: -------------------------------------------------------------------------------- 1 | # 2 | # "main" pseudo-component makefile. 3 | # 4 | # (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.) 5 | 6 | COMPONENT_EMBED_TXTFILES := rgb565_piexl 7 | -------------------------------------------------------------------------------- /example/main/esp32_awtk_main.c: -------------------------------------------------------------------------------- 1 | /* Hello World Example 2 | 3 | This example code is in the Public Domain (or CC0 licensed, at your option.) 4 | 5 | Unless required by applicable law or agreed to in writing, this 6 | software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR 7 | CONDITIONS OF ANY KIND, either express or implied. 8 | */ 9 | #include 10 | #include "freertos/FreeRTOS.h" 11 | #include "freertos/task.h" 12 | #include "esp_system.h" 13 | #include "esp_spi_flash.h" 14 | #include 15 | #include "esp_log.h" 16 | 17 | #include "ili9341.h" 18 | #define LCD_SPI_NUM HSPI 19 | #define LCD_SPI_FREQ 80000000 20 | #define LCD_SPI_MODE SPI_MODE0 21 | #define LCD_SPI_ORDER SPI_MSBFIRST 22 | 23 | // Wrover-Kit 24 | #define LCD_SPI_SCK 19 25 | #define LCD_SPI_MISO 25 26 | #define LCD_SPI_MOSI 23 27 | #define LCD_SPI_CS 22 28 | #define LCD_SPI_DC 21 29 | #define LCD_SPI_RST 18 30 | #define LCD_SPI_BL 5 31 | 32 | #define VIDEO_FRAME_SIZE (320*240*2) 33 | #define LCD_RENDER_TASK_STACK (3*1024) 34 | #define LCD_RENDER_TASK_PRIO (21) 35 | 36 | #define PIEXL_READ_TASK_STACK (3*1024) 37 | #define PIEXL_READ_TASK_PRIO (21) 38 | 39 | ili9341_lcd_t * lcd; 40 | 41 | extern const uint8_t rgb565_piexl_start[] asm("_binary_rgb565_piexl_start"); 42 | extern const uint8_t rgb565_piexl_end[] asm("_binary_rgb565_piexl_end"); 43 | 44 | static const char *TAG = "PLAY_RGB565_EXAMPLE"; 45 | 46 | void setup_ili9341() { 47 | spi_init(LCD_SPI_NUM, LCD_SPI_SCK, LCD_SPI_MISO, LCD_SPI_MOSI, LCD_SPI_FREQ, LCD_SPI_MODE, LCD_SPI_ORDER); 48 | lcd = ili9341_init(LCD_SPI_NUM, LCD_SPI_FREQ, LCD_SPI_CS, LCD_SPI_DC, LCD_SPI_RST, LCD_SPI_BL); 49 | ili9341_set_rotation(lcd, 3); 50 | 51 | } 52 | 53 | extern int gui_app_start(int lcd_w, int lcd_h); 54 | 55 | static void __awtk_task_entry(void *p_arg) { 56 | ESP_LOGI(TAG, "__awtk_task_entry started"); 57 | gui_app_start(320, 240); 58 | ESP_LOGI(TAG, "__awtk_task_entry deleted"); 59 | vTaskDelete(NULL); 60 | } 61 | 62 | static void _lcd_render_task(void *pv) 63 | { 64 | ESP_LOGI(TAG, "Start LCD render task"); 65 | setup_ili9341(); 66 | if (xTaskCreatePinnedToCore(__awtk_task_entry, 67 | "__awtk_task_entry", 68 | 4096, 69 | NULL, 70 | 5, 71 | NULL, 0) != pdTRUE) { 72 | ESP_LOGE(TAG, "Error create LCD render task"); 73 | } 74 | uint16_t * esp32_frame = (uint16_t *)heap_caps_malloc(VIDEO_FRAME_SIZE, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT); 75 | memcpy(esp32_frame, rgb565_piexl_start, rgb565_piexl_end - rgb565_piexl_start); 76 | 77 | ili9341_start_pixels(lcd); 78 | ili9341_set_window(lcd, 0, 0, 320, 240); 79 | ili9341_write_pixels(lcd, esp32_frame, 320*240); 80 | ili9341_end_pixels(lcd); 81 | ESP_LOGE(TAG, "__lcd_render_task started,lcd:%p", lcd); 82 | while (1) { 83 | vTaskDelay(3000 / portTICK_PERIOD_MS); 84 | } 85 | 86 | vTaskDelete(NULL); 87 | } 88 | 89 | void app_main() 90 | { 91 | if (xTaskCreatePinnedToCore(_lcd_render_task, 92 | "_lcd_render_task", 93 | LCD_RENDER_TASK_STACK, 94 | NULL, 95 | LCD_RENDER_TASK_PRIO, 96 | NULL, 1) != pdTRUE) { 97 | ESP_LOGE(TAG, "Error create LCD render task"); 98 | } 99 | } 100 | -------------------------------------------------------------------------------- /example/main/rgb565_piexl: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/jason-mao/esp32-awtk/cbcc61614e9d9656fdd7171501257bbb2934804e/example/main/rgb565_piexl -------------------------------------------------------------------------------- /example/main/test_file/sony.mp3: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/jason-mao/esp32-awtk/cbcc61614e9d9656fdd7171501257bbb2934804e/example/main/test_file/sony.mp3 -------------------------------------------------------------------------------- /example/main/test_file/sony.rgb: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/jason-mao/esp32-awtk/cbcc61614e9d9656fdd7171501257bbb2934804e/example/main/test_file/sony.rgb -------------------------------------------------------------------------------- /example/sdkconfig: -------------------------------------------------------------------------------- 1 | # 2 | # Automatically generated file; DO NOT EDIT. 3 | # Espressif IoT Development Framework Configuration 4 | # 5 | CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 6 | 7 | # 8 | # SDK tool configuration 9 | # 10 | CONFIG_TOOLPREFIX="xtensa-esp32-elf-" 11 | CONFIG_PYTHON="python" 12 | CONFIG_MAKE_WARN_UNDEFINED_VARIABLES=y 13 | 14 | # 15 | # Bootloader config 16 | # 17 | CONFIG_LOG_BOOTLOADER_LEVEL_NONE= 18 | CONFIG_LOG_BOOTLOADER_LEVEL_ERROR= 19 | CONFIG_LOG_BOOTLOADER_LEVEL_WARN= 20 | CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y 21 | CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG= 22 | CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE= 23 | CONFIG_LOG_BOOTLOADER_LEVEL=3 24 | CONFIG_BOOTLOADER_SPI_WP_PIN=7 25 | CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y 26 | CONFIG_BOOTLOADER_FACTORY_RESET= 27 | CONFIG_BOOTLOADER_APP_TEST= 28 | CONFIG_BOOTLOADER_WDT_ENABLE=y 29 | CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE= 30 | CONFIG_BOOTLOADER_WDT_TIME_MS=9000 31 | 32 | # 33 | # Security features 34 | # 35 | CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT= 36 | CONFIG_SECURE_BOOT_ENABLED= 37 | CONFIG_FLASH_ENCRYPTION_ENABLED= 38 | 39 | # 40 | # Serial flasher config 41 | # 42 | CONFIG_ESPTOOLPY_PORT="/dev/ttyUSB0" 43 | CONFIG_ESPTOOLPY_BAUD_115200B= 44 | CONFIG_ESPTOOLPY_BAUD_230400B= 45 | CONFIG_ESPTOOLPY_BAUD_921600B= 46 | CONFIG_ESPTOOLPY_BAUD_2MB=y 47 | CONFIG_ESPTOOLPY_BAUD_OTHER= 48 | CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 49 | CONFIG_ESPTOOLPY_BAUD=2000000 50 | CONFIG_ESPTOOLPY_COMPRESSED=y 51 | CONFIG_FLASHMODE_QIO=y 52 | CONFIG_FLASHMODE_QOUT= 53 | CONFIG_FLASHMODE_DIO= 54 | CONFIG_FLASHMODE_DOUT= 55 | CONFIG_ESPTOOLPY_FLASHMODE="dio" 56 | CONFIG_ESPTOOLPY_FLASHFREQ_80M=y 57 | CONFIG_ESPTOOLPY_FLASHFREQ_40M= 58 | CONFIG_ESPTOOLPY_FLASHFREQ_26M= 59 | CONFIG_ESPTOOLPY_FLASHFREQ_20M= 60 | CONFIG_ESPTOOLPY_FLASHFREQ="80m" 61 | CONFIG_ESPTOOLPY_FLASHSIZE_1MB= 62 | CONFIG_ESPTOOLPY_FLASHSIZE_2MB= 63 | CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y 64 | CONFIG_ESPTOOLPY_FLASHSIZE_8MB= 65 | CONFIG_ESPTOOLPY_FLASHSIZE_16MB= 66 | CONFIG_ESPTOOLPY_FLASHSIZE="4MB" 67 | CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y 68 | CONFIG_ESPTOOLPY_BEFORE_RESET=y 69 | CONFIG_ESPTOOLPY_BEFORE_NORESET= 70 | CONFIG_ESPTOOLPY_BEFORE="default_reset" 71 | CONFIG_ESPTOOLPY_AFTER_RESET=y 72 | CONFIG_ESPTOOLPY_AFTER_NORESET= 73 | CONFIG_ESPTOOLPY_AFTER="hard_reset" 74 | CONFIG_MONITOR_BAUD_9600B= 75 | CONFIG_MONITOR_BAUD_57600B= 76 | CONFIG_MONITOR_BAUD_115200B=y 77 | CONFIG_MONITOR_BAUD_230400B= 78 | CONFIG_MONITOR_BAUD_921600B= 79 | CONFIG_MONITOR_BAUD_2MB= 80 | CONFIG_MONITOR_BAUD_OTHER= 81 | CONFIG_MONITOR_BAUD_OTHER_VAL=115200 82 | CONFIG_MONITOR_BAUD=115200 83 | 84 | # 85 | # Partition Table 86 | # 87 | CONFIG_PARTITION_TABLE_SINGLE_APP= 88 | CONFIG_PARTITION_TABLE_TWO_OTA= 89 | CONFIG_PARTITION_TABLE_CUSTOM=y 90 | CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp32-awtk-partitions.csv" 91 | CONFIG_PARTITION_TABLE_FILENAME="esp32-awtk-partitions.csv" 92 | CONFIG_PARTITION_TABLE_OFFSET=0x8000 93 | CONFIG_PARTITION_TABLE_MD5=y 94 | 95 | # 96 | # Compiler options 97 | # 98 | CONFIG_OPTIMIZATION_LEVEL_DEBUG= 99 | CONFIG_OPTIMIZATION_LEVEL_RELEASE=y 100 | CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y 101 | CONFIG_OPTIMIZATION_ASSERTIONS_SILENT= 102 | CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED= 103 | CONFIG_CXX_EXCEPTIONS= 104 | CONFIG_STACK_CHECK_NONE=y 105 | CONFIG_STACK_CHECK_NORM= 106 | CONFIG_STACK_CHECK_STRONG= 107 | CONFIG_STACK_CHECK_ALL= 108 | CONFIG_STACK_CHECK= 109 | CONFIG_WARN_WRITE_STRINGS= 110 | CONFIG_DISABLE_GCC8_WARNINGS= 111 | 112 | # 113 | # Component config 114 | # 115 | 116 | # 117 | # Application Level Tracing 118 | # 119 | CONFIG_ESP32_APPTRACE_DEST_TRAX= 120 | CONFIG_ESP32_APPTRACE_DEST_NONE=y 121 | CONFIG_ESP32_APPTRACE_ENABLE= 122 | CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y 123 | CONFIG_AWS_IOT_SDK= 124 | 125 | # 126 | # Bluetooth 127 | # 128 | CONFIG_BT_ENABLED= 129 | CONFIG_BTDM_CONTROLLER_BR_EDR_SCO_DATA_PATH_EFF=0 130 | CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=0 131 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=0 132 | CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 133 | CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0 134 | CONFIG_BT_RESERVE_DRAM=0 135 | 136 | # 137 | # Driver configurations 138 | # 139 | 140 | # 141 | # ADC configuration 142 | # 143 | CONFIG_ADC_FORCE_XPD_FSM= 144 | CONFIG_ADC2_DISABLE_DAC=y 145 | 146 | # 147 | # SPI configuration 148 | # 149 | CONFIG_SPI_MASTER_IN_IRAM= 150 | CONFIG_SPI_MASTER_ISR_IN_IRAM=y 151 | CONFIG_SPI_SLAVE_IN_IRAM= 152 | CONFIG_SPI_SLAVE_ISR_IN_IRAM=y 153 | 154 | # 155 | # ESP32-specific 156 | # 157 | CONFIG_ESP32_REV_MIN_0=y 158 | CONFIG_ESP32_REV_MIN_1= 159 | CONFIG_ESP32_REV_MIN_2= 160 | CONFIG_ESP32_REV_MIN_3= 161 | CONFIG_ESP32_REV_MIN=0 162 | CONFIG_ESP32_DPORT_WORKAROUND=y 163 | CONFIG_ESP32_DEFAULT_CPU_FREQ_80= 164 | CONFIG_ESP32_DEFAULT_CPU_FREQ_160= 165 | CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y 166 | CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 167 | CONFIG_SPIRAM_SUPPORT=y 168 | 169 | # 170 | # SPI RAM config 171 | # 172 | CONFIG_SPIRAM_BOOT_INIT=y 173 | CONFIG_SPIRAM_IGNORE_NOTFOUND= 174 | CONFIG_SPIRAM_USE_MEMMAP= 175 | CONFIG_SPIRAM_USE_CAPS_ALLOC= 176 | CONFIG_SPIRAM_USE_MALLOC=y 177 | CONFIG_SPIRAM_TYPE_AUTO=y 178 | CONFIG_SPIRAM_TYPE_ESPPSRAM32= 179 | CONFIG_SPIRAM_TYPE_ESPPSRAM64= 180 | CONFIG_SPIRAM_SIZE=-1 181 | CONFIG_SPIRAM_SPEED_40M= 182 | CONFIG_SPIRAM_SPEED_80M=y 183 | CONFIG_SPIRAM_MEMTEST=y 184 | CONFIG_SPIRAM_CACHE_WORKAROUND=y 185 | CONFIG_SPIRAM_BANKSWITCH_ENABLE=y 186 | CONFIG_SPIRAM_BANKSWITCH_RESERVE=8 187 | CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 188 | CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST= 189 | CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 190 | CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY= 191 | CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY= 192 | CONFIG_SPIRAM_OCCUPY_HSPI_HOST= 193 | CONFIG_SPIRAM_OCCUPY_VSPI_HOST=y 194 | 195 | # 196 | # PSRAM clock and cs IO for ESP32-DOWD 197 | # 198 | CONFIG_D0WD_PSRAM_CLK_IO=17 199 | CONFIG_D0WD_PSRAM_CS_IO=16 200 | 201 | # 202 | # PSRAM clock and cs IO for ESP32-D2WD 203 | # 204 | CONFIG_D2WD_PSRAM_CLK_IO=9 205 | CONFIG_D2WD_PSRAM_CS_IO=10 206 | 207 | # 208 | # PSRAM clock and cs IO for ESP32-PICO 209 | # 210 | CONFIG_PICO_PSRAM_CS_IO=10 211 | CONFIG_MEMMAP_TRACEMEM= 212 | CONFIG_MEMMAP_TRACEMEM_TWOBANKS= 213 | CONFIG_ESP32_TRAX= 214 | CONFIG_TRACEMEM_RESERVE_DRAM=0x0 215 | CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH= 216 | CONFIG_ESP32_ENABLE_COREDUMP_TO_UART= 217 | CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y 218 | CONFIG_ESP32_ENABLE_COREDUMP= 219 | CONFIG_TWO_UNIVERSAL_MAC_ADDRESS= 220 | CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y 221 | CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 222 | CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 223 | CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 224 | CONFIG_MAIN_TASK_STACK_SIZE=3584 225 | CONFIG_IPC_TASK_STACK_SIZE=1024 226 | CONFIG_TIMER_TASK_STACK_SIZE=3584 227 | CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y 228 | CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF= 229 | CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR= 230 | CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF= 231 | CONFIG_NEWLIB_STDIN_LINE_ENDING_LF= 232 | CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y 233 | CONFIG_NEWLIB_NANO_FORMAT= 234 | CONFIG_CONSOLE_UART_DEFAULT=y 235 | CONFIG_CONSOLE_UART_CUSTOM= 236 | CONFIG_CONSOLE_UART_NONE= 237 | CONFIG_CONSOLE_UART_NUM=0 238 | CONFIG_CONSOLE_UART_BAUDRATE=115200 239 | CONFIG_ULP_COPROC_ENABLED= 240 | CONFIG_ULP_COPROC_RESERVE_MEM=0 241 | CONFIG_ESP32_PANIC_PRINT_HALT= 242 | CONFIG_ESP32_PANIC_PRINT_REBOOT= 243 | CONFIG_ESP32_PANIC_SILENT_REBOOT= 244 | CONFIG_ESP32_PANIC_GDBSTUB=y 245 | CONFIG_ESP32_DEBUG_OCDAWARE=y 246 | CONFIG_ESP32_DEBUG_STUBS_ENABLE=y 247 | CONFIG_INT_WDT=y 248 | CONFIG_INT_WDT_TIMEOUT_MS=300 249 | CONFIG_INT_WDT_CHECK_CPU1=y 250 | CONFIG_TASK_WDT=y 251 | CONFIG_TASK_WDT_PANIC= 252 | CONFIG_TASK_WDT_TIMEOUT_S=5 253 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y 254 | CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y 255 | CONFIG_BROWNOUT_DET=y 256 | CONFIG_BROWNOUT_DET_LVL_SEL_0=y 257 | CONFIG_BROWNOUT_DET_LVL_SEL_1= 258 | CONFIG_BROWNOUT_DET_LVL_SEL_2= 259 | CONFIG_BROWNOUT_DET_LVL_SEL_3= 260 | CONFIG_BROWNOUT_DET_LVL_SEL_4= 261 | CONFIG_BROWNOUT_DET_LVL_SEL_5= 262 | CONFIG_BROWNOUT_DET_LVL_SEL_6= 263 | CONFIG_BROWNOUT_DET_LVL_SEL_7= 264 | CONFIG_BROWNOUT_DET_LVL=0 265 | CONFIG_REDUCE_PHY_TX_POWER=y 266 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y 267 | CONFIG_ESP32_TIME_SYSCALL_USE_RTC= 268 | CONFIG_ESP32_TIME_SYSCALL_USE_FRC1= 269 | CONFIG_ESP32_TIME_SYSCALL_USE_NONE= 270 | CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y 271 | CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL= 272 | CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC= 273 | CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256= 274 | CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 275 | CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 276 | CONFIG_ESP32_XTAL_FREQ_40=y 277 | CONFIG_ESP32_XTAL_FREQ_26= 278 | CONFIG_ESP32_XTAL_FREQ_AUTO= 279 | CONFIG_ESP32_XTAL_FREQ=40 280 | CONFIG_DISABLE_BASIC_ROM_CONSOLE= 281 | CONFIG_NO_BLOBS= 282 | CONFIG_ESP_TIMER_PROFILING= 283 | CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS= 284 | CONFIG_ESP_ERR_TO_NAME_LOOKUP=y 285 | CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5 286 | 287 | # 288 | # Wi-Fi 289 | # 290 | CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 291 | CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 292 | CONFIG_ESP32_WIFI_STATIC_TX_BUFFER=y 293 | CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=0 294 | CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM=16 295 | CONFIG_ESP32_WIFI_CSI_ENABLED= 296 | CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y 297 | CONFIG_ESP32_WIFI_TX_BA_WIN=6 298 | CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y 299 | CONFIG_ESP32_WIFI_RX_BA_WIN=6 300 | CONFIG_ESP32_WIFI_NVS_ENABLED=y 301 | CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y 302 | CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1= 303 | CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 304 | CONFIG_ESP32_WIFI_IRAM_OPT=y 305 | CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 306 | 307 | # 308 | # PHY 309 | # 310 | CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y 311 | CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION= 312 | CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 313 | CONFIG_ESP32_PHY_MAX_TX_POWER=20 314 | 315 | # 316 | # Power Management 317 | # 318 | CONFIG_PM_ENABLE= 319 | 320 | # 321 | # ADC-Calibration 322 | # 323 | CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y 324 | CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y 325 | CONFIG_ADC_CAL_LUT_ENABLE=y 326 | 327 | # 328 | # Event Loop Library 329 | # 330 | CONFIG_EVENT_LOOP_PROFILING= 331 | 332 | # 333 | # ESP HTTP client 334 | # 335 | CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y 336 | 337 | # 338 | # HTTP Server 339 | # 340 | CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 341 | CONFIG_HTTPD_MAX_URI_LEN=512 342 | CONFIG_HTTPD_PURGE_BUF_LEN=32 343 | CONFIG_HTTPD_LOG_PURGE_DATA= 344 | 345 | # 346 | # Ethernet 347 | # 348 | CONFIG_DMA_RX_BUF_NUM=10 349 | CONFIG_DMA_TX_BUF_NUM=10 350 | CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE=y 351 | CONFIG_EMAC_CHECK_LINK_PERIOD_MS=2000 352 | CONFIG_EMAC_TASK_PRIORITY=20 353 | CONFIG_EMAC_TASK_STACK_SIZE=3072 354 | 355 | # 356 | # FAT Filesystem support 357 | # 358 | CONFIG_FATFS_CODEPAGE_DYNAMIC= 359 | CONFIG_FATFS_CODEPAGE_437=y 360 | CONFIG_FATFS_CODEPAGE_720= 361 | CONFIG_FATFS_CODEPAGE_737= 362 | CONFIG_FATFS_CODEPAGE_771= 363 | CONFIG_FATFS_CODEPAGE_775= 364 | CONFIG_FATFS_CODEPAGE_850= 365 | CONFIG_FATFS_CODEPAGE_852= 366 | CONFIG_FATFS_CODEPAGE_855= 367 | CONFIG_FATFS_CODEPAGE_857= 368 | CONFIG_FATFS_CODEPAGE_860= 369 | CONFIG_FATFS_CODEPAGE_861= 370 | CONFIG_FATFS_CODEPAGE_862= 371 | CONFIG_FATFS_CODEPAGE_863= 372 | CONFIG_FATFS_CODEPAGE_864= 373 | CONFIG_FATFS_CODEPAGE_865= 374 | CONFIG_FATFS_CODEPAGE_866= 375 | CONFIG_FATFS_CODEPAGE_869= 376 | CONFIG_FATFS_CODEPAGE_932= 377 | CONFIG_FATFS_CODEPAGE_936= 378 | CONFIG_FATFS_CODEPAGE_949= 379 | CONFIG_FATFS_CODEPAGE_950= 380 | CONFIG_FATFS_CODEPAGE=437 381 | CONFIG_FATFS_LFN_NONE=y 382 | CONFIG_FATFS_LFN_HEAP= 383 | CONFIG_FATFS_LFN_STACK= 384 | CONFIG_FATFS_FS_LOCK=0 385 | CONFIG_FATFS_TIMEOUT_MS=10000 386 | CONFIG_FATFS_PER_FILE_CACHE=y 387 | 388 | # 389 | # Modbus configuration 390 | # 391 | CONFIG_MB_QUEUE_LENGTH=20 392 | CONFIG_MB_SERIAL_TASK_STACK_SIZE=2048 393 | CONFIG_MB_SERIAL_BUF_SIZE=256 394 | CONFIG_MB_SERIAL_TASK_PRIO=10 395 | CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT= 396 | CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 397 | CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 398 | CONFIG_MB_CONTROLLER_STACK_SIZE=4096 399 | CONFIG_MB_EVENT_QUEUE_TIMEOUT=20 400 | CONFIG_MB_TIMER_PORT_ENABLED=y 401 | CONFIG_MB_TIMER_GROUP=0 402 | CONFIG_MB_TIMER_INDEX=0 403 | 404 | # 405 | # FreeRTOS 406 | # 407 | CONFIG_FREERTOS_UNICORE= 408 | CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF 409 | CONFIG_FREERTOS_CORETIMER_0=y 410 | CONFIG_FREERTOS_CORETIMER_1= 411 | CONFIG_FREERTOS_HZ=1000 412 | CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y 413 | CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE= 414 | CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL= 415 | CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y 416 | CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK= 417 | CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y 418 | CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 419 | CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y 420 | CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE= 421 | CONFIG_FREERTOS_ASSERT_DISABLE= 422 | CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 423 | CONFIG_FREERTOS_ISR_STACKSIZE=1536 424 | CONFIG_FREERTOS_LEGACY_HOOKS= 425 | CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 426 | CONFIG_SUPPORT_STATIC_ALLOCATION=y 427 | CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK= 428 | CONFIG_TIMER_TASK_PRIORITY=1 429 | CONFIG_TIMER_TASK_STACK_DEPTH=2048 430 | CONFIG_TIMER_QUEUE_LENGTH=10 431 | CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 432 | CONFIG_FREERTOS_USE_TRACE_FACILITY= 433 | CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS= 434 | CONFIG_FREERTOS_DEBUG_INTERNALS= 435 | 436 | # 437 | # Heap memory debugging 438 | # 439 | CONFIG_HEAP_POISONING_DISABLED= 440 | CONFIG_HEAP_POISONING_LIGHT=y 441 | CONFIG_HEAP_POISONING_COMPREHENSIVE= 442 | CONFIG_HEAP_TRACING=y 443 | CONFIG_HEAP_TRACING_STACK_DEPTH=2 444 | CONFIG_HEAP_TASK_TRACKING=y 445 | 446 | # 447 | # libsodium 448 | # 449 | CONFIG_LIBSODIUM_USE_MBEDTLS_SHA=y 450 | 451 | # 452 | # Log output 453 | # 454 | CONFIG_LOG_DEFAULT_LEVEL_NONE= 455 | CONFIG_LOG_DEFAULT_LEVEL_ERROR= 456 | CONFIG_LOG_DEFAULT_LEVEL_WARN= 457 | CONFIG_LOG_DEFAULT_LEVEL_INFO=y 458 | CONFIG_LOG_DEFAULT_LEVEL_DEBUG= 459 | CONFIG_LOG_DEFAULT_LEVEL_VERBOSE= 460 | CONFIG_LOG_DEFAULT_LEVEL=3 461 | CONFIG_LOG_COLORS=y 462 | 463 | # 464 | # LWIP 465 | # 466 | CONFIG_L2_TO_L3_COPY= 467 | CONFIG_LWIP_IRAM_OPTIMIZATION= 468 | CONFIG_LWIP_MAX_SOCKETS=10 469 | CONFIG_USE_ONLY_LWIP_SELECT= 470 | CONFIG_LWIP_SO_REUSE=y 471 | CONFIG_LWIP_SO_REUSE_RXTOALL=y 472 | CONFIG_LWIP_SO_RCVBUF= 473 | CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 474 | CONFIG_LWIP_IP_FRAG= 475 | CONFIG_LWIP_IP_REASSEMBLY= 476 | CONFIG_LWIP_STATS= 477 | CONFIG_LWIP_ETHARP_TRUST_IP_MAC= 478 | CONFIG_ESP_GRATUITOUS_ARP=y 479 | CONFIG_GARP_TMR_INTERVAL=60 480 | CONFIG_TCPIP_RECVMBOX_SIZE=32 481 | CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y 482 | CONFIG_LWIP_DHCP_RESTORE_LAST_IP= 483 | 484 | # 485 | # DHCP server 486 | # 487 | CONFIG_LWIP_DHCPS_LEASE_UNIT=60 488 | CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 489 | CONFIG_LWIP_AUTOIP= 490 | CONFIG_LWIP_NETIF_LOOPBACK=y 491 | CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 492 | 493 | # 494 | # TCP 495 | # 496 | CONFIG_LWIP_MAX_ACTIVE_TCP=16 497 | CONFIG_LWIP_MAX_LISTENING_TCP=16 498 | CONFIG_TCP_MAXRTX=12 499 | CONFIG_TCP_SYNMAXRTX=6 500 | CONFIG_TCP_MSS=1436 501 | CONFIG_TCP_MSL=60000 502 | CONFIG_TCP_SND_BUF_DEFAULT=5744 503 | CONFIG_TCP_WND_DEFAULT=5744 504 | CONFIG_TCP_RECVMBOX_SIZE=6 505 | CONFIG_TCP_QUEUE_OOSEQ=y 506 | CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES= 507 | CONFIG_TCP_OVERSIZE_MSS=y 508 | CONFIG_TCP_OVERSIZE_QUARTER_MSS= 509 | CONFIG_TCP_OVERSIZE_DISABLE= 510 | 511 | # 512 | # UDP 513 | # 514 | CONFIG_LWIP_MAX_UDP_PCBS=16 515 | CONFIG_UDP_RECVMBOX_SIZE=6 516 | CONFIG_TCPIP_TASK_STACK_SIZE=3072 517 | CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y 518 | CONFIG_TCPIP_TASK_AFFINITY_CPU0= 519 | CONFIG_TCPIP_TASK_AFFINITY_CPU1= 520 | CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF 521 | CONFIG_PPP_SUPPORT= 522 | 523 | # 524 | # ICMP 525 | # 526 | CONFIG_LWIP_MULTICAST_PING= 527 | CONFIG_LWIP_BROADCAST_PING= 528 | 529 | # 530 | # LWIP RAW API 531 | # 532 | CONFIG_LWIP_MAX_RAW_PCBS=16 533 | 534 | # 535 | # mbedTLS 536 | # 537 | CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y 538 | CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC= 539 | CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC= 540 | CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC= 541 | CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=16384 542 | CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN= 543 | CONFIG_MBEDTLS_DEBUG= 544 | CONFIG_MBEDTLS_HARDWARE_AES=y 545 | CONFIG_MBEDTLS_HARDWARE_MPI= 546 | CONFIG_MBEDTLS_HARDWARE_SHA= 547 | CONFIG_MBEDTLS_HAVE_TIME=y 548 | CONFIG_MBEDTLS_HAVE_TIME_DATE= 549 | CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y 550 | CONFIG_MBEDTLS_TLS_SERVER_ONLY= 551 | CONFIG_MBEDTLS_TLS_CLIENT_ONLY= 552 | CONFIG_MBEDTLS_TLS_DISABLED= 553 | CONFIG_MBEDTLS_TLS_SERVER=y 554 | CONFIG_MBEDTLS_TLS_CLIENT=y 555 | CONFIG_MBEDTLS_TLS_ENABLED=y 556 | 557 | # 558 | # TLS Key Exchange Methods 559 | # 560 | CONFIG_MBEDTLS_PSK_MODES=y 561 | CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y 562 | CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y 563 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y 564 | CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y 565 | CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y 566 | CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y 567 | CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y 568 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y 569 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y 570 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y 571 | CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y 572 | CONFIG_MBEDTLS_SSL_RENEGOTIATION=y 573 | CONFIG_MBEDTLS_SSL_PROTO_SSL3= 574 | CONFIG_MBEDTLS_SSL_PROTO_TLS1=y 575 | CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y 576 | CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y 577 | CONFIG_MBEDTLS_SSL_PROTO_DTLS=y 578 | CONFIG_MBEDTLS_SSL_ALPN=y 579 | CONFIG_MBEDTLS_SSL_SESSION_TICKETS=y 580 | 581 | # 582 | # Symmetric Ciphers 583 | # 584 | CONFIG_MBEDTLS_AES_C=y 585 | CONFIG_MBEDTLS_CAMELLIA_C= 586 | CONFIG_MBEDTLS_DES_C= 587 | CONFIG_MBEDTLS_RC4_DISABLED=y 588 | CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT= 589 | CONFIG_MBEDTLS_RC4_ENABLED= 590 | CONFIG_MBEDTLS_BLOWFISH_C= 591 | CONFIG_MBEDTLS_XTEA_C= 592 | CONFIG_MBEDTLS_CCM_C=y 593 | CONFIG_MBEDTLS_GCM_C=y 594 | CONFIG_MBEDTLS_RIPEMD160_C= 595 | 596 | # 597 | # Certificates 598 | # 599 | CONFIG_MBEDTLS_PEM_PARSE_C=y 600 | CONFIG_MBEDTLS_PEM_WRITE_C=y 601 | CONFIG_MBEDTLS_X509_CRL_PARSE_C=y 602 | CONFIG_MBEDTLS_X509_CSR_PARSE_C=y 603 | CONFIG_MBEDTLS_ECP_C=y 604 | CONFIG_MBEDTLS_ECDH_C=y 605 | CONFIG_MBEDTLS_ECDSA_C=y 606 | CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y 607 | CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y 608 | CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y 609 | CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y 610 | CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y 611 | CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y 612 | CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y 613 | CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y 614 | CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y 615 | CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y 616 | CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y 617 | CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y 618 | CONFIG_MBEDTLS_ECP_NIST_OPTIM=y 619 | 620 | # 621 | # mDNS 622 | # 623 | CONFIG_MDNS_MAX_SERVICES=10 624 | 625 | # 626 | # ESP-MQTT Configurations 627 | # 628 | CONFIG_MQTT_PROTOCOL_311=y 629 | CONFIG_MQTT_TRANSPORT_SSL=y 630 | CONFIG_MQTT_TRANSPORT_WEBSOCKET=y 631 | CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y 632 | CONFIG_MQTT_USE_CUSTOM_CONFIG= 633 | CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED= 634 | CONFIG_MQTT_CUSTOM_OUTBOX= 635 | 636 | # 637 | # NVS 638 | # 639 | 640 | # 641 | # OpenSSL 642 | # 643 | CONFIG_OPENSSL_DEBUG= 644 | CONFIG_OPENSSL_ASSERT_DO_NOTHING=y 645 | CONFIG_OPENSSL_ASSERT_EXIT= 646 | 647 | # 648 | # PThreads 649 | # 650 | CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 651 | CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 652 | CONFIG_PTHREAD_STACK_MIN=768 653 | 654 | # 655 | # SPI Flash driver 656 | # 657 | CONFIG_SPI_FLASH_VERIFY_WRITE= 658 | CONFIG_SPI_FLASH_ENABLE_COUNTERS= 659 | CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y 660 | CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y 661 | CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS= 662 | CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED= 663 | CONFIG_SPI_FLASH_YIELD_DURING_ERASE= 664 | 665 | # 666 | # SPIFFS Configuration 667 | # 668 | CONFIG_SPIFFS_MAX_PARTITIONS=3 669 | 670 | # 671 | # SPIFFS Cache Configuration 672 | # 673 | CONFIG_SPIFFS_CACHE=y 674 | CONFIG_SPIFFS_CACHE_WR=y 675 | CONFIG_SPIFFS_CACHE_STATS= 676 | CONFIG_SPIFFS_PAGE_CHECK=y 677 | CONFIG_SPIFFS_GC_MAX_RUNS=10 678 | CONFIG_SPIFFS_GC_STATS= 679 | CONFIG_SPIFFS_PAGE_SIZE=256 680 | CONFIG_SPIFFS_OBJ_NAME_LEN=32 681 | CONFIG_SPIFFS_USE_MAGIC=y 682 | CONFIG_SPIFFS_USE_MAGIC_LENGTH=y 683 | CONFIG_SPIFFS_META_LENGTH=4 684 | CONFIG_SPIFFS_USE_MTIME=y 685 | 686 | # 687 | # Debug Configuration 688 | # 689 | CONFIG_SPIFFS_DBG= 690 | CONFIG_SPIFFS_API_DBG= 691 | CONFIG_SPIFFS_GC_DBG= 692 | CONFIG_SPIFFS_CACHE_DBG= 693 | CONFIG_SPIFFS_CHECK_DBG= 694 | CONFIG_SPIFFS_TEST_VISUALISATION= 695 | 696 | # 697 | # TCP/IP Adapter 698 | # 699 | CONFIG_IP_LOST_TIMER_INTERVAL=120 700 | CONFIG_TCPIP_LWIP=y 701 | 702 | # 703 | # Virtual file system 704 | # 705 | CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y 706 | CONFIG_SUPPORT_TERMIOS=y 707 | 708 | # 709 | # Wear Levelling 710 | # 711 | CONFIG_WL_SECTOR_SIZE_512= 712 | CONFIG_WL_SECTOR_SIZE_4096=y 713 | CONFIG_WL_SECTOR_SIZE=4096 714 | --------------------------------------------------------------------------------