├── src ├── target │ ├── b-g431b-esc1 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── blue-pill │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── f030-minimal │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── maple-mini │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-f042 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-f072 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-f303 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-f334 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-g071 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-g431 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo-l476 │ │ ├── CMakeLists.txt │ │ ├── isr │ │ │ └── example-button-exti │ │ │ │ ├── isr.h │ │ │ │ └── isr.c │ │ ├── pinout.png │ │ ├── target.h │ │ └── target-pwm.h │ ├── nucleo │ │ ├── nucleo-32.h │ │ └── nucleo-64.h │ └── f │ │ ├── f1.cmake │ │ ├── f0.cmake │ │ ├── f.cmake │ │ ├── g0.cmake │ │ ├── f3.cmake │ │ ├── g4.cmake │ │ └── l4.cmake ├── example │ ├── blink │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── adc-continuous │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── adc-sw-trigger │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── pwm-input │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── pwm-output │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── pwm-commutate │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── neopixel │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── pwm-output-dma │ │ ├── CMakeLists.txt │ │ └── main.c │ ├── opamp-internal │ │ ├── CMakeLists.txt │ │ └── main.c │ └── button-exti │ │ ├── CMakeLists.txt │ │ └── main.c ├── target-mcu.cmake └── link │ └── generate-ldscript.py ├── .gitignore ├── tools ├── clang-format.sh ├── package-deployment.sh ├── generate-nvic-all.sh ├── travis-ci-script.sh ├── install-arm-toolchain.sh ├── README.md ├── build-all.sh └── travis-ci-functions.sh ├── .gitmodules ├── lib └── openocd │ ├── f0.cfg │ ├── f1.cfg │ ├── f3.cfg │ ├── g0-nucleo.cfg │ ├── g4-nucleo.cfg │ ├── l4-nucleo.cfg │ ├── f0-nucleo.cfg │ ├── f1-nucleo.cfg │ └── f3-nucleo.cfg ├── .travis.yml ├── README.md ├── CMakeLists.txt ├── .clang-format ├── .vscode └── launch.json └── LICENSE.md /src/target/b-g431b-esc1/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32G431CB") 2 | -------------------------------------------------------------------------------- /src/target/blue-pill/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F103C8") 2 | -------------------------------------------------------------------------------- /src/target/f030-minimal/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F030F4") 2 | -------------------------------------------------------------------------------- /src/target/maple-mini/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F103CB") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-f042/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F042K6") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-f072/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F072RB") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-f303/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F303RE") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-f334/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32F334R8") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-g071/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32G071RB") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-g431/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32G431RB") 2 | -------------------------------------------------------------------------------- /src/target/nucleo-l476/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | set(TARGET_MCU "STM32L476RG") 2 | -------------------------------------------------------------------------------- /.gitignore: -------------------------------------------------------------------------------- 1 | arm9 2 | build 3 | src/link/stm32-mem.ld 4 | stm32-boilerplate-examples.tar 5 | -------------------------------------------------------------------------------- /src/target/b-g431b-esc1/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/blue-pill/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/f030-minimal/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/maple-mini/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-f042/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-f072/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-f303/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-f334/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-g071/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-g431/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /src/target/nucleo-l476/isr/example-button-exti/isr.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | void button_isr(); 4 | -------------------------------------------------------------------------------- /tools/clang-format.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | find src -name *.c -o -name *.h | xargs clang-format -i 4 | -------------------------------------------------------------------------------- /.gitmodules: -------------------------------------------------------------------------------- 1 | [submodule "lib/libopencm3"] 2 | path = lib/libopencm3 3 | url = https://github.com/jaxxzer/libopencm3 4 | -------------------------------------------------------------------------------- /src/target/nucleo-l476/pinout.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/jaxxzer/stm32-boilerplate/HEAD/src/target/nucleo-l476/pinout.png -------------------------------------------------------------------------------- /src/example/blink/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${GPIO_SRC} ${RCC_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /tools/package-deployment.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | source tools/travis-ci-functions.sh 4 | 5 | test tar -cf stm32-boilerplate-examples.tar build/bin/* 6 | -------------------------------------------------------------------------------- /src/example/adc-continuous/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${ADC_SRC} ${GPIO_SRC} ${RCC_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/adc-sw-trigger/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${ADC_SRC} ${GPIO_SRC} ${RCC_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/pwm-input/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${GPIO_SRC} ${RCC_SRC} ${TIMER_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/pwm-output/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${GPIO_SRC} ${RCC_SRC} ${TIMER_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/pwm-commutate/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${GPIO_SRC} ${RCC_SRC} ${TIMER_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/neopixel/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${DMA_SRC} ${GPIO_SRC} ${RCC_SRC} ${TIMER_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/pwm-output-dma/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${DMA_SRC} ${GPIO_SRC} ${RCC_SRC} ${TIMER_SRC} 5 | ) 6 | -------------------------------------------------------------------------------- /src/example/opamp-internal/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(EXAMPLE_SRC 4 | ${ADC_SRC} ${GPIO_SRC} ${RCC_SRC} 5 | ) 6 | 7 | set(HARDWARE_REQUIREMENTS 8 | OPAMP_INTERNAL 9 | ) 10 | -------------------------------------------------------------------------------- /tools/generate-nvic-all.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | pushd lib/libopencm3 4 | 5 | for PLATFORM in f0 f1 f3 g0 g4 l4 6 | do 7 | ./scripts/irq2nvic_h ./include/libopencm3/stm32/${PLATFORM}/irq.json 8 | done 9 | 10 | popd 11 | -------------------------------------------------------------------------------- /lib/openocd/f0.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2.cfg] 2 | source [find target/stm32f0x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/f1.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2.cfg] 2 | source [find target/stm32f1x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/f3.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2.cfg] 2 | source [find target/stm32f3x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/g0-nucleo.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2.cfg] 2 | source [find target/stm32g0x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/g4-nucleo.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink.cfg] 2 | source [find target/stm32g4x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/l4-nucleo.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink.cfg] 2 | source [find target/stm32l4x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/f0-nucleo.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2-1.cfg] 2 | source [find target/stm32f0x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/f1-nucleo.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2-1.cfg] 2 | source [find target/stm32f1x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /lib/openocd/f3-nucleo.cfg: -------------------------------------------------------------------------------- 1 | source [find interface/stlink-v2-1.cfg] 2 | source [find target/stm32f3x.cfg] 3 | 4 | $_TARGETNAME configure -event gdb-attach { 5 | halt 6 | } 7 | 8 | $_TARGETNAME configure -event gdb-attach { 9 | reset init 10 | } 11 | -------------------------------------------------------------------------------- /src/target/f030-minimal/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_1_isr() { button_isr(); } 6 | 7 | void exti2_3_isr() { button_isr(); } 8 | 9 | void exti4_15_isr() { button_isr(); } 10 | -------------------------------------------------------------------------------- /src/target/nucleo-f042/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_1_isr() { button_isr(); } 6 | 7 | void exti2_3_isr() { button_isr(); } 8 | 9 | void exti4_15_isr() { button_isr(); } 10 | -------------------------------------------------------------------------------- /src/target/nucleo-f072/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_1_isr() { button_isr(); } 6 | 7 | void exti2_3_isr() { button_isr(); } 8 | 9 | void exti4_15_isr() { button_isr(); } 10 | -------------------------------------------------------------------------------- /src/target/nucleo-g071/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_1_isr() { button_isr(); } 6 | 7 | void exti2_3_isr() { button_isr(); } 8 | 9 | void exti4_15_isr() { button_isr(); } 10 | -------------------------------------------------------------------------------- /src/target/nucleo-l476/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_1_isr() { button_isr(); } 6 | 7 | void exti2_3_isr() { button_isr(); } 8 | 9 | void exti4_15_isr() { button_isr(); } 10 | -------------------------------------------------------------------------------- /tools/travis-ci-script.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | source tools/travis-ci-functions.sh 4 | 5 | test tools/clang-format.sh 6 | test git diff --quiet --ignore-submodules 7 | test tools/install-arm-toolchain.sh 8 | test tools/build-all.sh 9 | test tools/package-deployment.sh 10 | -------------------------------------------------------------------------------- /src/target/nucleo/nucleo-32.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define LED_GPIO_RCC RCC_GPIOB 4 | #define LED_GPIO_PORT GPIOB 5 | #define LED_GPIO_PIN GPIO3 6 | 7 | #define ADC_PERIPH ADC1 8 | 9 | #define ADC_GPIO_RCC RCC_GPIOA 10 | #define ADC_GPIO_PORT GPIOA 11 | #define ADC_GPIO_PIN GPIO0 12 | -------------------------------------------------------------------------------- /src/target/nucleo/nucleo-64.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define LED_GPIO_RCC RCC_GPIOA 4 | #define LED_GPIO_PORT GPIOA 5 | #define LED_GPIO_PIN GPIO5 6 | 7 | #define ADC_PERIPH ADC1 8 | 9 | #define ADC_GPIO_RCC RCC_GPIOA 10 | #define ADC_GPIO_PORT GPIOA 11 | #define ADC_GPIO_PIN GPIO0 12 | -------------------------------------------------------------------------------- /src/example/button-exti/CMakeLists.txt: -------------------------------------------------------------------------------- 1 | include(${PROJECT_SOURCE_DIR}/src/target/f/f.cmake) 2 | 3 | set(ISR_DIR ${TARGET_DIR}/isr/example-button-exti) 4 | 5 | include_directories(${ISR_DIR}) 6 | 7 | set(ISR_SRC ${ISR_DIR}/isr.c) 8 | 9 | set(EXAMPLE_SRC 10 | ${EXTI_SRC} ${GPIO_SRC} ${NVIC_SRC} ${RCC_SRC} ${ISR_SRC} 11 | ) 12 | -------------------------------------------------------------------------------- /src/target/b-g431b-esc1/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_isr() { button_isr(); } 6 | 7 | void exti1_isr() { button_isr(); } 8 | 9 | void exti2_isr() { button_isr(); } 10 | 11 | void exti3_isr() { button_isr(); } 12 | 13 | void exti4_isr() { button_isr(); } 14 | 15 | void exti9_5_isr() { button_isr(); } 16 | 17 | void exti15_10_isr() { button_isr(); } 18 | -------------------------------------------------------------------------------- /src/target/blue-pill/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_isr() { button_isr(); } 6 | 7 | void exti1_isr() { button_isr(); } 8 | 9 | void exti2_isr() { button_isr(); } 10 | 11 | void exti3_isr() { button_isr(); } 12 | 13 | void exti4_isr() { button_isr(); } 14 | 15 | void exti9_5_isr() { button_isr(); } 16 | 17 | void exti15_10_isr() { button_isr(); } 18 | -------------------------------------------------------------------------------- /src/target/maple-mini/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_isr() { button_isr(); } 6 | 7 | void exti1_isr() { button_isr(); } 8 | 9 | void exti2_isr() { button_isr(); } 10 | 11 | void exti3_isr() { button_isr(); } 12 | 13 | void exti4_isr() { button_isr(); } 14 | 15 | void exti9_5_isr() { button_isr(); } 16 | 17 | void exti15_10_isr() { button_isr(); } 18 | -------------------------------------------------------------------------------- /src/target/nucleo-f303/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_isr() { button_isr(); } 6 | 7 | void exti1_isr() { button_isr(); } 8 | 9 | void exti2_isr() { button_isr(); } 10 | 11 | void exti3_isr() { button_isr(); } 12 | 13 | void exti4_isr() { button_isr(); } 14 | 15 | void exti9_5_isr() { button_isr(); } 16 | 17 | void exti15_10_isr() { button_isr(); } 18 | -------------------------------------------------------------------------------- /src/target/nucleo-f334/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_isr() { button_isr(); } 6 | 7 | void exti1_isr() { button_isr(); } 8 | 9 | void exti2_isr() { button_isr(); } 10 | 11 | void exti3_isr() { button_isr(); } 12 | 13 | void exti4_isr() { button_isr(); } 14 | 15 | void exti9_5_isr() { button_isr(); } 16 | 17 | void exti15_10_isr() { button_isr(); } 18 | -------------------------------------------------------------------------------- /src/target/nucleo-g431/isr/example-button-exti/isr.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | 5 | void exti0_isr() { button_isr(); } 6 | 7 | void exti1_isr() { button_isr(); } 8 | 9 | void exti2_isr() { button_isr(); } 10 | 11 | void exti3_isr() { button_isr(); } 12 | 13 | void exti4_isr() { button_isr(); } 14 | 15 | void exti9_5_isr() { button_isr(); } 16 | 17 | void exti15_10_isr() { button_isr(); } 18 | -------------------------------------------------------------------------------- /src/target/nucleo-f042/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "../nucleo/nucleo-32.h" 4 | 5 | #define ADC_RCC RCC_ADC 6 | #define ADC_CHANNEL 0 7 | 8 | #define BUTTON_GPIO_RCC RCC_GPIOA 9 | #define BUTTON_GPIO_PORT GPIOA 10 | #define BUTTON_GPIO_PIN GPIO0 11 | #define BUTTON_EXTI EXTI0 12 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_1_IRQ 13 | 14 | #include 15 | void initializeSystemClocks() { rcc_clock_setup_in_hsi_out_48mhz(); } 16 | -------------------------------------------------------------------------------- /tools/install-arm-toolchain.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | source tools/travis-ci-functions.sh 4 | 5 | [ ! -d arm9 ] || exit 0 6 | mkdir -p arm9 7 | pushd arm9 8 | test wget https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2019q4/RC2.1/gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2 9 | test tar -xf gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2 10 | popd 11 | test export PATH=$(pwd)/arm9/gcc-arm-none-eabi-9-2019-q4-major/bin:$PATH 12 | -------------------------------------------------------------------------------- /src/target/nucleo-f303/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "../nucleo/nucleo-64.h" 4 | 5 | #define ADC_RCC RCC_ADC12 6 | #define ADC_CCR_PRESCALE ADC_CCR_CKMODE_DIV1 7 | #define ADC_CHANNEL 1 8 | 9 | #define BUTTON_GPIO_RCC RCC_GPIOA 10 | #define BUTTON_GPIO_PORT GPIOA 11 | #define BUTTON_GPIO_PIN GPIO0 12 | #define BUTTON_EXTI EXTI0 13 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_IRQ 14 | 15 | #include 16 | void initializeSystemClocks() { rcc_clock_setup_pll(&rcc_hsi_configs[1]); } 17 | -------------------------------------------------------------------------------- /src/target/nucleo-f334/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "../nucleo/nucleo-64.h" 4 | 5 | #define ADC_RCC RCC_ADC12 6 | #define ADC_CCR_PRESCALE ADC_CCR_CKMODE_DIV1 7 | #define ADC_CHANNEL 1 8 | 9 | #define BUTTON_GPIO_RCC RCC_GPIOA 10 | #define BUTTON_GPIO_PORT GPIOA 11 | #define BUTTON_GPIO_PIN GPIO0 12 | #define BUTTON_EXTI EXTI0 13 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_IRQ 14 | 15 | #include 16 | void initializeSystemClocks() { rcc_clock_setup_pll(&rcc_hsi_configs[1]); } 17 | -------------------------------------------------------------------------------- /src/target/nucleo-g071/target.h: -------------------------------------------------------------------------------- 1 | #include "../nucleo/nucleo-64.h" 2 | 3 | #define ADC_RCC RCC_ADC 4 | #define ADC_CCR_PRESCALE ADC_CCR_PRESC_DIV1 5 | #define ADC_CHANNEL 0 6 | 7 | #define BUTTON_GPIO_RCC RCC_GPIOA 8 | #define BUTTON_GPIO_PORT GPIOA 9 | #define BUTTON_GPIO_PIN GPIO0 10 | #define BUTTON_EXTI EXTI0 11 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_1_IRQ 12 | 13 | #include 14 | void initializeSystemClocks() { rcc_clock_setup(&rcc_clock_config[RCC_CLOCK_CONFIG_HSI_PLL_64MHZ]); } 15 | -------------------------------------------------------------------------------- /.travis.yml: -------------------------------------------------------------------------------- 1 | dist: xenial 2 | 3 | language: minimal 4 | 5 | script: 6 | - tools/travis-ci-script.sh || travis_terminate 1 7 | 8 | before_deploy: 9 | - git tag continuous-deployment -f 10 | - git remote set-url origin https://${GITHUB_TOKEN}@github.com/jaxxzer/stm32-boilerplate 11 | - git push origin continuous-deployment -f 12 | 13 | deploy: 14 | provider: releases 15 | api_key: ${GITHUB_TOKEN} 16 | file: stm32-boilerplate-examples.tar 17 | overwrite: true 18 | skip_cleanup: true 19 | on: 20 | branch: master 21 | -------------------------------------------------------------------------------- /tools/README.md: -------------------------------------------------------------------------------- 1 | ## available tools: 2 | 3 | - build-all.sh: build all examples for all boards 4 | - clang-format.sh: run style check in-place on header and source files 5 | - generate-nvic-all.sh: generate interrupt handlers for supported stm32/libopencm3 targets 6 | - install-arm-toolchain.sh: install the supported gnu arm cortex-m toolchain 7 | - package-deployment.sh: bundle all example executables in tarball for upload to github relases 8 | - travis-ci-functions.sh: bash helper functions for continuous integration 9 | - travis-ci-script.sh: continuous integration test script; build all examples for all targets 10 | -------------------------------------------------------------------------------- /src/example/blink/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | 6 | int main() { 7 | initializeSystemClocks(); 8 | rcc_periph_clock_enable(LED_GPIO_RCC); 9 | 10 | #if defined(STM32F1) 11 | gpio_set_mode(LED_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, LED_GPIO_PIN); 12 | #else 13 | gpio_mode_setup(LED_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_GPIO_PIN); 14 | #endif 15 | 16 | while (1) { 17 | gpio_toggle(LED_GPIO_PORT, LED_GPIO_PIN); 18 | for (long i = 0; i < 1000000; i++) { 19 | asm("nop"); 20 | } 21 | } 22 | } 23 | -------------------------------------------------------------------------------- /src/target/blue-pill/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define LED_GPIO_RCC RCC_GPIOC 4 | #define LED_GPIO_PORT GPIOC 5 | #define LED_GPIO_PIN GPIO13 6 | 7 | #define ADC_PERIPH ADC1 8 | #define ADC_RCC RCC_ADC1 9 | #define ADC_CHANNEL 0 10 | 11 | #define ADC_GPIO_RCC RCC_GPIOA 12 | #define ADC_GPIO_PORT GPIOA 13 | #define ADC_GPIO_PIN GPIO0 14 | 15 | #include 16 | void initializeSystemClocks() { rcc_clock_setup_in_hsi_out_64mhz(); } 17 | 18 | #define BUTTON_GPIO_RCC RCC_GPIOA 19 | #define BUTTON_GPIO_PORT GPIOA 20 | #define BUTTON_GPIO_PIN GPIO0 21 | #define BUTTON_EXTI EXTI0 22 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_IRQ 23 | -------------------------------------------------------------------------------- /src/target/maple-mini/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define LED_GPIO_RCC RCC_GPIOB 4 | #define LED_GPIO_PORT GPIOB 5 | #define LED_GPIO_PIN GPIO1 6 | 7 | #define ADC_PERIPH ADC1 8 | #define ADC_RCC RCC_ADC1 9 | #define ADC_CHANNEL 0 10 | 11 | #define ADC_GPIO_RCC RCC_GPIOA 12 | #define ADC_GPIO_PORT GPIOA 13 | #define ADC_GPIO_PIN GPIO0 14 | 15 | #define BUTTON_GPIO_RCC RCC_GPIOB 16 | #define BUTTON_GPIO_PORT GPIOB 17 | #define BUTTON_GPIO_PIN GPIO8 18 | #define BUTTON_EXTI EXTI8 19 | #define BUTTON_EXTI_IRQ NVIC_EXTI9_5_IRQ 20 | 21 | #include 22 | void initializeSystemClocks() { rcc_clock_setup_in_hsi_out_64mhz(); } 23 | -------------------------------------------------------------------------------- /src/target/f030-minimal/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define LED_GPIO_RCC RCC_GPIOB 4 | #define LED_GPIO_PORT GPIOB 5 | #define LED_GPIO_PIN GPIO1 6 | 7 | #define ADC_PERIPH ADC1 8 | #define ADC_RCC RCC_ADC 9 | #define ADC_CHANNEL 0 10 | 11 | #define ADC_GPIO_RCC RCC_GPIOA 12 | #define ADC_GPIO_PORT GPIOA 13 | #define ADC_GPIO_PIN GPIO4 14 | 15 | #define BUTTON_GPIO_RCC RCC_GPIOA 16 | #define BUTTON_GPIO_PORT GPIOA 17 | #define BUTTON_GPIO_PIN GPIO0 18 | #define BUTTON_EXTI EXTI0 19 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_1_IRQ 20 | 21 | #include 22 | void initializeSystemClocks() { rcc_clock_setup_in_hsi_out_48mhz(); } 23 | -------------------------------------------------------------------------------- /tools/build-all.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | source tools/travis-ci-functions.sh 4 | 5 | test ./tools/generate-nvic-all.sh 6 | 7 | test export PATH=$(pwd)/arm9/gcc-arm-none-eabi-9-2019-q4-major/bin:$PATH 8 | 9 | mkdir -p build 10 | pushd build 11 | for TARGET_BOARD in $(ls ../src/target -I nucleo -I f) 12 | do 13 | echob "selecting TARGET_BOARD: ${TARGET_BOARD}" 14 | for EXAMPLE in $(ls ../src/example) 15 | do 16 | echob "selecting EXAMPLE: ${EXAMPLE}" 17 | if cmake --configure -DTARGET_BOARD=${TARGET_BOARD} -DEXAMPLE=${EXAMPLE} ..; then 18 | test make -j$(nproc) 19 | fi 20 | done 21 | done 22 | popd 23 | -------------------------------------------------------------------------------- /src/target/nucleo-g431/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "../nucleo/nucleo-64.h" 4 | 5 | #define ADC_RCC RCC_ADC12 6 | #define ADC_CCR_PRESCALE ADC_CCR_CKMODE_DIV1 7 | #define ADC_CHANNEL 1 8 | 9 | #define ADC_OPAMP_CHANNEL 13 10 | 11 | #define BUTTON_GPIO_RCC RCC_GPIOA 12 | #define BUTTON_GPIO_PORT GPIOA 13 | #define BUTTON_GPIO_PIN GPIO0 14 | #define BUTTON_EXTI EXTI0 15 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_IRQ 16 | 17 | #include 18 | void initializeSystemClocks() { 19 | rcc_clock_setup(&rcc_clock_config[RCC_CLOCK_CONFIG_HSI_PLL_170MHZ]); 20 | // enable rcc peripheral clock for dmamux 21 | *(uint32_t*)0x40021048 |= 0b100; 22 | } 23 | -------------------------------------------------------------------------------- /src/target/f/f1.cmake: -------------------------------------------------------------------------------- 1 | set(ADC_SRC 2 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v1.c 3 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f1/adc.c 4 | ) 5 | 6 | set(DMA_SRC 7 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_l1f013.c 8 | ) 9 | 10 | set(GPIO_SRC 11 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_all.c 12 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f1/gpio.c 13 | ) 14 | 15 | set(RCC_SRC 16 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/rcc_common_all.c 17 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_all.c 18 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f1/rcc.c 19 | ) 20 | 21 | SET(TIMER_SRC 22 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/timer_common_all.c 23 | ) 24 | -------------------------------------------------------------------------------- /tools/travis-ci-functions.sh: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env bash 2 | 3 | # print control for echob() 4 | bold=$(tput bold) 5 | normal=$(tput sgr0) 6 | 7 | # counter for travis_fold: https://github.com/travis-ci/travis-ci/issues/2285 8 | if [ -z $testN ]; then testN=0; fi 9 | 10 | # echo with bold text 11 | echob() { 12 | echo "${bold}${@}${normal}" 13 | } 14 | 15 | # run command helper for ci scripts 16 | test() { 17 | echo -en "travis_fold:start:$testN\r \r" 18 | echob "$@" 19 | time "$@" 20 | exitcode=$? 21 | echo -en "travis_fold:end:$testN\r \r" 22 | echob "$@ exited with $exitcode" 23 | if [ $exitcode -ne 0 ]; then exit $exitcode; fi 24 | testN=$(($testN+1)) 25 | } 26 | -------------------------------------------------------------------------------- /src/target/b-g431b-esc1/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #define LED_GPIO_RCC RCC_GPIOC 4 | #define LED_GPIO_PORT GPIOC 5 | #define LED_GPIO_PIN GPIO6 6 | 7 | #define ADC_PERIPH ADC1 8 | 9 | #define ADC_GPIO_RCC RCC_GPIOA 10 | #define ADC_GPIO_PORT GPIOA 11 | #define ADC_GPIO_PIN GPIO0 12 | 13 | #define ADC_RCC RCC_ADC12 14 | #define ADC_CCR_PRESCALE ADC_CCR_CKMODE_DIV1 15 | #define ADC_CHANNEL 1 16 | 17 | #define ADC_OPAMP_CHANNEL 13 18 | 19 | #define BUTTON_GPIO_RCC RCC_GPIOA 20 | #define BUTTON_GPIO_PORT GPIOA 21 | #define BUTTON_GPIO_PIN GPIO0 22 | #define BUTTON_EXTI EXTI0 23 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_IRQ 24 | 25 | #include 26 | void initializeSystemClocks() { 27 | rcc_clock_setup(&rcc_clock_config[RCC_CLOCK_CONFIG_HSI_PLL_170MHZ]); 28 | // enable rcc peripheral clock for dmamux 29 | *(uint32_t*)0x40021048 |= 0b100; 30 | } 31 | -------------------------------------------------------------------------------- /src/target/f/f0.cmake: -------------------------------------------------------------------------------- 1 | set(ADC_SRC 2 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2.c 3 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f0/adc.c 4 | ) 5 | 6 | set(DMA_SRC 7 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_l1f013.c 8 | ) 9 | 10 | set(GPIO_SRC 11 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_all.c 12 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_f0234.c 13 | ) 14 | 15 | set(RCC_SRC 16 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/rcc_common_all.c 17 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_all.c 18 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f0/rcc.c 19 | ) 20 | 21 | SET(TIMER_SRC 22 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/timer_common_all.c 23 | ) 24 | 25 | SET(USART_SRC 26 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_all.c 27 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_v2.c 28 | ) 29 | -------------------------------------------------------------------------------- /src/target/nucleo-f072/target.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "../nucleo/nucleo-64.h" 4 | 5 | #define ADC_RCC RCC_ADC 6 | #define ADC_CHANNEL 0 7 | 8 | /* 9 | * for some reason when PC13/EXTI13 (user button) is selected, the interrupt fires 10 | * continuously. there is some mention in the datasheet about shared control of PC13 11 | * state with RTC, but the RTC bits don't appear to be set up for that 12 | * use A0 instead 13 | */ 14 | 15 | // #define BUTTON_GPIO_RCC RCC_GPIOC 16 | // #define BUTTON_GPIO_PORT GPIOC 17 | // #define BUTTON_GPIO_PIN GPIO13 18 | // #define BUTTON_EXTI EXTI13 19 | // #define BUTTON_EXTI_IRQ NVIC_EXTI4_15_IRQ 20 | 21 | #define BUTTON_GPIO_RCC RCC_GPIOA 22 | #define BUTTON_GPIO_PORT GPIOA 23 | #define BUTTON_GPIO_PIN GPIO0 24 | #define BUTTON_EXTI EXTI0 25 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_1_IRQ 26 | 27 | #include 28 | void initializeSystemClocks() { rcc_clock_setup_in_hsi_out_48mhz(); } 29 | -------------------------------------------------------------------------------- /src/target/f/f.cmake: -------------------------------------------------------------------------------- 1 | if(NOT BOILERPLATE) 2 | set(BOILERPLATE ${PROJECT_SOURCE_DIR}) 3 | endif() 4 | # check architecture, f0 etc.. 5 | if(TARGET_MCU MATCHES "STM32F0.*") 6 | include(${BOILERPLATE}/src/target/f/f0.cmake) 7 | elseif(TARGET_MCU MATCHES "STM32G0.*") 8 | include(${BOILERPLATE}/src/target/f/g0.cmake) 9 | elseif(TARGET_MCU MATCHES "STM32F1.*") 10 | include(${BOILERPLATE}/src/target/f/f1.cmake) 11 | elseif(TARGET_MCU MATCHES "STM32F3.*") 12 | include(${BOILERPLATE}/src/target/f/f3.cmake) 13 | elseif(TARGET_MCU MATCHES "STM32L4.*") 14 | include(${BOILERPLATE}/src/target/f/l4.cmake) 15 | elseif(TARGET_MCU MATCHES "STM32G4.*") 16 | include(${BOILERPLATE}/src/target/f/g4.cmake) 17 | else() 18 | message("!!! ERROR no support for TARGET_MCU ${TARGET_MCU} !!!") 19 | endif() 20 | 21 | set(NVIC_SRC 22 | ${BOILERPLATE}/lib/libopencm3/lib/cm3/nvic.c 23 | ) 24 | 25 | set(EXTI_SRC 26 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/exti_common_all.c 27 | ) 28 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # stm32-boilerplate 2 | 3 | ![](https://travis-ci.com/jaxxzer/stm32-boilerplate.svg?branch=master) 4 | 5 | A minimal project to get going with stm32 microcontrollers. 6 | 7 | This project depends on `arm-none-eabi-gcc`, `cmake`, and `python`. Continuous integration depends also on `clang-format` for style checks. 8 | 9 | To install the toolchain and test your installation run: 10 | ```sh 11 | ./tools/travis-ci-script.sh 12 | ``` 13 | 14 | To build an example from the [example directory](/src/example) choose a [target board](/src/target) and do something like this: 15 | 16 | ```sh 17 | mkdir build 18 | cd build 19 | cmake --configure -DTARGET_BOARD=nucleo-f303 -DEXAMPLE=pwm-output-dma .. 20 | make 21 | ``` 22 | 23 | The program can be uploaded to the board with an stlink programmer by making the `flash` target: 24 | 25 | ```sh 26 | make flash 27 | ``` 28 | 29 | visual studio code can be used to upload and debug the code with openocd and the cortex-debug plugin 30 | -------------------------------------------------------------------------------- /src/target/f/g0.cmake: -------------------------------------------------------------------------------- 1 | set(ADC_SRC 2 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2.c 3 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/g0/adc.c 4 | ) 5 | 6 | set(DMA_SRC 7 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_l1f013.c 8 | ) 9 | 10 | set(GPIO_SRC 11 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_all.c 12 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_f0234.c 13 | ) 14 | 15 | set(RCC_SRC 16 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/rcc_common_all.c 17 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_all.c 18 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/g0/rcc.c 19 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/g0/pwr.c 20 | ) 21 | 22 | SET(TIMER_SRC 23 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/timer_common_all.c 24 | ) 25 | 26 | SET(USART_SRC 27 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_all.c 28 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_v2.c 29 | ) 30 | -------------------------------------------------------------------------------- /src/target/f/f3.cmake: -------------------------------------------------------------------------------- 1 | set(ADC_SRC 2 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2.c 3 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2_multi.c 4 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f3/adc.c 5 | ) 6 | 7 | set(DMA_SRC 8 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_l1f013.c 9 | ) 10 | 11 | set(GPIO_SRC 12 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_all.c 13 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_f0234.c 14 | ) 15 | 16 | set(RCC_SRC 17 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/rcc_common_all.c 18 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_all.c 19 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f3/rcc.c 20 | ) 21 | 22 | SET(TIMER_SRC 23 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/timer_common_all.c 24 | ) 25 | 26 | SET(USART_SRC 27 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_all.c 28 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_v2.c 29 | ) 30 | -------------------------------------------------------------------------------- /src/target/f/g4.cmake: -------------------------------------------------------------------------------- 1 | set(ADC_SRC 2 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2.c 3 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2_multi.c 4 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/f3/adc.c) 5 | 6 | set(DMA_SRC 7 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_l1f013.c 8 | ) 9 | 10 | set(GPIO_SRC 11 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_all.c 12 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_f0234.c 13 | ) 14 | 15 | set(RCC_SRC 16 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/rcc_common_all.c 17 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_all.c 18 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/g4/rcc.c 19 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/g4/pwr.c 20 | ) 21 | 22 | SET(TIMER_SRC 23 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/timer_common_all.c 24 | ) 25 | 26 | SET(USART_SRC 27 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_all.c 28 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_v2.c 29 | ) 30 | 31 | SET(BONUS_HARDWARE 32 | OPAMP_INTERNAL 33 | ) 34 | -------------------------------------------------------------------------------- /src/target/nucleo-l476/target.h: -------------------------------------------------------------------------------- 1 | #include "../nucleo/nucleo-64.h" 2 | 3 | #define ADC_RCC RCC_ADC 4 | #define ADC_CCR_PRESCALE ADC_CCR_PRESC_DIV1 5 | #define ADC_CHANNEL 0 6 | 7 | #define BUTTON_GPIO_RCC RCC_GPIOA 8 | #define BUTTON_GPIO_PORT GPIOA 9 | #define BUTTON_GPIO_PIN GPIO0 10 | #define BUTTON_EXTI EXTI0 11 | #define BUTTON_EXTI_IRQ NVIC_EXTI0_IRQ 12 | 13 | #include 14 | #include 15 | void initializeSystemClocks() { 16 | // https://github.com/libopencm3/libopencm3-examples/blob/master/examples/stm32/l4/stm32l476g-disco/basics/basics.c 17 | rcc_osc_on(RCC_HSI16); 18 | 19 | flash_prefetch_enable(); 20 | flash_set_ws(4); 21 | flash_dcache_enable(); 22 | flash_icache_enable(); 23 | /* 16MHz / 4 = > 4 * 40 = 160MHz VCO => 80MHz main pll */ 24 | rcc_set_main_pll(RCC_PLLCFGR_PLLSRC_HSI16, 4, 40, 0, 0, RCC_PLLCFGR_PLLR_DIV2); 25 | rcc_osc_on(RCC_PLL); 26 | rcc_set_sysclk_source(RCC_CFGR_SW_PLL); /* careful with the param here! */ 27 | rcc_wait_for_sysclk_status(RCC_PLL); 28 | /* FIXME - eventually handled internally */ 29 | rcc_ahb_frequency = 80e6; 30 | rcc_apb1_frequency = 80e6; 31 | rcc_apb2_frequency = 80e6; 32 | } 33 | -------------------------------------------------------------------------------- /src/target/f/l4.cmake: -------------------------------------------------------------------------------- 1 | set(ADC_SRC 2 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2.c 3 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/adc_common_v2_multi.c 4 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/l4/adc.c 5 | ) 6 | 7 | set(DMA_SRC 8 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_l1f013.c 9 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/dma_common_csel.c 10 | ) 11 | 12 | set(GPIO_SRC 13 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_all.c 14 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/gpio_common_f0234.c 15 | ) 16 | 17 | set(RCC_SRC 18 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/rcc_common_all.c 19 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_all.c 20 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/flash_common_idcache.c 21 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/l4/flash.c 22 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/l4/rcc.c 23 | ) 24 | 25 | SET(TIMER_SRC 26 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/timer_common_all.c 27 | ) 28 | 29 | SET(USART_SRC 30 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_all.c 31 | ${BOILERPLATE}/lib/libopencm3/lib/stm32/common/usart_common_v2.c 32 | ) 33 | -------------------------------------------------------------------------------- /src/example/button-exti/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | #include 3 | #include 4 | 5 | #include 6 | 7 | #include 8 | 9 | void button_isr() { 10 | // clear flag 11 | exti_reset_request(BUTTON_EXTI); 12 | 13 | gpio_toggle(LED_GPIO_PORT, LED_GPIO_PIN); 14 | } 15 | 16 | int main() { 17 | // setup led gpio 18 | rcc_periph_clock_enable(LED_GPIO_RCC); 19 | 20 | #if defined(STM32F1) 21 | gpio_set_mode(LED_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, LED_GPIO_PIN); 22 | #else 23 | gpio_mode_setup(LED_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_GPIO_PIN); 24 | #endif 25 | 26 | // setup button gpio 27 | rcc_periph_clock_enable(BUTTON_GPIO_RCC); 28 | 29 | #if defined(STM32F1) 30 | gpio_set_mode(BUTTON_GPIO_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, BUTTON_GPIO_PIN); 31 | #else 32 | gpio_mode_setup(BUTTON_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, BUTTON_GPIO_PIN); 33 | #endif 34 | 35 | // enable exti irq 36 | nvic_enable_irq(BUTTON_EXTI_IRQ); 37 | 38 | // setup exti 39 | exti_select_source(BUTTON_EXTI, BUTTON_GPIO_PORT); 40 | exti_set_trigger(BUTTON_EXTI, EXTI_TRIGGER_FALLING); 41 | exti_enable_request(BUTTON_EXTI); 42 | 43 | // done! 44 | while (1) { 45 | }; 46 | } 47 | -------------------------------------------------------------------------------- /src/target/blue-pill/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | 9 | #define PWM_GPIO_MAPR AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP1 10 | 11 | #define PWM_TIMER TIM2 12 | #define PWM_TIMER_RCC RCC_TIM2 13 | #define PWM_TIMER_OC_ID TIM_OC1 14 | #define PWM_TIMER_OCM TIM_OCM_PWM1 15 | 16 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 17 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 18 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 19 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 20 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 21 | 22 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 23 | 24 | #define PWM_DMA DMA1 25 | #define PWM_DMA_RCC RCC_DMA1 26 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 27 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 28 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 29 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 30 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 31 | 32 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 33 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 34 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | 40 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 41 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 42 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 43 | 44 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB 45 | #define BRIDGE_LO_A_GPIO_PORT GPIOB 46 | #define BRIDGE_LO_A_GPIO_PIN GPIO13 47 | 48 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 49 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 50 | #define BRIDGE_LO_B_GPIO_PIN GPIO14 51 | 52 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 53 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 54 | #define BRIDGE_LO_C_GPIO_PIN GPIO15 55 | -------------------------------------------------------------------------------- /src/target/maple-mini/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | 9 | #define PWM_GPIO_MAPR AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP1 10 | 11 | #define PWM_TIMER TIM2 12 | #define PWM_TIMER_RCC RCC_TIM2 13 | #define PWM_TIMER_OC_ID TIM_OC1 14 | #define PWM_TIMER_OCM TIM_OCM_PWM1 15 | 16 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 17 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 18 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 19 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 20 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 21 | 22 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 23 | 24 | #define PWM_DMA DMA1 25 | #define PWM_DMA_RCC RCC_DMA1 26 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 27 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 28 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 29 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 30 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 31 | 32 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 33 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 34 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | 40 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 41 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 42 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 43 | 44 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB 45 | #define BRIDGE_LO_A_GPIO_PORT GPIOB 46 | #define BRIDGE_LO_A_GPIO_PIN GPIO13 47 | 48 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 49 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 50 | #define BRIDGE_LO_B_GPIO_PIN GPIO14 51 | 52 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 53 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 54 | #define BRIDGE_LO_C_GPIO_PIN GPIO15 55 | -------------------------------------------------------------------------------- /src/target/nucleo-f303/target-pwm.h: -------------------------------------------------------------------------------- 1 | #include "target.h" 2 | 3 | #define PWM_GPIO_PORT GPIOA 4 | #define PWM_GPIO_RCC RCC_GPIOA 5 | #define PWM_GPIO_PIN GPIO15 6 | #define PWM_GPIO_AF GPIO_AF2 7 | 8 | #define PWM_TIMER TIM8 9 | #define PWM_TIMER_RCC RCC_TIM8 10 | #define PWM_TIMER_OC_ID TIM_OC1 11 | #define PWM_TIMER_OCM TIM_OCM_PWM1 12 | 13 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 14 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 15 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 16 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 17 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 18 | 19 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 20 | 21 | #define PWM_DMA DMA2 22 | #define PWM_DMA_RCC RCC_DMA2 23 | #define PWM_DMA_CHANNEL DMA_CHANNEL3 24 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 25 | // TIM8 is a 16 bit counter, with 16 bit CCR registers 26 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_16BIT 27 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 28 | 29 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 30 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 31 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 32 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF6 33 | 34 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 35 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 36 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 37 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF6 38 | 39 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 40 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 41 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 42 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF6 43 | 44 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA 45 | #define BRIDGE_LO_A_GPIO_PORT GPIOA 46 | #define BRIDGE_LO_A_GPIO_PIN GPIO11 47 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF6 48 | 49 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 50 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 51 | #define BRIDGE_LO_B_GPIO_PIN GPIO0 52 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF6 53 | 54 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 55 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 56 | #define BRIDGE_LO_C_GPIO_PIN GPIO1 57 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF6 58 | -------------------------------------------------------------------------------- /src/target/nucleo-f334/target-pwm.h: -------------------------------------------------------------------------------- 1 | #include "target.h" 2 | 3 | #define PWM_GPIO_PORT GPIOA 4 | #define PWM_GPIO_RCC RCC_GPIOA 5 | #define PWM_GPIO_PIN GPIO15 6 | #define PWM_GPIO_AF GPIO_AF1 7 | 8 | #define PWM_TIMER TIM2 9 | #define PWM_TIMER_RCC RCC_TIM2 10 | #define PWM_TIMER_OC_ID TIM_OC1 11 | #define PWM_TIMER_OCM TIM_OCM_PWM1 12 | 13 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 14 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 15 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 16 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 17 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 18 | 19 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 20 | 21 | #define PWM_DMA DMA1 22 | #define PWM_DMA_RCC RCC_DMA1 23 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 24 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 25 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 26 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 27 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 28 | 29 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 30 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 31 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 32 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF6 33 | 34 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 35 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 36 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 37 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF6 38 | 39 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 40 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 41 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 42 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF6 43 | 44 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA 45 | #define BRIDGE_LO_A_GPIO_PORT GPIOA 46 | #define BRIDGE_LO_A_GPIO_PIN GPIO7 47 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF6 48 | 49 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 50 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 51 | #define BRIDGE_LO_B_GPIO_PIN GPIO0 52 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF6 53 | 54 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 55 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 56 | #define BRIDGE_LO_C_GPIO_PIN GPIO1 57 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF6 58 | -------------------------------------------------------------------------------- /src/target/f030-minimal/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | #define PWM_GPIO_AF GPIO_AF2 9 | 10 | #define PWM_TIMER TIM2 11 | #define PWM_TIMER_RCC RCC_TIM2 12 | #define PWM_TIMER_OC_ID TIM_OC1 13 | #define PWM_TIMER_OCM TIM_OCM_PWM1 14 | 15 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 16 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 17 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 18 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 19 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 20 | 21 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 22 | 23 | #define PWM_DMA DMA1 24 | #define PWM_DMA_RCC RCC_DMA1 25 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 26 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 27 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 28 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 29 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 30 | 31 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 32 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 33 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 34 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF2 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF2 40 | 41 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 42 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 43 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 44 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF2 45 | 46 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA 47 | #define BRIDGE_LO_A_GPIO_PORT GPIOA 48 | #define BRIDGE_LO_A_GPIO_PIN GPIO7 49 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF2 50 | 51 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 52 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 53 | #define BRIDGE_LO_B_GPIO_PIN GPIO0 54 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF2 55 | 56 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 57 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 58 | #define BRIDGE_LO_C_GPIO_PIN GPIO1 59 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF2 60 | -------------------------------------------------------------------------------- /src/target/nucleo-f042/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | #define PWM_GPIO_AF GPIO_AF2 9 | 10 | #define PWM_TIMER TIM2 11 | #define PWM_TIMER_RCC RCC_TIM2 12 | #define PWM_TIMER_OC_ID TIM_OC1 13 | #define PWM_TIMER_OCM TIM_OCM_PWM1 14 | 15 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 16 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 17 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 18 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 19 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 20 | 21 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 22 | 23 | #define PWM_DMA DMA1 24 | #define PWM_DMA_RCC RCC_DMA1 25 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 26 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 27 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 28 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 29 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 30 | 31 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 32 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 33 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 34 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF2 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF2 40 | 41 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 42 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 43 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 44 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF2 45 | 46 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA 47 | #define BRIDGE_LO_A_GPIO_PORT GPIOA 48 | #define BRIDGE_LO_A_GPIO_PIN GPIO7 49 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF2 50 | 51 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 52 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 53 | #define BRIDGE_LO_B_GPIO_PIN GPIO0 54 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF2 55 | 56 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 57 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 58 | #define BRIDGE_LO_C_GPIO_PIN GPIO1 59 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF2 60 | -------------------------------------------------------------------------------- /src/target/nucleo-f072/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | #define PWM_GPIO_AF GPIO_AF2 9 | 10 | #define PWM_TIMER TIM2 11 | #define PWM_TIMER_RCC RCC_TIM2 12 | #define PWM_TIMER_OC_ID TIM_OC1 13 | #define PWM_TIMER_OCM TIM_OCM_PWM1 14 | 15 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 16 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 17 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 18 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 19 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 20 | 21 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 22 | 23 | #define PWM_DMA DMA1 24 | #define PWM_DMA_RCC RCC_DMA1 25 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 26 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 27 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 28 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 29 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 30 | 31 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 32 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 33 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 34 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF2 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF2 40 | 41 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 42 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 43 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 44 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF2 45 | 46 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOA 47 | #define BRIDGE_LO_A_GPIO_PORT GPIOA 48 | #define BRIDGE_LO_A_GPIO_PIN GPIO7 49 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF2 50 | 51 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 52 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 53 | #define BRIDGE_LO_B_GPIO_PIN GPIO0 54 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF2 55 | 56 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 57 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 58 | #define BRIDGE_LO_C_GPIO_PIN GPIO1 59 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF2 60 | -------------------------------------------------------------------------------- /src/target/nucleo-g431/target-pwm.h: -------------------------------------------------------------------------------- 1 | #include "target.h" 2 | 3 | #define PWM_GPIO_PORT GPIOA 4 | #define PWM_GPIO_RCC RCC_GPIOA 5 | #define PWM_GPIO_PIN GPIO15 6 | #define PWM_GPIO_AF GPIO_AF1 7 | 8 | #define PWM_TIMER TIM2 9 | #define PWM_TIMER_RCC RCC_TIM2 10 | #define PWM_TIMER_OC_ID TIM_OC1 11 | #define PWM_TIMER_OCM TIM_OCM_PWM1 12 | 13 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 14 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 15 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 16 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 17 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 18 | 19 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 20 | 21 | #define PWM_DMA DMA1 22 | #define PWM_DMA_RCC RCC_DMA1 23 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 24 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 25 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 26 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 27 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 28 | 29 | #define PWM_DMAMUX_REQID 56 30 | 31 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 32 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 33 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 34 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF6 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF6 40 | 41 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 42 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 43 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 44 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF6 45 | 46 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOC 47 | #define BRIDGE_LO_A_GPIO_PORT GPIOC 48 | #define BRIDGE_LO_A_GPIO_PIN GPIO13 49 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF4 50 | 51 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOA 52 | #define BRIDGE_LO_B_GPIO_PORT GPIOA 53 | #define BRIDGE_LO_B_GPIO_PIN GPIO12 54 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF6 55 | 56 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 57 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 58 | #define BRIDGE_LO_C_GPIO_PIN GPIO15 59 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF4 60 | -------------------------------------------------------------------------------- /src/target/b-g431b-esc1/target-pwm.h: -------------------------------------------------------------------------------- 1 | #include "target.h" 2 | 3 | #define PWM_GPIO_PORT GPIOA 4 | #define PWM_GPIO_RCC RCC_GPIOA 5 | #define PWM_GPIO_PIN GPIO15 6 | #define PWM_GPIO_AF GPIO_AF1 7 | 8 | #define PWM_TIMER TIM2 9 | #define PWM_TIMER_RCC RCC_TIM2 10 | #define PWM_TIMER_OC_ID TIM_OC1 11 | #define PWM_TIMER_OCM TIM_OCM_PWM1 12 | 13 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 14 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 15 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 16 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 17 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 18 | 19 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 20 | 21 | #define PWM_DMA DMA1 22 | #define PWM_DMA_RCC RCC_DMA1 23 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 24 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 25 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 26 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 27 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 28 | 29 | #define PWM_DMAMUX_REQID 56 30 | 31 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 32 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 33 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 34 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF6 35 | 36 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 37 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 38 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 39 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF6 40 | 41 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 42 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 43 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 44 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF6 45 | 46 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOC 47 | #define BRIDGE_LO_A_GPIO_PORT GPIOC 48 | #define BRIDGE_LO_A_GPIO_PIN GPIO13 49 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF4 50 | 51 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOA 52 | #define BRIDGE_LO_B_GPIO_PORT GPIOA 53 | #define BRIDGE_LO_B_GPIO_PIN GPIO12 54 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF6 55 | 56 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 57 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 58 | #define BRIDGE_LO_C_GPIO_PIN GPIO15 59 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF4 60 | -------------------------------------------------------------------------------- /src/target/nucleo-g071/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | #define PWM_GPIO_AF GPIO_AF2 9 | 10 | #define PWM_TIMER TIM2 11 | #define PWM_TIMER_RCC RCC_TIM2 12 | #define PWM_TIMER_OC_ID TIM_OC1 13 | #define PWM_TIMER_OCM TIM_OCM_PWM1 14 | 15 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 16 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 17 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 18 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 19 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 20 | 21 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 22 | 23 | #define PWM_DMA DMA1 24 | #define PWM_DMA_RCC RCC_DMA1 25 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 26 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 27 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 28 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 29 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 30 | 31 | #define PWM_DMAMUX_REQID 26 32 | 33 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 34 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 35 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 36 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF2 37 | 38 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 39 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 40 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 41 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF2 42 | 43 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 44 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 45 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 46 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF2 47 | 48 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB 49 | #define BRIDGE_LO_A_GPIO_PORT GPIOB 50 | #define BRIDGE_LO_A_GPIO_PIN GPIO13 51 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF2 52 | 53 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 54 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 55 | #define BRIDGE_LO_B_GPIO_PIN GPIO14 56 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF2 57 | 58 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 59 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 60 | #define BRIDGE_LO_C_GPIO_PIN GPIO15 61 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF2 62 | -------------------------------------------------------------------------------- /src/target/nucleo-l476/target-pwm.h: -------------------------------------------------------------------------------- 1 | #pragma once 2 | 3 | #include "target.h" 4 | 5 | #define PWM_GPIO_PORT GPIOA 6 | #define PWM_GPIO_RCC RCC_GPIOA 7 | #define PWM_GPIO_PIN GPIO15 8 | #define PWM_GPIO_AF GPIO_AF1 9 | 10 | #define PWM_TIMER TIM2 11 | #define PWM_TIMER_RCC RCC_TIM2 12 | #define PWM_TIMER_OC_ID TIM_OC1 13 | #define PWM_TIMER_OCM TIM_OCM_PWM1 14 | 15 | #define PWM_TIMER_IC_ID_RISE TIM_IC1 16 | #define PWM_TIMER_IC_ID_FALL TIM_IC2 17 | #define PWM_TIMER_IC_IN TIM_IC_IN_TI1 // trigger input 18 | #define PWM_TIMER_SLAVE_MODE TIM_SMCR_SMS_RM 19 | #define PWM_TIMER_SLAVE_TS TIM_SMCR_TS_TI1FP1 20 | 21 | #define PWM_TIMER_OC_ID_FALL TIM_OC2 22 | 23 | // channel 3 stream 5 24 | #define PWM_DMA DMA1 25 | #define PWM_DMA_RCC RCC_DMA1 26 | #define PWM_DMA_CHANNEL DMA_CHANNEL5 27 | #define PWM_DMA_PERIPH TIM_CCR1(PWM_TIMER) 28 | // TIM2 is a 32 bit counter, with 32 bit CCR registers 29 | #define PWM_DMA_PERIPH_SIZE DMA_CCR_PSIZE_32BIT 30 | #define PWM_DMA_REQUEST TIM_DIER_CC1DE 31 | 32 | #define PWM_DMA_CSEL 0b100 33 | 34 | #define BRIDGE_HI_A_GPIO_RCC RCC_GPIOA 35 | #define BRIDGE_HI_A_GPIO_PORT GPIOA 36 | #define BRIDGE_HI_A_GPIO_PIN GPIO8 37 | #define BRIDGE_HI_A_GPIO_AF GPIO_AF2 38 | 39 | #define BRIDGE_HI_B_GPIO_RCC RCC_GPIOA 40 | #define BRIDGE_HI_B_GPIO_PORT GPIOA 41 | #define BRIDGE_HI_B_GPIO_PIN GPIO9 42 | #define BRIDGE_HI_B_GPIO_AF GPIO_AF2 43 | 44 | #define BRIDGE_HI_C_GPIO_RCC RCC_GPIOA 45 | #define BRIDGE_HI_C_GPIO_PORT GPIOA 46 | #define BRIDGE_HI_C_GPIO_PIN GPIO10 47 | #define BRIDGE_HI_C_GPIO_AF GPIO_AF2 48 | 49 | #define BRIDGE_LO_A_GPIO_RCC RCC_GPIOB 50 | #define BRIDGE_LO_A_GPIO_PORT GPIOB 51 | #define BRIDGE_LO_A_GPIO_PIN GPIO13 52 | #define BRIDGE_LO_A_GPIO_AF GPIO_AF2 53 | 54 | #define BRIDGE_LO_B_GPIO_RCC RCC_GPIOB 55 | #define BRIDGE_LO_B_GPIO_PORT GPIOB 56 | #define BRIDGE_LO_B_GPIO_PIN GPIO14 57 | #define BRIDGE_LO_B_GPIO_AF GPIO_AF2 58 | 59 | #define BRIDGE_LO_C_GPIO_RCC RCC_GPIOB 60 | #define BRIDGE_LO_C_GPIO_PORT GPIOB 61 | #define BRIDGE_LO_C_GPIO_PIN GPIO15 62 | #define BRIDGE_LO_C_GPIO_AF GPIO_AF2 63 | -------------------------------------------------------------------------------- /src/example/pwm-output/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | /* 8 | * This example outputs a static pwm signal on a gpio 9 | * 10 | * The gpio is configured as alternate function + output 11 | * 12 | * When psc = 0, arr = 1, ccr = 1, the pwm signal is 50% duty, 13 | * and the frequency is one-half of the timer counter frequency 14 | */ 15 | 16 | const uint16_t psc = 19; // prescaler 17 | const uint16_t arr = 1; // auto-reload 18 | const uint16_t ccr = 1; // compare 19 | 20 | void setupGpio() { 21 | rcc_periph_clock_enable(PWM_GPIO_RCC); 22 | 23 | #if defined(STM32F1) 24 | rcc_periph_clock_enable(RCC_AFIO); // don't forget to do this! 25 | gpio_set_mode(PWM_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, PWM_GPIO_PIN); 26 | // gpios a13 and a14 are reserved for SWD, and may not be used 27 | gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON, PWM_GPIO_MAPR); 28 | #else 29 | gpio_mode_setup(PWM_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_GPIO_PIN); 30 | gpio_set_af(PWM_GPIO_PORT, PWM_GPIO_AF, PWM_GPIO_PIN); 31 | gpio_set_output_options(PWM_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, PWM_GPIO_PIN); 32 | #endif 33 | } 34 | 35 | void setupTimer() { 36 | rcc_periph_clock_enable(PWM_TIMER_RCC); 37 | // stretch clock with larger dividers in order to time longer signals without overruns 38 | timer_set_prescaler(PWM_TIMER, psc); 39 | timer_set_period(PWM_TIMER, arr); 40 | timer_set_oc_value(PWM_TIMER, PWM_TIMER_OC_ID, ccr); 41 | timer_set_oc_mode(PWM_TIMER, PWM_TIMER_OC_ID, TIM_OCM_PWM1); 42 | timer_enable_oc_preload(PWM_TIMER, PWM_TIMER_OC_ID); 43 | timer_enable_oc_output(PWM_TIMER, PWM_TIMER_OC_ID); 44 | timer_enable_break_main_output(PWM_TIMER); // shouldn't do/be part of f0 aapi? 45 | 46 | timer_enable_counter(PWM_TIMER); 47 | } 48 | 49 | int main() { 50 | initializeSystemClocks(); 51 | setupGpio(); 52 | setupTimer(); 53 | while (1) { 54 | }; 55 | } 56 | -------------------------------------------------------------------------------- /src/example/adc-sw-trigger/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | uint8_t channel_array[] = {ADC_CHANNEL}; 8 | 9 | void led_setup(); 10 | void adc_setup(); 11 | 12 | int main() { 13 | initializeSystemClocks(); 14 | led_setup(); 15 | adc_setup(); 16 | 17 | uint32_t count; 18 | uint16_t adcValue; 19 | 20 | while (1) { 21 | adc_start_conversion_regular(ADC_PERIPH); 22 | 23 | while (!adc_eoc(ADC_PERIPH)) { 24 | }; 25 | 26 | adcValue = adc_read_regular(ADC_PERIPH); 27 | 28 | if (count++ > adcValue * 10) { 29 | gpio_toggle(LED_GPIO_PORT, LED_GPIO_PIN); 30 | count = 0; 31 | } 32 | } 33 | } 34 | 35 | void adc_setup() { 36 | rcc_periph_clock_enable(ADC_GPIO_RCC); 37 | 38 | #if defined(STM32F1) 39 | gpio_set_mode(ADC_GPIO_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, ADC_GPIO_PIN); 40 | #else 41 | gpio_mode_setup(ADC_GPIO_PORT, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, ADC_GPIO_PIN); 42 | #endif 43 | 44 | rcc_periph_clock_enable(ADC_RCC); 45 | 46 | #if defined(STM32F3) || defined(STM32G0) || defined(STM32G4) 47 | adc_enable_regulator(ADC_PERIPH); 48 | for (long i = 0; i < 10000; i++) 49 | asm("nop"); 50 | adc_set_clk_prescale(ADC_PERIPH, ADC_CCR_PRESCALE); 51 | #endif 52 | 53 | #if defined(STM32F1) 54 | adc_power_on(ADC_PERIPH); 55 | adc_enable_external_trigger_regular(ADC_PERIPH, ADC_CR2_EXTSEL_SWSTART); 56 | adc_enable_scan_mode(ADC_PERIPH); 57 | adc_calibrate(ADC_PERIPH); 58 | #else 59 | adc_calibrate(ADC_PERIPH); 60 | adc_power_on(ADC_PERIPH); 61 | #endif 62 | 63 | adc_set_regular_sequence(ADC_PERIPH, 1, channel_array); 64 | } 65 | 66 | void led_setup() { 67 | rcc_periph_clock_enable(LED_GPIO_RCC); 68 | 69 | #if defined(STM32F1) 70 | gpio_set_mode(LED_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, LED_GPIO_PIN); 71 | #else 72 | gpio_mode_setup(LED_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_GPIO_PIN); 73 | #endif 74 | 75 | gpio_set(LED_GPIO_PORT, LED_GPIO_PIN); 76 | } 77 | -------------------------------------------------------------------------------- /src/target-mcu.cmake: -------------------------------------------------------------------------------- 1 | if(TARGET_MCU MATCHES "STM32.*") 2 | message("STM32 target") 3 | if(TARGET_MCU MATCHES "STM32F0.*") 4 | set(TARGET_CPU "cortex-m0") 5 | set(ARCH_FLAGS "-mcpu=cortex-m0 -mthumb -mfpu=vfp") 6 | set(OPENOCD_TARGET target/stm32f0x.cfg) 7 | set(IRQ_JSON ./include/libopencm3/stm32/f0/irq.json) 8 | # select libopencm3 target 9 | add_compile_definitions(STM32F0) 10 | elseif(${TARGET_MCU} MATCHES "STM32G0.*") 11 | set(TARGET_CPU "cortex-m0plus") 12 | set(ARCH_FLAGS "-mcpu=cortex-m0plus -mthumb -mfpu=vfp") 13 | set(OPENOCD_TARGET target/stm32g0x.cfg) 14 | set(IRQ_JSON ./include/libopencm3/stm32/g0/irq.json) 15 | # select libopencm3 target 16 | add_definitions(-DSTM32G0) 17 | elseif(TARGET_MCU MATCHES "STM32F1.*") 18 | set(TARGET_CPU "cortex-m3") 19 | set(ARCH_FLAGS "-mcpu=cortex-m3 -mthumb -mfpu=vfp") 20 | set(IRQ_JSON ./include/libopencm3/stm32/f1/irq.json) 21 | set(OPENOCD_TARGET target/stm32f1x.cfg) 22 | # select libopencm3 target 23 | add_compile_definitions(STM32F1) 24 | elseif(TARGET_MCU MATCHES "STM32F3.*") 25 | set(TARGET_CPU "cortex-m4") 26 | set(ARCH_FLAGS "-mcpu=cortex-m4 -mthumb -mfpu=vfp") 27 | set(IRQ_JSON ./include/libopencm3/stm32/f3/irq.json) 28 | set(OPENOCD_TARGET target/stm32f3x.cfg) 29 | # select libopencm3 target 30 | add_compile_definitions(STM32F3) 31 | elseif(TARGET_MCU MATCHES "STM32L4.*") 32 | set(TARGET_CPU "cortex-m4") 33 | set(ARCH_FLAGS "-mcpu=cortex-m4 -mthumb -mfpu=vfp") 34 | set(IRQ_JSON ./include/libopencm3/stm32/l4/irq.json) 35 | set(OPENOCD_TARGET target/stm32l4x.cfg) 36 | # select libopencm3 target 37 | add_compile_definitions(STM32L4) 38 | elseif(TARGET_MCU MATCHES "STM32G4.*") 39 | set(TARGET_CPU "cortex-m4") 40 | set(ARCH_FLAGS "-mcpu=cortex-m4 -mthumb -mfpu=vfp") 41 | set(IRQ_JSON ./include/libopencm3/stm32/g4/irq.json) 42 | set(OPENOCD_TARGET target/stm32g4x.cfg) 43 | # select libopencm3 target 44 | add_compile_definitions(STM32G4) 45 | else() 46 | error("NO SUPPORT for STM32 target mcu: ${TARGET_MCU}") 47 | endif() 48 | endif() 49 | -------------------------------------------------------------------------------- /src/example/adc-continuous/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | uint8_t channel_array[] = {ADC_CHANNEL}; 8 | 9 | void led_setup(); 10 | void adc_setup(); 11 | 12 | int main() { 13 | initializeSystemClocks(); 14 | led_setup(); 15 | adc_setup(); 16 | adc_start_conversion_regular(ADC_PERIPH); 17 | 18 | uint32_t count; 19 | uint16_t adcValue; 20 | 21 | while (1) { 22 | adcValue = adc_read_regular(ADC_PERIPH); 23 | 24 | if (count++ > adcValue * 50) { 25 | gpio_toggle(LED_GPIO_PORT, LED_GPIO_PIN); 26 | count = 0; 27 | } 28 | } 29 | } 30 | 31 | void adc_setup() { 32 | rcc_periph_clock_enable(ADC_GPIO_RCC); 33 | 34 | #if defined(STM32F1) 35 | gpio_set_mode(ADC_GPIO_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_ANALOG, ADC_GPIO_PIN); 36 | #else 37 | gpio_mode_setup(ADC_GPIO_PORT, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, ADC_GPIO_PIN); 38 | #endif 39 | 40 | rcc_periph_clock_enable(ADC_RCC); 41 | 42 | #if defined(STM32F3) || defined(STM32G0) || defined(STM32G4) 43 | adc_enable_regulator(ADC_PERIPH); 44 | for (long i = 0; i < 10000; i++) 45 | asm("nop"); 46 | adc_set_clk_prescale(ADC_PERIPH, ADC_CCR_PRESCALE); 47 | #endif 48 | 49 | #if defined(STM32F1) 50 | adc_power_on(ADC_PERIPH); 51 | adc_enable_external_trigger_regular(ADC_PERIPH, ADC_CR2_EXTSEL_SWSTART); 52 | adc_enable_scan_mode(ADC_PERIPH); 53 | adc_calibrate(ADC_PERIPH); 54 | #else 55 | adc_calibrate(ADC_PERIPH); 56 | adc_power_on(ADC_PERIPH); 57 | ADC_CFGR1(ADC_PERIPH) |= ADC_CFGR1_OVRMOD; 58 | #endif 59 | 60 | adc_set_regular_sequence(ADC_PERIPH, 1, channel_array); 61 | adc_set_continuous_conversion_mode(ADC_PERIPH); 62 | 63 | for (long i = 0; i < 10000; i++) 64 | asm("nop"); 65 | } 66 | 67 | void led_setup() { 68 | rcc_periph_clock_enable(LED_GPIO_RCC); 69 | 70 | #if defined(STM32F1) 71 | gpio_set_mode(LED_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, LED_GPIO_PIN); 72 | #else 73 | gpio_mode_setup(LED_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_GPIO_PIN); 74 | #endif 75 | 76 | gpio_set(LED_GPIO_PORT, LED_GPIO_PIN); 77 | } 78 | -------------------------------------------------------------------------------- /src/example/pwm-input/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | /* 8 | * This example captures a pwm signal period and duty 9 | * The method employed here is described in the 'pwm input' 10 | * section of the stm32 reference manuals 11 | * 12 | * period is captured in CCR of PWM_TIMER_IC_ID_RISE 13 | * duty is captured in CCR of PWM_TIMER_IC_ID_FALL 14 | */ 15 | 16 | const uint16_t psc = 19; 17 | const uint16_t arr = 0xffff; 18 | 19 | void setupGpio() { 20 | rcc_periph_clock_enable(PWM_GPIO_RCC); 21 | 22 | #if defined(STM32F1) 23 | rcc_periph_clock_enable(RCC_AFIO); // don't forget to do this! 24 | gpio_set_mode(PWM_GPIO_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, PWM_GPIO_PIN); 25 | gpio_primary_remap(AFIO_MAPR_SWJ_CFG_FULL_SWJ, PWM_GPIO_MAPR); 26 | #else 27 | gpio_mode_setup(PWM_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_GPIO_PIN); 28 | gpio_set_af(PWM_GPIO_PORT, PWM_GPIO_AF, PWM_GPIO_PIN); 29 | #endif 30 | } 31 | 32 | void setupTimer() { 33 | // trigger input 1 will: 34 | // 1. capture the signal period in CCR1 (rising edge - rising edge time) 35 | // 2. reset the counter (the timer keeps running) 36 | rcc_periph_clock_enable(PWM_TIMER_RCC); // enable timer clock 37 | // stretch clock with larger dividers in order to time longer signals without overruns 38 | timer_set_prescaler(PWM_TIMER, psc); 39 | timer_set_period(PWM_TIMER, arr); // set ARR 40 | timer_ic_set_input(PWM_TIMER, PWM_TIMER_IC_ID_RISE, PWM_TIMER_IC_IN); // set both input channels to trigger input 1 41 | timer_ic_set_input(PWM_TIMER, PWM_TIMER_IC_ID_FALL, PWM_TIMER_IC_IN); 42 | // set second input channel trigger polarity to falling (rising is default, first input channel is rising) 43 | // input/output configurations are on the same register (so we use set oc_polarity..) 44 | timer_set_oc_polarity_low(PWM_TIMER, PWM_TIMER_OC_ID_FALL); 45 | 46 | timer_ic_enable(PWM_TIMER, PWM_TIMER_IC_ID_RISE); 47 | timer_ic_enable(PWM_TIMER, PWM_TIMER_IC_ID_FALL); 48 | 49 | // set slave mode, reset counter on trigger 50 | timer_slave_set_mode(PWM_TIMER, PWM_TIMER_SLAVE_MODE); 51 | 52 | // set slave mode trigger to trigger input 1 53 | timer_slave_set_trigger(PWM_TIMER, PWM_TIMER_SLAVE_TS); 54 | 55 | timer_enable_counter(PWM_TIMER); // set CEN 56 | } 57 | 58 | int main() { 59 | initializeSystemClocks(); 60 | setupGpio(); 61 | setupTimer(); 62 | while (1) { 63 | }; 64 | } 65 | -------------------------------------------------------------------------------- /src/example/opamp-internal/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | * this example uses the internal opamp1 in PGA mode, where 3 | * the signal present on VINP0 (PA1) is amplified with gain=2 4 | * the output signal is connected internally to the adc, and is 5 | * disconnected to the gpio for the opamp output, so that gpio 6 | * can be used for other puroposes. VINP0 (PA1) must be configured 7 | * in analog mode (default configuration at reset, so we don't tend 8 | * to that here) 9 | */ 10 | 11 | #include 12 | 13 | #include 14 | #include 15 | #include 16 | 17 | #include 18 | 19 | uint8_t channel_array[] = {ADC_OPAMP_CHANNEL}; 20 | 21 | void led_setup(); 22 | void adc_setup(); 23 | void opamp_setup(); 24 | 25 | int main() { 26 | initializeSystemClocks(); 27 | led_setup(); 28 | opamp_setup(); 29 | adc_setup(); 30 | 31 | adc_start_conversion_regular(ADC_PERIPH); 32 | 33 | uint32_t count; 34 | uint16_t adcValue; 35 | 36 | while (1) { 37 | adcValue = adc_read_regular(ADC_PERIPH); 38 | 39 | if (count++ > adcValue * 50) { 40 | gpio_toggle(LED_GPIO_PORT, LED_GPIO_PIN); 41 | count = 0; 42 | } 43 | } 44 | } 45 | 46 | void adc_setup() { 47 | rcc_periph_clock_enable(ADC_GPIO_RCC); 48 | gpio_mode_setup(ADC_GPIO_PORT, GPIO_MODE_ANALOG, GPIO_PUPD_NONE, ADC_GPIO_PIN); 49 | 50 | rcc_periph_clock_enable(ADC_RCC); 51 | 52 | adc_enable_regulator(ADC_PERIPH); 53 | for (long i = 0; i < 10000; i++) 54 | asm("nop"); 55 | 56 | adc_set_clk_prescale(ADC_PERIPH, ADC_CCR_PRESCALE); 57 | adc_set_continuous_conversion_mode(ADC_PERIPH); 58 | adc_calibrate(ADC_PERIPH); 59 | adc_power_on(ADC_PERIPH); 60 | adc_set_regular_sequence(ADC_PERIPH, 1, channel_array); 61 | adc_set_continuous_conversion_mode(ADC_PERIPH); 62 | ADC_CFGR1(ADC_PERIPH) |= ADC_CFGR1_OVRMOD; 63 | } 64 | 65 | void led_setup() { 66 | rcc_periph_clock_enable(LED_GPIO_RCC); 67 | gpio_mode_setup(LED_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_GPIO_PIN); 68 | gpio_set(LED_GPIO_PORT, LED_GPIO_PIN); 69 | } 70 | 71 | void opamp_setup() { 72 | rcc_periph_clock_enable(RCC_SYSCFG); 73 | 74 | // select pga mode on inverting input 75 | OPAMP1_CSR |= OPAMP_CSR_VM_SEL_PGA; 76 | // non inverting gain = 2 77 | OPAMP1_CSR |= (0b00000 << OPAMP_CSR_PGA_GAIN_SHIFT); 78 | // connect opamp vp to VINP0 signal 79 | OPAMP1_CSR |= (0b00 << OPAMP_CSR_VP_SEL_SHIFT); 80 | // connect the opamp internally 81 | OPAMP1_CSR |= OPAMP_CSR_OPAINTOEN; 82 | // enable high speed mode 83 | OPAMP1_CSR |= OPAMP_CSR_OPAHSM; 84 | // enable the opamp 85 | OPAMP1_CSR |= 1; 86 | } 87 | -------------------------------------------------------------------------------- /CMakeLists.txt: -------------------------------------------------------------------------------- 1 | cmake_minimum_required(VERSION 3.12) 2 | project(stm32-boilerplate) 3 | 4 | set(CMAKE_C_COMPILER "arm-none-eabi-gcc") 5 | set(CMAKE_CXX_COMPILER "arm-none-eabi-g++") 6 | 7 | set(COMPILER_FLAGS "-fdata-sections -ffunction-sections -O0 -DNDEBUG -Werror") 8 | set(LINKER_FLAGS "-nostartfiles -specs=nano.specs -specs=nosys.specs --static -ggdb3 -Wl,--gc-sections -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group -Wl,-Map=output.map -T ${PROJECT_SOURCE_DIR}/src/link/stm32-mem.ld -L ${PROJECT_SOURCE_DIR}/lib/libopencm3/lib") 9 | set(CMAKE_BUILD_TYPE Debug) 10 | set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/bin) 11 | 12 | # target board 13 | if(NOT DEFINED TARGET_BOARD) 14 | set(TARGET_BOARD "nucleo-f042") 15 | message("no TARGET_BOARD defined, using ${TARGET_BOARD}") 16 | endif() 17 | 18 | # target board directory 19 | set(TARGET_DIR "${PROJECT_SOURCE_DIR}/src/target/${TARGET_BOARD}") 20 | 21 | # include target board CMakeLists 22 | include(${TARGET_DIR}/CMakeLists.txt) 23 | 24 | # include target board defintions 25 | include_directories(${TARGET_DIR}) 26 | 27 | # target part 28 | # TODO fail if not set 29 | message("TARGET_MCU: ${TARGET_MCU}") 30 | 31 | include(${PROJECT_SOURCE_DIR}/src/target-mcu.cmake) 32 | 33 | # target architecture 34 | # TODO fail if not set 35 | message("TARGET_CPU: ${TARGET_CPU}") 36 | 37 | include_directories(${PROJECT_SOURCE_DIR}/lib/libopencm3/include) 38 | 39 | # example program 40 | if(NOT DEFINED EXAMPLE) 41 | set(EXAMPLE "blink") 42 | message("no EXAMPLE defined, using ${EXAMPLE}") 43 | endif() 44 | 45 | # include example sources 46 | include(${PROJECT_SOURCE_DIR}/src/example/${EXAMPLE}/CMakeLists.txt) 47 | 48 | message(STATUS "BONUS_HARDWARE=${BONUS_HARDWARE}") 49 | if(HARDWARE_REQUIREMENTS) 50 | foreach(REQUIREMENT ${HARDWARE_REQUIREMENTS}) 51 | message(STATUS "REQUIREMENT=${REQUIREMENT}") 52 | if(${REQUIREMENT} IN_LIST BONUS_HARDWARE) 53 | message(STATUS "REQUIREMENT ${REQUIREMENT} FOUND IN ${BONUS_HARDWARE}") 54 | else() 55 | message(FATAL_ERROR "REQUIREMENT ${REQUIREMENT} NOT FOUND IN ${BONUS_HARDWARE}") 56 | endif() 57 | endforeach() 58 | endif() 59 | 60 | set(CMAKE_C_FLAGS "${COMPILER_FLAGS} ${ARCH_FLAGS}") 61 | set(CMAKE_CXX_FLAGS "${COMPILER_FLAGS} ${ARCH_FLAGS}") 62 | set(CMAKE_EXE_LINKER_FLAGS "${LINKER_FLAGS} ${ARCH_FLAGS}") 63 | 64 | set(COMMON_SRC ${PROJECT_SOURCE_DIR}/lib/libopencm3/lib/cm3/vector.c) 65 | 66 | set(EXE_NAME ${TARGET_BOARD}-example-${EXAMPLE}) 67 | 68 | add_executable(${EXE_NAME} ${PROJECT_SOURCE_DIR}/src/example/${EXAMPLE}/main.c ${EXAMPLE_SRC} ${COMMON_SRC}) 69 | 70 | add_custom_command(TARGET ${EXE_NAME} PRE_LINK 71 | COMMAND python ${PROJECT_SOURCE_DIR}/src/link/generate-ldscript.py -p ${TARGET_MCU} > ${PROJECT_SOURCE_DIR}/src/link/stm32-mem.ld 72 | ) 73 | 74 | add_custom_command(TARGET ${EXE_NAME} POST_BUILD 75 | COMMAND arm-none-eabi-objcopy -O ihex ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME} ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME}.hex 76 | COMMAND arm-none-eabi-size ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME} 77 | COMMAND cp ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME} debug.elf 78 | ) 79 | 80 | # 'make flash' to upload to board after compiling 81 | add_custom_target(flash 82 | # try stlink, stlink v2, then stlink v2-1 (the second two options are deprecated) 83 | openocd -f interface/stlink.cfg -f ${OPENOCD_TARGET} -c "program ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME} verify reset exit" || 84 | openocd -f interface/stlink-v2.cfg -f ${OPENOCD_TARGET} -c "program ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME} verify reset exit" || 85 | openocd -f interface/stlink-v2-1.cfg -f ${OPENOCD_TARGET} -c "program ${CMAKE_RUNTIME_OUTPUT_DIRECTORY}/${EXE_NAME} verify reset exit" 86 | DEPENDS ${EXE_NAME} 87 | ) 88 | -------------------------------------------------------------------------------- /.clang-format: -------------------------------------------------------------------------------- 1 | --- 2 | Language: Cpp 3 | # BasedOnStyle: LLVM 4 | AccessModifierOffset: -2 5 | AlignAfterOpenBracket: Align 6 | AlignConsecutiveAssignments: true 7 | AlignConsecutiveDeclarations: false 8 | AlignEscapedNewlines: Right 9 | AlignOperands: true 10 | AlignTrailingComments: true 11 | AllowAllParametersOfDeclarationOnNextLine: true 12 | AllowShortBlocksOnASingleLine: false 13 | AllowShortCaseLabelsOnASingleLine: false 14 | AllowShortFunctionsOnASingleLine: All 15 | AllowShortIfStatementsOnASingleLine: false 16 | AllowShortLoopsOnASingleLine: false 17 | AlwaysBreakAfterDefinitionReturnType: None 18 | AlwaysBreakAfterReturnType: None 19 | AlwaysBreakBeforeMultilineStrings: false 20 | AlwaysBreakTemplateDeclarations: MultiLine 21 | BinPackArguments: true 22 | BinPackParameters: true 23 | BraceWrapping: 24 | AfterClass: false 25 | AfterControlStatement: false 26 | AfterEnum: false 27 | AfterFunction: false 28 | AfterNamespace: false 29 | AfterObjCDeclaration: false 30 | AfterStruct: false 31 | AfterUnion: false 32 | AfterExternBlock: false 33 | BeforeCatch: false 34 | BeforeElse: false 35 | IndentBraces: false 36 | SplitEmptyFunction: true 37 | SplitEmptyRecord: true 38 | SplitEmptyNamespace: true 39 | BreakBeforeBinaryOperators: None 40 | BreakBeforeBraces: Attach 41 | BreakBeforeInheritanceComma: false 42 | BreakInheritanceList: BeforeColon 43 | BreakBeforeTernaryOperators: true 44 | BreakConstructorInitializersBeforeComma: false 45 | BreakConstructorInitializers: BeforeColon 46 | BreakAfterJavaFieldAnnotations: false 47 | BreakStringLiterals: true 48 | ColumnLimit: 120 49 | CommentPragmas: '^ IWYU pragma:' 50 | CompactNamespaces: false 51 | ConstructorInitializerAllOnOneLineOrOnePerLine: false 52 | ConstructorInitializerIndentWidth: 4 53 | ContinuationIndentWidth: 4 54 | Cpp11BracedListStyle: true 55 | DerivePointerAlignment: false 56 | DisableFormat: false 57 | ExperimentalAutoDetectBinPacking: false 58 | FixNamespaceComments: true 59 | ForEachMacros: 60 | - foreach 61 | - Q_FOREACH 62 | - BOOST_FOREACH 63 | IncludeBlocks: Preserve 64 | IncludeCategories: 65 | - Regex: '^"(llvm|llvm-c|clang|clang-c)/' 66 | Priority: 2 67 | - Regex: '^(<|"(gtest|gmock|isl|json)/)' 68 | Priority: 3 69 | - Regex: '.*' 70 | Priority: 1 71 | IncludeIsMainRegex: '(Test)?$' 72 | IndentCaseLabels: false 73 | IndentPPDirectives: None 74 | IndentWidth: 2 75 | IndentWrappedFunctionNames: false 76 | JavaScriptQuotes: Leave 77 | JavaScriptWrapImports: true 78 | KeepEmptyLinesAtTheStartOfBlocks: true 79 | MacroBlockBegin: '' 80 | MacroBlockEnd: '' 81 | MaxEmptyLinesToKeep: 1 82 | NamespaceIndentation: None 83 | ObjCBinPackProtocolList: Auto 84 | ObjCBlockIndentWidth: 2 85 | ObjCSpaceAfterProperty: false 86 | ObjCSpaceBeforeProtocolList: true 87 | PenaltyBreakAssignment: 2 88 | PenaltyBreakBeforeFirstCallParameter: 19 89 | PenaltyBreakComment: 300 90 | PenaltyBreakFirstLessLess: 120 91 | PenaltyBreakString: 1000 92 | PenaltyBreakTemplateDeclaration: 10 93 | PenaltyExcessCharacter: 1000000 94 | PenaltyReturnTypeOnItsOwnLine: 60 95 | PointerAlignment: Left 96 | ReflowComments: true 97 | SortIncludes: true 98 | SortUsingDeclarations: true 99 | SpaceAfterCStyleCast: false 100 | SpaceAfterTemplateKeyword: true 101 | SpaceBeforeAssignmentOperators: true 102 | SpaceBeforeCpp11BracedList: false 103 | SpaceBeforeCtorInitializerColon: true 104 | SpaceBeforeInheritanceColon: true 105 | SpaceBeforeParens: ControlStatements 106 | SpaceBeforeRangeBasedForLoopColon: true 107 | SpaceInEmptyParentheses: false 108 | SpacesBeforeTrailingComments: 1 109 | SpacesInAngles: false 110 | SpacesInContainerLiterals: true 111 | SpacesInCStyleCastParentheses: false 112 | SpacesInParentheses: false 113 | SpacesInSquareBrackets: false 114 | Standard: Cpp11 115 | TabWidth: 8 116 | UseTab: Never 117 | ... 118 | -------------------------------------------------------------------------------- /src/link/generate-ldscript.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python 2 | 3 | productRamsizesG = { 4 | "071": { 5 | "8": 36, 6 | "B": 36, 7 | }, 8 | # we use sram1 only for boilerplate 9 | # other sections are available like CCM (faster) 10 | # NOTE this is the 'G' series (as opposed to 'F') 11 | "431": { 12 | "6": 16, 13 | "8": 16, 14 | "B": 16, 15 | "C": 80, 16 | "E": 80, 17 | } 18 | } 19 | 20 | #stm32f0X0 21 | productRamsizesF = { 22 | "030": { 23 | "4": 4, 24 | "6": 4, 25 | "8": 8, 26 | "C": 32, 27 | }, 28 | "031": { 29 | "4": 4, 30 | "6": 4, 31 | }, 32 | "051": { 33 | "4": 8, 34 | "6": 8, 35 | "8": 8, 36 | }, 37 | "070": { 38 | "6": 6, 39 | "B": 16, 40 | }, 41 | #F0x2 42 | #https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f0-series/stm32f0x2.html?querycriteria=productId=LN1823 43 | "042": { 44 | "4": 6, 45 | "6": 6, 46 | }, 47 | "072": { 48 | "8": 16, 49 | "B": 16, 50 | }, 51 | #F103 52 | #https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-mainstream-mcus/stm32f1-series/stm32f103.html?querycriteria=productId=LN1565 53 | "103": { 54 | "4": 6, 55 | "6": 10, 56 | "8": 20, 57 | "B": 20, 58 | "C": 64, 59 | "D": 64, 60 | "E": 64, 61 | "F": 96, 62 | "G": 96, 63 | }, 64 | "303": { 65 | "6": 16, 66 | "8": 16, 67 | "B": 40, 68 | "C": 40, 69 | "D": 40, 70 | "E": 64, 71 | }, 72 | "334": { 73 | "6": 12, 74 | "8": 12, 75 | "B": 12, 76 | "C": 12, 77 | "D": 12, 78 | "E": 12, 79 | }, 80 | "350": { 81 | "6": 16, 82 | "8": 16, 83 | "B": 16, 84 | "C": 16, 85 | "D": 16, 86 | "E": 16, 87 | }, 88 | } 89 | productRamsizesL = { 90 | "476": { 91 | # 96k SRAM1 + 32k SRAM2 (128k total) 92 | "C": 96, 93 | "E": 96, 94 | "G": 96, 95 | } 96 | } 97 | 98 | # the last character: STM32F103C8 99 | # this is common across all products 100 | productFlashsizes = { 101 | "4": 16, 102 | "6": 32, 103 | "8": 64, 104 | "B": 128, 105 | "C": 256, 106 | "D": 384, 107 | "E": 512, 108 | "F": 768, 109 | "G": 1024, 110 | } 111 | 112 | #STM32F103R8 113 | def productFamily(product): 114 | return product[6:9] 115 | 116 | def productFlash(product): 117 | return productFlashsizes[product[-1]] 118 | 119 | def productRam(product): 120 | if "STM32F" in product: 121 | ramsizes = productRamsizesF[productFamily(product)] 122 | elif "STM32G" in product: 123 | ramsizes = productRamsizesG[productFamily(product)] 124 | elif "STM32L" in product: 125 | ramsizes = productRamsizesL[productFamily(product)] 126 | return ramsizes[product[-1]] 127 | 128 | def ldScript(ram, flash): 129 | return ( 130 | """ 131 | /* Define memory regions */ 132 | MEMORY 133 | { 134 | rom (rx) : ORIGIN = 0x08000000, LENGTH = %sK 135 | ram (rwx) : ORIGIN = 0x20000000, LENGTH = %sK 136 | } 137 | 138 | /* Include the common ld script. */ 139 | INCLUDE cortex-m-generic.ld 140 | """ % (flash, ram)) 141 | 142 | from argparse import ArgumentParser 143 | parser = ArgumentParser(description=__doc__) 144 | parser.add_argument("-p", dest="product", required=True, help="STM32 product") 145 | parser.add_argument("-o", dest="override", required=False, help="override flash size, k") 146 | args = parser.parse_args() 147 | 148 | 149 | product = args.product 150 | flash = 0 151 | 152 | if args.override: 153 | flash = args.override 154 | else: 155 | flash = productFlash(product) 156 | 157 | ram = productRam(product) 158 | 159 | print(ldScript(ram, flash)) 160 | -------------------------------------------------------------------------------- /src/example/pwm-output-dma/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | #include 7 | #include 8 | 9 | #include 10 | 11 | /* 12 | * This example outputs a dynamic pwm signal on a gpio 13 | * 14 | * The pwm pulse width changes after every compare-match event 15 | * when the compare matches (pulse falls), the next pulse width is 16 | * loaded into the compare register (ccr) via dma 17 | * 18 | * dma reads the pulse widths sequentially from a buffer 19 | * 20 | * This method can be used to efficiently implement one wire signals 21 | * like ws2812b leds, dshot ESCs, and even pulse-count modulated 22 | * (PCM) wav audio 23 | */ 24 | 25 | const uint16_t psc = 19; // prescaler 26 | 27 | // A bit-frame is a constant time window of duration t 28 | // a 1 bit is indicated by a pulse of duration 2t/3 29 | // a 0 bit is indicated by a pulse of duration t/3 30 | 31 | // pulse widths, in timer counts 32 | // minimum is 0x8 when dma clock speed == timer clock speed (oddly, 0x3 works correctly too!) 33 | const uint16_t bit_0 = 0x10; 34 | const uint16_t bit_1 = 2 * bit_0; 35 | const uint16_t bit_period = 3 * bit_0; // symbol duration 36 | 37 | const uint16_t pulses[] = { 38 | bit_1, bit_0, bit_1, bit_0, bit_0, 39 | }; 40 | 41 | void setupGpio() { 42 | rcc_periph_clock_enable(PWM_GPIO_RCC); 43 | 44 | #if defined(STM32F1) 45 | rcc_periph_clock_enable(RCC_AFIO); // don't forget to do this! 46 | gpio_set_mode(PWM_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, PWM_GPIO_PIN); 47 | // gpios a13 and a14 are reserved for SWD, and may not be used 48 | gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON, PWM_GPIO_MAPR); 49 | #else 50 | gpio_mode_setup(PWM_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_GPIO_PIN); 51 | gpio_set_af(PWM_GPIO_PORT, PWM_GPIO_AF, PWM_GPIO_PIN); 52 | gpio_set_output_options(PWM_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, PWM_GPIO_PIN); 53 | #endif 54 | } 55 | 56 | void setupTimer() { 57 | rcc_periph_clock_enable(PWM_TIMER_RCC); // enable timer clock 58 | // stretch clock with larger dividers in order to time longer signals without overruns 59 | timer_set_prescaler(PWM_TIMER, psc); 60 | timer_set_period(PWM_TIMER, bit_period); // set ARR 61 | timer_set_oc_mode(PWM_TIMER, PWM_TIMER_OC_ID, TIM_OCM_PWM1); // set OCM 62 | timer_enable_oc_preload(PWM_TIMER, PWM_TIMER_OC_ID); // set OCPE 63 | timer_enable_oc_output(PWM_TIMER, PWM_TIMER_OC_ID); // set CCxE 64 | // shouldn't do/be part of normal timer api (this only applies to advanced control timers)? 65 | timer_enable_break_main_output(PWM_TIMER); 66 | timer_enable_irq(PWM_TIMER, PWM_DMA_REQUEST); // set CCxDE (enable dma request on CCx event) 67 | timer_enable_counter(PWM_TIMER); // set CEN 68 | } 69 | 70 | void setupDma() { 71 | rcc_periph_clock_enable(PWM_DMA_RCC); // enable dma clock 72 | dma_set_peripheral_address(PWM_DMA, PWM_DMA_CHANNEL, (uint32_t)&PWM_DMA_PERIPH); // set CPAR 73 | dma_set_memory_address(PWM_DMA, PWM_DMA_CHANNEL, (uint32_t)&pulses); // set CMAR 74 | dma_set_read_from_memory(PWM_DMA, PWM_DMA_CHANNEL); // set DIR 75 | dma_set_memory_size(PWM_DMA, PWM_DMA_CHANNEL, DMA_CCR_MSIZE_16BIT); // set MSIZE 76 | dma_set_peripheral_size(PWM_DMA, PWM_DMA_CHANNEL, PWM_DMA_PERIPH_SIZE); // set PSIZE 77 | dma_enable_memory_increment_mode(PWM_DMA, PWM_DMA_CHANNEL); // set MINC 78 | dma_set_number_of_data(PWM_DMA, PWM_DMA_CHANNEL, sizeof(pulses) / 2); // set CNDTR 79 | dma_enable_circular_mode(PWM_DMA, PWM_DMA_CHANNEL); // set CIRC 80 | 81 | #if defined(STM32G0) 82 | DMAMUX_CxCR(DMAMUX1, PWM_DMA_CHANNEL) |= PWM_DMAMUX_REQID; 83 | #endif 84 | 85 | dma_enable_channel(PWM_DMA, PWM_DMA_CHANNEL); // set EN 86 | } 87 | 88 | int main() { 89 | initializeSystemClocks(); 90 | setupGpio(); 91 | setupDma(); 92 | setupTimer(); 93 | while (1) { 94 | }; 95 | } 96 | -------------------------------------------------------------------------------- /src/example/neopixel/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | #include 7 | 8 | #if defined(STM32G0) || defined(STM32G4) 9 | #include 10 | #endif 11 | 12 | #include 13 | 14 | /* 15 | * This example outputs a one wire signal to digital addressable rgb 16 | * leds like the ws2812b (adafruit neopixel) or sk6812 17 | * 18 | * A bit-frame is a constant time window of duration 1250 nanoseconds 19 | * a 1 bit is indicated by a pulse of duration 825 nanoseconds 20 | * a 0 bit is indicated by a pulse of duration 425 nanoseconds 21 | * 22 | * The pwm pulse width changes after every compare-match event 23 | * when the compare matches (pulse falls), the next pulse width is 24 | * loaded into the compare register (ccr) via dma 25 | * 26 | * dma reads the pulse widths sequentially from a buffer 27 | */ 28 | 29 | // pulse widths, in ahb clock counts 30 | float nsPerTick() { return 1000000000.0 / rcc_ahb_frequency; } 31 | 32 | // nanoseconds 33 | const uint16_t bit_0 = 425; 34 | const uint16_t bit_1 = 825; 35 | const uint16_t bit_period = 1250; // symbol duration 36 | 37 | // 24 for 8-bit rgb and 1 byte for a trailing 0 (to pull the wire low between frames) 38 | uint16_t pulses[25]; 39 | 40 | void setupGpio() { 41 | rcc_periph_clock_enable(PWM_GPIO_RCC); 42 | 43 | #if defined(STM32F1) 44 | rcc_periph_clock_enable(RCC_AFIO); // don't forget to do this! 45 | gpio_set_mode(PWM_GPIO_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, PWM_GPIO_PIN); 46 | // gpios a13 and a14 are reserved for SWD, and may not be used 47 | gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON, PWM_GPIO_MAPR); 48 | #else 49 | gpio_mode_setup(PWM_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_NONE, PWM_GPIO_PIN); 50 | gpio_set_af(PWM_GPIO_PORT, PWM_GPIO_AF, PWM_GPIO_PIN); 51 | gpio_set_output_options(PWM_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, PWM_GPIO_PIN); 52 | #endif 53 | } 54 | 55 | void setupTimer() { 56 | rcc_periph_clock_enable(PWM_TIMER_RCC); // enable timer clock 57 | timer_set_period(PWM_TIMER, bit_period / nsPerTick()); // set ARR 58 | timer_set_oc_mode(PWM_TIMER, PWM_TIMER_OC_ID, TIM_OCM_PWM1); // set OCM 59 | timer_enable_oc_preload(PWM_TIMER, PWM_TIMER_OC_ID); // set OCPE 60 | timer_enable_oc_output(PWM_TIMER, PWM_TIMER_OC_ID); // set CCxE 61 | // shouldn't do/be part of normal timer api (this only applies to advanced control timers)? 62 | timer_enable_break_main_output(PWM_TIMER); 63 | timer_enable_irq(PWM_TIMER, PWM_DMA_REQUEST); // set CCxDE (enable dma request on CCx event) 64 | timer_enable_counter(PWM_TIMER); // set CEN 65 | } 66 | 67 | void setupDma() { 68 | rcc_periph_clock_enable(PWM_DMA_RCC); // enable dma clock 69 | dma_set_peripheral_address(PWM_DMA, PWM_DMA_CHANNEL, (uint32_t)&PWM_DMA_PERIPH); // set CPAR 70 | dma_set_memory_address(PWM_DMA, PWM_DMA_CHANNEL, (uint32_t)&pulses); // set CMAR 71 | dma_set_read_from_memory(PWM_DMA, PWM_DMA_CHANNEL); // set DIR 72 | dma_set_memory_size(PWM_DMA, PWM_DMA_CHANNEL, DMA_CCR_MSIZE_16BIT); // set MSIZE 73 | dma_set_peripheral_size(PWM_DMA, PWM_DMA_CHANNEL, PWM_DMA_PERIPH_SIZE); // set PSIZE 74 | dma_enable_memory_increment_mode(PWM_DMA, PWM_DMA_CHANNEL); // set MINC 75 | dma_set_number_of_data(PWM_DMA, PWM_DMA_CHANNEL, sizeof(pulses) / 2); // set CNDTR 76 | 77 | #if defined(STM32G0) || defined(STM32G4) 78 | DMAMUX_CxCR(DMAMUX1, PWM_DMA_CHANNEL) = PWM_DMAMUX_REQID; 79 | #endif 80 | 81 | #if defined(STM32L4) 82 | dma_set_channel_request(PWM_DMA, PWM_DMA_CHANNEL, PWM_DMA_CSEL); 83 | #endif 84 | 85 | dma_enable_channel(PWM_DMA, PWM_DMA_CHANNEL); // set EN 86 | } 87 | 88 | // update memory output buffer for dma transfer 89 | void writeRGB(uint8_t r, uint8_t g, uint8_t b); 90 | 91 | int main() { 92 | initializeSystemClocks(); 93 | setupGpio(); 94 | setupDma(); 95 | setupTimer(); 96 | uint8_t r, g, b; 97 | while (1) { 98 | while (!dma_get_interrupt_flag(PWM_DMA, PWM_DMA_CHANNEL, DMA_TCIF)) { 99 | } 100 | long interval = 9000000 / nsPerTick(); 101 | for (long i = 0; i < interval; i++) { 102 | asm("nop"); 103 | } 104 | writeRGB(r++, g, b); 105 | g += 7; 106 | b += 3; 107 | 108 | dma_disable_channel(PWM_DMA, PWM_DMA_CHANNEL); 109 | dma_clear_interrupt_flags(PWM_DMA, PWM_DMA_CHANNEL, DMA_TCIF); 110 | dma_set_number_of_data(PWM_DMA, PWM_DMA_CHANNEL, sizeof(pulses) / 2); // set CNDTR 111 | dma_enable_channel(PWM_DMA, PWM_DMA_CHANNEL); 112 | } 113 | } 114 | 115 | void writeRGB(uint8_t r, uint8_t g, uint8_t b) { 116 | uint16_t b0 = bit_0 / nsPerTick(); 117 | uint16_t b1 = bit_1 / nsPerTick(); 118 | 119 | for (uint8_t i = 0; i < 8; i++) { 120 | pulses[i] = g & (1 << (7 - i)) ? b1 : b0; 121 | } 122 | for (uint8_t i = 0; i < 8; i++) { 123 | pulses[8 + i] = r & (1 << (7 - i)) ? b1 : b0; 124 | } 125 | for (uint8_t i = 0; i < 8; i++) { 126 | pulses[16 + i] = b & (1 << (7 - i)) ? b1 : b0; 127 | } 128 | } 129 | -------------------------------------------------------------------------------- /.vscode/launch.json: -------------------------------------------------------------------------------- 1 | { 2 | "version": "0.2.0", 3 | "configurations": [ 4 | { 5 | "name": "F030", 6 | "cwd": "${workspaceRoot}", 7 | "executable": "build/debug.elf", 8 | "request": "launch", 9 | "type": "cortex-debug", 10 | "servertype": "openocd", 11 | "configFiles": [ 12 | "lib/openocd/f0.cfg" 13 | ], 14 | "svdFile": "lib/svd/stm32f0/STM32F0x0.svd", 15 | "device": "STM32F030" 16 | }, 17 | { 18 | "name": "F103", 19 | "cwd": "${workspaceRoot}", 20 | "executable": "build/debug.elf", 21 | "request": "launch", 22 | "type": "cortex-debug", 23 | "servertype": "openocd", 24 | "configFiles": [ 25 | "lib/openocd/f1.cfg" 26 | ], 27 | "svdFile": "lib/svd/stm32f1/STM32F103.svd", 28 | "device": "STM32F103" 29 | }, 30 | { 31 | "name": "F303", 32 | "cwd": "${workspaceRoot}", 33 | "executable": "build/debug.elf", 34 | "request": "launch", 35 | "type": "cortex-debug", 36 | "servertype": "openocd", 37 | "configFiles": [ 38 | "lib/openocd/f3.cfg" 39 | ], 40 | "svdFile": "lib/svd/stm32f3/STM32F303.svd", 41 | "device": "STM32F303" 42 | }, 43 | { 44 | "name": "G071-nucleo", 45 | "cwd": "${workspaceRoot}", 46 | "executable": "build/debug.elf", 47 | "request": "launch", 48 | "type": "cortex-debug", 49 | "servertype": "openocd", 50 | "configFiles": [ 51 | "lib/openocd/g0-nucleo.cfg" 52 | ], 53 | // stm doesn't have g0 svd yet 54 | "svdFile": "lib/svd/stm32f0/STM32F0x2.svd", 55 | "device": "STM32F072" 56 | }, 57 | { 58 | "name": "F042-nucleo", 59 | "cwd": "${workspaceRoot}", 60 | "executable": "build/debug.elf", 61 | "request": "launch", 62 | "type": "cortex-debug", 63 | "servertype": "openocd", 64 | "configFiles": [ 65 | "lib/openocd/f0-nucleo.cfg" 66 | ], 67 | "svdFile": "lib/svd/stm32f0/STM32F0x2.svd", 68 | "device": "STM32F042" 69 | }, 70 | { 71 | "name": "F072-nucleo", 72 | "cwd": "${workspaceRoot}", 73 | "executable": "build/debug.elf", 74 | "request": "launch", 75 | "type": "cortex-debug", 76 | "servertype": "openocd", 77 | "configFiles": [ 78 | "lib/openocd/f0-nucleo.cfg" 79 | ], 80 | "svdFile": "lib/svd/stm32f0/STM32F0x2.svd", 81 | "device": "STM32F072" 82 | }, 83 | { 84 | "name": "F103-nucleo", 85 | "cwd": "${workspaceRoot}", 86 | "executable": "build/debug.elf", 87 | "request": "launch", 88 | "type": "cortex-debug", 89 | "servertype": "openocd", 90 | "configFiles": [ 91 | "lib/openocd/f1-nucleo.cfg" 92 | ], 93 | "svdFile": "lib/svd/stm32f1/STM32F103.svd", 94 | "device": "STM32F103" 95 | }, 96 | { 97 | "name": "F303-nucleo", 98 | "cwd": "${workspaceRoot}", 99 | "executable": "build/debug.elf", 100 | "request": "launch", 101 | "type": "cortex-debug", 102 | "servertype": "openocd", 103 | "configFiles": [ 104 | "lib/openocd/f3-nucleo.cfg" 105 | ], 106 | "svdFile": "lib/svd/stm32f3/STM32F303.svd", 107 | "device": "STM32F303" 108 | }, 109 | { 110 | "name": "F334-nucleo", 111 | "cwd": "${workspaceRoot}", 112 | "executable": "build/debug.elf", 113 | "request": "launch", 114 | "type": "cortex-debug", 115 | "servertype": "openocd", 116 | "configFiles": [ 117 | "lib/openocd/f3-nucleo.cfg" 118 | ], 119 | "svdFile": "lib/svd/stm32f3/STM32F3x4.svd", 120 | "device": "STM32F334" 121 | }, 122 | { 123 | "name": "L476-nucleo", 124 | "cwd": "${workspaceRoot}", 125 | "executable": "build/debug.elf", 126 | "request": "launch", 127 | "type": "cortex-debug", 128 | "servertype": "openocd", 129 | "configFiles": [ 130 | "lib/openocd/l4-nucleo.cfg" 131 | ], 132 | "svdFile": "lib/svd/stm32l4/STM32L4x6.svd" 133 | }, 134 | { 135 | "name": "G431-nucleo", 136 | "cwd": "${workspaceRoot}", 137 | "executable": "build/debug.elf", 138 | "request": "launch", 139 | "type": "cortex-debug", 140 | "servertype": "openocd", 141 | "configFiles": [ 142 | "lib/openocd/g4-nucleo.cfg" 143 | ], 144 | "svdFile": "lib/svd/stm32g4/STM32G431xx.svd" 145 | } 146 | ] 147 | } 148 | -------------------------------------------------------------------------------- /src/example/pwm-commutate/main.c: -------------------------------------------------------------------------------- 1 | #include 2 | 3 | #include 4 | #include 5 | #include 6 | 7 | /* 8 | * This example outputs a six-step commutation signal for 9 | * brushless motors. This is performed with the Advanced Control 10 | * Timer and the commutation (COM) event. 11 | */ 12 | 13 | // x = zero-cross ------------------------------------------ 14 | // | Step0 | Step1 | Step2 | Step3 | Step4 | Step5 | 15 | //----------------------------------------------------------- 16 | //|Channel1 |‾|_|‾|_|‾|_|‾|_________________________________| 17 | //-------------------------------x-----------------------x--- 18 | //|Channel1N |_|‾|_|‾|_|‾|_|‾|_______|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|_______| 19 | //----------------------------------------------------------- 20 | //|Channel2 |_______________|‾|_|‾|_|‾|_|‾|_________________| 21 | //-----------------------x-----------------------x------------ 22 | //|Channel2N |‾‾‾‾‾‾‾|_________|‾|_|‾|_|‾|_|‾|_______|‾‾‾‾‾‾‾| 23 | //----------------------------------------------------------- 24 | //|Channel3 |_______________________________|‾|_|‾|_|‾|_|‾|_| 25 | //---------------x-----------------------x------------------- 26 | //|Channel3N |_______|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|_________|‾|_|‾|_|‾|_|‾| 27 | 28 | const uint16_t psc = 9; // prescaler 29 | const uint16_t arr = 1000; // auto-reload 30 | const uint16_t ccr = 500; // capture-compare (duty) 31 | 32 | typedef struct { 33 | enum rcc_periph_clken rcc; 34 | uint32_t port; 35 | uint16_t pin; 36 | // STM32F1 series do not have alternate function mux 37 | // use AFIO if remap is necessary 38 | #if !defined(STM32F1) 39 | uint8_t af; 40 | #endif 41 | } gpio_t; 42 | 43 | #define NGPIO 6 44 | #define ADVANCED_TIMER TIM1 45 | #define ADVANCED_TIMER_RCC RCC_TIM1 46 | 47 | gpio_t gpios[NGPIO] = { 48 | #if defined(STM32F1) 49 | RCC_GPIOA, GPIOA, GPIO8, RCC_GPIOA, GPIOA, GPIO9, RCC_GPIOA, GPIOA, GPIO10, 50 | RCC_GPIOB, GPIOB, GPIO13, RCC_GPIOB, GPIOB, GPIO14, RCC_GPIOB, GPIOB, GPIO15, 51 | #else 52 | BRIDGE_HI_A_GPIO_RCC, BRIDGE_HI_A_GPIO_PORT, BRIDGE_HI_A_GPIO_PIN, BRIDGE_HI_A_GPIO_AF, BRIDGE_HI_B_GPIO_RCC, 53 | BRIDGE_HI_B_GPIO_PORT, BRIDGE_HI_B_GPIO_PIN, BRIDGE_HI_B_GPIO_AF, BRIDGE_HI_C_GPIO_RCC, BRIDGE_HI_C_GPIO_PORT, 54 | BRIDGE_HI_C_GPIO_PIN, BRIDGE_HI_C_GPIO_AF, BRIDGE_LO_A_GPIO_RCC, BRIDGE_LO_A_GPIO_PORT, BRIDGE_LO_A_GPIO_PIN, 55 | BRIDGE_LO_A_GPIO_AF, BRIDGE_LO_B_GPIO_RCC, BRIDGE_LO_B_GPIO_PORT, BRIDGE_LO_B_GPIO_PIN, BRIDGE_LO_B_GPIO_AF, 56 | BRIDGE_LO_C_GPIO_RCC, BRIDGE_LO_C_GPIO_PORT, BRIDGE_LO_C_GPIO_PIN, BRIDGE_LO_C_GPIO_AF, 57 | #endif 58 | }; 59 | 60 | void setupGpio(gpio_t* gpio) { 61 | #if defined(STM32F1) 62 | rcc_periph_clock_enable(RCC_AFIO); // don't forget to do this! 63 | rcc_periph_clock_enable(gpio->rcc); 64 | gpio_set_mode(gpio->port, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, gpio->pin); 65 | #else 66 | rcc_periph_clock_enable(gpio->rcc); 67 | gpio_mode_setup(gpio->port, GPIO_MODE_AF, GPIO_PUPD_NONE, gpio->pin); 68 | gpio_set_af(gpio->port, gpio->af, gpio->pin); 69 | #endif 70 | } 71 | 72 | void setupTimer() { 73 | rcc_periph_clock_enable(ADVANCED_TIMER_RCC); 74 | timer_set_prescaler(ADVANCED_TIMER, psc); 75 | timer_set_period(ADVANCED_TIMER, arr); 76 | 77 | // load the compare values for the pwms (CCRx) 78 | timer_set_oc_value(ADVANCED_TIMER, TIM_OC1, ccr); 79 | timer_set_oc_value(ADVANCED_TIMER, TIM_OC2, ccr); 80 | timer_set_oc_value(ADVANCED_TIMER, TIM_OC3, ccr); 81 | 82 | // initialize OCxM 83 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC1, TIM_OCM_FORCE_LOW); 84 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC2, TIM_OCM_FORCE_LOW); 85 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC3, TIM_OCM_FORCE_LOW); 86 | 87 | // initialize OCxE and OCxNE 88 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC1); 89 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC2); 90 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC3); 91 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC1N); 92 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC2N); 93 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC3N); 94 | 95 | // set CCPC in CR2 register 96 | // when this bit is set, changes to OCxE, OCxNE, and OCxM are preloaded 97 | // and only take effect on a commutation (COM) event 98 | // this allows us to change all six signal outputs on the bridge 99 | // simultaneously as soon as the COMG bit is set in the event generation register (EGR) 100 | timer_enable_preload_complementry_enable_bits(ADVANCED_TIMER); 101 | 102 | // always set a dead time to avoid blowing up the bridge via shoot-through 103 | timer_set_deadtime(ADVANCED_TIMER, 0x40); 104 | 105 | // set these bits so that the timer maintains control of the outputs 106 | // on channels that are disabled 107 | timer_set_enabled_off_state_in_idle_mode(ADVANCED_TIMER); // get this bit wrong and blow your bridge 108 | timer_set_enabled_off_state_in_run_mode(ADVANCED_TIMER); 109 | 110 | // enable the pwm output to the bridge 111 | timer_enable_break_main_output(ADVANCED_TIMER); 112 | 113 | // start the timer counting 114 | timer_enable_counter(ADVANCED_TIMER); 115 | } 116 | 117 | int main() { 118 | initializeSystemClocks(); 119 | 120 | for (uint8_t i = 0; i < NGPIO; i++) { 121 | setupGpio(gpios + i); 122 | } 123 | 124 | setupTimer(); 125 | 126 | while (1) { 127 | uint8_t i; 128 | for (i = 0; i < 6; i++) { 129 | 130 | // small do-nothing delay 131 | for (uint32_t n = 0; n < 10000; n++) { 132 | asm("nop"); 133 | } 134 | 135 | // control our six-step states via OCxE, OCxNE, and OCxM 136 | // these bits are preloaded because we set the CCPC bit in the 137 | // CR2 register. the output to the bridge will not change state 138 | // until we generate the commutation event by setting COMG in 139 | // the EGR register. 140 | switch (i) { 141 | case 0: 142 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC1); 143 | timer_disable_oc_output(ADVANCED_TIMER, TIM_OC3); 144 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC1, TIM_OCM_PWM1); 145 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC2, TIM_OCM_FORCE_LOW); 146 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC3, TIM_OCM_FORCE_LOW); 147 | break; 148 | case 1: 149 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC3); 150 | timer_disable_oc_output(ADVANCED_TIMER, TIM_OC2); 151 | break; 152 | case 2: 153 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC2); 154 | timer_disable_oc_output(ADVANCED_TIMER, TIM_OC1); 155 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC1, TIM_OCM_FORCE_LOW); 156 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC2, TIM_OCM_PWM1); 157 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC3, TIM_OCM_FORCE_LOW); 158 | break; 159 | case 3: 160 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC1); 161 | timer_disable_oc_output(ADVANCED_TIMER, TIM_OC3); 162 | break; 163 | case 4: 164 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC3); 165 | timer_disable_oc_output(ADVANCED_TIMER, TIM_OC2); 166 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC1, TIM_OCM_FORCE_LOW); 167 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC2, TIM_OCM_FORCE_LOW); 168 | timer_set_oc_mode(ADVANCED_TIMER, TIM_OC3, TIM_OCM_PWM1); 169 | break; 170 | case 5: 171 | timer_enable_oc_output(ADVANCED_TIMER, TIM_OC2); 172 | timer_disable_oc_output(ADVANCED_TIMER, TIM_OC1); 173 | break; 174 | } 175 | 176 | // generate a commutation event. all of the preloaded bits 177 | // above will take effect simultaneously to move to the next 178 | // commutation step in the six-step sequence. 179 | timer_generate_event(ADVANCED_TIMER, TIM_EGR_COMG); 180 | } 181 | } 182 | } 183 | -------------------------------------------------------------------------------- /LICENSE.md: -------------------------------------------------------------------------------- 1 | GNU GENERAL PUBLIC LICENSE 2 | Version 3, 29 June 2007 3 | 4 | Copyright (C) 2007 Free Software Foundation, Inc. 5 | Everyone is permitted to copy and distribute verbatim copies 6 | of this license document, but changing it is not allowed. 7 | 8 | Preamble 9 | 10 | The GNU General Public License is a free, copyleft license for 11 | software and other kinds of works. 12 | 13 | The licenses for most software and other practical works are designed 14 | to take away your freedom to share and change the works. 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No Surrender of Others' Freedom. 541 | 542 | If conditions are imposed on you (whether by court order, agreement or 543 | otherwise) that contradict the conditions of this License, they do not 544 | excuse you from the conditions of this License. If you cannot convey a 545 | covered work so as to satisfy simultaneously your obligations under this 546 | License and any other pertinent obligations, then as a consequence you may 547 | not convey it at all. For example, if you agree to terms that obligate you 548 | to collect a royalty for further conveying from those to whom you convey 549 | the Program, the only way you could satisfy both those terms and this 550 | License would be to refrain entirely from conveying the Program. 551 | 552 | 13. Use with the GNU Affero General Public License. 553 | 554 | Notwithstanding any other provision of this License, you have 555 | permission to link or combine any covered work with a work licensed 556 | under version 3 of the GNU Affero General Public License into a single 557 | combined work, and to convey the resulting work. The terms of this 558 | License will continue to apply to the part which is the covered work, 559 | but the special requirements of the GNU Affero General Public License, 560 | section 13, concerning interaction through a network will apply to the 561 | combination as such. 562 | 563 | 14. Revised Versions of this License. 564 | 565 | The Free Software Foundation may publish revised and/or new versions of 566 | the GNU General Public License from time to time. Such new versions will 567 | be similar in spirit to the present version, but may differ in detail to 568 | address new problems or concerns. 569 | 570 | Each version is given a distinguishing version number. If the 571 | Program specifies that a certain numbered version of the GNU General 572 | Public License "or any later version" applies to it, you have the 573 | option of following the terms and conditions either of that numbered 574 | version or of any later version published by the Free Software 575 | Foundation. If the Program does not specify a version number of the 576 | GNU General Public License, you may choose any version ever published 577 | by the Free Software Foundation. 578 | 579 | If the Program specifies that a proxy can decide which future 580 | versions of the GNU General Public License can be used, that proxy's 581 | public statement of acceptance of a version permanently authorizes you 582 | to choose that version for the Program. 583 | 584 | Later license versions may give you additional or different 585 | permissions. However, no additional obligations are imposed on any 586 | author or copyright holder as a result of your choosing to follow a 587 | later version. 588 | 589 | 15. Disclaimer of Warranty. 590 | 591 | THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY 592 | APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT 593 | HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY 594 | OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, 595 | THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 596 | PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM 597 | IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF 598 | ALL NECESSARY SERVICING, REPAIR OR CORRECTION. 599 | 600 | 16. Limitation of Liability. 601 | 602 | IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING 603 | WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS 604 | THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY 605 | GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE 606 | USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF 607 | DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD 608 | PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), 609 | EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF 610 | SUCH DAMAGES. 611 | 612 | 17. Interpretation of Sections 15 and 16. 613 | 614 | If the disclaimer of warranty and limitation of liability provided 615 | above cannot be given local legal effect according to their terms, 616 | reviewing courts shall apply local law that most closely approximates 617 | an absolute waiver of all civil liability in connection with the 618 | Program, unless a warranty or assumption of liability accompanies a 619 | copy of the Program in return for a fee. 620 | 621 | END OF TERMS AND CONDITIONS 622 | 623 | How to Apply These Terms to Your New Programs 624 | 625 | If you develop a new program, and you want it to be of the greatest 626 | possible use to the public, the best way to achieve this is to make it 627 | free software which everyone can redistribute and change under these terms. 628 | 629 | To do so, attach the following notices to the program. It is safest 630 | to attach them to the start of each source file to most effectively 631 | state the exclusion of warranty; and each file should have at least 632 | the "copyright" line and a pointer to where the full notice is found. 633 | 634 | 635 | Copyright (C) 636 | 637 | This program is free software: you can redistribute it and/or modify 638 | it under the terms of the GNU General Public License as published by 639 | the Free Software Foundation, either version 3 of the License, or 640 | (at your option) any later version. 641 | 642 | This program is distributed in the hope that it will be useful, 643 | but WITHOUT ANY WARRANTY; without even the implied warranty of 644 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 645 | GNU General Public License for more details. 646 | 647 | You should have received a copy of the GNU General Public License 648 | along with this program. If not, see . 649 | 650 | Also add information on how to contact you by electronic and paper mail. 651 | 652 | If the program does terminal interaction, make it output a short 653 | notice like this when it starts in an interactive mode: 654 | 655 | Copyright (C) 656 | This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. 657 | This is free software, and you are welcome to redistribute it 658 | under certain conditions; type `show c' for details. 659 | 660 | The hypothetical commands `show w' and `show c' should show the appropriate 661 | parts of the General Public License. Of course, your program's commands 662 | might be different; for a GUI interface, you would use an "about box". 663 | 664 | You should also get your employer (if you work as a programmer) or school, 665 | if any, to sign a "copyright disclaimer" for the program, if necessary. 666 | For more information on this, and how to apply and follow the GNU GPL, see 667 | . 668 | 669 | The GNU General Public License does not permit incorporating your program 670 | into proprietary programs. If your program is a subroutine library, you 671 | may consider it more useful to permit linking proprietary applications with 672 | the library. If this is what you want to do, use the GNU Lesser General 673 | Public License instead of this License. But first, please read 674 | . 675 | --------------------------------------------------------------------------------