├── .gitignore
├── .gitattributes
├── Middlewares
└── Third_Party
│ └── FreeRTOS
│ └── Source
│ ├── CMSIS_RTOS
│ ├── cmsis_os.c
│ └── cmsis_os.h
│ ├── LICENSE
│ ├── include
│ ├── projdefs.h
│ ├── stack_macros.h
│ ├── StackMacros.h
│ ├── deprecated_definitions.h
│ ├── portable.h
│ └── mpu_wrappers.h
│ ├── list.c
│ └── portable
│ └── GCC
│ └── ARM_CM4F
│ └── portmacro.h
├── Drivers
├── STM32L4xx_HAL_Driver
│ ├── License.md
│ ├── LICENSE.txt
│ ├── Inc
│ │ ├── stm32l4xx_hal_flash_ramfunc.h
│ │ ├── stm32l4xx_hal_flash_ex.h
│ │ ├── stm32l4xx_hal_i2c_ex.h
│ │ └── stm32l4xx_hal_def.h
│ └── Src
│ │ └── stm32l4xx_hal_flash_ramfunc.c
└── CMSIS
│ ├── Device
│ └── ST
│ │ └── STM32L4xx
│ │ ├── LICENSE.txt
│ │ ├── Include
│ │ └── system_stm32l4xx.h
│ │ └── License.md
│ └── Include
│ ├── cmsis_version.h
│ ├── tz_context.h
│ └── cmsis_compiler.h
├── Core
├── Inc
│ ├── ReadMe.md
│ ├── testTickTiming.h
│ ├── ulp.h
│ ├── stm32l4xx_it.h
│ ├── main.h
│ └── FreeRTOSConfig.h
└── Src
│ ├── ReadMe.md
│ ├── CubeMxPatchForDefaultTickless.c
│ ├── sysmem.c
│ ├── syscalls.c
│ ├── stm32l4xx_hal_timebase_tim.c
│ ├── freertos.c
│ ├── stm32l4xx_it.c
│ ├── ulp.c
│ ├── stm32l4xx_hal_msp.c
│ └── testTickTiming.c
├── .project
├── ReadMe.md
├── STM32L476RGTX_RAM.ld
├── STM32L476RGTX_FLASH.ld
└── LPTIM-tick.ioc
/.gitignore:
--------------------------------------------------------------------------------
1 | Debug/
2 | Release/
3 | Resources/
4 | .settings/
5 |
6 | *.bak
7 | *.launch
8 | .mxproject
9 |
--------------------------------------------------------------------------------
/.gitattributes:
--------------------------------------------------------------------------------
1 | # Auto detect text files and perform LF normalization
2 | * text=auto
3 |
4 | # Tell linguist that our .h files are "C" (not C++)
5 | *.h linguist-language=C
6 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:
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https://raw.githubusercontent.com/jefftenney/LPTIM-Tick/HEAD/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c
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/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
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https://raw.githubusercontent.com/jefftenney/LPTIM-Tick/HEAD/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h
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/Drivers/STM32L4xx_HAL_Driver/License.md:
--------------------------------------------------------------------------------
1 | # Copyright (c) 2017 STMicroelectronics
2 |
3 | This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).
--------------------------------------------------------------------------------
/Core/Inc/ReadMe.md:
--------------------------------------------------------------------------------
1 | ## File Manifest
2 |
3 | - *FreeRTOSConfig.h* - Generated by CubeMX, minor customizations added
4 | - *main.h* - Generated by CubeMX, no customizations added
5 | - *stm32l4xx_hal_conf.h* - Generated by CubeMX, no customizations added
6 | - *stm32l4xx_it.h* - Generated by CubeMX, no customizations added
7 | - *testTickTiming.h* - Custom file
8 | - *ulp.h* - Custom file
9 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/LICENSE.txt:
--------------------------------------------------------------------------------
1 | This software component is provided to you as part of a software package and
2 | applicable license terms are in the Package_license file. If you received this
3 | software component outside of a package or without applicable license terms,
4 | the terms of the Apache-2.0 license shall apply.
5 | You may obtain a copy of the Apache-2.0 at:
6 | https://opensource.org/licenses/Apache-2.0
7 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/LICENSE.txt:
--------------------------------------------------------------------------------
1 | This software component is provided to you as part of a software package and
2 | applicable license terms are in the Package_license file. If you received this
3 | software component outside of a package or without applicable license terms,
4 | the terms of the BSD-3-Clause license shall apply.
5 | You may obtain a copy of the BSD-3-Clause at:
6 | https://opensource.org/licenses/BSD-3-Clause
7 |
--------------------------------------------------------------------------------
/Core/Src/ReadMe.md:
--------------------------------------------------------------------------------
1 | ## File Manifest
2 |
3 | - *CubeMxPatchForDefaultTickless.c* - Custom file
4 | - *freertos.c* - Generated by CubeMX, no customizations added
5 | - *lptimTick.c* - Custom file
6 | - *main.c* - Generated by CubeMX, significant customizations added
7 | - *stm32l4xx_hal_msp.c* - Generated by CubeMX, no customizations added
8 | - *stm32l4xx_hal_timebase_tim.c* - Generated by CubeMX, no customizations added
9 | - *stm32l4xx_it.c* - Generated by CubeMX, no customizations added
10 | - *syscalls.c* - Generated by CubeMX, no customizations added
11 | - *sysmem.c* - Generated by CubeMX, no customizations added
12 | - *system_stm32l4xx.c* - Generated by CubeMX, no customizations added
13 | - *testTickTiming.c* - Custom file
14 | - *ulp.c* - Custom file
15 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/LICENSE:
--------------------------------------------------------------------------------
1 | Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
2 | Permission is hereby granted, free of charge, to any person obtaining a copy of
3 | this software and associated documentation files (the "Software"), to deal in
4 | the Software without restriction, including without limitation the rights to
5 | use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
6 | the Software, and to permit persons to whom the Software is furnished to do so,
7 | subject to the following conditions:
8 |
9 | The above copyright notice and this permission notice shall be included in all
10 | copies or substantial portions of the Software.
11 |
12 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
14 | FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
15 | COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
16 | IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
17 | CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
18 |
19 |
--------------------------------------------------------------------------------
/Core/Src/CubeMxPatchForDefaultTickless.c:
--------------------------------------------------------------------------------
1 | // CubeMxPatchForDefaultTickless.c
2 |
3 | // When we configure the project for built-in tickless functionality (configUSE_TICKLESS_IDLE set to 1),
4 | // CubeMX 6.2.0-RC3 generates configPRE_SLEEP_PROCESSING() which sets ulExpectedIdleTime to zero and then
5 | // calls this function. That behavior is wrong. It tells FreeRTOS that we are providing the WFI (or WFE)
6 | // instruction (which we shouldn't have to do), and it hides from this function the amount of time we
7 | // expect to stay in tickless idle. And of course CubeMX generates these definitions at the end of
8 | // FreeRTOSConfig.h, where there are no user-code sections left for us to undo the damage.
9 | //
10 | // So this function fixes the problem. Ideally CubeMX will fix the issue and we can delete this file.
11 |
12 | #include "FreeRTOS.h"
13 | #include "task.h" // for configASSERT(), which uses taskDISABLE_INTERRUPTS()
14 | #include "stm32l4xx.h"
15 |
16 | // Bug fix only. Applies only to configUSE_TICKLESS_IDLE == 1. See above.
17 | void PreSleepProcessing(uint32_t ulExpectedIdleTime)
18 | {
19 | // When this assertion fails, ST has probably fixed CubeMX, and we can probably remove this file from
20 | // the project.
21 | //
22 | configASSERT(ulExpectedIdleTime == 0);
23 |
24 | __DSB();
25 | __WFI();
26 | __ISB();
27 | }
28 |
--------------------------------------------------------------------------------
/.project:
--------------------------------------------------------------------------------
1 |
2 |
3 | LPTIM-tick
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 | clean,full,incremental,
11 |
12 |
13 |
14 |
15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
16 | full,incremental,
17 |
18 |
19 |
20 |
21 |
22 | com.st.stm32cube.ide.mcu.MCUProjectNature
23 | com.st.stm32cube.ide.mcu.MCUCubeProjectNature
24 | org.eclipse.cdt.core.cnature
25 | com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature
26 | com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature
27 | com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature
28 | com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
29 | com.st.stm32cube.ide.mcu.MCURootProjectNature
30 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
31 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
32 |
33 |
34 |
--------------------------------------------------------------------------------
/Core/Inc/testTickTiming.h:
--------------------------------------------------------------------------------
1 | // Test FreeRTOS Tick Timing on STM32L4 (testTickTiming.h)
2 | //
3 | // Uses RTC as reference standard. Be sure to configure and start the RTC prior to starting vTttOsTask().
4 | //
5 | // o Generates a new TttResults_t every tttTEST_DURATION_SECONDS unless disabled.
6 | // o Disable with vTttSetEvalInterval( portMAX_DELAY );
7 | // o Task starts in the disable state.
8 | // o Enable with vTttSetEvalInterval( xIntervalTicks ); where 2 <= xIntervalTicks <= configTICK_RATE_HZ
9 |
10 | #ifndef INC_TESTTICKTIMING_H_
11 | #define INC_TESTTICKTIMING_H_
12 |
13 | #include "FreeRTOS.h"
14 |
15 | // The testing occurs in back-to-back runs with each run lasting approximately this long. Maximum
16 | // setting is 1 hour.
17 | //
18 | #define tttTEST_DURATION_SECONDS 60 // MAX 3600
19 |
20 | void vTttOsTask( void const * argument );
21 |
22 | void vApplicationTickHook( void );
23 |
24 | #if configUSE_TICK_TEST_COMPLETE_HOOK != 0
25 | extern void vApplicationTickTestComplete();
26 | #endif
27 |
28 | typedef struct
29 | {
30 | uint32_t subsecondsPerSecond;
31 |
32 | int32_t driftSs;
33 | uint32_t durationSs;
34 |
35 | int16_t minDriftRatePct;
36 | int16_t maxDriftRatePct;
37 |
38 | int resultsCounter;
39 |
40 | } TttResults_t;
41 |
42 | void vTttGetResults( TttResults_t* lastCompletedRun, TttResults_t* runNowUnderway );
43 |
44 | // To enable tick-timing evaluation, set interval: 2 <= interval <= configTICK_RATE_HZ
45 | // To disable tick-timing evaluation, set interval = portMAX_DELAY.
46 | //
47 | void vTttSetEvalInterval( TickType_t interval );
48 |
49 | #endif /* INC_TESTTICKTIMING_H_ */
50 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/cmsis_version.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file cmsis_version.h
3 | * @brief CMSIS Core(M) Version definitions
4 | * @version V5.0.3
5 | * @date 24. June 2019
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef __CMSIS_VERSION_H
32 | #define __CMSIS_VERSION_H
33 |
34 | /* CMSIS Version definitions */
35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
36 | #define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
39 | #endif
40 |
--------------------------------------------------------------------------------
/Core/Inc/ulp.h:
--------------------------------------------------------------------------------
1 | // Ultra Low Power API (ulp.h)
2 | //
3 | // Automatically use STOP modes in FreeRTOS whenever application conditions permit.
4 |
5 | #ifndef INC_ULP_H_
6 | #define INC_ULP_H_
7 |
8 | // Symbol configMIN_RUN_BETWEEN_DEEP_SLEEPS, optionally defined in FreeRTOSConfig.h, enables a workaround
9 | // for erratum 2.3.21, which affects some STM32 devices (like the 'L476). If the STM32 used in this project
10 | // is not affected by this erratum, leave symbol configMIN_RUN_BETWEEN_DEEP_SLEEPS undefined.
11 | //
12 | // To enable this workaround, define configMIN_RUN_BETWEEN_DEEP_SLEEPS in FreeRTOSConfig.h. The value of
13 | // this symbol is a number of core clock cycles, and it depends on Vdd and on the core-clock speed. See the
14 | // errata sheet for details. If this value changes at run time, call vUlpInit() after each change.
15 | //
16 | // *** Note that this workaround uses the SysTick timer. ***
17 | //
18 | // Example (in FreeRTOSConfig.h):
19 | //
20 | // #define configMIN_RUN_BETWEEN_DEEP_SLEEPS ( (13U * configCPU_CLOCK_HZ) / 1000000 ) // 13us for 1.8V VDD
21 |
22 | void vUlpInit();
23 |
24 | // Define an application-specific set of peripherals of interest to the ULP support code. The values
25 | // are used as flags in the ULP implementation. The peripherals of interest are those used by the application
26 | // that cannot operate in STOP 2 mode.
27 | //
28 | #define ulpPERIPHERAL_USART2 (1UL << 0)
29 | #define ulpPERIPHERAL_LPTIM2 (1UL << 1)
30 | #define ulpPERIPHERAL_MIN_RUN (1UL << 2)
31 | #define ulpPERIPHERAL_HSE (1UL << 3)
32 |
33 | // Identify the subset of the peripherals listed above that can operate in STOP 1 mode.
34 | //
35 | #define ulpPERIPHERALS_OK_IN_STOP1 (ulpPERIPHERAL_LPTIM2)
36 |
37 | void vUlpOnPeripheralsActive( int xPeripherals );
38 | void vUlpOnPeripheralsActiveFromISR( int xPeripherals );
39 |
40 | void vUlpOnPeripheralsInactive( int xPeripherals );
41 | void vUlpOnPeripheralsInactiveFromISR( int xPeripherals );
42 |
43 | void vUlpPreSleepProcessing();
44 |
45 | void vUlpPostSleepProcessing();
46 |
47 | #endif /* INC_ULP_H_ */
48 |
--------------------------------------------------------------------------------
/Core/Inc/stm32l4xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2021 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32L4xx_IT_H
23 | #define __STM32L4xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void DebugMon_Handler(void);
56 | void TIM1_TRG_COM_TIM17_IRQHandler(void);
57 | void USART2_IRQHandler(void);
58 | void EXTI15_10_IRQHandler(void);
59 | void LPTIM2_IRQHandler(void);
60 | /* USER CODE BEGIN EFP */
61 |
62 | /* USER CODE END EFP */
63 |
64 | #ifdef __cplusplus
65 | }
66 | #endif
67 |
68 | #endif /* __STM32L4xx_IT_H */
69 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_flash_ramfunc.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH RAMFUNC driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file in
13 | * the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | ******************************************************************************
16 | */
17 |
18 | /* Define to prevent recursive inclusion -------------------------------------*/
19 | #ifndef STM32L4xx_FLASH_RAMFUNC_H
20 | #define STM32L4xx_FLASH_RAMFUNC_H
21 |
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "stm32l4xx_hal_def.h"
28 |
29 | /** @addtogroup STM32L4xx_HAL_Driver
30 | * @{
31 | */
32 |
33 | /** @addtogroup FLASH_RAMFUNC
34 | * @{
35 | */
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 | /* Exported macro ------------------------------------------------------------*/
39 | /* Exported functions --------------------------------------------------------*/
40 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions
41 | * @{
42 | */
43 |
44 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
45 | * @{
46 | */
47 | /* Peripheral Control functions ************************************************/
48 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void);
49 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void);
50 | #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig);
52 | #endif
53 | /**
54 | * @}
55 | */
56 |
57 | /**
58 | * @}
59 | */
60 |
61 | /**
62 | * @}
63 | */
64 |
65 | /**
66 | * @}
67 | */
68 |
69 | #ifdef __cplusplus
70 | }
71 | #endif
72 |
73 | #endif /* STM32L4xx_FLASH_RAMFUNC_H */
74 |
75 |
--------------------------------------------------------------------------------
/Core/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2021 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32l4xx_hal.h"
32 |
33 | /* Private includes ----------------------------------------------------------*/
34 | /* USER CODE BEGIN Includes */
35 |
36 | /* USER CODE END Includes */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* USER CODE BEGIN ET */
40 |
41 | /* USER CODE END ET */
42 |
43 | /* Exported constants --------------------------------------------------------*/
44 | /* USER CODE BEGIN EC */
45 |
46 | /* USER CODE END EC */
47 |
48 | /* Exported macro ------------------------------------------------------------*/
49 | /* USER CODE BEGIN EM */
50 |
51 | /* USER CODE END EM */
52 |
53 | /* Exported functions prototypes ---------------------------------------------*/
54 | void Error_Handler(void);
55 |
56 | /* USER CODE BEGIN EFP */
57 |
58 | /* USER CODE END EFP */
59 |
60 | /* Private defines -----------------------------------------------------------*/
61 | #define B1_Pin GPIO_PIN_13
62 | #define B1_GPIO_Port GPIOC
63 | #define B1_EXTI_IRQn EXTI15_10_IRQn
64 | #define LD2_Pin GPIO_PIN_5
65 | #define LD2_GPIO_Port GPIOA
66 | #define TMS_Pin GPIO_PIN_13
67 | #define TMS_GPIO_Port GPIOA
68 | #define TCK_Pin GPIO_PIN_14
69 | #define TCK_GPIO_Port GPIOA
70 | #define SWO_Pin GPIO_PIN_3
71 | #define SWO_GPIO_Port GPIOB
72 |
73 | /* USER CODE BEGIN Private defines */
74 |
75 | /* USER CODE END Private defines */
76 |
77 | #ifdef __cplusplus
78 | }
79 | #endif
80 |
81 | #endif /* __MAIN_H */
82 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32l4xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 |
19 | /** @addtogroup CMSIS
20 | * @{
21 | */
22 |
23 | /** @addtogroup stm32l4xx_system
24 | * @{
25 | */
26 |
27 | /**
28 | * @brief Define to prevent recursive inclusion
29 | */
30 | #ifndef __SYSTEM_STM32L4XX_H
31 | #define __SYSTEM_STM32L4XX_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /** @addtogroup STM32L4xx_System_Includes
38 | * @{
39 | */
40 |
41 | /**
42 | * @}
43 | */
44 |
45 |
46 | /** @addtogroup STM32L4xx_System_Exported_Variables
47 | * @{
48 | */
49 | /* The SystemCoreClock variable is updated in three ways:
50 | 1) by calling CMSIS function SystemCoreClockUpdate()
51 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
52 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
53 | Note: If you use this function to configure the system clock; then there
54 | is no need to call the 2 first functions listed above, since SystemCoreClock
55 | variable is updated automatically.
56 | */
57 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
58 |
59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
61 | extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /** @addtogroup STM32L4xx_System_Exported_Constants
68 | * @{
69 | */
70 |
71 | /**
72 | * @}
73 | */
74 |
75 | /** @addtogroup STM32L4xx_System_Exported_Macros
76 | * @{
77 | */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /** @addtogroup STM32L4xx_System_Exported_Functions
84 | * @{
85 | */
86 |
87 | extern void SystemInit(void);
88 | extern void SystemCoreClockUpdate(void);
89 | /**
90 | * @}
91 | */
92 |
93 | #ifdef __cplusplus
94 | }
95 | #endif
96 |
97 | #endif /*__SYSTEM_STM32L4XX_H */
98 |
99 | /**
100 | * @}
101 | */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/tz_context.h:
--------------------------------------------------------------------------------
1 | /******************************************************************************
2 | * @file tz_context.h
3 | * @brief Context Management for Armv8-M TrustZone
4 | * @version V1.0.1
5 | * @date 10. January 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef TZ_CONTEXT_H
32 | #define TZ_CONTEXT_H
33 |
34 | #include
35 |
36 | #ifndef TZ_MODULEID_T
37 | #define TZ_MODULEID_T
38 | /// \details Data type that identifies secure software modules called by a process.
39 | typedef uint32_t TZ_ModuleId_t;
40 | #endif
41 |
42 | /// \details TZ Memory ID identifies an allocated memory slot.
43 | typedef uint32_t TZ_MemoryId_t;
44 |
45 | /// Initialize secure context memory system
46 | /// \return execution status (1: success, 0: error)
47 | uint32_t TZ_InitContextSystem_S (void);
48 |
49 | /// Allocate context memory for calling secure software modules in TrustZone
50 | /// \param[in] module identifies software modules called from non-secure mode
51 | /// \return value != 0 id TrustZone memory slot identifier
52 | /// \return value 0 no memory available or internal error
53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
54 |
55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
56 | /// \param[in] id TrustZone memory slot identifier
57 | /// \return execution status (1: success, 0: error)
58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
59 |
60 | /// Load secure context (called on RTOS thread context switch)
61 | /// \param[in] id TrustZone memory slot identifier
62 | /// \return execution status (1: success, 0: error)
63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
64 |
65 | /// Store secure context (called on RTOS thread context switch)
66 | /// \param[in] id TrustZone memory slot identifier
67 | /// \return execution status (1: success, 0: error)
68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
69 |
70 | #endif // TZ_CONTEXT_H
71 |
--------------------------------------------------------------------------------
/Core/Src/sysmem.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file sysmem.c
4 | * @author Generated by STM32CubeIDE
5 | * @brief STM32CubeIDE System Memory calls file
6 | *
7 | * For more information about which C functions
8 | * need which of these lowlevel functions
9 | * please consult the newlib libc manual
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © Copyright (c) 2020 STMicroelectronics.
14 | * All rights reserved.
15 | *
16 | * This software component is licensed by ST under BSD 3-Clause license,
17 | * the "License"; You may not use this file except in compliance with the
18 | * License. You may obtain a copy of the License at:
19 | * opensource.org/licenses/BSD-3-Clause
20 | *
21 | ******************************************************************************
22 | */
23 |
24 | /* Includes */
25 | #include
26 | #include
27 |
28 | /**
29 | * Pointer to the current high watermark of the heap usage
30 | */
31 | static uint8_t *__sbrk_heap_end = NULL;
32 |
33 | /**
34 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
35 | * and others from the C library
36 | *
37 | * @verbatim
38 | * ############################################################################
39 | * # .data # .bss # newlib heap # MSP stack #
40 | * # # # # Reserved by _Min_Stack_Size #
41 | * ############################################################################
42 | * ^-- RAM start ^-- _end _estack, RAM end --^
43 | * @endverbatim
44 | *
45 | * This implementation starts allocating at the '_end' linker symbol
46 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
47 | * The implementation considers '_estack' linker symbol to be RAM end
48 | * NOTE: If the MSP stack, at any point during execution, grows larger than the
49 | * reserved size, please increase the '_Min_Stack_Size'.
50 | *
51 | * @param incr Memory size
52 | * @return Pointer to allocated memory
53 | */
54 | void *_sbrk(ptrdiff_t incr)
55 | {
56 | extern uint8_t _end; /* Symbol defined in the linker script */
57 | extern uint8_t _estack; /* Symbol defined in the linker script */
58 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
59 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
60 | const uint8_t *max_heap = (uint8_t *)stack_limit;
61 | uint8_t *prev_heap_end;
62 |
63 | /* Initialize heap end at first call */
64 | if (NULL == __sbrk_heap_end)
65 | {
66 | __sbrk_heap_end = &_end;
67 | }
68 |
69 | /* Protect heap from growing into the reserved MSP stack */
70 | if (__sbrk_heap_end + incr > max_heap)
71 | {
72 | errno = ENOMEM;
73 | return (void *)-1;
74 | }
75 |
76 | prev_heap_end = __sbrk_heap_end;
77 | __sbrk_heap_end += incr;
78 |
79 | return (void *)prev_heap_end;
80 | }
81 |
--------------------------------------------------------------------------------
/Core/Src/syscalls.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file syscalls.c
4 | * @author Auto-generated by STM32CubeIDE
5 | * @brief STM32CubeIDE Minimal System calls file
6 | *
7 | * For more information about which c-functions
8 | * need which of these lowlevel functions
9 | * please consult the Newlib libc-manual
10 | ******************************************************************************
11 | * @attention
12 | *
13 | * © Copyright (c) 2020 STMicroelectronics.
14 | * All rights reserved.
15 | *
16 | * This software component is licensed by ST under BSD 3-Clause license,
17 | * the "License"; You may not use this file except in compliance with the
18 | * License. You may obtain a copy of the License at:
19 | * opensource.org/licenses/BSD-3-Clause
20 | *
21 | ******************************************************************************
22 | */
23 |
24 | /* Includes */
25 | #include
26 | #include
27 | #include
28 | #include
29 | #include
30 | #include
31 | #include
32 | #include
33 |
34 |
35 | /* Variables */
36 | //#undef errno
37 | extern int errno;
38 | extern int __io_putchar(int ch) __attribute__((weak));
39 | extern int __io_getchar(void) __attribute__((weak));
40 |
41 | register char * stack_ptr asm("sp");
42 |
43 | char *__env[1] = { 0 };
44 | char **environ = __env;
45 |
46 |
47 | /* Functions */
48 | void initialise_monitor_handles()
49 | {
50 | }
51 |
52 | int _getpid(void)
53 | {
54 | return 1;
55 | }
56 |
57 | int _kill(int pid, int sig)
58 | {
59 | errno = EINVAL;
60 | return -1;
61 | }
62 |
63 | void _exit (int status)
64 | {
65 | _kill(status, -1);
66 | while (1) {} /* Make sure we hang here */
67 | }
68 |
69 | __attribute__((weak)) int _read(int file, char *ptr, int len)
70 | {
71 | int DataIdx;
72 |
73 | for (DataIdx = 0; DataIdx < len; DataIdx++)
74 | {
75 | *ptr++ = __io_getchar();
76 | }
77 |
78 | return len;
79 | }
80 |
81 | __attribute__((weak)) int _write(int file, char *ptr, int len)
82 | {
83 | int DataIdx;
84 |
85 | for (DataIdx = 0; DataIdx < len; DataIdx++)
86 | {
87 | __io_putchar(*ptr++);
88 | }
89 | return len;
90 | }
91 |
92 | int _close(int file)
93 | {
94 | return -1;
95 | }
96 |
97 |
98 | int _fstat(int file, struct stat *st)
99 | {
100 | st->st_mode = S_IFCHR;
101 | return 0;
102 | }
103 |
104 | int _isatty(int file)
105 | {
106 | return 1;
107 | }
108 |
109 | int _lseek(int file, int ptr, int dir)
110 | {
111 | return 0;
112 | }
113 |
114 | int _open(char *path, int flags, ...)
115 | {
116 | /* Pretend like we always fail */
117 | return -1;
118 | }
119 |
120 | int _wait(int *status)
121 | {
122 | errno = ECHILD;
123 | return -1;
124 | }
125 |
126 | int _unlink(char *name)
127 | {
128 | errno = ENOENT;
129 | return -1;
130 | }
131 |
132 | int _times(struct tms *buf)
133 | {
134 | return -1;
135 | }
136 |
137 | int _stat(char *file, struct stat *st)
138 | {
139 | st->st_mode = S_IFCHR;
140 | return 0;
141 | }
142 |
143 | int _link(char *old, char *new)
144 | {
145 | errno = EMLINK;
146 | return -1;
147 | }
148 |
149 | int _fork(void)
150 | {
151 | errno = EAGAIN;
152 | return -1;
153 | }
154 |
155 | int _execve(char *name, char **argv, char **env)
156 | {
157 | errno = ENOMEM;
158 | return -1;
159 | }
160 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_flash_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file in
13 | * the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | ******************************************************************************
16 | */
17 |
18 | /* Define to prevent recursive inclusion -------------------------------------*/
19 | #ifndef STM32L4xx_HAL_FLASH_EX_H
20 | #define STM32L4xx_HAL_FLASH_EX_H
21 |
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "stm32l4xx_hal_def.h"
28 |
29 | /** @addtogroup STM32L4xx_HAL_Driver
30 | * @{
31 | */
32 |
33 | /** @addtogroup FLASHEx
34 | * @{
35 | */
36 |
37 | /* Exported types ------------------------------------------------------------*/
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | #if defined (FLASH_CFGR_LVEN)
41 | /** @addtogroup FLASHEx_Exported_Constants
42 | * @{
43 | */
44 | /** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration
45 | * @{
46 | */
47 | #define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */
48 | #define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */
49 | /**
50 | * @}
51 | */
52 |
53 | /**
54 | * @}
55 | */
56 | #endif /* FLASH_CFGR_LVEN */
57 |
58 | /* Exported macro ------------------------------------------------------------*/
59 |
60 | /* Exported functions --------------------------------------------------------*/
61 | /** @addtogroup FLASHEx_Exported_Functions
62 | * @{
63 | */
64 |
65 | /* Extended Program operation functions *************************************/
66 | /** @addtogroup FLASHEx_Exported_Functions_Group1
67 | * @{
68 | */
69 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
70 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
71 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
72 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
73 | /**
74 | * @}
75 | */
76 |
77 | #if defined (FLASH_CFGR_LVEN)
78 | /** @addtogroup FLASHEx_Exported_Functions_Group2
79 | * @{
80 | */
81 | HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE);
82 | /**
83 | * @}
84 | */
85 | #endif /* FLASH_CFGR_LVEN */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /* Private function ----------------------------------------------------------*/
92 | /** @addtogroup FLASHEx_Private_Functions FLASHEx Private Functions
93 | * @{
94 | */
95 | void FLASH_PageErase(uint32_t Page, uint32_t Banks);
96 | void FLASH_FlushCaches(void);
97 | /**
98 | * @}
99 | */
100 |
101 | /* Private macros ------------------------------------------------------------*/
102 | /**
103 | @cond 0
104 | */
105 | #if defined (FLASH_CFGR_LVEN)
106 | #define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED))
107 | #endif /* FLASH_CFGR_LVEN */
108 | /**
109 | @endcond
110 | */
111 |
112 | /**
113 | * @}
114 | */
115 |
116 | /**
117 | * @}
118 | */
119 |
120 | #ifdef __cplusplus
121 | }
122 | #endif
123 |
124 | #endif /* STM32L4xx_HAL_FLASH_EX_H */
125 |
126 |
--------------------------------------------------------------------------------
/ReadMe.md:
--------------------------------------------------------------------------------
1 | # LPTIM-Tick
2 | *FreeRTOS Tick/Tickless via LPTIM*
3 |
4 | Use LPTIM for the FreeRTOS tick instead of the SysTick Timer for ultra-low-power applications.
5 |
6 | - No drift or slippage in kernel time
7 | - Use STOP modes even while FreeRTOS timers are running or delays are underway
8 | - For any STM32 with LPTIM (STM32L, STM32F, STM32G, STM32H, STM32U, STM32W)
9 |
10 | This repository demonstrates integration and testing of the [lptimTick.c gist](https://gist.github.com/jefftenney/02b313fe649a14b4c75237f925872d72) on [Nucleo-L476RG](https://www.st.com/en/evaluation-tools/nucleo-l476rg.html) (STM32L476). The project uses STM32CubeIDE and its integrated code-generation tool (STM32CubeMX). However, lptimTick.c is compatible with any toolchain supported by FreeRTOS.
11 |
12 | A separate repository, [LPTIM-Tick-U5](https://github.com/jefftenney/LPTIM-Tick-U5), is adapted to the STM32U family.
13 |
14 | For a thorough evaluation, this project can be built without tickless idle, with the default tickless idle, or with the custom tickless idle provided by lptimTick.c. See branches for additional evaluation options.
15 |
16 | ---
17 |
18 | ## Nucleo-L476RG Demo
19 |
20 | Press the blue button to cycle between tests:
21 | 1. Maintain kernel time only. LED blinks every 5 seconds.
22 | 2. Validate tick timing. LED blinks every 2 seconds.
23 | 3. Stress test tick timing. LED blinks every second.
24 |
25 | Tests 2 and 3 display live test results to a serial terminal. Connect to the STLink Virtual COM Port at 115200 8N1. Additionally, the LED blinks twice (instead of just once) in case of test failure.
26 |
27 | ## Test Results
28 | *Current readings shown are averages, *not* including the LED*
29 |
30 | __With lptimTick.c (`configUSE_TICKLESS_IDLE 2`)__
31 |
32 | - Test 1: 2μA, no drift
33 | - Test 2: 55μA, no drift
34 | - Test 3: 110μA, no drift
35 |
36 | __Default tickless idle (`configUSE_TICKLESS_IDLE 1`)__
37 |
38 | - Test 1: 3.70mA, trivial drift
39 | - Test 2: 3.72mA, trivial drift
40 | - Test 3: 3.74mA, trivial drift (with kernel v10.5.1 or newer)
41 |
42 | __Tickless disabled (`configUSE_TICKLESS_IDLE 0`)__
43 |
44 | - Test 1: 9.86mA, no drift
45 | - Test 2: 9.86mA, no drift
46 | - Test 3: 9.86mA, no drift
47 |
48 | ---
49 |
50 | ## Integrating lptimTick.c into your project
51 |
52 | 1. Add [lptimTick.c](https://github.com/jefftenney/LPTIM-Tick/blob/main/Core/Src/lptimTick.c) to your project folder, configuration, and/or makefile.
53 | 1. In FreeRTOSConfig.h, define `configUSE_TICKLESS_IDLE` to `2`, and eliminate the preprocessor definition for `xPortSysTickHandler`. If using LSI instead of LSE, define `configTICK_USES_LSI` and `configLPTIM_REF_CLOCK_HZ` (typically `32000` or `37000`), too.
54 | 1. Update the [#include](https://github.com/jefftenney/LPTIM-Tick/blob/5ca1c2ee5878479d2c5c1bac3c8f6a6ae2dea7eb/Core/Src/lptimTick.c#L32) for your MCU.
55 | 1. Update the LPTIM [instance selection](https://github.com/jefftenney/LPTIM-Tick/blob/5ca1c2ee5878479d2c5c1bac3c8f6a6ae2dea7eb/Core/Src/lptimTick.c#L255-L257). (For STM32WL users, [here](https://github.com/jefftenney/LPTIM-Tick/blob/5ca1c2ee5878479d2c5c1bac3c8f6a6ae2dea7eb/Core/Src/lptimTick.c#L289) too.) LPTIM1 is the default.
56 | 1. Update the [initialization code](https://github.com/jefftenney/LPTIM-Tick/blob/5ca1c2ee5878479d2c5c1bac3c8f6a6ae2dea7eb/Core/Src/lptimTick.c#L275-L279) that is specific to both the MCU family and the LPTIM instance.
57 |
58 | ---
59 |
60 | ## Application Requirements
61 |
62 | 1. You must ensure that no combination of your application's interrupt handlers and your code in `configPOST_SLEEP_PROCESSING()` can delay the tick ISR more than one tick period. To help your application meet this requirement, consider setting `configTICK_INTERRUPT_PRIORITY` to `configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY`, and make sure to implement `configPOST_SLEEP_PROCESSING()` so it executes quickly. See [vUlpPostSleepProcessing()](https://github.com/jefftenney/LPTIM-Tick/blob/4caa6b997983a834a11a7aa87f217efa9cdbfb5b/Core/Src/ulp.c#L145) for an example.
63 |
--------------------------------------------------------------------------------
/Core/Src/stm32l4xx_hal_timebase_tim.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_hal_timebase_TIM.c
5 | * @brief HAL time base based on the hardware TIM.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2021 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under Ultimate Liberty license
13 | * SLA0044, the "License"; You may not use this file except in compliance with
14 | * the License. You may obtain a copy of the License at:
15 | * www.st.com/SLA0044
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Includes ------------------------------------------------------------------*/
22 | #include "stm32l4xx_hal.h"
23 | #include "stm32l4xx_hal_tim.h"
24 |
25 | /* Private typedef -----------------------------------------------------------*/
26 | /* Private define ------------------------------------------------------------*/
27 | /* Private macro -------------------------------------------------------------*/
28 | /* Private variables ---------------------------------------------------------*/
29 | TIM_HandleTypeDef htim17;
30 | /* Private function prototypes -----------------------------------------------*/
31 | /* Private functions ---------------------------------------------------------*/
32 |
33 | /**
34 | * @brief This function configures the TIM17 as a time base source.
35 | * The time source is configured to have 1ms time base with a dedicated
36 | * Tick interrupt priority.
37 | * @note This function is called automatically at the beginning of program after
38 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
39 | * @param TickPriority: Tick interrupt priority.
40 | * @retval HAL status
41 | */
42 | HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
43 | {
44 | RCC_ClkInitTypeDef clkconfig;
45 | uint32_t uwTimclock;
46 |
47 | uint32_t uwPrescalerValue;
48 | uint32_t pFLatency;
49 | HAL_StatusTypeDef status = HAL_OK;
50 |
51 | /* Enable TIM17 clock */
52 | __HAL_RCC_TIM17_CLK_ENABLE();
53 |
54 | /* Get clock configuration */
55 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
56 |
57 | /* Compute TIM17 clock */
58 | uwTimclock = HAL_RCC_GetPCLK2Freq();
59 |
60 | /* Compute the prescaler value to have TIM17 counter clock equal to 1MHz */
61 | uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
62 |
63 | /* Initialize TIM17 */
64 | htim17.Instance = TIM17;
65 |
66 | /* Initialize TIMx peripheral as follow:
67 |
68 | + Period = [(TIM17CLK/1000) - 1]. to have a (1/1000) s time base.
69 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
70 | + ClockDivision = 0
71 | + Counter direction = Up
72 | */
73 | htim17.Init.Period = (1000000U / 1000U) - 1U;
74 | htim17.Init.Prescaler = uwPrescalerValue;
75 | htim17.Init.ClockDivision = 0;
76 | htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
77 | htim17.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
78 |
79 | status = HAL_TIM_Base_Init(&htim17);
80 | if (status == HAL_OK)
81 | {
82 | /* Start the TIM time Base generation in interrupt mode */
83 | status = HAL_TIM_Base_Start_IT(&htim17);
84 | if (status == HAL_OK)
85 | {
86 | /* Enable the TIM17 global Interrupt */
87 | HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
88 | /* Configure the SysTick IRQ priority */
89 | if (TickPriority < (1UL << __NVIC_PRIO_BITS))
90 | {
91 | /* Configure the TIM IRQ priority */
92 | HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, TickPriority, 0U);
93 | uwTickPrio = TickPriority;
94 | }
95 | else
96 | {
97 | status = HAL_ERROR;
98 | }
99 | }
100 | }
101 |
102 | /* Return function status */
103 | return status;
104 | }
105 |
106 | /**
107 | * @brief Suspend Tick increment.
108 | * @note Disable the tick increment by disabling TIM17 update interrupt.
109 | * @param None
110 | * @retval None
111 | */
112 | void HAL_SuspendTick(void)
113 | {
114 | /* Disable TIM17 update Interrupt */
115 | __HAL_TIM_DISABLE_IT(&htim17, TIM_IT_UPDATE);
116 | }
117 |
118 | /**
119 | * @brief Resume Tick increment.
120 | * @note Enable the tick increment by Enabling TIM17 update interrupt.
121 | * @param None
122 | * @retval None
123 | */
124 | void HAL_ResumeTick(void)
125 | {
126 | /* Enable TIM17 Update interrupt */
127 | __HAL_TIM_ENABLE_IT(&htim17, TIM_IT_UPDATE);
128 | }
129 |
130 |
--------------------------------------------------------------------------------
/STM32L476RGTX_RAM.ld:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file LinkerScript.ld
4 | * @author Auto-generated by STM32CubeIDE
5 | * Abstract : Linker script for NUCLEO-L476RG Board embedding STM32L476RGTx Device from stm32l4 series
6 | * 1024Kbytes FLASH
7 | * 96Kbytes RAM
8 | * 32Kbytes RAM2
9 | *
10 | * Set heap size, stack size and stack location according
11 | * to application requirements.
12 | *
13 | * Set memory bank area and size if external memory is used
14 | ******************************************************************************
15 | * @attention
16 | *
17 | * © Copyright (c) 2020 STMicroelectronics.
18 | * All rights reserved.
19 | *
20 | * This software component is licensed by ST under BSD 3-Clause license,
21 | * the "License"; You may not use this file except in compliance with the
22 | * License. You may obtain a copy of the License at:
23 | * opensource.org/licenses/BSD-3-Clause
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Entry Point */
29 | ENTRY(Reset_Handler)
30 |
31 | /* Highest address of the user mode stack */
32 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
33 |
34 | _Min_Heap_Size = 0x200; /* required amount of heap */
35 | _Min_Stack_Size = 0x400; /* required amount of stack */
36 |
37 | /* Memories definition */
38 | MEMORY
39 | {
40 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
41 | RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K
42 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
43 | }
44 |
45 | /* Sections */
46 | SECTIONS
47 | {
48 | /* The startup code into "RAM" Ram type memory */
49 | .isr_vector :
50 | {
51 | . = ALIGN(4);
52 | KEEP(*(.isr_vector)) /* Startup code */
53 | . = ALIGN(4);
54 | } >RAM
55 |
56 | /* The program code and other data into "RAM" Ram type memory */
57 | .text :
58 | {
59 | . = ALIGN(4);
60 | *(.text) /* .text sections (code) */
61 | *(.text*) /* .text* sections (code) */
62 | *(.glue_7) /* glue arm to thumb code */
63 | *(.glue_7t) /* glue thumb to arm code */
64 | *(.eh_frame)
65 | *(.RamFunc) /* .RamFunc sections */
66 | *(.RamFunc*) /* .RamFunc* sections */
67 |
68 | KEEP (*(.init))
69 | KEEP (*(.fini))
70 |
71 | . = ALIGN(4);
72 | _etext = .; /* define a global symbols at end of code */
73 | } >RAM
74 |
75 | /* Constant data into "RAM" Ram type memory */
76 | .rodata :
77 | {
78 | . = ALIGN(4);
79 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
80 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
81 | . = ALIGN(4);
82 | } >RAM
83 |
84 | .ARM.extab : {
85 | . = ALIGN(4);
86 | *(.ARM.extab* .gnu.linkonce.armextab.*)
87 | . = ALIGN(4);
88 | } >RAM
89 |
90 | .ARM : {
91 | . = ALIGN(4);
92 | __exidx_start = .;
93 | *(.ARM.exidx*)
94 | __exidx_end = .;
95 | . = ALIGN(4);
96 | } >RAM
97 |
98 | .preinit_array :
99 | {
100 | . = ALIGN(4);
101 | PROVIDE_HIDDEN (__preinit_array_start = .);
102 | KEEP (*(.preinit_array*))
103 | PROVIDE_HIDDEN (__preinit_array_end = .);
104 | . = ALIGN(4);
105 | } >RAM
106 |
107 | .init_array :
108 | {
109 | . = ALIGN(4);
110 | PROVIDE_HIDDEN (__init_array_start = .);
111 | KEEP (*(SORT(.init_array.*)))
112 | KEEP (*(.init_array*))
113 | PROVIDE_HIDDEN (__init_array_end = .);
114 | . = ALIGN(4);
115 | } >RAM
116 |
117 | .fini_array :
118 | {
119 | . = ALIGN(4);
120 | PROVIDE_HIDDEN (__fini_array_start = .);
121 | KEEP (*(SORT(.fini_array.*)))
122 | KEEP (*(.fini_array*))
123 | PROVIDE_HIDDEN (__fini_array_end = .);
124 | . = ALIGN(4);
125 | } >RAM
126 |
127 | /* Used by the startup to initialize data */
128 | _sidata = LOADADDR(.data);
129 |
130 | /* Initialized data sections into "RAM" Ram type memory */
131 | .data :
132 | {
133 | . = ALIGN(4);
134 | _sdata = .; /* create a global symbol at data start */
135 | *(.data) /* .data sections */
136 | *(.data*) /* .data* sections */
137 |
138 | . = ALIGN(4);
139 | _edata = .; /* define a global symbol at data end */
140 |
141 | } >RAM
142 |
143 | /* Uninitialized data section into "RAM" Ram type memory */
144 | . = ALIGN(4);
145 | .bss :
146 | {
147 | /* This is used by the startup in order to initialize the .bss section */
148 | _sbss = .; /* define a global symbol at bss start */
149 | __bss_start__ = _sbss;
150 | *(.bss)
151 | *(.bss*)
152 | *(COMMON)
153 |
154 | . = ALIGN(4);
155 | _ebss = .; /* define a global symbol at bss end */
156 | __bss_end__ = _ebss;
157 | } >RAM
158 |
159 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
160 | ._user_heap_stack :
161 | {
162 | . = ALIGN(8);
163 | PROVIDE ( end = . );
164 | PROVIDE ( _end = . );
165 | . = . + _Min_Heap_Size;
166 | . = . + _Min_Stack_Size;
167 | . = ALIGN(8);
168 | } >RAM
169 |
170 | /* Remove information from the compiler libraries */
171 | /DISCARD/ :
172 | {
173 | libc.a ( * )
174 | libm.a ( * )
175 | libgcc.a ( * )
176 | }
177 |
178 | .ARM.attributes 0 : { *(.ARM.attributes) }
179 | }
180 |
--------------------------------------------------------------------------------
/STM32L476RGTX_FLASH.ld:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file LinkerScript.ld
4 | * @author Auto-generated by STM32CubeIDE
5 | * Abstract : Linker script for NUCLEO-L476RG Board embedding STM32L476RGTx Device from stm32l4 series
6 | * 1024Kbytes FLASH
7 | * 96Kbytes RAM
8 | * 32Kbytes RAM2
9 | *
10 | * Set heap size, stack size and stack location according
11 | * to application requirements.
12 | *
13 | * Set memory bank area and size if external memory is used
14 | ******************************************************************************
15 | * @attention
16 | *
17 | * © Copyright (c) 2020 STMicroelectronics.
18 | * All rights reserved.
19 | *
20 | * This software component is licensed by ST under BSD 3-Clause license,
21 | * the "License"; You may not use this file except in compliance with the
22 | * License. You may obtain a copy of the License at:
23 | * opensource.org/licenses/BSD-3-Clause
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Entry Point */
29 | ENTRY(Reset_Handler)
30 |
31 | /* Highest address of the user mode stack */
32 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
33 |
34 | _Min_Heap_Size = 0x200; /* required amount of heap */
35 | _Min_Stack_Size = 0x400; /* required amount of stack */
36 |
37 | /* Memories definition */
38 | MEMORY
39 | {
40 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
41 | RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K
42 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K
43 | }
44 |
45 | /* Sections */
46 | SECTIONS
47 | {
48 | /* The startup code into "FLASH" Rom type memory */
49 | .isr_vector :
50 | {
51 | . = ALIGN(4);
52 | KEEP(*(.isr_vector)) /* Startup code */
53 | . = ALIGN(4);
54 | } >FLASH
55 |
56 | /* The program code and other data into "FLASH" Rom type memory */
57 | .text :
58 | {
59 | . = ALIGN(4);
60 | *(.text) /* .text sections (code) */
61 | *(.text*) /* .text* sections (code) */
62 | *(.glue_7) /* glue arm to thumb code */
63 | *(.glue_7t) /* glue thumb to arm code */
64 | *(.eh_frame)
65 |
66 | KEEP (*(.init))
67 | KEEP (*(.fini))
68 |
69 | . = ALIGN(4);
70 | _etext = .; /* define a global symbols at end of code */
71 | } >FLASH
72 |
73 | /* Constant data into "FLASH" Rom type memory */
74 | .rodata :
75 | {
76 | . = ALIGN(4);
77 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
78 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
79 | . = ALIGN(4);
80 | } >FLASH
81 |
82 | .ARM.extab (READONLY) : {
83 | . = ALIGN(4);
84 | *(.ARM.extab* .gnu.linkonce.armextab.*)
85 | . = ALIGN(4);
86 | } >FLASH
87 |
88 | .ARM (READONLY) : {
89 | . = ALIGN(4);
90 | __exidx_start = .;
91 | *(.ARM.exidx*)
92 | __exidx_end = .;
93 | . = ALIGN(4);
94 | } >FLASH
95 |
96 | .preinit_array (READONLY) :
97 | {
98 | . = ALIGN(4);
99 | PROVIDE_HIDDEN (__preinit_array_start = .);
100 | KEEP (*(.preinit_array*))
101 | PROVIDE_HIDDEN (__preinit_array_end = .);
102 | . = ALIGN(4);
103 | } >FLASH
104 |
105 | .init_array (READONLY) :
106 | {
107 | . = ALIGN(4);
108 | PROVIDE_HIDDEN (__init_array_start = .);
109 | KEEP (*(SORT(.init_array.*)))
110 | KEEP (*(.init_array*))
111 | PROVIDE_HIDDEN (__init_array_end = .);
112 | . = ALIGN(4);
113 | } >FLASH
114 |
115 | .fini_array (READONLY) :
116 | {
117 | . = ALIGN(4);
118 | PROVIDE_HIDDEN (__fini_array_start = .);
119 | KEEP (*(SORT(.fini_array.*)))
120 | KEEP (*(.fini_array*))
121 | PROVIDE_HIDDEN (__fini_array_end = .);
122 | . = ALIGN(4);
123 | } >FLASH
124 |
125 | /* Used by the startup to initialize data */
126 | _sidata = LOADADDR(.data);
127 |
128 | /* Initialized data sections into "RAM" Ram type memory */
129 | .data :
130 | {
131 | . = ALIGN(4);
132 | _sdata = .; /* create a global symbol at data start */
133 | *(.data) /* .data sections */
134 | *(.data*) /* .data* sections */
135 | *(.RamFunc) /* .RamFunc sections */
136 | *(.RamFunc*) /* .RamFunc* sections */
137 |
138 | . = ALIGN(4);
139 | _edata = .; /* define a global symbol at data end */
140 |
141 | } >RAM AT> FLASH
142 |
143 | /* Uninitialized data section into "RAM" Ram type memory */
144 | . = ALIGN(4);
145 | .bss :
146 | {
147 | /* This is used by the startup in order to initialize the .bss section */
148 | _sbss = .; /* define a global symbol at bss start */
149 | __bss_start__ = _sbss;
150 | *(.bss)
151 | *(.bss*)
152 | *(COMMON)
153 |
154 | . = ALIGN(4);
155 | _ebss = .; /* define a global symbol at bss end */
156 | __bss_end__ = _ebss;
157 | } >RAM
158 |
159 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
160 | ._user_heap_stack :
161 | {
162 | . = ALIGN(8);
163 | PROVIDE ( end = . );
164 | PROVIDE ( _end = . );
165 | . = . + _Min_Heap_Size;
166 | . = . + _Min_Stack_Size;
167 | . = ALIGN(8);
168 | } >RAM
169 |
170 | /* Remove information from the compiler libraries */
171 | /DISCARD/ :
172 | {
173 | libc.a ( * )
174 | libm.a ( * )
175 | libgcc.a ( * )
176 | }
177 |
178 | .ARM.attributes 0 : { *(.ARM.attributes) }
179 | }
180 |
--------------------------------------------------------------------------------
/Core/Src/freertos.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * File Name : freertos.c
5 | * Description : Code for freertos applications
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2021 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under Ultimate Liberty license
13 | * SLA0044, the "License"; You may not use this file except in compliance with
14 | * the License. You may obtain a copy of the License at:
15 | * www.st.com/SLA0044
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Includes ------------------------------------------------------------------*/
22 | #include "FreeRTOS.h"
23 | #include "task.h"
24 | #include "main.h"
25 |
26 | /* Private includes ----------------------------------------------------------*/
27 | /* USER CODE BEGIN Includes */
28 |
29 | /* USER CODE END Includes */
30 |
31 | /* Private typedef -----------------------------------------------------------*/
32 | /* USER CODE BEGIN PTD */
33 |
34 | /* USER CODE END PTD */
35 |
36 | /* Private define ------------------------------------------------------------*/
37 | /* USER CODE BEGIN PD */
38 |
39 | /* USER CODE END PD */
40 |
41 | /* Private macro -------------------------------------------------------------*/
42 | /* USER CODE BEGIN PM */
43 |
44 | /* USER CODE END PM */
45 |
46 | /* Private variables ---------------------------------------------------------*/
47 | /* USER CODE BEGIN Variables */
48 |
49 | /* USER CODE END Variables */
50 |
51 | /* Private function prototypes -----------------------------------------------*/
52 | /* USER CODE BEGIN FunctionPrototypes */
53 |
54 | /* USER CODE END FunctionPrototypes */
55 |
56 | /* GetIdleTaskMemory prototype (linked to static allocation support) */
57 | void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
58 |
59 | /* GetTimerTaskMemory prototype (linked to static allocation support) */
60 | void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize );
61 |
62 | /* Hook prototypes */
63 | void vApplicationTickHook(void);
64 | void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);
65 | void vApplicationMallocFailedHook(void);
66 |
67 | /* USER CODE BEGIN 3 */
68 | __weak void vApplicationTickHook( void )
69 | {
70 | /* This function will be called by each tick interrupt if
71 | configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be
72 | added here, but the tick hook is called from an interrupt context, so
73 | code must not attempt to block, and only the interrupt safe FreeRTOS API
74 | functions can be used (those that end in FromISR()). */
75 | }
76 | /* USER CODE END 3 */
77 |
78 | /* USER CODE BEGIN 4 */
79 | __weak void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
80 | {
81 | /* Run time stack overflow checking is performed if
82 | configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
83 | called if a stack overflow is detected. */
84 | }
85 | /* USER CODE END 4 */
86 |
87 | /* USER CODE BEGIN 5 */
88 | __weak void vApplicationMallocFailedHook(void)
89 | {
90 | /* vApplicationMallocFailedHook() will only be called if
91 | configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
92 | function that will get called if a call to pvPortMalloc() fails.
93 | pvPortMalloc() is called internally by the kernel whenever a task, queue,
94 | timer or semaphore is created. It is also called by various parts of the
95 | demo application. If heap_1.c or heap_2.c are used, then the size of the
96 | heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
97 | FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
98 | to query the size of free heap space that remains (although it does not
99 | provide information on how the remaining heap might be fragmented). */
100 | }
101 | /* USER CODE END 5 */
102 |
103 | /* USER CODE BEGIN VPORT_SUPPORT_TICKS_AND_SLEEP */
104 | __weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
105 | {
106 | // Generated when configUSE_TICKLESS_IDLE == 2.
107 | // Function called in tasks.c (in portTASK_FUNCTION).
108 | // TO BE COMPLETED or TO BE REPLACED by a user one, overriding that weak one.
109 | }
110 | /* USER CODE END VPORT_SUPPORT_TICKS_AND_SLEEP */
111 |
112 | /* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
113 | static StaticTask_t xIdleTaskTCBBuffer;
114 | static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
115 |
116 | void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
117 | {
118 | *ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
119 | *ppxIdleTaskStackBuffer = &xIdleStack[0];
120 | *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
121 | /* place for user code */
122 | }
123 | /* USER CODE END GET_IDLE_TASK_MEMORY */
124 |
125 | /* USER CODE BEGIN GET_TIMER_TASK_MEMORY */
126 | static StaticTask_t xTimerTaskTCBBuffer;
127 | static StackType_t xTimerStack[configTIMER_TASK_STACK_DEPTH];
128 |
129 | void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize )
130 | {
131 | *ppxTimerTaskTCBBuffer = &xTimerTaskTCBBuffer;
132 | *ppxTimerTaskStackBuffer = &xTimerStack[0];
133 | *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
134 | /* place for user code */
135 | }
136 | /* USER CODE END GET_TIMER_TASK_MEMORY */
137 |
138 | /* Private application code --------------------------------------------------*/
139 | /* USER CODE BEGIN Application */
140 |
141 | /* USER CODE END Application */
142 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 | #ifndef PROJDEFS_H
29 | #define PROJDEFS_H
30 |
31 | /*
32 | * Defines the prototype to which task functions must conform. Defined in this
33 | * file to ensure the type is known before portable.h is included.
34 | */
35 | typedef void (*TaskFunction_t)( void * );
36 |
37 | /* Converts a time in milliseconds to a time in ticks. This macro can be
38 | overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
39 | definition here is not suitable for your application. */
40 | #ifndef pdMS_TO_TICKS
41 | #define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
42 | #endif
43 |
44 | #define pdFALSE ( ( BaseType_t ) 0 )
45 | #define pdTRUE ( ( BaseType_t ) 1 )
46 |
47 | #define pdPASS ( pdTRUE )
48 | #define pdFAIL ( pdFALSE )
49 | #define errQUEUE_EMPTY ( ( BaseType_t ) 0 )
50 | #define errQUEUE_FULL ( ( BaseType_t ) 0 )
51 |
52 | /* FreeRTOS error definitions. */
53 | #define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )
54 | #define errQUEUE_BLOCKED ( -4 )
55 | #define errQUEUE_YIELD ( -5 )
56 |
57 | /* Macros used for basic data corruption checks. */
58 | #ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
59 | #define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
60 | #endif
61 |
62 | #if( configUSE_16_BIT_TICKS == 1 )
63 | #define pdINTEGRITY_CHECK_VALUE 0x5a5a
64 | #else
65 | #define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
66 | #endif
67 |
68 | /* The following errno values are used by FreeRTOS+ components, not FreeRTOS
69 | itself. */
70 | #define pdFREERTOS_ERRNO_NONE 0 /* No errors */
71 | #define pdFREERTOS_ERRNO_ENOENT 2 /* No such file or directory */
72 | #define pdFREERTOS_ERRNO_EINTR 4 /* Interrupted system call */
73 | #define pdFREERTOS_ERRNO_EIO 5 /* I/O error */
74 | #define pdFREERTOS_ERRNO_ENXIO 6 /* No such device or address */
75 | #define pdFREERTOS_ERRNO_EBADF 9 /* Bad file number */
76 | #define pdFREERTOS_ERRNO_EAGAIN 11 /* No more processes */
77 | #define pdFREERTOS_ERRNO_EWOULDBLOCK 11 /* Operation would block */
78 | #define pdFREERTOS_ERRNO_ENOMEM 12 /* Not enough memory */
79 | #define pdFREERTOS_ERRNO_EACCES 13 /* Permission denied */
80 | #define pdFREERTOS_ERRNO_EFAULT 14 /* Bad address */
81 | #define pdFREERTOS_ERRNO_EBUSY 16 /* Mount device busy */
82 | #define pdFREERTOS_ERRNO_EEXIST 17 /* File exists */
83 | #define pdFREERTOS_ERRNO_EXDEV 18 /* Cross-device link */
84 | #define pdFREERTOS_ERRNO_ENODEV 19 /* No such device */
85 | #define pdFREERTOS_ERRNO_ENOTDIR 20 /* Not a directory */
86 | #define pdFREERTOS_ERRNO_EISDIR 21 /* Is a directory */
87 | #define pdFREERTOS_ERRNO_EINVAL 22 /* Invalid argument */
88 | #define pdFREERTOS_ERRNO_ENOSPC 28 /* No space left on device */
89 | #define pdFREERTOS_ERRNO_ESPIPE 29 /* Illegal seek */
90 | #define pdFREERTOS_ERRNO_EROFS 30 /* Read only file system */
91 | #define pdFREERTOS_ERRNO_EUNATCH 42 /* Protocol driver not attached */
92 | #define pdFREERTOS_ERRNO_EBADE 50 /* Invalid exchange */
93 | #define pdFREERTOS_ERRNO_EFTYPE 79 /* Inappropriate file type or format */
94 | #define pdFREERTOS_ERRNO_ENMFILE 89 /* No more files */
95 | #define pdFREERTOS_ERRNO_ENOTEMPTY 90 /* Directory not empty */
96 | #define pdFREERTOS_ERRNO_ENAMETOOLONG 91 /* File or path name too long */
97 | #define pdFREERTOS_ERRNO_EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
98 | #define pdFREERTOS_ERRNO_ENOBUFS 105 /* No buffer space available */
99 | #define pdFREERTOS_ERRNO_ENOPROTOOPT 109 /* Protocol not available */
100 | #define pdFREERTOS_ERRNO_EADDRINUSE 112 /* Address already in use */
101 | #define pdFREERTOS_ERRNO_ETIMEDOUT 116 /* Connection timed out */
102 | #define pdFREERTOS_ERRNO_EINPROGRESS 119 /* Connection already in progress */
103 | #define pdFREERTOS_ERRNO_EALREADY 120 /* Socket already connected */
104 | #define pdFREERTOS_ERRNO_EADDRNOTAVAIL 125 /* Address not available */
105 | #define pdFREERTOS_ERRNO_EISCONN 127 /* Socket is already connected */
106 | #define pdFREERTOS_ERRNO_ENOTCONN 128 /* Socket is not connected */
107 | #define pdFREERTOS_ERRNO_ENOMEDIUM 135 /* No medium inserted */
108 | #define pdFREERTOS_ERRNO_EILSEQ 138 /* An invalid UTF-16 sequence was encountered. */
109 | #define pdFREERTOS_ERRNO_ECANCELED 140 /* Operation canceled. */
110 |
111 | /* The following endian values are used by FreeRTOS+ components, not FreeRTOS
112 | itself. */
113 | #define pdFREERTOS_LITTLE_ENDIAN 0
114 | #define pdFREERTOS_BIG_ENDIAN 1
115 |
116 | /* Re-defining endian values for generic naming. */
117 | #define pdLITTLE_ENDIAN pdFREERTOS_LITTLE_ENDIAN
118 | #define pdBIG_ENDIAN pdFREERTOS_BIG_ENDIAN
119 |
120 |
121 | #endif /* PROJDEFS_H */
122 |
123 |
124 |
125 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 | #ifndef STACK_MACROS_H
29 | #define STACK_MACROS_H
30 |
31 | /*
32 | * Call the stack overflow hook function if the stack of the task being swapped
33 | * out is currently overflowed, or looks like it might have overflowed in the
34 | * past.
35 | *
36 | * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
37 | * the current stack state only - comparing the current top of stack value to
38 | * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
39 | * will also cause the last few stack bytes to be checked to ensure the value
40 | * to which the bytes were set when the task was created have not been
41 | * overwritten. Note this second test does not guarantee that an overflowed
42 | * stack will always be recognised.
43 | */
44 |
45 | /*-----------------------------------------------------------*/
46 |
47 | #if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
48 |
49 | /* Only the current stack state is to be checked. */
50 | #define taskCHECK_FOR_STACK_OVERFLOW() \
51 | { \
52 | /* Is the currently saved stack pointer within the stack limit? */ \
53 | if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
54 | { \
55 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
56 | } \
57 | }
58 |
59 | #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
60 | /*-----------------------------------------------------------*/
61 |
62 | #if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
63 |
64 | /* Only the current stack state is to be checked. */
65 | #define taskCHECK_FOR_STACK_OVERFLOW() \
66 | { \
67 | \
68 | /* Is the currently saved stack pointer within the stack limit? */ \
69 | if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
70 | { \
71 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
72 | } \
73 | }
74 |
75 | #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
76 | /*-----------------------------------------------------------*/
77 |
78 | #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
79 |
80 | #define taskCHECK_FOR_STACK_OVERFLOW() \
81 | { \
82 | const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
83 | const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \
84 | \
85 | if( ( pulStack[ 0 ] != ulCheckValue ) || \
86 | ( pulStack[ 1 ] != ulCheckValue ) || \
87 | ( pulStack[ 2 ] != ulCheckValue ) || \
88 | ( pulStack[ 3 ] != ulCheckValue ) ) \
89 | { \
90 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
91 | } \
92 | }
93 |
94 | #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
95 | /*-----------------------------------------------------------*/
96 |
97 | #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
98 |
99 | #define taskCHECK_FOR_STACK_OVERFLOW() \
100 | { \
101 | int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
102 | static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
103 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
104 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
105 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
106 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
107 | \
108 | \
109 | pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
110 | \
111 | /* Has the extremity of the task stack ever been written over? */ \
112 | if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
113 | { \
114 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
115 | } \
116 | }
117 |
118 | #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
119 | /*-----------------------------------------------------------*/
120 |
121 | /* Remove stack overflow macro if not being used. */
122 | #ifndef taskCHECK_FOR_STACK_OVERFLOW
123 | #define taskCHECK_FOR_STACK_OVERFLOW()
124 | #endif
125 |
126 |
127 |
128 | #endif /* STACK_MACROS_H */
129 |
130 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 | #ifndef STACK_MACROS_H
29 | #define STACK_MACROS_H
30 |
31 | #ifndef _MSC_VER /* Visual Studio doesn't support #warning. */
32 | #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released.
33 | #endif
34 |
35 | /*
36 | * Call the stack overflow hook function if the stack of the task being swapped
37 | * out is currently overflowed, or looks like it might have overflowed in the
38 | * past.
39 | *
40 | * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
41 | * the current stack state only - comparing the current top of stack value to
42 | * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
43 | * will also cause the last few stack bytes to be checked to ensure the value
44 | * to which the bytes were set when the task was created have not been
45 | * overwritten. Note this second test does not guarantee that an overflowed
46 | * stack will always be recognised.
47 | */
48 |
49 | /*-----------------------------------------------------------*/
50 |
51 | #if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
52 |
53 | /* Only the current stack state is to be checked. */
54 | #define taskCHECK_FOR_STACK_OVERFLOW() \
55 | { \
56 | /* Is the currently saved stack pointer within the stack limit? */ \
57 | if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
58 | { \
59 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
60 | } \
61 | }
62 |
63 | #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
64 | /*-----------------------------------------------------------*/
65 |
66 | #if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
67 |
68 | /* Only the current stack state is to be checked. */
69 | #define taskCHECK_FOR_STACK_OVERFLOW() \
70 | { \
71 | \
72 | /* Is the currently saved stack pointer within the stack limit? */ \
73 | if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
74 | { \
75 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
76 | } \
77 | }
78 |
79 | #endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
80 | /*-----------------------------------------------------------*/
81 |
82 | #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
83 |
84 | #define taskCHECK_FOR_STACK_OVERFLOW() \
85 | { \
86 | const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \
87 | const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \
88 | \
89 | if( ( pulStack[ 0 ] != ulCheckValue ) || \
90 | ( pulStack[ 1 ] != ulCheckValue ) || \
91 | ( pulStack[ 2 ] != ulCheckValue ) || \
92 | ( pulStack[ 3 ] != ulCheckValue ) ) \
93 | { \
94 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
95 | } \
96 | }
97 |
98 | #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
99 | /*-----------------------------------------------------------*/
100 |
101 | #if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
102 |
103 | #define taskCHECK_FOR_STACK_OVERFLOW() \
104 | { \
105 | int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \
106 | static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
107 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
108 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
109 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
110 | tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
111 | \
112 | \
113 | pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
114 | \
115 | /* Has the extremity of the task stack ever been written over? */ \
116 | if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
117 | { \
118 | vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
119 | } \
120 | }
121 |
122 | #endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
123 | /*-----------------------------------------------------------*/
124 |
125 | /* Remove stack overflow macro if not being used. */
126 | #ifndef taskCHECK_FOR_STACK_OVERFLOW
127 | #define taskCHECK_FOR_STACK_OVERFLOW()
128 | #endif
129 |
130 |
131 |
132 | #endif /* STACK_MACROS_H */
133 |
134 |
--------------------------------------------------------------------------------
/Core/Src/stm32l4xx_it.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_it.c
5 | * @brief Interrupt Service Routines.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2021 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Includes ------------------------------------------------------------------*/
22 | #include "main.h"
23 | #include "stm32l4xx_it.h"
24 | /* Private includes ----------------------------------------------------------*/
25 | /* USER CODE BEGIN Includes */
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN PD */
35 |
36 | /* USER CODE END PD */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN PM */
40 |
41 | /* USER CODE END PM */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* Private user code ---------------------------------------------------------*/
54 | /* USER CODE BEGIN 0 */
55 |
56 | /* USER CODE END 0 */
57 |
58 | /* External variables --------------------------------------------------------*/
59 | extern LPTIM_HandleTypeDef hlptim2;
60 | extern UART_HandleTypeDef huart2;
61 | extern TIM_HandleTypeDef htim17;
62 |
63 | /* USER CODE BEGIN EV */
64 |
65 | /* USER CODE END EV */
66 |
67 | /******************************************************************************/
68 | /* Cortex-M4 Processor Interruption and Exception Handlers */
69 | /******************************************************************************/
70 | /**
71 | * @brief This function handles Non maskable interrupt.
72 | */
73 | void NMI_Handler(void)
74 | {
75 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
76 |
77 | /* USER CODE END NonMaskableInt_IRQn 0 */
78 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
79 | while (1)
80 | {
81 | }
82 | /* USER CODE END NonMaskableInt_IRQn 1 */
83 | }
84 |
85 | /**
86 | * @brief This function handles Hard fault interrupt.
87 | */
88 | void HardFault_Handler(void)
89 | {
90 | /* USER CODE BEGIN HardFault_IRQn 0 */
91 |
92 | /* USER CODE END HardFault_IRQn 0 */
93 | while (1)
94 | {
95 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */
96 | /* USER CODE END W1_HardFault_IRQn 0 */
97 | }
98 | }
99 |
100 | /**
101 | * @brief This function handles Memory management fault.
102 | */
103 | void MemManage_Handler(void)
104 | {
105 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */
106 |
107 | /* USER CODE END MemoryManagement_IRQn 0 */
108 | while (1)
109 | {
110 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
111 | /* USER CODE END W1_MemoryManagement_IRQn 0 */
112 | }
113 | }
114 |
115 | /**
116 | * @brief This function handles Prefetch fault, memory access fault.
117 | */
118 | void BusFault_Handler(void)
119 | {
120 | /* USER CODE BEGIN BusFault_IRQn 0 */
121 |
122 | /* USER CODE END BusFault_IRQn 0 */
123 | while (1)
124 | {
125 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */
126 | /* USER CODE END W1_BusFault_IRQn 0 */
127 | }
128 | }
129 |
130 | /**
131 | * @brief This function handles Undefined instruction or illegal state.
132 | */
133 | void UsageFault_Handler(void)
134 | {
135 | /* USER CODE BEGIN UsageFault_IRQn 0 */
136 |
137 | /* USER CODE END UsageFault_IRQn 0 */
138 | while (1)
139 | {
140 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
141 | /* USER CODE END W1_UsageFault_IRQn 0 */
142 | }
143 | }
144 |
145 | /**
146 | * @brief This function handles Debug monitor.
147 | */
148 | void DebugMon_Handler(void)
149 | {
150 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */
151 |
152 | /* USER CODE END DebugMonitor_IRQn 0 */
153 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */
154 |
155 | /* USER CODE END DebugMonitor_IRQn 1 */
156 | }
157 |
158 | /******************************************************************************/
159 | /* STM32L4xx Peripheral Interrupt Handlers */
160 | /* Add here the Interrupt Handlers for the used peripherals. */
161 | /* For the available peripheral interrupt handler names, */
162 | /* please refer to the startup file (startup_stm32l4xx.s). */
163 | /******************************************************************************/
164 |
165 | /**
166 | * @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt.
167 | */
168 | void TIM1_TRG_COM_TIM17_IRQHandler(void)
169 | {
170 | /* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 0 */
171 |
172 | /* USER CODE END TIM1_TRG_COM_TIM17_IRQn 0 */
173 | HAL_TIM_IRQHandler(&htim17);
174 | /* USER CODE BEGIN TIM1_TRG_COM_TIM17_IRQn 1 */
175 |
176 | /* USER CODE END TIM1_TRG_COM_TIM17_IRQn 1 */
177 | }
178 |
179 | /**
180 | * @brief This function handles USART2 global interrupt.
181 | */
182 | void USART2_IRQHandler(void)
183 | {
184 | /* USER CODE BEGIN USART2_IRQn 0 */
185 |
186 | /* USER CODE END USART2_IRQn 0 */
187 | HAL_UART_IRQHandler(&huart2);
188 | /* USER CODE BEGIN USART2_IRQn 1 */
189 |
190 | /* USER CODE END USART2_IRQn 1 */
191 | }
192 |
193 | /**
194 | * @brief This function handles EXTI line[15:10] interrupts.
195 | */
196 | void EXTI15_10_IRQHandler(void)
197 | {
198 | /* USER CODE BEGIN EXTI15_10_IRQn 0 */
199 |
200 | /* USER CODE END EXTI15_10_IRQn 0 */
201 | HAL_GPIO_EXTI_IRQHandler(B1_Pin);
202 | /* USER CODE BEGIN EXTI15_10_IRQn 1 */
203 |
204 | /* USER CODE END EXTI15_10_IRQn 1 */
205 | }
206 |
207 | /**
208 | * @brief This function handles LPTIM2 global interrupt.
209 | */
210 | void LPTIM2_IRQHandler(void)
211 | {
212 | /* USER CODE BEGIN LPTIM2_IRQn 0 */
213 |
214 | /* USER CODE END LPTIM2_IRQn 0 */
215 | HAL_LPTIM_IRQHandler(&hlptim2);
216 | /* USER CODE BEGIN LPTIM2_IRQn 1 */
217 |
218 | /* USER CODE END LPTIM2_IRQn 1 */
219 | }
220 |
221 | /* USER CODE BEGIN 1 */
222 |
223 | /* USER CODE END 1 */
224 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_i2c_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of I2C HAL Extended module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software is licensed under terms that can be found in the LICENSE file
13 | * in the root directory of this software component.
14 | * If no LICENSE file comes with this software, it is provided AS-IS.
15 | *
16 | ******************************************************************************
17 | */
18 |
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef STM32L4xx_HAL_I2C_EX_H
21 | #define STM32L4xx_HAL_I2C_EX_H
22 |
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "stm32l4xx_hal_def.h"
29 |
30 | /** @addtogroup STM32L4xx_HAL_Driver
31 | * @{
32 | */
33 |
34 | /** @addtogroup I2CEx
35 | * @{
36 | */
37 |
38 | /* Exported types ------------------------------------------------------------*/
39 | /* Exported constants --------------------------------------------------------*/
40 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
41 | * @{
42 | */
43 |
44 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
45 | * @{
46 | */
47 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U
48 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
49 | /**
50 | * @}
51 | */
52 |
53 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
54 | * @{
55 | */
56 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */
57 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
58 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
59 | #if defined(SYSCFG_CFGR1_I2C_PB8_FMP)
60 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
61 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
62 | #else
63 | #define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */
64 | #define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */
65 | #endif /* SYSCFG_CFGR1_I2C_PB8_FMP */
66 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
67 | #if defined(SYSCFG_CFGR1_I2C2_FMP)
68 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
69 | #else
70 | #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */
71 | #endif /* SYSCFG_CFGR1_I2C2_FMP */
72 | #define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
73 | #if defined(SYSCFG_CFGR1_I2C4_FMP)
74 | #define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */
75 | #else
76 | #define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */
77 | #endif /* SYSCFG_CFGR1_I2C4_FMP */
78 | /**
79 | * @}
80 | */
81 |
82 | /**
83 | * @}
84 | */
85 |
86 | /* Exported macro ------------------------------------------------------------*/
87 | /** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros
88 | * @{
89 | */
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /* Exported functions --------------------------------------------------------*/
96 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
97 | * @{
98 | */
99 |
100 | /** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions
101 | * @{
102 | */
103 | /* Peripheral Control functions ************************************************/
104 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
105 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
106 | /**
107 | * @}
108 | */
109 |
110 | /** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions
111 | * @{
112 | */
113 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
114 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
115 | /**
116 | * @}
117 | */
118 |
119 | /** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions
120 | * @{
121 | */
122 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
123 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
124 | /**
125 | * @}
126 | */
127 |
128 | /**
129 | * @}
130 | */
131 |
132 | /* Private constants ---------------------------------------------------------*/
133 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
134 | * @{
135 | */
136 |
137 | /**
138 | * @}
139 | */
140 |
141 | /* Private macros ------------------------------------------------------------*/
142 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
143 | * @{
144 | */
145 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
146 | ((FILTER) == I2C_ANALOGFILTER_DISABLE))
147 |
148 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
149 |
150 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
151 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
152 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
153 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
154 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
155 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
156 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
157 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \
158 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4)))
159 | /**
160 | * @}
161 | */
162 |
163 | /* Private Functions ---------------------------------------------------------*/
164 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
165 | * @{
166 | */
167 | /* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */
168 | /**
169 | * @}
170 | */
171 |
172 | /**
173 | * @}
174 | */
175 |
176 | /**
177 | * @}
178 | */
179 |
180 | #ifdef __cplusplus
181 | }
182 | #endif
183 |
184 | #endif /* STM32L4xx_HAL_I2C_EX_H */
185 |
--------------------------------------------------------------------------------
/Core/Src/ulp.c:
--------------------------------------------------------------------------------
1 | // Ultra Low Power API implementation (ulp.c)
2 |
3 | #include "stm32l4xx.h"
4 | #include "FreeRTOS.h"
5 | #include "task.h"
6 | #include "ulp.h"
7 |
8 | // Use of MSI as the clock source for the PLL
9 | //
10 | // An ultra-low-power application that uses MSI as the clock source for the PLL must ensure that the MSI
11 | // frequency is compatible with the flash wait-state and core-voltage regulator configurations as if MSI were
12 | // providing the core clock directly. In these applications, MSI does provide the core clock directly for a
13 | // short time after waking from stop mode. This is typically not an issue because the PLL is typically set
14 | // for a frequency faster than its incoming MSI frequency.
15 |
16 | // Warning about HSE and Stop modes
17 | //
18 | // An ultra-low-power application that uses HSE should use it only when needed, and should avoid the use
19 | // of stop modes while HSE is in use. This advice applies even if HSE is used in bypass mode. An easy way to
20 | // avoid stop modes while HSE is in use is to register it as a peripheral not safe for stop modes. See
21 | // ulpPERIPHERAL_HSE in ulp.h for example.
22 | //
23 | // This implementation of ULP assumes the application follows the advice above. The clock configuration
24 | // that doesn't use HSE is considered the ULP-friendly clock configuration.
25 |
26 | void vUlpInit()
27 | {
28 | #ifdef configMIN_RUN_BETWEEN_DEEP_SLEEPS // Errata workaround
29 | {
30 | // Set the SysTick "load" register (or reload-value register) to support the errata workaround.
31 | //
32 | // The SysTick timer uses a 24-bit counting register. The longest minimum-run time is 15us
33 | // according to the errata sheet. A 24-bit value (up to 16.7M) is more than sufficient for 15us,
34 | // no matter the core clock rate.
35 | //
36 | configASSERT( configMIN_RUN_BETWEEN_DEEP_SLEEPS <= 0x00FFFFFFU &&
37 | configMIN_RUN_BETWEEN_DEEP_SLEEPS != 0 );
38 | SysTick->LOAD = configMIN_RUN_BETWEEN_DEEP_SLEEPS;
39 |
40 | // Be sure SysTick uses the lowest interrupt priority.
41 | //
42 | NVIC_SetPriority(SysTick_IRQn, configLIBRARY_LOWEST_INTERRUPT_PRIORITY);
43 | }
44 | #endif
45 |
46 | // Be sure the MCU wakes up from stop mode on the same clock we normally use as the core clock, if
47 | // possible. Might as well give the MCU a head start getting the clock going while waking from STOP.
48 | //
49 | if ( (RCC->CFGR & RCC_CFGR_SWS_Msk) == RCC_CFGR_SWS_HSI )
50 | {
51 | SET_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK);
52 | }
53 | else if ( (RCC->CFGR & RCC_CFGR_SWS_Msk) == RCC_CFGR_SWS_MSI )
54 | {
55 | CLEAR_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK);
56 | }
57 | else
58 | {
59 | // An assertion failure here means the application has called vUlpInit() while HSE is providing the
60 | // core clock. The application must call vUlpInit() while the ULP-friendly clock configuration is in
61 | // place. See "Warning about HSE and Stop modes" above for more information.
62 | //
63 | configASSERT( (RCC->CFGR & RCC_CFGR_SWS_Msk) == RCC_CFGR_SWS_PLL );
64 |
65 | // The application has selected the PLL as the system clock. In this case, we optimize the
66 | // wake-up timing by configuring the MCU to wake from the source clock for the PLL (MSI or HSI).
67 | //
68 | if ( (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC_Msk) == RCC_PLLCFGR_PLLSRC_HSI )
69 | {
70 | SET_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK);
71 | }
72 | else
73 | {
74 | CLEAR_BIT(RCC->CFGR, RCC_CFGR_STOPWUCK);
75 |
76 | // An assertion failure here means the application has called vUlpInit() while HSE is providing
77 | // the input clock to the PLL. The application must call vUlpInit() while the ULP-friendly clock
78 | // configuration is in place. See "Warning about HSE and Stop modes" above for more information.
79 | //
80 | configASSERT( (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC_Msk) == RCC_PLLCFGR_PLLSRC_MSI );
81 | }
82 | }
83 | }
84 |
85 | static volatile int xDeepSleepForbiddenFlags = 0;
86 |
87 | void vUlpOnPeripheralsActive( int xPeripherals )
88 | {
89 | taskENTER_CRITICAL();
90 | xDeepSleepForbiddenFlags |= xPeripherals;
91 | taskEXIT_CRITICAL();
92 | }
93 |
94 | void vUlpOnPeripheralsActiveFromISR( int xPeripherals )
95 | {
96 | UBaseType_t uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
97 | xDeepSleepForbiddenFlags |= xPeripherals;
98 | taskEXIT_CRITICAL_FROM_ISR(uxSavedInterruptStatus);
99 | }
100 |
101 | void vUlpOnPeripheralsInactive( int xPeripherals )
102 | {
103 | taskENTER_CRITICAL();
104 | xDeepSleepForbiddenFlags &= ~xPeripherals;
105 | taskEXIT_CRITICAL();
106 | }
107 |
108 | void vUlpOnPeripheralsInactiveFromISR( int xPeripherals )
109 | {
110 | UBaseType_t uxSavedInterruptStatus = taskENTER_CRITICAL_FROM_ISR();
111 | xDeepSleepForbiddenFlags &= ~xPeripherals;
112 | taskEXIT_CRITICAL_FROM_ISR(uxSavedInterruptStatus);
113 | }
114 |
115 |
116 | // Functions vUlpPreSleepProcessing() and vUlpPostSleepProcessing() are called from a critical section,
117 | // so we happily take a few shortcuts made safe by that usage model.
118 | //
119 | static uint32_t rccCfgrSave;
120 | static uint32_t rccCrSave;
121 |
122 | void vUlpPreSleepProcessing()
123 | {
124 | int useDeepSleep = pdFALSE;
125 | if (xDeepSleepForbiddenFlags == 0)
126 | {
127 | useDeepSleep = pdTRUE;
128 | MODIFY_REG(PWR->CR1, PWR_CR1_LPMS_Msk, PWR_CR1_LPMS_STOP2);
129 | }
130 | else if ((xDeepSleepForbiddenFlags & ~ulpPERIPHERALS_OK_IN_STOP1) == 0)
131 | {
132 | useDeepSleep = pdTRUE;
133 | MODIFY_REG(PWR->CR1, PWR_CR1_LPMS_Msk, PWR_CR1_LPMS_STOP1);
134 | }
135 |
136 | if (useDeepSleep)
137 | {
138 | rccCrSave = RCC->CR;
139 | rccCfgrSave = RCC->CFGR;
140 |
141 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
142 | }
143 | }
144 |
145 | void vUlpPostSleepProcessing()
146 | {
147 | if (SCB->SCR & SCB_SCR_SLEEPDEEP_Msk)
148 | {
149 | #ifdef configMIN_RUN_BETWEEN_DEEP_SLEEPS // Errata workaround
150 | {
151 | // Start a new SysTick timer period. We won't attempt to enter STOP mode until the timer period
152 | // ends. Note that we do start a new period here unnecessarily if the CPU didn't actually enter stop
153 | // mode (due to a pending interrupt). That's OK.
154 | //
155 | SysTick->VAL = 0;
156 | SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk;
157 |
158 | // Mark the "min-run" peripheral as being now in use so that we won't attempt STOP mode until
159 | // it's no longer in use. See SysTick_Handler() below.
160 | //
161 | xDeepSleepForbiddenFlags |= ulpPERIPHERAL_MIN_RUN;
162 | }
163 | #endif
164 |
165 | // We may have been in deep sleep. If we were, the hardware cleared several enable bits in the CR,
166 | // and it changed the selected system clock in CFGR. Restore them now. If we're restarting the PLL as
167 | // the CPU clock here, the CPU will not wait for it. Instead, the CPU continues executing from the
168 | // wake-up clock (MSI or HSI) until the PLL is stable and then the CPU starts using the PLL.
169 | //
170 | RCC->CR = rccCrSave;
171 | RCC->CFGR = rccCfgrSave;
172 |
173 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
174 |
175 | // This application bypasses the RTC shadow registers, so we don't need to clear the sync flag for
176 | // those registers. They are always out of sync when coming out of deep sleep.
177 | //
178 | // RTC->ISR &= ~RTC_ISR_RSF;
179 | }
180 | }
181 |
182 | #ifdef configMIN_RUN_BETWEEN_DEEP_SLEEPS // Errata workaround
183 | // When the SysTick timer expires, we allow STOP mode again.
184 | //
185 | void SysTick_Handler()
186 | {
187 | // Stop the SysTick timer. We use it in "one-shot" mode to know when it's safe to use STOP mode
188 | // again. Then mark our "min-run" peripheral as no longer in use.
189 | //
190 | SysTick->CTRL = 0;
191 | vUlpOnPeripheralsInactiveFromISR( ulpPERIPHERAL_MIN_RUN );
192 | }
193 | #endif
194 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_def.h
4 | * @author MCD Application Team
5 | * @brief This file contains HAL common defines, enumeration, macros and
6 | * structures definitions.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * Copyright (c) 2017 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software is licensed under terms that can be found in the LICENSE file
14 | * in the root directory of this software component.
15 | * If no LICENSE file comes with this software, it is provided AS-IS.
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef STM32L4xx_HAL_DEF_H
22 | #define STM32L4xx_HAL_DEF_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32l4xx.h"
30 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
31 | #include
32 |
33 | /* Exported types ------------------------------------------------------------*/
34 |
35 | /**
36 | * @brief HAL Status structures definition
37 | */
38 | typedef enum
39 | {
40 | HAL_OK = 0x00,
41 | HAL_ERROR = 0x01,
42 | HAL_BUSY = 0x02,
43 | HAL_TIMEOUT = 0x03
44 | } HAL_StatusTypeDef;
45 |
46 | /**
47 | * @brief HAL Lock structures definition
48 | */
49 | typedef enum
50 | {
51 | HAL_UNLOCKED = 0x00,
52 | HAL_LOCKED = 0x01
53 | } HAL_LockTypeDef;
54 |
55 | /* Exported macros -----------------------------------------------------------*/
56 |
57 | #if !defined(UNUSED)
58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
59 | #endif /* UNUSED */
60 |
61 | #define HAL_MAX_DELAY 0xFFFFFFFFU
62 |
63 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
64 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
65 |
66 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
67 | do{ \
68 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
69 | (__DMA_HANDLE__).Parent = (__HANDLE__); \
70 | } while(0)
71 |
72 | /** @brief Reset the Handle's State field.
73 | * @param __HANDLE__: specifies the Peripheral Handle.
74 | * @note This macro can be used for the following purpose:
75 | * - When the Handle is declared as local variable; before passing it as parameter
76 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
77 | * to set to 0 the Handle's "State" field.
78 | * Otherwise, "State" field may have any random value and the first time the function
79 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed
80 | * (i.e. HAL_PPP_MspInit() will not be executed).
81 | * - When there is a need to reconfigure the low level hardware: instead of calling
82 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
83 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function
84 | * HAL_PPP_MspInit() which will reconfigure the low level hardware.
85 | * @retval None
86 | */
87 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
88 |
89 | #if (USE_RTOS == 1)
90 | /* Reserved for future use */
91 | #error " USE_RTOS should be 0 in the current HAL release "
92 | #else
93 | #define __HAL_LOCK(__HANDLE__) \
94 | do{ \
95 | if((__HANDLE__)->Lock == HAL_LOCKED) \
96 | { \
97 | return HAL_BUSY; \
98 | } \
99 | else \
100 | { \
101 | (__HANDLE__)->Lock = HAL_LOCKED; \
102 | } \
103 | }while (0)
104 |
105 | #define __HAL_UNLOCK(__HANDLE__) \
106 | do{ \
107 | (__HANDLE__)->Lock = HAL_UNLOCKED; \
108 | }while (0)
109 | #endif /* USE_RTOS */
110 |
111 |
112 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
113 | #ifndef __weak
114 | #define __weak __attribute__((weak))
115 | #endif
116 | #ifndef __packed
117 | #define __packed __attribute__((packed))
118 | #endif
119 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
120 | #ifndef __weak
121 | #define __weak __attribute__((weak))
122 | #endif /* __weak */
123 | #ifndef __packed
124 | #define __packed __attribute__((__packed__))
125 | #endif /* __packed */
126 | #endif /* __GNUC__ */
127 |
128 |
129 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
130 | #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) /* ARM Compiler V6 */
131 | #ifndef __ALIGN_BEGIN
132 | #define __ALIGN_BEGIN
133 | #endif
134 | #ifndef __ALIGN_END
135 | #define __ALIGN_END __attribute__ ((aligned (4)))
136 | #endif
137 | #elif defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
138 | #ifndef __ALIGN_END
139 | #define __ALIGN_END __attribute__ ((aligned (4)))
140 | #endif /* __ALIGN_END */
141 | #ifndef __ALIGN_BEGIN
142 | #define __ALIGN_BEGIN
143 | #endif /* __ALIGN_BEGIN */
144 | #else
145 | #ifndef __ALIGN_END
146 | #define __ALIGN_END
147 | #endif /* __ALIGN_END */
148 | #ifndef __ALIGN_BEGIN
149 | #if defined (__CC_ARM) /* ARM Compiler V5 */
150 | #define __ALIGN_BEGIN __align(4)
151 | #elif defined (__ICCARM__) /* IAR Compiler */
152 | #define __ALIGN_BEGIN
153 | #endif /* __CC_ARM */
154 | #endif /* __ALIGN_BEGIN */
155 | #endif /* __GNUC__ */
156 |
157 | /**
158 | * @brief __RAM_FUNC definition
159 | */
160 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
161 | /* ARM Compiler V4/V5 and V6
162 | --------------------------
163 | RAM functions are defined using the toolchain options.
164 | Functions that are executed in RAM should reside in a separate source module.
165 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
166 | area of a module to a memory space in physical RAM.
167 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
168 | dialog.
169 | */
170 | #define __RAM_FUNC
171 |
172 | #elif defined ( __ICCARM__ )
173 | /* ICCARM Compiler
174 | ---------------
175 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
176 | */
177 | #define __RAM_FUNC __ramfunc
178 |
179 | #elif defined ( __GNUC__ )
180 | /* GNU Compiler
181 | ------------
182 | RAM functions are defined using a specific toolchain attribute
183 | "__attribute__((section(".RamFunc")))".
184 | */
185 | #define __RAM_FUNC __attribute__((section(".RamFunc")))
186 |
187 | #endif
188 |
189 | /**
190 | * @brief __NOINLINE definition
191 | */
192 | #if defined ( __CC_ARM ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined ( __GNUC__ )
193 | /* ARM V4/V5 and V6 & GNU Compiler
194 | -------------------------------
195 | */
196 | #define __NOINLINE __attribute__ ( (noinline) )
197 |
198 | #elif defined ( __ICCARM__ )
199 | /* ICCARM Compiler
200 | ---------------
201 | */
202 | #define __NOINLINE _Pragma("optimize = no_inline")
203 |
204 | #endif
205 |
206 |
207 | #ifdef __cplusplus
208 | }
209 | #endif
210 |
211 | #endif /* STM32L4xx_HAL_DEF_H */
212 |
--------------------------------------------------------------------------------
/Core/Src/stm32l4xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32l4xx_hal_msp.c
5 | * @brief This file provides code for the MSP Initialization
6 | * and de-Initialization codes.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2021 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "main.h"
24 | /* USER CODE BEGIN Includes */
25 |
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN Define */
35 |
36 | /* USER CODE END Define */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN Macro */
40 |
41 | /* USER CODE END Macro */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* External functions --------------------------------------------------------*/
54 | /* USER CODE BEGIN ExternalFunctions */
55 |
56 | /* USER CODE END ExternalFunctions */
57 |
58 | /* USER CODE BEGIN 0 */
59 |
60 | /* USER CODE END 0 */
61 | /**
62 | * Initializes the Global MSP.
63 | */
64 | void HAL_MspInit(void)
65 | {
66 |
67 | /* USER CODE BEGIN MspInit 0 */
68 |
69 | /* USER CODE END MspInit 0 */
70 |
71 | __HAL_RCC_SYSCFG_CLK_ENABLE();
72 | __HAL_RCC_PWR_CLK_ENABLE();
73 |
74 | /* System interrupt init*/
75 | /* PendSV_IRQn interrupt configuration */
76 | HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
77 |
78 | /* USER CODE BEGIN MspInit 1 */
79 |
80 | /* USER CODE END MspInit 1 */
81 | }
82 |
83 | /**
84 | * @brief LPTIM MSP Initialization
85 | * This function configures the hardware resources used in this example
86 | * @param hlptim: LPTIM handle pointer
87 | * @retval None
88 | */
89 | void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef* hlptim)
90 | {
91 | RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
92 | if(hlptim->Instance==LPTIM2)
93 | {
94 | /* USER CODE BEGIN LPTIM2_MspInit 0 */
95 |
96 | /* USER CODE END LPTIM2_MspInit 0 */
97 |
98 | /** Initializes the peripherals clock
99 | */
100 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPTIM2;
101 | PeriphClkInit.Lptim2ClockSelection = RCC_LPTIM2CLKSOURCE_LSE;
102 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
103 | {
104 | Error_Handler();
105 | }
106 |
107 | /* Peripheral clock enable */
108 | __HAL_RCC_LPTIM2_CLK_ENABLE();
109 | /* LPTIM2 interrupt Init */
110 | HAL_NVIC_SetPriority(LPTIM2_IRQn, 15, 0);
111 | HAL_NVIC_EnableIRQ(LPTIM2_IRQn);
112 | /* USER CODE BEGIN LPTIM2_MspInit 1 */
113 |
114 | /* USER CODE END LPTIM2_MspInit 1 */
115 | }
116 |
117 | }
118 |
119 | /**
120 | * @brief LPTIM MSP De-Initialization
121 | * This function freeze the hardware resources used in this example
122 | * @param hlptim: LPTIM handle pointer
123 | * @retval None
124 | */
125 | void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef* hlptim)
126 | {
127 | if(hlptim->Instance==LPTIM2)
128 | {
129 | /* USER CODE BEGIN LPTIM2_MspDeInit 0 */
130 |
131 | /* USER CODE END LPTIM2_MspDeInit 0 */
132 | /* Peripheral clock disable */
133 | __HAL_RCC_LPTIM2_CLK_DISABLE();
134 |
135 | /* LPTIM2 interrupt DeInit */
136 | HAL_NVIC_DisableIRQ(LPTIM2_IRQn);
137 | /* USER CODE BEGIN LPTIM2_MspDeInit 1 */
138 |
139 | /* USER CODE END LPTIM2_MspDeInit 1 */
140 | }
141 |
142 | }
143 |
144 | /**
145 | * @brief RTC MSP Initialization
146 | * This function configures the hardware resources used in this example
147 | * @param hrtc: RTC handle pointer
148 | * @retval None
149 | */
150 | void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
151 | {
152 | RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
153 | if(hrtc->Instance==RTC)
154 | {
155 | /* USER CODE BEGIN RTC_MspInit 0 */
156 |
157 | /* USER CODE END RTC_MspInit 0 */
158 |
159 | /** Initializes the peripherals clock
160 | */
161 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC;
162 | PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
163 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
164 | {
165 | Error_Handler();
166 | }
167 |
168 | /* Peripheral clock enable */
169 | __HAL_RCC_RTC_ENABLE();
170 | /* USER CODE BEGIN RTC_MspInit 1 */
171 |
172 | /* USER CODE END RTC_MspInit 1 */
173 | }
174 |
175 | }
176 |
177 | /**
178 | * @brief RTC MSP De-Initialization
179 | * This function freeze the hardware resources used in this example
180 | * @param hrtc: RTC handle pointer
181 | * @retval None
182 | */
183 | void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
184 | {
185 | if(hrtc->Instance==RTC)
186 | {
187 | /* USER CODE BEGIN RTC_MspDeInit 0 */
188 |
189 | /* USER CODE END RTC_MspDeInit 0 */
190 | /* Peripheral clock disable */
191 | __HAL_RCC_RTC_DISABLE();
192 | /* USER CODE BEGIN RTC_MspDeInit 1 */
193 |
194 | /* USER CODE END RTC_MspDeInit 1 */
195 | }
196 |
197 | }
198 |
199 | /**
200 | * @brief UART MSP Initialization
201 | * This function configures the hardware resources used in this example
202 | * @param huart: UART handle pointer
203 | * @retval None
204 | */
205 | void HAL_UART_MspInit(UART_HandleTypeDef* huart)
206 | {
207 | GPIO_InitTypeDef GPIO_InitStruct = {0};
208 | RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
209 | if(huart->Instance==USART2)
210 | {
211 | /* USER CODE BEGIN USART2_MspInit 0 */
212 |
213 | /* USER CODE END USART2_MspInit 0 */
214 |
215 | /** Initializes the peripherals clock
216 | */
217 | PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
218 | PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_HSI;
219 | if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
220 | {
221 | Error_Handler();
222 | }
223 |
224 | /* Peripheral clock enable */
225 | __HAL_RCC_USART2_CLK_ENABLE();
226 |
227 | __HAL_RCC_GPIOA_CLK_ENABLE();
228 | /**USART2 GPIO Configuration
229 | PA2 ------> USART2_TX
230 | PA3 ------> USART2_RX
231 | */
232 | GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
233 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
234 | GPIO_InitStruct.Pull = GPIO_NOPULL;
235 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
236 | GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
237 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
238 |
239 | /* USART2 interrupt Init */
240 | HAL_NVIC_SetPriority(USART2_IRQn, 15, 0);
241 | HAL_NVIC_EnableIRQ(USART2_IRQn);
242 | /* USER CODE BEGIN USART2_MspInit 1 */
243 |
244 | /* USER CODE END USART2_MspInit 1 */
245 | }
246 |
247 | }
248 |
249 | /**
250 | * @brief UART MSP De-Initialization
251 | * This function freeze the hardware resources used in this example
252 | * @param huart: UART handle pointer
253 | * @retval None
254 | */
255 | void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
256 | {
257 | if(huart->Instance==USART2)
258 | {
259 | /* USER CODE BEGIN USART2_MspDeInit 0 */
260 |
261 | /* USER CODE END USART2_MspDeInit 0 */
262 | /* Peripheral clock disable */
263 | __HAL_RCC_USART2_CLK_DISABLE();
264 |
265 | /**USART2 GPIO Configuration
266 | PA2 ------> USART2_TX
267 | PA3 ------> USART2_RX
268 | */
269 | HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
270 |
271 | /* USART2 interrupt DeInit */
272 | HAL_NVIC_DisableIRQ(USART2_IRQn);
273 | /* USER CODE BEGIN USART2_MspDeInit 1 */
274 |
275 | /* USER CODE END USART2_MspDeInit 1 */
276 | }
277 |
278 | }
279 |
280 | /* USER CODE BEGIN 1 */
281 |
282 | /* USER CODE END 1 */
283 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 | #ifndef DEPRECATED_DEFINITIONS_H
29 | #define DEPRECATED_DEFINITIONS_H
30 |
31 |
32 | /* Each FreeRTOS port has a unique portmacro.h header file. Originally a
33 | pre-processor definition was used to ensure the pre-processor found the correct
34 | portmacro.h file for the port being used. That scheme was deprecated in favour
35 | of setting the compiler's include path such that it found the correct
36 | portmacro.h file - removing the need for the constant and allowing the
37 | portmacro.h file to be located anywhere in relation to the port being used. The
38 | definitions below remain in the code for backward compatibility only. New
39 | projects should not use them. */
40 |
41 | #ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT
42 | #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h"
43 | typedef void ( __interrupt __far *pxISR )();
44 | #endif
45 |
46 | #ifdef OPEN_WATCOM_FLASH_LITE_186_PORT
47 | #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h"
48 | typedef void ( __interrupt __far *pxISR )();
49 | #endif
50 |
51 | #ifdef GCC_MEGA_AVR
52 | #include "../portable/GCC/ATMega323/portmacro.h"
53 | #endif
54 |
55 | #ifdef IAR_MEGA_AVR
56 | #include "../portable/IAR/ATMega323/portmacro.h"
57 | #endif
58 |
59 | #ifdef MPLAB_PIC24_PORT
60 | #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
61 | #endif
62 |
63 | #ifdef MPLAB_DSPIC_PORT
64 | #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h"
65 | #endif
66 |
67 | #ifdef MPLAB_PIC18F_PORT
68 | #include "../../Source/portable/MPLAB/PIC18F/portmacro.h"
69 | #endif
70 |
71 | #ifdef MPLAB_PIC32MX_PORT
72 | #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h"
73 | #endif
74 |
75 | #ifdef _FEDPICC
76 | #include "libFreeRTOS/Include/portmacro.h"
77 | #endif
78 |
79 | #ifdef SDCC_CYGNAL
80 | #include "../../Source/portable/SDCC/Cygnal/portmacro.h"
81 | #endif
82 |
83 | #ifdef GCC_ARM7
84 | #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h"
85 | #endif
86 |
87 | #ifdef GCC_ARM7_ECLIPSE
88 | #include "portmacro.h"
89 | #endif
90 |
91 | #ifdef ROWLEY_LPC23xx
92 | #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h"
93 | #endif
94 |
95 | #ifdef IAR_MSP430
96 | #include "..\..\Source\portable\IAR\MSP430\portmacro.h"
97 | #endif
98 |
99 | #ifdef GCC_MSP430
100 | #include "../../Source/portable/GCC/MSP430F449/portmacro.h"
101 | #endif
102 |
103 | #ifdef ROWLEY_MSP430
104 | #include "../../Source/portable/Rowley/MSP430F449/portmacro.h"
105 | #endif
106 |
107 | #ifdef ARM7_LPC21xx_KEIL_RVDS
108 | #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h"
109 | #endif
110 |
111 | #ifdef SAM7_GCC
112 | #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h"
113 | #endif
114 |
115 | #ifdef SAM7_IAR
116 | #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h"
117 | #endif
118 |
119 | #ifdef SAM9XE_IAR
120 | #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h"
121 | #endif
122 |
123 | #ifdef LPC2000_IAR
124 | #include "..\..\Source\portable\IAR\LPC2000\portmacro.h"
125 | #endif
126 |
127 | #ifdef STR71X_IAR
128 | #include "..\..\Source\portable\IAR\STR71x\portmacro.h"
129 | #endif
130 |
131 | #ifdef STR75X_IAR
132 | #include "..\..\Source\portable\IAR\STR75x\portmacro.h"
133 | #endif
134 |
135 | #ifdef STR75X_GCC
136 | #include "..\..\Source\portable\GCC\STR75x\portmacro.h"
137 | #endif
138 |
139 | #ifdef STR91X_IAR
140 | #include "..\..\Source\portable\IAR\STR91x\portmacro.h"
141 | #endif
142 |
143 | #ifdef GCC_H8S
144 | #include "../../Source/portable/GCC/H8S2329/portmacro.h"
145 | #endif
146 |
147 | #ifdef GCC_AT91FR40008
148 | #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h"
149 | #endif
150 |
151 | #ifdef RVDS_ARMCM3_LM3S102
152 | #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h"
153 | #endif
154 |
155 | #ifdef GCC_ARMCM3_LM3S102
156 | #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
157 | #endif
158 |
159 | #ifdef GCC_ARMCM3
160 | #include "../../Source/portable/GCC/ARM_CM3/portmacro.h"
161 | #endif
162 |
163 | #ifdef IAR_ARM_CM3
164 | #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
165 | #endif
166 |
167 | #ifdef IAR_ARMCM3_LM
168 | #include "../../Source/portable/IAR/ARM_CM3/portmacro.h"
169 | #endif
170 |
171 | #ifdef HCS12_CODE_WARRIOR
172 | #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h"
173 | #endif
174 |
175 | #ifdef MICROBLAZE_GCC
176 | #include "../../Source/portable/GCC/MicroBlaze/portmacro.h"
177 | #endif
178 |
179 | #ifdef TERN_EE
180 | #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h"
181 | #endif
182 |
183 | #ifdef GCC_HCS12
184 | #include "../../Source/portable/GCC/HCS12/portmacro.h"
185 | #endif
186 |
187 | #ifdef GCC_MCF5235
188 | #include "../../Source/portable/GCC/MCF5235/portmacro.h"
189 | #endif
190 |
191 | #ifdef COLDFIRE_V2_GCC
192 | #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h"
193 | #endif
194 |
195 | #ifdef COLDFIRE_V2_CODEWARRIOR
196 | #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h"
197 | #endif
198 |
199 | #ifdef GCC_PPC405
200 | #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h"
201 | #endif
202 |
203 | #ifdef GCC_PPC440
204 | #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h"
205 | #endif
206 |
207 | #ifdef _16FX_SOFTUNE
208 | #include "..\..\Source\portable\Softune\MB96340\portmacro.h"
209 | #endif
210 |
211 | #ifdef BCC_INDUSTRIAL_PC_PORT
212 | /* A short file name has to be used in place of the normal
213 | FreeRTOSConfig.h when using the Borland compiler. */
214 | #include "frconfig.h"
215 | #include "..\portable\BCC\16BitDOS\PC\prtmacro.h"
216 | typedef void ( __interrupt __far *pxISR )();
217 | #endif
218 |
219 | #ifdef BCC_FLASH_LITE_186_PORT
220 | /* A short file name has to be used in place of the normal
221 | FreeRTOSConfig.h when using the Borland compiler. */
222 | #include "frconfig.h"
223 | #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h"
224 | typedef void ( __interrupt __far *pxISR )();
225 | #endif
226 |
227 | #ifdef __GNUC__
228 | #ifdef __AVR32_AVR32A__
229 | #include "portmacro.h"
230 | #endif
231 | #endif
232 |
233 | #ifdef __ICCAVR32__
234 | #ifdef __CORE__
235 | #if __CORE__ == __AVR32A__
236 | #include "portmacro.h"
237 | #endif
238 | #endif
239 | #endif
240 |
241 | #ifdef __91467D
242 | #include "portmacro.h"
243 | #endif
244 |
245 | #ifdef __96340
246 | #include "portmacro.h"
247 | #endif
248 |
249 |
250 | #ifdef __IAR_V850ES_Fx3__
251 | #include "../../Source/portable/IAR/V850ES/portmacro.h"
252 | #endif
253 |
254 | #ifdef __IAR_V850ES_Jx3__
255 | #include "../../Source/portable/IAR/V850ES/portmacro.h"
256 | #endif
257 |
258 | #ifdef __IAR_V850ES_Jx3_L__
259 | #include "../../Source/portable/IAR/V850ES/portmacro.h"
260 | #endif
261 |
262 | #ifdef __IAR_V850ES_Jx2__
263 | #include "../../Source/portable/IAR/V850ES/portmacro.h"
264 | #endif
265 |
266 | #ifdef __IAR_V850ES_Hx2__
267 | #include "../../Source/portable/IAR/V850ES/portmacro.h"
268 | #endif
269 |
270 | #ifdef __IAR_78K0R_Kx3__
271 | #include "../../Source/portable/IAR/78K0R/portmacro.h"
272 | #endif
273 |
274 | #ifdef __IAR_78K0R_Kx3L__
275 | #include "../../Source/portable/IAR/78K0R/portmacro.h"
276 | #endif
277 |
278 | #endif /* DEPRECATED_DEFINITIONS_H */
279 |
280 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 | /*-----------------------------------------------------------
29 | * Portable layer API. Each function must be defined for each port.
30 | *----------------------------------------------------------*/
31 |
32 | #ifndef PORTABLE_H
33 | #define PORTABLE_H
34 |
35 | /* Each FreeRTOS port has a unique portmacro.h header file. Originally a
36 | pre-processor definition was used to ensure the pre-processor found the correct
37 | portmacro.h file for the port being used. That scheme was deprecated in favour
38 | of setting the compiler's include path such that it found the correct
39 | portmacro.h file - removing the need for the constant and allowing the
40 | portmacro.h file to be located anywhere in relation to the port being used.
41 | Purely for reasons of backward compatibility the old method is still valid, but
42 | to make it clear that new projects should not use it, support for the port
43 | specific constants has been moved into the deprecated_definitions.h header
44 | file. */
45 | #include "deprecated_definitions.h"
46 |
47 | /* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
48 | did not result in a portmacro.h header file being included - and it should be
49 | included here. In this case the path to the correct portmacro.h header file
50 | must be set in the compiler's include path. */
51 | #ifndef portENTER_CRITICAL
52 | #include "portmacro.h"
53 | #endif
54 |
55 | #if portBYTE_ALIGNMENT == 32
56 | #define portBYTE_ALIGNMENT_MASK ( 0x001f )
57 | #endif
58 |
59 | #if portBYTE_ALIGNMENT == 16
60 | #define portBYTE_ALIGNMENT_MASK ( 0x000f )
61 | #endif
62 |
63 | #if portBYTE_ALIGNMENT == 8
64 | #define portBYTE_ALIGNMENT_MASK ( 0x0007 )
65 | #endif
66 |
67 | #if portBYTE_ALIGNMENT == 4
68 | #define portBYTE_ALIGNMENT_MASK ( 0x0003 )
69 | #endif
70 |
71 | #if portBYTE_ALIGNMENT == 2
72 | #define portBYTE_ALIGNMENT_MASK ( 0x0001 )
73 | #endif
74 |
75 | #if portBYTE_ALIGNMENT == 1
76 | #define portBYTE_ALIGNMENT_MASK ( 0x0000 )
77 | #endif
78 |
79 | #ifndef portBYTE_ALIGNMENT_MASK
80 | #error "Invalid portBYTE_ALIGNMENT definition"
81 | #endif
82 |
83 | #ifndef portNUM_CONFIGURABLE_REGIONS
84 | #define portNUM_CONFIGURABLE_REGIONS 1
85 | #endif
86 |
87 | #ifndef portHAS_STACK_OVERFLOW_CHECKING
88 | #define portHAS_STACK_OVERFLOW_CHECKING 0
89 | #endif
90 |
91 | #ifndef portARCH_NAME
92 | #define portARCH_NAME NULL
93 | #endif
94 |
95 | #ifdef __cplusplus
96 | extern "C" {
97 | #endif
98 |
99 | #include "mpu_wrappers.h"
100 |
101 | /*
102 | * Setup the stack of a new task so it is ready to be placed under the
103 | * scheduler control. The registers have to be placed on the stack in
104 | * the order that the port expects to find them.
105 | *
106 | */
107 | #if( portUSING_MPU_WRAPPERS == 1 )
108 | #if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
109 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
110 | #else
111 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
112 | #endif
113 | #else
114 | #if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
115 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
116 | #else
117 | StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
118 | #endif
119 | #endif
120 |
121 | /* Used by heap_5.c to define the start address and size of each memory region
122 | that together comprise the total FreeRTOS heap space. */
123 | typedef struct HeapRegion
124 | {
125 | uint8_t *pucStartAddress;
126 | size_t xSizeInBytes;
127 | } HeapRegion_t;
128 |
129 | /* Used to pass information about the heap out of vPortGetHeapStats(). */
130 | typedef struct xHeapStats
131 | {
132 | size_t xAvailableHeapSpaceInBytes; /* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
133 | size_t xSizeOfLargestFreeBlockInBytes; /* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
134 | size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
135 | size_t xNumberOfFreeBlocks; /* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
136 | size_t xMinimumEverFreeBytesRemaining; /* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
137 | size_t xNumberOfSuccessfulAllocations; /* The number of calls to pvPortMalloc() that have returned a valid memory block. */
138 | size_t xNumberOfSuccessfulFrees; /* The number of calls to vPortFree() that has successfully freed a block of memory. */
139 | } HeapStats_t;
140 |
141 | /*
142 | * Used to define multiple heap regions for use by heap_5.c. This function
143 | * must be called before any calls to pvPortMalloc() - not creating a task,
144 | * queue, semaphore, mutex, software timer, event group, etc. will result in
145 | * pvPortMalloc being called.
146 | *
147 | * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
148 | * defines a region of memory that can be used as the heap. The array is
149 | * terminated by a HeapRegions_t structure that has a size of 0. The region
150 | * with the lowest start address must appear first in the array.
151 | */
152 | void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
153 |
154 | /*
155 | * Returns a HeapStats_t structure filled with information about the current
156 | * heap state.
157 | */
158 | void vPortGetHeapStats( HeapStats_t *pxHeapStats );
159 |
160 | /*
161 | * Map to the memory management routines required for the port.
162 | */
163 | void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
164 | void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
165 | void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
166 | size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
167 | size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
168 |
169 | /*
170 | * Setup the hardware ready for the scheduler to take control. This generally
171 | * sets up a tick interrupt and sets timers for the correct tick frequency.
172 | */
173 | BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
174 |
175 | /*
176 | * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
177 | * the hardware is left in its original condition after the scheduler stops
178 | * executing.
179 | */
180 | void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
181 |
182 | /*
183 | * The structures and methods of manipulating the MPU are contained within the
184 | * port layer.
185 | *
186 | * Fills the xMPUSettings structure with the memory region information
187 | * contained in xRegions.
188 | */
189 | #if( portUSING_MPU_WRAPPERS == 1 )
190 | struct xMEMORY_REGION;
191 | void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
192 | #endif
193 |
194 | #ifdef __cplusplus
195 | }
196 | #endif
197 |
198 | #endif /* PORTABLE_H */
199 |
200 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/list.c:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 |
29 | #include
30 | #include "FreeRTOS.h"
31 | #include "list.h"
32 |
33 | /*-----------------------------------------------------------
34 | * PUBLIC LIST API documented in list.h
35 | *----------------------------------------------------------*/
36 |
37 | void vListInitialise( List_t * const pxList )
38 | {
39 | /* The list structure contains a list item which is used to mark the
40 | end of the list. To initialise the list the list end is inserted
41 | as the only list entry. */
42 | pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
43 |
44 | /* The list end value is the highest possible value in the list to
45 | ensure it remains at the end of the list. */
46 | pxList->xListEnd.xItemValue = portMAX_DELAY;
47 |
48 | /* The list end next and previous pointers point to itself so we know
49 | when the list is empty. */
50 | pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
51 | pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
52 |
53 | pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
54 |
55 | /* Write known values into the list if
56 | configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
57 | listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
58 | listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
59 | }
60 | /*-----------------------------------------------------------*/
61 |
62 | void vListInitialiseItem( ListItem_t * const pxItem )
63 | {
64 | /* Make sure the list item is not recorded as being on a list. */
65 | pxItem->pxContainer = NULL;
66 |
67 | /* Write known values into the list item if
68 | configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
69 | listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
70 | listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
71 | }
72 | /*-----------------------------------------------------------*/
73 |
74 | void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
75 | {
76 | ListItem_t * const pxIndex = pxList->pxIndex;
77 |
78 | /* Only effective when configASSERT() is also defined, these tests may catch
79 | the list data structures being overwritten in memory. They will not catch
80 | data errors caused by incorrect configuration or use of FreeRTOS. */
81 | listTEST_LIST_INTEGRITY( pxList );
82 | listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
83 |
84 | /* Insert a new list item into pxList, but rather than sort the list,
85 | makes the new list item the last item to be removed by a call to
86 | listGET_OWNER_OF_NEXT_ENTRY(). */
87 | pxNewListItem->pxNext = pxIndex;
88 | pxNewListItem->pxPrevious = pxIndex->pxPrevious;
89 |
90 | /* Only used during decision coverage testing. */
91 | mtCOVERAGE_TEST_DELAY();
92 |
93 | pxIndex->pxPrevious->pxNext = pxNewListItem;
94 | pxIndex->pxPrevious = pxNewListItem;
95 |
96 | /* Remember which list the item is in. */
97 | pxNewListItem->pxContainer = pxList;
98 |
99 | ( pxList->uxNumberOfItems )++;
100 | }
101 | /*-----------------------------------------------------------*/
102 |
103 | void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
104 | {
105 | ListItem_t *pxIterator;
106 | const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
107 |
108 | /* Only effective when configASSERT() is also defined, these tests may catch
109 | the list data structures being overwritten in memory. They will not catch
110 | data errors caused by incorrect configuration or use of FreeRTOS. */
111 | listTEST_LIST_INTEGRITY( pxList );
112 | listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
113 |
114 | /* Insert the new list item into the list, sorted in xItemValue order.
115 |
116 | If the list already contains a list item with the same item value then the
117 | new list item should be placed after it. This ensures that TCBs which are
118 | stored in ready lists (all of which have the same xItemValue value) get a
119 | share of the CPU. However, if the xItemValue is the same as the back marker
120 | the iteration loop below will not end. Therefore the value is checked
121 | first, and the algorithm slightly modified if necessary. */
122 | if( xValueOfInsertion == portMAX_DELAY )
123 | {
124 | pxIterator = pxList->xListEnd.pxPrevious;
125 | }
126 | else
127 | {
128 | /* *** NOTE ***********************************************************
129 | If you find your application is crashing here then likely causes are
130 | listed below. In addition see https://www.freertos.org/FAQHelp.html for
131 | more tips, and ensure configASSERT() is defined!
132 | https://www.freertos.org/a00110.html#configASSERT
133 |
134 | 1) Stack overflow -
135 | see https://www.freertos.org/Stacks-and-stack-overflow-checking.html
136 | 2) Incorrect interrupt priority assignment, especially on Cortex-M
137 | parts where numerically high priority values denote low actual
138 | interrupt priorities, which can seem counter intuitive. See
139 | https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
140 | of configMAX_SYSCALL_INTERRUPT_PRIORITY on
141 | https://www.freertos.org/a00110.html
142 | 3) Calling an API function from within a critical section or when
143 | the scheduler is suspended, or calling an API function that does
144 | not end in "FromISR" from an interrupt.
145 | 4) Using a queue or semaphore before it has been initialised or
146 | before the scheduler has been started (are interrupts firing
147 | before vTaskStartScheduler() has been called?).
148 | **********************************************************************/
149 |
150 | for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
151 | {
152 | /* There is nothing to do here, just iterating to the wanted
153 | insertion position. */
154 | }
155 | }
156 |
157 | pxNewListItem->pxNext = pxIterator->pxNext;
158 | pxNewListItem->pxNext->pxPrevious = pxNewListItem;
159 | pxNewListItem->pxPrevious = pxIterator;
160 | pxIterator->pxNext = pxNewListItem;
161 |
162 | /* Remember which list the item is in. This allows fast removal of the
163 | item later. */
164 | pxNewListItem->pxContainer = pxList;
165 |
166 | ( pxList->uxNumberOfItems )++;
167 | }
168 | /*-----------------------------------------------------------*/
169 |
170 | UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
171 | {
172 | /* The list item knows which list it is in. Obtain the list from the list
173 | item. */
174 | List_t * const pxList = pxItemToRemove->pxContainer;
175 |
176 | pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
177 | pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
178 |
179 | /* Only used during decision coverage testing. */
180 | mtCOVERAGE_TEST_DELAY();
181 |
182 | /* Make sure the index is left pointing to a valid item. */
183 | if( pxList->pxIndex == pxItemToRemove )
184 | {
185 | pxList->pxIndex = pxItemToRemove->pxPrevious;
186 | }
187 | else
188 | {
189 | mtCOVERAGE_TEST_MARKER();
190 | }
191 |
192 | pxItemToRemove->pxContainer = NULL;
193 | ( pxList->uxNumberOfItems )--;
194 |
195 | return pxList->uxNumberOfItems;
196 | }
197 | /*-----------------------------------------------------------*/
198 |
199 |
--------------------------------------------------------------------------------
/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32l4xx_hal_flash_ramfunc.c
4 | * @author MCD Application Team
5 | * @brief FLASH RAMFUNC driver.
6 | * This file provides a Flash firmware functions which should be
7 | * executed from internal SRAM
8 | * + FLASH HalfPage Programming
9 | * + FLASH Power Down in Run mode
10 | *
11 | * @verbatim
12 | ==============================================================================
13 | ##### Flash RAM functions #####
14 | ==============================================================================
15 |
16 | *** ARM Compiler ***
17 | --------------------
18 | [..] RAM functions are defined using the toolchain options.
19 | Functions that are executed in RAM should reside in a separate
20 | source module. Using the 'Options for File' dialog you can simply change
21 | the 'Code / Const' area of a module to a memory space in physical RAM.
22 | Available memory areas are declared in the 'Target' tab of the
23 | Options for Target' dialog.
24 |
25 | *** ICCARM Compiler ***
26 | -----------------------
27 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
28 |
29 | *** GNU Compiler ***
30 | --------------------
31 | [..] RAM functions are defined using a specific toolchain attribute
32 | "__attribute__((section(".RamFunc")))".
33 |
34 | @endverbatim
35 | ******************************************************************************
36 | * @attention
37 | *
38 | * Copyright (c) 2017 STMicroelectronics.
39 | * All rights reserved.
40 | *
41 | * This software is licensed under terms that can be found in the LICENSE file in
42 | * the root directory of this software component.
43 | * If no LICENSE file comes with this software, it is provided AS-IS.
44 | ******************************************************************************
45 | */
46 |
47 | /* Includes ------------------------------------------------------------------*/
48 | #include "stm32l4xx_hal.h"
49 |
50 | /** @addtogroup STM32L4xx_HAL_Driver
51 | * @{
52 | */
53 |
54 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC
55 | * @brief FLASH functions executed from RAM
56 | * @{
57 | */
58 |
59 | #ifdef HAL_FLASH_MODULE_ENABLED
60 |
61 | /* Private typedef -----------------------------------------------------------*/
62 | /* Private define ------------------------------------------------------------*/
63 | /* Private macro -------------------------------------------------------------*/
64 | /* Private variables ---------------------------------------------------------*/
65 | /* Private function prototypes -----------------------------------------------*/
66 | /* Exported functions -------------------------------------------------------*/
67 |
68 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH in RAM function Exported Functions
69 | * @{
70 | */
71 |
72 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions
73 | * @brief Data transfers functions
74 | *
75 | @verbatim
76 | ===============================================================================
77 | ##### ramfunc functions #####
78 | ===============================================================================
79 | [..]
80 | This subsection provides a set of functions that should be executed from RAM.
81 |
82 | @endverbatim
83 | * @{
84 | */
85 |
86 | /**
87 | * @brief Enable the Power down in Run Mode
88 | * @note This function should be called and executed from SRAM memory
89 | * @retval HAL status
90 | */
91 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void)
92 | {
93 | /* Enable the Power Down in Run mode*/
94 | __HAL_FLASH_POWER_DOWN_ENABLE();
95 |
96 | return HAL_OK;
97 |
98 | }
99 |
100 | /**
101 | * @brief Disable the Power down in Run Mode
102 | * @note This function should be called and executed from SRAM memory
103 | * @retval HAL status
104 | */
105 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void)
106 | {
107 | /* Disable the Power Down in Run mode*/
108 | __HAL_FLASH_POWER_DOWN_DISABLE();
109 |
110 | return HAL_OK;
111 | }
112 |
113 | #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
114 | /**
115 | * @brief Program the FLASH DBANK User Option Byte.
116 | *
117 | * @note To configure the user option bytes, the option lock bit OPTLOCK must
118 | * be cleared with the call of the HAL_FLASH_OB_Unlock() function.
119 | * @note To modify the DBANK option byte, no PCROP region should be defined.
120 | * To deactivate PCROP, user should perform RDP changing
121 | *
122 | * @param DBankConfig The FLASH DBANK User Option Byte value.
123 | * This parameter can be one of the following values:
124 | * @arg OB_DBANK_128_BITS: Single-bank with 128-bits data
125 | * @arg OB_DBANK_64_BITS: Dual-bank with 64-bits data
126 | *
127 | * @retval HAL status
128 | */
129 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig)
130 | {
131 | uint32_t count, reg;
132 | HAL_StatusTypeDef status = HAL_ERROR;
133 |
134 | /* Process Locked */
135 | __HAL_LOCK(&pFlash);
136 |
137 | /* Check if the PCROP is disabled */
138 | reg = FLASH->PCROP1SR;
139 | if (reg > FLASH->PCROP1ER)
140 | {
141 | reg = FLASH->PCROP2SR;
142 | if (reg > FLASH->PCROP2ER)
143 | {
144 | /* Disable Flash prefetch */
145 | __HAL_FLASH_PREFETCH_BUFFER_DISABLE();
146 |
147 | if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U)
148 | {
149 | /* Disable Flash instruction cache */
150 | __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
151 |
152 | /* Flush Flash instruction cache */
153 | __HAL_FLASH_INSTRUCTION_CACHE_RESET();
154 | }
155 |
156 | if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U)
157 | {
158 | /* Disable Flash data cache */
159 | __HAL_FLASH_DATA_CACHE_DISABLE();
160 |
161 | /* Flush Flash data cache */
162 | __HAL_FLASH_DATA_CACHE_RESET();
163 | }
164 |
165 | /* Disable WRP zone 1 of 1st bank if needed */
166 | reg = FLASH->WRP1AR;
167 | if (((reg & FLASH_WRP1AR_WRP1A_STRT) >> FLASH_WRP1AR_WRP1A_STRT_Pos) <=
168 | ((reg & FLASH_WRP1AR_WRP1A_END) >> FLASH_WRP1AR_WRP1A_END_Pos))
169 | {
170 | MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), FLASH_WRP1AR_WRP1A_STRT);
171 | }
172 |
173 | /* Disable WRP zone 2 of 1st bank if needed */
174 | reg = FLASH->WRP1BR;
175 | if (((reg & FLASH_WRP1BR_WRP1B_STRT) >> FLASH_WRP1BR_WRP1B_STRT_Pos) <=
176 | ((reg & FLASH_WRP1BR_WRP1B_END) >> FLASH_WRP1BR_WRP1B_END_Pos))
177 | {
178 | MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), FLASH_WRP1BR_WRP1B_STRT);
179 | }
180 |
181 | /* Disable WRP zone 1 of 2nd bank if needed */
182 | reg = FLASH->WRP2AR;
183 | if (((reg & FLASH_WRP2AR_WRP2A_STRT) >> FLASH_WRP2AR_WRP2A_STRT_Pos) <=
184 | ((reg & FLASH_WRP2AR_WRP2A_END) >> FLASH_WRP2AR_WRP2A_END_Pos))
185 | {
186 | MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), FLASH_WRP2AR_WRP2A_STRT);
187 | }
188 |
189 | /* Disable WRP zone 2 of 2nd bank if needed */
190 | reg = FLASH->WRP2BR;
191 | if (((reg & FLASH_WRP2BR_WRP2B_STRT) >> FLASH_WRP2BR_WRP2B_STRT_Pos) <=
192 | ((reg & FLASH_WRP2BR_WRP2B_END) >> FLASH_WRP2BR_WRP2B_END_Pos))
193 | {
194 | MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), FLASH_WRP2BR_WRP2B_STRT);
195 | }
196 |
197 | /* Modify the DBANK user option byte */
198 | MODIFY_REG(FLASH->OPTR, FLASH_OPTR_DBANK, DBankConfig);
199 |
200 | /* Set OPTSTRT Bit */
201 | SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
202 |
203 | /* Wait for last operation to be completed */
204 | /* 8 is the number of required instruction cycles for the below loop statement (timeout expressed in ms) */
205 | count = FLASH_TIMEOUT_VALUE * (SystemCoreClock / 8U / 1000U);
206 | do
207 | {
208 | if (count == 0U)
209 | {
210 | break;
211 | }
212 | count--;
213 | } while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) != RESET);
214 |
215 | /* If the option byte program operation is completed, disable the OPTSTRT Bit */
216 | CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT);
217 |
218 | /* Set the bit to force the option byte reloading */
219 | SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH);
220 | }
221 | }
222 |
223 | /* Process Unlocked */
224 | __HAL_UNLOCK(&pFlash);
225 |
226 | return status;
227 | }
228 | #endif
229 |
230 | /**
231 | * @}
232 | */
233 |
234 | /**
235 | * @}
236 | */
237 | #endif /* HAL_FLASH_MODULE_ENABLED */
238 |
239 |
240 |
241 | /**
242 | * @}
243 | */
244 |
245 | /**
246 | * @}
247 | */
248 |
249 |
250 |
251 |
252 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 |
29 | #ifndef PORTMACRO_H
30 | #define PORTMACRO_H
31 |
32 | #ifdef __cplusplus
33 | extern "C" {
34 | #endif
35 |
36 | /*-----------------------------------------------------------
37 | * Port specific definitions.
38 | *
39 | * The settings in this file configure FreeRTOS correctly for the
40 | * given hardware and compiler.
41 | *
42 | * These settings should not be altered.
43 | *-----------------------------------------------------------
44 | */
45 |
46 | /* Type definitions. */
47 | #define portCHAR char
48 | #define portFLOAT float
49 | #define portDOUBLE double
50 | #define portLONG long
51 | #define portSHORT short
52 | #define portSTACK_TYPE uint32_t
53 | #define portBASE_TYPE long
54 |
55 | typedef portSTACK_TYPE StackType_t;
56 | typedef long BaseType_t;
57 | typedef unsigned long UBaseType_t;
58 |
59 | #if( configUSE_16_BIT_TICKS == 1 )
60 | typedef uint16_t TickType_t;
61 | #define portMAX_DELAY ( TickType_t ) 0xffff
62 | #else
63 | typedef uint32_t TickType_t;
64 | #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
65 |
66 | /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
67 | not need to be guarded with a critical section. */
68 | #define portTICK_TYPE_IS_ATOMIC 1
69 | #endif
70 | /*-----------------------------------------------------------*/
71 |
72 | /* Architecture specifics. */
73 | #define portSTACK_GROWTH ( -1 )
74 | #define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
75 | #define portBYTE_ALIGNMENT 8
76 | /*-----------------------------------------------------------*/
77 |
78 | /* Scheduler utilities. */
79 | #define portYIELD() \
80 | { \
81 | /* Set a PendSV to request a context switch. */ \
82 | portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
83 | \
84 | /* Barriers are normally not required but do ensure the code is completely \
85 | within the specified behaviour for the architecture. */ \
86 | __asm volatile( "dsb" ::: "memory" ); \
87 | __asm volatile( "isb" ); \
88 | }
89 |
90 | #define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
91 | #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
92 | #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
93 | #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
94 | /*-----------------------------------------------------------*/
95 |
96 | /* Critical section management. */
97 | extern void vPortEnterCritical( void );
98 | extern void vPortExitCritical( void );
99 | #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()
100 | #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x)
101 | #define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()
102 | #define portENABLE_INTERRUPTS() vPortSetBASEPRI(0)
103 | #define portENTER_CRITICAL() vPortEnterCritical()
104 | #define portEXIT_CRITICAL() vPortExitCritical()
105 |
106 | /*-----------------------------------------------------------*/
107 |
108 | /* Task function macros as described on the FreeRTOS.org WEB site. These are
109 | not necessary for to use this port. They are defined so the common demo files
110 | (which build with all the ports) will build. */
111 | #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
112 | #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
113 | /*-----------------------------------------------------------*/
114 |
115 | /* Tickless idle/low power functionality. */
116 | #ifndef portSUPPRESS_TICKS_AND_SLEEP
117 | extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
118 | #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
119 | #endif
120 | /*-----------------------------------------------------------*/
121 |
122 | /* Architecture specific optimisations. */
123 | #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
124 | #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
125 | #endif
126 |
127 | #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
128 |
129 | /* Generic helper function. */
130 | __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )
131 | {
132 | uint8_t ucReturn;
133 |
134 | __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
135 | return ucReturn;
136 | }
137 |
138 | /* Check the configuration. */
139 | #if( configMAX_PRIORITIES > 32 )
140 | #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
141 | #endif
142 |
143 | /* Store/clear the ready priorities in a bit map. */
144 | #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
145 | #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
146 |
147 | /*-----------------------------------------------------------*/
148 |
149 | #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )
150 |
151 | #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
152 |
153 | /*-----------------------------------------------------------*/
154 |
155 | #ifdef configASSERT
156 | void vPortValidateInterruptPriority( void );
157 | #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
158 | #endif
159 |
160 | /* portNOP() is not required by this port. */
161 | #define portNOP()
162 |
163 | #define portINLINE __inline
164 |
165 | #ifndef portFORCE_INLINE
166 | #define portFORCE_INLINE inline __attribute__(( always_inline))
167 | #endif
168 |
169 | portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )
170 | {
171 | uint32_t ulCurrentInterrupt;
172 | BaseType_t xReturn;
173 |
174 | /* Obtain the number of the currently executing interrupt. */
175 | __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
176 |
177 | if( ulCurrentInterrupt == 0 )
178 | {
179 | xReturn = pdFALSE;
180 | }
181 | else
182 | {
183 | xReturn = pdTRUE;
184 | }
185 |
186 | return xReturn;
187 | }
188 |
189 | /*-----------------------------------------------------------*/
190 |
191 | portFORCE_INLINE static void vPortRaiseBASEPRI( void )
192 | {
193 | uint32_t ulNewBASEPRI;
194 |
195 | __asm volatile
196 | (
197 | " mov %0, %1 \n" \
198 | " msr basepri, %0 \n" \
199 | " isb \n" \
200 | " dsb \n" \
201 | :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
202 | );
203 | }
204 |
205 | /*-----------------------------------------------------------*/
206 |
207 | portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
208 | {
209 | uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
210 |
211 | __asm volatile
212 | (
213 | " mrs %0, basepri \n" \
214 | " mov %1, %2 \n" \
215 | " msr basepri, %1 \n" \
216 | " isb \n" \
217 | " dsb \n" \
218 | :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
219 | );
220 |
221 | /* This return will not be reached but is necessary to prevent compiler
222 | warnings. */
223 | return ulOriginalBASEPRI;
224 | }
225 | /*-----------------------------------------------------------*/
226 |
227 | portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
228 | {
229 | __asm volatile
230 | (
231 | " msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"
232 | );
233 | }
234 | /*-----------------------------------------------------------*/
235 |
236 | #define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )
237 |
238 | #ifdef __cplusplus
239 | }
240 | #endif
241 |
242 | #endif /* PORTMACRO_H */
243 |
244 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Device/ST/STM32L4xx/License.md:
--------------------------------------------------------------------------------
1 | Apache License
2 | Version 2.0, January 2004
3 | http://www.apache.org/licenses/
4 |
5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
6 |
7 | 1. Definitions.
8 |
9 | "License" shall mean the terms and conditions for use, reproduction, and distribution as defined by Sections 1 through 9 of this document.
10 |
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12 |
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14 |
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20 |
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50 |
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58 |
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62 |
63 | 9. Accepting Warranty or Additional Liability.
64 |
65 | While redistributing the Work or Derivative Works thereof, You may choose to offer, and charge a fee for, acceptance of support, warranty, indemnity, or other liability obligations and/or rights consistent with this License. However, in accepting such obligations, You may act only on Your own behalf and on Your sole responsibility, not on behalf of any other Contributor, and only if You agree to indemnify, defend, and hold each Contributor harmless for any liability incurred by, or claims asserted against, such Contributor by reason of your accepting any such warranty or additional liability.
66 |
67 | END OF TERMS AND CONDITIONS
68 |
69 | APPENDIX:
70 |
71 | Copyright [2019] [STMicroelectronics]
72 |
73 | Licensed under the Apache License, Version 2.0 (the "License");
74 | you may not use this file except in compliance with the License.
75 | You may obtain a copy of the License at
76 |
77 | http://www.apache.org/licenses/LICENSE-2.0
78 |
79 | Unless required by applicable law or agreed to in writing, software
80 | distributed under the License is distributed on an "AS IS" BASIS,
81 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
82 | See the License for the specific language governing permissions and
83 | limitations under the License.
84 |
--------------------------------------------------------------------------------
/Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
--------------------------------------------------------------------------------
1 | /*
2 | * FreeRTOS Kernel V10.3.1
3 | * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4 | *
5 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
6 | * this software and associated documentation files (the "Software"), to deal in
7 | * the Software without restriction, including without limitation the rights to
8 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9 | * the Software, and to permit persons to whom the Software is furnished to do so,
10 | * subject to the following conditions:
11 | *
12 | * The above copyright notice and this permission notice shall be included in all
13 | * copies or substantial portions of the Software.
14 | *
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 | *
22 | * http://www.FreeRTOS.org
23 | * http://aws.amazon.com/freertos
24 | *
25 | * 1 tab == 4 spaces!
26 | */
27 |
28 | #ifndef MPU_WRAPPERS_H
29 | #define MPU_WRAPPERS_H
30 |
31 | /* This file redefines API functions to be called through a wrapper macro, but
32 | only for ports that are using the MPU. */
33 | #ifdef portUSING_MPU_WRAPPERS
34 |
35 | /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
36 | included from queue.c or task.c to prevent it from having an effect within
37 | those files. */
38 | #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
39 |
40 | /*
41 | * Map standard (non MPU) API functions to equivalents that start
42 | * "MPU_". This will cause the application code to call the MPU_
43 | * version, which wraps the non-MPU version with privilege promoting
44 | * then demoting code, so the kernel code always runs will full
45 | * privileges.
46 | */
47 |
48 | /* Map standard tasks.h API functions to the MPU equivalents. */
49 | #define xTaskCreate MPU_xTaskCreate
50 | #define xTaskCreateStatic MPU_xTaskCreateStatic
51 | #define xTaskCreateRestricted MPU_xTaskCreateRestricted
52 | #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions
53 | #define vTaskDelete MPU_vTaskDelete
54 | #define vTaskDelay MPU_vTaskDelay
55 | #define vTaskDelayUntil MPU_vTaskDelayUntil
56 | #define xTaskAbortDelay MPU_xTaskAbortDelay
57 | #define uxTaskPriorityGet MPU_uxTaskPriorityGet
58 | #define eTaskGetState MPU_eTaskGetState
59 | #define vTaskGetInfo MPU_vTaskGetInfo
60 | #define vTaskPrioritySet MPU_vTaskPrioritySet
61 | #define vTaskSuspend MPU_vTaskSuspend
62 | #define vTaskResume MPU_vTaskResume
63 | #define vTaskSuspendAll MPU_vTaskSuspendAll
64 | #define xTaskResumeAll MPU_xTaskResumeAll
65 | #define xTaskGetTickCount MPU_xTaskGetTickCount
66 | #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks
67 | #define pcTaskGetName MPU_pcTaskGetName
68 | #define xTaskGetHandle MPU_xTaskGetHandle
69 | #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark
70 | #define uxTaskGetStackHighWaterMark2 MPU_uxTaskGetStackHighWaterMark2
71 | #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag
72 | #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag
73 | #define vTaskSetThreadLocalStoragePointer MPU_vTaskSetThreadLocalStoragePointer
74 | #define pvTaskGetThreadLocalStoragePointer MPU_pvTaskGetThreadLocalStoragePointer
75 | #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook
76 | #define xTaskGetIdleTaskHandle MPU_xTaskGetIdleTaskHandle
77 | #define uxTaskGetSystemState MPU_uxTaskGetSystemState
78 | #define vTaskList MPU_vTaskList
79 | #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats
80 | #define ulTaskGetIdleRunTimeCounter MPU_ulTaskGetIdleRunTimeCounter
81 | #define xTaskGenericNotify MPU_xTaskGenericNotify
82 | #define xTaskNotifyWait MPU_xTaskNotifyWait
83 | #define ulTaskNotifyTake MPU_ulTaskNotifyTake
84 | #define xTaskNotifyStateClear MPU_xTaskNotifyStateClear
85 | #define ulTaskNotifyValueClear MPU_ulTaskNotifyValueClear
86 | #define xTaskCatchUpTicks MPU_xTaskCatchUpTicks
87 |
88 | #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle
89 | #define vTaskSetTimeOutState MPU_vTaskSetTimeOutState
90 | #define xTaskCheckForTimeOut MPU_xTaskCheckForTimeOut
91 | #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState
92 |
93 | /* Map standard queue.h API functions to the MPU equivalents. */
94 | #define xQueueGenericSend MPU_xQueueGenericSend
95 | #define xQueueReceive MPU_xQueueReceive
96 | #define xQueuePeek MPU_xQueuePeek
97 | #define xQueueSemaphoreTake MPU_xQueueSemaphoreTake
98 | #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting
99 | #define uxQueueSpacesAvailable MPU_uxQueueSpacesAvailable
100 | #define vQueueDelete MPU_vQueueDelete
101 | #define xQueueCreateMutex MPU_xQueueCreateMutex
102 | #define xQueueCreateMutexStatic MPU_xQueueCreateMutexStatic
103 | #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore
104 | #define xQueueCreateCountingSemaphoreStatic MPU_xQueueCreateCountingSemaphoreStatic
105 | #define xQueueGetMutexHolder MPU_xQueueGetMutexHolder
106 | #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive
107 | #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive
108 | #define xQueueGenericCreate MPU_xQueueGenericCreate
109 | #define xQueueGenericCreateStatic MPU_xQueueGenericCreateStatic
110 | #define xQueueCreateSet MPU_xQueueCreateSet
111 | #define xQueueAddToSet MPU_xQueueAddToSet
112 | #define xQueueRemoveFromSet MPU_xQueueRemoveFromSet
113 | #define xQueueSelectFromSet MPU_xQueueSelectFromSet
114 | #define xQueueGenericReset MPU_xQueueGenericReset
115 |
116 | #if( configQUEUE_REGISTRY_SIZE > 0 )
117 | #define vQueueAddToRegistry MPU_vQueueAddToRegistry
118 | #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue
119 | #define pcQueueGetName MPU_pcQueueGetName
120 | #endif
121 |
122 | /* Map standard timer.h API functions to the MPU equivalents. */
123 | #define xTimerCreate MPU_xTimerCreate
124 | #define xTimerCreateStatic MPU_xTimerCreateStatic
125 | #define pvTimerGetTimerID MPU_pvTimerGetTimerID
126 | #define vTimerSetTimerID MPU_vTimerSetTimerID
127 | #define xTimerIsTimerActive MPU_xTimerIsTimerActive
128 | #define xTimerGetTimerDaemonTaskHandle MPU_xTimerGetTimerDaemonTaskHandle
129 | #define xTimerPendFunctionCall MPU_xTimerPendFunctionCall
130 | #define pcTimerGetName MPU_pcTimerGetName
131 | #define vTimerSetReloadMode MPU_vTimerSetReloadMode
132 | #define uxTimerGetReloadMode MPU_uxTimerGetReloadMode
133 | #define xTimerGetPeriod MPU_xTimerGetPeriod
134 | #define xTimerGetExpiryTime MPU_xTimerGetExpiryTime
135 | #define xTimerGenericCommand MPU_xTimerGenericCommand
136 |
137 | /* Map standard event_group.h API functions to the MPU equivalents. */
138 | #define xEventGroupCreate MPU_xEventGroupCreate
139 | #define xEventGroupCreateStatic MPU_xEventGroupCreateStatic
140 | #define xEventGroupWaitBits MPU_xEventGroupWaitBits
141 | #define xEventGroupClearBits MPU_xEventGroupClearBits
142 | #define xEventGroupSetBits MPU_xEventGroupSetBits
143 | #define xEventGroupSync MPU_xEventGroupSync
144 | #define vEventGroupDelete MPU_vEventGroupDelete
145 |
146 | /* Map standard message/stream_buffer.h API functions to the MPU
147 | equivalents. */
148 | #define xStreamBufferSend MPU_xStreamBufferSend
149 | #define xStreamBufferReceive MPU_xStreamBufferReceive
150 | #define xStreamBufferNextMessageLengthBytes MPU_xStreamBufferNextMessageLengthBytes
151 | #define vStreamBufferDelete MPU_vStreamBufferDelete
152 | #define xStreamBufferIsFull MPU_xStreamBufferIsFull
153 | #define xStreamBufferIsEmpty MPU_xStreamBufferIsEmpty
154 | #define xStreamBufferReset MPU_xStreamBufferReset
155 | #define xStreamBufferSpacesAvailable MPU_xStreamBufferSpacesAvailable
156 | #define xStreamBufferBytesAvailable MPU_xStreamBufferBytesAvailable
157 | #define xStreamBufferSetTriggerLevel MPU_xStreamBufferSetTriggerLevel
158 | #define xStreamBufferGenericCreate MPU_xStreamBufferGenericCreate
159 | #define xStreamBufferGenericCreateStatic MPU_xStreamBufferGenericCreateStatic
160 |
161 |
162 | /* Remove the privileged function macro, but keep the PRIVILEGED_DATA
163 | macro so applications can place data in privileged access sections
164 | (useful when using statically allocated objects). */
165 | #define PRIVILEGED_FUNCTION
166 | #define PRIVILEGED_DATA __attribute__((section("privileged_data")))
167 | #define FREERTOS_SYSTEM_CALL
168 |
169 | #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
170 |
171 | /* Ensure API functions go in the privileged execution section. */
172 | #define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions")))
173 | #define PRIVILEGED_DATA __attribute__((section("privileged_data")))
174 | #define FREERTOS_SYSTEM_CALL __attribute__((section( "freertos_system_calls")))
175 |
176 | #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
177 |
178 | #else /* portUSING_MPU_WRAPPERS */
179 |
180 | #define PRIVILEGED_FUNCTION
181 | #define PRIVILEGED_DATA
182 | #define FREERTOS_SYSTEM_CALL
183 | #define portUSING_MPU_WRAPPERS 0
184 |
185 | #endif /* portUSING_MPU_WRAPPERS */
186 |
187 |
188 | #endif /* MPU_WRAPPERS_H */
189 |
190 |
--------------------------------------------------------------------------------
/Core/Inc/FreeRTOSConfig.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /*
3 | * FreeRTOS Kernel V10.2.1
4 | * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
5 | * Portion Copyright (C) 2019 StMicroelectronics, Inc. All Rights Reserved.
6 | *
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy of
8 | * this software and associated documentation files (the "Software"), to deal in
9 | * the Software without restriction, including without limitation the rights to
10 | * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
11 | * the Software, and to permit persons to whom the Software is furnished to do so,
12 | * subject to the following conditions:
13 | *
14 | * The above copyright notice and this permission notice shall be included in all
15 | * copies or substantial portions of the Software.
16 | *
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
19 | * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
20 | * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
21 | * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 | *
24 | * http://www.FreeRTOS.org
25 | * http://aws.amazon.com/freertos
26 | *
27 | * 1 tab == 4 spaces!
28 | */
29 | /* USER CODE END Header */
30 |
31 | #ifndef FREERTOS_CONFIG_H
32 | #define FREERTOS_CONFIG_H
33 |
34 | /*-----------------------------------------------------------
35 | * Application specific definitions.
36 | *
37 | * These definitions should be adjusted for your particular hardware and
38 | * application requirements.
39 | *
40 | * These parameters and more are described within the 'configuration' section of the
41 | * FreeRTOS API documentation available on the FreeRTOS.org web site.
42 | *
43 | * See http://www.freertos.org/a00110.html
44 | *----------------------------------------------------------*/
45 |
46 | /* USER CODE BEGIN Includes */
47 | /* Section where include file can be added */
48 |
49 | /* Ensure definitions are only used by the compiler, and not by the assembler. */
50 |
51 | #if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
52 | #include "ulp.h"
53 | #endif
54 |
55 | /* USER CODE END Includes */
56 |
57 | /* Ensure definitions are only used by the compiler, and not by the assembler. */
58 | #if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
59 | #include
60 | extern uint32_t SystemCoreClock;
61 | #endif
62 | #define configENABLE_FPU 0
63 | #define configENABLE_MPU 0
64 |
65 | #define configUSE_PREEMPTION 1
66 | #define configSUPPORT_STATIC_ALLOCATION 1
67 | #define configSUPPORT_DYNAMIC_ALLOCATION 1
68 | #define configUSE_IDLE_HOOK 0
69 | #define configUSE_TICK_HOOK 1
70 | #define configCPU_CLOCK_HZ ( SystemCoreClock )
71 | #define configTICK_RATE_HZ ((TickType_t)1000)
72 | #define configMAX_PRIORITIES ( 7 )
73 | #define configMINIMAL_STACK_SIZE ((uint16_t)128)
74 | #define configTOTAL_HEAP_SIZE ((size_t)3000)
75 | #define configMAX_TASK_NAME_LEN ( 16 )
76 | #define configUSE_16_BIT_TICKS 0
77 | #define configUSE_MUTEXES 1
78 | #define configQUEUE_REGISTRY_SIZE 8
79 | #define configCHECK_FOR_STACK_OVERFLOW 2
80 | #define configUSE_MALLOC_FAILED_HOOK 1
81 | #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
82 | #define configUSE_TICKLESS_IDLE 2
83 | /* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
84 | /* Defaults to size_t for backward compatibility, but can be changed
85 | if lengths will always be less than the number of bytes in a size_t. */
86 | #define configMESSAGE_BUFFER_LENGTH_TYPE size_t
87 | /* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
88 |
89 | /* Co-routine definitions. */
90 | #define configUSE_CO_ROUTINES 0
91 | #define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
92 |
93 | /* Software timer definitions. */
94 | #define configUSE_TIMERS 1
95 | #define configTIMER_TASK_PRIORITY ( 6 )
96 | #define configTIMER_QUEUE_LENGTH 10
97 | #define configTIMER_TASK_STACK_DEPTH 256
98 |
99 | /* Set the following definitions to 1 to include the API function, or zero
100 | to exclude the API function. */
101 | #define INCLUDE_vTaskPrioritySet 1
102 | #define INCLUDE_uxTaskPriorityGet 1
103 | #define INCLUDE_vTaskDelete 1
104 | #define INCLUDE_vTaskCleanUpResources 0
105 | #define INCLUDE_vTaskSuspend 1
106 | #define INCLUDE_vTaskDelayUntil 1
107 | #define INCLUDE_vTaskDelay 1
108 | #define INCLUDE_xTaskGetSchedulerState 1
109 |
110 | /* Cortex-M specific definitions. */
111 | #ifdef __NVIC_PRIO_BITS
112 | /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
113 | #define configPRIO_BITS __NVIC_PRIO_BITS
114 | #else
115 | #define configPRIO_BITS 4
116 | #endif
117 |
118 | /* The lowest interrupt priority that can be used in a call to a "set priority"
119 | function. */
120 | #define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
121 |
122 | /* The highest interrupt priority that can be used by any interrupt service
123 | routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
124 | INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
125 | PRIORITY THAN THIS! (higher priorities are lower numeric values. */
126 | #define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
127 |
128 | /* Interrupt priorities used by the kernel port layer itself. These are generic
129 | to all Cortex-M ports, and do not rely on any particular library functions. */
130 | #define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
131 | /* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
132 | See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
133 | #define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
134 |
135 | /* Normal assert() semantics without relying on the provision of an assert.h
136 | header file. */
137 | /* USER CODE BEGIN 1 */
138 | #define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
139 | /* USER CODE END 1 */
140 |
141 | /* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
142 | standard names. */
143 | #define vPortSVCHandler SVC_Handler
144 | #define xPortPendSVHandler PendSV_Handler
145 |
146 | /* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
147 | to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
148 |
149 | #define xPortSysTickHandler SysTick_Handler
150 |
151 | /* USER CODE BEGIN Defines */
152 | /* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
153 |
154 | // Integrate lptimTick.c -- Start of Block
155 | //
156 | #if ( configUSE_TICKLESS_IDLE == 2 )
157 |
158 | // Preprocessor code in lptimTick.c requires that configTICK_RATE_HZ be a preprocessor-friendly numeric
159 | // literal. As a result, the application *ignores* the CubeMX configuration of the FreeRTOS tick rate.
160 | //
161 | #undef configTICK_RATE_HZ
162 | #define configTICK_RATE_HZ 1000UL // <-- Set FreeRTOS tick rate here, not in CubeMX.
163 |
164 | // Don't bother installing xPortSysTickHandler() into the vector table or including it in the firmware
165 | // image at all. FreeRTOS doesn't use the SysTick timer nor xPortSysTickHandler() when lptimTick.c is
166 | // providing the OS tick.
167 | //
168 | #undef xPortSysTickHandler
169 |
170 | #endif // configUSE_TICKLESS_IDLE == 2
171 | //
172 | // Integrate lptimTick.c -- End of Block
173 |
174 | #if ( configUSE_TICKLESS_IDLE == 2 )
175 |
176 | // Without pre- and post-sleep processing, lptimTick.c uses only basic sleep mode during tickless idle.
177 | // To utilize the stop modes and their dramatic reduction in power consumption, we employ an ultra-low-power
178 | // driver to handle the pre- and post-sleep hooks.
179 | //
180 | #define configPRE_SLEEP_PROCESSING(x) vUlpPreSleepProcessing()
181 | #define configPOST_SLEEP_PROCESSING(x) vUlpPostSleepProcessing()
182 |
183 | // Make sure the self-tests in our demo application capture tick-timing information as quickly as
184 | // possible after each tick. This interrupt priority ensures the OS tick ISR preempts other ISRs. Without
185 | // this configuration, interrupt latency causes a little extra jitter during the stress test. See main.c.
186 | // To see the effect of interrupt latency in the terminal output, remove or comment out this line.
187 | //
188 | // #define configTICK_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY - 1)
189 |
190 | // The Nucleo board gives us Vdd=3.3V, so we need only 2us minimum run time to work around erratum
191 | // 2.3.21. Note that when we define this symbol, code in ulp.c owns the SysTick timer. At the moment, our
192 | // demo application doesn't have any relevant ISRs short enough to violate this minimum run time, so we
193 | // don't enable the work around. (The shortest possible run time between deep sleeps occurs with a very
194 | // short ISR that interrupts STOP mode but doesn't interact with FreeRTOS at all. See lptimTick.c.)
195 | //
196 | // #define configMIN_RUN_BETWEEN_DEEP_SLEEPS ( ( 2U * configCPU_CLOCK_HZ ) / 1000000 )
197 |
198 | #endif // configUSE_TICKLESS_IDLE == 2
199 |
200 | /* USER CODE END Defines */
201 |
202 | #endif /* FREERTOS_CONFIG_H */
203 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/cmsis_compiler.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file cmsis_compiler.h
3 | * @brief CMSIS compiler generic header file
4 | * @version V5.1.0
5 | * @date 09. October 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #ifndef __CMSIS_COMPILER_H
26 | #define __CMSIS_COMPILER_H
27 |
28 | #include
29 |
30 | /*
31 | * Arm Compiler 4/5
32 | */
33 | #if defined ( __CC_ARM )
34 | #include "cmsis_armcc.h"
35 |
36 |
37 | /*
38 | * Arm Compiler 6.6 LTM (armclang)
39 | */
40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
41 | #include "cmsis_armclang_ltm.h"
42 |
43 | /*
44 | * Arm Compiler above 6.10.1 (armclang)
45 | */
46 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
47 | #include "cmsis_armclang.h"
48 |
49 |
50 | /*
51 | * GNU Compiler
52 | */
53 | #elif defined ( __GNUC__ )
54 | #include "cmsis_gcc.h"
55 |
56 |
57 | /*
58 | * IAR Compiler
59 | */
60 | #elif defined ( __ICCARM__ )
61 | #include
62 |
63 |
64 | /*
65 | * TI Arm Compiler
66 | */
67 | #elif defined ( __TI_ARM__ )
68 | #include
69 |
70 | #ifndef __ASM
71 | #define __ASM __asm
72 | #endif
73 | #ifndef __INLINE
74 | #define __INLINE inline
75 | #endif
76 | #ifndef __STATIC_INLINE
77 | #define __STATIC_INLINE static inline
78 | #endif
79 | #ifndef __STATIC_FORCEINLINE
80 | #define __STATIC_FORCEINLINE __STATIC_INLINE
81 | #endif
82 | #ifndef __NO_RETURN
83 | #define __NO_RETURN __attribute__((noreturn))
84 | #endif
85 | #ifndef __USED
86 | #define __USED __attribute__((used))
87 | #endif
88 | #ifndef __WEAK
89 | #define __WEAK __attribute__((weak))
90 | #endif
91 | #ifndef __PACKED
92 | #define __PACKED __attribute__((packed))
93 | #endif
94 | #ifndef __PACKED_STRUCT
95 | #define __PACKED_STRUCT struct __attribute__((packed))
96 | #endif
97 | #ifndef __PACKED_UNION
98 | #define __PACKED_UNION union __attribute__((packed))
99 | #endif
100 | #ifndef __UNALIGNED_UINT32 /* deprecated */
101 | struct __attribute__((packed)) T_UINT32 { uint32_t v; };
102 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
103 | #endif
104 | #ifndef __UNALIGNED_UINT16_WRITE
105 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
106 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
107 | #endif
108 | #ifndef __UNALIGNED_UINT16_READ
109 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
110 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
111 | #endif
112 | #ifndef __UNALIGNED_UINT32_WRITE
113 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
114 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
115 | #endif
116 | #ifndef __UNALIGNED_UINT32_READ
117 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
118 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
119 | #endif
120 | #ifndef __ALIGNED
121 | #define __ALIGNED(x) __attribute__((aligned(x)))
122 | #endif
123 | #ifndef __RESTRICT
124 | #define __RESTRICT __restrict
125 | #endif
126 | #ifndef __COMPILER_BARRIER
127 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
128 | #define __COMPILER_BARRIER() (void)0
129 | #endif
130 |
131 |
132 | /*
133 | * TASKING Compiler
134 | */
135 | #elif defined ( __TASKING__ )
136 | /*
137 | * The CMSIS functions have been implemented as intrinsics in the compiler.
138 | * Please use "carm -?i" to get an up to date list of all intrinsics,
139 | * Including the CMSIS ones.
140 | */
141 |
142 | #ifndef __ASM
143 | #define __ASM __asm
144 | #endif
145 | #ifndef __INLINE
146 | #define __INLINE inline
147 | #endif
148 | #ifndef __STATIC_INLINE
149 | #define __STATIC_INLINE static inline
150 | #endif
151 | #ifndef __STATIC_FORCEINLINE
152 | #define __STATIC_FORCEINLINE __STATIC_INLINE
153 | #endif
154 | #ifndef __NO_RETURN
155 | #define __NO_RETURN __attribute__((noreturn))
156 | #endif
157 | #ifndef __USED
158 | #define __USED __attribute__((used))
159 | #endif
160 | #ifndef __WEAK
161 | #define __WEAK __attribute__((weak))
162 | #endif
163 | #ifndef __PACKED
164 | #define __PACKED __packed__
165 | #endif
166 | #ifndef __PACKED_STRUCT
167 | #define __PACKED_STRUCT struct __packed__
168 | #endif
169 | #ifndef __PACKED_UNION
170 | #define __PACKED_UNION union __packed__
171 | #endif
172 | #ifndef __UNALIGNED_UINT32 /* deprecated */
173 | struct __packed__ T_UINT32 { uint32_t v; };
174 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
175 | #endif
176 | #ifndef __UNALIGNED_UINT16_WRITE
177 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
178 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
179 | #endif
180 | #ifndef __UNALIGNED_UINT16_READ
181 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
182 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
183 | #endif
184 | #ifndef __UNALIGNED_UINT32_WRITE
185 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
186 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
187 | #endif
188 | #ifndef __UNALIGNED_UINT32_READ
189 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
190 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
191 | #endif
192 | #ifndef __ALIGNED
193 | #define __ALIGNED(x) __align(x)
194 | #endif
195 | #ifndef __RESTRICT
196 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
197 | #define __RESTRICT
198 | #endif
199 | #ifndef __COMPILER_BARRIER
200 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
201 | #define __COMPILER_BARRIER() (void)0
202 | #endif
203 |
204 |
205 | /*
206 | * COSMIC Compiler
207 | */
208 | #elif defined ( __CSMC__ )
209 | #include
210 |
211 | #ifndef __ASM
212 | #define __ASM _asm
213 | #endif
214 | #ifndef __INLINE
215 | #define __INLINE inline
216 | #endif
217 | #ifndef __STATIC_INLINE
218 | #define __STATIC_INLINE static inline
219 | #endif
220 | #ifndef __STATIC_FORCEINLINE
221 | #define __STATIC_FORCEINLINE __STATIC_INLINE
222 | #endif
223 | #ifndef __NO_RETURN
224 | // NO RETURN is automatically detected hence no warning here
225 | #define __NO_RETURN
226 | #endif
227 | #ifndef __USED
228 | #warning No compiler specific solution for __USED. __USED is ignored.
229 | #define __USED
230 | #endif
231 | #ifndef __WEAK
232 | #define __WEAK __weak
233 | #endif
234 | #ifndef __PACKED
235 | #define __PACKED @packed
236 | #endif
237 | #ifndef __PACKED_STRUCT
238 | #define __PACKED_STRUCT @packed struct
239 | #endif
240 | #ifndef __PACKED_UNION
241 | #define __PACKED_UNION @packed union
242 | #endif
243 | #ifndef __UNALIGNED_UINT32 /* deprecated */
244 | @packed struct T_UINT32 { uint32_t v; };
245 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
246 | #endif
247 | #ifndef __UNALIGNED_UINT16_WRITE
248 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
249 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
250 | #endif
251 | #ifndef __UNALIGNED_UINT16_READ
252 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
253 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
254 | #endif
255 | #ifndef __UNALIGNED_UINT32_WRITE
256 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
257 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
258 | #endif
259 | #ifndef __UNALIGNED_UINT32_READ
260 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
261 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
262 | #endif
263 | #ifndef __ALIGNED
264 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
265 | #define __ALIGNED(x)
266 | #endif
267 | #ifndef __RESTRICT
268 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
269 | #define __RESTRICT
270 | #endif
271 | #ifndef __COMPILER_BARRIER
272 | #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
273 | #define __COMPILER_BARRIER() (void)0
274 | #endif
275 |
276 |
277 | #else
278 | #error Unknown compiler.
279 | #endif
280 |
281 |
282 | #endif /* __CMSIS_COMPILER_H */
283 |
284 |
--------------------------------------------------------------------------------
/Core/Src/testTickTiming.c:
--------------------------------------------------------------------------------
1 | // Test FreeRTOS Tick Timing on STM32L4 (testTickTiming.c)
2 | //
3 | // o Generates a new TttResults_t every tttTEST_DURATION_SECONDS unless disabled.
4 | // o Disable with vTttSetEvalInterval( portMAX_DELAY );
5 | // o Task starts in the disable state.
6 | // o Enable with vTttSetEvalInterval( xIntervalTicks ); where 2 <= xIntervalTicks <= configTICK_RATE_HZ
7 |
8 | #include "testTickTiming.h"
9 | #include "FreeRTOS.h"
10 | #include "task.h"
11 | #include "stm32l4xx_hal.h"
12 |
13 | TttResults_t prevResults;
14 |
15 | typedef struct
16 | {
17 | uint32_t rtcTotalSeconds;
18 | uint32_t rtcSubseconds;
19 | TickType_t tickCount;
20 |
21 | } timeStampT;
22 |
23 | static struct
24 | {
25 | timeStampT syncTime;
26 |
27 | uint32_t totalTestDuration;
28 | int32_t totalDrift;
29 | int16_t minDriftRatePct;
30 | int16_t maxDriftRatePct;
31 |
32 | } testState;
33 |
34 | static struct
35 | {
36 | RTC_HandleTypeDef* hrtc;
37 | TickType_t evalInterval;
38 | uint32_t subsecondsPerSecond;
39 |
40 | } config;
41 |
42 | typedef struct
43 | {
44 | uint32_t TR;
45 | uint32_t SSR;
46 |
47 | } rtcSnapshotT;
48 |
49 | static TaskHandle_t xTttOsTaskHandle;
50 | static volatile TickType_t xRequestedEvalInterval = portMAX_DELAY;
51 | static volatile rtcSnapshotT tickHookSnapshot;
52 |
53 | static void analyzeTickTiming( const timeStampT* ts, const timeStampT* refTs );
54 | static void ingestTimePair( const rtcSnapshotT* rtcTime, TickType_t tickCount );
55 | static void updateResults( TttResults_t* results );
56 | static void syncTo( const timeStampT* ts );
57 |
58 | #if ( configUSE_TICK_HOOK != 1 )
59 | #error Symbol configUSE_TICK_HOOK must be 1 to use the tick-timing test.
60 | #endif
61 |
62 | void vApplicationTickHook( void )
63 | {
64 | // FreeRTOS calls vApplicationTickHook() from the tick interrupt handler, so this a great time to
65 | // capture the current RTC time including subseconds. Code in the tick-timing task analyzes these captures
66 | // occasionally to evaluate tick-timing accuracy.
67 | //
68 | // Be careful to capture a coherent time from the RTC. The RTC provides shadow registers to alleviate
69 | // the need for this kind of careful coding, but we don't use the shadow registers. They are out of sync
70 | // after STOP mode, and we don't want to wait around for them to sync up.
71 | //
72 | do
73 | {
74 | tickHookSnapshot.SSR = RTC->SSR;
75 | tickHookSnapshot.TR = RTC->TR;
76 | } while (tickHookSnapshot.SSR != RTC->SSR);
77 | }
78 |
79 | void vTttOsTask( void const * argument )
80 | {
81 | // Save a copy of our task handle so our API functions can use task notifications easily.
82 | //
83 | xTttOsTaskHandle = xTaskGetCurrentTaskHandle();
84 |
85 | // Save the RTC handle and relevant RTC configuration info to our configuration structure.
86 | //
87 | config.hrtc = (RTC_HandleTypeDef*) argument;
88 | config.subsecondsPerSecond = ( RTC->PRER & RTC_PRER_PREDIV_S ) + 1;
89 |
90 | // Verify bare minimum configuration of the RTC to provide timing resolution at least 4x the tick
91 | // frequency. This software would work correctly with less resolution, but the testing wouldn't be as
92 | // useful. If this assertion fails, decrease PREDIV_A and increase PREDIV_S in your RTC configuration.
93 | //
94 | configASSERT(config.subsecondsPerSecond / configTICK_RATE_HZ >= 4UL)
95 |
96 | // Be sure the RTC ignores its input clock when the debugger stops program execution.
97 | //
98 | taskDISABLE_INTERRUPTS();
99 | DBGMCU->APB1FZR1 |= DBGMCU_APB1FZR1_DBG_RTC_STOP;
100 | taskENABLE_INTERRUPTS();
101 |
102 | // Coming out of stop mode, the RTC shadow registers aren't up-to-date. So when we read the RTC,
103 | // bypass the shadow registers. We manually ensure coherency between the various RTC fields.
104 | //
105 | HAL_RTCEx_EnableBypassShadow(config.hrtc);
106 |
107 | // Initialize the notification state for our task to notified so we'll set config.evalInterval.
108 | //
109 | xTaskNotifyGive(xTttOsTaskHandle);
110 |
111 | while (1)
112 | {
113 | if (ulTaskNotifyTake(pdTRUE, config.evalInterval) == pdFAIL)
114 | {
115 | // Capture an RTC snapshot and its matching tick count. Remember that tickHookSnapshot changes
116 | // asynchronously, in the tick ISR.
117 | //
118 | TickType_t xTickCount;
119 | rtcSnapshotT rtcTimeAtTick;
120 | do
121 | {
122 | xTickCount = xTaskGetTickCount();
123 | rtcTimeAtTick = tickHookSnapshot; // structure copy
124 |
125 | } while (xTickCount != xTaskGetTickCount());
126 |
127 | // Process the snapshot and tick count.
128 | //
129 | ingestTimePair( &rtcTimeAtTick, xTickCount );
130 | }
131 | else
132 | {
133 | // Set the new evaluation interval, and arrange for the next evaluation to be the start of a
134 | // new test run (tttTEST_DURATION_SECONDS).
135 | //
136 | config.evalInterval = xRequestedEvalInterval;
137 | testState.syncTime.tickCount = 0;
138 | }
139 | }
140 | }
141 |
142 | void vTttGetResults( TttResults_t* lastCompletedRun, TttResults_t* runNowUnderway )
143 | {
144 | // The "results" for the run now underway are incomplete, so set the results counter to zero for the
145 | // caller's benefit.
146 | //
147 | runNowUnderway->resultsCounter = 0;
148 |
149 | // Use a critical section to retrieve test results. This function executes in a task context other
150 | // than the tick-timing task context, and we don't want the results to change in the middle of our
151 | // retrieving them.
152 | //
153 | taskENTER_CRITICAL();
154 | *lastCompletedRun = prevResults; // structure copy
155 | updateResults( runNowUnderway );
156 | taskEXIT_CRITICAL();
157 | }
158 |
159 |
160 | // 2 <= interval <= configTICK_RATE_HZ or portMAX_DELAY
161 | void vTttSetEvalInterval( TickType_t interval )
162 | {
163 | if (interval > (TickType_t) 1)
164 | {
165 | xRequestedEvalInterval = interval;
166 |
167 | if (xTttOsTaskHandle != NULL)
168 | {
169 | xTaskNotifyGive(xTttOsTaskHandle);
170 | }
171 | }
172 | }
173 |
174 | #define SECONDS_PER_MINUTE ( 60UL )
175 | #define SECONDS_PER_HOUR ( SECONDS_PER_MINUTE * 60UL )
176 | #define SECONDS_PER_DAY ( SECONDS_PER_HOUR * 24UL )
177 |
178 | static void ingestTimePair( const rtcSnapshotT* rtcTime, TickType_t tickCount )
179 | {
180 | uint32_t hours, minutes, seconds;
181 | hours = RTC_Bcd2ToByte( (rtcTime->TR & (RTC_TR_HT | RTC_TR_HU )) >> RTC_TR_HU_Pos );
182 | minutes = RTC_Bcd2ToByte( (rtcTime->TR & (RTC_TR_MNT | RTC_TR_MNU)) >> RTC_TR_MNU_Pos );
183 | seconds = RTC_Bcd2ToByte( (rtcTime->TR & (RTC_TR_ST | RTC_TR_SU )) >> RTC_TR_SU_Pos );
184 |
185 | timeStampT currentTs;
186 | currentTs.rtcTotalSeconds = (hours * SECONDS_PER_HOUR) + (minutes * SECONDS_PER_MINUTE) + seconds;
187 | currentTs.rtcSubseconds = config.subsecondsPerSecond - rtcTime->SSR - 1;
188 | currentTs.tickCount = tickCount;
189 |
190 | if (testState.syncTime.tickCount == 0)
191 | {
192 | syncTo(¤tTs);
193 | prevResults.resultsCounter = 0;
194 | }
195 | else
196 | {
197 | analyzeTickTiming(¤tTs, &testState.syncTime);
198 |
199 | if (testState.totalTestDuration >= tttTEST_DURATION_SECONDS * config.subsecondsPerSecond)
200 | {
201 | // Save the "final" results. Use a critical section to prevent another task from reading the
202 | // test results while we're in the middle of updating them. See vTttGetResults().
203 | //
204 | taskENTER_CRITICAL();
205 | updateResults( &prevResults );
206 | prevResults.resultsCounter += 1;
207 | taskEXIT_CRITICAL();
208 |
209 | // Execute the callback function (if any).
210 | //
211 | #if configUSE_TICK_TEST_COMPLETE_HOOK != 0
212 | {
213 | vApplicationTickTestComplete();
214 | }
215 | #endif
216 |
217 | // Start the next test run coherently with the end of the previous run.
218 | //
219 | syncTo(¤tTs);
220 | }
221 | }
222 | }
223 |
224 | static void syncTo( const timeStampT* ts )
225 | {
226 | // Set a new synchronization time, and reset the test state to the beginning of a new test run.
227 | //
228 | testState.syncTime = *ts; // structure copy
229 | testState.maxDriftRatePct = -100;
230 | testState.minDriftRatePct = +100;
231 | testState.totalDrift = 0;
232 | testState.totalTestDuration = 0;
233 | }
234 |
235 | static void analyzeTickTiming( const timeStampT* ts, const timeStampT* refTs )
236 | {
237 | uint32_t elapsedTicks = ts->tickCount - refTs->tickCount;
238 | uint32_t elapsedTicksAsSubseconds = ( (uint64_t)elapsedTicks * config.subsecondsPerSecond + configTICK_RATE_HZ/2 )
239 | / configTICK_RATE_HZ;
240 |
241 | int32_t elapsedRtcSeconds = ( ts->rtcTotalSeconds - refTs->rtcTotalSeconds );
242 | if (elapsedRtcSeconds < 0)
243 | {
244 | elapsedRtcSeconds += SECONDS_PER_DAY;
245 | }
246 |
247 | int32_t elapsedRtcSubseconds = ( ts->rtcSubseconds - refTs->rtcSubseconds );
248 | if (elapsedRtcSubseconds < 0)
249 | {
250 | elapsedRtcSubseconds += config.subsecondsPerSecond;
251 | elapsedRtcSeconds -= 1;
252 | }
253 |
254 | uint32_t elapsedRtcTimeAsSubseconds = ( elapsedRtcSeconds * config.subsecondsPerSecond ) + elapsedRtcSubseconds;
255 | int32_t totalDrift = elapsedTicksAsSubseconds - elapsedRtcTimeAsSubseconds;
256 |
257 | int32_t driftDelta = totalDrift - testState.totalDrift;
258 | int32_t driftPeriod = elapsedRtcTimeAsSubseconds - testState.totalTestDuration;
259 |
260 | int driftRatePct;
261 | if (driftDelta < 0 && -driftDelta > driftPeriod)
262 | {
263 | driftRatePct = -100;
264 | }
265 | else if (driftDelta > 0 && driftDelta > driftPeriod)
266 | {
267 | driftRatePct = 100;
268 | }
269 | else
270 | {
271 | driftRatePct = ( driftDelta * 100 ) / driftPeriod;
272 | }
273 |
274 | if (driftRatePct < testState.minDriftRatePct)
275 | {
276 | testState.minDriftRatePct = driftRatePct;
277 | }
278 | if (driftRatePct > testState.maxDriftRatePct)
279 | {
280 | testState.maxDriftRatePct = driftRatePct;
281 | }
282 | testState.totalDrift = totalDrift;
283 | testState.totalTestDuration = elapsedRtcTimeAsSubseconds;
284 | }
285 |
286 | static void updateResults( TttResults_t* results )
287 | {
288 | results->driftSs = testState.totalDrift;
289 | results->durationSs = testState.totalTestDuration;
290 | results->maxDriftRatePct = testState.maxDriftRatePct;
291 | results->minDriftRatePct = testState.minDriftRatePct;
292 | results->subsecondsPerSecond = config.subsecondsPerSecond;
293 | }
294 |
--------------------------------------------------------------------------------
/LPTIM-tick.ioc:
--------------------------------------------------------------------------------
1 | #MicroXplorer Configuration settings - do not modify
2 | CAD.formats=
3 | CAD.pinconfig=
4 | CAD.provider=
5 | FREERTOS.FootprintOK=true
6 | FREERTOS.INCLUDE_vTaskDelayUntil=1
7 | FREERTOS.IPParameters=Tasks01,configCHECK_FOR_STACK_OVERFLOW,configUSE_TICKLESS_IDLE,configUSE_MALLOC_FAILED_HOOK,configUSE_TICK_HOOK,INCLUDE_vTaskDelayUntil,configUSE_TIMERS,configTIMER_TASK_PRIORITY,Timers01,FootprintOK
8 | FREERTOS.Tasks01=mainTask,0,256,mainOsTask,Default,NULL,Dynamic,NULL,NULL
9 | FREERTOS.Timers01=ledTimer,ledTimerCallback,osTimerPeriodic,Default,NULL,Dynamic,NULL;resultsTimer,resultsTimerCallback,osTimerPeriodic,Default,NULL,Dynamic,NULL
10 | FREERTOS.configCHECK_FOR_STACK_OVERFLOW=2
11 | FREERTOS.configTIMER_TASK_PRIORITY=6
12 | FREERTOS.configUSE_MALLOC_FAILED_HOOK=1
13 | FREERTOS.configUSE_TICKLESS_IDLE=2
14 | FREERTOS.configUSE_TICK_HOOK=1
15 | FREERTOS.configUSE_TIMERS=1
16 | File.Version=6
17 | GPIO.groupedBy=Group By Peripherals
18 | KeepUserPlacement=false
19 | Mcu.CPN=STM32L476RGT3
20 | Mcu.Family=STM32L4
21 | Mcu.IP0=FREERTOS
22 | Mcu.IP1=LPTIM2
23 | Mcu.IP2=NVIC
24 | Mcu.IP3=RCC
25 | Mcu.IP4=RTC
26 | Mcu.IP5=SYS
27 | Mcu.IP6=USART2
28 | Mcu.IPNb=7
29 | Mcu.Name=STM32L476R(C-E-G)Tx
30 | Mcu.Package=LQFP64
31 | Mcu.Pin0=PC13
32 | Mcu.Pin1=PC14-OSC32_IN (PC14)
33 | Mcu.Pin10=PB3 (JTDO-TRACESWO)
34 | Mcu.Pin11=VP_FREERTOS_VS_CMSIS_V1
35 | Mcu.Pin12=VP_LPTIM2_VS_LPTIM_counterModeInternalClock
36 | Mcu.Pin13=VP_RTC_VS_RTC_Activate
37 | Mcu.Pin14=VP_SYS_VS_tim17
38 | Mcu.Pin2=PC15-OSC32_OUT (PC15)
39 | Mcu.Pin3=PH0-OSC_IN (PH0)
40 | Mcu.Pin4=PH1-OSC_OUT (PH1)
41 | Mcu.Pin5=PA2
42 | Mcu.Pin6=PA3
43 | Mcu.Pin7=PA5
44 | Mcu.Pin8=PA13 (JTMS-SWDIO)
45 | Mcu.Pin9=PA14 (JTCK-SWCLK)
46 | Mcu.PinsNb=15
47 | Mcu.ThirdPartyNb=0
48 | Mcu.UserConstants=
49 | Mcu.UserName=STM32L476RGTx
50 | MxCube.Version=6.11.1
51 | MxDb.Version=DB.6.0.111
52 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
53 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
54 | NVIC.EXTI15_10_IRQn=true\:15\:0\:true\:false\:true\:true\:true\:true\:true
55 | NVIC.ForceEnableDMAVector=true
56 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
57 | NVIC.LPTIM2_IRQn=true\:15\:0\:true\:false\:true\:true\:true\:true\:true
58 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
59 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
60 | NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false
61 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
62 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false
63 | NVIC.SavedPendsvIrqHandlerGenerated=true
64 | NVIC.SavedSvcallIrqHandlerGenerated=true
65 | NVIC.SavedSystickIrqHandlerGenerated=true
66 | NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:true\:true\:false
67 | NVIC.TIM1_TRG_COM_TIM17_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true\:true
68 | NVIC.TimeBase=TIM1_TRG_COM_TIM17_IRQn
69 | NVIC.TimeBaseIP=TIM17
70 | NVIC.USART2_IRQn=true\:15\:0\:true\:false\:true\:true\:true\:true\:true
71 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
72 | PA13\ (JTMS-SWDIO).GPIOParameters=GPIO_Label
73 | PA13\ (JTMS-SWDIO).GPIO_Label=TMS
74 | PA13\ (JTMS-SWDIO).Locked=true
75 | PA13\ (JTMS-SWDIO).Mode=Serial_Wire
76 | PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO
77 | PA14\ (JTCK-SWCLK).GPIOParameters=GPIO_Label
78 | PA14\ (JTCK-SWCLK).GPIO_Label=TCK
79 | PA14\ (JTCK-SWCLK).Locked=true
80 | PA14\ (JTCK-SWCLK).Mode=Serial_Wire
81 | PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK
82 | PA2.Locked=true
83 | PA2.Mode=Asynchronous
84 | PA2.Signal=USART2_TX
85 | PA3.Locked=true
86 | PA3.Mode=Asynchronous
87 | PA3.Signal=USART2_RX
88 | PA5.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
89 | PA5.GPIO_Label=LD2 [green Led]
90 | PA5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
91 | PA5.GPIO_PuPd=GPIO_NOPULL
92 | PA5.GPIO_Speed=GPIO_SPEED_FREQ_LOW
93 | PA5.Locked=true
94 | PA5.Signal=GPIO_Output
95 | PB3\ (JTDO-TRACESWO).GPIOParameters=GPIO_Label
96 | PB3\ (JTDO-TRACESWO).GPIO_Label=SWO
97 | PB3\ (JTDO-TRACESWO).Locked=true
98 | PB3\ (JTDO-TRACESWO).Signal=SYS_JTDO-SWO
99 | PC13.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
100 | PC13.GPIO_Label=B1 [Blue PushButton]
101 | PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
102 | PC13.GPIO_PuPd=GPIO_NOPULL
103 | PC13.Locked=true
104 | PC13.Signal=GPXTI13
105 | PC14-OSC32_IN\ (PC14).Locked=true
106 | PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator
107 | PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
108 | PC15-OSC32_OUT\ (PC15).Locked=true
109 | PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator
110 | PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT
111 | PCC.Checker=true
112 | PCC.Line=STM32L4x6
113 | PCC.MCU=STM32L476R(C-E-G)Tx
114 | PCC.PartNumber=STM32L476RGTx
115 | PCC.Seq0=2
116 | PCC.Seq0.Step0.Average_Current=6.28 mA
117 | PCC.Seq0.Step0.CPU_Frequency=48 MHz
118 | PCC.Seq0.Step0.Category=In DS Table
119 | PCC.Seq0.Step0.DMIPS=60.0
120 | PCC.Seq0.Step0.Duration=0.1 ms
121 | PCC.Seq0.Step0.Frequency=48 MHz
122 | PCC.Seq0.Step0.Memory=FLASH/ART/Cache
123 | PCC.Seq0.Step0.Mode=RUN
124 | PCC.Seq0.Step0.Oscillator=HSE
125 | PCC.Seq0.Step0.Peripherals=
126 | PCC.Seq0.Step0.TaMax=104.15
127 | PCC.Seq0.Step0.User's_Consumption=0 mA
128 | PCC.Seq0.Step0.Vcore=Range1-High
129 | PCC.Seq0.Step0.Vdd=3.0
130 | PCC.Seq0.Step0.Voltage_Source=Battery
131 | PCC.Seq0.Step1.Average_Current=1.18 \u00B5A
132 | PCC.Seq0.Step1.CPU_Frequency=0 Hz
133 | PCC.Seq0.Step1.Category=In DS Table
134 | PCC.Seq0.Step1.DMIPS=0.0
135 | PCC.Seq0.Step1.Duration=0.9 ms
136 | PCC.Seq0.Step1.Frequency=0 Hz
137 | PCC.Seq0.Step1.Memory=n/a
138 | PCC.Seq0.Step1.Mode=STOP2
139 | PCC.Seq0.Step1.Oscillator=ALL CLOCKS OFF
140 | PCC.Seq0.Step1.Peripherals=
141 | PCC.Seq0.Step1.TaMax=105
142 | PCC.Seq0.Step1.User's_Consumption=0 mA
143 | PCC.Seq0.Step1.Vcore=NoRange
144 | PCC.Seq0.Step1.Vdd=3.0
145 | PCC.Seq0.Step1.Voltage_Source=Battery
146 | PCC.Series=STM32L4
147 | PCC.Temperature=25
148 | PCC.Vdd=3.0
149 | PH0-OSC_IN\ (PH0).Locked=true
150 | PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
151 | PH1-OSC_OUT\ (PH1).Locked=true
152 | PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
153 | PinOutPanel.RotationAngle=0
154 | ProjectManager.AskForMigrate=true
155 | ProjectManager.BackupPrevious=false
156 | ProjectManager.CompilerOptimize=6
157 | ProjectManager.ComputerToolchain=false
158 | ProjectManager.CoupleFile=false
159 | ProjectManager.CustomerFirmwarePackage=
160 | ProjectManager.DefaultFWLocation=true
161 | ProjectManager.DeletePrevious=true
162 | ProjectManager.DeviceId=STM32L476RGTx
163 | ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.18.0
164 | ProjectManager.FreePins=false
165 | ProjectManager.HalAssertFull=false
166 | ProjectManager.HeapSize=0x200
167 | ProjectManager.KeepUserCode=true
168 | ProjectManager.LastFirmware=true
169 | ProjectManager.LibraryCopy=1
170 | ProjectManager.MainLocation=Core/Src
171 | ProjectManager.NoMain=false
172 | ProjectManager.PreviousToolchain=
173 | ProjectManager.ProjectBuild=false
174 | ProjectManager.ProjectFileName=LPTIM-tick.ioc
175 | ProjectManager.ProjectName=LPTIM-tick
176 | ProjectManager.ProjectStructure=
177 | ProjectManager.RegisterCallBack=
178 | ProjectManager.StackSize=0x400
179 | ProjectManager.TargetToolchain=STM32CubeIDE
180 | ProjectManager.ToolChainLocation=
181 | ProjectManager.UAScriptAfterPath=
182 | ProjectManager.UAScriptBeforePath=
183 | ProjectManager.UnderRoot=true
184 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_RTC_Init-RTC-false-HAL-true,5-MX_LPTIM2_Init-LPTIM2-false-HAL-true
185 | RCC.ADCFreq_Value=64000000
186 | RCC.AHBFreq_Value=48000000
187 | RCC.APB1Freq_Value=48000000
188 | RCC.APB1TimFreq_Value=48000000
189 | RCC.APB2Freq_Value=48000000
190 | RCC.APB2TimFreq_Value=48000000
191 | RCC.CortexFreq_Value=48000000
192 | RCC.DFSDMFreq_Value=48000000
193 | RCC.FCLKCortexFreq_Value=48000000
194 | RCC.FamilyName=M
195 | RCC.HCLKFreq_Value=48000000
196 | RCC.HSE_VALUE=8000000
197 | RCC.HSI_VALUE=16000000
198 | RCC.I2C1Freq_Value=48000000
199 | RCC.I2C2Freq_Value=48000000
200 | RCC.I2C3Freq_Value=48000000
201 | RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,DFSDMFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1CLockSelection,LPTIM1Freq_Value,LPTIM2CLockSelection,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIClockRange,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2CLockSelection,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
202 | RCC.LCDFreq_Value=32768
203 | RCC.LPTIM1CLockSelection=RCC_LPTIM1CLKSOURCE_LSE
204 | RCC.LPTIM1Freq_Value=32768
205 | RCC.LPTIM2CLockSelection=RCC_LPTIM2CLKSOURCE_LSE
206 | RCC.LPTIM2Freq_Value=32768
207 | RCC.LPUART1Freq_Value=48000000
208 | RCC.LSCOPinFreq_Value=32000
209 | RCC.LSI_VALUE=32000
210 | RCC.MCO1PinFreq_Value=48000000
211 | RCC.MSIClockRange=RCC_MSIRANGE_11
212 | RCC.MSI_VALUE=48000000
213 | RCC.PLLN=10
214 | RCC.PLLPoutputFreq_Value=22857142.85714286
215 | RCC.PLLQoutputFreq_Value=80000000
216 | RCC.PLLRCLKFreq_Value=80000000
217 | RCC.PLLSAI1PoutputFreq_Value=18285714.285714287
218 | RCC.PLLSAI1QoutputFreq_Value=64000000
219 | RCC.PLLSAI1RoutputFreq_Value=64000000
220 | RCC.PLLSAI2PoutputFreq_Value=18285714.285714287
221 | RCC.PLLSAI2RoutputFreq_Value=64000000
222 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSI
223 | RCC.PREFETCH_ENABLE=1
224 | RCC.PWRFreq_Value=48000000
225 | RCC.RNGFreq_Value=64000000
226 | RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
227 | RCC.RTCFreq_Value=32768
228 | RCC.SAI1Freq_Value=18285714.285714287
229 | RCC.SAI2Freq_Value=18285714.285714287
230 | RCC.SDMMCFreq_Value=64000000
231 | RCC.SWPMI1Freq_Value=48000000
232 | RCC.SYSCLKFreq_VALUE=48000000
233 | RCC.UART4Freq_Value=48000000
234 | RCC.UART5Freq_Value=48000000
235 | RCC.USART1Freq_Value=48000000
236 | RCC.USART2CLockSelection=RCC_USART2CLKSOURCE_HSI
237 | RCC.USART2Freq_Value=16000000
238 | RCC.USART3Freq_Value=48000000
239 | RCC.USBFreq_Value=64000000
240 | RCC.VCOInputFreq_Value=16000000
241 | RCC.VCOOutputFreq_Value=160000000
242 | RCC.VCOSAI1OutputFreq_Value=128000000
243 | RCC.VCOSAI2OutputFreq_Value=128000000
244 | RTC.AsynchPrediv=3
245 | RTC.IPParameters=AsynchPrediv,SynchPrediv
246 | RTC.SynchPrediv=8191
247 | SH.GPXTI13.0=GPIO_EXTI13
248 | SH.GPXTI13.ConfNb=1
249 | USART2.IPParameters=VirtualMode-Asynchronous
250 | USART2.VirtualMode-Asynchronous=VM_ASYNC
251 | VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1
252 | VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1
253 | VP_LPTIM2_VS_LPTIM_counterModeInternalClock.Mode=Counts__internal_clock_event_00
254 | VP_LPTIM2_VS_LPTIM_counterModeInternalClock.Signal=LPTIM2_VS_LPTIM_counterModeInternalClock
255 | VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
256 | VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
257 | VP_SYS_VS_tim17.Mode=TIM17
258 | VP_SYS_VS_tim17.Signal=SYS_VS_tim17
259 | board=NUCLEO-L476RG
260 | boardIOC=true
261 | rtos.0.ip=FREERTOS
262 | isbadioc=false
263 |
--------------------------------------------------------------------------------