├── README.md ├── udis.py ├── 6800.py ├── 6801.py ├── 65c02.py ├── LICENSE ├── 6502.py ├── 1802.py ├── 8080.py ├── 8085.py ├── 6809.py ├── 65816.py ├── 6811.py ├── 8051.py └── z80.py /README.md: -------------------------------------------------------------------------------- 1 | Universal Disassembler program for 8-bit microprocessors 2 | 3 | This is a simple disassembler for various 8-bit microprocessors. It 4 | reads a binary file specified on the command line and produces a 5 | disassembly. It requires Python 3. It has been tested on Linux but 6 | should work on any platform that supports Python. See the source code 7 | for more details. 8 | 9 | The following CPUs are either supported or planned to be supported: 10 | 11 | CPU Status 12 | --- ------ 13 | 14 | 6502 done 15 | 16 | 65816 done 17 | 18 | 65C02 done 19 | 20 | 6800 done 21 | 22 | 6801/6803 done 23 | 24 | 6809 done (incomplete) 25 | 26 | 6811 done 27 | 28 | 8080 done 29 | 30 | 8085 done 31 | 32 | 8051 done (incomplete) 33 | 34 | Z80 done 35 | 36 | F8 possible 37 | 38 | 1802 done 39 | 40 | TMS9900 possible 41 | 42 | 43 | usage: udis.py [-h] [-c CPU] [-n] [-a ADDRESS] [-i] filename 44 | 45 | positional arguments: 46 | 47 | filename Binary file to disassemble 48 | 49 | optional arguments: 50 | 51 | -h, --help show this help message and exit 52 | 53 | -c CPU, --cpu CPU Specify CPU type (defaults to 6502) 54 | 55 | -n, --nolist Don't list instruction bytes (make output suitable for assembler) 56 | 57 | -a ADDRESS, --address ADDRESS 58 | Specify starting address (defaults to 0) 59 | 60 | -i, --invalid Show invalid opcodes as ??? rather than constants 61 | 62 | Files written by me are released under the following license: 63 | 64 | Copyright (C) by Jeff Tranter 65 | 66 | Licensed under the Apache License, Version 2.0 (the "License"); 67 | you may not use this file except in compliance with the License. 68 | You may obtain a copy of the License at 69 | 70 | http://www.apache.org/licenses/LICENSE-2.0 71 | 72 | Unless required by applicable law or agreed to in writing, software 73 | distributed under the License is distributed on an "AS IS" BASIS, 74 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 75 | See the License for the specific language governing permissions and 76 | limitations under the License. 77 | 78 | Documentation written by me is licensed under a Creative Commons 79 | Attribution 4.0 International License. 80 | See https://creativecommons.org/licenses/by/4.0/ 81 | -------------------------------------------------------------------------------- /udis.py: -------------------------------------------------------------------------------- 1 | #! /usr/bin/env python3 2 | # 3 | # Universal Disassembler 4 | # Copyright (c) 2013-2020 by Jeff Tranter 5 | # 6 | # Licensed under the Apache License, Version 2.0 (the "License"); 7 | # you may not use this file except in compliance with the License. 8 | # You may obtain a copy of the License at 9 | # 10 | # http://www.apache.org/licenses/LICENSE-2.0 11 | # 12 | # Unless required by applicable law or agreed to in writing, software 13 | # distributed under the License is distributed on an "AS IS" BASIS, 14 | # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 | # See the License for the specific language governing permissions and 16 | # limitations under the License. 17 | 18 | import os 19 | import sys 20 | import argparse 21 | import signal 22 | 23 | # Flags 24 | 25 | 26 | pcr = 1 27 | und = 2 28 | z80bit = 4 29 | 30 | # Functions 31 | 32 | 33 | def isprint(char): 34 | "Return if character is printable ASCII" 35 | return '@' <= char <= '~' 36 | 37 | 38 | def auto_int(x): 39 | return int(x, 0) 40 | 41 | 42 | # Avoids an error when output piped, e.g. to "less" 43 | signal.signal(signal.SIGPIPE, signal.SIG_DFL) 44 | 45 | 46 | # Parse command line options 47 | parser = argparse.ArgumentParser() 48 | parser.add_argument("filename", help="Binary file to disassemble") 49 | parser.add_argument("-c", "--cpu", help="Specify CPU type (defaults to 6502)", default="6502") 50 | parser.add_argument("-n", "--nolist", help="Don't list instruction bytes (make output suitable for assembler)", action="store_true") 51 | parser.add_argument("-a", "--address", help="Specify starting address (defaults to 0)", default=0, type=auto_int) 52 | parser.add_argument("-u", "--undocumented", help="Allow undocumented opcodes", action="store_true") 53 | parser.add_argument("-i", "--invalid", help="Show invalid opcodes as ??? rather than constants", action="store_true") 54 | args = parser.parse_args() 55 | 56 | # Load CPU plugin based on command line option. 57 | # Looks for plugin in same directory as this program. 58 | dir = os.path.dirname(os.path.realpath(__file__)) 59 | plugin = dir + os.sep + args.cpu + ".py" 60 | try: 61 | exec(open(plugin).read()) 62 | except FileNotFoundError: 63 | print(("error: CPU plugin file '{}' not found.".format(plugin)), file=sys.stderr) 64 | print("The following CPUs are supported: 1802 6502 65816 65c02 6800 6801/6803 6809 6811 8051 8080 8085 z80") 65 | sys.exit(1) 66 | 67 | # Get filename from command line arguments. 68 | filename = args.filename 69 | 70 | # Current instruction address. Silently force it to be in valid range. 71 | address = args.address & 0xffff 72 | 73 | # Any flags for current instruction. 74 | flags = 0 75 | 76 | # Contains a line of output. 77 | line = "" 78 | 79 | # Open input file. 80 | # Display error and exit if filename does not exist. 81 | try: 82 | f = open(filename, "rb") 83 | except FileNotFoundError: 84 | print(("error: input file '{}' not found.".format(filename)), file=sys.stderr) 85 | sys.exit(1) 86 | 87 | # Variables: 88 | # address - current instruction address 89 | # opcode - binary instruction opcode (may be multiple bytes) 90 | # length - length of current instruction 91 | # mnemonic - assembler mnemonic for current instruction 92 | # format - operand format string 93 | # line - line to output 94 | # leadin - extended opcode (true/false) 95 | 96 | s = " " 97 | 98 | # Print initial origin address 99 | if args.nolist is False: 100 | print("{0:04X}{1:s}.org ${0:04X}".format(address, s[0:maxLength*3+3])) 101 | else: 102 | print(" .org ${0:04X}".format(address)) 103 | 104 | while True: 105 | try: 106 | b = f.read(1) # Get binary byte from file 107 | 108 | if not b: # handle EOF 109 | if args.nolist is False: 110 | print("{0:04X}{1:s}end".format(address, s[0:maxLength*3+3])) 111 | break 112 | 113 | # Get op code 114 | opcode = ord(b) 115 | 116 | # Handle if opcode is a leadin byte 117 | if opcode in leadInBytes: 118 | b = f.read(1) # Get next byte of extended opcode 119 | if not b: # Unexpected EOF 120 | break 121 | opcode = (opcode << 8) + ord(b) 122 | leadin = True 123 | else: 124 | leadin = False 125 | 126 | # Given opcode, get data from opcode table and address mode table for CPU. 127 | if opcode in opcodeTable: 128 | length = opcodeTable[opcode][0] 129 | mnemonic = opcodeTable[opcode][1] 130 | mode = opcodeTable[opcode][2] 131 | if len(opcodeTable[opcode]) > 3: 132 | flags = opcodeTable[opcode][3] # Get optional flags 133 | else: 134 | flags = 0 135 | if mode in addressModeTable: 136 | format = addressModeTable[mode] 137 | else: 138 | print(("error: mode '{}' not found in addressModeTable.".format(mode)), file=sys.stderr) 139 | sys.exit(1) 140 | else: 141 | length = 1 # Invalid opcode 142 | format = "" 143 | mnemonic = "???" 144 | 145 | if flags & 2 == und and not args.undocumented: 146 | # currently only handles one-byte undocumented opcodes 147 | length = 1 148 | format = "" 149 | mnemonic = "???" 150 | 151 | 152 | # Disassembly format: 153 | # XXXX XX XX XX XX XX nop ($1234,X) 154 | # With --nolist option: 155 | # nop ($1234,X) 156 | 157 | # Add current address to output line 158 | if args.nolist is False: 159 | if leadin is True: 160 | line += "{0:04X} {1:02X} {2:02X}".format(address, opcode // 256, opcode % 256) 161 | length -= 1 162 | else: 163 | line += "{0:04X} {1:02X}".format(address, opcode) 164 | 165 | op = {} # Array to hold operands 166 | 167 | # Get any operands and store in an array 168 | for i in range(1, maxLength): 169 | if i < length: 170 | b = f.read(1) 171 | if not b: # Unexpected EOF 172 | break 173 | op[i] = ord(b) # Get operand bytes 174 | if args.nolist is False: 175 | line += " {0:02X}".format(op[i]) 176 | else: 177 | if args.nolist is False and leadin is False and i != length-1: 178 | line += " " 179 | 180 | if not b: # Unexpected EOF 181 | break 182 | 183 | # Handle relative addresses. Indicated by the flag pcr being set. 184 | # Assumes the operand that needs to be PC relative is the last one. 185 | # Note: Code will need changes if more flags are added. 186 | if flags & pcr: 187 | if op[length-1] < 128: 188 | op[length-1] = address + op[length-1] + length 189 | else: 190 | op[length-1] = address - (256 - op[length-1]) + length 191 | if op[length-1] < 0: 192 | op[length-1] = 65536 + op[length-1] 193 | 194 | # Format the operand using format string and any operands. 195 | if length == 1: 196 | operand = format 197 | elif length == 2: 198 | operand = format.format(op[1]) 199 | elif length == 3: 200 | if flags & z80bit: 201 | opcode = (opcode << 16) + op[2] 202 | # reread opcode table for real format string 203 | length, mnemonic, mode, flags = opcodeTable[opcode] 204 | format = addressModeTable[mode] 205 | operand = format.format(op[1]) 206 | else: 207 | operand = format.format(op[1], op[2]) 208 | elif length == 4: 209 | operand = format.format(op[1], op[2], op[3]) 210 | elif length == 5: 211 | operand = format.format(op[1], op[2], op[3], op[4]) 212 | elif length == 6: 213 | operand = format.format(op[1], op[2], op[3], op[4], op[5]) 214 | elif length == 7: 215 | operand = format.format(op[1], op[2], op[3], op[4], op[5], op[6]) 216 | 217 | # Special check for invalid op code. Display as ??? or .byte depending on command line option. 218 | if mnemonic == "???" and not args.invalid: 219 | # Handle case where invalid opcode has a leadin byte. 220 | if leadin is True: 221 | if args.nolist is False: 222 | mnemonic = "{0:s}.byte ${1:02X},${2:02X}".format(s[0:(maxLength-length-2)*3], opcode // 256, opcode % 256) 223 | else: 224 | mnemonic = ".byte ${0:02X},${1:02X}".format(opcode // 256, opcode % 256) 225 | else: 226 | if isprint(chr(opcode)): 227 | mnemonic = ".byte '{0:c}'".format(opcode) 228 | else: 229 | mnemonic = ".byte ${0:02X}".format(opcode) 230 | 231 | # Need one more space if not in no list mode. 232 | if args.nolist is False: 233 | line += " " 234 | 235 | # Add mnemonic and any operands to the output line. 236 | if operand == "": 237 | line += " {0:s}".format(mnemonic) 238 | else: 239 | line += " {0:5s} {1:s}".format(mnemonic, operand) 240 | 241 | # Print line of output 242 | print(line) 243 | 244 | # Update address, handlng wraparound at 64K. 245 | address = (address + length) & 0xffff 246 | 247 | # Reset variables for next line of output. 248 | line = "" 249 | operand = "" 250 | flags = 0 251 | 252 | except KeyboardInterrupt: 253 | print("Interrupted by Control-C", file=sys.stderr) 254 | break 255 | -------------------------------------------------------------------------------- /6800.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "6800" 6 | # Description = "Motorola 6800 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 3 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implied" : "", 20 | "immediate" : "#${0:02X}", 21 | "immediatex" : "#${0:02X}{1:02X}", 22 | "direct" : "${0:02X}", 23 | "indexed" : "${0:02X},x", 24 | "extended" : "${0:02X}{1:02X}", 25 | "relative" : "${0:04X}", 26 | } 27 | 28 | # Op Code Table 29 | # Key is numeric opcode (possibly multiple bytes) 30 | # Value is a list: 31 | # # bytes 32 | # mnemonic 33 | # addressing mode 34 | # flags (e.g. pcr) 35 | opcodeTable = { 36 | 0x01 : [ 1, "nop", "implied" ], 37 | 0x06 : [ 1, "tap", "implied" ], 38 | 0x07 : [ 1, "tpa", "implied" ], 39 | 0x08 : [ 1, "inx", "implied" ], 40 | 0x09 : [ 1, "dex", "implied" ], 41 | 0x0a : [ 1, "clv", "implied" ], 42 | 0x0b : [ 1, "sev", "implied" ], 43 | 0x0c : [ 1, "clc", "implied" ], 44 | 0x0d : [ 1, "sec", "implied" ], 45 | 0x0e : [ 1, "cli", "implied" ], 46 | 0x0f : [ 1, "sei", "implied" ], 47 | 48 | 0x10 : [ 1, "sba", "implied" ], 49 | 0x11 : [ 1, "cba", "implied" ], 50 | 0x16 : [ 1, "tab", "implied" ], 51 | 0x17 : [ 1, "tba", "implied" ], 52 | 0x19 : [ 1, "daa", "implied" ], 53 | 0x1b : [ 1, "aba", "implied" ], 54 | 55 | 0x20 : [ 2, "bra", "relative", pcr ], 56 | 0x22 : [ 2, "bhi", "relative", pcr ], 57 | 0x23 : [ 2, "bls", "relative", pcr ], 58 | 0x24 : [ 2, "bcc", "relative", pcr ], 59 | 0x25 : [ 2, "bcs", "relative", pcr ], 60 | 0x26 : [ 2, "bne", "relative", pcr ], 61 | 0x27 : [ 2, "beq", "relative", pcr ], 62 | 0x28 : [ 2, "bvc", "relative", pcr ], 63 | 0x29 : [ 2, "bvs", "relative", pcr ], 64 | 0x2a : [ 2, "bpl", "relative", pcr ], 65 | 0x2b : [ 2, "bmi", "relative", pcr ], 66 | 0x2c : [ 2, "bge", "relative", pcr ], 67 | 0x2d : [ 2, "blt", "relative", pcr ], 68 | 0x2e : [ 2, "bgt", "relative", pcr ], 69 | 0x2f : [ 2, "ble", "relative", pcr ], 70 | 71 | 0x30 : [ 1, "tsx", "implied" ], 72 | 0x31 : [ 1, "ins", "implied" ], 73 | 0x32 : [ 1, "pula", "implied" ], 74 | 0x33 : [ 1, "pulb", "implied" ], 75 | 0x34 : [ 1, "des", "implied" ], 76 | 0x35 : [ 1, "txs", "implied" ], 77 | 0x36 : [ 1, "psha", "implied" ], 78 | 0x37 : [ 1, "pshb", "implied" ], 79 | 0x39 : [ 1, "rts", "implied" ], 80 | 0x3b : [ 1, "rti", "implied" ], 81 | 0x3e : [ 1, "wai", "implied" ], 82 | 0x3f : [ 1, "swi", "implied" ], 83 | 84 | 0x40 : [ 1, "nega", "implied" ], 85 | 0x43 : [ 1, "coma", "implied" ], 86 | 0x44 : [ 1, "lsra", "implied" ], 87 | 0x46 : [ 1, "rora", "implied" ], 88 | 0x47 : [ 1, "asra", "implied" ], 89 | 0x48 : [ 1, "asla", "implied" ], 90 | 0x49 : [ 1, "rola", "implied" ], 91 | 0x4a : [ 1, "deca", "implied" ], 92 | 0x4c : [ 1, "inca", "implied" ], 93 | 0x4d : [ 1, "tsta", "implied" ], 94 | 0x4f : [ 1, "clra", "implied" ], 95 | 96 | 0x50 : [ 1, "negb", "implied" ], 97 | 0x53 : [ 1, "comb", "implied" ], 98 | 0x54 : [ 1, "lsrb", "implied" ], 99 | 0x56 : [ 1, "rorb", "implied" ], 100 | 0x57 : [ 1, "asrb", "implied" ], 101 | 0x58 : [ 1, "aslb", "implied" ], 102 | 0x59 : [ 1, "rolb", "implied" ], 103 | 0x5a : [ 1, "decb", "implied" ], 104 | 0x5c : [ 1, "incb", "implied" ], 105 | 0x5d : [ 1, "tstb", "implied" ], 106 | 0x5f : [ 1, "clrb", "implied" ], 107 | 108 | 0x60 : [ 2, "neg", "indexed" ], 109 | 0x63 : [ 2, "com", "indexed" ], 110 | 0x64 : [ 2, "lsr", "indexed" ], 111 | 0x66 : [ 2, "ror", "indexed" ], 112 | 0x67 : [ 2, "asr", "indexed" ], 113 | 0x68 : [ 2, "asl", "indexed" ], 114 | 0x69 : [ 2, "rol", "indexed" ], 115 | 0x6a : [ 2, "dec", "indexed" ], 116 | 0x6c : [ 2, "inc", "indexed" ], 117 | 0x6d : [ 2, "tst", "indexed" ], 118 | 0x6e : [ 2, "jmp", "indexed" ], 119 | 0x6f : [ 2, "clr", "indexed" ], 120 | 121 | 0x70 : [ 3, "neg", "extended" ], 122 | 0x73 : [ 3, "com", "extended" ], 123 | 0x74 : [ 3, "lsr", "extended" ], 124 | 0x76 : [ 3, "ror", "extended" ], 125 | 0x77 : [ 3, "asr", "extended" ], 126 | 0x78 : [ 3, "asl", "extended" ], 127 | 0x79 : [ 3, "rol", "extended" ], 128 | 0x7a : [ 3, "dec", "extended" ], 129 | 0x7c : [ 3, "inc", "extended" ], 130 | 0x7d : [ 3, "tst", "extended" ], 131 | 0x7e : [ 3, "jmp", "extended" ], 132 | 0x7f : [ 3, "clr", "extended" ], 133 | 134 | 0x80 : [ 2, "suba", "immediate" ], 135 | 0x81 : [ 2, "cmpa", "immediate" ], 136 | 0x82 : [ 2, "sbca", "immediate" ], 137 | 0x84 : [ 2, "anda", "immediate" ], 138 | 0x85 : [ 2, "bita", "immediate" ], 139 | 0x86 : [ 2, "ldaa", "immediate" ], 140 | 0x88 : [ 2, "eora", "immediate" ], 141 | 0x89 : [ 2, "adca", "immediate" ], 142 | 0x8a : [ 2, "oraa", "immediate" ], 143 | 0x8b : [ 2, "adda", "immediate" ], 144 | 0x8c : [ 3, "cpx", "immediatex" ], 145 | 0x8d : [ 2, "bsr", "relative", pcr ], 146 | 0x8e : [ 3, "lds", "immediatex" ], 147 | 148 | 0x90 : [ 2, "suba", "direct" ], 149 | 0x91 : [ 2, "cmpa", "direct" ], 150 | 0x92 : [ 2, "sbca", "direct" ], 151 | 0x94 : [ 2, "anda", "direct" ], 152 | 0x95 : [ 2, "bita", "direct" ], 153 | 0x96 : [ 2, "ldaa", "direct" ], 154 | 0x97 : [ 2, "staa", "direct" ], 155 | 0x98 : [ 2, "eora", "direct" ], 156 | 0x99 : [ 2, "adca", "direct" ], 157 | 0x9a : [ 2, "oraa", "direct" ], 158 | 0x9b : [ 2, "adda", "direct" ], 159 | 0x9c : [ 2, "cpx", "direct" ], 160 | 0x9e : [ 2, "lds", "direct" ], 161 | 0x9f : [ 2, "sts", "direct" ], 162 | 163 | 0xa0 : [ 2, "suba", "indexed" ], 164 | 0xa1 : [ 2, "cmpa", "indexed" ], 165 | 0xa2 : [ 2, "sbca", "indexed" ], 166 | 0xa4 : [ 2, "anda", "indexed" ], 167 | 0xa5 : [ 2, "bita", "indexed" ], 168 | 0xa6 : [ 2, "ldaa", "indexed" ], 169 | 0xa7 : [ 2, "staa", "indexed" ], 170 | 0xa8 : [ 2, "eora", "indexed" ], 171 | 0xa9 : [ 2, "adca", "indexed" ], 172 | 0xaa : [ 2, "oraa", "indexed" ], 173 | 0xab : [ 2, "adda", "indexed" ], 174 | 0xac : [ 2, "cpx", "indexed" ], 175 | 0xad : [ 2, "jsr", "indexed" ], 176 | 0xae : [ 2, "lds", "indexed" ], 177 | 0xaf : [ 2, "sts", "indexed" ], 178 | 179 | 0xb0 : [ 3, "suba", "extended" ], 180 | 0xb1 : [ 3, "cmpa", "extended" ], 181 | 0xb2 : [ 3, "sbca", "extended" ], 182 | 0xb4 : [ 3, "anda", "extended" ], 183 | 0xb5 : [ 3, "bita", "extended" ], 184 | 0xb6 : [ 3, "ldaa", "extended" ], 185 | 0xb7 : [ 3, "staa", "extended" ], 186 | 0xb8 : [ 3, "eora", "extended" ], 187 | 0xb9 : [ 3, "adca", "extended" ], 188 | 0xba : [ 3, "oraa", "extended" ], 189 | 0xbb : [ 3, "adda", "extended" ], 190 | 0xbc : [ 3, "cpx", "extended" ], 191 | 0xbd : [ 3, "jsr", "extended" ], 192 | 0xbe : [ 3, "lds", "extended" ], 193 | 0xbf : [ 3, "sts", "extended" ], 194 | 195 | 0xc0 : [ 2, "subb", "immediate" ], 196 | 0xc1 : [ 2, "cmpb", "immediate" ], 197 | 0xc2 : [ 2, "sbcb", "immediate" ], 198 | 0xc4 : [ 2, "andb", "immediate" ], 199 | 0xc5 : [ 2, "bitb", "immediate" ], 200 | 0xc6 : [ 2, "ldab", "immediate" ], 201 | 0xc8 : [ 2, "eorb", "immediate" ], 202 | 0xc9 : [ 2, "adcb", "immediate" ], 203 | 0xca : [ 2, "orab", "immediate" ], 204 | 0xcb : [ 2, "addb", "immediate" ], 205 | 0xce : [ 3, "ldx", "immediatex" ], 206 | 207 | 0xd0 : [ 2, "subb", "direct" ], 208 | 0xd1 : [ 2, "cmpb", "direct" ], 209 | 0xd2 : [ 2, "sbcb", "direct" ], 210 | 0xd4 : [ 2, "andb", "direct" ], 211 | 0xd5 : [ 2, "bitb", "direct" ], 212 | 0xd6 : [ 2, "ldab", "direct" ], 213 | 0xd7 : [ 2, "stab", "direct" ], 214 | 0xd8 : [ 2, "eorb", "direct" ], 215 | 0xd9 : [ 2, "adcb", "direct" ], 216 | 0xda : [ 2, "orab", "direct" ], 217 | 0xdb : [ 2, "addb", "direct" ], 218 | 0xde : [ 2, "ldx", "direct" ], 219 | 0xdf : [ 2, "stx", "direct" ], 220 | 221 | 0xe0 : [ 2, "subb", "indexed" ], 222 | 0xe1 : [ 2, "cmpb", "indexed" ], 223 | 0xe2 : [ 2, "sbcb", "indexed" ], 224 | 0xe4 : [ 2, "andb", "indexed" ], 225 | 0xe5 : [ 2, "bitb", "indexed" ], 226 | 0xe6 : [ 2, "ldab", "indexed" ], 227 | 0xe7 : [ 2, "stab", "indexed" ], 228 | 0xe8 : [ 2, "eorb", "indexed" ], 229 | 0xe9 : [ 2, "adcb", "indexed" ], 230 | 0xea : [ 2, "orab", "indexed" ], 231 | 0xeb : [ 2, "addb", "indexed" ], 232 | 0xee : [ 2, "ldx", "indexed" ], 233 | 0xef : [ 2, "stx", "indexed" ], 234 | 235 | 0xf0 : [ 3, "subb", "extended" ], 236 | 0xf1 : [ 3, "cmpb", "extended" ], 237 | 0xf2 : [ 3, "sbcb", "extended" ], 238 | 0xf4 : [ 3, "andb", "extended" ], 239 | 0xf5 : [ 3, "bitb", "extended" ], 240 | 0xf6 : [ 3, "ldab", "extended" ], 241 | 0xf7 : [ 3, "stab", "extended" ], 242 | 0xf8 : [ 3, "eorb", "extended" ], 243 | 0xf9 : [ 3, "adcb", "extended" ], 244 | 0xfa : [ 3, "orab", "extended" ], 245 | 0xfb : [ 3, "addb", "extended" ], 246 | 0xfe : [ 3, "ldx", "extended" ], 247 | 0xff : [ 3, "stx", "extended" ], 248 | 249 | } 250 | 251 | # End of processor specific code 252 | ########################################################################## 253 | -------------------------------------------------------------------------------- /6801.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # 13/6/2023: 6801 / 6803 support added by Merlin Skinner-Oakes for Jeff 6 | # Tranter's Universal Disassembler (udis) 7 | 8 | # CPU = "6801" 9 | # Description = "Motorola 6801/6803 8-bit microprocessor." 10 | # DataWidth = 8 # 8-bit data 11 | # AddressWidth = 16 # 16-bit addresses 12 | 13 | # Maximum length of an instruction (for formatting purposes) 14 | maxLength = 3 15 | 16 | # Leadin bytes for multibyte instructions 17 | leadInBytes = [] 18 | 19 | # Addressing mode table 20 | # List of addressing modes and corresponding format strings for operands. 21 | addressModeTable = { 22 | "implied" : "", 23 | "immediate" : "#${0:02X}", 24 | "immediatex" : "#${0:02X}{1:02X}", 25 | "direct" : "${0:02X}", 26 | "indexed" : "${0:02X},x", 27 | "extended" : "${0:02X}{1:02X}", 28 | "relative" : "${0:04X}", 29 | } 30 | 31 | # Op Code Table 32 | # Key is numeric opcode (possibly multiple bytes) 33 | # Value is a list: 34 | # # bytes 35 | # mnemonic 36 | # addressing mode 37 | # flags (e.g. pcr) 38 | opcodeTable = { 39 | 0x01 : [ 1, "nop", "implied" ], 40 | 0x04 : [ 1, "lsld", "implied" ], # 6801 / 6803 only 41 | 0x05 : [ 1, "asld", "implied" ], # 6801 / 6803 only 42 | 0x06 : [ 1, "tap", "implied" ], 43 | 0x07 : [ 1, "tpa", "implied" ], 44 | 0x08 : [ 1, "inx", "implied" ], 45 | 0x09 : [ 1, "dex", "implied" ], 46 | 0x0a : [ 1, "clv", "implied" ], 47 | 0x0b : [ 1, "sev", "implied" ], 48 | 0x0c : [ 1, "clc", "implied" ], 49 | 0x0d : [ 1, "sec", "implied" ], 50 | 0x0e : [ 1, "cli", "implied" ], 51 | 0x0f : [ 1, "sei", "implied" ], 52 | 53 | 0x10 : [ 1, "sba", "implied" ], 54 | 0x11 : [ 1, "cba", "implied" ], 55 | 0x16 : [ 1, "tab", "implied" ], 56 | 0x17 : [ 1, "tba", "implied" ], 57 | 0x19 : [ 1, "daa", "implied" ], 58 | 0x1b : [ 1, "aba", "implied" ], 59 | 60 | 0x20 : [ 2, "bra", "relative", pcr ], 61 | 0x21 : [ 2, "brn", "relative", pcr ], # 6801 / 6803 only 62 | 0x22 : [ 2, "bhi", "relative", pcr ], 63 | 0x23 : [ 2, "bls", "relative", pcr ], 64 | 0x24 : [ 2, "bcc", "relative", pcr ], 65 | 0x25 : [ 2, "bcs", "relative", pcr ], 66 | 0x26 : [ 2, "bne", "relative", pcr ], 67 | 0x27 : [ 2, "beq", "relative", pcr ], 68 | 0x28 : [ 2, "bvc", "relative", pcr ], 69 | 0x29 : [ 2, "bvs", "relative", pcr ], 70 | 0x2a : [ 2, "bpl", "relative", pcr ], 71 | 0x2b : [ 2, "bmi", "relative", pcr ], 72 | 0x2c : [ 2, "bge", "relative", pcr ], 73 | 0x2d : [ 2, "blt", "relative", pcr ], 74 | 0x2e : [ 2, "bgt", "relative", pcr ], 75 | 0x2f : [ 2, "ble", "relative", pcr ], 76 | 77 | 0x30 : [ 1, "tsx", "implied" ], 78 | 0x31 : [ 1, "ins", "implied" ], 79 | 0x32 : [ 1, "pula", "implied" ], 80 | 0x33 : [ 1, "pulb", "implied" ], 81 | 0x34 : [ 1, "des", "implied" ], 82 | 0x35 : [ 1, "txs", "implied" ], 83 | 0x36 : [ 1, "psha", "implied" ], 84 | 0x37 : [ 1, "pshb", "implied" ], 85 | 0x38 : [ 1, "pulx", "implied" ], # 6801 / 6803 only 86 | 0x39 : [ 1, "rts", "implied" ], 87 | 0x3a : [ 1, "abx", "implied" ], # 6801 / 6803 only 88 | 0x3b : [ 1, "rti", "implied" ], 89 | 0x3c : [ 1, "pshx", "implied" ], # 6801 / 6803 only 90 | 0x3d : [ 1, "mul", "implied" ], # 6801 / 6803 only 91 | 0x3e : [ 1, "wai", "implied" ], 92 | 0x3f : [ 1, "swi", "implied" ], 93 | 94 | 0x40 : [ 1, "nega", "implied" ], 95 | 0x43 : [ 1, "coma", "implied" ], 96 | 0x44 : [ 1, "lsra", "implied" ], 97 | 0x46 : [ 1, "rora", "implied" ], 98 | 0x47 : [ 1, "asra", "implied" ], 99 | 0x48 : [ 1, "asla", "implied" ], 100 | 0x49 : [ 1, "rola", "implied" ], 101 | 0x4a : [ 1, "deca", "implied" ], 102 | 0x4c : [ 1, "inca", "implied" ], 103 | 0x4d : [ 1, "tsta", "implied" ], 104 | 0x4f : [ 1, "clra", "implied" ], 105 | 106 | 0x50 : [ 1, "negb", "implied" ], 107 | 0x53 : [ 1, "comb", "implied" ], 108 | 0x54 : [ 1, "lsrb", "implied" ], 109 | 0x56 : [ 1, "rorb", "implied" ], 110 | 0x57 : [ 1, "asrb", "implied" ], 111 | 0x58 : [ 1, "aslb", "implied" ], 112 | 0x59 : [ 1, "rolb", "implied" ], 113 | 0x5a : [ 1, "decb", "implied" ], 114 | 0x5c : [ 1, "incb", "implied" ], 115 | 0x5d : [ 1, "tstb", "implied" ], 116 | 0x5f : [ 1, "clrb", "implied" ], 117 | 118 | 0x60 : [ 2, "neg", "indexed" ], 119 | 0x63 : [ 2, "com", "indexed" ], 120 | 0x64 : [ 2, "lsr", "indexed" ], 121 | 0x66 : [ 2, "ror", "indexed" ], 122 | 0x67 : [ 2, "asr", "indexed" ], 123 | 0x68 : [ 2, "asl", "indexed" ], 124 | 0x69 : [ 2, "rol", "indexed" ], 125 | 0x6a : [ 2, "dec", "indexed" ], 126 | 0x6c : [ 2, "inc", "indexed" ], 127 | 0x6d : [ 2, "tst", "indexed" ], 128 | 0x6e : [ 2, "jmp", "indexed" ], 129 | 0x6f : [ 2, "clr", "indexed" ], 130 | 131 | 0x70 : [ 3, "neg", "extended" ], 132 | 0x73 : [ 3, "com", "extended" ], 133 | 0x74 : [ 3, "lsr", "extended" ], 134 | 0x76 : [ 3, "ror", "extended" ], 135 | 0x77 : [ 3, "asr", "extended" ], 136 | 0x78 : [ 3, "asl", "extended" ], 137 | 0x79 : [ 3, "rol", "extended" ], 138 | 0x7a : [ 3, "dec", "extended" ], 139 | 0x7c : [ 3, "inc", "extended" ], 140 | 0x7d : [ 3, "tst", "extended" ], 141 | 0x7e : [ 3, "jmp", "extended" ], 142 | 0x7f : [ 3, "clr", "extended" ], 143 | 144 | 0x80 : [ 2, "suba", "immediate" ], 145 | 0x81 : [ 2, "cmpa", "immediate" ], 146 | 0x82 : [ 2, "sbca", "immediate" ], 147 | 0x83 : [ 3, "subd", "immediatex" ], # 6801 / 6803 only 148 | 0x84 : [ 2, "anda", "immediate" ], 149 | 0x85 : [ 2, "bita", "immediate" ], 150 | 0x86 : [ 2, "ldaa", "immediate" ], 151 | 0x88 : [ 2, "eora", "immediate" ], 152 | 0x89 : [ 2, "adca", "immediate" ], 153 | 0x8a : [ 2, "oraa", "immediate" ], 154 | 0x8b : [ 2, "adda", "immediate" ], 155 | 0x8c : [ 3, "cpx", "immediatex" ], 156 | 0x8d : [ 2, "bsr", "relative", pcr ], 157 | 0x8e : [ 3, "lds", "immediatex" ], 158 | 159 | 0x90 : [ 2, "suba", "direct" ], 160 | 0x91 : [ 2, "cmpa", "direct" ], 161 | 0x92 : [ 2, "sbca", "direct" ], 162 | 0x93 : [ 2, "subd", "direct" ], # 6801 / 6803 only 163 | 0x94 : [ 2, "anda", "direct" ], 164 | 0x95 : [ 2, "bita", "direct" ], 165 | 0x96 : [ 2, "ldaa", "direct" ], 166 | 0x97 : [ 2, "staa", "direct" ], 167 | 0x98 : [ 2, "eora", "direct" ], 168 | 0x99 : [ 2, "adca", "direct" ], 169 | 0x9a : [ 2, "oraa", "direct" ], 170 | 0x9b : [ 2, "adda", "direct" ], 171 | 0x9c : [ 2, "cpx", "direct" ], 172 | 0x9d : [ 2, "jsr", "direct" ], # 6801 / 6803 only 173 | 0x9e : [ 2, "lds", "direct" ], 174 | 0x9f : [ 2, "sts", "direct" ], 175 | 176 | 0xa0 : [ 2, "suba", "indexed" ], 177 | 0xa1 : [ 2, "cmpa", "indexed" ], 178 | 0xa2 : [ 2, "sbca", "indexed" ], 179 | 0xa3 : [ 2, "subd", "indexed" ], # 6801 / 6803 only 180 | 0xa4 : [ 2, "anda", "indexed" ], 181 | 0xa5 : [ 2, "bita", "indexed" ], 182 | 0xa6 : [ 2, "ldaa", "indexed" ], 183 | 0xa7 : [ 2, "staa", "indexed" ], 184 | 0xa8 : [ 2, "eora", "indexed" ], 185 | 0xa9 : [ 2, "adca", "indexed" ], 186 | 0xaa : [ 2, "oraa", "indexed" ], 187 | 0xab : [ 2, "adda", "indexed" ], 188 | 0xac : [ 2, "cpx", "indexed" ], 189 | 0xad : [ 2, "jsr", "indexed" ], 190 | 0xae : [ 2, "lds", "indexed" ], 191 | 0xaf : [ 2, "sts", "indexed" ], 192 | 193 | 0xb0 : [ 3, "suba", "extended" ], 194 | 0xb1 : [ 3, "cmpa", "extended" ], 195 | 0xb2 : [ 3, "sbca", "extended" ], 196 | 0xb3 : [ 3, "subd", "extended" ], # 6801 / 6803 only 197 | 0xb4 : [ 3, "anda", "extended" ], 198 | 0xb5 : [ 3, "bita", "extended" ], 199 | 0xb6 : [ 3, "ldaa", "extended" ], 200 | 0xb7 : [ 3, "staa", "extended" ], 201 | 0xb8 : [ 3, "eora", "extended" ], 202 | 0xb9 : [ 3, "adca", "extended" ], 203 | 0xba : [ 3, "oraa", "extended" ], 204 | 0xbb : [ 3, "adda", "extended" ], 205 | 0xbc : [ 3, "cpx", "extended" ], 206 | 0xbd : [ 3, "jsr", "extended" ], 207 | 0xbe : [ 3, "lds", "extended" ], 208 | 0xbf : [ 3, "sts", "extended" ], 209 | 210 | 0xc0 : [ 2, "subb", "immediate" ], 211 | 0xc1 : [ 2, "cmpb", "immediate" ], 212 | 0xc2 : [ 2, "sbcb", "immediate" ], 213 | 0xc3 : [ 3, "addd", "immediatex" ], # 6801 / 6803 only 214 | 0xc4 : [ 2, "andb", "immediate" ], 215 | 0xc5 : [ 2, "bitb", "immediate" ], 216 | 0xc6 : [ 2, "ldab", "immediate" ], 217 | 0xc8 : [ 2, "eorb", "immediate" ], 218 | 0xc9 : [ 2, "adcb", "immediate" ], 219 | 0xca : [ 2, "orab", "immediate" ], 220 | 0xcb : [ 2, "addb", "immediate" ], 221 | 0xcc : [ 3, "ldd", "immediatex" ], # 6801 / 6803 only 222 | 0xce : [ 3, "ldx", "immediatex" ], 223 | 224 | 0xd0 : [ 2, "subb", "direct" ], 225 | 0xd1 : [ 2, "cmpb", "direct" ], 226 | 0xd2 : [ 2, "sbcb", "direct" ], 227 | 0xd3 : [ 2, "addd", "direct" ], # 6801 / 6803 only 228 | 0xd4 : [ 2, "andb", "direct" ], 229 | 0xd5 : [ 2, "bitb", "direct" ], 230 | 0xd6 : [ 2, "ldab", "direct" ], 231 | 0xd7 : [ 2, "stab", "direct" ], 232 | 0xd8 : [ 2, "eorb", "direct" ], 233 | 0xd9 : [ 2, "adcb", "direct" ], 234 | 0xda : [ 2, "orab", "direct" ], 235 | 0xdb : [ 2, "addb", "direct" ], 236 | 0xdc : [ 2, "ldd", "direct" ], # 6801 / 6803 only 237 | 0xdd : [ 2, "std", "direct" ], # 6801 / 6803 only 238 | 0xde : [ 2, "ldx", "direct" ], 239 | 0xdf : [ 2, "stx", "direct" ], 240 | 241 | 0xe0 : [ 2, "subb", "indexed" ], 242 | 0xe1 : [ 2, "cmpb", "indexed" ], 243 | 0xe2 : [ 2, "sbcb", "indexed" ], 244 | 0xe3 : [ 2, "addd", "indexed" ], # 6801 / 6803 only 245 | 0xe4 : [ 2, "andb", "indexed" ], 246 | 0xe5 : [ 2, "bitb", "indexed" ], 247 | 0xe6 : [ 2, "ldab", "indexed" ], 248 | 0xe7 : [ 2, "stab", "indexed" ], 249 | 0xe8 : [ 2, "eorb", "indexed" ], 250 | 0xe9 : [ 2, "adcb", "indexed" ], 251 | 0xea : [ 2, "orab", "indexed" ], 252 | 0xeb : [ 2, "addb", "indexed" ], 253 | 0xec : [ 2, "ldd", "indexed" ], # 6801 / 6803 only 254 | 0xed : [ 2, "std", "indexed" ], # 6801 / 6803 only 255 | 0xee : [ 2, "ldx", "indexed" ], 256 | 0xef : [ 2, "stx", "indexed" ], 257 | 258 | 0xf0 : [ 3, "subb", "extended" ], 259 | 0xf1 : [ 3, "cmpb", "extended" ], 260 | 0xf2 : [ 3, "sbcb", "extended" ], 261 | 0xf3 : [ 3, "addd", "extended" ], # 6801 / 6803 only 262 | 0xf4 : [ 3, "andb", "extended" ], 263 | 0xf5 : [ 3, "bitb", "extended" ], 264 | 0xf6 : [ 3, "ldab", "extended" ], 265 | 0xf7 : [ 3, "stab", "extended" ], 266 | 0xf8 : [ 3, "eorb", "extended" ], 267 | 0xf9 : [ 3, "adcb", "extended" ], 268 | 0xfa : [ 3, "orab", "extended" ], 269 | 0xfb : [ 3, "addb", "extended" ], 270 | 0xfc : [ 3, "ldd", "extended" ], # 6801 / 6803 only 271 | 0xfd : [ 3, "std", "extended" ], # 6801 / 6803 only 272 | 0xfe : [ 3, "ldx", "extended" ], 273 | 0xff : [ 3, "stx", "extended" ], 274 | 275 | } 276 | 277 | # End of processor specific code 278 | ########################################################################## 279 | -------------------------------------------------------------------------------- /65c02.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "65C02" 6 | # Description = "Western Design Center (and others) 65C02 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 3 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implicit" : "", 20 | "absolute" : "${1:02X}{0:02X}", 21 | "absolutex" : "${1:02X}{0:02X},x", 22 | "absolutey" : "${1:02X}{0:02X},y", 23 | "accumulator" : "a", 24 | "immediate" : "#${0:02X}", 25 | "indirectx" : "(${0:02X},x)", 26 | "indirecty" : "(${0:02X}),y", 27 | "indirect" : "(${1:02X}{0:02X})", 28 | "relative" : "${0:04X}", 29 | "zeropage" : "${0:02X}", 30 | "zeropagex" : "${0:02X},x", 31 | "zeropagey" : "${0:02X},y", 32 | "indirectzeropage" : "(${0:02X})", 33 | "absoluteindexedindirect" : "(${1:02X}{0:02X},x)", 34 | "zeropagerelative" : "${0:02X},${1:04X}", 35 | } 36 | 37 | # Op Code Table 38 | # Key is numeric opcode (possibly multiple bytes) 39 | # Value is a list: 40 | # # bytes 41 | # mnemonic 42 | # addressing mode 43 | # flags (e.g. pcr) 44 | opcodeTable = { 45 | 0x00 : [ 1, "brk", "implicit" ], 46 | 0x01 : [ 2, "ora", "indirectx" ], 47 | 0x04 : [ 2, "tsb", "zeropage", ], 48 | 0x05 : [ 2, "ora", "zeropage" ], 49 | 0x06 : [ 2, "asl", "zeropage" ], 50 | 0x07 : [ 2, "rmb0", "zeropage" ], 51 | 0x08 : [ 1, "php", "implicit" ], 52 | 0x09 : [ 2, "ora", "immediate" ], 53 | 0x0a : [ 1, "asl", "accumulator" ], 54 | 0x0c : [ 3, "tsb", "absolute" ], 55 | 0x0d : [ 3, "ora", "absolute" ], 56 | 0x0e : [ 3, "asl", "absolute" ], 57 | 0x0f : [ 3, "bbr0", "zeropagerelative", pcr ], 58 | 59 | 0x10 : [ 2, "bpl", "relative", pcr ], 60 | 0x11 : [ 2, "ora", "indirecty" ], 61 | 0x12 : [ 2, "ora", "indirectzeropage" ], 62 | 0x14 : [ 2, "trb", "zeropage" ], 63 | 0x15 : [ 2, "ora", "zeropagex" ], 64 | 0x16 : [ 2, "asl", "zeropagex" ], 65 | 0x17 : [ 2, "rmb1", "zeropage" ], 66 | 0x18 : [ 1, "clc", "implicit" ], 67 | 0x19 : [ 3, "ora", "absolutey" ], 68 | 0x1a : [ 1, "inc", "accumulator" ], 69 | 0x1c : [ 3, "trb", "absolute" ], 70 | 0x1d : [ 3, "ora", "absolutex" ], 71 | 0x1e : [ 3, "asl", "absolutex" ], 72 | 0x1f : [ 3, "bbr1", "zeropagerelative", pcr ], 73 | 74 | 0x20 : [ 3, "jsr", "absolute" ], 75 | 0x21 : [ 2, "and", "indirectx" ], 76 | 0x24 : [ 2, "bit", "zeropage" ], 77 | 0x25 : [ 2, "and", "zeropage" ], 78 | 0x26 : [ 2, "rol", "zeropage" ], 79 | 0x27 : [ 2, "rmb2", "zeropage" ], 80 | 0x28 : [ 1, "plp", "implicit" ], 81 | 0x29 : [ 2, "and", "immediate" ], 82 | 0x2a : [ 1, "rol", "accumulator" ], 83 | 0x2c : [ 3, "bit", "absolute" ], 84 | 0x2d : [ 3, "and", "absolute" ], 85 | 0x2e : [ 3, "rol", "absolute" ], 86 | 0x2f : [ 3, "bbr2", "zeropagerelative", pcr ], 87 | 88 | 0x30 : [ 2, "bmi", "relative", pcr ], 89 | 0x31 : [ 2, "and", "indirecty" ], 90 | 0x32 : [ 2, "and", "indirectzeropage" ], 91 | 0x34 : [ 2, "bit", "zeropagex" ], 92 | 0x35 : [ 2, "and", "zeropagex" ], 93 | 0x36 : [ 2, "rol", "zeropagex" ], 94 | 0x37 : [ 2, "rmb3", "zeropage" ], 95 | 0x38 : [ 1, "sec", "implicit" ], 96 | 0x39 : [ 3, "and", "absolutey" ], 97 | 0x3a : [ 1, "dec", "accumulator" ], 98 | 0x3c : [ 3, "bit", "absolutex" ], 99 | 0x3d : [ 3, "and", "absolutex" ], 100 | 0x3e : [ 3, "rol", "absolutex" ], 101 | 0x3f : [ 3, "bbr3", "zeropagerelative", pcr ], 102 | 103 | 0x40 : [ 1, "rti", "implicit" ], 104 | 0x41 : [ 2, "eor", "indirectx" ], 105 | 0x45 : [ 2, "eor", "zeropage" ], 106 | 0x46 : [ 2, "lsr", "zeropage" ], 107 | 0x47 : [ 2, "rmb4", "zeropage" ], 108 | 0x48 : [ 1, "pha", "implicit" ], 109 | 0x49 : [ 2, "eor", "immediate" ], 110 | 0x4a : [ 1, "lsr", "accumulator" ], 111 | 0x4c : [ 3, "jmp", "absolute" ], 112 | 0x4d : [ 3, "eor", "absolute" ], 113 | 0x4e : [ 3, "lsr", "absolute" ], 114 | 0x4f : [ 3, "bbr4", "zeropagerelative", pcr ], 115 | 116 | 0x50 : [ 2, "bvc", "relative", pcr ], 117 | 0x51 : [ 2, "eor", "indirecty" ], 118 | 0x52 : [ 2, "eor", "indirectzeropage" ], 119 | 0x55 : [ 2, "eor", "zeropagex" ], 120 | 0x56 : [ 2, "lsr", "zeropagex" ], 121 | 0x57 : [ 2, "rmb5", "zeropage" ], 122 | 0x58 : [ 1, "cli", "implicit" ], 123 | 0x59 : [ 3, "eor", "absolutey" ], 124 | 0x5a : [ 1, "phy", "implicit" ], 125 | 0x5d : [ 3, "eor", "absolutex" ], 126 | 0x5e : [ 3, "lsr", "absolutex" ], 127 | 0x5f : [ 3, "bbr5", "zeropagerelative", pcr ], 128 | 129 | 0x60 : [ 1, "rts", "implicit" ], 130 | 0x61 : [ 2, "adc", "indirectx" ], 131 | 0x64 : [ 2, "stz", "zeropage" ], 132 | 0x65 : [ 2, "adc", "zeropage" ], 133 | 0x66 : [ 2, "ror", "zeropage" ], 134 | 0x67 : [ 2, "rmb6", "zeropage" ], 135 | 0x68 : [ 1, "pla", "implicit" ], 136 | 0x69 : [ 2, "adc", "immediate" ], 137 | 0x6a : [ 1, "ror", "accumulator" ], 138 | 0x6c : [ 3, "jmp", "indirect" ], 139 | 0x6d : [ 3, "adc", "absolute" ], 140 | 0x6e : [ 3, "ror", "absolute" ], 141 | 0x6f : [ 3, "bbr6", "zeropagerelative", pcr ], 142 | 143 | 0x70 : [ 2, "bvs", "relative", pcr ], 144 | 0x71 : [ 2, "adc", "indirecty" ], 145 | 0x72 : [ 2, "adc", "indirectzeropage" ], 146 | 0x74 : [ 2, "stz", "zeropagex" ], 147 | 0x75 : [ 2, "adc", "zeropagex" ], 148 | 0x76 : [ 2, "ror", "zeropagex" ], 149 | 0x77 : [ 2, "rmb7", "zeropage" ], 150 | 0x78 : [ 1, "sei", "implicit" ], 151 | 0x79 : [ 3, "adc", "absolutey" ], 152 | 0x7a : [ 1, "ply", "implicit" ], 153 | 0x7c : [ 3, "jmp", "absoluteindexedindirect" ], 154 | 0x7d : [ 3, "adc", "absolutex" ], 155 | 0x7e : [ 3, "ror", "absolutex" ], 156 | 0x7f : [ 3, "bbr7", "zeropagerelative", pcr ], 157 | 158 | 0x80 : [ 2, "bra", "relative", pcr ], 159 | 0x81 : [ 2, "sta", "indirectx" ], 160 | 0x84 : [ 2, "sty", "zeropage" ], 161 | 0x85 : [ 2, "sta", "zeropage" ], 162 | 0x86 : [ 2, "stx", "zeropage" ], 163 | 0x87 : [ 2, "smb0", "zeropage" ], 164 | 0x88 : [ 1, "dey", "implicit" ], 165 | 0x89 : [ 2, "bit", "immediate" ], 166 | 0x8a : [ 1, "txa", "implicit" ], 167 | 0x8c : [ 3, "sty", "absolute" ], 168 | 0x8d : [ 3, "sta", "absolute" ], 169 | 0x8e : [ 3, "stx", "absolute" ], 170 | 0x8f : [ 3, "bbs0", "zeropagerelative", pcr ], 171 | 172 | 0x90 : [ 2, "bcc", "relative", pcr ], 173 | 0x91 : [ 2, "sta", "indirecty" ], 174 | 0x92 : [ 2, "sta", "indirectzeropage" ], 175 | 0x94 : [ 2, "sty", "zeropagex" ], 176 | 0x95 : [ 2, "sta", "zeropagex" ], 177 | 0x96 : [ 2, "stx", "zeropagey" ], 178 | 0x97 : [ 2, "smb1", "zeropage" ], 179 | 0x98 : [ 1, "tya", "implicit" ], 180 | 0x99 : [ 3, "sta", "absolutey" ], 181 | 0x9a : [ 1, "txs", "implicit" ], 182 | 0x9c : [ 3, "stz", "absolute" ], 183 | 0x9d : [ 3, "sta", "absolutex" ], 184 | 0x9e : [ 3, "stz", "absolutex" ], 185 | 0x9f : [ 3, "bbs1", "zeropagerelative", pcr ], 186 | 187 | 0xa0 : [ 2, "ldy", "immediate" ], 188 | 0xa1 : [ 2, "lda", "indirectx" ], 189 | 0xa2 : [ 2, "ldx", "immediate" ], 190 | 0xa4 : [ 2, "ldy", "zeropage" ], 191 | 0xa5 : [ 2, "lda", "zeropage" ], 192 | 0xa6 : [ 2, "ldx", "zeropage" ], 193 | 0xa7 : [ 2, "smb2", "zeropage" ], 194 | 0xa8 : [ 1, "tay", "implicit" ], 195 | 0xa9 : [ 2, "lda", "immediate" ], 196 | 0xaa : [ 1, "tax", "implicit" ], 197 | 0xac : [ 3, "ldy", "absolute" ], 198 | 0xad : [ 3, "lda", "absolute" ], 199 | 0xae : [ 3, "ldx", "absolute" ], 200 | 0xaf : [ 3, "bbs2", "zeropagerelative", pcr ], 201 | 202 | 0xb0 : [ 2, "bcs", "relative", pcr ], 203 | 0xb1 : [ 2, "lda", "indirecty" ], 204 | 0xb2 : [ 2, "lda", "indirectzeropage" ], 205 | 0xb4 : [ 2, "ldy", "zeropagex" ], 206 | 0xb5 : [ 2, "lda", "zeropagex" ], 207 | 0xb6 : [ 2, "ldx", "zeropagey" ], 208 | 0xb7 : [ 2, "smb3", "zeropage" ], 209 | 0xb8 : [ 1, "clv", "implicit" ], 210 | 0xb9 : [ 3, "lda", "absolutey" ], 211 | 0xba : [ 1, "tsx", "implicit" ], 212 | 0xbc : [ 3, "ldy", "absolutex" ], 213 | 0xbd : [ 3, "lda", "absolutex" ], 214 | 0xbe : [ 3, "ldx", "absolutey" ], 215 | 0xbf : [ 3, "bbs3", "zeropagerelative", pcr ], 216 | 217 | 0xc0 : [ 2, "cpy", "immediate" ], 218 | 0xc1 : [ 2, "cmp", "indirectx" ], 219 | 0xc4 : [ 2, "cpy", "zeropage" ], 220 | 0xc5 : [ 2, "cmp", "zeropage" ], 221 | 0xc6 : [ 2, "dec", "zeropage" ], 222 | 0xc7 : [ 2, "smb4", "zeropage" ], 223 | 0xc8 : [ 1, "iny", "implicit" ], 224 | 0xc9 : [ 2, "cmp", "immediate" ], 225 | 0xca : [ 1, "dex", "implicit" ], 226 | 0xcb : [ 1, "wai", "implicit" ], # WDC 65C02 only (not Rockwell) 227 | 0xcc : [ 3, "cpy", "absolute" ], 228 | 0xcd : [ 3, "cmp", "absolute" ], 229 | 0xce : [ 3, "dec", "absolute" ], 230 | 0xcf : [ 3, "bbs4", "zeropagerelative", pcr ], 231 | 232 | 0xd0 : [ 2, "bne", "relative", pcr ], 233 | 0xd1 : [ 2, "cmp", "indirecty" ], 234 | 0xd2 : [ 2, "cmp", "indirectzeropage" ], 235 | 0xd5 : [ 2, "cmp", "zeropagex" ], 236 | 0xd6 : [ 2, "dec", "zeropagex" ], 237 | 0xd7 : [ 2, "smb5", "zeropage" ], 238 | 0xd8 : [ 1, "cld", "implicit" ], 239 | 0xd9 : [ 3, "cmp", "absolutey" ], 240 | 0xda : [ 1, "phx", "implicit" ], 241 | 0xdb : [ 1, "stp", "implicit" ], # WDC 65C02 only (not Rockwell) 242 | 0xdd : [ 3, "cmp", "absolutex" ], 243 | 0xde : [ 3, "dec", "absolutex" ], 244 | 0xdf : [ 3, "bbs5", "zeropagerelative", pcr ], 245 | 246 | 0xe0 : [ 2, "cpx", "immediate" ], 247 | 0xe1 : [ 2, "sbc", "indirectx" ], 248 | 0xe4 : [ 2, "cpx", "zeropage" ], 249 | 0xe5 : [ 2, "sbc", "zeropage" ], 250 | 0xe6 : [ 2, "inc", "zeropage" ], 251 | 0xe7 : [ 2, "smb6", "zeropage" ], 252 | 0xe8 : [ 1, "inx", "implicit" ], 253 | 0xe9 : [ 2, "sbc", "immediate" ], 254 | 0xea : [ 1, "nop", "implicit" ], 255 | 0xec : [ 3, "cpx", "absolute" ], 256 | 0xed : [ 3, "sbc", "absolute" ], 257 | 0xee : [ 3, "inc", "absolute" ], 258 | 0xef : [ 3, "bbs6", "zeropagerelative", pcr ], 259 | 260 | 0xf0 : [ 2, "beq", "relative", pcr ], 261 | 0xf1 : [ 2, "sbc", "indirecty" ], 262 | 0xf2 : [ 2, "sbc", "indirectzeropage" ], 263 | 0xf5 : [ 2, "sbc", "zeropagex" ], 264 | 0xf6 : [ 2, "inc", "zeropagex" ], 265 | 0xf7 : [ 2, "smb7", "zeropage" ], 266 | 0xf8 : [ 1, "sed", "implicit" ], 267 | 0xf9 : [ 3, "sbc", "absolutey" ], 268 | 0xfa : [ 1, "plx", "implicit" ], 269 | 0xfd : [ 3, "sbc", "absolutex" ], 270 | 0xfe : [ 3, "inc", "absolutex" ], 271 | 0xff : [ 3, "bbs7", "zeropagerelative", pcr ], 272 | 273 | } 274 | 275 | # End of processor specific code 276 | ########################################################################## 277 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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-------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "6502" 6 | # Description = "MOS Technology (and others) 6502 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 3 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implicit" : "", 20 | "absolute" : "${1:02X}{0:02X}", 21 | "absolutex" : "${1:02X}{0:02X},x", 22 | "absolutey" : "${1:02X}{0:02X},y", 23 | "accumulator" : "a", 24 | "immediate" : "#${0:02X}", 25 | "indirectx" : "(${0:02X},x)", 26 | "indirecty" : "(${0:02X}),y", 27 | "indirect" : "(${1:02X}{0:02X})", 28 | "relative" : "${0:04X}", 29 | "zeropage" : "${0:02X}", 30 | "zeropagex" : "${0:02X},x", 31 | "zeropagey" : "${0:02X},y", 32 | } 33 | 34 | # Op Code Table 35 | # Key is numeric opcode (possibly multiple bytes) 36 | # Value is a list: 37 | # # bytes 38 | # mnemonic 39 | # addressing mode 40 | # flags (e.g. pcr) 41 | opcodeTable = { 42 | 0x00 : [ 1, "brk", "implicit" ], 43 | 0x01 : [ 2, "ora", "indirectx" ], 44 | 0x02 : [ 1, "hlt", "implicit", und ], 45 | 0x03 : [ 2, "slo", "indirectx", und ], 46 | 0x04 : [ 2, "nop", "zeropage", und ], 47 | 0x05 : [ 2, "ora", "zeropage" ], 48 | 0x06 : [ 2, "asl", "zeropage" ], 49 | 0x07 : [ 2, "slo", "zeropage", und ], 50 | 0x08 : [ 1, "php", "implicit" ], 51 | 0x09 : [ 2, "ora", "immediate" ], 52 | 0x0a : [ 1, "asl", "accumulator" ], 53 | 0x0b : [ 2, "anc", "immediate", und ], 54 | 0x0c : [ 3, "nop", "absolute", und ], 55 | 0x0d : [ 3, "ora", "absolute" ], 56 | 0x0e : [ 3, "asl", "absolute" ], 57 | 0x0f : [ 3, "slo", "absolute", und ], 58 | 59 | 0x10 : [ 2, "bpl", "relative", pcr ], 60 | 0x11 : [ 2, "ora", "indirecty" ], 61 | 0x12 : [ 1, "hlt", "implicit", und ], 62 | 0x13 : [ 2, "slo", "indirecty", und ], 63 | 0x14 : [ 2, "nop", "zeropagex", und ], 64 | 0x15 : [ 2, "ora", "zeropagex" ], 65 | 0x16 : [ 2, "asl", "zeropagex" ], 66 | 0x17 : [ 2, "slo", "zeropagex", und ], 67 | 0x18 : [ 1, "clc", "implicit" ], 68 | 0x19 : [ 3, "ora", "absolutey" ], 69 | 0x1a : [ 1, "nop", "implicit", und ], 70 | 0x1b : [ 3, "slo", "absolutey", und ], 71 | 0x1c : [ 3, "nop", "absolutex", und ], 72 | 0x1d : [ 3, "ora", "absolutex" ], 73 | 0x1e : [ 3, "asl", "absolutex" ], 74 | 0x1f : [ 3, "slo", "absolutex", und ], 75 | 76 | 0x20 : [ 3, "jsr", "absolute" ], 77 | 0x21 : [ 2, "and", "indirectx" ], 78 | 0x22 : [ 1, "hlt", "implicit", und ], 79 | 0x23 : [ 2, "rla", "indirecty", und ], 80 | 0x24 : [ 2, "bit", "zeropage" ], 81 | 0x25 : [ 2, "and", "zeropage" ], 82 | 0x26 : [ 2, "rol", "zeropage" ], 83 | 0x27 : [ 2, "rla", "zeropage", und ], 84 | 0x28 : [ 1, "plp", "implicit" ], 85 | 0x29 : [ 2, "and", "immediate" ], 86 | 0x2a : [ 1, "rol", "accumulator" ], 87 | 0x2b : [ 2, "anc", "immediate", und ], 88 | 0x2c : [ 3, "bit", "absolute" ], 89 | 0x2d : [ 3, "and", "absolute" ], 90 | 0x2e : [ 3, "rol", "absolute" ], 91 | 0x2f : [ 3, "rla", "absolute", und ], 92 | 93 | 0x30 : [ 2, "bmi", "relative", pcr ], 94 | 0x31 : [ 2, "and", "indirecty" ], 95 | 0x32 : [ 1, "hlt", "implicit", und ], 96 | 0x34 : [ 2, "nop", "zeropagex", und ], 97 | 0x35 : [ 2, "and", "zeropagex" ], 98 | 0x36 : [ 2, "rol", "zeropagex" ], 99 | 0x37 : [ 2, "rla", "zeropagex", und ], 100 | 0x38 : [ 1, "sec", "implicit" ], 101 | 0x39 : [ 3, "and", "absolutey" ], 102 | 0x3a : [ 1, "nop", "implicit", und ], 103 | 0x3b : [ 3, "rla", "absolutey", und ], 104 | 0x3c : [ 3, "nop", "absolutex", und ], 105 | 0x3d : [ 3, "and", "absolutex" ], 106 | 0x3e : [ 3, "rol", "absolutex" ], 107 | 0x3f : [ 3, "rla", "absolutex", und ], 108 | 109 | 0x40 : [ 1, "rti", "implicit" ], 110 | 0x41 : [ 2, "eor", "indirectx" ], 111 | 0x42 : [ 1, "hlt", "implicit", und ], 112 | 0x43 : [ 2, "sre", "indirectx", und ], 113 | 0x44 : [ 2, "nop", "zeropage", und ], 114 | 0x45 : [ 2, "eor", "zeropage" ], 115 | 0x46 : [ 2, "lsr", "zeropage" ], 116 | 0x47 : [ 2, "sre", "zeropage", und ], 117 | 0x48 : [ 1, "pha", "implicit" ], 118 | 0x49 : [ 2, "eor", "immediate" ], 119 | 0x4a : [ 1, "lsr", "accumulator" ], 120 | 0x4b : [ 2, "alr", "immediate", und ], 121 | 0x4c : [ 3, "jmp", "absolute" ], 122 | 0x4d : [ 3, "eor", "absolute" ], 123 | 0x4e : [ 3, "lsr", "absolute" ], 124 | 0x4f : [ 3, "sre", "absolute", und ], 125 | 126 | 0x50 : [ 2, "bvc", "relative", pcr ], 127 | 0x51 : [ 2, "eor", "indirecty" ], 128 | 0x52 : [ 1, "hlt", "implicit", und ], 129 | 0x53 : [ 2, "sre", "indirecty", und ], 130 | 0x54 : [ 2, "nop", "zeropagex", und ], 131 | 0x55 : [ 2, "eor", "zeropagex" ], 132 | 0x56 : [ 2, "lsr", "zeropagex" ], 133 | 0x57 : [ 2, "sre", "zeropagex", und ], 134 | 0x58 : [ 1, "cli", "implicit" ], 135 | 0x59 : [ 3, "eor", "absolutey" ], 136 | 0x5a : [ 1, "nop", "implicit", und ], 137 | 0x5b : [ 3, "sre", "absolutey", und ], 138 | 0x5c : [ 3, "nop", "absolutex", und ], 139 | 0x5d : [ 3, "eor", "absolutex" ], 140 | 0x5e : [ 3, "lsr", "absolutex" ], 141 | 0x5f : [ 3, "sre", "absolutex", und ], 142 | 143 | 0x60 : [ 1, "rts", "implicit" ], 144 | 0x61 : [ 2, "adc", "indirectx" ], 145 | 0x62 : [ 1, "hlt", "implicit", und ], 146 | 0x63 : [ 2, "rra", "indirectx", und ], 147 | 0x64 : [ 2, "nop", "zeropage", und ], 148 | 0x65 : [ 2, "adc", "zeropage" ], 149 | 0x66 : [ 2, "ror", "zeropage" ], 150 | 0x67 : [ 2, "rra", "zeropage", und ], 151 | 0x68 : [ 1, "pla", "implicit" ], 152 | 0x69 : [ 2, "adc", "immediate" ], 153 | 0x6a : [ 1, "ror", "accumulator" ], 154 | 0x6b : [ 2, "arr", "immediate", und ], 155 | 0x6c : [ 3, "jmp", "indirect" ], 156 | 0x6d : [ 3, "adc", "absolute" ], 157 | 0x6e : [ 3, "ror", "absolute" ], 158 | 0x6f : [ 3, "rra", "absolute", und ], 159 | 160 | 0x70 : [ 2, "bvs", "relative", pcr ], 161 | 0x71 : [ 2, "adc", "indirecty" ], 162 | 0x72 : [ 1, "hlt", "implicit", und ], 163 | 0x73 : [ 2, "rra", "indirecty", und ], 164 | 0x74 : [ 2, "nop", "zeropagex", und ], 165 | 0x75 : [ 2, "adc", "zeropagex" ], 166 | 0x76 : [ 2, "ror", "zeropagex" ], 167 | 0x77 : [ 2, "rra", "zeropagex", und ], 168 | 0x78 : [ 1, "sei", "implicit" ], 169 | 0x79 : [ 3, "adc", "absolutey" ], 170 | 0x7a : [ 1, "nop", "implicit", und ], 171 | 0x7b : [ 3, "rra", "absolutey", und ], 172 | 0x7c : [ 3, "nop", "absolutex", und ], 173 | 0x7d : [ 3, "adc", "absolutex" ], 174 | 0x7e : [ 3, "ror", "absolutex" ], 175 | 0x7f : [ 3, "rra", "absolutex", und ], 176 | 177 | 0x80 : [ 2, "nop", "immediate", und ], 178 | 0x81 : [ 2, "sta", "indirectx" ], 179 | 0x82 : [ 2, "nop", "immediate", und ], 180 | 0x83 : [ 2, "sax", "indirectx", und ], 181 | 0x84 : [ 2, "sty", "zeropage" ], 182 | 0x85 : [ 2, "sta", "zeropage" ], 183 | 0x86 : [ 2, "stx", "zeropage" ], 184 | 0x87 : [ 2, "sax", "zeropage", und ], 185 | 0x88 : [ 1, "dey", "implicit" ], 186 | 0x89 : [ 2, "nop", "immediate", und ], 187 | 0x8a : [ 1, "txa", "implicit" ], 188 | 0x8b : [ 2, "xaa", "immediate", und ], 189 | 0x8c : [ 3, "sty", "absolute" ], 190 | 0x8d : [ 3, "sta", "absolute" ], 191 | 0x8e : [ 3, "stx", "absolute" ], 192 | 0x8f : [ 3, "sax", "absolute", und ], 193 | 194 | 0x90 : [ 2, "bcc", "relative", pcr ], 195 | 0x91 : [ 2, "sta", "indirecty" ], 196 | 0x92 : [ 1, "hlt", "implicit", und ], 197 | 0x93 : [ 2, "sha", "indirecty", und ], 198 | 0x94 : [ 2, "sty", "zeropagex" ], 199 | 0x95 : [ 2, "sta", "zeropagex" ], 200 | 0x96 : [ 2, "stx", "zeropagey" ], 201 | 0x97 : [ 2, "sax", "zeropagey", und ], 202 | 0x98 : [ 1, "tya", "implicit" ], 203 | 0x99 : [ 3, "sta", "absolutey" ], 204 | 0x9a : [ 1, "txs", "implicit" ], 205 | 0x9b : [ 3, "shs", "absolutey", und ], 206 | 0x9c : [ 3, "shy", "absolutex", und ], 207 | 0x9d : [ 3, "sta", "absolutex" ], 208 | 0x9e : [ 3, "shx", "absolutey", und ], 209 | 0x9f : [ 3, "sha", "absolutey", und ], 210 | 211 | 0xa0 : [ 2, "ldy", "immediate" ], 212 | 0xa1 : [ 2, "lda", "indirectx" ], 213 | 0xa2 : [ 2, "ldx", "immediate" ], 214 | 0xa3 : [ 2, "lax", "indirectx", und ], 215 | 0xa4 : [ 2, "ldy", "zeropage" ], 216 | 0xa5 : [ 2, "lda", "zeropage" ], 217 | 0xa6 : [ 2, "ldx", "zeropage" ], 218 | 0xa7 : [ 2, "lax", "zeropage", und ], 219 | 0xa8 : [ 1, "tay", "implicit" ], 220 | 0xa9 : [ 2, "lda", "immediate" ], 221 | 0xaa : [ 1, "tax", "implicit" ], 222 | 0xab : [ 2, "atx", "immediate", und ], 223 | 0xac : [ 3, "ldy", "absolute" ], 224 | 0xad : [ 3, "lda", "absolute" ], 225 | 0xae : [ 3, "ldx", "absolute" ], 226 | 0xaf : [ 3, "lax", "absolute", und ], 227 | 228 | 0xb0 : [ 2, "bcs", "relative", pcr ], 229 | 0xb1 : [ 2, "lda", "indirecty" ], 230 | 0xb2 : [ 1, "hlt", "implicit", und ], 231 | 0xb3 : [ 2, "lax", "indirecty", und ], 232 | 0xb4 : [ 2, "ldy", "zeropagex" ], 233 | 0xb5 : [ 2, "lda", "zeropagex" ], 234 | 0xb6 : [ 2, "ldx", "zeropagey" ], 235 | 0xb7 : [ 2, "lax", "zeropagey", und ], 236 | 0xb8 : [ 1, "clv", "implicit" ], 237 | 0xb9 : [ 3, "lda", "absolutey" ], 238 | 0xba : [ 1, "tsx", "implicit" ], 239 | 0xbb : [ 3, "lar", "absolutey", und ], 240 | 0xbc : [ 3, "ldy", "absolutex" ], 241 | 0xbd : [ 3, "lda", "absolutex" ], 242 | 0xbe : [ 3, "ldx", "absolutey" ], 243 | 0xbf : [ 3, "lax", "absolutey", und ], 244 | 245 | 0xc0 : [ 2, "cpy", "immediate" ], 246 | 0xc1 : [ 2, "cmp", "indirectx" ], 247 | 0xc2 : [ 2, "nop", "immediate", und ], 248 | 0xc3 : [ 2, "dcp", "indirectx", und ], 249 | 0xc4 : [ 2, "cpy", "zeropage" ], 250 | 0xc5 : [ 2, "cmp", "zeropage" ], 251 | 0xc6 : [ 2, "dec", "zeropage" ], 252 | 0xc7 : [ 2, "dcp", "zeropage", und ], 253 | 0xc8 : [ 1, "iny", "implicit" ], 254 | 0xc9 : [ 2, "cmp", "immediate" ], 255 | 0xca : [ 1, "dex", "implicit" ], 256 | 0xcb : [ 2, "sbx", "immediate", und ], 257 | 0xcc : [ 3, "cpy", "absolute" ], 258 | 0xcd : [ 3, "cmp", "absolute" ], 259 | 0xce : [ 3, "dec", "absolute" ], 260 | 0xcf : [ 3, "dcp", "absolute", und ], 261 | 262 | 0xd0 : [ 2, "bne", "relative", pcr ], 263 | 0xd1 : [ 2, "cmp", "indirecty" ], 264 | 0xd2 : [ 1, "hlt", "implicit", und ], 265 | 0xd3 : [ 2, "dcp", "indirecty", und ], 266 | 0xd4 : [ 2, "nop", "zeropagex", und ], 267 | 0xd5 : [ 2, "cmp", "zeropagex" ], 268 | 0xd6 : [ 2, "dec", "zeropagex" ], 269 | 0xd7 : [ 2, "dcp", "zeropagex", und ], 270 | 0xd8 : [ 1, "cld", "implicit" ], 271 | 0xd9 : [ 3, "cmp", "absolutey" ], 272 | 0xda : [ 1, "nop", "implicit", und ], 273 | 0xdb : [ 3, "dcp", "absolutey", und ], 274 | 0xdc : [ 3, "nop", "absolutex", und ], 275 | 0xdd : [ 3, "cmp", "absolutex" ], 276 | 0xde : [ 3, "dec", "absolutex" ], 277 | 0xdf : [ 3, "dcp", "absolutex", und ], 278 | 279 | 0xe0 : [ 2, "cpx", "immediate" ], 280 | 0xe1 : [ 2, "sbc", "indirectx" ], 281 | 0xe2 : [ 2, "nop", "immediate", und ], 282 | 0xe3 : [ 2, "isc", "indirectx", und ], 283 | 0xe4 : [ 2, "cpx", "zeropage" ], 284 | 0xe5 : [ 2, "sbc", "zeropage" ], 285 | 0xe6 : [ 2, "inc", "zeropage" ], 286 | 0xe7 : [ 2, "isc", "zeropage", und ], 287 | 0xe8 : [ 1, "inx", "implicit" ], 288 | 0xe9 : [ 2, "sbc", "immediate" ], 289 | 0xea : [ 1, "nop", "implicit" ], 290 | 0xeb : [ 2, "sbc", "immediate", und ], 291 | 0xec : [ 3, "cpx", "absolute" ], 292 | 0xed : [ 3, "sbc", "absolute" ], 293 | 0xee : [ 3, "inc", "absolute" ], 294 | 0xef : [ 3, "isc", "absolute", und ], 295 | 296 | 0xf0 : [ 2, "beq", "relative", pcr ], 297 | 0xf1 : [ 2, "sbc", "indirecty" ], 298 | 0xf2 : [ 1, "hlt", "implicit", und ], 299 | 0xf3 : [ 2, "isc", "indirecty", und ], 300 | 0xf4 : [ 2, "nop", "zeropagex", und ], 301 | 0xf5 : [ 2, "sbc", "zeropagex" ], 302 | 0xf6 : [ 2, "inc", "zeropagex" ], 303 | 0xf7 : [ 2, "isc", "zeropagex", und ], 304 | 0xf8 : [ 1, "sed", "implicit" ], 305 | 0xf9 : [ 3, "sbc", "absolutey" ], 306 | 0xfa : [ 1, "nop", "implicit", und ], 307 | 0xfb : [ 3, "isc", "absolutey", und ], 308 | 0xfc : [ 3, "nop", "absolutex", und ], 309 | 0xfd : [ 3, "sbc", "absolutex" ], 310 | 0xfe : [ 3, "inc", "absolutex" ], 311 | 0xff : [ 3, "isc", "absolutex", und ], 312 | 313 | } 314 | 315 | # End of processor specific code 316 | ########################################################################## 317 | -------------------------------------------------------------------------------- /1802.py: -------------------------------------------------------------------------------- 1 | ######################################################################### 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "1802" 6 | # Description = "RCA 1802 COSMAC 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | # 10 | # See: 11 | # https://en.wikipedia.org/wiki/RCA_1802 12 | # https://www.atarimagazines.com/computeii/issue3/page52.php 13 | # http://www.massmind.org/techref/1802/index.htm 14 | # https://www.bgmicro.com/pdf/elf%20manual.pdf 15 | 16 | # Maximum length of an instruction (for formatting purposes) 17 | maxLength = 3 18 | 19 | # Leadin bytes for multibyte instructions 20 | leadInBytes = [] 21 | 22 | # Addressing mode table 23 | # List of addressing modes and corresponding format strings for operands. 24 | addressModeTable = { 25 | "one" : "", 26 | "two" : "${0:02X}", 27 | "three" : "${0:02X}{1:02X}", 28 | } 29 | 30 | 31 | # Op Code Table 32 | # Key is numeric opcode (possibly multiple bytes) 33 | # Value is a list: 34 | # # bytes 35 | # mnemonic 36 | # addressing mode 37 | # flags (e.g. pcr) 38 | opcodeTable = { 39 | 0x00 : [ 1, "idl", "one" ], 40 | 0x01 : [ 1, "ld 1", "one" ], 41 | 0x02 : [ 1, "ld 2", "one" ], 42 | 0x03 : [ 1, "ld 3", "one" ], 43 | 0x04 : [ 1, "ld 4", "one" ], 44 | 0x05 : [ 1, "ld 5", "one" ], 45 | 0x06 : [ 1, "ld 6", "one" ], 46 | 0x07 : [ 1, "ld 7", "one" ], 47 | 0x08 : [ 1, "ld 8", "one" ], 48 | 0x09 : [ 1, "ld 9", "one" ], 49 | 0x0a : [ 1, "ld 10", "one" ], 50 | 0x0b : [ 1, "ld 11", "one" ], 51 | 0x0c : [ 1, "ld 12", "one" ], 52 | 0x0d : [ 1, "ld 13", "one" ], 53 | 0x0e : [ 1, "ld 14", "one" ], 54 | 0x0f : [ 1, "ld 15", "one" ], 55 | 56 | 0x10 : [ 1, "inc 0", "one" ], 57 | 0x11 : [ 1, "inc 1", "one" ], 58 | 0x12 : [ 1, "inc 2", "one" ], 59 | 0x13 : [ 1, "inc 3", "one" ], 60 | 0x14 : [ 1, "inc 4", "one" ], 61 | 0x15 : [ 1, "inc 5", "one" ], 62 | 0x16 : [ 1, "inc 6", "one" ], 63 | 0x17 : [ 1, "inc 7", "one" ], 64 | 0x18 : [ 1, "inc 8", "one" ], 65 | 0x19 : [ 1, "inc 9", "one" ], 66 | 0x1a : [ 1, "inc 10", "one" ], 67 | 0x1b : [ 1, "inc 11", "one" ], 68 | 0x1c : [ 1, "inc 12", "one" ], 69 | 0x1d : [ 1, "inc 13", "one" ], 70 | 0x1e : [ 1, "inc 14", "one" ], 71 | 0x1f : [ 1, "inc 15", "one" ], 72 | 73 | 0x20 : [ 1, "dec 0", "one" ], 74 | 0x21 : [ 1, "dec 1", "one" ], 75 | 0x22 : [ 1, "dec 2", "one" ], 76 | 0x23 : [ 1, "dec 3", "one" ], 77 | 0x24 : [ 1, "dec 4", "one" ], 78 | 0x25 : [ 1, "dec 5", "one" ], 79 | 0x26 : [ 1, "dec 6", "one" ], 80 | 0x27 : [ 1, "dec 7", "one" ], 81 | 0x28 : [ 1, "dec 8", "one" ], 82 | 0x29 : [ 1, "dec 9", "one" ], 83 | 0x2a : [ 1, "dec 10", "one" ], 84 | 0x2b : [ 1, "dec 11", "one" ], 85 | 0x2c : [ 1, "dec 12", "one" ], 86 | 0x2d : [ 1, "dec 13", "one" ], 87 | 0x2e : [ 1, "dec 14", "one" ], 88 | 0x2f : [ 1, "dec 15", "one" ], 89 | 90 | 0x30 : [ 2, "br", "two" ], 91 | 0x31 : [ 2, "bq", "two" ], 92 | 0x32 : [ 2, "bz", "two" ], 93 | 0x33 : [ 2, "bdf", "two" ], 94 | 0x34 : [ 2, "b1", "two" ], 95 | 0x35 : [ 2, "b2", "two" ], 96 | 0x36 : [ 2, "b3", "two" ], 97 | 0x37 : [ 2, "b4", "two" ], 98 | 0x38 : [ 2, "nbr", "two" ], 99 | #0x38: [ 2, "skp", "two" ], Alternate mnemonic for above 100 | 0x39 : [ 2, "bnq", "two" ], 101 | 0x3a : [ 2, "bnz", "two" ], 102 | 0x3b : [ 2, "bnf", "two" ], 103 | 0x3c : [ 2, "bn1", "two" ], 104 | 0x3d : [ 2, "bn2", "two" ], 105 | 0x3e : [ 2, "bn3", "two" ], 106 | 0x3f : [ 2, "bn4", "two" ], 107 | 108 | 0x40 : [ 1, "lda 0", "one" ], 109 | 0x41 : [ 1, "lda 1", "one" ], 110 | 0x42 : [ 1, "lda 2", "one" ], 111 | 0x43 : [ 1, "lda 3", "one" ], 112 | 0x44 : [ 1, "lda 4", "one" ], 113 | 0x45 : [ 1, "lda 5", "one" ], 114 | 0x46 : [ 1, "lda 6", "one" ], 115 | 0x47 : [ 1, "lda 7", "one" ], 116 | 0x48 : [ 1, "lda 8", "one" ], 117 | 0x49 : [ 1, "lda 9", "one" ], 118 | 0x4a : [ 1, "lda 10", "one" ], 119 | 0x4b : [ 1, "lda 11", "one" ], 120 | 0x4c : [ 1, "lda 12", "one" ], 121 | 0x4d : [ 1, "lda 13", "one" ], 122 | 0x4e : [ 1, "lda 14", "one" ], 123 | 0x4f : [ 1, "lda 15", "one" ], 124 | 125 | 0x50 : [ 1, "str 0", "one" ], 126 | 0x51 : [ 1, "str 1", "one" ], 127 | 0x52 : [ 1, "str 2", "one" ], 128 | 0x53 : [ 1, "str 3", "one" ], 129 | 0x54 : [ 1, "str 4", "one" ], 130 | 0x55 : [ 1, "str 5", "one" ], 131 | 0x56 : [ 1, "str 6", "one" ], 132 | 0x57 : [ 1, "str 7", "one" ], 133 | 0x58 : [ 1, "str 8", "one" ], 134 | 0x59 : [ 1, "str 9", "one" ], 135 | 0x5a : [ 1, "str 10", "one" ], 136 | 0x5b : [ 1, "str 11", "one" ], 137 | 0x5c : [ 1, "str 12", "one" ], 138 | 0x5d : [ 1, "str 13", "one" ], 139 | 0x5e : [ 1, "str 14", "one" ], 140 | 0x5f : [ 1, "str 15", "one" ], 141 | 142 | 0x60 : [ 1, "irx", "one" ], 143 | 0x61 : [ 1, "out 1", "one" ], 144 | 0x62 : [ 1, "out 2", "one" ], 145 | 0x63 : [ 1, "out 3", "one" ], 146 | 0x64 : [ 2, "out 4", "two" ], 147 | 0x65 : [ 1, "out 5", "one" ], 148 | 0x66 : [ 1, "out 6", "one" ], 149 | 0x67 : [ 1, "out 7", "one" ], 150 | 151 | 0x69 : [ 1, "inp 1", "one" ], 152 | 0x6a : [ 1, "inp 2", "one" ], 153 | 0x6b : [ 1, "inp 3", "one" ], 154 | 0x6c : [ 1, "inp 4", "one" ], 155 | 0x6d : [ 1, "inp 5", "one" ], 156 | 0x6e : [ 1, "inp 6", "one" ], 157 | 0x6f : [ 1, "inp 7", "one" ], 158 | 159 | 0x70 : [ 1, "ret", "one" ], 160 | 0x71 : [ 1, "dis", "one" ], 161 | 0x72 : [ 1, "ldxa", "one" ], 162 | 0x73 : [ 1, "stxd", "one" ], 163 | 0x74 : [ 1, "adc", "one" ], 164 | 0x75 : [ 1, "sdb", "one" ], 165 | 0x76 : [ 1, "rshr", "one" ], 166 | 0x77 : [ 1, "smb", "one" ], 167 | 0x78 : [ 1, "sav", "one" ], 168 | 0x79 : [ 1, "mark", "one" ], 169 | 0x7a : [ 1, "req", "one" ], 170 | 0x7b : [ 1, "seq", "one" ], 171 | 0x7c : [ 1, "adci", "one" ], 172 | 0x7d : [ 1, "sdbi", "one" ], 173 | 0x7e : [ 1, "rshl", "one" ], 174 | 0x7f : [ 1, "smbi", "one" ], 175 | 176 | 0x80 : [ 1, "glo 0", "one" ], 177 | 0x81 : [ 1, "glo 1", "one" ], 178 | 0x82 : [ 1, "glo 2", "one" ], 179 | 0x83 : [ 1, "glo 3", "one" ], 180 | 0x84 : [ 1, "glo 4", "one" ], 181 | 0x85 : [ 1, "glo 5", "one" ], 182 | 0x86 : [ 1, "glo 6", "one" ], 183 | 0x87 : [ 1, "glo 7", "one" ], 184 | 0x88 : [ 1, "glo 8", "one" ], 185 | 0x89 : [ 1, "glo 9", "one" ], 186 | 0x8a : [ 1, "glo 10", "one" ], 187 | 0x8b : [ 1, "glo 11", "one" ], 188 | 0x8c : [ 1, "glo 12", "one" ], 189 | 0x8d : [ 1, "glo 13", "one" ], 190 | 0x8e : [ 1, "glo 14", "one" ], 191 | 0x8f : [ 1, "glo 15", "one" ], 192 | 193 | 0x90 : [ 1, "ghi 0", "one" ], 194 | 0x91 : [ 1, "ghi 1", "one" ], 195 | 0x92 : [ 1, "ghi 2", "one" ], 196 | 0x93 : [ 1, "ghi 3", "one" ], 197 | 0x94 : [ 1, "ghi 4", "one" ], 198 | 0x95 : [ 1, "ghi 5", "one" ], 199 | 0x96 : [ 1, "ghi 6", "one" ], 200 | 0x97 : [ 1, "ghi 7", "one" ], 201 | 0x98 : [ 1, "ghi 8", "one" ], 202 | 0x99 : [ 1, "ghi 9", "one" ], 203 | 0x9a : [ 1, "ghi 10", "one" ], 204 | 0x9b : [ 1, "ghi 11", "one" ], 205 | 0x9c : [ 1, "ghi 12", "one" ], 206 | 0x9d : [ 1, "ghi 13", "one" ], 207 | 0x9e : [ 1, "ghi 14", "one" ], 208 | 0x9f : [ 1, "ghi 15", "one" ], 209 | 210 | 0xa0 : [ 1, "plo 0", "one" ], 211 | 0xa1 : [ 1, "plo 1", "one" ], 212 | 0xa2 : [ 1, "plo 2", "one" ], 213 | 0xa3 : [ 1, "plo 3", "one" ], 214 | 0xa4 : [ 1, "plo 4", "one" ], 215 | 0xa5 : [ 1, "plo 5", "one" ], 216 | 0xa6 : [ 1, "plo 6", "one" ], 217 | 0xa7 : [ 1, "plo 7", "one" ], 218 | 0xa8 : [ 1, "plo 8", "one" ], 219 | 0xa9 : [ 1, "plo 9", "one" ], 220 | 0xaa : [ 1, "plo 10", "one" ], 221 | 0xab : [ 1, "plo 11", "one" ], 222 | 0xac : [ 1, "plo 12", "one" ], 223 | 0xad : [ 1, "plo 13", "one" ], 224 | 0xae : [ 1, "plo 14", "one" ], 225 | 0xaf : [ 1, "plo 15", "one" ], 226 | 227 | 0xb0 : [ 1, "phi 0", "one" ], 228 | 0xb1 : [ 1, "phi 1", "one" ], 229 | 0xb2 : [ 1, "phi 2", "one" ], 230 | 0xb3 : [ 1, "phi 3", "one" ], 231 | 0xb4 : [ 1, "phi 4", "one" ], 232 | 0xb5 : [ 1, "phi 5", "one" ], 233 | 0xb6 : [ 1, "phi 6", "one" ], 234 | 0xb7 : [ 1, "phi 7", "one" ], 235 | 0xb8 : [ 1, "phi 8", "one" ], 236 | 0xb9 : [ 1, "phi 9", "one" ], 237 | 0xba : [ 1, "phi 10", "one" ], 238 | 0xbb : [ 1, "phi 11", "one" ], 239 | 0xbc : [ 1, "phi 12", "one" ], 240 | 0xbd : [ 1, "phi 13", "one" ], 241 | 0xbe : [ 1, "phi 14", "one" ], 242 | 0xbf : [ 1, "phi 15", "one" ], 243 | 244 | 0xc0 : [ 3, "lbr", "three" ], 245 | 0xc1 : [ 3, "lbq", "three" ], 246 | 0xc2 : [ 3, "lbz", "three" ], 247 | 0xc3 : [ 3, "lbdf", "three" ], 248 | 0xc4 : [ 1, "nop", "one" ], 249 | 0xc5 : [ 3, "lsnq", "three" ], 250 | 0xc6 : [ 3, "lsnz", "three" ], 251 | 0xc7 : [ 3, "lsnf", "three" ], 252 | 0xc8 : [ 3, "lskp", "three" ], 253 | 0xc9 : [ 3, "lbnq", "three" ], 254 | 0xca : [ 3, "lbnz", "three" ], 255 | 0xcb : [ 3, "lbnf", "three" ], 256 | 0xcc : [ 3, "lsie", "three" ], 257 | 0xcd : [ 3, "lsq", "three" ], 258 | 0xce : [ 3, "lsz", "three" ], 259 | 0xcf : [ 3, "lsdf", "three" ], 260 | 261 | 0xd0 : [ 1, "sep 0", "one" ], 262 | 0xd1 : [ 1, "sep 1", "one" ], 263 | 0xd2 : [ 1, "sep 2", "one" ], 264 | 0xd3 : [ 1, "sep 3", "one" ], 265 | 0xd4 : [ 1, "sep 4", "one" ], 266 | 0xd5 : [ 1, "sep 5", "one" ], 267 | 0xd6 : [ 1, "sep 6", "one" ], 268 | 0xd7 : [ 1, "sep 7", "one" ], 269 | 0xd8 : [ 1, "sep 8", "one" ], 270 | 0xd9 : [ 1, "sep 9", "one" ], 271 | 0xda : [ 1, "sep 10", "one" ], 272 | 0xdb : [ 1, "sep 11", "one" ], 273 | 0xdc : [ 1, "sep 12", "one" ], 274 | 0xdd : [ 1, "sep 13", "one" ], 275 | 0xde : [ 1, "sep 14", "one" ], 276 | 0xdf : [ 1, "sep 15", "one" ], 277 | 278 | 0xe0 : [ 1, "sex 0", "one" ], 279 | 0xe1 : [ 1, "sex 1", "one" ], 280 | 0xe2 : [ 1, "sex 2", "one" ], 281 | 0xe3 : [ 1, "sex 3", "one" ], 282 | 0xe4 : [ 1, "sex 4", "one" ], 283 | 0xe5 : [ 1, "sex 5", "one" ], 284 | 0xe6 : [ 1, "sex 6", "one" ], 285 | 0xe7 : [ 1, "sex 7", "one" ], 286 | 0xe8 : [ 1, "sex 8", "one" ], 287 | 0xe9 : [ 1, "sex 9", "one" ], 288 | 0xea : [ 1, "sex 10", "one" ], 289 | 0xeb : [ 1, "sex 11", "one" ], 290 | 0xec : [ 1, "sex 12", "one" ], 291 | 0xed : [ 1, "sex 13", "one" ], 292 | 0xee : [ 1, "sex 14", "one" ], 293 | 0xef : [ 1, "sex 15", "one" ], 294 | 295 | 0xf0 : [ 1, "ldx", "one" ], 296 | 0xf1 : [ 1, "or", "one" ], 297 | 0xf2 : [ 1, "and", "one" ], 298 | 0xf3 : [ 1, "xor", "one" ], 299 | 0xf4 : [ 1, "add", "one" ], 300 | 0xf5 : [ 1, "sd", "one" ], 301 | 0xf6 : [ 1, "shr", "one" ], 302 | 0xf7 : [ 1, "sm", "one" ], 303 | 0xf8 : [ 2, "ldi", "two" ], 304 | 0xf9 : [ 2, "ori", "two" ], 305 | 0xfa : [ 2, "ani", "two" ], 306 | 0xfb : [ 2, "xri", "two" ], 307 | 0xfc : [ 2, "adi", "two" ], 308 | 0xfd : [ 2, "sdi", "two" ], 309 | 0xfe : [ 2, "shl", "two" ], 310 | 0xff : [ 2, "smi", "two" ], 311 | 312 | } 313 | 314 | # End of processor specific code 315 | ########################################################################## 316 | -------------------------------------------------------------------------------- /8080.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "8080" 6 | # Description = "Intel 8080 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 3 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implied" : "", 20 | "rega" : "a", 21 | "regb" : "b", 22 | "regc" : "c", 23 | "regd" : "d", 24 | "rege" : "e", 25 | "regh" : "h", 26 | "regl" : "l", 27 | "regm" : "m", 28 | "regsp" : "sp", 29 | "regbb" : "b,b", 30 | "regbc" : "b,c", 31 | "regbd" : "b,d", 32 | "regbe" : "b,e", 33 | "regbh" : "b,h", 34 | "regbl" : "b,l", 35 | "regbm" : "b,m", 36 | "regba" : "b,a", 37 | "regcb" : "c,b", 38 | "regcc" : "c,c", 39 | "regcd" : "c,d", 40 | "regce" : "c,e", 41 | "regch" : "c,h", 42 | "regcl" : "c,l", 43 | "regcm" : "c,m", 44 | "regca" : "c,a", 45 | "regdb" : "d,b", 46 | "regdc" : "d,c", 47 | "regdd" : "d,d", 48 | "regde" : "d,e", 49 | "regdh" : "d,h", 50 | "regdl" : "d,l", 51 | "regdm" : "d,m", 52 | "regda" : "d,a", 53 | "regeb" : "e,b", 54 | "regec" : "e,c", 55 | "reged" : "e,d", 56 | "regee" : "e,e", 57 | "regeh" : "e,h", 58 | "regel" : "e,l", 59 | "regem" : "e,m", 60 | "regea" : "e,a", 61 | "reghb" : "h,b", 62 | "reghc" : "h,c", 63 | "reghd" : "h,d", 64 | "reghe" : "h,e", 65 | "reghh" : "h,h", 66 | "reghl" : "h,l", 67 | "reghm" : "h,m", 68 | "regha" : "h,a", 69 | "reglb" : "l,b", 70 | "reglc" : "l,c", 71 | "regld" : "l,d", 72 | "regle" : "l,e", 73 | "reglh" : "l,h", 74 | "regll" : "l,l", 75 | "reglm" : "l,m", 76 | "regla" : "l,a", 77 | "regmb" : "m,b", 78 | "regmc" : "m,c", 79 | "regmd" : "m,d", 80 | "regme" : "m,e", 81 | "regmh" : "m,h", 82 | "regml" : "m,l", 83 | "regma" : "m,a", 84 | "regab" : "a,b", 85 | "regac" : "a,c", 86 | "regad" : "a,d", 87 | "regae" : "a,e", 88 | "regah" : "a,h", 89 | "regal" : "a,l", 90 | "regam" : "a,m", 91 | "regaa" : "a,a", 92 | "regpsw" : "psw", 93 | "imm" : "${0:02X}", 94 | "imma" : "a,${0:02X}", 95 | "immb" : "b,${0:02X}", 96 | "immc" : "c,${0:02X}", 97 | "immd" : "d,${0:02X}", 98 | "imme" : "e,${0:02X}", 99 | "immh" : "h,${0:02X}", 100 | "imml" : "l,${0:02X}", 101 | "immm" : "m,${0:02X}", 102 | "immxb" : "b,${1:02X}{0:02X}", 103 | "immxd" : "d,${1:02X}{0:02X}", 104 | "immxh" : "h,${1:02X}{0:02X}", 105 | "immxsp" : "sp,${1:02X}{0:02X}", 106 | "direct" : "${1:02X}{0:02X}", 107 | "0" : "0", 108 | "1" : "1", 109 | "2" : "2", 110 | "3" : "3", 111 | "4" : "4", 112 | "5" : "5", 113 | "6" : "6", 114 | "7" : "7", 115 | } 116 | 117 | # Op Code Table 118 | # Key is numeric opcode (possibly multiple bytes) 119 | # Value is a list: 120 | # # bytes 121 | # mnemonic 122 | # addressing mode 123 | # flags (e.g. pcr) 124 | opcodeTable = { 125 | 126 | 0x00 : [ 1, "nop", "implied" ], 127 | 0x01 : [ 3, "lxi", "immxb" ], 128 | 0x02 : [ 1, "stax", "regb" ], 129 | 0x03 : [ 1, "inx", "regb" ], 130 | 0x04 : [ 1, "inr", "regb" ], 131 | 0x05 : [ 1, "dcr", "regb" ], 132 | 0x06 : [ 2, "mvi", "immb" ], 133 | 0x07 : [ 1, "rlc", "implied" ], 134 | 0x09 : [ 1, "dad", "regb" ], 135 | 0x0a : [ 1, "ldax", "regb" ], 136 | 0x0b : [ 1, "dcx", "regb" ], 137 | 0x0c : [ 1, "inr", "regc" ], 138 | 0x0d : [ 1, "dcr", "regc" ], 139 | 0x0e : [ 2, "mvi", "immc" ], 140 | 0x0f : [ 1, "rrc", "implied" ], 141 | 142 | 0x11 : [ 3, "lxi", "immxd" ], 143 | 0x12 : [ 1, "stax", "regd" ], 144 | 0x13 : [ 1, "inx", "regd" ], 145 | 0x14 : [ 1, "inr", "regd" ], 146 | 0x15 : [ 1, "dcr", "regd" ], 147 | 0x16 : [ 2, "mvi", "immd" ], 148 | 0x17 : [ 1, "ral", "implied" ], 149 | 0x19 : [ 1, "dad", "regd" ], 150 | 0x1a : [ 1, "ldax", "regd" ], 151 | 0x1b : [ 1, "dcx", "regd" ], 152 | 0x1c : [ 1, "inr", "rege" ], 153 | 0x1d : [ 1, "dcr", "rege" ], 154 | 0x1e : [ 2, "mvi", "imme" ], 155 | 0x1f : [ 1, "rar", "implied" ], 156 | 157 | 0x21 : [ 3, "lxi", "immxh" ], 158 | 0x22 : [ 3, "shld", "direct" ], 159 | 0x23 : [ 1, "inx", "regh" ], 160 | 0x24 : [ 1, "inr", "regh" ], 161 | 0x25 : [ 1, "dcr", "regh" ], 162 | 0x26 : [ 2, "mvi", "immh" ], 163 | 0x27 : [ 1, "daa", "implied" ], 164 | 0x29 : [ 1, "dad", "regh" ], 165 | 0x2a : [ 3, "lhld", "direct" ], 166 | 0x2b : [ 1, "dcx", "regh" ], 167 | 0x2c : [ 1, "inr", "regl" ], 168 | 0x2d : [ 1, "dcr", "regl" ], 169 | 0x2e : [ 2, "mvi", "imml" ], 170 | 0x2f : [ 1, "cma", "implied" ], 171 | 172 | 0x31 : [ 3, "lxi", "immxsp" ], 173 | 0x32 : [ 3, "sta", "direct" ], 174 | 0x33 : [ 1, "inx", "regsp" ], 175 | 0x34 : [ 1, "inr", "regm" ], 176 | 0x35 : [ 1, "dcr", "regm" ], 177 | 0x36 : [ 2, "mvi", "immm" ], 178 | 0x37 : [ 1, "stc", "implied" ], 179 | 0x39 : [ 1, "dad", "regsp" ], 180 | 0x3a : [ 3, "lda", "direct" ], 181 | 0x3b : [ 1, "dcx", "regsp" ], 182 | 0x3c : [ 1, "inr", "rega" ], 183 | 0x3d : [ 1, "dcr", "rega" ], 184 | 0x3e : [ 2, "mvi", "imma" ], 185 | 0x3f : [ 1, "cmc", "implied" ], 186 | 187 | 0x40 : [ 1, "mov", "regbb" ], 188 | 0x41 : [ 1, "mov", "regbc" ], 189 | 0x42 : [ 1, "mov", "regbd" ], 190 | 0x43 : [ 1, "mov", "regbe" ], 191 | 0x44 : [ 1, "mov", "regbh" ], 192 | 0x45 : [ 1, "mov", "regbl" ], 193 | 0x46 : [ 1, "mov", "regbm" ], 194 | 0x47 : [ 1, "mov", "regba" ], 195 | 0x48 : [ 1, "mov", "regcb" ], 196 | 0x49 : [ 1, "mov", "regcc" ], 197 | 0x4a : [ 1, "mov", "regcd" ], 198 | 0x4b : [ 1, "mov", "regce" ], 199 | 0x4c : [ 1, "mov", "regch" ], 200 | 0x4d : [ 1, "mov", "regcl" ], 201 | 0x4e : [ 1, "mov", "regcm" ], 202 | 0x4f : [ 1, "mov", "regca" ], 203 | 204 | 0x50 : [ 1, "mov", "regdb" ], 205 | 0x51 : [ 1, "mov", "regdc" ], 206 | 0x52 : [ 1, "mov", "regdd" ], 207 | 0x53 : [ 1, "mov", "regde" ], 208 | 0x54 : [ 1, "mov", "regdh" ], 209 | 0x55 : [ 1, "mov", "regdl" ], 210 | 0x56 : [ 1, "mov", "regdm" ], 211 | 0x57 : [ 1, "mov", "regda" ], 212 | 0x58 : [ 1, "mov", "regeb" ], 213 | 0x59 : [ 1, "mov", "regec" ], 214 | 0x5a : [ 1, "mov", "reged" ], 215 | 0x5b : [ 1, "mov", "regee" ], 216 | 0x5c : [ 1, "mov", "regeh" ], 217 | 0x5d : [ 1, "mov", "regel" ], 218 | 0x5e : [ 1, "mov", "regem" ], 219 | 0x5f : [ 1, "mov", "regea" ], 220 | 221 | 0x60 : [ 1, "mov", "reghb" ], 222 | 0x61 : [ 1, "mov", "reghc" ], 223 | 0x62 : [ 1, "mov", "reghd" ], 224 | 0x63 : [ 1, "mov", "reghe" ], 225 | 0x64 : [ 1, "mov", "reghh" ], 226 | 0x65 : [ 1, "mov", "reghl" ], 227 | 0x66 : [ 1, "mov", "reghm" ], 228 | 0x67 : [ 1, "mov", "regha" ], 229 | 0x68 : [ 1, "mov", "reglb" ], 230 | 0x69 : [ 1, "mov", "reglc" ], 231 | 0x6a : [ 1, "mov", "regld" ], 232 | 0x6b : [ 1, "mov", "regle" ], 233 | 0x6c : [ 1, "mov", "reglh" ], 234 | 0x6d : [ 1, "mov", "regll" ], 235 | 0x6e : [ 1, "mov", "reglm" ], 236 | 0x6f : [ 1, "mov", "regla" ], 237 | 238 | 0x70 : [ 1, "mov", "regmb" ], 239 | 0x71 : [ 1, "mov", "regmc" ], 240 | 0x72 : [ 1, "mov", "regmd" ], 241 | 0x73 : [ 1, "mov", "regme" ], 242 | 0x74 : [ 1, "mov", "regmh" ], 243 | 0x75 : [ 1, "mov", "regml" ], 244 | 0x76 : [ 1, "hlt", "implied" ], 245 | 0x77 : [ 1, "mov", "regma" ], 246 | 0x78 : [ 1, "mov", "regab" ], 247 | 0x79 : [ 1, "mov", "regac" ], 248 | 0x7a : [ 1, "mov", "regad" ], 249 | 0x7b : [ 1, "mov", "regae" ], 250 | 0x7c : [ 1, "mov", "regah" ], 251 | 0x7d : [ 1, "mov", "regal" ], 252 | 0x7e : [ 1, "mov", "regam" ], 253 | 0x7f : [ 1, "mov", "regaa" ], 254 | 255 | 0x80 : [ 1, "add", "regb" ], 256 | 0x81 : [ 1, "add", "regc" ], 257 | 0x82 : [ 1, "add", "regd" ], 258 | 0x83 : [ 1, "add", "rege" ], 259 | 0x84 : [ 1, "add", "regh" ], 260 | 0x85 : [ 1, "add", "regl" ], 261 | 0x86 : [ 1, "add", "regm" ], 262 | 0x87 : [ 1, "add", "rega" ], 263 | 0x88 : [ 1, "adc", "regb" ], 264 | 0x89 : [ 1, "adc", "regc" ], 265 | 0x8a : [ 1, "adc", "regd" ], 266 | 0x8b : [ 1, "adc", "rege" ], 267 | 0x8c : [ 1, "adc", "regh" ], 268 | 0x8d : [ 1, "adc", "regl" ], 269 | 0x8e : [ 1, "adc", "regm" ], 270 | 0x8f : [ 1, "adc", "rega" ], 271 | 272 | 0x90 : [ 1, "sub", "regb" ], 273 | 0x91 : [ 1, "sub", "regc" ], 274 | 0x92 : [ 1, "sub", "regd" ], 275 | 0x93 : [ 1, "sub", "rege" ], 276 | 0x94 : [ 1, "sub", "regh" ], 277 | 0x95 : [ 1, "sub", "regl" ], 278 | 0x96 : [ 1, "sub", "regm" ], 279 | 0x97 : [ 1, "sub", "rega" ], 280 | 0x98 : [ 1, "sbb", "regb" ], 281 | 0x99 : [ 1, "sbb", "regc" ], 282 | 0x9a : [ 1, "sbb", "regd" ], 283 | 0x9b : [ 1, "sbb", "rege" ], 284 | 0x9c : [ 1, "sbb", "regh" ], 285 | 0x9d : [ 1, "sbb", "regl" ], 286 | 0x9e : [ 1, "sbb", "regm" ], 287 | 0x9f : [ 1, "sbb", "rega" ], 288 | 289 | 0xa0 : [ 1, "ana", "regb" ], 290 | 0xa1 : [ 1, "ana", "regc" ], 291 | 0xa2 : [ 1, "ana", "regd" ], 292 | 0xa3 : [ 1, "ana", "rege" ], 293 | 0xa4 : [ 1, "ana", "regh" ], 294 | 0xa5 : [ 1, "ana", "regl" ], 295 | 0xa6 : [ 1, "ana", "regm" ], 296 | 0xa7 : [ 1, "ana", "rega" ], 297 | 0xa8 : [ 1, "xra", "regb" ], 298 | 0xa9 : [ 1, "xra", "regc" ], 299 | 0xaa : [ 1, "xra", "regd" ], 300 | 0xab : [ 1, "xra", "rege" ], 301 | 0xac : [ 1, "xra", "regh" ], 302 | 0xad : [ 1, "xra", "regl" ], 303 | 0xae : [ 1, "xra", "regm" ], 304 | 0xaf : [ 1, "xra", "rega" ], 305 | 306 | 0xb0 : [ 1, "ora", "regb" ], 307 | 0xb1 : [ 1, "ora", "regc" ], 308 | 0xb2 : [ 1, "ora", "regd" ], 309 | 0xb3 : [ 1, "ora", "rege" ], 310 | 0xb4 : [ 1, "ora", "regh" ], 311 | 0xb5 : [ 1, "ora", "regl" ], 312 | 0xb6 : [ 1, "ora", "regm" ], 313 | 0xb7 : [ 1, "ora", "rega" ], 314 | 0xb8 : [ 1, "cmp", "regb" ], 315 | 0xb9 : [ 1, "cmp", "regc" ], 316 | 0xba : [ 1, "cmp", "regd" ], 317 | 0xbb : [ 1, "cmp", "rege" ], 318 | 0xbc : [ 1, "cmp", "regh" ], 319 | 0xbd : [ 1, "cmp", "regl" ], 320 | 0xbe : [ 1, "cmp", "regm" ], 321 | 0xbf : [ 1, "cmp", "rega" ], 322 | 323 | 0xc0 : [ 1, "rnz", "implied" ], 324 | 0xc1 : [ 1, "pop", "regb" ], 325 | 0xc2 : [ 3, "jnz", "direct" ], 326 | 0xc3 : [ 3, "jmp", "direct" ], 327 | 0xc4 : [ 3, "cnz", "direct" ], 328 | 0xc5 : [ 1, "push", "regb" ], 329 | 0xc6 : [ 2, "adi", "imm" ], 330 | 0xc7 : [ 1, "rst", "0" ], 331 | 0xc8 : [ 1, "rz", "implied" ], 332 | 0xc9 : [ 1, "ret", "implied" ], 333 | 0xca : [ 3, "jz", "direct" ], 334 | 0xcc : [ 3, "cz", "direct" ], 335 | 0xcd : [ 3, "call", "direct" ], 336 | 0xce : [ 2, "aci", "imm" ], 337 | 0xcf : [ 1, "rst", "1" ], 338 | 339 | 0xd0 : [ 1, "rnc", "implied" ], 340 | 0xd1 : [ 1, "pop", "regd" ], 341 | 0xd2 : [ 3, "jnc", "direct" ], 342 | 0xd3 : [ 2, "out", "imm" ], 343 | 0xd4 : [ 3, "cnc", "direct" ], 344 | 0xd5 : [ 1, "push", "regd" ], 345 | 0xd6 : [ 2, "sui", "imm" ], 346 | 0xd7 : [ 1, "rst", "2" ], 347 | 0xd8 : [ 1, "rc", "implied" ], 348 | 0xda : [ 3, "jc", "direct" ], 349 | 0xdb : [ 2, "in", "imm" ], 350 | 0xdc : [ 3, "cc", "direct" ], 351 | 0xde : [ 2, "sbi", "imm" ], 352 | 0xdf : [ 1, "rst", "3" ], 353 | 354 | 0xe0 : [ 1, "rpo", "implied" ], 355 | 0xe1 : [ 1, "pop", "regh" ], 356 | 0xe2 : [ 3, "jpo", "direct" ], 357 | 0xe3 : [ 1, "xthl", "implied" ], 358 | 0xe4 : [ 3, "cpo", "direct" ], 359 | 0xe5 : [ 1, "push", "regh" ], 360 | 0xe6 : [ 2, "ani", "imm" ], 361 | 0xe7 : [ 1, "rst", "4" ], 362 | 0xe8 : [ 1, "rpe", "implied" ], 363 | 0xe9 : [ 1, "pchl", "implied" ], 364 | 0xea : [ 3, "jpe", "direct" ], 365 | 0xeb : [ 1, "xchg", "implied" ], 366 | 0xec : [ 3, "cpe", "direct" ], 367 | 0xee : [ 2, "xri", "imm" ], 368 | 0xef : [ 1, "rst", "5" ], 369 | 370 | 0xf0 : [ 1, "rp", "implied" ], 371 | 0xf1 : [ 1, "pop", "regpsw" ], 372 | 0xf2 : [ 3, "jp", "direct" ], 373 | 0xf3 : [ 1, "di", "implied" ], 374 | 0xf4 : [ 3, "cp", "direct" ], 375 | 0xf5 : [ 1, "push", "regpsw" ], 376 | 0xf6 : [ 2, "ori", "imm" ], 377 | 0xf7 : [ 1, "rst", "6" ], 378 | 0xf8 : [ 1, "rm", "implied" ], 379 | 0xf9 : [ 1, "sphl", "implied" ], 380 | 0xfa : [ 3, "jm", "direct" ], 381 | 0xfb : [ 1, "ei", "implied" ], 382 | 0xfc : [ 3, "cm", "direct" ], 383 | 0xfe : [ 2, "cpi", "imm" ], 384 | 0xff : [ 1, "rst", "7" ], 385 | 386 | } 387 | 388 | # End of processor specific code 389 | ########################################################################## 390 | -------------------------------------------------------------------------------- /8085.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "8085" 6 | # Description = "Intel 8085 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 3 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implied" : "", 20 | "rega" : "a", 21 | "regb" : "b", 22 | "regc" : "c", 23 | "regd" : "d", 24 | "rege" : "e", 25 | "regh" : "h", 26 | "regl" : "l", 27 | "regm" : "m", 28 | "regsp" : "sp", 29 | "regbb" : "b,b", 30 | "regbc" : "b,c", 31 | "regbd" : "b,d", 32 | "regbe" : "b,e", 33 | "regbh" : "b,h", 34 | "regbl" : "b,l", 35 | "regbm" : "b,m", 36 | "regba" : "b,a", 37 | "regcb" : "c,b", 38 | "regcc" : "c,c", 39 | "regcd" : "c,d", 40 | "regce" : "c,e", 41 | "regch" : "c,h", 42 | "regcl" : "c,l", 43 | "regcm" : "c,m", 44 | "regca" : "c,a", 45 | "regdb" : "d,b", 46 | "regdc" : "d,c", 47 | "regdd" : "d,d", 48 | "regde" : "d,e", 49 | "regdh" : "d,h", 50 | "regdl" : "d,l", 51 | "regdm" : "d,m", 52 | "regda" : "d,a", 53 | "regeb" : "e,b", 54 | "regec" : "e,c", 55 | "reged" : "e,d", 56 | "regee" : "e,e", 57 | "regeh" : "e,h", 58 | "regel" : "e,l", 59 | "regem" : "e,m", 60 | "regea" : "e,a", 61 | "reghb" : "h,b", 62 | "reghc" : "h,c", 63 | "reghd" : "h,d", 64 | "reghe" : "h,e", 65 | "reghh" : "h,h", 66 | "reghl" : "h,l", 67 | "reghm" : "h,m", 68 | "regha" : "h,a", 69 | "reglb" : "l,b", 70 | "reglc" : "l,c", 71 | "regld" : "l,d", 72 | "regle" : "l,e", 73 | "reglh" : "l,h", 74 | "regll" : "l,l", 75 | "reglm" : "l,m", 76 | "regla" : "l,a", 77 | "regmb" : "m,b", 78 | "regmc" : "m,c", 79 | "regmd" : "m,d", 80 | "regme" : "m,e", 81 | "regmh" : "m,h", 82 | "regml" : "m,l", 83 | "regma" : "m,a", 84 | "regab" : "a,b", 85 | "regac" : "a,c", 86 | "regad" : "a,d", 87 | "regae" : "a,e", 88 | "regah" : "a,h", 89 | "regal" : "a,l", 90 | "regam" : "a,m", 91 | "regaa" : "a,a", 92 | "regpsw" : "psw", 93 | "imm" : "${0:02X}", 94 | "imma" : "a,${0:02X}", 95 | "immb" : "b,${0:02X}", 96 | "immc" : "c,${0:02X}", 97 | "immd" : "d,${0:02X}", 98 | "imme" : "e,${0:02X}", 99 | "immh" : "h,${0:02X}", 100 | "imml" : "l,${0:02X}", 101 | "immm" : "m,${0:02X}", 102 | "immxb" : "b,${1:02X}{0:02X}", 103 | "immxd" : "d,${1:02X}{0:02X}", 104 | "immxh" : "h,${1:02X}{0:02X}", 105 | "immxsp" : "sp,${1:02X}{0:02X}", 106 | "direct" : "${1:02X}{0:02X}", 107 | "0" : "0", 108 | "1" : "1", 109 | "2" : "2", 110 | "3" : "3", 111 | "4" : "4", 112 | "5" : "5", 113 | "6" : "6", 114 | "7" : "7", 115 | } 116 | 117 | # Op Code Table 118 | # Key is numeric opcode (possibly multiple bytes) 119 | # Value is a list: 120 | # # bytes 121 | # mnemonic 122 | # addressing mode 123 | # flags (e.g. pcr) 124 | opcodeTable = { 125 | 126 | 0x00 : [ 1, "nop", "implied" ], 127 | 0x01 : [ 3, "lxi", "immxb" ], 128 | 0x02 : [ 1, "stax", "regb" ], 129 | 0x03 : [ 1, "inx", "regb" ], 130 | 0x04 : [ 1, "inr", "regb" ], 131 | 0x05 : [ 1, "dcr", "regb" ], 132 | 0x06 : [ 2, "mvi", "immb" ], 133 | 0x07 : [ 1, "rlc", "implied" ], 134 | 0x09 : [ 1, "dad", "regb" ], 135 | 0x0a : [ 1, "ldax", "regb" ], 136 | 0x0b : [ 1, "dcx", "regb" ], 137 | 0x0c : [ 1, "inr", "regc" ], 138 | 0x0d : [ 1, "dcr", "regc" ], 139 | 0x0e : [ 2, "mvi", "immc" ], 140 | 0x0f : [ 1, "rrc", "implied" ], 141 | 142 | 0x11 : [ 3, "lxi", "immxd" ], 143 | 0x12 : [ 1, "stax", "regd" ], 144 | 0x13 : [ 1, "inx", "regd" ], 145 | 0x14 : [ 1, "inr", "regd" ], 146 | 0x15 : [ 1, "dcr", "regd" ], 147 | 0x16 : [ 2, "mvi", "immd" ], 148 | 0x17 : [ 1, "ral", "implied" ], 149 | 0x19 : [ 1, "dad", "implied" ], 150 | 0x1a : [ 1, "ldax", "regd" ], 151 | 0x1b : [ 1, "dcx", "regd" ], 152 | 0x1c : [ 1, "inr", "rege" ], 153 | 0x1d : [ 1, "dcr", "rege" ], 154 | 0x1e : [ 2, "mvi", "imme" ], 155 | 0x1f : [ 1, "rar", "implied" ], 156 | 157 | 0x20 : [ 1, "rim", "implied" ], 158 | 0x21 : [ 3, "lxi", "immxh" ], 159 | 0x22 : [ 3, "shld", "direct" ], 160 | 0x23 : [ 1, "inx", "regh" ], 161 | 0x24 : [ 1, "inr", "regh" ], 162 | 0x25 : [ 1, "dcr", "regh" ], 163 | 0x26 : [ 2, "mvi", "immh" ], 164 | 0x27 : [ 1, "daa", "implied" ], 165 | 0x29 : [ 1, "dad", "regh" ], 166 | 0x2a : [ 3, "lhld", "direct" ], 167 | 0x2b : [ 1, "dcx", "regh" ], 168 | 0x2c : [ 1, "inr", "regl" ], 169 | 0x2d : [ 1, "dcr", "regl" ], 170 | 0x2e : [ 2, "mvi", "imml" ], 171 | 0x2f : [ 1, "cma", "implied" ], 172 | 173 | 0x30 : [ 1, "sim", "implied" ], 174 | 0x31 : [ 3, "lxi", "immxsp" ], 175 | 0x31 : [ 3, "lxi", "immxsp" ], 176 | 0x32 : [ 3, "sta", "direct" ], 177 | 0x33 : [ 1, "inx", "regsp" ], 178 | 0x34 : [ 1, "inr", "regm" ], 179 | 0x35 : [ 1, "dcr", "regm" ], 180 | 0x36 : [ 2, "mvi", "immm" ], 181 | 0x37 : [ 1, "stc", "implied" ], 182 | 0x39 : [ 1, "dad", "regsp" ], 183 | 0x3a : [ 3, "lda", "direct" ], 184 | 0x3b : [ 1, "dcx", "regsp" ], 185 | 0x3c : [ 1, "inr", "rega" ], 186 | 0x3d : [ 1, "dcr", "rega" ], 187 | 0x3e : [ 2, "mvi", "imma" ], 188 | 0x3f : [ 1, "cmc", "implied" ], 189 | 190 | 0x40 : [ 1, "mov", "regbb" ], 191 | 0x41 : [ 1, "mov", "regbc" ], 192 | 0x42 : [ 1, "mov", "regbd" ], 193 | 0x43 : [ 1, "mov", "regbe" ], 194 | 0x44 : [ 1, "mov", "regbh" ], 195 | 0x45 : [ 1, "mov", "regbl" ], 196 | 0x46 : [ 1, "mov", "regbm" ], 197 | 0x47 : [ 1, "mov", "regba" ], 198 | 0x48 : [ 1, "mov", "regcb" ], 199 | 0x49 : [ 1, "mov", "regcc" ], 200 | 0x4a : [ 1, "mov", "regcd" ], 201 | 0x4b : [ 1, "mov", "regce" ], 202 | 0x4c : [ 1, "mov", "regch" ], 203 | 0x4d : [ 1, "mov", "regcl" ], 204 | 0x4e : [ 1, "mov", "regcm" ], 205 | 0x4f : [ 1, "mov", "regca" ], 206 | 207 | 0x50 : [ 1, "mov", "regdb" ], 208 | 0x51 : [ 1, "mov", "regdc" ], 209 | 0x52 : [ 1, "mov", "regdd" ], 210 | 0x53 : [ 1, "mov", "regde" ], 211 | 0x54 : [ 1, "mov", "regdh" ], 212 | 0x55 : [ 1, "mov", "regdl" ], 213 | 0x56 : [ 1, "mov", "regdm" ], 214 | 0x57 : [ 1, "mov", "regda" ], 215 | 0x58 : [ 1, "mov", "regeb" ], 216 | 0x59 : [ 1, "mov", "regec" ], 217 | 0x5a : [ 1, "mov", "reged" ], 218 | 0x5b : [ 1, "mov", "regee" ], 219 | 0x5c : [ 1, "mov", "regeh" ], 220 | 0x5d : [ 1, "mov", "regel" ], 221 | 0x5e : [ 1, "mov", "regem" ], 222 | 0x5f : [ 1, "mov", "regea" ], 223 | 224 | 0x60 : [ 1, "mov", "reghb" ], 225 | 0x61 : [ 1, "mov", "reghc" ], 226 | 0x62 : [ 1, "mov", "reghd" ], 227 | 0x63 : [ 1, "mov", "reghe" ], 228 | 0x64 : [ 1, "mov", "reghh" ], 229 | 0x65 : [ 1, "mov", "reghl" ], 230 | 0x66 : [ 1, "mov", "reghm" ], 231 | 0x67 : [ 1, "mov", "regha" ], 232 | 0x68 : [ 1, "mov", "reglb" ], 233 | 0x69 : [ 1, "mov", "reglc" ], 234 | 0x6a : [ 1, "mov", "regld" ], 235 | 0x6b : [ 1, "mov", "regle" ], 236 | 0x6c : [ 1, "mov", "reglh" ], 237 | 0x6d : [ 1, "mov", "regll" ], 238 | 0x6e : [ 1, "mov", "reglm" ], 239 | 0x6f : [ 1, "mov", "regla" ], 240 | 241 | 0x70 : [ 1, "mov", "regmb" ], 242 | 0x71 : [ 1, "mov", "regmc" ], 243 | 0x72 : [ 1, "mov", "regmd" ], 244 | 0x73 : [ 1, "mov", "regme" ], 245 | 0x74 : [ 1, "mov", "regmh" ], 246 | 0x75 : [ 1, "mov", "regml" ], 247 | 0x76 : [ 1, "hlt", "implied" ], 248 | 0x77 : [ 1, "mov", "regma" ], 249 | 0x78 : [ 1, "mov", "regab" ], 250 | 0x79 : [ 1, "mov", "regac" ], 251 | 0x7a : [ 1, "mov", "regad" ], 252 | 0x7b : [ 1, "mov", "regae" ], 253 | 0x7c : [ 1, "mov", "regah" ], 254 | 0x7d : [ 1, "mov", "regal" ], 255 | 0x7e : [ 1, "mov", "regam" ], 256 | 0x7f : [ 1, "mov", "regaa" ], 257 | 258 | 0x80 : [ 1, "add", "regb" ], 259 | 0x81 : [ 1, "add", "regc" ], 260 | 0x82 : [ 1, "add", "regd" ], 261 | 0x83 : [ 1, "add", "rege" ], 262 | 0x84 : [ 1, "add", "regh" ], 263 | 0x85 : [ 1, "add", "regl" ], 264 | 0x86 : [ 1, "add", "regm" ], 265 | 0x87 : [ 1, "add", "rega" ], 266 | 0x88 : [ 1, "adc", "regb" ], 267 | 0x89 : [ 1, "adc", "regc" ], 268 | 0x8a : [ 1, "adc", "regd" ], 269 | 0x8b : [ 1, "adc", "rege" ], 270 | 0x8c : [ 1, "adc", "regh" ], 271 | 0x8d : [ 1, "adc", "regl" ], 272 | 0x8e : [ 1, "adc", "regm" ], 273 | 0x8f : [ 1, "adc", "rega" ], 274 | 275 | 0x90 : [ 1, "sub", "regb" ], 276 | 0x91 : [ 1, "sub", "regc" ], 277 | 0x92 : [ 1, "sub", "regd" ], 278 | 0x93 : [ 1, "sub", "rege" ], 279 | 0x94 : [ 1, "sub", "regh" ], 280 | 0x95 : [ 1, "sub", "regl" ], 281 | 0x96 : [ 1, "sub", "regm" ], 282 | 0x97 : [ 1, "sub", "rega" ], 283 | 0x98 : [ 1, "sbb", "regb" ], 284 | 0x99 : [ 1, "sbb", "regc" ], 285 | 0x9a : [ 1, "sbb", "regd" ], 286 | 0x9b : [ 1, "sbb", "rege" ], 287 | 0x9c : [ 1, "sbb", "regh" ], 288 | 0x9d : [ 1, "sbb", "regl" ], 289 | 0x9e : [ 1, "sbb", "regm" ], 290 | 0x9f : [ 1, "sbb", "rega" ], 291 | 292 | 0xa0 : [ 1, "ana", "regb" ], 293 | 0xa1 : [ 1, "ana", "regc" ], 294 | 0xa2 : [ 1, "ana", "regd" ], 295 | 0xa3 : [ 1, "ana", "rege" ], 296 | 0xa4 : [ 1, "ana", "regh" ], 297 | 0xa5 : [ 1, "ana", "regl" ], 298 | 0xa6 : [ 1, "ana", "regm" ], 299 | 0xa7 : [ 1, "ana", "rega" ], 300 | 0xa8 : [ 1, "xra", "regb" ], 301 | 0xa9 : [ 1, "xra", "regc" ], 302 | 0xaa : [ 1, "xra", "regd" ], 303 | 0xab : [ 1, "xra", "rege" ], 304 | 0xac : [ 1, "xra", "regh" ], 305 | 0xad : [ 1, "xra", "regl" ], 306 | 0xae : [ 1, "xra", "regm" ], 307 | 0xaf : [ 1, "xra", "rega" ], 308 | 309 | 0xb0 : [ 1, "ora", "regb" ], 310 | 0xb1 : [ 1, "ora", "regc" ], 311 | 0xb2 : [ 1, "ora", "regd" ], 312 | 0xb3 : [ 1, "ora", "rege" ], 313 | 0xb4 : [ 1, "ora", "regh" ], 314 | 0xb5 : [ 1, "ora", "regl" ], 315 | 0xb6 : [ 1, "ora", "regm" ], 316 | 0xb7 : [ 1, "ora", "rega" ], 317 | 0xb8 : [ 1, "cmp", "regb" ], 318 | 0xb9 : [ 1, "cmp", "regc" ], 319 | 0xba : [ 1, "cmp", "regd" ], 320 | 0xbb : [ 1, "cmp", "rege" ], 321 | 0xbc : [ 1, "cmp", "regh" ], 322 | 0xbd : [ 1, "cmp", "regl" ], 323 | 0xbe : [ 1, "cmp", "regm" ], 324 | 0xbf : [ 1, "cmp", "rega" ], 325 | 326 | 0xc0 : [ 1, "rnz", "implied" ], 327 | 0xc1 : [ 1, "pop", "regb" ], 328 | 0xc2 : [ 3, "jnz", "direct" ], 329 | 0xc3 : [ 3, "jmp", "direct" ], 330 | 0xc4 : [ 3, "cnz", "direct" ], 331 | 0xc5 : [ 1, "push", "regb" ], 332 | 0xc6 : [ 2, "adi", "imm" ], 333 | 0xc7 : [ 1, "rst", "0" ], 334 | 0xc8 : [ 1, "rz", "implied" ], 335 | 0xc9 : [ 1, "ret", "implied" ], 336 | 0xca : [ 3, "jz", "direct" ], 337 | 0xcc : [ 3, "cz", "direct" ], 338 | 0xcd : [ 3, "call", "direct" ], 339 | 0xce : [ 2, "aci", "imm" ], 340 | 0xcf : [ 1, "rst", "1" ], 341 | 342 | 0xd0 : [ 1, "rnc", "implied" ], 343 | 0xd1 : [ 1, "pop", "regd" ], 344 | 0xd2 : [ 3, "jnc", "direct" ], 345 | 0xd3 : [ 2, "out", "imm" ], 346 | 0xd4 : [ 3, "cnc", "direct" ], 347 | 0xd5 : [ 1, "push", "regd" ], 348 | 0xd6 : [ 2, "sui", "imm" ], 349 | 0xd7 : [ 1, "rst", "2" ], 350 | 0xd8 : [ 1, "rc", "implied" ], 351 | 0xda : [ 3, "jc", "direct" ], 352 | 0xdb : [ 2, "in", "imm" ], 353 | 0xdc : [ 3, "cc", "direct" ], 354 | 0xde : [ 2, "sbi", "imm" ], 355 | 0xdf : [ 1, "rst", "3" ], 356 | 357 | 0xe0 : [ 1, "rpo", "implied" ], 358 | 0xe1 : [ 1, "pop", "regh" ], 359 | 0xe2 : [ 3, "jpo", "direct" ], 360 | 0xe3 : [ 1, "xthl", "implied" ], 361 | 0xe4 : [ 3, "cpo", "direct" ], 362 | 0xe5 : [ 1, "push", "regh" ], 363 | 0xe6 : [ 2, "ani", "imm" ], 364 | 0xe7 : [ 1, "rst", "4" ], 365 | 0xe8 : [ 1, "rpe", "implied" ], 366 | 0xe9 : [ 1, "pchl", "implied" ], 367 | 0xea : [ 3, "jpe", "direct" ], 368 | 0xeb : [ 1, "xchg", "implied" ], 369 | 0xec : [ 3, "cpe", "direct" ], 370 | 0xee : [ 2, "xri", "imm" ], 371 | 0xef : [ 1, "rst", "5" ], 372 | 373 | 0xf0 : [ 1, "rp", "implied" ], 374 | 0xf1 : [ 1, "pop", "regpsw" ], 375 | 0xf2 : [ 3, "jp", "direct" ], 376 | 0xf3 : [ 1, "di", "implied" ], 377 | 0xf4 : [ 3, "cp", "direct" ], 378 | 0xf5 : [ 1, "push", "regpsw" ], 379 | 0xf6 : [ 2, "ori", "imm" ], 380 | 0xf7 : [ 1, "rst", "6" ], 381 | 0xf8 : [ 1, "rm", "implied" ], 382 | 0xf9 : [ 1, "sphl", "implied" ], 383 | 0xfa : [ 3, "jm", "direct" ], 384 | 0xfb : [ 1, "ei", "implied" ], 385 | 0xfc : [ 3, "cm", "direct" ], 386 | 0xfe : [ 2, "cpi", "imm" ], 387 | 0xff : [ 1, "rst", "7" ], 388 | 389 | } 390 | 391 | # End of processor specific code 392 | ########################################################################## 393 | -------------------------------------------------------------------------------- /6809.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "6809" 6 | # Description = "Motorola 6809 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 4 12 | 13 | # Leadin bytes for multbyte instructions 14 | leadInBytes = [0x10, 0x11] 15 | 16 | # Notes: 17 | # Not all addressing modes are implemented. 18 | 19 | # Addressing mode table 20 | addressModeTable = { 21 | "inherent" : "", 22 | "imm8" : "#${0:02X}", 23 | "imm16" : "#${0:02X}{1:02X}", 24 | "direct" : "${0:02X}", 25 | "indexed" : "${0:02X},x", 26 | "extended" : "${0:02X}{1:02X}", 27 | "rel8" : "${0:04X}", 28 | "rel16" : "${0:04X}", 29 | "r1,r2" : "${0:02X}", # Not fully implemented 30 | # Extended Indirect 31 | # Relative Indirect 32 | # Zero-offset Indexed 33 | # Zero-offset Indexed Indirect 34 | # Constant-offset Indexed 35 | # Constant-offset Indexed Indirect 36 | # Accumulator-offset Indexed 37 | # Accumulator-offset Indexed Indirect 38 | # Auto-Increment Indexed 39 | # Auto-Increment Indexed Indirect 40 | # Auto-Decrement Indexed 41 | # Auto-Decrement Indexed Indirect 42 | } 43 | 44 | # Op Code Table 45 | # Key is numeric opcode (possibly multiple bytes) 46 | # Value is a list: 47 | # # bytes 48 | # mnemonic 49 | # addressing mode. 50 | # flags (e.g. pcr) 51 | opcodeTable = { 52 | 53 | 0x3a : [ 1, "abx", "inherent" ], 54 | 0x89 : [ 2, "adca", "imm8" ], 55 | 0x99 : [ 2, "adca", "direct" ], 56 | 0xa9 : [ 2, "adca", "indexed" ], 57 | 0xb9 : [ 3, "adca", "extended" ], 58 | 0xc9 : [ 2, "adcb", "imm8" ], 59 | 0xd9 : [ 2, "adcb", "direct" ], 60 | 0xe9 : [ 2, "adcb", "indexed" ], 61 | 0xf9 : [ 3, "adcb", "extended" ], 62 | 0x8b : [ 2, "adda", "imm8" ], 63 | 0x9b : [ 2, "adda", "direct" ], 64 | 0xab : [ 2, "adda", "indexed" ], 65 | 0xbb : [ 3, "adda", "extended" ], 66 | 0xcb : [ 2, "addb", "imm8" ], 67 | 0xdb : [ 2, "addb", "direct" ], 68 | 0xeb : [ 2, "addb", "indexed" ], 69 | 0xfb : [ 3, "addb", "extended" ], 70 | 0xc3 : [ 3, "addd", "imm16" ], 71 | 0xd3 : [ 2, "addd", "direct" ], 72 | 0xe3 : [ 2, "addd", "indexed" ], 73 | 0xf3 : [ 3, "addd", "extended" ], 74 | 0x84 : [ 2, "anda", "imm8" ], 75 | 0x94 : [ 2, "anda", "direct" ], 76 | 0xa4 : [ 2, "anda", "indexed" ], 77 | 0xb4 : [ 3, "anda", "extended" ], 78 | 0xc4 : [ 2, "andb", "imm8" ], 79 | 0xd4 : [ 2, "andb", "direct" ], 80 | 0xe4 : [ 2, "andb", "indexed" ], 81 | 0xf4 : [ 3, "andb", "extended" ], 82 | 0x1c : [ 2, "andcc","imm8" ], 83 | 0x48 : [ 1, "asla", "inherent" ], 84 | 0x58 : [ 1, "aslb", "inherent" ], 85 | 0x08 : [ 2, "asl", "direct" ], 86 | 0x68 : [ 2, "asl", "indexed" ], 87 | 0x78 : [ 3, "asl", "extended" ], 88 | 0x47 : [ 1, "asra", "inherent" ], 89 | 0x57 : [ 1, "asrb", "inherent" ], 90 | 0x07 : [ 2, "asr", "direct" ], 91 | 0x67 : [ 2, "asr", "indexed" ], 92 | 0x77 : [ 3, "asr", "extended" ], 93 | 0x85 : [ 2, "bita", "imm8" ], 94 | 0x95 : [ 2, "bita", "direct" ], 95 | 0xa5 : [ 2, "bita", "indexed" ], 96 | 0xb5 : [ 3, "bita", "extended" ], 97 | 0xc5 : [ 2, "bitb", "imm8" ], 98 | 0xd5 : [ 2, "bitb", "direct" ], 99 | 0xe5 : [ 2, "bitb", "indexed" ], 100 | 0xf5 : [ 3, "bitb", "extended" ], 101 | 0x4f : [ 1, "clra", "inherent" ], 102 | 0x5f : [ 1, "clrb", "inherent" ], 103 | 0x0f : [ 2, "clr", "direct" ], 104 | 0x6f : [ 2, "clr", "indexed" ], 105 | 0x7f : [ 3, "clr", "extended" ], 106 | 0x81 : [ 2, "cmpa", "imm8" ], 107 | 0x91 : [ 2, "cmpa", "direct" ], 108 | 0xa1 : [ 2, "cmpa", "indexed" ], 109 | 0xb1 : [ 3, "cmpa", "extended" ], 110 | 0xc1 : [ 2, "cmpb", "imm8" ], 111 | 0xd1 : [ 2, "cmpb", "direct" ], 112 | 0xe1 : [ 2, "cmpb", "indexed" ], 113 | 0xf1 : [ 3, "cmpb", "extended" ], 114 | 0x1083 : [ 4, "cmpd", "imm16" ], 115 | 0x1093 : [ 3, "cmpd", "direct" ], 116 | 0x10a3 : [ 3, "cmpd", "indexed" ], 117 | 0x10b3 : [ 4, "cmpd", "extended" ], 118 | 0x118c : [ 4, "cmps", "imm16" ], 119 | 0x119c : [ 3, "cmps", "direct" ], 120 | 0x11ac : [ 3, "cmps", "indexed" ], 121 | 0x11bc : [ 4, "cmps", "extended" ], 122 | 0x1183 : [ 4, "cmpu", "imm16" ], 123 | 0x1193 : [ 3, "cmpu", "direct" ], 124 | 0x11a3 : [ 3, "cmpu", "indexed" ], 125 | 0x11b3 : [ 4, "cmpu", "extended" ], 126 | 0x8c : [ 3, "cmpx", "imm16" ], 127 | 0x9c : [ 2, "cmpx", "direct" ], 128 | 0xac : [ 2, "cmpx", "indexed" ], 129 | 0xbc : [ 3, "cmpx", "extended" ], 130 | 0x108c : [ 4, "cmpy", "imm16" ], 131 | 0x109c : [ 3, "cmpy", "direct" ], 132 | 0x10ac : [ 3, "cmpy", "indexed" ], 133 | 0x10bc : [ 4, "cmpy", "extended" ], 134 | 0x43 : [ 1, "coma", "inherent" ], 135 | 0x53 : [ 1, "comb", "inherent" ], 136 | 0x03 : [ 2, "comb", "direct" ], 137 | 0x63 : [ 2, "comb", "indexed" ], 138 | 0x73 : [ 3, "comb", "extended" ], 139 | 0x3c : [ 2, "cwai", "imm8" ], 140 | 0x19 : [ 1, "daa", "inherent" ], 141 | 0x4a : [ 1, "deca", "inherent" ], 142 | 0x5a : [ 1, "decb", "inherent" ], 143 | 0x0a : [ 2, "dec", "direct" ], 144 | 0x6a : [ 2, "dec", "indexed" ], 145 | 0x7a : [ 3, "dec", "extended" ], 146 | 0x88 : [ 2, "eora", "imm8" ], 147 | 0x98 : [ 2, "eora", "direct" ], 148 | 0xa8 : [ 2, "eora", "direct" ], 149 | 0xb8 : [ 3, "eora", "extended" ], 150 | 0xc8 : [ 2, "eorb", "imm8" ], 151 | 0xd8 : [ 2, "eorb", "direct" ], 152 | 0xe8 : [ 2, "eorb", "direct" ], 153 | 0xf8 : [ 3, "eorb", "extended" ], 154 | 0x1e : [ 2, "exg", "r1,r2" ], 155 | 0x4c : [ 1, "inca", "inherent" ], 156 | 0x5c : [ 1, "incb", "inherent" ], 157 | 0x0c : [ 2, "inc", "indexed" ], 158 | 0x6c : [ 2, "inc", "direct" ], 159 | 0x7c : [ 3, "inc", "extended" ], 160 | 0x0e : [ 2, "jmp", "indexed" ], 161 | 0x6e : [ 2, "jmp", "direct" ], 162 | 0x7e : [ 3, "jmp", "extended" ], 163 | 0x9d : [ 2, "jsr", "indexed" ], 164 | 0xad : [ 2, "jsr", "direct" ], 165 | 0xbd : [ 3, "jsr", "extended" ], 166 | 0x86 : [ 2, "lda", "imm8" ], 167 | 0x96 : [ 2, "lda", "direct" ], 168 | 0xa6 : [ 2, "lda", "indexed" ], 169 | 0xb6 : [ 3, "lda", "extended" ], 170 | 0xc6 : [ 2, "ldb", "imm8" ], 171 | 0xd6 : [ 2, "ldb", "direct" ], 172 | 0xe6 : [ 2, "ldb", "indexed" ], 173 | 0xf6 : [ 3, "ldb", "extended" ], 174 | 0xcc : [ 3, "ldd", "imm16" ], 175 | 0xdc : [ 2, "ldd", "direct" ], 176 | 0xec : [ 2, "ldd", "indexed" ], 177 | 0xfc : [ 3, "ldd", "extended" ], 178 | 0x10ce : [ 4, "lds", "imm16" ], 179 | 0x10de : [ 3, "lds", "direct" ], 180 | 0x10ee : [ 3, "lds", "indexed" ], 181 | 0x10fe : [ 4, "lds", "extended" ], 182 | 0xce : [ 3, "ldu", "imm16" ], 183 | 0xde : [ 2, "ldu", "direct" ], 184 | 0xee : [ 2, "ldu", "indexed" ], 185 | 0xfe : [ 3, "ldu", "extended" ], 186 | 0x8e : [ 3, "ldx", "imm16" ], 187 | 0x9e : [ 2, "ldx", "direct" ], 188 | 0xae : [ 2, "ldx", "indexed" ], 189 | 0xbe : [ 3, "ldx", "extended" ], 190 | 0x108e : [ 4, "ldy", "imm16" ], 191 | 0x109e : [ 3, "ldy", "direct" ], 192 | 0x10ae : [ 3, "ldy", "indexed" ], 193 | 0x10be : [ 4, "ldy", "extended" ], 194 | 0x32 : [ 2, "leas", "indexed" ], 195 | 0x33 : [ 2, "leau", "indexed" ], 196 | 0x30 : [ 2, "leax", "indexed" ], 197 | 0x31 : [ 2, "leay", "indexed" ], 198 | 0x48 : [ 1, "lsla", "inherent" ], 199 | 0x58 : [ 1, "lslb", "inherent" ], 200 | 0x08 : [ 2, "lsl", "direct" ], 201 | 0x68 : [ 2, "lsl", "indexed" ], 202 | 0x78 : [ 3, "lsl", "extended" ], 203 | 0x44 : [ 1, "lsra", "inherent" ], 204 | 0x54 : [ 1, "lsrb", "inherent" ], 205 | 0x04 : [ 2, "lsr", "direct" ], 206 | 0x64 : [ 2, "lsr", "indexed" ], 207 | 0x74 : [ 3, "lsr", "extended" ], 208 | 0x3d : [ 1, "mul", "inherent" ], 209 | 0x40 : [ 1, "nega", "inherent" ], 210 | 0x50 : [ 1, "negb", "inherent" ], 211 | 0x00 : [ 2, "neg", "direct" ], 212 | 0x60 : [ 2, "neg", "indexed" ], 213 | 0x70 : [ 3, "neg", "extended" ], 214 | 0x12 : [ 1, "nop", "inherent" ], 215 | 0x8a : [ 2, "ora", "imm8" ], 216 | 0x9a : [ 2, "ora", "direct" ], 217 | 0xaa : [ 2, "ora", "indexed" ], 218 | 0xba : [ 3, "ora", "extended" ], 219 | 0xca : [ 2, "orb", "imm8" ], 220 | 0xda : [ 2, "orb", "direct" ], 221 | 0xea : [ 2, "orb", "indexed" ], 222 | 0xfa : [ 3, "orb", "extended" ], 223 | 0x1a : [ 2, "orcc", "imm8" ], 224 | 0x34 : [ 2, "pshs", "imm8" ], 225 | 0x36 : [ 2, "pshu", "imm8" ], 226 | 0x35 : [ 2, "puls", "imm8" ], 227 | 0x37 : [ 2, "pulu", "imm8" ], 228 | 0x49 : [ 1, "rola", "inherent" ], 229 | 0x59 : [ 1, "rolb", "inherent" ], 230 | 0x09 : [ 2, "rol", "direct" ], 231 | 0x69 : [ 2, "rol", "indexed" ], 232 | 0x79 : [ 3, "rol", "extended" ], 233 | 0x46 : [ 1, "rora", "inherent" ], 234 | 0x56 : [ 1, "rorb", "inherent" ], 235 | 0x06 : [ 2, "ror", "direct" ], 236 | 0x66 : [ 2, "ror", "indexed" ], 237 | 0x76 : [ 3, "ror", "extended" ], 238 | 0x3b : [ 1, "rti", "inherent" ], 239 | 0x39 : [ 1, "rts", "inherent" ], 240 | 0x82 : [ 2, "sbca", "imm8" ], 241 | 0x92 : [ 2, "sbca", "direct" ], 242 | 0xa2 : [ 2, "sbca", "indexed" ], 243 | 0xb2 : [ 3, "sbca", "extended" ], 244 | 0xc2 : [ 2, "sbcb", "imm8" ], 245 | 0xd2 : [ 2, "sbcb", "direct" ], 246 | 0xe2 : [ 2, "sbcb", "indexed" ], 247 | 0xf2 : [ 3, "sbcb", "extended" ], 248 | 0x1d : [ 1, "sex", "inherent" ], 249 | 0x97 : [ 2, "sta", "direct" ], 250 | 0xa7 : [ 2, "sta", "indexed" ], 251 | 0xb7 : [ 3, "sta", "extended" ], 252 | 0xd7 : [ 2, "stb", "direct" ], 253 | 0xe7 : [ 2, "stb", "indexed" ], 254 | 0xf7 : [ 3, "stb", "extended" ], 255 | 0xdd : [ 2, "std", "direct" ], 256 | 0xed : [ 2, "std", "indexed" ], 257 | 0xfd : [ 3, "std", "extended" ], 258 | 0x10df : [ 3, "sts", "direct" ], 259 | 0x10ef : [ 3, "sts", "indexed" ], 260 | 0x10ff : [ 4, "sts", "extended" ], 261 | 0xdf : [ 2, "stu", "direct" ], 262 | 0xef : [ 2, "stu", "indexed" ], 263 | 0xff : [ 3, "stu", "extended" ], 264 | 0x9f : [ 2, "stx", "direct" ], 265 | 0xaf : [ 2, "stx", "indexed" ], 266 | 0xbf : [ 3, "stx", "extended" ], 267 | 0x109f : [ 3, "sty", "direct" ], 268 | 0x10af : [ 3, "sty", "indexed" ], 269 | 0x10bf : [ 4, "sty", "extended" ], 270 | 0x80 : [ 2, "suba", "imm8" ], 271 | 0x90 : [ 2, "suba", "direct" ], 272 | 0xa0 : [ 2, "suba", "indexed" ], 273 | 0xb0 : [ 3, "suba", "extended" ], 274 | 0xc0 : [ 2, "subb", "imm8" ], 275 | 0xd0 : [ 2, "subb", "direct" ], 276 | 0xe0 : [ 2, "subb", "indexed" ], 277 | 0xf0 : [ 3, "subb", "extended" ], 278 | 0x83 : [ 3, "subd", "imm16" ], 279 | 0x93 : [ 2, "subd", "direct" ], 280 | 0xa3 : [ 2, "subd", "indexed" ], 281 | 0xb3 : [ 3, "subd", "extended" ], 282 | 0x3f : [ 1, "swi", "inherent" ], 283 | 0x103f : [ 2, "swi2", "inherent" ], 284 | 0x113f : [ 2, "swi3", "inherent" ], 285 | 0x13 : [ 1, "sync", "inherent" ], 286 | 0x1f : [ 2, "tfr", "r1,r2" ], 287 | 0x4d : [ 1, "tsta", "inherent" ], 288 | 0x5d : [ 1, "tstb", "inherent" ], 289 | 0x0d : [ 2, "tst", "direct" ], 290 | 0x6d : [ 2, "tst", "indexed" ], 291 | 0x7d : [ 3, "tst", "extended" ], 292 | 0x24 : [ 2, "bcc", "rel8", pcr ], 293 | 0x1024 : [ 4, "lbcc", "rel16", pcr ], 294 | 0x25 : [ 2, "bcs", "rel8", pcr ], 295 | 0x1025 : [ 4, "lbcs", "rel16", pcr ], 296 | 0x27 : [ 2, "beq", "rel8", pcr ], 297 | 0x1027 : [ 4, "lbeq", "rel16", pcr ], 298 | 0x2c : [ 2, "bge", "rel8", pcr ], 299 | 0x102c : [ 4, "lbge", "rel16", pcr ], 300 | 0x2e : [ 2, "bgt", "rel8", pcr ], 301 | 0x102e : [ 4, "lbgt", "rel16", pcr ], 302 | 0x22 : [ 2, "bhi", "rel8", pcr ], 303 | 0x1022 : [ 4, "lbhi", "rel16", pcr ], 304 | 0x24 : [ 2, "bhs", "rel8", pcr ], 305 | 0x1024 : [ 4, "lbhs", "rel16", pcr ], 306 | 0x2f : [ 2, "ble", "rel8", pcr ], 307 | 0x102f : [ 4, "lble", "rel16", pcr ], 308 | 0x25 : [ 2, "blo", "rel8", pcr ], 309 | 0x1025 : [ 4, "lblo", "rel16", pcr ], 310 | 0x23 : [ 2, "bls", "rel8", pcr ], 311 | 0x1023 : [ 4, "lbls", "rel16", pcr ], 312 | 0x2d : [ 2, "blt", "rel8", pcr ], 313 | 0x102d : [ 4, "lblt", "rel16", pcr ], 314 | 0x2b : [ 2, "bmi", "rel8", pcr ], 315 | 0x102b : [ 4, "lbmi", "rel16", pcr ], 316 | 0x26 : [ 2, "bne", "rel8", pcr ], 317 | 0x1026 : [ 4, "lbne", "rel16", pcr ], 318 | 0x2a : [ 2, "bpl", "rel8", pcr ], 319 | 0x102a : [ 4, "lbpl", "rel16", pcr ], 320 | 0x20 : [ 2, "bra", "rel8", pcr ], 321 | 0x16 : [ 3, "lbra", "rel16", pcr ], 322 | 0x21 : [ 2, "brn", "rel8", pcr ], 323 | 0x1021 : [ 4, "lbrn", "rel16", pcr ], 324 | 0x8d : [ 2, "bsr", "rel8", pcr ], 325 | 0x17 : [ 3, "lbsr", "rel16", pcr ], 326 | 0x28 : [ 2, "bvc", "rel8", pcr ], 327 | 0x1028 : [ 4, "lbvc", "rel16", pcr ], 328 | 0x29 : [ 2, "bvs", "rel8", pcr ], 329 | 0x1029 : [ 4, "lbvs", "rel16", pcr ], 330 | 331 | } 332 | 333 | # End of processor specific code 334 | ########################################################################## 335 | -------------------------------------------------------------------------------- /65816.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "65816" 6 | # Description = "Western Design Center 65816 8/16-bit microprocessor." 7 | # DataWidth = 8/16 # 8-bit or 16-bit data depending on processor mode 8 | # AddressWidth = 16/24 # 16-bit or 24-bit addresses depending on processor mode 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 4 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implicit" : "", 20 | "absolute" : "${1:02X}{0:02X}", 21 | "absolutex" : "${1:02X}{0:02X},x", 22 | "absolutey" : "${1:02X}{0:02X},y", 23 | "accumulator" : "a", 24 | "immediate" : "#${0:02X}", 25 | "indirectx" : "(${0:02X},x)", 26 | "indirecty" : "(${0:02X}),y", 27 | "indirect" : "(${1:02X}{0:02X})", 28 | "relative" : "${0:04X}", 29 | "relativelong" : "${0:04X}", 30 | "zeropage" : "${0:02X}", 31 | "zeropagex" : "${0:02X},x", 32 | "zeropagey" : "${0:02X},y", 33 | "indirectzeropage" : "(${0:02X})", 34 | "absoluteindexedindirect" : "(${1:02X}{0:02X},x)", 35 | "stackrelative" : "${0:02X},s", 36 | "stackrelativeindirecty" : "(${0:02X},s),y", 37 | "absolutelong" : "${2:02X}{1:02X}{0:02X}", 38 | "absolutelongx" : "${2:02X}{1:02X}{0:02X},x", 39 | "absoluteindirectx" : "(${1:02X}{0:02X},x)", 40 | "absoluteindirectlong" : "[${1:02X}{0:02X}]", 41 | "directpageindirect" : "(${0:02X})", 42 | "directpageindirectlong" : "[${0:02X}]", 43 | "directpageindirectlongy" : "[${0:02X}],y", 44 | "blockmove" : "${0:02X},${1:02X}", 45 | } 46 | 47 | # Op Code Table 48 | # Key is numeric opcode (possibly multiple bytes) 49 | # Value is a list: 50 | # # bytes 51 | # mnemonic 52 | # addressing mode 53 | # flags (e.g. pcr) 54 | 55 | # regex conversion from http://www.zophar.net/fileuploads/2/10538ivwiu/65816info.txt 56 | # find: ([0-9A-F]+) ([A-Z]+) (.+?)( +)([1-4]) 57 | # replace: 0x\1 : [ \5, "\2", "\3"\4], 58 | opcodeTable = { 59 | 0x00 : [ 1, "brk", "implicit" ], 60 | 0x01 : [ 2, "ora", "indirectx" ], 61 | 0x02 : [ 2, "cop", "zeropage" ], 62 | 0x03 : [ 2, "ora", "stackrelative" ], 63 | 0x04 : [ 2, "tsb", "zeropage" ], 64 | 0x05 : [ 2, "ora", "zeropage" ], 65 | 0x06 : [ 2, "asl", "zeropage" ], 66 | 0x07 : [ 2, "ora", "directpageindirectlong" ], 67 | 0x08 : [ 1, "php", "implicit" ], 68 | 0x09 : [ 2, "ora", "immediate" ], 69 | 0x0a : [ 1, "asl", "accumulator" ], 70 | 0x0b : [ 1, "phd", "implicit" ], 71 | 0x0c : [ 3, "tsb", "absolute" ], 72 | 0x0d : [ 3, "ora", "absolute" ], 73 | 0x0e : [ 3, "asl", "absolute" ], 74 | 0x0f : [ 4, "ora", "absolutelong" ], 75 | 76 | 0x10 : [ 2, "bpl", "relative", pcr ], 77 | 0x11 : [ 2, "ora", "indirecty" ], 78 | 0x12 : [ 2, "ora", "indirectzeropage" ], 79 | 0x13 : [ 2, "ora", "stackrelativeindirecty" ], 80 | 0x14 : [ 2, "trb", "zeropage" ], 81 | 0x15 : [ 2, "ora", "zeropagex" ], 82 | 0x16 : [ 2, "asl", "zeropagex" ], 83 | 0x17 : [ 2, "ora", "directpageindirectlongy" ], 84 | 0x18 : [ 1, "clc", "implicit" ], 85 | 0x19 : [ 3, "ora", "absolutey" ], 86 | 0x1a : [ 1, "inc", "accumulator" ], 87 | 0x1b : [ 1, "tcs", "implicit" ], 88 | 0x1c : [ 3, "trb", "absolute" ], 89 | 0x1d : [ 3, "ora", "absolutex" ], 90 | 0x1e : [ 3, "asl", "absolutex" ], 91 | 0x1f : [ 4, "ora", "absolutelongx" ], 92 | 93 | 0x20 : [ 3, "jsr", "absolute" ], 94 | 0x21 : [ 2, "and", "indirectx" ], 95 | 0x22 : [ 4, "jsr", "absolutelong" ], 96 | 0x23 : [ 2, "and", "stackrelative" ], 97 | 0x24 : [ 2, "bit", "zeropage" ], 98 | 0x25 : [ 2, "and", "zeropage" ], 99 | 0x26 : [ 2, "rol", "zeropage" ], 100 | 0x27 : [ 2, "and", "directpageindirectlong" ], 101 | 0x28 : [ 1, "plp", "implicit" ], 102 | 0x29 : [ 2, "and", "immediate" ], 103 | 0x2a : [ 1, "rol", "accumulator" ], 104 | 0x2b : [ 1, "pld", "implicit" ], 105 | 0x2c : [ 3, "bit", "absolute" ], 106 | 0x2d : [ 3, "and", "absolute" ], 107 | 0x2e : [ 3, "rol", "absolute" ], 108 | 0x2f : [ 4, "and", "absolutelong" ], 109 | 110 | 0x30 : [ 2, "bmi", "relative", pcr ], 111 | 0x31 : [ 2, "and", "indirecty" ], 112 | 0x32 : [ 2, "and", "indirectzeropage" ], 113 | 0x33 : [ 2, "and", "stackrelativeindirecty" ], 114 | 0x34 : [ 2, "bit", "zeropagex" ], 115 | 0x35 : [ 2, "and", "zeropagex" ], 116 | 0x36 : [ 2, "rol", "zeropagex" ], 117 | 0x37 : [ 2, "and", "directpageindirectlongy" ], 118 | 0x38 : [ 1, "sec", "implicit" ], 119 | 0x39 : [ 3, "and", "absolutey" ], 120 | 0x3a : [ 1, "dec", "accumulator" ], 121 | 0x3b : [ 1, "tsc", "implicit" ], 122 | 0x3c : [ 3, "bit", "absolutex" ], 123 | 0x3d : [ 3, "and", "absolutex" ], 124 | 0x3e : [ 3, "rol", "absolutex" ], 125 | 0x3f : [ 4, "and", "absolutelongx" ], 126 | 127 | 0x40 : [ 1, "rti", "implicit" ], 128 | 0x41 : [ 2, "eor", "indirectx" ], 129 | 0x42 : [ 2, "wdm", "zeropage" ], 130 | 0x43 : [ 2, "eor", "stackrelative" ], 131 | 0x44 : [ 3, "mvp", "blockmove" ], 132 | 0x45 : [ 2, "eor", "zeropage" ], 133 | 0x46 : [ 2, "lsr", "zeropage" ], 134 | 0x47 : [ 2, "eor", "directpageindirectlong" ], 135 | 0x48 : [ 1, "pha", "implicit" ], 136 | 0x49 : [ 2, "eor", "immediate" ], 137 | 0x4a : [ 1, "lsr", "accumulator" ], 138 | 0x4b : [ 1, "phk", "implicit" ], 139 | 0x4c : [ 3, "jmp", "absolute" ], 140 | 0x4d : [ 3, "eor", "absolute" ], 141 | 0x4e : [ 3, "lsr", "absolute" ], 142 | 0x4f : [ 4, "eor", "absolutelong" ], 143 | 144 | 0x50 : [ 2, "bvc", "relative", pcr ], 145 | 0x51 : [ 2, "eor", "indirecty" ], 146 | 0x52 : [ 2, "eor", "indirectzeropage" ], 147 | 0x53 : [ 2, "eor", "stackrelativeindirecty" ], 148 | 0x54 : [ 3, "mvn", "blockmove" ], 149 | 0x55 : [ 2, "eor", "zeropagex" ], 150 | 0x56 : [ 2, "lsr", "zeropagex" ], 151 | 0x57 : [ 2, "eor", "directpageindirectlongy" ], 152 | 0x58 : [ 1, "cli", "implicit" ], 153 | 0x59 : [ 3, "eor", "absolutey" ], 154 | 0x5a : [ 1, "phy", "implicit" ], 155 | 0x5b : [ 1, "tcd", "implicit" ], 156 | 0x5c : [ 4, "jmp", "absolutelong" ], 157 | 0x5d : [ 3, "eor", "absolutex" ], 158 | 0x5e : [ 3, "lsr", "absolutex" ], 159 | 0x5f : [ 4, "eor", "absolutelongx" ], 160 | 161 | 0x60 : [ 1, "rts", "implicit" ], 162 | 0x61 : [ 2, "adc", "indirectx" ], 163 | 0x62 : [ 3, "per", "absolute" ], 164 | 0x63 : [ 2, "adc", "stackrelative" ], 165 | 0x64 : [ 2, "stz", "zeropage" ], 166 | 0x65 : [ 2, "adc", "zeropage" ], 167 | 0x66 : [ 2, "ror", "zeropage" ], 168 | 0x67 : [ 2, "adc", "directpageindirectlong" ], 169 | 0x68 : [ 1, "pla", "implicit" ], 170 | 0x69 : [ 2, "adc", "immediate" ], 171 | 0x6a : [ 1, "ror", "accumulator" ], 172 | 0x6b : [ 1, "rtl", "implicit" ], 173 | 0x6c : [ 3, "jmp", "indirect" ], 174 | 0x6d : [ 3, "adc", "absolute" ], 175 | 0x6e : [ 3, "ror", "absolute" ], 176 | 0x6f : [ 4, "adc", "absolutelong" ], 177 | 178 | 0x70 : [ 2, "bvs", "relative", pcr ], 179 | 0x71 : [ 2, "adc", "indirecty" ], 180 | 0x72 : [ 2, "adc", "indirectzeropage" ], 181 | 0x73 : [ 2, "adc", "stackrelativeindirecty" ], 182 | 0x74 : [ 2, "stz", "zeropagex" ], 183 | 0x74 : [ 2, "stz", "zeropagex" ], 184 | 0x75 : [ 2, "adc", "zeropagex" ], 185 | 0x76 : [ 2, "ror", "zeropagex" ], 186 | 0x77 : [ 2, "adc", "directpageindirectlongy" ], 187 | 0x78 : [ 1, "sei", "implicit" ], 188 | 0x79 : [ 3, "adc", "absolutey" ], 189 | 0x7a : [ 1, "ply", "implicit" ], 190 | 0x7b : [ 1, "tdc", "implicit" ], 191 | 0x7c : [ 3, "jmp", "absoluteindexedindirect" ], 192 | 0x7d : [ 3, "adc", "absolutex" ], 193 | 0x7e : [ 3, "ror", "absolutex" ], 194 | 0x7f : [ 4, "adc", "absolutelongx" ], 195 | 196 | 0x80 : [ 2, "bra", "relative", pcr ], 197 | 0x81 : [ 2, "sta", "indirectx" ], 198 | 0x82 : [ 3, "brl", "relativelong", pcr ], 199 | 0x83 : [ 2, "sta", "stackrelative" ], 200 | 0x84 : [ 2, "sty", "zeropage" ], 201 | 0x85 : [ 2, "sta", "zeropage" ], 202 | 0x86 : [ 2, "stx", "zeropage" ], 203 | 0x87 : [ 2, "sta", "directpageindirectlong" ], 204 | 0x88 : [ 1, "dey", "implicit" ], 205 | 0x89 : [ 2, "bit", "immediate" ], 206 | 0x8a : [ 1, "txa", "implicit" ], 207 | 0x8b : [ 1, "phb", "implicit" ], 208 | 0x8c : [ 3, "sty", "absolute" ], 209 | 0x8d : [ 3, "sta", "absolute" ], 210 | 0x8e : [ 3, "stx", "absolute" ], 211 | 0x8f : [ 4, "sta", "absolutelong" ], 212 | 213 | 0x90 : [ 2, "bcc", "relative", pcr ], 214 | 0x91 : [ 2, "sta", "indirecty" ], 215 | 0x92 : [ 2, "sta", "indirectzeropage" ], 216 | 0x93 : [ 2, "sta", "stackrelativeindirecty" ], 217 | 0x94 : [ 2, "sty", "zeropagex" ], 218 | 0x95 : [ 2, "sta", "zeropagex" ], 219 | 0x96 : [ 2, "stx", "zeropagey" ], 220 | 0x97 : [ 2, "sta", "directpageindirectlongy" ], 221 | 0x98 : [ 1, "tya", "implicit" ], 222 | 0x99 : [ 3, "sta", "absolutey" ], 223 | 0x9a : [ 1, "txs", "implicit" ], 224 | 0x9b : [ 1, "txy", "implicit" ], 225 | 0x9c : [ 3, "stz", "absolute" ], 226 | 0x9d : [ 3, "sta", "absolutex" ], 227 | 0x9e : [ 3, "stz", "absolutex" ], 228 | 0x9f : [ 4, "sta", "absolutelongx" ], 229 | 230 | 0xa0 : [ 2, "ldy", "immediate" ], 231 | 0xa1 : [ 2, "lda", "indirectx" ], 232 | 0xa2 : [ 2, "ldx", "immediate" ], 233 | 0xa3 : [ 2, "lda", "stackrelative" ], 234 | 0xa4 : [ 2, "ldy", "zeropage" ], 235 | 0xa5 : [ 2, "lda", "zeropage" ], 236 | 0xa6 : [ 2, "ldx", "zeropage" ], 237 | 0xa7 : [ 2, "lda", "directpageindirectlong" ], 238 | 0xa8 : [ 1, "tay", "implicit" ], 239 | 0xa9 : [ 2, "lda", "immediate" ], 240 | 0xaa : [ 1, "tax", "implicit" ], 241 | 0xab : [ 1, "plb", "implicit" ], 242 | 0xac : [ 3, "ldy", "absolute" ], 243 | 0xad : [ 3, "lda", "absolute" ], 244 | 0xae : [ 3, "ldx", "absolute" ], 245 | 0xaf : [ 4, "lda", "absolutelong" ], 246 | 247 | 0xb0 : [ 2, "bcs", "relative", pcr ], 248 | 0xb1 : [ 2, "lda", "indirecty" ], 249 | 0xb2 : [ 2, "lda", "indirectzeropage" ], 250 | 0xb3 : [ 2, "lda", "stackrelativeindirecty" ], 251 | 0xb4 : [ 2, "ldy", "zeropagex" ], 252 | 0xb5 : [ 2, "lda", "zeropagex" ], 253 | 0xb6 : [ 2, "ldx", "zeropagey" ], 254 | 0xb7 : [ 2, "lda", "directpageindirectlongy" ], 255 | 0xb8 : [ 1, "clv", "implicit" ], 256 | 0xb9 : [ 3, "lda", "absolutey" ], 257 | 0xba : [ 1, "tsx", "implicit" ], 258 | 0xbb : [ 1, "tyx", "implicit" ], 259 | 0xbc : [ 3, "ldy", "absolutex" ], 260 | 0xbd : [ 3, "lda", "absolutex" ], 261 | 0xbe : [ 3, "ldx", "absolutey" ], 262 | 0xbf : [ 4, "lda", "absolutelongx" ], 263 | 264 | 0xc0 : [ 2, "cpy", "immediate" ], 265 | 0xc1 : [ 2, "cmp", "indirectx" ], 266 | 0xc2 : [ 2, "rep", "immediate" ], 267 | 0xc3 : [ 2, "cmp", "stackrelative" ], 268 | 0xc4 : [ 2, "cpy", "zeropage" ], 269 | 0xc5 : [ 2, "cmp", "zeropage" ], 270 | 0xc6 : [ 2, "dec", "zeropage" ], 271 | 0xc7 : [ 2, "cmp", "directpageindirectlong" ], 272 | 0xc8 : [ 1, "iny", "implicit" ], 273 | 0xc9 : [ 2, "cmp", "immediate" ], 274 | 0xca : [ 1, "dex", "implicit" ], 275 | 0xcb : [ 1, "wai", "implicit" ], 276 | 0xcc : [ 3, "cpy", "absolute" ], 277 | 0xcd : [ 3, "cmp", "absolute" ], 278 | 0xce : [ 3, "dec", "absolute" ], 279 | 0xcf : [ 4, "cmp", "absolutelong" ], 280 | 281 | 0xd0 : [ 2, "bne", "relative", pcr ], 282 | 0xd1 : [ 2, "cmp", "indirecty" ], 283 | 0xd2 : [ 2, "cmp", "indirectzeropage" ], 284 | 0xd3 : [ 2, "cmp", "stackrelativeindirecty" ], 285 | 0xd4 : [ 2, "pei", "directpageindirect" ], 286 | 0xd5 : [ 2, "cmp", "zeropagex" ], 287 | 0xd6 : [ 2, "dec", "zeropagex" ], 288 | 0xd7 : [ 2, "cmp", "directpageindirectlongy" ], 289 | 0xd8 : [ 1, "cld", "implicit" ], 290 | 0xd9 : [ 3, "cmp", "absolutey" ], 291 | 0xda : [ 1, "phx", "implicit" ], 292 | 0xdb : [ 1, "stp", "implicit" ], 293 | 0xdc : [ 3, "jmp", "absoluteindirectlong" ], 294 | 0xdd : [ 3, "cmp", "absolutex" ], 295 | 0xde : [ 3, "dec", "absolutex" ], 296 | 0xdf : [ 4, "cmp", "absolutelongx" ], 297 | 298 | 0xe0 : [ 2, "cpx", "immediate" ], 299 | 0xe1 : [ 2, "sbc", "indirectx" ], 300 | 0xe2 : [ 2, "sep", "immediate" ], 301 | 0xe3 : [ 2, "sbc", "stackrelative" ], 302 | 0xe4 : [ 2, "cpx", "zeropage" ], 303 | 0xe5 : [ 2, "sbc", "zeropage" ], 304 | 0xe6 : [ 2, "inc", "zeropage" ], 305 | 0xe7 : [ 2, "sbc", "directpageindirectlong" ], 306 | 0xe8 : [ 1, "inx", "implicit" ], 307 | 0xe9 : [ 2, "sbc", "immediate" ], 308 | 0xea : [ 1, "nop", "implicit" ], 309 | 0xeb : [ 1, "xba", "implicit" ], 310 | 0xec : [ 3, "cpx", "absolute" ], 311 | 0xed : [ 3, "sbc", "absolute" ], 312 | 0xee : [ 3, "inc", "absolute" ], 313 | 0xef : [ 4, "sbc", "absolutelong" ], 314 | 315 | 0xf0 : [ 2, "beq", "relative", pcr ], 316 | 0xf1 : [ 2, "sbc", "indirecty" ], 317 | 0xf2 : [ 2, "sbc", "indirectzeropage" ], 318 | 0xf3 : [ 2, "sbc", "stackrelativeindirecty" ], 319 | 0xf4 : [ 3, "pea", "absolute" ], 320 | 0xf5 : [ 2, "sbc", "zeropagex" ], 321 | 0xf6 : [ 2, "inc", "zeropagex" ], 322 | 0xf7 : [ 2, "sbc", "directpageindirectlongy" ], 323 | 0xf8 : [ 1, "sed", "implicit" ], 324 | 0xf9 : [ 3, "sbc", "absolutey" ], 325 | 0xfa : [ 1, "plx", "implicit" ], 326 | 0xfb : [ 1, "xce", "implicit" ], 327 | 0xfd : [ 3, "sbc", "absolutex" ], 328 | 0xfe : [ 3, "inc", "absolutex" ], 329 | 0xff : [ 4, "sbc", "absolutelongx" ], 330 | } 331 | 332 | # End of processor specific code 333 | ########################################################################## 334 | -------------------------------------------------------------------------------- /6811.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "6811" 6 | # Description = "FreeScale 68HC11 8-bit microcontroller." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Notes: 11 | 12 | # 1. Some instructions use the same opcode (e.g. bcs and blo). 13 | # Disassembly will use whatever is listed last in this table. 14 | # 2. brset/brclr instructions do not yet output correct branch address. 15 | 16 | # Maximum length of an instruction (for formatting purposes) 17 | maxLength = 5 18 | 19 | # Leadin bytes for multbyte instructions 20 | leadInBytes = [0x18, 0x1a, 0xcd] 21 | 22 | # Addressing mode table 23 | addressModeTable = { 24 | "inherent" : "", 25 | "immediate" : "#${0:02X}", 26 | "immediatex" : "#${0:02X}{1:02X}", 27 | "direct" : "${0:02X}", 28 | "direct2" : "*${0:02X} ${1:02X}", 29 | "direct3" : "*${0:02X} ${1:02X} ${2:04X}", 30 | "extended" : "${0:02X}{1:02X}", 31 | "indexedx" : "${0:02X},x", 32 | "indexedx2" : "${0:02X},x ${1:02X}", 33 | "indexedx3" : "${0:02X},x ${1:02X} ${2:04X}", 34 | "indexedy" : "${0:02X},y", 35 | "indexedy2" : "${0:02X},y ${1:02X}", 36 | "indexedy3" : "${0:02X},y ${1:02X} ${2:04X}", 37 | "relative" : "${0:04X}", 38 | } 39 | 40 | # Op Code Table 41 | # Key is numeric opcode (possibly multiple bytes) 42 | # Value is a list: 43 | # # bytes 44 | # mnemonic 45 | # addressing mode. 46 | # flags (e.g. pcr) 47 | opcodeTable = { 48 | 49 | 0x1b : [ 1, "aba", "inherent" ], 50 | 0x3a : [ 1, "abx", "inherent" ], 51 | 0x183a : [ 2, "aby", "inherent" ], 52 | 0x89 : [ 2, "adca", "immediate" ], 53 | 0x99 : [ 2, "adca", "direct" ], 54 | 0xb9 : [ 3, "adca", "extended" ], 55 | 0xa9 : [ 2, "adca", "indexedx" ], 56 | 0x18a9 : [ 3, "adca", "indexedy" ], 57 | 0xc9 : [ 2, "adcb", "immediate" ], 58 | 0xd9 : [ 2, "adcb", "direct" ], 59 | 0xf9 : [ 3, "adcb", "extended" ], 60 | 0xe9 : [ 2, "adcb", "indexedx" ], 61 | 0x18e9 : [ 3, "adcb", "indexedy" ], 62 | 0x8b : [ 2, "adda", "immediate" ], 63 | 0x9b : [ 2, "adda", "direct" ], 64 | 0xbb : [ 3, "adda", "extended" ], 65 | 0xab : [ 2, "adda", "indexedx" ], 66 | 0x18ab : [ 3, "adda", "indexedy" ], 67 | 0xcb : [ 2, "addb", "immediate" ], 68 | 0xdb : [ 2, "addb", "direct" ], 69 | 0xfb : [ 3, "addb", "extended" ], 70 | 0xeb : [ 2, "addb", "indexedx" ], 71 | 0x18eb : [ 3, "addb", "indexedy" ], 72 | 0xc3 : [ 3, "addd", "immediatex" ], 73 | 0xd3 : [ 2, "addd", "direct" ], 74 | 0xf3 : [ 3, "addd", "extended" ], 75 | 0xe3 : [ 2, "addd", "indexedx" ], 76 | 0x18e3 : [ 3, "addd", "indexedy" ], 77 | 0x84 : [ 2, "anda", "immediate" ], 78 | 0x94 : [ 2, "anda", "direct" ], 79 | 0xb4 : [ 3, "anda", "extended" ], 80 | 0xa4 : [ 2, "anda", "indexedx" ], 81 | 0x18a4 : [ 3, "anda", "indexedy" ], 82 | 0xc4 : [ 2, "andb", "immediate" ], 83 | 0xd4 : [ 2, "andb", "direct" ], 84 | 0xf4 : [ 3, "andb", "extended" ], 85 | 0xe4 : [ 2, "andb", "indexedx" ], 86 | 0x18e4 : [ 3, "andb", "indexedy" ], 87 | 0x78 : [ 3, "asl", "extended" ], 88 | 0x68 : [ 2, "asl", "indexedx" ], 89 | 0x1868 : [ 3, "asl", "indexedy" ], 90 | 0x48 : [ 1, "asla", "inherent" ], 91 | 0x58 : [ 1, "aslb", "inherent" ], 92 | 0x05 : [ 1, "asld", "inherent" ], 93 | 0x77 : [ 3, "asr", "extended" ], 94 | 0x67 : [ 2, "asr", "indexedx" ], 95 | 0x1867 : [ 3, "asr", "indexedy" ], 96 | 0x47 : [ 1, "asra", "inherent" ], 97 | 0x57 : [ 1, "asrb", "inherent" ], 98 | 0x24 : [ 2, "bcc", "relative", pcr ], 99 | 0x15 : [ 3, "bclr", "direct2", ], 100 | 0x1d : [ 3, "bclr", "indexedx2", ], 101 | 0x181d : [ 4, "bclr", "indexedy2", ], 102 | 0x25 : [ 2, "bcs", "relative", pcr ], 103 | 0x27 : [ 2, "beq", "relative", pcr ], 104 | 0x2c : [ 2, "bge", "relative", pcr ], 105 | 0x2e : [ 2, "bgt", "relative", pcr ], 106 | 0x22 : [ 2, "bhi", "relative", pcr ], 107 | 0x24 : [ 2, "bhs", "relative", pcr ], 108 | 0x85 : [ 2, "bita", "immediate" ], 109 | 0x95 : [ 2, "bita", "direct" ], 110 | 0xb5 : [ 3, "bita", "extended" ], 111 | 0xa5 : [ 2, "bita", "indexedx" ], 112 | 0x18a5 : [ 3, "bita", "indexedy" ], 113 | 0xc5 : [ 2, "bitb", "immediate" ], 114 | 0xd5 : [ 2, "bitb", "direct" ], 115 | 0xf5 : [ 3, "bitb", "extended" ], 116 | 0xe5 : [ 2, "bitb", "indexedx" ], 117 | 0x18e5 : [ 3, "bitb", "indexedy" ], 118 | 0x2f : [ 2, "ble", "relative", pcr ], 119 | 0x25 : [ 2, "blo", "relative", pcr ], 120 | 0x23 : [ 2, "bls", "relative", pcr ], 121 | 0x2d : [ 2, "blt", "relative", pcr ], 122 | 0x2b : [ 2, "bmi", "relative", pcr ], 123 | 0x26 : [ 2, "bne", "relative", pcr ], 124 | 0x2a : [ 2, "bpl", "relative", pcr ], 125 | 0x20 : [ 2, "bra", "relative", pcr ], 126 | 0x13 : [ 4, "brclr", "direct3", pcr ], 127 | 0x1f : [ 4, "brclr", "indexedx3", pcr ], 128 | 0x181f : [ 5, "brclr", "indexedy3", pcr ], 129 | 0x21 : [ 2, "brn", "relative", pcr ], 130 | 0x12 : [ 4, "brset", "direct3", pcr ], 131 | 0x1e : [ 4, "brset", "indexedx3", pcr ], 132 | 0x181e : [ 5, "brset", "indexedy3", pcr ], 133 | 0x14 : [ 3, "bset", "direct2", ], 134 | 0x1c : [ 3, "bset", "indexedx2", ], 135 | 0x181c : [ 4, "bset", "indexedy2", ], 136 | 0x8d : [ 2, "bsr", "relative", pcr ], 137 | 0x28 : [ 2, "bvc", "relative", pcr ], 138 | 0x29 : [ 2, "bvs", "relative", pcr ], 139 | 0x11 : [ 1, "cba", "inherent" ], 140 | 0x0c : [ 1, "clc", "inherent" ], 141 | 0x0e : [ 1, "cli", "inherent" ], 142 | 0x7f : [ 3, "clr", "extended" ], 143 | 0x6f : [ 2, "clr", "indexedx" ], 144 | 0x187f : [ 3, "clr", "indexedy" ], 145 | 0x4f : [ 1, "clra", "inherent" ], 146 | 0x5f : [ 1, "clrb", "inherent" ], 147 | 0x0a : [ 1, "clv", "inherent" ], 148 | 0x81 : [ 2, "cmpa", "immediate" ], 149 | 0x91 : [ 2, "cmpa", "direct" ], 150 | 0xb1 : [ 3, "cmpa", "extended" ], 151 | 0xa1 : [ 2, "cmpa", "indexedx" ], 152 | 0x18a1 : [ 3, "cmpa", "indexedy" ], 153 | 0xc1 : [ 2, "cmpb", "immediate" ], 154 | 0xd1 : [ 2, "cmpb", "direct" ], 155 | 0xf1 : [ 3, "cmpb", "extended" ], 156 | 0xe1 : [ 2, "cmpb", "indexedx" ], 157 | 0x18e1 : [ 3, "cmpb", "indexedy" ], 158 | 0x73 : [ 3, "com", "extended" ], 159 | 0x63 : [ 2, "com", "indexedx" ], 160 | 0x1863 : [ 3, "com", "indexedy" ], 161 | 0x43 : [ 1, "coma", "inherent" ], 162 | 0x53 : [ 1, "comb", "inherent" ], 163 | 0x1a83 : [ 4, "cpd", "immediatex" ], 164 | 0x1a93 : [ 3, "cpd", "direct" ], 165 | 0x1ab3 : [ 4, "cpd", "extended" ], 166 | 0x1aa3 : [ 3, "cpd", "indexedx" ], 167 | 0xcda3 : [ 3, "cpd", "indexedy" ], 168 | 0x8c : [ 3, "cpx", "immediatex" ], 169 | 0x9c : [ 2, "cpx", "direct" ], 170 | 0xbc : [ 3, "cpx", "extended" ], 171 | 0xac : [ 2, "cpx", "indexedx" ], 172 | 0xcdac : [ 3, "cpx", "indexedy" ], 173 | 0x188c : [ 4, "cpy", "immediatex" ], 174 | 0x189c : [ 3, "cpy", "direct" ], 175 | 0x18bc : [ 4, "cpy", "extended" ], 176 | 0x1aac : [ 3, "cpy", "indexedx" ], 177 | 0x18ac : [ 3, "cpy", "indexedy" ], 178 | 0x19 : [ 1, "daa", "inherent" ], 179 | 0x7a : [ 3, "dec", "extended" ], 180 | 0x6a : [ 2, "dec", "indexedx" ], 181 | 0x186a : [ 3, "dec", "indexedy" ], 182 | 0x4a : [ 1, "deca", "inherent" ], 183 | 0x5a : [ 1, "decb", "inherent" ], 184 | 0x34 : [ 1, "des", "inherent" ], 185 | 0x09 : [ 1, "dex", "inherent" ], 186 | 0x1809 : [ 2, "dey", "inherent" ], 187 | 0x88 : [ 2, "eora", "immediate" ], 188 | 0x98 : [ 2, "eora", "direct" ], 189 | 0xb8 : [ 3, "eora", "extended" ], 190 | 0xa8 : [ 2, "eora", "indexedx" ], 191 | 0x18a8 : [ 3, "eora", "indexedy" ], 192 | 0xc8 : [ 2, "eorb", "immediate" ], 193 | 0xd8 : [ 2, "eorb", "direct" ], 194 | 0xf8 : [ 3, "eorb", "extended" ], 195 | 0xe8 : [ 2, "eorb", "indexedx" ], 196 | 0x18e8 : [ 3, "eorb", "indexedy" ], 197 | 0x03 : [ 1, "fdiv", "inherent" ], 198 | 0x02 : [ 1, "idiv", "inherent" ], 199 | 0x7c : [ 3, "inc", "extended" ], 200 | 0x6c : [ 2, "inc", "indexedx" ], 201 | 0x186c : [ 3, "inc", "indexedy" ], 202 | 0x4c : [ 1, "inca", "inherent" ], 203 | 0x5c : [ 1, "incb", "inherent" ], 204 | 0x31 : [ 1, "ins", "inherent" ], 205 | 0x08 : [ 1, "inx", "inherent" ], 206 | 0x1808 : [ 2, "iny", "inherent" ], 207 | 0x7e : [ 3, "jmp", "extended" ], 208 | 0x6e : [ 2, "jmp", "indexedx" ], 209 | 0x186e : [ 3, "jmp", "indexedy" ], 210 | 0x9d : [ 2, "jsr", "direct" ], 211 | 0xbd : [ 3, "jsr", "extended" ], 212 | 0xad : [ 2, "jsr", "indexedx" ], 213 | 0x18ad : [ 3, "jsr", "indexedy" ], 214 | 0x86 : [ 2, "ldaa", "immediate" ], 215 | 0x96 : [ 2, "ldaa", "direct" ], 216 | 0xb6 : [ 3, "ldaa", "extended" ], 217 | 0xa6 : [ 2, "ldaa", "indexedx" ], 218 | 0x18a6 : [ 3, "ldaa", "indexedy" ], 219 | 0xc6 : [ 2, "ldab", "immediate" ], 220 | 0xd6 : [ 2, "ldab", "direct" ], 221 | 0xf6 : [ 3, "ldab", "extended" ], 222 | 0xe6 : [ 2, "ldab", "indexedx" ], 223 | 0x18e6 : [ 3, "ldab", "indexedy" ], 224 | 0xcc : [ 3, "ldd", "immediatex" ], 225 | 0xdc : [ 2, "ldd", "direct" ], 226 | 0xfc : [ 3, "ldd", "extended" ], 227 | 0xec : [ 2, "ldd", "indexedx" ], 228 | 0x18ec : [ 3, "ldd", "indexedy" ], 229 | 0x8e : [ 3, "lds", "immediatex" ], 230 | 0x9e : [ 2, "lds", "direct" ], 231 | 0xbe : [ 3, "lds", "extended" ], 232 | 0xae : [ 2, "lds", "indexedx" ], 233 | 0x18ae : [ 3, "lds", "indexedy" ], 234 | 0xce : [ 3, "ldx", "immediatex" ], 235 | 0xde : [ 2, "ldx", "direct" ], 236 | 0xfe : [ 3, "ldx", "extended" ], 237 | 0xee : [ 2, "ldx", "indexedx" ], 238 | 0xcdee : [ 3, "ldx", "indexedy" ], 239 | 0x18ce : [ 4, "ldy", "immediatex" ], 240 | 0x18de : [ 3, "ldy", "direct" ], 241 | 0x18fe : [ 4, "ldy", "extended" ], 242 | 0x1aee : [ 3, "ldy", "indexedx" ], 243 | 0x18ee : [ 3, "ldy", "indexedy" ], 244 | 0x78 : [ 3, "lsl", "extended" ], 245 | 0x68 : [ 2, "lsl", "indexedx" ], 246 | 0x1868 : [ 3, "lsl", "indexedy" ], 247 | 0x48 : [ 1, "lsla", "inherent" ], 248 | 0x58 : [ 1, "lslb", "inherent" ], 249 | 0x05 : [ 1, "lsld", "inherent" ], 250 | 0x74 : [ 3, "lsr", "extended" ], 251 | 0x64 : [ 2, "lsr", "indexedx" ], 252 | 0x1864 : [ 3, "lsr", "indexedy" ], 253 | 0x44 : [ 1, "lsra", "inherent" ], 254 | 0x54 : [ 1, "lsrb", "inherent" ], 255 | 0x04 : [ 1, "lsrd", "inherent" ], 256 | 0x3d : [ 1, "mul", "inherent" ], 257 | 0x70 : [ 3, "neg", "extended" ], 258 | 0x60 : [ 2, "neg", "indexedx" ], 259 | 0x1860 : [ 3, "neg", "indexedy" ], 260 | 0x40 : [ 3, "nega", "inherent" ], 261 | 0x50 : [ 3, "negb", "inherent" ], 262 | 0x01 : [ 1, "nop", "inherent" ], 263 | 0x8a : [ 2, "oraa", "immediate" ], 264 | 0x9a : [ 2, "oraa", "direct" ], 265 | 0xba : [ 3, "oraa", "extended" ], 266 | 0xaa : [ 2, "oraa", "indexedx" ], 267 | 0x18aa : [ 3, "oraa", "indexedy" ], 268 | 0xca : [ 2, "orab", "immediate" ], 269 | 0xda : [ 2, "orab", "direct" ], 270 | 0xfa : [ 3, "orab", "extended" ], 271 | 0xea : [ 2, "orab", "indexedx" ], 272 | 0x18ea : [ 3, "orab", "indexedy" ], 273 | 0x36 : [ 1, "psha", "inherent" ], 274 | 0x37 : [ 1, "pshb", "inherent" ], 275 | 0x3c : [ 1, "pshx", "inherent" ], 276 | 0x183c : [ 2, "pshy", "inherent" ], 277 | 0x32 : [ 1, "pula", "inherent" ], 278 | 0x33 : [ 1, "pulb", "inherent" ], 279 | 0x38 : [ 1, "pulx", "inherent" ], 280 | 0x1838 : [ 2, "puly", "inherent" ], 281 | 0x79 : [ 3, "rol", "extended" ], 282 | 0x69 : [ 2, "rol", "indexedx" ], 283 | 0x1869 : [ 3, "rol", "indexedy" ], 284 | 0x49 : [ 1, "rola", "inherent" ], 285 | 0x59 : [ 1, "rolb", "inherent" ], 286 | 0x76 : [ 3, "ror", "extended" ], 287 | 0x66 : [ 2, "ror", "indexedx" ], 288 | 0x1866 : [ 3, "ror", "indexedy" ], 289 | 0x46 : [ 1, "rora", "inherent" ], 290 | 0x55 : [ 1, "rorb", "inherent" ], 291 | 0x3b : [ 1, "rti", "inherent" ], 292 | 0x39 : [ 1, "rts", "inherent" ], 293 | 0x10 : [ 1, "sba", "inherent" ], 294 | 0x82 : [ 2, "sbca", "immediate" ], 295 | 0x92 : [ 2, "sbca", "direct" ], 296 | 0xb2 : [ 3, "sbca", "extended" ], 297 | 0xa2 : [ 2, "sbca", "indexedx" ], 298 | 0x18a2 : [ 3, "sbca", "indexedy" ], 299 | 0xc2 : [ 2, "sbcb", "immediate" ], 300 | 0xd2 : [ 2, "sbcb", "direct" ], 301 | 0xf2 : [ 3, "sbcb", "extended" ], 302 | 0xe2 : [ 2, "sbcb", "indexedx" ], 303 | 0x18e2 : [ 3, "sbcb", "indexedy" ], 304 | 0x0d : [ 1, "sec", "inherent" ], 305 | 0x0f : [ 1, "sei", "inherent" ], 306 | 0x0b : [ 1, "sev", "inherent" ], 307 | 0x97 : [ 2, "staa", "direct" ], 308 | 0xb7 : [ 3, "staa", "extended" ], 309 | 0xa7 : [ 2, "staa", "indexedx" ], 310 | 0x18a7 : [ 3, "staa", "indexedy" ], 311 | 0xd7 : [ 2, "stab", "direct" ], 312 | 0xf7 : [ 3, "stab", "extended" ], 313 | 0xe7 : [ 2, "stab", "indexedx" ], 314 | 0x18e7 : [ 3, "stab", "indexedy" ], 315 | 0xdd : [ 2, "std", "direct" ], 316 | 0xfd : [ 3, "std", "extended" ], 317 | 0xed : [ 2, "std", "indexedx" ], 318 | 0x18ed : [ 3, "std", "indexedy" ], 319 | 0xcf : [ 1, "stop", "inherent" ], 320 | 0x9f : [ 2, "sts", "direct" ], 321 | 0xbf : [ 3, "sts", "extended" ], 322 | 0xaf : [ 2, "sts", "indexedx" ], 323 | 0x18af : [ 3, "sts", "indexedy" ], 324 | 0xdf : [ 2, "stx", "direct" ], 325 | 0xff : [ 3, "stx", "extended" ], 326 | 0xef : [ 2, "stx", "indexedx" ], 327 | 0xcdef : [ 3, "stx", "indexedy" ], 328 | 0x18df : [ 3, "sty", "direct" ], 329 | 0x18ff : [ 4, "sty", "extended" ], 330 | 0x1aef : [ 3, "sty", "indexedx" ], 331 | 0x18ef : [ 3, "sty", "indexedy" ], 332 | 0x80 : [ 2, "suba", "immediate" ], 333 | 0x90 : [ 2, "suba", "direct" ], 334 | 0xb0 : [ 3, "suba", "extended" ], 335 | 0xa0 : [ 2, "suba", "indexedx" ], 336 | 0x18a0 : [ 3, "suba", "indexedy" ], 337 | 0xc0 : [ 2, "subb", "immediate" ], 338 | 0xd0 : [ 2, "subb", "direct" ], 339 | 0xf0 : [ 3, "subb", "extended" ], 340 | 0xe0 : [ 2, "subb", "indexedx" ], 341 | 0x18e0 : [ 3, "subb", "indexedy" ], 342 | 0x83 : [ 3, "subd", "immediatex" ], 343 | 0x93 : [ 2, "subd", "direct" ], 344 | 0xb3 : [ 3, "subd", "extended" ], 345 | 0xa3 : [ 2, "subd", "indexedx" ], 346 | 0x18a3 : [ 3, "subd", "indexedy" ], 347 | 0x3f : [ 1, "swi", "inherent" ], 348 | 0x16 : [ 1, "tab", "inherent" ], 349 | 0x06 : [ 1, "tap", "inherent" ], 350 | 0x17 : [ 1, "tba", "inherent" ], 351 | 0x00 : [ 1, "test", "inherent" ], 352 | 0x07 : [ 1, "tpa", "inherent" ], 353 | 0x7d : [ 3, "tst", "extended" ], 354 | 0x6d : [ 2, "tst", "indexedx" ], 355 | 0x186d : [ 3, "tst", "indexedy" ], 356 | 0x4d : [ 1, "tsta", "inherent" ], 357 | 0x5d : [ 1, "tstb", "inherent" ], 358 | 0x30 : [ 1, "tsx", "inherent" ], 359 | 0x1830 : [ 2, "tsy", "inherent" ], 360 | 0x35 : [ 1, "txs", "inherent" ], 361 | 0x1835 : [ 2, "tys", "inherent" ], 362 | 0x3e : [ 1, "wai", "inherent" ], 363 | 0x8f : [ 1, "xgdx", "inherent" ], 364 | 0x188f : [ 2, "xgdy", "inherent" ], 365 | 366 | } 367 | 368 | # End of processor specific code 369 | ########################################################################## 370 | -------------------------------------------------------------------------------- /8051.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "8051" 6 | # Description = "Intel 8051 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 3 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "" : "", 20 | "@a+dptr" : "@a+dptr", 21 | "@dptr,a" : "@dptr,a", 22 | "@r0" : "@r0", 23 | "@r0,a" : "@r0,a", 24 | "@r0,direct" : "@r0,${0:02X}", 25 | "@r0,immed" : "@r0,#${0:02X}", 26 | "@r0,immed,offset" : "@r0,#${0:02x},${1:02X}", 27 | "@r1" : "@r1", 28 | "@r1,a" : "@r1,a", 29 | "@r1,direct" : "@r1,${0:02X}", 30 | "@r1,immed" : "@r1,#${0:02X}", 31 | "@r1,immed,offset" : "@r1,#${0:02x},${1:02X}", 32 | "a" : "a", 33 | "a,@a+dptr" : "a,@a+dptr", 34 | "a,@a+pc" : "a,@a+pc", 35 | "a,@dptr" : "a,@dptr", 36 | "a,@r0" : "a,@r0", 37 | "a,@r1" : "a,@r1", 38 | "a,direct" : "a,${0:02X}", 39 | "a,direct,offset" : "a,${0:02x},${1:02X}", 40 | "a,immed" : "a,#${0:02X}", 41 | "a,immed,offset" : "a,#${0:02x},${1:02X}", 42 | "a,r0" : "a,r0", 43 | "a,r1" : "a,r1", 44 | "a,r2" : "a,r2", 45 | "a,r3" : "a,r3", 46 | "a,r4" : "a,r4", 47 | "a,r5" : "a,r5", 48 | "a,r6" : "a,r6", 49 | "a,r7" : "a,r7", 50 | "ab" : "ab", 51 | "addr11" : "${0:02X}", 52 | "addr16" : "${1:02X}{0:02X}", 53 | "bit" : "${0:02X}", 54 | "bit,c" : "${0:02X},c", 55 | "bit,offset" : "${0:02X},${1:02X}", 56 | "c" : "c", 57 | "c,bit" : "c,${0:02X}", 58 | "direct" : "${0:02X}", 59 | "direct,@r0" : "${0:02X},@r0", 60 | "direct,@r1" : "${0:02X},@r1", 61 | "direct,a" : "${0:02X},a", 62 | "direct,direct" : "${0:02X},${1:02X}", 63 | "direct,immed" : "${0:02X},#${1:02X}", 64 | "direct,offset" : "${0:02X},${1:02X}", 65 | "direct,r0" : "${0:02X},r0", 66 | "direct,r1" : "${0:02X},r1", 67 | "direct,r2" : "${0:02X},r2", 68 | "direct,r3" : "${0:02X},r3", 69 | "direct,r4" : "${0:02X},r4", 70 | "direct,r5" : "${0:02X},r5", 71 | "direct,r6" : "${0:02X},r6", 72 | "direct,r7" : "${0:02X},r7", 73 | "dptr" : "dptr", 74 | "dptr,immed" : "dptr,#${0:02X}", 75 | "offset" : "${0:04X}", 76 | "r0" : "r0", 77 | "r0,a" : "r0,a", 78 | "r0,direct" : "r0,${0:02X}", 79 | "r0,immed" : "r0,#${0:02X}", 80 | "r0,immed,offset" : "r0,#${0:02x},${1:02X}", 81 | "r0,offset" : "r0,${0:02X}", 82 | "r1" : "r1", 83 | "r1,a" : "r1,a", 84 | "r1,direct" : "r1,${0:02X}", 85 | "r1,immed" : "r1,#${0:02X}", 86 | "r1,immed,offset" : "r1,#${0:02x},${1:02X}", 87 | "r1,offset" : "r1,${0:02X}", 88 | "r2" : "r2", 89 | "r2,a" : "r2,a", 90 | "r2,direct" : "r2,${0:02X}", 91 | "r2,immed" : "r2,#${0:02X}", 92 | "r2,immed,offset" : "r2,#${0:02x},${1:02X}", 93 | "r2,offset" : "r2,${0:02X}", 94 | "r3" : "r3", 95 | "r3,a" : "r3,a", 96 | "r3,direct" : "r3,${0:02X}", 97 | "r3,immed" : "r3,#${0:02X}", 98 | "r3,immed,offset" : "r3,#${0:02x},${1:02X}", 99 | "r3,offset" : "r3,${0:02X}", 100 | "r4" : "r4", 101 | "r4,a" : "r4,a", 102 | "r4,direct" : "r4,${0:02X}", 103 | "r4,immed" : "r4,#${0:02X}", 104 | "r4,immed,offset" : "r4,#${0:02x},${1:02X}", 105 | "r4,offset" : "r4,${0:02X}", 106 | "r5" : "r5", 107 | "r5,a" : "r5,a", 108 | "r5,direct" : "r5,${0:02X}", 109 | "r5,immed" : "r5,#${0:02X}", 110 | "r5,immed,offset" : "r5,#${0:02x},${1:02X}", 111 | "r5,offset" : "r5,${0:02X}", 112 | "r6" : "r6", 113 | "r6,a" : "r6,a", 114 | "r6,direct" : "r6,${0:02X}", 115 | "r6,immed" : "r6,#${0:02X}", 116 | "r6,immed,offset" : "r6,#${0:02x},${1:02X}", 117 | "r6,offset" : "r6,${0:02X}", 118 | "r7" : "r7", 119 | "r7,a" : "r7,a", 120 | "r7,direct" : "r7,${0:02X}", 121 | "r7,immed" : "r7,#${0:02X}", 122 | "r7,immed,offset" : "r7,#${0:02x},${1:02X}", 123 | "r7,offset" : "r7,${0:02X}", 124 | } 125 | 126 | # Op Code Table 127 | # Key is numeric opcode (possibly multiple bytes) 128 | # Value is a list: 129 | # # bytes 130 | # mnemonic 131 | # addressing mode 132 | # flags (e.g. pcr) 133 | opcodeTable = { 134 | 135 | 0x00 : [ 1, "nop", "" ], 136 | 0x01 : [ 2, "ajmp", "addr11" ], 137 | 0x02 : [ 3, "ljmp", "addr16" ], 138 | 0x03 : [ 1, "rr", "a" ], 139 | 0x04 : [ 1, "inc", "a" ], 140 | 0x05 : [ 2, "inc", "direct" ], 141 | 0x06 : [ 1, "inc", "@r0" ], 142 | 0x07 : [ 1, "inc", "@r1" ], 143 | 0x08 : [ 1, "inc", "r0" ], 144 | 0x09 : [ 1, "inc", "r1" ], 145 | 0x0a : [ 1, "inc", "r2" ], 146 | 0x0b : [ 1, "inc", "r3" ], 147 | 0x0c : [ 1, "inc", "r4" ], 148 | 0x0d : [ 1, "inc", "r5" ], 149 | 0x0e : [ 1, "inc", "r6" ], 150 | 0x0f : [ 1, "inc", "r7" ], 151 | 152 | 0x10 : [ 3, "jbc", "bit,offset" ], 153 | 0x11 : [ 2, "acall", "addr11" ], 154 | 0x12 : [ 3, "lcall", "addr16" ], 155 | 0x13 : [ 1, "rrc", "a" ], 156 | 0x14 : [ 1, "dec", "a" ], 157 | 0x15 : [ 2, "dec", "direct" ], 158 | 0x16 : [ 1, "dec", "r0" ], 159 | 0x17 : [ 1, "dec", "@r1" ], 160 | 0x18 : [ 1, "dec", "r0" ], 161 | 0x19 : [ 1, "dec", "r1" ], 162 | 0x1a : [ 1, "dec", "r2" ], 163 | 0x1b : [ 1, "dec", "r3" ], 164 | 0x1c : [ 1, "dec", "r4" ], 165 | 0x1d : [ 1, "dec", "r5" ], 166 | 0x1e : [ 1, "dec", "r6" ], 167 | 0x1f : [ 1, "dec", "r7" ], 168 | 169 | 0x20 : [ 3, "jb", "bit,offset" ], 170 | 0x21 : [ 2, "ajmp", "addr11" ], 171 | 0x22 : [ 1, "ret", "" ], 172 | 0x23 : [ 1, "rl", "a" ], 173 | 0x24 : [ 2, "add", "a,immed" ], 174 | 0x25 : [ 2, "add", "a,direct" ], 175 | 0x26 : [ 1, "add", "a,r0" ], 176 | 0x27 : [ 1, "add", "a,@r1" ], 177 | 0x28 : [ 1, "add", "a,r0" ], 178 | 0x29 : [ 1, "add", "a,r1" ], 179 | 0x2a : [ 1, "add", "a,r2" ], 180 | 0x2b : [ 1, "add", "a,r3" ], 181 | 0x2c : [ 1, "add", "a,r4" ], 182 | 0x2d : [ 1, "add", "a,r5" ], 183 | 0x2e : [ 1, "add", "a,r6" ], 184 | 0x2f : [ 1, "add", "a,r7" ], 185 | 186 | 0x30 : [ 3, "jnb", "bit,offset" ], 187 | 0x31 : [ 2, "acall", "addr11" ], 188 | 0x32 : [ 1, "reti", "" ], 189 | 0x33 : [ 1, "rlc", "a" ], 190 | 0x34 : [ 2, "addc", "a,immed" ], 191 | 0x35 : [ 2, "addc", "a,direct" ], 192 | 0x36 : [ 1, "addc", "a,@r0" ], 193 | 0x37 : [ 1, "addc", "a,@r1" ], 194 | 0x38 : [ 1, "addc", "a,r0" ], 195 | 0x39 : [ 1, "addc", "a,r1" ], 196 | 0x3a : [ 1, "addc", "a,r2" ], 197 | 0x3b : [ 1, "addc", "a,r3" ], 198 | 0x3c : [ 1, "addc", "a,r4" ], 199 | 0x3d : [ 1, "addc", "a,r5" ], 200 | 0x3e : [ 1, "addc", "a,r6" ], 201 | 0x3f : [ 1, "addc", "a,r7" ], 202 | 203 | 0x40 : [ 2, "jc", "offset",pcr ], 204 | 0x41 : [ 2, "ajmp", "addr11" ], 205 | 0x42 : [ 2, "orl", "direct,a" ], 206 | 0x43 : [ 3, "orl", "direct,immed" ], 207 | 0x44 : [ 2, "orl", "a,immed" ], 208 | 0x45 : [ 2, "orl", "a,direct" ], 209 | 0x46 : [ 1, "orl", "a,@r0" ], 210 | 0x47 : [ 1, "orl", "a,@r1" ], 211 | 0x48 : [ 1, "orl", "a,r0" ], 212 | 0x49 : [ 1, "orl", "a,r1" ], 213 | 0x4a : [ 1, "orl", "a,r2" ], 214 | 0x4b : [ 1, "orl", "a,r3" ], 215 | 0x4c : [ 1, "orl", "a,r4" ], 216 | 0x4d : [ 1, "orl", "a,r5" ], 217 | 0x4e : [ 1, "orl", "a,r6" ], 218 | 0x4f : [ 1, "orl", "a,r7" ], 219 | 220 | 0x50 : [ 2, "jnc", "offset", pcr ], 221 | 0x51 : [ 2, "acall", "addr11" ], 222 | 0x52 : [ 2, "anl", "direct,a" ], 223 | 0x53 : [ 3, "anl", "direct,immed" ], 224 | 0x54 : [ 2, "anl", "a,immed" ], 225 | 0x55 : [ 2, "anl", "a,direct" ], 226 | 0x56 : [ 1, "anl", "a,@r0" ], 227 | 0x57 : [ 1, "anl", "a,@r1" ], 228 | 0x58 : [ 1, "anl", "a,r0" ], 229 | 0x59 : [ 1, "anl", "a,r1" ], 230 | 0x5a : [ 1, "anl", "a,r2" ], 231 | 0x5b : [ 1, "anl", "a,r3" ], 232 | 0x5c : [ 1, "anl", "a,r4" ], 233 | 0x5d : [ 1, "anl", "a,r5" ], 234 | 0x5e : [ 1, "anl", "a,r6" ], 235 | 0x5f : [ 1, "anl", "a,r7" ], 236 | 237 | 0x60 : [ 2, "jz", "offset", pcr ], 238 | 0x61 : [ 2, "ajmp", "addr11" ], 239 | 0x62 : [ 2, "xrl", "direct,a" ], 240 | 0x63 : [ 3, "xrl", "direct,immed" ], 241 | 0x64 : [ 2, "xrl", "a,immed" ], 242 | 0x65 : [ 2, "xrl", "a,direct" ], 243 | 0x66 : [ 1, "xrl", "a,@r0" ], 244 | 0x67 : [ 1, "xrl", "a,@r1" ], 245 | 0x68 : [ 1, "xrl", "a,r0" ], 246 | 0x69 : [ 1, "xrl", "a,r1" ], 247 | 0x6a : [ 1, "xrl", "a,r2" ], 248 | 0x6b : [ 1, "xrl", "a,r3" ], 249 | 0x6c : [ 1, "xrl", "a,r4" ], 250 | 0x6d : [ 1, "xrl", "a,r5" ], 251 | 0x6e : [ 1, "xrl", "a,r6" ], 252 | 0x6f : [ 1, "xrl", "a,r7" ], 253 | 254 | 0x70 : [ 2, "jnz", "offset", pcr ], 255 | 0x71 : [ 2, "acall", "addr11" ], 256 | 0x72 : [ 2, "orl", "c,bit" ], 257 | 0x73 : [ 1, "jmp", "@a+dptr" ], 258 | 0x74 : [ 2, "mov", "a,immed" ], 259 | 0x75 : [ 3, "mov", "direct,immed" ], 260 | 0x76 : [ 2, "mov", "@r0,immed" ], 261 | 0x77 : [ 2, "mov", "@r1,immed" ], 262 | 0x78 : [ 2, "mov", "r0,immed" ], 263 | 0x79 : [ 2, "mov", "r1,immed" ], 264 | 0x7a : [ 2, "mov", "r2,immed" ], 265 | 0x7b : [ 2, "mov", "r3,immed" ], 266 | 0x7c : [ 2, "mov", "r4,immed" ], 267 | 0x7d : [ 2, "mov", "r5,immed" ], 268 | 0x7e : [ 2, "mov", "r6,immed" ], 269 | 0x7f : [ 2, "mov", "r7,immed" ], 270 | 271 | 0x80 : [ 2, "sjmp", "offset", pcr ], 272 | 0x81 : [ 2, "ajmp", "addr11" ], 273 | 0x82 : [ 2, "anl", "c,bit" ], 274 | 0x83 : [ 1, "movc", "a,@a+pc" ], 275 | 0x84 : [ 1, "div", "ab" ], 276 | 0x85 : [ 3, "mov", "direct,direct" ], 277 | 0x86 : [ 2, "mov", "direct,@r0" ], 278 | 0x87 : [ 2, "mov", "direct,@r1" ], 279 | 0x88 : [ 2, "mov", "direct,r0" ], 280 | 0x89 : [ 2, "mov", "direct,r1" ], 281 | 0x8a : [ 2, "mov", "direct,r2" ], 282 | 0x8b : [ 2, "mov", "direct,r3" ], 283 | 0x8c : [ 2, "mov", "direct,r4" ], 284 | 0x8d : [ 2, "mov", "direct,r5" ], 285 | 0x8e : [ 2, "mov", "direct,r6" ], 286 | 0x8f : [ 2, "mov", "direct,r7" ], 287 | 288 | 0x90 : [ 3, "mov", "dptr,immed" ], 289 | 0x91 : [ 2, "acall", "addr11" ], 290 | 0x92 : [ 2, "mov", "bit,c" ], 291 | 0x93 : [ 1, "movc", "a,@a+dptr" ], 292 | 0x94 : [ 2, "subb", "a,immed" ], 293 | 0x95 : [ 2, "subb", "a,direct" ], 294 | 0x96 : [ 1, "subb", "a,@r0" ], 295 | 0x97 : [ 1, "subb", "a,@r1" ], 296 | 0x98 : [ 1, "subb", "a,r0" ], 297 | 0x99 : [ 1, "subb", "a,r1" ], 298 | 0x9a : [ 1, "subb", "a,r2" ], 299 | 0x9b : [ 1, "subb", "a,r3" ], 300 | 0x9c : [ 1, "subb", "a,r4" ], 301 | 0x9d : [ 1, "subb", "a,r5" ], 302 | 0x9e : [ 1, "subb", "a,r6" ], 303 | 0x9f : [ 1, "subb", "a,r7" ], 304 | 305 | 0xa0 : [ 2, "orl", "c,bit" ], 306 | 0xa1 : [ 2, "ajmp", "addr11" ], 307 | 0xa2 : [ 2, "mov", "c,bit" ], 308 | 0xa3 : [ 1, "inc", "dptr" ], 309 | 0xa4 : [ 1, "mul", "ab" ], 310 | 0xa6 : [ 2, "mov", "@r0,direct" ], 311 | 0xa7 : [ 2, "mov", "@r1,direct" ], 312 | 0xa8 : [ 2, "mov", "r0,direct" ], 313 | 0xa9 : [ 2, "mov", "r1,direct" ], 314 | 0xaa : [ 2, "mov", "r2,direct" ], 315 | 0xab : [ 2, "mov", "r3,direct" ], 316 | 0xac : [ 2, "mov", "r4,direct" ], 317 | 0xad : [ 2, "mov", "r5,direct" ], 318 | 0xae : [ 2, "mov", "r6,direct" ], 319 | 0xaf : [ 2, "mov", "r7,direct" ], 320 | 321 | 0xb0 : [ 2, "anl", "c,bit" ], 322 | 0xb1 : [ 2, "acall", "addr11" ], 323 | 0xb2 : [ 2, "cpl", "bit" ], 324 | 0xb3 : [ 1, "cpl", "c" ], 325 | 0xb4 : [ 3, "cjne", "a,immed,offset" ], 326 | 0xb5 : [ 3, "cjne", "a,direct,offset" ], 327 | 0xb6 : [ 3, "cjne", "@r0,immed,offset" ], 328 | 0xb7 : [ 3, "cjne", "@r1,immed,offset" ], 329 | 0xb8 : [ 3, "cjne", "r0,immed,offset" ], 330 | 0xb9 : [ 3, "cjne", "r1,immed,offset" ], 331 | 0xba : [ 3, "cjne", "r2,immed,offset" ], 332 | 0xbb : [ 3, "cjne", "r3,immed,offset" ], 333 | 0xbc : [ 3, "cjne", "r4,immed,offset" ], 334 | 0xbd : [ 3, "cjne", "r5,immed,offset" ], 335 | 0xbe : [ 3, "cjne", "r6,immed,offset" ], 336 | 0xbf : [ 3, "cjne", "r7,immed,offset" ], 337 | 338 | 0xc0 : [ 2, "push", "direct" ], 339 | 0xc1 : [ 2, "ajmp", "addr11" ], 340 | 0xc2 : [ 2, "clr", "bit" ], 341 | 0xc3 : [ 1, "clr", "c" ], 342 | 0xc4 : [ 1, "swap", "a" ], 343 | 0xc5 : [ 2, "xch", "a,direct" ], 344 | 0xc6 : [ 1, "xch", "a,@r0" ], 345 | 0xc7 : [ 1, "xch", "a,@r1" ], 346 | 0xc8 : [ 1, "xch", "a,r0" ], 347 | 0xc9 : [ 1, "xch", "a,r1" ], 348 | 0xca : [ 1, "xch", "a,r2" ], 349 | 0xcb : [ 1, "xch", "a,r3" ], 350 | 0xcc : [ 1, "xch", "a,r4" ], 351 | 0xcd : [ 1, "xch", "a,r5" ], 352 | 0xce : [ 1, "xch", "a,r6" ], 353 | 0xcf : [ 1, "xch", "a,r7" ], 354 | 355 | 0xd0 : [ 2, "pop", "direct" ], 356 | 0xd1 : [ 2, "acall", "addr11" ], 357 | 0xd2 : [ 2, "setb", "bit" ], 358 | 0xd3 : [ 1, "setb", "c" ], 359 | 0xd4 : [ 1, "da", "a" ], 360 | 0xd5 : [ 3, "djnz", "direct,offset" ], 361 | 0xd6 : [ 1, "xchd", "a,@r0" ], 362 | 0xd7 : [ 1, "xchd", "a,@r1" ], 363 | 0xd8 : [ 2, "djnz", "r0,offset" ], 364 | 0xd9 : [ 2, "djnz", "r1,offset" ], 365 | 0xda : [ 2, "djnz", "r2,offset" ], 366 | 0xdb : [ 2, "djnz", "r3,offset" ], 367 | 0xdc : [ 2, "djnz", "r4,offset" ], 368 | 0xdd : [ 2, "djnz", "r5,offset" ], 369 | 0xde : [ 2, "djnz", "r6,offset" ], 370 | 0xdf : [ 2, "djnz", "r7,offset" ], 371 | 372 | 0xe0 : [ 1, "movx", "a,@dptr" ], 373 | 0xe1 : [ 2, "ajmp", "addr11" ], 374 | 0xe2 : [ 1, "movx", "a,@r0" ], 375 | 0xe3 : [ 1, "movx", "a,@r1" ], 376 | 0xe4 : [ 1, "clr", "a" ], 377 | 0xe5 : [ 2, "mov", "a,direct" ], 378 | 0xe6 : [ 1, "mov", "a,@r0" ], 379 | 0xe7 : [ 1, "mov", "a,@r1" ], 380 | 0xe8 : [ 1, "mov", "a,r0" ], 381 | 0xe9 : [ 1, "mov", "a,r1" ], 382 | 0xea : [ 1, "mov", "a,r2" ], 383 | 0xeb : [ 1, "mov", "a,r3" ], 384 | 0xec : [ 1, "mov", "a,r4" ], 385 | 0xed : [ 1, "mov", "a,r5" ], 386 | 0xee : [ 1, "mov", "a,r6" ], 387 | 0xef : [ 1, "mov", "a,r7" ], 388 | 389 | 0xf0 : [ 1, "movx", "@dptr,a" ], 390 | 0xf1 : [ 2, "acall", "addr11" ], 391 | 0xf2 : [ 1, "movx", "@r0,a" ], 392 | 0xf3 : [ 1, "movx", "@r1,a" ], 393 | 0xf4 : [ 1, "cpl", "a" ], 394 | 0xf5 : [ 2, "mov", "direct,a" ], 395 | 0xf6 : [ 1, "mov", "@r0,a" ], 396 | 0xf7 : [ 1, "mov", "@r1,a" ], 397 | 0xf8 : [ 1, "mov", "r0,a" ], 398 | 0xf9 : [ 1, "mov", "r1,a" ], 399 | 0xfa : [ 1, "mov", "r2,a" ], 400 | 0xfb : [ 1, "mov", "r3,a" ], 401 | 0xfc : [ 1, "mov", "r4,a" ], 402 | 0xfd : [ 1, "mov", "r5,a" ], 403 | 0xfe : [ 1, "mov", "r6,a" ], 404 | 0xff : [ 1, "mov", "r7,a" ], 405 | 406 | } 407 | 408 | # End of processor specific code 409 | ########################################################################## 410 | -------------------------------------------------------------------------------- /z80.py: -------------------------------------------------------------------------------- 1 | ########################################################################## 2 | # 3 | # Processor specific code 4 | 5 | # CPU = "Z80" 6 | # Description = "Zilog 8-bit microprocessor." 7 | # DataWidth = 8 # 8-bit data 8 | # AddressWidth = 16 # 16-bit addresses 9 | 10 | # Maximum length of an instruction (for formatting purposes) 11 | maxLength = 4 12 | 13 | # Leadin bytes for multibyte instructions 14 | leadInBytes = [0xcb, 0xdd, 0xed, 0xfd] 15 | 16 | # Addressing mode table 17 | # List of addressing modes and corresponding format strings for operands. 18 | addressModeTable = { 19 | "implied" : "", 20 | "0" : "0", 21 | "0,a" : "0,a", 22 | "0,b" : "0,b", 23 | "0,c" : "0,c", 24 | "0,d" : "0,d", 25 | "0,e" : "0,e", 26 | "0,h" : "0,h", 27 | "0,indhl" : "0,(hl)", 28 | "0,l" : "0,l", 29 | "00" : "$00", 30 | "08" : "$08", 31 | "1" : "1", 32 | "1,a" : "1,a", 33 | "1,b" : "1,b", 34 | "1,c" : "1,c", 35 | "1,d" : "1,d", 36 | "1,e" : "1,e", 37 | "1,h" : "1,h", 38 | "1,indhl" : "1,(hl)", 39 | "1,l" : "1,l", 40 | "10" : "$10", 41 | "18" : "$18", 42 | "2" : "2", 43 | "2,a" : "2,a", 44 | "2,b" : "2,b", 45 | "2,c" : "2,c", 46 | "2,d" : "2,d", 47 | "2,e" : "2,e", 48 | "2,h" : "2,h", 49 | "2,indhl" : "2,(hl)", 50 | "2,l" : "2,l", 51 | "20" : "$20", 52 | "28" : "$28", 53 | "3,a" : "3,a", 54 | "3,b" : "3,b", 55 | "3,c" : "3,c", 56 | "3,d" : "3,d", 57 | "3,e" : "3,e", 58 | "3,h" : "3,h", 59 | "3,indhl" : "3,(hl)", 60 | "3,l" : "3,l", 61 | "30" : "$30", 62 | "38" : "$38", 63 | "4,a" : "4,a", 64 | "4,b" : "4,b", 65 | "4,c" : "4,c", 66 | "4,d" : "4,d", 67 | "4,e" : "4,e", 68 | "4,h" : "4,h", 69 | "4,indhl" : "4,(hl)", 70 | "4,l" : "4,l", 71 | "5,a" : "5,a", 72 | "5,b" : "5,b", 73 | "5,c" : "5,c", 74 | "5,d" : "5,d", 75 | "5,e" : "5,e", 76 | "5,h" : "5,h", 77 | "5,indhl" : "5,(hl)", 78 | "5,l" : "5,l", 79 | "6,a" : "6,a", 80 | "6,b" : "6,b", 81 | "6,c" : "6,c", 82 | "6,d" : "6,d", 83 | "6,e" : "6,e", 84 | "6,h" : "6,h", 85 | "6,indhl" : "6,(hl)", 86 | "6,l" : "6,l", 87 | "7,a" : "7,a", 88 | "7,b" : "7,b", 89 | "7,c" : "7,c", 90 | "7,d" : "7,d", 91 | "7,e" : "7,e", 92 | "7,h" : "7,h", 93 | "7,indhl" : "7,(hl)", 94 | "7,l" : "7,l", 95 | "a" : "a", 96 | "a,a" : "a,a", 97 | "a,b" : "a,b", 98 | "a,c" : "a,c", 99 | "a,d" : "a,d", 100 | "a,e" : "a,e", 101 | "a,h" : "a,h", 102 | "a,i" : "a,i", 103 | "a,indbc" : "a,(bc)", 104 | "a,indc" : "a,(c)", 105 | "a,indde" : "a,(de)", 106 | "a,indhl" : "a,(hl)", 107 | "a,indix+d" : "a,(ix+${0:02X})", 108 | "a,indiy+d" : "a,(iy+${0:02X})", 109 | "a,indn" : "a,(${0:02X})", 110 | "a,indnn" : "a,(${1:02X}{0:02X})", 111 | "a,l" : "a,l", 112 | "a,n" : "a,${0:02X}", 113 | "a,r" : "a,r", 114 | "af" : "af", 115 | "af,af'" : "af,af'", 116 | "b" : "b", 117 | "b,a" : "b,a", 118 | "b,b" : "b,b", 119 | "b,c" : "b,c", 120 | "b,d" : "b,d", 121 | "b,e" : "b,e", 122 | "b,h" : "b,h", 123 | "b,indc" : "b,(c)", 124 | "b,indhl" : "b,(hl)", 125 | "b,indix+d" : "b,(ix+${0:02X})", 126 | "b,indiy+d" : "b,(iy+${0:02X})", 127 | "b,l" : "b,l", 128 | "b,n" : "b,${0:02X}", 129 | "bc" : "bc", 130 | "bc,indaa" : "bc,(${1:02X}{0:02X})", 131 | "bc,nn" : "bc,${1:02X}{0:02X}", 132 | "c" : "c", 133 | "c,a" : "c,a", 134 | "c,b" : "c,b", 135 | "c,c" : "c,c", 136 | "c,d" : "c,d", 137 | "c,e" : "c,e", 138 | "c,h" : "c,h", 139 | "c,indc" : "c,(c)", 140 | "c,indhl" : "c,(hl)", 141 | "c,indix+d" : "c,(ix+${0:02X})", 142 | "c,indiy+d" : "c,(iy+${0:02X})", 143 | "c,l" : "c,l", 144 | "c,n" : "c,${0:02X}", 145 | "c,pcr" : "c,${0:04X}", 146 | "c,nn" : "c,${1:02X}{0:02X}", 147 | "d" : "d", 148 | "d,a" : "d,a", 149 | "d,b" : "d,b", 150 | "d,c" : "d,c", 151 | "d,d" : "d,d", 152 | "d,e" : "d,e", 153 | "d,h" : "d,h", 154 | "d,indc" : "d,(c)", 155 | "d,indhl" : "d,(hl)", 156 | "d,indix+d" : "d,(ix+${0:02X})", 157 | "d,indiy+d" : "d,(iy+${0:02X})", 158 | "d,l" : "d,l", 159 | "d,n" : "d,${0:02X}", 160 | "de" : "de", 161 | "de,hl" : "de,hl", 162 | "de,indaa" : "de,(${1:02X}{0:02X})", 163 | "de,nn" : "de,${1:02X}{0:02X}", 164 | "e" : "e", 165 | "e,a" : "e,a", 166 | "e,b" : "e,b", 167 | "e,c" : "e,c", 168 | "e,d" : "e,d", 169 | "e,e" : "e,e", 170 | "e,h" : "e,h", 171 | "e,indc" : "e,(c)", 172 | "e,indhl" : "e,(hl)", 173 | "e,indix+d" : "e,(ix+${0:02X})", 174 | "e,indiy+d" : "e,(iy+${0:02X})", 175 | "e,l" : "e,l", 176 | "e,n" : "e,${0:02X}", 177 | "h" : "h", 178 | "h,a" : "h,a", 179 | "h,b" : "h,b", 180 | "h,c" : "h,c", 181 | "h,d" : "h,d", 182 | "h,e" : "h,e", 183 | "h,h" : "h,h", 184 | "h,indc" : "h,(c)", 185 | "h,indhl" : "h,(hl)", 186 | "h,indix+d" : "h,(ix+${0:02X})", 187 | "h,indiy+d" : "h,(iy+${0:02X})", 188 | "h,l" : "h,l", 189 | "h,n" : "h,${0:02X}", 190 | "hl" : "hl", 191 | "hl,bc" : "hl,bc", 192 | "hl,de" : "hl,de", 193 | "hl,hl" : "hl,hl", 194 | "hl,indnn" : "hl,(${1:02X}{0:02X})", 195 | "hl,nn" : "hl,${1:02X}{0:02X}", 196 | "hl,sp" : "hl,sp", 197 | "i,a" : "i,a", 198 | "indaa,bc" : "(${1:02X}{0:02X}),bc", 199 | "indaa,de" : "(${1:02X}{0:02X}),de", 200 | "indaa,ix" : "(${1:02X}{0:02X}),ix", 201 | "indaa,iy" : "(${1:02X}{0:02X}),iy", 202 | "indaa,sp" : "(${1:02X}{0:02X}),sp", 203 | "indbc,a" : "(bc),a", 204 | "indc,a" : "(c),a", 205 | "indc,b" : "(c),b", 206 | "indc,c" : "(c),c", 207 | "indc,d" : "(c),d", 208 | "indc,e" : "(c),e", 209 | "indc,h" : "(c),h", 210 | "indc,l" : "(c),l", 211 | "indde,a" : "(de),a", 212 | "indhl" : "(hl)", 213 | "indhl,a" : "(hl),a", 214 | "indhl,b" : "(hl),b", 215 | "indhl,c" : "(hl),c", 216 | "indhl,d" : "(hl),d", 217 | "indhl,e" : "(hl),e", 218 | "indhl,h" : "(hl),h", 219 | "indhl,l" : "(hl),l", 220 | "indhl,n" : "(hl),${0:02X}", 221 | "indix+d" : "(ix+${0:02X})", 222 | "indix+d,a" : "(ix+${0:02X}),a", 223 | "indiy+d,a" : "(iy+${0:02X}),a", 224 | "indix+d,b" : "(ix+${0:02X}),b", 225 | "indix+d,c" : "(ix+${0:02X}),c", 226 | "indix+d,d" : "(ix+${0:02X}),d", 227 | "indix+d,e" : "(ix+${0:02X}),e", 228 | "indix+d,h" : "(ix+${0:02X}),h", 229 | "indix+d,l" : "(ix+${0:02X}),l", 230 | "indix+d,n" : "(ix+${0:02X}),${1:02X}", 231 | "indiy+d" : "(iy+${0:02X})", 232 | "indiy+d,b" : "(iy+${0:02X}),b", 233 | "indiy+d,c" : "(iy+${0:02X}),c", 234 | "indiy+d,d" : "(iy+${0:02X}),d", 235 | "indiy+d,e" : "(iy+${0:02X}),e", 236 | "indiy+d,h" : "(iy+${0:02X}),h", 237 | "indiy+d,l" : "(iy+${0:02X}),l", 238 | "indiy+d,n" : "(iy+${0:02X}),${1:02X}", 239 | "indn,a" : "(${0:02X}),a", 240 | "indnn,a" : "(${1:02X}{0:02X}),a", 241 | "indnn,hl" : "(${1:02X}{0:02X}),hl", 242 | "indsp,hl" : "(sp),hl", 243 | "ix" : "ix", 244 | "ix,aa" : "ix,${1:02X}{0:02X}", 245 | "ix,bc" : "ix,bc", 246 | "ix,de" : "ix,de", 247 | "ix,indaa" : "ix,(${1:02X}{0:02X})", 248 | "ix,ix" : "ix,ix", 249 | "ix,sp" : "ix,sp", 250 | "iy" : "iy", 251 | "iy,aa" : "iy,${1:02X}{0:02X}", 252 | "iy,bc" : "iy,bc", 253 | "iy,bc" : "iy,bc", 254 | "iy,de" : "iy,de", 255 | "iy,indaa" : "iy,(${1:02X}{0:02X})", 256 | "iy,indaa" : "iy,(${1:02X}{0:02X})", 257 | "iy,iy" : "iy,iy", 258 | "iy,sp" : "iy,sp", 259 | "l" : "l", 260 | "l,a" : "l,a", 261 | "l,b" : "l,b", 262 | "l,c" : "l,c", 263 | "l,d" : "l,d", 264 | "l,e" : "l,e", 265 | "l,h" : "l,h", 266 | "l,indc" : "l,(c)", 267 | "l,indhl" : "l,(hl)", 268 | "l,indix+d" : "l,(ix+${0:02X})", 269 | "l,indiy+d" : "l,(iy+${0:02X})", 270 | "l,l" : "l,l", 271 | "l,n" : "l,${0:02X}", 272 | "m" : "m", 273 | "m,nn" : "m,${1:02X}{0:02X}", 274 | "n" : "${0:02X}", 275 | "n,pcr" : "${0:04X}", 276 | "n,indix+d" : "n,(ix+${0:02X})", 277 | "n,indiy+d" : "n,(iy+${0:02X})", 278 | "nc" : "nc", 279 | "nc,pcr" : "nc,${0:04X}", 280 | "nc,nn" : "nc,${1:02X}{0:02X}", 281 | "nn" : "${1:02X}{0:02X}", 282 | "nz" : "nz", 283 | "nz,pcr" : "nz,${0:04X}", 284 | "nz,nn" : "nz,${1:02X}{0:02X}", 285 | "p" : "p", 286 | "p,nn" : "p,${1:02X}{0:02X}", 287 | "pcr" : "${0:04X}", 288 | "pe" : "pe", 289 | "pe,nn" : "pe,${1:02X}{0:02X}", 290 | "po" : "po", 291 | "po,nn" : "po,${1:02X}{0:02X}", 292 | "r,a" : "r,a", 293 | "sp" : "sp", 294 | "sp,hl" : "sp,hl", 295 | "sp,indaa" : "sp,(${1:02X}{0:02X})", 296 | "sp,nn" : "sp,${1:02X}{0:02X}", 297 | "z" : "z", 298 | "z,pcr" : "z,${0:04X}", 299 | "z,nn" : "z,${1:02X}{0:02X}", 300 | } 301 | 302 | # Op Code Table 303 | # Key is numeric opcode (possibly multiple bytes) 304 | # Value is a list: 305 | # # bytes 306 | # mnemonic 307 | # addressing mode 308 | # flags (e.g. pcr) 309 | opcodeTable = { 310 | 311 | 0x00 : [ 1, "nop", "implied" ], 312 | 0x01 : [ 3, "ld", "bc,nn" ], 313 | 0x02 : [ 1, "ld", "indbc,a" ], 314 | 0x03 : [ 1, "inc", "bc" ], 315 | 0x04 : [ 1, "inc", "b" ], 316 | 0x05 : [ 1, "dec", "b" ], 317 | 0x06 : [ 2, "ld", "b,n" ], 318 | 0x07 : [ 1, "rlca", "implied" ], 319 | 0x08 : [ 1, "ex", "af,af'" ], 320 | 0x09 : [ 1, "add", "hl,bc" ], 321 | 0x0a : [ 1, "ld", "a,indbc" ], 322 | 0x0b : [ 1, "dec", "bc" ], 323 | 0x0c : [ 1, "inc", "c" ], 324 | 0x0d : [ 1, "dec", "c" ], 325 | 0x0e : [ 2, "ld", "c,n" ], 326 | 0x0f : [ 1, "rrca", "implied" ], 327 | 328 | 0x10 : [ 2, "djnz", "pcr", pcr ], 329 | 0x11 : [ 3, "ld", "de,nn" ], 330 | 0x12 : [ 1, "ld", "indde,a" ], 331 | 0x13 : [ 1, "inc", "de" ], 332 | 0x14 : [ 1, "inc", "d" ], 333 | 0x15 : [ 1, "dec", "d" ], 334 | 0x16 : [ 2, "ld", "d,n" ], 335 | 0x17 : [ 1, "rla", "implied" ], 336 | 0x18 : [ 2, "jr", "pcr", pcr ], 337 | 0x19 : [ 1, "add", "hl,de" ], 338 | 0x1a : [ 1, "ld", "a,indde" ], 339 | 0x1b : [ 1, "dec", "de" ], 340 | 0x1c : [ 1, "inc", "e" ], 341 | 0x1d : [ 1, "dec", "e" ], 342 | 0x1e : [ 2, "ld", "e,n" ], 343 | 0x1f : [ 1, "rra", "implied" ], 344 | 345 | 0x20 : [ 2, "jr", "nz,pcr", pcr ], 346 | 0x21 : [ 3, "ld", "hl,nn" ], 347 | 0x22 : [ 3, "ld", "indnn,hl" ], 348 | 0x23 : [ 1, "inc", "hl" ], 349 | 0x24 : [ 1, "inc", "h" ], 350 | 0x25 : [ 1, "dec", "h" ], 351 | 0x26 : [ 2, "ld", "h,n" ], 352 | 0x27 : [ 1, "daa", "implied" ], 353 | 0x28 : [ 2, "jr", "z,pcr", pcr ], 354 | 0x29 : [ 1, "add", "hl,hl" ], 355 | 0x2a : [ 3, "ld", "hl,indnn" ], 356 | 0x2b : [ 1, "dec", "hl" ], 357 | 0x2c : [ 1, "inc", "l" ], 358 | 0x2d : [ 1, "dec", "l" ], 359 | 0x2e : [ 2, "ld", "l,n" ], 360 | 0x2f : [ 1, "cpl", "implied" ], 361 | 362 | 0x30 : [ 2, "jr", "nc,pcr", pcr ], 363 | 0x31 : [ 3, "ld", "sp,nn" ], 364 | 0x32 : [ 3, "ld", "indnn,a" ], 365 | 0x33 : [ 1, "inc", "sp" ], 366 | 0x34 : [ 1, "inc", "indhl" ], 367 | 0x35 : [ 1, "dec", "indhl" ], 368 | 0x36 : [ 2, "ld", "indhl,n" ], 369 | 0x37 : [ 1, "scf", "implied" ], 370 | 0x38 : [ 2, "jr", "c,pcr", pcr ], 371 | 0x39 : [ 1, "add", "hl,sp" ], 372 | 0x3a : [ 3, "ld", "a,indnn" ], 373 | 0x3b : [ 1, "dec", "sp" ], 374 | 0x3c : [ 1, "inc", "a" ], 375 | 0x3d : [ 1, "dec", "a" ], 376 | 0x3e : [ 2, "ld", "a,n" ], 377 | 0x3f : [ 1, "ccf", "implied" ], 378 | 379 | 0x40 : [ 1, "ld", "b,b" ], 380 | 0x41 : [ 1, "ld", "b,c" ], 381 | 0x42 : [ 1, "ld", "b,d" ], 382 | 0x43 : [ 1, "ld", "b,e" ], 383 | 0x44 : [ 1, "ld", "b,h" ], 384 | 0x45 : [ 1, "ld", "b,l" ], 385 | 0x46 : [ 1, "ld", "b,indhl" ], 386 | 0x47 : [ 1, "ld", "b,a" ], 387 | 0x48 : [ 1, "ld", "c,b" ], 388 | 0x49 : [ 1, "ld", "c,c" ], 389 | 0x4a : [ 1, "ld", "c,d" ], 390 | 0x4b : [ 1, "ld", "c,e" ], 391 | 0x4c : [ 1, "ld", "c,h" ], 392 | 0x4d : [ 1, "ld", "c,l" ], 393 | 0x4e : [ 1, "ld", "c,indhl" ], 394 | 0x4f : [ 1, "ld", "c,a" ], 395 | 396 | 0x50 : [ 1, "ld", "d,b" ], 397 | 0x51 : [ 1, "ld", "d,c" ], 398 | 0x52 : [ 1, "ld", "d,d" ], 399 | 0x53 : [ 1, "ld", "d,e" ], 400 | 0x54 : [ 1, "ld", "d,h" ], 401 | 0x55 : [ 1, "ld", "d,l" ], 402 | 0x56 : [ 1, "ld", "d,indhl" ], 403 | 0x57 : [ 1, "ld", "d,a" ], 404 | 0x58 : [ 1, "ld", "e,b" ], 405 | 0x59 : [ 1, "ld", "e,c" ], 406 | 0x5a : [ 1, "ld", "e,d" ], 407 | 0x5b : [ 1, "ld", "e,e" ], 408 | 0x5c : [ 1, "ld", "e,h" ], 409 | 0x5d : [ 1, "ld", "e,l" ], 410 | 0x5e : [ 1, "ld", "e,indhl" ], 411 | 0x5f : [ 1, "ld", "e,a" ], 412 | 413 | 0x60 : [ 1, "ld", "h,b" ], 414 | 0x61 : [ 1, "ld", "h,c" ], 415 | 0x62 : [ 1, "ld", "h,d" ], 416 | 0x63 : [ 1, "ld", "h,e" ], 417 | 0x64 : [ 1, "ld", "h,h" ], 418 | 0x65 : [ 1, "ld", "h,l" ], 419 | 0x66 : [ 1, "ld", "h,indhl" ], 420 | 0x67 : [ 1, "ld", "h,a" ], 421 | 0x68 : [ 1, "ld", "l,b" ], 422 | 0x69 : [ 1, "ld", "l,c" ], 423 | 0x6a : [ 1, "ld", "l,d" ], 424 | 0x6b : [ 1, "ld", "l,e" ], 425 | 0x6c : [ 1, "ld", "l,h" ], 426 | 0x6d : [ 1, "ld", "l,l" ], 427 | 0x6e : [ 1, "ld", "l,indhl" ], 428 | 0x6f : [ 1, "ld", "l,a" ], 429 | 430 | 0x70 : [ 1, "ld", "indhl,b" ], 431 | 0x71 : [ 1, "ld", "indhl,c" ], 432 | 0x72 : [ 1, "ld", "indhl,d" ], 433 | 0x73 : [ 1, "ld", "indhl,e" ], 434 | 0x74 : [ 1, "ld", "indhl,h" ], 435 | 0x75 : [ 1, "ld", "indhl,l" ], 436 | 0x76 : [ 1, "halt", "implied" ], 437 | 0x77 : [ 1, "ld", "indhl,a" ], 438 | 0x78 : [ 1, "ld", "a,b" ], 439 | 0x79 : [ 1, "ld", "a,c" ], 440 | 0x7a : [ 1, "ld", "a,d" ], 441 | 0x7b : [ 1, "ld", "a,e" ], 442 | 0x7c : [ 1, "ld", "a,h" ], 443 | 0x7d : [ 1, "ld", "a,l" ], 444 | 0x7e : [ 1, "ld", "a,indhl" ], 445 | 0x7f : [ 1, "ld", "a,a" ], 446 | 447 | 0x80 : [ 1, "add", "a,b" ], 448 | 0x81 : [ 1, "add", "a,c" ], 449 | 0x82 : [ 1, "add", "a,d" ], 450 | 0x83 : [ 1, "add", "a,e" ], 451 | 0x84 : [ 1, "add", "a,h" ], 452 | 0x85 : [ 1, "add", "a,l" ], 453 | 0x86 : [ 1, "add", "a,indhl" ], 454 | 0x87 : [ 1, "add", "a,a" ], 455 | 0x88 : [ 1, "adc", "a,b" ], 456 | 0x89 : [ 1, "adc", "a,c" ], 457 | 0x8a : [ 1, "adc", "a,d" ], 458 | 0x8b : [ 1, "adc", "a,e" ], 459 | 0x8c : [ 1, "adc", "a,h" ], 460 | 0x8d : [ 1, "adc", "a,l" ], 461 | 0x8e : [ 1, "adc", "a,indhl" ], 462 | 0x8f : [ 1, "adc", "a,a" ], 463 | 464 | 0x90 : [ 1, "sub", "b" ], 465 | 0x91 : [ 1, "sub", "c" ], 466 | 0x92 : [ 1, "sub", "d" ], 467 | 0x93 : [ 1, "sub", "e" ], 468 | 0x94 : [ 1, "sub", "h" ], 469 | 0x95 : [ 1, "sub", "l" ], 470 | 0x96 : [ 1, "sub", "indhl" ], 471 | 0x97 : [ 1, "sub", "a" ], 472 | 0x98 : [ 1, "sbc", "a,b" ], 473 | 0x99 : [ 1, "sbc", "a,c" ], 474 | 0x9a : [ 1, "sbc", "a,d" ], 475 | 0x9b : [ 1, "sbc", "a,e" ], 476 | 0x9c : [ 1, "sbc", "a,h" ], 477 | 0x9d : [ 1, "sbc", "a,l" ], 478 | 0x9e : [ 1, "sbc", "a,indhl" ], 479 | 0x9f : [ 1, "sbc", "a,a" ], 480 | 481 | 0xa0 : [ 1, "and", "b" ], 482 | 0xa1 : [ 1, "and", "c" ], 483 | 0xa2 : [ 1, "and", "d" ], 484 | 0xa3 : [ 1, "and", "e" ], 485 | 0xa4 : [ 1, "and", "h" ], 486 | 0xa5 : [ 1, "and", "l" ], 487 | 0xa6 : [ 1, "and", "indhl" ], 488 | 0xa7 : [ 1, "and", "a" ], 489 | 0xa8 : [ 1, "xor", "b" ], 490 | 0xa9 : [ 1, "xor", "c" ], 491 | 0xaa : [ 1, "xor", "d" ], 492 | 0xab : [ 1, "xor", "e" ], 493 | 0xac : [ 1, "xor", "h" ], 494 | 0xad : [ 1, "xor", "l" ], 495 | 0xae : [ 1, "xor", "indhl" ], 496 | 0xaf : [ 1, "xor", "a" ], 497 | 498 | 0xb0 : [ 1, "or", "b" ], 499 | 0xb1 : [ 1, "or", "c" ], 500 | 0xb2 : [ 1, "or", "d" ], 501 | 0xb3 : [ 1, "or", "e" ], 502 | 0xb4 : [ 1, "or", "h" ], 503 | 0xb5 : [ 1, "or", "l" ], 504 | 0xb6 : [ 1, "or", "indhl" ], 505 | 0xb7 : [ 1, "or", "a" ], 506 | 0xb8 : [ 1, "cp", "b" ], 507 | 0xb9 : [ 1, "cp", "c" ], 508 | 0xba : [ 1, "cp", "d" ], 509 | 0xbb : [ 1, "cp", "e" ], 510 | 0xbc : [ 1, "cp", "h" ], 511 | 0xbd : [ 1, "cp", "l" ], 512 | 0xbe : [ 1, "cp", "indhl" ], 513 | 0xbf : [ 1, "cp", "a" ], 514 | 515 | 0xc0 : [ 1, "ret", "nz" ], 516 | 0xc1 : [ 1, "pop", "bc" ], 517 | 0xc2 : [ 3, "jp", "nz,nn" ], 518 | 0xc3 : [ 3, "jp", "nn" ], 519 | 0xc4 : [ 3, "call","nz,nn" ], 520 | 0xc5 : [ 1, "push","bc" ], 521 | 0xc6 : [ 2, "add", "a,n" ], 522 | 0xc7 : [ 1, "rst", "00" ], 523 | 0xc8 : [ 1, "ret", "z" ], 524 | 0xc9 : [ 1, "ret", "implied" ], 525 | 0xca : [ 3, "jp", "z,nn" ], 526 | 0xcc : [ 3, "call","z,nn" ], 527 | 0xcd : [ 3, "call", "nn" ], 528 | 0xce : [ 2, "adc", "a,n" ], 529 | 0xcf : [ 1, "rst", "08" ], 530 | 531 | 0xd0 : [ 1, "ret", "nc" ], 532 | 0xd1 : [ 1, "pop", "de" ], 533 | 0xd2 : [ 3, "jp", "nc,nn" ], 534 | 0xd3 : [ 2, "out", "indn,a" ], 535 | 0xd4 : [ 3, "call", "nc,nn" ], 536 | 0xd5 : [ 1, "push", "de" ], 537 | 0xd6 : [ 2, "sub", "n" ], 538 | 0xd7 : [ 1, "rst", "10" ], 539 | 0xd8 : [ 1, "ret", "c" ], 540 | 0xd9 : [ 1, "exx", "implied" ], 541 | 0xda : [ 3, "jp", "c,nn" ], 542 | 0xdb : [ 2, "in", "a,indn" ], 543 | 0xdc : [ 3, "call", "c,nn" ], 544 | 0xde : [ 2, "sbc", "a,n" ], 545 | 0xdf : [ 1, "rst", "18" ], 546 | 547 | 0xe0 : [ 1, "ret", "po" ], 548 | 0xe1 : [ 1, "pop", "hl" ], 549 | 0xe2 : [ 3, "jp", "po,nn" ], 550 | 0xe3 : [ 1, "ex", "indsp,hl" ], 551 | 0xe4 : [ 3, "call", "po,nn" ], 552 | 0xe5 : [ 1, "push", "hl" ], 553 | 0xe6 : [ 2, "and", "n" ], 554 | 0xe7 : [ 1, "rst", "20" ], 555 | 0xe8 : [ 1, "ret", "pe" ], 556 | 0xe9 : [ 1, "jp", "indhl" ], 557 | 0xea : [ 3, "jp", "pe,nn" ], 558 | 0xeb : [ 1, "ex", "de,hl" ], 559 | 0xec : [ 3, "call", "pe,nn" ], 560 | 0xee : [ 2, "xor", "n" ], 561 | 0xef : [ 1, "rst", "28" ], 562 | 563 | 0xf0 : [ 1, "ret", "p" ], 564 | 0xf1 : [ 1, "pop", "af" ], 565 | 0xf2 : [ 3, "jp", "p,nn" ], 566 | 0xf3 : [ 1, "di", "implied" ], 567 | 0xf4 : [ 3, "call", "p,nn" ], 568 | 0xf5 : [ 1, "push", "af" ], 569 | 0xf6 : [ 2, "or", "n" ], 570 | 0xf7 : [ 1, "rst", "30" ], 571 | 0xf8 : [ 1, "ret", "m" ], 572 | 0xf9 : [ 1, "ld", "sp,hl" ], 573 | 0xfa : [ 3, "jp", "m,nn" ], 574 | 0xfb : [ 1, "ei", "implied" ], 575 | 0xfc : [ 3, "call", "m,nn" ], 576 | 0xfe : [ 2, "cp", "n" ], 577 | 0xff : [ 1, "rst", "38" ], 578 | 579 | # Multibyte instructions 580 | 581 | 0xcb00 : [ 2, "rlc", "b" ], 582 | 0xcb01 : [ 2, "rlc", "c" ], 583 | 0xcb02 : [ 2, "rlc", "d" ], 584 | 0xcb03 : [ 2, "rlc", "e" ], 585 | 0xcb04 : [ 2, "rlc", "h" ], 586 | 0xcb05 : [ 2, "rlc", "l" ], 587 | 0xcb06 : [ 2, "rlc", "indhl" ], 588 | 0xcb07 : [ 2, "rlc", "a" ], 589 | 0xcb08 : [ 2, "rrc", "b" ], 590 | 0xcb09 : [ 2, "rrc", "c" ], 591 | 0xcb0a : [ 2, "rrc", "d" ], 592 | 0xcb0b : [ 2, "rrc", "e" ], 593 | 0xcb0c : [ 2, "rrc", "h" ], 594 | 0xcb0d : [ 2, "rrc", "l" ], 595 | 0xcb0e : [ 2, "rrc", "indhl" ], 596 | 0xcb0f : [ 2, "rrc", "a" ], 597 | 598 | 0xcb10 : [ 2, "rl", "b" ], 599 | 0xcb11 : [ 2, "rl", "c" ], 600 | 0xcb12 : [ 2, "rl", "d" ], 601 | 0xcb13 : [ 2, "rl", "e" ], 602 | 0xcb14 : [ 2, "rl", "h" ], 603 | 0xcb15 : [ 2, "rl", "l" ], 604 | 0xcb16 : [ 2, "rl", "indhl" ], 605 | 0xcb17 : [ 2, "rl", "a" ], 606 | 0xcb18 : [ 2, "rr", "b" ], 607 | 0xcb19 : [ 2, "rr", "c" ], 608 | 0xcb1a : [ 2, "rr", "d" ], 609 | 0xcb1b : [ 2, "rr", "e" ], 610 | 0xcb1c : [ 2, "rr", "h" ], 611 | 0xcb1d : [ 2, "rr", "l" ], 612 | 0xcb1e : [ 2, "rr", "indhl" ], 613 | 0xcb1f : [ 2, "rr", "a" ], 614 | 615 | 0xcb20 : [ 2, "sla", "b" ], 616 | 0xcb21 : [ 2, "sla", "c" ], 617 | 0xcb22 : [ 2, "sla", "d" ], 618 | 0xcb23 : [ 2, "sla", "e" ], 619 | 0xcb24 : [ 2, "sla", "h" ], 620 | 0xcb25 : [ 2, "sla", "l" ], 621 | 0xcb26 : [ 2, "sla", "indhl" ], 622 | 0xcb27 : [ 2, "sla", "a" ], 623 | 0xcb28 : [ 2, "sra", "b" ], 624 | 0xcb29 : [ 2, "sra", "c" ], 625 | 0xcb2a : [ 2, "sra", "d" ], 626 | 0xcb2b : [ 2, "sra", "e" ], 627 | 0xcb2c : [ 2, "sra", "h" ], 628 | 0xcb2d : [ 2, "sra", "l" ], 629 | 0xcb2e : [ 2, "sra", "indhl" ], 630 | 0xcb2f : [ 2, "sra", "a" ], 631 | 632 | 0xcb38 : [ 2, "srl", "b" ], 633 | 0xcb39 : [ 2, "srl", "c" ], 634 | 0xcb3a : [ 2, "srl", "d" ], 635 | 0xcb3b : [ 2, "srl", "e" ], 636 | 0xcb3c : [ 2, "srl", "h" ], 637 | 0xcb3d : [ 2, "srl", "l" ], 638 | 0xcb3e : [ 2, "srl", "indhl" ], 639 | 0xcb3f : [ 2, "srl", "a" ], 640 | 641 | 0xcb40 : [ 2, "bit", "0,b" ], 642 | 0xcb41 : [ 2, "bit", "0,c" ], 643 | 0xcb42 : [ 2, "bit", "0,d" ], 644 | 0xcb43 : [ 2, "bit", "0,e" ], 645 | 0xcb44 : [ 2, "bit", "0,h" ], 646 | 0xcb45 : [ 2, "bit", "0,l" ], 647 | 0xcb46 : [ 2, "bit", "0,indhl" ], 648 | 0xcb47 : [ 2, "bit", "0,a" ], 649 | 0xcb48 : [ 2, "bit", "1,b" ], 650 | 0xcb49 : [ 2, "bit", "1,c" ], 651 | 0xcb4a : [ 2, "bit", "1,d" ], 652 | 0xcb4b : [ 2, "bit", "1,e" ], 653 | 0xcb4c : [ 2, "bit", "1,h" ], 654 | 0xcb4d : [ 2, "bit", "1,l" ], 655 | 0xcb4e : [ 2, "bit", "1,indhl" ], 656 | 0xcb4f : [ 2, "bit", "1,a" ], 657 | 658 | 0xcb50 : [ 2, "bit", "2,b" ], 659 | 0xcb51 : [ 2, "bit", "2,c" ], 660 | 0xcb52 : [ 2, "bit", "2,d" ], 661 | 0xcb53 : [ 2, "bit", "2,e" ], 662 | 0xcb54 : [ 2, "bit", "2,h" ], 663 | 0xcb55 : [ 2, "bit", "2,l" ], 664 | 0xcb56 : [ 2, "bit", "2,indhl" ], 665 | 0xcb57 : [ 2, "bit", "2,a" ], 666 | 0xcb58 : [ 2, "bit", "3,b" ], 667 | 0xcb59 : [ 2, "bit", "3,c" ], 668 | 0xcb5a : [ 2, "bit", "3,d" ], 669 | 0xcb5b : [ 2, "bit", "3,e" ], 670 | 0xcb5c : [ 2, "bit", "3,h" ], 671 | 0xcb5d : [ 2, "bit", "3,l" ], 672 | 0xcb5e : [ 2, "bit", "3,indhl" ], 673 | 0xcb5f : [ 2, "bit", "3,a" ], 674 | 675 | 0xcb60 : [ 2, "bit", "4,b" ], 676 | 0xcb61 : [ 2, "bit", "4,c" ], 677 | 0xcb62 : [ 2, "bit", "4,d" ], 678 | 0xcb63 : [ 2, "bit", "4,e" ], 679 | 0xcb64 : [ 2, "bit", "4,h" ], 680 | 0xcb65 : [ 2, "bit", "4,l" ], 681 | 0xcb66 : [ 2, "bit", "4,indhl" ], 682 | 0xcb67 : [ 2, "bit", "4,a" ], 683 | 0xcb68 : [ 2, "bit", "5,b" ], 684 | 0xcb69 : [ 2, "bit", "5,c" ], 685 | 0xcb6a : [ 2, "bit", "5,d" ], 686 | 0xcb6b : [ 2, "bit", "5,e" ], 687 | 0xcb6c : [ 2, "bit", "5,h" ], 688 | 0xcb6d : [ 2, "bit", "5,l" ], 689 | 0xcb6e : [ 2, "bit", "5,indhl" ], 690 | 0xcb6f : [ 2, "bit", "5,a" ], 691 | 692 | 0xcb70 : [ 2, "bit", "6,b" ], 693 | 0xcb71 : [ 2, "bit", "6,c" ], 694 | 0xcb72 : [ 2, "bit", "6,d" ], 695 | 0xcb73 : [ 2, "bit", "6,e" ], 696 | 0xcb74 : [ 2, "bit", "6,h" ], 697 | 0xcb75 : [ 2, "bit", "6,l" ], 698 | 0xcb76 : [ 2, "bit", "6,indhl" ], 699 | 0xcb77 : [ 2, "bit", "6,a" ], 700 | 0xcb78 : [ 2, "bit", "7,b" ], 701 | 0xcb79 : [ 2, "bit", "7,c" ], 702 | 0xcb7a : [ 2, "bit", "7,d" ], 703 | 0xcb7b : [ 2, "bit", "7,e" ], 704 | 0xcb7c : [ 2, "bit", "7,h" ], 705 | 0xcb7d : [ 2, "bit", "7,l" ], 706 | 0xcb7e : [ 2, "bit", "7,indhl" ], 707 | 0xcb7f : [ 2, "bit", "7,a" ], 708 | 709 | 0xcb80 : [ 2, "res", "0,b" ], 710 | 0xcb81 : [ 2, "res", "0,c" ], 711 | 0xcb82 : [ 2, "res", "0,d" ], 712 | 0xcb83 : [ 2, "res", "0,e" ], 713 | 0xcb84 : [ 2, "res", "0,h" ], 714 | 0xcb85 : [ 2, "res", "0,l" ], 715 | 0xcb86 : [ 2, "res", "0,indhl" ], 716 | 0xcb87 : [ 2, "res", "0,a" ], 717 | 0xcb88 : [ 2, "res", "1,b" ], 718 | 0xcb89 : [ 2, "res", "1,c" ], 719 | 0xcb8a : [ 2, "res", "1,d" ], 720 | 0xcb8b : [ 2, "res", "1,e" ], 721 | 0xcb8c : [ 2, "res", "1,h" ], 722 | 0xcb8d : [ 2, "res", "1,l" ], 723 | 0xcb8e : [ 2, "res", "1,indhl" ], 724 | 0xcb8f : [ 2, "res", "1,a" ], 725 | 726 | 0xcb90 : [ 2, "res", "2,b" ], 727 | 0xcb91 : [ 2, "res", "2,c" ], 728 | 0xcb92 : [ 2, "res", "2,d" ], 729 | 0xcb93 : [ 2, "res", "2,e" ], 730 | 0xcb94 : [ 2, "res", "2,h" ], 731 | 0xcb95 : [ 2, "res", "2,l" ], 732 | 0xcb96 : [ 2, "res", "2,indhl" ], 733 | 0xcb97 : [ 2, "res", "2,a" ], 734 | 0xcb98 : [ 2, "res", "3,b" ], 735 | 0xcb99 : [ 2, "res", "3,c" ], 736 | 0xcb9a : [ 2, "res", "3,d" ], 737 | 0xcb9b : [ 2, "res", "3,e" ], 738 | 0xcb9c : [ 2, "res", "3,h" ], 739 | 0xcb9d : [ 2, "res", "3,l" ], 740 | 0xcb9e : [ 2, "res", "3,indhl" ], 741 | 0xcb9f : [ 2, "res", "3,a" ], 742 | 743 | 0xcba0 : [ 2, "res", "4,b" ], 744 | 0xcba1 : [ 2, "res", "4,c" ], 745 | 0xcba2 : [ 2, "res", "4,d" ], 746 | 0xcba3 : [ 2, "res", "4,e" ], 747 | 0xcba4 : [ 2, "res", "4,h" ], 748 | 0xcba5 : [ 2, "res", "4,l" ], 749 | 0xcba6 : [ 2, "res", "4,indhl" ], 750 | 0xcba7 : [ 2, "res", "4,a" ], 751 | 0xcba8 : [ 2, "res", "5,b" ], 752 | 0xcba9 : [ 2, "res", "5,c" ], 753 | 0xcbaa : [ 2, "res", "5,d" ], 754 | 0xcbab : [ 2, "res", "5,e" ], 755 | 0xcbac : [ 2, "res", "5,h" ], 756 | 0xcbad : [ 2, "res", "5,l" ], 757 | 0xcbae : [ 2, "res", "5,indhl" ], 758 | 0xcbaf : [ 2, "res", "5,a" ], 759 | 760 | 0xcbb0 : [ 2, "res", "6,b" ], 761 | 0xcbb1 : [ 2, "res", "6,c" ], 762 | 0xcbb2 : [ 2, "res", "6,d" ], 763 | 0xcbb3 : [ 2, "res", "6,e" ], 764 | 0xcbb4 : [ 2, "res", "6,h" ], 765 | 0xcbb5 : [ 2, "res", "6,l" ], 766 | 0xcbb6 : [ 2, "res", "6,indhl" ], 767 | 0xcbb7 : [ 2, "res", "6,a" ], 768 | 0xcbb8 : [ 2, "res", "7,b" ], 769 | 0xcbb9 : [ 2, "res", "7,c" ], 770 | 0xcbba : [ 2, "res", "7,d" ], 771 | 0xcbbb : [ 2, "res", "7,e" ], 772 | 0xcbbc : [ 2, "res", "7,h" ], 773 | 0xcbbd : [ 2, "res", "7,l" ], 774 | 0xcbbe : [ 2, "res", "7,indhl" ], 775 | 0xcbbf : [ 2, "res", "7,a" ], 776 | 777 | 0xcbc0 : [ 2, "set", "0,b" ], 778 | 0xcbc1 : [ 2, "set", "0,c" ], 779 | 0xcbc2 : [ 2, "set", "0,d" ], 780 | 0xcbc3 : [ 2, "set", "0,e" ], 781 | 0xcbc4 : [ 2, "set", "0,h" ], 782 | 0xcbc5 : [ 2, "set", "0,l" ], 783 | 0xcbc6 : [ 2, "set", "0,indhl" ], 784 | 0xcbc7 : [ 2, "set", "0,a" ], 785 | 0xcbc8 : [ 2, "set", "1,b" ], 786 | 0xcbc9 : [ 2, "set", "1,c" ], 787 | 0xcbca : [ 2, "set", "1,d" ], 788 | 0xcbcb : [ 2, "set", "1,e" ], 789 | 0xcbcc : [ 2, "set", "1,h" ], 790 | 0xcbcd : [ 2, "set", "1,l" ], 791 | 0xcbce : [ 2, "set", "1,indhl" ], 792 | 0xcbcf : [ 2, "set", "1,a" ], 793 | 794 | 0xcbd0 : [ 2, "set", "2,b" ], 795 | 0xcbd1 : [ 2, "set", "2,c" ], 796 | 0xcbd2 : [ 2, "set", "2,d" ], 797 | 0xcbd3 : [ 2, "set", "2,e" ], 798 | 0xcbd4 : [ 2, "set", "2,h" ], 799 | 0xcbd5 : [ 2, "set", "2,l" ], 800 | 0xcbd6 : [ 2, "set", "2,indhl" ], 801 | 0xcbd7 : [ 2, "set", "2,a" ], 802 | 0xcbd8 : [ 2, "set", "3,b" ], 803 | 0xcbd9 : [ 2, "set", "3,c" ], 804 | 0xcbda : [ 2, "set", "3,d" ], 805 | 0xcbdb : [ 2, "set", "3,e" ], 806 | 0xcbdc : [ 2, "set", "3,h" ], 807 | 0xcbdd : [ 2, "set", "3,l" ], 808 | 0xcbde : [ 2, "set", "3,indhl" ], 809 | 0xcbdf : [ 2, "set", "3,a" ], 810 | 811 | 0xcbe0 : [ 2, "set", "4,b" ], 812 | 0xcbe1 : [ 2, "set", "4,c" ], 813 | 0xcbe2 : [ 2, "set", "4,d" ], 814 | 0xcbe3 : [ 2, "set", "4,e" ], 815 | 0xcbe4 : [ 2, "set", "4,h" ], 816 | 0xcbe5 : [ 2, "set", "4,l" ], 817 | 0xcbe6 : [ 2, "set", "4,indhl" ], 818 | 0xcbe7 : [ 2, "set", "4,a" ], 819 | 0xcbe8 : [ 2, "set", "5,b" ], 820 | 0xcbe9 : [ 2, "set", "5,c" ], 821 | 0xcbea : [ 2, "set", "5,d" ], 822 | 0xcbeb : [ 2, "set", "5,e" ], 823 | 0xcbec : [ 2, "set", "5,h" ], 824 | 0xcbed : [ 2, "set", "5,l" ], 825 | 0xcbee : [ 2, "set", "5,indhl" ], 826 | 0xcbef : [ 2, "set", "5,a" ], 827 | 828 | 0xcbf0 : [ 2, "set", "6,b" ], 829 | 0xcbf1 : [ 2, "set", "6,c" ], 830 | 0xcbf2 : [ 2, "set", "6,d" ], 831 | 0xcbf3 : [ 2, "set", "6,e" ], 832 | 0xcbf4 : [ 2, "set", "6,h" ], 833 | 0xcbf5 : [ 2, "set", "6,l" ], 834 | 0xcbf6 : [ 2, "set", "6,indhl" ], 835 | 0xcbf7 : [ 2, "set", "6,a" ], 836 | 0xcbf8 : [ 2, "set", "7,b" ], 837 | 0xcbf9 : [ 2, "set", "7,c" ], 838 | 0xcbfa : [ 2, "set", "7,d" ], 839 | 0xcbfb : [ 2, "set", "7,e" ], 840 | 0xcbfc : [ 2, "set", "7,h" ], 841 | 0xcbfd : [ 2, "set", "7,l" ], 842 | 0xcbfe : [ 2, "set", "7,indhl" ], 843 | 0xcbff : [ 2, "set", "7,a" ], 844 | 845 | 0xdd09 : [ 2, "add", "ix,bc" ], 846 | 0xdd19 : [ 2, "add", "ix,de" ], 847 | 0xdd21 : [ 4, "ld", "ix,aa" ], 848 | 0xdd22 : [ 4, "ld", "indaa,ix" ], 849 | 0xdd23 : [ 2, "inc", "ix" ], 850 | 0xdd29 : [ 2, "add", "ix,ix" ], 851 | 0xdd2a : [ 4, "ld", "ix,indaa" ], 852 | 0xdd2b : [ 2, "dec", "ix" ], 853 | 0xdd34 : [ 3, "inc", "indix+d" ], 854 | 0xdd35 : [ 3, "dec", "indix+d" ], 855 | 0xdd36 : [ 4, "ld", "indix+d,n" ], 856 | 0xdd39 : [ 2, "add", "ix,sp" ], 857 | 0xdd46 : [ 3, "ld", "b,indix+d" ], 858 | 0xdd4e : [ 3, "ld", "c,indix+d" ], 859 | 0xdd56 : [ 3, "ld", "d,indix+d" ], 860 | 0xdd5e : [ 3, "ld", "e,indix+d" ], 861 | 0xdd66 : [ 3, "ld", "h,indix+d" ], 862 | 0xdd6e : [ 3, "ld", "l,indix+d" ], 863 | 0xdd70 : [ 3, "ld", "indix+d,b" ], 864 | 0xdd71 : [ 3, "ld", "indix+d,c" ], 865 | 0xdd72 : [ 3, "ld", "indix+d,d" ], 866 | 0xdd73 : [ 3, "ld", "indix+d,e" ], 867 | 0xdd74 : [ 3, "ld", "indix+d,h" ], 868 | 0xdd75 : [ 3, "ld", "indix+d,l" ], 869 | 0xdd77 : [ 3, "ld", "indix+d,a" ], 870 | 0xdd7e : [ 3, "ld", "a,indix+d" ], 871 | 0xdd86 : [ 3, "add", "a,indix+d" ], 872 | 0xdd8e : [ 3, "adc", "a,indix+d" ], 873 | 0xdd96 : [ 3, "sub", "indix+d" ], 874 | 0xdd9e : [ 3, "sbc", "a,indix+d" ], 875 | 0xdda6 : [ 3, "and", "indix+d" ], 876 | 0xddae : [ 3, "xor", "indix+d" ], 877 | 0xddb6 : [ 3, "or", "indix+d" ], 878 | 0xddbe : [ 3, "cp", "indix+d" ], 879 | 880 | 0xed40 : [ 2, "in", "b,indc" ], 881 | 0xed41 : [ 2, "out", "indc,b" ], 882 | 0xed42 : [ 2, "sbc", "hl,bc" ], 883 | 0xed43 : [ 4, "ld", "indaa,bc" ], 884 | 0xed44 : [ 2, "neg", "implied" ], 885 | 0xed45 : [ 2, "retn", "implied" ], 886 | 0xed46 : [ 2, "im", "0" ], 887 | 0xed47 : [ 2, "ld", "i,a" ], 888 | 0xed48 : [ 2, "in", "c,indc" ], 889 | 0xed49 : [ 2, "out", "indc,c" ], 890 | 0xed4a : [ 2, "adc", "hl,bc" ], 891 | 0xed4b : [ 4, "ld", "bc,indaa" ], 892 | 0xed4d : [ 2, "reti", "implied" ], 893 | 0xed4f : [ 2, "ld", "r,a" ], 894 | 0xed50 : [ 2, "in", "d,indc" ], 895 | 0xed51 : [ 2, "out", "indc,d" ], 896 | 0xed52 : [ 2, "sbc", "hl,de" ], 897 | 0xed53 : [ 4, "ld", "indaa,de" ], 898 | 0xed56 : [ 2, "im", "1" ], 899 | 0xed57 : [ 2, "ld", "a,i" ], 900 | 0xed58 : [ 2, "in", "e,indc" ], 901 | 0xed59 : [ 2, "out", "indc,e" ], 902 | 0xed5a : [ 2, "adc", "hl,de" ], 903 | 0xed5b : [ 4, "ld", "de,indaa" ], 904 | 0xed5e : [ 2, "im", "2" ], 905 | 0xed5f : [ 2, "ld", "a,r" ], 906 | 0xed60 : [ 2, "in", "h,indc" ], 907 | 0xed61 : [ 2, "out", "indc,h" ], 908 | 0xed62 : [ 2, "sbc", "hl,hl" ], 909 | 0xed67 : [ 2, "rrd", "implied" ], 910 | 0xed68 : [ 2, "in", "l,indc" ], 911 | 0xed69 : [ 2, "out", "indc,l" ], 912 | 0xed6a : [ 2, "adc", "hl,hl" ], 913 | 0xed6f : [ 2, "rld", "implied" ], 914 | 0xed72 : [ 2, "sbc", "hl,sp" ], 915 | 0xed73 : [ 4, "ld", "indaa,sp" ], 916 | 0xed76 : [ 2, "in", "a,indc" ], 917 | 0xed79 : [ 2, "out", "indc,a" ], 918 | 0xed7a : [ 2, "adc", "hl,sp" ], 919 | 0xed7b : [ 4, "ld", "sp,indaa" ], 920 | 0xeda0 : [ 2, "ldi", "implied" ], 921 | 0xeda1 : [ 2, "cpi", "implied" ], 922 | 0xeda2 : [ 2, "ini", "implied" ], 923 | 0xeda3 : [ 2, "outi", "implied" ], 924 | 0xeda8 : [ 2, "ldd", "implied" ], 925 | 0xeda9 : [ 2, "cpd", "implied" ], 926 | 0xedaa : [ 2, "ind", "implied" ], 927 | 0xedab : [ 2, "outd", "implied" ], 928 | 0xedb0 : [ 2, "ldir", "implied" ], 929 | 0xedb1 : [ 2, "cpir", "implied" ], 930 | 0xedb2 : [ 2, "inir", "implied" ], 931 | 0xedb3 : [ 2, "otir", "implied" ], 932 | 0xedb8 : [ 2, "lddr", "implied" ], 933 | 0xedb9 : [ 2, "cpdr", "implied" ], 934 | 0xedba : [ 2, "indr", "implied" ], 935 | 0xedbb : [ 2, "otdr", "implied" ], 936 | 937 | 0xfd09 : [ 2, "add", "iy,bc" ], 938 | 0xfd19 : [ 2, "add", "iy,de" ], 939 | 0xfd21 : [ 4, "ld", "iy,aa" ], 940 | 0xfd22 : [ 4, "ld", "indaa,iy" ], 941 | 0xfd23 : [ 2, "inc", "iy" ], 942 | 0xfd29 : [ 2, "add", "iy,iy" ], 943 | 0xfd2a : [ 4, "ld", "iy,indaa" ], 944 | 0xfd2b : [ 2, "dec", "iy" ], 945 | 0xfd34 : [ 3, "inc", "indiy+d" ], 946 | 0xfd35 : [ 3, "dec", "indiy+d" ], 947 | 0xfd36 : [ 4, "ld", "indiy+d,n" ], 948 | 0xfd39 : [ 2, "add", "iy,sp" ], 949 | 0xfd46 : [ 3, "ld", "b,indiy+d" ], 950 | 0xfd4e : [ 3, "ld", "c,indiy+d" ], 951 | 0xfd56 : [ 3, "ld", "d,indiy+d" ], 952 | 0xfd5e : [ 3, "ld", "e,indiy+d" ], 953 | 0xfd66 : [ 3, "ld", "h,indiy+d" ], 954 | 0xfd6e : [ 3, "ld", "l,indiy+d" ], 955 | 0xfd70 : [ 3, "ld", "indiy+d,b" ], 956 | 0xfd71 : [ 3, "ld", "indiy+d,c" ], 957 | 0xfd72 : [ 3, "ld", "indiy+d,d" ], 958 | 0xfd73 : [ 3, "ld", "indiy+d,e" ], 959 | 0xfd74 : [ 3, "ld", "indiy+d,h" ], 960 | 0xfd75 : [ 3, "ld", "indiy+d,l" ], 961 | 0xfd77 : [ 3, "ld", "indiy+d,a" ], 962 | 0xfd7e : [ 3, "ld", "a,indiy+d" ], 963 | 0xfd86 : [ 3, "add", "a,indiy+d" ], 964 | 0xfd8e : [ 3, "adc", "a,indiy+d" ], 965 | 0xfd96 : [ 3, "sub", "indiy+d" ], 966 | 0xfd9e : [ 3, "sbc", "a,indiy+d" ], 967 | 0xfda6 : [ 3, "and", "indiy+d" ], 968 | 0xfdae : [ 3, "xor", "indiy+d" ], 969 | 0xfdb6 : [ 3, "or", "indiy+d" ], 970 | 0xfdbe : [ 3, "cp", "indiy+d" ], 971 | 972 | # Placeholder 2-byte leadins for the 4-byte ix/iy bit instructions fully 973 | # defined below. The z80bit flag triggers a special case in the disassembler 974 | # to look up the 4 byte instruction. 975 | 0xddcb : [ 4, "ixbit", "implied", z80bit ], 976 | 0xfdcb : [ 4, "iybit", "implied", z80bit ], 977 | } 978 | 979 | def extra_opcodes(addr_table, op_table): 980 | # Create all the 0xddcb and 0xfdcb addressing modes. The modes look like [0-7],(i[xy]+*)[,[abcdehl]]? 981 | for index in ['x', 'y']: 982 | for bit in range(8): 983 | k = "%d,indi%s+d" % (bit, index) 984 | v = "%d,(i%s+${0:02X})" % (bit, index) 985 | addr_table[k] = v 986 | for reg in ['a', 'b', 'c', 'd', 'e', 'h', 'l']: 987 | k = "%d,indi%s+d,%s" % (bit, index, reg) 988 | v = "%d,(i%s+${0:02X}),%s" % (bit, index, reg) 989 | addr_table[k] = v 990 | 991 | # Create all the 0xddcb and 0xfdcb opcodes. These are all 4 byte opcodes 992 | # where the 3rd byte is a -128 - +127 offset. For the purposes of using 993 | # this table, the 3rd byte will be marked as zero and the disassembler will 994 | # have to insert the real 3rd byte the check of the z80bit special case 995 | for first_byte, x_or_y in [(0xdd, 'x'), (0xfd, 'y')]: 996 | # groups of 8, expand to full 256 997 | mnemonics_8 = ['rlc', 'rrc', 'rl', 'rr', 'sla', 'sra', 'sll', 'sr1'] + ['bit'] * 8 + ['res'] * 8 + ['set'] * 8 998 | mnemonics = [m for mnemonic in mnemonics_8 for m in [mnemonic]*8] 999 | 1000 | # create all 256 addressing modes, in groups of 64 1001 | addrmodes = ['indi%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']] * 8 + [f % d for d in range(8) for f in ['%d,indi%%s+d'] * 8] + [f % d for d in range(8) for f in ['%d,indi%%s+d' + a for a in [',b', ',c', ',d', ',e', ',h', ',l', '', ',a']]] * 2 1002 | 1003 | for fourth_byte, (instruction, addrmode) in enumerate(zip(mnemonics, addrmodes)): 1004 | opcode = (first_byte << 24) + (0xcb << 16) + fourth_byte 1005 | op_table[opcode] = [ 4, instruction, addrmode % x_or_y, z80bit ] 1006 | extra_opcodes(addressModeTable, opcodeTable) 1007 | del extra_opcodes 1008 | 1009 | # End of processor specific code 1010 | ########################################################################## 1011 | --------------------------------------------------------------------------------