├── .github └── workflows │ └── main.yml ├── .gitignore ├── Cargo.lock ├── Cargo.toml ├── LICENSE ├── README.md ├── src ├── ast │ ├── declarations │ │ ├── declaration_data_types.rs │ │ ├── declaration_lists.rs │ │ ├── declaration_ranges.rs │ │ ├── declaration_types.rs │ │ └── mod.rs │ ├── expressions │ │ ├── mod.rs │ │ └── numbers.rs │ ├── general │ │ ├── attributes.rs │ │ ├── identifiers.rs │ │ └── mod.rs │ ├── mod.rs │ └── source_text │ │ ├── mod.rs │ │ ├── module_items.rs │ │ ├── module_parameters_ports.rs │ │ └── systemverilog_source_text.rs ├── diagnostic.rs ├── examples │ ├── lex.rs │ └── parse.rs ├── lexer.rs ├── lib.rs └── parser.rs ├── testcase ├── .gitignore ├── bad │ ├── no-endmodule.v │ └── no-endmodule.v.diag └── good │ ├── adder.v │ ├── adder.v.ast │ ├── array.v │ ├── array.v.ast │ ├── register.v │ └── register.v.ast ├── verilog-lang-wasm ├── .gitignore ├── Cargo.toml └── src │ └── lib.rs └── verilog-subset.ebnf /.github/workflows/main.yml: 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