├── .gitignore ├── README.md ├── application ├── appspace_1.ld ├── appspace_2.ld ├── asm │ └── startup.s ├── include │ ├── as1_blink.h │ ├── as2_blink.h │ ├── as2_blink_bad_checksum.h │ ├── interrupts.h │ ├── main.h │ └── stm32g0xx_hal_conf.h └── src │ ├── interrupts.c │ ├── main.c │ └── system_stm32g0xx.c ├── bootloader ├── asm │ └── startup.s ├── bootloader.ld ├── include │ ├── bootloader.h │ ├── bootloader_data.h │ ├── main.h │ └── stm32g0xx_hal_conf.h └── src │ ├── bootloader.c │ ├── main.c │ └── system_stm32g0xx.c ├── common ├── app_info.h ├── bootloader_common.h ├── memory_map.h └── stm32g0xx_hal_conf.h ├── drivers ├── CMSIS │ ├── Device │ │ └── ST │ │ │ └── STM32G0xx │ │ │ └── Include │ │ │ ├── stm32g071xx.h │ │ │ ├── stm32g0xx.h │ │ │ └── system_stm32g0xx.h │ └── Include │ │ ├── cmsis_armcc.h │ │ ├── cmsis_armclang.h │ │ ├── cmsis_compiler.h │ │ ├── cmsis_gcc.h │ │ ├── cmsis_iccarm.h │ │ ├── cmsis_version.h │ │ ├── core_armv8mbl.h │ │ ├── core_armv8mml.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm1.h │ │ ├── core_cm23.h │ │ ├── core_cm3.h │ │ ├── core_cm33.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_sc000.h │ │ ├── core_sc300.h │ │ ├── mpu_armv7.h │ │ ├── mpu_armv8.h │ │ └── tz_context.h └── STM32G0xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32_assert_template.h │ ├── stm32g0xx_hal.h │ ├── stm32g0xx_hal_adc.h │ ├── stm32g0xx_hal_adc_ex.h │ ├── stm32g0xx_hal_cec.h │ ├── stm32g0xx_hal_comp.h │ ├── stm32g0xx_hal_conf_template.h │ ├── stm32g0xx_hal_cortex.h │ ├── stm32g0xx_hal_crc.h │ ├── stm32g0xx_hal_crc_ex.h │ ├── stm32g0xx_hal_cryp.h │ ├── stm32g0xx_hal_cryp_ex.h │ ├── stm32g0xx_hal_dac.h │ ├── stm32g0xx_hal_dac_ex.h │ ├── stm32g0xx_hal_def.h │ ├── stm32g0xx_hal_dma.h │ ├── stm32g0xx_hal_dma_ex.h │ ├── stm32g0xx_hal_exti.h │ ├── stm32g0xx_hal_flash.h │ ├── stm32g0xx_hal_flash_ex.h │ ├── stm32g0xx_hal_gpio.h │ ├── stm32g0xx_hal_gpio_ex.h │ ├── stm32g0xx_hal_i2c.h │ ├── stm32g0xx_hal_i2c_ex.h │ ├── stm32g0xx_hal_i2s.h │ ├── stm32g0xx_hal_irda.h │ ├── stm32g0xx_hal_irda_ex.h │ ├── stm32g0xx_hal_iwdg.h │ ├── stm32g0xx_hal_lptim.h │ ├── stm32g0xx_hal_pwr.h │ ├── stm32g0xx_hal_pwr_ex.h │ ├── stm32g0xx_hal_rcc.h │ ├── stm32g0xx_hal_rcc_ex.h │ ├── stm32g0xx_hal_rng.h │ ├── stm32g0xx_hal_rtc.h │ ├── stm32g0xx_hal_rtc_ex.h │ ├── stm32g0xx_hal_smartcard.h │ ├── stm32g0xx_hal_smartcard_ex.h │ ├── stm32g0xx_hal_smbus.h │ ├── stm32g0xx_hal_spi.h │ ├── stm32g0xx_hal_spi_ex.h │ ├── stm32g0xx_hal_tim.h │ ├── stm32g0xx_hal_tim_ex.h │ ├── stm32g0xx_hal_uart.h │ ├── stm32g0xx_hal_uart_ex.h │ ├── stm32g0xx_hal_usart.h │ ├── stm32g0xx_hal_usart_ex.h │ ├── stm32g0xx_hal_wwdg.h │ ├── stm32g0xx_ll_adc.h │ ├── stm32g0xx_ll_bus.h │ ├── stm32g0xx_ll_comp.h │ ├── stm32g0xx_ll_cortex.h │ ├── stm32g0xx_ll_crc.h │ ├── stm32g0xx_ll_dac.h │ ├── stm32g0xx_ll_dma.h │ ├── stm32g0xx_ll_dmamux.h │ ├── stm32g0xx_ll_exti.h │ ├── stm32g0xx_ll_gpio.h │ ├── stm32g0xx_ll_i2c.h │ ├── stm32g0xx_ll_iwdg.h │ ├── stm32g0xx_ll_lptim.h │ ├── stm32g0xx_ll_lpuart.h │ ├── stm32g0xx_ll_pwr.h │ ├── stm32g0xx_ll_rcc.h │ ├── stm32g0xx_ll_rng.h │ ├── stm32g0xx_ll_rtc.h │ ├── stm32g0xx_ll_spi.h │ ├── stm32g0xx_ll_system.h │ ├── stm32g0xx_ll_tim.h │ ├── stm32g0xx_ll_ucpd.h │ ├── stm32g0xx_ll_usart.h │ ├── stm32g0xx_ll_utils.h │ └── stm32g0xx_ll_wwdg.h │ └── Src │ ├── stm32g0xx_hal.c │ ├── stm32g0xx_hal_adc.c │ ├── stm32g0xx_hal_adc_ex.c │ ├── stm32g0xx_hal_cec.c │ ├── stm32g0xx_hal_comp.c │ ├── stm32g0xx_hal_cortex.c │ ├── stm32g0xx_hal_crc.c │ ├── stm32g0xx_hal_crc_ex.c │ ├── stm32g0xx_hal_cryp.c │ ├── stm32g0xx_hal_cryp_ex.c │ ├── stm32g0xx_hal_dac.c │ ├── stm32g0xx_hal_dac_ex.c │ ├── stm32g0xx_hal_dma.c │ ├── stm32g0xx_hal_dma_ex.c │ ├── stm32g0xx_hal_exti.c │ ├── stm32g0xx_hal_flash.c │ ├── stm32g0xx_hal_flash_ex.c │ ├── stm32g0xx_hal_gpio.c │ ├── stm32g0xx_hal_i2c.c │ ├── stm32g0xx_hal_i2c_ex.c │ ├── stm32g0xx_hal_i2s.c │ ├── stm32g0xx_hal_irda.c │ ├── stm32g0xx_hal_iwdg.c │ ├── stm32g0xx_hal_lptim.c │ ├── stm32g0xx_hal_pwr.c │ ├── stm32g0xx_hal_pwr_ex.c │ ├── stm32g0xx_hal_rcc.c │ ├── stm32g0xx_hal_rcc_ex.c │ ├── stm32g0xx_hal_rng.c │ ├── stm32g0xx_hal_rtc.c │ ├── stm32g0xx_hal_rtc_ex.c │ ├── stm32g0xx_hal_smartcard.c │ ├── stm32g0xx_hal_smartcard_ex.c │ ├── stm32g0xx_hal_smbus.c │ ├── stm32g0xx_hal_spi.c │ ├── stm32g0xx_hal_spi_ex.c │ ├── stm32g0xx_hal_tim.c │ ├── stm32g0xx_hal_tim_ex.c │ ├── stm32g0xx_hal_uart.c │ ├── stm32g0xx_hal_uart_ex.c │ ├── stm32g0xx_hal_usart.c │ ├── stm32g0xx_hal_usart_ex.c │ ├── stm32g0xx_hal_wwdg.c │ ├── stm32g0xx_ll_adc.c │ ├── stm32g0xx_ll_comp.c │ ├── stm32g0xx_ll_crc.c │ ├── stm32g0xx_ll_dac.c │ ├── stm32g0xx_ll_dma.c │ ├── stm32g0xx_ll_exti.c │ ├── stm32g0xx_ll_gpio.c │ ├── stm32g0xx_ll_i2c.c │ ├── stm32g0xx_ll_lptim.c │ ├── stm32g0xx_ll_lpuart.c │ ├── stm32g0xx_ll_pwr.c │ ├── stm32g0xx_ll_rcc.c │ ├── stm32g0xx_ll_rng.c │ ├── stm32g0xx_ll_rtc.c │ ├── stm32g0xx_ll_spi.c │ ├── stm32g0xx_ll_tim.c │ ├── stm32g0xx_ll_ucpd.c │ ├── stm32g0xx_ll_usart.c │ └── stm32g0xx_ll_utils.c ├── make_update_header.py ├── makefile └── memory_map.ld /.gitignore: -------------------------------------------------------------------------------- 1 | # STM32G0 Bootloader 2 | # Jonah Swain 3 | # .gitignore 4 | 5 | # Build process outputs 6 | *.o 7 | *.elf 8 | *.hex 9 | *.bin 10 | *.map 11 | 12 | # Test blink program 13 | blink/* -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # STM32G0 Bootloader 2 | Bootloader for OTA updates for STM32G0 microcontrollers. 3 | 4 | The bootloader on this repository is configured for the STM32G071RB µC and tested on the NUCLEO-G071RB development board. It should be easily portable to other STM32G0 µCs, and other STM32 µCs with a vector table offset register (VTOR) (STM32 F1/F2/F3/F4/F7/L0/L1/L4/L4+/G0/G4/H7). 5 | 6 | Prepared by Jonah Swain in partial fulfillment of the requirements for the EEE4022S final year engineering project at the University of Cape Town. 7 | 8 | ## Features 9 | - [x] Dual configurable application spaces 10 | - [x] Dual-boot 11 | - [x] In application programming 12 | - [x] Application checksum verification 13 | - [x] Error handling and fail-over (independent watchdog) 14 | 15 | ## Project organisation 16 | ``` 17 | stm32g0-bootloader 18 | │ 19 | ├── application 20 | │ ├── asm (application assembly sources - startup file) 21 | │ ├── include (application header files, HAL configuration & some test application binaries as C headers) 22 | │ ├── src (application source files and test code) 23 | │ ├── appspace_1.ld (linker script for application space 1) 24 | │ ├── appspace_2.ld (linker script for application space 2) 25 | │ 26 | ├── bootloader 27 | │ ├── asm (bootloader assembly sources - startup file) 28 | │ ├── include (bootloader header files & HAL configuration) 29 | │ ├── src (bootloader source files) 30 | │ ├── bootloader.ld (bootloader linker script) 31 | │ 32 | ├── common 33 | │ ├── app_info.h (application info struct) 34 | │ ├── bootloader_common.h (application-accessible bootloader content) 35 | │ ├── memory_map.h (linker memory map symbols in C header) 36 | │ ├── stm32g0xx_hal_conf.h (HAL configuration header for libraries) 37 | │ 38 | ├── drivers 39 | │ ├── CMSIS (CMSIS Cortex-M libraries) 40 | │ ├── STM32G0xx_HAL_Driver (STM32G0 HAL libraries) 41 | │ 42 | ├── make_update_header.py (Python script to convert an update binary (.bin) into an array in a C header) 43 | ├── makefile (Project makefile to build the bootloader and application for both application spaces) 44 | ├── memory_map.ld (Device memory map linker script) 45 | ``` 46 | 47 | ## System requirements 48 | In order to build and test this project, you will need the following installed on your computer: 49 | - The `arm-none-eabi-` toolchain 50 | - Make (install using [Cygwin](https://www.cygwin.com/) for Windows)) 51 | - A way of uploading code to your µC ([OpenOCD](http://openocd.org/), [STM32 ST-LINK utility](https://www.st.com/en/development-tools/stsw-link004.html), or [STM32CubeProgrammer](https://www.st.com/en/development-tools/stm32cubeprog.html)) 52 | - Python 3 if you want to use the make_update_header.py script 53 | 54 | ## Porting to other µCs 55 | The following considerations apply to porting this project to other µCs: 56 | 57 | ### STM32G0 series µCs 58 | Change the memory map (`memory_map.ld`) to match your µC's flash and SRAM sizes. 59 | Change the DEVICE parameter in the makefile to match your µC type. 60 | 61 | ### Other STM32 families 62 | Change the memory map (`memory_map.ld`) to match your µC's flash and SRAM sizes. 63 | Put the relevant CMSIS and HAL libraries in the drivers folder, and change the library config section in the makefile to locate the libraries. 64 | Replace the `stm32g0xx_hal_conf.h` and `system_stm32g0xx.c` files in the application and bootloader directories with those relevant to your µC. 65 | Change the `#include` statements in the header files to include your µC's HAL libraries. 66 | Change the DEVICE and CPU parameter in the makefile to match your µC type. 67 | Modify the `startup.s` files in the application and bootloader directories if required. 68 | You may have to change the functions that write to flash in `bootloader/src/bootloader.c` if your µC has different write alignment requirements. 69 | -------------------------------------------------------------------------------- /application/appspace_1.ld: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain [SWNJON003] 4 | 5 | Application space 1 sections/linker file 6 | 7 | Adapted in part from the linker script auto-generated by STM32CubeIDE for the STM32G071RB 8 | ST's linker script is licensed by ST under the BSD 3-clause license (opensource.org/licenses/BSD-3-Clause) 9 | */ 10 | 11 | /* Include memory map from memory_map.ld */ 12 | INCLUDE memory_map.ld 13 | 14 | /* Program entry point */ 15 | ENTRY(Reset_Handler) 16 | 17 | /* Minimum stack and heap section size configuration */ 18 | _MIN_STACK_SIZE = 1K; 19 | _MIN_HEAP_SIZE = 512; 20 | 21 | /* Stack initial address (end of data memory) */ 22 | __STACK_END = ORIGIN(SRAM) + LENGTH(SRAM); 23 | 24 | /* Sections */ 25 | SECTIONS 26 | { 27 | /* Vector table at start of program memory */ 28 | .isr_vector : 29 | { 30 | . = ALIGN(4); 31 | KEEP(*(.isr_vector)) 32 | . = ALIGN(4); 33 | } >FLASH_APP1 34 | 35 | /* Application code after vector table in program memory */ 36 | .text : 37 | { 38 | . = ALIGN(4); 39 | *(.text) 40 | *(.text*) 41 | *(.glue_7) 42 | *(.glue_7t) 43 | *(.eh_frame) 44 | KEEP(*(.init)) 45 | KEEP(*(.fini)) 46 | . = ALIGN(4); 47 | __APPLICATION_TEXT_END = .; /* Global symbol for end of application .text (code) section */ 48 | } >FLASH_APP1 49 | 50 | /* Application constant/read-only data in program memory */ 51 | .rodata : 52 | { 53 | . = ALIGN(4); 54 | *(.rodata) 55 | *(.rodata*) 56 | . = ALIGN(4); 57 | __APPLICATION_RODATA_END = .; /* Global symbol for end of application .rodata (data) section */ 58 | } >FLASH_APP1 59 | 60 | /* ARM unwinding sections in program memory */ 61 | .ARM.extab : 62 | { 63 | . = ALIGN(4); 64 | *(.ARM.extab* .gnu.linkonce.armextab.*) 65 | . = ALIGN(4); 66 | } >FLASH_APP1 67 | 68 | .ARM : 69 | { 70 | . = ALIGN(4); 71 | __exidx_start = .; 72 | *(.ARM.exidx*) 73 | __exidx_end = .; 74 | . = ALIGN(4); 75 | } >FLASH_APP1 76 | 77 | /* C/C++ object/section initialisation and deinitialisation code in program memory */ 78 | .preinit_array : 79 | { 80 | . = ALIGN(4); 81 | PROVIDE_HIDDEN (__preinit_array_start = .); 82 | KEEP (*(.preinit_array*)) 83 | PROVIDE_HIDDEN (__preinit_array_end = .); 84 | . = ALIGN(4); 85 | } >FLASH_APP1 86 | 87 | .init_array : 88 | { 89 | . = ALIGN(4); 90 | PROVIDE_HIDDEN (__init_array_start = .); 91 | KEEP (*(SORT(.init_array.*))) 92 | KEEP (*(.init_array*)) 93 | PROVIDE_HIDDEN (__init_array_end = .); 94 | . = ALIGN(4); 95 | } >FLASH_APP1 96 | 97 | .fini_array : 98 | { 99 | . = ALIGN(4); 100 | PROVIDE_HIDDEN (__fini_array_start = .); 101 | KEEP (*(SORT(.fini_array.*))) 102 | KEEP (*(.fini_array*)) 103 | PROVIDE_HIDDEN (__fini_array_end = .); 104 | . = ALIGN(4); 105 | } >FLASH_APP1 106 | 107 | __APPLICATION_DATA_ADDR = LOADADDR(.data); /* Global symbol for load address of application .data (data) section */ 108 | 109 | /* Initialised data/variables in data memory loaded from program memory */ 110 | .data : 111 | { 112 | . = ALIGN(4); 113 | __APPLICATION_DATA_START = .; /* Global symbol for start of application .data (data) section */ 114 | *(.data) 115 | *(.data*) 116 | 117 | . = ALIGN(4); 118 | __APPLICATION_DATA_END = .; /* Global symbol for end of application .data (data) section */ 119 | } >SRAM AT> FLASH_APP1 120 | 121 | /* Uninitialised data/variables in data memory */ 122 | .bss : 123 | { 124 | . = ALIGN(4); 125 | __APPLICATION_BSS_START = .; /* Global symbol for start of application .bss (uninitialised data) section */ 126 | *(.bss) 127 | *(.bss*) 128 | *(COMMON) 129 | 130 | . = ALIGN(4); 131 | __APPLICATION_BSS_END = .; /* Global symbol for end of application .bss (uninitialised data) section */ 132 | } >SRAM 133 | 134 | /* User-mode heap and stack in data memory (checks that sufficient SRAM is available) */ 135 | ._user_heap_stack : 136 | { 137 | . = ALIGN(8); 138 | PROVIDE ( end = . ); 139 | PROVIDE ( _end = . ); 140 | . = . + _MIN_HEAP_SIZE; 141 | . = . + _MIN_STACK_SIZE; 142 | . = ALIGN(8); 143 | } >SRAM 144 | 145 | /* Discard information from compiler libraries */ 146 | /DISCARD/ : 147 | { 148 | libc.a ( * ) 149 | libm.a ( * ) 150 | libgcc.a ( * ) 151 | } 152 | 153 | .ARM.attributes 0 : { *(.ARM.attributes) } 154 | } -------------------------------------------------------------------------------- /application/appspace_2.ld: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain [SWNJON003] 4 | 5 | Application space 2 sections/linker file 6 | 7 | Adapted in part from the linker script auto-generated by STM32CubeIDE for the STM32G071RB 8 | ST's linker script is licensed by ST under the BSD 3-clause license (opensource.org/licenses/BSD-3-Clause) 9 | */ 10 | 11 | /* Include memory map from memory_map.ld */ 12 | INCLUDE memory_map.ld 13 | 14 | /* Program entry point */ 15 | ENTRY(Reset_Handler) 16 | 17 | /* Minimum stack and heap section size configuration */ 18 | _MIN_STACK_SIZE = 1K; 19 | _MIN_HEAP_SIZE = 512; 20 | 21 | /* Stack initial address (end of data memory) */ 22 | __STACK_END = ORIGIN(SRAM) + LENGTH(SRAM); 23 | 24 | /* Sections */ 25 | SECTIONS 26 | { 27 | /* Vector table at start of program memory */ 28 | .isr_vector : 29 | { 30 | . = ALIGN(4); 31 | KEEP(*(.isr_vector)) 32 | . = ALIGN(4); 33 | } >FLASH_APP2 34 | 35 | /* Application code after vector table in program memory */ 36 | .text : 37 | { 38 | . = ALIGN(4); 39 | *(.text) 40 | *(.text*) 41 | *(.glue_7) 42 | *(.glue_7t) 43 | *(.eh_frame) 44 | KEEP(*(.init)) 45 | KEEP(*(.fini)) 46 | . = ALIGN(4); 47 | __APPLICATION_TEXT_END = .; /* Global symbol for end of application .text (code) section */ 48 | } >FLASH_APP2 49 | 50 | /* Application constant/read-only data in program memory */ 51 | .rodata : 52 | { 53 | . = ALIGN(4); 54 | *(.rodata) 55 | *(.rodata*) 56 | . = ALIGN(4); 57 | __APPLICATION_RODATA_END = .; /* Global symbol for end of application .rodata (data) section */ 58 | } >FLASH_APP2 59 | 60 | /* ARM unwinding sections in program memory */ 61 | .ARM.extab : 62 | { 63 | . = ALIGN(4); 64 | *(.ARM.extab* .gnu.linkonce.armextab.*) 65 | . = ALIGN(4); 66 | } >FLASH_APP2 67 | 68 | .ARM : 69 | { 70 | . = ALIGN(4); 71 | __exidx_start = .; 72 | *(.ARM.exidx*) 73 | __exidx_end = .; 74 | . = ALIGN(4); 75 | } >FLASH_APP2 76 | 77 | /* C/C++ object/section initialisation and deinitialisation code in program memory */ 78 | .preinit_array : 79 | { 80 | . = ALIGN(4); 81 | PROVIDE_HIDDEN (__preinit_array_start = .); 82 | KEEP (*(.preinit_array*)) 83 | PROVIDE_HIDDEN (__preinit_array_end = .); 84 | . = ALIGN(4); 85 | } >FLASH_APP2 86 | 87 | .init_array : 88 | { 89 | . = ALIGN(4); 90 | PROVIDE_HIDDEN (__init_array_start = .); 91 | KEEP (*(SORT(.init_array.*))) 92 | KEEP (*(.init_array*)) 93 | PROVIDE_HIDDEN (__init_array_end = .); 94 | . = ALIGN(4); 95 | } >FLASH_APP2 96 | 97 | .fini_array : 98 | { 99 | . = ALIGN(4); 100 | PROVIDE_HIDDEN (__fini_array_start = .); 101 | KEEP (*(SORT(.fini_array.*))) 102 | KEEP (*(.fini_array*)) 103 | PROVIDE_HIDDEN (__fini_array_end = .); 104 | . = ALIGN(4); 105 | } >FLASH_APP2 106 | 107 | __APPLICATION_DATA_ADDR = LOADADDR(.data); /* Global symbol for load address of application .data (data) section */ 108 | 109 | /* Initialised data/variables in data memory loaded from program memory */ 110 | .data : 111 | { 112 | . = ALIGN(4); 113 | __APPLICATION_DATA_START = .; /* Global symbol for start of application .data (data) section */ 114 | *(.data) 115 | *(.data*) 116 | 117 | . = ALIGN(4); 118 | __APPLICATION_DATA_END = .; /* Global symbol for end of application .data (data) section */ 119 | } >SRAM AT> FLASH_APP2 120 | 121 | /* Uninitialised data/variables in data memory */ 122 | .bss : 123 | { 124 | . = ALIGN(4); 125 | __APPLICATION_BSS_START = .; /* Global symbol for start of application .bss (uninitialised data) section */ 126 | *(.bss) 127 | *(.bss*) 128 | *(COMMON) 129 | 130 | . = ALIGN(4); 131 | __APPLICATION_BSS_END = .; /* Global symbol for end of application .bss (uninitialised data) section */ 132 | } >SRAM 133 | 134 | /* User-mode heap and stack in data memory (checks that sufficient SRAM is available) */ 135 | ._user_heap_stack : 136 | { 137 | . = ALIGN(8); 138 | PROVIDE ( end = . ); 139 | PROVIDE ( _end = . ); 140 | . = . + _MIN_HEAP_SIZE; 141 | . = . + _MIN_STACK_SIZE; 142 | . = ALIGN(8); 143 | } >SRAM 144 | 145 | /* Discard information from compiler libraries */ 146 | /DISCARD/ : 147 | { 148 | libc.a ( * ) 149 | libm.a ( * ) 150 | libgcc.a ( * ) 151 | } 152 | 153 | .ARM.attributes 0 : { *(.ARM.attributes) } 154 | } -------------------------------------------------------------------------------- /application/asm/startup.s: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain [SWNJON003] 4 | 5 | Application vector table and startup code 6 | 7 | Adapted in part from the startup file auto-generated by STM32CubeIDE for the STM32G071RB 8 | ST's startup file is licensed by ST under the BSD 3-clause license (opensource.org/licenses/BSD-3-Clause) 9 | */ 10 | 11 | /* Initial assembler directives */ 12 | .syntax unified @ use ARM/Thumb unified syntax 13 | .cpu cortex-m0 14 | .fpu softvfp 15 | .thumb 16 | 17 | .global g_pfnVectors @ make vector table globally accessible 18 | .global Default_Handler @ make default interrupt handler globally accessible 19 | 20 | /* Global symbols from linker script */ 21 | .word __STACK_END @ End (start) of stack 22 | .word __APPLICATION_TEXT_END @ End of .text (code) section 23 | .word __APPLICATION_RODATA_END @ End of .rodata (read-only data) section 24 | .word __APPLICATION_DATA_ADDR @ Address of initialisation values for .data (data/variables) section 25 | .word __APPLICATION_DATA_START @ Start of .data (initialised data/variables) section 26 | .word __APPLICATION_DATA_END @ End of .data (initialised data/variables) section 27 | .word __APPLICATION_BSS_START @ Start of .bss (uninitialised data/variables) section 28 | .word __APPLICATION_BSS_END @ End of .bss (uninitialised data/variables) section 29 | 30 | /* Startup code (Reset_Handler) */ 31 | .section .text.Reset_Handler 32 | .weak Reset_Handler 33 | .type Reset_Handler, %function 34 | Reset_Handler: 35 | @ initialise stack pointer 36 | ldr r0, =__STACK_END 37 | mov sp, r0 38 | CopyData: 39 | @ initialise .data SRAM from flash 40 | ldr r4, =__APPLICATION_DATA_ADDR 41 | ldr r2, =__APPLICATION_DATA_START 42 | ldr r3, =__APPLICATION_DATA_END 43 | cmp r2, r3 44 | beq ZeroBSS 45 | movs r1, #0 46 | LoopCopyData: 47 | ldr r0, [r4, r1] 48 | str r0, [r2, r1] 49 | adds r1, r1, #4 50 | adds r0, r2, r1 51 | cmp r0, r3 52 | bcc LoopCopyData 53 | movs r4, #0 54 | ZeroBSS: 55 | @ initialise .bss SRAM to zero 56 | ldr r2, =__APPLICATION_BSS_START 57 | ldr r3, =__APPLICATION_BSS_END 58 | cmp r2, r3 59 | beq InitFunctions 60 | movs r0, #0 61 | LoopZeroBSS: 62 | str r0, [r2] 63 | adds r2, r2, #4 64 | cmp r2, r3 65 | bcc LoopZeroBSS 66 | @ clear registers used above 67 | movs r1, #0 68 | movs r2, #0 69 | movs r3, #0 70 | InitFunctions: 71 | @bl __libc_init_array @ calls C++ static constructors and initialisation code (NOT REQUIRED FOR C PROJECTS) 72 | bl main @ branches to C code and application entry point 73 | LoopForever: 74 | @ loops infinitely if main() returns 75 | b LoopForever 76 | 77 | .size Reset_Handler, .-Reset_Handler 78 | 79 | /* Default interrupt handler (infinite loop) */ 80 | .section .text.Default_Handler,"ax",%progbits 81 | .weak Default_Handler 82 | Default_Handler: 83 | b LoopForever 84 | 85 | .size Default_Handler, .-Default_Handler 86 | 87 | /* Vector table */ 88 | .section .isr_vector,"a",%progbits 89 | .type g_pfnVectors, %object 90 | .size g_pfnVectors, .-g_pfnVectors 91 | g_pfnVectors: 92 | .word __STACK_END 93 | .word Reset_Handler 94 | .word NMI_Handler 95 | .word HardFault_Handler 96 | .word 0 97 | .word 0 98 | .word 0 99 | .word 0 100 | .word 0 101 | .word 0 102 | .word 0 103 | .word SVC_Handler 104 | .word 0 105 | .word 0 106 | .word PendSV_Handler 107 | .word SysTick_Handler 108 | .word WWDG_IRQHandler 109 | .word PVD_IRQHandler 110 | .word RTC_TAMP_IRQHandler 111 | .word FLASH_IRQHandler 112 | .word RCC_IRQHandler 113 | .word EXTI0_1_IRQHandler 114 | .word EXTI2_3_IRQHandler 115 | .word EXTI4_15_IRQHandler 116 | .word UCPD1_2_IRQHandler 117 | .word DMA1_Channel1_IRQHandler 118 | .word DMA1_Channel2_3_IRQHandler 119 | .word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler 120 | .word ADC1_COMP_IRQHandler 121 | .word TIM1_BRK_UP_TRG_COM_IRQHandler 122 | .word TIM1_CC_IRQHandler 123 | .word TIM2_IRQHandler 124 | .word TIM3_IRQHandler 125 | .word TIM6_DAC_LPTIM1_IRQHandler 126 | .word TIM7_LPTIM2_IRQHandler 127 | .word TIM14_IRQHandler 128 | .word TIM15_IRQHandler 129 | .word TIM16_IRQHandler 130 | .word TIM17_IRQHandler 131 | .word I2C1_IRQHandler 132 | .word I2C2_IRQHandler 133 | .word SPI1_IRQHandler 134 | .word SPI2_IRQHandler 135 | .word USART1_IRQHandler 136 | .word USART2_IRQHandler 137 | .word USART3_4_LPUART1_IRQHandler 138 | .word CEC_IRQHandler 139 | 140 | /* Weak aliases from interrupt handlers to Default_Handler (overridden by function with the same name) */ 141 | .weak NMI_Handler 142 | .thumb_set NMI_Handler,Default_Handler 143 | 144 | .weak HardFault_Handler 145 | .thumb_set HardFault_Handler,Default_Handler 146 | 147 | .weak SVC_Handler 148 | .thumb_set SVC_Handler,Default_Handler 149 | 150 | .weak PendSV_Handler 151 | .thumb_set PendSV_Handler,Default_Handler 152 | 153 | .weak SysTick_Handler 154 | .thumb_set SysTick_Handler,Default_Handler 155 | 156 | .weak WWDG_IRQHandler 157 | .thumb_set WWDG_IRQHandler,Default_Handler 158 | 159 | .weak PVD_IRQHandler 160 | .thumb_set PVD_IRQHandler,Default_Handler 161 | 162 | .weak RTC_TAMP_IRQHandler 163 | .thumb_set RTC_TAMP_IRQHandler,Default_Handler 164 | 165 | .weak FLASH_IRQHandler 166 | .thumb_set FLASH_IRQHandler,Default_Handler 167 | 168 | .weak RCC_IRQHandler 169 | .thumb_set RCC_IRQHandler,Default_Handler 170 | 171 | .weak EXTI0_1_IRQHandler 172 | .thumb_set EXTI0_1_IRQHandler,Default_Handler 173 | 174 | .weak EXTI2_3_IRQHandler 175 | .thumb_set EXTI2_3_IRQHandler,Default_Handler 176 | 177 | .weak EXTI4_15_IRQHandler 178 | .thumb_set EXTI4_15_IRQHandler,Default_Handler 179 | 180 | .weak UCPD1_2_IRQHandler 181 | .thumb_set UCPD1_2_IRQHandler,Default_Handler 182 | 183 | .weak DMA1_Channel1_IRQHandler 184 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 185 | 186 | .weak DMA1_Channel2_3_IRQHandler 187 | .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler 188 | 189 | .weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler 190 | .thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler 191 | 192 | .weak ADC1_COMP_IRQHandler 193 | .thumb_set ADC1_COMP_IRQHandler,Default_Handler 194 | 195 | .weak TIM1_BRK_UP_TRG_COM_IRQHandler 196 | .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler 197 | 198 | .weak TIM1_CC_IRQHandler 199 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 200 | 201 | .weak TIM2_IRQHandler 202 | .thumb_set TIM2_IRQHandler,Default_Handler 203 | 204 | .weak TIM3_IRQHandler 205 | .thumb_set TIM3_IRQHandler,Default_Handler 206 | 207 | .weak TIM6_DAC_LPTIM1_IRQHandler 208 | .thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler 209 | 210 | .weak TIM7_LPTIM2_IRQHandler 211 | .thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler 212 | 213 | .weak TIM14_IRQHandler 214 | .thumb_set TIM14_IRQHandler,Default_Handler 215 | 216 | .weak TIM15_IRQHandler 217 | .thumb_set TIM15_IRQHandler,Default_Handler 218 | 219 | .weak TIM16_IRQHandler 220 | .thumb_set TIM16_IRQHandler,Default_Handler 221 | 222 | .weak TIM17_IRQHandler 223 | .thumb_set TIM17_IRQHandler,Default_Handler 224 | 225 | .weak I2C1_IRQHandler 226 | .thumb_set I2C1_IRQHandler,Default_Handler 227 | 228 | .weak I2C2_IRQHandler 229 | .thumb_set I2C2_IRQHandler,Default_Handler 230 | 231 | .weak SPI1_IRQHandler 232 | .thumb_set SPI1_IRQHandler,Default_Handler 233 | 234 | .weak SPI2_IRQHandler 235 | .thumb_set SPI2_IRQHandler,Default_Handler 236 | 237 | .weak USART1_IRQHandler 238 | .thumb_set USART1_IRQHandler,Default_Handler 239 | 240 | .weak USART2_IRQHandler 241 | .thumb_set USART2_IRQHandler,Default_Handler 242 | 243 | .weak USART3_4_LPUART1_IRQHandler 244 | .thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler 245 | 246 | .weak CEC_IRQHandler 247 | .thumb_set CEC_IRQHandler,Default_Handler -------------------------------------------------------------------------------- /application/include/interrupts.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Interrupts (header) 6 | Interrupt request handlers 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef INTERRUPTS_H 12 | #define INTERRUPTS_H 13 | 14 | /* DEPENDENCIES */ 15 | #include "stm32g0xx_hal.h" // STM32G0 hardware abstraction layer 16 | 17 | /* CONSTANT DEFINITIONS AND MACROS */ 18 | 19 | 20 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 21 | 22 | 23 | /* GLOBAL VARIABLES */ 24 | 25 | 26 | /* FUNCTIONS */ 27 | void SysTick_Handler(); 28 | 29 | #endif -------------------------------------------------------------------------------- /application/include/main.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Application main (header) 6 | Main application code 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef APP_MAIN_H 12 | #define APP_MAIN_H 13 | 14 | /* TEST PROGRAM */ 15 | // Change this to the desired test program name 16 | #define TEST_BLINK 17 | 18 | /* DEPENDENCIES */ 19 | #include // Fixed width integer data types 20 | #include "stm32g0xx_hal.h" // STM32G0 hardware abstraction layer 21 | #include "bootloader_common.h" // Dispatch table for application-accessible bootloader functions 22 | #include "memory_map.h" // Device memory map 23 | 24 | #ifdef TEST_IAP_AS1 25 | #include "as1_blink.h" // Blink program binary as C header 26 | #endif 27 | 28 | #ifdef TEST_IAP_AS2 29 | #include "as2_blink.h" // Blink program binary as C header 30 | #endif 31 | 32 | #ifdef TEST_IAP_AS2_PRIO_AUTO 33 | #include "as2_blink.h" // Blink program binary as C header 34 | #endif 35 | 36 | #ifdef TEST_VT_CHECKSUM_VALID 37 | #include "as2_blink.h" // Blink program binary as C header 38 | #endif 39 | 40 | #ifdef TEST_VT_CHECKSUM_INVALID 41 | #include "as2_blink_bad_checksum.h" // Blink program binary as C header with bad checksum 42 | #endif 43 | 44 | #ifdef TEST_APP_CHECKSUM_VALID 45 | #include "as2_blink.h" // Blink program binary as C header 46 | #endif 47 | 48 | #ifdef TEST_APP_CHECKSUM_INVALID 49 | #include "as2_blink_bad_checksum.h" // Blink program binary as C header with bad checksum 50 | #endif 51 | 52 | /* CONSTANT DEFINITIONS AND MACROS */ 53 | #define BLINK_DELAY 500 54 | #define LD4_Port GPIOA 55 | #define LD4_Pin GPIO_PIN_5 56 | 57 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 58 | 59 | 60 | /* GLOBAL VARIABLES */ 61 | 62 | 63 | /* FUNCTIONS */ 64 | void main(); // Application main function 65 | 66 | void SystemClock_Config(); // Configures the system clock (Auto-generated by STM32CubeIDE) 67 | 68 | void Error_Handler(); // Default error handler (required by HAL) 69 | 70 | #endif -------------------------------------------------------------------------------- /application/src/interrupts.c: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Interrupts (implementation) 6 | Interrupt request handlers 7 | */ 8 | 9 | /* DEPENDENCIES */ 10 | #include "interrupts.h" 11 | 12 | /* CONSTANT DEFINITIONS AND MACROS */ 13 | 14 | 15 | /* GLOBAL VARIABLES */ 16 | 17 | 18 | /* FUNCTIONS */ 19 | 20 | void SysTick_Handler() { 21 | HAL_IncTick(); 22 | } -------------------------------------------------------------------------------- /bootloader/asm/startup.s: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain [SWNJON003] 4 | 5 | Bootloader vector table and startup code 6 | 7 | Adapted in part from the startup file auto-generated by STM32CubeIDE for the STM32G071RB 8 | ST's startup file is licensed by ST under the BSD 3-clause license (opensource.org/licenses/BSD-3-Clause) 9 | */ 10 | 11 | /* Initial assembler directives */ 12 | .syntax unified @ use ARM/Thumb unified syntax 13 | .cpu cortex-m0 14 | .fpu softvfp 15 | .thumb 16 | 17 | .global g_pfnVectors @ make vector table globally accessible 18 | .global Default_Handler @ make default interrupt handler globally accessible 19 | 20 | /* Global symbols from linker script */ 21 | .word __STACK_END @ End (start) of stack 22 | .word __BL_TEXT_END @ End of .text (code) section 23 | .word __BL_RODATA_END @ End of .rodata (read-only data) section 24 | .word __BL_DATA_ADDR @ Address of initialisation values for .data (data/variables) section 25 | .word __BL_DATA_START @ Start of .data (initialised data/variables) section 26 | .word __BL_DATA_END @ End of .data (initialised data/variables) section 27 | .word __BL_BSS_START @ Start of .bss (uninitialised data/variables) section 28 | .word __BL_BSS_END @ End of .bss (uninitialised data/variables) section 29 | 30 | /* Startup code (Reset_Handler) */ 31 | .section .text.Reset_Handler 32 | .weak Reset_Handler 33 | .type Reset_Handler, %function 34 | Reset_Handler: 35 | @ initialise stack pointer 36 | ldr r0, =__STACK_END 37 | mov sp, r0 38 | CopyData: 39 | @ initialise .data SRAM from flash 40 | ldr r4, =__BL_DATA_ADDR 41 | ldr r2, =__BL_DATA_START 42 | ldr r3, =__BL_DATA_END 43 | cmp r2, r3 44 | beq ZeroBSS 45 | movs r1, #0 46 | LoopCopyData: 47 | ldr r0, [r4, r1] 48 | str r0, [r2, r1] 49 | adds r1, r1, #4 50 | adds r0, r2, r1 51 | cmp r0, r3 52 | bcc LoopCopyData 53 | movs r4, #0 54 | ZeroBSS: 55 | @ initialise .bss SRAM to zero 56 | ldr r2, =__BL_BSS_START 57 | ldr r3, =__BL_BSS_END 58 | cmp r2, r3 59 | beq InitFunctions 60 | movs r0, #0 61 | LoopZeroBSS: 62 | str r0, [r2] 63 | adds r2, r2, #4 64 | cmp r2, r3 65 | bcc LoopZeroBSS 66 | @ clear registers used above 67 | movs r1, #0 68 | movs r2, #0 69 | movs r3, #0 70 | InitFunctions: 71 | bl SystemInit @ sets/resets vector table offset register (C function in system_stm32g0xx.c) 72 | @ bl __libc_init_array @ calls C++ static constructors and initialisation code (NOT REQUIRED FOR C PROJECTS) 73 | bl main @ branches to C code and bootloader entry point 74 | LoopForever: 75 | @ loops infinitely if bootloader main() returns 76 | b LoopForever 77 | 78 | .size Reset_Handler, .-Reset_Handler 79 | 80 | /* Default interrupt handler (infinite loop) */ 81 | .section .text.Default_Handler,"ax",%progbits 82 | .weak Default_Handler 83 | Default_Handler: 84 | b LoopForever 85 | 86 | .size Default_Handler, .-Default_Handler 87 | 88 | /* Vector table */ 89 | .section .isr_vector,"a",%progbits 90 | .type g_pfnVectors, %object 91 | .size g_pfnVectors, .-g_pfnVectors 92 | g_pfnVectors: 93 | .word __STACK_END 94 | .word Reset_Handler 95 | .word NMI_Handler 96 | .word HardFault_Handler 97 | .word 0 98 | .word 0 99 | .word 0 100 | .word 0 101 | .word 0 102 | .word 0 103 | .word 0 104 | .word SVC_Handler 105 | .word 0 106 | .word 0 107 | .word PendSV_Handler 108 | .word SysTick_Handler 109 | .word WWDG_IRQHandler 110 | .word PVD_IRQHandler 111 | .word RTC_TAMP_IRQHandler 112 | .word FLASH_IRQHandler 113 | .word RCC_IRQHandler 114 | .word EXTI0_1_IRQHandler 115 | .word EXTI2_3_IRQHandler 116 | .word EXTI4_15_IRQHandler 117 | .word UCPD1_2_IRQHandler 118 | .word DMA1_Channel1_IRQHandler 119 | .word DMA1_Channel2_3_IRQHandler 120 | .word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler 121 | .word ADC1_COMP_IRQHandler 122 | .word TIM1_BRK_UP_TRG_COM_IRQHandler 123 | .word TIM1_CC_IRQHandler 124 | .word TIM2_IRQHandler 125 | .word TIM3_IRQHandler 126 | .word TIM6_DAC_LPTIM1_IRQHandler 127 | .word TIM7_LPTIM2_IRQHandler 128 | .word TIM14_IRQHandler 129 | .word TIM15_IRQHandler 130 | .word TIM16_IRQHandler 131 | .word TIM17_IRQHandler 132 | .word I2C1_IRQHandler 133 | .word I2C2_IRQHandler 134 | .word SPI1_IRQHandler 135 | .word SPI2_IRQHandler 136 | .word USART1_IRQHandler 137 | .word USART2_IRQHandler 138 | .word USART3_4_LPUART1_IRQHandler 139 | .word CEC_IRQHandler 140 | 141 | /* Weak aliases from interrupt handlers to Default_Handler (overridden by function with the same name) */ 142 | .weak NMI_Handler 143 | .thumb_set NMI_Handler,Default_Handler 144 | 145 | .weak HardFault_Handler 146 | .thumb_set HardFault_Handler,Default_Handler 147 | 148 | .weak SVC_Handler 149 | .thumb_set SVC_Handler,Default_Handler 150 | 151 | .weak PendSV_Handler 152 | .thumb_set PendSV_Handler,Default_Handler 153 | 154 | .weak SysTick_Handler 155 | .thumb_set SysTick_Handler,Default_Handler 156 | 157 | .weak WWDG_IRQHandler 158 | .thumb_set WWDG_IRQHandler,Default_Handler 159 | 160 | .weak PVD_IRQHandler 161 | .thumb_set PVD_IRQHandler,Default_Handler 162 | 163 | .weak RTC_TAMP_IRQHandler 164 | .thumb_set RTC_TAMP_IRQHandler,Default_Handler 165 | 166 | .weak FLASH_IRQHandler 167 | .thumb_set FLASH_IRQHandler,Default_Handler 168 | 169 | .weak RCC_IRQHandler 170 | .thumb_set RCC_IRQHandler,Default_Handler 171 | 172 | .weak EXTI0_1_IRQHandler 173 | .thumb_set EXTI0_1_IRQHandler,Default_Handler 174 | 175 | .weak EXTI2_3_IRQHandler 176 | .thumb_set EXTI2_3_IRQHandler,Default_Handler 177 | 178 | .weak EXTI4_15_IRQHandler 179 | .thumb_set EXTI4_15_IRQHandler,Default_Handler 180 | 181 | .weak UCPD1_2_IRQHandler 182 | .thumb_set UCPD1_2_IRQHandler,Default_Handler 183 | 184 | .weak DMA1_Channel1_IRQHandler 185 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 186 | 187 | .weak DMA1_Channel2_3_IRQHandler 188 | .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler 189 | 190 | .weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler 191 | .thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler 192 | 193 | .weak ADC1_COMP_IRQHandler 194 | .thumb_set ADC1_COMP_IRQHandler,Default_Handler 195 | 196 | .weak TIM1_BRK_UP_TRG_COM_IRQHandler 197 | .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler 198 | 199 | .weak TIM1_CC_IRQHandler 200 | .thumb_set TIM1_CC_IRQHandler,Default_Handler 201 | 202 | .weak TIM2_IRQHandler 203 | .thumb_set TIM2_IRQHandler,Default_Handler 204 | 205 | .weak TIM3_IRQHandler 206 | .thumb_set TIM3_IRQHandler,Default_Handler 207 | 208 | .weak TIM6_DAC_LPTIM1_IRQHandler 209 | .thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler 210 | 211 | .weak TIM7_LPTIM2_IRQHandler 212 | .thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler 213 | 214 | .weak TIM14_IRQHandler 215 | .thumb_set TIM14_IRQHandler,Default_Handler 216 | 217 | .weak TIM15_IRQHandler 218 | .thumb_set TIM15_IRQHandler,Default_Handler 219 | 220 | .weak TIM16_IRQHandler 221 | .thumb_set TIM16_IRQHandler,Default_Handler 222 | 223 | .weak TIM17_IRQHandler 224 | .thumb_set TIM17_IRQHandler,Default_Handler 225 | 226 | .weak I2C1_IRQHandler 227 | .thumb_set I2C1_IRQHandler,Default_Handler 228 | 229 | .weak I2C2_IRQHandler 230 | .thumb_set I2C2_IRQHandler,Default_Handler 231 | 232 | .weak SPI1_IRQHandler 233 | .thumb_set SPI1_IRQHandler,Default_Handler 234 | 235 | .weak SPI2_IRQHandler 236 | .thumb_set SPI2_IRQHandler,Default_Handler 237 | 238 | .weak USART1_IRQHandler 239 | .thumb_set USART1_IRQHandler,Default_Handler 240 | 241 | .weak USART2_IRQHandler 242 | .thumb_set USART2_IRQHandler,Default_Handler 243 | 244 | .weak USART3_4_LPUART1_IRQHandler 245 | .thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler 246 | 247 | .weak CEC_IRQHandler 248 | .thumb_set CEC_IRQHandler,Default_Handler -------------------------------------------------------------------------------- /bootloader/bootloader.ld: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain [SWNJON003] 4 | 5 | Bootloader sections/linker file 6 | 7 | Adapted in part from the linker script auto-generated by STM32CubeIDE for the STM32G071RB 8 | ST's linker script is licensed by ST under the BSD 3-clause license (opensource.org/licenses/BSD-3-Clause) 9 | */ 10 | 11 | /* Include memory map from memory_map.ld */ 12 | INCLUDE memory_map.ld 13 | 14 | /* Program entry point */ 15 | ENTRY(Reset_Handler) 16 | 17 | /* Minimum stack and heap section size configuration */ 18 | _MIN_STACK_SIZE = 1K; 19 | _MIN_HEAP_SIZE = 512; 20 | 21 | /* Stack initial address (end of data memory) */ 22 | __STACK_END = ORIGIN(SRAM) + LENGTH(SRAM); 23 | 24 | /* Sections */ 25 | SECTIONS 26 | { 27 | /* Vector table at start of program memory */ 28 | .isr_vector : 29 | { 30 | . = ALIGN(4); 31 | KEEP(*(.isr_vector)) 32 | . = ALIGN(4); 33 | } >FLASH_BL_CORE 34 | 35 | /* Bootloader code after vector table in program memory */ 36 | .text : 37 | { 38 | . = ALIGN(4); 39 | *(.text) 40 | *(.text*) 41 | *(.glue_7) 42 | *(.glue_7t) 43 | *(.eh_frame) 44 | KEEP(*(.init)) 45 | KEEP(*(.fini)) 46 | . = ALIGN(4); 47 | __BL_TEXT_END = .; /* Global symbol for end of bootloader .text (code) section */ 48 | } >FLASH_BL_CORE 49 | 50 | /* Bootloader constant/read-only data in program memory */ 51 | .rodata : 52 | { 53 | . = ALIGN(4); 54 | *(.rodata) 55 | *(.rodata*) 56 | . = ALIGN(4); 57 | __BL_RODATA_END = .; /* Global symbol for end of bootloader .rodata (data) section */ 58 | } >FLASH_BL_CORE 59 | 60 | /* ARM unwinding sections in program memory */ 61 | .ARM.extab : 62 | { 63 | . = ALIGN(4); 64 | *(.ARM.extab* .gnu.linkonce.armextab.*) 65 | . = ALIGN(4); 66 | } >FLASH_BL_CORE 67 | 68 | .ARM : 69 | { 70 | . = ALIGN(4); 71 | __exidx_start = .; 72 | *(.ARM.exidx*) 73 | __exidx_end = .; 74 | . = ALIGN(4); 75 | } >FLASH_BL_CORE 76 | 77 | /* C/C++ object/section initialisation and deinitialisation code in program memory */ 78 | .preinit_array : 79 | { 80 | . = ALIGN(4); 81 | PROVIDE_HIDDEN (__preinit_array_start = .); 82 | KEEP (*(.preinit_array*)) 83 | PROVIDE_HIDDEN (__preinit_array_end = .); 84 | . = ALIGN(4); 85 | } >FLASH_BL_CORE 86 | 87 | .init_array : 88 | { 89 | . = ALIGN(4); 90 | PROVIDE_HIDDEN (__init_array_start = .); 91 | KEEP (*(SORT(.init_array.*))) 92 | KEEP (*(.init_array*)) 93 | PROVIDE_HIDDEN (__init_array_end = .); 94 | . = ALIGN(4); 95 | } >FLASH_BL_CORE 96 | 97 | .fini_array : 98 | { 99 | . = ALIGN(4); 100 | PROVIDE_HIDDEN (__fini_array_start = .); 101 | KEEP (*(SORT(.fini_array.*))) 102 | KEEP (*(.fini_array*)) 103 | PROVIDE_HIDDEN (__fini_array_end = .); 104 | . = ALIGN(4); 105 | } >FLASH_BL_CORE 106 | 107 | __BL_DATA_ADDR = LOADADDR(.data); /* Global symbol for load address of bootloader .data (data) section */ 108 | 109 | /* Initialised data/variables in data memory loaded from program memory */ 110 | .data : 111 | { 112 | . = ALIGN(4); 113 | __BL_DATA_START = .; /* Global symbol for start of bootloader .data (data) section */ 114 | *(.data) 115 | *(.data*) 116 | 117 | . = ALIGN(4); 118 | __BL_DATA_END = .; /* Global symbol for end of bootloader .data (data) section */ 119 | } >SRAM_BL_STATIC AT> FLASH_BL_CORE 120 | 121 | /* Uninitialised data/variables in data memory */ 122 | .bss : 123 | { 124 | . = ALIGN(4); 125 | __BL_BSS_START = .; /* Global symbol for start of bootloader .bss (uninitialised data) section */ 126 | *(.bss) 127 | *(.bss*) 128 | *(COMMON) 129 | 130 | . = ALIGN(4); 131 | __BL_BSS_END = .; /* Global symbol for end of bootloader .bss (uninitialised data) section */ 132 | } >SRAM_BL_STATIC 133 | 134 | /* Special bootloader persistent variables in bootloader reserved data memory */ 135 | .sram_bl_static : 136 | { 137 | . = ALIGN(4); 138 | *(.sram_bl_static) 139 | *(.sram_bl_static*) 140 | } >SRAM_BL_STATIC 141 | 142 | /* User-mode heap and stack in data memory (checks that sufficient SRAM is available) */ 143 | ._user_heap_stack : 144 | { 145 | . = ALIGN(8); 146 | PROVIDE ( end = . ); 147 | PROVIDE ( _end = . ); 148 | . = . + _MIN_HEAP_SIZE; 149 | . = . + _MIN_STACK_SIZE; 150 | . = ALIGN(8); 151 | } >SRAM 152 | 153 | /* bootloader_common function dispatch table near the end of bootloader program memory (256 bytes from end) */ 154 | .dispatch_table __FLASH_BL_CORE_START + __FLASH_BL_CORE_LEN - 0x100 : 155 | { 156 | KEEP(*(.dispatch_table)) 157 | } >FLASH_BL_CORE 158 | 159 | /* Discard information from compiler libraries */ 160 | /DISCARD/ : 161 | { 162 | libc.a ( * ) 163 | libm.a ( * ) 164 | libgcc.a ( * ) 165 | } 166 | 167 | .ARM.attributes 0 : { *(.ARM.attributes) } 168 | } -------------------------------------------------------------------------------- /bootloader/include/bootloader.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Bootloader functions (header) 6 | Bootloader and update functions 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef BOOTLOADER_H 12 | #define BOOTLOADER_H 13 | 14 | /* DEPENDENCIES */ 15 | #include // Fixed width integer data types 16 | #include "stm32g0xx_hal.h" // STM32G0 hardware abstraction layer 17 | #include "stm32g071xx.h" // STM32G071 device registers 18 | #include "memory_map.h" // Device memory map 19 | #include "bootloader_common.h" // Bootloader content accessible by applications 20 | #include "bootloader_data.h" // Bootloader data format 21 | 22 | /* CONSTANT DEFINITIONS AND MACROS */ 23 | #define FAULT_THRESHOLD 3 // Number of recorded application faults for application to be considered faulty and not used 24 | #define VECTOR_TABLE_SIZE 47 // Size of the vector table (words/entries) (STM32G071: 16 Cortex-M entries + 31 peripheral entries) 25 | 26 | // Watchdog long interval (~30s) 27 | #define WDG_LONG_PRESC IWDG_PRESCALER_256 28 | #define WDG_LONG_RELOAD 3840 29 | // Watchdog medium interval (~5s) 30 | #define WDG_MED_PRESC IWDG_PRESCALER_256 31 | #define WDG_MED_RELOAD 640 32 | // Watchdog short interval (~500ms) 33 | #define WDG_SHORT_PRESC IWDG_PRESCALER_32 34 | #define WDG_SHORT_RELOAD 512 35 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 36 | 37 | 38 | /* GLOBAL VARIABLES */ 39 | 40 | 41 | /* FUNCTIONS */ 42 | 43 | BootloaderData_T getBootloaderData(); // Get bootloader data from flash 44 | BootloaderStatus_T writeBootloaderData(BootloaderData_T data); // Write bootloader data to flash 45 | 46 | __attribute__((naked)) void startApplication(uint32_t stackPointer, uint32_t startupAddress); // Starts an application (sets the main stack pointer to stackPointer and jumps to startupAddress) 47 | 48 | BootloaderStatus_T configureWatchdog(WatchdogMode_T mode); // Configure the watchdog 49 | BootloaderStatus_T resetWatchdog(); // Reset the watchdog 50 | 51 | uint32_t getBootloaderVersion(); // Get the bootloader version number 52 | BootPriority_T getBootPriority(); // Get the current boot priority 53 | BootloaderStatus_T setBootPriority(BootPriority_T priority); // Set the boot priority 54 | VerificationMode_T getVerificationMode(); // Get the current application verification mode 55 | BootloaderStatus_T setVerificationMode(VerificationMode_T mode); // Set the application verification mode 56 | WatchdogMode_T getWatchdogMode(); // Get the current watchdog mode 57 | BootloaderStatus_T setWatchdogMode(WatchdogMode_T mode); // Set the watchdog mode 58 | 59 | BootloaderStatus_T enableProgrammingMode(); // Enable programming mode (to write new application) 60 | BootloaderStatus_T disableProgrammingMode(); // Disable programming mode (after writing application) 61 | 62 | uint8_t app1_getFaultCount(); // Get the fault count of application 1 63 | BootloaderStatus_T app1_resetFaultCount(); // Reset the fault count of application 1 64 | AppInfo_T app1_getInfo(); // Get the app info of application 1 65 | BootloaderStatus_T app1_erase(); // Erase application space 1 66 | BootloaderStatus_T app1_write(uint32_t address, uint64_t *data, uint32_t length); // Write data to application space 1 (in 64-bit/double-word pages) 67 | BootloaderStatus_T app1_writeInfo(AppInfo_T info); // Write app 1 info to bootloader data 68 | 69 | uint8_t app2_getFaultCount(); // Get the fault count of application 2 70 | BootloaderStatus_T app2_resetFaultCount(); // Reset the fault count of application 2 71 | AppInfo_T app2_getInfo(); // Get the app info of application 2 72 | BootloaderStatus_T app2_erase(); // Erase application space 2 73 | BootloaderStatus_T app2_write(uint32_t address, uint64_t *data, uint32_t length); // Write data to application space 2 (in 64-bit/double-word pages) 74 | BootloaderStatus_T app2_writeInfo(AppInfo_T info); // Write app 2 info to bootloader data 75 | 76 | #endif -------------------------------------------------------------------------------- /bootloader/include/bootloader_data.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Bootloader data (header) 6 | Format for bootloader data (struct) 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef BOOTLOADER_DATA_H 12 | #define BOOTLOADER_DATA_H 13 | 14 | /* DEPENDENCIES */ 15 | #include // Fixed width integer data types 16 | #include "app_info.h" // Application information format 17 | #include "bootloader_common.h" // Bootloader content accessible by applications 18 | 19 | /* CONSTANT DEFINITIONS AND MACROS */ 20 | 21 | 22 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 23 | 24 | typedef struct __attribute__((packed)) { // Struct type definition for bootloader data 25 | // Bootloader information 26 | uint32_t blVersion; // Bootloader version number 27 | 28 | // Bootloader configuration 29 | BootPriority_T bootPriority; // Boot priority 30 | VerificationMode_T verificationMode; // Application verification mode 31 | WatchdogMode_T watchdogMode; // Watchdog mode 32 | uint8_t _PADDING1[1]; // Padding (1 bytes) 33 | 34 | // Application data 35 | uint32_t app1_infoChecksum; // Application 1 information section checksum 36 | uint8_t app1_faultCount; // Application 1 fault count (hard faults and watchdog resets, if enabled) 37 | uint8_t _PADDING2[3]; // Padding (3 bytes) 38 | AppInfo_T app1_info; // Application 1 information 39 | 40 | uint32_t app2_infoChecksum; // Application 2 information section checksum 41 | uint8_t app2_faultCount; // Application 2 fault count (hard faults and watchdog resets, if enabled) 42 | uint8_t _PADDING3[3]; // Padding (3 bytes) 43 | AppInfo_T app2_info; // Application 2 information 44 | 45 | } BootloaderData_T; 46 | 47 | 48 | /* GLOBAL VARIABLES */ 49 | 50 | 51 | /* FUNCTIONS */ 52 | 53 | 54 | #endif -------------------------------------------------------------------------------- /bootloader/include/main.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Bootloader main (header) 6 | Bootloader logic code 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef BL_MAIN_H 12 | #define BL_MAIN_H 13 | 14 | /* DEPENDENCIES */ 15 | #include // Fixed width integer data types 16 | #include "stm32g0xx_hal.h" // STM32G0 hardware abstraction layer 17 | #include "bootloader.h" // Bootloader functions 18 | #include "bootloader_data.h" // Bootloader data format 19 | #include "bootloader_common.h" // Bootloader content accessible by applications 20 | 21 | /* CONSTANT DEFINITIONS AND MACROS */ 22 | #define BOOTLOADER_VERSION 0x00000001 23 | 24 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 25 | 26 | 27 | /* GLOBAL VARIABLES */ 28 | 29 | 30 | /* FUNCTIONS */ 31 | void main(); // Main function (bootloader logic) 32 | 33 | #endif -------------------------------------------------------------------------------- /bootloader/src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Bootloader main (implementation) 6 | Bootloader logic code 7 | */ 8 | 9 | /* DEPENDENCIES */ 10 | #include "main.h" 11 | 12 | /* CONSTANT DEFINITIONS AND MACROS */ 13 | 14 | 15 | /* GLOBAL VARIABLES */ 16 | uint8_t appSelection __attribute__((section(".sram_bl_static"))); // App selection in special section 17 | 18 | /* FUNCTIONS */ 19 | 20 | void main() { // Main function (bootloader logic) 21 | __HAL_RCC_SYSCFG_CLK_ENABLE(); // Enable sysconfig module clock 22 | __HAL_RCC_PWR_CLK_ENABLE(); // Enable PWR module clock 23 | 24 | BootloaderData_T bootloaderData = getBootloaderData(); // Get bootloader data from flash 25 | 26 | if ((bootloaderData.blVersion == 0x00000000) || (bootloaderData.blVersion == 0xFFFFFFFF)) { // Check for bootloader data initialisation 27 | // Initialise default values 28 | bootloaderData.blVersion = BOOTLOADER_VERSION; 29 | bootloaderData.bootPriority = BOOTPRIO_AUTOMATIC; 30 | bootloaderData.verificationMode = VERIFICATION_OFF; 31 | bootloaderData.watchdogMode = WATCHDOG_OFF; 32 | bootloaderData.app1_infoChecksum = 0xFFFFFFFF; 33 | bootloaderData.app1_faultCount = 0; 34 | bootloaderData.app1_info.ID = 1; 35 | bootloaderData.app1_info.version = 1; 36 | bootloaderData.app1_info.size = 1; 37 | bootloaderData.app1_info.vectblChecksum = 0xFFFFFFFF; 38 | bootloaderData.app1_info.appChecksum = 0xFFFFFFFF; 39 | bootloaderData.app2_infoChecksum = 0xFFFFFFFF; 40 | bootloaderData.app2_faultCount = 0; 41 | bootloaderData.app2_info.ID = 1; 42 | bootloaderData.app2_info.version = 1; 43 | bootloaderData.app2_info.size = 1; 44 | bootloaderData.app2_info.vectblChecksum = 0xFFFFFFFF; 45 | bootloaderData.app2_info.appChecksum = 0xFFFFFFFF; 46 | writeBootloaderData(bootloaderData); 47 | } 48 | 49 | if (bootloaderData.blVersion != BOOTLOADER_VERSION) { // Check if stored version number matches current version number 50 | bootloaderData.blVersion = BOOTLOADER_VERSION; // Update version number 51 | writeBootloaderData(bootloaderData); // Write back to flash 52 | } 53 | 54 | // Check for watchdog reset 55 | if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST)) { 56 | __HAL_RCC_CLEAR_RESET_FLAGS(); // Clear flags 57 | 58 | // Update appropriate app fault count 59 | if (appSelection == 1) { 60 | bootloaderData.app1_faultCount++; 61 | writeBootloaderData(bootloaderData); 62 | } else if (appSelection == 2) { 63 | bootloaderData.app2_faultCount++; 64 | writeBootloaderData(bootloaderData); 65 | } 66 | } 67 | 68 | appSelection = 0; // Reset app selection 69 | 70 | // Check for application exclusion factors 71 | uint8_t app1Exclusion = 0; 72 | uint8_t app2Exclusion = 0; 73 | 74 | // Check for app not installed 75 | if (bootloaderData.app1_info.ID == 0 || bootloaderData.app1_info.ID == 0xFFFFFFFF || bootloaderData.app1_info.size == 0 || bootloaderData.app1_info.size == 0xFFFFFFFF) { 76 | app1Exclusion = 1; 77 | } 78 | if (bootloaderData.app2_info.ID == 0 || bootloaderData.app2_info.ID == 0xFFFFFFFF || bootloaderData.app2_info.size == 0 || bootloaderData.app2_info.size == 0xFFFFFFFF) { 79 | app2Exclusion = 1; 80 | } 81 | 82 | // Check for fault threshold exceeded 83 | if (bootloaderData.app1_faultCount >= FAULT_THRESHOLD) { 84 | app1Exclusion = 1; 85 | } 86 | if (bootloaderData.app2_faultCount >= FAULT_THRESHOLD) { 87 | app2Exclusion = 1; 88 | } 89 | 90 | // Verify application if appropriate 91 | if (bootloaderData.verificationMode != VERIFICATION_OFF) { 92 | __HAL_RCC_CRC_CLK_ENABLE(); // Enable CRC module clock 93 | // Configure CRC handle 94 | CRC_HandleTypeDef crcHandle; 95 | crcHandle.Instance = CRC; 96 | crcHandle.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; 97 | crcHandle.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE; 98 | crcHandle.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE; 99 | crcHandle.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE; 100 | crcHandle.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; 101 | HAL_CRC_Init(&crcHandle); // Initialise CRC module 102 | 103 | if (bootloaderData.verificationMode == VERIFICATION_APP_INFO || bootloaderData.verificationMode == VERIFICATION_FULL) { 104 | // Verify app info 105 | if (~HAL_CRC_Calculate(&crcHandle, (uint32_t *) &bootloaderData.app1_info, sizeof(bootloaderData.app1_info)) != bootloaderData.app1_infoChecksum) { 106 | app1Exclusion = 1; 107 | } 108 | if (~HAL_CRC_Calculate(&crcHandle, (uint32_t *) &bootloaderData.app2_info, sizeof(bootloaderData.app2_info)) != bootloaderData.app2_infoChecksum) { 109 | app2Exclusion = 1; 110 | } 111 | } 112 | 113 | if (bootloaderData.verificationMode == VERIFICATION_VECTOR_TABLE) { 114 | // Verify app vector table 115 | if (~HAL_CRC_Calculate(&crcHandle, (uint32_t *)&__FLASH_APP1_START, VECTOR_TABLE_SIZE*4) != bootloaderData.app1_info.vectblChecksum) { 116 | app1Exclusion = 1; 117 | } 118 | if (~HAL_CRC_Calculate(&crcHandle, (uint32_t *)&__FLASH_APP2_START, VECTOR_TABLE_SIZE*4) != bootloaderData.app2_info.vectblChecksum) { 119 | app2Exclusion = 1; 120 | } 121 | } 122 | 123 | if (bootloaderData.verificationMode == VERIFICATION_APPLICATION || bootloaderData.verificationMode == VERIFICATION_FULL) { 124 | // Verify application 125 | if (~HAL_CRC_Calculate(&crcHandle, (uint32_t *)&__FLASH_APP1_START, bootloaderData.app1_info.size) != bootloaderData.app1_info.appChecksum) { 126 | app1Exclusion = 1; 127 | } 128 | if (~HAL_CRC_Calculate(&crcHandle, (uint32_t *)&__FLASH_APP2_START, bootloaderData.app2_info.size) != bootloaderData.app2_info.appChecksum) { 129 | app2Exclusion = 1; 130 | } 131 | } 132 | 133 | HAL_CRC_DeInit(&crcHandle); // De-initialise CRC module 134 | __HAL_RCC_CRC_CLK_DISABLE(); // Disable CRC module clock 135 | } 136 | 137 | // Select application 138 | 139 | if (app1Exclusion && app2Exclusion) { 140 | appSelection = 0; // If both applications are excluded then no application is selected 141 | } else if (app1Exclusion) { 142 | appSelection = 2; // If app 1 is excluded choose app 2 143 | } else if (app2Exclusion) { 144 | appSelection = 1; // If app 2 is excluded choose app 1 145 | } else { // If neither app is excluded, choose based on priority 146 | if (bootloaderData.bootPriority == BOOTPRIO_APP1) { 147 | appSelection = 1; // Choose app 1 148 | } else if (bootloaderData.bootPriority == BOOTPRIO_APP2) { 149 | appSelection = 2; // Choose app 2 150 | } else if (bootloaderData.bootPriority == BOOTPRIO_AUTOMATIC) { 151 | // Select based on ID and version 152 | if (bootloaderData.app1_info.ID == bootloaderData.app2_info.ID) { 153 | // If IDs are the same, select the app with the highest version number 154 | if (bootloaderData.app1_info.version >= bootloaderData.app2_info.version) { 155 | appSelection = 1; 156 | } else { 157 | appSelection = 2; 158 | } 159 | } else { 160 | // If IDs are different default to app 1 161 | appSelection = 1; 162 | } 163 | } else { 164 | // If bootloader boot priority is invalid then no application is selected 165 | appSelection = 0; 166 | } 167 | } 168 | 169 | // Enable watchdog if appropriate 170 | configureWatchdog(bootloaderData.watchdogMode); 171 | 172 | // Load selected application 173 | uint32_t appAddr; 174 | if (appSelection == 1) { 175 | appAddr = (uint32_t) &__FLASH_APP1_START; 176 | uint32_t *appSpace = (uint32_t *) appAddr; 177 | uint32_t appStackPointer = appSpace[0]; // Get application stack pointer 178 | uint32_t appStartup = appSpace[1]; // Get application startup code pointer 179 | SCB->VTOR = appAddr; // Set VTOR 180 | startApplication(appStackPointer, appStartup); // Start application 181 | } else if (appSelection == 2) { 182 | appAddr = (uint32_t) &__FLASH_APP2_START; 183 | uint32_t *appSpace = (uint32_t *) appAddr; 184 | uint32_t appStackPointer = appSpace[0]; // Get application stack pointer 185 | uint32_t appStartup = appSpace[1]; // Get application startup code pointer 186 | SCB->VTOR = appAddr; // Set VTOR 187 | startApplication(appStackPointer, appStartup); // Start application 188 | } else { 189 | while (1) {}; // Stall if no app is selected 190 | } 191 | 192 | while (1) {}; // Loop forever (not reached) 193 | } -------------------------------------------------------------------------------- /common/app_info.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Application info (header) 6 | Application information struct 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef APP_INFO_H 12 | #define APP_INFO_H 13 | 14 | /* DEPENDENCIES */ 15 | #include // Fixed width integer data types 16 | 17 | /* CONSTANT DEFINITIONS AND MACROS */ 18 | 19 | 20 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 21 | 22 | typedef struct { // Type definition for application information struct 23 | uint32_t ID; // Developer specified application ID (different versions of the same application should have the same ID) (0x00000000 and 0xFFFFFFFF are prohibited values) 24 | uint32_t version; // Developer specified application version 25 | uint32_t size; // Size of the application (bytes) 26 | uint32_t vectblChecksum; // CRC32 checksum of the application vector table 27 | uint32_t appChecksum; // CRC32 checksum of the entire application 28 | } AppInfo_T; 29 | 30 | /* GLOBAL VARIABLES */ 31 | 32 | 33 | /* FUNCTIONS */ 34 | 35 | 36 | #endif -------------------------------------------------------------------------------- /common/bootloader_common.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Bootloader common (header) 6 | Bootloader content accessible to applications 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef BOOTLOADER_COMMON_H 12 | #define BOOTLOADER_COMMON_H 13 | 14 | /* DEPENDENCIES */ 15 | #include // Fixed width integer data types 16 | #include "app_info.h" // Application information format 17 | #include "memory_map.h" // Device memory map 18 | 19 | /* CONSTANT DEFINITIONS AND MACROS */ 20 | #define _BOOTLOADER_FUNCTIONS (struct BootloaderFunctions *) ((uint32_t) &__FLASH_BL_CORE_START + (uint32_t) &__FLASH_BL_CORE_LEN - 0x100) // Paste "struct BootloaderFunctions *bootloader = _BOOTLOADER_FUNCTIONS;" into main() or wherever needed 21 | 22 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 23 | 24 | typedef enum { // Bootloader function status return type 25 | BL_OK, // OK (completed without error) 26 | BL_ERROR, // Unspecified error 27 | BL_ERROR_NOT_IMPLEMENTED, // Feature not yet implemented 28 | BL_ERROR_HAL, // STM32 HAL returned an error 29 | BL_ERROR_WRITE_VERIFICATION, // Data write verification failed 30 | BL_ERROR_DATA_ALIGNMENT, // Data/address alignment is not correct 31 | BL_ERROR_OUT_OF_RANGE // Value/address out of permitted range 32 | } BootloaderStatus_T; 33 | 34 | typedef enum __attribute__((__packed__)) { // Boot priority enum type 35 | BOOTPRIO_AUTOMATIC, // Choose application automatically based on ID and version 36 | BOOTPRIO_APP1, // Priority application 1 37 | BOOTPRIO_APP2 // Priority application 2 38 | } BootPriority_T; 39 | 40 | typedef enum __attribute__((__packed__)) { // Application verification mode enum type 41 | VERIFICATION_OFF, // No checksum verification 42 | VERIFICATION_APP_INFO, // Verify application info in bootloader data 43 | VERIFICATION_VECTOR_TABLE, // Verify application vector table 44 | VERIFICATION_APPLICATION, // Verify entire application 45 | VERIFICATION_FULL // Verify application info in bootloader data and entire application 46 | } VerificationMode_T; 47 | 48 | typedef enum __attribute__((__packed__)) { // Watchdog mode enum type 49 | WATCHDOG_OFF, // Watchdog off 50 | WATCHDOG_LONG, // Watchdog on with long timer 51 | WATCHDOG_MEDIUM, // Watchdog on with medium timer 52 | WATCHDOG_SHORT // Watchdog on with short timer 53 | } WatchdogMode_T; 54 | 55 | struct BootloaderFunctions { // Externally (application) accessible bootloader functions 56 | uint32_t (*getVersion)(void); // Get the bootloader version number 57 | BootPriority_T (*getBootPriority)(void); // Get the current boot priority 58 | BootloaderStatus_T (*setBootPriority)(BootPriority_T priority); // Set the boot priority 59 | VerificationMode_T (*getVerificationMode)(void); // Get the current verification mode 60 | BootloaderStatus_T (*setVerificationMode)(VerificationMode_T mode); // Set the verification mode 61 | WatchdogMode_T (*getWatchdogMode)(void); // Get the current watchdog mode 62 | BootloaderStatus_T (*setWatchdogMode)(WatchdogMode_T mode); // Set the watchdog mode and configure the watchdog 63 | BootloaderStatus_T (*resetWatchdog)(void); // Reset the watchdog timer 64 | BootloaderStatus_T (*enableProgrammingMode)(void); // Enable programming mode (call before installing an application) 65 | BootloaderStatus_T (*disableProgrammingMode)(void); // Disable programming mode (call after installing an application) 66 | uint8_t (*app1_getFaultCount)(void); // Get the current fault count for application 1 67 | BootloaderStatus_T (*app1_resetFaultCount)(void); // Reset the fault count for application 1 68 | AppInfo_T (*app1_getInfo)(void); // Get the app info for application 1 69 | BootloaderStatus_T (*app1_erase)(void); // Erase application space 1 70 | BootloaderStatus_T (*app1_write)(uint32_t address, uint64_t *data, uint32_t length); // Write data to application space 1 71 | BootloaderStatus_T (*app1_writeInfo)(AppInfo_T info); // Write the app info for application 1 72 | uint8_t (*app2_getFaultCount)(void); // Get the current fault count for application 2 73 | BootloaderStatus_T (*app2_resetFaultCount)(void); // Reset the fault count for application 2 74 | AppInfo_T (*app2_getInfo)(void); // Get the app info for application 2 75 | BootloaderStatus_T (*app2_erase)(void); // Erase application space 2 76 | BootloaderStatus_T (*app2_write)(uint32_t address, uint64_t *data, uint32_t length); // Write data to application space 2 77 | BootloaderStatus_T (*app2_writeInfo)(AppInfo_T info); // Write the app info for application 2 78 | }; 79 | 80 | /* GLOBAL VARIABLES */ 81 | 82 | 83 | /* FUNCTIONS */ 84 | 85 | 86 | #endif -------------------------------------------------------------------------------- /common/memory_map.h: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain 4 | 5 | Memory map (header) 6 | C-accessible memory map from memory_map.ld symbols 7 | */ 8 | 9 | /* INCLUDE GUARD */ 10 | #pragma once 11 | #ifndef MEMORY_MAP_H 12 | #define MEMORY_MAP_H 13 | 14 | /* DEPENDENCIES */ 15 | 16 | 17 | /* CONSTANT DEFINITIONS AND MACROS */ 18 | 19 | 20 | /* TYPE DEFINITIONS AND ENUMERATIONS */ 21 | 22 | 23 | /* GLOBAL VARIABLES */ 24 | extern int __FLASH_BL_CORE_START; 25 | extern int __FLASH_BL_CORE_LEN; 26 | extern int __FLASH_BL_DATA_START; 27 | extern int __FLASH_BL_DATA_LEN; 28 | extern int __FLASH_APP1_START; 29 | extern int __FLASH_APP1_LEN; 30 | extern int __FLASH_APP2_START; 31 | extern int __FLASH_APP2_LEN; 32 | extern int __SRAM_START; 33 | extern int __SRAM_LEN; 34 | extern int __SRAM_BL_STATIC_START; 35 | extern int __SRAM_BL_STATIC_LEN; 36 | 37 | /* FUNCTIONS */ 38 | 39 | 40 | #endif -------------------------------------------------------------------------------- /drivers/CMSIS/Device/ST/STM32G0xx/Include/stm32g0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS STM32G0xx Device Peripheral Access Layer Header File. 6 | * 7 | * The file is the unique include file that the application programmer 8 | * is using in the C source code, usually in main.c. This file contains: 9 | * - Configuration section that allows to select: 10 | * - The STM32G0xx device used in the target application 11 | * - To use or not the peripherals drivers in application code(i.e. 12 | * code will be based on direct access to peripherals registers 13 | * rather than drivers API), this option is controlled by 14 | * "#define USE_HAL_DRIVER" 15 | * 16 | ****************************************************************************** 17 | * @attention 18 | * 19 | *

© Copyright (c) 2018 STMicroelectronics. 20 | * All rights reserved.

21 | * 22 | * This software component is licensed by ST under BSD 3-Clause license, 23 | * the "License"; You may not use this file except in compliance with the 24 | * License. You may obtain a copy of the License at: 25 | * opensource.org/licenses/BSD-3-Clause 26 | * 27 | ****************************************************************************** 28 | */ 29 | 30 | /** @addtogroup CMSIS 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup stm32g0xx 35 | * @{ 36 | */ 37 | 38 | #ifndef STM32G0xx_H 39 | #define STM32G0xx_H 40 | 41 | #ifdef __cplusplus 42 | extern "C" { 43 | #endif /* __cplusplus */ 44 | 45 | /** @addtogroup Library_configuration_section 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @brief STM32 Family 51 | */ 52 | #if !defined (STM32G0) 53 | #define STM32G0 54 | #endif /* STM32G0 */ 55 | 56 | /* Uncomment the line below according to the target STM32G0 device used in your 57 | application 58 | */ 59 | 60 | #if !defined (STM32G071xx) && !defined (STM32G081xx) && !defined (STM32G070xx) && !defined (STM32G030xx) && !defined (STM32G031xx) && !defined (STM32G041xx) 61 | /* #define STM32G070xx */ /*!< STM32G070xx Devices */ 62 | /* #define STM32G071xx */ /*!< STM32G071xx Devices */ 63 | /* #define STM32G081xx */ /*!< STM32G081xx Devices */ 64 | /* #define STM32G030xx */ /*!< STM32G030xx Devices */ 65 | /* #define STM32G031xx */ /*!< STM32G031xx Devices */ 66 | /* #define STM32G041xx */ /*!< STM32G041xx Devices */ 67 | #endif 68 | 69 | /* Tip: To avoid modifying this file each time you need to switch between these 70 | devices, you can define the device in your toolchain compiler preprocessor. 71 | */ 72 | #if !defined (USE_HAL_DRIVER) 73 | /** 74 | * @brief Comment the line below if you will not use the peripherals drivers. 75 | In this case, these drivers will not be included and the application code will 76 | be based on direct access to peripherals registers 77 | */ 78 | /*#define USE_HAL_DRIVER */ 79 | #endif /* USE_HAL_DRIVER */ 80 | 81 | /** 82 | * @brief CMSIS Device version number $VERSION$ 83 | */ 84 | #define __STM32G0_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */ 85 | #define __STM32G0_CMSIS_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */ 86 | #define __STM32G0_CMSIS_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */ 87 | #define __STM32G0_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ 88 | #define __STM32G0_CMSIS_VERSION ((__STM32G0_CMSIS_VERSION_MAIN << 24)\ 89 | |(__STM32G0_CMSIS_VERSION_SUB1 << 16)\ 90 | |(__STM32G0_CMSIS_VERSION_SUB2 << 8 )\ 91 | |(__STM32G0_CMSIS_VERSION_RC)) 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | /** @addtogroup Device_Included 98 | * @{ 99 | */ 100 | 101 | #if defined(STM32G071xx) 102 | #include "stm32g071xx.h" 103 | #elif defined(STM32G081xx) 104 | #include "stm32g081xx.h" 105 | #elif defined(STM32G070xx) 106 | #include "stm32g070xx.h" 107 | #elif defined(STM32G031xx) 108 | #include "stm32g031xx.h" 109 | #elif defined(STM32G041xx) 110 | #include "stm32g041xx.h" 111 | #elif defined(STM32G030xx) 112 | #include "stm32g030xx.h" 113 | #else 114 | #error "Please select first the target STM32G0xx device used in your application (in stm32g0xx.h file)" 115 | #endif 116 | 117 | /** 118 | * @} 119 | */ 120 | 121 | /** @addtogroup Exported_types 122 | * @{ 123 | */ 124 | typedef enum 125 | { 126 | RESET = 0, 127 | SET = !RESET 128 | } FlagStatus, ITStatus; 129 | 130 | typedef enum 131 | { 132 | DISABLE = 0, 133 | ENABLE = !DISABLE 134 | } FunctionalState; 135 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 136 | 137 | typedef enum 138 | { 139 | SUCCESS = 0, 140 | ERROR = !SUCCESS 141 | } ErrorStatus; 142 | 143 | /** 144 | * @} 145 | */ 146 | 147 | 148 | /** @addtogroup Exported_macros 149 | * @{ 150 | */ 151 | #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 152 | 153 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 154 | 155 | #define READ_BIT(REG, BIT) ((REG) & (BIT)) 156 | 157 | #define CLEAR_REG(REG) ((REG) = (0x0)) 158 | 159 | #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 160 | 161 | #define READ_REG(REG) ((REG)) 162 | 163 | #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 164 | 165 | /*#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))*/ 166 | /** 167 | * @} 168 | */ 169 | 170 | #if defined (USE_HAL_DRIVER) 171 | #include "stm32g0xx_hal.h" 172 | #endif /* USE_HAL_DRIVER */ 173 | 174 | #ifdef __cplusplus 175 | } 176 | #endif /* __cplusplus */ 177 | 178 | #endif /* STM32G0xx_H */ 179 | /** 180 | * @} 181 | */ 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | 188 | 189 | 190 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 191 | -------------------------------------------------------------------------------- /drivers/CMSIS/Device/ST/STM32G0xx/Include/system_stm32g0xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32g0xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M0+ Device System Source File for STM32G0xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /** @addtogroup CMSIS 21 | * @{ 22 | */ 23 | 24 | /** @addtogroup stm32g0xx_system 25 | * @{ 26 | */ 27 | 28 | /** 29 | * @brief Define to prevent recursive inclusion 30 | */ 31 | #ifndef SYSTEM_STM32G0XX_H 32 | #define SYSTEM_STM32G0XX_H 33 | 34 | #ifdef __cplusplus 35 | extern "C" { 36 | #endif 37 | 38 | /** @addtogroup STM32G0xx_System_Includes 39 | * @{ 40 | */ 41 | 42 | /** 43 | * @} 44 | */ 45 | 46 | 47 | /** @addtogroup STM32G0xx_System_Exported_types 48 | * @{ 49 | */ 50 | /* This variable is updated in three ways: 51 | 1) by calling CMSIS function SystemCoreClockUpdate() 52 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 53 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 54 | Note: If you use this function to configure the system clock; then there 55 | is no need to call the 2 first functions listed above, since SystemCoreClock 56 | variable is updated automatically. 57 | */ 58 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 59 | 60 | extern const uint32_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 61 | extern const uint32_t APBPrescTable[8]; /*!< APB prescalers table values */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32G0xx_System_Exported_Constants 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32G0xx_System_Exported_Macros 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /** @addtogroup STM32G0xx_System_Exported_Functions 84 | * @{ 85 | */ 86 | 87 | extern void SystemInit(void); 88 | extern void SystemCoreClockUpdate(void); 89 | /** 90 | * @} 91 | */ 92 | 93 | #ifdef __cplusplus 94 | } 95 | #endif 96 | 97 | #endif /*SYSTEM_STM32G0XX_H */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 107 | -------------------------------------------------------------------------------- /drivers/CMSIS/Include/cmsis_compiler.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_compiler.h 3 | * @brief CMSIS compiler generic header file 4 | * @version V5.0.4 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #ifndef __CMSIS_COMPILER_H 26 | #define __CMSIS_COMPILER_H 27 | 28 | #include 29 | 30 | /* 31 | * Arm Compiler 4/5 32 | */ 33 | #if defined ( __CC_ARM ) 34 | #include "cmsis_armcc.h" 35 | 36 | 37 | /* 38 | * Arm Compiler 6 (armclang) 39 | */ 40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 41 | #include "cmsis_armclang.h" 42 | 43 | 44 | /* 45 | * GNU Compiler 46 | */ 47 | #elif defined ( __GNUC__ ) 48 | #include "cmsis_gcc.h" 49 | 50 | 51 | /* 52 | * IAR Compiler 53 | */ 54 | #elif defined ( __ICCARM__ ) 55 | #include 56 | 57 | 58 | /* 59 | * TI Arm Compiler 60 | */ 61 | #elif defined ( __TI_ARM__ ) 62 | #include 63 | 64 | #ifndef __ASM 65 | #define __ASM __asm 66 | #endif 67 | #ifndef __INLINE 68 | #define __INLINE inline 69 | #endif 70 | #ifndef __STATIC_INLINE 71 | #define __STATIC_INLINE static inline 72 | #endif 73 | #ifndef __STATIC_FORCEINLINE 74 | #define __STATIC_FORCEINLINE __STATIC_INLINE 75 | #endif 76 | #ifndef __NO_RETURN 77 | #define __NO_RETURN __attribute__((noreturn)) 78 | #endif 79 | #ifndef __USED 80 | #define __USED __attribute__((used)) 81 | #endif 82 | #ifndef __WEAK 83 | #define __WEAK __attribute__((weak)) 84 | #endif 85 | #ifndef __PACKED 86 | #define __PACKED __attribute__((packed)) 87 | #endif 88 | #ifndef __PACKED_STRUCT 89 | #define __PACKED_STRUCT struct __attribute__((packed)) 90 | #endif 91 | #ifndef __PACKED_UNION 92 | #define __PACKED_UNION union __attribute__((packed)) 93 | #endif 94 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 95 | struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 96 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 97 | #endif 98 | #ifndef __UNALIGNED_UINT16_WRITE 99 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 100 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) 101 | #endif 102 | #ifndef __UNALIGNED_UINT16_READ 103 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 104 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 105 | #endif 106 | #ifndef __UNALIGNED_UINT32_WRITE 107 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 108 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 109 | #endif 110 | #ifndef __UNALIGNED_UINT32_READ 111 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 112 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 113 | #endif 114 | #ifndef __ALIGNED 115 | #define __ALIGNED(x) __attribute__((aligned(x))) 116 | #endif 117 | #ifndef __RESTRICT 118 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 119 | #define __RESTRICT 120 | #endif 121 | 122 | 123 | /* 124 | * TASKING Compiler 125 | */ 126 | #elif defined ( __TASKING__ ) 127 | /* 128 | * The CMSIS functions have been implemented as intrinsics in the compiler. 129 | * Please use "carm -?i" to get an up to date list of all intrinsics, 130 | * Including the CMSIS ones. 131 | */ 132 | 133 | #ifndef __ASM 134 | #define __ASM __asm 135 | #endif 136 | #ifndef __INLINE 137 | #define __INLINE inline 138 | #endif 139 | #ifndef __STATIC_INLINE 140 | #define __STATIC_INLINE static inline 141 | #endif 142 | #ifndef __STATIC_FORCEINLINE 143 | #define __STATIC_FORCEINLINE __STATIC_INLINE 144 | #endif 145 | #ifndef __NO_RETURN 146 | #define __NO_RETURN __attribute__((noreturn)) 147 | #endif 148 | #ifndef __USED 149 | #define __USED __attribute__((used)) 150 | #endif 151 | #ifndef __WEAK 152 | #define __WEAK __attribute__((weak)) 153 | #endif 154 | #ifndef __PACKED 155 | #define __PACKED __packed__ 156 | #endif 157 | #ifndef __PACKED_STRUCT 158 | #define __PACKED_STRUCT struct __packed__ 159 | #endif 160 | #ifndef __PACKED_UNION 161 | #define __PACKED_UNION union __packed__ 162 | #endif 163 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 164 | struct __packed__ T_UINT32 { uint32_t v; }; 165 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 166 | #endif 167 | #ifndef __UNALIGNED_UINT16_WRITE 168 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 169 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 170 | #endif 171 | #ifndef __UNALIGNED_UINT16_READ 172 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 173 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 174 | #endif 175 | #ifndef __UNALIGNED_UINT32_WRITE 176 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 177 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 178 | #endif 179 | #ifndef __UNALIGNED_UINT32_READ 180 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 181 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 182 | #endif 183 | #ifndef __ALIGNED 184 | #define __ALIGNED(x) __align(x) 185 | #endif 186 | #ifndef __RESTRICT 187 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 188 | #define __RESTRICT 189 | #endif 190 | 191 | 192 | /* 193 | * COSMIC Compiler 194 | */ 195 | #elif defined ( __CSMC__ ) 196 | #include 197 | 198 | #ifndef __ASM 199 | #define __ASM _asm 200 | #endif 201 | #ifndef __INLINE 202 | #define __INLINE inline 203 | #endif 204 | #ifndef __STATIC_INLINE 205 | #define __STATIC_INLINE static inline 206 | #endif 207 | #ifndef __STATIC_FORCEINLINE 208 | #define __STATIC_FORCEINLINE __STATIC_INLINE 209 | #endif 210 | #ifndef __NO_RETURN 211 | // NO RETURN is automatically detected hence no warning here 212 | #define __NO_RETURN 213 | #endif 214 | #ifndef __USED 215 | #warning No compiler specific solution for __USED. __USED is ignored. 216 | #define __USED 217 | #endif 218 | #ifndef __WEAK 219 | #define __WEAK __weak 220 | #endif 221 | #ifndef __PACKED 222 | #define __PACKED @packed 223 | #endif 224 | #ifndef __PACKED_STRUCT 225 | #define __PACKED_STRUCT @packed struct 226 | #endif 227 | #ifndef __PACKED_UNION 228 | #define __PACKED_UNION @packed union 229 | #endif 230 | #ifndef __UNALIGNED_UINT32 /* deprecated */ 231 | @packed struct T_UINT32 { uint32_t v; }; 232 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 233 | #endif 234 | #ifndef __UNALIGNED_UINT16_WRITE 235 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 236 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) 237 | #endif 238 | #ifndef __UNALIGNED_UINT16_READ 239 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 240 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) 241 | #endif 242 | #ifndef __UNALIGNED_UINT32_WRITE 243 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 244 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) 245 | #endif 246 | #ifndef __UNALIGNED_UINT32_READ 247 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 248 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) 249 | #endif 250 | #ifndef __ALIGNED 251 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. 252 | #define __ALIGNED(x) 253 | #endif 254 | #ifndef __RESTRICT 255 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. 256 | #define __RESTRICT 257 | #endif 258 | 259 | 260 | #else 261 | #error Unknown compiler. 262 | #endif 263 | 264 | 265 | #endif /* __CMSIS_COMPILER_H */ 266 | 267 | -------------------------------------------------------------------------------- /drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.2 5 | * @date 19. April 2017 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @brief STM32 assert template file. 6 | * This file should be copied to the application folder and renamed 7 | * to stm32_assert.h. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© Copyright (c) 2018 STMicroelectronics. 12 | * All rights reserved.

13 | * 14 | * This software component is licensed by ST under BSD 3-Clause license, 15 | * the "License"; You may not use this file except in compliance with the 16 | * License. You may obtain a copy of the License at: 17 | * opensource.org/licenses/BSD-3-Clause 18 | * 19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef STM32_ASSERT_H 24 | #define STM32_ASSERT_H 25 | 26 | #ifdef __cplusplus 27 | extern "C" { 28 | #endif 29 | 30 | /* Exported types ------------------------------------------------------------*/ 31 | /* Exported constants --------------------------------------------------------*/ 32 | /* Includes ------------------------------------------------------------------*/ 33 | /* Exported macro ------------------------------------------------------------*/ 34 | #ifdef USE_FULL_ASSERT 35 | /** 36 | * @brief The assert_param macro is used for functions parameters check. 37 | * @param expr: If expr is false, it calls assert_failed function 38 | * which reports the name of the source file and the source 39 | * line number of the call that failed. 40 | * If expr is true, it returns no value. 41 | * @retval None 42 | */ 43 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 44 | /* Exported functions ------------------------------------------------------- */ 45 | void assert_failed(uint8_t *file, uint32_t line); 46 | #else 47 | #define assert_param(expr) ((void)0U) 48 | #endif /* USE_FULL_ASSERT */ 49 | 50 | #ifdef __cplusplus 51 | } 52 | #endif 53 | 54 | #endif /* STM32_ASSERT_H */ 55 | 56 | 57 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 58 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_adc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_adc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of ADC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_ADC_EX_H 22 | #define STM32G0xx_HAL_ADC_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup ADCEx 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /** @defgroup ADCEx_Exported_Types ADC Extended Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @} 46 | */ 47 | 48 | /* Exported constants --------------------------------------------------------*/ 49 | 50 | /** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup ADC_HAL_EC_GROUPS ADC instance - Groups 55 | * @{ 56 | */ 57 | #define ADC_REGULAR_GROUP (LL_ADC_GROUP_REGULAR) /*!< ADC group regular (available on all STM32 devices) */ 58 | /** 59 | * @} 60 | */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /* Exported macros -----------------------------------------------------------*/ 67 | 68 | /* Private macros ------------------------------------------------------------*/ 69 | 70 | /** @defgroup ADCEx_Private_Macro_internal_HAL_driver ADC Extended Private Macros 71 | * @{ 72 | */ 73 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ 74 | /* code of final user. */ 75 | 76 | /** 77 | * @brief Check whether or not ADC is independent. 78 | * @param __HANDLE__ ADC handle. 79 | * @note When multimode feature is not available, the macro always returns SET. 80 | * @retval SET (ADC is independent) or RESET (ADC is not). 81 | */ 82 | #define ADC_IS_INDEPENDENT(__HANDLE__) (SET) 83 | 84 | 85 | /** 86 | * @brief Calibration factor size verification (7 bits maximum). 87 | * @param __CALIBRATION_FACTOR__ Calibration factor value. 88 | * @retval SET (__CALIBRATION_FACTOR__ is within the authorized size) or RESET (__CALIBRATION_FACTOR__ is too large) 89 | */ 90 | #define IS_ADC_CALFACT(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) <= (0x7FU)) 91 | 92 | /** 93 | * @brief Verify the ADC oversampling ratio. 94 | * @param __RATIO__ programmed ADC oversampling ratio. 95 | * @retval SET (__RATIO__ is a valid value) or RESET (__RATIO__ is invalid) 96 | */ 97 | #define IS_ADC_OVERSAMPLING_RATIO(__RATIO__) (((__RATIO__) == ADC_OVERSAMPLING_RATIO_2 ) || \ 98 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_4 ) || \ 99 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_8 ) || \ 100 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_16 ) || \ 101 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_32 ) || \ 102 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_64 ) || \ 103 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_128 ) || \ 104 | ((__RATIO__) == ADC_OVERSAMPLING_RATIO_256 )) 105 | 106 | /** 107 | * @brief Verify the ADC oversampling shift. 108 | * @param __SHIFT__ programmed ADC oversampling shift. 109 | * @retval SET (__SHIFT__ is a valid value) or RESET (__SHIFT__ is invalid) 110 | */ 111 | #define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__) (((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) || \ 112 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) || \ 113 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) || \ 114 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) || \ 115 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) || \ 116 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) || \ 117 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) || \ 118 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) || \ 119 | ((__SHIFT__) == ADC_RIGHTBITSHIFT_8 )) 120 | 121 | /** 122 | * @brief Verify the ADC oversampling triggered mode. 123 | * @param __MODE__ programmed ADC oversampling triggered mode. 124 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 125 | */ 126 | #define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \ 127 | ((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) ) 128 | 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | 135 | /* Exported functions --------------------------------------------------------*/ 136 | /** @addtogroup ADCEx_Exported_Functions 137 | * @{ 138 | */ 139 | 140 | /** @addtogroup ADCEx_Exported_Functions_Group1 141 | * @{ 142 | */ 143 | /* IO operation functions *****************************************************/ 144 | 145 | /* ADC calibration */ 146 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc); 147 | uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc); 148 | HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t CalibrationFactor); 149 | 150 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ 151 | void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc); 152 | void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc); 153 | void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc); 154 | void HAL_ADCEx_ChannelConfigReadyCallback(ADC_HandleTypeDef* hadc); 155 | 156 | /** 157 | * @} 158 | */ 159 | 160 | /** @addtogroup ADCEx_Exported_Functions_Group2 161 | * @{ 162 | */ 163 | /* Peripheral Control functions ***********************************************/ 164 | HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc); 165 | 166 | /** 167 | * @} 168 | */ 169 | 170 | /** 171 | * @} 172 | */ 173 | 174 | /** 175 | * @} 176 | */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | #ifdef __cplusplus 183 | } 184 | #endif 185 | 186 | #endif /* STM32G0xx_HAL_ADC_EX_H */ 187 | 188 | 189 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 190 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_crc_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_crc_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_CRC_EX_H 22 | #define STM32G0xx_HAL_CRC_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup CRCEx 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants 42 | * @{ 43 | */ 44 | 45 | /** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes 46 | * @{ 47 | */ 48 | #define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */ 49 | #define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */ 50 | #define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */ 51 | #define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */ 52 | /** 53 | * @} 54 | */ 55 | 56 | /** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes 57 | * @{ 58 | */ 59 | #define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */ 60 | #define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */ 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | /* Exported macro ------------------------------------------------------------*/ 70 | /** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros 71 | * @{ 72 | */ 73 | 74 | /** 75 | * @brief Set CRC output reversal 76 | * @param __HANDLE__ CRC handle 77 | * @retval None 78 | */ 79 | #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) 80 | 81 | /** 82 | * @brief Unset CRC output reversal 83 | * @param __HANDLE__ CRC handle 84 | * @retval None 85 | */ 86 | #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) 87 | 88 | /** 89 | * @brief Set CRC non-default polynomial 90 | * @param __HANDLE__ CRC handle 91 | * @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial 92 | * @retval None 93 | */ 94 | #define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /* Private macros --------------------------------------------------------*/ 101 | /** @defgroup CRCEx_Private_Macros CRC Extended Private Macros 102 | * @{ 103 | */ 104 | 105 | #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ 106 | ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ 107 | ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ 108 | ((MODE) == CRC_INPUTDATA_INVERSION_WORD)) 109 | 110 | #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ 111 | ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE)) 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /* Exported functions --------------------------------------------------------*/ 118 | 119 | /** @addtogroup CRCEx_Exported_Functions 120 | * @{ 121 | */ 122 | 123 | /** @addtogroup CRCEx_Exported_Functions_Group1 124 | * @{ 125 | */ 126 | /* Initialization and de-initialization functions ****************************/ 127 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); 128 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); 129 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | /** 136 | * @} 137 | */ 138 | 139 | /** 140 | * @} 141 | */ 142 | 143 | /** 144 | * @} 145 | */ 146 | 147 | #ifdef __cplusplus 148 | } 149 | #endif 150 | 151 | #endif /* STM32G0xx_HAL_CRC_EX_H */ 152 | 153 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 154 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_cryp_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_cryp_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRYPEx HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_CRYP_EX_H 22 | #define STM32G0xx_HAL_CRYP_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined(AES) 36 | 37 | /** @defgroup CRYPEx CRYPEx 38 | * @brief CRYP Extension HAL module driver. 39 | * @{ 40 | */ 41 | 42 | /* Exported types ------------------------------------------------------------*/ 43 | /* Exported constants --------------------------------------------------------*/ 44 | /* Private types -------------------------------------------------------------*/ 45 | /** @defgroup CRYPEx_Private_Types CRYPEx Private Types 46 | * @{ 47 | */ 48 | 49 | /** 50 | * @} 51 | */ 52 | 53 | /* Private variables ---------------------------------------------------------*/ 54 | /** @defgroup CRYPEx_Private_Variables CRYPEx Private Variables 55 | * @{ 56 | */ 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /* Private constants ---------------------------------------------------------*/ 63 | /** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants 64 | * @{ 65 | */ 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /* Private macros ------------------------------------------------------------*/ 72 | /** @defgroup CRYPEx_Private_Macros CRYPEx Private Macros 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /* Private functions ---------------------------------------------------------*/ 81 | /** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions 82 | * @{ 83 | */ 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | /* Exported functions --------------------------------------------------------*/ 90 | /** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions 91 | * @{ 92 | */ 93 | 94 | /** @addtogroup CRYPEx_Exported_Functions_Group1 95 | * @{ 96 | */ 97 | HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout); 98 | HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout); 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @addtogroup CRYPEx_Exported_Functions_Group2 105 | * @{ 106 | */ 107 | void HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); 108 | void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); 109 | 110 | /** 111 | * @} 112 | */ 113 | 114 | /** 115 | * @} 116 | */ 117 | 118 | /** 119 | * @} 120 | */ 121 | #endif /* AES */ 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | #ifdef __cplusplus 128 | } 129 | #endif 130 | 131 | #endif /* STM32G0xx_HAL_CRYP_EX_H */ 132 | 133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 134 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_def.h 4 | * @author MCD Application Team 5 | * @brief This file contains HAL common defines, enumeration, macros and 6 | * structures definitions. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | *

© Copyright (c) 2018 STMicroelectronics. 11 | * All rights reserved.

12 | * 13 | * This software component is licensed by ST under BSD 3-Clause license, 14 | * the "License"; You may not use this file except in compliance with the 15 | * License. You may obtain a copy of the License at: 16 | * opensource.org/licenses/BSD-3-Clause 17 | * 18 | ****************************************************************************** 19 | */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef STM32G0xx_HAL_DEF 23 | #define STM32G0xx_HAL_DEF 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32g0xx.h" 31 | #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ 32 | #include 33 | 34 | /* Exported types ------------------------------------------------------------*/ 35 | 36 | /** 37 | * @brief HAL Status structures definition 38 | */ 39 | typedef enum 40 | { 41 | HAL_OK = 0x00U, 42 | HAL_ERROR = 0x01U, 43 | HAL_BUSY = 0x02U, 44 | HAL_TIMEOUT = 0x03U 45 | } HAL_StatusTypeDef; 46 | 47 | /** 48 | * @brief HAL Lock structures definition 49 | */ 50 | typedef enum 51 | { 52 | HAL_UNLOCKED = 0x00U, 53 | HAL_LOCKED = 0x01U 54 | } HAL_LockTypeDef; 55 | 56 | /* Exported macros -----------------------------------------------------------*/ 57 | 58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */ 59 | 60 | #define HAL_MAX_DELAY 0xFFFFFFFFU 61 | 62 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) 63 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U) 64 | 65 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 66 | do{ \ 67 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 68 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 69 | } while(0U) 70 | 71 | /** @brief Reset the Handles State field. 72 | * @param __HANDLE__ specifies the Peripheral Handle. 73 | * @note This macro can be used for the following purpose: 74 | * - When the Handle is declared as local variable; before passing it as parameter 75 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 76 | * to set to 0 the Handles "State" field. 77 | * Otherwise, "State" field may have any random value and the first time the function 78 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 79 | * (i.e. HAL_PPP_MspInit() will not be executed). 80 | * - When there is a need to reconfigure the low level hardware: instead of calling 81 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 82 | * In this later function, when the Handles "State" field is set to 0, it will execute the function 83 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 84 | * @retval None 85 | */ 86 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 87 | 88 | #if (USE_RTOS == 1U) 89 | /* Reserved for future use */ 90 | #error " USE_RTOS should be 0 in the current HAL release " 91 | #else 92 | #define __HAL_LOCK(__HANDLE__) \ 93 | do{ \ 94 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 95 | { \ 96 | return HAL_BUSY; \ 97 | } \ 98 | else \ 99 | { \ 100 | (__HANDLE__)->Lock = HAL_LOCKED; \ 101 | } \ 102 | }while (0U) 103 | 104 | #define __HAL_UNLOCK(__HANDLE__) \ 105 | do{ \ 106 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 107 | }while (0U) 108 | #endif /* USE_RTOS */ 109 | 110 | #if defined ( __GNUC__ ) 111 | #ifndef __weak 112 | #define __weak __attribute__((weak)) 113 | #endif /* __weak */ 114 | #ifndef __packed 115 | #define __packed __attribute__((__packed__)) 116 | #endif /* __packed */ 117 | #endif /* __GNUC__ */ 118 | 119 | 120 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 121 | /* GNU Compiler */ 122 | #if defined (__GNUC__) 123 | #ifndef __ALIGN_END 124 | #define __ALIGN_END __attribute__ ((aligned (4U))) 125 | #endif /* __ALIGN_END */ 126 | #ifndef __ALIGN_BEGIN 127 | #define __ALIGN_BEGIN 128 | #endif /* __ALIGN_BEGIN */ 129 | #else 130 | #ifndef __ALIGN_END 131 | #define __ALIGN_END 132 | #endif /* __ALIGN_END */ 133 | #ifndef __ALIGN_BEGIN 134 | /* ARM Compiler */ 135 | #if defined (__CC_ARM) 136 | #define __ALIGN_BEGIN __align(4U) 137 | /* IAR Compiler */ 138 | #elif defined (__ICCARM__) 139 | #define __ALIGN_BEGIN 140 | #endif /* __CC_ARM */ 141 | #endif /* __ALIGN_BEGIN */ 142 | #endif /* __GNUC__ */ 143 | 144 | /** 145 | * @brief __RAM_FUNC definition 146 | */ 147 | #if defined ( __CC_ARM ) 148 | /* ARM Compiler 149 | ------------ 150 | RAM functions are defined using the toolchain options. 151 | Functions that are executed in RAM should reside in a separate source module. 152 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 153 | area of a module to a memory space in physical RAM. 154 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 155 | dialog. 156 | */ 157 | #define __RAM_FUNC 158 | 159 | #elif defined ( __ICCARM__ ) 160 | /* ICCARM Compiler 161 | --------------- 162 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 163 | */ 164 | #define __RAM_FUNC __ramfunc 165 | 166 | #elif defined ( __GNUC__ ) 167 | /* GNU Compiler 168 | ------------ 169 | RAM functions are defined using a specific toolchain attribute 170 | "__attribute__((section(".RamFunc")))". 171 | */ 172 | #define __RAM_FUNC __attribute__((section(".RamFunc"))) 173 | 174 | #endif 175 | 176 | /** 177 | * @brief __NOINLINE definition 178 | */ 179 | #if defined ( __CC_ARM ) || defined ( __GNUC__ ) 180 | /* ARM & GNUCompiler 181 | ---------------- 182 | */ 183 | #define __NOINLINE __attribute__ ( (noinline) ) 184 | 185 | #elif defined ( __ICCARM__ ) 186 | /* ICCARM Compiler 187 | --------------- 188 | */ 189 | #define __NOINLINE _Pragma("optimize = no_inline") 190 | 191 | #endif 192 | 193 | 194 | #ifdef __cplusplus 195 | } 196 | #endif 197 | 198 | #endif /* STM32G0xx_HAL_DEF */ 199 | 200 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 201 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_FLASH_EX_H 22 | #define STM32G0xx_HAL_FLASH_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup FLASHEx 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants 42 | * @{ 43 | */ 44 | /** @defgroup FLASHEx_Empty_Check FLASHEx Empty Check 45 | * @{ 46 | */ 47 | #define FLASH_PROG_NOT_EMPTY 0x00000000u /*!< 1st location in Flash is programmed */ 48 | #define FLASH_PROG_EMPTY FLASH_ACR_PROGEMPTY /*!< 1st location in Flash is empty */ 49 | /** 50 | * @} 51 | */ 52 | /** 53 | * @} 54 | */ 55 | 56 | /* Exported macro ------------------------------------------------------------*/ 57 | /* Exported functions --------------------------------------------------------*/ 58 | /** @addtogroup FLASHEx_Exported_Functions 59 | * @{ 60 | */ 61 | 62 | /* Extended Program operation functions *************************************/ 63 | /** @addtogroup FLASHEx_Exported_Functions_Group1 64 | * @{ 65 | */ 66 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 67 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 68 | void HAL_FLASHEx_EnableDebugger(void); 69 | void HAL_FLASHEx_DisableDebugger(void); 70 | uint32_t HAL_FLASHEx_FlashEmptyCheck(void); 71 | void HAL_FLASHEx_ForceFlashEmpty(uint32_t FlashEmpty); 72 | #if defined(FLASH_SECURABLE_MEMORY_SUPPORT) 73 | void HAL_FLASHEx_EnableSecMemProtection(uint32_t Bank); 74 | #endif 75 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 76 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 77 | /** 78 | * @} 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /* Private macros ------------------------------------------------------------*/ 86 | /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants 87 | * @{ 88 | */ 89 | #define FLASH_PCROP_GRANULARITY_OFFSET 9u /*!< FLASH Code Readout Protection granularity offset */ 90 | #define FLASH_PCROP_GRANULARITY (1UL << FLASH_PCROP_GRANULARITY_OFFSET) /*!< FLASH Code Readout Protection granularity, 512 Bytes */ 91 | /** 92 | * @} 93 | */ 94 | 95 | 96 | /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros 97 | * @{ 98 | */ 99 | #define IS_FLASH_EMPTY_CHECK(__VALUE__) (((__VALUE__) == FLASH_PROG_EMPTY) || ((__VALUE__) == FLASH_PROG_NOT_EMPTY)) 100 | void FLASH_PageErase(uint32_t Page); 101 | /** 102 | * @} 103 | */ 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | #ifdef __cplusplus 114 | } 115 | #endif 116 | 117 | #endif /* STM32G0xx_HAL_FLASH_EX_H */ 118 | 119 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 120 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_i2c_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_i2c_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of I2C HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_I2C_EX_H 22 | #define STM32G0xx_HAL_I2C_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup I2CEx 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | 42 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants 43 | * @{ 44 | */ 45 | 46 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter 47 | * @{ 48 | */ 49 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U 50 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus 56 | * @{ 57 | */ 58 | #define I2C_FASTMODEPLUS_PA9 SYSCFG_CFGR1_I2C_PA9_FMP /*!< Enable Fast Mode Plus on PA9 */ 59 | #define I2C_FASTMODEPLUS_PA10 SYSCFG_CFGR1_I2C_PA10_FMP /*!< Enable Fast Mode Plus on PA10 */ 60 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 61 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 62 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 63 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 64 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 65 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 66 | /** 67 | * @} 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /* Exported macro ------------------------------------------------------------*/ 75 | /* Exported functions --------------------------------------------------------*/ 76 | 77 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions 78 | * @{ 79 | */ 80 | 81 | /** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions 82 | * @brief Extended features functions 83 | * @{ 84 | */ 85 | 86 | /* Peripheral Control functions ************************************************/ 87 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); 88 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); 89 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); 90 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); 91 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 92 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 93 | 94 | /* Private constants ---------------------------------------------------------*/ 95 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants 96 | * @{ 97 | */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /* Private macros ------------------------------------------------------------*/ 104 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros 105 | * @{ 106 | */ 107 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ 108 | ((FILTER) == I2C_ANALOGFILTER_DISABLE)) 109 | 110 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 111 | 112 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & (I2C_FASTMODEPLUS_PA9)) == I2C_FASTMODEPLUS_PA9) || \ 113 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PA10)) == I2C_FASTMODEPLUS_PA10) || \ 114 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 115 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 116 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 117 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 118 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 119 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2)) 120 | 121 | 122 | 123 | /** 124 | * @} 125 | */ 126 | 127 | /* Private Functions ---------------------------------------------------------*/ 128 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions 129 | * @{ 130 | */ 131 | /* Private functions are defined in stm32g0xx_hal_i2c_ex.c file */ 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /** 141 | * @} 142 | */ 143 | 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | #ifdef __cplusplus 153 | } 154 | #endif 155 | 156 | #endif /* STM32G0xx_HAL_I2C_EX_H */ 157 | 158 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 159 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @brief Header file of IWDG HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_IWDG_H 22 | #define STM32G0xx_HAL_IWDG_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup IWDG IWDG 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief IWDG Init structure definition 46 | */ 47 | typedef struct 48 | { 49 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 50 | This parameter can be a value of @ref IWDG_Prescaler */ 51 | 52 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 53 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 54 | 55 | uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. 56 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 57 | 58 | } IWDG_InitTypeDef; 59 | 60 | /** 61 | * @brief IWDG Handle Structure definition 62 | */ 63 | typedef struct 64 | { 65 | IWDG_TypeDef *Instance; /*!< Register base address */ 66 | 67 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 68 | } IWDG_HandleTypeDef; 69 | 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /* Exported constants --------------------------------------------------------*/ 76 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 77 | * @{ 78 | */ 79 | 80 | /** @defgroup IWDG_Prescaler IWDG Prescaler 81 | * @{ 82 | */ 83 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ 84 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 85 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 86 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 87 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 88 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 89 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup IWDG_Window_option IWDG Window option 96 | * @{ 97 | */ 98 | #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN 99 | /** 100 | * @} 101 | */ 102 | 103 | 104 | /** 105 | * @} 106 | */ 107 | 108 | /* Exported macros -----------------------------------------------------------*/ 109 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 110 | * @{ 111 | */ 112 | 113 | /** 114 | * @brief Enable the IWDG peripheral. 115 | * @param __HANDLE__ IWDG handle 116 | * @retval None 117 | */ 118 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 119 | 120 | /** 121 | * @brief Reload IWDG counter with value defined in the reload register 122 | * (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled). 123 | * @param __HANDLE__ IWDG handle 124 | * @retval None 125 | */ 126 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 127 | 128 | /** 129 | * @} 130 | */ 131 | 132 | /* Exported functions --------------------------------------------------------*/ 133 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 134 | * @{ 135 | */ 136 | 137 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 138 | * @{ 139 | */ 140 | /* Initialization/Start functions ********************************************/ 141 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 142 | /** 143 | * @} 144 | */ 145 | 146 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 147 | * @{ 148 | */ 149 | /* I/O operation functions ****************************************************/ 150 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 151 | /** 152 | * @} 153 | */ 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /* Private constants ---------------------------------------------------------*/ 160 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 161 | * @{ 162 | */ 163 | 164 | /** 165 | * @brief IWDG Key Register BitMask 166 | */ 167 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ 168 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ 169 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ 170 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | /* Private macros ------------------------------------------------------------*/ 177 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 178 | * @{ 179 | */ 180 | 181 | /** 182 | * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 183 | * @param __HANDLE__ IWDG handle 184 | * @retval None 185 | */ 186 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 187 | 188 | /** 189 | * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. 190 | * @param __HANDLE__ IWDG handle 191 | * @retval None 192 | */ 193 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 194 | 195 | /** 196 | * @brief Check IWDG prescaler value. 197 | * @param __PRESCALER__ IWDG prescaler value 198 | * @retval None 199 | */ 200 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 201 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 202 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 203 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 204 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 205 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 206 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 207 | 208 | /** 209 | * @brief Check IWDG reload value. 210 | * @param __RELOAD__ IWDG reload value 211 | * @retval None 212 | */ 213 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 214 | 215 | /** 216 | * @brief Check IWDG window value. 217 | * @param __WINDOW__ IWDG window value 218 | * @retval None 219 | */ 220 | #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) 221 | 222 | 223 | /** 224 | * @} 225 | */ 226 | 227 | /** 228 | * @} 229 | */ 230 | 231 | /** 232 | * @} 233 | */ 234 | 235 | 236 | #ifdef __cplusplus 237 | } 238 | #endif 239 | 240 | #endif /* STM32G0xx_HAL_IWDG_H */ 241 | 242 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 243 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_pwr_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_pwr_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of PWR HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_PWR_EX_H 22 | #define STM32G0xx_HAL_PWR_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @defgroup PWREx PWREx 36 | * @brief PWR Extended HAL module driver 37 | * @{ 38 | */ 39 | 40 | /* Exported types ------------------------------------------------------------*/ 41 | /* Exported constants --------------------------------------------------------*/ 42 | /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants 43 | * @{ 44 | */ 45 | 46 | /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR battery charging resistor selection 47 | * @{ 48 | */ 49 | #define PWR_BATTERY_CHARGING_RESISTOR_5 (0x00000000u) /*!< VBAT charging through a 5 kOhms resistor */ 50 | #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR4_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */ 51 | /** 52 | * @} 53 | */ 54 | 55 | /** @defgroup PWREx_GPIO_Bit_Number GPIO bit position 56 | * @brief for I/O pull up/down setting in standby/shutdown mode 57 | * @{ 58 | */ 59 | #define PWR_GPIO_BIT_0 PWR_PUCRB_PU0 /*!< GPIO port I/O pin 0 */ 60 | #define PWR_GPIO_BIT_1 PWR_PUCRB_PU1 /*!< GPIO port I/O pin 1 */ 61 | #define PWR_GPIO_BIT_2 PWR_PUCRB_PU2 /*!< GPIO port I/O pin 2 */ 62 | #define PWR_GPIO_BIT_3 PWR_PUCRB_PU3 /*!< GPIO port I/O pin 3 */ 63 | #define PWR_GPIO_BIT_4 PWR_PUCRB_PU4 /*!< GPIO port I/O pin 4 */ 64 | #define PWR_GPIO_BIT_5 PWR_PUCRB_PU5 /*!< GPIO port I/O pin 5 */ 65 | #define PWR_GPIO_BIT_6 PWR_PUCRB_PU6 /*!< GPIO port I/O pin 6 */ 66 | #define PWR_GPIO_BIT_7 PWR_PUCRB_PU7 /*!< GPIO port I/O pin 7 */ 67 | #define PWR_GPIO_BIT_8 PWR_PUCRB_PU8 /*!< GPIO port I/O pin 8 */ 68 | #define PWR_GPIO_BIT_9 PWR_PUCRB_PU9 /*!< GPIO port I/O pin 9 */ 69 | #define PWR_GPIO_BIT_10 PWR_PUCRB_PU10 /*!< GPIO port I/O pin 10 */ 70 | #define PWR_GPIO_BIT_11 PWR_PUCRB_PU11 /*!< GPIO port I/O pin 11 */ 71 | #define PWR_GPIO_BIT_12 PWR_PUCRB_PU12 /*!< GPIO port I/O pin 12 */ 72 | #define PWR_GPIO_BIT_13 PWR_PUCRB_PU13 /*!< GPIO port I/O pin 13 */ 73 | #define PWR_GPIO_BIT_14 PWR_PUCRB_PU14 /*!< GPIO port I/O pin 14 */ 74 | #define PWR_GPIO_BIT_15 PWR_PUCRB_PU15 /*!< GPIO port I/O pin 15 */ 75 | /** 76 | * @} 77 | */ 78 | 79 | /** @defgroup PWREx_GPIO_Port GPIO Port 80 | * @{ 81 | */ 82 | #define PWR_GPIO_A (0x00000000u) /*!< GPIO port A */ 83 | #define PWR_GPIO_B (0x00000001u) /*!< GPIO port B */ 84 | #define PWR_GPIO_C (0x00000002u) /*!< GPIO port C */ 85 | #define PWR_GPIO_D (0x00000003u) /*!< GPIO port D */ 86 | #define PWR_GPIO_F (0x00000005u) /*!< GPIO port F */ 87 | /** 88 | * @} 89 | */ 90 | 91 | /** @defgroup PWREx_Flash_PowerDown Flash Power Down modes 92 | * @{ 93 | */ 94 | #define PWR_FLASHPD_LPRUN PWR_CR1_FPD_LPRUN /*!< Enable Flash power down in low power run mode */ 95 | #define PWR_FLASHPD_LPSLEEP PWR_CR1_FPD_LPSLP /*!< Enable Flash power down in low power sleep mode */ 96 | #define PWR_FLASHPD_STOP PWR_CR1_FPD_STOP /*!< Enable Flash power down in stop mode */ 97 | /** 98 | * @} 99 | */ 100 | 101 | /** @defgroup PWREx_Regulator_Voltage_Scale PWR Regulator voltage scale 102 | * @{ 103 | */ 104 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS_0 /*!< Voltage scaling range 1 */ 105 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 /*!< Voltage scaling range 2 */ 106 | /** 107 | * @} 108 | */ 109 | 110 | /** 111 | * @} 112 | */ 113 | 114 | /* Exported macros -----------------------------------------------------------*/ 115 | /* Private macros ------------------------------------------------------------*/ 116 | /** @addtogroup PWREx_Private_Macros PWR Extended Private Macros 117 | * @{ 118 | */ 119 | #define IS_PWR_BATTERY_RESISTOR_SELECT(__RESISTOR__) (((__RESISTOR__) == PWR_BATTERY_CHARGING_RESISTOR_5) || \ 120 | ((__RESISTOR__) == PWR_BATTERY_CHARGING_RESISTOR_1_5)) 121 | 122 | #define IS_PWR_GPIO_BIT_NUMBER(__BIT_NUMBER__) ((((__BIT_NUMBER__) & 0x0000FFFFu) != 0x00u) && \ 123 | (((__BIT_NUMBER__) & 0xFFFF0000u) == 0x00u)) 124 | 125 | #define IS_PWR_GPIO(__GPIO__) (((__GPIO__) == PWR_GPIO_A) || \ 126 | ((__GPIO__) == PWR_GPIO_B) || \ 127 | ((__GPIO__) == PWR_GPIO_C) || \ 128 | ((__GPIO__) == PWR_GPIO_D) || \ 129 | ((__GPIO__) == PWR_GPIO_F)) 130 | 131 | #define IS_PWR_FLASH_POWERDOWN(__MODE__) ((((__MODE__) & (PWR_FLASHPD_LPRUN | PWR_FLASHPD_LPSLEEP | PWR_FLASHPD_STOP)) != 0x00u) && \ 132 | (((__MODE__) & ~(PWR_FLASHPD_LPRUN | PWR_FLASHPD_LPSLEEP | PWR_FLASHPD_STOP)) == 0x00u)) 133 | 134 | #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ 135 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2)) 136 | 137 | /** 138 | * @} 139 | */ 140 | 141 | /* Exported functions --------------------------------------------------------*/ 142 | /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions 143 | * @{ 144 | */ 145 | 146 | /** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions 147 | * @{ 148 | */ 149 | 150 | /* Peripheral Control functions **********************************************/ 151 | void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection); 152 | void HAL_PWREx_DisableBatteryCharging(void); 153 | #if defined(PWR_CR3_ENB_ULP) 154 | void HAL_PWREx_EnablePORMonitorSampling(void); 155 | void HAL_PWREx_DisablePORMonitorSampling(void); 156 | #endif 157 | void HAL_PWREx_EnableInternalWakeUpLine(void); 158 | void HAL_PWREx_DisableInternalWakeUpLine(void); 159 | HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); 160 | HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber); 161 | HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); 162 | HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber); 163 | void HAL_PWREx_EnablePullUpPullDownConfig(void); 164 | void HAL_PWREx_DisablePullUpPullDownConfig(void); 165 | #if defined(PWR_CR3_RRS) 166 | void HAL_PWREx_EnableSRAMRetention(void); 167 | void HAL_PWREx_DisableSRAMRetention(void); 168 | #endif 169 | void HAL_PWREx_EnableFlashPowerDown(uint32_t PowerMode); 170 | void HAL_PWREx_DisableFlashPowerDown(uint32_t PowerMode); 171 | uint32_t HAL_PWREx_GetVoltageRange(void); 172 | HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling); 173 | 174 | /* Low Power modes configuration functions ************************************/ 175 | void HAL_PWREx_EnableLowPowerRunMode(void); 176 | HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void); 177 | #if defined(PWR_SHDW_SUPPORT) 178 | void HAL_PWREx_EnterSHUTDOWNMode(void); 179 | #endif 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | /** 190 | * @} 191 | */ 192 | 193 | /** 194 | * @} 195 | */ 196 | 197 | #ifdef __cplusplus 198 | } 199 | #endif 200 | 201 | 202 | #endif /* STM32G0xx_HAL_PWR_EX_H */ 203 | 204 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 205 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_hal_spi_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of SPI HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef STM32G0xx_HAL_SPI_EX_H 22 | #define STM32G0xx_HAL_SPI_EX_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32g0xx_hal_def.h" 30 | 31 | /** @addtogroup STM32G0xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup SPIEx 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported constants --------------------------------------------------------*/ 41 | /* Exported macros -----------------------------------------------------------*/ 42 | /* Exported functions --------------------------------------------------------*/ 43 | /** @addtogroup SPIEx_Exported_Functions 44 | * @{ 45 | */ 46 | 47 | /* Initialization and de-initialization functions ****************************/ 48 | /* IO operation functions *****************************************************/ 49 | /** @addtogroup SPIEx_Exported_Functions_Group1 50 | * @{ 51 | */ 52 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi); 53 | /** 54 | * @} 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | #ifdef __cplusplus 70 | } 71 | #endif 72 | 73 | #endif /* STM32G0xx_HAL_SPI_EX_H */ 74 | 75 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 76 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_crc_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_crc_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended CRC HAL module driver. 6 | * This file provides firmware functions to manage the extended 7 | * functionalities of the CRC peripheral. 8 | * 9 | @verbatim 10 | ================================================================================ 11 | ##### How to use this driver ##### 12 | ================================================================================ 13 | [..] 14 | (+) Set user-defined generating polynomial thru HAL_CRCEx_Polynomial_Set() 15 | (+) Configure Input or Output data inversion 16 | 17 | @endverbatim 18 | ****************************************************************************** 19 | * @attention 20 | * 21 | *

© Copyright (c) 2018 STMicroelectronics. 22 | * All rights reserved.

23 | * 24 | * This software component is licensed by ST under BSD 3-Clause license, 25 | * the "License"; You may not use this file except in compliance with the 26 | * License. You may obtain a copy of the License at: 27 | * opensource.org/licenses/BSD-3-Clause 28 | * 29 | ****************************************************************************** 30 | */ 31 | 32 | /* Includes ------------------------------------------------------------------*/ 33 | #include "stm32g0xx_hal.h" 34 | 35 | /** @addtogroup STM32G0xx_HAL_Driver 36 | * @{ 37 | */ 38 | 39 | /** @defgroup CRCEx CRCEx 40 | * @brief CRC Extended HAL module driver 41 | * @{ 42 | */ 43 | 44 | #ifdef HAL_CRC_MODULE_ENABLED 45 | 46 | /* Private typedef -----------------------------------------------------------*/ 47 | /* Private define ------------------------------------------------------------*/ 48 | /* Private macro -------------------------------------------------------------*/ 49 | /* Private variables ---------------------------------------------------------*/ 50 | /* Private function prototypes -----------------------------------------------*/ 51 | /* Exported functions --------------------------------------------------------*/ 52 | 53 | /** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions 54 | * @{ 55 | */ 56 | 57 | /** @defgroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions 58 | * @brief Extended Initialization and Configuration functions. 59 | * 60 | @verbatim 61 | =============================================================================== 62 | ##### Extended configuration functions ##### 63 | =============================================================================== 64 | [..] This section provides functions allowing to: 65 | (+) Configure the generating polynomial 66 | (+) Configure the input data inversion 67 | (+) Configure the output data inversion 68 | 69 | @endverbatim 70 | * @{ 71 | */ 72 | 73 | 74 | /** 75 | * @brief Initialize the CRC polynomial if different from default one. 76 | * @param hcrc CRC handle 77 | * @param Pol CRC generating polynomial (7, 8, 16 or 32-bit long). 78 | * This parameter is written in normal representation, e.g. 79 | * @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 80 | * @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021 81 | * @param PolyLength CRC polynomial length. 82 | * This parameter can be one of the following values: 83 | * @arg @ref CRC_POLYLENGTH_7B 7-bit long CRC (generating polynomial of degree 7) 84 | * @arg @ref CRC_POLYLENGTH_8B 8-bit long CRC (generating polynomial of degree 8) 85 | * @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16) 86 | * @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32) 87 | * @retval HAL status 88 | */ 89 | HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength) 90 | { 91 | HAL_StatusTypeDef status = HAL_OK; 92 | uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */ 93 | 94 | /* Check the parameters */ 95 | assert_param(IS_CRC_POL_LENGTH(PolyLength)); 96 | 97 | /* check polynomial definition vs polynomial size: 98 | * polynomial length must be aligned with polynomial 99 | * definition. HAL_ERROR is reported if Pol degree is 100 | * larger than that indicated by PolyLength. 101 | * Look for MSB position: msb will contain the degree of 102 | * the second to the largest polynomial member. E.g., for 103 | * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */ 104 | while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U)) 105 | { 106 | } 107 | 108 | switch (PolyLength) 109 | { 110 | case CRC_POLYLENGTH_7B: 111 | if (msb >= HAL_CRC_LENGTH_7B) 112 | { 113 | status = HAL_ERROR; 114 | } 115 | break; 116 | case CRC_POLYLENGTH_8B: 117 | if (msb >= HAL_CRC_LENGTH_8B) 118 | { 119 | status = HAL_ERROR; 120 | } 121 | break; 122 | case CRC_POLYLENGTH_16B: 123 | if (msb >= HAL_CRC_LENGTH_16B) 124 | { 125 | status = HAL_ERROR; 126 | } 127 | break; 128 | 129 | case CRC_POLYLENGTH_32B: 130 | /* no polynomial definition vs. polynomial length issue possible */ 131 | break; 132 | default: 133 | status = HAL_ERROR; 134 | break; 135 | } 136 | if (status == HAL_OK) 137 | { 138 | /* set generating polynomial */ 139 | WRITE_REG(hcrc->Instance->POL, Pol); 140 | 141 | /* set generating polynomial size */ 142 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); 143 | } 144 | /* Return function status */ 145 | return status; 146 | } 147 | 148 | /** 149 | * @brief Set the Reverse Input data mode. 150 | * @param hcrc CRC handle 151 | * @param InputReverseMode Input Data inversion mode. 152 | * This parameter can be one of the following values: 153 | * @arg @ref CRC_INPUTDATA_INVERSION_NONE no change in bit order (default value) 154 | * @arg @ref CRC_INPUTDATA_INVERSION_BYTE Byte-wise bit reversal 155 | * @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD HalfWord-wise bit reversal 156 | * @arg @ref CRC_INPUTDATA_INVERSION_WORD Word-wise bit reversal 157 | * @retval HAL status 158 | */ 159 | HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode) 160 | { 161 | /* Check the parameters */ 162 | assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode)); 163 | 164 | /* Change CRC peripheral state */ 165 | hcrc->State = HAL_CRC_STATE_BUSY; 166 | 167 | /* set input data inversion mode */ 168 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); 169 | /* Change CRC peripheral state */ 170 | hcrc->State = HAL_CRC_STATE_READY; 171 | 172 | /* Return function status */ 173 | return HAL_OK; 174 | } 175 | 176 | /** 177 | * @brief Set the Reverse Output data mode. 178 | * @param hcrc CRC handle 179 | * @param OutputReverseMode Output Data inversion mode. 180 | * This parameter can be one of the following values: 181 | * @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion (default value) 182 | * @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD) 183 | * @retval HAL status 184 | */ 185 | HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode) 186 | { 187 | /* Check the parameters */ 188 | assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode)); 189 | 190 | /* Change CRC peripheral state */ 191 | hcrc->State = HAL_CRC_STATE_BUSY; 192 | 193 | /* set output data inversion mode */ 194 | MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); 195 | 196 | /* Change CRC peripheral state */ 197 | hcrc->State = HAL_CRC_STATE_READY; 198 | 199 | /* Return function status */ 200 | return HAL_OK; 201 | } 202 | 203 | 204 | 205 | 206 | /** 207 | * @} 208 | */ 209 | 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | 216 | #endif /* HAL_CRC_MODULE_ENABLED */ 217 | /** 218 | * @} 219 | */ 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 226 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_spi_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_hal_spi_ex.c 4 | * @author MCD Application Team 5 | * @brief Extended SPI HAL module driver. 6 | * This file provides firmware functions to manage the following 7 | * SPI peripheral extended functionalities : 8 | * + IO operation functions 9 | * 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | *

© Copyright (c) 2018 STMicroelectronics. 14 | * All rights reserved.

15 | * 16 | * This software component is licensed by ST under BSD 3-Clause license, 17 | * the "License"; You may not use this file except in compliance with the 18 | * License. You may obtain a copy of the License at: 19 | * opensource.org/licenses/BSD-3-Clause 20 | * 21 | ****************************************************************************** 22 | */ 23 | 24 | /* Includes ------------------------------------------------------------------*/ 25 | #include "stm32g0xx_hal.h" 26 | 27 | /** @addtogroup STM32G0xx_HAL_Driver 28 | * @{ 29 | */ 30 | 31 | /** @defgroup SPIEx SPIEx 32 | * @brief SPI Extended HAL module driver 33 | * @{ 34 | */ 35 | #ifdef HAL_SPI_MODULE_ENABLED 36 | 37 | /* Private typedef -----------------------------------------------------------*/ 38 | /* Private defines -----------------------------------------------------------*/ 39 | /** @defgroup SPIEx_Private_Constants SPIEx Private Constants 40 | * @{ 41 | */ 42 | #define SPI_FIFO_SIZE 4UL 43 | /** 44 | * @} 45 | */ 46 | 47 | /* Private macros ------------------------------------------------------------*/ 48 | /* Private variables ---------------------------------------------------------*/ 49 | /* Private function prototypes -----------------------------------------------*/ 50 | /* Exported functions --------------------------------------------------------*/ 51 | 52 | /** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions 53 | * @{ 54 | */ 55 | 56 | /** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions 57 | * @brief Data transfers functions 58 | * 59 | @verbatim 60 | ============================================================================== 61 | ##### IO operation functions ##### 62 | =============================================================================== 63 | [..] 64 | This subsection provides a set of extended functions to manage the SPI 65 | data transfers. 66 | 67 | (#) Rx data flush function: 68 | (++) HAL_SPIEx_FlushRxFifo() 69 | 70 | @endverbatim 71 | * @{ 72 | */ 73 | 74 | /** 75 | * @brief Flush the RX fifo. 76 | * @param hspi pointer to a SPI_HandleTypeDef structure that contains 77 | * the configuration information for the specified SPI module. 78 | * @retval HAL status 79 | */ 80 | HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi) 81 | { 82 | __IO uint32_t tmpreg; 83 | uint8_t count = 0U; 84 | while ((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_FRLVL_EMPTY) 85 | { 86 | count++; 87 | tmpreg = hspi->Instance->DR; 88 | UNUSED(tmpreg); /* To avoid GCC warning */ 89 | if (count == SPI_FIFO_SIZE) 90 | { 91 | return HAL_TIMEOUT; 92 | } 93 | } 94 | return HAL_OK; 95 | } 96 | 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | 105 | #endif /* HAL_SPI_MODULE_ENABLED */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 116 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @brief CRC LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_crc.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif 30 | 31 | /** @addtogroup STM32G0xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined (CRC) 36 | 37 | /** @addtogroup CRC_LL 38 | * @{ 39 | */ 40 | 41 | /* Private types -------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Private constants ---------------------------------------------------------*/ 44 | /* Private macros ------------------------------------------------------------*/ 45 | /* Private function prototypes -----------------------------------------------*/ 46 | 47 | /* Exported functions --------------------------------------------------------*/ 48 | /** @addtogroup CRC_LL_Exported_Functions 49 | * @{ 50 | */ 51 | 52 | /** @addtogroup CRC_LL_EF_Init 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @brief De-initialize CRC registers (Registers restored to their default values). 58 | * @param CRCx CRC Instance 59 | * @retval An ErrorStatus enumeration value: 60 | * - SUCCESS: CRC registers are de-initialized 61 | * - ERROR: CRC registers are not de-initialized 62 | */ 63 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) 64 | { 65 | ErrorStatus status = SUCCESS; 66 | 67 | /* Check the parameters */ 68 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 69 | 70 | if (CRCx == CRC) 71 | { 72 | /* Force CRC reset */ 73 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_CRC); 74 | 75 | /* Release CRC reset */ 76 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_CRC); 77 | } 78 | else 79 | { 80 | status = ERROR; 81 | } 82 | 83 | return (status); 84 | } 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | #endif /* defined (CRC) */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | #endif /* USE_FULL_LL_DRIVER */ 105 | 106 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 107 | 108 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_exti.c 4 | * @author MCD Application Team 5 | * @brief EXTI LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_exti.h" 23 | #ifdef USE_FULL_ASSERT 24 | #include "stm32_assert.h" 25 | #else 26 | #define assert_param(expr) ((void)0U) 27 | #endif 28 | 29 | /** @addtogroup STM32G0xx_LL_Driver 30 | * @{ 31 | */ 32 | 33 | #if defined (EXTI) 34 | 35 | /** @defgroup EXTI_LL EXTI 36 | * @{ 37 | */ 38 | 39 | /* Private types -------------------------------------------------------------*/ 40 | /* Private variables ---------------------------------------------------------*/ 41 | /* Private constants ---------------------------------------------------------*/ 42 | /* Private macros ------------------------------------------------------------*/ 43 | /** @addtogroup EXTI_LL_Private_Macros 44 | * @{ 45 | */ 46 | 47 | #define IS_LL_EXTI_LINE_0_31(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_0_31) == 0x00000000U) 48 | #if defined(STM32G081xx) || defined(STM32G071xx) 49 | #define IS_LL_EXTI_LINE_32_63(__VALUE__) (((__VALUE__) & ~LL_EXTI_LINE_ALL_32_63) == 0x00000000U) 50 | #endif 51 | #define IS_LL_EXTI_MODE(__VALUE__) (((__VALUE__) == LL_EXTI_MODE_IT) \ 52 | || ((__VALUE__) == LL_EXTI_MODE_EVENT) \ 53 | || ((__VALUE__) == LL_EXTI_MODE_IT_EVENT)) 54 | 55 | 56 | #define IS_LL_EXTI_TRIGGER(__VALUE__) (((__VALUE__) == LL_EXTI_TRIGGER_NONE) \ 57 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING) \ 58 | || ((__VALUE__) == LL_EXTI_TRIGGER_FALLING) \ 59 | || ((__VALUE__) == LL_EXTI_TRIGGER_RISING_FALLING)) 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /* Private function prototypes -----------------------------------------------*/ 66 | 67 | /* Exported functions --------------------------------------------------------*/ 68 | /** @addtogroup EXTI_LL_Exported_Functions 69 | * @{ 70 | */ 71 | 72 | /** @addtogroup EXTI_LL_EF_Init 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @brief De-initialize the EXTI registers to their default reset values. 78 | * @retval An ErrorStatus enumeration value: 79 | * - 0x00: EXTI registers are de-initialized 80 | */ 81 | uint32_t LL_EXTI_DeInit(void) 82 | { 83 | /* Interrupt mask register set to default reset values */ 84 | LL_EXTI_WriteReg(IMR1, 0xFFF80000U); 85 | /* Event mask register set to default reset values */ 86 | LL_EXTI_WriteReg(EMR1, 0x00000000U); 87 | /* Rising Trigger selection register set to default reset values */ 88 | LL_EXTI_WriteReg(RTSR1, 0x00000000U); 89 | /* Falling Trigger selection register set to default reset values */ 90 | LL_EXTI_WriteReg(FTSR1, 0x00000000U); 91 | /* Software interrupt event register set to default reset values */ 92 | LL_EXTI_WriteReg(SWIER1, 0x00000000U); 93 | /* Pending register set to default reset values */ 94 | LL_EXTI_WriteReg(RPR1, 0x0007FFFFU); 95 | LL_EXTI_WriteReg(FPR1, 0x0007FFFFU); 96 | 97 | #if defined(STM32G081xx) || defined(STM32G071xx) 98 | /* Interrupt mask register 2 set to default reset values */ 99 | LL_EXTI_WriteReg(IMR2, 0x00000003U); 100 | /* Event mask register 2 set to default reset values */ 101 | LL_EXTI_WriteReg(EMR2, 0x00000000U); 102 | #endif 103 | 104 | return 0x00u; 105 | } 106 | 107 | /** 108 | * @brief Initialize the EXTI registers according to the specified parameters in EXTI_InitStruct. 109 | * @param EXTI_InitStruct pointer to a @ref LL_EXTI_InitTypeDef structure. 110 | * @retval An ErrorStatus enumeration value: 111 | * - 0x00: EXTI registers are initialized 112 | * - any other calue : wrong configuration 113 | */ 114 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct) 115 | { 116 | uint32_t status = 0x00u; 117 | 118 | /* Check the parameters */ 119 | assert_param(IS_LL_EXTI_LINE_0_31(EXTI_InitStruct->Line_0_31)); 120 | #if defined(STM32G081xx) || defined(STM32G071xx) 121 | assert_param(IS_LL_EXTI_LINE_32_63(EXTI_InitStruct->Line_32_63)); 122 | #endif 123 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->LineCommand)); 124 | assert_param(IS_LL_EXTI_MODE(EXTI_InitStruct->Mode)); 125 | 126 | /* ENABLE LineCommand */ 127 | if (EXTI_InitStruct->LineCommand != DISABLE) 128 | { 129 | assert_param(IS_LL_EXTI_TRIGGER(EXTI_InitStruct->Trigger)); 130 | 131 | /* Configure EXTI Lines in range from 0 to 31 */ 132 | if (EXTI_InitStruct->Line_0_31 != LL_EXTI_LINE_NONE) 133 | { 134 | switch (EXTI_InitStruct->Mode) 135 | { 136 | case LL_EXTI_MODE_IT: 137 | /* First Disable Event on provided Lines */ 138 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 139 | /* Then Enable IT on provided Lines */ 140 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 141 | break; 142 | case LL_EXTI_MODE_EVENT: 143 | /* First Disable IT on provided Lines */ 144 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 145 | /* Then Enable Event on provided Lines */ 146 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 147 | break; 148 | case LL_EXTI_MODE_IT_EVENT: 149 | /* Directly Enable IT & Event on provided Lines */ 150 | LL_EXTI_EnableIT_0_31(EXTI_InitStruct->Line_0_31); 151 | LL_EXTI_EnableEvent_0_31(EXTI_InitStruct->Line_0_31); 152 | break; 153 | default: 154 | status = 0x01u; 155 | break; 156 | } 157 | if (EXTI_InitStruct->Trigger != LL_EXTI_TRIGGER_NONE) 158 | { 159 | switch (EXTI_InitStruct->Trigger) 160 | { 161 | case LL_EXTI_TRIGGER_RISING: 162 | /* First Disable Falling Trigger on provided Lines */ 163 | LL_EXTI_DisableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 164 | /* Then Enable Rising Trigger on provided Lines */ 165 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 166 | break; 167 | case LL_EXTI_TRIGGER_FALLING: 168 | /* First Disable Rising Trigger on provided Lines */ 169 | LL_EXTI_DisableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 170 | /* Then Enable Falling Trigger on provided Lines */ 171 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 172 | break; 173 | case LL_EXTI_TRIGGER_RISING_FALLING: 174 | LL_EXTI_EnableRisingTrig_0_31(EXTI_InitStruct->Line_0_31); 175 | LL_EXTI_EnableFallingTrig_0_31(EXTI_InitStruct->Line_0_31); 176 | break; 177 | default: 178 | status |= 0x02u; 179 | break; 180 | } 181 | } 182 | } 183 | #if defined(STM32G081xx) || defined(STM32G071xx) 184 | /* Configure EXTI Lines in range from 32 to 63 */ 185 | if (EXTI_InitStruct->Line_32_63 != LL_EXTI_LINE_NONE) 186 | { 187 | switch (EXTI_InitStruct->Mode) 188 | { 189 | case LL_EXTI_MODE_IT: 190 | /* First Disable Event on provided Lines */ 191 | LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63); 192 | /* Then Enable IT on provided Lines */ 193 | LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63); 194 | break; 195 | case LL_EXTI_MODE_EVENT: 196 | /* First Disable IT on provided Lines */ 197 | LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63); 198 | /* Then Enable Event on provided Lines */ 199 | LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63); 200 | break; 201 | case LL_EXTI_MODE_IT_EVENT: 202 | /* Directly Enable IT & Event on provided Lines */ 203 | LL_EXTI_EnableIT_32_63(EXTI_InitStruct->Line_32_63); 204 | LL_EXTI_EnableEvent_32_63(EXTI_InitStruct->Line_32_63); 205 | break; 206 | default: 207 | status |= 0x04u; 208 | break; 209 | } 210 | } 211 | #endif 212 | } 213 | /* DISABLE LineCommand */ 214 | else 215 | { 216 | /* De-configure EXTI Lines in range from 0 to 31 */ 217 | LL_EXTI_DisableIT_0_31(EXTI_InitStruct->Line_0_31); 218 | LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31); 219 | #if defined(STM32G081xx) || defined(STM32G071xx) 220 | /* De-configure EXTI Lines in range from 32 to 63 */ 221 | LL_EXTI_DisableIT_32_63(EXTI_InitStruct->Line_32_63); 222 | LL_EXTI_DisableEvent_32_63(EXTI_InitStruct->Line_32_63); 223 | #endif 224 | } 225 | 226 | return status; 227 | } 228 | 229 | /** 230 | * @brief Set each @ref LL_EXTI_InitTypeDef field to default value. 231 | * @param EXTI_InitStruct Pointer to a @ref LL_EXTI_InitTypeDef structure. 232 | * @retval None 233 | */ 234 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) 235 | { 236 | EXTI_InitStruct->Line_0_31 = LL_EXTI_LINE_NONE; 237 | #if defined(STM32G081xx) || defined(STM32G071xx) 238 | EXTI_InitStruct->Line_32_63 = LL_EXTI_LINE_NONE; 239 | #endif 240 | EXTI_InitStruct->LineCommand = DISABLE; 241 | EXTI_InitStruct->Mode = LL_EXTI_MODE_IT; 242 | EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; 243 | } 244 | 245 | /** 246 | * @} 247 | */ 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | /** 254 | * @} 255 | */ 256 | 257 | #endif /* defined (EXTI) */ 258 | 259 | /** 260 | * @} 261 | */ 262 | 263 | #endif /* USE_FULL_LL_DRIVER */ 264 | 265 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 266 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_gpio.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_gpio.c 4 | * @author MCD Application Team 5 | * @brief GPIO LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_gpio.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32G0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) 35 | 36 | /** @addtogroup GPIO_LL 37 | * @{ 38 | */ 39 | /** MISRA C:2012 deviation rule has been granted for following rules: 40 | * Rule-12.2 - Medium: RHS argument is in interval [0,INF] which is out of 41 | * range of the shift operator in following API : 42 | * LL_GPIO_Init 43 | */ 44 | 45 | /* Private types -------------------------------------------------------------*/ 46 | /* Private variables ---------------------------------------------------------*/ 47 | /* Private constants ---------------------------------------------------------*/ 48 | /* Private macros ------------------------------------------------------------*/ 49 | /** @addtogroup GPIO_LL_Private_Macros 50 | * @{ 51 | */ 52 | #define IS_LL_GPIO_PIN(__VALUE__) (((0x00u) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL))) 53 | 54 | #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\ 55 | ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\ 56 | ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\ 57 | ((__VALUE__) == LL_GPIO_MODE_ANALOG)) 58 | 59 | #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\ 60 | ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN)) 61 | 62 | #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\ 63 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\ 64 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\ 65 | ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH)) 66 | 67 | #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\ 68 | ((__VALUE__) == LL_GPIO_PULL_UP) ||\ 69 | ((__VALUE__) == LL_GPIO_PULL_DOWN)) 70 | 71 | #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\ 72 | ((__VALUE__) == LL_GPIO_AF_1 ) ||\ 73 | ((__VALUE__) == LL_GPIO_AF_2 ) ||\ 74 | ((__VALUE__) == LL_GPIO_AF_3 ) ||\ 75 | ((__VALUE__) == LL_GPIO_AF_4 ) ||\ 76 | ((__VALUE__) == LL_GPIO_AF_5 ) ||\ 77 | ((__VALUE__) == LL_GPIO_AF_6 ) ||\ 78 | ((__VALUE__) == LL_GPIO_AF_7 )) 79 | /** 80 | * @} 81 | */ 82 | 83 | /* Private function prototypes -----------------------------------------------*/ 84 | 85 | /* Exported functions --------------------------------------------------------*/ 86 | /** @addtogroup GPIO_LL_Exported_Functions 87 | * @{ 88 | */ 89 | 90 | /** @addtogroup GPIO_LL_EF_Init 91 | * @{ 92 | */ 93 | 94 | /** 95 | * @brief De-initialize GPIO registers (Registers restored to their default values). 96 | * @param GPIOx GPIO Port 97 | * @retval An ErrorStatus enumeration value: 98 | * - SUCCESS: GPIO registers are de-initialized 99 | * - ERROR: Wrong GPIO Port 100 | */ 101 | ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx) 102 | { 103 | ErrorStatus status = SUCCESS; 104 | 105 | /* Check the parameters */ 106 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 107 | 108 | /* Force and Release reset on clock of GPIOx Port */ 109 | if (GPIOx == GPIOA) 110 | { 111 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOA); 112 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOA); 113 | } 114 | else if (GPIOx == GPIOB) 115 | { 116 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOB); 117 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOB); 118 | } 119 | else if (GPIOx == GPIOC) 120 | { 121 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOC); 122 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOC); 123 | } 124 | #if defined(GPIOD) 125 | else if (GPIOx == GPIOD) 126 | { 127 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOD); 128 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOD); 129 | } 130 | #endif /* GPIOD */ 131 | #if defined(GPIOE) 132 | else if (GPIOx == GPIOE) 133 | { 134 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOE); 135 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOE); 136 | } 137 | #endif /* GPIOE */ 138 | #if defined(GPIOF) 139 | else if (GPIOx == GPIOF) 140 | { 141 | LL_IOP_GRP1_ForceReset(LL_IOP_GRP1_PERIPH_GPIOF); 142 | LL_IOP_GRP1_ReleaseReset(LL_IOP_GRP1_PERIPH_GPIOF); 143 | } 144 | #endif /* GPIOF */ 145 | else 146 | { 147 | status = ERROR; 148 | } 149 | 150 | return (status); 151 | } 152 | 153 | /** 154 | * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct. 155 | * @param GPIOx GPIO Port 156 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 157 | * that contains the configuration information for the specified GPIO peripheral. 158 | * @retval An ErrorStatus enumeration value: 159 | * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content 160 | * - ERROR: Not applicable 161 | */ 162 | ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct) 163 | { 164 | uint32_t pinpos; 165 | uint32_t currentpin; 166 | 167 | /* Check the parameters */ 168 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); 169 | assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin)); 170 | assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode)); 171 | assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull)); 172 | 173 | /* ------------------------- Configure the port pins ---------------- */ 174 | /* Initialize pinpos on first pin set */ 175 | pinpos = 0; 176 | 177 | /* Configure the port pins */ 178 | while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00u) 179 | { 180 | /* Get current io position */ 181 | currentpin = (GPIO_InitStruct->Pin) & (0x00000001uL << pinpos); 182 | 183 | if (currentpin != 0x00u) 184 | { 185 | /* Pin Mode configuration */ 186 | LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); 187 | 188 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 189 | { 190 | /* Check Speed mode parameters */ 191 | assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed)); 192 | 193 | /* Speed mode configuration */ 194 | LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); 195 | } 196 | 197 | /* Pull-up Pull down resistor configuration*/ 198 | LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull); 199 | 200 | if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE) 201 | { 202 | /* Check Alternate parameter */ 203 | assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate)); 204 | 205 | /* Speed mode configuration */ 206 | if (currentpin < LL_GPIO_PIN_8) 207 | { 208 | LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate); 209 | } 210 | else 211 | { 212 | LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); 213 | } 214 | } 215 | } 216 | pinpos++; 217 | } 218 | 219 | if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) 220 | { 221 | /* Check Output mode parameters */ 222 | assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); 223 | 224 | /* Output mode configuration*/ 225 | LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); 226 | 227 | } 228 | return (SUCCESS); 229 | } 230 | 231 | /** 232 | * @brief Set each @ref LL_GPIO_InitTypeDef field to default value. 233 | * @param GPIO_InitStruct pointer to a @ref LL_GPIO_InitTypeDef structure 234 | * whose fields will be set to default values. 235 | * @retval None 236 | */ 237 | 238 | void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) 239 | { 240 | /* Reset GPIO init structure parameters values */ 241 | GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL; 242 | GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG; 243 | GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW; 244 | GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL; 245 | GPIO_InitStruct->Pull = LL_GPIO_PULL_NO; 246 | GPIO_InitStruct->Alternate = LL_GPIO_AF_0; 247 | } 248 | 249 | /** 250 | * @} 251 | */ 252 | 253 | /** 254 | * @} 255 | */ 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */ 262 | 263 | /** 264 | * @} 265 | */ 266 | 267 | #endif /* USE_FULL_LL_DRIVER */ 268 | 269 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 270 | 271 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_i2c.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_i2c.c 4 | * @author MCD Application Team 5 | * @brief I2C LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_i2c.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | #ifdef USE_FULL_ASSERT 25 | #include "stm32_assert.h" 26 | #else 27 | #define assert_param(expr) ((void)0U) 28 | #endif 29 | 30 | /** @addtogroup STM32G0xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined (I2C1) || defined (I2C2) 35 | 36 | /** @defgroup I2C_LL I2C 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | /** @addtogroup I2C_LL_Private_Macros 45 | * @{ 46 | */ 47 | 48 | #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \ 49 | ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \ 50 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \ 51 | ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP)) 52 | 53 | #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \ 54 | ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE)) 55 | 56 | #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU) 57 | 58 | #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU) 59 | 60 | #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \ 61 | ((__VALUE__) == LL_I2C_NACK)) 62 | 63 | #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \ 64 | ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT)) 65 | /** 66 | * @} 67 | */ 68 | 69 | /* Private function prototypes -----------------------------------------------*/ 70 | 71 | /* Exported functions --------------------------------------------------------*/ 72 | /** @addtogroup I2C_LL_Exported_Functions 73 | * @{ 74 | */ 75 | 76 | /** @addtogroup I2C_LL_EF_Init 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief De-initialize the I2C registers to their default reset values. 82 | * @param I2Cx I2C Instance. 83 | * @retval An ErrorStatus enumeration value: 84 | * - SUCCESS: I2C registers are de-initialized 85 | * - ERROR: I2C registers are not de-initialized 86 | */ 87 | ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx) 88 | { 89 | ErrorStatus status = SUCCESS; 90 | 91 | /* Check the I2C Instance I2Cx */ 92 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 93 | 94 | if (I2Cx == I2C1) 95 | { 96 | /* Force reset of I2C clock */ 97 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1); 98 | 99 | /* Release reset of I2C clock */ 100 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1); 101 | } 102 | else if (I2Cx == I2C2) 103 | { 104 | /* Force reset of I2C clock */ 105 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2); 106 | 107 | /* Release reset of I2C clock */ 108 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2); 109 | 110 | } 111 | else 112 | { 113 | status = ERROR; 114 | } 115 | 116 | return status; 117 | } 118 | 119 | /** 120 | * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct. 121 | * @param I2Cx I2C Instance. 122 | * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure. 123 | * @retval An ErrorStatus enumeration value: 124 | * - SUCCESS: I2C registers are initialized 125 | * - ERROR: Not applicable 126 | */ 127 | ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct) 128 | { 129 | /* Check the I2C Instance I2Cx */ 130 | assert_param(IS_I2C_ALL_INSTANCE(I2Cx)); 131 | 132 | /* Check the I2C parameters from I2C_InitStruct */ 133 | assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode)); 134 | assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter)); 135 | assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter)); 136 | assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1)); 137 | assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge)); 138 | assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize)); 139 | 140 | /* Disable the selected I2Cx Peripheral */ 141 | LL_I2C_Disable(I2Cx); 142 | 143 | /*---------------------------- I2Cx CR1 Configuration ------------------------ 144 | * Configure the analog and digital noise filters with parameters : 145 | * - AnalogFilter: I2C_CR1_ANFOFF bit 146 | * - DigitalFilter: I2C_CR1_DNF[3:0] bits 147 | */ 148 | LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter); 149 | 150 | /*---------------------------- I2Cx TIMINGR Configuration -------------------- 151 | * Configure the SDA setup, hold time and the SCL high, low period with parameter : 152 | * - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0], 153 | * I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits 154 | */ 155 | LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing); 156 | 157 | /* Enable the selected I2Cx Peripheral */ 158 | LL_I2C_Enable(I2Cx); 159 | 160 | /*---------------------------- I2Cx OAR1 Configuration ----------------------- 161 | * Disable, Configure and Enable I2Cx device own address 1 with parameters : 162 | * - OwnAddress1: I2C_OAR1_OA1[9:0] bits 163 | * - OwnAddrSize: I2C_OAR1_OA1MODE bit 164 | */ 165 | LL_I2C_DisableOwnAddress1(I2Cx); 166 | LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize); 167 | 168 | /* OwnAdress1 == 0 is reserved for General Call address */ 169 | if (I2C_InitStruct->OwnAddress1 != 0U) 170 | { 171 | LL_I2C_EnableOwnAddress1(I2Cx); 172 | } 173 | 174 | /*---------------------------- I2Cx MODE Configuration ----------------------- 175 | * Configure I2Cx peripheral mode with parameter : 176 | * - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits 177 | */ 178 | LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode); 179 | 180 | /*---------------------------- I2Cx CR2 Configuration ------------------------ 181 | * Configure the ACKnowledge or Non ACKnowledge condition 182 | * after the address receive match code or next received byte with parameter : 183 | * - TypeAcknowledge: I2C_CR2_NACK bit 184 | */ 185 | LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge); 186 | 187 | return SUCCESS; 188 | } 189 | 190 | /** 191 | * @brief Set each @ref LL_I2C_InitTypeDef field to default value. 192 | * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure. 193 | * @retval None 194 | */ 195 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) 196 | { 197 | /* Set I2C_InitStruct fields to default values */ 198 | I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C; 199 | I2C_InitStruct->Timing = 0U; 200 | I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; 201 | I2C_InitStruct->DigitalFilter = 0U; 202 | I2C_InitStruct->OwnAddress1 = 0U; 203 | I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK; 204 | I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; 205 | } 206 | 207 | /** 208 | * @} 209 | */ 210 | 211 | /** 212 | * @} 213 | */ 214 | 215 | /** 216 | * @} 217 | */ 218 | 219 | #endif /* I2C1 || I2C2 */ 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | #endif /* USE_FULL_LL_DRIVER */ 226 | 227 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 228 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_lptim.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_lptim.c 4 | * @author MCD Application Team 5 | * @brief LPTIM LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_lptim.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif 30 | 31 | /** @addtogroup STM32G0xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined (LPTIM1) || defined (LPTIM2) 36 | 37 | /** @addtogroup LPTIM_LL 38 | * @{ 39 | */ 40 | 41 | /* Private types -------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Private constants ---------------------------------------------------------*/ 44 | /* Private macros ------------------------------------------------------------*/ 45 | /** @addtogroup LPTIM_LL_Private_Macros 46 | * @{ 47 | */ 48 | #define IS_LL_LPTIM_CLOCK_SOURCE(__VALUE__) (((__VALUE__) == LL_LPTIM_CLK_SOURCE_INTERNAL) \ 49 | || ((__VALUE__) == LL_LPTIM_CLK_SOURCE_EXTERNAL)) 50 | 51 | #define IS_LL_LPTIM_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == LL_LPTIM_PRESCALER_DIV1) \ 52 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV2) \ 53 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV4) \ 54 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV8) \ 55 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV16) \ 56 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV32) \ 57 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV64) \ 58 | || ((__VALUE__) == LL_LPTIM_PRESCALER_DIV128)) 59 | 60 | #define IS_LL_LPTIM_WAVEFORM(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_PWM) \ 61 | || ((__VALUE__) == LL_LPTIM_OUTPUT_WAVEFORM_SETONCE)) 62 | 63 | #define IS_LL_LPTIM_OUTPUT_POLARITY(__VALUE__) (((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_REGULAR) \ 64 | || ((__VALUE__) == LL_LPTIM_OUTPUT_POLARITY_INVERSE)) 65 | /** 66 | * @} 67 | */ 68 | 69 | 70 | /* Private function prototypes -----------------------------------------------*/ 71 | /* Exported functions --------------------------------------------------------*/ 72 | /** @addtogroup LPTIM_LL_Exported_Functions 73 | * @{ 74 | */ 75 | 76 | /** @addtogroup LPTIM_LL_EF_Init 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Set LPTIMx registers to their reset values. 82 | * @param LPTIMx LP Timer instance 83 | * @retval An ErrorStatus enumeration value: 84 | * - SUCCESS: LPTIMx registers are de-initialized 85 | * - ERROR: invalid LPTIMx instance 86 | */ 87 | ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx) 88 | { 89 | ErrorStatus result = SUCCESS; 90 | 91 | /* Check the parameters */ 92 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 93 | 94 | if (LPTIMx == LPTIM1) 95 | { 96 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM1); 97 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM1); 98 | } 99 | #if defined(LPTIM2) 100 | else if (LPTIMx == LPTIM2) 101 | { 102 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPTIM2); 103 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPTIM2); 104 | } 105 | #endif /* LPTIM2 */ 106 | else 107 | { 108 | result = ERROR; 109 | } 110 | 111 | return result; 112 | } 113 | 114 | /** 115 | * @brief Set each fields of the LPTIM_InitStruct structure to its default 116 | * value. 117 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 118 | * @retval None 119 | */ 120 | void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 121 | { 122 | /* Set the default configuration */ 123 | LPTIM_InitStruct->ClockSource = LL_LPTIM_CLK_SOURCE_INTERNAL; 124 | LPTIM_InitStruct->Prescaler = LL_LPTIM_PRESCALER_DIV1; 125 | LPTIM_InitStruct->Waveform = LL_LPTIM_OUTPUT_WAVEFORM_PWM; 126 | LPTIM_InitStruct->Polarity = LL_LPTIM_OUTPUT_POLARITY_REGULAR; 127 | } 128 | 129 | /** 130 | * @brief Configure the LPTIMx peripheral according to the specified parameters. 131 | * @note LL_LPTIM_Init can only be called when the LPTIM instance is disabled. 132 | * @note LPTIMx can be disabled using unitary function @ref LL_LPTIM_Disable(). 133 | * @param LPTIMx LP Timer Instance 134 | * @param LPTIM_InitStruct pointer to a @ref LL_LPTIM_InitTypeDef structure 135 | * @retval An ErrorStatus enumeration value: 136 | * - SUCCESS: LPTIMx instance has been initialized 137 | * - ERROR: LPTIMx instance hasn't been initialized 138 | */ 139 | ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct) 140 | { 141 | ErrorStatus result = SUCCESS; 142 | /* Check the parameters */ 143 | assert_param(IS_LPTIM_INSTANCE(LPTIMx)); 144 | assert_param(IS_LL_LPTIM_CLOCK_SOURCE(LPTIM_InitStruct->ClockSource)); 145 | assert_param(IS_LL_LPTIM_CLOCK_PRESCALER(LPTIM_InitStruct->Prescaler)); 146 | assert_param(IS_LL_LPTIM_WAVEFORM(LPTIM_InitStruct->Waveform)); 147 | assert_param(IS_LL_LPTIM_OUTPUT_POLARITY(LPTIM_InitStruct->Polarity)); 148 | 149 | /* The LPTIMx_CFGR register must only be modified when the LPTIM is disabled 150 | (ENABLE bit is reset to 0). 151 | */ 152 | if (LL_LPTIM_IsEnabled(LPTIMx) == 1U) 153 | { 154 | result = ERROR; 155 | } 156 | else 157 | { 158 | /* Set CKSEL bitfield according to ClockSource value */ 159 | /* Set PRESC bitfield according to Prescaler value */ 160 | /* Set WAVE bitfield according to Waveform value */ 161 | /* Set WAVEPOL bitfield according to Polarity value */ 162 | MODIFY_REG(LPTIMx->CFGR, 163 | (LPTIM_CFGR_CKSEL | LPTIM_CFGR_PRESC | LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL), 164 | LPTIM_InitStruct->ClockSource | \ 165 | LPTIM_InitStruct->Prescaler | \ 166 | LPTIM_InitStruct->Waveform | \ 167 | LPTIM_InitStruct->Polarity); 168 | } 169 | 170 | return result; 171 | } 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | #endif /* LPTIM1 || LPTIM2 */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | #endif /* USE_FULL_LL_DRIVER */ 192 | 193 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 194 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @brief PWR LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_pwr.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | 25 | /** @addtogroup STM32G0xx_LL_Driver 26 | * @{ 27 | */ 28 | 29 | #if defined(PWR) 30 | 31 | /** @defgroup PWR_LL PWR 32 | * @{ 33 | */ 34 | 35 | /* Private types -------------------------------------------------------------*/ 36 | /* Private variables ---------------------------------------------------------*/ 37 | /* Private constants ---------------------------------------------------------*/ 38 | /* Private macros ------------------------------------------------------------*/ 39 | /* Private function prototypes -----------------------------------------------*/ 40 | 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup PWR_LL_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /** @addtogroup PWR_LL_EF_Init 47 | * @{ 48 | */ 49 | 50 | /** 51 | * @brief De-initialize the PWR registers to their default reset values. 52 | * @retval An ErrorStatus enumeration value: 53 | * - SUCCESS: PWR registers are de-initialized 54 | * - ERROR: not applicable 55 | */ 56 | ErrorStatus LL_PWR_DeInit(void) 57 | { 58 | /* Force reset of PWR clock */ 59 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 60 | 61 | /* Release reset of PWR clock */ 62 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 63 | 64 | return SUCCESS; 65 | } 66 | 67 | /** 68 | * @} 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** 76 | * @} 77 | */ 78 | #endif /* defined(PWR) */ 79 | /** 80 | * @} 81 | */ 82 | 83 | #endif /* USE_FULL_LL_DRIVER */ 84 | 85 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 86 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_rng.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_rng.c 4 | * @author MCD Application Team 5 | * @brief RNG LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_rng.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | 25 | #ifdef USE_FULL_ASSERT 26 | #include "stm32_assert.h" 27 | #else 28 | #define assert_param(expr) ((void)0U) 29 | #endif 30 | 31 | /** @addtogroup STM32G0xx_LL_Driver 32 | * @{ 33 | */ 34 | 35 | #if defined (RNG) 36 | 37 | /** @addtogroup RNG_LL 38 | * @{ 39 | */ 40 | 41 | /* Private types -------------------------------------------------------------*/ 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* Private constants ---------------------------------------------------------*/ 44 | /* Private macros ------------------------------------------------------------*/ 45 | /** @addtogroup RNG_LL_Private_Macros 46 | * @{ 47 | */ 48 | #define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \ 49 | ((__MODE__) == LL_RNG_CED_DISABLE)) 50 | 51 | /** 52 | * @} 53 | */ 54 | /* Private function prototypes -----------------------------------------------*/ 55 | 56 | /* Exported functions --------------------------------------------------------*/ 57 | /** @addtogroup RNG_LL_Exported_Functions 58 | * @{ 59 | */ 60 | 61 | /** @addtogroup RNG_LL_EF_Init 62 | * @{ 63 | */ 64 | 65 | /** 66 | * @brief De-initialize RNG registers (Registers restored to their default values). 67 | * @param RNGx RNG Instance 68 | * @retval An ErrorStatus enumeration value: 69 | * - SUCCESS: RNG registers are de-initialized 70 | * - ERROR: not applicable 71 | */ 72 | ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx) 73 | { 74 | /* Check the parameters */ 75 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 76 | /* Enable RNG reset state */ 77 | LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_RNG); 78 | 79 | /* Release RNG from reset state */ 80 | LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_RNG); 81 | return (SUCCESS); 82 | } 83 | 84 | /** 85 | * @brief Initialize RNG registers according to the specified parameters in RNG_InitStruct. 86 | * @param RNGx RNG Instance 87 | * @param RNG_InitStruct pointer to a LL_RNG_InitTypeDef structure 88 | * that contains the configuration information for the specified RNG peripheral. 89 | * @retval An ErrorStatus enumeration value: 90 | * - SUCCESS: RNG registers are initialized according to RNG_InitStruct content 91 | * - ERROR: not applicable 92 | */ 93 | ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct) 94 | { 95 | /* Check the parameters */ 96 | assert_param(IS_RNG_ALL_INSTANCE(RNGx)); 97 | assert_param(IS_LL_RNG_CED(RNG_InitStruct->ClockErrorDetection)); 98 | 99 | /* Clock Error Detection configuration */ 100 | MODIFY_REG(RNGx->CR, RNG_CR_CED, RNG_InitStruct->ClockErrorDetection); 101 | 102 | return (SUCCESS); 103 | } 104 | 105 | /** 106 | * @brief Set each @ref LL_RNG_InitTypeDef field to default value. 107 | * @param RNG_InitStruct pointer to a @ref LL_RNG_InitTypeDef structure 108 | * whose fields will be set to default values. 109 | * @retval None 110 | */ 111 | void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct) 112 | { 113 | /* Set RNG_InitStruct fields to default values */ 114 | RNG_InitStruct->ClockErrorDetection = LL_RNG_CED_ENABLE; 115 | 116 | } 117 | /** 118 | * @} 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | #endif /* RNG */ 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | #endif /* USE_FULL_LL_DRIVER */ 136 | 137 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 138 | 139 | -------------------------------------------------------------------------------- /drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_ucpd.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32g0xx_ll_ucpd.c 4 | * @author MCD Application Team 5 | * @brief UCPD LL module driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | *

© Copyright (c) 2018 STMicroelectronics. 10 | * All rights reserved.

11 | * 12 | * This software component is licensed by ST under BSD 3-Clause license, 13 | * the "License"; You may not use this file except in compliance with the 14 | * License. You may obtain a copy of the License at: 15 | * opensource.org/licenses/BSD-3-Clause 16 | * 17 | ****************************************************************************** 18 | */ 19 | #if defined(USE_FULL_LL_DRIVER) 20 | 21 | /* Includes ------------------------------------------------------------------*/ 22 | #include "stm32g0xx_ll_ucpd.h" 23 | #include "stm32g0xx_ll_bus.h" 24 | #include "stm32g0xx_ll_rcc.h" 25 | 26 | #ifdef USE_FULL_ASSERT 27 | #include "stm32_assert.h" 28 | #else 29 | #define assert_param(expr) ((void)0U) 30 | #endif 31 | 32 | /** @addtogroup STM32G0xx_LL_Driver 33 | * @{ 34 | */ 35 | #if defined (UCPD1) || defined (UCPD2) 36 | /** @addtogroup UCPD_LL 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | 43 | /* Private constants ---------------------------------------------------------*/ 44 | /** @defgroup UCPD_LL_Private_Constants UCPD Private Constants 45 | * @{ 46 | */ 47 | 48 | /** 49 | * @} 50 | */ 51 | 52 | /* Private macros ------------------------------------------------------------*/ 53 | /** @defgroup UCPD_LL_Private_Macros UCPD Private Macros 54 | * @{ 55 | */ 56 | 57 | 58 | /** 59 | * @} 60 | */ 61 | 62 | /* Private function prototypes -----------------------------------------------*/ 63 | 64 | /* Exported functions --------------------------------------------------------*/ 65 | /** @addtogroup UCPD_LL_Exported_Functions 66 | * @{ 67 | */ 68 | 69 | /** @addtogroup UCPD_LL_EF_Init 70 | * @{ 71 | */ 72 | 73 | /** 74 | * @brief De-initialize the UCPD registers to their default reset values. 75 | * @param UCPDx ucpd Instance 76 | * @retval An ErrorStatus enumeration value: 77 | * - SUCCESS: ucpd registers are de-initialized 78 | * - ERROR: ucpd registers are not de-initialized 79 | */ 80 | ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx) 81 | { 82 | ErrorStatus status = ERROR; 83 | 84 | /* Check the parameters */ 85 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 86 | 87 | LL_UCPD_Disable(UCPDx); 88 | 89 | if (UCPD1 == UCPDx) 90 | { 91 | /* Force reset of ucpd clock */ 92 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UCPD1); 93 | 94 | /* Release reset of ucpd clock */ 95 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UCPD1); 96 | 97 | /* Disbale ucpd clock */ 98 | LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_UCPD1); 99 | 100 | status = SUCCESS; 101 | } 102 | if (UCPD2 == UCPDx) 103 | { 104 | /* Force reset of ucpd clock */ 105 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UCPD2); 106 | 107 | /* Release reset of ucpd clock */ 108 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UCPD2); 109 | 110 | /* Disbale ucpd clock */ 111 | LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_UCPD2); 112 | 113 | status = SUCCESS; 114 | } 115 | 116 | return status; 117 | } 118 | 119 | /** 120 | * @brief Initialize the ucpd registers according to the specified parameters in UCPD_InitStruct. 121 | * @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled (ucpd_CR1_SPE bit =0), 122 | * UCPD peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. 123 | * @param UCPDx UCPD Instance 124 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure that contains 125 | * the configuration information for the UCPD peripheral. 126 | * @retval An ErrorStatus enumeration value. (Return always SUCCESS) 127 | */ 128 | ErrorStatus LL_UCPD_Init(UCPD_TypeDef *UCPDx, LL_UCPD_InitTypeDef *UCPD_InitStruct) 129 | { 130 | /* Check the ucpd Instance UCPDx*/ 131 | assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); 132 | 133 | if(UCPD1 == UCPDx) 134 | { 135 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UCPD1); 136 | } 137 | 138 | if(UCPD2 == UCPDx) 139 | { 140 | LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_UCPD2); 141 | } 142 | 143 | LL_UCPD_Disable(UCPDx); 144 | 145 | /*---------------------------- UCPDx CFG1 Configuration ------------------------*/ 146 | MODIFY_REG(UCPDx->CFG1, 147 | UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, 148 | UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | 149 | (UCPD_InitStruct->IfrGap << UCPD_CFG1_IFRGAP_Pos) | UCPD_InitStruct->HbitClockDiv); 150 | 151 | return SUCCESS; 152 | } 153 | 154 | /** 155 | * @brief Set each @ref LL_UCPD_InitTypeDef field to default value. 156 | * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure 157 | * whose fields will be set to default values. 158 | * @retval None 159 | */ 160 | void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct) 161 | { 162 | /* Set UCPD_InitStruct fields to default values */ 163 | UCPD_InitStruct->psc_ucpdclk = LL_UCPD_PSC_DIV1; 164 | UCPD_InitStruct->transwin = 0x7; /* Divide by 8 */ 165 | UCPD_InitStruct->IfrGap = 0x10; /* Divide by 17 */ 166 | UCPD_InitStruct->HbitClockDiv = 0x19; /* Divide by 26 to produce HBITCLK */ 167 | } 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | /** 178 | * @} 179 | */ 180 | #endif /* defined (UCPD1) || defined (UCPD2) */ 181 | /** 182 | * @} 183 | */ 184 | 185 | #endif /* USE_FULL_LL_DRIVER */ 186 | 187 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 188 | -------------------------------------------------------------------------------- /make_update_header.py: -------------------------------------------------------------------------------- 1 | # STM32G0 Bootloader 2 | # Jonah Swain 3 | # Python script to convert application binaries into C header files 4 | 5 | # === DEPENDENCIES === 6 | import sys 7 | import binascii 8 | from string import Template 9 | 10 | # === GLOBAL VARIABLES === 11 | vector_table_size = 47 # Application vector table length (words/entries) (STM32G071: 16 Cortex-M entries + 31 peripheral entries) 12 | 13 | header_content = """/* 14 | STM32G0 Bootloader 15 | Jonah Swain 16 | 17 | Application binary (header) 18 | C header representation of the application binary ${binname} 19 | */ 20 | 21 | /* INCLUDE GUARD */ 22 | #pragma once 23 | #ifndef APP_BINARY_H 24 | #define APP_BINARY_H 25 | 26 | /* DEPENDENCIES */ 27 | #include 28 | #include "app_info.h" 29 | 30 | /* CONSTANT DEFINITIONS AND MACROS */ 31 | #define APP_BINARY_SIZE ${binsize} 32 | 33 | /* APPLICATION BINARY */ 34 | uint8_t APP_BINARY[APP_BINARY_SIZE] = {${binstr}}; 35 | 36 | /* APPLICATION INFO */ 37 | AppInfo_T APP_INFO = {${appid}, ${appver}, APP_BINARY_SIZE, ${vtcrc32}, ${appcrc32}}; 38 | 39 | #endif""" 40 | 41 | # === FUNCTIONS ==== 42 | 43 | def main(): # Main function 44 | # Check command line arguments 45 | if (len(sys.argv) != 5): 46 | print("Error: Incorrect command line arguments. Call the program as follows:\n python make_update_header.py ") 47 | return 48 | 49 | binfile = open(sys.argv[1], 'rb') # Open binary file 50 | binary = binfile.read() # Read bytes from file 51 | binfile.close() # Close binary file 52 | 53 | if (len(binary) % 8): # Pad binary for double-word alignment 54 | for i in range(8 - (len(binary) % 8)): 55 | binary += b'\xff' 56 | 57 | binary_string = "".join("0x%02X, "%byte for byte in binary) # Get string representation of application binary 58 | binary_checksum = "0x%08X"%(binascii.crc32(binary) & 0xFFFFFFFF) # Calculate CRC32 checksum of application binary 59 | vectbl_checksum = "0x%08X"%(binascii.crc32(binary[0:4*vector_table_size]) & 0xFFFFFFFF) # Calculate CRC32 checksum of application vector table 60 | 61 | app_header = Template(header_content).substitute(binname=sys.argv[1], binsize=len(binary), binstr=binary_string[0:len(binary_string) - 2], appid="0x%08X"%int(sys.argv[3]), appver="0x%08X"%int(sys.argv[4]), vtcrc32=vectbl_checksum, appcrc32=binary_checksum) # Format header content with values 62 | 63 | hdrfile = open(sys.argv[2], 'w') # Open/create header file 64 | hdrfile.write(app_header) # Write data to header file 65 | hdrfile.close() # Close header file 66 | 67 | # === RUN === 68 | if (__name__ == "__main__"): 69 | main() # Run main function if file is being run as main -------------------------------------------------------------------------------- /makefile: -------------------------------------------------------------------------------- 1 | # STM32G0 Bootloader 2 | # Jonah Swain 3 | # Makefile 4 | 5 | # ======== CONFIGURATION SECTION ======== 6 | 7 | # === TARGETS === 8 | TARGET_DIR = outputs 9 | BL_TARGET = bootloader 10 | APP_1_TARGET = application-1 11 | APP_2_TARGET = application-2 12 | 13 | # === OPTIONS === 14 | # Enable map file outputs (true/fase) 15 | OUTPUT_MAPS = true 16 | 17 | # === BOOTLOADER CONFIG === 18 | # Bootloader directories 19 | BL_BASEDIR = bootloader 20 | BL_SRCDIR = $(BL_BASEDIR)/src 21 | BL_INCDIR = $(BL_BASEDIR)/include 22 | BL_OBJDIR = $(BL_BASEDIR)/obj 23 | BL_ASMDIR = $(BL_BASEDIR)/asm 24 | 25 | # Bootloader linker script 26 | BL_LDSCRIPT = $(BL_BASEDIR)/bootloader.ld 27 | 28 | # === APPLICATION CONFIG === 29 | # Application directories 30 | APP_BASEDIR = application 31 | APP_SRCDIR = $(APP_BASEDIR)/src 32 | APP_INCDIR = $(APP_BASEDIR)/include 33 | APP_OBJDIR = $(APP_BASEDIR)/obj 34 | APP_ASMDIR = $(APP_BASEDIR)/asm 35 | 36 | # Application linker scripts 37 | APP1_LDSCRIPT = $(APP_BASEDIR)/appspace_1.ld 38 | APP2_LDSCRIPT = $(APP_BASEDIR)/appspace_2.ld 39 | 40 | # === LIBRARY CONFIG === 41 | # Library directories 42 | LIB_SRCDIRS += drivers/STM32G0xx_HAL_Driver/Src 43 | LIB_INCDIRS += common 44 | LIB_INCDIRS += drivers/CMSIS/Include 45 | LIB_INCDIRS += drivers/CMSIS/Device/ST/STM32G0xx/Include 46 | LIB_INCDIRS += drivers/STM32G0xx_HAL_Driver/Inc 47 | LIB_OBJDIR = drivers/obj 48 | 49 | # === COMPILER, ASSEMBLER & LINKER CONFIG === 50 | # C Cross compiler package 51 | CROSS_COMPILER = arm-none-eabi- 52 | 53 | # C standard 54 | CSTD = c18 55 | 56 | # Optimisation level 57 | OPTLVL = O0 58 | 59 | # Device and processor 60 | DEVICE = STM32G071xx 61 | CPU = cortex-m0plus 62 | 63 | 64 | # ====== END CONFIGURATION SECTION ====== 65 | # Do not change anything below this line unless you know what you're doing 66 | 67 | # File extensions/suffixes 68 | .SUFFIXES: .c .h .s .o .elf .hex .bin 69 | 70 | # Phony rules (no dependencies) 71 | .PHONY: all clean clean_all bootloader clean_bootloader applications application_1 application_2 clean_applications clean_libs 72 | 73 | # Define newline 74 | define \n 75 | 76 | 77 | endef 78 | 79 | # Compiler, linker, debugger, assembler, and object utilities 80 | CC = $(CROSS_COMPILER)gcc 81 | LD = $(CROSS_COMPILER)ld 82 | GDB = $(CROSS_COMPILER)gdb 83 | AS = $(CROSS_COMPILER)as 84 | OCPY = $(CROSS_COMPILER)objcopy 85 | ODMP = $(CROSS_COMPILER)objdump 86 | SIZE = $(CROSS_COMPILER)size 87 | 88 | # Compiler flags 89 | CCFLAGS += -mcpu=$(CPU) -mthumb 90 | CCFLAGS += -std=$(CSTD) -$(OPTLVL) 91 | CCFLAGS += -Wall -Werror -Wno-unused-function -Wno-address-of-packed-member 92 | CCFLAGS += -ffreestanding -ffunction-sections -fdata-sections 93 | CCFLAGS += -g 94 | CCFLAGS += $(foreach lib,$(LIB_INCDIRS), -I$(lib)) 95 | CCFLAGS += -D$(DEVICE) -DUSE_HAL_DRIVER 96 | 97 | # Linker flags 98 | LDFLAGS += -mcpu=$(CPU) -mthumb 99 | LDFLAGS += -Wall -Werror 100 | LDFLAGS += -nostdlib -lgcc -nostartfiles 101 | LDFLAGS += --specs=nano.specs --specs=nosys.specs 102 | LDFLAGS += -Wl,--gc-sections 103 | 104 | # Assembler flags 105 | ASFLAGS += -mcpu=$(CPU) -mthumb -c 106 | 107 | 108 | # Bootloader source and object files 109 | BL_C_SRCS := $(foreach dir,$(BL_SRCDIR),$(wildcard $(dir)/*.c)) 110 | BL_ASM_SRCS := $(foreach dir,$(BL_ASMDIR),$(wildcard $(dir)/*.s)) 111 | BL_OBJS := $(foreach src,$(BL_C_SRCS),$(BL_OBJDIR)/$(notdir $(src:%.c=%.o))) 112 | BL_OBJS += $(foreach src,$(BL_ASM_SRCS),$(BL_OBJDIR)/$(notdir $(src:%.s=%.o))) 113 | 114 | # Application source and object files 115 | APP_C_SRCS := $(foreach dir,$(APP_SRCDIR),$(wildcard $(dir)/*.c)) 116 | APP_ASM_SRCS := $(foreach dir,$(APP_ASMDIR),$(wildcard $(dir)/*.s)) 117 | APP_OBJS := $(foreach src,$(APP_C_SRCS),$(APP_OBJDIR)/$(notdir $(src:%.c=%.o))) 118 | APP_OBJS += $(foreach src,$(APP_ASM_SRCS),$(APP_OBJDIR)/$(notdir $(src:%.s=%.o))) 119 | 120 | # Library source and object files 121 | LIB_SRCS := $(foreach dir,$(LIB_SRCDIRS),$(wildcard $(dir)/*.c)) 122 | LIB_OBJS := $(foreach src,$(LIB_SRCS),$(LIB_OBJDIR)/$(notdir $(src:%.c=%.o))) 123 | 124 | 125 | # ======== BUILD RULES ======== 126 | 127 | # Build all (bootloader and application for both application spaces) 128 | all: bootloader application_1 application_2 129 | 130 | # Clean all build files 131 | clean: clean_bootloader clean_applications clean_libs 132 | clean_all: clean_bootloader clean_applications clean_libs 133 | 134 | # === BOOTLOADER BUILD RULES === 135 | # Build bootloader (all) 136 | bootloader: $(TARGET_DIR)/$(BL_TARGET).hex $(TARGET_DIR)/$(BL_TARGET).bin | $(TARGET_DIR) 137 | 138 | # Clean bootloader files 139 | clean_bootloader: 140 | rm -f $(TARGET_DIR)/$(BL_TARGET).elf 141 | rm -f $(TARGET_DIR)/$(BL_TARGET).hex 142 | rm -f $(TARGET_DIR)/$(BL_TARGET).bin 143 | rm -f $(TARGET_DIR)/$(BL_TARGET).map 144 | rm -f $(BL_OBJS) 145 | 146 | # Bootloader C sources 147 | $(BL_OBJDIR)/%.o: $(BL_SRCDIR)/%.c | $(BL_OBJDIR) 148 | $(CC) $(CCFLAGS) -I$(BL_INCDIR) -c $< -o $@ 149 | 150 | # Bootloader asm sources 151 | $(BL_OBJDIR)/%.o: $(BL_ASMDIR)/%.s | $(BL_OBJDIR) 152 | $(AS) $(ASFLAGS) $< -o $@ 153 | 154 | # Bootloader ELF 155 | $(TARGET_DIR)/$(BL_TARGET).elf: $(BL_OBJS) $(LIB_OBJS) | $(TARGET_DIR) 156 | ifeq ($(OUTPUT_MAPS), true) 157 | $(CC) $(LDFLAGS) -Xlinker -Map=$(TARGET_DIR)/$(BL_TARGET).map -T $(BL_LDSCRIPT) $^ -o $@ 158 | else 159 | $(CC) $(LDFLAGS) -T $(BL_LDSCRIPT) $^ -o $@ 160 | endif 161 | 162 | # Bootloader binary 163 | $(TARGET_DIR)/$(BL_TARGET).bin: $(TARGET_DIR)/$(BL_TARGET).elf | $(TARGET_DIR) 164 | $(OCPY) -O binary $< $@ 165 | 166 | # Bootloader HEX 167 | $(TARGET_DIR)/$(BL_TARGET).hex: $(TARGET_DIR)/$(BL_TARGET).elf | $(TARGET_DIR) 168 | $(OCPY) -O ihex $< $@ 169 | 170 | 171 | # === APPLICATION BUILD RULES === 172 | # Build both applications 173 | applications: $(TARGET_DIR)/$(APP_1_TARGET).hex $(TARGET_DIR)/$(APP_1_TARGET).bin $(TARGET_DIR)/$(APP_2_TARGET).hex $(TARGET_DIR)/$(APP_2_TARGET).bin | $(TARGET_DIR) 174 | 175 | # Build application 1 176 | application_1: $(TARGET_DIR)/$(APP_1_TARGET).hex $(TARGET_DIR)/$(APP_1_TARGET).bin | $(TARGET_DIR) 177 | 178 | # Build application 2 179 | application_2: $(TARGET_DIR)/$(APP_2_TARGET).hex $(TARGET_DIR)/$(APP_2_TARGET).bin | $(TARGET_DIR) 180 | 181 | # Clean application build files 182 | clean_applications: 183 | rm -f $(TARGET_DIR)/$(APP_1_TARGET).elf 184 | rm -f $(TARGET_DIR)/$(APP_1_TARGET).hex 185 | rm -f $(TARGET_DIR)/$(APP_1_TARGET).bin 186 | rm -f $(TARGET_DIR)/$(APP_1_TARGET).map 187 | rm -f $(TARGET_DIR)/$(APP_2_TARGET).elf 188 | rm -f $(TARGET_DIR)/$(APP_2_TARGET).hex 189 | rm -f $(TARGET_DIR)/$(APP_2_TARGET).bin 190 | rm -f $(TARGET_DIR)/$(APP_2_TARGET).map 191 | rm -f $(APP_OBJS) 192 | 193 | # Application C sources 194 | $(APP_OBJDIR)/%.o: $(APP_SRCDIR)/%.c | $(APP_OBJDIR) 195 | $(CC) $(CCFLAGS) -I$(APP_INCDIR) -c $< -o $@ 196 | 197 | # Application asm sources 198 | $(APP_OBJDIR)/%.o: $(APP_ASMDIR)/%.s | $(APP_OBJDIR) 199 | $(AS) $(ASFLAGS) $< -o $@ 200 | 201 | # Application 1 ELF 202 | $(TARGET_DIR)/$(APP_1_TARGET).elf: $(APP_OBJS) $(LIB_OBJS) | $(TARGET_DIR) 203 | ifeq ($(OUTPUT_MAPS), true) 204 | $(CC) $(LDFLAGS) -Xlinker -Map=$(TARGET_DIR)/$(APP_1_TARGET).map -T $(APP1_LDSCRIPT) $^ -o $@ 205 | else 206 | $(CC) $(LDFLAGS) -T $(APP1_LDSCRIPT) $^ -o $@ 207 | endif 208 | 209 | # Application 1 binary 210 | $(TARGET_DIR)/$(APP_1_TARGET).bin: $(TARGET_DIR)/$(APP_1_TARGET).elf | $(TARGET_DIR) 211 | $(OCPY) -O binary $< $@ 212 | 213 | # Application 1 HEX 214 | $(TARGET_DIR)/$(APP_1_TARGET).hex: $(TARGET_DIR)/$(APP_1_TARGET).elf | $(TARGET_DIR) 215 | $(OCPY) -O ihex $< $@ 216 | 217 | # Application 2 ELF 218 | $(TARGET_DIR)/$(APP_2_TARGET).elf: $(APP_OBJS) $(LIB_OBJS) | $(TARGET_DIR) 219 | ifeq ($(OUTPUT_MAPS), true) 220 | $(CC) $(LDFLAGS) -Xlinker -Map=$(TARGET_DIR)/$(APP_2_TARGET).map -T $(APP2_LDSCRIPT) $^ -o $@ 221 | else 222 | $(CC) $(LDFLAGS) -T $(APP2_LDSCRIPT) $^ -o $@ 223 | endif 224 | 225 | # Application 2 binary 226 | $(TARGET_DIR)/$(APP_2_TARGET).bin: $(TARGET_DIR)/$(APP_2_TARGET).elf | $(TARGET_DIR) 227 | $(OCPY) -O binary $< $@ 228 | 229 | # Application 2 HEX 230 | $(TARGET_DIR)/$(APP_2_TARGET).hex: $(TARGET_DIR)/$(APP_2_TARGET).elf | $(TARGET_DIR) 231 | $(OCPY) -O ihex $< $@ 232 | 233 | 234 | # === LIBRARY BUILD RULES === 235 | # Library sources 236 | $(LIB_OBJS): $(LIB_SRCS) | $(LIB_OBJDIR) 237 | $(foreach lib,$(LIB_SRCS),$(CC) $(CCFLAGS) -c $(lib) -o $(LIB_OBJDIR)/$(notdir $(lib:%.c=%.o))$(\n)) 238 | 239 | clean_libs: 240 | rm -f $(LIB_OBJS) 241 | 242 | 243 | # === DIRECTORY CREATION RULES === 244 | $(TARGET_DIR): 245 | mkdir -p $@ 246 | 247 | $(BL_OBJDIR): 248 | mkdir -p $@ 249 | 250 | $(APP_OBJDIR): 251 | mkdir -p $@ 252 | 253 | $(LIB_OBJDIR): 254 | mkdir -p $@ -------------------------------------------------------------------------------- /memory_map.ld: -------------------------------------------------------------------------------- 1 | /* 2 | STM32G0 Bootloader 3 | Jonah Swain [SWNJON003] 4 | 5 | STM32G071RB memory map 6 | */ 7 | 8 | MEMORY 9 | { 10 | FLASH_BL_CORE (rx) : ORIGIN = 0x08000000, LENGTH = 14K /* Bootloader core (application loading stuff and libary functions) */ 11 | FLASH_BL_DATA (rx) : ORIGIN = 0x08003800, LENGTH = 2K /* Bootloader preferences (application info and shared function dispatch table) */ 12 | FLASH_APP1 (rx) : ORIGIN = 0x08004000, LENGTH = 56K /* Application 1 code */ 13 | FLASH_APP2 (rx) : ORIGIN = 0x08012000, LENGTH = 56K /* Application 2 code */ 14 | SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x7F80 /* Data memory/RAM (32K - 128 bytes) */ 15 | SRAM_BL_STATIC (rwx) : ORIGIN = 0x20007F80, LENGTH = 128 /* Data memory/RAM for bootloader static allocation/.data section (128 bytes/32 words) */ 16 | } 17 | 18 | /* Export memory map variables (accessible in C) */ 19 | __FLASH_BL_CORE_START = ORIGIN(FLASH_BL_CORE); 20 | __FLASH_BL_CORE_LEN = LENGTH(FLASH_BL_CORE); 21 | __FLASH_BL_DATA_START = ORIGIN(FLASH_BL_DATA); 22 | __FLASH_BL_DATA_LEN = LENGTH(FLASH_BL_DATA); 23 | __FLASH_APP1_START = ORIGIN(FLASH_APP1); 24 | __FLASH_APP1_LEN = LENGTH(FLASH_APP1); 25 | __FLASH_APP2_START = ORIGIN(FLASH_APP2); 26 | __FLASH_APP2_LEN = LENGTH(FLASH_APP2); 27 | __SRAM_START = ORIGIN(SRAM); 28 | __SRAM_LEN = LENGTH(SRAM); 29 | __SRAM_BL_STATIC_START = ORIGIN(SRAM_BL_STATIC); 30 | __SRAM_BL_STATIC_LEN = LENGTH(SRAM_BL_STATIC); --------------------------------------------------------------------------------