├── .mxproject ├── 1.jpg ├── 2.jpg ├── Drivers ├── CMSIS │ ├── Device │ │ └── ST │ │ │ └── STM32F1xx │ │ │ ├── Include │ │ │ ├── stm32f100xb.h │ │ │ ├── stm32f100xe.h │ │ │ ├── stm32f101x6.h │ │ │ ├── stm32f101xb.h │ │ │ ├── stm32f101xe.h │ │ │ ├── stm32f101xg.h │ │ │ ├── stm32f102x6.h │ │ │ ├── stm32f102xb.h │ │ │ ├── stm32f103x6.h │ │ │ ├── stm32f103xb.h │ │ │ ├── stm32f103xe.h │ │ │ ├── stm32f103xg.h │ │ │ ├── stm32f105xc.h │ │ │ ├── stm32f107xc.h │ │ │ ├── stm32f1xx.h │ │ │ └── system_stm32f1xx.h │ │ │ └── Source │ │ │ └── Templates │ │ │ ├── arm │ │ │ ├── startup_stm32f100xb.s │ │ │ ├── startup_stm32f100xe.s │ │ │ ├── startup_stm32f101x6.s │ │ │ ├── startup_stm32f101xb.s │ │ │ ├── startup_stm32f101xe.s │ │ │ ├── startup_stm32f101xg.s │ │ │ ├── startup_stm32f102x6.s │ │ │ ├── startup_stm32f102xb.s │ │ │ ├── startup_stm32f103x6.s │ │ │ ├── startup_stm32f103xb.s │ │ │ ├── startup_stm32f103xe.s │ │ │ ├── startup_stm32f103xg.s │ │ │ ├── startup_stm32f105xc.s │ │ │ └── startup_stm32f107xc.s │ │ │ ├── gcc │ │ │ ├── startup_stm32f100xb.s │ │ │ ├── startup_stm32f100xe.s │ │ │ ├── startup_stm32f101x6.s │ │ │ ├── startup_stm32f101xb.s │ │ │ ├── startup_stm32f101xe.s │ │ │ ├── startup_stm32f101xg.s │ │ │ ├── startup_stm32f102x6.s │ │ │ ├── startup_stm32f102xb.s │ │ │ ├── startup_stm32f103x6.s │ │ │ ├── startup_stm32f103xb.s │ │ │ ├── startup_stm32f103xe.s │ │ │ ├── startup_stm32f103xg.s │ │ │ ├── startup_stm32f105xc.s │ │ │ └── startup_stm32f107xc.s │ │ │ ├── iar │ │ │ ├── linker │ │ │ │ ├── stm32f100xb_flash.icf │ │ │ │ ├── stm32f100xb_sram.icf │ │ │ │ ├── stm32f100xe_flash.icf │ │ │ │ ├── stm32f100xe_sram.icf │ │ │ │ ├── stm32f101x6_flash.icf │ │ │ │ ├── stm32f101x6_sram.icf │ │ │ │ ├── stm32f101xb_flash.icf │ │ │ │ ├── stm32f101xb_sram.icf │ │ │ │ ├── stm32f101xe_flash.icf │ │ │ │ ├── stm32f101xe_sram.icf │ │ │ │ ├── stm32f101xg_flash.icf │ │ │ │ ├── stm32f101xg_sram.icf │ │ │ │ ├── stm32f102x6_flash.icf │ │ │ │ ├── stm32f102x6_sram.icf │ │ │ │ ├── stm32f102xb_flash.icf │ │ │ │ ├── stm32f102xb_sram.icf │ │ │ │ ├── stm32f103x6_flash.icf │ │ │ │ ├── stm32f103x6_sram.icf │ │ │ │ ├── stm32f103xb_flash.icf │ │ │ │ ├── stm32f103xb_sram.icf │ │ │ │ ├── stm32f103xe_flash.icf │ │ │ │ ├── stm32f103xe_sram.icf │ │ │ │ ├── stm32f103xg_flash.icf │ │ │ │ ├── stm32f103xg_sram.icf │ │ │ │ ├── stm32f105xc_flash.icf │ │ │ │ ├── stm32f105xc_sram.icf │ │ │ │ ├── stm32f107xc_flash.icf │ │ │ │ └── stm32f107xc_sram.icf │ │ │ ├── startup_stm32f100xb.s │ │ │ ├── startup_stm32f100xe.s │ │ │ ├── startup_stm32f101x6.s │ │ │ ├── startup_stm32f101xb.s │ │ │ ├── startup_stm32f101xe.s │ │ │ ├── startup_stm32f101xg.s │ │ │ ├── startup_stm32f102x6.s │ │ │ ├── startup_stm32f102xb.s │ │ │ ├── startup_stm32f103x6.s │ │ │ ├── startup_stm32f103xb.s │ │ │ ├── startup_stm32f103xe.s │ │ │ ├── startup_stm32f103xg.s │ │ │ ├── startup_stm32f105xc.s │ │ │ └── startup_stm32f107xc.s │ │ │ └── system_stm32f1xx.c │ ├── Include │ │ ├── arm_common_tables.h │ │ ├── arm_const_structs.h │ │ ├── arm_math.h │ │ ├── cmsis_armcc.h │ │ ├── cmsis_armcc_V6.h │ │ ├── cmsis_gcc.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm3.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_cmFunc.h │ │ ├── core_cmInstr.h │ │ ├── core_cmSimd.h │ │ ├── core_sc000.h │ │ └── core_sc300.h │ └── RTOS │ │ └── Template │ │ └── cmsis_os.h └── STM32F1xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32_assert_template.h │ ├── stm32f1xx_hal.h │ ├── stm32f1xx_hal_adc.h │ ├── stm32f1xx_hal_adc_ex.h │ ├── stm32f1xx_hal_can.h │ ├── stm32f1xx_hal_can_ex.h │ ├── stm32f1xx_hal_cec.h │ ├── stm32f1xx_hal_conf_template.h │ ├── stm32f1xx_hal_cortex.h │ ├── stm32f1xx_hal_crc.h │ ├── stm32f1xx_hal_dac.h │ ├── stm32f1xx_hal_dac_ex.h │ ├── stm32f1xx_hal_def.h │ ├── stm32f1xx_hal_dma.h │ ├── stm32f1xx_hal_dma_ex.h │ ├── stm32f1xx_hal_eth.h │ ├── stm32f1xx_hal_flash.h │ ├── stm32f1xx_hal_flash_ex.h │ ├── stm32f1xx_hal_gpio.h │ ├── stm32f1xx_hal_gpio_ex.h │ ├── stm32f1xx_hal_hcd.h │ ├── stm32f1xx_hal_i2c.h │ ├── stm32f1xx_hal_i2s.h │ ├── stm32f1xx_hal_irda.h │ ├── stm32f1xx_hal_iwdg.h │ ├── stm32f1xx_hal_mmc.h │ ├── stm32f1xx_hal_nand.h │ ├── stm32f1xx_hal_nor.h │ ├── stm32f1xx_hal_pccard.h │ ├── stm32f1xx_hal_pcd.h │ ├── stm32f1xx_hal_pcd_ex.h │ ├── stm32f1xx_hal_pwr.h │ ├── stm32f1xx_hal_rcc.h │ ├── stm32f1xx_hal_rcc_ex.h │ ├── stm32f1xx_hal_rtc.h │ ├── stm32f1xx_hal_rtc_ex.h │ ├── stm32f1xx_hal_sd.h │ ├── stm32f1xx_hal_smartcard.h │ ├── stm32f1xx_hal_spi.h │ ├── stm32f1xx_hal_sram.h │ ├── stm32f1xx_hal_tim.h │ ├── stm32f1xx_hal_tim_ex.h │ ├── stm32f1xx_hal_uart.h │ ├── stm32f1xx_hal_usart.h │ ├── stm32f1xx_hal_wwdg.h │ ├── stm32f1xx_ll_adc.h │ ├── stm32f1xx_ll_bus.h │ ├── stm32f1xx_ll_cortex.h │ ├── stm32f1xx_ll_crc.h │ ├── stm32f1xx_ll_dac.h │ ├── stm32f1xx_ll_dma.h │ ├── stm32f1xx_ll_exti.h │ ├── stm32f1xx_ll_fsmc.h │ ├── stm32f1xx_ll_gpio.h │ ├── stm32f1xx_ll_i2c.h │ ├── stm32f1xx_ll_iwdg.h │ ├── stm32f1xx_ll_pwr.h │ ├── stm32f1xx_ll_rcc.h │ ├── stm32f1xx_ll_rtc.h │ ├── stm32f1xx_ll_sdmmc.h │ ├── stm32f1xx_ll_spi.h │ ├── stm32f1xx_ll_system.h │ ├── stm32f1xx_ll_tim.h │ ├── stm32f1xx_ll_usart.h │ ├── stm32f1xx_ll_usb.h │ ├── stm32f1xx_ll_utils.h │ └── stm32f1xx_ll_wwdg.h │ └── Src │ ├── stm32f1xx_hal.c │ ├── stm32f1xx_hal_adc.c │ ├── stm32f1xx_hal_adc_ex.c │ ├── stm32f1xx_hal_can.c │ ├── stm32f1xx_hal_cec.c │ ├── stm32f1xx_hal_cortex.c │ ├── stm32f1xx_hal_crc.c │ ├── stm32f1xx_hal_dac.c │ ├── stm32f1xx_hal_dac_ex.c │ ├── stm32f1xx_hal_dma.c │ ├── stm32f1xx_hal_eth.c │ ├── stm32f1xx_hal_flash.c │ ├── stm32f1xx_hal_flash_ex.c │ ├── stm32f1xx_hal_gpio.c │ ├── stm32f1xx_hal_gpio_ex.c │ ├── stm32f1xx_hal_hcd.c │ ├── stm32f1xx_hal_i2c.c │ ├── stm32f1xx_hal_i2s.c │ ├── stm32f1xx_hal_irda.c │ ├── stm32f1xx_hal_iwdg.c │ ├── stm32f1xx_hal_mmc.c │ ├── stm32f1xx_hal_msp_template.c │ ├── stm32f1xx_hal_nand.c │ ├── stm32f1xx_hal_nor.c │ ├── stm32f1xx_hal_pccard.c │ ├── stm32f1xx_hal_pcd.c │ ├── stm32f1xx_hal_pcd_ex.c │ ├── stm32f1xx_hal_pwr.c │ ├── stm32f1xx_hal_rcc.c │ ├── stm32f1xx_hal_rcc_ex.c │ ├── stm32f1xx_hal_rtc.c │ ├── stm32f1xx_hal_rtc_ex.c │ ├── stm32f1xx_hal_sd.c │ ├── stm32f1xx_hal_smartcard.c │ ├── stm32f1xx_hal_spi.c │ ├── stm32f1xx_hal_spi_ex.c │ ├── stm32f1xx_hal_sram.c │ ├── stm32f1xx_hal_tim.c │ ├── stm32f1xx_hal_tim_ex.c │ ├── stm32f1xx_hal_timebase_rtc_alarm_template.c │ ├── stm32f1xx_hal_timebase_tim_template.c │ ├── stm32f1xx_hal_uart.c │ ├── stm32f1xx_hal_usart.c │ ├── stm32f1xx_hal_wwdg.c │ ├── stm32f1xx_ll_adc.c │ ├── stm32f1xx_ll_crc.c │ ├── stm32f1xx_ll_dac.c │ ├── stm32f1xx_ll_dma.c │ ├── stm32f1xx_ll_exti.c │ ├── stm32f1xx_ll_fsmc.c │ ├── stm32f1xx_ll_gpio.c │ ├── stm32f1xx_ll_i2c.c │ ├── stm32f1xx_ll_pwr.c │ ├── stm32f1xx_ll_rcc.c │ ├── stm32f1xx_ll_rtc.c │ ├── stm32f1xx_ll_sdmmc.c │ ├── stm32f1xx_ll_spi.c │ ├── stm32f1xx_ll_tim.c │ ├── stm32f1xx_ll_usart.c │ ├── stm32f1xx_ll_usb.c │ └── stm32f1xx_ll_utils.c ├── EWARM ├── Backup of max30102.ewp ├── BuildLog.log ├── Project.eww ├── max30102.dep ├── max30102.ewd ├── max30102.ewp ├── max30102.ewt ├── max30102 │ ├── Exe │ │ └── max30102.sim │ └── Obj │ │ ├── main.pbi │ │ ├── main.pbi.xcl │ │ ├── max30102.pbd │ │ ├── max30102.pbi.xcl │ │ ├── oled.pbi.xcl │ │ ├── stm32f1xx_hal.pbi.xcl │ │ ├── stm32f1xx_hal_cortex.pbi.xcl │ │ ├── stm32f1xx_hal_dma.pbi.xcl │ │ ├── stm32f1xx_hal_flash.pbi.xcl │ │ ├── stm32f1xx_hal_flash_ex.pbi.xcl │ │ ├── stm32f1xx_hal_gpio.pbi.xcl │ │ ├── stm32f1xx_hal_gpio_ex.pbi.xcl │ │ ├── stm32f1xx_hal_i2c.pbi.xcl │ │ ├── stm32f1xx_hal_msp.pbi.xcl │ │ ├── stm32f1xx_hal_pwr.pbi.xcl │ │ ├── stm32f1xx_hal_rcc.pbi.xcl │ │ ├── stm32f1xx_hal_rcc_ex.pbi.xcl │ │ ├── stm32f1xx_hal_tim.pbi.xcl │ │ ├── stm32f1xx_hal_tim_ex.pbi.xcl │ │ ├── stm32f1xx_hal_uart.o │ │ ├── stm32f1xx_hal_uart.pbi │ │ ├── stm32f1xx_hal_uart.pbi.xcl │ │ ├── stm32f1xx_it.pbi.xcl │ │ └── system_stm32f1xx.pbi.xcl ├── settings │ ├── Project.wsdt │ ├── max30102.crun │ ├── max30102.dbgdt │ ├── max30102.dnx │ ├── max30102.max30102.cspy.bat │ ├── max30102.max30102.cspy.ps1 │ ├── max30102.max30102.driver.xcl │ └── max30102.max30102.general.xcl ├── startup_stm32f103xb.s ├── stm32f103xb_flash.icf └── stm32f103xb_sram.icf ├── Inc ├── main.h ├── max30102.h ├── oled.h ├── oledfont.h ├── stm32f1xx_hal_conf.h └── stm32f1xx_it.h ├── Lib ├── ARM │ ├── arm_cortexM3b_math.lib │ └── arm_cortexM3l_math.lib └── GCC │ └── libarm_cortexM3l_math.a ├── README.md ├── Src ├── main.c ├── max30102.c ├── oled.c ├── stm32f1xx_hal_msp.c ├── stm32f1xx_it.c └── system_stm32f1xx.c ├── max30102.ioc └── mx.scratch /.mxproject: -------------------------------------------------------------------------------- 1 | [PreviousGenFiles] 2 | HeaderPath=E:/Sync/Self-study/STM32/f103/max30102/Inc 3 | HeaderFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; 4 | SourcePath=E:/Sync/Self-study/STM32/f103/max30102/Src 5 | SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; 6 | 7 | [PreviousLibFiles] 8 | LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; 9 | 10 | [PreviousUsedIarFiles] 11 | SourceFiles=..\Src\main.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/startup_stm32f103xb.s; 12 | HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc; 13 | 14 | -------------------------------------------------------------------------------- /1.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/1.jpg -------------------------------------------------------------------------------- /2.jpg: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/2.jpg -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h: -------------------------------------------------------------------------------- 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https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xg.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102x6.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f102xb.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f105xc.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f107xc.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @version V4.2.0 6 | * @date 31-March-2017 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2017 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /** @addtogroup CMSIS 39 | * @{ 40 | */ 41 | 42 | /** @addtogroup stm32f10x_system 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief Define to prevent recursive inclusion 48 | */ 49 | #ifndef __SYSTEM_STM32F10X_H 50 | #define __SYSTEM_STM32F10X_H 51 | 52 | #ifdef __cplusplus 53 | extern "C" { 54 | #endif 55 | 56 | /** @addtogroup STM32F10x_System_Includes 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | 65 | /** @addtogroup STM32F10x_System_Exported_types 66 | * @{ 67 | */ 68 | 69 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 70 | extern const uint8_t AHBPrescTable[16U]; /*!< AHB prescalers table values */ 71 | extern const uint8_t APBPrescTable[8U]; /*!< APB prescalers table values */ 72 | 73 | /** 74 | * @} 75 | */ 76 | 77 | /** @addtogroup STM32F10x_System_Exported_Constants 78 | * @{ 79 | */ 80 | 81 | /** 82 | * @} 83 | */ 84 | 85 | /** @addtogroup STM32F10x_System_Exported_Macros 86 | * @{ 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** @addtogroup STM32F10x_System_Exported_Functions 94 | * @{ 95 | */ 96 | 97 | extern void SystemInit(void); 98 | extern void SystemCoreClockUpdate(void); 99 | /** 100 | * @} 101 | */ 102 | 103 | #ifdef __cplusplus 104 | } 105 | #endif 106 | 107 | #endif /*__SYSTEM_STM32F10X_H */ 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 117 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f100xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f101xg_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200017FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f102xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x08007FFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103x6_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x200027FF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xe_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f103xg_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f105xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/iar/linker/stm32f107xc_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/arm_common_tables.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. October 2015 5 | * $Revision: V.1.4.5 a 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_common_tables.h 9 | * 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 11 | * 12 | * Target Processor: Cortex-M4/Cortex-M3 13 | * 14 | * Redistribution and use in source and binary forms, with or without 15 | * modification, are permitted provided that the following conditions 16 | * are met: 17 | * - Redistributions of source code must retain the above copyright 18 | * notice, this list of conditions and the following disclaimer. 19 | * - Redistributions in binary form must reproduce the above copyright 20 | * notice, this list of conditions and the following disclaimer in 21 | * the documentation and/or other materials provided with the 22 | * distribution. 23 | * - Neither the name of ARM LIMITED nor the names of its contributors 24 | * may be used to endorse or promote products derived from this 25 | * software without specific prior written permission. 26 | * 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 | * POSSIBILITY OF SUCH DAMAGE. 39 | * -------------------------------------------------------------------- */ 40 | 41 | #ifndef _ARM_COMMON_TABLES_H 42 | #define _ARM_COMMON_TABLES_H 43 | 44 | #include "arm_math.h" 45 | 46 | extern const uint16_t armBitRevTable[1024]; 47 | extern const q15_t armRecipTableQ15[64]; 48 | extern const q31_t armRecipTableQ31[64]; 49 | /* extern const q31_t realCoefAQ31[1024]; */ 50 | /* extern const q31_t realCoefBQ31[1024]; */ 51 | extern const float32_t twiddleCoef_16[32]; 52 | extern const float32_t twiddleCoef_32[64]; 53 | extern const float32_t twiddleCoef_64[128]; 54 | extern const float32_t twiddleCoef_128[256]; 55 | extern const float32_t twiddleCoef_256[512]; 56 | extern const float32_t twiddleCoef_512[1024]; 57 | extern const float32_t twiddleCoef_1024[2048]; 58 | extern const float32_t twiddleCoef_2048[4096]; 59 | extern const float32_t twiddleCoef_4096[8192]; 60 | #define twiddleCoef twiddleCoef_4096 61 | extern const q31_t twiddleCoef_16_q31[24]; 62 | extern const q31_t twiddleCoef_32_q31[48]; 63 | extern const q31_t twiddleCoef_64_q31[96]; 64 | extern const q31_t twiddleCoef_128_q31[192]; 65 | extern const q31_t twiddleCoef_256_q31[384]; 66 | extern const q31_t twiddleCoef_512_q31[768]; 67 | extern const q31_t twiddleCoef_1024_q31[1536]; 68 | extern const q31_t twiddleCoef_2048_q31[3072]; 69 | extern const q31_t twiddleCoef_4096_q31[6144]; 70 | extern const q15_t twiddleCoef_16_q15[24]; 71 | extern const q15_t twiddleCoef_32_q15[48]; 72 | extern const q15_t twiddleCoef_64_q15[96]; 73 | extern const q15_t twiddleCoef_128_q15[192]; 74 | extern const q15_t twiddleCoef_256_q15[384]; 75 | extern const q15_t twiddleCoef_512_q15[768]; 76 | extern const q15_t twiddleCoef_1024_q15[1536]; 77 | extern const q15_t twiddleCoef_2048_q15[3072]; 78 | extern const q15_t twiddleCoef_4096_q15[6144]; 79 | extern const float32_t twiddleCoef_rfft_32[32]; 80 | extern const float32_t twiddleCoef_rfft_64[64]; 81 | extern const float32_t twiddleCoef_rfft_128[128]; 82 | extern const float32_t twiddleCoef_rfft_256[256]; 83 | extern const float32_t twiddleCoef_rfft_512[512]; 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; 87 | 88 | 89 | /* floating-point bit reversal tables */ 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) 99 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; 109 | 110 | /* fixed-point bit reversal tables */ 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) 120 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; 130 | 131 | /* Tables for Fast Math Sine and Cosine */ 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; 135 | 136 | #endif /* ARM_COMMON_TABLES_H */ 137 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/arm_const_structs.h: -------------------------------------------------------------------------------- 1 | /* ---------------------------------------------------------------------- 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. 3 | * 4 | * $Date: 19. March 2015 5 | * $Revision: V.1.4.5 6 | * 7 | * Project: CMSIS DSP Library 8 | * Title: arm_const_structs.h 9 | * 10 | * Description: This file has constant structs that are initialized for 11 | * user convenience. For example, some can be given as 12 | * arguments to the arm_cfft_f32() function. 13 | * 14 | * Target Processor: Cortex-M4/Cortex-M3 15 | * 16 | * Redistribution and use in source and binary forms, with or without 17 | * modification, are permitted provided that the following conditions 18 | * are met: 19 | * - Redistributions of source code must retain the above copyright 20 | * notice, this list of conditions and the following disclaimer. 21 | * - Redistributions in binary form must reproduce the above copyright 22 | * notice, this list of conditions and the following disclaimer in 23 | * the documentation and/or other materials provided with the 24 | * distribution. 25 | * - Neither the name of ARM LIMITED nor the names of its contributors 26 | * may be used to endorse or promote products derived from this 27 | * software without specific prior written permission. 28 | * 29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 40 | * POSSIBILITY OF SUCH DAMAGE. 41 | * -------------------------------------------------------------------- */ 42 | 43 | #ifndef _ARM_CONST_STRUCTS_H 44 | #define _ARM_CONST_STRUCTS_H 45 | 46 | #include "arm_math.h" 47 | #include "arm_common_tables.h" 48 | 49 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16; 50 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32; 51 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64; 52 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128; 53 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256; 54 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512; 55 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024; 56 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048; 57 | extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096; 58 | 59 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16; 60 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32; 61 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64; 62 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128; 63 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256; 64 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512; 65 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024; 66 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048; 67 | extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096; 68 | 69 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16; 70 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32; 71 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64; 72 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128; 73 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256; 74 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512; 75 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024; 76 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048; 77 | extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096; 78 | 79 | #endif 80 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmFunc.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmFunc.h 3 | * @brief CMSIS Cortex-M Core Function Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMFUNC_H 42 | #define __CORE_CMFUNC_H 43 | 44 | 45 | /* ########################### Core Function Access ########################### */ 46 | /** \ingroup CMSIS_Core_FunctionInterface 47 | \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@} end of CMSIS_Core_RegAccFunctions */ 86 | 87 | #endif /* __CORE_CMFUNC_H */ 88 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmInstr.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmInstr.h 3 | * @brief CMSIS Cortex-M Core Instruction Access Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMINSTR_H 42 | #define __CORE_CMINSTR_H 43 | 44 | 45 | /* ########################## Core Instruction Access ######################### */ 46 | /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 47 | Access to dedicated instructions 48 | @{ 49 | */ 50 | 51 | /*------------------ RealView Compiler -----------------*/ 52 | #if defined ( __CC_ARM ) 53 | #include "cmsis_armcc.h" 54 | 55 | /*------------------ ARM Compiler V6 -------------------*/ 56 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 57 | #include "cmsis_armcc_V6.h" 58 | 59 | /*------------------ GNU Compiler ----------------------*/ 60 | #elif defined ( __GNUC__ ) 61 | #include "cmsis_gcc.h" 62 | 63 | /*------------------ ICC Compiler ----------------------*/ 64 | #elif defined ( __ICCARM__ ) 65 | #include 66 | 67 | /*------------------ TI CCS Compiler -------------------*/ 68 | #elif defined ( __TMS470__ ) 69 | #include 70 | 71 | /*------------------ TASKING Compiler ------------------*/ 72 | #elif defined ( __TASKING__ ) 73 | /* 74 | * The CMSIS functions have been implemented as intrinsics in the compiler. 75 | * Please use "carm -?i" to get an up to date list of all intrinsics, 76 | * Including the CMSIS ones. 77 | */ 78 | 79 | /*------------------ COSMIC Compiler -------------------*/ 80 | #elif defined ( __CSMC__ ) 81 | #include 82 | 83 | #endif 84 | 85 | /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 86 | 87 | #endif /* __CORE_CMINSTR_H */ 88 | -------------------------------------------------------------------------------- /Drivers/CMSIS/Include/core_cmSimd.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file core_cmSimd.h 3 | * @brief CMSIS Cortex-M SIMD Header File 4 | * @version V4.30 5 | * @date 20. October 2015 6 | ******************************************************************************/ 7 | /* Copyright (c) 2009 - 2015 ARM LIMITED 8 | 9 | All rights reserved. 10 | Redistribution and use in source and binary forms, with or without 11 | modification, are permitted provided that the following conditions are met: 12 | - Redistributions of source code must retain the above copyright 13 | notice, this list of conditions and the following disclaimer. 14 | - Redistributions in binary form must reproduce the above copyright 15 | notice, this list of conditions and the following disclaimer in the 16 | documentation and/or other materials provided with the distribution. 17 | - Neither the name of ARM nor the names of its contributors may be used 18 | to endorse or promote products derived from this software without 19 | specific prior written permission. 20 | * 21 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 | ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE 25 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 | POSSIBILITY OF SUCH DAMAGE. 32 | ---------------------------------------------------------------------------*/ 33 | 34 | 35 | #if defined ( __ICCARM__ ) 36 | #pragma system_include /* treat file as system include file for MISRA check */ 37 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 38 | #pragma clang system_header /* treat file as system include file */ 39 | #endif 40 | 41 | #ifndef __CORE_CMSIMD_H 42 | #define __CORE_CMSIMD_H 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | 49 | /* ################### Compiler specific Intrinsics ########################### */ 50 | /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 51 | Access to dedicated SIMD instructions 52 | @{ 53 | */ 54 | 55 | /*------------------ RealView Compiler -----------------*/ 56 | #if defined ( __CC_ARM ) 57 | #include "cmsis_armcc.h" 58 | 59 | /*------------------ ARM Compiler V6 -------------------*/ 60 | #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 61 | #include "cmsis_armcc_V6.h" 62 | 63 | /*------------------ GNU Compiler ----------------------*/ 64 | #elif defined ( __GNUC__ ) 65 | #include "cmsis_gcc.h" 66 | 67 | /*------------------ ICC Compiler ----------------------*/ 68 | #elif defined ( __ICCARM__ ) 69 | #include 70 | 71 | /*------------------ TI CCS Compiler -------------------*/ 72 | #elif defined ( __TMS470__ ) 73 | #include 74 | 75 | /*------------------ TASKING Compiler ------------------*/ 76 | #elif defined ( __TASKING__ ) 77 | /* 78 | * The CMSIS functions have been implemented as intrinsics in the compiler. 79 | * Please use "carm -?i" to get an up to date list of all intrinsics, 80 | * Including the CMSIS ones. 81 | */ 82 | 83 | /*------------------ COSMIC Compiler -------------------*/ 84 | #elif defined ( __CSMC__ ) 85 | #include 86 | 87 | #endif 88 | 89 | /*@} end of group CMSIS_SIMD_intrinsics */ 90 | 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /* __CORE_CMSIMD_H */ 97 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32_assert_template.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32_assert.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief STM32 assert template file. 8 | * This file should be copied to the application folder and renamed 9 | * to stm32_assert.h. 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | *

© COPYRIGHT(c) 2016 STMicroelectronics

14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | 40 | /* Define to prevent recursive inclusion -------------------------------------*/ 41 | #ifndef __STM32_ASSERT_H 42 | #define __STM32_ASSERT_H 43 | 44 | #ifdef __cplusplus 45 | extern "C" { 46 | #endif 47 | 48 | /* Exported types ------------------------------------------------------------*/ 49 | /* Exported constants --------------------------------------------------------*/ 50 | /* Includes ------------------------------------------------------------------*/ 51 | /* Exported macro ------------------------------------------------------------*/ 52 | #ifdef USE_FULL_ASSERT 53 | /** 54 | * @brief The assert_param macro is used for function's parameters check. 55 | * @param expr: If expr is false, it calls assert_failed function 56 | * which reports the name of the source file and the source 57 | * line number of the call that failed. 58 | * If expr is true, it returns no value. 59 | * @retval None 60 | */ 61 | #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) 62 | /* Exported functions ------------------------------------------------------- */ 63 | void assert_failed(uint8_t* file, uint32_t line); 64 | #else 65 | #define assert_param(expr) ((void)0U) 66 | #endif /* USE_FULL_ASSERT */ 67 | 68 | #ifdef __cplusplus 69 | } 70 | #endif 71 | 72 | #endif /* __STM32_ASSERT_H */ 73 | 74 | 75 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 76 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_can_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_can_ex.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief Header file of CAN HAL Extension module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F1xx_HAL_CAN_EX_H 40 | #define __STM32F1xx_HAL_CAN_EX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | #if defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || \ 47 | defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) 48 | 49 | /* Includes ------------------------------------------------------------------*/ 50 | #include "stm32f1xx_hal_def.h" 51 | 52 | /** @addtogroup STM32F1xx_HAL_Driver 53 | * @{ 54 | */ 55 | 56 | /** @defgroup CANEx CANEx 57 | * @{ 58 | */ 59 | 60 | /* Exported types ------------------------------------------------------------*/ 61 | 62 | /** 63 | * @brief CAN filter configuration structure definition 64 | */ 65 | /* CAN filter banks differences over STM32F1 devices: */ 66 | /* - STM32F1 Connectivity line: 28 filter banks shared between CAN1 and CAN2 */ 67 | /* - Other STM32F10x devices: 14 filter banks */ 68 | 69 | typedef struct 70 | { 71 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit 72 | configuration, first one for a 16-bit configuration). 73 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 74 | 75 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit 76 | configuration, second one for a 16-bit configuration). 77 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 78 | 79 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, 80 | according to the mode (MSBs for a 32-bit configuration, 81 | first one for a 16-bit configuration). 82 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 83 | 84 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, 85 | according to the mode (LSBs for a 32-bit configuration, 86 | second one for a 16-bit configuration). 87 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ 88 | 89 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. 90 | This parameter can be a value of @ref CAN_filter_FIFO */ 91 | #if defined(STM32F105xC) || defined(STM32F107xC) 92 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 93 | This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ 94 | #else 95 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. 96 | This parameter must be a number between Min_Data = 0 and Max_Data = 13. */ 97 | #endif /* STM32F105xC || STM32F107xC */ 98 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. 99 | This parameter can be a value of @ref CAN_filter_mode */ 100 | 101 | uint32_t FilterScale; /*!< Specifies the filter scale. 102 | This parameter can be a value of @ref CAN_filter_scale */ 103 | 104 | uint32_t FilterActivation; /*!< Enable or disable the filter. 105 | This parameter can be set to ENABLE or DISABLE. */ 106 | 107 | uint32_t BankNumber; /*!< Select the start slave bank filter 108 | This parameter must be a number between Min_Data = 0 and Max_Data = 28. */ 109 | 110 | }CAN_FilterConfTypeDef; 111 | 112 | /* Exported constants --------------------------------------------------------*/ 113 | /* Exported macro ------------------------------------------------------------*/ 114 | /* Private macro -------------------------------------------------------------*/ 115 | 116 | /** @defgroup CANEx_Private_Macros CAN Extended Private Macros 117 | * @{ 118 | */ 119 | #if defined(STM32F105xC) || defined(STM32F107xC) 120 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U) 121 | #else 122 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13U) 123 | #endif /* STM32F105xC || STM32F107xC */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | 130 | /** 131 | * @} 132 | */ 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | #endif /* STM32F103x6) || STM32F103xB || STM32F103xE || STM32F103xG) || STM32F105xC || STM32F107xC */ 139 | 140 | #ifdef __cplusplus 141 | } 142 | #endif 143 | 144 | #endif /* __STM32F1xx_HAL_CAN_EX_H */ 145 | 146 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 147 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_crc.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief Header file of CRC HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F1xx_HAL_CRC_H 40 | #define __STM32F1xx_HAL_CRC_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f1xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F1xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup CRC 54 | * @{ 55 | */ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | 59 | /** @defgroup CRC_Exported_Types CRC Exported Types 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief CRC HAL State Structure definition 65 | */ 66 | typedef enum 67 | { 68 | HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ 69 | HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ 70 | HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ 71 | HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ 72 | HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ 73 | 74 | }HAL_CRC_StateTypeDef; 75 | 76 | /** 77 | * @brief CRC handle Structure definition 78 | */ 79 | typedef struct 80 | { 81 | CRC_TypeDef *Instance; /*!< Register base address */ 82 | 83 | HAL_LockTypeDef Lock; /*!< CRC locking object */ 84 | 85 | __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ 86 | 87 | }CRC_HandleTypeDef; 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /* Exported constants --------------------------------------------------------*/ 94 | /* Exported macro ------------------------------------------------------------*/ 95 | 96 | /** @defgroup CRC_Exported_Macros CRC Exported Macros 97 | * @{ 98 | */ 99 | 100 | /** @brief Reset CRC handle state 101 | * @param __HANDLE__: CRC handle 102 | * @retval None 103 | */ 104 | #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) 105 | 106 | /** 107 | * @brief Resets CRC Data Register. 108 | * @param __HANDLE__: CRC handle 109 | * @retval None 110 | */ 111 | #define __HAL_CRC_DR_RESET(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR,CRC_CR_RESET)) 112 | 113 | /** 114 | * @brief Stores a 8-bit data in the Independent Data(ID) register. 115 | * @param __HANDLE__: CRC handle 116 | * @param __VALUE__: 8-bit value to be stored in the ID register 117 | * @retval None 118 | */ 119 | #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) 120 | 121 | /** 122 | * @brief Returns the 8-bit data stored in the Independent Data(ID) register. 123 | * @param __HANDLE__: CRC handle 124 | * @retval 8-bit value of the ID register 125 | */ 126 | #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) 127 | 128 | /** 129 | * @} 130 | */ 131 | 132 | /* Exported functions --------------------------------------------------------*/ 133 | 134 | /** @addtogroup CRC_Exported_Functions 135 | * @{ 136 | */ 137 | 138 | /** @addtogroup CRC_Exported_Functions_Group1 139 | * @{ 140 | */ 141 | 142 | /* Initialization/de-initialization functions **********************************/ 143 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); 144 | HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc); 145 | void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); 146 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** @addtogroup CRC_Exported_Functions_Group2 153 | * @{ 154 | */ 155 | 156 | /* Peripheral Control functions ************************************************/ 157 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 158 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 159 | 160 | 161 | /** 162 | * @} 163 | */ 164 | 165 | /** @addtogroup CRC_Exported_Functions_Group3 166 | ** @{ 167 | */ 168 | 169 | /* Peripheral State functions **************************************************/ 170 | HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | #ifdef __cplusplus 190 | } 191 | #endif 192 | 193 | #endif /* __STM32F1xx_HAL_CRC_H */ 194 | 195 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 196 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_def.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief This file contains HAL common defines, enumeration, macros and 8 | * structures definitions. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | *

© COPYRIGHT(c) 2017 STMicroelectronics

13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ 40 | #ifndef __STM32F1xx_HAL_DEF 41 | #define __STM32F1xx_HAL_DEF 42 | 43 | #ifdef __cplusplus 44 | extern "C" { 45 | #endif 46 | 47 | /* Includes ------------------------------------------------------------------*/ 48 | #include "stm32f1xx.h" 49 | #if defined(USE_HAL_LEGACY) 50 | #include "Legacy/stm32_hal_legacy.h" 51 | #endif 52 | #include 53 | 54 | /* Exported types ------------------------------------------------------------*/ 55 | 56 | /** 57 | * @brief HAL Status structures definition 58 | */ 59 | typedef enum 60 | { 61 | HAL_OK = 0x00U, 62 | HAL_ERROR = 0x01U, 63 | HAL_BUSY = 0x02U, 64 | HAL_TIMEOUT = 0x03U 65 | } HAL_StatusTypeDef; 66 | 67 | /** 68 | * @brief HAL Lock structures definition 69 | */ 70 | typedef enum 71 | { 72 | HAL_UNLOCKED = 0x00U, 73 | HAL_LOCKED = 0x01U 74 | } HAL_LockTypeDef; 75 | 76 | /* Exported macro ------------------------------------------------------------*/ 77 | #define HAL_MAX_DELAY 0xFFFFFFFFU 78 | 79 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) != RESET) 80 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET) 81 | 82 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ 83 | do{ \ 84 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ 85 | (__DMA_HANDLE__).Parent = (__HANDLE__); \ 86 | } while(0U) 87 | 88 | #define UNUSED(x) ((void)(x)) 89 | 90 | /** @brief Reset the Handle's State field. 91 | * @param __HANDLE__: specifies the Peripheral Handle. 92 | * @note This macro can be used for the following purpose: 93 | * - When the Handle is declared as local variable; before passing it as parameter 94 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro 95 | * to set to 0 the Handle's "State" field. 96 | * Otherwise, "State" field may have any random value and the first time the function 97 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed 98 | * (i.e. HAL_PPP_MspInit() will not be executed). 99 | * - When there is a need to reconfigure the low level hardware: instead of calling 100 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). 101 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function 102 | * HAL_PPP_MspInit() which will reconfigure the low level hardware. 103 | * @retval None 104 | */ 105 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U) 106 | 107 | #if (USE_RTOS == 1U) 108 | /* Reserved for future use */ 109 | #error "USE_RTOS should be 0 in the current HAL release" 110 | #else 111 | #define __HAL_LOCK(__HANDLE__) \ 112 | do{ \ 113 | if((__HANDLE__)->Lock == HAL_LOCKED) \ 114 | { \ 115 | return HAL_BUSY; \ 116 | } \ 117 | else \ 118 | { \ 119 | (__HANDLE__)->Lock = HAL_LOCKED; \ 120 | } \ 121 | }while (0U) 122 | 123 | #define __HAL_UNLOCK(__HANDLE__) \ 124 | do{ \ 125 | (__HANDLE__)->Lock = HAL_UNLOCKED; \ 126 | }while (0U) 127 | #endif /* USE_RTOS */ 128 | 129 | #if defined ( __GNUC__ ) 130 | #ifndef __weak 131 | #define __weak __attribute__((weak)) 132 | #endif /* __weak */ 133 | #ifndef __packed 134 | #define __packed __attribute__((__packed__)) 135 | #endif /* __packed */ 136 | #endif /* __GNUC__ */ 137 | 138 | 139 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ 140 | #if defined (__GNUC__) /* GNU Compiler */ 141 | #ifndef __ALIGN_END 142 | #define __ALIGN_END __attribute__ ((aligned (4))) 143 | #endif /* __ALIGN_END */ 144 | #ifndef __ALIGN_BEGIN 145 | #define __ALIGN_BEGIN 146 | #endif /* __ALIGN_BEGIN */ 147 | #else 148 | #ifndef __ALIGN_END 149 | #define __ALIGN_END 150 | #endif /* __ALIGN_END */ 151 | #ifndef __ALIGN_BEGIN 152 | #if defined (__CC_ARM) /* ARM Compiler */ 153 | #define __ALIGN_BEGIN __align(4) 154 | #elif defined (__ICCARM__) /* IAR Compiler */ 155 | #define __ALIGN_BEGIN 156 | #endif /* __CC_ARM */ 157 | #endif /* __ALIGN_BEGIN */ 158 | #endif /* __GNUC__ */ 159 | 160 | 161 | /** 162 | * @brief __RAM_FUNC definition 163 | */ 164 | #if defined ( __CC_ARM ) 165 | /* ARM Compiler 166 | ------------ 167 | RAM functions are defined using the toolchain options. 168 | Functions that are executed in RAM should reside in a separate source module. 169 | Using the 'Options for File' dialog you can simply change the 'Code / Const' 170 | area of a module to a memory space in physical RAM. 171 | Available memory areas are declared in the 'Target' tab of the 'Options for Target' 172 | dialog. 173 | */ 174 | #define __RAM_FUNC HAL_StatusTypeDef 175 | 176 | #elif defined ( __ICCARM__ ) 177 | /* ICCARM Compiler 178 | --------------- 179 | RAM functions are defined using a specific toolchain keyword "__ramfunc". 180 | */ 181 | #define __RAM_FUNC __ramfunc HAL_StatusTypeDef 182 | 183 | #elif defined ( __GNUC__ ) 184 | /* GNU Compiler 185 | ------------ 186 | RAM functions are defined using a specific toolchain attribute 187 | "__attribute__((section(".RamFunc")))". 188 | */ 189 | #define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) 190 | 191 | #endif 192 | 193 | /** 194 | * @brief __NOINLINE definition 195 | */ 196 | #if defined ( __CC_ARM ) || defined ( __GNUC__ ) 197 | /* ARM & GNUCompiler 198 | ---------------- 199 | */ 200 | #define __NOINLINE __attribute__ ( (noinline) ) 201 | 202 | #elif defined ( __ICCARM__ ) 203 | /* ICCARM Compiler 204 | --------------- 205 | */ 206 | #define __NOINLINE _Pragma("optimize = no_inline") 207 | 208 | #endif 209 | 210 | #ifdef __cplusplus 211 | } 212 | #endif 213 | 214 | #endif /* ___STM32F1xx_HAL_DEF */ 215 | 216 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 217 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_iwdg.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief Header file of IWDG HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F1xx_HAL_IWDG_H 40 | #define __STM32F1xx_HAL_IWDG_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f1xx_hal_def.h" 48 | 49 | /** @addtogroup STM32F1xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @addtogroup IWDG 54 | * @{ 55 | */ 56 | 57 | /* Exported types ------------------------------------------------------------*/ 58 | /** @defgroup IWDG_Exported_Types IWDG Exported Types 59 | * @{ 60 | */ 61 | 62 | /** 63 | * @brief IWDG Init structure definition 64 | */ 65 | typedef struct 66 | { 67 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. 68 | This parameter can be a value of @ref IWDG_Prescaler */ 69 | 70 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. 71 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ 72 | 73 | } IWDG_InitTypeDef; 74 | 75 | /** 76 | * @brief IWDG Handle Structure definition 77 | */ 78 | typedef struct 79 | { 80 | IWDG_TypeDef *Instance; /*!< Register base address */ 81 | 82 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ 83 | 84 | }IWDG_HandleTypeDef; 85 | 86 | /** 87 | * @} 88 | */ 89 | 90 | /* Exported constants --------------------------------------------------------*/ 91 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants 92 | * @{ 93 | */ 94 | 95 | /** @defgroup IWDG_Prescaler IWDG Prescaler 96 | * @{ 97 | */ 98 | #define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */ 99 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ 100 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ 101 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ 102 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ 103 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ 104 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ 105 | /** 106 | * @} 107 | */ 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | 114 | /* Exported macros -----------------------------------------------------------*/ 115 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros 116 | * @{ 117 | */ 118 | 119 | /** 120 | * @brief Enable the IWDG peripheral. 121 | * @param __HANDLE__ IWDG handle 122 | * @retval None 123 | */ 124 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) 125 | 126 | /** 127 | * @brief Reload IWDG counter with value defined in the reload register 128 | * (write access to IWDG_PR & IWDG_RLR registers disabled). 129 | * @param __HANDLE__ IWDG handle 130 | * @retval None 131 | */ 132 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) 133 | 134 | /** 135 | * @} 136 | */ 137 | 138 | /* Exported functions --------------------------------------------------------*/ 139 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions 140 | * @{ 141 | */ 142 | 143 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions 144 | * @{ 145 | */ 146 | /* Initialization/Start functions ********************************************/ 147 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); 148 | /** 149 | * @} 150 | */ 151 | 152 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions 153 | * @{ 154 | */ 155 | /* I/O operation functions ****************************************************/ 156 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); 157 | /** 158 | * @} 159 | */ 160 | 161 | /** 162 | * @} 163 | */ 164 | 165 | /* Private constants ---------------------------------------------------------*/ 166 | /** @defgroup IWDG_Private_Constants IWDG Private Constants 167 | * @{ 168 | */ 169 | 170 | /** 171 | * @brief IWDG Key Register BitMask 172 | */ 173 | #define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ 174 | #define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ 175 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ 176 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /* Private macros ------------------------------------------------------------*/ 183 | /** @defgroup IWDG_Private_Macros IWDG Private Macros 184 | * @{ 185 | */ 186 | 187 | /** 188 | * @brief Enable write access to IWDG_PR and IWDG_RLR registers. 189 | * @param __HANDLE__ IWDG handle 190 | * @retval None 191 | */ 192 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) 193 | 194 | /** 195 | * @brief Disable write access to IWDG_PR and IWDG_RLR registers. 196 | * @param __HANDLE__ IWDG handle 197 | * @retval None 198 | */ 199 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) 200 | 201 | /** 202 | * @brief Check IWDG prescaler value. 203 | * @param __PRESCALER__ IWDG prescaler value 204 | * @retval None 205 | */ 206 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ 207 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ 208 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ 209 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ 210 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ 211 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ 212 | ((__PRESCALER__) == IWDG_PRESCALER_256)) 213 | 214 | /** 215 | * @brief Check IWDG reload value. 216 | * @param __RELOAD__ IWDG reload value 217 | * @retval None 218 | */ 219 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /** 226 | * @} 227 | */ 228 | 229 | /** 230 | * @} 231 | */ 232 | 233 | 234 | #ifdef __cplusplus 235 | } 236 | #endif 237 | 238 | #endif /* __STM32F1xx_HAL_IWDG_H */ 239 | 240 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 241 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_pcd_ex.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief Header file of Extended PCD HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F1xx_HAL_PCD_EX_H 40 | #define __STM32F1xx_HAL_PCD_EX_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | #if defined(STM32F102x6) || defined(STM32F102xB) || \ 47 | defined(STM32F103x6) || defined(STM32F103xB) || \ 48 | defined(STM32F103xE) || defined(STM32F103xG) || \ 49 | defined(STM32F105xC) || defined(STM32F107xC) 50 | 51 | /* Includes ------------------------------------------------------------------*/ 52 | #include "stm32f1xx_hal_def.h" 53 | 54 | /** @addtogroup STM32F1xx_HAL_Driver 55 | * @{ 56 | */ 57 | 58 | /** @addtogroup PCDEx 59 | * @{ 60 | */ 61 | 62 | /* Exported types ------------------------------------------------------------*/ 63 | /* Exported constants --------------------------------------------------------*/ 64 | /* Exported macros -----------------------------------------------------------*/ 65 | /* Exported functions --------------------------------------------------------*/ 66 | /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions 67 | * @{ 68 | */ 69 | /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions 70 | * @{ 71 | */ 72 | #if defined (USB_OTG_FS) 73 | HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); 74 | HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); 75 | #endif /* USB_OTG_FS */ 76 | 77 | #if defined (USB) 78 | HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, 79 | uint16_t ep_addr, 80 | uint16_t ep_kind, 81 | uint32_t pmaadress); 82 | #endif /* USB */ 83 | /** 84 | * @} 85 | */ 86 | 87 | /** @addtogroup PCDEx_Exported_Functions_Group2 Peripheral State functions 88 | * @{ 89 | */ 90 | void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); 91 | /** 92 | * @} 93 | */ 94 | /** 95 | * @} 96 | */ 97 | /** 98 | * @} 99 | */ 100 | 101 | /** 102 | * @} 103 | */ 104 | #endif /* STM32F102x6 || STM32F102xB || */ 105 | /* STM32F103x6 || STM32F103xB || */ 106 | /* STM32F103xE || STM32F103xG || */ 107 | /* STM32F105xC || STM32F107xC */ 108 | 109 | #ifdef __cplusplus 110 | } 111 | #endif 112 | 113 | 114 | #endif /* __STM32F1xx_HAL_PCD_EX_H */ 115 | 116 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 117 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_sram.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief Header file of SRAM HAL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F1xx_HAL_SRAM_H 40 | #define __STM32F1xx_HAL_SRAM_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f1xx_ll_fsmc.h" 48 | 49 | /** @addtogroup STM32F1xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | #if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE) 54 | 55 | /** @addtogroup SRAM 56 | * @{ 57 | */ 58 | 59 | /* Exported typedef ----------------------------------------------------------*/ 60 | 61 | /** @defgroup SRAM_Exported_Types SRAM Exported Types 62 | * @{ 63 | */ 64 | /** 65 | * @brief HAL SRAM State structures definition 66 | */ 67 | typedef enum 68 | { 69 | HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */ 70 | HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */ 71 | HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */ 72 | HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */ 73 | HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */ 74 | 75 | }HAL_SRAM_StateTypeDef; 76 | 77 | /** 78 | * @brief SRAM handle Structure definition 79 | */ 80 | typedef struct 81 | { 82 | FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 83 | 84 | FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 85 | 86 | FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ 87 | 88 | HAL_LockTypeDef Lock; /*!< SRAM locking object */ 89 | 90 | __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */ 91 | 92 | DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ 93 | 94 | }SRAM_HandleTypeDef; 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | /* Exported constants --------------------------------------------------------*/ 101 | /* Exported macro ------------------------------------------------------------*/ 102 | 103 | /** @defgroup SRAM_Exported_Macros SRAM Exported Macros 104 | * @{ 105 | */ 106 | 107 | /** @brief Reset SRAM handle state 108 | * @param __HANDLE__: SRAM handle 109 | * @retval None 110 | */ 111 | #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET) 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /* Exported functions --------------------------------------------------------*/ 118 | 119 | /** @addtogroup SRAM_Exported_Functions 120 | * @{ 121 | */ 122 | 123 | /** @addtogroup SRAM_Exported_Functions_Group1 124 | * @{ 125 | */ 126 | 127 | /* Initialization/de-initialization functions **********************************/ 128 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming); 129 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); 130 | void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); 131 | void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram); 132 | 133 | void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); 134 | void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /** @addtogroup SRAM_Exported_Functions_Group2 141 | * @{ 142 | */ 143 | 144 | /* I/O operation functions *****************************************************/ 145 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); 146 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); 147 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); 148 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); 149 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); 150 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); 151 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); 152 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /** @addtogroup SRAM_Exported_Functions_Group3 159 | * @{ 160 | */ 161 | 162 | /* SRAM Control functions ******************************************************/ 163 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); 164 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram); 165 | 166 | /** 167 | * @} 168 | */ 169 | 170 | /** @addtogroup SRAM_Exported_Functions_Group4 171 | * @{ 172 | */ 173 | 174 | /* SRAM State functions *********************************************************/ 175 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram); 176 | 177 | /** 178 | * @} 179 | */ 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | #endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */ 190 | 191 | /** 192 | * @} 193 | */ 194 | 195 | #ifdef __cplusplus 196 | } 197 | #endif 198 | 199 | #endif /* __STM32F1xx_HAL_SRAM_H */ 200 | 201 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 202 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_crc.h 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief Header file of CRC LL module. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __STM32F1xx_LL_CRC_H 40 | #define __STM32F1xx_LL_CRC_H 41 | 42 | #ifdef __cplusplus 43 | extern "C" { 44 | #endif 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f1xx.h" 48 | 49 | /** @addtogroup STM32F1xx_LL_Driver 50 | * @{ 51 | */ 52 | 53 | #if defined(CRC) 54 | 55 | /** @defgroup CRC_LL CRC 56 | * @{ 57 | */ 58 | 59 | /* Private types -------------------------------------------------------------*/ 60 | /* Private variables ---------------------------------------------------------*/ 61 | /* Private constants ---------------------------------------------------------*/ 62 | /* Private macros ------------------------------------------------------------*/ 63 | 64 | /* Exported types ------------------------------------------------------------*/ 65 | /* Exported constants --------------------------------------------------------*/ 66 | 67 | /* Exported macro ------------------------------------------------------------*/ 68 | /** @defgroup CRC_LL_Exported_Macros CRC Exported Macros 69 | * @{ 70 | */ 71 | 72 | /** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @brief Write a value in CRC register 78 | * @param __INSTANCE__ CRC Instance 79 | * @param __REG__ Register to be written 80 | * @param __VALUE__ Value to be written in the register 81 | * @retval None 82 | */ 83 | #define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) 84 | 85 | /** 86 | * @brief Read a value in CRC register 87 | * @param __INSTANCE__ CRC Instance 88 | * @param __REG__ Register to be read 89 | * @retval Register value 90 | */ 91 | #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 92 | /** 93 | * @} 94 | */ 95 | 96 | /** 97 | * @} 98 | */ 99 | 100 | 101 | /* Exported functions --------------------------------------------------------*/ 102 | /** @defgroup CRC_LL_Exported_Functions CRC Exported Functions 103 | * @{ 104 | */ 105 | 106 | /** @defgroup CRC_LL_EF_Configuration CRC Configuration functions 107 | * @{ 108 | */ 109 | 110 | /** 111 | * @brief Reset the CRC calculation unit. 112 | * @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit 113 | * @param CRCx CRC Instance 114 | * @retval None 115 | */ 116 | __STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) 117 | { 118 | WRITE_REG(CRCx->CR, CRC_CR_RESET); 119 | } 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** @defgroup CRC_LL_EF_Data_Management Data_Management 126 | * @{ 127 | */ 128 | 129 | /** 130 | * @brief Write given 32-bit data to the CRC calculator 131 | * @rmtoll DR DR LL_CRC_FeedData32 132 | * @param CRCx CRC Instance 133 | * @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF 134 | * @retval None 135 | */ 136 | __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) 137 | { 138 | WRITE_REG(CRCx->DR, InData); 139 | } 140 | 141 | /** 142 | * @brief Return current CRC calculation result. 32 bits value is returned. 143 | * @rmtoll DR DR LL_CRC_ReadData32 144 | * @param CRCx CRC Instance 145 | * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). 146 | */ 147 | __STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) 148 | { 149 | return (uint32_t)(READ_REG(CRCx->DR)); 150 | } 151 | 152 | /** 153 | * @brief Return data stored in the Independent Data(IDR) register. 154 | * @note This register can be used as a temporary storage location for one byte. 155 | * @rmtoll IDR IDR LL_CRC_Read_IDR 156 | * @param CRCx CRC Instance 157 | * @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). 158 | */ 159 | __STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) 160 | { 161 | return (uint32_t)(READ_REG(CRCx->IDR)); 162 | } 163 | 164 | /** 165 | * @brief Store data in the Independent Data(IDR) register. 166 | * @note This register can be used as a temporary storage location for one byte. 167 | * @rmtoll IDR IDR LL_CRC_Write_IDR 168 | * @param CRCx CRC Instance 169 | * @param InData value to be stored in CRC_IDR register (8-bit) between between Min_Data=0 and Max_Data=0xFF 170 | * @retval None 171 | */ 172 | __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) 173 | { 174 | *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; 175 | } 176 | /** 177 | * @} 178 | */ 179 | 180 | #if defined(USE_FULL_LL_DRIVER) 181 | /** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions 182 | * @{ 183 | */ 184 | 185 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); 186 | 187 | /** 188 | * @} 189 | */ 190 | #endif /* USE_FULL_LL_DRIVER */ 191 | 192 | /** 193 | * @} 194 | */ 195 | 196 | /** 197 | * @} 198 | */ 199 | 200 | #endif /* defined(CRC) */ 201 | 202 | /** 203 | * @} 204 | */ 205 | 206 | #ifdef __cplusplus 207 | } 208 | #endif 209 | 210 | #endif /* __STM32F1xx_LL_CRC_H */ 211 | 212 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 213 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_gpio_ex.c 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief GPIO Extension HAL module driver. 8 | * This file provides firmware functions to manage the following 9 | * functionalities of the General Purpose Input/Output (GPIO) extension peripheral. 10 | * + Extended features functions 11 | * 12 | @verbatim 13 | ============================================================================== 14 | ##### GPIO Peripheral extension features ##### 15 | ============================================================================== 16 | [..] GPIO module on STM32F1 family, manage also the AFIO register: 17 | (+) Possibility to use the EVENTOUT Cortex feature 18 | 19 | ##### How to use this driver ##### 20 | ============================================================================== 21 | [..] This driver provides functions to use EVENTOUT Cortex feature 22 | (#) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 23 | (#) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 24 | (#) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 25 | 26 | @endverbatim 27 | ****************************************************************************** 28 | * @attention 29 | * 30 | *

© COPYRIGHT(c) 2016 STMicroelectronics

31 | * 32 | * Redistribution and use in source and binary forms, with or without modification, 33 | * are permitted provided that the following conditions are met: 34 | * 1. Redistributions of source code must retain the above copyright notice, 35 | * this list of conditions and the following disclaimer. 36 | * 2. Redistributions in binary form must reproduce the above copyright notice, 37 | * this list of conditions and the following disclaimer in the documentation 38 | * and/or other materials provided with the distribution. 39 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 40 | * may be used to endorse or promote products derived from this software 41 | * without specific prior written permission. 42 | * 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 44 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 45 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 46 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 47 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 48 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 49 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 50 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 51 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53 | * 54 | ****************************************************************************** 55 | */ 56 | 57 | /* Includes ------------------------------------------------------------------*/ 58 | #include "stm32f1xx_hal.h" 59 | 60 | /** @addtogroup STM32F1xx_HAL_Driver 61 | * @{ 62 | */ 63 | 64 | /** @defgroup GPIOEx GPIOEx 65 | * @brief GPIO HAL module driver 66 | * @{ 67 | */ 68 | 69 | #ifdef HAL_GPIO_MODULE_ENABLED 70 | 71 | /** @defgroup GPIOEx_Exported_Functions GPIOEx Exported Functions 72 | * @{ 73 | */ 74 | 75 | /** @defgroup GPIOEx_Exported_Functions_Group1 Extended features functions 76 | * @brief Extended features functions 77 | * 78 | @verbatim 79 | ============================================================================== 80 | ##### Extended features functions ##### 81 | ============================================================================== 82 | [..] This section provides functions allowing to: 83 | (+) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout() 84 | (+) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout() 85 | (+) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout() 86 | 87 | @endverbatim 88 | * @{ 89 | */ 90 | 91 | /** 92 | * @brief Configures the port and pin on which the EVENTOUT Cortex signal will be connected. 93 | * @param GPIO_PortSource Select the port used to output the Cortex EVENTOUT signal. 94 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PORT. 95 | * @param GPIO_PinSource Select the pin used to output the Cortex EVENTOUT signal. 96 | * This parameter can be a value of @ref GPIOEx_EVENTOUT_PIN. 97 | * @retval None 98 | */ 99 | void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource) 100 | { 101 | /* Verify the parameters */ 102 | assert_param(IS_AFIO_EVENTOUT_PORT(GPIO_PortSource)); 103 | assert_param(IS_AFIO_EVENTOUT_PIN(GPIO_PinSource)); 104 | 105 | /* Apply the new configuration */ 106 | MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT)|(AFIO_EVCR_PIN), (GPIO_PortSource)|(GPIO_PinSource)); 107 | } 108 | 109 | /** 110 | * @brief Enables the Event Output. 111 | * @retval None 112 | */ 113 | void HAL_GPIOEx_EnableEventout(void) 114 | { 115 | SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 116 | } 117 | 118 | /** 119 | * @brief Disables the Event Output. 120 | * @retval None 121 | */ 122 | void HAL_GPIOEx_DisableEventout(void) 123 | { 124 | CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE); 125 | } 126 | 127 | /** 128 | * @} 129 | */ 130 | 131 | /** 132 | * @} 133 | */ 134 | 135 | #endif /* HAL_GPIO_MODULE_ENABLED */ 136 | 137 | /** 138 | * @} 139 | */ 140 | 141 | /** 142 | * @} 143 | */ 144 | 145 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 146 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_msp_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_msp_template.c 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief HAL BSP module. 8 | * This file template is located in the HAL folder and should be copied 9 | * to the user folder. 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | *

© COPYRIGHT(c) 2016 STMicroelectronics

14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | 40 | /* Includes ------------------------------------------------------------------*/ 41 | #include "stm32f1xx_hal.h" 42 | 43 | /** @addtogroup STM32F1xx_HAL_Driver 44 | * @{ 45 | */ 46 | 47 | /** @defgroup HAL_MSP HAL_MSP 48 | * @brief HAL MSP module. 49 | * @{ 50 | */ 51 | 52 | /* Private typedef -----------------------------------------------------------*/ 53 | /* Private define ------------------------------------------------------------*/ 54 | /* Private macro -------------------------------------------------------------*/ 55 | /* Private variables ---------------------------------------------------------*/ 56 | /* Private function prototypes -----------------------------------------------*/ 57 | /* Private functions ---------------------------------------------------------*/ 58 | 59 | /** @defgroup HAL_MSP_Exported_Functions HAL MSP Exported Functions 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @brief Initializes the Global MSP. 65 | * @retval None 66 | */ 67 | void HAL_MspInit(void) 68 | { 69 | 70 | } 71 | 72 | /** 73 | * @brief DeInitializes the Global MSP. 74 | * @retval None 75 | */ 76 | void HAL_MspDeInit(void) 77 | { 78 | 79 | } 80 | 81 | /** 82 | * @brief Initializes the PPP MSP. 83 | * @retval None 84 | */ 85 | void HAL_PPP_MspInit(void) 86 | { 87 | 88 | } 89 | 90 | /** 91 | * @brief DeInitializes the PPP MSP. 92 | * @retval None 93 | */ 94 | void HAL_PPP_MspDeInit(void) 95 | { 96 | 97 | } 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** 108 | * @} 109 | */ 110 | 111 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 112 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_rtc_alarm_template.c -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_timebase_tim_template.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_hal_timebase_tim_template.c 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief HAL time base based on the hardware TIM Template. 8 | * 9 | * This file overrides the native HAL time base functions (defined as weak) 10 | * the TIM time base: 11 | * + Intializes the TIM peripheral generate a Period elapsed Event each 1ms 12 | * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms 13 | * 14 | ****************************************************************************** 15 | * @attention 16 | * 17 | *

© COPYRIGHT(c) 2017 STMicroelectronics

18 | * 19 | * Redistribution and use in source and binary forms, with or without modification, 20 | * are permitted provided that the following conditions are met: 21 | * 1. Redistributions of source code must retain the above copyright notice, 22 | * this list of conditions and the following disclaimer. 23 | * 2. Redistributions in binary form must reproduce the above copyright notice, 24 | * this list of conditions and the following disclaimer in the documentation 25 | * and/or other materials provided with the distribution. 26 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 27 | * may be used to endorse or promote products derived from this software 28 | * without specific prior written permission. 29 | * 30 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 31 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 33 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 34 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 36 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 38 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 | * 41 | ****************************************************************************** 42 | */ 43 | 44 | /* Includes ------------------------------------------------------------------*/ 45 | #include "stm32f1xx_hal.h" 46 | 47 | /** @addtogroup STM32F1xx_HAL_Driver 48 | * @{ 49 | */ 50 | 51 | /** @addtogroup HAL_TimeBase_TIM 52 | * @{ 53 | */ 54 | 55 | /* Private typedef -----------------------------------------------------------*/ 56 | /* Private define ------------------------------------------------------------*/ 57 | /* Private macro -------------------------------------------------------------*/ 58 | /* Private variables ---------------------------------------------------------*/ 59 | TIM_HandleTypeDef TimHandle; 60 | /* Private function prototypes -----------------------------------------------*/ 61 | void TIM2_IRQHandler(void); 62 | /* Private functions ---------------------------------------------------------*/ 63 | 64 | /** 65 | * @brief This function configures the TIM2 as a time base source. 66 | * The time source is configured to have 1ms time base with a dedicated 67 | * Tick interrupt priority. 68 | * @note This function is called automatically at the beginning of program after 69 | * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 70 | * @param TickPriority: Tick interrupt priority. 71 | * @retval HAL status 72 | */ 73 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority) 74 | { 75 | RCC_ClkInitTypeDef clkconfig; 76 | uint32_t uwTimclock, uwAPB1Prescaler = 0U; 77 | uint32_t uwPrescalerValue = 0U; 78 | uint32_t pFLatency; 79 | 80 | /*Configure the TIM2 IRQ priority */ 81 | HAL_NVIC_SetPriority(TIM2_IRQn, TickPriority ,0U); 82 | 83 | /* Enable the TIM2 global Interrupt */ 84 | HAL_NVIC_EnableIRQ(TIM2_IRQn); 85 | 86 | /* Enable TIM2 clock */ 87 | __HAL_RCC_TIM2_CLK_ENABLE(); 88 | 89 | /* Get clock configuration */ 90 | HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 91 | 92 | /* Get APB1 prescaler */ 93 | uwAPB1Prescaler = clkconfig.APB1CLKDivider; 94 | 95 | /* Compute TIM2 clock */ 96 | if (uwAPB1Prescaler == RCC_HCLK_DIV1) 97 | { 98 | uwTimclock = HAL_RCC_GetPCLK1Freq(); 99 | } 100 | else 101 | { 102 | uwTimclock = 2*HAL_RCC_GetPCLK1Freq(); 103 | } 104 | 105 | /* Compute the prescaler value to have TIM2 counter clock equal to 1MHz */ 106 | uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); 107 | 108 | /* Initialize TIM2 */ 109 | TimHandle.Instance = TIM2; 110 | 111 | /* Initialize TIMx peripheral as follow: 112 | + Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base. 113 | + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 114 | + ClockDivision = 0 115 | + Counter direction = Up 116 | */ 117 | TimHandle.Init.Period = (1000000U / 1000U) - 1U; 118 | TimHandle.Init.Prescaler = uwPrescalerValue; 119 | TimHandle.Init.ClockDivision = 0U; 120 | TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP; 121 | TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 122 | if(HAL_TIM_Base_Init(&TimHandle) == HAL_OK) 123 | { 124 | /* Start the TIM time Base generation in interrupt mode */ 125 | return HAL_TIM_Base_Start_IT(&TimHandle); 126 | } 127 | 128 | /* Return function status */ 129 | return HAL_ERROR; 130 | } 131 | 132 | /** 133 | * @brief Suspend Tick increment. 134 | * @note Disable the tick increment by disabling TIM2 update interrupt. 135 | * @retval None 136 | */ 137 | void HAL_SuspendTick(void) 138 | { 139 | /* Disable TIM2 update Interrupt */ 140 | __HAL_TIM_DISABLE_IT(&TimHandle, TIM_IT_UPDATE); 141 | } 142 | 143 | /** 144 | * @brief Resume Tick increment. 145 | * @note Enable the tick increment by Enabling TIM2 update interrupt. 146 | * @retval None 147 | */ 148 | void HAL_ResumeTick(void) 149 | { 150 | /* Enable TIM2 Update interrupt */ 151 | __HAL_TIM_ENABLE_IT(&TimHandle, TIM_IT_UPDATE); 152 | } 153 | 154 | /** 155 | * @brief Period elapsed callback in non blocking mode 156 | * @note This function is called when TIM2 interrupt took place, inside 157 | * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment 158 | * a global variable "uwTick" used as application time base. 159 | * @param htim : TIM handle 160 | * @retval None 161 | */ 162 | void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 163 | { 164 | HAL_IncTick(); 165 | } 166 | 167 | /** 168 | * @brief This function handles TIM interrupt request. 169 | * @retval None 170 | */ 171 | void TIM2_IRQHandler(void) 172 | { 173 | HAL_TIM_IRQHandler(&TimHandle); 174 | } 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 185 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_crc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_crc.c 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief CRC LL module driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | #if defined(USE_FULL_LL_DRIVER) 38 | 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f1xx_ll_crc.h" 41 | #include "stm32f1xx_ll_bus.h" 42 | 43 | #ifdef USE_FULL_ASSERT 44 | #include "stm32_assert.h" 45 | #else 46 | #define assert_param(expr) ((void)0U) 47 | #endif 48 | 49 | /** @addtogroup STM32F1xx_LL_Driver 50 | * @{ 51 | */ 52 | 53 | #if defined (CRC) 54 | 55 | /** @addtogroup CRC_LL 56 | * @{ 57 | */ 58 | 59 | /* Private types -------------------------------------------------------------*/ 60 | /* Private variables ---------------------------------------------------------*/ 61 | /* Private constants ---------------------------------------------------------*/ 62 | /* Private macros ------------------------------------------------------------*/ 63 | /* Private function prototypes -----------------------------------------------*/ 64 | 65 | /* Exported functions --------------------------------------------------------*/ 66 | /** @addtogroup CRC_LL_Exported_Functions 67 | * @{ 68 | */ 69 | 70 | /** @addtogroup CRC_LL_EF_Init 71 | * @{ 72 | */ 73 | 74 | /** 75 | * @brief De-initialize CRC registers (Registers restored to their default values). 76 | * @param CRCx CRC Instance 77 | * @retval An ErrorStatus enumeration value: 78 | * - SUCCESS: CRC registers are de-initialized 79 | * - ERROR: CRC registers are not de-initialized 80 | */ 81 | ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) 82 | { 83 | ErrorStatus status = SUCCESS; 84 | 85 | /* Check the parameters */ 86 | assert_param(IS_CRC_ALL_INSTANCE(CRCx)); 87 | 88 | if (CRCx == CRC) 89 | { 90 | 91 | /* Reset the CRC calculation unit */ 92 | LL_CRC_ResetCRCCalculationUnit(CRCx); 93 | 94 | /* Reset IDR register */ 95 | LL_CRC_Write_IDR(CRCx, 0x00U); 96 | } 97 | else 98 | { 99 | status = ERROR; 100 | } 101 | 102 | return (status); 103 | } 104 | 105 | /** 106 | * @} 107 | */ 108 | 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | #endif /* defined (CRC) */ 118 | 119 | /** 120 | * @} 121 | */ 122 | 123 | #endif /* USE_FULL_LL_DRIVER */ 124 | 125 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 126 | 127 | -------------------------------------------------------------------------------- /Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_ll_pwr.c 4 | * @author MCD Application Team 5 | * @version V1.1.1 6 | * @date 12-May-2017 7 | * @brief PWR LL module driver. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | *

© COPYRIGHT(c) 2016 STMicroelectronics

12 | * 13 | * Redistribution and use in source and binary forms, with or without modification, 14 | * are permitted provided that the following conditions are met: 15 | * 1. Redistributions of source code must retain the above copyright notice, 16 | * this list of conditions and the following disclaimer. 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, 18 | * this list of conditions and the following disclaimer in the documentation 19 | * and/or other materials provided with the distribution. 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 | * may be used to endorse or promote products derived from this software 22 | * without specific prior written permission. 23 | * 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 | * 35 | ****************************************************************************** 36 | */ 37 | #if defined(USE_FULL_LL_DRIVER) 38 | 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f1xx_ll_pwr.h" 41 | #include "stm32f1xx_ll_bus.h" 42 | 43 | /** @addtogroup STM32F1xx_LL_Driver 44 | * @{ 45 | */ 46 | 47 | #if defined(PWR) 48 | 49 | /** @defgroup PWR_LL PWR 50 | * @{ 51 | */ 52 | 53 | /* Private types -------------------------------------------------------------*/ 54 | /* Private variables ---------------------------------------------------------*/ 55 | /* Private constants ---------------------------------------------------------*/ 56 | /* Private macros ------------------------------------------------------------*/ 57 | /* Private function prototypes -----------------------------------------------*/ 58 | 59 | /* Exported functions --------------------------------------------------------*/ 60 | /** @addtogroup PWR_LL_Exported_Functions 61 | * @{ 62 | */ 63 | 64 | /** @addtogroup PWR_LL_EF_Init 65 | * @{ 66 | */ 67 | 68 | /** 69 | * @brief De-initialize the PWR registers to their default reset values. 70 | * @retval An ErrorStatus enumeration value: 71 | * - SUCCESS: PWR registers are de-initialized 72 | * - ERROR: not applicable 73 | */ 74 | ErrorStatus LL_PWR_DeInit(void) 75 | { 76 | /* Force reset of PWR clock */ 77 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_PWR); 78 | 79 | /* Release reset of PWR clock */ 80 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_PWR); 81 | 82 | return SUCCESS; 83 | } 84 | 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | #endif /* defined(PWR) */ 97 | /** 98 | * @} 99 | */ 100 | 101 | #endif /* USE_FULL_LL_DRIVER */ 102 | 103 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 104 | -------------------------------------------------------------------------------- /EWARM/BuildLog.log: -------------------------------------------------------------------------------- 1 |  -------------------------------------------------------------------------------- /EWARM/Project.eww: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | $WS_DIR$\max30102.ewp 5 | 6 | 7 | 8 | -------------------------------------------------------------------------------- /EWARM/max30102/Exe/max30102.sim: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/EWARM/max30102/Exe/max30102.sim -------------------------------------------------------------------------------- /EWARM/max30102/Obj/main.pbi: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/EWARM/max30102/Obj/main.pbi -------------------------------------------------------------------------------- /EWARM/max30102/Obj/max30102.pbd: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/EWARM/max30102/Obj/max30102.pbd -------------------------------------------------------------------------------- /EWARM/max30102/Obj/stm32f1xx_hal_uart.o: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/EWARM/max30102/Obj/stm32f1xx_hal_uart.o -------------------------------------------------------------------------------- /EWARM/max30102/Obj/stm32f1xx_hal_uart.pbi: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/EWARM/max30102/Obj/stm32f1xx_hal_uart.pbi -------------------------------------------------------------------------------- /EWARM/settings/max30102.crun: -------------------------------------------------------------------------------- 1 | 2 | 3 | 1 4 | 5 | 6 | * 7 | * 8 | * 9 | 0 10 | 1 11 | 12 | 13 | 14 | -------------------------------------------------------------------------------- /EWARM/settings/max30102.dnx: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 0 5 | 1 6 | 90 7 | 1 8 | 1 9 | 1 10 | main 11 | 0 12 | 50 13 | 14 | 15 | 44092387 16 | 17 | 0 18 | 2 19 | _ 0 20 | _ 0 21 | 22 | 23 | 1681388089 24 | 25 | 26 | _ 0 27 | 28 | 29 | _ 0 30 | _ 0 31 | 32 | 33 | 0 34 | 35 | 36 | 0 37 | 72000000 38 | 0 39 | 2000000 40 | 2000000 41 | 36 42 | 0 43 | 0 44 | 1 45 | 15 46 | 0 47 | 0 48 | 0 49 | 0 50 | 0 51 | $PROJ_DIR$\ITM.log 52 | 53 | 54 | 1 55 | 0 56 | 57 | 58 | 0 59 | 0 60 | 61 | 62 | 0 63 | 0 64 | 0 65 | 0 66 | 0 67 | 0 68 | 0 69 | 0 70 | 71 | 72 | 0 73 | 0 74 | 1 75 | 0 76 | 1 77 | 78 | 79 | 0 80 | 0 81 | 1 82 | 0 83 | 1 84 | 0 85 | 86 | 87 | Ch3 88 | 0 0 1 89 | Ch2 90 | 0 0 1 91 | Ch1 92 | 0 0 1 93 | Ch0 94 | 0 0 1 95 | 0 96 | 0 97 | 1 98 | 0 99 | 1 100 | 0 101 | 102 | 103 | _ 0 104 | _ "" 105 | _ 0 106 | 107 | 108 | _ 0 109 | _ "" 110 | 111 | 112 | 0 113 | 3 114 | 0 115 | 0 116 | 117 | 118 | 119 | 0 120 | 121 | 122 | 1 123 | 124 | 125 | 0 126 | 127 | 128 | 0 129 | 130 | 131 | _ "E:\快盘\自学\STM32\f103\max30102\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c" "" 132 | _ "E:\快盘\自学\STM32\f103\max30102\Src\main.c" "" 133 | 2 134 | 0 135 | 136 | 137 | -------------------------------------------------------------------------------- /EWARM/settings/max30102.max30102.cspy.bat: -------------------------------------------------------------------------------- 1 | @REM This batch file has been generated by the IAR Embedded Workbench 2 | @REM C-SPY Debugger, as an aid to preparing a command line for running 3 | @REM the cspybat command line utility using the appropriate settings. 4 | @REM 5 | @REM Note that this file is generated every time a new debug session 6 | @REM is initialized, so you may want to move or rename the file before 7 | @REM making changes. 8 | @REM 9 | @REM You can launch cspybat by typing the name of this batch file followed 10 | @REM by the name of the debug file (usually an ELF/DWARF or UBROF file). 11 | @REM 12 | @REM Read about available command line parameters in the C-SPY Debugging 13 | @REM Guide. Hints about additional command line parameters that may be 14 | @REM useful in specific cases: 15 | @REM --download_only Downloads a code image without starting a debug 16 | @REM session afterwards. 17 | @REM --silent Omits the sign-on message. 18 | @REM --timeout Limits the maximum allowed execution time. 19 | @REM 20 | 21 | 22 | @echo off 23 | 24 | if not "%~1" == "" goto debugFile 25 | 26 | @echo on 27 | 28 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.general.xcl" --backend -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.driver.xcl" 29 | 30 | @echo off 31 | goto end 32 | 33 | :debugFile 34 | 35 | @echo on 36 | 37 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.general.xcl" "--debug_file=%~1" --backend -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.driver.xcl" 38 | 39 | @echo off 40 | :end -------------------------------------------------------------------------------- /EWARM/settings/max30102.max30102.cspy.ps1: -------------------------------------------------------------------------------- 1 | param([String]$debugfile = ""); 2 | 3 | # This powershell file has been generated by the IAR Embedded Workbench 4 | # C - SPY Debugger, as an aid to preparing a command line for running 5 | # the cspybat command line utility using the appropriate settings. 6 | # 7 | # Note that this file is generated every time a new debug session 8 | # is initialized, so you may want to move or rename the file before 9 | # making changes. 10 | # 11 | # You can launch cspybat by typing Powershell.exe -File followed by the name of this batch file, followed 12 | # by the name of the debug file (usually an ELF / DWARF or UBROF file). 13 | # 14 | # Read about available command line parameters in the C - SPY Debugging 15 | # Guide. Hints about additional command line parameters that may be 16 | # useful in specific cases : 17 | # --download_only Downloads a code image without starting a debug 18 | # session afterwards. 19 | # --silent Omits the sign - on message. 20 | # --timeout Limits the maximum allowed execution time. 21 | # 22 | 23 | 24 | if ($debugfile -eq "") 25 | { 26 | & "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.general.xcl" --backend -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.driver.xcl" 27 | } 28 | else 29 | { 30 | & "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\common\bin\cspybat" -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.general.xcl" --debug_file=$debugfile --backend -f "E:\Sync\Self-study\STM32\f103\max30102\EWARM\settings\max30102.max30102.driver.xcl" 31 | } 32 | -------------------------------------------------------------------------------- /EWARM/settings/max30102.max30102.driver.xcl: -------------------------------------------------------------------------------- 1 | "--endian=little" 2 | 3 | "--cpu=Cortex-M3" 4 | 5 | "--fpu=None" 6 | 7 | "-p" 8 | 9 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\CONFIG\debugger\ST\STM32F103C8.ddf" 10 | 11 | "--drv_verify_download" 12 | 13 | "--semihosting" 14 | 15 | "--device=STM32F103C8" 16 | 17 | "--drv_interface=SWD" 18 | 19 | "--stlink_reset_strategy=0,1" 20 | 21 | "--drv_swo_clock_setup=72000000,0,2000000" 22 | 23 | "--drv_catch_exceptions=0x000" 24 | 25 | "--drv_debug_ap=0" 26 | 27 | 28 | 29 | 30 | -------------------------------------------------------------------------------- /EWARM/settings/max30102.max30102.general.xcl: -------------------------------------------------------------------------------- 1 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll" 2 | 3 | "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armstlink2.dll" 4 | 5 | "E:\Sync\Self-study\STM32\f103\max30102\EWARM\max30102\Exe\max30102.out" 6 | 7 | --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armbat.dll" 8 | 9 | --device_macro "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\debugger\ST\STM32F1xx_XL.dmac" 10 | 11 | --flash_loader "C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\ST\FlashSTM32F10xx8.board" 12 | 13 | 14 | 15 | 16 | -------------------------------------------------------------------------------- /EWARM/stm32f103xb_flash.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x08000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /EWARM/stm32f103xb_sram.icf: -------------------------------------------------------------------------------- 1 | /*###ICF### Section handled by ICF editor, don't touch! ****/ 2 | /*-Editor annotation file-*/ 3 | /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ 4 | /*-Specials-*/ 5 | define symbol __ICFEDIT_intvec_start__ = 0x20000000; 6 | /*-Memory Regions-*/ 7 | define symbol __ICFEDIT_region_ROM_start__ = 0x20000000 ; 8 | define symbol __ICFEDIT_region_ROM_end__ = 0x200013FF; 9 | define symbol __ICFEDIT_region_RAM_start__ = 0x20001400; 10 | define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; 11 | /*-Sizes-*/ 12 | define symbol __ICFEDIT_size_cstack__ = 0x400; 13 | define symbol __ICFEDIT_size_heap__ = 0x200; 14 | /**** End of ICF editor section. ###ICF###*/ 15 | 16 | 17 | define memory mem with size = 4G; 18 | define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 19 | define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 20 | 21 | define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 22 | define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 23 | 24 | initialize by copy { readwrite }; 25 | do not initialize { section .noinit }; 26 | 27 | place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 28 | 29 | place in ROM_region { readonly }; 30 | place in RAM_region { readwrite, 31 | block CSTACK, block HEAP }; 32 | -------------------------------------------------------------------------------- /Inc/main.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : main.hpp 4 | * Description : This file contains the common defines of the application 5 | ****************************************************************************** 6 | ** This notice applies to any and all portions of this file 7 | * that are not between comment pairs USER CODE BEGIN and 8 | * USER CODE END. Other portions of this file, whether 9 | * inserted by the user or by software development tools 10 | * are owned by their respective copyright owners. 11 | * 12 | * COPYRIGHT(c) 2017 STMicroelectronics 13 | * 14 | * Redistribution and use in source and binary forms, with or without modification, 15 | * are permitted provided that the following conditions are met: 16 | * 1. Redistributions of source code must retain the above copyright notice, 17 | * this list of conditions and the following disclaimer. 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, 19 | * this list of conditions and the following disclaimer in the documentation 20 | * and/or other materials provided with the distribution. 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 22 | * may be used to endorse or promote products derived from this software 23 | * without specific prior written permission. 24 | * 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 | * 36 | ****************************************************************************** 37 | */ 38 | /* Define to prevent recursive inclusion -------------------------------------*/ 39 | #ifndef __MAIN_H 40 | #define __MAIN_H 41 | /* Includes ------------------------------------------------------------------*/ 42 | 43 | /* Includes ------------------------------------------------------------------*/ 44 | /* USER CODE BEGIN Includes */ 45 | /* USER CODE END Includes */ 46 | 47 | /* Private define ------------------------------------------------------------*/ 48 | 49 | #define MAX_SCK_Pin GPIO_PIN_10 50 | #define MAX_SCK_GPIO_Port GPIOB 51 | #define MAX_SDA_Pin GPIO_PIN_11 52 | #define MAX_SDA_GPIO_Port GPIOB 53 | #define OLED_SCK_Pin GPIO_PIN_6 54 | #define OLED_SCK_GPIO_Port GPIOB 55 | #define OLED_SDA_Pin GPIO_PIN_7 56 | #define OLED_SDA_GPIO_Port GPIOB 57 | 58 | /* ########################## Assert Selection ############################## */ 59 | /** 60 | * @brief Uncomment the line below to expanse the "assert_param" macro in the 61 | * HAL drivers code 62 | */ 63 | /* #define USE_FULL_ASSERT 1U */ 64 | 65 | /* USER CODE BEGIN Private defines */ 66 | 67 | 68 | /* USER CODE END Private defines */ 69 | 70 | #ifdef __cplusplus 71 | extern "C" { 72 | #endif 73 | void _Error_Handler(char *, int); 74 | 75 | #define Error_Handler() _Error_Handler(__FILE__, __LINE__) 76 | #ifdef __cplusplus 77 | } 78 | #endif 79 | 80 | /** 81 | * @} 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | #endif /* __MAIN_H */ 89 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 90 | -------------------------------------------------------------------------------- /Inc/max30102.h: -------------------------------------------------------------------------------- 1 | #ifndef __MAX_30102_H_ 2 | #define __MAX_30102_H_ 3 | 4 | #define MAX30102_INTERRUPT_STATUS_ALMOST_FULL 0x80 5 | #define MAX30102_INTERRUPT_STATUS_NEW_FIFO_DATA 0x40 6 | #define MAX30102_INTERRUPT_STATUS_ALC_OVF 0x20 7 | #define MAX30102_INTERRUPT_STATUS_PROX_INT 0x10 8 | #define MAX30102_INTERRUPT_STATUS_TEMPERATURE_READY 0x02 9 | #define MAX30102_INTERRUPT_STATUS_POWER_READY 0x01 10 | 11 | typedef struct samplestruct 12 | { 13 | uint32_t red; 14 | uint32_t iRed; 15 | } SAMPLE; 16 | 17 | void max30102_init(); 18 | uint8_t max30102_getUnreadSampleCount(); 19 | void max30102_getFIFO(SAMPLE *data, uint8_t sampleCount); 20 | uint8_t max30102_getStatus(); 21 | // float max30102_getTemperature(); 22 | void max30102_OFF(); 23 | void max30102_ON(); 24 | 25 | void max30102_cal(); 26 | uint8_t max30102_getHeartRate(); 27 | uint8_t max30102_getSpO2(); 28 | int16_t max30102_getDiff(); 29 | 30 | #endif -------------------------------------------------------------------------------- /Inc/oled.h: -------------------------------------------------------------------------------- 1 | #ifndef __OLED_H 2 | #define __OLED_H 3 | 4 | #define OLED_ADDR 0x78 5 | #define OLED_CMD 0 //写命令 6 | #define OLED_DATA 1 //写数据 7 | #define OLED_MODE 0 8 | //OLED模式设置 9 | //0:4线串行模式 10 | //1:并行8080模式 11 | 12 | 13 | 14 | //-----------------OLED端口定义---------------- 15 | 16 | void OLED_I2C_callBack(); 17 | 18 | //OLED控制用函数 19 | void OLED_WR_Byte(uint8_t dat, uint8_t cmd); 20 | // void OLED_Display_On(void); 21 | void OLED_Display_Off(void); 22 | void OLED_Init(void); 23 | void OLED_Clear(void); 24 | void OLED_ShowString(uint8_t x, uint8_t y, uint8_t *str); 25 | void OLED_Set_Pos(uint8_t x, uint8_t y); 26 | 27 | void OLED_showHeart(uint8_t showOrNot); 28 | void OLED_showNum(uint8_t which, uint8_t num); 29 | void OLED_drawChart(float value); 30 | 31 | #endif 32 | -------------------------------------------------------------------------------- /Inc/oledfont.h: -------------------------------------------------------------------------------- 1 | #ifndef __OLEDFONT_H 2 | #define __OLEDFONT_H 3 | //常用ASCII表 4 | //偏移量32 5 | //ASCII字符集 6 | //偏移量32 7 | //大小:12*6 8 | /************************************6*8的点阵************************************/ 9 | const unsigned char F6x8[][6] = { 10 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // sp 11 | 0x00, 0x00, 0x00, 0x2f, 0x00, 0x00, // ! 12 | 0x00, 0x00, 0x07, 0x00, 0x07, 0x00, // " 13 | 0x00, 0x14, 0x7f, 0x14, 0x7f, 0x14, // # 14 | 0x00, 0x24, 0x2a, 0x7f, 0x2a, 0x12, // $ 15 | 0x00, 0x62, 0x64, 0x08, 0x13, 0x23, // % 16 | 0x00, 0x36, 0x49, 0x55, 0x22, 0x50, // & 17 | 0x00, 0x00, 0x05, 0x03, 0x00, 0x00, // ' 18 | 0x00, 0x00, 0x1c, 0x22, 0x41, 0x00, // ( 19 | 0x00, 0x00, 0x41, 0x22, 0x1c, 0x00, // ) 20 | 0x00, 0x14, 0x08, 0x3E, 0x08, 0x14, // * 21 | 0x00, 0x08, 0x08, 0x3E, 0x08, 0x08, // + 22 | 0x00, 0x00, 0x00, 0xA0, 0x60, 0x00, // , 23 | 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, // - 24 | 0x00, 0x00, 0x60, 0x60, 0x00, 0x00, // . 25 | 0x00, 0x20, 0x10, 0x08, 0x04, 0x02, // / 26 | 0x00, 0x3E, 0x51, 0x49, 0x45, 0x3E, // 0 27 | 0x00, 0x00, 0x42, 0x7F, 0x40, 0x00, // 1 28 | 0x00, 0x42, 0x61, 0x51, 0x49, 0x46, // 2 29 | 0x00, 0x21, 0x41, 0x45, 0x4B, 0x31, // 3 30 | 0x00, 0x18, 0x14, 0x12, 0x7F, 0x10, // 4 31 | 0x00, 0x27, 0x45, 0x45, 0x45, 0x39, // 5 32 | 0x00, 0x3C, 0x4A, 0x49, 0x49, 0x30, // 6 33 | 0x00, 0x01, 0x71, 0x09, 0x05, 0x03, // 7 34 | 0x00, 0x36, 0x49, 0x49, 0x49, 0x36, // 8 35 | 0x00, 0x06, 0x49, 0x49, 0x29, 0x1E, // 9 36 | 0x00, 0x00, 0x36, 0x36, 0x00, 0x00, // : 37 | 0x00, 0x00, 0x56, 0x36, 0x00, 0x00, // ; 38 | 0x00, 0x08, 0x14, 0x22, 0x41, 0x00, // < 39 | 0x00, 0x14, 0x14, 0x14, 0x14, 0x14, // = 40 | 0x00, 0x00, 0x41, 0x22, 0x14, 0x08, // > 41 | 0x00, 0x02, 0x01, 0x51, 0x09, 0x06, // ? 42 | 0x00, 0x32, 0x49, 0x59, 0x51, 0x3E, // @ 43 | 0x00, 0x7C, 0x12, 0x11, 0x12, 0x7C, // A 44 | 0x00, 0x7F, 0x49, 0x49, 0x49, 0x36, // B 45 | 0x00, 0x3E, 0x41, 0x41, 0x41, 0x22, // C 46 | 0x00, 0x7F, 0x41, 0x41, 0x22, 0x1C, // D 47 | 0x00, 0x7F, 0x49, 0x49, 0x49, 0x41, // E 48 | 0x00, 0x7F, 0x09, 0x09, 0x09, 0x01, // F 49 | 0x00, 0x3E, 0x41, 0x49, 0x49, 0x7A, // G 50 | 0x00, 0x7F, 0x08, 0x08, 0x08, 0x7F, // H 51 | 0x00, 0x00, 0x41, 0x7F, 0x41, 0x00, // I 52 | 0x00, 0x20, 0x40, 0x41, 0x3F, 0x01, // J 53 | 0x00, 0x7F, 0x08, 0x14, 0x22, 0x41, // K 54 | 0x00, 0x7F, 0x40, 0x40, 0x40, 0x40, // L 55 | 0x00, 0x7F, 0x02, 0x0C, 0x02, 0x7F, // M 56 | 0x00, 0x7F, 0x04, 0x08, 0x10, 0x7F, // N 57 | 0x00, 0x3E, 0x41, 0x41, 0x41, 0x3E, // O 58 | 0x00, 0x7F, 0x09, 0x09, 0x09, 0x06, // P 59 | 0x00, 0x3E, 0x41, 0x51, 0x21, 0x5E, // Q 60 | 0x00, 0x7F, 0x09, 0x19, 0x29, 0x46, // R 61 | 0x00, 0x46, 0x49, 0x49, 0x49, 0x31, // S 62 | 0x00, 0x01, 0x01, 0x7F, 0x01, 0x01, // T 63 | 0x00, 0x3F, 0x40, 0x40, 0x40, 0x3F, // U 64 | 0x00, 0x1F, 0x20, 0x40, 0x20, 0x1F, // V 65 | 0x00, 0x3F, 0x40, 0x38, 0x40, 0x3F, // W 66 | 0x00, 0x63, 0x14, 0x08, 0x14, 0x63, // X 67 | 0x00, 0x07, 0x08, 0x70, 0x08, 0x07, // Y 68 | 0x00, 0x61, 0x51, 0x49, 0x45, 0x43, // Z 69 | 0x00, 0x00, 0x7F, 0x41, 0x41, 0x00, // [ 70 | 0x00, 0x55, 0x2A, 0x55, 0x2A, 0x55, // \ ; 71 | 0x00, 0x00, 0x41, 0x41, 0x7F, 0x00, // ] 72 | 0x00, 0x04, 0x02, 0x01, 0x02, 0x04, // ^ 73 | 0x00, 0x40, 0x40, 0x40, 0x40, 0x40, // _ 74 | 0x00, 0x00, 0x01, 0x02, 0x04, 0x00, // ' 75 | 0x00, 0x20, 0x54, 0x54, 0x54, 0x78, // a 76 | 0x00, 0x7F, 0x48, 0x44, 0x44, 0x38, // b 77 | 0x00, 0x38, 0x44, 0x44, 0x44, 0x20, // c 78 | 0x00, 0x38, 0x44, 0x44, 0x48, 0x7F, // d 79 | 0x00, 0x38, 0x54, 0x54, 0x54, 0x18, // e 80 | 0x00, 0x08, 0x7E, 0x09, 0x01, 0x02, // f 81 | 0x00, 0x18, 0xA4, 0xA4, 0xA4, 0x7C, // g 82 | 0x00, 0x7F, 0x08, 0x04, 0x04, 0x78, // h 83 | 0x00, 0x00, 0x44, 0x7D, 0x40, 0x00, // i 84 | 0x00, 0x40, 0x80, 0x84, 0x7D, 0x00, // j 85 | 0x00, 0x7F, 0x10, 0x28, 0x44, 0x00, // k 86 | 0x00, 0x00, 0x41, 0x7F, 0x40, 0x00, // l 87 | 0x00, 0x7C, 0x04, 0x18, 0x04, 0x78, // m 88 | 0x00, 0x7C, 0x08, 0x04, 0x04, 0x78, // n 89 | 0x00, 0x38, 0x44, 0x44, 0x44, 0x38, // o 90 | 0x00, 0xFC, 0x24, 0x24, 0x24, 0x18, // p 91 | 0x00, 0x18, 0x24, 0x24, 0x18, 0xFC, // q 92 | 0x00, 0x7C, 0x08, 0x04, 0x04, 0x08, // r 93 | 0x00, 0x48, 0x54, 0x54, 0x54, 0x20, // s 94 | 0x00, 0x04, 0x3F, 0x44, 0x40, 0x20, // t 95 | 0x00, 0x3C, 0x40, 0x40, 0x20, 0x7C, // u 96 | 0x00, 0x1C, 0x20, 0x40, 0x20, 0x1C, // v 97 | 0x00, 0x3C, 0x40, 0x30, 0x40, 0x3C, // w 98 | 0x00, 0x44, 0x28, 0x10, 0x28, 0x44, // x 99 | 0x00, 0x1C, 0xA0, 0xA0, 0xA0, 0x7C, // y 100 | 0x00, 0x44, 0x64, 0x54, 0x4C, 0x44, // z 101 | 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, // horiz lines 102 | }; 103 | 104 | #endif 105 | -------------------------------------------------------------------------------- /Inc/stm32f1xx_it.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_it.h 4 | * @brief This file contains the headers of the interrupt handlers. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2017 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | 34 | /* Define to prevent recursive inclusion -------------------------------------*/ 35 | #ifndef __STM32F1xx_IT_H 36 | #define __STM32F1xx_IT_H 37 | 38 | #ifdef __cplusplus 39 | extern "C" { 40 | #endif 41 | 42 | /* Includes ------------------------------------------------------------------*/ 43 | #include "stm32f1xx_hal.h" 44 | #include "main.h" 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* Exported functions ------------------------------------------------------- */ 49 | 50 | void NMI_Handler(void); 51 | void HardFault_Handler(void); 52 | void MemManage_Handler(void); 53 | void BusFault_Handler(void); 54 | void UsageFault_Handler(void); 55 | void SVC_Handler(void); 56 | void DebugMon_Handler(void); 57 | void PendSV_Handler(void); 58 | void SysTick_Handler(void); 59 | void I2C1_EV_IRQHandler(void); 60 | 61 | #ifdef __cplusplus 62 | } 63 | #endif 64 | 65 | #endif /* __STM32F1xx_IT_H */ 66 | 67 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 68 | -------------------------------------------------------------------------------- /Lib/ARM/arm_cortexM3b_math.lib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Lib/ARM/arm_cortexM3b_math.lib -------------------------------------------------------------------------------- /Lib/ARM/arm_cortexM3l_math.lib: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Lib/ARM/arm_cortexM3l_math.lib -------------------------------------------------------------------------------- /Lib/GCC/libarm_cortexM3l_math.a: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/julpage/stm32-max30102/b5481746849bba624d46f854e88caa1a678a6690/Lib/GCC/libarm_cortexM3l_math.a -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # stm32f103c8t6 max30102 with oled screen 2 | 3 | - project creat by stm32cubemx 4 | 5 | MCU IO | connect to 6 | ---|--- 7 | PA0(WAKE) | button for run and sleep 8 | PB6(I2C1_SCL) | oled screen SCL 9 | PB7(I2C1_SDA) | oled screen SDA 10 | PB10(I2C2_SCL) | max30102 SCL 11 | PB11(I2C2_SDA) | max30102 SDA 12 | PB12 | max30102 interrupt 13 | PC13 | led light 14 | 15 | 1. The heart rate calculation way is not very good and waste a lot ram. But it works, so...whatever. 16 | 2. I use the infrared brightness data to calculate the heart rate, so if your finger is cold, it can't work well. You can use the red light data to calculate by changing "sampleBuffTemp[i].iRed" to "sampleBuffTemp[i].Red" (line 221 and 238 in file max30102.c). 17 | 3. The max30102 module I bought it from the internet. The pull-up resistors are connect to 1.8v and the I2C bus instability. So if you encounter the same situation, just kick them off and pull-up those pin to 5v or 3.3v on the other way. 18 | 19 | --- 20 | 21 | 1. 心率计算方式写得不是很严谨，而且占不少内存，反正它能用，无所谓啦。 22 | 2. 计算心率用的是红外的数据，所以当你的手指比较冷的时候它是测不出来的。你可以把max30102.c文件里第221、238行的 sampleBuffTemp[i].iRed 改成 sampleBuffTemp[i].Red，用红光数据，虽然这样也不怎么测得出。 23 | 3. max30102是从淘宝买的模块，它引脚的上拉电阻只是接到了1.8v，所以如果你也是用那种模块，请把它自带的上拉电阻抠掉，另外上拉到5v或3.3v。 24 | 25 | --- 26 | ![avatar](1.jpg) 27 | --- 28 | 29 | 参考了以下两篇论文 30 | Reference these two paper 31 | 32 | 1. [血氧饱和度检测技术研究-方启超](http://kns.cnki.net/KCMS/detail/detail.aspx?dbcode=CMFD&dbname=CMFD201302&filename=1013166432.nh&uid=WEEvREcwSlJHSldRa1FhdkJkVWI2cEg1MXdhY3ZWejRHVGZ0NDFhZ3RyRT0=$9A4hF_YAuvQ5obgVAqNKPCYcEjKensW4ggI8Fm4gTkoUKaID8j8gFw!!&v=MDkwMTFQclpFYlBJUjhlWDFMdXhZUzdEaDFUM3FUcldNMUZyQ1VSTEtmWmVacUZDdmxXcnpJVkYyNkhiSytHTlg=) 33 | 2. [基于C8051F021单片机的脉搏血氧饱和度测量仪的研制](http://kns.cnki.net/KCMS/detail/detail.aspx?dbcode=CMFD&dbname=CMFD2010&filename=2009213547.nh&uid=WEEvREcwSlJHSldRa1FhdkJkVWI2cEg1MXdhY3ZWejRHVGZ0NDFhZ3RyRT0=$9A4hF_YAuvQ5obgVAqNKPCYcEjKensW4ggI8Fm4gTkoUKaID8j8gFw!!&v=MTgxNzdick9WMTI3RjdHNUhkVElxSkViUElSOGVYMUx1eFlTN0RoMVQzcVRyV00xRnJDVVJMS2ZaZVpxRkN2bFY=) 34 | 35 | --- 36 | 37 | callnowyeah@yeah.net 38 | 39 | -------------------------------------------------------------------------------- /Src/stm32f1xx_hal_msp.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * File Name : stm32f1xx_hal_msp.c 4 | * Description : This file provides code for the MSP Initialization 5 | * and de-Initialization codes. 6 | ****************************************************************************** 7 | ** This notice applies to any and all portions of this file 8 | * that are not between comment pairs USER CODE BEGIN and 9 | * USER CODE END. Other portions of this file, whether 10 | * inserted by the user or by software development tools 11 | * are owned by their respective copyright owners. 12 | * 13 | * COPYRIGHT(c) 2017 STMicroelectronics 14 | * 15 | * Redistribution and use in source and binary forms, with or without modification, 16 | * are permitted provided that the following conditions are met: 17 | * 1. Redistributions of source code must retain the above copyright notice, 18 | * this list of conditions and the following disclaimer. 19 | * 2. Redistributions in binary form must reproduce the above copyright notice, 20 | * this list of conditions and the following disclaimer in the documentation 21 | * and/or other materials provided with the distribution. 22 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 23 | * may be used to endorse or promote products derived from this software 24 | * without specific prior written permission. 25 | * 26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 27 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 29 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 30 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 33 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 34 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 | * 37 | ****************************************************************************** 38 | */ 39 | /* Includes ------------------------------------------------------------------*/ 40 | #include "stm32f1xx_hal.h" 41 | 42 | extern void _Error_Handler(char *, int); 43 | /* USER CODE BEGIN 0 */ 44 | 45 | /* USER CODE END 0 */ 46 | /** 47 | * Initializes the Global MSP. 48 | */ 49 | void HAL_MspInit(void) 50 | { 51 | /* USER CODE BEGIN MspInit 0 */ 52 | 53 | /* USER CODE END MspInit 0 */ 54 | 55 | __HAL_RCC_AFIO_CLK_ENABLE(); 56 | 57 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 58 | 59 | /* System interrupt init*/ 60 | /* MemoryManagement_IRQn interrupt configuration */ 61 | HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); 62 | /* BusFault_IRQn interrupt configuration */ 63 | HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); 64 | /* UsageFault_IRQn interrupt configuration */ 65 | HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); 66 | /* SVCall_IRQn interrupt configuration */ 67 | HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); 68 | /* DebugMonitor_IRQn interrupt configuration */ 69 | HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); 70 | /* PendSV_IRQn interrupt configuration */ 71 | HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); 72 | /* SysTick_IRQn interrupt configuration */ 73 | HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); 74 | 75 | /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled 76 | */ 77 | __HAL_AFIO_REMAP_SWJ_NOJTAG(); 78 | 79 | /* USER CODE BEGIN MspInit 1 */ 80 | 81 | /* USER CODE END MspInit 1 */ 82 | } 83 | 84 | void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) 85 | { 86 | 87 | GPIO_InitTypeDef GPIO_InitStruct; 88 | if(hi2c->Instance==I2C1) 89 | { 90 | /* USER CODE BEGIN I2C1_MspInit 0 */ 91 | 92 | /* USER CODE END I2C1_MspInit 0 */ 93 | 94 | /**I2C1 GPIO Configuration 95 | PB6 ------> I2C1_SCL 96 | PB7 ------> I2C1_SDA 97 | */ 98 | GPIO_InitStruct.Pin = OLED_SCK_Pin|OLED_SDA_Pin; 99 | GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 100 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 101 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 102 | 103 | /* Peripheral clock enable */ 104 | __HAL_RCC_I2C1_CLK_ENABLE(); 105 | /* USER CODE BEGIN I2C1_MspInit 1 */ 106 | 107 | /* USER CODE END I2C1_MspInit 1 */ 108 | } 109 | else if(hi2c->Instance==I2C2) 110 | { 111 | /* USER CODE BEGIN I2C2_MspInit 0 */ 112 | 113 | /* USER CODE END I2C2_MspInit 0 */ 114 | 115 | /**I2C2 GPIO Configuration 116 | PB10 ------> I2C2_SCL 117 | PB11 ------> I2C2_SDA 118 | */ 119 | GPIO_InitStruct.Pin = MAX_SCK_Pin|MAX_SDA_Pin; 120 | GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 121 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; 122 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 123 | 124 | /* Peripheral clock enable */ 125 | __HAL_RCC_I2C2_CLK_ENABLE(); 126 | /* USER CODE BEGIN I2C2_MspInit 1 */ 127 | 128 | /* USER CODE END I2C2_MspInit 1 */ 129 | } 130 | 131 | } 132 | 133 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c) 134 | { 135 | 136 | if(hi2c->Instance==I2C1) 137 | { 138 | /* USER CODE BEGIN I2C1_MspDeInit 0 */ 139 | 140 | /* USER CODE END I2C1_MspDeInit 0 */ 141 | /* Peripheral clock disable */ 142 | __HAL_RCC_I2C1_CLK_DISABLE(); 143 | 144 | /**I2C1 GPIO Configuration 145 | PB6 ------> I2C1_SCL 146 | PB7 ------> I2C1_SDA 147 | */ 148 | HAL_GPIO_DeInit(GPIOB, OLED_SCK_Pin|OLED_SDA_Pin); 149 | 150 | /* I2C1 interrupt DeInit */ 151 | HAL_NVIC_DisableIRQ(I2C1_EV_IRQn); 152 | /* USER CODE BEGIN I2C1_MspDeInit 1 */ 153 | 154 | /* USER CODE END I2C1_MspDeInit 1 */ 155 | } 156 | else if(hi2c->Instance==I2C2) 157 | { 158 | /* USER CODE BEGIN I2C2_MspDeInit 0 */ 159 | 160 | /* USER CODE END I2C2_MspDeInit 0 */ 161 | /* Peripheral clock disable */ 162 | __HAL_RCC_I2C2_CLK_DISABLE(); 163 | 164 | /**I2C2 GPIO Configuration 165 | PB10 ------> I2C2_SCL 166 | PB11 ------> I2C2_SDA 167 | */ 168 | HAL_GPIO_DeInit(GPIOB, MAX_SCK_Pin|MAX_SDA_Pin); 169 | 170 | /* USER CODE BEGIN I2C2_MspDeInit 1 */ 171 | 172 | /* USER CODE END I2C2_MspDeInit 1 */ 173 | } 174 | 175 | } 176 | 177 | /* USER CODE BEGIN 1 */ 178 | 179 | /* USER CODE END 1 */ 180 | 181 | /** 182 | * @} 183 | */ 184 | 185 | /** 186 | * @} 187 | */ 188 | 189 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 190 | -------------------------------------------------------------------------------- /Src/stm32f1xx_it.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f1xx_it.c 4 | * @brief Interrupt Service Routines. 5 | ****************************************************************************** 6 | * 7 | * COPYRIGHT(c) 2017 STMicroelectronics 8 | * 9 | * Redistribution and use in source and binary forms, with or without modification, 10 | * are permitted provided that the following conditions are met: 11 | * 1. Redistributions of source code must retain the above copyright notice, 12 | * this list of conditions and the following disclaimer. 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, 14 | * this list of conditions and the following disclaimer in the documentation 15 | * and/or other materials provided with the distribution. 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors 17 | * may be used to endorse or promote products derived from this software 18 | * without specific prior written permission. 19 | * 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 | * 31 | ****************************************************************************** 32 | */ 33 | /* Includes ------------------------------------------------------------------*/ 34 | #include "stm32f1xx_hal.h" 35 | #include "stm32f1xx.h" 36 | #include "stm32f1xx_it.h" 37 | 38 | /* USER CODE BEGIN 0 */ 39 | #include "max30102.h" 40 | /* USER CODE END 0 */ 41 | 42 | /* External variables --------------------------------------------------------*/ 43 | extern I2C_HandleTypeDef hi2c1; 44 | 45 | /******************************************************************************/ 46 | /* Cortex-M3 Processor Interruption and Exception Handlers */ 47 | /******************************************************************************/ 48 | 49 | /** 50 | * @brief This function handles Non maskable interrupt. 51 | */ 52 | void NMI_Handler(void) 53 | { 54 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 55 | 56 | /* USER CODE END NonMaskableInt_IRQn 0 */ 57 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 58 | 59 | /* USER CODE END NonMaskableInt_IRQn 1 */ 60 | } 61 | 62 | /** 63 | * @brief This function handles Hard fault interrupt. 64 | */ 65 | void HardFault_Handler(void) 66 | { 67 | /* USER CODE BEGIN HardFault_IRQn 0 */ 68 | 69 | /* USER CODE END HardFault_IRQn 0 */ 70 | while (1) 71 | { 72 | } 73 | /* USER CODE BEGIN HardFault_IRQn 1 */ 74 | 75 | /* USER CODE END HardFault_IRQn 1 */ 76 | } 77 | 78 | /** 79 | * @brief This function handles Memory management fault. 80 | */ 81 | void MemManage_Handler(void) 82 | { 83 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 84 | 85 | /* USER CODE END MemoryManagement_IRQn 0 */ 86 | while (1) 87 | { 88 | } 89 | /* USER CODE BEGIN MemoryManagement_IRQn 1 */ 90 | 91 | /* USER CODE END MemoryManagement_IRQn 1 */ 92 | } 93 | 94 | /** 95 | * @brief This function handles Prefetch fault, memory access fault. 96 | */ 97 | void BusFault_Handler(void) 98 | { 99 | /* USER CODE BEGIN BusFault_IRQn 0 */ 100 | 101 | /* USER CODE END BusFault_IRQn 0 */ 102 | while (1) 103 | { 104 | } 105 | /* USER CODE BEGIN BusFault_IRQn 1 */ 106 | 107 | /* USER CODE END BusFault_IRQn 1 */ 108 | } 109 | 110 | /** 111 | * @brief This function handles Undefined instruction or illegal state. 112 | */ 113 | void UsageFault_Handler(void) 114 | { 115 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 116 | 117 | /* USER CODE END UsageFault_IRQn 0 */ 118 | while (1) 119 | { 120 | } 121 | /* USER CODE BEGIN UsageFault_IRQn 1 */ 122 | 123 | /* USER CODE END UsageFault_IRQn 1 */ 124 | } 125 | 126 | /** 127 | * @brief This function handles System service call via SWI instruction. 128 | */ 129 | void SVC_Handler(void) 130 | { 131 | /* USER CODE BEGIN SVCall_IRQn 0 */ 132 | 133 | /* USER CODE END SVCall_IRQn 0 */ 134 | /* USER CODE BEGIN SVCall_IRQn 1 */ 135 | 136 | /* USER CODE END SVCall_IRQn 1 */ 137 | } 138 | 139 | /** 140 | * @brief This function handles Debug monitor. 141 | */ 142 | void DebugMon_Handler(void) 143 | { 144 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 145 | 146 | /* USER CODE END DebugMonitor_IRQn 0 */ 147 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 148 | 149 | /* USER CODE END DebugMonitor_IRQn 1 */ 150 | } 151 | 152 | /** 153 | * @brief This function handles Pendable request for system service. 154 | */ 155 | void PendSV_Handler(void) 156 | { 157 | /* USER CODE BEGIN PendSV_IRQn 0 */ 158 | 159 | /* USER CODE END PendSV_IRQn 0 */ 160 | /* USER CODE BEGIN PendSV_IRQn 1 */ 161 | 162 | /* USER CODE END PendSV_IRQn 1 */ 163 | } 164 | 165 | /** 166 | * @brief This function handles System tick timer. 167 | */ 168 | void SysTick_Handler(void) 169 | { 170 | /* USER CODE BEGIN SysTick_IRQn 0 */ 171 | 172 | /* USER CODE END SysTick_IRQn 0 */ 173 | HAL_IncTick(); 174 | HAL_SYSTICK_IRQHandler(); 175 | /* USER CODE BEGIN SysTick_IRQn 1 */ 176 | 177 | /* USER CODE END SysTick_IRQn 1 */ 178 | } 179 | 180 | /******************************************************************************/ 181 | /* STM32F1xx Peripheral Interrupt Handlers */ 182 | /* Add here the Interrupt Handlers for the used peripherals. */ 183 | /* For the available peripheral interrupt handler names, */ 184 | /* please refer to the startup file (startup_stm32f1xx.s). */ 185 | /******************************************************************************/ 186 | 187 | /** 188 | * @brief This function handles I2C1 event interrupt. 189 | */ 190 | void I2C1_EV_IRQHandler(void) 191 | { 192 | /* USER CODE BEGIN I2C1_EV_IRQn 0 */ 193 | 194 | /* USER CODE END I2C1_EV_IRQn 0 */ 195 | HAL_I2C_EV_IRQHandler(&hi2c1); 196 | /* USER CODE BEGIN I2C1_EV_IRQn 1 */ 197 | 198 | /* USER CODE END I2C1_EV_IRQn 1 */ 199 | } 200 | 201 | /* USER CODE BEGIN 1 */ 202 | 203 | /* USER CODE END 1 */ 204 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 205 | -------------------------------------------------------------------------------- /max30102.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | File.Version=6 3 | I2C1.DutyCycle=I2C_DUTYCYCLE_16_9 4 | I2C1.I2C_Mode=I2C_Fast 5 | I2C1.IPParameters=I2C_Mode,DutyCycle 6 | I2C2.DutyCycle=I2C_DUTYCYCLE_16_9 7 | I2C2.I2C_Mode=I2C_Fast 8 | I2C2.IPParameters=I2C_Mode,DutyCycle 9 | KeepUserPlacement=false 10 | Mcu.Family=STM32F1 11 | Mcu.IP0=I2C1 12 | Mcu.IP1=I2C2 13 | Mcu.IP2=NVIC 14 | Mcu.IP3=RCC 15 | Mcu.IP4=SYS 16 | Mcu.IP5=USART1 17 | Mcu.IPNb=6 18 | Mcu.Name=STM32F103C(8-B)Tx 19 | Mcu.Package=LQFP48 20 | Mcu.Pin0=PC13-TAMPER-RTC 21 | Mcu.Pin1=PC14-OSC32_IN 22 | Mcu.Pin10=PA10 23 | Mcu.Pin11=PA13 24 | Mcu.Pin12=PA14 25 | Mcu.Pin13=PB6 26 | Mcu.Pin14=PB7 27 | Mcu.Pin15=VP_SYS_VS_Systick 28 | Mcu.Pin2=PC15-OSC32_OUT 29 | Mcu.Pin3=PD0-OSC_IN 30 | Mcu.Pin4=PD1-OSC_OUT 31 | Mcu.Pin5=PA0-WKUP 32 | Mcu.Pin6=PB10 33 | Mcu.Pin7=PB11 34 | Mcu.Pin8=PB12 35 | Mcu.Pin9=PA9 36 | Mcu.PinsNb=16 37 | Mcu.UserConstants= 38 | Mcu.UserName=STM32F103C8Tx 39 | MxCube.Version=4.23.0 40 | MxDb.Version=DB.4.0.230 41 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false 42 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false 43 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false 44 | NVIC.I2C1_EV_IRQn=true\:1\:0\:true\:true\:true\:1\:true 45 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false 46 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false 47 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false 48 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 49 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false 50 | NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false 51 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false 52 | PA0-WKUP.Locked=true 53 | PA0-WKUP.Mode=SYS_WakeUp0 54 | PA0-WKUP.Signal=SYS_WKUP 55 | PA10.Mode=Asynchronous 56 | PA10.Signal=USART1_RX 57 | PA13.Locked=true 58 | PA13.Mode=Serial_Wire 59 | PA13.Signal=SYS_JTMS-SWDIO 60 | PA14.Locked=true 61 | PA14.Mode=Serial_Wire 62 | PA14.Signal=SYS_JTCK-SWCLK 63 | PA9.Mode=Asynchronous 64 | PA9.Signal=USART1_TX 65 | PB10.GPIOParameters=GPIO_Label 66 | PB10.GPIO_Label=MAX_SCK 67 | PB10.Mode=I2C 68 | PB10.Signal=I2C2_SCL 69 | PB11.GPIOParameters=GPIO_Label 70 | PB11.GPIO_Label=MAX_SDA 71 | PB11.Mode=I2C 72 | PB11.Signal=I2C2_SDA 73 | PB12.GPIOParameters=GPIO_PuPd 74 | PB12.GPIO_PuPd=GPIO_PULLUP 75 | PB12.Locked=true 76 | PB12.Signal=GPIO_Input 77 | PB6.GPIOParameters=GPIO_Label 78 | PB6.GPIO_Label=OLED_SCK 79 | PB6.Mode=I2C 80 | PB6.Signal=I2C1_SCL 81 | PB7.GPIOParameters=GPIO_Label 82 | PB7.GPIO_Label=OLED_SDA 83 | PB7.Mode=I2C 84 | PB7.Signal=I2C1_SDA 85 | PC13-TAMPER-RTC.GPIOParameters=GPIO_Speed,PinState,GPIO_ModeDefaultOutputPP 86 | PC13-TAMPER-RTC.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP 87 | PC13-TAMPER-RTC.GPIO_Speed=GPIO_SPEED_FREQ_HIGH 88 | PC13-TAMPER-RTC.Locked=true 89 | PC13-TAMPER-RTC.PinState=GPIO_PIN_SET 90 | PC13-TAMPER-RTC.Signal=GPIO_Output 91 | PC14-OSC32_IN.Mode=LSE-External-Oscillator 92 | PC14-OSC32_IN.Signal=RCC_OSC32_IN 93 | PC15-OSC32_OUT.Mode=LSE-External-Oscillator 94 | PC15-OSC32_OUT.Signal=RCC_OSC32_OUT 95 | PCC.Checker=false 96 | PCC.Line=STM32F103 97 | PCC.MCU=STM32F103C(8-B)Tx 98 | PCC.PartNumber=STM32F103C8Tx 99 | PCC.Seq0=0 100 | PCC.Series=STM32F1 101 | PCC.Temperature=25 102 | PCC.Vdd=3.3 103 | PD0-OSC_IN.Mode=HSE-External-Oscillator 104 | PD0-OSC_IN.Signal=RCC_OSC_IN 105 | PD1-OSC_OUT.Mode=HSE-External-Oscillator 106 | PD1-OSC_OUT.Signal=RCC_OSC_OUT 107 | PinOutPanel.RotationAngle=0 108 | ProjectManager.AskForMigrate=true 109 | ProjectManager.BackupPrevious=false 110 | ProjectManager.CompilerOptimize=2 111 | ProjectManager.ComputerToolchain=false 112 | ProjectManager.CoupleFile=false 113 | ProjectManager.CustomerFirmwarePackage=C\:/Users/jasoji/STM32Cube/Repository/STM32Cube_FW_F1_V1.6.0 114 | ProjectManager.DefaultFWLocation=true 115 | ProjectManager.DeletePrevious=true 116 | ProjectManager.DeviceId=STM32F103C8Tx 117 | ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.6.0 118 | ProjectManager.FreePins=false 119 | ProjectManager.HalAssertFull=false 120 | ProjectManager.HeapSize=0x200 121 | ProjectManager.KeepUserCode=true 122 | ProjectManager.LastFirmware=true 123 | ProjectManager.LibraryCopy=0 124 | ProjectManager.PreviousToolchain= 125 | ProjectManager.ProjectBuild=false 126 | ProjectManager.ProjectFileName=max30102.ioc 127 | ProjectManager.ProjectName=max30102 128 | ProjectManager.StackSize=0x400 129 | ProjectManager.TargetToolchain=EWARM 130 | ProjectManager.ToolChainLocation= 131 | ProjectManager.UnderRoot=false 132 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL,2-SystemClock_Config-RCC-false-HAL,3-MX_I2C1_Init-I2C1-false-HAL,4-MX_I2C2_Init-I2C2-false-HAL,5-MX_USART1_UART_Init-USART1-false-HAL 133 | RCC.ADCFreqValue=36000000 134 | RCC.AHBFreq_Value=72000000 135 | RCC.APB1CLKDivider=RCC_HCLK_DIV2 136 | RCC.APB1Freq_Value=36000000 137 | RCC.APB1TimFreq_Value=72000000 138 | RCC.APB2Freq_Value=72000000 139 | RCC.APB2TimFreq_Value=72000000 140 | RCC.FCLKCortexFreq_Value=72000000 141 | RCC.FamilyName=M 142 | RCC.HCLKFreq_Value=72000000 143 | RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,PLLSourceVirtual,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value 144 | RCC.MCOFreq_Value=72000000 145 | RCC.PLLCLKFreq_Value=72000000 146 | RCC.PLLMCOFreq_Value=36000000 147 | RCC.PLLMUL=RCC_PLL_MUL9 148 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE 149 | RCC.SYSCLKFreq_VALUE=72000000 150 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 151 | RCC.TimSysFreq_Value=72000000 152 | RCC.USBFreq_Value=72000000 153 | RCC.VCOOutput2Freq_Value=8000000 154 | USART1.IPParameters=VirtualMode 155 | USART1.VirtualMode=VM_ASYNC 156 | VP_SYS_VS_Systick.Mode=SysTick 157 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 158 | board=max30102 159 | -------------------------------------------------------------------------------- /mx.scratch: -------------------------------------------------------------------------------- 1 | 2 | 3 | E:\Sync\Self-study\STM32\f103\max30102\\max30102 4 | ..\Drivers\CMSIS 5 | C:\Users\jasoji\STM32Cube\Repository\STM32Cube_FW_F1_V1.6.0\Drivers\CMSIS 6 | 7 | EWARM 8 | 0 9 | 0 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | max30102 27 | STM32F103C8Tx 28 | 0x200 29 | 0x400 30 | 31 | 72 32 | custom 33 | 34 | true 35 | swd 36 | 37 | 0 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | USE_FULL_LL_DRIVER 56 | MBEDTLS_CONFIG_FILE="mbedtls_config.h" 57 | _TIMEVAL_DEFINED 58 | _SYS_TIME_H_ 59 | 60 | 61 | 62 | 63 | ..\Inc 64 | ..\Drivers\STM32F1xx_HAL_Driver\Inc 65 | ..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy 66 | ..\Drivers\CMSIS\Device\ST\STM32F1xx\Include 67 | ..\Drivers\CMSIS\Include 68 | 69 | 70 | 71 | 72 | 73 | false 74 | 75 | 76 | Drivers 77 | 78 | STM32F1xx_HAL_Driver 79 | 80 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c 81 | 82 | 83 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c 84 | 85 | 86 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c 87 | 88 | 89 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c 90 | 91 | 92 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c 93 | 94 | 95 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c 96 | 97 | 98 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c 99 | 100 | 101 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c 102 | 103 | 104 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c 105 | 106 | 107 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c 108 | 109 | 110 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c 111 | 112 | 113 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c 114 | 115 | 116 | ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c 117 | 118 | 119 | 120 | CMSIS 121 | 122 | ../Src/system_stm32f1xx.c 123 | 124 | 125 | 126 | 127 | Application 128 | 129 | User 130 | 131 | ..\Src\main.c 132 | 133 | 134 | 135 | ..\Src\stm32f1xx_it.c 136 | 137 | 138 | 139 | ..\Src\stm32f1xx_hal_msp.c 140 | 141 | 142 | 143 | 144 | 145 | 146 | 147 | 148 | --------------------------------------------------------------------------------