├── .mxproject ├── BSP ├── inc │ ├── bsp_debug_usart.h │ ├── common.h │ └── ymodem.h └── src │ ├── bsp_debug_usart.c │ ├── common.c │ ├── download.c │ ├── upload.c │ └── ymodem.c ├── Boot-STM32F103C8.ioc ├── Drivers ├── CMSIS │ ├── DSP_Lib │ │ └── Source │ │ │ ├── BasicMathFunctions │ │ │ ├── arm_abs_f32.c │ │ │ ├── arm_abs_q15.c │ │ │ ├── arm_abs_q31.c │ │ │ ├── arm_abs_q7.c │ │ │ ├── arm_add_f32.c │ │ │ ├── arm_add_q15.c │ │ │ ├── arm_add_q31.c │ │ │ ├── arm_add_q7.c │ │ │ ├── arm_dot_prod_f32.c │ │ │ ├── arm_dot_prod_q15.c │ │ │ ├── arm_dot_prod_q31.c │ │ │ ├── arm_dot_prod_q7.c │ │ │ ├── arm_mult_f32.c │ │ │ ├── arm_mult_q15.c │ │ │ ├── arm_mult_q31.c │ │ │ ├── arm_mult_q7.c │ │ │ ├── arm_negate_f32.c │ │ │ ├── arm_negate_q15.c │ │ │ ├── arm_negate_q31.c │ │ │ ├── arm_negate_q7.c │ │ │ ├── arm_offset_f32.c │ │ │ ├── arm_offset_q15.c │ │ │ ├── arm_offset_q31.c │ │ │ ├── arm_offset_q7.c │ │ │ ├── arm_scale_f32.c │ │ │ ├── arm_scale_q15.c │ │ │ ├── arm_scale_q31.c │ │ │ ├── arm_scale_q7.c │ │ │ ├── arm_shift_q15.c │ │ │ ├── arm_shift_q31.c │ │ │ ├── arm_shift_q7.c │ │ │ ├── arm_sub_f32.c │ │ │ ├── arm_sub_q15.c │ │ │ ├── arm_sub_q31.c │ │ │ └── arm_sub_q7.c │ │ │ ├── CommonTables │ │ │ ├── arm_common_tables.c │ │ │ └── arm_const_structs.c │ │ │ ├── ComplexMathFunctions │ │ │ ├── arm_cmplx_conj_f32.c │ │ │ ├── arm_cmplx_conj_q15.c │ │ │ ├── arm_cmplx_conj_q31.c │ │ │ ├── arm_cmplx_dot_prod_f32.c │ │ │ ├── arm_cmplx_dot_prod_q15.c │ │ │ ├── arm_cmplx_dot_prod_q31.c │ │ │ ├── arm_cmplx_mag_f32.c │ │ │ ├── arm_cmplx_mag_q15.c │ │ │ ├── arm_cmplx_mag_q31.c │ │ │ ├── arm_cmplx_mag_squared_f32.c │ │ │ ├── arm_cmplx_mag_squared_q15.c │ │ │ ├── arm_cmplx_mag_squared_q31.c │ │ │ ├── arm_cmplx_mult_cmplx_f32.c │ │ │ ├── arm_cmplx_mult_cmplx_q15.c │ │ │ ├── arm_cmplx_mult_cmplx_q31.c │ │ │ ├── arm_cmplx_mult_real_f32.c │ │ │ ├── arm_cmplx_mult_real_q15.c │ │ │ └── arm_cmplx_mult_real_q31.c │ │ │ ├── ControllerFunctions │ │ │ ├── arm_pid_init_f32.c │ │ │ ├── arm_pid_init_q15.c │ │ │ ├── arm_pid_init_q31.c │ │ │ ├── arm_pid_reset_f32.c │ │ │ ├── arm_pid_reset_q15.c │ │ │ ├── arm_pid_reset_q31.c │ │ │ ├── arm_sin_cos_f32.c │ │ │ └── arm_sin_cos_q31.c │ │ │ ├── FastMathFunctions │ │ │ ├── arm_cos_f32.c │ │ │ ├── arm_cos_q15.c │ │ │ ├── arm_cos_q31.c │ │ │ ├── arm_sin_f32.c │ │ │ ├── arm_sin_q15.c │ │ │ ├── arm_sin_q31.c │ │ │ ├── arm_sqrt_q15.c │ │ │ └── arm_sqrt_q31.c │ │ │ ├── FilteringFunctions │ │ │ ├── arm_biquad_cascade_df1_32x64_init_q31.c │ │ │ ├── arm_biquad_cascade_df1_32x64_q31.c │ │ │ ├── arm_biquad_cascade_df1_f32.c │ │ │ ├── arm_biquad_cascade_df1_fast_q15.c │ │ │ ├── arm_biquad_cascade_df1_fast_q31.c │ │ │ ├── arm_biquad_cascade_df1_init_f32.c │ │ │ ├── arm_biquad_cascade_df1_init_q15.c │ │ │ ├── arm_biquad_cascade_df1_init_q31.c │ │ │ ├── arm_biquad_cascade_df1_q15.c │ │ │ ├── arm_biquad_cascade_df1_q31.c │ │ │ ├── arm_biquad_cascade_df2T_f32.c │ │ │ ├── arm_biquad_cascade_df2T_f64.c │ │ │ ├── arm_biquad_cascade_df2T_init_f32.c │ │ │ ├── arm_biquad_cascade_df2T_init_f64.c │ │ │ ├── arm_biquad_cascade_stereo_df2T_f32.c │ │ │ ├── arm_biquad_cascade_stereo_df2T_init_f32.c │ │ │ ├── arm_conv_f32.c │ │ │ ├── arm_conv_fast_opt_q15.c │ │ │ ├── arm_conv_fast_q15.c │ │ │ ├── arm_conv_fast_q31.c │ │ │ ├── arm_conv_opt_q15.c │ │ │ ├── arm_conv_opt_q7.c │ │ │ ├── arm_conv_partial_f32.c │ │ │ ├── arm_conv_partial_fast_opt_q15.c │ │ │ ├── arm_conv_partial_fast_q15.c │ │ │ ├── arm_conv_partial_fast_q31.c │ │ │ ├── arm_conv_partial_opt_q15.c │ │ │ ├── arm_conv_partial_opt_q7.c │ │ │ ├── arm_conv_partial_q15.c │ │ │ ├── arm_conv_partial_q31.c │ │ │ ├── arm_conv_partial_q7.c │ │ │ ├── arm_conv_q15.c │ │ │ ├── arm_conv_q31.c │ │ │ ├── arm_conv_q7.c │ │ │ ├── arm_correlate_f32.c │ │ │ ├── arm_correlate_fast_opt_q15.c │ │ │ ├── arm_correlate_fast_q15.c │ │ │ ├── arm_correlate_fast_q31.c │ │ │ ├── arm_correlate_opt_q15.c │ │ │ ├── arm_correlate_opt_q7.c │ │ │ ├── arm_correlate_q15.c │ │ │ ├── arm_correlate_q31.c │ │ │ ├── arm_correlate_q7.c │ │ │ ├── arm_fir_decimate_f32.c │ │ │ ├── arm_fir_decimate_fast_q15.c │ │ │ ├── arm_fir_decimate_fast_q31.c │ │ │ ├── arm_fir_decimate_init_f32.c │ │ │ ├── arm_fir_decimate_init_q15.c │ │ │ ├── arm_fir_decimate_init_q31.c │ │ │ ├── arm_fir_decimate_q15.c │ │ │ ├── arm_fir_decimate_q31.c │ │ │ ├── arm_fir_f32.c │ │ │ ├── arm_fir_fast_q15.c │ │ │ ├── arm_fir_fast_q31.c │ │ │ ├── arm_fir_init_f32.c │ │ │ ├── arm_fir_init_q15.c │ │ │ ├── arm_fir_init_q31.c │ │ │ ├── arm_fir_init_q7.c │ │ │ ├── arm_fir_interpolate_f32.c │ │ │ ├── arm_fir_interpolate_init_f32.c │ │ │ ├── arm_fir_interpolate_init_q15.c │ │ │ ├── arm_fir_interpolate_init_q31.c │ │ │ ├── arm_fir_interpolate_q15.c │ │ │ ├── arm_fir_interpolate_q31.c │ │ │ ├── arm_fir_lattice_f32.c │ │ │ ├── arm_fir_lattice_init_f32.c │ │ │ ├── arm_fir_lattice_init_q15.c │ │ │ ├── arm_fir_lattice_init_q31.c │ │ │ ├── arm_fir_lattice_q15.c │ │ │ ├── arm_fir_lattice_q31.c │ │ │ ├── arm_fir_q15.c │ │ │ ├── arm_fir_q31.c │ │ │ ├── arm_fir_q7.c │ │ │ ├── arm_fir_sparse_f32.c │ │ │ ├── arm_fir_sparse_init_f32.c │ │ │ ├── arm_fir_sparse_init_q15.c │ │ │ ├── arm_fir_sparse_init_q31.c │ │ │ ├── arm_fir_sparse_init_q7.c │ │ │ ├── arm_fir_sparse_q15.c │ │ │ ├── arm_fir_sparse_q31.c │ │ │ ├── arm_fir_sparse_q7.c │ │ │ ├── arm_iir_lattice_f32.c │ │ │ ├── arm_iir_lattice_init_f32.c │ │ │ ├── arm_iir_lattice_init_q15.c │ │ │ ├── arm_iir_lattice_init_q31.c │ │ │ ├── arm_iir_lattice_q15.c │ │ │ ├── arm_iir_lattice_q31.c │ │ │ ├── arm_lms_f32.c │ │ │ ├── arm_lms_init_f32.c │ │ │ ├── arm_lms_init_q15.c │ │ │ ├── arm_lms_init_q31.c │ │ │ ├── arm_lms_norm_f32.c │ │ │ ├── arm_lms_norm_init_f32.c │ │ │ ├── arm_lms_norm_init_q15.c │ │ │ ├── arm_lms_norm_init_q31.c │ │ │ ├── arm_lms_norm_q15.c │ │ │ ├── arm_lms_norm_q31.c │ │ │ ├── arm_lms_q15.c │ │ │ └── arm_lms_q31.c │ │ │ ├── MatrixFunctions │ │ │ ├── arm_mat_add_f32.c │ │ │ ├── arm_mat_add_q15.c │ │ │ ├── arm_mat_add_q31.c │ │ │ ├── arm_mat_cmplx_mult_f32.c │ │ │ ├── arm_mat_cmplx_mult_q15.c │ │ │ ├── arm_mat_cmplx_mult_q31.c │ │ │ ├── arm_mat_init_f32.c │ │ │ ├── arm_mat_init_q15.c │ │ │ ├── arm_mat_init_q31.c │ │ │ ├── arm_mat_inverse_f32.c │ │ │ ├── arm_mat_inverse_f64.c │ │ │ ├── arm_mat_mult_f32.c │ │ │ ├── arm_mat_mult_fast_q15.c │ │ │ ├── arm_mat_mult_fast_q31.c │ │ │ ├── arm_mat_mult_q15.c │ │ │ ├── arm_mat_mult_q31.c │ │ │ ├── arm_mat_scale_f32.c │ │ │ ├── arm_mat_scale_q15.c │ │ │ ├── arm_mat_scale_q31.c │ │ │ ├── arm_mat_sub_f32.c │ │ │ ├── arm_mat_sub_q15.c │ │ │ ├── arm_mat_sub_q31.c │ │ │ ├── arm_mat_trans_f32.c │ │ │ ├── arm_mat_trans_q15.c │ │ │ └── arm_mat_trans_q31.c │ │ │ ├── StatisticsFunctions │ │ │ ├── arm_max_f32.c │ │ │ ├── arm_max_q15.c │ │ │ ├── arm_max_q31.c │ │ │ ├── arm_max_q7.c │ │ │ ├── arm_mean_f32.c │ │ │ ├── arm_mean_q15.c │ │ │ ├── arm_mean_q31.c │ │ │ ├── arm_mean_q7.c │ │ │ ├── arm_min_f32.c │ │ │ ├── arm_min_q15.c │ │ │ ├── arm_min_q31.c │ │ │ ├── arm_min_q7.c │ │ │ ├── arm_power_f32.c │ │ │ ├── arm_power_q15.c │ │ │ ├── arm_power_q31.c │ │ │ ├── arm_power_q7.c │ │ │ ├── arm_rms_f32.c │ │ │ ├── arm_rms_q15.c │ │ │ ├── arm_rms_q31.c │ │ │ ├── arm_std_f32.c │ │ │ ├── arm_std_q15.c │ │ │ ├── arm_std_q31.c │ │ │ ├── arm_var_f32.c │ │ │ ├── arm_var_q15.c │ │ │ └── arm_var_q31.c │ │ │ ├── SupportFunctions │ │ │ ├── arm_copy_f32.c │ │ │ ├── arm_copy_q15.c │ │ │ ├── arm_copy_q31.c │ │ │ ├── arm_copy_q7.c │ │ │ ├── arm_fill_f32.c │ │ │ ├── arm_fill_q15.c │ │ │ ├── arm_fill_q31.c │ │ │ ├── arm_fill_q7.c │ │ │ ├── arm_float_to_q15.c │ │ │ ├── arm_float_to_q31.c │ │ │ ├── arm_float_to_q7.c │ │ │ ├── arm_q15_to_float.c │ │ │ ├── arm_q15_to_q31.c │ │ │ ├── arm_q15_to_q7.c │ │ │ ├── arm_q31_to_float.c │ │ │ ├── arm_q31_to_q15.c │ │ │ ├── arm_q31_to_q7.c │ │ │ ├── arm_q7_to_float.c │ │ │ ├── arm_q7_to_q15.c │ │ │ └── arm_q7_to_q31.c │ │ │ └── TransformFunctions │ │ │ ├── arm_bitreversal.c │ │ │ ├── arm_cfft_f32.c │ │ │ ├── arm_cfft_q15.c │ │ │ ├── arm_cfft_q31.c │ │ │ ├── arm_cfft_radix2_f32.c │ │ │ ├── arm_cfft_radix2_init_f32.c │ │ │ ├── arm_cfft_radix2_init_q15.c │ │ │ ├── arm_cfft_radix2_init_q31.c │ │ │ ├── arm_cfft_radix2_q15.c │ │ │ ├── arm_cfft_radix2_q31.c │ │ │ ├── arm_cfft_radix4_f32.c │ │ │ ├── arm_cfft_radix4_init_f32.c │ │ │ ├── arm_cfft_radix4_init_q15.c │ │ │ ├── arm_cfft_radix4_init_q31.c │ │ │ ├── arm_cfft_radix4_q15.c │ │ │ ├── arm_cfft_radix4_q31.c │ │ │ ├── arm_cfft_radix8_f32.c │ │ │ ├── arm_dct4_f32.c │ │ │ ├── arm_dct4_init_f32.c │ │ │ ├── arm_dct4_init_q15.c │ │ │ ├── arm_dct4_init_q31.c │ │ │ ├── arm_dct4_q15.c │ │ │ ├── arm_dct4_q31.c │ │ │ ├── arm_rfft_f32.c │ │ │ ├── arm_rfft_fast_f32.c │ │ │ ├── arm_rfft_fast_init_f32.c │ │ │ ├── arm_rfft_init_f32.c │ │ │ ├── arm_rfft_init_q15.c │ │ │ ├── arm_rfft_init_q31.c │ │ │ ├── arm_rfft_q15.c │ │ │ └── arm_rfft_q31.c │ ├── Device │ │ └── ST │ │ │ └── STM32F1xx │ │ │ ├── Include │ │ │ ├── stm32f100xb.h │ │ │ ├── stm32f100xe.h │ │ │ ├── stm32f101x6.h │ │ │ ├── stm32f101xb.h │ │ │ ├── stm32f101xe.h │ │ │ ├── stm32f101xg.h │ │ │ ├── stm32f102x6.h │ │ │ ├── stm32f102xb.h │ │ │ ├── stm32f103x6.h │ │ │ ├── stm32f103xb.h │ │ │ ├── stm32f103xe.h │ │ │ ├── stm32f103xg.h │ │ │ ├── stm32f105xc.h │ │ │ ├── stm32f107xc.h │ │ │ ├── stm32f1xx.h │ │ │ └── system_stm32f1xx.h │ │ │ └── Source │ │ │ └── Templates │ │ │ ├── arm │ │ │ ├── startup_stm32f100xb.s │ │ │ ├── startup_stm32f100xe.s │ │ │ ├── startup_stm32f101x6.s │ │ │ ├── startup_stm32f101xb.s │ │ │ ├── startup_stm32f101xe.s │ │ │ ├── startup_stm32f101xg.s │ │ │ ├── startup_stm32f102x6.s │ │ │ ├── startup_stm32f102xb.s │ │ │ ├── startup_stm32f103x6.s │ │ │ ├── startup_stm32f103xb.s │ │ │ ├── startup_stm32f103xe.s │ │ │ ├── startup_stm32f103xg.s │ │ │ ├── startup_stm32f105xc.s │ │ │ └── startup_stm32f107xc.s │ │ │ ├── gcc │ │ │ ├── startup_stm32f100xb.s │ │ │ ├── startup_stm32f100xe.s │ │ │ ├── startup_stm32f101x6.s │ │ │ ├── startup_stm32f101xb.s │ │ │ ├── startup_stm32f101xe.s │ │ │ ├── startup_stm32f101xg.s │ │ │ ├── startup_stm32f102x6.s │ │ │ ├── startup_stm32f102xb.s │ │ │ ├── startup_stm32f103x6.s │ │ │ ├── startup_stm32f103xb.s │ │ │ ├── startup_stm32f103xe.s │ │ │ ├── startup_stm32f103xg.s │ │ │ ├── startup_stm32f105xc.s │ │ │ └── startup_stm32f107xc.s │ │ │ ├── iar │ │ │ ├── linker │ │ │ │ ├── stm32f100xb_flash.icf │ │ │ │ ├── stm32f100xb_sram.icf │ │ │ │ ├── stm32f100xe_flash.icf │ │ │ │ ├── stm32f100xe_sram.icf │ │ │ │ ├── stm32f101x6_flash.icf │ │ │ │ ├── stm32f101x6_sram.icf │ │ │ │ ├── stm32f101xb_flash.icf │ │ │ │ ├── stm32f101xb_sram.icf │ │ │ │ ├── stm32f101xe_flash.icf │ │ │ │ ├── stm32f101xe_sram.icf │ │ │ │ ├── stm32f101xg_flash.icf │ │ │ │ ├── stm32f101xg_sram.icf │ │ │ │ ├── stm32f102x6_flash.icf │ │ │ │ ├── stm32f102x6_sram.icf │ │ │ │ ├── stm32f102xb_flash.icf │ │ │ │ ├── stm32f102xb_sram.icf │ │ │ │ ├── stm32f103x6_flash.icf │ │ │ │ ├── stm32f103x6_sram.icf │ │ │ │ ├── stm32f103xb_flash.icf │ │ │ │ ├── stm32f103xb_sram.icf │ │ │ │ ├── stm32f103xe_flash.icf │ │ │ │ ├── stm32f103xe_sram.icf │ │ │ │ ├── stm32f103xg_flash.icf │ │ │ │ ├── stm32f103xg_sram.icf │ │ │ │ ├── stm32f105xc_flash.icf │ │ │ │ ├── stm32f105xc_sram.icf │ │ │ │ ├── stm32f107xc_flash.icf │ │ │ │ └── stm32f107xc_sram.icf │ │ │ ├── startup_stm32f100xb.s │ │ │ ├── startup_stm32f100xe.s │ │ │ ├── startup_stm32f101x6.s │ │ │ ├── startup_stm32f101xb.s │ │ │ ├── startup_stm32f101xe.s │ │ │ ├── startup_stm32f101xg.s │ │ │ ├── startup_stm32f102x6.s │ │ │ ├── startup_stm32f102xb.s │ │ │ ├── startup_stm32f103x6.s │ │ │ ├── startup_stm32f103xb.s │ │ │ ├── startup_stm32f103xe.s │ │ │ ├── startup_stm32f103xg.s │ │ │ ├── startup_stm32f105xc.s │ │ │ └── startup_stm32f107xc.s │ │ │ └── system_stm32f1xx.c │ ├── Include │ │ ├── arm_common_tables.h │ │ ├── arm_const_structs.h │ │ ├── arm_math.h │ │ ├── cmsis_armcc.h │ │ ├── cmsis_armcc_V6.h │ │ ├── cmsis_gcc.h │ │ ├── core_cm0.h │ │ ├── core_cm0plus.h │ │ ├── core_cm3.h │ │ ├── core_cm4.h │ │ ├── core_cm7.h │ │ ├── core_cmFunc.h │ │ ├── core_cmInstr.h │ │ ├── core_cmSimd.h │ │ ├── core_sc000.h │ │ └── core_sc300.h │ └── RTOS │ │ └── Template │ │ └── cmsis_os.h └── STM32F1xx_HAL_Driver │ ├── Inc │ ├── Legacy │ │ └── stm32_hal_legacy.h │ ├── stm32f1xx_hal.h │ ├── stm32f1xx_hal_adc.h │ ├── stm32f1xx_hal_adc_ex.h │ ├── stm32f1xx_hal_can.h │ ├── stm32f1xx_hal_can_ex.h │ ├── stm32f1xx_hal_cec.h │ ├── stm32f1xx_hal_conf_template.h │ ├── stm32f1xx_hal_cortex.h │ ├── stm32f1xx_hal_crc.h │ ├── stm32f1xx_hal_dac.h │ ├── stm32f1xx_hal_dac_ex.h │ ├── stm32f1xx_hal_def.h │ ├── stm32f1xx_hal_dma.h │ ├── stm32f1xx_hal_dma_ex.h │ ├── stm32f1xx_hal_eth.h │ ├── stm32f1xx_hal_flash.h │ ├── stm32f1xx_hal_flash_ex.h │ ├── stm32f1xx_hal_gpio.h │ ├── stm32f1xx_hal_gpio_ex.h │ ├── stm32f1xx_hal_hcd.h │ ├── stm32f1xx_hal_i2c.h │ ├── stm32f1xx_hal_i2s.h │ ├── stm32f1xx_hal_irda.h │ ├── stm32f1xx_hal_iwdg.h │ ├── stm32f1xx_hal_nand.h │ ├── stm32f1xx_hal_nor.h │ ├── stm32f1xx_hal_pccard.h │ ├── stm32f1xx_hal_pcd.h │ ├── stm32f1xx_hal_pcd_ex.h │ ├── stm32f1xx_hal_pwr.h │ ├── stm32f1xx_hal_rcc.h │ ├── stm32f1xx_hal_rcc_ex.h │ ├── stm32f1xx_hal_rtc.h │ ├── stm32f1xx_hal_rtc_ex.h │ ├── stm32f1xx_hal_sd.h │ ├── stm32f1xx_hal_smartcard.h │ ├── stm32f1xx_hal_spi.h │ ├── stm32f1xx_hal_sram.h │ ├── stm32f1xx_hal_tim.h │ ├── stm32f1xx_hal_tim_ex.h │ ├── stm32f1xx_hal_uart.h │ ├── stm32f1xx_hal_usart.h │ ├── stm32f1xx_hal_wwdg.h │ ├── stm32f1xx_ll_fsmc.h │ ├── stm32f1xx_ll_sdmmc.h │ └── stm32f1xx_ll_usb.h │ └── Src │ ├── stm32f1xx_hal.c │ ├── stm32f1xx_hal_adc.c │ ├── stm32f1xx_hal_adc_ex.c │ ├── stm32f1xx_hal_can.c │ ├── stm32f1xx_hal_cec.c │ ├── stm32f1xx_hal_cortex.c │ ├── stm32f1xx_hal_crc.c │ ├── stm32f1xx_hal_dac.c │ ├── stm32f1xx_hal_dac_ex.c │ ├── stm32f1xx_hal_dma.c │ ├── stm32f1xx_hal_eth.c │ ├── stm32f1xx_hal_flash.c │ ├── stm32f1xx_hal_flash_ex.c │ ├── stm32f1xx_hal_gpio.c │ ├── stm32f1xx_hal_gpio_ex.c │ ├── stm32f1xx_hal_hcd.c │ ├── stm32f1xx_hal_i2c.c │ ├── stm32f1xx_hal_i2s.c │ ├── stm32f1xx_hal_irda.c │ ├── stm32f1xx_hal_iwdg.c │ ├── stm32f1xx_hal_msp_template.c │ ├── stm32f1xx_hal_nand.c │ ├── stm32f1xx_hal_nor.c │ ├── stm32f1xx_hal_pccard.c │ ├── stm32f1xx_hal_pcd.c │ ├── stm32f1xx_hal_pcd_ex.c │ ├── stm32f1xx_hal_pwr.c │ ├── stm32f1xx_hal_rcc.c │ ├── stm32f1xx_hal_rcc_ex.c │ ├── stm32f1xx_hal_rtc.c │ ├── stm32f1xx_hal_rtc_ex.c │ ├── stm32f1xx_hal_sd.c │ ├── stm32f1xx_hal_smartcard.c │ ├── stm32f1xx_hal_spi.c │ ├── stm32f1xx_hal_spi_ex.c │ ├── stm32f1xx_hal_sram.c │ ├── stm32f1xx_hal_tim.c │ ├── stm32f1xx_hal_tim_ex.c │ ├── stm32f1xx_hal_uart.c │ ├── stm32f1xx_hal_usart.c │ ├── stm32f1xx_hal_wwdg.c │ ├── stm32f1xx_ll_fsmc.c │ ├── stm32f1xx_ll_sdmmc.c │ └── stm32f1xx_ll_usb.c ├── Inc ├── gpio.h ├── main.h ├── stm32f1xx_hal_conf.h ├── stm32f1xx_it.h └── usart.h ├── MDK-ARM └── startup_stm32f103xb.s ├── README.md └── Src ├── gpio.c ├── main.c ├── stm32f1xx_hal_msp.c ├── stm32f1xx_it.c ├── system_stm32f1xx.c └── usart.c /.mxproject: -------------------------------------------------------------------------------- 1 | [PreviousGenFiles] 2 | HeaderPath=D:/Users/ME/Desktop/FreeRTOS-test/boot/Boot-STM32F103C8/Inc 3 | HeaderFiles=gpio.h;usart.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; 4 | SourcePath=D:/Users/ME/Desktop/FreeRTOS-test/boot/Boot-STM32F103C8/Src 5 | SourceFiles=gpio.h;usart.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h;gpio.c;usart.c;stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; 6 | 7 | [PreviousLibFiles] 8 | LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h; 9 | 10 | [PreviousUsedKeilFiles] 11 | SourceFiles=../Src/main.c;../Src/gpio.c;../Src/usart.c;../Src/stm32f1xx_it.c;../Src/stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/arm/startup_stm32f103xb.s; 12 | HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include; 13 | 14 | -------------------------------------------------------------------------------- /BSP/inc/bsp_debug_usart.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/justloong/STM32F103C8T6-BootLoader/7b0b4e8cbe2e45096664f4604f44de514f7fe09c/BSP/inc/bsp_debug_usart.h -------------------------------------------------------------------------------- /BSP/inc/ymodem.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file IAP/inc/ymodem.h 4 | * @author MCD Application Team 5 | * @version V3.3.0 6 | * @date 10/15/2010 7 | * @brief This file provides all the software function headers of the ymodem.c 8 | * file. 9 | ****************************************************************************** 10 | * @copy 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *
resetStateFlag
specifies whether to set state to zero or not. \n
57 | * The function computes the structure fields: A0
, A1
A2
58 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
59 | * also sets the state variables to all zeros.
60 | */
61 |
62 | void arm_pid_init_f32(
63 | arm_pid_instance_f32 * S,
64 | int32_t resetStateFlag)
65 | {
66 |
67 | /* Derived coefficient A0 */
68 | S->A0 = S->Kp + S->Ki + S->Kd;
69 |
70 | /* Derived coefficient A1 */
71 | S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
72 |
73 | /* Derived coefficient A2 */
74 | S->A2 = S->Kd;
75 |
76 | /* Check whether state needs reset or not */
77 | if(resetStateFlag)
78 | {
79 | /* Clear the state buffer. The size will be always 3 samples */
80 | memset(S->state, 0, 3u * sizeof(float32_t));
81 | }
82 |
83 | }
84 |
85 | /**
86 | * @} end of PID group
87 | */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_init_q31.c
9 | *
10 | * Description: Q31 PID Control initialization function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for the Q31 PID Control.
50 | * @param[in,out] *S points to an instance of the Q31 PID structure.
51 | * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the state.
52 | * @return none.
53 | * \par Description:
54 | * \par
55 | * The resetStateFlag
specifies whether to set state to zero or not. \n
56 | * The function computes the structure fields: A0
, A1
A2
57 | * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
58 | * also sets the state variables to all zeros.
59 | */
60 |
61 | void arm_pid_init_q31(
62 | arm_pid_instance_q31 * S,
63 | int32_t resetStateFlag)
64 | {
65 |
66 | #ifndef ARM_MATH_CM0_FAMILY
67 |
68 | /* Run the below code for Cortex-M4 and Cortex-M3 */
69 |
70 | /* Derived coefficient A0 */
71 | S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
72 |
73 | /* Derived coefficient A1 */
74 | S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
75 |
76 |
77 | #else
78 |
79 | /* Run the below code for Cortex-M0 */
80 |
81 | q31_t temp;
82 |
83 | /* Derived coefficient A0 */
84 | temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
85 | S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
86 |
87 | /* Derived coefficient A1 */
88 | temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
89 | S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
90 |
91 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
92 |
93 | /* Derived coefficient A2 */
94 | S->A2 = S->Kd;
95 |
96 | /* Check whether state needs reset or not */
97 | if(resetStateFlag)
98 | {
99 | /* Clear the state buffer. The size will be always 3 samples */
100 | memset(S->state, 0, 3u * sizeof(q31_t));
101 | }
102 |
103 | }
104 |
105 | /**
106 | * @} end of PID group
107 | */
108 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_f32.c
9 | *
10 | * Description: Floating-point PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the floating-point PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_f32(
56 | arm_pid_instance_f32 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(float32_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q15.c
9 | *
10 | * Description: Q15 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q15 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q15(
56 | arm_pid_instance_q15 * S)
57 | {
58 | /* Reset state to zero, The size will be always 3 samples */
59 | memset(S->state, 0, 3u * sizeof(q15_t));
60 | }
61 |
62 | /**
63 | * @} end of PID group
64 | */
65 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_pid_reset_q31.c
9 | *
10 | * Description: Q31 PID Control reset function
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup PID
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Reset function for the Q31 PID Control.
50 | * @param[in] *S Instance pointer of PID control data structure.
51 | * @return none.
52 | * \par Description:
53 | * The function resets the state buffer to zeros.
54 | */
55 | void arm_pid_reset_q31(
56 | arm_pid_instance_q31 * S)
57 | {
58 |
59 | /* Clear the state buffer. The size will be always 3 samples */
60 | memset(S->state, 0, 3u * sizeof(q31_t));
61 | }
62 |
63 | /**
64 | * @} end of PID group
65 | */
66 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q15.c
9 | *
10 | * Description: Fast cosine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q15_t arm_cos_q15(
63 | q15_t x)
64 | {
65 | q15_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q15_t a, b; /* Four nearest output values */
68 | q15_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint16_t)x + 0x2000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint16_t)x + 0x8000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q15[index];
85 | b = sinTable_q15[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q31_t)(0x8000-fract)*a >> 16;
89 | cosVal = (q15_t)((((q31_t)cosVal << 16) + ((q31_t)fract*b)) >> 16);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 07. September 2015
5 | * $Revision: V.1.4.5 a
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_cos_q31.c
9 | *
10 | * Description: Fast cosine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup cos
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric cosine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return cos(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
59 | * value in the range [0 2*pi).
60 | */
61 |
62 | q31_t arm_cos_q31(
63 | q31_t x)
64 | {
65 | q31_t cosVal; /* Temporary variables for input, output */
66 | int32_t index; /* Index variables */
67 | q31_t a, b; /* Four nearest output values */
68 | q31_t fract; /* Temporary values for fractional values */
69 |
70 | /* add 0.25 (pi/2) to read sine table */
71 | x = (uint32_t)x + 0x20000000;
72 | if(x < 0)
73 | { /* convert negative numbers to corresponding positive ones */
74 | x = (uint32_t)x + 0x80000000;
75 | }
76 |
77 | /* Calculate the nearest index */
78 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
79 |
80 | /* Calculation of fractional value */
81 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
82 |
83 | /* Read two nearest values of input value from the sin table */
84 | a = sinTable_q31[index];
85 | b = sinTable_q31[index+1];
86 |
87 | /* Linear interpolation process */
88 | cosVal = (q63_t)(0x80000000-fract)*a >> 32;
89 | cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
90 |
91 | return cosVal << 1;
92 | }
93 |
94 | /**
95 | * @} end of cos group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q15.c
9 | *
10 | * Description: Fast sine calculation for Q15 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q15 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
59 | */
60 |
61 | q15_t arm_sin_q15(
62 | q15_t x)
63 | {
64 | q15_t sinVal; /* Temporary variables for input, output */
65 | int32_t index; /* Index variables */
66 | q15_t a, b; /* Four nearest output values */
67 | q15_t fract; /* Temporary values for fractional values */
68 |
69 | /* Calculate the nearest index */
70 | index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
71 |
72 | /* Calculation of fractional value */
73 | fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
74 |
75 | /* Read two nearest values of input value from the sin table */
76 | a = sinTable_q15[index];
77 | b = sinTable_q15[index+1];
78 |
79 | /* Linear interpolation process */
80 | sinVal = (q31_t)(0x8000-fract)*a >> 16;
81 | sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
82 |
83 | return sinVal << 1;
84 | }
85 |
86 | /**
87 | * @} end of sin group
88 | */
89 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_sin_q31.c
9 | *
10 | * Description: Fast sine calculation for Q31 values.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 | #include "arm_common_tables.h"
43 |
44 | /**
45 | * @ingroup groupFastMath
46 | */
47 |
48 | /**
49 | * @addtogroup sin
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Fast approximation to the trigonometric sine function for Q31 data.
55 | * @param[in] x Scaled input value in radians.
56 | * @return sin(x).
57 | *
58 | * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
59 |
60 | q31_t arm_sin_q31(
61 | q31_t x)
62 | {
63 | q31_t sinVal; /* Temporary variables for input, output */
64 | int32_t index; /* Index variables */
65 | q31_t a, b; /* Four nearest output values */
66 | q31_t fract; /* Temporary values for fractional values */
67 |
68 | /* Calculate the nearest index */
69 | index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
70 |
71 | /* Calculation of fractional value */
72 | fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
73 |
74 | /* Read two nearest values of input value from the sin table */
75 | a = sinTable_q31[index];
76 | b = sinTable_q31[index+1];
77 |
78 | /* Linear interpolation process */
79 | sinVal = (q63_t)(0x80000000-fract)*a >> 32;
80 | sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
81 |
82 | return sinVal << 1;
83 | }
84 |
85 | /**
86 | * @} end of sin group
87 | */
88 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_f32.c
9 | *
10 | * Description: Floating-point FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
65 | * 66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 67 | *68 | * \par 69 | *
pState
points to the array of state variables.
70 | * pState
is of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_fir_f32()
.
71 | */
72 |
73 | void arm_fir_init_f32(
74 | arm_fir_instance_f32 * S,
75 | uint16_t numTaps,
76 | float32_t * pCoeffs,
77 | float32_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q31.c
9 | *
10 | * Description: Q31 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 |
52 | /**
53 | * @details
54 | *
55 | * @param[in,out] *S points to an instance of the Q31 FIR filter structure.
56 | * @param[in] numTaps Number of filter coefficients in the filter.
57 | * @param[in] *pCoeffs points to the filter coefficients buffer.
58 | * @param[in] *pState points to the state buffer.
59 | * @param[in] blockSize number of samples that are processed per call.
60 | * @return none.
61 | *
62 | * Description:
63 | * \par
64 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
65 | * 66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 67 | *68 | * \par 69 | *
pState
points to the array of state variables.
70 | * pState
is of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_fir_q31()
.
71 | */
72 |
73 | void arm_fir_init_q31(
74 | arm_fir_instance_q31 * S,
75 | uint16_t numTaps,
76 | q31_t * pCoeffs,
77 | q31_t * pState,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
87 | memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | }
93 |
94 | /**
95 | * @} end of FIR group
96 | */
97 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_init_q7.c
9 | *
10 | * Description: Q7 FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR
49 | * @{
50 | */
51 | /**
52 | * @param[in,out] *S points to an instance of the Q7 FIR filter structure.
53 | * @param[in] numTaps Number of filter coefficients in the filter.
54 | * @param[in] *pCoeffs points to the filter coefficients buffer.
55 | * @param[in] *pState points to the state buffer.
56 | * @param[in] blockSize number of samples that are processed per call.
57 | * @return none
58 | *
59 | * Description:
60 | * \par
61 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
62 | * 63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 64 | *65 | * \par 66 | *
pState
points to the array of state variables.
67 | * pState
is of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_fir_q7()
.
68 | */
69 |
70 | void arm_fir_init_q7(
71 | arm_fir_instance_q7 * S,
72 | uint16_t numTaps,
73 | q7_t * pCoeffs,
74 | q7_t * pState,
75 | uint32_t blockSize)
76 | {
77 |
78 | /* Assign filter taps */
79 | S->numTaps = numTaps;
80 |
81 | /* Assign coefficient pointer */
82 | S->pCoeffs = pCoeffs;
83 |
84 | /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
85 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
86 |
87 | /* Assign state pointer */
88 | S->pState = pState;
89 |
90 | }
91 |
92 | /**
93 | * @} end of FIR group
94 | */
95 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point FIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_f32(
62 | arm_fir_lattice_instance_f32 * S,
63 | uint16_t numStages,
64 | float32_t * pCoeffs,
65 | float32_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(float32_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q15.c
9 | *
10 | * Description: Q15 FIR Lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q15(
62 | arm_fir_lattice_instance_q15 * S,
63 | uint16_t numStages,
64 | q15_t * pCoeffs,
65 | q15_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q15_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_lattice_init_q31.c
9 | *
10 | * Description: Q31 FIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 FIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 FIR lattice structure.
55 | * @param[in] numStages number of filter stages.
56 | * @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
57 | * @param[in] *pState points to the state buffer. The array is of length numStages.
58 | * @return none.
59 | */
60 |
61 | void arm_fir_lattice_init_q31(
62 | arm_fir_lattice_instance_q31 * S,
63 | uint16_t numStages,
64 | q31_t * pCoeffs,
65 | q31_t * pState)
66 | {
67 | /* Assign filter taps */
68 | S->numStages = numStages;
69 |
70 | /* Assign coefficient pointer */
71 | S->pCoeffs = pCoeffs;
72 |
73 | /* Clear state buffer and size is always numStages */
74 | memset(pState, 0, (numStages) * sizeof(q31_t));
75 |
76 | /* Assign state pointer */
77 | S->pState = pState;
78 |
79 | }
80 |
81 | /**
82 | * @} end of FIR_Lattice group
83 | */
84 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fir_sparse_init_q31.c
9 | *
10 | * Description: Q31 sparse FIR filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup FIR_Sparse
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 sparse FIR filter.
54 | * @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
55 | * @param[in] numTaps number of nonzero coefficients in the filter.
56 | * @param[in] *pCoeffs points to the array of filter coefficients.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] *pTapDelay points to the array of offset times.
59 | * @param[in] maxDelay maximum offset time supported.
60 | * @param[in] blockSize number of samples that will be processed per block.
61 | * @return none
62 | *
63 | * Description:
64 | * \par
65 | * pCoeffs
holds the filter coefficients and has length numTaps
.
66 | * pState
holds the filter's state variables and must be of length
67 | * maxDelay + blockSize
, where maxDelay
68 | * is the maximum number of delay line values.
69 | * blockSize
is the number of words processed by arm_fir_sparse_q31()
function.
70 | */
71 |
72 | void arm_fir_sparse_init_q31(
73 | arm_fir_sparse_instance_q31 * S,
74 | uint16_t numTaps,
75 | q31_t * pCoeffs,
76 | q31_t * pState,
77 | int32_t * pTapDelay,
78 | uint16_t maxDelay,
79 | uint32_t blockSize)
80 | {
81 | /* Assign filter taps */
82 | S->numTaps = numTaps;
83 |
84 | /* Assign coefficient pointer */
85 | S->pCoeffs = pCoeffs;
86 |
87 | /* Assign TapDelay pointer */
88 | S->pTapDelay = pTapDelay;
89 |
90 | /* Assign MaxDelay */
91 | S->maxDelay = maxDelay;
92 |
93 | /* reset the stateIndex to 0 */
94 | S->stateIndex = 0u;
95 |
96 | /* Clear state buffer and size is always maxDelay + blockSize */
97 | memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
98 |
99 | /* Assign state pointer */
100 | S->pState = pState;
101 |
102 | }
103 |
104 | /**
105 | * @} end of FIR_Sparse group
106 | */
107 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_f32.c
9 | *
10 | * Description: Floating-point IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the floating-point IIR lattice filter.
54 | * @param[in] *S points to an instance of the floating-point IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_f32(
64 | arm_iir_lattice_instance_f32 * S,
65 | uint16_t numStages,
66 | float32_t * pkCoeffs,
67 | float32_t * pvCoeffs,
68 | float32_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q15.c
9 | *
10 | * Description: Q15 IIR lattice filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q15 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process per call.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q15(
64 | arm_iir_lattice_instance_q15 * S,
65 | uint16_t numStages,
66 | q15_t * pkCoeffs,
67 | q15_t * pvCoeffs,
68 | q15_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_iir_lattice_init_q31.c
9 | *
10 | * Description: Initialization function for the Q31 IIR lattice filter.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup IIR_Lattice
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q31 IIR lattice filter.
54 | * @param[in] *S points to an instance of the Q31 IIR lattice structure.
55 | * @param[in] numStages number of stages in the filter.
56 | * @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
57 | * @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
58 | * @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | */
62 |
63 | void arm_iir_lattice_init_q31(
64 | arm_iir_lattice_instance_q31 * S,
65 | uint16_t numStages,
66 | q31_t * pkCoeffs,
67 | q31_t * pvCoeffs,
68 | q31_t * pState,
69 | uint32_t blockSize)
70 | {
71 | /* Assign filter taps */
72 | S->numStages = numStages;
73 |
74 | /* Assign reflection coefficient pointer */
75 | S->pkCoeffs = pkCoeffs;
76 |
77 | /* Assign ladder coefficient pointer */
78 | S->pvCoeffs = pvCoeffs;
79 |
80 | /* Clear state buffer and size is always blockSize + numStages */
81 | memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
82 |
83 | /* Assign state pointer */
84 | S->pState = pState;
85 |
86 |
87 | }
88 |
89 | /**
90 | * @} end of IIR_Lattice group
91 | */
92 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_f32.c
9 | *
10 | * Description: Floating-point LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @addtogroup LMS
45 | * @{
46 | */
47 |
48 | /**
49 | * @brief Initialization function for floating-point LMS filter.
50 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
51 | * @param[in] numTaps number of filter coefficients.
52 | * @param[in] *pCoeffs points to the coefficient buffer.
53 | * @param[in] *pState points to state buffer.
54 | * @param[in] mu step size that controls filter coefficient updates.
55 | * @param[in] blockSize number of samples to process.
56 | * @return none.
57 | */
58 |
59 | /**
60 | * \par Description:
61 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
62 | * 63 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 64 | *65 | * The initial filter coefficients serve as a starting point for the adaptive filter. 66 | *
pState
points to an array of length numTaps+blockSize-1
samples, where blockSize
is the number of input samples processed by each call to arm_lms_f32()
.
67 | */
68 |
69 | void arm_lms_init_f32(
70 | arm_lms_instance_f32 * S,
71 | uint16_t numTaps,
72 | float32_t * pCoeffs,
73 | float32_t * pState,
74 | float32_t mu,
75 | uint32_t blockSize)
76 | {
77 | /* Assign filter taps */
78 | S->numTaps = numTaps;
79 |
80 | /* Assign coefficient pointer */
81 | S->pCoeffs = pCoeffs;
82 |
83 | /* Clear state buffer and size is always blockSize + numTaps */
84 | memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
85 |
86 | /* Assign state pointer */
87 | S->pState = pState;
88 |
89 | /* Assign Step size value */
90 | S->mu = mu;
91 | }
92 |
93 | /**
94 | * @} end of LMS group
95 | */
96 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q15.c
9 | *
10 | * Description: Q15 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for the Q15 LMS filter.
54 | * @param[in] *S points to an instance of the Q15 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to the coefficient buffer.
57 | * @param[in] *pState points to the state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
65 | * 66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 67 | *68 | * The initial filter coefficients serve as a starting point for the adaptive filter. 69 | *
pState
points to the array of state variables and size of array is
70 | * numTaps+blockSize-1
samples, where blockSize
is the number of
71 | * input samples processed by each call to arm_lms_q15()
.
72 | */
73 |
74 | void arm_lms_init_q15(
75 | arm_lms_instance_q15 * S,
76 | uint16_t numTaps,
77 | q15_t * pCoeffs,
78 | q15_t * pState,
79 | q15_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_init_q31.c
9 | *
10 | * Description: Q31 LMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for Q31 LMS filter.
54 | * @param[in] *S points to an instance of the Q31 LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @param[in] postShift bit shift applied to coefficients.
61 | * @return none.
62 | *
63 | * \par Description:
64 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
65 | * 66 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 67 | *68 | * The initial filter coefficients serve as a starting point for the adaptive filter. 69 | *
pState
points to an array of length numTaps+blockSize-1
samples,
70 | * where blockSize
is the number of input samples processed by each call to
71 | * arm_lms_q31()
.
72 | */
73 |
74 | void arm_lms_init_q31(
75 | arm_lms_instance_q31 * S,
76 | uint16_t numTaps,
77 | q31_t * pCoeffs,
78 | q31_t * pState,
79 | q31_t mu,
80 | uint32_t blockSize,
81 | uint32_t postShift)
82 | {
83 | /* Assign filter taps */
84 | S->numTaps = numTaps;
85 |
86 | /* Assign coefficient pointer */
87 | S->pCoeffs = pCoeffs;
88 |
89 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
90 | memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
91 |
92 | /* Assign state pointer */
93 | S->pState = pState;
94 |
95 | /* Assign Step size value */
96 | S->mu = mu;
97 |
98 | /* Assign postShift value to be applied */
99 | S->postShift = postShift;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS group
105 | */
106 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_lms_norm_init_f32.c
9 | *
10 | * Description: Floating-point NLMS filter initialization function.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * ---------------------------------------------------------------------------*/
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupFilters
45 | */
46 |
47 | /**
48 | * @addtogroup LMS_NORM
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Initialization function for floating-point normalized LMS filter.
54 | * @param[in] *S points to an instance of the floating-point LMS filter structure.
55 | * @param[in] numTaps number of filter coefficients.
56 | * @param[in] *pCoeffs points to coefficient buffer.
57 | * @param[in] *pState points to state buffer.
58 | * @param[in] mu step size that controls filter coefficient updates.
59 | * @param[in] blockSize number of samples to process.
60 | * @return none.
61 | *
62 | * \par Description:
63 | * pCoeffs
points to the array of filter coefficients stored in time reversed order:
64 | * 65 | * {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]} 66 | *67 | * The initial filter coefficients serve as a starting point for the adaptive filter. 68 | *
pState
points to an array of length numTaps+blockSize-1
samples,
69 | * where blockSize
is the number of input samples processed by each call to arm_lms_norm_f32()
.
70 | */
71 |
72 | void arm_lms_norm_init_f32(
73 | arm_lms_norm_instance_f32 * S,
74 | uint16_t numTaps,
75 | float32_t * pCoeffs,
76 | float32_t * pState,
77 | float32_t mu,
78 | uint32_t blockSize)
79 | {
80 | /* Assign filter taps */
81 | S->numTaps = numTaps;
82 |
83 | /* Assign coefficient pointer */
84 | S->pCoeffs = pCoeffs;
85 |
86 | /* Clear state buffer and size is always blockSize + numTaps - 1 */
87 | memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
88 |
89 | /* Assign state pointer */
90 | S->pState = pState;
91 |
92 | /* Assign Step size value */
93 | S->mu = mu;
94 |
95 | /* Initialise Energy to zero */
96 | S->energy = 0.0f;
97 |
98 | /* Initialise x0 to zero */
99 | S->x0 = 0.0f;
100 |
101 | }
102 |
103 | /**
104 | * @} end of LMS_NORM group
105 | */
106 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_f32.c
9 | *
10 | * Description: Floating-point matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | * Initializes the underlying matrix data structure.
51 | * The functions set the numRows
,
52 | * numCols
, and pData
fields
53 | * of the matrix data structure.
54 | */
55 |
56 | /**
57 | * @addtogroup MatrixInit
58 | * @{
59 | */
60 |
61 | /**
62 | * @brief Floating-point matrix initialization.
63 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
64 | * @param[in] nRows number of rows in the matrix.
65 | * @param[in] nColumns number of columns in the matrix.
66 | * @param[in] *pData points to the matrix data array.
67 | * @return none
68 | */
69 |
70 | void arm_mat_init_f32(
71 | arm_matrix_instance_f32 * S,
72 | uint16_t nRows,
73 | uint16_t nColumns,
74 | float32_t * pData)
75 | {
76 | /* Assign Number of Rows */
77 | S->numRows = nRows;
78 |
79 | /* Assign Number of Columns */
80 | S->numCols = nColumns;
81 |
82 | /* Assign Data pointer */
83 | S->pData = pData;
84 | }
85 |
86 | /**
87 | * @} end of MatrixInit group
88 | */
89 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q15.c
9 | *
10 | * Description: Q15 matrix initialization.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------------- */
40 |
41 |
42 | #include "arm_math.h"
43 |
44 | /**
45 | * @ingroup groupMatrix
46 | */
47 |
48 | /**
49 | * @addtogroup MatrixInit
50 | * @{
51 | */
52 |
53 | /**
54 | * @brief Q15 matrix initialization.
55 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
56 | * @param[in] nRows number of rows in the matrix.
57 | * @param[in] nColumns number of columns in the matrix.
58 | * @param[in] *pData points to the matrix data array.
59 | * @return none
60 | */
61 |
62 | void arm_mat_init_q15(
63 | arm_matrix_instance_q15 * S,
64 | uint16_t nRows,
65 | uint16_t nColumns,
66 | q15_t * pData)
67 | {
68 | /* Assign Number of Rows */
69 | S->numRows = nRows;
70 |
71 | /* Assign Number of Columns */
72 | S->numCols = nColumns;
73 |
74 | /* Assign Data pointer */
75 | S->pData = pData;
76 | }
77 |
78 | /**
79 | * @} end of MatrixInit group
80 | */
81 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_mat_init_q31.c
9 | *
10 | * Description: Q31 matrix initialization.
11 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
12 | *
13 | * Redistribution and use in source and binary forms, with or without
14 | * modification, are permitted provided that the following conditions
15 | * are met:
16 | * - Redistributions of source code must retain the above copyright
17 | * notice, this list of conditions and the following disclaimer.
18 | * - Redistributions in binary form must reproduce the above copyright
19 | * notice, this list of conditions and the following disclaimer in
20 | * the documentation and/or other materials provided with the
21 | * distribution.
22 | * - Neither the name of ARM LIMITED nor the names of its contributors
23 | * may be used to endorse or promote products derived from this
24 | * software without specific prior written permission.
25 | *
26 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
29 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
30 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
31 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
32 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
33 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
36 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 | * POSSIBILITY OF SUCH DAMAGE.
38 | * -------------------------------------------------------------------------- */
39 |
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupMatrix
45 | */
46 |
47 | /**
48 | * @defgroup MatrixInit Matrix Initialization
49 | *
50 | */
51 |
52 | /**
53 | * @addtogroup MatrixInit
54 | * @{
55 | */
56 |
57 | /**
58 | * @brief Q31 matrix initialization.
59 | * @param[in,out] *S points to an instance of the floating-point matrix structure.
60 | * @param[in] nRows number of rows in the matrix.
61 | * @param[in] nColumns number of columns in the matrix.
62 | * @param[in] *pData points to the matrix data array.
63 | * @return none
64 | */
65 |
66 | void arm_mat_init_q31(
67 | arm_matrix_instance_q31 * S,
68 | uint16_t nRows,
69 | uint16_t nColumns,
70 | q31_t * pData)
71 | {
72 | /* Assign Number of Rows */
73 | S->numRows = nRows;
74 |
75 | /* Assign Number of Columns */
76 | S->numCols = nColumns;
77 |
78 | /* Assign Data pointer */
79 | S->pData = pData;
80 | }
81 |
82 | /**
83 | * @} end of MatrixInit group
84 | */
85 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q15.c
9 | *
10 | * Description: Copies the elements of a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 | /**
52 | * @brief Copies the elements of a Q15 vector.
53 | * @param[in] *pSrc points to input vector
54 | * @param[out] *pDst points to output vector
55 | * @param[in] blockSize length of the input vector
56 | * @return none.
57 | *
58 | */
59 |
60 | void arm_copy_q15(
61 | q15_t * pSrc,
62 | q15_t * pDst,
63 | uint32_t blockSize)
64 | {
65 | uint32_t blkCnt; /* loop counter */
66 |
67 | #ifndef ARM_MATH_CM0_FAMILY
68 |
69 | /* Run the below code for Cortex-M4 and Cortex-M3 */
70 |
71 | /*loop Unrolling */
72 | blkCnt = blockSize >> 2u;
73 |
74 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
75 | ** a second loop below computes the remaining 1 to 3 samples. */
76 | while(blkCnt > 0u)
77 | {
78 | /* C = A */
79 | /* Read two inputs */
80 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
81 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
82 |
83 | /* Decrement the loop counter */
84 | blkCnt--;
85 | }
86 |
87 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
88 | ** No loop unrolling is used. */
89 | blkCnt = blockSize % 0x4u;
90 |
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 | while(blkCnt > 0u)
102 | {
103 | /* C = A */
104 | /* Copy and then store the value in the destination buffer */
105 | *pDst++ = *pSrc++;
106 |
107 | /* Decrement the loop counter */
108 | blkCnt--;
109 | }
110 | }
111 |
112 | /**
113 | * @} end of BasicCopy group
114 | */
115 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q31.c
9 | *
10 | * Description: Copies the elements of a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q31 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q31(
62 | q31_t * pSrc,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1, in2, in3, in4;
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
78 | ** a second loop below computes the remaining 1 to 3 samples. */
79 | while(blkCnt > 0u)
80 | {
81 | /* C = A */
82 | /* Copy and then store the values in the destination buffer */
83 | in1 = *pSrc++;
84 | in2 = *pSrc++;
85 | in3 = *pSrc++;
86 | in4 = *pSrc++;
87 |
88 | *pDst++ = in1;
89 | *pDst++ = in2;
90 | *pDst++ = in3;
91 | *pDst++ = in4;
92 |
93 | /* Decrement the loop counter */
94 | blkCnt--;
95 | }
96 |
97 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
98 | ** No loop unrolling is used. */
99 | blkCnt = blockSize % 0x4u;
100 |
101 | #else
102 |
103 | /* Run the below code for Cortex-M0 */
104 |
105 | /* Loop over blockSize number of values */
106 | blkCnt = blockSize;
107 |
108 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
109 |
110 | while(blkCnt > 0u)
111 | {
112 | /* C = A */
113 | /* Copy and then store the value in the destination buffer */
114 | *pDst++ = *pSrc++;
115 |
116 | /* Decrement the loop counter */
117 | blkCnt--;
118 | }
119 | }
120 |
121 | /**
122 | * @} end of BasicCopy group
123 | */
124 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_copy_q7.c
9 | *
10 | * Description: Copies the elements of a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup copy
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Copies the elements of a Q7 vector.
54 | * @param[in] *pSrc points to input vector
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the input vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_copy_q7(
62 | q7_t * pSrc,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | /*loop Unrolling */
73 | blkCnt = blockSize >> 2u;
74 |
75 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
76 | ** a second loop below computes the remaining 1 to 3 samples. */
77 | while(blkCnt > 0u)
78 | {
79 | /* C = A */
80 | /* Copy and then store the results in the destination buffer */
81 | /* 4 samples are copied and stored at a time using SIMD */
82 | *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
83 |
84 | /* Decrement the loop counter */
85 | blkCnt--;
86 | }
87 |
88 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
89 | ** No loop unrolling is used. */
90 | blkCnt = blockSize % 0x4u;
91 |
92 | #else
93 |
94 | /* Run the below code for Cortex-M0 */
95 |
96 | /* Loop over blockSize number of values */
97 | blkCnt = blockSize;
98 |
99 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
100 |
101 |
102 | while(blkCnt > 0u)
103 | {
104 | /* C = A */
105 | /* Copy and then store the results in the destination buffer */
106 | *pDst++ = *pSrc++;
107 |
108 | /* Decrement the loop counter */
109 | blkCnt--;
110 | }
111 | }
112 |
113 | /**
114 | * @} end of BasicCopy group
115 | */
116 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q15.c
9 | *
10 | * Description: Fills a constant value into a Q15 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q15 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q15(
62 | q15_t value,
63 | q15_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 |
75 | /*loop Unrolling */
76 | blkCnt = blockSize >> 2u;
77 |
78 | /* Packing two 16 bit values to 32 bit value in order to use SIMD */
79 | packedValue = __PKHBT(value, value, 16u);
80 |
81 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
82 | ** a second loop below computes the remaining 1 to 3 samples. */
83 | while(blkCnt > 0u)
84 | {
85 | /* C = value */
86 | /* Fill the value in the destination buffer */
87 | *__SIMD32(pDst)++ = packedValue;
88 | *__SIMD32(pDst)++ = packedValue;
89 |
90 | /* Decrement the loop counter */
91 | blkCnt--;
92 | }
93 |
94 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
95 | ** No loop unrolling is used. */
96 | blkCnt = blockSize % 0x4u;
97 |
98 | #else
99 |
100 | /* Run the below code for Cortex-M0 */
101 |
102 | /* Loop over blockSize number of values */
103 | blkCnt = blockSize;
104 |
105 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
106 |
107 | while(blkCnt > 0u)
108 | {
109 | /* C = value */
110 | /* Fill the value in the destination buffer */
111 | *pDst++ = value;
112 |
113 | /* Decrement the loop counter */
114 | blkCnt--;
115 | }
116 | }
117 |
118 | /**
119 | * @} end of Fill group
120 | */
121 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q31.c
9 | *
10 | * Description: Fills a constant value into a Q31 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q31 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q31(
62 | q31_t value,
63 | q31_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 |
69 | #ifndef ARM_MATH_CM0_FAMILY
70 |
71 | /* Run the below code for Cortex-M4 and Cortex-M3 */
72 | q31_t in1 = value;
73 | q31_t in2 = value;
74 | q31_t in3 = value;
75 | q31_t in4 = value;
76 |
77 | /*loop Unrolling */
78 | blkCnt = blockSize >> 2u;
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *pDst++ = in1;
87 | *pDst++ = in2;
88 | *pDst++ = in3;
89 | *pDst++ = in4;
90 |
91 | /* Decrement the loop counter */
92 | blkCnt--;
93 | }
94 |
95 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
96 | ** No loop unrolling is used. */
97 | blkCnt = blockSize % 0x4u;
98 |
99 | #else
100 |
101 | /* Run the below code for Cortex-M0 */
102 |
103 | /* Loop over blockSize number of values */
104 | blkCnt = blockSize;
105 |
106 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
107 |
108 | while(blkCnt > 0u)
109 | {
110 | /* C = value */
111 | /* Fill the value in the destination buffer */
112 | *pDst++ = value;
113 |
114 | /* Decrement the loop counter */
115 | blkCnt--;
116 | }
117 | }
118 |
119 | /**
120 | * @} end of Fill group
121 | */
122 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 19. March 2015
5 | * $Revision: V.1.4.5
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_fill_q7.c
9 | *
10 | * Description: Fills a constant value into a Q7 vector.
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #include "arm_math.h"
42 |
43 | /**
44 | * @ingroup groupSupport
45 | */
46 |
47 | /**
48 | * @addtogroup Fill
49 | * @{
50 | */
51 |
52 | /**
53 | * @brief Fills a constant value into a Q7 vector.
54 | * @param[in] value input value to be filled
55 | * @param[out] *pDst points to output vector
56 | * @param[in] blockSize length of the output vector
57 | * @return none.
58 | *
59 | */
60 |
61 | void arm_fill_q7(
62 | q7_t value,
63 | q7_t * pDst,
64 | uint32_t blockSize)
65 | {
66 | uint32_t blkCnt; /* loop counter */
67 |
68 | #ifndef ARM_MATH_CM0_FAMILY
69 |
70 | /* Run the below code for Cortex-M4 and Cortex-M3 */
71 |
72 | q31_t packedValue; /* value packed to 32 bits */
73 |
74 | /*loop Unrolling */
75 | blkCnt = blockSize >> 2u;
76 |
77 | /* Packing four 8 bit values to 32 bit value in order to use SIMD */
78 | packedValue = __PACKq7(value, value, value, value);
79 |
80 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
81 | ** a second loop below computes the remaining 1 to 3 samples. */
82 | while(blkCnt > 0u)
83 | {
84 | /* C = value */
85 | /* Fill the value in the destination buffer */
86 | *__SIMD32(pDst)++ = packedValue;
87 |
88 | /* Decrement the loop counter */
89 | blkCnt--;
90 | }
91 |
92 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
93 | ** No loop unrolling is used. */
94 | blkCnt = blockSize % 0x4u;
95 |
96 | #else
97 |
98 | /* Run the below code for Cortex-M0 */
99 |
100 | /* Loop over blockSize number of values */
101 | blkCnt = blockSize;
102 |
103 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */
104 |
105 | while(blkCnt > 0u)
106 | {
107 | /* C = value */
108 | /* Fill the value in the destination buffer */
109 | *pDst++ = value;
110 |
111 | /* Decrement the loop counter */
112 | blkCnt--;
113 | }
114 | }
115 |
116 | /**
117 | * @} end of Fill group
118 | */
119 |
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f10x.h
4 | * @author MCD Application Team
5 | * @version V4.1.0
6 | * @date 29-April-2016
7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | *