├── BackendSupport
├── CMSIS
│ ├── arm_common_tables.h
│ ├── arm_const_structs.h
│ ├── arm_math.h
│ ├── core_cm0.h
│ ├── core_cmFunc.h
│ ├── core_cmInstr.h
│ ├── libarm_cortexM0l_math.a
│ ├── startup_stm32f030.s
│ ├── stm32f0xx.h
│ ├── system_stm32f0xx.c
│ └── system_stm32f0xx.h
├── Documents
│ ├── DM00031936.pdf
│ ├── DM00051352.pdf
│ └── DM00104043.pdf
├── StdPeriph
│ ├── stm32f0xx_adc.c
│ ├── stm32f0xx_adc.h
│ ├── stm32f0xx_can.c
│ ├── stm32f0xx_can.h
│ ├── stm32f0xx_cec.c
│ ├── stm32f0xx_cec.h
│ ├── stm32f0xx_comp.c
│ ├── stm32f0xx_comp.h
│ ├── stm32f0xx_conf.h
│ ├── stm32f0xx_crc.c
│ ├── stm32f0xx_crc.h
│ ├── stm32f0xx_crs.c
│ ├── stm32f0xx_crs.h
│ ├── stm32f0xx_dac.c
│ ├── stm32f0xx_dac.h
│ ├── stm32f0xx_dbgmcu.c
│ ├── stm32f0xx_dbgmcu.h
│ ├── stm32f0xx_dma.c
│ ├── stm32f0xx_dma.h
│ ├── stm32f0xx_exti.c
│ ├── stm32f0xx_exti.h
│ ├── stm32f0xx_flash.c
│ ├── stm32f0xx_flash.h
│ ├── stm32f0xx_gpio.c
│ ├── stm32f0xx_gpio.h
│ ├── stm32f0xx_i2c.c
│ ├── stm32f0xx_i2c.h
│ ├── stm32f0xx_iwdg.c
│ ├── stm32f0xx_iwdg.h
│ ├── stm32f0xx_misc.c
│ ├── stm32f0xx_misc.h
│ ├── stm32f0xx_pwr.c
│ ├── stm32f0xx_pwr.h
│ ├── stm32f0xx_rcc.c
│ ├── stm32f0xx_rcc.h
│ ├── stm32f0xx_rtc.c
│ ├── stm32f0xx_rtc.h
│ ├── stm32f0xx_spi.c
│ ├── stm32f0xx_spi.h
│ ├── stm32f0xx_syscfg.c
│ ├── stm32f0xx_syscfg.h
│ ├── stm32f0xx_tim.c
│ ├── stm32f0xx_tim.h
│ ├── stm32f0xx_usart.c
│ ├── stm32f0xx_usart.h
│ ├── stm32f0xx_wwdg.c
│ └── stm32f0xx_wwdg.h
├── openocd.cfg
└── stm32f031_linker.ld
├── HardwareLayer
├── digital.h
├── systick_delay.c
├── systick_delay.h
├── usart1.c
├── usart1.h
├── xprintf.c
└── xprintf.h
├── Platforms
└── polyphonic-fm-synthesizer
│ ├── Hardware
│ ├── stm32f0_i2s.brd
│ └── stm32f0_i2s.sch
│ └── Mechanical
│ ├── box.stl
│ ├── case.scad
│ ├── lid+case.stl
│ └── lid.stl
├── README.md
├── _blink
├── Makefile
└── main.c
├── _i2s_16bit_dma
├── Makefile
└── main.c
├── _i2s_24bit_dma
├── Makefile
├── lut.h
├── lutgen
├── lutgen.c
└── main.c
├── _synth
├── Makefile
├── lut.h
├── main.c
├── math_func.h
├── ringBuffer.h
├── soft_uart.h
└── synth.h
└── _usart
├── Makefile
└── main.c
/BackendSupport/CMSIS/arm_common_tables.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_common_tables.h
9 | *
10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
11 | *
12 | * Target Processor: Cortex-M4/Cortex-M3
13 | *
14 | * Redistribution and use in source and binary forms, with or without
15 | * modification, are permitted provided that the following conditions
16 | * are met:
17 | * - Redistributions of source code must retain the above copyright
18 | * notice, this list of conditions and the following disclaimer.
19 | * - Redistributions in binary form must reproduce the above copyright
20 | * notice, this list of conditions and the following disclaimer in
21 | * the documentation and/or other materials provided with the
22 | * distribution.
23 | * - Neither the name of ARM LIMITED nor the names of its contributors
24 | * may be used to endorse or promote products derived from this
25 | * software without specific prior written permission.
26 | *
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 | * POSSIBILITY OF SUCH DAMAGE.
39 | * -------------------------------------------------------------------- */
40 |
41 | #ifndef _ARM_COMMON_TABLES_H
42 | #define _ARM_COMMON_TABLES_H
43 |
44 | #include "arm_math.h"
45 |
46 | extern const uint16_t armBitRevTable[1024];
47 | extern const q15_t armRecipTableQ15[64];
48 | extern const q31_t armRecipTableQ31[64];
49 | extern const q31_t realCoefAQ31[1024];
50 | extern const q31_t realCoefBQ31[1024];
51 | extern const float32_t twiddleCoef_16[32];
52 | extern const float32_t twiddleCoef_32[64];
53 | extern const float32_t twiddleCoef_64[128];
54 | extern const float32_t twiddleCoef_128[256];
55 | extern const float32_t twiddleCoef_256[512];
56 | extern const float32_t twiddleCoef_512[1024];
57 | extern const float32_t twiddleCoef_1024[2048];
58 | extern const float32_t twiddleCoef_2048[4096];
59 | extern const float32_t twiddleCoef_4096[8192];
60 | #define twiddleCoef twiddleCoef_4096
61 | extern const q31_t twiddleCoefQ31[6144];
62 | extern const q15_t twiddleCoefQ15[6144];
63 | extern const float32_t twiddleCoef_rfft_32[32];
64 | extern const float32_t twiddleCoef_rfft_64[64];
65 | extern const float32_t twiddleCoef_rfft_128[128];
66 | extern const float32_t twiddleCoef_rfft_256[256];
67 | extern const float32_t twiddleCoef_rfft_512[512];
68 | extern const float32_t twiddleCoef_rfft_1024[1024];
69 | extern const float32_t twiddleCoef_rfft_2048[2048];
70 | extern const float32_t twiddleCoef_rfft_4096[4096];
71 |
72 |
73 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 )
74 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 )
75 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 )
76 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
77 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
78 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
79 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
80 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
81 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
82 |
83 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
84 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
85 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
86 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
87 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
88 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
89 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
90 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
91 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
92 |
93 | #endif /* ARM_COMMON_TABLES_H */
94 |
--------------------------------------------------------------------------------
/BackendSupport/CMSIS/arm_const_structs.h:
--------------------------------------------------------------------------------
1 | /* ----------------------------------------------------------------------
2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
3 | *
4 | * $Date: 17. January 2013
5 | * $Revision: V1.4.1
6 | *
7 | * Project: CMSIS DSP Library
8 | * Title: arm_const_structs.h
9 | *
10 | * Description: This file has constant structs that are initialized for
11 | * user convenience. For example, some can be given as
12 | * arguments to the arm_cfft_f32() function.
13 | *
14 | * Target Processor: Cortex-M4/Cortex-M3
15 | *
16 | * Redistribution and use in source and binary forms, with or without
17 | * modification, are permitted provided that the following conditions
18 | * are met:
19 | * - Redistributions of source code must retain the above copyright
20 | * notice, this list of conditions and the following disclaimer.
21 | * - Redistributions in binary form must reproduce the above copyright
22 | * notice, this list of conditions and the following disclaimer in
23 | * the documentation and/or other materials provided with the
24 | * distribution.
25 | * - Neither the name of ARM LIMITED nor the names of its contributors
26 | * may be used to endorse or promote products derived from this
27 | * software without specific prior written permission.
28 | *
29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
32 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
33 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
34 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
35 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 | * POSSIBILITY OF SUCH DAMAGE.
41 | * -------------------------------------------------------------------- */
42 |
43 | #ifndef _ARM_CONST_STRUCTS_H
44 | #define _ARM_CONST_STRUCTS_H
45 |
46 | #include "arm_math.h"
47 | #include "arm_common_tables.h"
48 |
49 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
50 | 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
51 | };
52 |
53 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
54 | 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
55 | };
56 |
57 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
58 | 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
59 | };
60 |
61 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
62 | 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
63 | };
64 |
65 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
66 | 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
67 | };
68 |
69 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
70 | 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
71 | };
72 |
73 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
74 | 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
75 | };
76 |
77 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
78 | 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
79 | };
80 |
81 | const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
82 | 4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
83 | };
84 |
85 | #endif
86 |
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/BackendSupport/CMSIS/libarm_cortexM0l_math.a:
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https://raw.githubusercontent.com/kehribar/stm32f031_template/664712d42a45a2d5e4a3a8e4d0e624b8053aa644/BackendSupport/CMSIS/libarm_cortexM0l_math.a
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/BackendSupport/CMSIS/startup_stm32f030.s:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file startup_stm32f0xx.s
4 | * @author MCD Application Team
5 | * @version V1.2.0
6 | * @date 31-July-2013
7 | * @brief STM32F0xx Medium-density devices vector table for RIDE7 toolchain.
8 | * This module performs:
9 | * - Set the initial SP
10 | * - Set the initial PC == Reset_Handler,
11 | * - Set the vector table entries with the exceptions ISR address
12 | * - Configure the system clock
13 | * - Branches to main in the C library (which eventually
14 | * calls main()).
15 | * After Reset the Cortex-M0 processor is in Thread mode,
16 | * priority is Privileged, and the Stack is set to Main.
17 | ******************************************************************************
18 | * @attention
19 | *
20 | * © COPYRIGHT 2013 STMicroelectronics
21 | *
22 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
23 | * You may not use this file except in compliance with the License.
24 | * You may obtain a copy of the License at:
25 | *
26 | * http://www.st.com/software_license_agreement_liberty_v2
27 | *
28 | * Unless required by applicable law or agreed to in writing, software
29 | * distributed under the License is distributed on an "AS IS" BASIS,
30 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
31 | * See the License for the specific language governing permissions and
32 | * limitations under the License.
33 | *
34 | ******************************************************************************
35 | */
36 |
37 | .syntax unified
38 | .cpu cortex-m0
39 | .fpu softvfp
40 | .thumb
41 |
42 | .global g_pfnVectors
43 | .global Default_Handler
44 |
45 | /* start address for the initialization values of the .data section.
46 | defined in linker script */
47 | .word _sidata
48 | /* start address for the .data section. defined in linker script */
49 | .word _sdata
50 | /* end address for the .data section. defined in linker script */
51 | .word _edata
52 | /* start address for the .bss section. defined in linker script */
53 | .word _sbss
54 | /* end address for the .bss section. defined in linker script */
55 | .word _ebss
56 |
57 | .equ BootRAM, 0xF108F85F
58 | /**
59 | * @brief This is the code that gets called when the processor first
60 | * starts execution following a reset event. Only the absolutely
61 | * necessary set is performed, after which the application
62 | * supplied main() routine is called.
63 | * @param None
64 | * @retval : None
65 | */
66 |
67 | .section .text.Reset_Handler
68 | .weak Reset_Handler
69 | .type Reset_Handler, %function
70 | Reset_Handler:
71 | ldr r0, =_eram
72 | mov sp, r0 /* set stack pointer */
73 |
74 | /* Copy the data segment initializers from flash to SRAM */
75 | movs r1, #0
76 | b LoopCopyDataInit
77 |
78 | CopyDataInit:
79 | ldr r3, =_sidata
80 | ldr r3, [r3, r1]
81 | str r3, [r0, r1]
82 | adds r1, r1, #4
83 |
84 | LoopCopyDataInit:
85 | ldr r0, =_sdata
86 | ldr r3, =_edata
87 | adds r2, r0, r1
88 | cmp r2, r3
89 | bcc CopyDataInit
90 | ldr r2, =_sbss
91 | b LoopFillZerobss
92 | /* Zero fill the bss segment. */
93 | FillZerobss:
94 | movs r3, #0
95 | str r3, [r2]
96 | adds r2, r2, #4
97 |
98 |
99 | LoopFillZerobss:
100 | ldr r3, = _ebss
101 | cmp r2, r3
102 | bcc FillZerobss
103 |
104 | /* Call the clock system intitialization function.*/
105 | bl SystemInit
106 |
107 | /* Call the application's entry point.*/
108 | bl main
109 |
110 | LoopForever:
111 | b LoopForever
112 |
113 |
114 | .size Reset_Handler, .-Reset_Handler
115 |
116 | /**
117 | * @brief This is the code that gets called when the processor receives an
118 | * unexpected interrupt. This simply enters an infinite loop, preserving
119 | * the system state for examination by a debugger.
120 | *
121 | * @param None
122 | * @retval : None
123 | */
124 | .section .text.Default_Handler,"ax",%progbits
125 | Default_Handler:
126 | Infinite_Loop:
127 | b Infinite_Loop
128 | .size Default_Handler, .-Default_Handler
129 | /******************************************************************************
130 | *
131 | * The minimal vector table for a Cortex M0. Note that the proper constructs
132 | * must be placed on this to ensure that it ends up at physical address
133 | * 0x0000.0000.
134 | *
135 | ******************************************************************************/
136 | .section .isr_vector,"a",%progbits
137 | .type g_pfnVectors, %object
138 | .size g_pfnVectors, .-g_pfnVectors
139 |
140 |
141 | g_pfnVectors:
142 | .word _eram
143 | .word Reset_Handler
144 | .word NMI_Handler
145 | .word HardFault_Handler
146 | .word 0
147 | .word 0
148 | .word 0
149 | .word 0
150 | .word 0
151 | .word 0
152 | .word 0
153 | .word SVC_Handler
154 | .word 0
155 | .word 0
156 | .word PendSV_Handler
157 | .word SysTick_Handler
158 | .word WWDG_IRQHandler
159 | .word PVD_IRQHandler
160 | .word RTC_IRQHandler
161 | .word FLASH_IRQHandler
162 | .word RCC_IRQHandler
163 | .word EXTI0_1_IRQHandler
164 | .word EXTI2_3_IRQHandler
165 | .word EXTI4_15_IRQHandler
166 | .word TS_IRQHandler
167 | .word DMA1_Channel1_IRQHandler
168 | .word DMA1_Channel2_3_IRQHandler
169 | .word DMA1_Channel4_5_IRQHandler
170 | .word ADC1_COMP_IRQHandler
171 | .word TIM1_BRK_UP_TRG_COM_IRQHandler
172 | .word TIM1_CC_IRQHandler
173 | .word TIM2_IRQHandler
174 | .word TIM3_IRQHandler
175 | .word TIM6_DAC_IRQHandler
176 | .word 0
177 | .word TIM14_IRQHandler
178 | .word TIM15_IRQHandler
179 | .word TIM16_IRQHandler
180 | .word TIM17_IRQHandler
181 | .word I2C1_IRQHandler
182 | .word I2C2_IRQHandler
183 | .word SPI1_IRQHandler
184 | .word SPI2_IRQHandler
185 | .word USART1_IRQHandler
186 | .word USART2_IRQHandler
187 | .word 0
188 | .word CEC_IRQHandler
189 | .word 0
190 | .word BootRAM /* @0x108. This is for boot in RAM mode for
191 | STM32F0xx devices. */
192 |
193 | /*******************************************************************************
194 | *
195 | * Provide weak aliases for each Exception handler to the Default_Handler.
196 | * As they are weak aliases, any function with the same name will override
197 | * this definition.
198 | *
199 | *******************************************************************************/
200 |
201 | .weak NMI_Handler
202 | .thumb_set NMI_Handler,Default_Handler
203 |
204 | .weak HardFault_Handler
205 | .thumb_set HardFault_Handler,Default_Handler
206 |
207 | .weak SVC_Handler
208 | .thumb_set SVC_Handler,Default_Handler
209 |
210 | .weak PendSV_Handler
211 | .thumb_set PendSV_Handler,Default_Handler
212 |
213 | .weak SysTick_Handler
214 | .thumb_set SysTick_Handler,Default_Handler
215 |
216 | .weak WWDG_IRQHandler
217 | .thumb_set WWDG_IRQHandler,Default_Handler
218 |
219 | .weak PVD_IRQHandler
220 | .thumb_set PVD_IRQHandler,Default_Handler
221 |
222 | .weak RTC_IRQHandler
223 | .thumb_set RTC_IRQHandler,Default_Handler
224 |
225 | .weak FLASH_IRQHandler
226 | .thumb_set FLASH_IRQHandler,Default_Handler
227 |
228 | .weak RCC_IRQHandler
229 | .thumb_set RCC_IRQHandler,Default_Handler
230 |
231 | .weak EXTI0_1_IRQHandler
232 | .thumb_set EXTI0_1_IRQHandler,Default_Handler
233 |
234 | .weak EXTI2_3_IRQHandler
235 | .thumb_set EXTI2_3_IRQHandler,Default_Handler
236 |
237 | .weak EXTI4_15_IRQHandler
238 | .thumb_set EXTI4_15_IRQHandler,Default_Handler
239 |
240 | .weak TS_IRQHandler
241 | .thumb_set TS_IRQHandler,Default_Handler
242 |
243 | .weak DMA1_Channel1_IRQHandler
244 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
245 |
246 | .weak DMA1_Channel2_3_IRQHandler
247 | .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
248 |
249 | .weak DMA1_Channel4_5_IRQHandler
250 | .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
251 |
252 | .weak ADC1_COMP_IRQHandler
253 | .thumb_set ADC1_COMP_IRQHandler,Default_Handler
254 |
255 | .weak TIM1_BRK_UP_TRG_COM_IRQHandler
256 | .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
257 |
258 | .weak TIM1_CC_IRQHandler
259 | .thumb_set TIM1_CC_IRQHandler,Default_Handler
260 |
261 | .weak TIM2_IRQHandler
262 | .thumb_set TIM2_IRQHandler,Default_Handler
263 |
264 | .weak TIM3_IRQHandler
265 | .thumb_set TIM3_IRQHandler,Default_Handler
266 |
267 | .weak TIM6_DAC_IRQHandler
268 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler
269 |
270 | .weak TIM14_IRQHandler
271 | .thumb_set TIM14_IRQHandler,Default_Handler
272 |
273 | .weak TIM15_IRQHandler
274 | .thumb_set TIM15_IRQHandler,Default_Handler
275 |
276 | .weak TIM16_IRQHandler
277 | .thumb_set TIM16_IRQHandler,Default_Handler
278 |
279 | .weak TIM17_IRQHandler
280 | .thumb_set TIM17_IRQHandler,Default_Handler
281 |
282 | .weak I2C1_IRQHandler
283 | .thumb_set I2C1_IRQHandler,Default_Handler
284 |
285 | .weak I2C2_IRQHandler
286 | .thumb_set I2C2_IRQHandler,Default_Handler
287 |
288 | .weak SPI1_IRQHandler
289 | .thumb_set SPI1_IRQHandler,Default_Handler
290 |
291 | .weak SPI2_IRQHandler
292 | .thumb_set SPI2_IRQHandler,Default_Handler
293 |
294 | .weak USART1_IRQHandler
295 | .thumb_set USART1_IRQHandler,Default_Handler
296 |
297 | .weak USART2_IRQHandler
298 | .thumb_set USART2_IRQHandler,Default_Handler
299 |
300 | .weak CEC_IRQHandler
301 | .thumb_set CEC_IRQHandler,Default_Handler
302 |
303 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
304 |
305 |
--------------------------------------------------------------------------------
/BackendSupport/CMSIS/system_stm32f0xx.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f0xx.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Header File.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /** @addtogroup CMSIS
29 | * @{
30 | */
31 |
32 | /** @addtogroup stm32f0xx_system
33 | * @{
34 | */
35 |
36 | /**
37 | * @brief Define to prevent recursive inclusion
38 | */
39 | #ifndef __SYSTEM_STM32F0XX_H
40 | #define __SYSTEM_STM32F0XX_H
41 |
42 | #ifdef __cplusplus
43 | extern "C" {
44 | #endif
45 |
46 | /** @addtogroup STM32F0xx_System_Includes
47 | * @{
48 | */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 |
55 | /** @addtogroup STM32F0xx_System_Exported_types
56 | * @{
57 | */
58 |
59 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
60 |
61 | /**
62 | * @}
63 | */
64 |
65 | /** @addtogroup STM32F0xx_System_Exported_Constants
66 | * @{
67 | */
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /** @addtogroup STM32F0xx_System_Exported_Macros
74 | * @{
75 | */
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /** @addtogroup STM32F0xx_System_Exported_Functions
82 | * @{
83 | */
84 |
85 | extern void SystemInit(void);
86 | extern void SystemCoreClockUpdate(void);
87 | /**
88 | * @}
89 | */
90 |
91 | #ifdef __cplusplus
92 | }
93 | #endif
94 |
95 | #endif /*__SYSTEM_STM32F0XX_H */
96 |
97 | /**
98 | * @}
99 | */
100 |
101 | /**
102 | * @}
103 | */
104 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
105 |
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/BackendSupport/StdPeriph/stm32f0xx_comp.h:
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1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_comp.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the COMP firmware
8 | * library, applicable only for STM32F051 and STM32F072 devices.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_COMP_H
31 | #define __STM32F0XX_COMP_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup COMP
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief COMP Init structure definition
52 | */
53 |
54 | typedef struct
55 | {
56 |
57 | uint32_t COMP_InvertingInput; /*!< Selects the inverting input of the comparator.
58 | This parameter can be a value of @ref COMP_InvertingInput */
59 |
60 | uint32_t COMP_Output; /*!< Selects the output redirection of the comparator.
61 | This parameter can be a value of @ref COMP_Output */
62 |
63 | uint32_t COMP_OutputPol; /*!< Selects the output polarity of the comparator.
64 | This parameter can be a value of @ref COMP_OutputPolarity */
65 |
66 | uint32_t COMP_Hysteresis; /*!< Selects the hysteresis voltage of the comparator.
67 | This parameter can be a value of @ref COMP_Hysteresis */
68 |
69 | uint32_t COMP_Mode; /*!< Selects the operating mode of the comparator
70 | and allows to adjust the speed/consumption.
71 | This parameter can be a value of @ref COMP_Mode */
72 |
73 | }COMP_InitTypeDef;
74 |
75 | /* Exported constants --------------------------------------------------------*/
76 |
77 | /** @defgroup COMP_Exported_Constants
78 | * @{
79 | */
80 |
81 | /** @defgroup COMP_Selection
82 | * @{
83 | */
84 |
85 | #define COMP_Selection_COMP1 ((uint32_t)0x00000000) /*!< COMP1 Selection */
86 | #define COMP_Selection_COMP2 ((uint32_t)0x00000010) /*!< COMP2 Selection */
87 |
88 | #define IS_COMP_ALL_PERIPH(PERIPH) (((PERIPH) == COMP_Selection_COMP1) || \
89 | ((PERIPH) == COMP_Selection_COMP2))
90 |
91 | /**
92 | * @}
93 | */
94 |
95 | /** @defgroup COMP_InvertingInput
96 | * @{
97 | */
98 |
99 | #define COMP_InvertingInput_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
100 | #define COMP_InvertingInput_1_2VREFINT COMP_CSR_COMP1INSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
101 | #define COMP_InvertingInput_3_4VREFINT COMP_CSR_COMP1INSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
102 | #define COMP_InvertingInput_VREFINT ((uint32_t)0x00000030) /*!< VREFINT connected to comparator inverting input */
103 | #define COMP_InvertingInput_DAC1 COMP_CSR_COMP1INSEL_2 /*!< DAC1_OUT (PA4) connected to comparator inverting input */
104 | #define COMP_InvertingInput_DAC2 ((uint32_t)0x00000050) /*!< DAC2_OUT (PA5) connected to comparator inverting input, applicable only for STM32F072 devices */
105 | #define COMP_InvertingInput_IO ((uint32_t)0x00000060) /*!< I/O (PA0 for COMP1 and PA2 for COMP2) connected to comparator inverting input */
106 |
107 | #define IS_COMP_INVERTING_INPUT(INPUT) (((INPUT) == COMP_InvertingInput_1_4VREFINT) || \
108 | ((INPUT) == COMP_InvertingInput_1_2VREFINT) || \
109 | ((INPUT) == COMP_InvertingInput_3_4VREFINT) || \
110 | ((INPUT) == COMP_InvertingInput_VREFINT) || \
111 | ((INPUT) == COMP_InvertingInput_DAC1) || \
112 | ((INPUT) == COMP_InvertingInput_DAC2) || \
113 | ((INPUT) == COMP_InvertingInput_1_4VREFINT) || \
114 | ((INPUT) == COMP_InvertingInput_IO))
115 | /**
116 | * @}
117 | */
118 |
119 | /** @defgroup COMP_Output
120 | * @{
121 | */
122 |
123 | #define COMP_Output_None ((uint32_t)0x00000000) /*!< COMP output isn't connected to other peripherals */
124 | #define COMP_Output_TIM1BKIN COMP_CSR_COMP1OUTSEL_0 /*!< COMP output connected to TIM1 Break Input (BKIN) */
125 | #define COMP_Output_TIM1IC1 COMP_CSR_COMP1OUTSEL_1 /*!< COMP output connected to TIM1 Input Capture 1 */
126 | #define COMP_Output_TIM1OCREFCLR ((uint32_t)0x00000300) /*!< COMP output connected to TIM1 OCREF Clear */
127 | #define COMP_Output_TIM2IC4 COMP_CSR_COMP1OUTSEL_2 /*!< COMP output connected to TIM2 Input Capture 4 */
128 | #define COMP_Output_TIM2OCREFCLR ((uint32_t)0x00000500) /*!< COMP output connected to TIM2 OCREF Clear */
129 | #define COMP_Output_TIM3IC1 ((uint32_t)0x00000600) /*!< COMP output connected to TIM3 Input Capture 1 */
130 | #define COMP_Output_TIM3OCREFCLR COMP_CSR_COMP1OUTSEL /*!< COMP output connected to TIM3 OCREF Clear */
131 |
132 |
133 | #define IS_COMP_OUTPUT(OUTPUT) (((OUTPUT) == COMP_Output_None) || \
134 | ((OUTPUT) == COMP_Output_TIM1BKIN) || \
135 | ((OUTPUT) == COMP_Output_TIM1IC1) || \
136 | ((OUTPUT) == COMP_Output_TIM1OCREFCLR) || \
137 | ((OUTPUT) == COMP_Output_TIM2IC4) || \
138 | ((OUTPUT) == COMP_Output_TIM2OCREFCLR) || \
139 | ((OUTPUT) == COMP_Output_TIM3IC1) || \
140 | ((OUTPUT) == COMP_Output_TIM3OCREFCLR))
141 | /**
142 | * @}
143 | */
144 |
145 | /** @defgroup COMP_OutputPolarity
146 | * @{
147 | */
148 | #define COMP_OutputPol_NonInverted ((uint32_t)0x00000000) /*!< COMP output on GPIO isn't inverted */
149 | #define COMP_OutputPol_Inverted COMP_CSR_COMP1POL /*!< COMP output on GPIO is inverted */
150 |
151 | #define IS_COMP_OUTPUT_POL(POL) (((POL) == COMP_OutputPol_NonInverted) || \
152 | ((POL) == COMP_OutputPol_Inverted))
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /** @defgroup COMP_Hysteresis
159 | * @{
160 | */
161 | /* Please refer to the electrical characteristics in the device datasheet for
162 | the hysteresis level */
163 | #define COMP_Hysteresis_No 0x00000000 /*!< No hysteresis */
164 | #define COMP_Hysteresis_Low COMP_CSR_COMP1HYST_0 /*!< Hysteresis level low */
165 | #define COMP_Hysteresis_Medium COMP_CSR_COMP1HYST_1 /*!< Hysteresis level medium */
166 | #define COMP_Hysteresis_High COMP_CSR_COMP1HYST /*!< Hysteresis level high */
167 |
168 | #define IS_COMP_HYSTERESIS(HYSTERESIS) (((HYSTERESIS) == COMP_Hysteresis_No) || \
169 | ((HYSTERESIS) == COMP_Hysteresis_Low) || \
170 | ((HYSTERESIS) == COMP_Hysteresis_Medium) || \
171 | ((HYSTERESIS) == COMP_Hysteresis_High))
172 | /**
173 | * @}
174 | */
175 |
176 | /** @defgroup COMP_Mode
177 | * @{
178 | */
179 | /* Please refer to the electrical characteristics in the device datasheet for
180 | the power consumption values */
181 | #define COMP_Mode_HighSpeed 0x00000000 /*!< High Speed */
182 | #define COMP_Mode_MediumSpeed COMP_CSR_COMP1MODE_0 /*!< Medium Speed */
183 | #define COMP_Mode_LowPower COMP_CSR_COMP1MODE_1 /*!< Low power mode */
184 | #define COMP_Mode_UltraLowPower COMP_CSR_COMP1MODE /*!< Ultra-low power mode */
185 |
186 | #define IS_COMP_MODE(MODE) (((MODE) == COMP_Mode_UltraLowPower) || \
187 | ((MODE) == COMP_Mode_LowPower) || \
188 | ((MODE) == COMP_Mode_MediumSpeed) || \
189 | ((MODE) == COMP_Mode_HighSpeed))
190 | /**
191 | * @}
192 | */
193 |
194 | /** @defgroup COMP_OutputLevel
195 | * @{
196 | */
197 | /* When output polarity is not inverted, comparator output is high when
198 | the non-inverting input is at a higher voltage than the inverting input */
199 | #define COMP_OutputLevel_High COMP_CSR_COMP1OUT
200 | /* When output polarity is not inverted, comparator output is low when
201 | the non-inverting input is at a lower voltage than the inverting input*/
202 | #define COMP_OutputLevel_Low ((uint32_t)0x00000000)
203 |
204 | /**
205 | * @}
206 | */
207 |
208 | /**
209 | * @}
210 | */
211 |
212 | /* Exported macro ------------------------------------------------------------*/
213 | /* Exported functions ------------------------------------------------------- */
214 |
215 | /* Function used to set the COMP configuration to the default reset state ****/
216 | void COMP_DeInit(void);
217 |
218 | /* Initialization and Configuration functions *********************************/
219 | void COMP_Init(uint32_t COMP_Selection, COMP_InitTypeDef* COMP_InitStruct);
220 | void COMP_StructInit(COMP_InitTypeDef* COMP_InitStruct);
221 | void COMP_Cmd(uint32_t COMP_Selection, FunctionalState NewState);
222 | void COMP_SwitchCmd(FunctionalState NewState);
223 | uint32_t COMP_GetOutputLevel(uint32_t COMP_Selection);
224 |
225 | /* Window mode control function ***********************************************/
226 | void COMP_WindowCmd(FunctionalState NewState);
227 |
228 | /* COMP configuration locking function ****************************************/
229 | void COMP_LockConfig(uint32_t COMP_Selection);
230 |
231 | #ifdef __cplusplus
232 | }
233 | #endif
234 |
235 | #endif /*__STM32F0XX_COMP_H */
236 |
237 | /**
238 | * @}
239 | */
240 |
241 | /**
242 | * @}
243 | */
244 |
245 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
246 |
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/BackendSupport/StdPeriph/stm32f0xx_conf.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file Project/STM32F0xx_StdPeriph_Templates/stm32f0xx_conf.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief Library configuration file.
8 | ******************************************************************************
9 | * @attention
10 | *
11 | * © COPYRIGHT 2014 STMicroelectronics
12 | *
13 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 | * You may not use this file except in compliance with the License.
15 | * You may obtain a copy of the License at:
16 | *
17 | * http://www.st.com/software_license_agreement_liberty_v2
18 | *
19 | * Unless required by applicable law or agreed to in writing, software
20 | * distributed under the License is distributed on an "AS IS" BASIS,
21 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 | * See the License for the specific language governing permissions and
23 | * limitations under the License.
24 | *
25 | ******************************************************************************
26 | */
27 |
28 | /* Define to prevent recursive inclusion -------------------------------------*/
29 | #ifndef __STM32F0XX_CONF_H
30 | #define __STM32F0XX_CONF_H
31 |
32 | /* Includes ------------------------------------------------------------------*/
33 | /* Comment the line below to disable peripheral header file inclusion */
34 | #include "stm32f0xx_adc.h"
35 | #include "stm32f0xx_can.h"
36 | #include "stm32f0xx_cec.h"
37 | #include "stm32f0xx_crc.h"
38 | #include "stm32f0xx_crs.h"
39 | #include "stm32f0xx_comp.h"
40 | #include "stm32f0xx_dac.h"
41 | #include "stm32f0xx_dbgmcu.h"
42 | #include "stm32f0xx_dma.h"
43 | #include "stm32f0xx_exti.h"
44 | #include "stm32f0xx_flash.h"
45 | #include "stm32f0xx_gpio.h"
46 | #include "stm32f0xx_syscfg.h"
47 | #include "stm32f0xx_i2c.h"
48 | #include "stm32f0xx_iwdg.h"
49 | #include "stm32f0xx_pwr.h"
50 | #include "stm32f0xx_rcc.h"
51 | #include "stm32f0xx_rtc.h"
52 | #include "stm32f0xx_spi.h"
53 | #include "stm32f0xx_tim.h"
54 | #include "stm32f0xx_usart.h"
55 | #include "stm32f0xx_wwdg.h"
56 | #include "stm32f0xx_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
57 |
58 | /* Exported types ------------------------------------------------------------*/
59 | /* Exported constants --------------------------------------------------------*/
60 | /* Uncomment the line below to expanse the "assert_param" macro in the
61 | Standard Peripheral Library drivers code */
62 | /* #define USE_FULL_ASSERT 1 */
63 |
64 | /* Exported macro ------------------------------------------------------------*/
65 | #ifdef USE_FULL_ASSERT
66 |
67 | /**
68 | * @brief The assert_param macro is used for function's parameters check.
69 | * @param expr: If expr is false, it calls assert_failed function which reports
70 | * the name of the source file and the source line number of the call
71 | * that failed. If expr is true, it returns no value.
72 | * @retval None
73 | */
74 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
75 | /* Exported functions ------------------------------------------------------- */
76 | void assert_failed(uint8_t* file, uint32_t line);
77 | #else
78 | #define assert_param(expr) ((void)0)
79 | #endif /* USE_FULL_ASSERT */
80 |
81 | #endif /* __STM32F0XX_CONF_H */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_crc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_crc.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the CRC firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_CRC_H
31 | #define __STM32F0XX_CRC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /*!< Includes ----------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRC_ReverseInputData
52 | * @{
53 | */
54 | #define CRC_ReverseInputData_No ((uint32_t)0x00000000) /*!< No reverse operation of Input Data */
55 | #define CRC_ReverseInputData_8bits CRC_CR_REV_IN_0 /*!< Reverse operation of Input Data on 8 bits */
56 | #define CRC_ReverseInputData_16bits CRC_CR_REV_IN_1 /*!< Reverse operation of Input Data on 16 bits */
57 | #define CRC_ReverseInputData_32bits CRC_CR_REV_IN /*!< Reverse operation of Input Data on 32 bits */
58 |
59 | #define IS_CRC_REVERSE_INPUT_DATA(DATA) (((DATA) == CRC_ReverseInputData_No) || \
60 | ((DATA) == CRC_ReverseInputData_8bits) || \
61 | ((DATA) == CRC_ReverseInputData_16bits) || \
62 | ((DATA) == CRC_ReverseInputData_32bits))
63 |
64 | /**
65 | * @}
66 | */
67 |
68 | /** @defgroup CRC_PolynomialSize
69 | * @brief Only applicable for STM32F042 and STM32F072 devices
70 | * @{
71 | */
72 | #define CRC_PolSize_7 CRC_CR_POLSIZE /*!< 7-bit polynomial for CRC calculation */
73 | #define CRC_PolSize_8 CRC_CR_POLSIZE_1 /*!< 8-bit polynomial for CRC calculation */
74 | #define CRC_PolSize_16 CRC_CR_POLSIZE_0 /*!< 16-bit polynomial for CRC calculation */
75 | #define CRC_PolSize_32 ((uint32_t)0x00000000)/*!< 32-bit polynomial for CRC calculation */
76 |
77 | #define IS_CRC_POL_SIZE(SIZE) (((SIZE) == CRC_PolSize_7) || \
78 | ((SIZE) == CRC_PolSize_8) || \
79 | ((SIZE) == CRC_PolSize_16) || \
80 | ((SIZE) == CRC_PolSize_32))
81 |
82 | /**
83 | * @}
84 | */
85 |
86 | /* Exported macro ------------------------------------------------------------*/
87 | /* Exported functions ------------------------------------------------------- */
88 | /* Configuration of the CRC computation unit **********************************/
89 | void CRC_DeInit(void);
90 | void CRC_ResetDR(void);
91 | void CRC_PolynomialSizeSelect(uint32_t CRC_PolSize); /*!< Only applicable for STM32F042 and STM32F072 devices */
92 | void CRC_ReverseInputDataSelect(uint32_t CRC_ReverseInputData);
93 | void CRC_ReverseOutputDataCmd(FunctionalState NewState);
94 | void CRC_SetInitRegister(uint32_t CRC_InitValue);
95 | void CRC_SetPolynomial(uint32_t CRC_Pol); /*!< Only applicable for STM32F042 and STM32F072 devices */
96 |
97 | /* CRC computation ************************************************************/
98 | uint32_t CRC_CalcCRC(uint32_t CRC_Data);
99 | uint32_t CRC_CalcCRC16bits(uint16_t CRC_Data); /*!< Only applicable for STM32F042 and STM32F072 devices */
100 | uint32_t CRC_CalcCRC8bits(uint8_t CRC_Data); /*!< Only applicable for STM32F042 and STM32F072 devices */
101 | uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength);
102 | uint32_t CRC_GetCRC(void);
103 |
104 | /* Independent register (IDR) access (write/read) *****************************/
105 | void CRC_SetIDRegister(uint8_t CRC_IDValue);
106 | uint8_t CRC_GetIDRegister(void);
107 |
108 | #ifdef __cplusplus
109 | }
110 | #endif
111 |
112 | #endif /* __STM32F0XX_CRC_H */
113 |
114 | /**
115 | * @}
116 | */
117 |
118 | /**
119 | * @}
120 | */
121 |
122 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
123 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_crs.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_crs.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the CRS firmware
8 | * library, applicable only for STM32F042 and STM32F072 devices.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_CRS_H
31 | #define __STM32F0XX_CRS_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /*!< Includes ----------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup CRS
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup CRS_Interrupt_Sources
52 | * @{
53 | */
54 | #define CRS_IT_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
55 | #define CRS_IT_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
56 | #define CRS_IT_ERR CRS_ISR_ERRF /*!< error */
57 | #define CRS_IT_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
58 | #define CRS_IT_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
59 | #define CRS_IT_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
60 | #define CRS_IT_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
61 |
62 | #define IS_CRS_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
63 | ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC))
64 |
65 | #define IS_CRS_GET_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
66 | ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC) || \
67 | ((IT) == CRS_IT_TRIMOVF) || ((IT) == CRS_IT_SYNCERR) || \
68 | ((IT) == CRS_IT_SYNCMISS))
69 |
70 | #define IS_CRS_CLEAR_IT(IT) ((IT) != 0x00)
71 |
72 | /**
73 | * @}
74 | */
75 |
76 | /** @defgroup CRS_Flags
77 | * @{
78 | */
79 | #define CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
80 | #define CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
81 | #define CRS_FLAG_ERR CRS_ISR_ERRF /*!< error */
82 | #define CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
83 | #define CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
84 | #define CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
85 | #define CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
86 |
87 | #define IS_CRS_FLAG(FLAG) (((FLAG) == CRS_FLAG_SYNCOK) || ((FLAG) == CRS_FLAG_SYNCWARN) || \
88 | ((FLAG) == CRS_FLAG_ERR) || ((FLAG) == CRS_FLAG_ESYNC) || \
89 | ((FLAG) == CRS_FLAG_TRIMOVF) || ((FLAG) == CRS_FLAG_SYNCERR) || \
90 | ((FLAG) == CRS_FLAG_SYNCMISS))
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /** @defgroup CRS_Synchro_Source
97 | * @{
98 | */
99 | #define CRS_SYNCSource_GPIO ((uint32_t)0x00) /*!< Synchro Signal soucre GPIO */
100 | #define CRS_SYNCSource_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */
101 | #define CRS_SYNCSource_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF */
102 |
103 | #define IS_CRS_SYNC_SOURCE(SOURCE) (((SOURCE) == CRS_SYNCSource_GPIO) || \
104 | ((SOURCE) == CRS_SYNCSource_LSE) ||\
105 | ((SOURCE) == CRS_SYNCSource_USB))
106 | /**
107 | * @}
108 | */
109 |
110 | /** @defgroup CRS_SynchroDivider
111 | * @{
112 | */
113 | #define CRS_SYNC_Div1 ((uint32_t)0x00) /*!< Synchro Signal not divided */
114 | #define CRS_SYNC_Div2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */
115 | #define CRS_SYNC_Div4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */
116 | #define CRS_SYNC_Div8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
117 | #define CRS_SYNC_Div16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */
118 | #define CRS_SYNC_Div32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
119 | #define CRS_SYNC_Div64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
120 | #define CRS_SYNC_Div128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */
121 |
122 | #define IS_CRS_SYNC_DIV(DIV) (((DIV) == CRS_SYNC_Div1) || ((DIV) == CRS_SYNC_Div2) ||\
123 | ((DIV) == CRS_SYNC_Div4) || ((DIV) == CRS_SYNC_Div8) || \
124 | ((DIV) == CRS_SYNC_Div16) || ((DIV) == CRS_SYNC_Div32) || \
125 | ((DIV) == CRS_SYNC_Div64) || ((DIV) == CRS_SYNC_Div128))
126 | /**
127 | * @}
128 | */
129 |
130 | /** @defgroup CRS_SynchroPolarity
131 | * @{
132 | */
133 | #define CRS_SYNCPolarity_Rising ((uint32_t)0x00) /*!< Synchro Active on rising edge */
134 | #define CRS_SYNCPolarity_Falling CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */
135 |
136 | #define IS_CRS_SYNC_POLARITY(POLARITY) (((POLARITY) == CRS_SYNCPolarity_Rising) || \
137 | ((POLARITY) == CRS_SYNCPolarity_Falling))
138 | /**
139 | * @}
140 | */
141 |
142 |
143 |
144 | /* Exported macro ------------------------------------------------------------*/
145 | /* Exported functions ------------------------------------------------------- */
146 | /* Configuration of the CRS **********************************/
147 | void CRS_DeInit(void);
148 | void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue);
149 | void CRS_FrequencyErrorCounterCmd(FunctionalState NewState);
150 | void CRS_AutomaticCalibrationCmd(FunctionalState NewState);
151 | void CRS_SoftwareSynchronizationGenerate(void);
152 | void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue);
153 | void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue);
154 | void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler);
155 | void CRS_SynchronizationSourceConfig(uint32_t CRS_Source);
156 | void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity);
157 | uint32_t CRS_GetReloadValue(void);
158 | uint32_t CRS_GetHSI48CalibrationValue(void);
159 | uint32_t CRS_GetFrequencyErrorValue(void);
160 | uint32_t CRS_GetFrequencyErrorDirection(void);
161 |
162 | /* Interrupts and flags management functions **********************************/
163 | void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState);
164 | FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG);
165 | void CRS_ClearFlag(uint32_t CRS_FLAG);
166 | ITStatus CRS_GetITStatus(uint32_t CRS_IT);
167 | void CRS_ClearITPendingBit(uint32_t CRS_IT);
168 |
169 | #ifdef __cplusplus
170 | }
171 | #endif
172 |
173 | #endif /* __STM32F0XX_CRS_H */
174 |
175 | /**
176 | * @}
177 | */
178 |
179 | /**
180 | * @}
181 | */
182 |
183 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
184 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_dbgmcu.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_dbgmcu.c
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Debug MCU (DBGMCU) peripheral:
9 | * + Device and Revision ID management
10 | * + Peripherals Configuration
11 | * @verbatim
12 | * @endverbatim
13 | *
14 | ******************************************************************************
15 | * @attention
16 | *
17 | * © COPYRIGHT 2014 STMicroelectronics
18 | *
19 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
20 | * You may not use this file except in compliance with the License.
21 | * You may obtain a copy of the License at:
22 | *
23 | * http://www.st.com/software_license_agreement_liberty_v2
24 | *
25 | * Unless required by applicable law or agreed to in writing, software
26 | * distributed under the License is distributed on an "AS IS" BASIS,
27 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
28 | * See the License for the specific language governing permissions and
29 | * limitations under the License.
30 | *
31 | ******************************************************************************
32 | */
33 |
34 | /* Includes ------------------------------------------------------------------*/
35 | #include "stm32f0xx_dbgmcu.h"
36 |
37 | /** @addtogroup STM32F0xx_StdPeriph_Driver
38 | * @{
39 | */
40 |
41 | /** @defgroup DBGMCU
42 | * @brief DBGMCU driver modules
43 | * @{
44 | */
45 |
46 | /* Private typedef -----------------------------------------------------------*/
47 | /* Private define ------------------------------------------------------------*/
48 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF)
49 |
50 | /* Private macro -------------------------------------------------------------*/
51 | /* Private variables ---------------------------------------------------------*/
52 | /* Private function prototypes -----------------------------------------------*/
53 | /* Private functions ---------------------------------------------------------*/
54 |
55 | /** @defgroup DBGMCU_Private_Functions
56 | * @{
57 | */
58 |
59 |
60 | /** @defgroup DBGMCU_Group1 Device and Revision ID management functions
61 | * @brief Device and Revision ID management functions
62 | *
63 | @verbatim
64 | ==============================================================================
65 | ##### Device and Revision ID management functions #####
66 | ==============================================================================
67 |
68 | @endverbatim
69 | * @{
70 | */
71 |
72 | /**
73 | * @brief Returns the device revision identifier.
74 | * @param None
75 | * @retval Device revision identifier
76 | */
77 | uint32_t DBGMCU_GetREVID(void)
78 | {
79 | return(DBGMCU->IDCODE >> 16);
80 | }
81 |
82 | /**
83 | * @brief Returns the device identifier.
84 | * @param None
85 | * @retval Device identifier
86 | */
87 | uint32_t DBGMCU_GetDEVID(void)
88 | {
89 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK);
90 | }
91 |
92 | /**
93 | * @}
94 | */
95 |
96 | /** @defgroup DBGMCU_Group2 Peripherals Configuration functions
97 | * @brief Peripherals Configuration
98 | *
99 | @verbatim
100 | ==============================================================================
101 | ##### Peripherals Configuration functions #####
102 | ==============================================================================
103 |
104 | @endverbatim
105 | * @{
106 | */
107 |
108 | /**
109 | * @brief Configures low power mode behavior when the MCU is in Debug mode.
110 | * @param DBGMCU_Periph: specifies the low power mode.
111 | * This parameter can be any combination of the following values:
112 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode
113 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode
114 | * @param NewState: new state of the specified low power mode in Debug mode.
115 | * This parameter can be: ENABLE or DISABLE.
116 | * @retval None
117 | */
118 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState)
119 | {
120 | /* Check the parameters */
121 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph));
122 | assert_param(IS_FUNCTIONAL_STATE(NewState));
123 |
124 | if (NewState != DISABLE)
125 | {
126 | DBGMCU->CR |= DBGMCU_Periph;
127 | }
128 | else
129 | {
130 | DBGMCU->CR &= ~DBGMCU_Periph;
131 | }
132 | }
133 |
134 |
135 | /**
136 | * @brief Configures APB1 peripheral behavior when the MCU is in Debug mode.
137 | * @param DBGMCU_Periph: specifies the APB1 peripheral.
138 | * This parameter can be any combination of the following values:
139 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted,
140 | * not applicable for STM32F030 devices
141 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted
142 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted
143 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted,
144 | * applicable only for STM32F072 devices
145 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted
146 | * @arg DBGMCU_RTC_STOP: RTC Calendar and Wakeup counter stopped
147 | * when Core is halted.
148 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted
149 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted
150 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped
151 | * when Core is halted
152 | * @arg DBGMCU_CAN1_STOP: Debug CAN1 stopped when Core is halted,
153 | * applicable only for STM32F042 and STM32F072 devices
154 | * @param NewState: new state of the specified APB1 peripheral in Debug mode.
155 | * This parameter can be: ENABLE or DISABLE.
156 | * @retval None
157 | */
158 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
159 | {
160 | /* Check the parameters */
161 | assert_param(IS_DBGMCU_APB1PERIPH(DBGMCU_Periph));
162 | assert_param(IS_FUNCTIONAL_STATE(NewState));
163 |
164 | if (NewState != DISABLE)
165 | {
166 | DBGMCU->APB1FZ |= DBGMCU_Periph;
167 | }
168 | else
169 | {
170 | DBGMCU->APB1FZ &= ~DBGMCU_Periph;
171 | }
172 | }
173 |
174 | /**
175 | * @brief Configures APB2 peripheral behavior when the MCU is in Debug mode.
176 | * @param DBGMCU_Periph: specifies the APB2 peripheral.
177 | * This parameter can be any combination of the following values:
178 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted
179 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted
180 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted
181 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted
182 | * @param NewState: new state of the specified APB2 peripheral in Debug mode.
183 | * This parameter can be: ENABLE or DISABLE.
184 | * @retval None
185 | */
186 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState)
187 | {
188 | /* Check the parameters */
189 | assert_param(IS_DBGMCU_APB2PERIPH(DBGMCU_Periph));
190 | assert_param(IS_FUNCTIONAL_STATE(NewState));
191 |
192 | if (NewState != DISABLE)
193 | {
194 | DBGMCU->APB2FZ |= DBGMCU_Periph;
195 | }
196 | else
197 | {
198 | DBGMCU->APB2FZ &= ~DBGMCU_Periph;
199 | }
200 | }
201 |
202 | /**
203 | * @}
204 | */
205 |
206 | /**
207 | * @}
208 | */
209 |
210 | /**
211 | * @}
212 | */
213 |
214 | /**
215 | * @}
216 | */
217 |
218 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
219 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_dbgmcu.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_dbgmcu.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the DBGMCU firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_DBGMCU_H
31 | #define __STM32F0XX_DBGMCU_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup DBGMCU
45 | * @{
46 | */
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 |
50 |
51 | /** @defgroup DBGMCU_Exported_Constants
52 | * @{
53 | */
54 |
55 | #define DBGMCU_STOP DBGMCU_CR_DBG_STOP
56 | #define DBGMCU_STANDBY DBGMCU_CR_DBG_STANDBY
57 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFFF9) == 0x00) && ((PERIPH) != 0x00))
58 |
59 | #define DBGMCU_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< Not applicable for STM32F030 devices */
60 | #define DBGMCU_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP
61 | #define DBGMCU_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP
62 | #define DBGMCU_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< Only applicable for STM32F072 devices */
63 | #define DBGMCU_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP
64 | #define DBGMCU_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP
65 | #define DBGMCU_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP
66 | #define DBGMCU_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP
67 | #define DBGMCU_I2C1_SMBUS_TIMEOUT DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT
68 | #define DBGMCU_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP /*!< Only applicable for STM32F042 and STM32F072 devices */
69 | #define IS_DBGMCU_APB1PERIPH(PERIPH) ((((PERIPH) & 0xFDDFE2CC) == 0x00) && ((PERIPH) != 0x00))
70 |
71 | #define DBGMCU_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP
72 | #define DBGMCU_TIM15_STOP DBGMCU_APB2_FZ_DBG_TIM15_STOP
73 | #define DBGMCU_TIM16_STOP DBGMCU_APB2_FZ_DBG_TIM16_STOP
74 | #define DBGMCU_TIM17_STOP DBGMCU_APB2_FZ_DBG_TIM17_STOP
75 | #define IS_DBGMCU_APB2PERIPH(PERIPH) ((((PERIPH) & 0xFFF8F7FF) == 0x00) && ((PERIPH) != 0x00))
76 |
77 | /**
78 | * @}
79 | */
80 |
81 | /* Exported macro ------------------------------------------------------------*/
82 | /* Exported functions ------------------------------------------------------- */
83 |
84 | /* Device and Revision ID management functions ********************************/
85 | uint32_t DBGMCU_GetREVID(void);
86 | uint32_t DBGMCU_GetDEVID(void);
87 |
88 | /* Peripherals Configuration functions ****************************************/
89 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState);
90 | void DBGMCU_APB1PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
91 | void DBGMCU_APB2PeriphConfig(uint32_t DBGMCU_Periph, FunctionalState NewState);
92 |
93 | #ifdef __cplusplus
94 | }
95 | #endif
96 |
97 | #endif /* __STM32F0XX_DBGMCU_H */
98 |
99 | /**
100 | * @}
101 | */
102 |
103 | /**
104 | * @}
105 | */
106 |
107 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
108 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_exti.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_exti.c
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the EXTI peripheral:
9 | * + Initialization and Configuration
10 | * + Interrupts and flags management
11 | *
12 | * @verbatim
13 | ==============================================================================
14 | ##### EXTI features #####
15 | ==============================================================================
16 | [..] External interrupt/event lines are mapped as following:
17 | (#) All available GPIO pins are connected to the 16 external
18 | interrupt/event lines from EXTI0 to EXTI15.
19 | (#) EXTI line 16 is connected to the PVD output, not applicable for STM32F030 devices.
20 | (#) EXTI line 17 is connected to the RTC Alarm event.
21 | (#) EXTI line 18 is connected to the RTC Alarm event, applicable only for STM32F072 devices.
22 | (#) EXTI line 19 is connected to the RTC Tamper and TimeStamp events.
23 | (#) EXTI line 20 is connected to the RTC wakeup event, applicable only for STM32F072 devices.
24 | (#) EXTI line 21 is connected to the Comparator 1 wakeup event, applicable only for STM32F051 and STM32F072 devices.
25 | (#) EXTI line 22 is connected to the Comparator 2 wakeup event, applicable only for STM32F051 and STM32F072 devices.
26 | (#) EXTI line 23 is connected to the I2C1 wakeup event, not applicable for STM32F030 devices.
27 | (#) EXTI line 25 is connected to the USART1 wakeup event, not applicable for STM32F030 devices.
28 | (#) EXTI line 26 is connected to the USART2 wakeup event, applicable only for STM32F072 devices.
29 | (#) EXTI line 27 is connected to the CEC wakeup event, applicable only for STM32F051 and STM32F072 devices.
30 | (#) EXTI line 31 is connected to the VDD USB monitor event, applicable only for STM32F072 devices.
31 |
32 | ##### How to use this driver #####
33 | ==============================================================================
34 | [..] In order to use an I/O pin as an external interrupt source, follow
35 | steps below:
36 | (#) Configure the I/O in input mode using GPIO_Init()
37 | (#) Select the input source pin for the EXTI line using
38 | SYSCFG_EXTILineConfig().
39 | (#) Select the mode(interrupt, event) and configure the trigger selection
40 | (Rising, falling or both) using EXTI_Init(). For the internal interrupt,
41 | the trigger selection is not needed( the active edge is always the rising one).
42 | (#) Configure NVIC IRQ channel mapped to the EXTI line using NVIC_Init().
43 | (#) Optionally, you can generate a software interrupt using the function EXTI_GenerateSWInterrupt().
44 | [..]
45 | (@) SYSCFG APB clock must be enabled to get write access to SYSCFG_EXTICRx
46 | registers using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
47 | @endverbatim
48 | *
49 | ******************************************************************************
50 | * @attention
51 | *
52 | * © COPYRIGHT 2014 STMicroelectronics
53 | *
54 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
55 | * You may not use this file except in compliance with the License.
56 | * You may obtain a copy of the License at:
57 | *
58 | * http://www.st.com/software_license_agreement_liberty_v2
59 | *
60 | * Unless required by applicable law or agreed to in writing, software
61 | * distributed under the License is distributed on an "AS IS" BASIS,
62 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
63 | * See the License for the specific language governing permissions and
64 | * limitations under the License.
65 | *
66 | ******************************************************************************
67 | */
68 |
69 | /* Includes ------------------------------------------------------------------*/
70 | #include "stm32f0xx_exti.h"
71 |
72 | /** @addtogroup STM32F0xx_StdPeriph_Driver
73 | * @{
74 | */
75 |
76 | /** @defgroup EXTI
77 | * @brief EXTI driver modules
78 | * @{
79 | */
80 |
81 | /* Private typedef -----------------------------------------------------------*/
82 | /* Private define ------------------------------------------------------------*/
83 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */
84 |
85 | /* Private macro -------------------------------------------------------------*/
86 | /* Private variables ---------------------------------------------------------*/
87 | /* Private function prototypes -----------------------------------------------*/
88 | /* Private functions ---------------------------------------------------------*/
89 |
90 | /** @defgroup EXTI_Private_Functions
91 | * @{
92 | */
93 |
94 | /** @defgroup EXTI_Group1 Initialization and Configuration functions
95 | * @brief Initialization and Configuration functions
96 | *
97 | @verbatim
98 | ==============================================================================
99 | ##### Initialization and Configuration functions #####
100 | ==============================================================================
101 |
102 | @endverbatim
103 | * @{
104 | */
105 |
106 | /**
107 | * @brief Deinitializes the EXTI peripheral registers to their default reset
108 | * values.
109 | * @param None
110 | * @retval None
111 | */
112 | void EXTI_DeInit(void)
113 | {
114 | EXTI->IMR = 0x0F940000;
115 | EXTI->EMR = 0x00000000;
116 | EXTI->RTSR = 0x00000000;
117 | EXTI->FTSR = 0x00000000;
118 | EXTI->PR = 0x006BFFFF;
119 | }
120 |
121 | /**
122 | * @brief Initializes the EXTI peripheral according to the specified
123 | * parameters in the EXTI_InitStruct.
124 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure that
125 | * contains the configuration information for the EXTI peripheral.
126 | * @retval None
127 | */
128 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
129 | {
130 | uint32_t tmp = 0;
131 |
132 | /* Check the parameters */
133 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
134 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
135 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
136 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
137 |
138 | tmp = (uint32_t)EXTI_BASE;
139 |
140 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
141 | {
142 | /* Clear EXTI line configuration */
143 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
144 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
145 |
146 | tmp += EXTI_InitStruct->EXTI_Mode;
147 |
148 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
149 |
150 | /* Clear Rising Falling edge configuration */
151 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
152 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
153 |
154 | /* Select the trigger for the selected interrupts */
155 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
156 | {
157 | /* Rising Falling edge */
158 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line;
159 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line;
160 | }
161 | else
162 | {
163 | tmp = (uint32_t)EXTI_BASE;
164 | tmp += EXTI_InitStruct->EXTI_Trigger;
165 |
166 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
167 | }
168 | }
169 | else
170 | {
171 | tmp += EXTI_InitStruct->EXTI_Mode;
172 |
173 | /* Disable the selected external lines */
174 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line;
175 | }
176 | }
177 |
178 | /**
179 | * @brief Fills each EXTI_InitStruct member with its reset value.
180 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will
181 | * be initialized.
182 | * @retval None
183 | */
184 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
185 | {
186 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE;
187 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt;
188 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling;
189 | EXTI_InitStruct->EXTI_LineCmd = DISABLE;
190 | }
191 |
192 | /**
193 | * @brief Generates a Software interrupt on selected EXTI line.
194 | * @param EXTI_Line: specifies the EXTI line on which the software interrupt
195 | * will be generated.
196 | * This parameter can be any combination of EXTI_Linex where x can be (0..27).
197 | * @retval None
198 | */
199 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
200 | {
201 | /* Check the parameters */
202 | assert_param(IS_EXTI_LINE(EXTI_Line));
203 |
204 | EXTI->SWIER |= EXTI_Line;
205 | }
206 |
207 | /**
208 | * @}
209 | */
210 |
211 | /** @defgroup EXTI_Group2 Interrupts and flags management functions
212 | * @brief Interrupts and flags management functions
213 | *
214 | @verbatim
215 | ==============================================================================
216 | ##### Interrupts and flags management functions #####
217 | ==============================================================================
218 |
219 | @endverbatim
220 | * @{
221 | */
222 |
223 | /**
224 | * @brief Checks whether the specified EXTI line flag is set or not.
225 | * @param EXTI_Line: specifies the EXTI line flag to check.
226 | * This parameter can be EXTI_Linex where x can be (0..27).
227 | * @retval The new state of EXTI_Line (SET or RESET).
228 | */
229 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
230 | {
231 | FlagStatus bitstatus = RESET;
232 | /* Check the parameters */
233 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
234 |
235 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
236 | {
237 | bitstatus = SET;
238 | }
239 | else
240 | {
241 | bitstatus = RESET;
242 | }
243 | return bitstatus;
244 | }
245 |
246 | /**
247 | * @brief Clears the EXTI's line pending flags.
248 | * @param EXTI_Line: specifies the EXTI lines flags to clear.
249 | * This parameter can be any combination of EXTI_Linex where x can be (0..27).
250 | * @retval None
251 | */
252 | void EXTI_ClearFlag(uint32_t EXTI_Line)
253 | {
254 | /* Check the parameters */
255 | assert_param(IS_EXTI_LINE(EXTI_Line));
256 |
257 | EXTI->PR = EXTI_Line;
258 | }
259 |
260 | /**
261 | * @brief Checks whether the specified EXTI line is asserted or not.
262 | * @param EXTI_Line: specifies the EXTI line to check.
263 | * This parameter can be EXTI_Linex where x can be (0..27).
264 | * @retval The new state of EXTI_Line (SET or RESET).
265 | */
266 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
267 | {
268 | ITStatus bitstatus = RESET;
269 |
270 | /* Check the parameters */
271 | assert_param(IS_GET_EXTI_LINE(EXTI_Line));
272 |
273 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
274 | {
275 | bitstatus = SET;
276 | }
277 | else
278 | {
279 | bitstatus = RESET;
280 | }
281 | return bitstatus;
282 | }
283 |
284 | /**
285 | * @brief Clears the EXTI's line pending bits.
286 | * @param EXTI_Line: specifies the EXTI lines to clear.
287 | * This parameter can be any combination of EXTI_Linex where x can be (0..27).
288 | * @retval None
289 | */
290 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
291 | {
292 | /* Check the parameters */
293 | assert_param(IS_EXTI_LINE(EXTI_Line));
294 |
295 | EXTI->PR = EXTI_Line;
296 | }
297 |
298 | /**
299 | * @}
300 | */
301 |
302 | /**
303 | * @}
304 | */
305 |
306 | /**
307 | * @}
308 | */
309 |
310 | /**
311 | * @}
312 | */
313 |
314 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
315 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_exti.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the EXTI
8 | * firmware library
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_EXTI_H
31 | #define __STM32F0XX_EXTI_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup EXTI
45 | * @{
46 | */
47 | /* Exported types ------------------------------------------------------------*/
48 |
49 | /**
50 | * @brief EXTI mode enumeration
51 | */
52 |
53 | typedef enum
54 | {
55 | EXTI_Mode_Interrupt = 0x00,
56 | EXTI_Mode_Event = 0x04
57 | }EXTIMode_TypeDef;
58 |
59 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event))
60 |
61 | /**
62 | * @brief EXTI Trigger enumeration
63 | */
64 |
65 | typedef enum
66 | {
67 | EXTI_Trigger_Rising = 0x08,
68 | EXTI_Trigger_Falling = 0x0C,
69 | EXTI_Trigger_Rising_Falling = 0x10
70 | }EXTITrigger_TypeDef;
71 |
72 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \
73 | ((TRIGGER) == EXTI_Trigger_Falling) || \
74 | ((TRIGGER) == EXTI_Trigger_Rising_Falling))
75 | /**
76 | * @brief EXTI Init Structure definition
77 | */
78 |
79 | typedef struct
80 | {
81 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled.
82 | This parameter can be any combination of @ref EXTI_Lines */
83 |
84 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines.
85 | This parameter can be a value of @ref EXTIMode_TypeDef */
86 |
87 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
88 | This parameter can be a value of @ref EXTIMode_TypeDef */
89 |
90 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines.
91 | This parameter can be set either to ENABLE or DISABLE */
92 | }EXTI_InitTypeDef;
93 |
94 | /* Exported constants --------------------------------------------------------*/
95 |
96 | /** @defgroup EXTI_Exported_Constants
97 | * @{
98 | */
99 | /** @defgroup EXTI_Lines
100 | * @{
101 | */
102 |
103 | #define EXTI_Line0 ((uint32_t)0x00000001) /*!< External interrupt line 0 */
104 | #define EXTI_Line1 ((uint32_t)0x00000002) /*!< External interrupt line 1 */
105 | #define EXTI_Line2 ((uint32_t)0x00000004) /*!< External interrupt line 2 */
106 | #define EXTI_Line3 ((uint32_t)0x00000008) /*!< External interrupt line 3 */
107 | #define EXTI_Line4 ((uint32_t)0x00000010) /*!< External interrupt line 4 */
108 | #define EXTI_Line5 ((uint32_t)0x00000020) /*!< External interrupt line 5 */
109 | #define EXTI_Line6 ((uint32_t)0x00000040) /*!< External interrupt line 6 */
110 | #define EXTI_Line7 ((uint32_t)0x00000080) /*!< External interrupt line 7 */
111 | #define EXTI_Line8 ((uint32_t)0x00000100) /*!< External interrupt line 8 */
112 | #define EXTI_Line9 ((uint32_t)0x00000200) /*!< External interrupt line 9 */
113 | #define EXTI_Line10 ((uint32_t)0x00000400) /*!< External interrupt line 10 */
114 | #define EXTI_Line11 ((uint32_t)0x00000800) /*!< External interrupt line 11 */
115 | #define EXTI_Line12 ((uint32_t)0x00001000) /*!< External interrupt line 12 */
116 | #define EXTI_Line13 ((uint32_t)0x00002000) /*!< External interrupt line 13 */
117 | #define EXTI_Line14 ((uint32_t)0x00004000) /*!< External interrupt line 14 */
118 | #define EXTI_Line15 ((uint32_t)0x00008000) /*!< External interrupt line 15 */
119 | #define EXTI_Line16 ((uint32_t)0x00010000) /*!< External interrupt line 16
120 | Connected to the PVD Output,
121 | not applicable for STM32F030 devices */
122 | #define EXTI_Line17 ((uint32_t)0x00020000) /*!< Internal interrupt line 17
123 | Connected to the RTC Alarm
124 | event */
125 | #define EXTI_Line18 ((uint32_t)0x00040000) /*!< Internal interrupt line 18
126 | Connected to the USB
127 | event, only applicable for
128 | STM32F072 devices */
129 | #define EXTI_Line19 ((uint32_t)0x00080000) /*!< Internal interrupt line 19
130 | Connected to the RTC Tamper
131 | and Time Stamp events */
132 | #define EXTI_Line20 ((uint32_t)0x00100000) /*!< Internal interrupt line 20
133 | Connected to the RTC wakeup
134 | event, only applicable for
135 | STM32F072 devices */
136 | #define EXTI_Line21 ((uint32_t)0x00200000) /*!< Internal interrupt line 21
137 | Connected to the Comparator 1
138 | event, only applicable for STM32F051
139 | ans STM32F072 devices */
140 | #define EXTI_Line22 ((uint32_t)0x00400000) /*!< Internal interrupt line 22
141 | Connected to the Comparator 2
142 | event, only applicable for STM32F051
143 | and STM32F072 devices */
144 | #define EXTI_Line23 ((uint32_t)0x00800000) /*!< Internal interrupt line 23
145 | Connected to the I2C1 wakeup
146 | event, not applicable for STM32F030 devices */
147 | #define EXTI_Line25 ((uint32_t)0x02000000) /*!< Internal interrupt line 25
148 | Connected to the USART1 wakeup
149 | event, not applicable for STM32F030 devices */
150 | #define EXTI_Line26 ((uint32_t)0x04000000) /*!< Internal interrupt line 26
151 | Connected to the USART2 wakeup
152 | event, applicable only for
153 | STM32F072 devices */
154 | #define EXTI_Line27 ((uint32_t)0x08000000) /*!< Internal interrupt line 27
155 | Connected to the CEC wakeup
156 | event, applicable only for STM32F051
157 | and STM32F072 devices */
158 | #define EXTI_Line31 ((uint32_t)0x80000000) /*!< Internal interrupt line 31
159 | Connected to the VDD USB monitor
160 | event, applicable only for
161 | STM32F072 devices */
162 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0x71000000) == 0x00) && ((LINE) != (uint16_t)0x00))
163 |
164 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \
165 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \
166 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \
167 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \
168 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \
169 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \
170 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \
171 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \
172 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \
173 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19) || \
174 | ((LINE) == EXTI_Line20) || ((LINE) == EXTI_Line21) || \
175 | ((LINE) == EXTI_Line22) || ((LINE) == EXTI_Line23) || \
176 | ((LINE) == EXTI_Line25) || ((LINE) == EXTI_Line26) || \
177 | ((LINE) == EXTI_Line27) || ((LINE) == EXTI_Line31))
178 |
179 | /**
180 | * @}
181 | */
182 |
183 | /**
184 | * @}
185 | */
186 |
187 | /* Exported macro ------------------------------------------------------------*/
188 | /* Exported functions ------------------------------------------------------- */
189 | /* Function used to set the EXTI configuration to the default reset state *****/
190 | void EXTI_DeInit(void);
191 |
192 | /* Initialization and Configuration functions *********************************/
193 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct);
194 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct);
195 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
196 |
197 | /* Interrupts and flags management functions **********************************/
198 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line);
199 | void EXTI_ClearFlag(uint32_t EXTI_Line);
200 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line);
201 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line);
202 |
203 | #ifdef __cplusplus
204 | }
205 | #endif
206 |
207 | #endif /* __STM32F0XX_EXTI_H */
208 | /**
209 | * @}
210 | */
211 |
212 | /**
213 | * @}
214 | */
215 |
216 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
217 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_iwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_iwdg.c
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Independent watchdog (IWDG) peripheral:
9 | * + Prescaler and Counter configuration
10 | * + IWDG activation
11 | * + Flag management
12 | *
13 | * @verbatim
14 | *
15 | ==============================================================================
16 | ##### IWDG features #####
17 | ==============================================================================
18 | [..] The IWDG can be started by either software or hardware (configurable
19 | through option byte).
20 |
21 | [..] The IWDG is clocked by its own dedicated low-speed clock (LSI) and
22 | thus stays active even if the main clock fails.
23 | Once the IWDG is started, the LSI is forced ON and cannot be disabled
24 | (LSI cannot be disabled too), and the counter starts counting down from
25 | the reset value of 0xFFF. When it reaches the end of count value (0x000)
26 | a system reset is generated.
27 | The IWDG counter should be reloaded at regular intervals to prevent
28 | an MCU reset.
29 |
30 | [..] The IWDG is implemented in the VDD voltage domain that is still functional
31 | in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
32 |
33 | [..] IWDGRST flag in RCC_CSR register can be used to inform when a IWDG
34 | reset occurs.
35 |
36 | [..] Min-max timeout value @40KHz (LSI): ~0.1ms / ~28.3s
37 | The IWDG timeout may vary due to LSI frequency dispersion. STM32F0xx
38 | devices provide the capability to measure the LSI frequency (LSI clock
39 | should be seleted as RTC clock which is internally connected to TIM10 CH1
40 | input capture). The measured value can be used to have an IWDG timeout with
41 | an acceptable accuracy.
42 | For more information, please refer to the STM32F0xx Reference manual.
43 |
44 | ##### How to use this driver #####
45 | ==============================================================================
46 | [..] This driver allows to use IWDG peripheral with either window option enabled
47 | or disabled. To do so follow one of the two procedures below.
48 | (#) Window option is enabled:
49 | (++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
50 | in software mode (no need to enable the LSI, it will be enabled
51 | by hardware).
52 | (++) Enable write access to IWDG_PR and IWDG_RLR registers using
53 | IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
54 | (++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
55 | (++) Configure the IWDG counter value using IWDG_SetReload() function.
56 | This value will be loaded in the IWDG counter each time the counter
57 | is reloaded, then the IWDG will start counting down from this value.
58 | (++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
59 | (++) Configure the IWDG refresh window using IWDG_SetWindowValue() function.
60 |
61 | (#) Window option is disabled:
62 | (++) Enable write access to IWDG_PR and IWDG_RLR registers using
63 | IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable) function.
64 | (++) Configure the IWDG prescaler using IWDG_SetPrescaler() function.
65 | (++) Configure the IWDG counter value using IWDG_SetReload() function.
66 | This value will be loaded in the IWDG counter each time the counter
67 | is reloaded, then the IWDG will start counting down from this value.
68 | (++) Wait for the IWDG registers to be updated using IWDG_GetFlagStatus() function.
69 | (++) reload the IWDG counter at regular intervals during normal operation
70 | to prevent an MCU reset, using IWDG_ReloadCounter() function.
71 | (++) Start the IWDG using IWDG_Enable() function, when the IWDG is used
72 | in software mode (no need to enable the LSI, it will be enabled
73 | by hardware).
74 |
75 | @endverbatim
76 | *
77 | ******************************************************************************
78 | * @attention
79 | *
80 | * © COPYRIGHT 2014 STMicroelectronics
81 | *
82 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
83 | * You may not use this file except in compliance with the License.
84 | * You may obtain a copy of the License at:
85 | *
86 | * http://www.st.com/software_license_agreement_liberty_v2
87 | *
88 | * Unless required by applicable law or agreed to in writing, software
89 | * distributed under the License is distributed on an "AS IS" BASIS,
90 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
91 | * See the License for the specific language governing permissions and
92 | * limitations under the License.
93 | *
94 | ******************************************************************************
95 | */
96 |
97 | /* Includes ------------------------------------------------------------------*/
98 | #include "stm32f0xx_iwdg.h"
99 |
100 | /** @addtogroup STM32F0xx_StdPeriph_Driver
101 | * @{
102 | */
103 |
104 | /** @defgroup IWDG
105 | * @brief IWDG driver modules
106 | * @{
107 | */
108 |
109 | /* Private typedef -----------------------------------------------------------*/
110 | /* Private define ------------------------------------------------------------*/
111 | /* ---------------------- IWDG registers bit mask ----------------------------*/
112 | /* KR register bit mask */
113 | #define KR_KEY_RELOAD ((uint16_t)0xAAAA)
114 | #define KR_KEY_ENABLE ((uint16_t)0xCCCC)
115 |
116 | /* Private macro -------------------------------------------------------------*/
117 | /* Private variables ---------------------------------------------------------*/
118 | /* Private function prototypes -----------------------------------------------*/
119 | /* Private functions ---------------------------------------------------------*/
120 |
121 | /** @defgroup IWDG_Private_Functions
122 | * @{
123 | */
124 |
125 | /** @defgroup IWDG_Group1 Prescaler and Counter configuration functions
126 | * @brief Prescaler and Counter configuration functions
127 | *
128 | @verbatim
129 | ==============================================================================
130 | ##### Prescaler and Counter configuration functions #####
131 | ==============================================================================
132 |
133 | @endverbatim
134 | * @{
135 | */
136 |
137 | /**
138 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
139 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
140 | * This parameter can be one of the following values:
141 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
142 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
143 | * @retval None
144 | */
145 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
146 | {
147 | /* Check the parameters */
148 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
149 | IWDG->KR = IWDG_WriteAccess;
150 | }
151 |
152 | /**
153 | * @brief Sets IWDG Prescaler value.
154 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
155 | * This parameter can be one of the following values:
156 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
157 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
158 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
159 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
160 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
161 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
162 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
163 | * @retval None
164 | */
165 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
166 | {
167 | /* Check the parameters */
168 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
169 | IWDG->PR = IWDG_Prescaler;
170 | }
171 |
172 | /**
173 | * @brief Sets IWDG Reload value.
174 | * @param Reload: specifies the IWDG Reload value.
175 | * This parameter must be a number between 0 and 0x0FFF.
176 | * @retval None
177 | */
178 | void IWDG_SetReload(uint16_t Reload)
179 | {
180 | /* Check the parameters */
181 | assert_param(IS_IWDG_RELOAD(Reload));
182 | IWDG->RLR = Reload;
183 | }
184 |
185 | /**
186 | * @brief Reloads IWDG counter with value defined in the reload register
187 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
188 | * @param None
189 | * @retval None
190 | */
191 | void IWDG_ReloadCounter(void)
192 | {
193 | IWDG->KR = KR_KEY_RELOAD;
194 | }
195 |
196 |
197 | /**
198 | * @brief Sets the IWDG window value.
199 | * @param WindowValue: specifies the window value to be compared to the downcounter.
200 | * @retval None
201 | */
202 | void IWDG_SetWindowValue(uint16_t WindowValue)
203 | {
204 | /* Check the parameters */
205 | assert_param(IS_IWDG_WINDOW_VALUE(WindowValue));
206 | IWDG->WINR = WindowValue;
207 | }
208 |
209 | /**
210 | * @}
211 | */
212 |
213 | /** @defgroup IWDG_Group2 IWDG activation function
214 | * @brief IWDG activation function
215 | *
216 | @verbatim
217 | ==============================================================================
218 | ##### IWDG activation function #####
219 | ==============================================================================
220 |
221 | @endverbatim
222 | * @{
223 | */
224 |
225 | /**
226 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
227 | * @param None
228 | * @retval None
229 | */
230 | void IWDG_Enable(void)
231 | {
232 | IWDG->KR = KR_KEY_ENABLE;
233 | }
234 |
235 | /**
236 | * @}
237 | */
238 |
239 | /** @defgroup IWDG_Group3 Flag management function
240 | * @brief Flag management function
241 | *
242 | @verbatim
243 | ===============================================================================
244 | ##### Flag management function #####
245 | ===============================================================================
246 |
247 | @endverbatim
248 | * @{
249 | */
250 |
251 | /**
252 | * @brief Checks whether the specified IWDG flag is set or not.
253 | * @param IWDG_FLAG: specifies the flag to check.
254 | * This parameter can be one of the following values:
255 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
256 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
257 | * @arg IWDG_FLAG_WVU: Counter Window Value Update on going
258 | * @retval The new state of IWDG_FLAG (SET or RESET).
259 | */
260 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
261 | {
262 | FlagStatus bitstatus = RESET;
263 | /* Check the parameters */
264 | assert_param(IS_IWDG_FLAG(IWDG_FLAG));
265 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
266 | {
267 | bitstatus = SET;
268 | }
269 | else
270 | {
271 | bitstatus = RESET;
272 | }
273 | /* Return the flag status */
274 | return bitstatus;
275 | }
276 |
277 | /**
278 | * @}
279 | */
280 |
281 | /**
282 | * @}
283 | */
284 |
285 | /**
286 | * @}
287 | */
288 |
289 | /**
290 | * @}
291 | */
292 |
293 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
294 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_iwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_iwdg.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the IWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_IWDG_H
31 | #define __STM32F0XX_IWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup IWDG
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 | /* Exported constants --------------------------------------------------------*/
50 |
51 | /** @defgroup IWDG_Exported_Constants
52 | * @{
53 | */
54 |
55 | /** @defgroup IWDG_WriteAccess
56 | * @{
57 | */
58 |
59 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555)
60 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000)
61 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \
62 | ((ACCESS) == IWDG_WriteAccess_Disable))
63 | /**
64 | * @}
65 | */
66 |
67 | /** @defgroup IWDG_prescaler
68 | * @{
69 | */
70 |
71 | #define IWDG_Prescaler_4 ((uint8_t)0x00)
72 | #define IWDG_Prescaler_8 ((uint8_t)0x01)
73 | #define IWDG_Prescaler_16 ((uint8_t)0x02)
74 | #define IWDG_Prescaler_32 ((uint8_t)0x03)
75 | #define IWDG_Prescaler_64 ((uint8_t)0x04)
76 | #define IWDG_Prescaler_128 ((uint8_t)0x05)
77 | #define IWDG_Prescaler_256 ((uint8_t)0x06)
78 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \
79 | ((PRESCALER) == IWDG_Prescaler_8) || \
80 | ((PRESCALER) == IWDG_Prescaler_16) || \
81 | ((PRESCALER) == IWDG_Prescaler_32) || \
82 | ((PRESCALER) == IWDG_Prescaler_64) || \
83 | ((PRESCALER) == IWDG_Prescaler_128)|| \
84 | ((PRESCALER) == IWDG_Prescaler_256))
85 | /**
86 | * @}
87 | */
88 |
89 | /** @defgroup IWDG_Flag
90 | * @{
91 | */
92 |
93 | #define IWDG_FLAG_PVU IWDG_SR_PVU
94 | #define IWDG_FLAG_RVU IWDG_SR_RVU
95 | #define IWDG_FLAG_WVU IWDG_SR_WVU
96 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU) || \
97 | ((FLAG) == IWDG_FLAG_WVU))
98 |
99 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF)
100 |
101 | #define IS_IWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0xFFF)
102 | /**
103 | * @}
104 | */
105 |
106 | /**
107 | * @}
108 | */
109 |
110 | /* Exported macro ------------------------------------------------------------*/
111 | /* Exported functions ------------------------------------------------------- */
112 |
113 | /* Prescaler and Counter configuration functions ******************************/
114 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess);
115 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler);
116 | void IWDG_SetReload(uint16_t Reload);
117 | void IWDG_ReloadCounter(void);
118 | void IWDG_SetWindowValue(uint16_t WindowValue);
119 |
120 | /* IWDG activation function ***************************************************/
121 | void IWDG_Enable(void);
122 |
123 | /* Flag management function ***************************************************/
124 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG);
125 |
126 | #ifdef __cplusplus
127 | }
128 | #endif
129 |
130 | #endif /* __STM32F0XX_IWDG_H */
131 |
132 | /**
133 | * @}
134 | */
135 |
136 | /**
137 | * @}
138 | */
139 |
140 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
141 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_misc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_misc.c
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file provides all the miscellaneous firmware functions (add-on
8 | * to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "stm32f0xx_misc.h"
31 |
32 | /** @addtogroup STM32F0xx_StdPeriph_Driver
33 | * @{
34 | */
35 |
36 | /** @defgroup MISC
37 | * @brief MISC driver modules
38 | * @{
39 | */
40 |
41 | /* Private typedef -----------------------------------------------------------*/
42 | /* Private define ------------------------------------------------------------*/
43 | /* Private macro -------------------------------------------------------------*/
44 | /* Private variables ---------------------------------------------------------*/
45 | /* Private function prototypes -----------------------------------------------*/
46 | /* Private functions ---------------------------------------------------------*/
47 |
48 | /** @defgroup MISC_Private_Functions
49 | * @{
50 | */
51 | /**
52 | *
53 | @verbatim
54 | *******************************************************************************
55 | ##### Interrupts configuration functions #####
56 | *******************************************************************************
57 | [..] This section provide functions allowing to configure the NVIC interrupts
58 | (IRQ). The Cortex-M0 exceptions are managed by CMSIS functions.
59 | (#) Enable and Configure the priority of the selected IRQ Channels.
60 | The priority can be 0..3.
61 |
62 | -@- Lower priority values gives higher priority.
63 | -@- Priority Order:
64 | (#@) Lowest priority.
65 | (#@) Lowest hardware priority (IRQn position).
66 |
67 | @endverbatim
68 | */
69 |
70 | /**
71 | * @brief Initializes the NVIC peripheral according to the specified
72 | * parameters in the NVIC_InitStruct.
73 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
74 | * the configuration information for the specified NVIC peripheral.
75 | * @retval None
76 | */
77 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
78 | {
79 | uint32_t tmppriority = 0x00;
80 |
81 | /* Check the parameters */
82 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
83 | assert_param(IS_NVIC_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPriority));
84 |
85 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
86 | {
87 | /* Compute the Corresponding IRQ Priority --------------------------------*/
88 | tmppriority = NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02];
89 | tmppriority &= (uint32_t)(~(((uint32_t)0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8)));
90 | tmppriority |= (uint32_t)((((uint32_t)NVIC_InitStruct->NVIC_IRQChannelPriority << 6) & 0xFF) << ((NVIC_InitStruct->NVIC_IRQChannel & 0x03) * 8));
91 |
92 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel >> 0x02] = tmppriority;
93 |
94 | /* Enable the Selected IRQ Channels --------------------------------------*/
95 | NVIC->ISER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
96 | }
97 | else
98 | {
99 | /* Disable the Selected IRQ Channels -------------------------------------*/
100 | NVIC->ICER[0] = (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
101 | }
102 | }
103 |
104 | /**
105 | * @brief Selects the condition for the system to enter low power mode.
106 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
107 | * This parameter can be one of the following values:
108 | * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
109 | * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
110 | * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
111 | * @param NewState: new state of LP condition.
112 | * This parameter can be: ENABLE or DISABLE.
113 | * @retval None
114 | */
115 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
116 | {
117 | /* Check the parameters */
118 | assert_param(IS_NVIC_LP(LowPowerMode));
119 |
120 | assert_param(IS_FUNCTIONAL_STATE(NewState));
121 |
122 | if (NewState != DISABLE)
123 | {
124 | SCB->SCR |= LowPowerMode;
125 | }
126 | else
127 | {
128 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
129 | }
130 | }
131 |
132 | /**
133 | * @brief Configures the SysTick clock source.
134 | * @param SysTick_CLKSource: specifies the SysTick clock source.
135 | * This parameter can be one of the following values:
136 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
137 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
138 | * @retval None
139 | */
140 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
141 | {
142 | /* Check the parameters */
143 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
144 |
145 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
146 | {
147 | SysTick->CTRL |= SysTick_CLKSource_HCLK;
148 | }
149 | else
150 | {
151 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
152 | }
153 | }
154 |
155 | /**
156 | * @}
157 | */
158 |
159 | /**
160 | * @}
161 | */
162 |
163 | /**
164 | * @}
165 | */
166 |
167 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
168 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_misc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_misc.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the miscellaneous
8 | * firmware library functions (add-on to CMSIS functions).
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_MISC_H
31 | #define __STM32F0XX_MISC_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup MISC
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /**
51 | * @brief NVIC Init Structure definition
52 | */
53 |
54 | typedef struct
55 | {
56 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
57 | This parameter can be a value of @ref IRQn_Type
58 | (For the complete STM32 Devices IRQ Channels list,
59 | please refer to stm32f0xx.h file) */
60 |
61 | uint8_t NVIC_IRQChannelPriority; /*!< Specifies the priority level for the IRQ channel specified
62 | in NVIC_IRQChannel. This parameter can be a value
63 | between 0 and 3. */
64 |
65 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
66 | will be enabled or disabled.
67 | This parameter can be set either to ENABLE or DISABLE */
68 | } NVIC_InitTypeDef;
69 |
70 | /**
71 | *
72 | @verbatim
73 |
74 | @endverbatim
75 | */
76 |
77 | /* Exported constants --------------------------------------------------------*/
78 |
79 | /** @defgroup MISC_Exported_Constants
80 | * @{
81 | */
82 |
83 | /** @defgroup MISC_System_Low_Power
84 | * @{
85 | */
86 |
87 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10)
88 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
89 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
90 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
91 | ((LP) == NVIC_LP_SLEEPDEEP) || \
92 | ((LP) == NVIC_LP_SLEEPONEXIT))
93 | /**
94 | * @}
95 | */
96 |
97 | /** @defgroup MISC_Preemption_Priority_Group
98 | * @{
99 | */
100 | #define IS_NVIC_PRIORITY(PRIORITY) ((PRIORITY) < 0x04)
101 |
102 | /**
103 | * @}
104 | */
105 |
106 | /** @defgroup MISC_SysTick_clock_source
107 | * @{
108 | */
109 |
110 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
111 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
112 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
113 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8))
114 | /**
115 | * @}
116 | */
117 |
118 | /**
119 | * @}
120 | */
121 |
122 | /* Exported macro ------------------------------------------------------------*/
123 | /* Exported functions ------------------------------------------------------- */
124 |
125 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
126 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
127 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
128 |
129 | #ifdef __cplusplus
130 | }
131 | #endif
132 |
133 | #endif /* __STM32F0XX_MISC_H */
134 |
135 | /**
136 | * @}
137 | */
138 |
139 | /**
140 | * @}
141 | */
142 |
143 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
144 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_pwr.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_pwr.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the PWR firmware
8 | * library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_PWR_H
31 | #define __STM32F0XX_PWR_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup PWR
45 | * @{
46 | */
47 |
48 | /* Exported types ------------------------------------------------------------*/
49 |
50 | /* Exported constants --------------------------------------------------------*/
51 |
52 | /** @defgroup PWR_Exported_Constants
53 | * @{
54 | */
55 |
56 | /** @defgroup PWR_PVD_detection_level
57 | * @brief This parameters are only applicable for STM32F051 and STM32F072 devices
58 | * @{
59 | */
60 |
61 | #define PWR_PVDLevel_0 PWR_CR_PLS_LEV0
62 | #define PWR_PVDLevel_1 PWR_CR_PLS_LEV1
63 | #define PWR_PVDLevel_2 PWR_CR_PLS_LEV2
64 | #define PWR_PVDLevel_3 PWR_CR_PLS_LEV3
65 | #define PWR_PVDLevel_4 PWR_CR_PLS_LEV4
66 | #define PWR_PVDLevel_5 PWR_CR_PLS_LEV5
67 | #define PWR_PVDLevel_6 PWR_CR_PLS_LEV6
68 | #define PWR_PVDLevel_7 PWR_CR_PLS_LEV7
69 |
70 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_0) || ((LEVEL) == PWR_PVDLevel_1)|| \
71 | ((LEVEL) == PWR_PVDLevel_2) || ((LEVEL) == PWR_PVDLevel_3)|| \
72 | ((LEVEL) == PWR_PVDLevel_4) || ((LEVEL) == PWR_PVDLevel_5)|| \
73 | ((LEVEL) == PWR_PVDLevel_6) || ((LEVEL) == PWR_PVDLevel_7))
74 | /**
75 | * @}
76 | */
77 |
78 | /** @defgroup PWR_WakeUp_Pins
79 | * @{
80 | */
81 |
82 | #define PWR_WakeUpPin_1 PWR_CSR_EWUP1
83 | #define PWR_WakeUpPin_2 PWR_CSR_EWUP2
84 | #define PWR_WakeUpPin_3 PWR_CSR_EWUP3 /*!< only applicable for STM32F072 devices */
85 | #define PWR_WakeUpPin_4 PWR_CSR_EWUP4 /*!< only applicable for STM32F072 devices */
86 | #define PWR_WakeUpPin_5 PWR_CSR_EWUP5 /*!< only applicable for STM32F072 devices */
87 | #define PWR_WakeUpPin_6 PWR_CSR_EWUP6 /*!< only applicable for STM32F072 devices */
88 | #define PWR_WakeUpPin_7 PWR_CSR_EWUP7 /*!< only applicable for STM32F072 devices */
89 | #define PWR_WakeUpPin_8 PWR_CSR_EWUP8 /*!< only applicable for STM32F072 devices */
90 | #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WakeUpPin_1) || ((PIN) == PWR_WakeUpPin_2) || \
91 | ((PIN) == PWR_WakeUpPin_3) || ((PIN) == PWR_WakeUpPin_4) || \
92 | ((PIN) == PWR_WakeUpPin_5) || ((PIN) == PWR_WakeUpPin_6) || \
93 | ((PIN) == PWR_WakeUpPin_7) || ((PIN) == PWR_WakeUpPin_8))
94 | /**
95 | * @}
96 | */
97 |
98 |
99 | /** @defgroup PWR_Regulator_state_is_Sleep_STOP_mode
100 | * @{
101 | */
102 |
103 | #define PWR_Regulator_ON ((uint32_t)0x00000000)
104 | #define PWR_Regulator_LowPower PWR_CR_LPSDSR
105 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \
106 | ((REGULATOR) == PWR_Regulator_LowPower))
107 | /**
108 | * @}
109 | */
110 |
111 | /** @defgroup PWR_SLEEP_mode_entry
112 | * @{
113 | */
114 |
115 | #define PWR_SLEEPEntry_WFI ((uint8_t)0x01)
116 | #define PWR_SLEEPEntry_WFE ((uint8_t)0x02)
117 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPEntry_WFI) || ((ENTRY) == PWR_SLEEPEntry_WFE))
118 |
119 | /**
120 | * @}
121 | */
122 |
123 | /** @defgroup PWR_STOP_mode_entry
124 | * @{
125 | */
126 |
127 | #define PWR_STOPEntry_WFI ((uint8_t)0x01)
128 | #define PWR_STOPEntry_WFE ((uint8_t)0x02)
129 | #define PWR_STOPEntry_SLEEPONEXIT ((uint8_t)0x03)
130 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE) ||\
131 | ((ENTRY) == PWR_STOPEntry_SLEEPONEXIT))
132 |
133 | /**
134 | * @}
135 | */
136 |
137 | /** @defgroup PWR_Flag
138 | * @{
139 | */
140 |
141 | #define PWR_FLAG_WU PWR_CSR_WUF
142 | #define PWR_FLAG_SB PWR_CSR_SBF
143 | #define PWR_FLAG_PVDO PWR_CSR_PVDO /*!< Not applicable for STM32F030 devices */
144 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
145 |
146 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \
147 | ((FLAG) == PWR_FLAG_PVDO) || ((FLAG) == PWR_FLAG_VREFINTRDY))
148 |
149 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB))
150 | /**
151 | * @}
152 | */
153 |
154 | /**
155 | * @}
156 | */
157 |
158 | /* Exported macro ------------------------------------------------------------*/
159 | /* Exported functions ------------------------------------------------------- */
160 |
161 | /* Function used to set the PWR configuration to the default reset state ******/
162 | void PWR_DeInit(void);
163 |
164 | /* Backup Domain Access function **********************************************/
165 | void PWR_BackupAccessCmd(FunctionalState NewState);
166 |
167 | /* PVD configuration functions ************************************************/
168 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); /*!< only applicable for STM32F051 and STM32F072 devices */
169 | void PWR_PVDCmd(FunctionalState NewState); /*!< only applicable for STM32F051 and STM32F072 devices */
170 |
171 | /* WakeUp pins configuration functions ****************************************/
172 | void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState);
173 |
174 | /* Low Power modes configuration functions ************************************/
175 | void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry);
176 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry);
177 | void PWR_EnterSTANDBYMode(void);
178 |
179 | /* Flags management functions *************************************************/
180 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG);
181 | void PWR_ClearFlag(uint32_t PWR_FLAG);
182 |
183 | #ifdef __cplusplus
184 | }
185 | #endif
186 |
187 | #endif /* __STM32F0XX_PWR_H */
188 |
189 | /**
190 | * @}
191 | */
192 |
193 | /**
194 | * @}
195 | */
196 |
197 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
198 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_wwdg.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_wwdg.c
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file provides firmware functions to manage the following
8 | * functionalities of the Window watchdog (WWDG) peripheral:
9 | * + Prescaler, Refresh window and Counter configuration
10 | * + WWDG activation
11 | * + Interrupts and flags management
12 | *
13 | * @verbatim
14 | *
15 | ==============================================================================
16 | ##### WWDG features #####
17 | ==============================================================================
18 | [..] Once enabled the WWDG generates a system reset on expiry of a programmed
19 | time period, unless the program refreshes the counter (downcounter)
20 | before to reach 0x3F value (i.e. a reset is generated when the counter
21 | value rolls over from 0x40 to 0x3F).
22 | [..] An MCU reset is also generated if the counter value is refreshed
23 | before the counter has reached the refresh window value. This
24 | implies that the counter must be refreshed in a limited window.
25 |
26 | [..] Once enabled the WWDG cannot be disabled except by a system reset.
27 |
28 | [..] WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
29 | reset occurs.
30 |
31 | [..] The WWDG counter input clock is derived from the APB clock divided
32 | by a programmable prescaler.
33 |
34 | [..] WWDG counter clock = PCLK1 / Prescaler.
35 | [..] WWDG timeout = (WWDG counter clock) * (counter value).
36 |
37 | [..] Min-max timeout value @32MHz (PCLK1): ~85us / ~43ms.
38 |
39 | ##### How to use this driver #####
40 | ==============================================================================
41 | [..]
42 | (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE)
43 | function.
44 |
45 | (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function.
46 |
47 | (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function.
48 |
49 | (#) Set the WWDG counter value and start it using WWDG_Enable() function.
50 | When the WWDG is enabled the counter value should be configured to
51 | a value greater than 0x40 to prevent generating an immediate reset.
52 |
53 | (#) Optionally you can enable the Early wakeup interrupt which is
54 | generated when the counter reach 0x40.
55 | Once enabled this interrupt cannot be disabled except by a system reset.
56 |
57 | (#) Then the application program must refresh the WWDG counter at regular
58 | intervals during normal operation to prevent an MCU reset, using
59 | WWDG_SetCounter() function. This operation must occur only when
60 | the counter value is lower than the refresh window value,
61 | programmed using WWDG_SetWindowValue().
62 |
63 | * @endverbatim
64 | *
65 | ******************************************************************************
66 | * @attention
67 | *
68 | * © COPYRIGHT 2014 STMicroelectronics
69 | *
70 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
71 | * You may not use this file except in compliance with the License.
72 | * You may obtain a copy of the License at:
73 | *
74 | * http://www.st.com/software_license_agreement_liberty_v2
75 | *
76 | * Unless required by applicable law or agreed to in writing, software
77 | * distributed under the License is distributed on an "AS IS" BASIS,
78 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
79 | * See the License for the specific language governing permissions and
80 | * limitations under the License.
81 | *
82 | ******************************************************************************
83 | */
84 |
85 | /* Includes ------------------------------------------------------------------*/
86 | #include "stm32f0xx_wwdg.h"
87 | #include "stm32f0xx_rcc.h"
88 |
89 | /** @addtogroup STM32F0xx_StdPeriph_Driver
90 | * @{
91 | */
92 |
93 | /** @defgroup WWDG
94 | * @brief WWDG driver modules
95 | * @{
96 | */
97 |
98 | /* Private typedef -----------------------------------------------------------*/
99 | /* Private define ------------------------------------------------------------*/
100 | /* --------------------- WWDG registers bit mask ---------------------------- */
101 | /* CFR register bit mask */
102 | #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
103 | #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
104 | #define BIT_MASK ((uint8_t)0x7F)
105 |
106 | /* Private macro -------------------------------------------------------------*/
107 | /* Private variables ---------------------------------------------------------*/
108 | /* Private function prototypes -----------------------------------------------*/
109 | /* Private functions ---------------------------------------------------------*/
110 |
111 | /** @defgroup WWDG_Private_Functions
112 | * @{
113 | */
114 |
115 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
116 | * @brief Prescaler, Refresh window and Counter configuration functions
117 | *
118 | @verbatim
119 | ==============================================================================
120 | ##### Prescaler, Refresh window and Counter configuration functions #####
121 | ==============================================================================
122 |
123 | @endverbatim
124 | * @{
125 | */
126 |
127 | /**
128 | * @brief Deinitializes the WWDG peripheral registers to their default reset values.
129 | * @param None
130 | * @retval None
131 | */
132 | void WWDG_DeInit(void)
133 | {
134 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
135 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
136 | }
137 |
138 | /**
139 | * @brief Sets the WWDG Prescaler.
140 | * @param WWDG_Prescaler: specifies the WWDG Prescaler.
141 | * This parameter can be one of the following values:
142 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
143 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
144 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
145 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
146 | * @retval None
147 | */
148 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
149 | {
150 | uint32_t tmpreg = 0;
151 | /* Check the parameters */
152 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
153 | /* Clear WDGTB[1:0] bits */
154 | tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
155 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
156 | tmpreg |= WWDG_Prescaler;
157 | /* Store the new value */
158 | WWDG->CFR = tmpreg;
159 | }
160 |
161 | /**
162 | * @brief Sets the WWDG window value.
163 | * @param WindowValue: specifies the window value to be compared to the downcounter.
164 | * This parameter value must be lower than 0x80.
165 | * @retval None
166 | */
167 | void WWDG_SetWindowValue(uint8_t WindowValue)
168 | {
169 | __IO uint32_t tmpreg = 0;
170 |
171 | /* Check the parameters */
172 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
173 | /* Clear W[6:0] bits */
174 |
175 | tmpreg = WWDG->CFR & CFR_W_MASK;
176 |
177 | /* Set W[6:0] bits according to WindowValue value */
178 | tmpreg |= WindowValue & (uint32_t) BIT_MASK;
179 |
180 | /* Store the new value */
181 | WWDG->CFR = tmpreg;
182 | }
183 |
184 | /**
185 | * @brief Enables the WWDG Early Wakeup interrupt(EWI).
186 | * @note Once enabled this interrupt cannot be disabled except by a system reset.
187 | * @param None
188 | * @retval None
189 | */
190 | void WWDG_EnableIT(void)
191 | {
192 | WWDG->CFR |= WWDG_CFR_EWI;
193 | }
194 |
195 | /**
196 | * @brief Sets the WWDG counter value.
197 | * @param Counter: specifies the watchdog counter value.
198 | * This parameter must be a number between 0x40 and 0x7F (to prevent
199 | * generating an immediate reset).
200 | * @retval None
201 | */
202 | void WWDG_SetCounter(uint8_t Counter)
203 | {
204 | /* Check the parameters */
205 | assert_param(IS_WWDG_COUNTER(Counter));
206 | /* Write to T[6:0] bits to configure the counter value, no need to do
207 | a read-modify-write; writing a 0 to WDGA bit does nothing */
208 | WWDG->CR = Counter & BIT_MASK;
209 | }
210 |
211 | /**
212 | * @}
213 | */
214 |
215 | /** @defgroup WWDG_Group2 WWDG activation functions
216 | * @brief WWDG activation functions
217 | *
218 | @verbatim
219 | ==============================================================================
220 | ##### WWDG activation function #####
221 | ==============================================================================
222 |
223 | @endverbatim
224 | * @{
225 | */
226 |
227 | /**
228 | * @brief Enables WWDG and load the counter value.
229 | * @param Counter: specifies the watchdog counter value.
230 | * This parameter must be a number between 0x40 and 0x7F (to prevent
231 | * generating an immediate reset).
232 | * @retval None
233 | */
234 | void WWDG_Enable(uint8_t Counter)
235 | {
236 | /* Check the parameters */
237 | assert_param(IS_WWDG_COUNTER(Counter));
238 | WWDG->CR = WWDG_CR_WDGA | Counter;
239 | }
240 |
241 | /**
242 | * @}
243 | */
244 |
245 | /** @defgroup WWDG_Group3 Interrupts and flags management functions
246 | * @brief Interrupts and flags management functions
247 | *
248 | @verbatim
249 | ==============================================================================
250 | ##### Interrupts and flags management functions #####
251 | ==============================================================================
252 |
253 | @endverbatim
254 | * @{
255 | */
256 |
257 | /**
258 | * @brief Checks whether the Early Wakeup interrupt flag is set or not.
259 | * @param None
260 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET).
261 | */
262 | FlagStatus WWDG_GetFlagStatus(void)
263 | {
264 | FlagStatus bitstatus = RESET;
265 |
266 | if ((WWDG->SR) != (uint32_t)RESET)
267 | {
268 | bitstatus = SET;
269 | }
270 | else
271 | {
272 | bitstatus = RESET;
273 | }
274 | return bitstatus;
275 | }
276 |
277 | /**
278 | * @brief Clears Early Wakeup interrupt flag.
279 | * @param None
280 | * @retval None
281 | */
282 | void WWDG_ClearFlag(void)
283 | {
284 | WWDG->SR = (uint32_t)RESET;
285 | }
286 |
287 | /**
288 | * @}
289 | */
290 |
291 | /**
292 | * @}
293 | */
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
304 |
--------------------------------------------------------------------------------
/BackendSupport/StdPeriph/stm32f0xx_wwdg.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f0xx_wwdg.h
4 | * @author MCD Application Team
5 | * @version V1.5.0
6 | * @date 05-December-2014
7 | * @brief This file contains all the functions prototypes for the WWDG
8 | * firmware library.
9 | ******************************************************************************
10 | * @attention
11 | *
12 | * © COPYRIGHT 2014 STMicroelectronics
13 | *
14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 | * You may not use this file except in compliance with the License.
16 | * You may obtain a copy of the License at:
17 | *
18 | * http://www.st.com/software_license_agreement_liberty_v2
19 | *
20 | * Unless required by applicable law or agreed to in writing, software
21 | * distributed under the License is distributed on an "AS IS" BASIS,
22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 | * See the License for the specific language governing permissions and
24 | * limitations under the License.
25 | *
26 | ******************************************************************************
27 | */
28 |
29 | /* Define to prevent recursive inclusion -------------------------------------*/
30 | #ifndef __STM32F0XX_WWDG_H
31 | #define __STM32F0XX_WWDG_H
32 |
33 | #ifdef __cplusplus
34 | extern "C" {
35 | #endif
36 |
37 | /* Includes ------------------------------------------------------------------*/
38 | #include "stm32f0xx.h"
39 |
40 | /** @addtogroup STM32F0xx_StdPeriph_Driver
41 | * @{
42 | */
43 |
44 | /** @addtogroup WWDG
45 | * @{
46 | */
47 | /* Exported types ------------------------------------------------------------*/
48 | /* Exported constants --------------------------------------------------------*/
49 |
50 | /** @defgroup WWDG_Exported_Constants
51 | * @{
52 | */
53 |
54 | /** @defgroup WWDG_Prescaler
55 | * @{
56 | */
57 |
58 | #define WWDG_Prescaler_1 ((uint32_t)0x00000000)
59 | #define WWDG_Prescaler_2 ((uint32_t)0x00000080)
60 | #define WWDG_Prescaler_4 ((uint32_t)0x00000100)
61 | #define WWDG_Prescaler_8 ((uint32_t)0x00000180)
62 | #define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \
63 | ((PRESCALER) == WWDG_Prescaler_2) || \
64 | ((PRESCALER) == WWDG_Prescaler_4) || \
65 | ((PRESCALER) == WWDG_Prescaler_8))
66 | #define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F)
67 | #define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F))
68 |
69 | /**
70 | * @}
71 | */
72 |
73 | /**
74 | * @}
75 | */
76 |
77 | /* Exported macro ------------------------------------------------------------*/
78 | /* Exported functions ------------------------------------------------------- */
79 | /* Function used to set the WWDG configuration to the default reset state ****/
80 | void WWDG_DeInit(void);
81 |
82 | /* Prescaler, Refresh window and Counter configuration functions **************/
83 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler);
84 | void WWDG_SetWindowValue(uint8_t WindowValue);
85 | void WWDG_EnableIT(void);
86 | void WWDG_SetCounter(uint8_t Counter);
87 |
88 | /* WWDG activation functions **************************************************/
89 | void WWDG_Enable(uint8_t Counter);
90 |
91 | /* Interrupts and flags management functions **********************************/
92 | FlagStatus WWDG_GetFlagStatus(void);
93 | void WWDG_ClearFlag(void);
94 |
95 | #ifdef __cplusplus
96 | }
97 | #endif
98 |
99 | #endif /* __STM32F0XX_WWDG_H */
100 |
101 | /**
102 | * @}
103 | */
104 |
105 | /**
106 | * @}
107 | */
108 |
109 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
110 |
--------------------------------------------------------------------------------
/BackendSupport/openocd.cfg:
--------------------------------------------------------------------------------
1 | # This is an STM32F051 discovery board with a single STM32F051R8 chip.
2 | #
3 |
4 | source [find interface/stlink-v2.cfg]
5 | source [find target/stm32f0x.cfg]
6 |
7 | # use hardware reset, connect under reset
8 | reset_config srst_only srst_nogate
9 |
10 | # zyp's flash command
11 | proc flash_chip {} {
12 | reset halt
13 | flash write_image erase ./obj/main.elf 0 elf
14 | verify_image ./obj/main.elf 0 elf
15 | reset
16 | shutdown
17 | }
18 |
19 | init
20 |
--------------------------------------------------------------------------------
/BackendSupport/stm32f031_linker.ld:
--------------------------------------------------------------------------------
1 | OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
2 | /* Internal Memory Map*/
3 | MEMORY
4 | {
5 | rom (rx) : ORIGIN = 0x08000000, LENGTH = 0x00004000
6 | ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
7 | }
8 |
9 | _eram = 0x20000000 + 0x00001000;
10 | SECTIONS
11 | {
12 | .text :
13 | {
14 | KEEP(*(.isr_vector))
15 | *(.text*)
16 |
17 | KEEP(*(.init))
18 | KEEP(*(.fini))
19 |
20 | /* .ctors */
21 | *crtbegin.o(.ctors)
22 | *crtbegin?.o(.ctors)
23 | *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
24 | *(SORT(.ctors.*))
25 | *(.ctors)
26 |
27 | /* .dtors */
28 | *crtbegin.o(.dtors)
29 | *crtbegin?.o(.dtors)
30 | *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
31 | *(SORT(.dtors.*))
32 | *(.dtors)
33 |
34 | *(.rodata*)
35 |
36 | KEEP(*(.eh_fram e*))
37 | } > rom
38 |
39 | .ARM.extab :
40 | {
41 | *(.ARM.extab* .gnu.linkonce.armextab.*)
42 | } > rom
43 |
44 | __exidx_start = .;
45 | .ARM.exidx :
46 | {
47 | *(.ARM.exidx* .gnu.linkonce.armexidx.*)
48 | } > rom
49 | __exidx_end = .;
50 | __etext = .;
51 |
52 | /* _sidata is used in coide startup code */
53 | _sidata = __etext;
54 |
55 | .data : AT (__etext)
56 | {
57 | __data_start__ = .;
58 |
59 | /* _sdata is used in coide startup code */
60 | _sdata = __data_start__;
61 |
62 | *(vtable)
63 | *(.data*)
64 |
65 | . = ALIGN(4);
66 | /* preinit data */
67 | PROVIDE_HIDDEN (__preinit_array_start = .);
68 | KEEP(*(.preinit_array))
69 | PROVIDE_HIDDEN (__preinit_array_end = .);
70 |
71 | . = ALIGN(4);
72 | /* init data */
73 | PROVIDE_HIDDEN (__init_array_start = .);
74 | KEEP(*(SORT(.init_array.*)))
75 | KEEP(*(.init_array))
76 | PROVIDE_HIDDEN (__init_array_end = .);
77 |
78 | . = ALIGN(4);
79 | /* finit data */
80 | PROVIDE_HIDDEN (__fini_array_start = .);
81 | KEEP(*(SORT(.fini_array.*)))
82 | KEEP(*(.fini_array))
83 | PROVIDE_HIDDEN (__fini_array_end = .);
84 |
85 | KEEP(*(.jcr*))
86 | . = ALIGN(4);
87 | /* All data end */
88 | __data_end__ = .;
89 |
90 | /* _edata is used in coide startup code */
91 | _edata = __data_end__;
92 | } > ram
93 |
94 | .bss :
95 | {
96 | . = ALIGN(4);
97 | __bss_start__ = .;
98 | _sbss = __bss_start__;
99 | *(.bss*)
100 | *(COMMON)
101 | . = ALIGN(4);
102 | __bss_end__ = .;
103 | _ebss = __bss_end__;
104 | } > ram
105 |
106 | .heap (COPY):
107 | {
108 | __end__ = .;
109 | _end = __end__;
110 | end = __end__;
111 | *(.heap*)
112 | __HeapLimit = .;
113 | } > ram
114 |
115 | /* .stack_dummy section doesn't contains any symbols. It is only
116 | * used for linker to calculate size of stack sections, and assign
117 | * values to stack symbols later */
118 | .co_stack (NOLOAD):
119 | {
120 | . = ALIGN(8);
121 | *(.co_stack .co_stack.*)
122 | } > ram
123 |
124 | /* Set stack top to end of ram , and stack limit move down by
125 | * size of stack_dummy section */
126 | __StackTop = ORIGIN(ram ) + LENGTH(ram );
127 | __StackLimit = __StackTop - SIZEOF(.co_stack);
128 | PROVIDE(__stack = __StackTop);
129 |
130 | /* Check if data + heap + stack exceeds ram limit */
131 | ASSERT(__StackLimit >= __HeapLimit, "region ram overflowed with stack")
132 | }
133 |
--------------------------------------------------------------------------------
/HardwareLayer/digital.h:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | / “THE COFFEEWARE LICENSE” (Revision 1):
3 | / wrote this file. As long as you retain this notice you
4 | / can do whatever you want with this stuff. If we meet some day, and you think
5 | / this stuff is worth it, you can buy me a coffee in return.
6 | /----------------------------------------------------------------------------*/
7 |
8 | /* STM32F0XX spesific digital I/O macros */
9 |
10 | #ifndef DIGITAL
11 | #define DIGITAL
12 |
13 | #include "stm32f0xx.h"
14 |
15 | /* Pin mode */
16 | #define INPUT 0
17 | #define OUTPUT 1
18 | #define ALTFUNC 2
19 | #define ANALOG 3
20 |
21 | #define LOWSPEED 0
22 | #define MIDSPEED 1
23 | #define HIGHSPEED 3
24 |
25 | #define AF0 0
26 | #define AF1 1
27 | #define AF2 2
28 | #define AF3 3
29 | #define AF4 4
30 | #define AF5 5
31 | #define AF6 6
32 | #define AF7 7
33 |
34 | #define HIGH 1
35 | #define LOW 0
36 |
37 | #define OUTPUT 1
38 | #define INPUT 0
39 |
40 | #define digitalRead(port,pin) (GPIO ##port ->IDR & (1<BSRR = (1<BRR = (1<MODER &= ~(0x03 << (pin << 1))); (GPIO ##port ->MODER |= (state << (pin << 1)))
45 |
46 | #define pinSpeed(port,pin,state) (GPIO ##port ->MODER &= ~(0x03 << (pin << 1))); (GPIO ##port ->MODER |= (state << (pin << 1)))
47 |
48 | #define setInternalPullup(port,pin) (GPIO ##port ->PUPDR &= ~(0x03 << (pin << 1))); (GPIO ##port ->PUPDR |= (0x01 << (pin << 1)))
49 |
50 | #define setInternalPullDown(port,pin) (GPIO ##port ->PUPDR &= ~(0x03 << (pin << 1))); (GPIO ##port ->PUPDR |= (0x02 << (pin << 1)))
51 |
52 | #endif
--------------------------------------------------------------------------------
/HardwareLayer/systick_delay.c:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | / “THE COFFEEWARE LICENSE” (Revision 1):
3 | / wrote this file. As long as you retain this notice you
4 | / can do whatever you want with this stuff. If we meet some day, and you think
5 | / this stuff is worth it, you can buy me a coffee in return.
6 | /----------------------------------------------------------------------------*/
7 |
8 | #include "systick_delay.h"
9 |
10 | /*---------------------------------------------------------------------------*/
11 | static volatile uint32_t DelayCounter;
12 |
13 | /*---------------------------------------------------------------------------*/
14 | int systick_init(const uint32_t arg)
15 | {
16 | return SysTick_Config(arg);
17 | }
18 |
19 | /*---------------------------------------------------------------------------*/
20 | void _delay_nop(const uint32_t nopAmout)
21 | {
22 | uint32_t i = nopAmout;
23 |
24 | while(i--)
25 | {
26 | __ASM("nop");
27 | }
28 | }
29 |
30 | /*---------------------------------------------------------------------------*/
31 | void _delay_ms(const uint32_t ms)
32 | {
33 | DelayCounter = ms;
34 |
35 | while(DelayCounter != 0);
36 | }
37 |
38 | /*---------------------------------------------------------------------------*/
39 | void SysTick_Handler(void)
40 | {
41 | if(DelayCounter != 0x00)
42 | {
43 | DelayCounter--;
44 | }
45 | }
--------------------------------------------------------------------------------
/HardwareLayer/systick_delay.h:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | / “THE COFFEEWARE LICENSE” (Revision 1):
3 | / wrote this file. As long as you retain this notice you
4 | / can do whatever you want with this stuff. If we meet some day, and you think
5 | / this stuff is worth it, you can buy me a coffee in return.
6 | /----------------------------------------------------------------------------*/
7 |
8 | #include "stm32f0xx.h"
9 |
10 | #define SYSTICK_1MS SystemCoreClock/1000
11 |
12 | /* Systick initalisation method */
13 | int systick_init(const uint32_t arg);
14 |
15 | /* Systick based 1ms resolution timer */
16 | void _delay_ms(const uint32_t ms);
17 |
18 | /* Uncalibrated delay method for small delays */
19 | void _delay_nop(const uint32_t nopAmout);
--------------------------------------------------------------------------------
/HardwareLayer/usart1.c:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | / “THE COFFEEWARE LICENSE” (Revision 1):
3 | / wrote this file. As long as you retain this notice you
4 | / can do whatever you want with this stuff. If we meet some day, and you think
5 | / this stuff is worth it, you can buy me a coffee in return.
6 | /----------------------------------------------------------------------------*/
7 |
8 | #include "usart1.h"
9 |
10 | /*---------------------------------------------------------------------------*/
11 | void usart1_sendChar(const uint8_t ch)
12 | {
13 | while(USART_GetFlagStatus(USART1, USART_FLAG_TC) != SET);
14 | USART_SendData(USART1, ch);
15 | }
16 |
17 | /*---------------------------------------------------------------------------*/
18 | uint8_t usart1_readByte()
19 | {
20 | return (uint8_t)(USART1->RDR & (uint8_t)0x0FF);
21 | }
22 |
23 | /*---------------------------------------------------------------------------*/
24 | void usart1_init(const uint32_t baud)
25 | {
26 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
27 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
28 |
29 | /* TX pin */
30 | pinMode(A,2,ALTFUNC);
31 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_1);
32 |
33 | /* RX pin */
34 | pinMode(A,3,ALTFUNC);
35 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_1);
36 |
37 | USART_InitTypeDef USART_InitStructure;
38 | USART_InitStructure.USART_BaudRate = baud;
39 | USART_InitStructure.USART_WordLength = USART_WordLength_8b;
40 | USART_InitStructure.USART_StopBits = USART_StopBits_1;
41 | USART_InitStructure.USART_Parity = USART_Parity_No;
42 | USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
43 | USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
44 | USART_Init(USART1, &USART_InitStructure);
45 |
46 | USART_Cmd(USART1, ENABLE);
47 | }
48 |
49 | /*---------------------------------------------------------------------------*/
50 | void usart1_enableReceiveISR()
51 | {
52 | USART_ITConfig(USART1, USART_IT_RXNE, SET);
53 | NVIC_EnableIRQ(USART1_IRQn);
54 | }
55 |
--------------------------------------------------------------------------------
/HardwareLayer/usart1.h:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | / “THE COFFEEWARE LICENSE” (Revision 1):
3 | / wrote this file. As long as you retain this notice you
4 | / can do whatever you want with this stuff. If we meet some day, and you think
5 | / this stuff is worth it, you can buy me a coffee in return.
6 | /----------------------------------------------------------------------------*/
7 |
8 | #include "stm32f0xx.h"
9 | #include "digital.h"
10 |
11 | /* blocking 'sendChar' method for usart1 */
12 | void usart1_sendChar(const uint8_t ch);
13 |
14 | /* ... */
15 | uint8_t usart1_readByte();
16 |
17 | /* basic initialisation for usart1 */
18 | void usart1_init(const uint32_t baud);
19 |
20 | /* ... */
21 | void usart1_enableReceiveISR();
--------------------------------------------------------------------------------
/HardwareLayer/xprintf.c:
--------------------------------------------------------------------------------
1 | /*------------------------------------------------------------------------/
2 | / Universal string handler for user console interface
3 | /-------------------------------------------------------------------------/
4 | /
5 | / Copyright (C) 2011, ChaN, all right reserved.
6 | /
7 | / * This software is a free software and there is NO WARRANTY.
8 | / * No restriction on use. You can use, modify and redistribute it for
9 | / personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
10 | / * Redistributions of source code must retain the above copyright notice.
11 | /
12 | /-------------------------------------------------------------------------*/
13 |
14 | #include "xprintf.h"
15 |
16 |
17 | #if _USE_XFUNC_OUT
18 | #include
19 | void (*xfunc_out)(unsigned char); /* Pointer to the output stream */
20 | static char *outptr;
21 |
22 | /*----------------------------------------------*/
23 | /* Put a character */
24 | /*----------------------------------------------*/
25 |
26 | void xputc (char c)
27 | {
28 | if (_CR_CRLF && c == '\n') xputc('\r'); /* CR -> CRLF */
29 |
30 | if (outptr) {
31 | *outptr++ = (unsigned char)c;
32 | return;
33 | }
34 |
35 | if (xfunc_out) xfunc_out((unsigned char)c);
36 | }
37 |
38 |
39 |
40 | /*----------------------------------------------*/
41 | /* Put a null-terminated string */
42 | /*----------------------------------------------*/
43 |
44 | void xputs ( /* Put a string to the default device */
45 | const char* str /* Pointer to the string */
46 | )
47 | {
48 | while (*str)
49 | xputc(*str++);
50 | }
51 |
52 |
53 | void xfputs ( /* Put a string to the specified device */
54 | void(*func)(unsigned char), /* Pointer to the output function */
55 | const char* str /* Pointer to the string */
56 | )
57 | {
58 | void (*pf)(unsigned char);
59 |
60 |
61 | pf = xfunc_out; /* Save current output device */
62 | xfunc_out = func; /* Switch output to specified device */
63 | while (*str) /* Put the string */
64 | xputc(*str++);
65 | xfunc_out = pf; /* Restore output device */
66 | }
67 |
68 |
69 |
70 | /*----------------------------------------------*/
71 | /* Formatted string output */
72 | /*----------------------------------------------*/
73 | /* xprintf("%d", 1234); "1234"
74 | xprintf("%6d,%3d%%", -200, 5); " -200, 5%"
75 | xprintf("%-6u", 100); "100 "
76 | xprintf("%ld", 12345678L); "12345678"
77 | xprintf("%04x", 0xA3); "00a3"
78 | xprintf("%08LX", 0x123ABC); "00123ABC"
79 | xprintf("%016b", 0x550F); "0101010100001111"
80 | xprintf("%s", "String"); "String"
81 | xprintf("%-4s", "abc"); "abc "
82 | xprintf("%4s", "abc"); " abc"
83 | xprintf("%c", 'a'); "a"
84 | xprintf("%f", 10.0);
85 | */
86 |
87 | static
88 | void xvprintf (
89 | const char* fmt, /* Pointer to the format string */
90 | va_list arp /* Pointer to arguments */
91 | )
92 | {
93 | unsigned int r, i, j, w, f;
94 | unsigned long v;
95 | char s[16], c, d, *p;
96 |
97 | for (;;) {
98 | c = *fmt++; /* Get a char */
99 | if (!c) break; /* End of format? */
100 | if (c != '%') { /* Pass through it if not a % sequense */
101 | xputc(c); continue;
102 | }
103 | f = 0;
104 | c = *fmt++; /* Get first char of the sequense */
105 | if (c == '0') { /* Flag: '0' padded */
106 | f = 1; c = *fmt++;
107 | } else {
108 | if (c == '-') { /* Flag: left justified */
109 | f = 2; c = *fmt++;
110 | }
111 | }
112 | for (w = 0; c >= '0' && c <= '9'; c = *fmt++) /* Minimum width */
113 | w = w * 10 + c - '0';
114 | if (c == 'l' || c == 'L') { /* Prefix: Size is long int */
115 | f |= 4; c = *fmt++;
116 | }
117 | if (!c) break; /* End of format? */
118 | d = c;
119 | if (d >= 'a') d -= 0x20;
120 | switch (d) { /* Type is... */
121 | case 'S' : /* String */
122 | p = va_arg(arp, char*);
123 | for (j = 0; p[j]; j++) ;
124 | while (!(f & 2) && j++ < w) xputc(' ');
125 | xputs(p);
126 | while (j++ < w) xputc(' ');
127 | continue;
128 | case 'C' : /* Character */
129 | xputc((char)va_arg(arp, int)); continue;
130 | case 'B' : /* Binary */
131 | r = 2; break;
132 | case 'O' : /* Octal */
133 | r = 8; break;
134 | case 'D' : /* Signed decimal */
135 | case 'U' : /* Unsigned decimal */
136 | r = 10; break;
137 | case 'X' : /* Hexdecimal */
138 | r = 16; break;
139 | default: /* Unknown type (passthrough) */
140 | xputc(c); continue;
141 | }
142 |
143 | /* Get an argument and put it in numeral */
144 | v = (f & 4) ? va_arg(arp, long) : ((d == 'D') ? (long)va_arg(arp, int) : (long)va_arg(arp, unsigned int));
145 | if (d == 'D' && (v & 0x80000000)) {
146 | v = 0 - v;
147 | f |= 8;
148 | }
149 | i = 0;
150 | do {
151 | d = (char)(v % r); v /= r;
152 | if (d > 9) d += (c == 'x') ? 0x27 : 0x07;
153 | s[i++] = d + '0';
154 | } while (v && i < sizeof(s));
155 | if (f & 8) s[i++] = '-';
156 | j = i; d = (f & 1) ? '0' : ' ';
157 | while (!(f & 2) && j++ < w) xputc(d);
158 | do xputc(s[--i]); while(i);
159 | while (j++ < w) xputc(' ');
160 | }
161 | }
162 |
163 |
164 | void xprintf ( /* Put a formatted string to the default device */
165 | const char* fmt, /* Pointer to the format string */
166 | ... /* Optional arguments */
167 | )
168 | {
169 | va_list arp;
170 |
171 | va_start(arp, fmt);
172 | xvprintf(fmt, arp);
173 | va_end(arp);
174 |
175 | }
176 |
177 |
178 | void xsprintf ( /* Put a formatted string to the memory */
179 | char* buff, /* Pointer to the output buffer */
180 | const char* fmt, /* Pointer to the format string */
181 | ... /* Optional arguments */
182 | )
183 | {
184 | va_list arp;
185 |
186 | outptr = buff; /* Switch destination for memory */
187 |
188 | va_start(arp, fmt);
189 | xvprintf(fmt, arp);
190 | va_end(arp);
191 |
192 | *outptr = 0; /* Terminate output string with a \0 */
193 | outptr = 0; /* Switch destination for device */
194 | }
195 |
196 |
197 | void xfprintf ( /* Put a formatted string to the specified device */
198 | void(*func)(unsigned char), /* Pointer to the output function */
199 | const char* fmt, /* Pointer to the format string */
200 | ... /* Optional arguments */
201 | )
202 | {
203 | va_list arp;
204 | void (*pf)(unsigned char);
205 |
206 |
207 | pf = xfunc_out; /* Save current output device */
208 | xfunc_out = func; /* Switch output to specified device */
209 |
210 | va_start(arp, fmt);
211 | xvprintf(fmt, arp);
212 | va_end(arp);
213 |
214 | xfunc_out = pf; /* Restore output device */
215 | }
216 |
217 |
218 |
219 | /*----------------------------------------------*/
220 | /* Dump a line of binary dump */
221 | /*----------------------------------------------*/
222 |
223 | void put_dump (
224 | const void* buff, /* Pointer to the array to be dumped */
225 | unsigned long addr, /* Heading address value */
226 | int len, /* Number of items to be dumped */
227 | int width /* Size of the items (DF_CHAR, DF_SHORT, DF_LONG) */
228 | )
229 | {
230 | int i;
231 | const unsigned char *bp;
232 | const unsigned short *sp;
233 | const unsigned long *lp;
234 |
235 |
236 | xprintf("%08lX ", addr); /* address */
237 |
238 | switch (width) {
239 | case DW_CHAR:
240 | bp = buff;
241 | for (i = 0; i < len; i++) /* Hexdecimal dump */
242 | xprintf(" %02X", bp[i]);
243 | xputc(' ');
244 | for (i = 0; i < len; i++) /* ASCII dump */
245 | xputc((bp[i] >= ' ' && bp[i] <= '~') ? bp[i] : '.');
246 | break;
247 | case DW_SHORT:
248 | sp = buff;
249 | do /* Hexdecimal dump */
250 | xprintf(" %04X", *sp++);
251 | while (--len);
252 | break;
253 | case DW_LONG:
254 | lp = buff;
255 | do /* Hexdecimal dump */
256 | xprintf(" %08LX", *lp++);
257 | while (--len);
258 | break;
259 | }
260 |
261 | xputc('\n');
262 | }
263 |
264 | #endif /* _USE_XFUNC_OUT */
265 |
266 |
267 |
268 | #if _USE_XFUNC_IN
269 | unsigned char (*xfunc_in)(void); /* Pointer to the input stream */
270 |
271 | /*----------------------------------------------*/
272 | /* Get a line from the input */
273 | /*----------------------------------------------*/
274 |
275 | int xgets ( /* 0:End of stream, 1:A line arrived */
276 | char* buff, /* Pointer to the buffer */
277 | int len /* Buffer length */
278 | )
279 | {
280 | int c, i;
281 |
282 |
283 | if (!xfunc_in) return 0; /* No input function specified */
284 |
285 | i = 0;
286 | for (;;) {
287 | c = xfunc_in(); /* Get a char from the incoming stream */
288 | if (!c) return 0; /* End of stream? */
289 | if (c == '\r') break; /* End of line? */
290 | if (c == '\b' && i) { /* Back space? */
291 | i--;
292 | if (_LINE_ECHO) xputc(c);
293 | continue;
294 | }
295 | if (c >= ' ' && i < len - 1) { /* Visible chars */
296 | buff[i++] = c;
297 | if (_LINE_ECHO) xputc(c);
298 | }
299 | }
300 | buff[i] = 0; /* Terminate with a \0 */
301 | if (_LINE_ECHO) xputc('\n');
302 | return 1;
303 | }
304 |
305 |
306 | int xfgets ( /* 0:End of stream, 1:A line arrived */
307 | unsigned char (*func)(void), /* Pointer to the input stream function */
308 | char* buff, /* Pointer to the buffer */
309 | int len /* Buffer length */
310 | )
311 | {
312 | unsigned char (*pf)(void);
313 | int n;
314 |
315 |
316 | pf = xfunc_in; /* Save current input device */
317 | xfunc_in = func; /* Switch input to specified device */
318 | n = xgets(buff, len); /* Get a line */
319 | xfunc_in = pf; /* Restore input device */
320 |
321 | return n;
322 | }
323 |
324 |
325 | /*----------------------------------------------*/
326 | /* Get a value of the string */
327 | /*----------------------------------------------*/
328 | /* "123 -5 0x3ff 0b1111 0377 w "
329 | ^ 1st call returns 123 and next ptr
330 | ^ 2nd call returns -5 and next ptr
331 | ^ 3rd call returns 1023 and next ptr
332 | ^ 4th call returns 15 and next ptr
333 | ^ 5th call returns 255 and next ptr
334 | ^ 6th call fails and returns 0
335 | */
336 |
337 | int xatoi ( /* 0:Failed, 1:Successful */
338 | char **str, /* Pointer to pointer to the string */
339 | long *res /* Pointer to the valiable to store the value */
340 | )
341 | {
342 | unsigned long val;
343 | unsigned char c, r, s = 0;
344 |
345 |
346 | *res = 0;
347 |
348 | while ((c = **str) == ' ') (*str)++; /* Skip leading spaces */
349 |
350 | if (c == '-') { /* negative? */
351 | s = 1;
352 | c = *(++(*str));
353 | }
354 |
355 | if (c == '0') {
356 | c = *(++(*str));
357 | switch (c) {
358 | case 'x': /* hexdecimal */
359 | r = 16; c = *(++(*str));
360 | break;
361 | case 'b': /* binary */
362 | r = 2; c = *(++(*str));
363 | break;
364 | default:
365 | if (c <= ' ') return 1; /* single zero */
366 | if (c < '0' || c > '9') return 0; /* invalid char */
367 | r = 8; /* octal */
368 | }
369 | } else {
370 | if (c < '0' || c > '9') return 0; /* EOL or invalid char */
371 | r = 10; /* decimal */
372 | }
373 |
374 | val = 0;
375 | while (c > ' ') {
376 | if (c >= 'a') c -= 0x20;
377 | c -= '0';
378 | if (c >= 17) {
379 | c -= 7;
380 | if (c <= 9) return 0; /* invalid char */
381 | }
382 | if (c >= r) return 0; /* invalid char for current radix */
383 | val = val * r + c;
384 | c = *(++(*str));
385 | }
386 | if (s) val = 0 - val; /* apply sign if needed */
387 |
388 | *res = val;
389 | return 1;
390 | }
391 |
392 | #endif /* _USE_XFUNC_IN */
393 |
--------------------------------------------------------------------------------
/HardwareLayer/xprintf.h:
--------------------------------------------------------------------------------
1 | /*------------------------------------------------------------------------*/
2 | /* Universal string handler for user console interface (C)ChaN, 2011 */
3 | /*------------------------------------------------------------------------*/
4 |
5 | #ifndef _STRFUNC
6 | #define _STRFUNC
7 |
8 | #define _USE_XFUNC_OUT 1 /* 1: Use output functions */
9 | #define _CR_CRLF 0 /* 1: Convert \n ==> \r\n in the output char */
10 |
11 | #define _USE_XFUNC_IN 0 /* 1: Use input function */
12 | #define _LINE_ECHO 0 /* 1: Echo back input chars in xgets function */
13 |
14 |
15 | #if _USE_XFUNC_OUT
16 | #define xdev_out(func) xfunc_out = (void(*)(unsigned char))(func)
17 | extern void (*xfunc_out)(unsigned char);
18 | void xputc (char c);
19 | void xputs (const char* str);
20 | void xfputs (void (*func)(unsigned char), const char* str);
21 | void xprintf (const char* fmt, ...);
22 | void xsprintf (char* buff, const char* fmt, ...);
23 | void xfprintf (void (*func)(unsigned char), const char* fmt, ...);
24 | void put_dump (const void* buff, unsigned long addr, int len, int width);
25 | #define DW_CHAR sizeof(char)
26 | #define DW_SHORT sizeof(short)
27 | #define DW_LONG sizeof(long)
28 | #endif
29 |
30 | #if _USE_XFUNC_IN
31 | #define xdev_in(func) xfunc_in = (unsigned char(*)(void))(func)
32 | extern unsigned char (*xfunc_in)(void);
33 | int xgets (char* buff, int len);
34 | int xfgets (unsigned char (*func)(void), char* buff, int len);
35 | int xatoi (char** str, long* res);
36 | #endif
37 |
38 | #endif
39 |
--------------------------------------------------------------------------------
/Platforms/polyphonic-fm-synthesizer/Mechanical/case.scad:
--------------------------------------------------------------------------------
1 | // Enclosure for
2 | // http://blog.kehribar.me/build/2015/12/06/polyphonic-fm-synthesizer-with-stm32f031.html
3 |
4 | $fn=100;
5 |
6 | case(drawPart=1 /*0=box, 1=lid, 2==both*/);
7 |
8 | /**
9 | * Constructs the enclosure
10 | *
11 | * @param drawPart 0=box, 1=lid, 2==both
12 | */
13 | module case (drawPart) {
14 |
15 | wall=1.5; // wall thickness
16 |
17 | boardWidth=50; // board width
18 | boardLength=50; // board length
19 | boardHeight=1.4; // board height
20 | holePadding=2.5; // center of the drill hole relative to the board edges
21 | holeRadius=1.4; // drill hole radius
22 |
23 | innerMargin=0.5; // margin, added to board dimensions, makes the inner dimensions larger * 2 in x/y
24 | innerHeight=29; // inner height of the box, no margins or compensation for standoff heights / board height is added
25 |
26 | standoffR=3; // standoff radius
27 | standoffH=2; // standoff height
28 |
29 | usbSocketEnabled = 1; // if you plan on using a usb socket on a breakout board to provide power
30 | usbSocketHoleWidth = 11; // width of the usb socket hole
31 | usbSocketHoleHeight = 6; // height of the usb socket hole
32 | usbSocketIndentWidth = 13; // indentation width of the usb socket in the lid
33 | usbSocketOffset = 35; // x-offset of the usb socket hole
34 |
35 | module box() {
36 | difference(){
37 |
38 | // walls
39 | translate([-(wall+innerMargin),-(wall+innerMargin),-wall]) {
40 | cube ([
41 | boardWidth+(2*wall)+(innerMargin*2),
42 | boardLength+(2*wall)+(innerMargin*2),
43 | innerHeight+1*wall]);
44 | }
45 | translate([-(innerMargin),-(innerMargin),0]) {
46 | cube ([boardWidth+(innerMargin*2),boardLength+(innerMargin*2),innerHeight+1]);
47 | }
48 |
49 | /**
50 | * Holes for MIDI, Power and Jacks are hardcoded, it will depend on the socket types you use
51 | * and the general design.
52 | */
53 |
54 | // midi socket
55 | translate([6.5+innerMargin,-(innerMargin+wall+1),boardHeight+standoffH+1])
56 | cube([19,25,19]);
57 |
58 |
59 | // jacks, hardcoded for now
60 | translate([boardLength-1,boardWidth/1.5,innerHeight-innerHeight/3]) {
61 | rotate([90,0,90]) {
62 | translate([-8,0,0])cylinder(h=10,r=4.5);
63 | translate([8,0,0]) cylinder(h=10,r=4.5);
64 | }
65 | }
66 |
67 | if (usbSocketEnabled) {
68 | // usb socket
69 | translate([usbSocketOffset+wall+innerMargin,-(innerMargin+wall+1),innerHeight-5])
70 | cube([usbSocketHoleWidth,10,usbSocketHoleHeight]);
71 | }
72 | }
73 |
74 | // standoffs
75 | translate([holePadding+innerMargin, holePadding+innerMargin,0])
76 | standoff(standoffH, standoffR, holeRadius);
77 | translate([boardWidth-holePadding-innerMargin, holePadding+innerMargin,0])
78 | standoff(standoffH, standoffR, holeRadius);
79 | translate([holePadding+innerMargin, boardLength-holePadding-innerMargin,0])
80 | standoff(standoffH, standoffR, holeRadius);
81 | translate([boardWidth-holePadding-innerMargin, boardLength-holePadding-innerMargin,0])
82 | standoff(standoffH, standoffR, holeRadius);
83 | }
84 |
85 | module lid() {
86 | // lid
87 | translate([-(wall+innerMargin),-(wall+innerMargin),-wall]) {
88 | cube ([boardWidth+(2*wall)+(innerMargin*2),boardLength+(2*wall)+(innerMargin*2),wall]);
89 | }
90 |
91 | // lip
92 | translate([-innerMargin,-innerMargin,0]) {
93 | difference(){
94 | cube ([boardWidth+(innerMargin*2),boardLength+(innerMargin*2),wall]);
95 |
96 | if (usbSocketEnabled) {
97 | // my prints work / align better like this. odd. some wonky slicer aliasing?
98 | oddOffset = -0.5;
99 |
100 | // indentation for the usb socket
101 | translate([
102 | boardWidth
103 | -usbSocketOffset
104 | -usbSocketHoleWidth
105 | -wall
106 | -(usbSocketIndentWidth-usbSocketHoleWidth) / 2
107 | +oddOffset,-1,0])
108 | cube([usbSocketIndentWidth,17,wall*2]);
109 | }
110 | }
111 | }
112 | }
113 |
114 | if (drawPart == 0){
115 | box();
116 | }
117 | if (drawPart == 1) {
118 | lid();
119 | }
120 | if (drawPart == 2) {
121 | box();
122 | rotate([0,180,0]) translate([-(boardWidth ),0,-(innerHeight+5)]) lid();
123 | }
124 | }
125 |
126 |
127 | module standoff(standoffH, standoffR, holeRadius) {
128 | difference(){
129 | cylinder(h=standoffH,r=standoffR);
130 | cylinder(h=standoffH,r=holeRadius);
131 | }
132 | }
133 |
--------------------------------------------------------------------------------
/Platforms/polyphonic-fm-synthesizer/Mechanical/lid.stl:
--------------------------------------------------------------------------------
1 | solid OpenSCAD_Model
2 | facet normal -1 0 0
3 | outer loop
4 | vertex -0.5 -0.5 0
5 | vertex -0.5 50.5 1.5
6 | vertex -0.5 50.5 0
7 | endloop
8 | endfacet
9 | facet normal -1 -0 0
10 | outer loop
11 | vertex -0.5 50.5 1.5
12 | vertex -0.5 -0.5 0
13 | vertex -0.5 -0.5 1.5
14 | endloop
15 | endfacet
16 | facet normal 0 0 1
17 | outer loop
18 | vertex 50.5 50.5 1.5
19 | vertex 13.5 15.5 1.5
20 | vertex 50.5 -0.5 1.5
21 | endloop
22 | endfacet
23 | facet normal -0 0 1
24 | outer loop
25 | vertex -0.5 50.5 1.5
26 | vertex 13.5 15.5 1.5
27 | vertex 50.5 50.5 1.5
28 | endloop
29 | endfacet
30 | facet normal 0 0 1
31 | outer loop
32 | vertex 13.5 15.5 1.5
33 | vertex -0.5 50.5 1.5
34 | vertex 0.5 15.5 1.5
35 | endloop
36 | endfacet
37 | facet normal 0 0 1
38 | outer loop
39 | vertex -0.5 -0.5 1.5
40 | vertex 0.5 15.5 1.5
41 | vertex -0.5 50.5 1.5
42 | endloop
43 | endfacet
44 | facet normal 0 0 1
45 | outer loop
46 | vertex 0.5 15.5 1.5
47 | vertex -0.5 -0.5 1.5
48 | vertex 0.5 -0.5 1.5
49 | endloop
50 | endfacet
51 | facet normal 0 0 1
52 | outer loop
53 | vertex 50.5 -0.5 1.5
54 | vertex 13.5 15.5 1.5
55 | vertex 13.5 -0.5 1.5
56 | endloop
57 | endfacet
58 | facet normal 1 -0 0
59 | outer loop
60 | vertex 50.5 -0.5 1.5
61 | vertex 50.5 50.5 0
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267 | endfacet
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270 | vertex -2 -2 -1.5
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272 | vertex 52 -2 -1.5
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274 | endfacet
275 | facet normal -0 0 -1
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277 | vertex 52 52 -1.5
278 | vertex -2 -2 -1.5
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281 | endfacet
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283 | outer loop
284 | vertex -2 -2 -1.5
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286 | vertex -2 -2 0
287 | endloop
288 | endfacet
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292 | vertex -2 -2 -1.5
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294 | endloop
295 | endfacet
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297 | outer loop
298 | vertex 52 52 -1.5
299 | vertex -2 52 0
300 | vertex 52 52 0
301 | endloop
302 | endfacet
303 | facet normal 0 1 0
304 | outer loop
305 | vertex -2 52 0
306 | vertex 52 52 -1.5
307 | vertex -2 52 -1.5
308 | endloop
309 | endfacet
310 | endsolid OpenSCAD_Model
311 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | ## STM32F031 Template
2 |
3 | Ongoing process for creating a easy to use, open development environment for STM32F031 chips.
4 |
5 | ### Notes
6 | * Uses internal 8Mhz RC oscillator to generate 48Mhz system clock using PLL
7 | * Programming and debugging requires OpenOCD installed on the system.
8 | * "STM32F4 Discovery" board is used as a "ST-LINK/V2" JTAG adapter.
9 |
--------------------------------------------------------------------------------
/_blink/Makefile:
--------------------------------------------------------------------------------
1 | #------------------------------------------------------------------------------
2 | # Makefile for STM32F031
3 | # 03-30-2015 E. Brombaugh -- initial work
4 | # 25-07-2015 ihsan Kehribar -- later modified
5 | #------------------------------------------------------------------------------
6 |
7 | # Sub directories
8 | VPATH = ../BackendSupport/CMSIS ../BackendSupport/StdPeriph ../HardwareLayer
9 |
10 | # Object files
11 | OBJECTS = main.o systick_delay.o
12 | OBJECTS += startup_stm32f030.o system_stm32f0xx.o stm32f0xx_rcc.o
13 |
14 | # Use 'launchpad.net/gcc-arm-embedded' version for a complete toolchain setup
15 | TOOLCHAIN_FOLDER = /Users/kehribar/gcc-arm-none-eabi-4_9-2015q2/bin/
16 |
17 | #------------------------------------------------------------------------------
18 | # Almost nothing to play with down there ... Don't change.
19 | #------------------------------------------------------------------------------
20 |
21 | # Must define the MCU type
22 | CDEFS = -DSTM32F031 -DUSE_STDPERIPH_DRIVER -DARM_MATH_CM0
23 |
24 | # Linker script
25 | LDSCRIPT = ../BackendSupport/stm32f031_linker.ld
26 |
27 | # Optimization level, can be [0, 1, 2, 3, s].
28 | OPTLVL:= s
29 |
30 | # Object location settings
31 | OBJDIR = obj
32 | OBJECTS_O := $(addprefix $(OBJDIR)/,$(OBJECTS))
33 |
34 | # Compiler and linker flags
35 | COMMONFLAGS = -O$(OPTLVL) -g -ffunction-sections -std=c99 -Wall
36 | MCUFLAGS = -mthumb -mcpu=cortex-m0
37 |
38 | CFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -I. -I../BackendSupport/CMSIS -I../BackendSupport/StdPeriph -I../HardwareLayer $(CDEFS)
39 | CFLAGS += -ffreestanding -nostdlib
40 |
41 | LDFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -fno-exceptions
42 | LDFLAGS += -fdata-sections -nostartfiles -Wl,--gc-sections,-T$(LDSCRIPT),-Map=$(OBJDIR)/main.map
43 |
44 | # Executables
45 | ARCH = $(TOOLCHAIN_FOLDER)arm-none-eabi
46 | CC = $(ARCH)-gcc
47 | LD = $(ARCH)-ld -v
48 | AS = $(ARCH)-as
49 | OBJCPY = $(ARCH)-objcopy
50 | OBJDMP = $(ARCH)-objdump
51 | GDB = $(ARCH)-gdb
52 | SIZE = $(ARCH)-size
53 | OPENOCD = openocd
54 |
55 | CPFLAGS = --output-target=binary
56 | ODFLAGS = -x --syms
57 |
58 | # Targets
59 | all: main.bin
60 |
61 | clean:
62 | -rm -rf $(OBJDIR)
63 |
64 | main.ihex: main.elf
65 | $(OBJCPY) --output-target=ihex main.elf main.ihex
66 |
67 | main.bin: main.elf
68 | $(OBJCPY) $(CPFLAGS) $(OBJDIR)/main.elf $(OBJDIR)/main.bin
69 | $(OBJDMP) -d $(OBJDIR)/main.elf > $(OBJDIR)/main.dis
70 | $(SIZE) $(OBJDIR)/main.elf
71 |
72 | main.elf: $(OBJECTS) $(LDSCRIPT)
73 | $(CC) -o $(OBJDIR)/main.elf $(LDFLAGS) $(OBJECTS_O) -lnosys
74 |
75 | main.o:
76 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/main.o main.c
77 |
78 | %.o: %.c %.h
79 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/$@ $<
80 |
81 | %.o: %.s
82 | $(AS) -c -o $(OBJDIR)/$@ $<
83 |
84 | stlink-flash:
85 | st-flash write $(OBJDIR)/main.bin 0x8000000
86 |
87 | openocd-flash:
88 | $(OPENOCD) -f ../BackendSupport/openocd.cfg -c flash_chip
89 |
90 | debugserver:
91 | $(OPENOCD) -f ../BackendSupport/openocd.cfg
92 |
93 | ## Run 'make debugserver' in a seperate console window before running 'make debug'
94 | debug:
95 | make all && $(GDB) obj/main.elf \
96 | -ex "target remote localhost:3333" \
97 | -ex "load" \
98 | -ex "b main" \
99 | -ex "monitor reset halt" \
100 | -ex "continue" \
101 | -ex "-"
102 |
103 | iterate:
104 | make clean && make all && make openocd-flash
105 |
106 | -include $(shell mkdir $(OBJDIR) 2>/dev/null) $(wildcard $(OBJDIR)/*.d)
107 |
108 | #------------------------------------------------------------------------------
--------------------------------------------------------------------------------
/_blink/main.c:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | /
3 | /
4 | /----------------------------------------------------------------------------*/
5 | #include "stm32f0xx.h"
6 | #include "stm32f0xx_rcc.h"
7 | /*---------------------------------------------------------------------------*/
8 | #include "digital.h"
9 | #include "systick_delay.h"
10 | /*---------------------------------------------------------------------------*/
11 | static void hardware_init();
12 | /*---------------------------------------------------------------------------*/
13 | int main(void)
14 | {
15 | hardware_init();
16 |
17 | while(1)
18 | {
19 | _delay_ms(250);
20 | digitalWrite(B,1,HIGH);
21 |
22 | _delay_ms(250);
23 | digitalWrite(B,1,LOW);
24 | }
25 |
26 | return 0;
27 | }
28 | /*---------------------------------------------------------------------------*/
29 | static void hardware_init()
30 | {
31 | systick_init(SYSTICK_1MS);
32 |
33 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
34 |
35 | pinMode(B,1,OUTPUT);
36 |
37 | _delay_ms(10);
38 | }
39 | /*---------------------------------------------------------------------------*/
40 |
--------------------------------------------------------------------------------
/_i2s_16bit_dma/Makefile:
--------------------------------------------------------------------------------
1 | #------------------------------------------------------------------------------
2 | # Makefile for STM32F031
3 | # 03-30-2015 E. Brombaugh -- initial work
4 | # 25-07-2015 ihsan Kehribar -- later modified
5 | #------------------------------------------------------------------------------
6 |
7 | # Sub directories
8 | VPATH = ../BackendSupport/CMSIS ../BackendSupport/StdPeriph ../HardwareLayer
9 |
10 | # Object files
11 | OBJECTS = main.o systick_delay.o usart1.o xprintf.o
12 | OBJECTS += startup_stm32f030.o system_stm32f0xx.o stm32f0xx_rcc.o stm32f0xx_gpio.o
13 | OBJECTS += stm32f0xx_usart.o stm32f0xx_spi.o stm32f0xx_dma.o stm32f0xx_misc.o
14 |
15 | # Use 'launchpad.net/gcc-arm-embedded' version for a complete toolchain setup
16 | TOOLCHAIN_FOLDER = /Users/kehribar/gcc-arm-none-eabi-4_9-2015q2/bin/
17 |
18 | #------------------------------------------------------------------------------
19 | # Almost nothing to play with down there ... Don't change.
20 | #------------------------------------------------------------------------------
21 |
22 | # Must define the MCU type
23 | CDEFS = -DSTM32F031 -DUSE_STDPERIPH_DRIVER -DARM_MATH_CM0
24 |
25 | # Linker script
26 | LDSCRIPT = ../BackendSupport/stm32f031_linker.ld
27 |
28 | # Optimization level, can be [0, 1, 2, 3, s].
29 | OPTLVL:= s
30 |
31 | # Object location settings
32 | OBJDIR = obj
33 | OBJECTS_O := $(addprefix $(OBJDIR)/,$(OBJECTS))
34 |
35 | # Compiler and linker flags
36 | COMMONFLAGS = -O$(OPTLVL) -g -ffunction-sections -std=c99 -Wall
37 | MCUFLAGS = -mthumb -mcpu=cortex-m0
38 |
39 | CFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -I. -I../BackendSupport/CMSIS -I../BackendSupport/StdPeriph -I../HardwareLayer $(CDEFS)
40 | CFLAGS += -ffreestanding -nostdlib
41 |
42 | LDFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -fno-exceptions
43 | LDFLAGS += -fdata-sections -nostartfiles -Wl,--gc-sections,-T$(LDSCRIPT),-Map=$(OBJDIR)/main.map
44 |
45 | # Executables
46 | ARCH = $(TOOLCHAIN_FOLDER)arm-none-eabi
47 | CC = $(ARCH)-gcc
48 | LD = $(ARCH)-ld -v
49 | AS = $(ARCH)-as
50 | OBJCPY = $(ARCH)-objcopy
51 | OBJDMP = $(ARCH)-objdump
52 | GDB = $(ARCH)-gdb
53 | SIZE = $(ARCH)-size
54 | OPENOCD = openocd
55 |
56 | CPFLAGS = --output-target=binary
57 | ODFLAGS = -x --syms
58 |
59 | # Targets
60 | all: main.bin
61 |
62 | clean:
63 | -rm -rf $(OBJDIR)
64 |
65 | main.ihex: main.elf
66 | $(OBJCPY) --output-target=ihex main.elf main.ihex
67 |
68 | main.bin: main.elf
69 | $(OBJCPY) $(CPFLAGS) $(OBJDIR)/main.elf $(OBJDIR)/main.bin
70 | $(OBJDMP) -d $(OBJDIR)/main.elf > $(OBJDIR)/main.dis
71 | $(SIZE) $(OBJDIR)/main.elf
72 |
73 | main.elf: $(OBJECTS) $(LDSCRIPT)
74 | $(CC) -o $(OBJDIR)/main.elf $(LDFLAGS) $(OBJECTS_O) -lnosys
75 |
76 | main.o:
77 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/main.o main.c
78 |
79 | %.o: %.c %.h
80 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/$@ $<
81 |
82 | %.o: %.s
83 | $(AS) -c -o $(OBJDIR)/$@ $<
84 |
85 | stlink-flash:
86 | st-flash write $(OBJDIR)/main.bin 0x8000000
87 |
88 | openocd-flash:
89 | $(OPENOCD) -f ../BackendSupport/openocd.cfg -c flash_chip
90 |
91 | debugserver:
92 | $(OPENOCD) -f ../BackendSupport/openocd.cfg
93 |
94 | ## Run 'make debugserver' in a seperate console window before running 'make debug'
95 | debug:
96 | make all && $(GDB) obj/main.elf \
97 | -ex "target remote localhost:3333" \
98 | -ex "load" \
99 | -ex "b main" \
100 | -ex "monitor reset halt" \
101 | -ex "continue" \
102 | -ex "-"
103 |
104 | debug-gui:
105 | make all && ddd --debugger $(GDB) obj/main.elf \
106 | --eval-command="target remote localhost:3333" \
107 | --eval-command="load" \
108 | --eval-command="b main" \
109 | --eval-command="monitor reset halt" \
110 | --eval-command="continue"
111 |
112 | iterate:
113 | make clean && make all && make openocd-flash
114 |
115 | -include $(shell mkdir $(OBJDIR) 2>/dev/null) $(wildcard $(OBJDIR)/*.d)
116 |
117 | #------------------------------------------------------------------------------
--------------------------------------------------------------------------------
/_i2s_16bit_dma/main.c:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | /
3 | /
4 | /
5 | /----------------------------------------------------------------------------*/
6 | #include "stm32f0xx.h"
7 | #include "stm32f0xx_rcc.h"
8 | #include "stm32f0xx_spi.h"
9 | #include "stm32f0xx_gpio.h"
10 | #include "stm32f0xx_dma.h"
11 | #include "stm32f0xx_misc.h"
12 | #include "stm32f0xx_usart.h"
13 | /*---------------------------------------------------------------------------*/
14 | #include "usart1.h"
15 | #include "digital.h"
16 | #include "xprintf.h"
17 | #include "systick_delay.h"
18 | /*---------------------------------------------------------------------------*/
19 | static void hardware_init();
20 | /*---------------------------------------------------------------------------*/
21 | uint16_t I2S_Buffer_Tx[128];
22 | /*---------------------------------------------------------------------------*/
23 | int main(void)
24 | {
25 | uint8_t i;
26 | int16_t cnt = -32768;
27 | uint16_t* Buffer_A = &(I2S_Buffer_Tx[0]);
28 | uint16_t* Buffer_B = &(I2S_Buffer_Tx[64]);
29 |
30 | hardware_init();
31 |
32 | xprintf("> Hello World\r\n");
33 |
34 | while(1)
35 | {
36 | uint32_t tmpreg = DMA1->ISR;
37 |
38 | /* Buffer_A will be read after this point. Start to fill Buffer_B now! */
39 | if(tmpreg & DMA1_IT_TC3)
40 | {
41 | digitalWrite(A,0,HIGH);
42 | digitalWrite(A,9,HIGH);
43 |
44 | DMA1->IFCR |= DMA1_IT_TC3;
45 |
46 | for(i=0; i<64; i+=2)
47 | {
48 | /* Left ch */
49 | Buffer_B[i] = cnt++;
50 |
51 | /* Right ch */
52 | Buffer_B[i+1] = cnt << 1;
53 | }
54 |
55 | digitalWrite(A,0,LOW);
56 | }
57 | /* Buffer_B will be read after this point. Start to fill Buffer_A now! */
58 | else if(tmpreg & DMA1_IT_HT3)
59 | {
60 | digitalWrite(A,0,HIGH);
61 | digitalWrite(A,9,LOW);
62 |
63 | DMA1->IFCR |= DMA1_IT_HT3;
64 |
65 | for(i=0; i<64; i+=2)
66 | {
67 | /* Left ch */
68 | Buffer_A[i] = cnt++;
69 |
70 | /* Right ch */
71 | Buffer_A[i+1] = cnt << 1;
72 | }
73 |
74 | digitalWrite(A,0,LOW);
75 | }
76 | }
77 |
78 | return 0;
79 | }
80 | /*---------------------------------------------------------------------------*/
81 | static void hardware_init()
82 | {
83 | I2S_InitTypeDef I2S_InitStructure;
84 | DMA_InitTypeDef DMA_InitStructure;
85 |
86 | /* init systick and delay system */
87 | systick_init(SYSTICK_1MS);
88 |
89 | /* init uart and enable xprintf library */
90 | usart1_init(115200);
91 | xdev_out(usart1_sendChar);
92 |
93 | /* Debug pins ... */
94 | pinMode(A,9,OUTPUT);
95 | digitalWrite(A,9,LOW);
96 |
97 | pinMode(A,0,OUTPUT);
98 | digitalWrite(A,0,LOW);
99 |
100 | /* I2S pin: Word select */
101 | pinMode(A,4,ALTFUNC);
102 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_0);
103 |
104 | /* I2S pin: Bit clock */
105 | pinMode(A,5,ALTFUNC);
106 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_0);
107 |
108 | /* I2S pin: Master clock */
109 | pinMode(A,6,ALTFUNC);
110 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_0);
111 |
112 | /* I2S pin: Data out */
113 | pinMode(A,7,ALTFUNC);
114 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_0);
115 |
116 | /* Enable the DMA1 and SPI1 clocks */
117 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
118 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
119 |
120 | /* I2S peripheral configuration */
121 | I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low;
122 | I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;
123 | I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_32k;
124 | I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
125 | I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
126 | I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable;
127 | I2S_Init(SPI1, &I2S_InitStructure);
128 |
129 | /* DMA peripheral configuration */
130 | DMA_InitStructure.DMA_BufferSize = 128;
131 | DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
132 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
133 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
134 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
135 | DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
136 | DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)I2S_Buffer_Tx;
137 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
138 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR);
139 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
140 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
141 | DMA_Init(DMA1_Channel3, &DMA_InitStructure);
142 |
143 | /* Enable the DMA channel Tx */
144 | DMA_Cmd(DMA1_Channel3, ENABLE);
145 |
146 | /* Enable the I2S TX DMA request */
147 | SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
148 |
149 | /* Enable the SPI1 Master peripheral */
150 | I2S_Cmd(SPI1, ENABLE);
151 |
152 | /* Small delay for general stabilisation */
153 | _delay_ms(100);
154 | }
155 | /*---------------------------------------------------------------------------*/
--------------------------------------------------------------------------------
/_i2s_24bit_dma/Makefile:
--------------------------------------------------------------------------------
1 | #------------------------------------------------------------------------------
2 | # Makefile for STM32F031
3 | # 03-30-2015 E. Brombaugh -- initial work
4 | # 25-07-2015 ihsan Kehribar -- later modified
5 | #------------------------------------------------------------------------------
6 |
7 | # Sub directories
8 | VPATH = ../BackendSupport/CMSIS ../BackendSupport/StdPeriph ../HardwareLayer
9 |
10 | # Object files
11 | OBJECTS = main.o systick_delay.o usart1.o xprintf.o
12 | OBJECTS += startup_stm32f030.o system_stm32f0xx.o stm32f0xx_rcc.o stm32f0xx_gpio.o
13 | OBJECTS += stm32f0xx_usart.o stm32f0xx_spi.o stm32f0xx_dma.o stm32f0xx_misc.o
14 |
15 | # Use 'launchpad.net/gcc-arm-embedded' version for a complete toolchain setup
16 | TOOLCHAIN_FOLDER = /Users/kehribar/gcc-arm-none-eabi-4_9-2015q2/bin/
17 |
18 | #------------------------------------------------------------------------------
19 | # Almost nothing to play with down there ... Don't change.
20 | #------------------------------------------------------------------------------
21 |
22 | # Must define the MCU type
23 | CDEFS = -DSTM32F031 -DUSE_STDPERIPH_DRIVER -DARM_MATH_CM0
24 |
25 | # Linker script
26 | LDSCRIPT = ../BackendSupport/stm32f031_linker.ld
27 |
28 | # Optimization level, can be [0, 1, 2, 3, s].
29 | OPTLVL:= s
30 |
31 | # Object location settings
32 | OBJDIR = obj
33 | OBJECTS_O := $(addprefix $(OBJDIR)/,$(OBJECTS))
34 |
35 | # Compiler and linker flags
36 | COMMONFLAGS = -O$(OPTLVL) -g -ffunction-sections -std=c99 -Wall
37 | MCUFLAGS = -mthumb -mcpu=cortex-m0
38 |
39 | CFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -I. -I../BackendSupport/CMSIS -I../BackendSupport/StdPeriph -I../HardwareLayer $(CDEFS)
40 | CFLAGS += -ffreestanding -nostdlib
41 |
42 | LDFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -fno-exceptions
43 | LDFLAGS += -fdata-sections -nostartfiles -Wl,--gc-sections,-T$(LDSCRIPT),-Map=$(OBJDIR)/main.map
44 |
45 | # Executables
46 | ARCH = $(TOOLCHAIN_FOLDER)arm-none-eabi
47 | CC = $(ARCH)-gcc
48 | LD = $(ARCH)-ld -v
49 | AS = $(ARCH)-as
50 | OBJCPY = $(ARCH)-objcopy
51 | OBJDMP = $(ARCH)-objdump
52 | GDB = $(ARCH)-gdb
53 | SIZE = $(ARCH)-size
54 | OPENOCD = openocd
55 |
56 | CPFLAGS = --output-target=binary
57 | ODFLAGS = -x --syms
58 |
59 | # Targets
60 | all: main.bin
61 |
62 | clean:
63 | -rm -rf $(OBJDIR)
64 |
65 | main.ihex: main.elf
66 | $(OBJCPY) --output-target=ihex main.elf main.ihex
67 |
68 | main.bin: main.elf
69 | $(OBJCPY) $(CPFLAGS) $(OBJDIR)/main.elf $(OBJDIR)/main.bin
70 | $(OBJDMP) -d $(OBJDIR)/main.elf > $(OBJDIR)/main.dis
71 | $(SIZE) $(OBJDIR)/main.elf
72 |
73 | main.elf: $(OBJECTS) $(LDSCRIPT)
74 | $(CC) -o $(OBJDIR)/main.elf $(LDFLAGS) $(OBJECTS_O) -lnosys
75 |
76 | main.o:
77 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/main.o main.c
78 |
79 | %.o: %.c %.h
80 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/$@ $<
81 |
82 | %.o: %.s
83 | $(AS) -c -o $(OBJDIR)/$@ $<
84 |
85 | stlink-flash:
86 | st-flash write $(OBJDIR)/main.bin 0x8000000
87 |
88 | openocd-flash:
89 | $(OPENOCD) -f ../BackendSupport/openocd.cfg -c flash_chip
90 |
91 | debugserver:
92 | $(OPENOCD) -f ../BackendSupport/openocd.cfg
93 |
94 | ## Run 'make debugserver' in a seperate console window before running 'make debug'
95 | debug:
96 | make all && $(GDB) obj/main.elf \
97 | -ex "target remote localhost:3333" \
98 | -ex "load" \
99 | -ex "b main" \
100 | -ex "monitor reset halt" \
101 | -ex "continue" \
102 | -ex "-"
103 |
104 | debug-gui:
105 | make all && ddd --debugger $(GDB) obj/main.elf \
106 | --eval-command="target remote localhost:3333" \
107 | --eval-command="load" \
108 | --eval-command="b main" \
109 | --eval-command="monitor reset halt" \
110 | --eval-command="continue"
111 |
112 | iterate:
113 | make clean && make all && make openocd-flash
114 |
115 | -include $(shell mkdir $(OBJDIR) 2>/dev/null) $(wildcard $(OBJDIR)/*.d)
116 |
117 | #------------------------------------------------------------------------------
--------------------------------------------------------------------------------
/_i2s_24bit_dma/lut.h:
--------------------------------------------------------------------------------
1 | #include
2 |
3 | const int32_t sin_lut[512] = {
4 | 0, 69967, 139925, 209861, 279765, 349628, 419438, 489184, 558857, 628446,
5 | 697940, 767329, 836603, 905750, 974761, 1043626, 1112333, 1180872, 1249234, 1317408,
6 | 1385383, 1453150, 1520697, 1588016, 1655096, 1721926, 1788497, 1854799, 1920821, 1986555,
7 | 2051989, 2117113, 2181920, 2246397, 2310536, 2374328, 2437761, 2500828, 2563518, 2625822,
8 | 2687730, 2749234, 2810324, 2870990, 2931224, 2991017, 3050359, 3109242, 3167657, 3225594,
9 | 3283046, 3340003, 3396458, 3452401, 3507824, 3562718, 3617077, 3670890, 3724151, 3776850,
10 | 3828982, 3880536, 3931506, 3981884, 4031662, 4080833, 4129390, 4177325, 4224630, 4271300,
11 | 4317326, 4362702, 4407421, 4451476, 4494861, 4537569, 4579593, 4620928, 4661567, 4701504,
12 | 4740733, 4779248, 4817044, 4854114, 4890452, 4926055, 4960915, 4995029, 5028390, 5060994,
13 | 5092836, 5123911, 5154214, 5183741, 5212487, 5240448, 5267621, 5293999, 5319581, 5344362,
14 | 5368337, 5391504, 5413860, 5435400, 5456121, 5476021, 5495096, 5513343, 5530761, 5547345,
15 | 5563094, 5578005, 5592076, 5605305, 5617690, 5629229, 5639920, 5649762, 5658753, 5666891,
16 | 5674177, 5680607, 5686183, 5690902, 5694764, 5697768, 5699914, 5701202, 5701632, 5701202,
17 | 5699914, 5697768, 5694764, 5690902, 5686183, 5680607, 5674177, 5666891, 5658753, 5649762,
18 | 5639920, 5629229, 5617690, 5605305, 5592076, 5578005, 5563094, 5547345, 5530761, 5513343,
19 | 5495096, 5476021, 5456121, 5435400, 5413860, 5391504, 5368337, 5344362, 5319581, 5293999,
20 | 5267621, 5240448, 5212487, 5183741, 5154214, 5123911, 5092836, 5060994, 5028390, 4995029,
21 | 4960915, 4926055, 4890452, 4854114, 4817044, 4779248, 4740733, 4701504, 4661567, 4620928,
22 | 4579593, 4537569, 4494861, 4451476, 4407421, 4362702, 4317326, 4271300, 4224630, 4177325,
23 | 4129390, 4080833, 4031662, 3981884, 3931506, 3880536, 3828982, 3776850, 3724151, 3670890,
24 | 3617077, 3562718, 3507824, 3452401, 3396458, 3340003, 3283046, 3225594, 3167657, 3109242,
25 | 3050359, 2991017, 2931224, 2870990, 2810324, 2749234, 2687730, 2625822, 2563518, 2500828,
26 | 2437761, 2374328, 2310536, 2246397, 2181920, 2117113, 2051989, 1986555, 1920821, 1854799,
27 | 1788497, 1721926, 1655096, 1588016, 1520697, 1453150, 1385383, 1317408, 1249234, 1180872,
28 | 1112333, 1043626, 974761, 905750, 836603, 767329, 697940, 628446, 558857, 489184,
29 | 419438, 349628, 279765, 209861, 139925, 69967, 0, -69967, -139925, -209861,
30 | -279765, -349628, -419438, -489184, -558857, -628446, -697940, -767329, -836603, -905750,
31 | -974761, -1043626, -1112333, -1180872, -1249234, -1317408, -1385383, -1453150, -1520697, -1588016,
32 | -1655096, -1721926, -1788497, -1854799, -1920821, -1986555, -2051989, -2117113, -2181920, -2246397,
33 | -2310536, -2374328, -2437761, -2500828, -2563518, -2625822, -2687730, -2749234, -2810324, -2870990,
34 | -2931224, -2991017, -3050359, -3109242, -3167657, -3225594, -3283046, -3340003, -3396458, -3452401,
35 | -3507824, -3562718, -3617077, -3670890, -3724151, -3776850, -3828982, -3880536, -3931506, -3981884,
36 | -4031662, -4080833, -4129390, -4177325, -4224630, -4271300, -4317326, -4362702, -4407421, -4451476,
37 | -4494861, -4537569, -4579593, -4620928, -4661567, -4701504, -4740733, -4779248, -4817044, -4854114,
38 | -4890452, -4926055, -4960915, -4995029, -5028390, -5060994, -5092836, -5123911, -5154214, -5183741,
39 | -5212487, -5240448, -5267621, -5293999, -5319581, -5344362, -5368337, -5391504, -5413860, -5435400,
40 | -5456121, -5476021, -5495096, -5513343, -5530761, -5547345, -5563094, -5578005, -5592076, -5605305,
41 | -5617690, -5629229, -5639920, -5649762, -5658753, -5666891, -5674177, -5680607, -5686183, -5690902,
42 | -5694764, -5697768, -5699914, -5701202, -5701632, -5701202, -5699914, -5697768, -5694764, -5690902,
43 | -5686183, -5680607, -5674177, -5666891, -5658753, -5649762, -5639920, -5629229, -5617690, -5605305,
44 | -5592076, -5578005, -5563094, -5547345, -5530761, -5513343, -5495096, -5476021, -5456121, -5435400,
45 | -5413860, -5391504, -5368337, -5344362, -5319581, -5293999, -5267621, -5240448, -5212487, -5183741,
46 | -5154214, -5123911, -5092836, -5060994, -5028390, -4995029, -4960915, -4926055, -4890452, -4854114,
47 | -4817044, -4779248, -4740733, -4701504, -4661567, -4620928, -4579593, -4537569, -4494861, -4451476,
48 | -4407421, -4362702, -4317326, -4271300, -4224630, -4177325, -4129390, -4080833, -4031662, -3981884,
49 | -3931506, -3880536, -3828982, -3776850, -3724151, -3670890, -3617077, -3562718, -3507824, -3452401,
50 | -3396458, -3340003, -3283046, -3225594, -3167657, -3109242, -3050359, -2991017, -2931224, -2870990,
51 | -2810324, -2749234, -2687730, -2625822, -2563518, -2500828, -2437761, -2374328, -2310536, -2246397,
52 | -2181920, -2117113, -2051989, -1986555, -1920821, -1854799, -1788497, -1721926, -1655096, -1588016,
53 | -1520697, -1453150, -1385383, -1317408, -1249234, -1180872, -1112333, -1043626, -974761, -905750,
54 | -836603, -767329, -697940, -628446, -558857, -489184, -419438, -349628, -279765, -209861,
55 | -139925, -69967
56 | };
--------------------------------------------------------------------------------
/_i2s_24bit_dma/lutgen:
--------------------------------------------------------------------------------
https://raw.githubusercontent.com/kehribar/stm32f031_template/664712d42a45a2d5e4a3a8e4d0e624b8053aa644/_i2s_24bit_dma/lutgen
--------------------------------------------------------------------------------
/_i2s_24bit_dma/lutgen.c:
--------------------------------------------------------------------------------
1 | #include
2 | #include
3 | #include
4 |
5 | #define PI 3.14159265359
6 | #define AMPLITUDE 5701632
7 | #define NUM_POINTS 512
8 |
9 | int main()
10 | {
11 | int i;
12 | FILE* fd;
13 |
14 | fd = fopen("lut.h","w+");
15 |
16 | fprintf(fd,"#include \n\n");
17 | fprintf(fd,"const int32_t sin_lut[%d] = {\n ",NUM_POINTS);
18 |
19 | for(i=0; i 0))
22 | {
23 | fprintf(fd,"\n ");
24 | }
25 | fprintf(fd,"%9d,",(int)(sin(2*PI*i/NUM_POINTS) * AMPLITUDE));
26 | }
27 |
28 | fprintf(fd,"%9d\n};",(int)(sin(2*PI*i/NUM_POINTS) * AMPLITUDE));
29 |
30 | fclose(fd);
31 |
32 | return 0;
33 | }
34 |
--------------------------------------------------------------------------------
/_i2s_24bit_dma/main.c:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | /
3 | /
4 | /
5 | /----------------------------------------------------------------------------*/
6 | #include "stm32f0xx.h"
7 | #include "stm32f0xx_rcc.h"
8 | #include "stm32f0xx_spi.h"
9 | #include "stm32f0xx_gpio.h"
10 | #include "stm32f0xx_dma.h"
11 | #include "stm32f0xx_misc.h"
12 | #include "stm32f0xx_usart.h"
13 | /*---------------------------------------------------------------------------*/
14 | #include "lut.h"
15 | #include "usart1.h"
16 | #include "digital.h"
17 | #include "xprintf.h"
18 | #include "systick_delay.h"
19 | /*---------------------------------------------------------------------------*/
20 | int32_t I2S_Buffer_Tx[128];
21 | /*---------------------------------------------------------------------------*/
22 | static void hardware_init();
23 | static int32_t convertDataForDma_24b(const int32_t data);
24 | /*---------------------------------------------------------------------------*/
25 | int main(void)
26 | {
27 | uint8_t i;
28 | int32_t data;
29 | uint16_t phaseCnt;
30 | uint16_t phaseInc;
31 | int32_t* const Buffer_A = &(I2S_Buffer_Tx[0]);
32 | int32_t* const Buffer_B = &(I2S_Buffer_Tx[64]);
33 |
34 | phaseCnt = 0;
35 | phaseInc = 10000;
36 |
37 | hardware_init();
38 |
39 | xprintf("> Hello World\r\n");
40 |
41 | while(1)
42 | {
43 | uint32_t tmpreg = DMA1->ISR;
44 |
45 | /* Buffer_A will be read after this point. Start to fill Buffer_B now! */
46 | if(tmpreg & DMA1_IT_TC3)
47 | {
48 | digitalWrite(A,0,HIGH);
49 |
50 | DMA1->IFCR |= DMA1_IT_TC3;
51 |
52 | for(i=0; i<64; i+=2)
53 | {
54 | /* Generate data */
55 | phaseCnt += phaseInc;
56 | data = sin_lut[phaseCnt >> 7];
57 |
58 | /* Left ch */
59 | Buffer_B[i] = convertDataForDma_24b(data);
60 |
61 | /* Right ch */
62 | Buffer_B[i+1] = convertDataForDma_24b(data);
63 | }
64 |
65 | digitalWrite(A,0,LOW);
66 | }
67 | /* Buffer_B will be read after this point. Start to fill Buffer_A now! */
68 | else if(tmpreg & DMA1_IT_HT3)
69 | {
70 | digitalWrite(A,0,HIGH);
71 |
72 | DMA1->IFCR |= DMA1_IT_HT3;
73 |
74 | for(i=0; i<64; i+=2)
75 | {
76 | /* Generate data */
77 | phaseCnt += phaseInc;
78 | data = sin_lut[phaseCnt >> 7];
79 |
80 | /* Left ch */
81 | Buffer_A[i] = convertDataForDma_24b(data);
82 |
83 | /* Right ch */
84 | Buffer_A[i+1] = convertDataForDma_24b(data);
85 | }
86 |
87 | digitalWrite(A,0,LOW);
88 | }
89 | }
90 |
91 | return 0;
92 | }
93 | /*---------------------------------------------------------------------------*/
94 | static int32_t convertDataForDma_24b(const int32_t data)
95 | {
96 | uint32_t result;
97 | uint32_t shiftedData;
98 | shiftedData = data << 8;
99 | result = (shiftedData & 0xFFFF0000) >> 16;
100 | result |= (shiftedData & 0x0000FFFF) << 16;
101 | return (int32_t)result;
102 | }
103 | /*---------------------------------------------------------------------------*/
104 | static void hardware_init()
105 | {
106 | I2S_InitTypeDef I2S_InitStructure;
107 | DMA_InitTypeDef DMA_InitStructure;
108 |
109 | /* init systick and delay system */
110 | systick_init(SYSTICK_1MS);
111 |
112 | /* init uart and enable xprintf library */
113 | usart1_init(115200);
114 | xdev_out(usart1_sendChar);
115 |
116 | /* Debug pins ... */
117 | pinMode(A,9,OUTPUT);
118 | digitalWrite(A,9,LOW);
119 |
120 | pinMode(A,0,OUTPUT);
121 | digitalWrite(A,0,LOW);
122 |
123 | /* I2S pin: Word select */
124 | pinMode(A,4,ALTFUNC);
125 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource4, GPIO_AF_0);
126 |
127 | /* I2S pin: Bit clock */
128 | pinMode(A,5,ALTFUNC);
129 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_0);
130 |
131 | /* I2S pin: Master clock */
132 | pinMode(A,6,ALTFUNC);
133 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_0);
134 |
135 | /* I2S pin: Data out */
136 | pinMode(A,7,ALTFUNC);
137 | GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_0);
138 |
139 | /* Enable the DMA1 and SPI1 clocks */
140 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
141 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
142 |
143 | /* I2S peripheral configuration */
144 | I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low;
145 | I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;
146 | I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_96k; // Divide this to 2 since we are using 24 bit I2S
147 | I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_32b;
148 | I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
149 | I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable;
150 | I2S_Init(SPI1, &I2S_InitStructure);
151 |
152 | /* DMA peripheral configuration */
153 | DMA_InitStructure.DMA_BufferSize = 128 * 2;
154 | DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
155 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
156 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
157 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
158 | DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
159 | DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)I2S_Buffer_Tx;
160 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
161 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(SPI1->DR);
162 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
163 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
164 | DMA_Init(DMA1_Channel3, &DMA_InitStructure);
165 |
166 | /* Enable the DMA channel Tx */
167 | DMA_Cmd(DMA1_Channel3, ENABLE);
168 |
169 | /* Enable the I2S TX DMA request */
170 | SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
171 |
172 | /* Enable the SPI1 Master peripheral */
173 | I2S_Cmd(SPI1, ENABLE);
174 |
175 | /* Small delay for general stabilisation */
176 | _delay_ms(100);
177 | }
178 | /*---------------------------------------------------------------------------*/
--------------------------------------------------------------------------------
/_synth/Makefile:
--------------------------------------------------------------------------------
1 | #------------------------------------------------------------------------------
2 | # Makefile for STM32F031
3 | # 03-30-2015 E. Brombaugh -- initial work
4 | # 25-07-2015 ihsan Kehribar -- later modified
5 | #------------------------------------------------------------------------------
6 |
7 | # Sub directories
8 | VPATH = ../BackendSupport/CMSIS ../BackendSupport/StdPeriph ../HardwareLayer
9 |
10 | # Object files
11 | OBJECTS = main.o systick_delay.o usart1.o xprintf.o
12 | OBJECTS += startup_stm32f030.o system_stm32f0xx.o stm32f0xx_rcc.o stm32f0xx_gpio.o
13 | OBJECTS += stm32f0xx_usart.o stm32f0xx_spi.o stm32f0xx_dma.o stm32f0xx_misc.o
14 |
15 | # Use 'launchpad.net/gcc-arm-embedded' version for a complete toolchain setup
16 | TOOLCHAIN_FOLDER = /Users/kehribar/gcc-arm-none-eabi-4_9-2015q2/bin/
17 |
18 | #------------------------------------------------------------------------------
19 | # Almost nothing to play with down there ... Don't change.
20 | #------------------------------------------------------------------------------
21 |
22 | # Must define the MCU type
23 | CDEFS = -DSTM32F031 -DUSE_STDPERIPH_DRIVER -DARM_MATH_CM0
24 |
25 | # Linker script
26 | LDSCRIPT = ../BackendSupport/stm32f031_linker.ld
27 |
28 | # Optimization level, can be [0, 1, 2, 3, s].
29 | OPTLVL:= 3
30 |
31 | # Object location settings
32 | OBJDIR = obj
33 | OBJECTS_O := $(addprefix $(OBJDIR)/,$(OBJECTS))
34 |
35 | # Compiler and linker flags
36 | COMMONFLAGS = -O$(OPTLVL) -g -ffunction-sections -std=c99 -Wall -fdiagnostics-color=auto
37 | MCUFLAGS = -mthumb -mcpu=cortex-m0
38 |
39 | CFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -I. -I../BackendSupport/CMSIS -I../BackendSupport/StdPeriph -I../HardwareLayer $(CDEFS)
40 | CFLAGS += -ffreestanding -nostdlib
41 |
42 | LDFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -fno-exceptions
43 | LDFLAGS += -fdata-sections -nostartfiles -Wl,--gc-sections,-T$(LDSCRIPT),-Map=$(OBJDIR)/main.map
44 |
45 | # Executables
46 | ARCH = $(TOOLCHAIN_FOLDER)arm-none-eabi
47 | CC = $(ARCH)-gcc
48 | LD = $(ARCH)-ld -v
49 | AS = $(ARCH)-as
50 | OBJCPY = $(ARCH)-objcopy
51 | OBJDMP = $(ARCH)-objdump
52 | GDB = $(ARCH)-gdb
53 | SIZE = $(ARCH)-size
54 | OPENOCD = openocd
55 |
56 | CPFLAGS = --output-target=binary
57 | ODFLAGS = -x --syms
58 |
59 | # Targets
60 | all: main.bin
61 |
62 | clean:
63 | -rm -rf $(OBJDIR)
64 |
65 | main.ihex: main.elf
66 | $(OBJCPY) --output-target=ihex main.elf main.ihex
67 |
68 | main.bin: main.elf
69 | $(OBJCPY) $(CPFLAGS) $(OBJDIR)/main.elf $(OBJDIR)/main.bin
70 | $(OBJDMP) -d -S -h -C $(OBJDIR)/main.elf > $(OBJDIR)/main.dis
71 | $(OBJDMP) -d $(OBJDIR)/main.elf > $(OBJDIR)/main_raw.dis
72 | $(SIZE) $(OBJDIR)/main.elf
73 |
74 | main.elf: $(OBJECTS) $(LDSCRIPT)
75 | $(CC) -o $(OBJDIR)/main.elf $(LDFLAGS) $(OBJECTS_O) -lnosys
76 |
77 | main.o:
78 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/main.o main.c
79 |
80 | %.o: %.c %.h
81 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/$@ $<
82 |
83 | %.o: %.s
84 | $(AS) -c -o $(OBJDIR)/$@ $<
85 |
86 | stlink-flash:
87 | st-flash write $(OBJDIR)/main.bin 0x8000000
88 |
89 | openocd-flash:
90 | $(OPENOCD) -f ../BackendSupport/openocd.cfg -c flash_chip
91 |
92 | debugserver:
93 | $(OPENOCD) -f ../BackendSupport/openocd.cfg
94 |
95 | ## Run 'make debugserver' in a seperate console window before running 'make debug'
96 | debug:
97 | make all && $(GDB) obj/main.elf \
98 | -ex "target remote localhost:3333" \
99 | -ex "load" \
100 | -ex "b main" \
101 | -ex "monitor reset halt" \
102 | -ex "continue" \
103 | -ex "-"
104 |
105 | debug-gui:
106 | make all && ddd --debugger $(GDB) obj/main.elf \
107 | --eval-command="target remote localhost:3333" \
108 | --eval-command="load" \
109 | --eval-command="b main" \
110 | --eval-command="monitor reset halt" \
111 | --eval-command="continue"
112 |
113 | iterate:
114 | make clean && make all && make openocd-flash
115 |
116 | -include $(shell mkdir $(OBJDIR) 2>/dev/null) $(wildcard $(OBJDIR)/*.d)
117 |
118 | #------------------------------------------------------------------------------
--------------------------------------------------------------------------------
/_synth/math_func.h:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | /
3 | /
4 | /------------------------------------------------------------------------------
5 | /
6 | /----------------------------------------------------------------------------*/
7 | #ifndef _MATH_FUNC_H
8 | #define _MATH_FUNC_H
9 | /*---------------------------------------------------------------------------*/
10 | #include
11 | #include "arm_math.h"
12 |
13 | typedef union {
14 | uint16_t value;
15 | uint8_t bytes[2];
16 | } Word;
17 |
18 | typedef union {
19 | uint32_t value;
20 | uint16_t words[2];
21 | uint8_t bytes[4];
22 | } LongWord;
23 |
24 | static inline int16_t S16S16MulShift16(int32_t a, int32_t b)
25 | {
26 | LongWord result;
27 | result.value = (int32_t)a * (int32_t)b;
28 | return (int16_t)(result.words[1]);
29 | }
30 |
31 | static inline int32_t S16S16MulShift8(int32_t a, int32_t b)
32 | {
33 | int32_t tmp;
34 |
35 | tmp = a * b;
36 |
37 | // if(tmp > 8388607)
38 | // {
39 | // return 32767;
40 | // }
41 | // else if(tmp < -8388608)
42 | // {
43 | // return -32768;
44 | // }
45 |
46 | return (int32_t)(tmp >> 8);
47 | }
48 |
49 | static inline int32_t S16S16MulShift4(int32_t a, int32_t b)
50 | {
51 | int32_t tmp;
52 |
53 | tmp = a * b;
54 |
55 | // if(tmp > 8388607)
56 | // {
57 | // return 32767;
58 | // }
59 | // else if(tmp < -8388608)
60 | // {
61 | // return -32768;
62 | // }
63 |
64 | return (int32_t)(tmp >> 4);
65 | }
66 |
67 | #endif _MATH_FUNC_H
--------------------------------------------------------------------------------
/_synth/ringBuffer.h:
--------------------------------------------------------------------------------
1 | /*******************************************************************************************************************
2 | *
3 | * See the http://www.fourwalledcubicle.com/files/LightweightRingBuff.h for the license information.
4 | *
5 | *******************************************************************************************************************/
6 | #ifndef _RINGBUFF
7 | #define _RINGBUFF
8 | /*----------------------------------------------------------------------------------------------------------------*/
9 | #include
10 | // #include
11 | // #include
12 | #define ATOMIC_BLOCK(x)
13 | /*----------------------------------------------------------------------------------------------------------------*/
14 | typedef struct
15 | {
16 | uint8_t* In; /**< Current storage location in the circular buffer. */
17 | uint8_t* Out; /**< Current retrieval location in the circular buffer. */
18 | uint8_t* Start; /**< Pointer to the start of the buffer's underlying storage array. */
19 | uint8_t* End; /**< Pointer to the end of the buffer's underlying storage array. */
20 | uint16_t Size; /**< Size of the buffer's underlying storage array. */
21 | uint16_t Count; /**< Number of bytes currently stored in the buffer. */
22 | } RingBuffer_t;
23 | /*----------------------------------------------------------------------------------------------------------------*/
24 | static inline void RingBuffer_InitBuffer(RingBuffer_t* Buffer,uint8_t* const DataPtr,const uint16_t Size)
25 | {
26 | Buffer->In = DataPtr;
27 | Buffer->Out = DataPtr;
28 | Buffer->Start = &DataPtr[0];
29 | Buffer->End = &DataPtr[Size];
30 | Buffer->Size = Size;
31 | Buffer->Count = 0;
32 | }
33 | /*----------------------------------------------------------------------------------------------------------------*/
34 | static inline uint16_t RingBuffer_GetCount(RingBuffer_t* const Buffer)
35 | {
36 | uint16_t Count;
37 | ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
38 | {
39 | Count = Buffer->Count;
40 | }
41 | return Count;
42 | }
43 | /*----------------------------------------------------------------------------------------------------------------*/
44 | static inline uint16_t RingBuffer_GetFreeCount(RingBuffer_t* const Buffer)
45 | {
46 | return (Buffer->Size - RingBuffer_GetCount(Buffer));
47 | }
48 | /*----------------------------------------------------------------------------------------------------------------*/
49 | static inline uint8_t RingBuffer_IsEmpty(RingBuffer_t* const Buffer)
50 | {
51 | return (RingBuffer_GetCount(Buffer) == 0);
52 | }
53 | /*----------------------------------------------------------------------------------------------------------------*/
54 | static inline uint8_t RingBuffer_IsFull(RingBuffer_t* const Buffer)
55 | {
56 | return (RingBuffer_GetCount(Buffer) == Buffer->Size);
57 | }
58 | /*----------------------------------------------------------------------------------------------------------------*/
59 | static inline void RingBuffer_Insert(RingBuffer_t* Buffer, const uint8_t Data)
60 | {
61 | *Buffer->In = Data;
62 |
63 | if (++Buffer->In == Buffer->End)
64 | Buffer->In = Buffer->Start;
65 |
66 | ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
67 | {
68 | Buffer->Count++;
69 | }
70 | }
71 | /*----------------------------------------------------------------------------------------------------------------*/
72 | static inline uint8_t RingBuffer_Remove(RingBuffer_t* Buffer)
73 | {
74 | uint8_t Data = *Buffer->Out;
75 |
76 | if (++Buffer->Out == Buffer->End)
77 | Buffer->Out = Buffer->Start;
78 |
79 | ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
80 | {
81 | Buffer->Count--;
82 | }
83 |
84 | return Data;
85 | }
86 | /*----------------------------------------------------------------------------------------------------------------*/
87 | static inline uint8_t RingBuffer_Peek(RingBuffer_t* const Buffer)
88 | {
89 | return *Buffer->Out;
90 | }
91 | /*----------------------------------------------------------------------------------------------------------------*/
92 | #endif
93 | /*----------------------------------------------------------------------------------------------------------------*/
94 |
--------------------------------------------------------------------------------
/_synth/soft_uart.h:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | /
3 | /
4 | /----------------------------------------------------------------------------*/
5 | #include
6 | #include "systick_delay.h"
7 |
8 | #define uart_set_pin() digitalWrite(A,9,HIGH)
9 | #define uart_clr_pin() digitalWrite(A,9,LOW)
10 | #define uart_bit_dly() _delay_nop(77)
11 |
12 | /* Sends 115200 baud rate UART messages with 48Mhz system clock */
13 | static void dbg_sendChar(uint8_t tx)
14 | {
15 | uint8_t i;
16 |
17 | /* Start condition */
18 | uart_clr_pin();
19 | uart_bit_dly();
20 |
21 | for(i=0;i<8;i++)
22 | {
23 | if(tx & 0x01)
24 | {
25 | uart_set_pin();
26 | }
27 | else
28 | {
29 | uart_clr_pin();
30 | }
31 | uart_bit_dly();
32 | tx = tx >> 1;
33 | }
34 |
35 | /* Stop condition */
36 | uart_set_pin();
37 | uart_bit_dly();
38 |
39 | /* Extra delay ... */
40 | uart_bit_dly();
41 | uart_bit_dly();
42 | }
--------------------------------------------------------------------------------
/_synth/synth.h:
--------------------------------------------------------------------------------
1 | /*-----------------------------------------------------------------------------
2 | /
3 | /
4 | /------------------------------------------------------------------------------
5 | /
6 | /----------------------------------------------------------------------------*/
7 | #include
8 |
9 | #define NOTE_SILENT 0
10 | #define NOTE_TRIGGER 1
11 | #define NOTE_DECAY 2
12 |
13 | typedef struct t_envelope {
14 | uint8_t state;
15 | uint16_t envelopeCounter;
16 | } t_envelope;
17 |
18 | typedef struct t_envSetting {
19 | uint16_t attackRate;
20 | uint16_t decayRate;
21 | uint16_t sustainLevel;
22 | uint16_t releaseRate;
23 | } t_envSetting;
24 |
25 | typedef struct t_lfo {
26 | uint16_t phaseCounter_left;
27 | uint16_t phaseCounter_right;
28 | uint16_t stereoPanning_offset;
29 | uint16_t freq;
30 | int32_t outSignal;
31 | uint16_t depth;
32 | } t_lfo;
33 |
34 | typedef struct t_key {
35 | uint8_t noteState;
36 | uint8_t noteState_d;
37 | uint8_t lastnote;
38 | uint16_t keyVelocity;
39 | uint16_t maxModulation;
40 | uint16_t freqTone;
41 | uint16_t freqMod;
42 | uint16_t phaseCounterTone;
43 | uint16_t phaseCounterMod;
44 | uint16_t phaseCounterFm;
45 | t_envelope fmEnvelope;
46 | t_envelope modEnvelope;
47 | t_envelope ampEnvelope;
48 | } t_key;
49 |
--------------------------------------------------------------------------------
/_usart/Makefile:
--------------------------------------------------------------------------------
1 | #------------------------------------------------------------------------------
2 | # Makefile for STM32F031
3 | # 03-30-2015 E. Brombaugh -- initial work
4 | # 25-07-2015 ihsan Kehribar -- later modified
5 | #------------------------------------------------------------------------------
6 |
7 | # Sub directories
8 | VPATH = ../BackendSupport/CMSIS ../BackendSupport/StdPeriph ../HardwareLayer
9 |
10 | # Object files
11 | OBJECTS = main.o systick_delay.o usart1.o xprintf.o
12 | OBJECTS += startup_stm32f030.o system_stm32f0xx.o stm32f0xx_rcc.o stm32f0xx_gpio.o stm32f0xx_usart.o
13 |
14 | # Use 'launchpad.net/gcc-arm-embedded' version for a complete toolchain setup
15 | TOOLCHAIN_FOLDER = /Users/kehribar/gcc-arm-none-eabi-4_9-2015q2/bin/
16 |
17 | #------------------------------------------------------------------------------
18 | # Almost nothing to play with down there ... Don't change.
19 | #------------------------------------------------------------------------------
20 |
21 | # Must define the MCU type
22 | CDEFS = -DSTM32F031 -DUSE_STDPERIPH_DRIVER -DARM_MATH_CM0
23 |
24 | # Linker script
25 | LDSCRIPT = ../BackendSupport/stm32f031_linker.ld
26 |
27 | # Optimization level, can be [0, 1, 2, 3, s].
28 | OPTLVL:= s
29 |
30 | # Object location settings
31 | OBJDIR = obj
32 | OBJECTS_O := $(addprefix $(OBJDIR)/,$(OBJECTS))
33 |
34 | # Compiler and linker flags
35 | COMMONFLAGS = -O$(OPTLVL) -g -ffunction-sections -std=c99 -Wall
36 | MCUFLAGS = -mthumb -mcpu=cortex-m0
37 |
38 | CFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -I. -I../BackendSupport/CMSIS -I../BackendSupport/StdPeriph -I../HardwareLayer $(CDEFS)
39 | CFLAGS += -ffreestanding -nostdlib
40 |
41 | LDFLAGS = $(COMMONFLAGS) $(MCUFLAGS) -fno-exceptions
42 | LDFLAGS += -fdata-sections -nostartfiles -Wl,--gc-sections,-T$(LDSCRIPT),-Map=$(OBJDIR)/main.map
43 |
44 | # Executables
45 | ARCH = $(TOOLCHAIN_FOLDER)arm-none-eabi
46 | CC = $(ARCH)-gcc
47 | LD = $(ARCH)-ld -v
48 | AS = $(ARCH)-as
49 | OBJCPY = $(ARCH)-objcopy
50 | OBJDMP = $(ARCH)-objdump
51 | GDB = $(ARCH)-gdb
52 | SIZE = $(ARCH)-size
53 | OPENOCD = openocd
54 |
55 | CPFLAGS = --output-target=binary
56 | ODFLAGS = -x --syms
57 |
58 | # Targets
59 | all: main.bin
60 |
61 | clean:
62 | -rm -rf $(OBJDIR)
63 |
64 | main.ihex: main.elf
65 | $(OBJCPY) --output-target=ihex main.elf main.ihex
66 |
67 | main.bin: main.elf
68 | $(OBJCPY) $(CPFLAGS) $(OBJDIR)/main.elf $(OBJDIR)/main.bin
69 | $(OBJDMP) -d $(OBJDIR)/main.elf > $(OBJDIR)/main.dis
70 | $(SIZE) $(OBJDIR)/main.elf
71 |
72 | main.elf: $(OBJECTS) $(LDSCRIPT)
73 | $(CC) -o $(OBJDIR)/main.elf $(LDFLAGS) $(OBJECTS_O) -lnosys
74 |
75 | main.o:
76 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/main.o main.c
77 |
78 | %.o: %.c %.h
79 | $(CC) $(CFLAGS) -c -o $(OBJDIR)/$@ $<
80 |
81 | %.o: %.s
82 | $(AS) -c -o $(OBJDIR)/$@ $<
83 |
84 | stlink-flash:
85 | st-flash write $(OBJDIR)/main.bin 0x8000000
86 |
87 | openocd-flash:
88 | $(OPENOCD) -f ../BackendSupport/openocd.cfg -c flash_chip
89 |
90 | debugserver:
91 | $(OPENOCD) -f ../BackendSupport/openocd.cfg
92 |
93 | ## Run 'make debugserver' in a seperate console window before running 'make debug'
94 | debug:
95 | make all && $(GDB) obj/main.elf \
96 | -ex "target remote localhost:3333" \
97 | -ex "load" \
98 | -ex "b main" \
99 | -ex "monitor reset halt" \
100 | -ex "continue" \
101 | -ex "-"
102 |
103 | iterate:
104 | make clean && make all && make openocd-flash
105 |
106 | -include $(shell mkdir $(OBJDIR) 2>/dev/null) $(wildcard $(OBJDIR)/*.d)
107 |
108 | #------------------------------------------------------------------------------
--------------------------------------------------------------------------------
/_usart/main.c:
--------------------------------------------------------------------------------
1 | /*----------------------------------------------------------------------------
2 | /
3 | /
4 | /----------------------------------------------------------------------------*/
5 | #include "stm32f0xx.h"
6 | #include "stm32f0xx_rcc.h"
7 | #include "stm32f0xx_gpio.h"
8 | #include "stm32f0xx_usart.h"
9 | /*---------------------------------------------------------------------------*/
10 | #include "xprintf.h"
11 | #include "usart1.h"
12 | #include "digital.h"
13 | #include "systick_delay.h"
14 | /*---------------------------------------------------------------------------*/
15 | static void hardware_init();
16 | /*---------------------------------------------------------------------------*/
17 | int main(void)
18 | {
19 | uint32_t cnt = 0;
20 |
21 | hardware_init();
22 |
23 | while(1)
24 | {
25 | xprintf("> Counter: %d\r\n",cnt++);
26 |
27 | _delay_ms(50);
28 | digitalWrite(B,1,HIGH);
29 |
30 | _delay_ms(50);
31 | digitalWrite(B,1,LOW);
32 | }
33 |
34 | return 0;
35 | }
36 | /*---------------------------------------------------------------------------*/
37 | static void hardware_init()
38 | {
39 | /* init systick and delay system */
40 | systick_init(SYSTICK_1MS);
41 |
42 | /* Init LED pin */
43 | RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
44 | pinMode(B,1,OUTPUT);
45 |
46 | /* init uart and enable xprintf library */
47 | usart1_init(115200);
48 | xdev_out(usart1_sendChar);
49 |
50 | /* small delay for general stabilisation */
51 | _delay_ms(10);
52 | }
53 | /*---------------------------------------------------------------------------*/
54 |
--------------------------------------------------------------------------------