├── image.png ├── README.md ├── LICENSE └── DMA FIRMWARE.md /image.png: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/kilmu1337/DMA-FIRMWARE/HEAD/image.png -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | > [!TIP] 2 | > 3 | > This is a repo in progress, perhaps with incomplete content, but believe me, I am working to fill these gaps. 4 | 5 | Please refer to [DMA FIRMWARE.md](https://github.com/kilmu1337/DMA-FIRMWARE/blob/main/DMA%20FIRMWARE.md) for specific details. 6 | 7 | 8 | If you still have any problems, PM me by Discord：kilmu1337 9 | 10 | Website: [https://kilmu.dev/](https://kilmu.dev/) 11 | 12 | 13 | Discord Channel: https://discord.gg/sXeTPJfpaN 14 | 15 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2024 kilmu1337 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /DMA FIRMWARE.md: -------------------------------------------------------------------------------- 1 | # Background 2 | 3 | In the previous [article](https://github.com/Silverr12/DMA-CFW-Guide/blob/main/Shadow_cfg_space.md), I shared with Silver the method of using shadow cfg space to configure space in a 1:1 ratio. However, many people still ask some questions, such as how to set EXT_CFG_CAP_PTR, what format should be followed in the COE file content, and how to solve the problem of "tiny pcie algo". The following tutorial will explain these details in the steps. 4 | 5 | 6 | 7 | # Requirements 8 | 9 | - [vivado](https://www.xilinx.com/support/download.html) 10 | - [Arbor](https://www.mindshare.com/software/Arbor) or [Telescan](https://www.teledynelecroy.com/protocolanalyzer/pci-express/telescan-pe-software/resources/analysis-software) 11 | - [Pcileech-fpga](https://github.com/ufrisk/pcileech-fpga) 12 | - Some basic code foundations, such as being able to use Python for text format conversion. 13 | 14 | 15 | 16 | # Steps 17 | 18 | #### 1. open vivdado, build Pcileech-fpga 19 | 20 | #### 2. modify the device id and etc.. in the ip core. 21 | 22 | Some people may encounter some problems here. I'll give an example: if you only modify the device id vendor id here, then you need to change EXT_CFG_CAP_PTR to 01 later, so that the bar will become chaotic. So I usually modify it all until the end of bar. 23 | 24 | #### 3.after modifying the device id in the ip core, choose global instead of out of xxx 25 | 26 | #### 4. Remove the is_managed attribute from the IP core and update the EXT_CFG_CAP_PTR and EXT_CFG_XP_CAP_PTR in the pcie_7x_0_core_top.v file. 27 | 28 | > [!NOTE] 29 | > 30 | > Note that there is one thing to pay attention to when changing the value here. 31 | > 32 | > In this parameter, each increment of one digit represents a 64-bit extension of the coe coverage, which corresponds to 4 addresses in the configuration space. Therefore, the parameter 01 represents coverage starting from address 0x04, while the parameter 04 represents coverage starting from address 0x10 (in hexadecimal). 33 | 34 | #### 5. Modify the contents in cfg space.coe. 35 | 36 | Many people make mistakes here because they don't know what the correct format should be converted to. I will provide a corresponding relationship here. 37 | 38 | As for the script for converting formats, if needed, I will provide it in future updates. 39 | 40 | ![img](https://github.com/kilmu1337/DMA-FIRMWARE/blob/main/image.png) 41 | 42 | #### 6.After all are completed, the bitstream can be generated. 43 | 44 | 45 | 46 | 47 | 48 | > [!WARNING] 49 | > 50 | > Some people may encounter errors related to "tiny pcie algo", here I will explain the solution. 51 | > 52 | > First, you need to change the value of Max Payload Size Supported in the corresponding Device Cap in the COE file. I usually modify it to 4kb. Then, in pcie_7x_0_core_top.v, open mps force and change .cfg_force_mps to 4kb. 53 | 54 | 55 | 56 | If there are other questions that are still unclear, please let me know in the issue. 57 | --------------------------------------------------------------------------------