├── README.md ├── s5l8960x.cfg ├── s8000.cfg ├── t7000.tcl ├── t8010.cfg ├── t8015.cfg └── t8020.cfg /README.md: -------------------------------------------------------------------------------- 1 | # Configuration files 2 | 3 | http://docs.bonoboswd.com/targets.html 4 | -------------------------------------------------------------------------------- /s5l8960x.cfg: -------------------------------------------------------------------------------- 1 | interface bonobo 2 | transport select swd 3 | adapter_khz 10000 4 | 5 | reset_config srst_only 6 | 7 | source [find target/swj-dp.tcl] 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME iphone 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | if { [info exists CPUTAPID] } { 22 | set _CPUTAPID $CPUTAPID 23 | } else { 24 | if { [using_jtag] } { 25 | set _CPUTAPID 0x4ba02477 26 | } { 27 | # SWD IDCODE 28 | set _CPUTAPID 0x4ba02477 29 | } 30 | } 31 | swj_newdap $_CHIPNAME cpu -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu 33 | 34 | 35 | # MEM-AP 36 | target create $_CHIPNAME.dbg mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 37 | target create $_CHIPNAME.mem mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 38 | 39 | # CPU0 40 | cti create $_CHIPNAME.cpu0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2020000 41 | target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2010000 -cti $_CHIPNAME.cpu0.cti -coreid 0 42 | # target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2010000 -cti $_CHIPNAME.cpu0.cti -coreid 0 -apple-utt 4 0x202040000 64 43 | 44 | # CPU1 45 | cti create $_CHIPNAME.cpu1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2120000 46 | target create $_CHIPNAME.cpu1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2110000 -cti $_CHIPNAME.cpu1.cti -coreid 1 47 | # target create $_CHIPNAME.cpu1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2110000 -cti $_CHIPNAME.cpu1.cti -coreid 1 -apple-utt 4 0x202140000 64 48 | 49 | # SMP 50 | # target smp $_CHIPNAME.cpu0 $_CHIPNAME.cpu1 51 | 52 | # SEP 53 | target create $_CHIPNAME.sep cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xcd020000 54 | 55 | 56 | init 57 | -------------------------------------------------------------------------------- /s8000.cfg: -------------------------------------------------------------------------------- 1 | interface bonobo 2 | transport select swd 3 | adapter_khz 10000 4 | 5 | reset_config srst_only 6 | 7 | source [find target/swj-dp.tcl] 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME iphone 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | if { [info exists CPUTAPID] } { 22 | set _CPUTAPID $CPUTAPID 23 | } else { 24 | if { [using_jtag] } { 25 | set _CPUTAPID 0x4ba02477 26 | } { 27 | # SWD IDCODE 28 | set _CPUTAPID 0x4ba02477 29 | } 30 | } 31 | swj_newdap $_CHIPNAME cpu -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu 33 | 34 | 35 | # MEM-AP 36 | target create $_CHIPNAME.dbg mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 37 | target create $_CHIPNAME.mem mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 38 | 39 | # CPU0 40 | cti create $_CHIPNAME.cpu0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2020000 41 | target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2010000 -cti $_CHIPNAME.cpu0.cti -coreid 0 -apple-utt 4 0x202040000 64 42 | 43 | # CPU1 44 | cti create $_CHIPNAME.cpu1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2120000 45 | target create $_CHIPNAME.cpu1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2110000 -cti $_CHIPNAME.cpu1.cti -coreid 1 -apple-utt 4 0x202140000 64 46 | 47 | # SMP 48 | target smp $_CHIPNAME.cpu0 $_CHIPNAME.cpu1 49 | 50 | # SEP 51 | target create $_CHIPNAME.sep cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xcda20000 52 | 53 | 54 | init 55 | -------------------------------------------------------------------------------- /t7000.tcl: -------------------------------------------------------------------------------- 1 | interface bonobo 2 | transport select swd 3 | adapter_khz 10000 4 | 5 | reset_config srst_only 6 | 7 | source [find target/swj-dp.tcl] 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME iphone 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | if { [info exists CPUTAPID] } { 22 | set _CPUTAPID $CPUTAPID 23 | } else { 24 | if { [using_jtag] } { 25 | set _CPUTAPID 0x4ba02477 26 | } { 27 | # SWD IDCODE 28 | set _CPUTAPID 0x4ba02477 29 | } 30 | } 31 | swj_newdap $_CHIPNAME cpu -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu 33 | 34 | 35 | # MEM-AP 36 | target create $_CHIPNAME.dbg mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 37 | target create $_CHIPNAME.mem mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 38 | 39 | # CPU0 40 | cti create $_CHIPNAME.cpu0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2020000 41 | target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2010000 -cti $_CHIPNAME.cpu0.cti -coreid 0 -apple-utt 4 0x202040000 64 42 | 43 | # CPU1 44 | cti create $_CHIPNAME.cpu1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2120000 45 | target create $_CHIPNAME.cpu1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2110000 -cti $_CHIPNAME.cpu1.cti -coreid 1 -apple-utt 4 0x202140000 64 46 | 47 | # SMP 48 | target smp $_CHIPNAME.cpu0 $_CHIPNAME.cpu1 49 | 50 | # SEP 51 | target create $_CHIPNAME.sep cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xcda20000 52 | 53 | 54 | init 55 | -------------------------------------------------------------------------------- /t8010.cfg: -------------------------------------------------------------------------------- 1 | interface bonobo 2 | transport select swd 3 | adapter_khz 10000 4 | 5 | reset_config srst_only 6 | 7 | source [find target/swj-dp.tcl] 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME iphone 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | if { [info exists CPUTAPID] } { 22 | set _CPUTAPID $CPUTAPID 23 | } else { 24 | if { [using_jtag] } { 25 | set _CPUTAPID 0x4ba02477 26 | } { 27 | # SWD IDCODE 28 | set _CPUTAPID 0x4ba02477 29 | } 30 | } 31 | swj_newdap $_CHIPNAME cpu -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu 33 | 34 | 35 | # MEM-AP 36 | target create $_CHIPNAME.dbg mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 37 | target create $_CHIPNAME.mem mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 38 | 39 | # CPU0 40 | cti create $_CHIPNAME.cpu0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2020000 41 | target create $_CHIPNAME.cpu0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2010000 -cti $_CHIPNAME.cpu0.cti -coreid 0 -apple-utt 4 0x202040000 64 42 | 43 | # CPU1 44 | cti create $_CHIPNAME.cpu1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc2120000 45 | target create $_CHIPNAME.cpu1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc2110000 -cti $_CHIPNAME.cpu1.cti -coreid 1 -apple-utt 4 0x202140000 64 46 | 47 | # SMP 48 | target smp $_CHIPNAME.cpu0 $_CHIPNAME.cpu1 49 | 50 | # SEP 51 | target create $_CHIPNAME.sep cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xcda20000 52 | 53 | 54 | init 55 | -------------------------------------------------------------------------------- /t8015.cfg: -------------------------------------------------------------------------------- 1 | interface bonobo 2 | transport select swd 3 | adapter_khz 10000 4 | 5 | reset_config srst_only 6 | 7 | source [find target/swj-dp.tcl] 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME iphone 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | if { [info exists CPUTAPID] } { 22 | set _CPUTAPID $CPUTAPID 23 | } else { 24 | if { [using_jtag] } { 25 | set _CPUTAPID 0x4ba02477 26 | } { 27 | # SWD IDCODE 28 | set _CPUTAPID 0x4ba02477 29 | } 30 | } 31 | swj_newdap $_CHIPNAME cpu -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -ignore-syspwrupack 33 | 34 | 35 | # MEM-AP 36 | target create $_CHIPNAME.dbg mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 37 | target create $_CHIPNAME.mem mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 38 | 39 | # ECORE0 40 | cti create $_CHIPNAME.ecore0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc8020000 41 | target create $_CHIPNAME.ecore0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc8010000 -cti $_CHIPNAME.ecore0.cti 42 | 43 | # ECORE1 44 | cti create $_CHIPNAME.ecore1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc8120000 45 | target create $_CHIPNAME.ecore1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc8110000 -cti $_CHIPNAME.ecore1.cti 46 | 47 | # ECORE2 48 | cti create $_CHIPNAME.ecore2.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc8220000 49 | target create $_CHIPNAME.ecore2 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc8210000 -cti $_CHIPNAME.ecore2.cti 50 | 51 | # ECORE3 52 | cti create $_CHIPNAME.ecore3.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc8320000 53 | target create $_CHIPNAME.ecore3 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc8310000 -cti $_CHIPNAME.ecore3.cti 54 | 55 | # PCORE0 56 | cti create $_CHIPNAME.pcore0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc8420000 57 | target create $_CHIPNAME.pcore0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc8410000 -cti $_CHIPNAME.pcore0.cti 58 | 59 | # PCORE1 60 | cti create $_CHIPNAME.pcore1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xc8520000 61 | target create $_CHIPNAME.pcore1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xc8510000 -cti $_CHIPNAME.pcore1.cti 62 | 63 | # SMP 64 | # target smp $_CHIPNAME.ecore0 $_CHIPNAME.ecore1 $_CHIPNAME.ecore2 $_CHIPNAME.ecore3 $_CHIPNAME.pcore0 $_CHIPNAME.pcore1 65 | 66 | # SEP 67 | cti create $_CHIPNAME.sep.cti -dap $_CHIPNAME.dap -ap-num 4 -ctibase 0x242020000 68 | target create $_CHIPNAME.sep aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 -dbgbase 0x242010000 -cti $_CHIPNAME.sep.cti 69 | 70 | 71 | init 72 | -------------------------------------------------------------------------------- /t8020.cfg: -------------------------------------------------------------------------------- 1 | interface bonobo 2 | transport select swd 3 | adapter_khz 10000 4 | 5 | reset_config srst_only 6 | 7 | source [find target/swj-dp.tcl] 8 | 9 | if { [info exists CHIPNAME] } { 10 | set _CHIPNAME $CHIPNAME 11 | } else { 12 | set _CHIPNAME iphone 13 | } 14 | 15 | if { [info exists ENDIAN] } { 16 | set _ENDIAN $ENDIAN 17 | } else { 18 | set _ENDIAN little 19 | } 20 | 21 | if { [info exists CPUTAPID] } { 22 | set _CPUTAPID $CPUTAPID 23 | } else { 24 | if { [using_jtag] } { 25 | set _CPUTAPID 0x4ba02477 26 | } { 27 | # SWD IDCODE 28 | set _CPUTAPID 0x4ba02477 29 | } 30 | } 31 | swj_newdap $_CHIPNAME cpu -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID 32 | dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu -ignore-syspwrupack 33 | 34 | 35 | # MEM-AP 36 | target create $_CHIPNAME.dbg mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 37 | target create $_CHIPNAME.mem mem_ap -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 38 | 39 | # ECORE0 40 | cti create $_CHIPNAME.ecore0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xd0020000 41 | target create $_CHIPNAME.ecore0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xd0010000 -cti $_CHIPNAME.ecore0.cti -apple-utt 4 0x210040000 64 42 | 43 | # ECORE1 44 | cti create $_CHIPNAME.ecore1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xd0120000 45 | target create $_CHIPNAME.ecore1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xd0110000 -cti $_CHIPNAME.ecore1.cti -apple-utt 4 0x210140000 64 46 | 47 | # ECORE2 48 | cti create $_CHIPNAME.ecore2.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xd0220000 49 | target create $_CHIPNAME.ecore2 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xd0210000 -cti $_CHIPNAME.ecore2.cti -apple-utt 4 0x210240000 64 50 | 51 | # ECORE3 52 | cti create $_CHIPNAME.ecore3.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xd0320000 53 | target create $_CHIPNAME.ecore3 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xd0310000 -cti $_CHIPNAME.ecore3.cti -apple-utt 4 0x210340000 64 54 | 55 | # PCORE0 56 | cti create $_CHIPNAME.pcore0.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xd1020000 57 | target create $_CHIPNAME.pcore0 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xd1010000 -cti $_CHIPNAME.pcore0.cti -apple-utt 4 0x211040000 64 58 | 59 | # PCORE1 60 | cti create $_CHIPNAME.pcore1.cti -dap $_CHIPNAME.dap -ap-num 1 -ctibase 0xd1120000 61 | target create $_CHIPNAME.pcore1 aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 1 -dbgbase 0xd1110000 -cti $_CHIPNAME.pcore1.cti -apple-utt 4 0x211140000 64 62 | 63 | # SMP 64 | # target smp $_CHIPNAME.ecore0 $_CHIPNAME.ecore1 $_CHIPNAME.ecore2 $_CHIPNAME.ecore3 $_CHIPNAME.pcore0 $_CHIPNAME.pcore1 65 | 66 | # SEP 67 | cti create $_CHIPNAME.sep.cti -dap $_CHIPNAME.dap -ap-num 4 -ctibase 0x0242020000 68 | target create $_CHIPNAME.sep aarch64 -endian $_ENDIAN -dap $_CHIPNAME.dap -ap-num 4 -dbgbase 0x0242010000 -cti $_CHIPNAME.sep.cti 69 | 70 | 71 | init 72 | --------------------------------------------------------------------------------