├── .cproject
├── .gitignore
├── .mxproject
├── .project
├── .settings
└── language.settings.xml
├── Drivers
├── CMSIS
│ ├── Device
│ │ └── ST
│ │ │ └── STM32F4xx
│ │ │ └── Include
│ │ │ ├── stm32f410rx.h
│ │ │ ├── stm32f4xx.h
│ │ │ └── system_stm32f4xx.h
│ └── Include
│ │ ├── cmsis_armcc.h
│ │ ├── cmsis_armclang.h
│ │ ├── cmsis_compiler.h
│ │ ├── cmsis_gcc.h
│ │ ├── cmsis_iccarm.h
│ │ ├── cmsis_version.h
│ │ ├── core_armv8mbl.h
│ │ ├── core_armv8mml.h
│ │ ├── core_cm0.h
│ │ ├── core_cm0plus.h
│ │ ├── core_cm1.h
│ │ ├── core_cm23.h
│ │ ├── core_cm3.h
│ │ ├── core_cm33.h
│ │ ├── core_cm4.h
│ │ ├── core_cm7.h
│ │ ├── core_sc000.h
│ │ ├── core_sc300.h
│ │ ├── mpu_armv7.h
│ │ ├── mpu_armv8.h
│ │ └── tz_context.h
└── STM32F4xx_HAL_Driver
│ ├── Inc
│ ├── Legacy
│ │ └── stm32_hal_legacy.h
│ ├── stm32f4xx_hal.h
│ ├── stm32f4xx_hal_cortex.h
│ ├── stm32f4xx_hal_def.h
│ ├── stm32f4xx_hal_dma.h
│ ├── stm32f4xx_hal_dma_ex.h
│ ├── stm32f4xx_hal_exti.h
│ ├── stm32f4xx_hal_flash.h
│ ├── stm32f4xx_hal_flash_ex.h
│ ├── stm32f4xx_hal_flash_ramfunc.h
│ ├── stm32f4xx_hal_gpio.h
│ ├── stm32f4xx_hal_gpio_ex.h
│ ├── stm32f4xx_hal_i2c.h
│ ├── stm32f4xx_hal_i2c_ex.h
│ ├── stm32f4xx_hal_pwr.h
│ ├── stm32f4xx_hal_pwr_ex.h
│ ├── stm32f4xx_hal_rcc.h
│ ├── stm32f4xx_hal_rcc_ex.h
│ ├── stm32f4xx_hal_tim.h
│ ├── stm32f4xx_hal_tim_ex.h
│ └── stm32f4xx_hal_uart.h
│ └── Src
│ ├── stm32f4xx_hal.c
│ ├── stm32f4xx_hal_cortex.c
│ ├── stm32f4xx_hal_dma.c
│ ├── stm32f4xx_hal_dma_ex.c
│ ├── stm32f4xx_hal_exti.c
│ ├── stm32f4xx_hal_flash.c
│ ├── stm32f4xx_hal_flash_ex.c
│ ├── stm32f4xx_hal_flash_ramfunc.c
│ ├── stm32f4xx_hal_gpio.c
│ ├── stm32f4xx_hal_i2c.c
│ ├── stm32f4xx_hal_i2c_ex.c
│ ├── stm32f4xx_hal_pwr.c
│ ├── stm32f4xx_hal_pwr_ex.c
│ ├── stm32f4xx_hal_rcc.c
│ ├── stm32f4xx_hal_rcc_ex.c
│ ├── stm32f4xx_hal_tim.c
│ ├── stm32f4xx_hal_tim_ex.c
│ └── stm32f4xx_hal_uart.c
├── Inc
├── PCF8563.h
├── dma.h
├── gpio.h
├── i2c.h
├── main.h
├── stm32f4xx_hal_conf.h
├── stm32f4xx_it.h
└── usart.h
├── LICENSE
├── PCF8563.elf.launch
├── PCF8563.ioc
├── README.md
├── STM32F410RBTX_FLASH.ld
├── Src
├── PCF8563.c
├── dma.c
├── gpio.c
├── i2c.c
├── main.c
├── stm32f4xx_hal_msp.c
├── stm32f4xx_it.c
├── syscalls.c
├── sysmem.c
├── system_stm32f4xx.c
└── usart.c
└── Startup
└── startup_stm32f410rbtx.s
/.gitignore:
--------------------------------------------------------------------------------
1 | /Debug/
2 | */Backup/
--------------------------------------------------------------------------------
/.mxproject:
--------------------------------------------------------------------------------
1 | [PreviousGenFiles]
2 | HeaderPath=D:/GoogleDrive/Blog msalamon.pl/Materialy do wpisow/25. DS1307 i PCF8563/Kod/PCF8563/Inc
3 | HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;gpio.h;i2c.h;usart.h;dma.h;
4 | SourcePath=D:/GoogleDrive/Blog msalamon.pl/Materialy do wpisow/25. DS1307 i PCF8563/Kod/PCF8563/Src
5 | SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;gpio.c;i2c.c;usart.c;dma.c;
6 |
7 | [PreviousLibFiles]
8 | LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410rx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
9 |
10 | [PreviousUsedCubeIDEFiles]
11 | SourceFiles=Src\main.c;Src\gpio.c;Src\dma.c;Src\i2c.c;Src\usart.c;Src\stm32f4xx_it.c;Src\stm32f4xx_hal_msp.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Src/system_stm32f4xx.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Src/system_stm32f4xx.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null;
12 | HeaderPath=Drivers\STM32F4xx_HAL_Driver\Inc;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F4xx\Include;Drivers\CMSIS\Include;Inc;
13 | CDefines=USE_HAL_DRIVER;STM32F410Rx;USE_HAL_DRIVER;STM32F410Rx;
14 |
15 |
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/.project:
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1 |
2 |
3 | PCF8563
4 |
5 |
6 |
7 |
8 |
9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder
10 | clean,full,incremental,
11 |
12 |
13 |
14 |
15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
16 | full,incremental,
17 |
18 |
19 |
20 |
21 |
22 | com.st.stm32cube.ide.mcu.MCUProjectNature
23 | com.st.stm32cube.ide.mcu.MCUCubeProjectNature
24 | org.eclipse.cdt.core.cnature
25 | com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAProjectNature
26 | com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature
27 | org.eclipse.cdt.managedbuilder.core.managedBuildNature
28 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
29 |
30 |
31 |
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/.settings/language.settings.xml:
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9 |
10 |
11 |
12 |
13 |
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15 |
16 |
17 |
18 |
19 |
20 |
21 |
22 |
23 |
24 |
25 |
26 |
27 |
28 |
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/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
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https://raw.githubusercontent.com/lamik/PCF8563_RTC_STM32_HAL/080210b96e8daccd5b70d4876ead9f8392e61acf/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h
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/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
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1 | /**
2 | ******************************************************************************
3 | * @file system_stm32f4xx.h
4 | * @author MCD Application Team
5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © COPYRIGHT(c) 2017 STMicroelectronics
10 | *
11 | * Redistribution and use in source and binary forms, with or without modification,
12 | * are permitted provided that the following conditions are met:
13 | * 1. Redistributions of source code must retain the above copyright notice,
14 | * this list of conditions and the following disclaimer.
15 | * 2. Redistributions in binary form must reproduce the above copyright notice,
16 | * this list of conditions and the following disclaimer in the documentation
17 | * and/or other materials provided with the distribution.
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 | * may be used to endorse or promote products derived from this software
20 | * without specific prior written permission.
21 | *
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 | *
33 | ******************************************************************************
34 | */
35 |
36 | /** @addtogroup CMSIS
37 | * @{
38 | */
39 |
40 | /** @addtogroup stm32f4xx_system
41 | * @{
42 | */
43 |
44 | /**
45 | * @brief Define to prevent recursive inclusion
46 | */
47 | #ifndef __SYSTEM_STM32F4XX_H
48 | #define __SYSTEM_STM32F4XX_H
49 |
50 | #ifdef __cplusplus
51 | extern "C" {
52 | #endif
53 |
54 | /** @addtogroup STM32F4xx_System_Includes
55 | * @{
56 | */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 |
63 | /** @addtogroup STM32F4xx_System_Exported_types
64 | * @{
65 | */
66 | /* This variable is updated in three ways:
67 | 1) by calling CMSIS function SystemCoreClockUpdate()
68 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq()
69 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
70 | Note: If you use this function to configure the system clock; then there
71 | is no need to call the 2 first functions listed above, since SystemCoreClock
72 | variable is updated automatically.
73 | */
74 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
75 |
76 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
77 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
78 |
79 | /**
80 | * @}
81 | */
82 |
83 | /** @addtogroup STM32F4xx_System_Exported_Constants
84 | * @{
85 | */
86 |
87 | /**
88 | * @}
89 | */
90 |
91 | /** @addtogroup STM32F4xx_System_Exported_Macros
92 | * @{
93 | */
94 |
95 | /**
96 | * @}
97 | */
98 |
99 | /** @addtogroup STM32F4xx_System_Exported_Functions
100 | * @{
101 | */
102 |
103 | extern void SystemInit(void);
104 | extern void SystemCoreClockUpdate(void);
105 | /**
106 | * @}
107 | */
108 |
109 | #ifdef __cplusplus
110 | }
111 | #endif
112 |
113 | #endif /*__SYSTEM_STM32F4XX_H */
114 |
115 | /**
116 | * @}
117 | */
118 |
119 | /**
120 | * @}
121 | */
122 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
123 |
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/Drivers/CMSIS/Include/cmsis_compiler.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file cmsis_compiler.h
3 | * @brief CMSIS compiler generic header file
4 | * @version V5.0.4
5 | * @date 10. January 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #ifndef __CMSIS_COMPILER_H
26 | #define __CMSIS_COMPILER_H
27 |
28 | #include
29 |
30 | /*
31 | * Arm Compiler 4/5
32 | */
33 | #if defined ( __CC_ARM )
34 | #include "cmsis_armcc.h"
35 |
36 |
37 | /*
38 | * Arm Compiler 6 (armclang)
39 | */
40 | #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
41 | #include "cmsis_armclang.h"
42 |
43 |
44 | /*
45 | * GNU Compiler
46 | */
47 | #elif defined ( __GNUC__ )
48 | #include "cmsis_gcc.h"
49 |
50 |
51 | /*
52 | * IAR Compiler
53 | */
54 | #elif defined ( __ICCARM__ )
55 | #include
56 |
57 |
58 | /*
59 | * TI Arm Compiler
60 | */
61 | #elif defined ( __TI_ARM__ )
62 | #include
63 |
64 | #ifndef __ASM
65 | #define __ASM __asm
66 | #endif
67 | #ifndef __INLINE
68 | #define __INLINE inline
69 | #endif
70 | #ifndef __STATIC_INLINE
71 | #define __STATIC_INLINE static inline
72 | #endif
73 | #ifndef __STATIC_FORCEINLINE
74 | #define __STATIC_FORCEINLINE __STATIC_INLINE
75 | #endif
76 | #ifndef __NO_RETURN
77 | #define __NO_RETURN __attribute__((noreturn))
78 | #endif
79 | #ifndef __USED
80 | #define __USED __attribute__((used))
81 | #endif
82 | #ifndef __WEAK
83 | #define __WEAK __attribute__((weak))
84 | #endif
85 | #ifndef __PACKED
86 | #define __PACKED __attribute__((packed))
87 | #endif
88 | #ifndef __PACKED_STRUCT
89 | #define __PACKED_STRUCT struct __attribute__((packed))
90 | #endif
91 | #ifndef __PACKED_UNION
92 | #define __PACKED_UNION union __attribute__((packed))
93 | #endif
94 | #ifndef __UNALIGNED_UINT32 /* deprecated */
95 | struct __attribute__((packed)) T_UINT32 { uint32_t v; };
96 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
97 | #endif
98 | #ifndef __UNALIGNED_UINT16_WRITE
99 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
100 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
101 | #endif
102 | #ifndef __UNALIGNED_UINT16_READ
103 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
104 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
105 | #endif
106 | #ifndef __UNALIGNED_UINT32_WRITE
107 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
108 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
109 | #endif
110 | #ifndef __UNALIGNED_UINT32_READ
111 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
112 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
113 | #endif
114 | #ifndef __ALIGNED
115 | #define __ALIGNED(x) __attribute__((aligned(x)))
116 | #endif
117 | #ifndef __RESTRICT
118 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
119 | #define __RESTRICT
120 | #endif
121 |
122 |
123 | /*
124 | * TASKING Compiler
125 | */
126 | #elif defined ( __TASKING__ )
127 | /*
128 | * The CMSIS functions have been implemented as intrinsics in the compiler.
129 | * Please use "carm -?i" to get an up to date list of all intrinsics,
130 | * Including the CMSIS ones.
131 | */
132 |
133 | #ifndef __ASM
134 | #define __ASM __asm
135 | #endif
136 | #ifndef __INLINE
137 | #define __INLINE inline
138 | #endif
139 | #ifndef __STATIC_INLINE
140 | #define __STATIC_INLINE static inline
141 | #endif
142 | #ifndef __STATIC_FORCEINLINE
143 | #define __STATIC_FORCEINLINE __STATIC_INLINE
144 | #endif
145 | #ifndef __NO_RETURN
146 | #define __NO_RETURN __attribute__((noreturn))
147 | #endif
148 | #ifndef __USED
149 | #define __USED __attribute__((used))
150 | #endif
151 | #ifndef __WEAK
152 | #define __WEAK __attribute__((weak))
153 | #endif
154 | #ifndef __PACKED
155 | #define __PACKED __packed__
156 | #endif
157 | #ifndef __PACKED_STRUCT
158 | #define __PACKED_STRUCT struct __packed__
159 | #endif
160 | #ifndef __PACKED_UNION
161 | #define __PACKED_UNION union __packed__
162 | #endif
163 | #ifndef __UNALIGNED_UINT32 /* deprecated */
164 | struct __packed__ T_UINT32 { uint32_t v; };
165 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
166 | #endif
167 | #ifndef __UNALIGNED_UINT16_WRITE
168 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
169 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
170 | #endif
171 | #ifndef __UNALIGNED_UINT16_READ
172 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
173 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
174 | #endif
175 | #ifndef __UNALIGNED_UINT32_WRITE
176 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
177 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
178 | #endif
179 | #ifndef __UNALIGNED_UINT32_READ
180 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
181 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
182 | #endif
183 | #ifndef __ALIGNED
184 | #define __ALIGNED(x) __align(x)
185 | #endif
186 | #ifndef __RESTRICT
187 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
188 | #define __RESTRICT
189 | #endif
190 |
191 |
192 | /*
193 | * COSMIC Compiler
194 | */
195 | #elif defined ( __CSMC__ )
196 | #include
197 |
198 | #ifndef __ASM
199 | #define __ASM _asm
200 | #endif
201 | #ifndef __INLINE
202 | #define __INLINE inline
203 | #endif
204 | #ifndef __STATIC_INLINE
205 | #define __STATIC_INLINE static inline
206 | #endif
207 | #ifndef __STATIC_FORCEINLINE
208 | #define __STATIC_FORCEINLINE __STATIC_INLINE
209 | #endif
210 | #ifndef __NO_RETURN
211 | // NO RETURN is automatically detected hence no warning here
212 | #define __NO_RETURN
213 | #endif
214 | #ifndef __USED
215 | #warning No compiler specific solution for __USED. __USED is ignored.
216 | #define __USED
217 | #endif
218 | #ifndef __WEAK
219 | #define __WEAK __weak
220 | #endif
221 | #ifndef __PACKED
222 | #define __PACKED @packed
223 | #endif
224 | #ifndef __PACKED_STRUCT
225 | #define __PACKED_STRUCT @packed struct
226 | #endif
227 | #ifndef __PACKED_UNION
228 | #define __PACKED_UNION @packed union
229 | #endif
230 | #ifndef __UNALIGNED_UINT32 /* deprecated */
231 | @packed struct T_UINT32 { uint32_t v; };
232 | #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
233 | #endif
234 | #ifndef __UNALIGNED_UINT16_WRITE
235 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
236 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
237 | #endif
238 | #ifndef __UNALIGNED_UINT16_READ
239 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
240 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
241 | #endif
242 | #ifndef __UNALIGNED_UINT32_WRITE
243 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
244 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
245 | #endif
246 | #ifndef __UNALIGNED_UINT32_READ
247 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
248 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
249 | #endif
250 | #ifndef __ALIGNED
251 | #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
252 | #define __ALIGNED(x)
253 | #endif
254 | #ifndef __RESTRICT
255 | #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
256 | #define __RESTRICT
257 | #endif
258 |
259 |
260 | #else
261 | #error Unknown compiler.
262 | #endif
263 |
264 |
265 | #endif /* __CMSIS_COMPILER_H */
266 |
267 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/cmsis_version.h:
--------------------------------------------------------------------------------
1 | /**************************************************************************//**
2 | * @file cmsis_version.h
3 | * @brief CMSIS Core(M) Version definitions
4 | * @version V5.0.2
5 | * @date 19. April 2017
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef __CMSIS_VERSION_H
32 | #define __CMSIS_VERSION_H
33 |
34 | /* CMSIS Version definitions */
35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
36 | #define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
39 | #endif
40 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/mpu_armv7.h:
--------------------------------------------------------------------------------
1 | /******************************************************************************
2 | * @file mpu_armv7.h
3 | * @brief CMSIS MPU API for Armv7-M MPU
4 | * @version V5.0.4
5 | * @date 10. January 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef ARM_MPU_ARMV7_H
32 | #define ARM_MPU_ARMV7_H
33 |
34 | #define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
35 | #define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
36 | #define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
37 | #define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
38 | #define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
39 | #define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
40 | #define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
41 | #define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
42 | #define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
43 | #define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
44 | #define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
45 | #define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
46 | #define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
47 | #define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
48 | #define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
49 | #define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
50 | #define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
51 | #define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
52 | #define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
53 | #define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
54 | #define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
55 | #define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
56 | #define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
57 | #define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
58 | #define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
59 | #define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
60 | #define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
61 | #define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
62 |
63 | #define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
64 | #define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
65 | #define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
66 | #define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
67 | #define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
68 | #define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
69 |
70 | /** MPU Region Base Address Register Value
71 | *
72 | * \param Region The region to be configured, number 0 to 15.
73 | * \param BaseAddress The base address for the region.
74 | */
75 | #define ARM_MPU_RBAR(Region, BaseAddress) \
76 | (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
77 | ((Region) & MPU_RBAR_REGION_Msk) | \
78 | (MPU_RBAR_VALID_Msk))
79 |
80 | /**
81 | * MPU Memory Access Attributes
82 | *
83 | * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
84 | * \param IsShareable Region is shareable between multiple bus masters.
85 | * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
86 | * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
87 | */
88 | #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
89 | ((((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
90 | (((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
91 | (((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
92 | (((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
93 |
94 | /**
95 | * MPU Region Attribute and Size Register Value
96 | *
97 | * \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
98 | * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
99 | * \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
100 | * \param SubRegionDisable Sub-region disable field.
101 | * \param Size Region size of the region to be configured, for example 4K, 8K.
102 | */
103 | #define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
104 | ((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
105 | (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
106 | (((AccessAttributes) ) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk)))
107 |
108 | /**
109 | * MPU Region Attribute and Size Register Value
110 | *
111 | * \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
112 | * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
113 | * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
114 | * \param IsShareable Region is shareable between multiple bus masters.
115 | * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
116 | * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
117 | * \param SubRegionDisable Sub-region disable field.
118 | * \param Size Region size of the region to be configured, for example 4K, 8K.
119 | */
120 | #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
121 | ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
122 |
123 | /**
124 | * MPU Memory Access Attribute for strongly ordered memory.
125 | * - TEX: 000b
126 | * - Shareable
127 | * - Non-cacheable
128 | * - Non-bufferable
129 | */
130 | #define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
131 |
132 | /**
133 | * MPU Memory Access Attribute for device memory.
134 | * - TEX: 000b (if non-shareable) or 010b (if shareable)
135 | * - Shareable or non-shareable
136 | * - Non-cacheable
137 | * - Bufferable (if shareable) or non-bufferable (if non-shareable)
138 | *
139 | * \param IsShareable Configures the device memory as shareable or non-shareable.
140 | */
141 | #define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
142 |
143 | /**
144 | * MPU Memory Access Attribute for normal memory.
145 | * - TEX: 1BBb (reflecting outer cacheability rules)
146 | * - Shareable or non-shareable
147 | * - Cacheable or non-cacheable (reflecting inner cacheability rules)
148 | * - Bufferable or non-bufferable (reflecting inner cacheability rules)
149 | *
150 | * \param OuterCp Configures the outer cache policy.
151 | * \param InnerCp Configures the inner cache policy.
152 | * \param IsShareable Configures the memory as shareable or non-shareable.
153 | */
154 | #define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
155 |
156 | /**
157 | * MPU Memory Access Attribute non-cacheable policy.
158 | */
159 | #define ARM_MPU_CACHEP_NOCACHE 0U
160 |
161 | /**
162 | * MPU Memory Access Attribute write-back, write and read allocate policy.
163 | */
164 | #define ARM_MPU_CACHEP_WB_WRA 1U
165 |
166 | /**
167 | * MPU Memory Access Attribute write-through, no write allocate policy.
168 | */
169 | #define ARM_MPU_CACHEP_WT_NWA 2U
170 |
171 | /**
172 | * MPU Memory Access Attribute write-back, no write allocate policy.
173 | */
174 | #define ARM_MPU_CACHEP_WB_NWA 3U
175 |
176 |
177 | /**
178 | * Struct for a single MPU Region
179 | */
180 | typedef struct {
181 | uint32_t RBAR; //!< The region base address register value (RBAR)
182 | uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
183 | } ARM_MPU_Region_t;
184 |
185 | /** Enable the MPU.
186 | * \param MPU_Control Default access permissions for unconfigured regions.
187 | */
188 | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
189 | {
190 | __DSB();
191 | __ISB();
192 | MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
193 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk
194 | SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
195 | #endif
196 | }
197 |
198 | /** Disable the MPU.
199 | */
200 | __STATIC_INLINE void ARM_MPU_Disable(void)
201 | {
202 | __DSB();
203 | __ISB();
204 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk
205 | SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
206 | #endif
207 | MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
208 | }
209 |
210 | /** Clear and disable the given MPU region.
211 | * \param rnr Region number to be cleared.
212 | */
213 | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
214 | {
215 | MPU->RNR = rnr;
216 | MPU->RASR = 0U;
217 | }
218 |
219 | /** Configure an MPU region.
220 | * \param rbar Value for RBAR register.
221 | * \param rsar Value for RSAR register.
222 | */
223 | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
224 | {
225 | MPU->RBAR = rbar;
226 | MPU->RASR = rasr;
227 | }
228 |
229 | /** Configure the given MPU region.
230 | * \param rnr Region number to be configured.
231 | * \param rbar Value for RBAR register.
232 | * \param rsar Value for RSAR register.
233 | */
234 | __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
235 | {
236 | MPU->RNR = rnr;
237 | MPU->RBAR = rbar;
238 | MPU->RASR = rasr;
239 | }
240 |
241 | /** Memcopy with strictly ordered memory access, e.g. for register targets.
242 | * \param dst Destination data is copied to.
243 | * \param src Source data is copied from.
244 | * \param len Amount of data words to be copied.
245 | */
246 | __STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
247 | {
248 | uint32_t i;
249 | for (i = 0U; i < len; ++i)
250 | {
251 | dst[i] = src[i];
252 | }
253 | }
254 |
255 | /** Load the given number of MPU regions from a table.
256 | * \param table Pointer to the MPU configuration table.
257 | * \param cnt Amount of regions to be configured.
258 | */
259 | __STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
260 | {
261 | const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
262 | while (cnt > MPU_TYPE_RALIASES) {
263 | orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
264 | table += MPU_TYPE_RALIASES;
265 | cnt -= MPU_TYPE_RALIASES;
266 | }
267 | orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
268 | }
269 |
270 | #endif
271 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/mpu_armv8.h:
--------------------------------------------------------------------------------
1 | /******************************************************************************
2 | * @file mpu_armv8.h
3 | * @brief CMSIS MPU API for Armv8-M MPU
4 | * @version V5.0.4
5 | * @date 10. January 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef ARM_MPU_ARMV8_H
32 | #define ARM_MPU_ARMV8_H
33 |
34 | /** \brief Attribute for device memory (outer only) */
35 | #define ARM_MPU_ATTR_DEVICE ( 0U )
36 |
37 | /** \brief Attribute for non-cacheable, normal memory */
38 | #define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
39 |
40 | /** \brief Attribute for normal memory (outer and inner)
41 | * \param NT Non-Transient: Set to 1 for non-transient data.
42 | * \param WB Write-Back: Set to 1 to use write-back update policy.
43 | * \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
44 | * \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
45 | */
46 | #define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
47 | (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
48 |
49 | /** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
50 | #define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
51 |
52 | /** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
53 | #define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
54 |
55 | /** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
56 | #define ARM_MPU_ATTR_DEVICE_nGRE (2U)
57 |
58 | /** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
59 | #define ARM_MPU_ATTR_DEVICE_GRE (3U)
60 |
61 | /** \brief Memory Attribute
62 | * \param O Outer memory attributes
63 | * \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
64 | */
65 | #define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
66 |
67 | /** \brief Normal memory non-shareable */
68 | #define ARM_MPU_SH_NON (0U)
69 |
70 | /** \brief Normal memory outer shareable */
71 | #define ARM_MPU_SH_OUTER (2U)
72 |
73 | /** \brief Normal memory inner shareable */
74 | #define ARM_MPU_SH_INNER (3U)
75 |
76 | /** \brief Memory access permissions
77 | * \param RO Read-Only: Set to 1 for read-only memory.
78 | * \param NP Non-Privileged: Set to 1 for non-privileged memory.
79 | */
80 | #define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
81 |
82 | /** \brief Region Base Address Register value
83 | * \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
84 | * \param SH Defines the Shareability domain for this memory region.
85 | * \param RO Read-Only: Set to 1 for a read-only memory region.
86 | * \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
87 | * \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
88 | */
89 | #define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
90 | ((BASE & MPU_RBAR_BASE_Msk) | \
91 | ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
92 | ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
93 | ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
94 |
95 | /** \brief Region Limit Address Register value
96 | * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
97 | * \param IDX The attribute index to be associated with this memory region.
98 | */
99 | #define ARM_MPU_RLAR(LIMIT, IDX) \
100 | ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
101 | ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
102 | (MPU_RLAR_EN_Msk))
103 |
104 | /**
105 | * Struct for a single MPU Region
106 | */
107 | typedef struct {
108 | uint32_t RBAR; /*!< Region Base Address Register value */
109 | uint32_t RLAR; /*!< Region Limit Address Register value */
110 | } ARM_MPU_Region_t;
111 |
112 | /** Enable the MPU.
113 | * \param MPU_Control Default access permissions for unconfigured regions.
114 | */
115 | __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
116 | {
117 | __DSB();
118 | __ISB();
119 | MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
120 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk
121 | SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
122 | #endif
123 | }
124 |
125 | /** Disable the MPU.
126 | */
127 | __STATIC_INLINE void ARM_MPU_Disable(void)
128 | {
129 | __DSB();
130 | __ISB();
131 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk
132 | SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
133 | #endif
134 | MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
135 | }
136 |
137 | #ifdef MPU_NS
138 | /** Enable the Non-secure MPU.
139 | * \param MPU_Control Default access permissions for unconfigured regions.
140 | */
141 | __STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
142 | {
143 | __DSB();
144 | __ISB();
145 | MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
146 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk
147 | SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
148 | #endif
149 | }
150 |
151 | /** Disable the Non-secure MPU.
152 | */
153 | __STATIC_INLINE void ARM_MPU_Disable_NS(void)
154 | {
155 | __DSB();
156 | __ISB();
157 | #ifdef SCB_SHCSR_MEMFAULTENA_Msk
158 | SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
159 | #endif
160 | MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
161 | }
162 | #endif
163 |
164 | /** Set the memory attribute encoding to the given MPU.
165 | * \param mpu Pointer to the MPU to be configured.
166 | * \param idx The attribute index to be set [0-7]
167 | * \param attr The attribute value to be set.
168 | */
169 | __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
170 | {
171 | const uint8_t reg = idx / 4U;
172 | const uint32_t pos = ((idx % 4U) * 8U);
173 | const uint32_t mask = 0xFFU << pos;
174 |
175 | if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
176 | return; // invalid index
177 | }
178 |
179 | mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
180 | }
181 |
182 | /** Set the memory attribute encoding.
183 | * \param idx The attribute index to be set [0-7]
184 | * \param attr The attribute value to be set.
185 | */
186 | __STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
187 | {
188 | ARM_MPU_SetMemAttrEx(MPU, idx, attr);
189 | }
190 |
191 | #ifdef MPU_NS
192 | /** Set the memory attribute encoding to the Non-secure MPU.
193 | * \param idx The attribute index to be set [0-7]
194 | * \param attr The attribute value to be set.
195 | */
196 | __STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
197 | {
198 | ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
199 | }
200 | #endif
201 |
202 | /** Clear and disable the given MPU region of the given MPU.
203 | * \param mpu Pointer to MPU to be used.
204 | * \param rnr Region number to be cleared.
205 | */
206 | __STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
207 | {
208 | mpu->RNR = rnr;
209 | mpu->RLAR = 0U;
210 | }
211 |
212 | /** Clear and disable the given MPU region.
213 | * \param rnr Region number to be cleared.
214 | */
215 | __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
216 | {
217 | ARM_MPU_ClrRegionEx(MPU, rnr);
218 | }
219 |
220 | #ifdef MPU_NS
221 | /** Clear and disable the given Non-secure MPU region.
222 | * \param rnr Region number to be cleared.
223 | */
224 | __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
225 | {
226 | ARM_MPU_ClrRegionEx(MPU_NS, rnr);
227 | }
228 | #endif
229 |
230 | /** Configure the given MPU region of the given MPU.
231 | * \param mpu Pointer to MPU to be used.
232 | * \param rnr Region number to be configured.
233 | * \param rbar Value for RBAR register.
234 | * \param rlar Value for RLAR register.
235 | */
236 | __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
237 | {
238 | mpu->RNR = rnr;
239 | mpu->RBAR = rbar;
240 | mpu->RLAR = rlar;
241 | }
242 |
243 | /** Configure the given MPU region.
244 | * \param rnr Region number to be configured.
245 | * \param rbar Value for RBAR register.
246 | * \param rlar Value for RLAR register.
247 | */
248 | __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
249 | {
250 | ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
251 | }
252 |
253 | #ifdef MPU_NS
254 | /** Configure the given Non-secure MPU region.
255 | * \param rnr Region number to be configured.
256 | * \param rbar Value for RBAR register.
257 | * \param rlar Value for RLAR register.
258 | */
259 | __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
260 | {
261 | ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
262 | }
263 | #endif
264 |
265 | /** Memcopy with strictly ordered memory access, e.g. for register targets.
266 | * \param dst Destination data is copied to.
267 | * \param src Source data is copied from.
268 | * \param len Amount of data words to be copied.
269 | */
270 | __STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
271 | {
272 | uint32_t i;
273 | for (i = 0U; i < len; ++i)
274 | {
275 | dst[i] = src[i];
276 | }
277 | }
278 |
279 | /** Load the given number of MPU regions from a table to the given MPU.
280 | * \param mpu Pointer to the MPU registers to be used.
281 | * \param rnr First region number to be configured.
282 | * \param table Pointer to the MPU configuration table.
283 | * \param cnt Amount of regions to be configured.
284 | */
285 | __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
286 | {
287 | const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
288 | if (cnt == 1U) {
289 | mpu->RNR = rnr;
290 | orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
291 | } else {
292 | uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
293 | uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
294 |
295 | mpu->RNR = rnrBase;
296 | while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
297 | uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
298 | orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
299 | table += c;
300 | cnt -= c;
301 | rnrOffset = 0U;
302 | rnrBase += MPU_TYPE_RALIASES;
303 | mpu->RNR = rnrBase;
304 | }
305 |
306 | orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
307 | }
308 | }
309 |
310 | /** Load the given number of MPU regions from a table.
311 | * \param rnr First region number to be configured.
312 | * \param table Pointer to the MPU configuration table.
313 | * \param cnt Amount of regions to be configured.
314 | */
315 | __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
316 | {
317 | ARM_MPU_LoadEx(MPU, rnr, table, cnt);
318 | }
319 |
320 | #ifdef MPU_NS
321 | /** Load the given number of MPU regions from a table to the Non-secure MPU.
322 | * \param rnr First region number to be configured.
323 | * \param table Pointer to the MPU configuration table.
324 | * \param cnt Amount of regions to be configured.
325 | */
326 | __STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
327 | {
328 | ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
329 | }
330 | #endif
331 |
332 | #endif
333 |
334 |
--------------------------------------------------------------------------------
/Drivers/CMSIS/Include/tz_context.h:
--------------------------------------------------------------------------------
1 | /******************************************************************************
2 | * @file tz_context.h
3 | * @brief Context Management for Armv8-M TrustZone
4 | * @version V1.0.1
5 | * @date 10. January 2018
6 | ******************************************************************************/
7 | /*
8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
9 | *
10 | * SPDX-License-Identifier: Apache-2.0
11 | *
12 | * Licensed under the Apache License, Version 2.0 (the License); you may
13 | * not use this file except in compliance with the License.
14 | * You may obtain a copy of the License at
15 | *
16 | * www.apache.org/licenses/LICENSE-2.0
17 | *
18 | * Unless required by applicable law or agreed to in writing, software
19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 | * See the License for the specific language governing permissions and
22 | * limitations under the License.
23 | */
24 |
25 | #if defined ( __ICCARM__ )
26 | #pragma system_include /* treat file as system include file for MISRA check */
27 | #elif defined (__clang__)
28 | #pragma clang system_header /* treat file as system include file */
29 | #endif
30 |
31 | #ifndef TZ_CONTEXT_H
32 | #define TZ_CONTEXT_H
33 |
34 | #include
35 |
36 | #ifndef TZ_MODULEID_T
37 | #define TZ_MODULEID_T
38 | /// \details Data type that identifies secure software modules called by a process.
39 | typedef uint32_t TZ_ModuleId_t;
40 | #endif
41 |
42 | /// \details TZ Memory ID identifies an allocated memory slot.
43 | typedef uint32_t TZ_MemoryId_t;
44 |
45 | /// Initialize secure context memory system
46 | /// \return execution status (1: success, 0: error)
47 | uint32_t TZ_InitContextSystem_S (void);
48 |
49 | /// Allocate context memory for calling secure software modules in TrustZone
50 | /// \param[in] module identifies software modules called from non-secure mode
51 | /// \return value != 0 id TrustZone memory slot identifier
52 | /// \return value 0 no memory available or internal error
53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
54 |
55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
56 | /// \param[in] id TrustZone memory slot identifier
57 | /// \return execution status (1: success, 0: error)
58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
59 |
60 | /// Load secure context (called on RTOS thread context switch)
61 | /// \param[in] id TrustZone memory slot identifier
62 | /// \return execution status (1: success, 0: error)
63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
64 |
65 | /// Store secure context (called on RTOS thread context switch)
66 | /// \param[in] id TrustZone memory slot identifier
67 | /// \return execution status (1: success, 0: error)
68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
69 |
70 | #endif // TZ_CONTEXT_H
71 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal.h
4 | * @author MCD Application Team
5 | * @brief This file contains all the functions prototypes for the HAL
6 | * module driver.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2017 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F4xx_HAL_H
23 | #define __STM32F4xx_HAL_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "stm32f4xx_hal_conf.h"
31 |
32 | /** @addtogroup STM32F4xx_HAL_Driver
33 | * @{
34 | */
35 |
36 | /** @addtogroup HAL
37 | * @{
38 | */
39 |
40 | /* Exported types ------------------------------------------------------------*/
41 | /* Exported constants --------------------------------------------------------*/
42 |
43 | /** @defgroup HAL_Exported_Constants HAL Exported Constants
44 | * @{
45 | */
46 |
47 | /** @defgroup HAL_TICK_FREQ Tick Frequency
48 | * @{
49 | */
50 | typedef enum
51 | {
52 | HAL_TICK_FREQ_10HZ = 100U,
53 | HAL_TICK_FREQ_100HZ = 10U,
54 | HAL_TICK_FREQ_1KHZ = 1U,
55 | HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
56 | } HAL_TickFreqTypeDef;
57 | /**
58 | * @}
59 | */
60 |
61 | /**
62 | * @}
63 | */
64 |
65 | /* Exported macro ------------------------------------------------------------*/
66 | /** @defgroup HAL_Exported_Macros HAL Exported Macros
67 | * @{
68 | */
69 |
70 | /** @brief Freeze/Unfreeze Peripherals in Debug mode
71 | */
72 | #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
73 | #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
74 | #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
75 | #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
76 | #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
77 | #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
78 | #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
79 | #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
80 | #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
81 | #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
82 | #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
83 | #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
84 | #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
85 | #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
86 | #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
87 | #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
88 | #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
89 | #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
90 | #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
91 | #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
92 | #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
93 | #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
94 |
95 | #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
96 | #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
97 | #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
98 | #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
99 | #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
100 | #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
101 | #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
102 | #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
103 | #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
104 | #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
105 | #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
106 | #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
107 | #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
108 | #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
109 | #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
110 | #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
111 | #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
112 | #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
113 | #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
114 | #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
115 | #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
116 | #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
117 |
118 | /** @brief Main Flash memory mapped at 0x00000000
119 | */
120 | #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
121 |
122 | /** @brief System Flash memory mapped at 0x00000000
123 | */
124 | #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
125 | SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
126 | }while(0);
127 |
128 | /** @brief Embedded SRAM mapped at 0x00000000
129 | */
130 | #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
131 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
132 | }while(0);
133 |
134 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
135 | /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
136 | */
137 | #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
138 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
139 | }while(0);
140 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
141 |
142 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
143 | defined(STM32F469xx) || defined(STM32F479xx)
144 | /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
145 | */
146 | #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
147 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
148 | }while(0);
149 |
150 | /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
151 | */
152 | #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
153 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
154 | }while(0);
155 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
156 |
157 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
158 | /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
159 | * @{
160 | */
161 | /** @brief SYSCFG Break Lockup lock
162 | * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
163 | * @note The selected configuration is locked and can be unlocked by system reset
164 | */
165 | #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
166 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
167 | }while(0)
168 | /**
169 | * @}
170 | */
171 |
172 | /** @defgroup PVD_Lock_Enable PVD Lock
173 | * @{
174 | */
175 | /** @brief SYSCFG Break PVD lock
176 | * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
177 | * @note The selected configuration is locked and can be unlocked by system reset
178 | */
179 | #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
180 | SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
181 | }while(0)
182 | /**
183 | * @}
184 | */
185 | #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
186 | /**
187 | * @}
188 | */
189 |
190 | /** @defgroup HAL_Private_Macros HAL Private Macros
191 | * @{
192 | */
193 | #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
194 | ((FREQ) == HAL_TICK_FREQ_100HZ) || \
195 | ((FREQ) == HAL_TICK_FREQ_1KHZ))
196 | /**
197 | * @}
198 | */
199 |
200 | /* Exported functions --------------------------------------------------------*/
201 | /** @addtogroup HAL_Exported_Functions
202 | * @{
203 | */
204 | /** @addtogroup HAL_Exported_Functions_Group1
205 | * @{
206 | */
207 | /* Initialization and Configuration functions ******************************/
208 | HAL_StatusTypeDef HAL_Init(void);
209 | HAL_StatusTypeDef HAL_DeInit(void);
210 | void HAL_MspInit(void);
211 | void HAL_MspDeInit(void);
212 | HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
213 | /**
214 | * @}
215 | */
216 |
217 | /** @addtogroup HAL_Exported_Functions_Group2
218 | * @{
219 | */
220 | /* Peripheral Control functions ************************************************/
221 | void HAL_IncTick(void);
222 | void HAL_Delay(uint32_t Delay);
223 | uint32_t HAL_GetTick(void);
224 | uint32_t HAL_GetTickPrio(void);
225 | HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
226 | HAL_TickFreqTypeDef HAL_GetTickFreq(void);
227 | void HAL_SuspendTick(void);
228 | void HAL_ResumeTick(void);
229 | uint32_t HAL_GetHalVersion(void);
230 | uint32_t HAL_GetREVID(void);
231 | uint32_t HAL_GetDEVID(void);
232 | void HAL_DBGMCU_EnableDBGSleepMode(void);
233 | void HAL_DBGMCU_DisableDBGSleepMode(void);
234 | void HAL_DBGMCU_EnableDBGStopMode(void);
235 | void HAL_DBGMCU_DisableDBGStopMode(void);
236 | void HAL_DBGMCU_EnableDBGStandbyMode(void);
237 | void HAL_DBGMCU_DisableDBGStandbyMode(void);
238 | void HAL_EnableCompensationCell(void);
239 | void HAL_DisableCompensationCell(void);
240 | uint32_t HAL_GetUIDw0(void);
241 | uint32_t HAL_GetUIDw1(void);
242 | uint32_t HAL_GetUIDw2(void);
243 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
244 | defined(STM32F469xx) || defined(STM32F479xx)
245 | void HAL_EnableMemorySwappingBank(void);
246 | void HAL_DisableMemorySwappingBank(void);
247 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
248 | /**
249 | * @}
250 | */
251 |
252 | /**
253 | * @}
254 | */
255 | /* Private types -------------------------------------------------------------*/
256 | /* Private variables ---------------------------------------------------------*/
257 | /** @defgroup HAL_Private_Variables HAL Private Variables
258 | * @{
259 | */
260 | /**
261 | * @}
262 | */
263 | /* Private constants ---------------------------------------------------------*/
264 | /** @defgroup HAL_Private_Constants HAL Private Constants
265 | * @{
266 | */
267 | /**
268 | * @}
269 | */
270 | /* Private macros ------------------------------------------------------------*/
271 | /* Private functions ---------------------------------------------------------*/
272 | /**
273 | * @}
274 | */
275 |
276 | /**
277 | * @}
278 | */
279 |
280 | #ifdef __cplusplus
281 | }
282 | #endif
283 |
284 | #endif /* __STM32F4xx_HAL_H */
285 |
286 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
287 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_def.h
4 | * @author MCD Application Team
5 | * @brief This file contains HAL common defines, enumeration, macros and
6 | * structures definitions.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2017 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F4xx_HAL_DEF
23 | #define __STM32F4xx_HAL_DEF
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "stm32f4xx.h"
31 | #include "Legacy/stm32_hal_legacy.h"
32 | #include
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 |
36 | /**
37 | * @brief HAL Status structures definition
38 | */
39 | typedef enum
40 | {
41 | HAL_OK = 0x00U,
42 | HAL_ERROR = 0x01U,
43 | HAL_BUSY = 0x02U,
44 | HAL_TIMEOUT = 0x03U
45 | } HAL_StatusTypeDef;
46 |
47 | /**
48 | * @brief HAL Lock structures definition
49 | */
50 | typedef enum
51 | {
52 | HAL_UNLOCKED = 0x00U,
53 | HAL_LOCKED = 0x01U
54 | } HAL_LockTypeDef;
55 |
56 | /* Exported macro ------------------------------------------------------------*/
57 |
58 | #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
59 |
60 | #define HAL_MAX_DELAY 0xFFFFFFFFU
61 |
62 | #define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
63 | #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
64 |
65 | #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
66 | do{ \
67 | (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
68 | (__DMA_HANDLE__).Parent = (__HANDLE__); \
69 | } while(0U)
70 |
71 | /** @brief Reset the Handle's State field.
72 | * @param __HANDLE__ specifies the Peripheral Handle.
73 | * @note This macro can be used for the following purpose:
74 | * - When the Handle is declared as local variable; before passing it as parameter
75 | * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
76 | * to set to 0 the Handle's "State" field.
77 | * Otherwise, "State" field may have any random value and the first time the function
78 | * HAL_PPP_Init() is called, the low level hardware initialization will be missed
79 | * (i.e. HAL_PPP_MspInit() will not be executed).
80 | * - When there is a need to reconfigure the low level hardware: instead of calling
81 | * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
82 | * In this later function, when the Handle's "State" field is set to 0, it will execute the function
83 | * HAL_PPP_MspInit() which will reconfigure the low level hardware.
84 | * @retval None
85 | */
86 | #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
87 |
88 | #if (USE_RTOS == 1U)
89 | /* Reserved for future use */
90 | #error "USE_RTOS should be 0 in the current HAL release"
91 | #else
92 | #define __HAL_LOCK(__HANDLE__) \
93 | do{ \
94 | if((__HANDLE__)->Lock == HAL_LOCKED) \
95 | { \
96 | return HAL_BUSY; \
97 | } \
98 | else \
99 | { \
100 | (__HANDLE__)->Lock = HAL_LOCKED; \
101 | } \
102 | }while (0U)
103 |
104 | #define __HAL_UNLOCK(__HANDLE__) \
105 | do{ \
106 | (__HANDLE__)->Lock = HAL_UNLOCKED; \
107 | }while (0U)
108 | #endif /* USE_RTOS */
109 |
110 | #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
111 | #ifndef __weak
112 | #define __weak __attribute__((weak))
113 | #endif /* __weak */
114 | #ifndef __packed
115 | #define __packed __attribute__((__packed__))
116 | #endif /* __packed */
117 | #endif /* __GNUC__ */
118 |
119 |
120 | /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
121 | #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
122 | #ifndef __ALIGN_END
123 | #define __ALIGN_END __attribute__ ((aligned (4)))
124 | #endif /* __ALIGN_END */
125 | #ifndef __ALIGN_BEGIN
126 | #define __ALIGN_BEGIN
127 | #endif /* __ALIGN_BEGIN */
128 | #else
129 | #ifndef __ALIGN_END
130 | #define __ALIGN_END
131 | #endif /* __ALIGN_END */
132 | #ifndef __ALIGN_BEGIN
133 | #if defined (__CC_ARM) /* ARM Compiler */
134 | #define __ALIGN_BEGIN __align(4)
135 | #elif defined (__ICCARM__) /* IAR Compiler */
136 | #define __ALIGN_BEGIN
137 | #endif /* __CC_ARM */
138 | #endif /* __ALIGN_BEGIN */
139 | #endif /* __GNUC__ */
140 |
141 |
142 | /**
143 | * @brief __RAM_FUNC definition
144 | */
145 | #if defined ( __CC_ARM )
146 | /* ARM Compiler
147 | ------------
148 | RAM functions are defined using the toolchain options.
149 | Functions that are executed in RAM should reside in a separate source module.
150 | Using the 'Options for File' dialog you can simply change the 'Code / Const'
151 | area of a module to a memory space in physical RAM.
152 | Available memory areas are declared in the 'Target' tab of the 'Options for Target'
153 | dialog.
154 | */
155 | #define __RAM_FUNC
156 |
157 | #elif defined ( __ICCARM__ )
158 | /* ICCARM Compiler
159 | ---------------
160 | RAM functions are defined using a specific toolchain keyword "__ramfunc".
161 | */
162 | #define __RAM_FUNC __ramfunc
163 |
164 | #elif defined ( __GNUC__ )
165 | /* GNU Compiler
166 | ------------
167 | RAM functions are defined using a specific toolchain attribute
168 | "__attribute__((section(".RamFunc")))".
169 | */
170 | #define __RAM_FUNC __attribute__((section(".RamFunc")))
171 |
172 | #endif
173 |
174 | /**
175 | * @brief __NOINLINE definition
176 | */
177 | #if defined ( __CC_ARM ) || defined ( __GNUC__ )
178 | /* ARM & GNUCompiler
179 | ----------------
180 | */
181 | #define __NOINLINE __attribute__ ( (noinline) )
182 |
183 | #elif defined ( __ICCARM__ )
184 | /* ICCARM Compiler
185 | ---------------
186 | */
187 | #define __NOINLINE _Pragma("optimize = no_inline")
188 |
189 | #endif
190 |
191 | #ifdef __cplusplus
192 | }
193 | #endif
194 |
195 | #endif /* ___STM32F4xx_HAL_DEF */
196 |
197 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
198 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_dma_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of DMA HAL extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __STM32F4xx_HAL_DMA_EX_H
22 | #define __STM32F4xx_HAL_DMA_EX_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_hal_def.h"
30 |
31 | /** @addtogroup STM32F4xx_HAL_Driver
32 | * @{
33 | */
34 |
35 | /** @addtogroup DMAEx
36 | * @{
37 | */
38 |
39 | /* Exported types ------------------------------------------------------------*/
40 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types
41 | * @brief DMAEx Exported types
42 | * @{
43 | */
44 |
45 | /**
46 | * @brief HAL DMA Memory definition
47 | */
48 | typedef enum
49 | {
50 | MEMORY0 = 0x00U, /*!< Memory 0 */
51 | MEMORY1 = 0x01U /*!< Memory 1 */
52 | }HAL_DMA_MemoryTypeDef;
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /* Exported functions --------------------------------------------------------*/
59 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
60 | * @brief DMAEx Exported functions
61 | * @{
62 | */
63 |
64 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
65 | * @brief Extended features functions
66 | * @{
67 | */
68 |
69 | /* IO operation functions *******************************************************/
70 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
71 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
72 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
73 |
74 | /**
75 | * @}
76 | */
77 | /**
78 | * @}
79 | */
80 |
81 | /* Private functions ---------------------------------------------------------*/
82 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions
83 | * @brief DMAEx Private functions
84 | * @{
85 | */
86 | /**
87 | * @}
88 | */
89 |
90 | /**
91 | * @}
92 | */
93 |
94 | /**
95 | * @}
96 | */
97 |
98 | #ifdef __cplusplus
99 | }
100 | #endif
101 |
102 | #endif /*__STM32F4xx_HAL_DMA_EX_H*/
103 |
104 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
105 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_exti.h
4 | * @author MCD Application Team
5 | * @brief Header file of EXTI HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2018 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef STM32f4xx_HAL_EXTI_H
22 | #define STM32f4xx_HAL_EXTI_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_hal_def.h"
30 |
31 | /** @addtogroup STM32F4xx_HAL_Driver
32 | * @{
33 | */
34 |
35 | /** @defgroup EXTI EXTI
36 | * @brief EXTI HAL module driver
37 | * @{
38 | */
39 |
40 | /* Exported types ------------------------------------------------------------*/
41 |
42 | /** @defgroup EXTI_Exported_Types EXTI Exported Types
43 | * @{
44 | */
45 | typedef enum
46 | {
47 | HAL_EXTI_COMMON_CB_ID = 0x00U,
48 | HAL_EXTI_RISING_CB_ID = 0x01U,
49 | HAL_EXTI_FALLING_CB_ID = 0x02U,
50 | } EXTI_CallbackIDTypeDef;
51 |
52 | /**
53 | * @brief EXTI Handle structure definition
54 | */
55 | typedef struct
56 | {
57 | uint32_t Line; /*!< Exti line number */
58 | void (* RisingCallback)(void); /*!< Exti rising callback */
59 | void (* FallingCallback)(void); /*!< Exti falling callback */
60 | } EXTI_HandleTypeDef;
61 |
62 | /**
63 | * @brief EXTI Configuration structure definition
64 | */
65 | typedef struct
66 | {
67 | uint32_t Line; /*!< The Exti line to be configured. This parameter
68 | can be a value of @ref EXTI_Line */
69 | uint32_t Mode; /*!< The Exit Mode to be configured for a core.
70 | This parameter can be a combination of @ref EXTI_Mode */
71 | uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
72 | can be a value of @ref EXTI_Trigger */
73 | } EXTI_ConfigTypeDef;
74 |
75 | /**
76 | * @}
77 | */
78 |
79 | /* Exported constants --------------------------------------------------------*/
80 | /** @defgroup EXTI_Exported_Constants EXTI Exported Constants
81 | * @{
82 | */
83 |
84 | /** @defgroup EXTI_Line EXTI Line
85 | * @{
86 | */
87 | #define EXTI_LINE_0 EXTI_IMR_IM0 /*!< External interrupt line 0 */
88 | #define EXTI_LINE_1 EXTI_IMR_IM1 /*!< External interrupt line 1 */
89 | #define EXTI_LINE_2 EXTI_IMR_IM2 /*!< External interrupt line 2 */
90 | #define EXTI_LINE_3 EXTI_IMR_IM3 /*!< External interrupt line 3 */
91 | #define EXTI_LINE_4 EXTI_IMR_IM4 /*!< External interrupt line 4 */
92 | #define EXTI_LINE_5 EXTI_IMR_IM5 /*!< External interrupt line 5 */
93 | #define EXTI_LINE_6 EXTI_IMR_IM6 /*!< External interrupt line 6 */
94 | #define EXTI_LINE_7 EXTI_IMR_IM7 /*!< External interrupt line 7 */
95 | #define EXTI_LINE_8 EXTI_IMR_IM8 /*!< External interrupt line 8 */
96 | #define EXTI_LINE_9 EXTI_IMR_IM9 /*!< External interrupt line 9 */
97 | #define EXTI_LINE_10 EXTI_IMR_IM10 /*!< External interrupt line 10 */
98 | #define EXTI_LINE_11 EXTI_IMR_IM11 /*!< External interrupt line 11 */
99 | #define EXTI_LINE_12 EXTI_IMR_IM12 /*!< External interrupt line 12 */
100 | #define EXTI_LINE_13 EXTI_IMR_IM13 /*!< External interrupt line 13 */
101 | #define EXTI_LINE_14 EXTI_IMR_IM14 /*!< External interrupt line 14 */
102 | #define EXTI_LINE_15 EXTI_IMR_IM15 /*!< External interrupt line 15 */
103 | #define EXTI_LINE_16 EXTI_IMR_IM16 /*!< External interrupt line 16 Connected to the PVD Output */
104 | #define EXTI_LINE_17 EXTI_IMR_IM17 /*!< External interrupt line 17 Connected to the RTC Alarm event */
105 | #define EXTI_LINE_18 EXTI_IMR_IM18 /*!< External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event */
106 | #define EXTI_LINE_19 EXTI_IMR_IM19 /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */
107 | #define EXTI_LINE_20 EXTI_IMR_IM20 /*!< External interrupt line 20 Connected to the USB OTG HS (configured in FS) Wakeup event */
108 | #define EXTI_LINE_21 EXTI_IMR_IM21 /*!< External interrupt line 21 Connected to the RTC Tamper and Time Stamp events */
109 | #define EXTI_LINE_22 EXTI_IMR_IM22 /*!< External interrupt line 22 Connected to the RTC Wakeup event */
110 |
111 | /**
112 | * @}
113 | */
114 |
115 | /** @defgroup EXTI_Mode EXTI Mode
116 | * @{
117 | */
118 | #define EXTI_MODE_INTERRUPT 0x00000000U
119 | #define EXTI_MODE_EVENT 0x00000004U
120 | /**
121 | * @}
122 | */
123 |
124 | /** @defgroup EXTI_Trigger EXTI Trigger
125 | * @{
126 | */
127 |
128 | #define EXTI_TRIGGER_RISING 0x00000008U
129 | #define EXTI_TRIGGER_FALLING 0x0000000CU
130 | #define EXTI_TRIGGER_RISING_FALLING 0x00000010U
131 | /**
132 | * @}
133 | */
134 |
135 | /**
136 | * @}
137 | */
138 |
139 | /* Exported macro ------------------------------------------------------------*/
140 | /** @defgroup EXTI_Exported_Macros EXTI Exported Macros
141 | * @{
142 | */
143 |
144 | /**
145 | * @}
146 | */
147 |
148 | /* Private constants --------------------------------------------------------*/
149 | /** @defgroup EXTI_Private_Constants EXTI Private Constants
150 | * @{
151 | */
152 | /**
153 | * @brief EXTI Mask for interrupt & event mode
154 | */
155 | #define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
156 |
157 | /**
158 | * @brief EXTI Mask for trigger possibilities
159 | */
160 | #define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING | EXTI_TRIGGER_RISING_FALLING)
161 |
162 | /**
163 | * @brief EXTI Line number
164 | */
165 | #define EXTI_LINE_NB 23UL
166 |
167 | /**
168 | * @}
169 | */
170 |
171 | /* Private macros ------------------------------------------------------------*/
172 | /** @defgroup EXTI_Private_Macros EXTI Private Macros
173 | * @{
174 | */
175 | #define IS_EXTI_LINE(__LINE__) (((__LINE__) == EXTI_LINE_0) || \
176 | ((__LINE__) == EXTI_LINE_1) || \
177 | ((__LINE__) == EXTI_LINE_2) || \
178 | ((__LINE__) == EXTI_LINE_3) || \
179 | ((__LINE__) == EXTI_LINE_4) || \
180 | ((__LINE__) == EXTI_LINE_5) || \
181 | ((__LINE__) == EXTI_LINE_6) || \
182 | ((__LINE__) == EXTI_LINE_7) || \
183 | ((__LINE__) == EXTI_LINE_8) || \
184 | ((__LINE__) == EXTI_LINE_9) || \
185 | ((__LINE__) == EXTI_LINE_10) || \
186 | ((__LINE__) == EXTI_LINE_11) || \
187 | ((__LINE__) == EXTI_LINE_12) || \
188 | ((__LINE__) == EXTI_LINE_13) || \
189 | ((__LINE__) == EXTI_LINE_14) || \
190 | ((__LINE__) == EXTI_LINE_15) || \
191 | ((__LINE__) == EXTI_LINE_16) || \
192 | ((__LINE__) == EXTI_LINE_17) || \
193 | ((__LINE__) == EXTI_LINE_18) || \
194 | ((__LINE__) == EXTI_LINE_19) || \
195 | ((__LINE__) == EXTI_LINE_20) || \
196 | ((__LINE__) == EXTI_LINE_21) || \
197 | ((__LINE__) == EXTI_LINE_22))
198 |
199 | #define IS_EXTI_MODE(__LINE__) ((((__LINE__) & ~EXTI_MODE_MASK) == 0x00U))
200 |
201 | #define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00U)
202 |
203 | #define IS_EXTI_PENDING_EDGE(__LINE__) (((__LINE__) == EXTI_TRIGGER_FALLING) || \
204 | ((__LINE__) == EXTI_TRIGGER_RISING) || \
205 | ((__LINE__) == EXTI_TRIGGER_RISING_FALLING))
206 |
207 | #define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16U)
208 | /**
209 | * @}
210 | */
211 |
212 | /* Exported functions --------------------------------------------------------*/
213 | /** @defgroup EXTI_Exported_Functions EXTI Exported Functions
214 | * @brief EXTI Exported Functions
215 | * @{
216 | */
217 |
218 | /** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
219 | * @brief Configuration functions
220 | * @{
221 | */
222 | /* Configuration functions ****************************************************/
223 | HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
224 | HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
225 | HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
226 | HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
227 | HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
228 | /**
229 | * @}
230 | */
231 |
232 | /** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
233 | * @brief IO operation functions
234 | * @{
235 | */
236 | /* IO operation functions *****************************************************/
237 | void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
238 | uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
239 | void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
240 | void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
241 |
242 | /**
243 | * @}
244 | */
245 |
246 | /**
247 | * @}
248 | */
249 |
250 | /**
251 | * @}
252 | */
253 |
254 | /**
255 | * @}
256 | */
257 |
258 | #ifdef __cplusplus
259 | }
260 | #endif
261 |
262 | #endif /* STM32f4xx_HAL_EXTI_H */
263 |
264 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
265 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_flash_ramfunc.h
4 | * @author MCD Application Team
5 | * @brief Header file of FLASH RAMFUNC driver.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H
22 | #define __STM32F4xx_FLASH_RAMFUNC_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
28 | defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx)
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f4xx_hal_def.h"
32 |
33 | /** @addtogroup STM32F4xx_HAL_Driver
34 | * @{
35 | */
36 |
37 | /** @addtogroup FLASH_RAMFUNC
38 | * @{
39 | */
40 |
41 | /* Exported types ------------------------------------------------------------*/
42 | /* Exported macro ------------------------------------------------------------*/
43 | /* Exported functions --------------------------------------------------------*/
44 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions
45 | * @{
46 | */
47 |
48 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
49 | * @{
50 | */
51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void);
52 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void);
53 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void);
54 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void);
55 | /**
56 | * @}
57 | */
58 |
59 | /**
60 | * @}
61 | */
62 |
63 | /**
64 | * @}
65 | */
66 |
67 | /**
68 | * @}
69 | */
70 |
71 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
72 | #ifdef __cplusplus
73 | }
74 | #endif
75 |
76 |
77 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */
78 |
79 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
80 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_gpio.h
4 | * @author MCD Application Team
5 | * @brief Header file of GPIO HAL module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2017 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __STM32F4xx_HAL_GPIO_H
22 | #define __STM32F4xx_HAL_GPIO_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "stm32f4xx_hal_def.h"
30 |
31 | /** @addtogroup STM32F4xx_HAL_Driver
32 | * @{
33 | */
34 |
35 | /** @addtogroup GPIO
36 | * @{
37 | */
38 |
39 | /* Exported types ------------------------------------------------------------*/
40 | /** @defgroup GPIO_Exported_Types GPIO Exported Types
41 | * @{
42 | */
43 |
44 | /**
45 | * @brief GPIO Init structure definition
46 | */
47 | typedef struct
48 | {
49 | uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
50 | This parameter can be any value of @ref GPIO_pins_define */
51 |
52 | uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
53 | This parameter can be a value of @ref GPIO_mode_define */
54 |
55 | uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
56 | This parameter can be a value of @ref GPIO_pull_define */
57 |
58 | uint32_t Speed; /*!< Specifies the speed for the selected pins.
59 | This parameter can be a value of @ref GPIO_speed_define */
60 |
61 | uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
62 | This parameter can be a value of @ref GPIO_Alternate_function_selection */
63 | }GPIO_InitTypeDef;
64 |
65 | /**
66 | * @brief GPIO Bit SET and Bit RESET enumeration
67 | */
68 | typedef enum
69 | {
70 | GPIO_PIN_RESET = 0,
71 | GPIO_PIN_SET
72 | }GPIO_PinState;
73 | /**
74 | * @}
75 | */
76 |
77 | /* Exported constants --------------------------------------------------------*/
78 |
79 | /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
80 | * @{
81 | */
82 |
83 | /** @defgroup GPIO_pins_define GPIO pins define
84 | * @{
85 | */
86 | #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
87 | #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
88 | #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
89 | #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
90 | #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
91 | #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
92 | #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
93 | #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
94 | #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
95 | #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
96 | #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
97 | #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
98 | #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
99 | #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
100 | #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
101 | #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
102 | #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
103 |
104 | #define GPIO_PIN_MASK 0x0000FFFFU /* PIN mask for assert test */
105 | /**
106 | * @}
107 | */
108 |
109 | /** @defgroup GPIO_mode_define GPIO mode define
110 | * @brief GPIO Configuration Mode
111 | * Elements values convention: 0xX0yz00YZ
112 | * - X : GPIO mode or EXTI Mode
113 | * - y : External IT or Event trigger detection
114 | * - z : IO configuration on External IT or Event
115 | * - Y : Output type (Push Pull or Open Drain)
116 | * - Z : IO Direction mode (Input, Output, Alternate or Analog)
117 | * @{
118 | */
119 | #define GPIO_MODE_INPUT 0x00000000U /*!< Input Floating Mode */
120 | #define GPIO_MODE_OUTPUT_PP 0x00000001U /*!< Output Push Pull Mode */
121 | #define GPIO_MODE_OUTPUT_OD 0x00000011U /*!< Output Open Drain Mode */
122 | #define GPIO_MODE_AF_PP 0x00000002U /*!< Alternate Function Push Pull Mode */
123 | #define GPIO_MODE_AF_OD 0x00000012U /*!< Alternate Function Open Drain Mode */
124 |
125 | #define GPIO_MODE_ANALOG 0x00000003U /*!< Analog Mode */
126 |
127 | #define GPIO_MODE_IT_RISING 0x10110000U /*!< External Interrupt Mode with Rising edge trigger detection */
128 | #define GPIO_MODE_IT_FALLING 0x10210000U /*!< External Interrupt Mode with Falling edge trigger detection */
129 | #define GPIO_MODE_IT_RISING_FALLING 0x10310000U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
130 |
131 | #define GPIO_MODE_EVT_RISING 0x10120000U /*!< External Event Mode with Rising edge trigger detection */
132 | #define GPIO_MODE_EVT_FALLING 0x10220000U /*!< External Event Mode with Falling edge trigger detection */
133 | #define GPIO_MODE_EVT_RISING_FALLING 0x10320000U /*!< External Event Mode with Rising/Falling edge trigger detection */
134 | /**
135 | * @}
136 | */
137 |
138 | /** @defgroup GPIO_speed_define GPIO speed define
139 | * @brief GPIO Output Maximum frequency
140 | * @{
141 | */
142 | #define GPIO_SPEED_FREQ_LOW 0x00000000U /*!< IO works at 2 MHz, please refer to the product datasheet */
143 | #define GPIO_SPEED_FREQ_MEDIUM 0x00000001U /*!< range 12,5 MHz to 50 MHz, please refer to the product datasheet */
144 | #define GPIO_SPEED_FREQ_HIGH 0x00000002U /*!< range 25 MHz to 100 MHz, please refer to the product datasheet */
145 | #define GPIO_SPEED_FREQ_VERY_HIGH 0x00000003U /*!< range 50 MHz to 200 MHz, please refer to the product datasheet */
146 | /**
147 | * @}
148 | */
149 |
150 | /** @defgroup GPIO_pull_define GPIO pull define
151 | * @brief GPIO Pull-Up or Pull-Down Activation
152 | * @{
153 | */
154 | #define GPIO_NOPULL 0x00000000U /*!< No Pull-up or Pull-down activation */
155 | #define GPIO_PULLUP 0x00000001U /*!< Pull-up activation */
156 | #define GPIO_PULLDOWN 0x00000002U /*!< Pull-down activation */
157 | /**
158 | * @}
159 | */
160 |
161 | /**
162 | * @}
163 | */
164 |
165 | /* Exported macro ------------------------------------------------------------*/
166 | /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
167 | * @{
168 | */
169 |
170 | /**
171 | * @brief Checks whether the specified EXTI line flag is set or not.
172 | * @param __EXTI_LINE__ specifies the EXTI line flag to check.
173 | * This parameter can be GPIO_PIN_x where x can be(0..15)
174 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
175 | */
176 | #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
177 |
178 | /**
179 | * @brief Clears the EXTI's line pending flags.
180 | * @param __EXTI_LINE__ specifies the EXTI lines flags to clear.
181 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
182 | * @retval None
183 | */
184 | #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
185 |
186 | /**
187 | * @brief Checks whether the specified EXTI line is asserted or not.
188 | * @param __EXTI_LINE__ specifies the EXTI line to check.
189 | * This parameter can be GPIO_PIN_x where x can be(0..15)
190 | * @retval The new state of __EXTI_LINE__ (SET or RESET).
191 | */
192 | #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR & (__EXTI_LINE__))
193 |
194 | /**
195 | * @brief Clears the EXTI's line pending bits.
196 | * @param __EXTI_LINE__ specifies the EXTI lines to clear.
197 | * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
198 | * @retval None
199 | */
200 | #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR = (__EXTI_LINE__))
201 |
202 | /**
203 | * @brief Generates a Software interrupt on selected EXTI line.
204 | * @param __EXTI_LINE__ specifies the EXTI line to check.
205 | * This parameter can be GPIO_PIN_x where x can be(0..15)
206 | * @retval None
207 | */
208 | #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER |= (__EXTI_LINE__))
209 | /**
210 | * @}
211 | */
212 |
213 | /* Include GPIO HAL Extension module */
214 | #include "stm32f4xx_hal_gpio_ex.h"
215 |
216 | /* Exported functions --------------------------------------------------------*/
217 | /** @addtogroup GPIO_Exported_Functions
218 | * @{
219 | */
220 |
221 | /** @addtogroup GPIO_Exported_Functions_Group1
222 | * @{
223 | */
224 | /* Initialization and de-initialization functions *****************************/
225 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
226 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
227 | /**
228 | * @}
229 | */
230 |
231 | /** @addtogroup GPIO_Exported_Functions_Group2
232 | * @{
233 | */
234 | /* IO operation functions *****************************************************/
235 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
236 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
237 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
238 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
239 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
240 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
241 |
242 | /**
243 | * @}
244 | */
245 |
246 | /**
247 | * @}
248 | */
249 | /* Private types -------------------------------------------------------------*/
250 | /* Private variables ---------------------------------------------------------*/
251 | /* Private constants ---------------------------------------------------------*/
252 | /** @defgroup GPIO_Private_Constants GPIO Private Constants
253 | * @{
254 | */
255 |
256 | /**
257 | * @}
258 | */
259 |
260 | /* Private macros ------------------------------------------------------------*/
261 | /** @defgroup GPIO_Private_Macros GPIO Private Macros
262 | * @{
263 | */
264 | #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
265 | #define IS_GPIO_PIN(PIN) ((((PIN) & GPIO_PIN_MASK ) != 0x00U) && (((PIN) & ~GPIO_PIN_MASK) == 0x00U))
266 | #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
267 | ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
268 | ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
269 | ((MODE) == GPIO_MODE_AF_PP) ||\
270 | ((MODE) == GPIO_MODE_AF_OD) ||\
271 | ((MODE) == GPIO_MODE_IT_RISING) ||\
272 | ((MODE) == GPIO_MODE_IT_FALLING) ||\
273 | ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
274 | ((MODE) == GPIO_MODE_EVT_RISING) ||\
275 | ((MODE) == GPIO_MODE_EVT_FALLING) ||\
276 | ((MODE) == GPIO_MODE_EVT_RISING_FALLING) ||\
277 | ((MODE) == GPIO_MODE_ANALOG))
278 | #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_SPEED_FREQ_LOW) || ((SPEED) == GPIO_SPEED_FREQ_MEDIUM) || \
279 | ((SPEED) == GPIO_SPEED_FREQ_HIGH) || ((SPEED) == GPIO_SPEED_FREQ_VERY_HIGH))
280 | #define IS_GPIO_PULL(PULL) (((PULL) == GPIO_NOPULL) || ((PULL) == GPIO_PULLUP) || \
281 | ((PULL) == GPIO_PULLDOWN))
282 | /**
283 | * @}
284 | */
285 |
286 | /* Private functions ---------------------------------------------------------*/
287 | /** @defgroup GPIO_Private_Functions GPIO Private Functions
288 | * @{
289 | */
290 |
291 | /**
292 | * @}
293 | */
294 |
295 | /**
296 | * @}
297 | */
298 |
299 | /**
300 | * @}
301 | */
302 |
303 | #ifdef __cplusplus
304 | }
305 | #endif
306 |
307 | #endif /* __STM32F4xx_HAL_GPIO_H */
308 |
309 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
310 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_i2c_ex.h
4 | * @author MCD Application Team
5 | * @brief Header file of I2C HAL Extension module.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2016 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __STM32F4xx_HAL_I2C_EX_H
22 | #define __STM32F4xx_HAL_I2C_EX_H
23 |
24 | #ifdef __cplusplus
25 | extern "C" {
26 | #endif
27 |
28 | #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
29 | /* Includes ------------------------------------------------------------------*/
30 | #include "stm32f4xx_hal_def.h"
31 |
32 | /** @addtogroup STM32F4xx_HAL_Driver
33 | * @{
34 | */
35 |
36 | /** @addtogroup I2CEx
37 | * @{
38 | */
39 |
40 | /* Exported types ------------------------------------------------------------*/
41 | /* Exported constants --------------------------------------------------------*/
42 | /** @defgroup I2CEx_Exported_Constants I2C Exported Constants
43 | * @{
44 | */
45 |
46 | /** @defgroup I2CEx_Analog_Filter I2C Analog Filter
47 | * @{
48 | */
49 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U
50 | #define I2C_ANALOGFILTER_DISABLE I2C_FLTR_ANOFF
51 | /**
52 | * @}
53 | */
54 |
55 | /**
56 | * @}
57 | */
58 |
59 | /* Exported macro ------------------------------------------------------------*/
60 | /* Exported functions --------------------------------------------------------*/
61 | /** @addtogroup I2CEx_Exported_Functions
62 | * @{
63 | */
64 |
65 | /** @addtogroup I2CEx_Exported_Functions_Group1
66 | * @{
67 | */
68 | /* Peripheral Control functions ************************************************/
69 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
70 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
71 | /**
72 | * @}
73 | */
74 |
75 | /**
76 | * @}
77 | */
78 | /* Private types -------------------------------------------------------------*/
79 | /* Private variables ---------------------------------------------------------*/
80 | /* Private constants ---------------------------------------------------------*/
81 | /** @defgroup I2CEx_Private_Constants I2C Private Constants
82 | * @{
83 | */
84 |
85 | /**
86 | * @}
87 | */
88 |
89 | /* Private macros ------------------------------------------------------------*/
90 | /** @defgroup I2CEx_Private_Macros I2C Private Macros
91 | * @{
92 | */
93 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
94 | ((FILTER) == I2C_ANALOGFILTER_DISABLE))
95 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
96 | /**
97 | * @}
98 | */
99 |
100 | /**
101 | * @}
102 | */
103 |
104 | /**
105 | * @}
106 | */
107 |
108 | #endif
109 |
110 | #ifdef __cplusplus
111 | }
112 | #endif
113 |
114 | #endif /* __STM32F4xx_HAL_I2C_EX_H */
115 |
116 |
117 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
118 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_dma_ex.c
4 | * @author MCD Application Team
5 | * @brief DMA Extension HAL module driver
6 | * This file provides firmware functions to manage the following
7 | * functionalities of the DMA Extension peripheral:
8 | * + Extended features functions
9 | *
10 | @verbatim
11 | ==============================================================================
12 | ##### How to use this driver #####
13 | ==============================================================================
14 | [..]
15 | The DMA Extension HAL driver can be used as follows:
16 | (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
17 | for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
18 |
19 | -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
20 | -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
21 | -@- In Multi (Double) buffer mode, it is possible to update the base address for
22 | the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
23 |
24 | @endverbatim
25 | ******************************************************************************
26 | * @attention
27 | *
28 | * © Copyright (c) 2017 STMicroelectronics.
29 | * All rights reserved.
30 | *
31 | * This software component is licensed by ST under BSD 3-Clause license,
32 | * the "License"; You may not use this file except in compliance with the
33 | * License. You may obtain a copy of the License at:
34 | * opensource.org/licenses/BSD-3-Clause
35 | *
36 | ******************************************************************************
37 | */
38 |
39 | /* Includes ------------------------------------------------------------------*/
40 | #include "stm32f4xx_hal.h"
41 |
42 | /** @addtogroup STM32F4xx_HAL_Driver
43 | * @{
44 | */
45 |
46 | /** @defgroup DMAEx DMAEx
47 | * @brief DMA Extended HAL module driver
48 | * @{
49 | */
50 |
51 | #ifdef HAL_DMA_MODULE_ENABLED
52 |
53 | /* Private types -------------------------------------------------------------*/
54 | /* Private variables ---------------------------------------------------------*/
55 | /* Private Constants ---------------------------------------------------------*/
56 | /* Private macros ------------------------------------------------------------*/
57 | /* Private functions ---------------------------------------------------------*/
58 | /** @addtogroup DMAEx_Private_Functions
59 | * @{
60 | */
61 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
62 | /**
63 | * @}
64 | */
65 |
66 | /* Exported functions ---------------------------------------------------------*/
67 |
68 | /** @addtogroup DMAEx_Exported_Functions
69 | * @{
70 | */
71 |
72 |
73 | /** @addtogroup DMAEx_Exported_Functions_Group1
74 | *
75 | @verbatim
76 | ===============================================================================
77 | ##### Extended features functions #####
78 | ===============================================================================
79 | [..] This section provides functions allowing to:
80 | (+) Configure the source, destination address and data length and
81 | Start MultiBuffer DMA transfer
82 | (+) Configure the source, destination address and data length and
83 | Start MultiBuffer DMA transfer with interrupt
84 | (+) Change on the fly the memory0 or memory1 address.
85 |
86 | @endverbatim
87 | * @{
88 | */
89 |
90 |
91 | /**
92 | * @brief Starts the multi_buffer DMA Transfer.
93 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
94 | * the configuration information for the specified DMA Stream.
95 | * @param SrcAddress The source memory Buffer address
96 | * @param DstAddress The destination memory Buffer address
97 | * @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
98 | * @param DataLength The length of data to be transferred from source to destination
99 | * @retval HAL status
100 | */
101 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
102 | {
103 | HAL_StatusTypeDef status = HAL_OK;
104 |
105 | /* Check the parameters */
106 | assert_param(IS_DMA_BUFFER_SIZE(DataLength));
107 |
108 | /* Memory-to-memory transfer not supported in double buffering mode */
109 | if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
110 | {
111 | hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
112 | status = HAL_ERROR;
113 | }
114 | else
115 | {
116 | /* Process Locked */
117 | __HAL_LOCK(hdma);
118 |
119 | if(HAL_DMA_STATE_READY == hdma->State)
120 | {
121 | /* Change DMA peripheral state */
122 | hdma->State = HAL_DMA_STATE_BUSY;
123 |
124 | /* Enable the double buffer mode */
125 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
126 |
127 | /* Configure DMA Stream destination address */
128 | hdma->Instance->M1AR = SecondMemAddress;
129 |
130 | /* Configure the source, destination address and the data length */
131 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
132 |
133 | /* Enable the peripheral */
134 | __HAL_DMA_ENABLE(hdma);
135 | }
136 | else
137 | {
138 | /* Return error status */
139 | status = HAL_BUSY;
140 | }
141 | }
142 | return status;
143 | }
144 |
145 | /**
146 | * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
147 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
148 | * the configuration information for the specified DMA Stream.
149 | * @param SrcAddress The source memory Buffer address
150 | * @param DstAddress The destination memory Buffer address
151 | * @param SecondMemAddress The second memory Buffer address in case of multi buffer Transfer
152 | * @param DataLength The length of data to be transferred from source to destination
153 | * @retval HAL status
154 | */
155 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
156 | {
157 | HAL_StatusTypeDef status = HAL_OK;
158 |
159 | /* Check the parameters */
160 | assert_param(IS_DMA_BUFFER_SIZE(DataLength));
161 |
162 | /* Memory-to-memory transfer not supported in double buffering mode */
163 | if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
164 | {
165 | hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
166 | return HAL_ERROR;
167 | }
168 |
169 | /* Check callback functions */
170 | if ((NULL == hdma->XferCpltCallback) || (NULL == hdma->XferM1CpltCallback) || (NULL == hdma->XferErrorCallback))
171 | {
172 | hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
173 | return HAL_ERROR;
174 | }
175 |
176 | /* Process locked */
177 | __HAL_LOCK(hdma);
178 |
179 | if(HAL_DMA_STATE_READY == hdma->State)
180 | {
181 | /* Change DMA peripheral state */
182 | hdma->State = HAL_DMA_STATE_BUSY;
183 |
184 | /* Initialize the error code */
185 | hdma->ErrorCode = HAL_DMA_ERROR_NONE;
186 |
187 | /* Enable the Double buffer mode */
188 | hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
189 |
190 | /* Configure DMA Stream destination address */
191 | hdma->Instance->M1AR = SecondMemAddress;
192 |
193 | /* Configure the source, destination address and the data length */
194 | DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
195 |
196 | /* Clear all flags */
197 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
198 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
199 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
200 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
201 | __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
202 |
203 | /* Enable Common interrupts*/
204 | hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
205 | hdma->Instance->FCR |= DMA_IT_FE;
206 |
207 | if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
208 | {
209 | hdma->Instance->CR |= DMA_IT_HT;
210 | }
211 |
212 | /* Enable the peripheral */
213 | __HAL_DMA_ENABLE(hdma);
214 | }
215 | else
216 | {
217 | /* Process unlocked */
218 | __HAL_UNLOCK(hdma);
219 |
220 | /* Return error status */
221 | status = HAL_BUSY;
222 | }
223 | return status;
224 | }
225 |
226 | /**
227 | * @brief Change the memory0 or memory1 address on the fly.
228 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
229 | * the configuration information for the specified DMA Stream.
230 | * @param Address The new address
231 | * @param memory the memory to be changed, This parameter can be one of
232 | * the following values:
233 | * MEMORY0 /
234 | * MEMORY1
235 | * @note The MEMORY0 address can be changed only when the current transfer use
236 | * MEMORY1 and the MEMORY1 address can be changed only when the current
237 | * transfer use MEMORY0.
238 | * @retval HAL status
239 | */
240 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
241 | {
242 | if(memory == MEMORY0)
243 | {
244 | /* change the memory0 address */
245 | hdma->Instance->M0AR = Address;
246 | }
247 | else
248 | {
249 | /* change the memory1 address */
250 | hdma->Instance->M1AR = Address;
251 | }
252 |
253 | return HAL_OK;
254 | }
255 |
256 | /**
257 | * @}
258 | */
259 |
260 | /**
261 | * @}
262 | */
263 |
264 | /** @addtogroup DMAEx_Private_Functions
265 | * @{
266 | */
267 |
268 | /**
269 | * @brief Set the DMA Transfer parameter.
270 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains
271 | * the configuration information for the specified DMA Stream.
272 | * @param SrcAddress The source memory Buffer address
273 | * @param DstAddress The destination memory Buffer address
274 | * @param DataLength The length of data to be transferred from source to destination
275 | * @retval HAL status
276 | */
277 | static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
278 | {
279 | /* Configure DMA Stream data length */
280 | hdma->Instance->NDTR = DataLength;
281 |
282 | /* Peripheral to Memory */
283 | if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
284 | {
285 | /* Configure DMA Stream destination address */
286 | hdma->Instance->PAR = DstAddress;
287 |
288 | /* Configure DMA Stream source address */
289 | hdma->Instance->M0AR = SrcAddress;
290 | }
291 | /* Memory to Peripheral */
292 | else
293 | {
294 | /* Configure DMA Stream source address */
295 | hdma->Instance->PAR = SrcAddress;
296 |
297 | /* Configure DMA Stream destination address */
298 | hdma->Instance->M0AR = DstAddress;
299 | }
300 | }
301 |
302 | /**
303 | * @}
304 | */
305 |
306 | #endif /* HAL_DMA_MODULE_ENABLED */
307 | /**
308 | * @}
309 | */
310 |
311 | /**
312 | * @}
313 | */
314 |
315 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
316 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_flash_ramfunc.c
4 | * @author MCD Application Team
5 | * @brief FLASH RAMFUNC module driver.
6 | * This file provides a FLASH firmware functions which should be
7 | * executed from internal SRAM
8 | * + Stop/Start the flash interface while System Run
9 | * + Enable/Disable the flash sleep while System Run
10 | @verbatim
11 | ==============================================================================
12 | ##### APIs executed from Internal RAM #####
13 | ==============================================================================
14 | [..]
15 | *** ARM Compiler ***
16 | --------------------
17 | [..] RAM functions are defined using the toolchain options.
18 | Functions that are be executed in RAM should reside in a separate
19 | source module. Using the 'Options for File' dialog you can simply change
20 | the 'Code / Const' area of a module to a memory space in physical RAM.
21 | Available memory areas are declared in the 'Target' tab of the
22 | Options for Target' dialog.
23 |
24 | *** ICCARM Compiler ***
25 | -----------------------
26 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc".
27 |
28 | *** GNU Compiler ***
29 | --------------------
30 | [..] RAM functions are defined using a specific toolchain attribute
31 | "__attribute__((section(".RamFunc")))".
32 |
33 | @endverbatim
34 | ******************************************************************************
35 | * @attention
36 | *
37 | * © Copyright (c) 2017 STMicroelectronics.
38 | * All rights reserved.
39 | *
40 | * This software component is licensed by ST under BSD 3-Clause license,
41 | * the "License"; You may not use this file except in compliance with the
42 | * License. You may obtain a copy of the License at:
43 | * opensource.org/licenses/BSD-3-Clause
44 | *
45 | ******************************************************************************
46 | */
47 |
48 | /* Includes ------------------------------------------------------------------*/
49 | #include "stm32f4xx_hal.h"
50 |
51 | /** @addtogroup STM32F4xx_HAL_Driver
52 | * @{
53 | */
54 |
55 | /** @defgroup FLASH_RAMFUNC FLASH RAMFUNC
56 | * @brief FLASH functions executed from RAM
57 | * @{
58 | */
59 | #ifdef HAL_FLASH_MODULE_ENABLED
60 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
61 | defined(STM32F412Rx) || defined(STM32F412Cx)
62 |
63 | /* Private typedef -----------------------------------------------------------*/
64 | /* Private define ------------------------------------------------------------*/
65 | /* Private macro -------------------------------------------------------------*/
66 | /* Private variables ---------------------------------------------------------*/
67 | /* Private function prototypes -----------------------------------------------*/
68 | /* Exported functions --------------------------------------------------------*/
69 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions
70 | * @{
71 | */
72 |
73 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM
74 | * @brief Peripheral Extended features functions
75 | *
76 | @verbatim
77 |
78 | ===============================================================================
79 | ##### ramfunc functions #####
80 | ===============================================================================
81 | [..]
82 | This subsection provides a set of functions that should be executed from RAM
83 | transfers.
84 |
85 | @endverbatim
86 | * @{
87 | */
88 |
89 | /**
90 | * @brief Stop the flash interface while System Run
91 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
92 | * @note This mode couldn't be set while executing with the flash itself.
93 | * It should be done with specific routine executed from RAM.
94 | * @retval HAL status
95 | */
96 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void)
97 | {
98 | /* Enable Power ctrl clock */
99 | __HAL_RCC_PWR_CLK_ENABLE();
100 | /* Stop the flash interface while System Run */
101 | SET_BIT(PWR->CR, PWR_CR_FISSR);
102 |
103 | return HAL_OK;
104 | }
105 |
106 | /**
107 | * @brief Start the flash interface while System Run
108 | * @note This mode is only available for STM32F411xx/STM32F446xx devices.
109 | * @note This mode couldn't be set while executing with the flash itself.
110 | * It should be done with specific routine executed from RAM.
111 | * @retval HAL status
112 | */
113 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void)
114 | {
115 | /* Enable Power ctrl clock */
116 | __HAL_RCC_PWR_CLK_ENABLE();
117 | /* Start the flash interface while System Run */
118 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR);
119 |
120 | return HAL_OK;
121 | }
122 |
123 | /**
124 | * @brief Enable the flash sleep while System Run
125 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
126 | * @note This mode could n't be set while executing with the flash itself.
127 | * It should be done with specific routine executed from RAM.
128 | * @retval HAL status
129 | */
130 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void)
131 | {
132 | /* Enable Power ctrl clock */
133 | __HAL_RCC_PWR_CLK_ENABLE();
134 | /* Enable the flash sleep while System Run */
135 | SET_BIT(PWR->CR, PWR_CR_FMSSR);
136 |
137 | return HAL_OK;
138 | }
139 |
140 | /**
141 | * @brief Disable the flash sleep while System Run
142 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices.
143 | * @note This mode couldn't be set while executing with the flash itself.
144 | * It should be done with specific routine executed from RAM.
145 | * @retval HAL status
146 | */
147 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void)
148 | {
149 | /* Enable Power ctrl clock */
150 | __HAL_RCC_PWR_CLK_ENABLE();
151 | /* Disable the flash sleep while System Run */
152 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR);
153 |
154 | return HAL_OK;
155 | }
156 |
157 | /**
158 | * @}
159 | */
160 |
161 | /**
162 | * @}
163 | */
164 |
165 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */
166 | #endif /* HAL_FLASH_MODULE_ENABLED */
167 | /**
168 | * @}
169 | */
170 |
171 | /**
172 | * @}
173 | */
174 |
175 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
176 |
--------------------------------------------------------------------------------
/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * @file stm32f4xx_hal_i2c_ex.c
4 | * @author MCD Application Team
5 | * @brief I2C Extension HAL module driver.
6 | * This file provides firmware functions to manage the following
7 | * functionalities of I2C extension peripheral:
8 | * + Extension features functions
9 | *
10 | @verbatim
11 | ==============================================================================
12 | ##### I2C peripheral extension features #####
13 | ==============================================================================
14 |
15 | [..] Comparing to other previous devices, the I2C interface for STM32F427xx/437xx/
16 | 429xx/439xx devices contains the following additional features :
17 |
18 | (+) Possibility to disable or enable Analog Noise Filter
19 | (+) Use of a configured Digital Noise Filter
20 |
21 | ##### How to use this driver #####
22 | ==============================================================================
23 | [..] This driver provides functions to configure Noise Filter
24 | (#) Configure I2C Analog noise filter using the function HAL_I2C_AnalogFilter_Config()
25 | (#) Configure I2C Digital noise filter using the function HAL_I2C_DigitalFilter_Config()
26 |
27 | @endverbatim
28 | ******************************************************************************
29 | * @attention
30 | *
31 | * © Copyright (c) 2016 STMicroelectronics.
32 | * All rights reserved.
33 | *
34 | * This software component is licensed by ST under BSD 3-Clause license,
35 | * the "License"; You may not use this file except in compliance with the
36 | * License. You may obtain a copy of the License at:
37 | * opensource.org/licenses/BSD-3-Clause
38 | *
39 | ******************************************************************************
40 | */
41 |
42 | /* Includes ------------------------------------------------------------------*/
43 | #include "stm32f4xx_hal.h"
44 |
45 | /** @addtogroup STM32F4xx_HAL_Driver
46 | * @{
47 | */
48 |
49 | /** @defgroup I2CEx I2CEx
50 | * @brief I2C HAL module driver
51 | * @{
52 | */
53 |
54 | #ifdef HAL_I2C_MODULE_ENABLED
55 |
56 | #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
57 | /* Private typedef -----------------------------------------------------------*/
58 | /* Private define ------------------------------------------------------------*/
59 | /* Private macro -------------------------------------------------------------*/
60 | /* Private variables ---------------------------------------------------------*/
61 | /* Private function prototypes -----------------------------------------------*/
62 | /* Exported functions --------------------------------------------------------*/
63 | /** @defgroup I2CEx_Exported_Functions I2C Exported Functions
64 | * @{
65 | */
66 |
67 |
68 | /** @defgroup I2CEx_Exported_Functions_Group1 Extension features functions
69 | * @brief Extension features functions
70 | *
71 | @verbatim
72 | ===============================================================================
73 | ##### Extension features functions #####
74 | ===============================================================================
75 | [..] This section provides functions allowing to:
76 | (+) Configure Noise Filters
77 |
78 | @endverbatim
79 | * @{
80 | */
81 |
82 | /**
83 | * @brief Configures I2C Analog noise filter.
84 | * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
85 | * the configuration information for the specified I2Cx peripheral.
86 | * @param AnalogFilter new state of the Analog filter.
87 | * @retval HAL status
88 | */
89 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
90 | {
91 | /* Check the parameters */
92 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
93 | assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
94 |
95 | if (hi2c->State == HAL_I2C_STATE_READY)
96 | {
97 | hi2c->State = HAL_I2C_STATE_BUSY;
98 |
99 | /* Disable the selected I2C peripheral */
100 | __HAL_I2C_DISABLE(hi2c);
101 |
102 | /* Reset I2Cx ANOFF bit */
103 | hi2c->Instance->FLTR &= ~(I2C_FLTR_ANOFF);
104 |
105 | /* Disable the analog filter */
106 | hi2c->Instance->FLTR |= AnalogFilter;
107 |
108 | __HAL_I2C_ENABLE(hi2c);
109 |
110 | hi2c->State = HAL_I2C_STATE_READY;
111 |
112 | return HAL_OK;
113 | }
114 | else
115 | {
116 | return HAL_BUSY;
117 | }
118 | }
119 |
120 | /**
121 | * @brief Configures I2C Digital noise filter.
122 | * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
123 | * the configuration information for the specified I2Cx peripheral.
124 | * @param DigitalFilter Coefficient of digital noise filter between 0x00 and 0x0F.
125 | * @retval HAL status
126 | */
127 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
128 | {
129 | uint16_t tmpreg = 0;
130 |
131 | /* Check the parameters */
132 | assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
133 | assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
134 |
135 | if (hi2c->State == HAL_I2C_STATE_READY)
136 | {
137 | hi2c->State = HAL_I2C_STATE_BUSY;
138 |
139 | /* Disable the selected I2C peripheral */
140 | __HAL_I2C_DISABLE(hi2c);
141 |
142 | /* Get the old register value */
143 | tmpreg = hi2c->Instance->FLTR;
144 |
145 | /* Reset I2Cx DNF bit [3:0] */
146 | tmpreg &= ~(I2C_FLTR_DNF);
147 |
148 | /* Set I2Cx DNF coefficient */
149 | tmpreg |= DigitalFilter;
150 |
151 | /* Store the new register value */
152 | hi2c->Instance->FLTR = tmpreg;
153 |
154 | __HAL_I2C_ENABLE(hi2c);
155 |
156 | hi2c->State = HAL_I2C_STATE_READY;
157 |
158 | return HAL_OK;
159 | }
160 | else
161 | {
162 | return HAL_BUSY;
163 | }
164 | }
165 |
166 | /**
167 | * @}
168 | */
169 |
170 | /**
171 | * @}
172 | */
173 | #endif
174 |
175 | #endif /* HAL_I2C_MODULE_ENABLED */
176 | /**
177 | * @}
178 | */
179 |
180 | /**
181 | * @}
182 | */
183 |
184 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
185 |
--------------------------------------------------------------------------------
/Inc/PCF8563.h:
--------------------------------------------------------------------------------
1 | /*
2 | * PCF8563.h
3 | *
4 | * The MIT License.
5 | * Created on: 5.09.2019
6 | * Author: Mateusz Salamon
7 | * Contact: mateusz@msalamon.pl
8 | *
9 | * Website: https://msalamon.pl/dalsze-zmagania-z-rtc-ds1307-i-pcf8563-na-stm32/
10 | * GitHub: https://github.com/lamik/PCF8563_RTC_STM32_HAL
11 | */
12 |
13 | //
14 | // Uncomment when you are using DMA reading
15 | //
16 | #define PCF8563_USE_DMA
17 |
18 | #define PCF8563_ADDRESS (0x51<<1)
19 | #define PCF8563_I2C_TIMEOUT 100
20 |
21 | #define PCF8563_REG_CONTROL_STATUS1 0x00
22 | #define PCF8563_REG_CONTROL_STATUS2 0x01
23 | #define PCF8563_REG_TIME 0x02
24 | #define PCF8563_REG_SECONDS 0x02
25 | #define PCF8563_REG_MINUTES 0x03
26 | #define PCF8563_REG_HOURS 0x04
27 | #define PCF8563_REG_DATE 0x05
28 | #define PCF8563_REG_WEEKDAY 0x06
29 | #define PCF8563_REG_MONTH 0x07
30 | #define PCF8563_REG_YEAR 0x08
31 | #define PCF8563_REG_ALARM_MINUTE 0x09
32 | #define PCF8563_REG_ALARM_HOUR 0x0A
33 | #define PCF8563_REG_ALARM_DAY 0x0B
34 | #define PCF8563_REG_ALARM_WEEKDAY 0x0C
35 | #define PCF8563_REG_CLKOUT 0x0D
36 | #define PCF8563_REG_TIMER_CONTROL 0x0E
37 | #define PCF8563_REG_TIMER 0x0F
38 |
39 | //
40 | // Controll register 1 0x00
41 | //
42 | #define PCF8563_CONTROL1_TEST1 7
43 | #define PCF8563_CONTROL1_STOP 5
44 | #define PCF8563_CONTROL1_TESTC 3
45 |
46 | //
47 | // Controll register 2 0x01
48 | //
49 | #define PCF8563_CONTROL2_TI_TP 4
50 | #define PCF8563_CONTROL2_AF 3
51 | #define PCF8563_CONTROL2_TF 2
52 | #define PCF8563_CONTROL2_AIE 1
53 | #define PCF8563_CONTROL2_TIE 0
54 |
55 | //
56 | // CLKOUT control register 0x0D
57 | //
58 | #define PCF8563_CLKOUT_CONTROL_FE 7
59 | #define PCF8563_CLKOUT_CONTROL_FD1 1
60 | #define PCF8563_CLKOUT_CONTROL_FD0 0
61 |
62 | typedef enum
63 | {
64 | CLKOUT_FREQ_1HZ = 3,
65 | CLKOUT_FREQ_32HZ = 2,
66 | CLKOUT_FREQ_1024HZ = 1,
67 | CLKOUT_FREQ_32768HZ = 0
68 | }CLKOUT_Freq;
69 |
70 | typedef struct
71 | {
72 | uint16_t Year;
73 | uint8_t Month;
74 | uint8_t Day;
75 | uint8_t Hour;
76 | uint8_t Minute;
77 | uint8_t Second;
78 | uint8_t DayOfWeek;
79 | }RTCDateTime;
80 |
81 | void PCF8563_TEST1Enable(uint8_t Enable);
82 | void PCF8563_STOPEnable(uint8_t Enable);
83 | void PCF8563_TESTCEnable(uint8_t Enable);
84 | void PCF8563_InterruptEnable(uint8_t Enable);
85 | void PCF8563_AlarmFlagEnable(uint8_t Enable);
86 | void PCF8563_TimerFlagEnable(uint8_t Enable);
87 | void PCF8563_AlarmInterruptEnable(uint8_t Enable);
88 | void PCF8563_TimerInterruptEnable(uint8_t Enable);
89 |
90 | void PCF8563_ClkoutFrequency(CLKOUT_Freq Frequency);
91 |
92 | #ifdef PCF8563_USE_DMA
93 | void PCF8563_ReceiveDateTimeDMA(void); // Use in PCF8563 Interrupt handler
94 | void PCF8563_CalculateDateTime(RTCDateTime *DateTime); // Use in DMA Complete Receive interrupt
95 | #else
96 | void PCF8563_GetDateTime(RTCDateTime *DateTime); // Use in blocking/interrupt mode in PCF8563_INT EXTI handler
97 | #endif
98 |
99 | void PCF8563_Init(I2C_HandleTypeDef *hi2c);
100 |
--------------------------------------------------------------------------------
/Inc/dma.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : dma.h
4 | * Description : This file contains all the function prototypes for
5 | * the dma.c file
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __dma_H
21 | #define __dma_H
22 |
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "main.h"
29 |
30 | /* DMA memory to memory transfer handles -------------------------------------*/
31 |
32 | /* USER CODE BEGIN Includes */
33 |
34 | /* USER CODE END Includes */
35 |
36 | /* USER CODE BEGIN Private defines */
37 |
38 | /* USER CODE END Private defines */
39 |
40 | void MX_DMA_Init(void);
41 |
42 | /* USER CODE BEGIN Prototypes */
43 |
44 | /* USER CODE END Prototypes */
45 |
46 | #ifdef __cplusplus
47 | }
48 | #endif
49 |
50 | #endif /* __dma_H */
51 |
52 | /**
53 | * @}
54 | */
55 |
56 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
57 |
--------------------------------------------------------------------------------
/Inc/gpio.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.h
4 | * Description : This file contains all the functions prototypes for
5 | * the gpio
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Define to prevent recursive inclusion -------------------------------------*/
21 | #ifndef __gpio_H
22 | #define __gpio_H
23 | #ifdef __cplusplus
24 | extern "C" {
25 | #endif
26 |
27 | /* Includes ------------------------------------------------------------------*/
28 | #include "main.h"
29 |
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* USER CODE BEGIN Private defines */
35 |
36 | /* USER CODE END Private defines */
37 |
38 | void MX_GPIO_Init(void);
39 |
40 | /* USER CODE BEGIN Prototypes */
41 |
42 | /* USER CODE END Prototypes */
43 |
44 | #ifdef __cplusplus
45 | }
46 | #endif
47 | #endif /*__ pinoutConfig_H */
48 |
49 | /**
50 | * @}
51 | */
52 |
53 | /**
54 | * @}
55 | */
56 |
57 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
58 |
--------------------------------------------------------------------------------
/Inc/i2c.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : I2C.h
4 | * Description : This file provides code for the configuration
5 | * of the I2C instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __i2c_H
21 | #define __i2c_H
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "main.h"
28 |
29 | /* USER CODE BEGIN Includes */
30 |
31 | /* USER CODE END Includes */
32 |
33 | extern I2C_HandleTypeDef hi2c1;
34 |
35 | /* USER CODE BEGIN Private defines */
36 |
37 | /* USER CODE END Private defines */
38 |
39 | void MX_I2C1_Init(void);
40 |
41 | /* USER CODE BEGIN Prototypes */
42 |
43 | /* USER CODE END Prototypes */
44 |
45 | #ifdef __cplusplus
46 | }
47 | #endif
48 | #endif /*__ i2c_H */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
59 |
--------------------------------------------------------------------------------
/Inc/main.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.h
5 | * @brief : Header for main.c file.
6 | * This file contains the common defines of the application.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Define to prevent recursive inclusion -------------------------------------*/
23 | #ifndef __MAIN_H
24 | #define __MAIN_H
25 |
26 | #ifdef __cplusplus
27 | extern "C" {
28 | #endif
29 |
30 | /* Includes ------------------------------------------------------------------*/
31 | #include "stm32f4xx_hal.h"
32 | #include "stm32f4xx_hal.h"
33 |
34 | /* Private includes ----------------------------------------------------------*/
35 | /* USER CODE BEGIN Includes */
36 |
37 | /* USER CODE END Includes */
38 |
39 | /* Exported types ------------------------------------------------------------*/
40 | /* USER CODE BEGIN ET */
41 |
42 | /* USER CODE END ET */
43 |
44 | /* Exported constants --------------------------------------------------------*/
45 | /* USER CODE BEGIN EC */
46 |
47 | /* USER CODE END EC */
48 |
49 | /* Exported macro ------------------------------------------------------------*/
50 | /* USER CODE BEGIN EM */
51 |
52 | /* USER CODE END EM */
53 |
54 | /* Exported functions prototypes ---------------------------------------------*/
55 | void Error_Handler(void);
56 |
57 | /* USER CODE BEGIN EFP */
58 |
59 | /* USER CODE END EFP */
60 |
61 | /* Private defines -----------------------------------------------------------*/
62 | #define B1_Pin GPIO_PIN_13
63 | #define B1_GPIO_Port GPIOC
64 | #define USART_TX_Pin GPIO_PIN_2
65 | #define USART_TX_GPIO_Port GPIOA
66 | #define USART_RX_Pin GPIO_PIN_3
67 | #define USART_RX_GPIO_Port GPIOA
68 | #define LD2_Pin GPIO_PIN_5
69 | #define LD2_GPIO_Port GPIOA
70 | #define TEST_Pin GPIO_PIN_8
71 | #define TEST_GPIO_Port GPIOA
72 | #define PCF8563_INT_Pin GPIO_PIN_9
73 | #define PCF8563_INT_GPIO_Port GPIOA
74 | #define PCF8563_INT_EXTI_IRQn EXTI9_5_IRQn
75 | #define TMS_Pin GPIO_PIN_13
76 | #define TMS_GPIO_Port GPIOA
77 | #define TCK_Pin GPIO_PIN_14
78 | #define TCK_GPIO_Port GPIOA
79 | #define SWO_Pin GPIO_PIN_3
80 | #define SWO_GPIO_Port GPIOB
81 | /* USER CODE BEGIN Private defines */
82 |
83 | /* USER CODE END Private defines */
84 |
85 | #ifdef __cplusplus
86 | }
87 | #endif
88 |
89 | #endif /* __MAIN_H */
90 |
91 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
92 |
--------------------------------------------------------------------------------
/Inc/stm32f4xx_it.h:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32f4xx_it.h
5 | * @brief This file contains the headers of the interrupt handlers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Define to prevent recursive inclusion -------------------------------------*/
22 | #ifndef __STM32F4xx_IT_H
23 | #define __STM32F4xx_IT_H
24 |
25 | #ifdef __cplusplus
26 | extern "C" {
27 | #endif
28 |
29 | /* Private includes ----------------------------------------------------------*/
30 | /* USER CODE BEGIN Includes */
31 |
32 | /* USER CODE END Includes */
33 |
34 | /* Exported types ------------------------------------------------------------*/
35 | /* USER CODE BEGIN ET */
36 |
37 | /* USER CODE END ET */
38 |
39 | /* Exported constants --------------------------------------------------------*/
40 | /* USER CODE BEGIN EC */
41 |
42 | /* USER CODE END EC */
43 |
44 | /* Exported macro ------------------------------------------------------------*/
45 | /* USER CODE BEGIN EM */
46 |
47 | /* USER CODE END EM */
48 |
49 | /* Exported functions prototypes ---------------------------------------------*/
50 | void NMI_Handler(void);
51 | void HardFault_Handler(void);
52 | void MemManage_Handler(void);
53 | void BusFault_Handler(void);
54 | void UsageFault_Handler(void);
55 | void SVC_Handler(void);
56 | void DebugMon_Handler(void);
57 | void PendSV_Handler(void);
58 | void SysTick_Handler(void);
59 | void DMA1_Stream0_IRQHandler(void);
60 | void DMA1_Stream1_IRQHandler(void);
61 | void EXTI9_5_IRQHandler(void);
62 | /* USER CODE BEGIN EFP */
63 |
64 | /* USER CODE END EFP */
65 |
66 | #ifdef __cplusplus
67 | }
68 | #endif
69 |
70 | #endif /* __STM32F4xx_IT_H */
71 |
72 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
73 |
--------------------------------------------------------------------------------
/Inc/usart.h:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : USART.h
4 | * Description : This file provides code for the configuration
5 | * of the USART instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* Define to prevent recursive inclusion -------------------------------------*/
20 | #ifndef __usart_H
21 | #define __usart_H
22 | #ifdef __cplusplus
23 | extern "C" {
24 | #endif
25 |
26 | /* Includes ------------------------------------------------------------------*/
27 | #include "main.h"
28 |
29 | /* USER CODE BEGIN Includes */
30 |
31 | /* USER CODE END Includes */
32 |
33 | extern UART_HandleTypeDef huart2;
34 |
35 | /* USER CODE BEGIN Private defines */
36 |
37 | /* USER CODE END Private defines */
38 |
39 | void MX_USART2_UART_Init(void);
40 |
41 | /* USER CODE BEGIN Prototypes */
42 |
43 | /* USER CODE END Prototypes */
44 |
45 | #ifdef __cplusplus
46 | }
47 | #endif
48 | #endif /*__ usart_H */
49 |
50 | /**
51 | * @}
52 | */
53 |
54 | /**
55 | * @}
56 | */
57 |
58 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
59 |
--------------------------------------------------------------------------------
/LICENSE:
--------------------------------------------------------------------------------
1 | Copyright (c) 2018 Mateusz Salamon
2 |
3 | Permission is hereby granted, free of charge, to any person obtaining a copy
4 | of this software and associated documentation files (the "Software"), to deal
5 | in the Software without restriction, including without limitation the rights
6 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 | copies of the Software, and to permit persons to whom the Software is
8 | furnished to do so, subject to the following conditions:
9 |
10 | The above copyright notice and this permission notice shall be included in
11 | all copies or substantial portions of the Software.
12 |
13 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 | THE SOFTWARE.
--------------------------------------------------------------------------------
/PCF8563.elf.launch:
--------------------------------------------------------------------------------
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--------------------------------------------------------------------------------
/PCF8563.ioc:
--------------------------------------------------------------------------------
1 | #MicroXplorer Configuration settings - do not modify
2 | Dma.I2C1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
3 | Dma.I2C1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
4 | Dma.I2C1_RX.0.Instance=DMA1_Stream0
5 | Dma.I2C1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
6 | Dma.I2C1_RX.0.MemInc=DMA_MINC_ENABLE
7 | Dma.I2C1_RX.0.Mode=DMA_NORMAL
8 | Dma.I2C1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
9 | Dma.I2C1_RX.0.PeriphInc=DMA_PINC_DISABLE
10 | Dma.I2C1_RX.0.Priority=DMA_PRIORITY_LOW
11 | Dma.I2C1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
12 | Dma.I2C1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
13 | Dma.I2C1_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE
14 | Dma.I2C1_TX.1.Instance=DMA1_Stream1
15 | Dma.I2C1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
16 | Dma.I2C1_TX.1.MemInc=DMA_MINC_ENABLE
17 | Dma.I2C1_TX.1.Mode=DMA_NORMAL
18 | Dma.I2C1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
19 | Dma.I2C1_TX.1.PeriphInc=DMA_PINC_DISABLE
20 | Dma.I2C1_TX.1.Priority=DMA_PRIORITY_LOW
21 | Dma.I2C1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
22 | Dma.Request0=I2C1_RX
23 | Dma.Request1=I2C1_TX
24 | Dma.RequestsNb=2
25 | File.Version=6
26 | I2C1.I2C_Mode=I2C_Fast
27 | I2C1.IPParameters=I2C_Mode
28 | KeepUserPlacement=true
29 | Mcu.Family=STM32F4
30 | Mcu.IP0=DMA
31 | Mcu.IP1=I2C1
32 | Mcu.IP2=NVIC
33 | Mcu.IP3=RCC
34 | Mcu.IP4=SYS
35 | Mcu.IP5=USART2
36 | Mcu.IPNb=6
37 | Mcu.Name=STM32F410R(8-B)Tx
38 | Mcu.Package=LQFP64
39 | Mcu.Pin0=PC13-ANTI_TAMP
40 | Mcu.Pin1=PC14-OSC32_IN
41 | Mcu.Pin10=PA13
42 | Mcu.Pin11=PA14
43 | Mcu.Pin12=PB3
44 | Mcu.Pin13=PB8
45 | Mcu.Pin14=PB9
46 | Mcu.Pin15=VP_SYS_VS_Systick
47 | Mcu.Pin2=PC15-OSC32_OUT
48 | Mcu.Pin3=PH0 - OSC_IN
49 | Mcu.Pin4=PH1 - OSC_OUT
50 | Mcu.Pin5=PA2
51 | Mcu.Pin6=PA3
52 | Mcu.Pin7=PA5
53 | Mcu.Pin8=PA8
54 | Mcu.Pin9=PA9
55 | Mcu.PinsNb=16
56 | Mcu.ThirdPartyNb=0
57 | Mcu.UserConstants=
58 | Mcu.UserName=STM32F410RBTx
59 | MxCube.Version=5.3.0
60 | MxDb.Version=DB.5.0.30
61 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
62 | NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true
63 | NVIC.DMA1_Stream1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
64 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false
65 | NVIC.EXTI9_5_IRQn=true\:0\:0\:false\:false\:true\:true\:true
66 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
67 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false
68 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:false
69 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
70 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_0
71 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
72 | NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true\:true
73 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false
74 | PA13.GPIOParameters=GPIO_Label
75 | PA13.GPIO_Label=TMS
76 | PA13.Locked=true
77 | PA13.Mode=Serial_Wire
78 | PA13.Signal=SYS_JTMS-SWDIO
79 | PA14.GPIOParameters=GPIO_Label
80 | PA14.GPIO_Label=TCK
81 | PA14.Locked=true
82 | PA14.Mode=Serial_Wire
83 | PA14.Signal=SYS_JTCK-SWCLK
84 | PA2.GPIOParameters=GPIO_Label
85 | PA2.GPIO_Label=USART_TX
86 | PA2.Locked=true
87 | PA2.Mode=Asynchronous
88 | PA2.Signal=USART2_TX
89 | PA3.GPIOParameters=GPIO_Label
90 | PA3.GPIO_Label=USART_RX
91 | PA3.Locked=true
92 | PA3.Mode=Asynchronous
93 | PA3.Signal=USART2_RX
94 | PA5.GPIOParameters=GPIO_Label
95 | PA5.GPIO_Label=LD2 [Green Led]
96 | PA5.Locked=true
97 | PA5.Signal=GPIO_Output
98 | PA8.GPIOParameters=GPIO_Label
99 | PA8.GPIO_Label=TEST
100 | PA8.Locked=true
101 | PA8.Signal=GPIO_Output
102 | PA9.GPIOParameters=GPIO_Label
103 | PA9.GPIO_Label=PCF8563_INT
104 | PA9.Locked=true
105 | PA9.Signal=GPXTI9
106 | PB3.GPIOParameters=GPIO_Label
107 | PB3.GPIO_Label=SWO
108 | PB3.Locked=true
109 | PB3.Signal=SYS_JTDO-SWO
110 | PB8.Locked=true
111 | PB8.Mode=I2C
112 | PB8.Signal=I2C1_SCL
113 | PB9.Locked=true
114 | PB9.Mode=I2C
115 | PB9.Signal=I2C1_SDA
116 | PC13-ANTI_TAMP.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
117 | PC13-ANTI_TAMP.GPIO_Label=B1 [Blue PushButton]
118 | PC13-ANTI_TAMP.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
119 | PC13-ANTI_TAMP.Locked=true
120 | PC13-ANTI_TAMP.Signal=GPXTI13
121 | PC14-OSC32_IN.Locked=true
122 | PC14-OSC32_IN.Mode=LSE-External-Oscillator
123 | PC14-OSC32_IN.Signal=RCC_OSC32_IN
124 | PC15-OSC32_OUT.Locked=true
125 | PC15-OSC32_OUT.Mode=LSE-External-Oscillator
126 | PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
127 | PCC.Checker=false
128 | PCC.Line=STM32F410
129 | PCC.MCU=STM32F410R(8-B)Tx
130 | PCC.PartNumber=STM32F410RBTx
131 | PCC.Seq0=0
132 | PCC.Series=STM32F4
133 | PCC.Temperature=25
134 | PCC.Vdd=null
135 | PH0\ -\ OSC_IN.Locked=true
136 | PH0\ -\ OSC_IN.Mode=HSE-External-Clock-Source
137 | PH0\ -\ OSC_IN.Signal=RCC_OSC_IN
138 | PH1\ -\ OSC_OUT.Locked=true
139 | PH1\ -\ OSC_OUT.Mode=HSE-External-Clock-Source
140 | PH1\ -\ OSC_OUT.Signal=RCC_OSC_OUT
141 | PinOutPanel.RotationAngle=0
142 | ProjectManager.AskForMigrate=true
143 | ProjectManager.BackupPrevious=false
144 | ProjectManager.CompilerOptimize=6
145 | ProjectManager.ComputerToolchain=false
146 | ProjectManager.CoupleFile=true
147 | ProjectManager.CustomerFirmwarePackage=
148 | ProjectManager.DefaultFWLocation=true
149 | ProjectManager.DeletePrevious=true
150 | ProjectManager.DeviceId=STM32F410RBTx
151 | ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.24.1
152 | ProjectManager.FreePins=false
153 | ProjectManager.HalAssertFull=false
154 | ProjectManager.HeapSize=0x200
155 | ProjectManager.KeepUserCode=true
156 | ProjectManager.LastFirmware=true
157 | ProjectManager.LibraryCopy=1
158 | ProjectManager.MainLocation=Src
159 | ProjectManager.NoMain=false
160 | ProjectManager.PreviousToolchain=
161 | ProjectManager.ProjectBuild=false
162 | ProjectManager.ProjectFileName=PCF8563.ioc
163 | ProjectManager.ProjectName=PCF8563
164 | ProjectManager.StackSize=0x400
165 | ProjectManager.TargetToolchain=STM32CubeIDE
166 | ProjectManager.ToolChainLocation=
167 | ProjectManager.UnderRoot=true
168 | ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_USART2_UART_Init-USART2-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true
169 | RCC.48MHZClocksFreq_Value=84000000
170 | RCC.AHBFreq_Value=84000000
171 | RCC.APB1CLKDivider=RCC_HCLK_DIV2
172 | RCC.APB1Freq_Value=42000000
173 | RCC.APB1TimFreq_Value=84000000
174 | RCC.APB2Freq_Value=84000000
175 | RCC.APB2TimFreq_Value=84000000
176 | RCC.CortexFreq_Value=84000000
177 | RCC.EthernetFreq_Value=84000000
178 | RCC.FCLKCortexFreq_Value=84000000
179 | RCC.FLatency-AdvancedSettings=FLASH_LATENCY_2
180 | RCC.FMPI2C1Freq_Value=42000000
181 | RCC.FamilyName=M
182 | RCC.HCLKFreq_Value=84000000
183 | RCC.HSE_VALUE=8000000
184 | RCC.HSI_VALUE=16000000
185 | RCC.I2SClocksFreq_Value=168000000
186 | RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FLatency-AdvancedSettings,FMPI2C1Freq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLN,PLLP,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOInputMFreq_Value,VCOOutputFreq_Value,VCOQOutputFreq_Value,VCOROutputFreq_Value,VcooutputI2S
187 | RCC.LPTIM1Freq_Value=42000000
188 | RCC.LSI_VALUE=32000
189 | RCC.MCO2PinFreq_Value=84000000
190 | RCC.PLLCLKFreq_Value=84000000
191 | RCC.PLLN=336
192 | RCC.PLLP=RCC_PLLP_DIV4
193 | RCC.RTCFreq_Value=32000
194 | RCC.RTCHSEDivFreq_Value=4000000
195 | RCC.SYSCLKFreq_VALUE=84000000
196 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
197 | RCC.VCOI2SOutputFreq_Value=192000000
198 | RCC.VCOInputFreq_Value=1000000
199 | RCC.VCOInputMFreq_Value=1000000
200 | RCC.VCOOutputFreq_Value=336000000
201 | RCC.VCOQOutputFreq_Value=84000000
202 | RCC.VCOROutputFreq_Value=168000000
203 | RCC.VcooutputI2S=96000000
204 | SH.GPXTI13.0=GPIO_EXTI13
205 | SH.GPXTI13.ConfNb=1
206 | SH.GPXTI9.0=GPIO_EXTI9
207 | SH.GPXTI9.ConfNb=1
208 | USART2.IPParameters=VirtualMode
209 | USART2.VirtualMode=VM_ASYNC
210 | VP_SYS_VS_Systick.Mode=SysTick
211 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick
212 | board=NUCLEO-F410RB
213 | boardIOC=true
214 | isbadioc=false
215 |
--------------------------------------------------------------------------------
/README.md:
--------------------------------------------------------------------------------
1 | PCF8563 RTC with STM32 HAL.
2 |
3 | STM43F410RB
4 |
5 | STM32CubeIDE 1.0.2
6 |
7 | HAL F4 1.24.1
8 |
9 | Description: https://msalamon.pl/dalsze-zmagania-z-rtc-ds1307-i-pcf8563-na-stm32/
10 |
11 | GitHub: https://github.com/lamik/DS1307_RTC_STM32_HAL
12 |
13 | Contact: mateusz@msalamon.pl
--------------------------------------------------------------------------------
/STM32F410RBTX_FLASH.ld:
--------------------------------------------------------------------------------
1 | /*
2 | ******************************************************************************
3 | **
4 | ** File : LinkerScript.ld
5 | **
6 | ** Author : Auto-generated by STM32CubeIDE
7 | **
8 | ** Abstract : Linker script for NUCLEO-F410RB Board embedding STM32F410RBTx Device from STM32F4 series
9 | ** 128Kbytes FLASH
10 | ** 32Kbytes RAM
11 | **
12 | ** Set heap size, stack size and stack location according
13 | ** to application requirements.
14 | **
15 | ** Set memory bank area and size if external memory is used.
16 | **
17 | ** Target : STMicroelectronics STM32
18 | **
19 | ** Distribution: The file is distributed as is without any warranty
20 | ** of any kind.
21 | **
22 | *****************************************************************************
23 | ** @attention
24 | **
25 | ** © COPYRIGHT(c) 2019 STMicroelectronics
26 | **
27 | ** Redistribution and use in source and binary forms, with or without modification,
28 | ** are permitted provided that the following conditions are met:
29 | ** 1. Redistributions of source code must retain the above copyright notice,
30 | ** this list of conditions and the following disclaimer.
31 | ** 2. Redistributions in binary form must reproduce the above copyright notice,
32 | ** this list of conditions and the following disclaimer in the documentation
33 | ** and/or other materials provided with the distribution.
34 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors
35 | ** may be used to endorse or promote products derived from this software
36 | ** without specific prior written permission.
37 | **
38 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
39 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
40 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
42 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
43 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
44 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
45 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
46 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 | **
49 | *****************************************************************************
50 | */
51 |
52 | /* Entry Point */
53 | ENTRY(Reset_Handler)
54 |
55 | /* Highest address of the user mode stack */
56 | _estack = 0x20008000; /* end of "RAM" Ram type memory */
57 |
58 | _Min_Heap_Size = 0x200 ; /* required amount of heap */
59 | _Min_Stack_Size = 0x400 ; /* required amount of stack */
60 |
61 | /* Memories definition */
62 | MEMORY
63 | {
64 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
65 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
66 | }
67 |
68 | /* Sections */
69 | SECTIONS
70 | {
71 | /* The startup code into "FLASH" Rom type memory */
72 | .isr_vector :
73 | {
74 | . = ALIGN(4);
75 | KEEP(*(.isr_vector)) /* Startup code */
76 | . = ALIGN(4);
77 | } >FLASH
78 |
79 | /* The program code and other data into "FLASH" Rom type memory */
80 | .text :
81 | {
82 | . = ALIGN(4);
83 | *(.text) /* .text sections (code) */
84 | *(.text*) /* .text* sections (code) */
85 | *(.glue_7) /* glue arm to thumb code */
86 | *(.glue_7t) /* glue thumb to arm code */
87 | *(.eh_frame)
88 |
89 | KEEP (*(.init))
90 | KEEP (*(.fini))
91 |
92 | . = ALIGN(4);
93 | _etext = .; /* define a global symbols at end of code */
94 | } >FLASH
95 |
96 | /* Constant data into "FLASH" Rom type memory */
97 | .rodata :
98 | {
99 | . = ALIGN(4);
100 | *(.rodata) /* .rodata sections (constants, strings, etc.) */
101 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
102 | . = ALIGN(4);
103 | } >FLASH
104 |
105 | .ARM.extab : {
106 | . = ALIGN(4);
107 | *(.ARM.extab* .gnu.linkonce.armextab.*)
108 | . = ALIGN(4);
109 | } >FLASH
110 |
111 | .ARM : {
112 | . = ALIGN(4);
113 | __exidx_start = .;
114 | *(.ARM.exidx*)
115 | __exidx_end = .;
116 | . = ALIGN(4);
117 | } >FLASH
118 |
119 | .preinit_array :
120 | {
121 | . = ALIGN(4);
122 | PROVIDE_HIDDEN (__preinit_array_start = .);
123 | KEEP (*(.preinit_array*))
124 | PROVIDE_HIDDEN (__preinit_array_end = .);
125 | . = ALIGN(4);
126 | } >FLASH
127 |
128 | .init_array :
129 | {
130 | . = ALIGN(4);
131 | PROVIDE_HIDDEN (__init_array_start = .);
132 | KEEP (*(SORT(.init_array.*)))
133 | KEEP (*(.init_array*))
134 | PROVIDE_HIDDEN (__init_array_end = .);
135 | . = ALIGN(4);
136 | } >FLASH
137 |
138 | .fini_array :
139 | {
140 | . = ALIGN(4);
141 | PROVIDE_HIDDEN (__fini_array_start = .);
142 | KEEP (*(SORT(.fini_array.*)))
143 | KEEP (*(.fini_array*))
144 | PROVIDE_HIDDEN (__fini_array_end = .);
145 | . = ALIGN(4);
146 | } >FLASH
147 |
148 | /* Used by the startup to initialize data */
149 | _sidata = LOADADDR(.data);
150 |
151 | /* Initialized data sections into "RAM" Ram type memory */
152 | .data :
153 | {
154 | . = ALIGN(4);
155 | _sdata = .; /* create a global symbol at data start */
156 | *(.data) /* .data sections */
157 | *(.data*) /* .data* sections */
158 |
159 | . = ALIGN(4);
160 | _edata = .; /* define a global symbol at data end */
161 |
162 | } >RAM AT> FLASH
163 |
164 | /* Uninitialized data section into "RAM" Ram type memory */
165 | . = ALIGN(4);
166 | .bss :
167 | {
168 | /* This is used by the startup in order to initialize the .bss secion */
169 | _sbss = .; /* define a global symbol at bss start */
170 | __bss_start__ = _sbss;
171 | *(.bss)
172 | *(.bss*)
173 | *(COMMON)
174 |
175 | . = ALIGN(4);
176 | _ebss = .; /* define a global symbol at bss end */
177 | __bss_end__ = _ebss;
178 | } >RAM
179 |
180 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
181 | ._user_heap_stack :
182 | {
183 | . = ALIGN(8);
184 | PROVIDE ( end = . );
185 | PROVIDE ( _end = . );
186 | . = . + _Min_Heap_Size;
187 | . = . + _Min_Stack_Size;
188 | . = ALIGN(8);
189 | } >RAM
190 |
191 | /* Remove information from the compiler libraries */
192 | /DISCARD/ :
193 | {
194 | libc.a ( * )
195 | libm.a ( * )
196 | libgcc.a ( * )
197 | }
198 |
199 | .ARM.attributes 0 : { *(.ARM.attributes) }
200 | }
201 |
--------------------------------------------------------------------------------
/Src/PCF8563.c:
--------------------------------------------------------------------------------
1 | /*
2 | * PCF8563.c
3 | *
4 | * The MIT License.
5 | * Created on: 5.09.2019
6 | * Author: Mateusz Salamon
7 | * Contact: mateusz@msalamon.pl
8 | *
9 | * Website: https://msalamon.pl/dalsze-zmagania-z-rtc-ds1307-i-pcf8563-na-stm32/
10 | * GitHub: https://github.com/lamik/PCF8563_RTC_STM32_HAL
11 | */
12 | #include "main.h"
13 | #include "PCF8563.h"
14 |
15 | I2C_HandleTypeDef *hi2c_pcf8563;
16 | uint8_t Pcf8563Buffer[7];
17 |
18 |
19 | void WriteBitToControlRegister(uint8_t ControlRegister, uint8_t BitNumber, uint8_t Value)
20 | {
21 | uint8_t tmp;
22 |
23 | if(Value>1) Value = 1;
24 | if(ControlRegister>1) Value = 1;
25 | if(BitNumber>7) Value = 7;
26 |
27 | HAL_I2C_Mem_Read(hi2c_pcf8563, PCF8563_ADDRESS, ControlRegister?PCF8563_REG_CONTROL_STATUS1:PCF8563_REG_CONTROL_STATUS2, 1, &tmp, 1, PCF8563_I2C_TIMEOUT);
28 | tmp &= ~(1<3) Frequency = 3;
79 |
80 | HAL_I2C_Mem_Read(hi2c_pcf8563, PCF8563_ADDRESS, PCF8563_REG_CLKOUT, 1, &tmp, 1, PCF8563_I2C_TIMEOUT);
81 | tmp &= ~(3<>4) *10) + (BCD & 0xF);
89 | }
90 |
91 | uint8_t dec2bcd(uint8_t DEC)
92 | {
93 | return ((DEC / 10)<<4) + (DEC % 10);
94 | }
95 |
96 | int dayofweek(int Day, int Month, int Year)
97 | {
98 | int Y, C, M, N, D;
99 | M = 1 + (9 + Month) % 12;
100 | Y = Year - (M > 10);
101 | C = Y / 100;
102 | D = Y % 100;
103 | N = ((13 * M - 1) / 5 + D + D / 4 + 6 * C + Day + 5) % 7;
104 | return (7 + N) % 7;
105 | }
106 |
107 | void PCF8563_SetDateTime(RTCDateTime *DateTime)
108 | {
109 | uint8_t tmp[7];
110 |
111 | if(DateTime->Second > 59) DateTime->Second = 59;
112 | if(DateTime->Minute > 59) DateTime->Minute = 59;
113 | if(DateTime->Hour > 23) DateTime->Hour = 23;
114 | if(DateTime->Day > 31) DateTime->Day = 31;
115 | if(DateTime->Month > 12) DateTime->Month = 12;
116 | if(DateTime->Year> 2099) DateTime->Year = 2099;
117 |
118 | tmp[0] = dec2bcd((DateTime->Second) & 0x7F);
119 | tmp[1] = dec2bcd(DateTime->Minute);
120 | tmp[2] = dec2bcd(DateTime->Hour);
121 | tmp[3] = dec2bcd(DateTime->Day);
122 | tmp[4] = dayofweek(DateTime->Day, DateTime->Month, DateTime->Year);
123 | tmp[5] = dec2bcd(DateTime->Month);
124 | tmp[6] = dec2bcd(DateTime->Year - 2000);
125 |
126 | HAL_I2C_Mem_Write(hi2c_pcf8563, PCF8563_ADDRESS, PCF8563_REG_TIME, 1, tmp, 7, PCF8563_I2C_TIMEOUT);
127 | }
128 |
129 | void PCF8563_CalculateDateTime(RTCDateTime *DateTime)
130 | {
131 | DateTime->Second = bcd2dec((Pcf8563Buffer[0]) & 0x7F);
132 | DateTime->Minute = bcd2dec(Pcf8563Buffer[1]);
133 | DateTime->Hour = bcd2dec(Pcf8563Buffer[2]);
134 | DateTime->Day = Pcf8563Buffer[3];
135 | DateTime->DayOfWeek = bcd2dec(Pcf8563Buffer[4] + 1); // too keep weekdays in 1-7 format
136 | DateTime->Month = bcd2dec(Pcf8563Buffer[5] & 0x1F);
137 | DateTime->Year = 2000 + bcd2dec(Pcf8563Buffer[6]);
138 | }
139 |
140 | #ifdef PCF8563_USE_DMA
141 | void PCF8563_ReceiveDateTimeDMA(void)
142 | {
143 | HAL_I2C_Mem_Read_DMA(hi2c_pcf8563, PCF8563_ADDRESS, PCF8563_REG_TIME, 1, Pcf8563Buffer, 7);
144 | }
145 | #else
146 | void PCF8563_GetDateTime(RTCDateTime *DateTime)
147 | {
148 | HAL_I2C_Mem_Read(hi2c_pcf8563, PCF8563_ADDRESS, PCF8563_REG_TIME, 1, Pcf8563Buffer, 7, PCF8563_I2C_TIMEOUT);
149 |
150 | void PCF8563_CalculateDateTime(DateTime);
151 | }
152 | #endif
153 |
154 | void PCF8563_Init(I2C_HandleTypeDef *hi2c)
155 | {
156 | hi2c_pcf8563 = hi2c;
157 |
158 | PCF8563_ClkoutFrequency(CLKOUT_FREQ_1HZ);
159 | PCF8563_STOPEnable(0);
160 | }
161 |
--------------------------------------------------------------------------------
/Src/dma.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : dma.c
4 | * Description : This file provides code for the configuration
5 | * of all the requested memory to memory DMA transfers.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "dma.h"
22 |
23 | /* USER CODE BEGIN 0 */
24 |
25 | /* USER CODE END 0 */
26 |
27 | /*----------------------------------------------------------------------------*/
28 | /* Configure DMA */
29 | /*----------------------------------------------------------------------------*/
30 |
31 | /* USER CODE BEGIN 1 */
32 |
33 | /* USER CODE END 1 */
34 |
35 | /**
36 | * Enable DMA controller clock
37 | */
38 | void MX_DMA_Init(void)
39 | {
40 |
41 | /* DMA controller clock enable */
42 | __HAL_RCC_DMA1_CLK_ENABLE();
43 |
44 | /* DMA interrupt init */
45 | /* DMA1_Stream0_IRQn interrupt configuration */
46 | HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
47 | HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
48 | /* DMA1_Stream1_IRQn interrupt configuration */
49 | HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0);
50 | HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
51 |
52 | }
53 |
54 | /* USER CODE BEGIN 2 */
55 |
56 | /* USER CODE END 2 */
57 |
58 | /**
59 | * @}
60 | */
61 |
62 | /**
63 | * @}
64 | */
65 |
66 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
67 |
--------------------------------------------------------------------------------
/Src/gpio.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : gpio.c
4 | * Description : This file provides code for the configuration
5 | * of all used GPIO pins.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "gpio.h"
22 | /* USER CODE BEGIN 0 */
23 |
24 | /* USER CODE END 0 */
25 |
26 | /*----------------------------------------------------------------------------*/
27 | /* Configure GPIO */
28 | /*----------------------------------------------------------------------------*/
29 | /* USER CODE BEGIN 1 */
30 |
31 | /* USER CODE END 1 */
32 |
33 | /** Configure pins as
34 | * Analog
35 | * Input
36 | * Output
37 | * EVENT_OUT
38 | * EXTI
39 | */
40 | void MX_GPIO_Init(void)
41 | {
42 |
43 | GPIO_InitTypeDef GPIO_InitStruct = {0};
44 |
45 | /* GPIO Ports Clock Enable */
46 | __HAL_RCC_GPIOC_CLK_ENABLE();
47 | __HAL_RCC_GPIOH_CLK_ENABLE();
48 | __HAL_RCC_GPIOA_CLK_ENABLE();
49 | __HAL_RCC_GPIOB_CLK_ENABLE();
50 |
51 | /*Configure GPIO pin Output Level */
52 | HAL_GPIO_WritePin(GPIOA, LD2_Pin|TEST_Pin, GPIO_PIN_RESET);
53 |
54 | /*Configure GPIO pin : PtPin */
55 | GPIO_InitStruct.Pin = B1_Pin;
56 | GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
57 | GPIO_InitStruct.Pull = GPIO_NOPULL;
58 | HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
59 |
60 | /*Configure GPIO pins : PAPin PAPin */
61 | GPIO_InitStruct.Pin = LD2_Pin|TEST_Pin;
62 | GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
63 | GPIO_InitStruct.Pull = GPIO_NOPULL;
64 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
65 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
66 |
67 | /*Configure GPIO pin : PtPin */
68 | GPIO_InitStruct.Pin = PCF8563_INT_Pin;
69 | GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
70 | GPIO_InitStruct.Pull = GPIO_NOPULL;
71 | HAL_GPIO_Init(PCF8563_INT_GPIO_Port, &GPIO_InitStruct);
72 |
73 | /* EXTI interrupt init*/
74 | HAL_NVIC_SetPriority(EXTI9_5_IRQn, 0, 0);
75 | HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
76 |
77 | }
78 |
79 | /* USER CODE BEGIN 2 */
80 |
81 | /* USER CODE END 2 */
82 |
83 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
84 |
--------------------------------------------------------------------------------
/Src/i2c.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : I2C.c
4 | * Description : This file provides code for the configuration
5 | * of the I2C instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "i2c.h"
22 |
23 | /* USER CODE BEGIN 0 */
24 |
25 | /* USER CODE END 0 */
26 |
27 | I2C_HandleTypeDef hi2c1;
28 | DMA_HandleTypeDef hdma_i2c1_rx;
29 | DMA_HandleTypeDef hdma_i2c1_tx;
30 |
31 | /* I2C1 init function */
32 | void MX_I2C1_Init(void)
33 | {
34 |
35 | hi2c1.Instance = I2C1;
36 | hi2c1.Init.ClockSpeed = 400000;
37 | hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
38 | hi2c1.Init.OwnAddress1 = 0;
39 | hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
40 | hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
41 | hi2c1.Init.OwnAddress2 = 0;
42 | hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
43 | hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
44 | if (HAL_I2C_Init(&hi2c1) != HAL_OK)
45 | {
46 | Error_Handler();
47 | }
48 |
49 | }
50 |
51 | void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
52 | {
53 |
54 | GPIO_InitTypeDef GPIO_InitStruct = {0};
55 | if(i2cHandle->Instance==I2C1)
56 | {
57 | /* USER CODE BEGIN I2C1_MspInit 0 */
58 |
59 | /* USER CODE END I2C1_MspInit 0 */
60 |
61 | __HAL_RCC_GPIOB_CLK_ENABLE();
62 | /**I2C1 GPIO Configuration
63 | PB8 ------> I2C1_SCL
64 | PB9 ------> I2C1_SDA
65 | */
66 | GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
67 | GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
68 | GPIO_InitStruct.Pull = GPIO_PULLUP;
69 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
70 | GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
71 | HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
72 |
73 | /* I2C1 clock enable */
74 | __HAL_RCC_I2C1_CLK_ENABLE();
75 |
76 | /* I2C1 DMA Init */
77 | /* I2C1_RX Init */
78 | hdma_i2c1_rx.Instance = DMA1_Stream0;
79 | hdma_i2c1_rx.Init.Channel = DMA_CHANNEL_1;
80 | hdma_i2c1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
81 | hdma_i2c1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
82 | hdma_i2c1_rx.Init.MemInc = DMA_MINC_ENABLE;
83 | hdma_i2c1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
84 | hdma_i2c1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
85 | hdma_i2c1_rx.Init.Mode = DMA_NORMAL;
86 | hdma_i2c1_rx.Init.Priority = DMA_PRIORITY_LOW;
87 | hdma_i2c1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
88 | if (HAL_DMA_Init(&hdma_i2c1_rx) != HAL_OK)
89 | {
90 | Error_Handler();
91 | }
92 |
93 | __HAL_LINKDMA(i2cHandle,hdmarx,hdma_i2c1_rx);
94 |
95 | /* I2C1_TX Init */
96 | hdma_i2c1_tx.Instance = DMA1_Stream1;
97 | hdma_i2c1_tx.Init.Channel = DMA_CHANNEL_0;
98 | hdma_i2c1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
99 | hdma_i2c1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
100 | hdma_i2c1_tx.Init.MemInc = DMA_MINC_ENABLE;
101 | hdma_i2c1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
102 | hdma_i2c1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
103 | hdma_i2c1_tx.Init.Mode = DMA_NORMAL;
104 | hdma_i2c1_tx.Init.Priority = DMA_PRIORITY_LOW;
105 | hdma_i2c1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
106 | if (HAL_DMA_Init(&hdma_i2c1_tx) != HAL_OK)
107 | {
108 | Error_Handler();
109 | }
110 |
111 | __HAL_LINKDMA(i2cHandle,hdmatx,hdma_i2c1_tx);
112 |
113 | /* USER CODE BEGIN I2C1_MspInit 1 */
114 |
115 | /* USER CODE END I2C1_MspInit 1 */
116 | }
117 | }
118 |
119 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
120 | {
121 |
122 | if(i2cHandle->Instance==I2C1)
123 | {
124 | /* USER CODE BEGIN I2C1_MspDeInit 0 */
125 |
126 | /* USER CODE END I2C1_MspDeInit 0 */
127 | /* Peripheral clock disable */
128 | __HAL_RCC_I2C1_CLK_DISABLE();
129 |
130 | /**I2C1 GPIO Configuration
131 | PB8 ------> I2C1_SCL
132 | PB9 ------> I2C1_SDA
133 | */
134 | HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9);
135 |
136 | /* I2C1 DMA DeInit */
137 | HAL_DMA_DeInit(i2cHandle->hdmarx);
138 | HAL_DMA_DeInit(i2cHandle->hdmatx);
139 | /* USER CODE BEGIN I2C1_MspDeInit 1 */
140 |
141 | /* USER CODE END I2C1_MspDeInit 1 */
142 | }
143 | }
144 |
145 | /* USER CODE BEGIN 1 */
146 |
147 | /* USER CODE END 1 */
148 |
149 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
150 |
--------------------------------------------------------------------------------
/Src/main.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file : main.c
5 | * @brief : Main program body
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | *
19 | * Created on: 5.09.2019
20 | * Author: Mateusz Salamon
21 | * Contact: mateusz@msalamon.pl
22 | *
23 | * Website: https://msalamon.pl/dalsze-zmagania-z-rtc-ds1307-i-pcf8563-na-stm32/
24 | * GitHub: https://github.com/lamik/PCF8563_RTC_STM32_HAL
25 | */
26 | /* USER CODE END Header */
27 |
28 | /* Includes ------------------------------------------------------------------*/
29 | #include "main.h"
30 | #include "dma.h"
31 | #include "i2c.h"
32 | #include "usart.h"
33 | #include "gpio.h"
34 |
35 | /* Private includes ----------------------------------------------------------*/
36 | /* USER CODE BEGIN Includes */
37 | #include "PCF8563.h"
38 | #include "stdio.h"
39 | /* USER CODE END Includes */
40 |
41 | /* Private typedef -----------------------------------------------------------*/
42 | /* USER CODE BEGIN PTD */
43 |
44 | /* USER CODE END PTD */
45 |
46 | /* Private define ------------------------------------------------------------*/
47 | /* USER CODE BEGIN PD */
48 |
49 | /* USER CODE END PD */
50 |
51 | /* Private macro -------------------------------------------------------------*/
52 | /* USER CODE BEGIN PM */
53 |
54 | /* USER CODE END PM */
55 |
56 | /* Private variables ---------------------------------------------------------*/
57 |
58 | /* USER CODE BEGIN PV */
59 | RTCDateTime r; // Date and Time variable
60 | uint8_t Message[32]; // UART message
61 | uint8_t MessageSize;
62 | /* USER CODE END PV */
63 |
64 | /* Private function prototypes -----------------------------------------------*/
65 | void SystemClock_Config(void);
66 | /* USER CODE BEGIN PFP */
67 |
68 | /* USER CODE END PFP */
69 |
70 | /* Private user code ---------------------------------------------------------*/
71 | /* USER CODE BEGIN 0 */
72 |
73 | /* USER CODE END 0 */
74 |
75 | /**
76 | * @brief The application entry point.
77 | * @retval int
78 | */
79 | int main(void)
80 | {
81 | /* USER CODE BEGIN 1 */
82 |
83 | /* USER CODE END 1 */
84 |
85 |
86 | /* MCU Configuration--------------------------------------------------------*/
87 |
88 | /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
89 | HAL_Init();
90 |
91 | /* USER CODE BEGIN Init */
92 |
93 | /* USER CODE END Init */
94 |
95 | /* Configure the system clock */
96 | SystemClock_Config();
97 |
98 | /* USER CODE BEGIN SysInit */
99 |
100 | /* USER CODE END SysInit */
101 |
102 | /* Initialize all configured peripherals */
103 | MX_GPIO_Init();
104 | MX_DMA_Init();
105 | MX_USART2_UART_Init();
106 | MX_I2C1_Init();
107 | /* USER CODE BEGIN 2 */
108 | PCF8563_Init(&hi2c1);
109 | uint32_t TimerUART = HAL_GetTick();
110 | /* USER CODE END 2 */
111 |
112 | /* Infinite loop */
113 | /* USER CODE BEGIN WHILE */
114 | while (1)
115 | {
116 | if((HAL_GetTick() - TimerUART) > 1000)
117 | {
118 | MessageSize = sprintf(Message, "%02d:%02d:%02d\n\r", r.Hour, r.Minute, r.Second);
119 | HAL_UART_Transmit(&huart2, Message, MessageSize, 1000);
120 | TimerUART = HAL_GetTick();
121 | }
122 | /* USER CODE END WHILE */
123 |
124 | /* USER CODE BEGIN 3 */
125 | }
126 | /* USER CODE END 3 */
127 | }
128 |
129 | /**
130 | * @brief System Clock Configuration
131 | * @retval None
132 | */
133 | void SystemClock_Config(void)
134 | {
135 | RCC_OscInitTypeDef RCC_OscInitStruct = {0};
136 | RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
137 |
138 | /** Configure the main internal regulator output voltage
139 | */
140 | __HAL_RCC_PWR_CLK_ENABLE();
141 | __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
142 | /** Initializes the CPU, AHB and APB busses clocks
143 | */
144 | RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
145 | RCC_OscInitStruct.HSIState = RCC_HSI_ON;
146 | RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
147 | RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
148 | RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
149 | RCC_OscInitStruct.PLL.PLLM = 16;
150 | RCC_OscInitStruct.PLL.PLLN = 336;
151 | RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
152 | RCC_OscInitStruct.PLL.PLLQ = 4;
153 | RCC_OscInitStruct.PLL.PLLR = 2;
154 | if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
155 | {
156 | Error_Handler();
157 | }
158 | /** Initializes the CPU, AHB and APB busses clocks
159 | */
160 | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
161 | |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
162 | RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
163 | RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
164 | RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
165 | RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
166 |
167 | if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
168 | {
169 | Error_Handler();
170 | }
171 | }
172 |
173 | /* USER CODE BEGIN 4 */
174 | #ifdef PCF8563_USE_DMA
175 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
176 | {
177 | if(GPIO_Pin == PCF8563_INT_Pin)
178 | {
179 | PCF8563_ReceiveDateTimeDMA();
180 | }
181 | }
182 |
183 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
184 | {
185 | PCF8563_CalculateDateTime(&r);
186 | }
187 | #else
188 | void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
189 | {
190 | if(GPIO_Pin == PCF8563_INT_Pin)
191 | {
192 | PCF8563_GetDateTime(&r);
193 | }
194 | }
195 | #endif
196 | /* USER CODE END 4 */
197 |
198 | /**
199 | * @brief This function is executed in case of error occurrence.
200 | * @retval None
201 | */
202 | void Error_Handler(void)
203 | {
204 | /* USER CODE BEGIN Error_Handler_Debug */
205 | /* User can add his own implementation to report the HAL error return state */
206 |
207 | /* USER CODE END Error_Handler_Debug */
208 | }
209 |
210 | #ifdef USE_FULL_ASSERT
211 | /**
212 | * @brief Reports the name of the source file and the source line number
213 | * where the assert_param error has occurred.
214 | * @param file: pointer to the source file name
215 | * @param line: assert_param error line source number
216 | * @retval None
217 | */
218 | void assert_failed(uint8_t *file, uint32_t line)
219 | {
220 | /* USER CODE BEGIN 6 */
221 | /* User can add his own implementation to report the file name and line number,
222 | tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
223 | /* USER CODE END 6 */
224 | }
225 | #endif /* USE_FULL_ASSERT */
226 |
227 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
228 |
--------------------------------------------------------------------------------
/Src/stm32f4xx_hal_msp.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * File Name : stm32f4xx_hal_msp.c
5 | * Description : This file provides code for the MSP Initialization
6 | * and de-Initialization codes.
7 | ******************************************************************************
8 | * @attention
9 | *
10 | * © Copyright (c) 2019 STMicroelectronics.
11 | * All rights reserved.
12 | *
13 | * This software component is licensed by ST under BSD 3-Clause license,
14 | * the "License"; You may not use this file except in compliance with the
15 | * License. You may obtain a copy of the License at:
16 | * opensource.org/licenses/BSD-3-Clause
17 | *
18 | ******************************************************************************
19 | */
20 | /* USER CODE END Header */
21 |
22 | /* Includes ------------------------------------------------------------------*/
23 | #include "main.h"
24 | /* USER CODE BEGIN Includes */
25 |
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN Define */
35 |
36 | /* USER CODE END Define */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN Macro */
40 |
41 | /* USER CODE END Macro */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* External functions --------------------------------------------------------*/
54 | /* USER CODE BEGIN ExternalFunctions */
55 |
56 | /* USER CODE END ExternalFunctions */
57 |
58 | /* USER CODE BEGIN 0 */
59 |
60 | /* USER CODE END 0 */
61 | /**
62 | * Initializes the Global MSP.
63 | */
64 | void HAL_MspInit(void)
65 | {
66 | /* USER CODE BEGIN MspInit 0 */
67 |
68 | /* USER CODE END MspInit 0 */
69 |
70 | __HAL_RCC_SYSCFG_CLK_ENABLE();
71 | __HAL_RCC_PWR_CLK_ENABLE();
72 |
73 | HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
74 |
75 | /* System interrupt init*/
76 |
77 | /* USER CODE BEGIN MspInit 1 */
78 |
79 | /* USER CODE END MspInit 1 */
80 | }
81 |
82 | /* USER CODE BEGIN 1 */
83 |
84 | /* USER CODE END 1 */
85 |
86 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
87 |
--------------------------------------------------------------------------------
/Src/stm32f4xx_it.c:
--------------------------------------------------------------------------------
1 | /* USER CODE BEGIN Header */
2 | /**
3 | ******************************************************************************
4 | * @file stm32f4xx_it.c
5 | * @brief Interrupt Service Routines.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 | /* USER CODE END Header */
20 |
21 | /* Includes ------------------------------------------------------------------*/
22 | #include "main.h"
23 | #include "stm32f4xx_it.h"
24 | /* Private includes ----------------------------------------------------------*/
25 | /* USER CODE BEGIN Includes */
26 | /* USER CODE END Includes */
27 |
28 | /* Private typedef -----------------------------------------------------------*/
29 | /* USER CODE BEGIN TD */
30 |
31 | /* USER CODE END TD */
32 |
33 | /* Private define ------------------------------------------------------------*/
34 | /* USER CODE BEGIN PD */
35 |
36 | /* USER CODE END PD */
37 |
38 | /* Private macro -------------------------------------------------------------*/
39 | /* USER CODE BEGIN PM */
40 |
41 | /* USER CODE END PM */
42 |
43 | /* Private variables ---------------------------------------------------------*/
44 | /* USER CODE BEGIN PV */
45 |
46 | /* USER CODE END PV */
47 |
48 | /* Private function prototypes -----------------------------------------------*/
49 | /* USER CODE BEGIN PFP */
50 |
51 | /* USER CODE END PFP */
52 |
53 | /* Private user code ---------------------------------------------------------*/
54 | /* USER CODE BEGIN 0 */
55 |
56 | /* USER CODE END 0 */
57 |
58 | /* External variables --------------------------------------------------------*/
59 | extern DMA_HandleTypeDef hdma_i2c1_rx;
60 | extern DMA_HandleTypeDef hdma_i2c1_tx;
61 | /* USER CODE BEGIN EV */
62 |
63 | /* USER CODE END EV */
64 |
65 | /******************************************************************************/
66 | /* Cortex-M4 Processor Interruption and Exception Handlers */
67 | /******************************************************************************/
68 | /**
69 | * @brief This function handles Non maskable interrupt.
70 | */
71 | void NMI_Handler(void)
72 | {
73 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
74 |
75 | /* USER CODE END NonMaskableInt_IRQn 0 */
76 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
77 |
78 | /* USER CODE END NonMaskableInt_IRQn 1 */
79 | }
80 |
81 | /**
82 | * @brief This function handles Hard fault interrupt.
83 | */
84 | void HardFault_Handler(void)
85 | {
86 | /* USER CODE BEGIN HardFault_IRQn 0 */
87 |
88 | /* USER CODE END HardFault_IRQn 0 */
89 | while (1)
90 | {
91 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */
92 | /* USER CODE END W1_HardFault_IRQn 0 */
93 | }
94 | }
95 |
96 | /**
97 | * @brief This function handles Memory management fault.
98 | */
99 | void MemManage_Handler(void)
100 | {
101 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */
102 |
103 | /* USER CODE END MemoryManagement_IRQn 0 */
104 | while (1)
105 | {
106 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
107 | /* USER CODE END W1_MemoryManagement_IRQn 0 */
108 | }
109 | }
110 |
111 | /**
112 | * @brief This function handles Pre-fetch fault, memory access fault.
113 | */
114 | void BusFault_Handler(void)
115 | {
116 | /* USER CODE BEGIN BusFault_IRQn 0 */
117 |
118 | /* USER CODE END BusFault_IRQn 0 */
119 | while (1)
120 | {
121 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */
122 | /* USER CODE END W1_BusFault_IRQn 0 */
123 | }
124 | }
125 |
126 | /**
127 | * @brief This function handles Undefined instruction or illegal state.
128 | */
129 | void UsageFault_Handler(void)
130 | {
131 | /* USER CODE BEGIN UsageFault_IRQn 0 */
132 |
133 | /* USER CODE END UsageFault_IRQn 0 */
134 | while (1)
135 | {
136 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
137 | /* USER CODE END W1_UsageFault_IRQn 0 */
138 | }
139 | }
140 |
141 | /**
142 | * @brief This function handles System service call via SWI instruction.
143 | */
144 | void SVC_Handler(void)
145 | {
146 | /* USER CODE BEGIN SVCall_IRQn 0 */
147 |
148 | /* USER CODE END SVCall_IRQn 0 */
149 | /* USER CODE BEGIN SVCall_IRQn 1 */
150 |
151 | /* USER CODE END SVCall_IRQn 1 */
152 | }
153 |
154 | /**
155 | * @brief This function handles Debug monitor.
156 | */
157 | void DebugMon_Handler(void)
158 | {
159 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */
160 |
161 | /* USER CODE END DebugMonitor_IRQn 0 */
162 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */
163 |
164 | /* USER CODE END DebugMonitor_IRQn 1 */
165 | }
166 |
167 | /**
168 | * @brief This function handles Pendable request for system service.
169 | */
170 | void PendSV_Handler(void)
171 | {
172 | /* USER CODE BEGIN PendSV_IRQn 0 */
173 |
174 | /* USER CODE END PendSV_IRQn 0 */
175 | /* USER CODE BEGIN PendSV_IRQn 1 */
176 |
177 | /* USER CODE END PendSV_IRQn 1 */
178 | }
179 |
180 | /**
181 | * @brief This function handles System tick timer.
182 | */
183 | void SysTick_Handler(void)
184 | {
185 | /* USER CODE BEGIN SysTick_IRQn 0 */
186 |
187 | /* USER CODE END SysTick_IRQn 0 */
188 | HAL_IncTick();
189 | /* USER CODE BEGIN SysTick_IRQn 1 */
190 |
191 | /* USER CODE END SysTick_IRQn 1 */
192 | }
193 |
194 | /******************************************************************************/
195 | /* STM32F4xx Peripheral Interrupt Handlers */
196 | /* Add here the Interrupt Handlers for the used peripherals. */
197 | /* For the available peripheral interrupt handler names, */
198 | /* please refer to the startup file (startup_stm32f4xx.s). */
199 | /******************************************************************************/
200 |
201 | /**
202 | * @brief This function handles DMA1 stream0 global interrupt.
203 | */
204 | void DMA1_Stream0_IRQHandler(void)
205 | {
206 | /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */
207 |
208 | /* USER CODE END DMA1_Stream0_IRQn 0 */
209 | HAL_DMA_IRQHandler(&hdma_i2c1_rx);
210 | /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */
211 |
212 | /* USER CODE END DMA1_Stream0_IRQn 1 */
213 | }
214 |
215 | /**
216 | * @brief This function handles DMA1 stream1 global interrupt.
217 | */
218 | void DMA1_Stream1_IRQHandler(void)
219 | {
220 | /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
221 |
222 | /* USER CODE END DMA1_Stream1_IRQn 0 */
223 | HAL_DMA_IRQHandler(&hdma_i2c1_tx);
224 | /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
225 |
226 | /* USER CODE END DMA1_Stream1_IRQn 1 */
227 | }
228 |
229 | /**
230 | * @brief This function handles EXTI line[9:5] interrupts.
231 | */
232 | void EXTI9_5_IRQHandler(void)
233 | {
234 | /* USER CODE BEGIN EXTI9_5_IRQn 0 */
235 |
236 | /* USER CODE END EXTI9_5_IRQn 0 */
237 | HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9);
238 | /* USER CODE BEGIN EXTI9_5_IRQn 1 */
239 |
240 | /* USER CODE END EXTI9_5_IRQn 1 */
241 | }
242 |
243 | /* USER CODE BEGIN 1 */
244 |
245 | /* USER CODE END 1 */
246 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
247 |
--------------------------------------------------------------------------------
/Src/syscalls.c:
--------------------------------------------------------------------------------
1 | /**
2 | *****************************************************************************
3 | **
4 | ** File : syscalls.c
5 | **
6 | ** Author : Auto-generated by STM32CubeIDE
7 | **
8 | ** Abstract : STM32CubeIDE Minimal System calls file
9 | **
10 | ** For more information about which c-functions
11 | ** need which of these lowlevel functions
12 | ** please consult the Newlib libc-manual
13 | **
14 | ** Environment : STM32CubeIDE MCU
15 | **
16 | ** Distribution: The file is distributed as is, without any warranty
17 | ** of any kind.
18 | **
19 | *****************************************************************************
20 | **
21 | ** © COPYRIGHT(c) 2018 STMicroelectronics
22 | **
23 | ** Redistribution and use in source and binary forms, with or without modification,
24 | ** are permitted provided that the following conditions are met:
25 | ** 1. Redistributions of source code must retain the above copyright notice,
26 | ** this list of conditions and the following disclaimer.
27 | ** 2. Redistributions in binary form must reproduce the above copyright notice,
28 | ** this list of conditions and the following disclaimer in the documentation
29 | ** and/or other materials provided with the distribution.
30 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors
31 | ** may be used to endorse or promote products derived from this software
32 | ** without specific prior written permission.
33 | **
34 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
38 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
41 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
42 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 | **
45 | **
46 | *****************************************************************************
47 | */
48 |
49 | /* Includes */
50 | #include
51 | #include
52 | #include
53 | #include
54 | #include
55 | #include
56 | #include
57 | #include
58 |
59 |
60 | /* Variables */
61 | //#undef errno
62 | extern int errno;
63 | extern int __io_putchar(int ch) __attribute__((weak));
64 | extern int __io_getchar(void) __attribute__((weak));
65 |
66 | register char * stack_ptr asm("sp");
67 |
68 | char *__env[1] = { 0 };
69 | char **environ = __env;
70 |
71 |
72 | /* Functions */
73 | void initialise_monitor_handles()
74 | {
75 | }
76 |
77 | int _getpid(void)
78 | {
79 | return 1;
80 | }
81 |
82 | int _kill(int pid, int sig)
83 | {
84 | errno = EINVAL;
85 | return -1;
86 | }
87 |
88 | void _exit (int status)
89 | {
90 | _kill(status, -1);
91 | while (1) {} /* Make sure we hang here */
92 | }
93 |
94 | __attribute__((weak)) int _read(int file, char *ptr, int len)
95 | {
96 | int DataIdx;
97 |
98 | for (DataIdx = 0; DataIdx < len; DataIdx++)
99 | {
100 | *ptr++ = __io_getchar();
101 | }
102 |
103 | return len;
104 | }
105 |
106 | __attribute__((weak)) int _write(int file, char *ptr, int len)
107 | {
108 | int DataIdx;
109 |
110 | for (DataIdx = 0; DataIdx < len; DataIdx++)
111 | {
112 | __io_putchar(*ptr++);
113 | }
114 | return len;
115 | }
116 |
117 | int _close(int file)
118 | {
119 | return -1;
120 | }
121 |
122 |
123 | int _fstat(int file, struct stat *st)
124 | {
125 | st->st_mode = S_IFCHR;
126 | return 0;
127 | }
128 |
129 | int _isatty(int file)
130 | {
131 | return 1;
132 | }
133 |
134 | int _lseek(int file, int ptr, int dir)
135 | {
136 | return 0;
137 | }
138 |
139 | int _open(char *path, int flags, ...)
140 | {
141 | /* Pretend like we always fail */
142 | return -1;
143 | }
144 |
145 | int _wait(int *status)
146 | {
147 | errno = ECHILD;
148 | return -1;
149 | }
150 |
151 | int _unlink(char *name)
152 | {
153 | errno = ENOENT;
154 | return -1;
155 | }
156 |
157 | int _times(struct tms *buf)
158 | {
159 | return -1;
160 | }
161 |
162 | int _stat(char *file, struct stat *st)
163 | {
164 | st->st_mode = S_IFCHR;
165 | return 0;
166 | }
167 |
168 | int _link(char *old, char *new)
169 | {
170 | errno = EMLINK;
171 | return -1;
172 | }
173 |
174 | int _fork(void)
175 | {
176 | errno = EAGAIN;
177 | return -1;
178 | }
179 |
180 | int _execve(char *name, char **argv, char **env)
181 | {
182 | errno = ENOMEM;
183 | return -1;
184 | }
185 |
--------------------------------------------------------------------------------
/Src/sysmem.c:
--------------------------------------------------------------------------------
1 | /**
2 | *****************************************************************************
3 | **
4 | ** File : sysmem.c
5 | **
6 | ** Author : Auto-generated by STM32CubeIDE
7 | **
8 | ** Abstract : STM32CubeIDE Minimal System Memory calls file
9 | **
10 | ** For more information about which c-functions
11 | ** need which of these lowlevel functions
12 | ** please consult the Newlib libc-manual
13 | **
14 | ** Environment : STM32CubeIDE MCU
15 | **
16 | ** Distribution: The file is distributed as is, without any warranty
17 | ** of any kind.
18 | **
19 | *****************************************************************************
20 | **
21 | ** © COPYRIGHT(c) 2018 STMicroelectronics
22 | **
23 | ** Redistribution and use in source and binary forms, with or without modification,
24 | ** are permitted provided that the following conditions are met:
25 | ** 1. Redistributions of source code must retain the above copyright notice,
26 | ** this list of conditions and the following disclaimer.
27 | ** 2. Redistributions in binary form must reproduce the above copyright notice,
28 | ** this list of conditions and the following disclaimer in the documentation
29 | ** and/or other materials provided with the distribution.
30 | ** 3. Neither the name of STMicroelectronics nor the names of its contributors
31 | ** may be used to endorse or promote products derived from this software
32 | ** without specific prior written permission.
33 | **
34 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
35 | ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
36 | ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
38 | ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
39 | ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40 | ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
41 | ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
42 | ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43 | ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 | **
45 | **
46 | *****************************************************************************
47 | */
48 |
49 | /* Includes */
50 | #include
51 | #include
52 |
53 | /* Variables */
54 | extern int errno;
55 | register char * stack_ptr asm("sp");
56 |
57 | /* Functions */
58 |
59 | /**
60 | _sbrk
61 | Increase program data space. Malloc and related functions depend on this
62 | **/
63 | caddr_t _sbrk(int incr)
64 | {
65 | extern char end asm("end");
66 | static char *heap_end;
67 | char *prev_heap_end;
68 |
69 | if (heap_end == 0)
70 | heap_end = &end;
71 |
72 | prev_heap_end = heap_end;
73 | if (heap_end + incr > stack_ptr)
74 | {
75 | errno = ENOMEM;
76 | return (caddr_t) -1;
77 | }
78 |
79 | heap_end += incr;
80 |
81 | return (caddr_t) prev_heap_end;
82 | }
83 |
84 |
--------------------------------------------------------------------------------
/Src/usart.c:
--------------------------------------------------------------------------------
1 | /**
2 | ******************************************************************************
3 | * File Name : USART.c
4 | * Description : This file provides code for the configuration
5 | * of the USART instances.
6 | ******************************************************************************
7 | * @attention
8 | *
9 | * © Copyright (c) 2019 STMicroelectronics.
10 | * All rights reserved.
11 | *
12 | * This software component is licensed by ST under BSD 3-Clause license,
13 | * the "License"; You may not use this file except in compliance with the
14 | * License. You may obtain a copy of the License at:
15 | * opensource.org/licenses/BSD-3-Clause
16 | *
17 | ******************************************************************************
18 | */
19 |
20 | /* Includes ------------------------------------------------------------------*/
21 | #include "usart.h"
22 |
23 | /* USER CODE BEGIN 0 */
24 |
25 | /* USER CODE END 0 */
26 |
27 | UART_HandleTypeDef huart2;
28 |
29 | /* USART2 init function */
30 |
31 | void MX_USART2_UART_Init(void)
32 | {
33 |
34 | huart2.Instance = USART2;
35 | huart2.Init.BaudRate = 115200;
36 | huart2.Init.WordLength = UART_WORDLENGTH_8B;
37 | huart2.Init.StopBits = UART_STOPBITS_1;
38 | huart2.Init.Parity = UART_PARITY_NONE;
39 | huart2.Init.Mode = UART_MODE_TX_RX;
40 | huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
41 | huart2.Init.OverSampling = UART_OVERSAMPLING_16;
42 | if (HAL_UART_Init(&huart2) != HAL_OK)
43 | {
44 | Error_Handler();
45 | }
46 |
47 | }
48 |
49 | void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
50 | {
51 |
52 | GPIO_InitTypeDef GPIO_InitStruct = {0};
53 | if(uartHandle->Instance==USART2)
54 | {
55 | /* USER CODE BEGIN USART2_MspInit 0 */
56 |
57 | /* USER CODE END USART2_MspInit 0 */
58 | /* USART2 clock enable */
59 | __HAL_RCC_USART2_CLK_ENABLE();
60 |
61 | __HAL_RCC_GPIOA_CLK_ENABLE();
62 | /**USART2 GPIO Configuration
63 | PA2 ------> USART2_TX
64 | PA3 ------> USART2_RX
65 | */
66 | GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
67 | GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
68 | GPIO_InitStruct.Pull = GPIO_PULLUP;
69 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
70 | GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
71 | HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
72 |
73 | /* USER CODE BEGIN USART2_MspInit 1 */
74 |
75 | /* USER CODE END USART2_MspInit 1 */
76 | }
77 | }
78 |
79 | void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
80 | {
81 |
82 | if(uartHandle->Instance==USART2)
83 | {
84 | /* USER CODE BEGIN USART2_MspDeInit 0 */
85 |
86 | /* USER CODE END USART2_MspDeInit 0 */
87 | /* Peripheral clock disable */
88 | __HAL_RCC_USART2_CLK_DISABLE();
89 |
90 | /**USART2 GPIO Configuration
91 | PA2 ------> USART2_TX
92 | PA3 ------> USART2_RX
93 | */
94 | HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
95 |
96 | /* USER CODE BEGIN USART2_MspDeInit 1 */
97 |
98 | /* USER CODE END USART2_MspDeInit 1 */
99 | }
100 | }
101 |
102 | /* USER CODE BEGIN 1 */
103 |
104 | /* USER CODE END 1 */
105 |
106 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
107 |
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