├── .gitignore ├── LICENSE ├── Makefile ├── README.md ├── _astylerc ├── hex2binascii.py ├── parse_ascii.c └── parse_bin.c /.gitignore: -------------------------------------------------------------------------------- 1 | *.o 2 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Apache License 2 | Version 2.0, January 2004 3 | http://www.apache.org/licenses/ 4 | 5 | TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION 6 | 7 | 1. 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We also recommend that a 185 | file or class name and description of purpose be included on the 186 | same "printed page" as the copyright notice for easier 187 | identification within third-party archives. 188 | 189 | Copyright [yyyy] [name of copyright owner] 190 | 191 | Licensed under the Apache License, Version 2.0 (the "License"); 192 | you may not use this file except in compliance with the License. 193 | You may obtain a copy of the License at 194 | 195 | http://www.apache.org/licenses/LICENSE-2.0 196 | 197 | Unless required by applicable law or agreed to in writing, software 198 | distributed under the License is distributed on an "AS IS" BASIS, 199 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 200 | See the License for the specific language governing permissions and 201 | limitations under the License. 202 | -------------------------------------------------------------------------------- /Makefile: -------------------------------------------------------------------------------- 1 | SRCS := $(wildcard *.c) 2 | OBJS := $(SRCS:.c=.o) 3 | 4 | all: $(OBJS) 5 | 6 | clean: 7 | rm -f *.o 8 | 9 | %.o: %.c 10 | gcc -g -o $@ $(CFLAGS) $(LEGO_INCLUDE) $< -lm -pthread 11 | 12 | format: $(SRCS) 13 | astyle --options=_astylerc $(SRCS) 14 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # FPGA-Xilinx-Bitstream 2 | 3 | Trying to understand Xilinx Bitstream format. 4 | 5 | For more information, you can also read my write up on bitstream-explained: http://lastweek.io/fpga/bitstream/. 6 | -------------------------------------------------------------------------------- /_astylerc: -------------------------------------------------------------------------------- 1 | --style=stroustrup 2 | --indent=spaces=4 3 | --attach-closing-while 4 | --indent-switches 5 | --indent-preproc-block 6 | --indent-preproc-define 7 | --indent-col1-comments 8 | --min-conditional-indent=0 9 | --break-blocks 10 | --pad-oper 11 | --pad-header 12 | --unpad-paren 13 | --align-pointer=name 14 | --break-one-line-headers 15 | --add-braces 16 | --max-code-length=150 17 | --suffix=none 18 | --lineend=linux 19 | -------------------------------------------------------------------------------- /hex2binascii.py: -------------------------------------------------------------------------------- 1 | #!/usr/bin/env python3 2 | import sys 3 | 4 | s = sys.argv[1] 5 | n = int(s, 16) 6 | 7 | binascii = format(n, '032b') 8 | 9 | print(s) 10 | print(binascii) 11 | -------------------------------------------------------------------------------- /parse_ascii.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2019. Yizhou Shan. All rights reserved. 3 | * Contact: syzwhat@gmail.com 4 | * 5 | * This file can parse the ultrascale+ bitstream files. 6 | */ 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include 14 | #include 15 | #include 16 | #include 17 | 18 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 19 | 20 | #define NR_BYTES_OF_ICAP (4) 21 | 22 | #define REG_CRC 0 23 | #define REG_FAR 1 24 | #define REG_FDRI 2 25 | 26 | /* 27 | * This file can parse .rba and .rbt file 28 | * They are ASICC files. 29 | */ 30 | int main(int argc, char **argv) 31 | { 32 | char *fname, *str_nr_words_to_parse; 33 | int ret; 34 | int i, nr_words, val; 35 | FILE *fp; 36 | char *line; 37 | size_t len; 38 | ssize_t nread; 39 | 40 | bool p_idcode = false; 41 | 42 | if (argc != 3) { 43 | printf("Usage: ./parse bitstream.rba nr_icap_words\n"); 44 | exit(-1); 45 | } 46 | 47 | fname = argv[1]; 48 | str_nr_words_to_parse = argv[2]; 49 | 50 | fp = fopen(fname, "r"); 51 | 52 | if (!fp) { 53 | printf("Fail to open: %s\n", fname); 54 | exit(-1); 55 | } 56 | 57 | nr_words = atoi(str_nr_words_to_parse); 58 | printf("File Name: %s\n", fname); 59 | 60 | if (nr_words == -1) { 61 | nr_words = INT_MAX; 62 | } 63 | 64 | len = 512; 65 | line = malloc(len); 66 | 67 | i = 0; 68 | 69 | while (i < nr_words) { 70 | nread = getline(&line, &len, fp); 71 | 72 | if (nread == -1) { 73 | goto done; 74 | } 75 | 76 | if (line[0] != '0' && line[0] != '1') { 77 | continue; 78 | } 79 | 80 | val = strtol(line, NULL, 2); 81 | 82 | //if (val != 0) { 83 | if (1) { 84 | printf("[%10d] %08x ", i, val); 85 | 86 | /* 87 | * Don't bother. 88 | * Just keep it ugly. 89 | */ 90 | if (val == 0xaa995566) { 91 | printf(" SYNC\n"); 92 | } 93 | else if (val == 0x000000BB) { 94 | printf("Bus Width Sync\n"); 95 | } 96 | else if (val == 0x30002001) { 97 | printf("Write to FAR\n"); 98 | } 99 | else if (val == 0x28006000) { 100 | printf("Read from FDRO\n"); 101 | } 102 | else if (val == 0x30000001) { 103 | printf("Write to CRC\n"); 104 | } 105 | else if (val == 0x30018001) { 106 | printf("Write to IDCODE\n"); 107 | p_idcode = true; 108 | } 109 | else if (val == 0x11220044) { 110 | printf("Bus Width Detect\n"); 111 | } 112 | else if (val == 0x30004000) { 113 | printf("Write to FDRI\n"); 114 | } 115 | else if (val == 0x30008001) { 116 | printf("Write to CMD\n"); 117 | } 118 | else if ((val & 0xf0000000) == 0x30000000) { 119 | int regs; 120 | 121 | regs = val & 0x0003E000; 122 | regs = regs >> 13; 123 | printf("Write to regs %d\n", regs); 124 | } 125 | else if (p_idcode) { 126 | printf("IDCODE=%x\n", val & 0x0FFFFFFF); 127 | p_idcode = false; 128 | } 129 | else { 130 | printf("\n"); 131 | } 132 | } 133 | 134 | i++; 135 | } 136 | 137 | done: 138 | return 0; 139 | } 140 | -------------------------------------------------------------------------------- /parse_bin.c: -------------------------------------------------------------------------------- 1 | /* 2 | * Copyright (c) 2019. Yizhou Shan. All rights reserved. 3 | * Contact: syzwhat@gmail.com 4 | * 5 | * This file can parse the ultrascale+ bitstream files. 6 | */ 7 | #include 8 | #include 9 | #include 10 | #include 11 | #include 12 | #include 13 | #include 14 | #include 15 | #include 16 | #include 17 | #include 18 | 19 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 20 | 21 | #define NR_BYTES_OF_ICAP (4) 22 | 23 | #define REG_CRC 0 24 | #define REG_FAR 1 25 | #define REG_FDRI 2 26 | 27 | enum OPS { 28 | OP_NOP = 0, 29 | OP_R = 1, 30 | OP_W = 2, 31 | OP_RW = 3, 32 | }; 33 | 34 | struct bitstream_op { 35 | void (*init)(uint32_t val); 36 | void (*hndl)(uint32_t val); 37 | const char *name; 38 | enum OPS allowed_ops; 39 | int address; 40 | const char *desc; 41 | }; 42 | 43 | static void dummy_init(uint32_t val) 44 | { 45 | (void)val; 46 | } 47 | static void dummy_hndl(uint32_t val) 48 | { 49 | (void)val; 50 | } 51 | static void init_fdri(uint32_t val); 52 | static void hndl_cmd(uint32_t val); 53 | static void hndl_mask(uint32_t val); 54 | static void hndl_bspi(uint32_t val); 55 | 56 | static const struct bitstream_op dummy_op_ = { dummy_init, dummy_hndl, "Dummy", OP_NOP, 0xffff, "Dummy" }; 57 | static const struct bitstream_op *dummy_op = &dummy_op_; 58 | static const struct bitstream_op bitstream_ops[] = { 59 | { dummy_init, dummy_hndl, "CRC", OP_RW, 0b00000, "CRC Register" }, 60 | { dummy_init, dummy_hndl, "FAR", OP_RW, 0b00001, "Frame Address Register" }, 61 | { init_fdri, dummy_hndl, "FDRI", OP_W, 0b00010, "Frame Data Register, Input Register (write configuration data)" }, 62 | { dummy_init, dummy_hndl, "FDRO", OP_R, 0b00011, "Frame Data Register, Output Register (read configuration data)" }, 63 | { dummy_init, hndl_cmd, "CMD", OP_RW, 0b00100, "Command Register" }, 64 | { dummy_init, dummy_hndl, "CTL0", OP_RW, 0b00101, "Control Register 0" }, 65 | { dummy_init, hndl_mask, "MASK", OP_RW, 0b00110, "Masking Register for CTL0 and CTL1" }, 66 | { dummy_init, dummy_hndl, "STAT", OP_R, 0b00111, "Status Register" }, 67 | { dummy_init, dummy_hndl, "LOUT", OP_W, 0b01000, "Legacy Output Register for daisy chain" }, 68 | { dummy_init, dummy_hndl, "COR0", OP_RW, 0b01001, "Configuration Option Register 0" }, 69 | { dummy_init, dummy_hndl, "MFWR", OP_W, 0b01010, "Multiple Frame Write Register" }, 70 | { dummy_init, dummy_hndl, "CBC", OP_W, 0b01011, "Initial CBC Value Register" }, 71 | { dummy_init, dummy_hndl, "IDCODE", OP_RW, 0b01100, "Device ID Register" }, 72 | { dummy_init, dummy_hndl, "AXSS", OP_RW, 0b01101, "User Access Register" }, 73 | { dummy_init, dummy_hndl, "COR1", OP_RW, 0b01110, "Configuration Option Register 1" }, 74 | { dummy_init, dummy_hndl, "WBSTAR", OP_RW, 0b10000, "Warm Boot Start Address Register" }, 75 | { dummy_init, dummy_hndl, "TIMER", OP_RW, 0b10001, "Watchdog Timer Register" }, 76 | /** CRC Register is not documented in UG470, but mentioned in Table 5-19 "Sample XC7K325T Bitstream" */ 77 | { dummy_init, dummy_hndl, "CRC", OP_RW, 0b10011, "CRC Register" }, 78 | { dummy_init, dummy_hndl, "BOOTSTS", OP_R, 0b10110, "Boot History Status Register" }, 79 | { dummy_init, dummy_hndl, "CTL1", OP_RW, 0b11000, "Control Register 1" }, 80 | { dummy_init, hndl_bspi, "BSPI", OP_RW, 0b11111, "BPI/SPI Configuration Options Register" }, 81 | }; 82 | 83 | static struct { 84 | uint32_t mask; 85 | int num; 86 | } globals; 87 | 88 | static void init_fdri(uint32_t val) 89 | { 90 | if (val == 0x30004000) { 91 | globals.num = 121; 92 | } 93 | } 94 | 95 | static void hndl_mask(uint32_t val) 96 | { 97 | globals.mask = val; 98 | } 99 | 100 | static void hndl_bspi(uint32_t val) 101 | { 102 | uint32_t opcode = val & 0xff; 103 | uint32_t spi_buswidth = (val & 0x300) >> 8; 104 | 105 | printf("Buswidth: %d | Opcode: ", spi_buswidth); 106 | struct { 107 | const char *instruction; 108 | uint32_t opcode; 109 | } spi_instructions[] = { 110 | { "Fast Read x1", 0x0B }, 111 | { "Dual Output Fast Read", 0x3B }, 112 | { "Quad Output Fast Read", 0x6B }, 113 | { "Fast Read, 32-bit address", 0x0C }, 114 | { "Dual Output Fast Read, 32-bit address", 0x3C }, 115 | { "Quad Output Fast Read, 32-bit address", 0x6C }, 116 | }; 117 | 118 | for (size_t n = 0; n < sizeof(spi_instructions) / sizeof(spi_instructions[0]); ++n) { 119 | if (opcode == spi_instructions[n].opcode) { 120 | printf("%s", spi_instructions[n].instruction); 121 | return; 122 | } 123 | } 124 | 125 | printf("Unknown opcode 0x%02x <==", opcode); 126 | } 127 | 128 | static void hndl_cmd(uint32_t val) 129 | { 130 | struct cmd_val { 131 | const char *name; 132 | uint32_t val; 133 | const char *desc; 134 | }; 135 | struct cmd_val cmd_vals[] = { 136 | { "NULL", 0b00000, "Null command, does nothing." }, 137 | { "WCFG", 0b00001, "Writes Configuration Data: used prior to writing configuration data to the FDRI." }, 138 | { 139 | "MFW", 0b00010, "Multiple Frame Write: used to perform a write of a single frame" 140 | " data to multiple frame addresses." 141 | }, 142 | { 143 | "DGHIGH/LFRM", 0b00011, "Last Frame: Deasserts the GHIGH_B signal, activating all" 144 | " interconnects. The GHIGH_B signal is asserted with the AGHIGH" 145 | " command." 146 | }, 147 | { 148 | "RCFG", 0b00100, "Reads Configuration Data: used prior to reading configuration data" 149 | " from the FDRO." 150 | }, 151 | { 152 | "START", 0b00101, "Begins the Startup Sequence: The startup sequence begins after a" 153 | " successful CRC check and a DESYNC command are performed." 154 | }, 155 | { 156 | "RCAP", 0b00110, "Resets the CAPTURE signal after performing readback-capture in" 157 | " single-shot mode." 158 | }, 159 | { "RCRC", 0b00111, "Resets CRC: Resets the CRC register." }, 160 | { 161 | "AGHIGH", 0b01000, "Asserts the GHIGH_B signal: places all interconnect in a High-Z" 162 | " state to prevent contention when writing new configuration data." 163 | " This command is only used in shutdown reconfiguration." 164 | " Interconnect is reactivated with the LFRM command." 165 | }, 166 | { 167 | "SWITCH", 0b01001, "Switches the CCLK frequency: updates the frequency of the master" 168 | " CCLK to the value specified by the OSCFSEL bits in the COR0" 169 | " register." 170 | }, 171 | { 172 | "GRESTORE", 0b01010, "Pulses the GRESTORE signal: sets/resets (depending on user" 173 | " configuration) IOB and CLB flip-flops." 174 | }, 175 | { 176 | "SHUTDOWN", 0b01011, "Begin Shutdown Sequence: Initiates the shutdown sequence," 177 | " disabling the device when finished. Shutdown activates on the next" 178 | " successful CRC check or RCRC instruction (typically an RCRC" 179 | " instruction)." 180 | }, 181 | { 182 | "GCAPTURE", 0b01100, "Pulses GCAPTURE: Loads the capture cells with the current" 183 | " register states." 184 | }, 185 | { 186 | "DESYNC", 0b01101, "Resets the DALIGN signal: Used at the end of configuration to" 187 | " desynchronize the device. After desynchronization, all values on" 188 | " the configuration data pins are ignored." 189 | }, 190 | { "Reserved", 0b01110, "Reserved." }, 191 | { "IPROG", 0b01111, "Internal PROG for triggering a warm boot." }, 192 | { 193 | "CRCC", 0b10000, "When readback CRC is selected, the configuration logic recalculates" 194 | " the first readback CRC value after reconfiguration. Toggling" 195 | " GHIGH has the same effect. This command can be used when" 196 | " GHIGH is not toggled during the reconfiguration case." 197 | }, 198 | { "LTIMER", 0b10001, "Reload Watchdog timer." }, 199 | { "BSPI_READ", 0b10010, "BPI/SPI re-initiate bitstream read." }, 200 | { 201 | "FALL_EDGE", 0b10011, "Switch to negative-edge clocking (configuration data capture on" 202 | " falling edge)." 203 | }, 204 | }; 205 | 206 | for (size_t n = 0; n < sizeof(cmd_vals) / sizeof(cmd_vals[0]); ++n) { 207 | if (cmd_vals[n].val == val) { 208 | printf("%s", cmd_vals[n].name); 209 | return; 210 | } 211 | } 212 | 213 | printf("Unknown CMD 0x%02x <==", val); 214 | } 215 | 216 | /* 217 | * 30002001 write to FAR 218 | * 28006000 Read from FDRO 219 | */ 220 | 221 | /* 222 | * .msk file is a binary file. 223 | * it has some text headers and its not 4B aligned. 224 | */ 225 | int main(int argc, char **argv) 226 | { 227 | char *fname, *str_nr_words_to_parse; 228 | int ret; 229 | int i, nr_words; 230 | uint32_t val, prev, *val_ptr; 231 | int fp; 232 | uint8_t *line; 233 | size_t len, ffs; 234 | ssize_t nread; 235 | struct stat fs_stat; 236 | const struct bitstream_op *last_op; 237 | 238 | bool p_idcode = false; 239 | int nr_bytes_to_skip; 240 | 241 | if (argc != 3 && argc != 4) { 242 | printf("Usage: ./parse_bin.o binary_file nr_words_to_parse [nr_bytes_to_skip]\n" 243 | "Examples:\n" 244 | " ./parse_bin.o foo.msk -1 Parse the whole file\n" 245 | " ./parse_bin.o foo.msk -1 120 Parse the whole file, skip the first 120 bytes.\n" 246 | ); 247 | return 0; 248 | } 249 | 250 | fname = argv[1]; 251 | str_nr_words_to_parse = argv[2]; 252 | 253 | fp = open(fname, O_RDONLY); 254 | 255 | if (fp < 0) { 256 | printf("Fail to open: %s\n", fname); 257 | exit(-1); 258 | } 259 | 260 | nr_words = atoi(str_nr_words_to_parse); 261 | 262 | if (nr_words == -1) { 263 | stat(fname, &fs_stat); 264 | nr_words = fs_stat.st_size; 265 | } 266 | 267 | line = mmap(NULL, nr_words, PROT_READ, MAP_PRIVATE | MAP_FILE, fp, 0); 268 | 269 | if (line == MAP_FAILED) { 270 | printf("Fail to mmap\n"); 271 | return 0; 272 | } 273 | 274 | if (argc == 4) { 275 | nr_bytes_to_skip = atoi(argv[3]); 276 | } 277 | else { 278 | nr_bytes_to_skip = 0; 279 | } 280 | 281 | printf("File Name: %s nr_bytes_to_skip: %d\n", fname, nr_bytes_to_skip); 282 | 283 | /* 284 | * If the result does not look good. 285 | * use hexdump to check file first. 286 | * Check where does the file header ASCII stuff ends. 287 | * You need to apply that shift here. 288 | */ 289 | val_ptr = (uint32_t *)(line + nr_bytes_to_skip); 290 | 291 | i = 0; 292 | nr_words /= 4; 293 | 294 | uint8_t state = 0; 295 | bool invert = false; 296 | 297 | prev = 0; 298 | 299 | while (i < nr_words) { 300 | val = *val_ptr++; 301 | val = htonl(val); 302 | 303 | void reverse(int *val) { 304 | /* https://stackoverflow.com/a/2602885 */ 305 | uint8_t reverse_byte(uint8_t b) { 306 | b = (b & 0xF0) >> 4 | (b & 0x0F) << 4; 307 | b = (b & 0xCC) >> 2 | (b & 0x33) << 2; 308 | b = (b & 0xAA) >> 1 | (b & 0x55) << 1; 309 | return b; 310 | } 311 | uint8_t *p_val = (void *)val; 312 | 313 | for (size_t n = 0; n < 4; ++n) { 314 | *p_val = reverse_byte(*p_val); 315 | p_val++; 316 | } 317 | } 318 | 319 | if (state == 0x3) { 320 | reverse(&val); 321 | } 322 | 323 | if (1) { 324 | if (val != prev && prev == 0xffffffff) { 325 | if (ffs > 2) { 326 | printf("[...]\n[%10d] ffffffff -\n", i - 1); 327 | } 328 | 329 | ffs = 0; 330 | } 331 | 332 | if (val == 0xffffffff) { 333 | ffs++; 334 | 335 | if (val == prev) { 336 | i++; 337 | continue; 338 | } 339 | } 340 | 341 | prev = val; 342 | printf("[%10d] %08x ", i, val); 343 | // printf("%08x ", val); 344 | retry_once: 345 | 346 | /* 347 | * Don't bother. 348 | * Just keep it ugly. 349 | */ 350 | if (globals.num) { 351 | last_op->hndl(val); 352 | globals.num--; 353 | 354 | if (globals.num == 0) { 355 | last_op = dummy_op; 356 | } 357 | 358 | printf("\n"); 359 | } 360 | else if ((val & 0xf0000000) == 0x30000000) { 361 | int regs = val & 0x0003E000; 362 | regs = regs >> 13; 363 | globals.num = val & 0x7ff; 364 | const struct bitstream_op *print_message(int regs) { 365 | for (size_t n = 0; n < sizeof(bitstream_ops) / sizeof(bitstream_ops[0]); ++n) { 366 | if (bitstream_ops[n].address == regs) { 367 | bitstream_ops[n].init(val); 368 | printf("Write %d words to %s (next will be %d)\n", globals.num, bitstream_ops[n].name, globals.num + i + 1); 369 | return &bitstream_ops[n]; 370 | } 371 | } 372 | 373 | printf("Write %d words to reg %d <==\n", globals.num, regs); 374 | return dummy_op; 375 | } 376 | 377 | last_op = print_message(regs); 378 | } 379 | else if (val == 0x000000BB) { 380 | if (state == 0) { 381 | printf("Bus Width Sync\n"); 382 | } 383 | else { 384 | printf("Bus Width Sync - Detected bit-swapped encoding, using that from now on!\n"); 385 | } 386 | 387 | state |= 0x2; 388 | } 389 | else if (val == 0x11220044) { 390 | printf("Bus Width Detect\n"); 391 | } 392 | else if (val == 0xaa995566) { 393 | printf(" SYNC\n"); 394 | } 395 | else if (val == 0x20000000) { 396 | printf("NOP\n"); 397 | } 398 | else if (val == 0x30002001) { 399 | printf("Write to FAR\n"); 400 | } 401 | else if (val == 0x28006000) { 402 | printf("Read from FDRO\n"); 403 | } 404 | else if (val == 0x30000001) { 405 | printf("Write to CRC\n"); 406 | } 407 | else if (val == 0x30018001) { 408 | printf("Write to IDCODE\n"); 409 | p_idcode = true; 410 | } 411 | else if (val == 0x30004000) { 412 | printf("Write to FDRI\n"); 413 | } 414 | else if (val == 0x30008001) { 415 | printf("Write to CMD\n"); 416 | } 417 | else if (p_idcode) { 418 | printf("IDCODE=%x\n", val & 0x0FFFFFFF); 419 | p_idcode = false; 420 | } 421 | else { 422 | if (state == 0 && val != 0xffffffff) { 423 | state = 0x1; 424 | reverse(&val); 425 | goto retry_once; 426 | } 427 | 428 | printf("-\n"); 429 | } 430 | } 431 | 432 | i++; 433 | } 434 | 435 | done: 436 | return 0; 437 | } 438 | --------------------------------------------------------------------------------