├── .gitignore ├── LICENSE ├── README.md ├── docs └── Winbond W25Q128JVSIQ Datasheet.pdf ├── examples ├── .gitignore ├── stm32f411 │ ├── .cproject │ ├── .gitignore │ ├── .mxproject │ ├── .project │ ├── .settings │ │ ├── com.st.stm32cube.ide.mcu.sfrview.prefs │ │ └── stm32cubeide.project.prefs │ ├── Core │ │ ├── Inc │ │ │ ├── main.h │ │ │ ├── stm32f4xx_hal_conf.h │ │ │ └── stm32f4xx_it.h │ │ ├── Src │ │ │ ├── main.c │ │ │ ├── stm32f4xx_hal_msp.c │ │ │ ├── stm32f4xx_it.c │ │ │ ├── syscalls.c │ │ │ ├── sysmem.c │ │ │ └── system_stm32f4xx.c │ │ └── Startup │ │ │ └── startup_stm32f411ceux.s │ ├── Drivers │ │ ├── CMSIS │ │ │ ├── Device │ │ │ │ └── ST │ │ │ │ │ └── STM32F4xx │ │ │ │ │ ├── Include │ │ │ │ │ ├── stm32f411xe.h │ │ │ │ │ ├── stm32f4xx.h │ │ │ │ │ └── system_stm32f4xx.h │ │ │ │ │ └── LICENSE.txt │ │ │ ├── Include │ │ │ │ ├── cachel1_armv7.h │ │ │ │ ├── cmsis_armcc.h │ │ │ │ ├── cmsis_armclang.h │ │ │ │ ├── cmsis_armclang_ltm.h │ │ │ │ ├── cmsis_compiler.h │ │ │ │ ├── cmsis_gcc.h │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ ├── cmsis_version.h │ │ │ │ ├── core_armv81mml.h │ │ │ │ ├── core_armv8mbl.h │ │ │ │ ├── core_armv8mml.h │ │ │ │ ├── core_cm0.h │ │ │ │ ├── core_cm0plus.h │ │ │ │ ├── core_cm1.h │ │ │ │ ├── core_cm23.h │ │ │ │ ├── core_cm3.h │ │ │ │ ├── core_cm33.h │ │ │ │ ├── core_cm35p.h │ │ │ │ ├── core_cm4.h │ │ │ │ ├── core_cm55.h │ │ │ │ ├── core_cm7.h │ │ │ │ ├── core_cm85.h │ │ │ │ ├── core_sc000.h │ │ │ │ ├── core_sc300.h │ │ │ │ ├── core_starmc1.h │ │ │ │ ├── mpu_armv7.h │ │ │ │ ├── mpu_armv8.h │ │ │ │ ├── pac_armv81.h │ │ │ │ ├── pmu_armv8.h │ │ │ │ └── tz_context.h │ │ │ └── LICENSE.txt │ │ └── STM32F4xx_HAL_Driver │ │ │ ├── Inc │ │ │ ├── Legacy │ │ │ │ └── stm32_hal_legacy.h │ │ │ ├── stm32f4xx_hal.h │ │ │ ├── stm32f4xx_hal_cortex.h │ │ │ ├── stm32f4xx_hal_crc.h │ │ │ ├── stm32f4xx_hal_def.h │ │ │ ├── stm32f4xx_hal_dma.h │ │ │ ├── stm32f4xx_hal_dma_ex.h │ │ │ ├── stm32f4xx_hal_exti.h │ │ │ ├── stm32f4xx_hal_flash.h │ │ │ ├── stm32f4xx_hal_flash_ex.h │ │ │ ├── stm32f4xx_hal_flash_ramfunc.h │ │ │ ├── stm32f4xx_hal_gpio.h │ │ │ ├── stm32f4xx_hal_gpio_ex.h │ │ │ ├── stm32f4xx_hal_pwr.h │ │ │ ├── stm32f4xx_hal_pwr_ex.h │ │ │ ├── stm32f4xx_hal_rcc.h │ │ │ ├── stm32f4xx_hal_rcc_ex.h │ │ │ ├── stm32f4xx_hal_spi.h │ │ │ ├── stm32f4xx_hal_uart.h │ │ │ ├── stm32f4xx_ll_bus.h │ │ │ ├── stm32f4xx_ll_cortex.h │ │ │ ├── stm32f4xx_ll_crc.h │ │ │ ├── stm32f4xx_ll_dma.h │ │ │ ├── stm32f4xx_ll_exti.h │ │ │ ├── stm32f4xx_ll_gpio.h │ │ │ ├── stm32f4xx_ll_pwr.h │ │ │ ├── stm32f4xx_ll_rcc.h │ │ │ ├── stm32f4xx_ll_spi.h │ │ │ ├── stm32f4xx_ll_system.h │ │ │ ├── stm32f4xx_ll_usart.h │ │ │ └── stm32f4xx_ll_utils.h │ │ │ ├── LICENSE.txt │ │ │ └── Src │ │ │ ├── stm32f4xx_hal.c │ │ │ ├── stm32f4xx_hal_cortex.c │ │ │ ├── stm32f4xx_hal_crc.c │ │ │ ├── stm32f4xx_hal_dma.c │ │ │ ├── stm32f4xx_hal_dma_ex.c │ │ │ ├── stm32f4xx_hal_exti.c │ │ │ ├── stm32f4xx_hal_flash.c │ │ │ ├── stm32f4xx_hal_flash_ex.c │ │ │ ├── stm32f4xx_hal_flash_ramfunc.c │ │ │ ├── stm32f4xx_hal_gpio.c │ │ │ ├── stm32f4xx_hal_pwr.c │ │ │ ├── stm32f4xx_hal_pwr_ex.c │ │ │ ├── stm32f4xx_hal_rcc.c │ │ │ ├── stm32f4xx_hal_rcc_ex.c │ │ │ ├── stm32f4xx_hal_spi.c │ │ │ └── stm32f4xx_hal_uart.c │ ├── STM32F411CEUX_FLASH.ld │ ├── STM32F411CEUX_RAM.ld │ ├── stm32f411 Debug.cfg │ ├── stm32f411 Debug.launch │ ├── stm32f411.ioc │ └── w25qxx ├── stm32l432 │ ├── .cproject │ ├── .gitignore │ ├── .mxproject │ ├── .project │ ├── .settings │ │ ├── com.st.stm32cube.ide.mcu.sfrview.prefs │ │ └── stm32cubeide.project.prefs │ ├── Core │ │ ├── Inc │ │ │ ├── main.h │ │ │ ├── stm32l4xx_hal_conf.h │ │ │ └── stm32l4xx_it.h │ │ ├── Src │ │ │ ├── main.c │ │ │ ├── stm32l4xx_hal_msp.c │ │ │ ├── stm32l4xx_it.c │ │ │ ├── syscalls.c │ │ │ ├── sysmem.c │ │ │ └── system_stm32l4xx.c │ │ └── Startup │ │ │ └── startup_stm32l432kcux.s │ ├── Drivers │ │ ├── CMSIS │ │ │ ├── Device │ │ │ │ └── ST │ │ │ │ │ └── STM32L4xx │ │ │ │ │ ├── Include │ │ │ │ │ ├── stm32l432xx.h │ │ │ │ │ ├── stm32l4xx.h │ │ │ │ │ └── system_stm32l4xx.h │ │ │ │ │ ├── LICENSE.txt │ │ │ │ │ └── License.md │ │ │ ├── Include │ │ │ │ ├── cmsis_armcc.h │ │ │ │ ├── cmsis_armclang.h │ │ │ │ ├── cmsis_armclang_ltm.h │ │ │ │ ├── cmsis_compiler.h │ │ │ │ ├── cmsis_gcc.h │ │ │ │ ├── cmsis_iccarm.h │ │ │ │ ├── cmsis_version.h │ │ │ │ ├── core_armv81mml.h │ │ │ │ ├── core_armv8mbl.h │ │ │ │ ├── core_armv8mml.h │ │ │ │ ├── core_cm0.h │ │ │ │ ├── core_cm0plus.h │ │ │ │ ├── core_cm1.h │ │ │ │ ├── core_cm23.h │ │ │ │ ├── core_cm3.h │ │ │ │ ├── core_cm33.h │ │ │ │ ├── core_cm35p.h │ │ │ │ ├── core_cm4.h │ │ │ │ ├── core_cm7.h │ │ │ │ ├── core_sc000.h │ │ │ │ ├── core_sc300.h │ │ │ │ ├── mpu_armv7.h │ │ │ │ ├── mpu_armv8.h │ │ │ │ └── tz_context.h │ │ │ └── LICENSE.txt │ │ └── STM32L4xx_HAL_Driver │ │ │ ├── Inc │ │ │ ├── Legacy │ │ │ │ └── stm32_hal_legacy.h │ │ │ ├── stm32l4xx_hal.h │ │ │ ├── stm32l4xx_hal_cortex.h │ │ │ ├── stm32l4xx_hal_def.h │ │ │ ├── stm32l4xx_hal_dma.h │ │ │ ├── stm32l4xx_hal_dma_ex.h │ │ │ ├── stm32l4xx_hal_exti.h │ │ │ ├── stm32l4xx_hal_flash.h │ │ │ ├── stm32l4xx_hal_flash_ex.h │ │ │ ├── stm32l4xx_hal_flash_ramfunc.h │ │ │ ├── stm32l4xx_hal_gpio.h │ │ │ ├── stm32l4xx_hal_gpio_ex.h │ │ │ ├── stm32l4xx_hal_i2c.h │ │ │ ├── stm32l4xx_hal_i2c_ex.h │ │ │ ├── stm32l4xx_hal_pwr.h │ │ │ ├── stm32l4xx_hal_pwr_ex.h │ │ │ ├── stm32l4xx_hal_qspi.h │ │ │ ├── stm32l4xx_hal_rcc.h │ │ │ ├── stm32l4xx_hal_rcc_ex.h │ │ │ ├── stm32l4xx_hal_tim.h │ │ │ ├── stm32l4xx_hal_tim_ex.h │ │ │ ├── stm32l4xx_hal_uart.h │ │ │ ├── stm32l4xx_hal_uart_ex.h │ │ │ ├── stm32l4xx_ll_bus.h │ │ │ ├── stm32l4xx_ll_cortex.h │ │ │ ├── stm32l4xx_ll_crs.h │ │ │ ├── stm32l4xx_ll_dma.h │ │ │ ├── stm32l4xx_ll_dmamux.h │ │ │ ├── stm32l4xx_ll_exti.h │ │ │ ├── stm32l4xx_ll_gpio.h │ │ │ ├── stm32l4xx_ll_lpuart.h │ │ │ ├── stm32l4xx_ll_pwr.h │ │ │ ├── stm32l4xx_ll_rcc.h │ │ │ ├── stm32l4xx_ll_system.h │ │ │ ├── stm32l4xx_ll_usart.h │ │ │ └── stm32l4xx_ll_utils.h │ │ │ ├── LICENSE.txt │ │ │ ├── License.md │ │ │ └── Src │ │ │ ├── stm32l4xx_hal.c │ │ │ ├── stm32l4xx_hal_cortex.c │ │ │ ├── stm32l4xx_hal_dma.c │ │ │ ├── stm32l4xx_hal_dma_ex.c │ │ │ ├── stm32l4xx_hal_exti.c │ │ │ ├── stm32l4xx_hal_flash.c │ │ │ ├── stm32l4xx_hal_flash_ex.c │ │ │ ├── stm32l4xx_hal_flash_ramfunc.c │ │ │ ├── stm32l4xx_hal_gpio.c │ │ │ ├── stm32l4xx_hal_i2c.c │ │ │ ├── stm32l4xx_hal_i2c_ex.c │ │ │ ├── stm32l4xx_hal_pwr.c │ │ │ ├── stm32l4xx_hal_pwr_ex.c │ │ │ ├── stm32l4xx_hal_qspi.c │ │ │ ├── stm32l4xx_hal_rcc.c │ │ │ ├── stm32l4xx_hal_rcc_ex.c │ │ │ ├── stm32l4xx_hal_tim.c │ │ │ ├── stm32l4xx_hal_tim_ex.c │ │ │ ├── stm32l4xx_hal_uart.c │ │ │ └── stm32l4xx_hal_uart_ex.c │ ├── STM32L432KCUX_FLASH.ld │ ├── stm32l432 Debug.launch │ ├── stm32l432.ioc │ └── w25qxx ├── stm32l432_qspi │ └── Drivers │ │ └── STM32L4xx_HAL_Driver │ │ ├── Inc │ │ └── stm32l4xx_hal_qspi.h │ │ └── Src │ │ └── stm32l4xx_hal_qspi.c └── stm32world_stm32f405 │ ├── .cproject │ ├── .gitignore │ ├── .mxproject │ ├── .project │ ├── .settings │ ├── org.eclipse.cdt.core.prefs │ ├── org.eclipse.core.resources.prefs │ └── stm32cubeide.project.prefs │ ├── Core │ ├── Inc │ │ ├── main.h │ │ ├── stm32f4xx_hal_conf.h │ │ └── stm32f4xx_it.h │ ├── Src │ │ ├── main.c │ │ ├── stm32f4xx_hal_msp.c │ │ ├── stm32f4xx_it.c │ │ ├── syscalls.c │ │ ├── sysmem.c │ │ └── system_stm32f4xx.c │ └── Startup │ │ └── startup_stm32f405rgtx.s │ ├── Drivers │ ├── CMSIS │ │ ├── Device │ │ │ └── ST │ │ │ │ └── STM32F4xx │ │ │ │ ├── Include │ │ │ │ ├── stm32f405xx.h │ │ │ │ ├── stm32f4xx.h │ │ │ │ └── system_stm32f4xx.h │ │ │ │ └── LICENSE.txt │ │ ├── Include │ │ │ ├── cachel1_armv7.h │ │ │ ├── cmsis_armcc.h │ │ │ ├── cmsis_armclang.h │ │ │ ├── cmsis_armclang_ltm.h │ │ │ ├── cmsis_compiler.h │ │ │ ├── cmsis_gcc.h │ │ │ ├── cmsis_iccarm.h │ │ │ ├── cmsis_version.h │ │ │ ├── core_armv81mml.h │ │ │ ├── core_armv8mbl.h │ │ │ ├── core_armv8mml.h │ │ │ ├── core_cm0.h │ │ │ ├── core_cm0plus.h │ │ │ ├── core_cm1.h │ │ │ ├── core_cm23.h │ │ │ ├── core_cm3.h │ │ │ ├── core_cm33.h │ │ │ ├── core_cm35p.h │ │ │ ├── core_cm4.h │ │ │ ├── core_cm55.h │ │ │ ├── core_cm7.h │ │ │ ├── core_cm85.h │ │ │ ├── core_sc000.h │ │ │ ├── core_sc300.h │ │ │ ├── core_starmc1.h │ │ │ ├── mpu_armv7.h │ │ │ ├── mpu_armv8.h │ │ │ ├── pac_armv81.h │ │ │ ├── pmu_armv8.h │ │ │ └── tz_context.h │ │ └── LICENSE.txt │ └── STM32F4xx_HAL_Driver │ │ ├── Inc │ │ ├── Legacy │ │ │ └── stm32_hal_legacy.h │ │ ├── stm32f4xx_hal.h │ │ ├── stm32f4xx_hal_cortex.h │ │ ├── stm32f4xx_hal_crc.h │ │ ├── stm32f4xx_hal_def.h │ │ ├── stm32f4xx_hal_dma.h │ │ ├── stm32f4xx_hal_dma_ex.h │ │ ├── stm32f4xx_hal_exti.h │ │ ├── stm32f4xx_hal_flash.h │ │ ├── stm32f4xx_hal_flash_ex.h │ │ ├── stm32f4xx_hal_flash_ramfunc.h │ │ ├── stm32f4xx_hal_gpio.h │ │ ├── stm32f4xx_hal_gpio_ex.h │ │ ├── stm32f4xx_hal_pwr.h │ │ ├── stm32f4xx_hal_pwr_ex.h │ │ ├── stm32f4xx_hal_rcc.h │ │ ├── stm32f4xx_hal_rcc_ex.h │ │ ├── stm32f4xx_hal_spi.h │ │ ├── stm32f4xx_hal_uart.h │ │ ├── stm32f4xx_ll_bus.h │ │ ├── stm32f4xx_ll_cortex.h │ │ ├── stm32f4xx_ll_crc.h │ │ ├── stm32f4xx_ll_dma.h │ │ ├── stm32f4xx_ll_exti.h │ │ ├── stm32f4xx_ll_gpio.h │ │ ├── stm32f4xx_ll_pwr.h │ │ ├── stm32f4xx_ll_rcc.h │ │ ├── stm32f4xx_ll_spi.h │ │ ├── stm32f4xx_ll_system.h │ │ ├── stm32f4xx_ll_usart.h │ │ └── stm32f4xx_ll_utils.h │ │ ├── LICENSE.txt │ │ └── Src │ │ ├── stm32f4xx_hal.c │ │ ├── stm32f4xx_hal_cortex.c │ │ ├── stm32f4xx_hal_crc.c │ │ ├── stm32f4xx_hal_dma.c │ │ ├── stm32f4xx_hal_dma_ex.c │ │ ├── stm32f4xx_hal_exti.c │ │ ├── stm32f4xx_hal_flash.c │ │ ├── stm32f4xx_hal_flash_ex.c │ │ ├── stm32f4xx_hal_flash_ramfunc.c │ │ ├── stm32f4xx_hal_gpio.c │ │ ├── stm32f4xx_hal_pwr.c │ │ ├── stm32f4xx_hal_pwr_ex.c │ │ ├── stm32f4xx_hal_rcc.c │ │ ├── stm32f4xx_hal_rcc_ex.c │ │ ├── stm32f4xx_hal_spi.c │ │ └── stm32f4xx_hal_uart.c │ ├── STM32F405RGTX_FLASH.ld │ ├── STM32F405RGTX_RAM.ld │ ├── stm32world_stm32f405 Debug.launch │ ├── stm32world_stm32f405.ioc │ └── w25qxx └── src ├── w25qxx.c └── w25qxx.h /.gitignore: -------------------------------------------------------------------------------- 1 | # Prerequisites 2 | *.d 3 | 4 | # Object files 5 | *.o 6 | *.ko 7 | *.obj 8 | *.elf 9 | 10 | # Linker output 11 | *.ilk 12 | *.map 13 | *.exp 14 | 15 | # Precompiled Headers 16 | *.gch 17 | *.pch 18 | 19 | # Libraries 20 | *.lib 21 | *.a 22 | *.la 23 | *.lo 24 | 25 | # Shared objects (inc. Windows DLLs) 26 | *.dll 27 | *.so 28 | *.so.* 29 | *.dylib 30 | 31 | # Executables 32 | *.exe 33 | *.out 34 | *.app 35 | *.i*86 36 | *.x86_64 37 | *.hex 38 | 39 | # Debug files 40 | *.dSYM/ 41 | *.su 42 | *.idb 43 | *.pdb 44 | 45 | # Kernel Module Compile Results 46 | *.mod* 47 | *.cmd 48 | .tmp_versions/ 49 | modules.order 50 | Module.symvers 51 | Mkfile.old 52 | dkms.conf 53 | 54 | language.settings.xml 55 | 56 | -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | Pragmatic Software License (PSL-1.0) 2 | 3 | 1. Definitions 4 | 5 | "Software" means the source code, object code, documentation, and any associated 6 | files made available under this license. "You" (or "Your") means any individual 7 | or entity that receives, uses, or distributes the Software. 8 | 9 | "Contributor" means any entity that submits code or documentation to the 10 | Software. 11 | 12 | 2. Grant of License 13 | 14 | Subject to the terms of this License, the original author(s) and contributors 15 | grant You a worldwide, royalty-free, non-exclusive license to: 16 | 17 | Use, copy, modify, and distribute the Software and derivative works under the 18 | terms stated in this License. Modify and redistribute the Software under the 19 | same license terms, provided that proper attribution is maintained. 20 | 21 | 3. Usage Restrictions 22 | 23 | You may not use, distribute, or modify this Software in any project, product, or 24 | service that: 25 | 26 | * Promotes or enforces inclusivity, diversity, gender identity activism, or 27 | social justice causes. 28 | 29 | * Advocates for or is affiliated with environmental activism, veganism, or 30 | sustainability movements. 31 | 32 | * Incorporates policies or messaging aligned with woke ideology, identity 33 | politics, or political correctness culture. 34 | 35 | * Is designed for organizations, groups, or initiatives explicitly endorsing 36 | social justice activism or progressive ideology. 37 | 38 | * Uses, integrates, or depends on software released under any Open Source 39 | Initiative (OSI)-approved license. 40 | 41 | 4. Commercial License Requirement for Violations 42 | 43 | Failure to comply with the restrictions in Section 3 automatically revokes this 44 | license, and You must obtain a commercial license from the original copyright 45 | holder(s). The minimum fee for such a license shall be US$ 10,000, payable 46 | within 30 days of written notice of noncompliance. The copyright holder(s) 47 | reserve the right to increase this fee at their sole discretion based on the 48 | extent of the violation. 49 | 50 | 5. No Warranty 51 | 52 | The Software is provided "as is," without warranties of any kind, either express 53 | or implied. The authors and contributors disclaim any liability for damages 54 | resulting from the use or misuse of the Software. 55 | 56 | 6. Attribution 57 | 58 | Redistributions must include this license text, and any modifications must be 59 | clearly documented. 60 | 61 | 7. Termination 62 | 63 | If You violate any of the terms specified in Section 3, Your rights under this 64 | License are immediately and automatically revoked. Continued use of the Software 65 | after revocation constitutes unauthorized use and requires a commercial license 66 | as per Section 4. 67 | 68 | -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # stm32-w25qxx 2 | 3 | Minimal W25Qxx Driver for STM32 HAL 4 | 5 | Description: https://stm32world.com/wiki/STM32_W25Qxx 6 | 7 | -------------------------------------------------------------------------------- /docs/Winbond W25Q128JVSIQ Datasheet.pdf: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/lbthomsen/stm32-w25qxx/dd351593c401f8b85ebeca1200603df30bbd39d8/docs/Winbond W25Q128JVSIQ Datasheet.pdf -------------------------------------------------------------------------------- /examples/.gitignore: -------------------------------------------------------------------------------- 1 | /.metadata/ 2 | -------------------------------------------------------------------------------- /examples/stm32f411/.gitignore: -------------------------------------------------------------------------------- 1 | /Debug/ 2 | -------------------------------------------------------------------------------- /examples/stm32f411/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | stm32f411 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.st.stm32cube.ide.mcu.MCUProjectNature 23 | com.st.stm32cube.ide.mcu.MCUCubeProjectNature 24 | org.eclipse.cdt.core.cnature 25 | com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature 26 | com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature 27 | com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature 28 | com.st.stm32cube.ide.mcu.MCURootProjectNature 29 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 30 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 31 | 32 | 33 | -------------------------------------------------------------------------------- /examples/stm32f411/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}} 3 | -------------------------------------------------------------------------------- /examples/stm32f411/.settings/stm32cubeide.project.prefs: -------------------------------------------------------------------------------- 1 | 635E684B79701B039C64EA45C3F84D30=85C9BDD2863A39DA4F6210BA1AD263D8 2 | 66BE74F758C12D739921AEA421D593D3=1 3 | 8DF89ED150041C4CBC7CB9A9CAA90856=B3612C9F8E5BD2257A1FED4F135535C5 4 | DC22A860405A8BF2F2C095E5B6529F12=B3612C9F8E5BD2257A1FED4F135535C5 5 | eclipse.preferences.version=1 6 | -------------------------------------------------------------------------------- /examples/stm32f411/Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.h 5 | * @brief : Header for main.c file. 6 | * This file contains the common defines of the application. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2022, 2023, 2024 Lars Boegild Thomsen 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __MAIN_H 23 | #define __MAIN_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f4xx_hal.h" 31 | 32 | /* Private includes ----------------------------------------------------------*/ 33 | /* USER CODE BEGIN Includes */ 34 | 35 | /* USER CODE END Includes */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* USER CODE BEGIN ET */ 39 | 40 | /* USER CODE END ET */ 41 | 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* USER CODE BEGIN EC */ 44 | 45 | /* USER CODE END EC */ 46 | 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* USER CODE BEGIN EM */ 49 | 50 | /* USER CODE END EM */ 51 | 52 | /* Exported functions prototypes ---------------------------------------------*/ 53 | void Error_Handler(void); 54 | 55 | /* USER CODE BEGIN EFP */ 56 | 57 | /* USER CODE END EFP */ 58 | 59 | /* Private defines -----------------------------------------------------------*/ 60 | #define LED_Pin GPIO_PIN_13 61 | #define LED_GPIO_Port GPIOC 62 | #define SPI1_CS_Pin GPIO_PIN_4 63 | #define SPI1_CS_GPIO_Port GPIOA 64 | 65 | /* USER CODE BEGIN Private defines */ 66 | 67 | #ifdef DEBUG 68 | #define DBG(...) printf(__VA_ARGS__) 69 | #else 70 | #define DBG(...) 71 | #endif 72 | 73 | /* USER CODE END Private defines */ 74 | 75 | #ifdef __cplusplus 76 | } 77 | #endif 78 | 79 | #endif /* __MAIN_H */ 80 | -------------------------------------------------------------------------------- /examples/stm32f411/Core/Inc/stm32f4xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f4xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2022 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F4xx_IT_H 22 | #define __STM32F4xx_IT_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Private includes ----------------------------------------------------------*/ 29 | /* USER CODE BEGIN Includes */ 30 | 31 | /* USER CODE END Includes */ 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN ET */ 35 | 36 | /* USER CODE END ET */ 37 | 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* USER CODE BEGIN EC */ 40 | 41 | /* USER CODE END EC */ 42 | 43 | /* Exported macro ------------------------------------------------------------*/ 44 | /* USER CODE BEGIN EM */ 45 | 46 | /* USER CODE END EM */ 47 | 48 | /* Exported functions prototypes ---------------------------------------------*/ 49 | void NMI_Handler(void); 50 | void HardFault_Handler(void); 51 | void MemManage_Handler(void); 52 | void BusFault_Handler(void); 53 | void UsageFault_Handler(void); 54 | void SVC_Handler(void); 55 | void DebugMon_Handler(void); 56 | void PendSV_Handler(void); 57 | void SysTick_Handler(void); 58 | /* USER CODE BEGIN EFP */ 59 | 60 | /* USER CODE END EFP */ 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif /* __STM32F4xx_IT_H */ 67 | -------------------------------------------------------------------------------- /examples/stm32f411/Core/Src/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f4xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2022 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "main.h" 22 | #include "stm32f4xx_it.h" 23 | /* Private includes ----------------------------------------------------------*/ 24 | /* USER CODE BEGIN Includes */ 25 | /* USER CODE END Includes */ 26 | 27 | /* Private typedef -----------------------------------------------------------*/ 28 | /* USER CODE BEGIN TD */ 29 | 30 | /* USER CODE END TD */ 31 | 32 | /* Private define ------------------------------------------------------------*/ 33 | /* USER CODE BEGIN PD */ 34 | 35 | /* USER CODE END PD */ 36 | 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* USER CODE BEGIN PM */ 39 | 40 | /* USER CODE END PM */ 41 | 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* USER CODE BEGIN PV */ 44 | 45 | /* USER CODE END PV */ 46 | 47 | /* Private function prototypes -----------------------------------------------*/ 48 | /* USER CODE BEGIN PFP */ 49 | 50 | /* USER CODE END PFP */ 51 | 52 | /* Private user code ---------------------------------------------------------*/ 53 | /* USER CODE BEGIN 0 */ 54 | 55 | /* USER CODE END 0 */ 56 | 57 | /* External variables --------------------------------------------------------*/ 58 | 59 | /* USER CODE BEGIN EV */ 60 | 61 | /* USER CODE END EV */ 62 | 63 | /******************************************************************************/ 64 | /* Cortex-M4 Processor Interruption and Exception Handlers */ 65 | /******************************************************************************/ 66 | /** 67 | * @brief This function handles Non maskable interrupt. 68 | */ 69 | void NMI_Handler(void) 70 | { 71 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 72 | 73 | /* USER CODE END NonMaskableInt_IRQn 0 */ 74 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 75 | while (1) 76 | { 77 | } 78 | /* USER CODE END NonMaskableInt_IRQn 1 */ 79 | } 80 | 81 | /** 82 | * @brief This function handles Hard fault interrupt. 83 | */ 84 | void HardFault_Handler(void) 85 | { 86 | /* USER CODE BEGIN HardFault_IRQn 0 */ 87 | 88 | /* USER CODE END HardFault_IRQn 0 */ 89 | while (1) 90 | { 91 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 92 | /* USER CODE END W1_HardFault_IRQn 0 */ 93 | } 94 | } 95 | 96 | /** 97 | * @brief This function handles Memory management fault. 98 | */ 99 | void MemManage_Handler(void) 100 | { 101 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 102 | 103 | /* USER CODE END MemoryManagement_IRQn 0 */ 104 | while (1) 105 | { 106 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 107 | /* USER CODE END W1_MemoryManagement_IRQn 0 */ 108 | } 109 | } 110 | 111 | /** 112 | * @brief This function handles Pre-fetch fault, memory access fault. 113 | */ 114 | void BusFault_Handler(void) 115 | { 116 | /* USER CODE BEGIN BusFault_IRQn 0 */ 117 | 118 | /* USER CODE END BusFault_IRQn 0 */ 119 | while (1) 120 | { 121 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 122 | /* USER CODE END W1_BusFault_IRQn 0 */ 123 | } 124 | } 125 | 126 | /** 127 | * @brief This function handles Undefined instruction or illegal state. 128 | */ 129 | void UsageFault_Handler(void) 130 | { 131 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 132 | 133 | /* USER CODE END UsageFault_IRQn 0 */ 134 | while (1) 135 | { 136 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 137 | /* USER CODE END W1_UsageFault_IRQn 0 */ 138 | } 139 | } 140 | 141 | /** 142 | * @brief This function handles System service call via SWI instruction. 143 | */ 144 | void SVC_Handler(void) 145 | { 146 | /* USER CODE BEGIN SVCall_IRQn 0 */ 147 | 148 | /* USER CODE END SVCall_IRQn 0 */ 149 | /* USER CODE BEGIN SVCall_IRQn 1 */ 150 | 151 | /* USER CODE END SVCall_IRQn 1 */ 152 | } 153 | 154 | /** 155 | * @brief This function handles Debug monitor. 156 | */ 157 | void DebugMon_Handler(void) 158 | { 159 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 160 | 161 | /* USER CODE END DebugMonitor_IRQn 0 */ 162 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 163 | 164 | /* USER CODE END DebugMonitor_IRQn 1 */ 165 | } 166 | 167 | /** 168 | * @brief This function handles Pendable request for system service. 169 | */ 170 | void PendSV_Handler(void) 171 | { 172 | /* USER CODE BEGIN PendSV_IRQn 0 */ 173 | 174 | /* USER CODE END PendSV_IRQn 0 */ 175 | /* USER CODE BEGIN PendSV_IRQn 1 */ 176 | 177 | /* USER CODE END PendSV_IRQn 1 */ 178 | } 179 | 180 | /** 181 | * @brief This function handles System tick timer. 182 | */ 183 | void SysTick_Handler(void) 184 | { 185 | /* USER CODE BEGIN SysTick_IRQn 0 */ 186 | 187 | /* USER CODE END SysTick_IRQn 0 */ 188 | HAL_IncTick(); 189 | /* USER CODE BEGIN SysTick_IRQn 1 */ 190 | 191 | /* USER CODE END SysTick_IRQn 1 */ 192 | } 193 | 194 | /******************************************************************************/ 195 | /* STM32F4xx Peripheral Interrupt Handlers */ 196 | /* Add here the Interrupt Handlers for the used peripherals. */ 197 | /* For the available peripheral interrupt handler names, */ 198 | /* please refer to the startup file (startup_stm32f4xx.s). */ 199 | /******************************************************************************/ 200 | 201 | /* USER CODE BEGIN 1 */ 202 | 203 | /* USER CODE END 1 */ 204 | -------------------------------------------------------------------------------- /examples/stm32f411/Core/Src/syscalls.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file syscalls.c 4 | * @author Auto-generated by STM32CubeIDE 5 | * @brief STM32CubeIDE Minimal System calls file 6 | * 7 | * For more information about which c-functions 8 | * need which of these lowlevel functions 9 | * please consult the Newlib libc-manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2022 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | 34 | /* Variables */ 35 | extern int __io_putchar(int ch) __attribute__((weak)); 36 | extern int __io_getchar(void) __attribute__((weak)); 37 | 38 | 39 | char *__env[1] = { 0 }; 40 | char **environ = __env; 41 | 42 | 43 | /* Functions */ 44 | void initialise_monitor_handles() 45 | { 46 | } 47 | 48 | int _getpid(void) 49 | { 50 | return 1; 51 | } 52 | 53 | int _kill(int pid, int sig) 54 | { 55 | errno = EINVAL; 56 | return -1; 57 | } 58 | 59 | void _exit (int status) 60 | { 61 | _kill(status, -1); 62 | while (1) {} /* Make sure we hang here */ 63 | } 64 | 65 | __attribute__((weak)) int _read(int file, char *ptr, int len) 66 | { 67 | int DataIdx; 68 | 69 | for (DataIdx = 0; DataIdx < len; DataIdx++) 70 | { 71 | *ptr++ = __io_getchar(); 72 | } 73 | 74 | return len; 75 | } 76 | 77 | __attribute__((weak)) int _write(int file, char *ptr, int len) 78 | { 79 | int DataIdx; 80 | 81 | for (DataIdx = 0; DataIdx < len; DataIdx++) 82 | { 83 | __io_putchar(*ptr++); 84 | } 85 | return len; 86 | } 87 | 88 | int _close(int file) 89 | { 90 | return -1; 91 | } 92 | 93 | 94 | int _fstat(int file, struct stat *st) 95 | { 96 | st->st_mode = S_IFCHR; 97 | return 0; 98 | } 99 | 100 | int _isatty(int file) 101 | { 102 | return 1; 103 | } 104 | 105 | int _lseek(int file, int ptr, int dir) 106 | { 107 | return 0; 108 | } 109 | 110 | int _open(char *path, int flags, ...) 111 | { 112 | /* Pretend like we always fail */ 113 | return -1; 114 | } 115 | 116 | int _wait(int *status) 117 | { 118 | errno = ECHILD; 119 | return -1; 120 | } 121 | 122 | int _unlink(char *name) 123 | { 124 | errno = ENOENT; 125 | return -1; 126 | } 127 | 128 | int _times(struct tms *buf) 129 | { 130 | return -1; 131 | } 132 | 133 | int _stat(char *file, struct stat *st) 134 | { 135 | st->st_mode = S_IFCHR; 136 | return 0; 137 | } 138 | 139 | int _link(char *old, char *new) 140 | { 141 | errno = EMLINK; 142 | return -1; 143 | } 144 | 145 | int _fork(void) 146 | { 147 | errno = EAGAIN; 148 | return -1; 149 | } 150 | 151 | int _execve(char *name, char **argv, char **env) 152 | { 153 | errno = ENOMEM; 154 | return -1; 155 | } 156 | -------------------------------------------------------------------------------- /examples/stm32f411/Core/Src/sysmem.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sysmem.c 4 | * @author Generated by STM32CubeIDE 5 | * @brief STM32CubeIDE System Memory calls file 6 | * 7 | * For more information about which C functions 8 | * need which of these lowlevel functions 9 | * please consult the newlib libc manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2022 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | 27 | /** 28 | * Pointer to the current high watermark of the heap usage 29 | */ 30 | static uint8_t *__sbrk_heap_end = NULL; 31 | 32 | /** 33 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc 34 | * and others from the C library 35 | * 36 | * @verbatim 37 | * ############################################################################ 38 | * # .data # .bss # newlib heap # MSP stack # 39 | * # # # # Reserved by _Min_Stack_Size # 40 | * ############################################################################ 41 | * ^-- RAM start ^-- _end _estack, RAM end --^ 42 | * @endverbatim 43 | * 44 | * This implementation starts allocating at the '_end' linker symbol 45 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack 46 | * The implementation considers '_estack' linker symbol to be RAM end 47 | * NOTE: If the MSP stack, at any point during execution, grows larger than the 48 | * reserved size, please increase the '_Min_Stack_Size'. 49 | * 50 | * @param incr Memory size 51 | * @return Pointer to allocated memory 52 | */ 53 | void *_sbrk(ptrdiff_t incr) 54 | { 55 | extern uint8_t _end; /* Symbol defined in the linker script */ 56 | extern uint8_t _estack; /* Symbol defined in the linker script */ 57 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ 58 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 59 | const uint8_t *max_heap = (uint8_t *)stack_limit; 60 | uint8_t *prev_heap_end; 61 | 62 | /* Initialize heap end at first call */ 63 | if (NULL == __sbrk_heap_end) 64 | { 65 | __sbrk_heap_end = &_end; 66 | } 67 | 68 | /* Protect heap from growing into the reserved MSP stack */ 69 | if (__sbrk_heap_end + incr > max_heap) 70 | { 71 | errno = ENOMEM; 72 | return (void *)-1; 73 | } 74 | 75 | prev_heap_end = __sbrk_heap_end; 76 | __sbrk_heap_end += incr; 77 | 78 | return (void *)prev_heap_end; 79 | } 80 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /** @addtogroup CMSIS 20 | * @{ 21 | */ 22 | 23 | /** @addtogroup stm32f4xx_system 24 | * @{ 25 | */ 26 | 27 | /** 28 | * @brief Define to prevent recursive inclusion 29 | */ 30 | #ifndef __SYSTEM_STM32F4XX_H 31 | #define __SYSTEM_STM32F4XX_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /** @addtogroup STM32F4xx_System_Includes 38 | * @{ 39 | */ 40 | 41 | /** 42 | * @} 43 | */ 44 | 45 | 46 | /** @addtogroup STM32F4xx_System_Exported_types 47 | * @{ 48 | */ 49 | /* This variable is updated in three ways: 50 | 1) by calling CMSIS function SystemCoreClockUpdate() 51 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 52 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 53 | Note: If you use this function to configure the system clock; then there 54 | is no need to call the 2 first functions listed above, since SystemCoreClock 55 | variable is updated automatically. 56 | */ 57 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 58 | 59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F4xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F4xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F4xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F4XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the Apache-2.0 license shall apply. 5 | You may obtain a copy of the Apache-2.0 at: 6 | https://opensource.org/licenses/Apache-2.0 7 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.5 5 | * @date 02. February 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2022 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/CMSIS/Include/pac_armv81.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file pac_armv81.h 3 | * @brief CMSIS PAC key functions for Armv8.1-M PAC extension 4 | * @version V1.0.0 5 | * @date 23. March 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2022 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef PAC_ARMV81_H 32 | #define PAC_ARMV81_H 33 | 34 | 35 | /* ################### PAC Key functions ########################### */ 36 | /** 37 | \ingroup CMSIS_Core_FunctionInterface 38 | \defgroup CMSIS_Core_PacKeyFunctions PAC Key functions 39 | \brief Functions that access the PAC keys. 40 | @{ 41 | */ 42 | 43 | #if (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) 44 | 45 | /** 46 | \brief read the PAC key used for privileged mode 47 | \details Reads the PAC key stored in the PAC_KEY_P registers. 48 | \param [out] pPacKey 128bit PAC key 49 | */ 50 | __STATIC_FORCEINLINE void __get_PAC_KEY_P (uint32_t* pPacKey) { 51 | __ASM volatile ( 52 | "mrs r1, pac_key_p_0\n" 53 | "str r1,[%0,#0]\n" 54 | "mrs r1, pac_key_p_1\n" 55 | "str r1,[%0,#4]\n" 56 | "mrs r1, pac_key_p_2\n" 57 | "str r1,[%0,#8]\n" 58 | "mrs r1, pac_key_p_3\n" 59 | "str r1,[%0,#12]\n" 60 | : : "r" (pPacKey) : "memory", "r1" 61 | ); 62 | } 63 | 64 | /** 65 | \brief write the PAC key used for privileged mode 66 | \details writes the given PAC key to the PAC_KEY_P registers. 67 | \param [in] pPacKey 128bit PAC key 68 | */ 69 | __STATIC_FORCEINLINE void __set_PAC_KEY_P (uint32_t* pPacKey) { 70 | __ASM volatile ( 71 | "ldr r1,[%0,#0]\n" 72 | "msr pac_key_p_0, r1\n" 73 | "ldr r1,[%0,#4]\n" 74 | "msr pac_key_p_1, r1\n" 75 | "ldr r1,[%0,#8]\n" 76 | "msr pac_key_p_2, r1\n" 77 | "ldr r1,[%0,#12]\n" 78 | "msr pac_key_p_3, r1\n" 79 | : : "r" (pPacKey) : "memory", "r1" 80 | ); 81 | } 82 | 83 | /** 84 | \brief read the PAC key used for unprivileged mode 85 | \details Reads the PAC key stored in the PAC_KEY_U registers. 86 | \param [out] pPacKey 128bit PAC key 87 | */ 88 | __STATIC_FORCEINLINE void __get_PAC_KEY_U (uint32_t* pPacKey) { 89 | __ASM volatile ( 90 | "mrs r1, pac_key_u_0\n" 91 | "str r1,[%0,#0]\n" 92 | "mrs r1, pac_key_u_1\n" 93 | "str r1,[%0,#4]\n" 94 | "mrs r1, pac_key_u_2\n" 95 | "str r1,[%0,#8]\n" 96 | "mrs r1, pac_key_u_3\n" 97 | "str r1,[%0,#12]\n" 98 | : : "r" (pPacKey) : "memory", "r1" 99 | ); 100 | } 101 | 102 | /** 103 | \brief write the PAC key used for unprivileged mode 104 | \details writes the given PAC key to the PAC_KEY_U registers. 105 | \param [in] pPacKey 128bit PAC key 106 | */ 107 | __STATIC_FORCEINLINE void __set_PAC_KEY_U (uint32_t* pPacKey) { 108 | __ASM volatile ( 109 | "ldr r1,[%0,#0]\n" 110 | "msr pac_key_u_0, r1\n" 111 | "ldr r1,[%0,#4]\n" 112 | "msr pac_key_u_1, r1\n" 113 | "ldr r1,[%0,#8]\n" 114 | "msr pac_key_u_2, r1\n" 115 | "ldr r1,[%0,#12]\n" 116 | "msr pac_key_u_3, r1\n" 117 | : : "r" (pPacKey) : "memory", "r1" 118 | ); 119 | } 120 | 121 | #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 122 | 123 | /** 124 | \brief read the PAC key used for privileged mode (non-secure) 125 | \details Reads the PAC key stored in the non-secure PAC_KEY_P registers when in secure mode. 126 | \param [out] pPacKey 128bit PAC key 127 | */ 128 | __STATIC_FORCEINLINE void __TZ_get_PAC_KEY_P_NS (uint32_t* pPacKey) { 129 | __ASM volatile ( 130 | "mrs r1, pac_key_p_0_ns\n" 131 | "str r1,[%0,#0]\n" 132 | "mrs r1, pac_key_p_1_ns\n" 133 | "str r1,[%0,#4]\n" 134 | "mrs r1, pac_key_p_2_ns\n" 135 | "str r1,[%0,#8]\n" 136 | "mrs r1, pac_key_p_3_ns\n" 137 | "str r1,[%0,#12]\n" 138 | : : "r" (pPacKey) : "memory", "r1" 139 | ); 140 | } 141 | 142 | /** 143 | \brief write the PAC key used for privileged mode (non-secure) 144 | \details writes the given PAC key to the non-secure PAC_KEY_P registers when in secure mode. 145 | \param [in] pPacKey 128bit PAC key 146 | */ 147 | __STATIC_FORCEINLINE void __TZ_set_PAC_KEY_P_NS (uint32_t* pPacKey) { 148 | __ASM volatile ( 149 | "ldr r1,[%0,#0]\n" 150 | "msr pac_key_p_0_ns, r1\n" 151 | "ldr r1,[%0,#4]\n" 152 | "msr pac_key_p_1_ns, r1\n" 153 | "ldr r1,[%0,#8]\n" 154 | "msr pac_key_p_2_ns, r1\n" 155 | "ldr r1,[%0,#12]\n" 156 | "msr pac_key_p_3_ns, r1\n" 157 | : : "r" (pPacKey) : "memory", "r1" 158 | ); 159 | } 160 | 161 | /** 162 | \brief read the PAC key used for unprivileged mode (non-secure) 163 | \details Reads the PAC key stored in the non-secure PAC_KEY_U registers when in secure mode. 164 | \param [out] pPacKey 128bit PAC key 165 | */ 166 | __STATIC_FORCEINLINE void __TZ_get_PAC_KEY_U_NS (uint32_t* pPacKey) { 167 | __ASM volatile ( 168 | "mrs r1, pac_key_u_0_ns\n" 169 | "str r1,[%0,#0]\n" 170 | "mrs r1, pac_key_u_1_ns\n" 171 | "str r1,[%0,#4]\n" 172 | "mrs r1, pac_key_u_2_ns\n" 173 | "str r1,[%0,#8]\n" 174 | "mrs r1, pac_key_u_3_ns\n" 175 | "str r1,[%0,#12]\n" 176 | : : "r" (pPacKey) : "memory", "r1" 177 | ); 178 | } 179 | 180 | /** 181 | \brief write the PAC key used for unprivileged mode (non-secure) 182 | \details writes the given PAC key to the non-secure PAC_KEY_U registers when in secure mode. 183 | \param [in] pPacKey 128bit PAC key 184 | */ 185 | __STATIC_FORCEINLINE void __TZ_set_PAC_KEY_U_NS (uint32_t* pPacKey) { 186 | __ASM volatile ( 187 | "ldr r1,[%0,#0]\n" 188 | "msr pac_key_u_0_ns, r1\n" 189 | "ldr r1,[%0,#4]\n" 190 | "msr pac_key_u_1_ns, r1\n" 191 | "ldr r1,[%0,#8]\n" 192 | "msr pac_key_u_2_ns, r1\n" 193 | "ldr r1,[%0,#12]\n" 194 | "msr pac_key_u_3_ns, r1\n" 195 | : : "r" (pPacKey) : "memory", "r1" 196 | ); 197 | } 198 | 199 | #endif /* (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) */ 200 | 201 | #endif /* (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) */ 202 | 203 | /*@} end of CMSIS_Core_PacKeyFunctions */ 204 | 205 | 206 | #endif /* PAC_ARMV81_H */ 207 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F4xx_HAL_CRC_H 21 | #define STM32F4xx_HAL_CRC_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRC 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup CRC_Exported_Types CRC Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief CRC HAL State Structure definition 45 | */ 46 | typedef enum 47 | { 48 | HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ 49 | HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ 50 | HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ 51 | HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ 52 | HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ 53 | } HAL_CRC_StateTypeDef; 54 | 55 | 56 | /** 57 | * @brief CRC Handle Structure definition 58 | */ 59 | typedef struct 60 | { 61 | CRC_TypeDef *Instance; /*!< Register base address */ 62 | 63 | HAL_LockTypeDef Lock; /*!< CRC Locking object */ 64 | 65 | __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ 66 | 67 | } CRC_HandleTypeDef; 68 | /** 69 | * @} 70 | */ 71 | 72 | /* Exported constants --------------------------------------------------------*/ 73 | /** @defgroup CRC_Exported_Constants CRC Exported Constants 74 | * @{ 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported macros -----------------------------------------------------------*/ 82 | /** @defgroup CRC_Exported_Macros CRC Exported Macros 83 | * @{ 84 | */ 85 | 86 | /** @brief Reset CRC handle state. 87 | * @param __HANDLE__ CRC handle. 88 | * @retval None 89 | */ 90 | #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) 91 | 92 | /** 93 | * @brief Reset CRC Data Register. 94 | * @param __HANDLE__ CRC handle 95 | * @retval None 96 | */ 97 | #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) 98 | 99 | /** 100 | * @brief Store data in the Independent Data (ID) register. 101 | * @param __HANDLE__ CRC handle 102 | * @param __VALUE__ Value to be stored in the ID register 103 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 104 | * @retval None 105 | */ 106 | #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) 107 | 108 | /** 109 | * @brief Return the data stored in the Independent Data (ID) register. 110 | * @param __HANDLE__ CRC handle 111 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 112 | * @retval Value of the ID register 113 | */ 114 | #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) 115 | /** 116 | * @} 117 | */ 118 | 119 | 120 | /* Private macros --------------------------------------------------------*/ 121 | /** @defgroup CRC_Private_Macros CRC Private Macros 122 | * @{ 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /* Exported functions --------------------------------------------------------*/ 130 | /** @defgroup CRC_Exported_Functions CRC Exported Functions 131 | * @{ 132 | */ 133 | 134 | /* Initialization and de-initialization functions ****************************/ 135 | /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions 136 | * @{ 137 | */ 138 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); 139 | HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc); 140 | void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); 141 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); 142 | /** 143 | * @} 144 | */ 145 | 146 | /* Peripheral Control functions ***********************************************/ 147 | /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 148 | * @{ 149 | */ 150 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 151 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Peripheral State and Error functions ***************************************/ 157 | /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 158 | * @{ 159 | */ 160 | HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc); 161 | /** 162 | * @} 163 | */ 164 | 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | #ifdef __cplusplus 178 | } 179 | #endif 180 | 181 | #endif /* STM32F4xx_HAL_CRC_H */ 182 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_dma_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of DMA HAL extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef __STM32F4xx_HAL_DMA_EX_H 21 | #define __STM32F4xx_HAL_DMA_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup DMAEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types 40 | * @brief DMAEx Exported types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief HAL DMA Memory definition 46 | */ 47 | typedef enum 48 | { 49 | MEMORY0 = 0x00U, /*!< Memory 0 */ 50 | MEMORY1 = 0x01U /*!< Memory 1 */ 51 | }HAL_DMA_MemoryTypeDef; 52 | 53 | /** 54 | * @} 55 | */ 56 | 57 | /* Exported functions --------------------------------------------------------*/ 58 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions 59 | * @brief DMAEx Exported functions 60 | * @{ 61 | */ 62 | 63 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions 64 | * @brief Extended features functions 65 | * @{ 66 | */ 67 | 68 | /* IO operation functions *******************************************************/ 69 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 70 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 71 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory); 72 | 73 | /** 74 | * @} 75 | */ 76 | /** 77 | * @} 78 | */ 79 | 80 | /* Private functions ---------------------------------------------------------*/ 81 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions 82 | * @brief DMAEx Private functions 83 | * @{ 84 | */ 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /*__STM32F4xx_HAL_DMA_EX_H*/ 102 | 103 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH RAMFUNC driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 20 | #define __STM32F4xx_FLASH_RAMFUNC_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 26 | defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_hal_def.h" 30 | 31 | /** @addtogroup STM32F4xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup FLASH_RAMFUNC 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported macro ------------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 47 | * @{ 48 | */ 49 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void); 50 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void); 51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void); 52 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void); 53 | /** 54 | * @} 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 70 | #ifdef __cplusplus 71 | } 72 | #endif 73 | 74 | 75 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 76 | 77 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_ll_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F4xx_LL_CRC_H 21 | #define STM32F4xx_LL_CRC_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f4xx.h" 29 | 30 | /** @addtogroup STM32F4xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(CRC) 35 | 36 | /** @defgroup CRC_LL CRC 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /** @defgroup CRC_LL_Exported_Constants CRC Exported Constants 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @} 53 | */ 54 | 55 | /* Exported macro ------------------------------------------------------------*/ 56 | /** @defgroup CRC_LL_Exported_Macros CRC Exported Macros 57 | * @{ 58 | */ 59 | 60 | /** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @brief Write a value in CRC register 66 | * @param __INSTANCE__ CRC Instance 67 | * @param __REG__ Register to be written 68 | * @param __VALUE__ Value to be written in the register 69 | * @retval None 70 | */ 71 | #define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__) 72 | 73 | /** 74 | * @brief Read a value in CRC register 75 | * @param __INSTANCE__ CRC Instance 76 | * @param __REG__ Register to be read 77 | * @retval Register value 78 | */ 79 | #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 80 | /** 81 | * @} 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | 89 | /* Exported functions --------------------------------------------------------*/ 90 | /** @defgroup CRC_LL_Exported_Functions CRC Exported Functions 91 | * @{ 92 | */ 93 | 94 | /** @defgroup CRC_LL_EF_Configuration CRC Configuration functions 95 | * @{ 96 | */ 97 | 98 | /** 99 | * @brief Reset the CRC calculation unit. 100 | * @note If Programmable Initial CRC value feature 101 | * is available, also set the Data Register to the value stored in the 102 | * CRC_INIT register, otherwise, reset Data Register to its default value. 103 | * @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit 104 | * @param CRCx CRC Instance 105 | * @retval None 106 | */ 107 | __STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) 108 | { 109 | SET_BIT(CRCx->CR, CRC_CR_RESET); 110 | } 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** @defgroup CRC_LL_EF_Data_Management Data_Management 117 | * @{ 118 | */ 119 | 120 | /** 121 | * @brief Write given 32-bit data to the CRC calculator 122 | * @rmtoll DR DR LL_CRC_FeedData32 123 | * @param CRCx CRC Instance 124 | * @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF 125 | * @retval None 126 | */ 127 | __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) 128 | { 129 | WRITE_REG(CRCx->DR, InData); 130 | } 131 | 132 | /** 133 | * @brief Return current CRC calculation result. 32 bits value is returned. 134 | * @rmtoll DR DR LL_CRC_ReadData32 135 | * @param CRCx CRC Instance 136 | * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). 137 | */ 138 | __STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx) 139 | { 140 | return (uint32_t)(READ_REG(CRCx->DR)); 141 | } 142 | 143 | /** 144 | * @brief Return data stored in the Independent Data(IDR) register. 145 | * @note This register can be used as a temporary storage location for one byte. 146 | * @rmtoll IDR IDR LL_CRC_Read_IDR 147 | * @param CRCx CRC Instance 148 | * @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). 149 | */ 150 | __STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) 151 | { 152 | return (uint32_t)(READ_REG(CRCx->IDR)); 153 | } 154 | 155 | /** 156 | * @brief Store data in the Independent Data(IDR) register. 157 | * @note This register can be used as a temporary storage location for one byte. 158 | * @rmtoll IDR IDR LL_CRC_Write_IDR 159 | * @param CRCx CRC Instance 160 | * @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF 161 | * @retval None 162 | */ 163 | __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) 164 | { 165 | *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; 166 | } 167 | /** 168 | * @} 169 | */ 170 | 171 | #if defined(USE_FULL_LL_DRIVER) 172 | /** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions 173 | * @{ 174 | */ 175 | 176 | ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx); 177 | 178 | /** 179 | * @} 180 | */ 181 | #endif /* USE_FULL_LL_DRIVER */ 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | #endif /* defined(CRC) */ 192 | 193 | /** 194 | * @} 195 | */ 196 | 197 | #ifdef __cplusplus 198 | } 199 | #endif 200 | 201 | #endif /* STM32F4xx_LL_CRC_H */ 202 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/STM32F4xx_HAL_Driver/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the BSD-3-Clause license shall apply. 5 | You may obtain a copy of the BSD-3-Clause at: 6 | https://opensource.org/licenses/BSD-3-Clause 7 | -------------------------------------------------------------------------------- /examples/stm32f411/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @brief FLASH RAMFUNC module driver. 6 | * This file provides a FLASH firmware functions which should be 7 | * executed from internal SRAM 8 | * + Stop/Start the flash interface while System Run 9 | * + Enable/Disable the flash sleep while System Run 10 | @verbatim 11 | ============================================================================== 12 | ##### APIs executed from Internal RAM ##### 13 | ============================================================================== 14 | [..] 15 | *** ARM Compiler *** 16 | -------------------- 17 | [..] RAM functions are defined using the toolchain options. 18 | Functions that are be executed in RAM should reside in a separate 19 | source module. Using the 'Options for File' dialog you can simply change 20 | the 'Code / Const' area of a module to a memory space in physical RAM. 21 | Available memory areas are declared in the 'Target' tab of the 22 | Options for Target' dialog. 23 | 24 | *** ICCARM Compiler *** 25 | ----------------------- 26 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 27 | 28 | *** GNU Compiler *** 29 | -------------------- 30 | [..] RAM functions are defined using a specific toolchain attribute 31 | "__attribute__((section(".RamFunc")))". 32 | 33 | @endverbatim 34 | ****************************************************************************** 35 | * @attention 36 | * 37 | * Copyright (c) 2017 STMicroelectronics. 38 | * All rights reserved. 39 | * 40 | * This software is licensed under terms that can be found in the LICENSE file in 41 | * the root directory of this software component. 42 | * If no LICENSE file comes with this software, it is provided AS-IS. 43 | ****************************************************************************** 44 | */ 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup FLASH_RAMFUNC FLASH RAMFUNC 54 | * @brief FLASH functions executed from RAM 55 | * @{ 56 | */ 57 | #ifdef HAL_FLASH_MODULE_ENABLED 58 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ 59 | defined(STM32F412Rx) || defined(STM32F412Cx) 60 | 61 | /* Private typedef -----------------------------------------------------------*/ 62 | /* Private define ------------------------------------------------------------*/ 63 | /* Private macro -------------------------------------------------------------*/ 64 | /* Private variables ---------------------------------------------------------*/ 65 | /* Private function prototypes -----------------------------------------------*/ 66 | /* Exported functions --------------------------------------------------------*/ 67 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM 72 | * @brief Peripheral Extended features functions 73 | * 74 | @verbatim 75 | 76 | =============================================================================== 77 | ##### ramfunc functions ##### 78 | =============================================================================== 79 | [..] 80 | This subsection provides a set of functions that should be executed from RAM 81 | transfers. 82 | 83 | @endverbatim 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @brief Stop the flash interface while System Run 89 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 90 | * @note This mode couldn't be set while executing with the flash itself. 91 | * It should be done with specific routine executed from RAM. 92 | * @retval HAL status 93 | */ 94 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void) 95 | { 96 | /* Enable Power ctrl clock */ 97 | __HAL_RCC_PWR_CLK_ENABLE(); 98 | /* Stop the flash interface while System Run */ 99 | SET_BIT(PWR->CR, PWR_CR_FISSR); 100 | 101 | return HAL_OK; 102 | } 103 | 104 | /** 105 | * @brief Start the flash interface while System Run 106 | * @note This mode is only available for STM32F411xx/STM32F446xx devices. 107 | * @note This mode couldn't be set while executing with the flash itself. 108 | * It should be done with specific routine executed from RAM. 109 | * @retval HAL status 110 | */ 111 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void) 112 | { 113 | /* Enable Power ctrl clock */ 114 | __HAL_RCC_PWR_CLK_ENABLE(); 115 | /* Start the flash interface while System Run */ 116 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 117 | 118 | return HAL_OK; 119 | } 120 | 121 | /** 122 | * @brief Enable the flash sleep while System Run 123 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 124 | * @note This mode could n't be set while executing with the flash itself. 125 | * It should be done with specific routine executed from RAM. 126 | * @retval HAL status 127 | */ 128 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void) 129 | { 130 | /* Enable Power ctrl clock */ 131 | __HAL_RCC_PWR_CLK_ENABLE(); 132 | /* Enable the flash sleep while System Run */ 133 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 134 | 135 | return HAL_OK; 136 | } 137 | 138 | /** 139 | * @brief Disable the flash sleep while System Run 140 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 141 | * @note This mode couldn't be set while executing with the flash itself. 142 | * It should be done with specific routine executed from RAM. 143 | * @retval HAL status 144 | */ 145 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void) 146 | { 147 | /* Enable Power ctrl clock */ 148 | __HAL_RCC_PWR_CLK_ENABLE(); 149 | /* Disable the flash sleep while System Run */ 150 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 151 | 152 | return HAL_OK; 153 | } 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /** 160 | * @} 161 | */ 162 | 163 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 164 | #endif /* HAL_FLASH_MODULE_ENABLED */ 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | -------------------------------------------------------------------------------- /examples/stm32f411/STM32F411CEUX_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | ** @file : LinkerScript.ld 5 | ** 6 | ** @author : Auto-generated by STM32CubeIDE 7 | ** 8 | ** @brief : Linker script for STM32F411CEUx Device from STM32F4 series 9 | ** 512Kbytes FLASH 10 | ** 128Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed as is, without any warranty 20 | ** of any kind. 21 | ** 22 | ****************************************************************************** 23 | ** @attention 24 | ** 25 | ** Copyright (c) 2022 STMicroelectronics. 26 | ** All rights reserved. 27 | ** 28 | ** This software is licensed under terms that can be found in the LICENSE file 29 | ** in the root directory of this software component. 30 | ** If no LICENSE file comes with this software, it is provided AS-IS. 31 | ** 32 | ****************************************************************************** 33 | */ 34 | 35 | /* Entry Point */ 36 | ENTRY(Reset_Handler) 37 | 38 | /* Highest address of the user mode stack */ 39 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ 40 | 41 | _Min_Heap_Size = 0x200; /* required amount of heap */ 42 | _Min_Stack_Size = 0x400; /* required amount of stack */ 43 | 44 | /* Memories definition */ 45 | MEMORY 46 | { 47 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K 48 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K 49 | } 50 | 51 | /* Sections */ 52 | SECTIONS 53 | { 54 | /* The startup code into "FLASH" Rom type memory */ 55 | .isr_vector : 56 | { 57 | . = ALIGN(4); 58 | KEEP(*(.isr_vector)) /* Startup code */ 59 | . = ALIGN(4); 60 | } >FLASH 61 | 62 | /* The program code and other data into "FLASH" Rom type memory */ 63 | .text : 64 | { 65 | . = ALIGN(4); 66 | *(.text) /* .text sections (code) */ 67 | *(.text*) /* .text* sections (code) */ 68 | *(.glue_7) /* glue arm to thumb code */ 69 | *(.glue_7t) /* glue thumb to arm code */ 70 | *(.eh_frame) 71 | 72 | KEEP (*(.init)) 73 | KEEP (*(.fini)) 74 | 75 | . = ALIGN(4); 76 | _etext = .; /* define a global symbols at end of code */ 77 | } >FLASH 78 | 79 | /* Constant data into "FLASH" Rom type memory */ 80 | .rodata : 81 | { 82 | . = ALIGN(4); 83 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 84 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 85 | . = ALIGN(4); 86 | } >FLASH 87 | 88 | .ARM.extab : { 89 | . = ALIGN(4); 90 | *(.ARM.extab* .gnu.linkonce.armextab.*) 91 | . = ALIGN(4); 92 | } >FLASH 93 | 94 | .ARM : { 95 | . = ALIGN(4); 96 | __exidx_start = .; 97 | *(.ARM.exidx*) 98 | __exidx_end = .; 99 | . = ALIGN(4); 100 | } >FLASH 101 | 102 | .preinit_array : 103 | { 104 | . = ALIGN(4); 105 | PROVIDE_HIDDEN (__preinit_array_start = .); 106 | KEEP (*(.preinit_array*)) 107 | PROVIDE_HIDDEN (__preinit_array_end = .); 108 | . = ALIGN(4); 109 | } >FLASH 110 | 111 | .init_array : 112 | { 113 | . = ALIGN(4); 114 | PROVIDE_HIDDEN (__init_array_start = .); 115 | KEEP (*(SORT(.init_array.*))) 116 | KEEP (*(.init_array*)) 117 | PROVIDE_HIDDEN (__init_array_end = .); 118 | . = ALIGN(4); 119 | } >FLASH 120 | 121 | .fini_array : 122 | { 123 | . = ALIGN(4); 124 | PROVIDE_HIDDEN (__fini_array_start = .); 125 | KEEP (*(SORT(.fini_array.*))) 126 | KEEP (*(.fini_array*)) 127 | PROVIDE_HIDDEN (__fini_array_end = .); 128 | . = ALIGN(4); 129 | } >FLASH 130 | 131 | /* Used by the startup to initialize data */ 132 | _sidata = LOADADDR(.data); 133 | 134 | /* Initialized data sections into "RAM" Ram type memory */ 135 | .data : 136 | { 137 | . = ALIGN(4); 138 | _sdata = .; /* create a global symbol at data start */ 139 | *(.data) /* .data sections */ 140 | *(.data*) /* .data* sections */ 141 | *(.RamFunc) /* .RamFunc sections */ 142 | *(.RamFunc*) /* .RamFunc* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | 147 | } >RAM AT> FLASH 148 | 149 | /* Uninitialized data section into "RAM" Ram type memory */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss section */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | /* Remove information from the compiler libraries */ 177 | /DISCARD/ : 178 | { 179 | libc.a ( * ) 180 | libm.a ( * ) 181 | libgcc.a ( * ) 182 | } 183 | 184 | .ARM.attributes 0 : { *(.ARM.attributes) } 185 | } 186 | -------------------------------------------------------------------------------- /examples/stm32f411/STM32F411CEUX_RAM.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | ** @file : LinkerScript.ld (debug in RAM dedicated) 5 | ** 6 | ** @author : Auto-generated by STM32CubeIDE 7 | ** 8 | ** @brief : Linker script for STM32F411CEUx Device from STM32F4 series 9 | ** 512Kbytes FLASH 10 | ** 128Kbytes RAM 11 | ** 12 | ** Set heap size, stack size and stack location according 13 | ** to application requirements. 14 | ** 15 | ** Set memory bank area and size if external memory is used 16 | ** 17 | ** Target : STMicroelectronics STM32 18 | ** 19 | ** Distribution: The file is distributed as is, without any warranty 20 | ** of any kind. 21 | ** 22 | ****************************************************************************** 23 | ** @attention 24 | ** 25 | ** Copyright (c) 2022 STMicroelectronics. 26 | ** All rights reserved. 27 | ** 28 | ** This software is licensed under terms that can be found in the LICENSE file 29 | ** in the root directory of this software component. 30 | ** If no LICENSE file comes with this software, it is provided AS-IS. 31 | ** 32 | ****************************************************************************** 33 | */ 34 | 35 | /* Entry Point */ 36 | ENTRY(Reset_Handler) 37 | 38 | /* Highest address of the user mode stack */ 39 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ 40 | 41 | _Min_Heap_Size = 0x200; /* required amount of heap */ 42 | _Min_Stack_Size = 0x400; /* required amount of stack */ 43 | 44 | /* Memories definition */ 45 | MEMORY 46 | { 47 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K 48 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 512K 49 | } 50 | 51 | /* Sections */ 52 | SECTIONS 53 | { 54 | /* The startup code into "RAM" Ram type memory */ 55 | .isr_vector : 56 | { 57 | . = ALIGN(4); 58 | KEEP(*(.isr_vector)) /* Startup code */ 59 | . = ALIGN(4); 60 | } >RAM 61 | 62 | /* The program code and other data into "RAM" Ram type memory */ 63 | .text : 64 | { 65 | . = ALIGN(4); 66 | *(.text) /* .text sections (code) */ 67 | *(.text*) /* .text* sections (code) */ 68 | *(.glue_7) /* glue arm to thumb code */ 69 | *(.glue_7t) /* glue thumb to arm code */ 70 | *(.eh_frame) 71 | *(.RamFunc) /* .RamFunc sections */ 72 | *(.RamFunc*) /* .RamFunc* sections */ 73 | 74 | KEEP (*(.init)) 75 | KEEP (*(.fini)) 76 | 77 | . = ALIGN(4); 78 | _etext = .; /* define a global symbols at end of code */ 79 | } >RAM 80 | 81 | /* Constant data into "RAM" Ram type memory */ 82 | .rodata : 83 | { 84 | . = ALIGN(4); 85 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 86 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 87 | . = ALIGN(4); 88 | } >RAM 89 | 90 | .ARM.extab : { 91 | . = ALIGN(4); 92 | *(.ARM.extab* .gnu.linkonce.armextab.*) 93 | . = ALIGN(4); 94 | } >RAM 95 | 96 | .ARM : { 97 | . = ALIGN(4); 98 | __exidx_start = .; 99 | *(.ARM.exidx*) 100 | __exidx_end = .; 101 | . = ALIGN(4); 102 | } >RAM 103 | 104 | .preinit_array : 105 | { 106 | . = ALIGN(4); 107 | PROVIDE_HIDDEN (__preinit_array_start = .); 108 | KEEP (*(.preinit_array*)) 109 | PROVIDE_HIDDEN (__preinit_array_end = .); 110 | . = ALIGN(4); 111 | } >RAM 112 | 113 | .init_array : 114 | { 115 | . = ALIGN(4); 116 | PROVIDE_HIDDEN (__init_array_start = .); 117 | KEEP (*(SORT(.init_array.*))) 118 | KEEP (*(.init_array*)) 119 | PROVIDE_HIDDEN (__init_array_end = .); 120 | . = ALIGN(4); 121 | } >RAM 122 | 123 | .fini_array : 124 | { 125 | . = ALIGN(4); 126 | PROVIDE_HIDDEN (__fini_array_start = .); 127 | KEEP (*(SORT(.fini_array.*))) 128 | KEEP (*(.fini_array*)) 129 | PROVIDE_HIDDEN (__fini_array_end = .); 130 | . = ALIGN(4); 131 | } >RAM 132 | 133 | /* Used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections into "RAM" Ram type memory */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | 144 | . = ALIGN(4); 145 | _edata = .; /* define a global symbol at data end */ 146 | 147 | } >RAM 148 | 149 | /* Uninitialized data section into "RAM" Ram type memory */ 150 | . = ALIGN(4); 151 | .bss : 152 | { 153 | /* This is used by the startup in order to initialize the .bss section */ 154 | _sbss = .; /* define a global symbol at bss start */ 155 | __bss_start__ = _sbss; 156 | *(.bss) 157 | *(.bss*) 158 | *(COMMON) 159 | 160 | . = ALIGN(4); 161 | _ebss = .; /* define a global symbol at bss end */ 162 | __bss_end__ = _ebss; 163 | } >RAM 164 | 165 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ 166 | ._user_heap_stack : 167 | { 168 | . = ALIGN(8); 169 | PROVIDE ( end = . ); 170 | PROVIDE ( _end = . ); 171 | . = . + _Min_Heap_Size; 172 | . = . + _Min_Stack_Size; 173 | . = ALIGN(8); 174 | } >RAM 175 | 176 | /* Remove information from the compiler libraries */ 177 | /DISCARD/ : 178 | { 179 | libc.a ( * ) 180 | libm.a ( * ) 181 | libgcc.a ( * ) 182 | } 183 | 184 | .ARM.attributes 0 : { *(.ARM.attributes) } 185 | } 186 | -------------------------------------------------------------------------------- /examples/stm32f411/stm32f411 Debug.cfg: -------------------------------------------------------------------------------- 1 | # This is an genericBoard board with a single STM32F411CEUx chip 2 | # 3 | # Generated by STM32CubeIDE 4 | # Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) 5 | 6 | source [find interface/stlink-dap.cfg] 7 | 8 | 9 | set WORKAREASIZE 0x8000 10 | 11 | transport select "dapdirect_swd" 12 | 13 | set CHIPNAME STM32F411CEUx 14 | set BOARDNAME genericBoard 15 | 16 | # Enable debug when in low power modes 17 | set ENABLE_LOW_POWER 1 18 | 19 | # Stop Watchdog counters when halt 20 | set STOP_WATCHDOG 1 21 | 22 | # STlink Debug clock frequency 23 | set CLOCK_FREQ 4000 24 | 25 | # Reset configuration 26 | # use software system reset if reset done 27 | reset_config none 28 | set CONNECT_UNDER_RESET 0 29 | set CORE_RESET 0 30 | 31 | # ACCESS PORT NUMBER 32 | set AP_NUM 0 33 | # GDB PORT 34 | set GDB_PORT 3333 35 | 36 | 37 | 38 | # BCTM CPU variables 39 | 40 | source [find target/stm32f4x.cfg] 41 | 42 | -------------------------------------------------------------------------------- /examples/stm32f411/stm32f411.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | CAD.formats= 3 | CAD.pinconfig= 4 | CAD.provider= 5 | File.Version=6 6 | KeepUserPlacement=false 7 | Mcu.CPN=STM32F411CEU6 8 | Mcu.Family=STM32F4 9 | Mcu.IP0=CRC 10 | Mcu.IP1=NVIC 11 | Mcu.IP2=RCC 12 | Mcu.IP3=SPI1 13 | Mcu.IP4=SYS 14 | Mcu.IP5=USART1 15 | Mcu.IPNb=6 16 | Mcu.Name=STM32F411C(C-E)Ux 17 | Mcu.Package=UFQFPN48 18 | Mcu.Pin0=PC13-ANTI_TAMP 19 | Mcu.Pin1=PH0 - OSC_IN 20 | Mcu.Pin10=PA14 21 | Mcu.Pin11=PB3 22 | Mcu.Pin12=VP_CRC_VS_CRC 23 | Mcu.Pin13=VP_SYS_VS_Systick 24 | Mcu.Pin2=PH1 - OSC_OUT 25 | Mcu.Pin3=PA4 26 | Mcu.Pin4=PA5 27 | Mcu.Pin5=PA6 28 | Mcu.Pin6=PA7 29 | Mcu.Pin7=PA9 30 | Mcu.Pin8=PA10 31 | Mcu.Pin9=PA13 32 | Mcu.PinsNb=14 33 | Mcu.ThirdPartyNb=0 34 | Mcu.UserConstants= 35 | Mcu.UserName=STM32F411CEUx 36 | MxCube.Version=6.13.0 37 | MxDb.Version=DB.6.0.130 38 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 39 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 40 | NVIC.ForceEnableDMAVector=true 41 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 42 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 43 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 44 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 45 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 46 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 47 | NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false 48 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 49 | PA10.Mode=Asynchronous 50 | PA10.Signal=USART1_RX 51 | PA13.Mode=Trace_Asynchronous_SW 52 | PA13.Signal=SYS_JTMS-SWDIO 53 | PA14.Mode=Trace_Asynchronous_SW 54 | PA14.Signal=SYS_JTCK-SWCLK 55 | PA4.GPIOParameters=GPIO_Label 56 | PA4.GPIO_Label=SPI1_CS 57 | PA4.Locked=true 58 | PA4.Signal=GPIO_Output 59 | PA5.Mode=Full_Duplex_Master 60 | PA5.Signal=SPI1_SCK 61 | PA6.Mode=Full_Duplex_Master 62 | PA6.Signal=SPI1_MISO 63 | PA7.Mode=Full_Duplex_Master 64 | PA7.Signal=SPI1_MOSI 65 | PA9.Mode=Asynchronous 66 | PA9.Signal=USART1_TX 67 | PB3.Mode=Trace_Asynchronous_SW 68 | PB3.Signal=SYS_JTDO-SWO 69 | PC13-ANTI_TAMP.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP 70 | PC13-ANTI_TAMP.GPIO_Label=LED 71 | PC13-ANTI_TAMP.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 72 | PC13-ANTI_TAMP.GPIO_PuPd=GPIO_NOPULL 73 | PC13-ANTI_TAMP.Locked=true 74 | PC13-ANTI_TAMP.PinState=GPIO_PIN_SET 75 | PC13-ANTI_TAMP.Signal=GPIO_Output 76 | PH0\ -\ OSC_IN.Mode=HSE-External-Oscillator 77 | PH0\ -\ OSC_IN.Signal=RCC_OSC_IN 78 | PH1\ -\ OSC_OUT.Mode=HSE-External-Oscillator 79 | PH1\ -\ OSC_OUT.Signal=RCC_OSC_OUT 80 | PinOutPanel.RotationAngle=0 81 | ProjectManager.AskForMigrate=true 82 | ProjectManager.BackupPrevious=false 83 | ProjectManager.CompilerOptimize=6 84 | ProjectManager.ComputerToolchain=false 85 | ProjectManager.CoupleFile=false 86 | ProjectManager.CustomerFirmwarePackage= 87 | ProjectManager.DefaultFWLocation=true 88 | ProjectManager.DeletePrevious=true 89 | ProjectManager.DeviceId=STM32F411CEUx 90 | ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.28.1 91 | ProjectManager.FreePins=false 92 | ProjectManager.HalAssertFull=false 93 | ProjectManager.HeapSize=0x200 94 | ProjectManager.KeepUserCode=true 95 | ProjectManager.LastFirmware=true 96 | ProjectManager.LibraryCopy=1 97 | ProjectManager.MainLocation=Core/Src 98 | ProjectManager.NoMain=false 99 | ProjectManager.PreviousToolchain= 100 | ProjectManager.ProjectBuild=false 101 | ProjectManager.ProjectFileName=stm32f411.ioc 102 | ProjectManager.ProjectName=stm32f411 103 | ProjectManager.ProjectStructure= 104 | ProjectManager.RegisterCallBack= 105 | ProjectManager.StackSize=0x400 106 | ProjectManager.TargetToolchain=STM32CubeIDE 107 | ProjectManager.ToolChainLocation= 108 | ProjectManager.UAScriptAfterPath= 109 | ProjectManager.UAScriptBeforePath= 110 | ProjectManager.UnderRoot=true 111 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_SPI1_Init-SPI1-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_CRC_Init-CRC-false-HAL-true 112 | RCC.48MHZClocksFreq_Value=50000000 113 | RCC.AHBFreq_Value=100000000 114 | RCC.APB1CLKDivider=RCC_HCLK_DIV2 115 | RCC.APB1Freq_Value=50000000 116 | RCC.APB1TimFreq_Value=100000000 117 | RCC.APB2Freq_Value=100000000 118 | RCC.APB2TimFreq_Value=100000000 119 | RCC.CortexFreq_Value=100000000 120 | RCC.EthernetFreq_Value=100000000 121 | RCC.FCLKCortexFreq_Value=100000000 122 | RCC.FamilyName=M 123 | RCC.HCLKFreq_Value=100000000 124 | RCC.HSE_VALUE=25000000 125 | RCC.HSI_VALUE=16000000 126 | RCC.I2SClocksFreq_Value=150000000 127 | RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOInputMFreq_Value,VCOOutputFreq_Value,VcooutputI2S 128 | RCC.LSE_VALUE=32768 129 | RCC.LSI_VALUE=32000 130 | RCC.PLLCLKFreq_Value=100000000 131 | RCC.PLLM=12 132 | RCC.PLLN=96 133 | RCC.PLLQCLKFreq_Value=50000000 134 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE 135 | RCC.RTCFreq_Value=32000 136 | RCC.RTCHSEDivFreq_Value=12500000 137 | RCC.SYSCLKFreq_VALUE=100000000 138 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 139 | RCC.VCOI2SOutputFreq_Value=300000000 140 | RCC.VCOInputFreq_Value=2083333.3333333333 141 | RCC.VCOInputMFreq_Value=1562500 142 | RCC.VCOOutputFreq_Value=200000000 143 | RCC.VcooutputI2S=150000000 144 | SPI1.CalculateBaudRate=50.0 MBits/s 145 | SPI1.Direction=SPI_DIRECTION_2LINES 146 | SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate 147 | SPI1.Mode=SPI_MODE_MASTER 148 | SPI1.VirtualType=VM_MASTER 149 | USART1.BaudRate=2000000 150 | USART1.IPParameters=VirtualMode,BaudRate 151 | USART1.VirtualMode=VM_ASYNC 152 | VP_CRC_VS_CRC.Mode=CRC_Activate 153 | VP_CRC_VS_CRC.Signal=CRC_VS_CRC 154 | VP_SYS_VS_Systick.Mode=SysTick 155 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 156 | board=custom 157 | isbadioc=false 158 | -------------------------------------------------------------------------------- /examples/stm32f411/w25qxx: -------------------------------------------------------------------------------- 1 | ../../src -------------------------------------------------------------------------------- /examples/stm32l432/.gitignore: -------------------------------------------------------------------------------- 1 | /Debug/ 2 | -------------------------------------------------------------------------------- /examples/stm32l432/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | stm32l432 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.st.stm32cube.ide.mcu.MCUProjectNature 23 | com.st.stm32cube.ide.mcu.MCUCubeProjectNature 24 | org.eclipse.cdt.core.cnature 25 | com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature 26 | com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature 27 | com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature 28 | com.st.stm32cube.ide.mcu.MCURootProjectNature 29 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 30 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 31 | 32 | 33 | -------------------------------------------------------------------------------- /examples/stm32l432/.settings/com.st.stm32cube.ide.mcu.sfrview.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | sfrviewstate={"fFavorites"\:{"fLists"\:{}},"fProperties"\:{"fNodeProperties"\:{}}} 3 | -------------------------------------------------------------------------------- /examples/stm32l432/.settings/stm32cubeide.project.prefs: -------------------------------------------------------------------------------- 1 | 66BE74F758C12D739921AEA421D593D3=1 2 | 8DF89ED150041C4CBC7CB9A9CAA90856=0407DC3ADC444C8E75788EA3AE02EECA 3 | DC22A860405A8BF2F2C095E5B6529F12=0407DC3ADC444C8E75788EA3AE02EECA 4 | eclipse.preferences.version=1 5 | -------------------------------------------------------------------------------- /examples/stm32l432/Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.h 5 | * @brief : Header for main.c file. 6 | * This file contains the common defines of the application. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2023 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __MAIN_H 23 | #define __MAIN_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32l4xx_hal.h" 31 | 32 | /* Private includes ----------------------------------------------------------*/ 33 | /* USER CODE BEGIN Includes */ 34 | 35 | /* USER CODE END Includes */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* USER CODE BEGIN ET */ 39 | 40 | /* USER CODE END ET */ 41 | 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* USER CODE BEGIN EC */ 44 | 45 | /* USER CODE END EC */ 46 | 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* USER CODE BEGIN EM */ 49 | 50 | /* USER CODE END EM */ 51 | 52 | /* Exported functions prototypes ---------------------------------------------*/ 53 | void Error_Handler(void); 54 | 55 | /* USER CODE BEGIN EFP */ 56 | 57 | /* USER CODE END EFP */ 58 | 59 | /* Private defines -----------------------------------------------------------*/ 60 | #define B4_Pin GPIO_PIN_14 61 | #define B4_GPIO_Port GPIOC 62 | #define B3_Pin GPIO_PIN_15 63 | #define B3_GPIO_Port GPIOC 64 | #define B2_Pin GPIO_PIN_0 65 | #define B2_GPIO_Port GPIOA 66 | #define B1_Pin GPIO_PIN_1 67 | #define B1_GPIO_Port GPIOA 68 | #define LED1_Pin GPIO_PIN_5 69 | #define LED1_GPIO_Port GPIOA 70 | #define LED2_Pin GPIO_PIN_8 71 | #define LED2_GPIO_Port GPIOA 72 | 73 | /* USER CODE BEGIN Private defines */ 74 | 75 | #ifdef DEBUG 76 | #define DBG(...) printf(__VA_ARGS__);\ 77 | printf("\n") 78 | #else 79 | #define DBG(...) 80 | #endif 81 | 82 | /* USER CODE END Private defines */ 83 | 84 | #ifdef __cplusplus 85 | } 86 | #endif 87 | 88 | #endif /* __MAIN_H */ 89 | -------------------------------------------------------------------------------- /examples/stm32l432/Core/Inc/stm32l4xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32l4xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2023 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32L4xx_IT_H 22 | #define __STM32L4xx_IT_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Private includes ----------------------------------------------------------*/ 29 | /* USER CODE BEGIN Includes */ 30 | 31 | /* USER CODE END Includes */ 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN ET */ 35 | 36 | /* USER CODE END ET */ 37 | 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* USER CODE BEGIN EC */ 40 | 41 | /* USER CODE END EC */ 42 | 43 | /* Exported macro ------------------------------------------------------------*/ 44 | /* USER CODE BEGIN EM */ 45 | 46 | /* USER CODE END EM */ 47 | 48 | /* Exported functions prototypes ---------------------------------------------*/ 49 | void NMI_Handler(void); 50 | void HardFault_Handler(void); 51 | void MemManage_Handler(void); 52 | void BusFault_Handler(void); 53 | void UsageFault_Handler(void); 54 | void SVC_Handler(void); 55 | void DebugMon_Handler(void); 56 | void PendSV_Handler(void); 57 | void SysTick_Handler(void); 58 | /* USER CODE BEGIN EFP */ 59 | 60 | /* USER CODE END EFP */ 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif /* __STM32L4xx_IT_H */ 67 | -------------------------------------------------------------------------------- /examples/stm32l432/Core/Src/stm32l4xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32l4xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2023 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "main.h" 22 | #include "stm32l4xx_it.h" 23 | /* Private includes ----------------------------------------------------------*/ 24 | /* USER CODE BEGIN Includes */ 25 | /* USER CODE END Includes */ 26 | 27 | /* Private typedef -----------------------------------------------------------*/ 28 | /* USER CODE BEGIN TD */ 29 | 30 | /* USER CODE END TD */ 31 | 32 | /* Private define ------------------------------------------------------------*/ 33 | /* USER CODE BEGIN PD */ 34 | 35 | /* USER CODE END PD */ 36 | 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* USER CODE BEGIN PM */ 39 | 40 | /* USER CODE END PM */ 41 | 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* USER CODE BEGIN PV */ 44 | 45 | /* USER CODE END PV */ 46 | 47 | /* Private function prototypes -----------------------------------------------*/ 48 | /* USER CODE BEGIN PFP */ 49 | 50 | /* USER CODE END PFP */ 51 | 52 | /* Private user code ---------------------------------------------------------*/ 53 | /* USER CODE BEGIN 0 */ 54 | 55 | /* USER CODE END 0 */ 56 | 57 | /* External variables --------------------------------------------------------*/ 58 | 59 | /* USER CODE BEGIN EV */ 60 | 61 | /* USER CODE END EV */ 62 | 63 | /******************************************************************************/ 64 | /* Cortex-M4 Processor Interruption and Exception Handlers */ 65 | /******************************************************************************/ 66 | /** 67 | * @brief This function handles Non maskable interrupt. 68 | */ 69 | void NMI_Handler(void) 70 | { 71 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 72 | 73 | /* USER CODE END NonMaskableInt_IRQn 0 */ 74 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 75 | while (1) 76 | { 77 | } 78 | /* USER CODE END NonMaskableInt_IRQn 1 */ 79 | } 80 | 81 | /** 82 | * @brief This function handles Hard fault interrupt. 83 | */ 84 | void HardFault_Handler(void) 85 | { 86 | /* USER CODE BEGIN HardFault_IRQn 0 */ 87 | 88 | /* USER CODE END HardFault_IRQn 0 */ 89 | while (1) 90 | { 91 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 92 | /* USER CODE END W1_HardFault_IRQn 0 */ 93 | } 94 | } 95 | 96 | /** 97 | * @brief This function handles Memory management fault. 98 | */ 99 | void MemManage_Handler(void) 100 | { 101 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 102 | 103 | /* USER CODE END MemoryManagement_IRQn 0 */ 104 | while (1) 105 | { 106 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 107 | /* USER CODE END W1_MemoryManagement_IRQn 0 */ 108 | } 109 | } 110 | 111 | /** 112 | * @brief This function handles Prefetch fault, memory access fault. 113 | */ 114 | void BusFault_Handler(void) 115 | { 116 | /* USER CODE BEGIN BusFault_IRQn 0 */ 117 | 118 | /* USER CODE END BusFault_IRQn 0 */ 119 | while (1) 120 | { 121 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 122 | /* USER CODE END W1_BusFault_IRQn 0 */ 123 | } 124 | } 125 | 126 | /** 127 | * @brief This function handles Undefined instruction or illegal state. 128 | */ 129 | void UsageFault_Handler(void) 130 | { 131 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 132 | 133 | /* USER CODE END UsageFault_IRQn 0 */ 134 | while (1) 135 | { 136 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 137 | /* USER CODE END W1_UsageFault_IRQn 0 */ 138 | } 139 | } 140 | 141 | /** 142 | * @brief This function handles System service call via SWI instruction. 143 | */ 144 | void SVC_Handler(void) 145 | { 146 | /* USER CODE BEGIN SVCall_IRQn 0 */ 147 | 148 | /* USER CODE END SVCall_IRQn 0 */ 149 | /* USER CODE BEGIN SVCall_IRQn 1 */ 150 | 151 | /* USER CODE END SVCall_IRQn 1 */ 152 | } 153 | 154 | /** 155 | * @brief This function handles Debug monitor. 156 | */ 157 | void DebugMon_Handler(void) 158 | { 159 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 160 | 161 | /* USER CODE END DebugMonitor_IRQn 0 */ 162 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 163 | 164 | /* USER CODE END DebugMonitor_IRQn 1 */ 165 | } 166 | 167 | /** 168 | * @brief This function handles Pendable request for system service. 169 | */ 170 | void PendSV_Handler(void) 171 | { 172 | /* USER CODE BEGIN PendSV_IRQn 0 */ 173 | 174 | /* USER CODE END PendSV_IRQn 0 */ 175 | /* USER CODE BEGIN PendSV_IRQn 1 */ 176 | 177 | /* USER CODE END PendSV_IRQn 1 */ 178 | } 179 | 180 | /** 181 | * @brief This function handles System tick timer. 182 | */ 183 | void SysTick_Handler(void) 184 | { 185 | /* USER CODE BEGIN SysTick_IRQn 0 */ 186 | 187 | /* USER CODE END SysTick_IRQn 0 */ 188 | HAL_IncTick(); 189 | /* USER CODE BEGIN SysTick_IRQn 1 */ 190 | 191 | /* USER CODE END SysTick_IRQn 1 */ 192 | } 193 | 194 | /******************************************************************************/ 195 | /* STM32L4xx Peripheral Interrupt Handlers */ 196 | /* Add here the Interrupt Handlers for the used peripherals. */ 197 | /* For the available peripheral interrupt handler names, */ 198 | /* please refer to the startup file (startup_stm32l4xx.s). */ 199 | /******************************************************************************/ 200 | 201 | /* USER CODE BEGIN 1 */ 202 | 203 | /* USER CODE END 1 */ 204 | -------------------------------------------------------------------------------- /examples/stm32l432/Core/Src/syscalls.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file syscalls.c 4 | * @author Auto-generated by STM32CubeIDE 5 | * @brief STM32CubeIDE Minimal System calls file 6 | * 7 | * For more information about which c-functions 8 | * need which of these lowlevel functions 9 | * please consult the Newlib libc-manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2020-2023 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | 34 | /* Variables */ 35 | extern int __io_putchar(int ch) __attribute__((weak)); 36 | extern int __io_getchar(void) __attribute__((weak)); 37 | 38 | 39 | char *__env[1] = { 0 }; 40 | char **environ = __env; 41 | 42 | 43 | /* Functions */ 44 | void initialise_monitor_handles() 45 | { 46 | } 47 | 48 | int _getpid(void) 49 | { 50 | return 1; 51 | } 52 | 53 | int _kill(int pid, int sig) 54 | { 55 | (void)pid; 56 | (void)sig; 57 | errno = EINVAL; 58 | return -1; 59 | } 60 | 61 | void _exit (int status) 62 | { 63 | _kill(status, -1); 64 | while (1) {} /* Make sure we hang here */ 65 | } 66 | 67 | __attribute__((weak)) int _read(int file, char *ptr, int len) 68 | { 69 | (void)file; 70 | int DataIdx; 71 | 72 | for (DataIdx = 0; DataIdx < len; DataIdx++) 73 | { 74 | *ptr++ = __io_getchar(); 75 | } 76 | 77 | return len; 78 | } 79 | 80 | __attribute__((weak)) int _write(int file, char *ptr, int len) 81 | { 82 | (void)file; 83 | int DataIdx; 84 | 85 | for (DataIdx = 0; DataIdx < len; DataIdx++) 86 | { 87 | __io_putchar(*ptr++); 88 | } 89 | return len; 90 | } 91 | 92 | int _close(int file) 93 | { 94 | (void)file; 95 | return -1; 96 | } 97 | 98 | 99 | int _fstat(int file, struct stat *st) 100 | { 101 | (void)file; 102 | st->st_mode = S_IFCHR; 103 | return 0; 104 | } 105 | 106 | int _isatty(int file) 107 | { 108 | (void)file; 109 | return 1; 110 | } 111 | 112 | int _lseek(int file, int ptr, int dir) 113 | { 114 | (void)file; 115 | (void)ptr; 116 | (void)dir; 117 | return 0; 118 | } 119 | 120 | int _open(char *path, int flags, ...) 121 | { 122 | (void)path; 123 | (void)flags; 124 | /* Pretend like we always fail */ 125 | return -1; 126 | } 127 | 128 | int _wait(int *status) 129 | { 130 | (void)status; 131 | errno = ECHILD; 132 | return -1; 133 | } 134 | 135 | int _unlink(char *name) 136 | { 137 | (void)name; 138 | errno = ENOENT; 139 | return -1; 140 | } 141 | 142 | int _times(struct tms *buf) 143 | { 144 | (void)buf; 145 | return -1; 146 | } 147 | 148 | int _stat(char *file, struct stat *st) 149 | { 150 | (void)file; 151 | st->st_mode = S_IFCHR; 152 | return 0; 153 | } 154 | 155 | int _link(char *old, char *new) 156 | { 157 | (void)old; 158 | (void)new; 159 | errno = EMLINK; 160 | return -1; 161 | } 162 | 163 | int _fork(void) 164 | { 165 | errno = EAGAIN; 166 | return -1; 167 | } 168 | 169 | int _execve(char *name, char **argv, char **env) 170 | { 171 | (void)name; 172 | (void)argv; 173 | (void)env; 174 | errno = ENOMEM; 175 | return -1; 176 | } 177 | -------------------------------------------------------------------------------- /examples/stm32l432/Core/Src/sysmem.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sysmem.c 4 | * @author Generated by STM32CubeIDE 5 | * @brief STM32CubeIDE System Memory calls file 6 | * 7 | * For more information about which C functions 8 | * need which of these lowlevel functions 9 | * please consult the newlib libc manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2023 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | 27 | /** 28 | * Pointer to the current high watermark of the heap usage 29 | */ 30 | static uint8_t *__sbrk_heap_end = NULL; 31 | 32 | /** 33 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc 34 | * and others from the C library 35 | * 36 | * @verbatim 37 | * ############################################################################ 38 | * # .data # .bss # newlib heap # MSP stack # 39 | * # # # # Reserved by _Min_Stack_Size # 40 | * ############################################################################ 41 | * ^-- RAM start ^-- _end _estack, RAM end --^ 42 | * @endverbatim 43 | * 44 | * This implementation starts allocating at the '_end' linker symbol 45 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack 46 | * The implementation considers '_estack' linker symbol to be RAM end 47 | * NOTE: If the MSP stack, at any point during execution, grows larger than the 48 | * reserved size, please increase the '_Min_Stack_Size'. 49 | * 50 | * @param incr Memory size 51 | * @return Pointer to allocated memory 52 | */ 53 | void *_sbrk(ptrdiff_t incr) 54 | { 55 | extern uint8_t _end; /* Symbol defined in the linker script */ 56 | extern uint8_t _estack; /* Symbol defined in the linker script */ 57 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ 58 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 59 | const uint8_t *max_heap = (uint8_t *)stack_limit; 60 | uint8_t *prev_heap_end; 61 | 62 | /* Initialize heap end at first call */ 63 | if (NULL == __sbrk_heap_end) 64 | { 65 | __sbrk_heap_end = &_end; 66 | } 67 | 68 | /* Protect heap from growing into the reserved MSP stack */ 69 | if (__sbrk_heap_end + incr > max_heap) 70 | { 71 | errno = ENOMEM; 72 | return (void *)-1; 73 | } 74 | 75 | prev_heap_end = __sbrk_heap_end; 76 | __sbrk_heap_end += incr; 77 | 78 | return (void *)prev_heap_end; 79 | } 80 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/CMSIS/Device/ST/STM32L4xx/Include/system_stm32l4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32l4xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /** @addtogroup CMSIS 20 | * @{ 21 | */ 22 | 23 | /** @addtogroup stm32l4xx_system 24 | * @{ 25 | */ 26 | 27 | /** 28 | * @brief Define to prevent recursive inclusion 29 | */ 30 | #ifndef __SYSTEM_STM32L4XX_H 31 | #define __SYSTEM_STM32L4XX_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /** @addtogroup STM32L4xx_System_Includes 38 | * @{ 39 | */ 40 | 41 | /** 42 | * @} 43 | */ 44 | 45 | 46 | /** @addtogroup STM32L4xx_System_Exported_Variables 47 | * @{ 48 | */ 49 | /* The SystemCoreClock variable is updated in three ways: 50 | 1) by calling CMSIS function SystemCoreClockUpdate() 51 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 52 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 53 | Note: If you use this function to configure the system clock; then there 54 | is no need to call the 2 first functions listed above, since SystemCoreClock 55 | variable is updated automatically. 56 | */ 57 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 58 | 59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 61 | extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32L4xx_System_Exported_Constants 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32L4xx_System_Exported_Macros 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @} 81 | */ 82 | 83 | /** @addtogroup STM32L4xx_System_Exported_Functions 84 | * @{ 85 | */ 86 | 87 | extern void SystemInit(void); 88 | extern void SystemCoreClockUpdate(void); 89 | /** 90 | * @} 91 | */ 92 | 93 | #ifdef __cplusplus 94 | } 95 | #endif 96 | 97 | #endif /*__SYSTEM_STM32L4XX_H */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/CMSIS/Device/ST/STM32L4xx/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the Apache-2.0 license shall apply. 5 | You may obtain a copy of the Apache-2.0 at: 6 | https://opensource.org/licenses/Apache-2.0 7 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.3 5 | * @date 24. June 2019 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2019 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32l4xx_hal_flash_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32L4xx_HAL_FLASH_EX_H 20 | #define STM32L4xx_HAL_FLASH_EX_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32l4xx_hal_def.h" 28 | 29 | /** @addtogroup STM32L4xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASHEx 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | 39 | /* Exported constants --------------------------------------------------------*/ 40 | #if defined (FLASH_CFGR_LVEN) 41 | /** @addtogroup FLASHEx_Exported_Constants 42 | * @{ 43 | */ 44 | /** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration 45 | * @{ 46 | */ 47 | #define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */ 48 | #define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */ 49 | /** 50 | * @} 51 | */ 52 | 53 | /** 54 | * @} 55 | */ 56 | #endif /* FLASH_CFGR_LVEN */ 57 | 58 | /* Exported macro ------------------------------------------------------------*/ 59 | 60 | /* Exported functions --------------------------------------------------------*/ 61 | /** @addtogroup FLASHEx_Exported_Functions 62 | * @{ 63 | */ 64 | 65 | /* Extended Program operation functions *************************************/ 66 | /** @addtogroup FLASHEx_Exported_Functions_Group1 67 | * @{ 68 | */ 69 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); 70 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); 71 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); 72 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); 73 | /** 74 | * @} 75 | */ 76 | 77 | #if defined (FLASH_CFGR_LVEN) 78 | /** @addtogroup FLASHEx_Exported_Functions_Group2 79 | * @{ 80 | */ 81 | HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE); 82 | /** 83 | * @} 84 | */ 85 | #endif /* FLASH_CFGR_LVEN */ 86 | 87 | /** 88 | * @} 89 | */ 90 | 91 | /* Private function ----------------------------------------------------------*/ 92 | /** @addtogroup FLASHEx_Private_Functions FLASHEx Private Functions 93 | * @{ 94 | */ 95 | void FLASH_PageErase(uint32_t Page, uint32_t Banks); 96 | void FLASH_FlushCaches(void); 97 | /** 98 | * @} 99 | */ 100 | 101 | /* Private macros ------------------------------------------------------------*/ 102 | /** 103 | @cond 0 104 | */ 105 | #if defined (FLASH_CFGR_LVEN) 106 | #define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED)) 107 | #endif /* FLASH_CFGR_LVEN */ 108 | /** 109 | @endcond 110 | */ 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** 117 | * @} 118 | */ 119 | 120 | #ifdef __cplusplus 121 | } 122 | #endif 123 | 124 | #endif /* STM32L4xx_HAL_FLASH_EX_H */ 125 | 126 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32l4xx_hal_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH RAMFUNC driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef STM32L4xx_FLASH_RAMFUNC_H 20 | #define STM32L4xx_FLASH_RAMFUNC_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | #include "stm32l4xx_hal_def.h" 28 | 29 | /** @addtogroup STM32L4xx_HAL_Driver 30 | * @{ 31 | */ 32 | 33 | /** @addtogroup FLASH_RAMFUNC 34 | * @{ 35 | */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* Exported macro ------------------------------------------------------------*/ 39 | /* Exported functions --------------------------------------------------------*/ 40 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions 41 | * @{ 42 | */ 43 | 44 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 45 | * @{ 46 | */ 47 | /* Peripheral Control functions ************************************************/ 48 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void); 49 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void); 50 | #if defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) 51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig); 52 | #endif 53 | /** 54 | * @} 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | #ifdef __cplusplus 70 | } 71 | #endif 72 | 73 | #endif /* STM32L4xx_FLASH_RAMFUNC_H */ 74 | 75 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_hal_i2c_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32l4xx_hal_i2c_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of I2C HAL Extended module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32L4xx_HAL_I2C_EX_H 21 | #define STM32L4xx_HAL_I2C_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32l4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32L4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup I2CEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /* Exported constants --------------------------------------------------------*/ 40 | /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants 41 | * @{ 42 | */ 43 | 44 | /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter 45 | * @{ 46 | */ 47 | #define I2C_ANALOGFILTER_ENABLE 0x00000000U 48 | #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF 49 | /** 50 | * @} 51 | */ 52 | 53 | /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus 54 | * @{ 55 | */ 56 | #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ 57 | #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ 58 | #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ 59 | #if defined(SYSCFG_CFGR1_I2C_PB8_FMP) 60 | #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ 61 | #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ 62 | #else 63 | #define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */ 64 | #define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */ 65 | #endif /* SYSCFG_CFGR1_I2C_PB8_FMP */ 66 | #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ 67 | #if defined(SYSCFG_CFGR1_I2C2_FMP) 68 | #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ 69 | #else 70 | #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */ 71 | #endif /* SYSCFG_CFGR1_I2C2_FMP */ 72 | #define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ 73 | #if defined(SYSCFG_CFGR1_I2C4_FMP) 74 | #define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ 75 | #else 76 | #define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ 77 | #endif /* SYSCFG_CFGR1_I2C4_FMP */ 78 | /** 79 | * @} 80 | */ 81 | 82 | /** 83 | * @} 84 | */ 85 | 86 | /* Exported macro ------------------------------------------------------------*/ 87 | /** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros 88 | * @{ 89 | */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /* Exported functions --------------------------------------------------------*/ 96 | /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions 97 | * @{ 98 | */ 99 | 100 | /** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions 101 | * @{ 102 | */ 103 | /* Peripheral Control functions ************************************************/ 104 | HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); 105 | HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); 106 | /** 107 | * @} 108 | */ 109 | 110 | /** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions 111 | * @{ 112 | */ 113 | HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); 114 | HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); 115 | /** 116 | * @} 117 | */ 118 | 119 | /** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions 120 | * @{ 121 | */ 122 | void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); 123 | void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); 124 | /** 125 | * @} 126 | */ 127 | 128 | /** 129 | * @} 130 | */ 131 | 132 | /* Private constants ---------------------------------------------------------*/ 133 | /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants 134 | * @{ 135 | */ 136 | 137 | /** 138 | * @} 139 | */ 140 | 141 | /* Private macros ------------------------------------------------------------*/ 142 | /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros 143 | * @{ 144 | */ 145 | #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ 146 | ((FILTER) == I2C_ANALOGFILTER_DISABLE)) 147 | 148 | #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) 149 | 150 | #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ 151 | ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ 152 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ 153 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ 154 | (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ 155 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ 156 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ 157 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \ 158 | (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4))) 159 | /** 160 | * @} 161 | */ 162 | 163 | /* Private Functions ---------------------------------------------------------*/ 164 | /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions 165 | * @{ 166 | */ 167 | /* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */ 168 | /** 169 | * @} 170 | */ 171 | 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | #ifdef __cplusplus 181 | } 182 | #endif 183 | 184 | #endif /* STM32L4xx_HAL_I2C_EX_H */ 185 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/STM32L4xx_HAL_Driver/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the BSD-3-Clause license shall apply. 5 | You may obtain a copy of the BSD-3-Clause at: 6 | https://opensource.org/licenses/BSD-3-Clause 7 | -------------------------------------------------------------------------------- /examples/stm32l432/Drivers/STM32L4xx_HAL_Driver/License.md: -------------------------------------------------------------------------------- 1 | # Copyright (c) 2017 STMicroelectronics 2 | 3 | This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause). -------------------------------------------------------------------------------- /examples/stm32l432/STM32L432KCUX_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | ** @file : LinkerScript.ld 5 | ** 6 | ** @author : Auto-generated by STM32CubeIDE 7 | ** 8 | ** @brief : Linker script for STM32L432KCUx Device from STM32L4 series 9 | ** 256Kbytes FLASH 10 | ** 64Kbytes RAM 11 | ** 16Kbytes RAM2 12 | ** 13 | ** Set heap size, stack size and stack location according 14 | ** to application requirements. 15 | ** 16 | ** Set memory bank area and size if external memory is used 17 | ** 18 | ** Target : STMicroelectronics STM32 19 | ** 20 | ** Distribution: The file is distributed as is, without any warranty 21 | ** of any kind. 22 | ** 23 | ****************************************************************************** 24 | ** @attention 25 | ** 26 | ** Copyright (c) 2023 STMicroelectronics. 27 | ** All rights reserved. 28 | ** 29 | ** This software is licensed under terms that can be found in the LICENSE file 30 | ** in the root directory of this software component. 31 | ** If no LICENSE file comes with this software, it is provided AS-IS. 32 | ** 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Entry Point */ 37 | ENTRY(Reset_Handler) 38 | 39 | /* Highest address of the user mode stack */ 40 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ 41 | 42 | _Min_Heap_Size = 0x200; /* required amount of heap */ 43 | _Min_Stack_Size = 0x400; /* required amount of stack */ 44 | 45 | /* Memories definition */ 46 | MEMORY 47 | { 48 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K 49 | RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K 50 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K 51 | } 52 | 53 | /* Sections */ 54 | SECTIONS 55 | { 56 | /* The startup code into "FLASH" Rom type memory */ 57 | .isr_vector : 58 | { 59 | . = ALIGN(4); 60 | KEEP(*(.isr_vector)) /* Startup code */ 61 | . = ALIGN(4); 62 | } >FLASH 63 | 64 | /* The program code and other data into "FLASH" Rom type memory */ 65 | .text : 66 | { 67 | . = ALIGN(4); 68 | *(.text) /* .text sections (code) */ 69 | *(.text*) /* .text* sections (code) */ 70 | *(.glue_7) /* glue arm to thumb code */ 71 | *(.glue_7t) /* glue thumb to arm code */ 72 | *(.eh_frame) 73 | 74 | KEEP (*(.init)) 75 | KEEP (*(.fini)) 76 | 77 | . = ALIGN(4); 78 | _etext = .; /* define a global symbols at end of code */ 79 | } >FLASH 80 | 81 | /* Constant data into "FLASH" Rom type memory */ 82 | .rodata : 83 | { 84 | . = ALIGN(4); 85 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 86 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 87 | . = ALIGN(4); 88 | } >FLASH 89 | 90 | .ARM.extab : { 91 | . = ALIGN(4); 92 | *(.ARM.extab* .gnu.linkonce.armextab.*) 93 | . = ALIGN(4); 94 | } >FLASH 95 | 96 | .ARM : { 97 | . = ALIGN(4); 98 | __exidx_start = .; 99 | *(.ARM.exidx*) 100 | __exidx_end = .; 101 | . = ALIGN(4); 102 | } >FLASH 103 | 104 | .preinit_array : 105 | { 106 | . = ALIGN(4); 107 | PROVIDE_HIDDEN (__preinit_array_start = .); 108 | KEEP (*(.preinit_array*)) 109 | PROVIDE_HIDDEN (__preinit_array_end = .); 110 | . = ALIGN(4); 111 | } >FLASH 112 | 113 | .init_array : 114 | { 115 | . = ALIGN(4); 116 | PROVIDE_HIDDEN (__init_array_start = .); 117 | KEEP (*(SORT(.init_array.*))) 118 | KEEP (*(.init_array*)) 119 | PROVIDE_HIDDEN (__init_array_end = .); 120 | . = ALIGN(4); 121 | } >FLASH 122 | 123 | .fini_array : 124 | { 125 | . = ALIGN(4); 126 | PROVIDE_HIDDEN (__fini_array_start = .); 127 | KEEP (*(SORT(.fini_array.*))) 128 | KEEP (*(.fini_array*)) 129 | PROVIDE_HIDDEN (__fini_array_end = .); 130 | . = ALIGN(4); 131 | } >FLASH 132 | 133 | /* Used by the startup to initialize data */ 134 | _sidata = LOADADDR(.data); 135 | 136 | /* Initialized data sections into "RAM" Ram type memory */ 137 | .data : 138 | { 139 | . = ALIGN(4); 140 | _sdata = .; /* create a global symbol at data start */ 141 | *(.data) /* .data sections */ 142 | *(.data*) /* .data* sections */ 143 | *(.RamFunc) /* .RamFunc sections */ 144 | *(.RamFunc*) /* .RamFunc* sections */ 145 | 146 | . = ALIGN(4); 147 | _edata = .; /* define a global symbol at data end */ 148 | 149 | } >RAM AT> FLASH 150 | 151 | /* Uninitialized data section into "RAM" Ram type memory */ 152 | . = ALIGN(4); 153 | .bss : 154 | { 155 | /* This is used by the startup in order to initialize the .bss section */ 156 | _sbss = .; /* define a global symbol at bss start */ 157 | __bss_start__ = _sbss; 158 | *(.bss) 159 | *(.bss*) 160 | *(COMMON) 161 | 162 | . = ALIGN(4); 163 | _ebss = .; /* define a global symbol at bss end */ 164 | __bss_end__ = _ebss; 165 | } >RAM 166 | 167 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ 168 | ._user_heap_stack : 169 | { 170 | . = ALIGN(8); 171 | PROVIDE ( end = . ); 172 | PROVIDE ( _end = . ); 173 | . = . + _Min_Heap_Size; 174 | . = . + _Min_Stack_Size; 175 | . = ALIGN(8); 176 | } >RAM 177 | 178 | /* Remove information from the compiler libraries */ 179 | /DISCARD/ : 180 | { 181 | libc.a ( * ) 182 | libm.a ( * ) 183 | libgcc.a ( * ) 184 | } 185 | 186 | .ARM.attributes 0 : { *(.ARM.attributes) } 187 | } 188 | -------------------------------------------------------------------------------- /examples/stm32l432/stm32l432.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | CAD.formats= 3 | CAD.pinconfig= 4 | CAD.provider= 5 | File.Version=6 6 | KeepUserPlacement=false 7 | Mcu.CPN=STM32L432KCU3 8 | Mcu.Family=STM32L4 9 | Mcu.IP0=NVIC 10 | Mcu.IP1=QUADSPI 11 | Mcu.IP2=RCC 12 | Mcu.IP3=SYS 13 | Mcu.IP4=USART1 14 | Mcu.IPNb=5 15 | Mcu.Name=STM32L432K(B-C)Ux 16 | Mcu.Package=UFQFPN32 17 | Mcu.Pin0=PC14-OSC32_IN (PC14) 18 | Mcu.Pin1=PC15-OSC32_OUT (PC15) 19 | Mcu.Pin10=PB1 20 | Mcu.Pin11=PA8 21 | Mcu.Pin12=PA9 22 | Mcu.Pin13=PA10 23 | Mcu.Pin14=PA13 (JTMS-SWDIO) 24 | Mcu.Pin15=PA14 (JTCK-SWCLK) 25 | Mcu.Pin16=VP_SYS_VS_Systick 26 | Mcu.Pin2=PA0 27 | Mcu.Pin3=PA1 28 | Mcu.Pin4=PA2 29 | Mcu.Pin5=PA3 30 | Mcu.Pin6=PA5 31 | Mcu.Pin7=PA6 32 | Mcu.Pin8=PA7 33 | Mcu.Pin9=PB0 34 | Mcu.PinsNb=17 35 | Mcu.ThirdPartyNb=0 36 | Mcu.UserConstants= 37 | Mcu.UserName=STM32L432KCUx 38 | MxCube.Version=6.12.0 39 | MxDb.Version=DB.6.0.120 40 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 41 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 42 | NVIC.ForceEnableDMAVector=true 43 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 44 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 45 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 46 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 47 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 48 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 49 | NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false 50 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 51 | PA0.GPIOParameters=GPIO_Label 52 | PA0.GPIO_Label=B2 53 | PA0.Locked=true 54 | PA0.Signal=GPXTI0 55 | PA1.GPIOParameters=GPIO_Label 56 | PA1.GPIO_Label=B1 57 | PA1.Locked=true 58 | PA1.Signal=GPXTI1 59 | PA10.Mode=Asynchronous 60 | PA10.Signal=USART1_RX 61 | PA13\ (JTMS-SWDIO).Mode=Serial_Wire 62 | PA13\ (JTMS-SWDIO).Signal=SYS_JTMS-SWDIO 63 | PA14\ (JTCK-SWCLK).Mode=Serial_Wire 64 | PA14\ (JTCK-SWCLK).Signal=SYS_JTCK-SWCLK 65 | PA2.Mode=Single Bank 1 66 | PA2.Signal=QUADSPI_BK1_NCS 67 | PA3.Mode=Single Bank 1 68 | PA3.Signal=QUADSPI_CLK 69 | PA5.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP 70 | PA5.GPIO_Label=LED1 71 | PA5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 72 | PA5.GPIO_PuPd=GPIO_NOPULL 73 | PA5.Locked=true 74 | PA5.PinState=GPIO_PIN_SET 75 | PA5.Signal=GPIO_Output 76 | PA6.Mode=Single Bank 1 77 | PA6.Signal=QUADSPI_BK1_IO3 78 | PA7.Mode=Single Bank 1 79 | PA7.Signal=QUADSPI_BK1_IO2 80 | PA8.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP 81 | PA8.GPIO_Label=LED2 82 | PA8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 83 | PA8.GPIO_PuPd=GPIO_NOPULL 84 | PA8.Locked=true 85 | PA8.PinState=GPIO_PIN_SET 86 | PA8.Signal=GPIO_Output 87 | PA9.Mode=Asynchronous 88 | PA9.Signal=USART1_TX 89 | PB0.Mode=Single Bank 1 90 | PB0.Signal=QUADSPI_BK1_IO1 91 | PB1.Mode=Single Bank 1 92 | PB1.Signal=QUADSPI_BK1_IO0 93 | PC14-OSC32_IN\ (PC14).GPIOParameters=GPIO_Label 94 | PC14-OSC32_IN\ (PC14).GPIO_Label=B4 95 | PC14-OSC32_IN\ (PC14).Locked=true 96 | PC14-OSC32_IN\ (PC14).Signal=GPXTI14 97 | PC15-OSC32_OUT\ (PC15).GPIOParameters=GPIO_Label 98 | PC15-OSC32_OUT\ (PC15).GPIO_Label=B3 99 | PC15-OSC32_OUT\ (PC15).Locked=true 100 | PC15-OSC32_OUT\ (PC15).Signal=GPXTI15 101 | PinOutPanel.RotationAngle=0 102 | ProjectManager.AskForMigrate=true 103 | ProjectManager.BackupPrevious=false 104 | ProjectManager.CompilerOptimize=6 105 | ProjectManager.ComputerToolchain=false 106 | ProjectManager.CoupleFile=false 107 | ProjectManager.CustomerFirmwarePackage= 108 | ProjectManager.DefaultFWLocation=true 109 | ProjectManager.DeletePrevious=true 110 | ProjectManager.DeviceId=STM32L432KCUx 111 | ProjectManager.FirmwarePackage=STM32Cube FW_L4 V1.18.1 112 | ProjectManager.FreePins=false 113 | ProjectManager.HalAssertFull=false 114 | ProjectManager.HeapSize=0x200 115 | ProjectManager.KeepUserCode=true 116 | ProjectManager.LastFirmware=true 117 | ProjectManager.LibraryCopy=1 118 | ProjectManager.MainLocation=Core/Src 119 | ProjectManager.NoMain=false 120 | ProjectManager.PreviousToolchain= 121 | ProjectManager.ProjectBuild=false 122 | ProjectManager.ProjectFileName=stm32l432.ioc 123 | ProjectManager.ProjectName=stm32l432 124 | ProjectManager.ProjectStructure= 125 | ProjectManager.RegisterCallBack= 126 | ProjectManager.StackSize=0x400 127 | ProjectManager.TargetToolchain=STM32CubeIDE 128 | ProjectManager.ToolChainLocation= 129 | ProjectManager.UAScriptAfterPath= 130 | ProjectManager.UAScriptBeforePath= 131 | ProjectManager.UnderRoot=true 132 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_QUADSPI_Init-QUADSPI-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true 133 | QUADSPI.ClockPrescaler=10 134 | QUADSPI.FlashSize=24 135 | QUADSPI.IPParameters=ClockPrescaler,FlashSize 136 | RCC.AHBFreq_Value=80000000 137 | RCC.APB1Freq_Value=80000000 138 | RCC.APB1TimFreq_Value=80000000 139 | RCC.APB2Freq_Value=80000000 140 | RCC.APB2TimFreq_Value=80000000 141 | RCC.CortexFreq_Value=80000000 142 | RCC.FCLKCortexFreq_Value=80000000 143 | RCC.FamilyName=M 144 | RCC.HCLKFreq_Value=80000000 145 | RCC.HSE_VALUE=8000000 146 | RCC.HSI48_VALUE=48000000 147 | RCC.HSI_VALUE=16000000 148 | RCC.I2C1Freq_Value=80000000 149 | RCC.I2C3Freq_Value=80000000 150 | RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PWRFreq_Value,SAI1Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value,USART2Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value 151 | RCC.LPTIM1Freq_Value=80000000 152 | RCC.LPTIM2Freq_Value=80000000 153 | RCC.LPUART1Freq_Value=80000000 154 | RCC.LSCOPinFreq_Value=32000 155 | RCC.LSE_VALUE=32768 156 | RCC.LSI_VALUE=32000 157 | RCC.MCO1PinFreq_Value=80000000 158 | RCC.MSI_VALUE=4000000 159 | RCC.PLLN=40 160 | RCC.PLLPoutputFreq_Value=22857142.85714286 161 | RCC.PLLQoutputFreq_Value=80000000 162 | RCC.PLLRCLKFreq_Value=80000000 163 | RCC.PLLSAI1PoutputFreq_Value=4571428.571428572 164 | RCC.PLLSAI1QoutputFreq_Value=16000000 165 | RCC.PLLSAI1RoutputFreq_Value=16000000 166 | RCC.PWRFreq_Value=80000000 167 | RCC.SAI1Freq_Value=4571428.571428572 168 | RCC.SWPMI1Freq_Value=80000000 169 | RCC.SYSCLKFreq_VALUE=80000000 170 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 171 | RCC.USART1Freq_Value=80000000 172 | RCC.USART2Freq_Value=80000000 173 | RCC.VCOInputFreq_Value=4000000 174 | RCC.VCOOutputFreq_Value=160000000 175 | RCC.VCOSAI1OutputFreq_Value=32000000 176 | SH.GPXTI0.0=GPIO_EXTI0 177 | SH.GPXTI0.ConfNb=1 178 | SH.GPXTI1.0=GPIO_EXTI1 179 | SH.GPXTI1.ConfNb=1 180 | SH.GPXTI14.0=GPIO_EXTI14 181 | SH.GPXTI14.ConfNb=1 182 | SH.GPXTI15.0=GPIO_EXTI15 183 | SH.GPXTI15.ConfNb=1 184 | USART1.BaudRate=921600 185 | USART1.IPParameters=VirtualMode-Asynchronous,BaudRate 186 | USART1.VirtualMode-Asynchronous=VM_ASYNC 187 | VP_SYS_VS_Systick.Mode=SysTick 188 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 189 | board=custom 190 | isbadioc=false 191 | -------------------------------------------------------------------------------- /examples/stm32l432/w25qxx: -------------------------------------------------------------------------------- 1 | ../../src -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/.gitignore: -------------------------------------------------------------------------------- 1 | /Debug/ 2 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/.project: -------------------------------------------------------------------------------- 1 | 2 | 3 | stm32world_stm32f405 4 | 5 | 6 | 7 | 8 | 9 | org.eclipse.cdt.managedbuilder.core.genmakebuilder 10 | clean,full,incremental, 11 | 12 | 13 | 14 | 15 | org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder 16 | full,incremental, 17 | 18 | 19 | 20 | 21 | 22 | com.st.stm32cube.ide.mcu.MCUProjectNature 23 | com.st.stm32cube.ide.mcu.MCUCubeProjectNature 24 | org.eclipse.cdt.core.cnature 25 | com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature 26 | com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature 27 | com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature 28 | com.st.stm32cube.ide.mcu.MCURootProjectNature 29 | org.eclipse.cdt.managedbuilder.core.managedBuildNature 30 | org.eclipse.cdt.managedbuilder.core.ScannerConfigNature 31 | 32 | 33 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/.settings/org.eclipse.cdt.core.prefs: -------------------------------------------------------------------------------- 1 | doxygen/doxygen_new_line_after_brief=true 2 | doxygen/doxygen_use_brief_tag=false 3 | doxygen/doxygen_use_javadoc_tags=true 4 | doxygen/doxygen_use_pre_tag=false 5 | doxygen/doxygen_use_structural_commands=false 6 | eclipse.preferences.version=1 7 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/.settings/org.eclipse.core.resources.prefs: -------------------------------------------------------------------------------- 1 | eclipse.preferences.version=1 2 | encoding/=UTF-8 3 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/.settings/stm32cubeide.project.prefs: -------------------------------------------------------------------------------- 1 | 635E684B79701B039C64EA45C3F84D30=BEAC6FC6DBC3E29F9B6AA84114E63A50 2 | 66BE74F758C12D739921AEA421D593D3=2 3 | 8DF89ED150041C4CBC7CB9A9CAA90856=B59FB841F7EAFBF7F639C88FEFA87EA4 4 | DC22A860405A8BF2F2C095E5B6529F12=B59FB841F7EAFBF7F639C88FEFA87EA4 5 | eclipse.preferences.version=1 6 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Core/Inc/main.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file : main.h 5 | * @brief : Header for main.c file. 6 | * This file contains the common defines of the application. 7 | ****************************************************************************** 8 | * @attention 9 | * 10 | * Copyright (c) 2025 STMicroelectronics. 11 | * All rights reserved. 12 | * 13 | * This software is licensed under terms that can be found in the LICENSE file 14 | * in the root directory of this software component. 15 | * If no LICENSE file comes with this software, it is provided AS-IS. 16 | * 17 | ****************************************************************************** 18 | */ 19 | /* USER CODE END Header */ 20 | 21 | /* Define to prevent recursive inclusion -------------------------------------*/ 22 | #ifndef __MAIN_H 23 | #define __MAIN_H 24 | 25 | #ifdef __cplusplus 26 | extern "C" { 27 | #endif 28 | 29 | /* Includes ------------------------------------------------------------------*/ 30 | #include "stm32f4xx_hal.h" 31 | 32 | /* Private includes ----------------------------------------------------------*/ 33 | /* USER CODE BEGIN Includes */ 34 | 35 | /* USER CODE END Includes */ 36 | 37 | /* Exported types ------------------------------------------------------------*/ 38 | /* USER CODE BEGIN ET */ 39 | 40 | /* USER CODE END ET */ 41 | 42 | /* Exported constants --------------------------------------------------------*/ 43 | /* USER CODE BEGIN EC */ 44 | 45 | /* USER CODE END EC */ 46 | 47 | /* Exported macro ------------------------------------------------------------*/ 48 | /* USER CODE BEGIN EM */ 49 | 50 | /* USER CODE END EM */ 51 | 52 | /* Exported functions prototypes ---------------------------------------------*/ 53 | void Error_Handler(void); 54 | 55 | /* USER CODE BEGIN EFP */ 56 | 57 | /* USER CODE END EFP */ 58 | 59 | /* Private defines -----------------------------------------------------------*/ 60 | #define LED_Pin GPIO_PIN_13 61 | #define LED_GPIO_Port GPIOC 62 | #define SPI1_CS_Pin GPIO_PIN_4 63 | #define SPI1_CS_GPIO_Port GPIOA 64 | 65 | /* USER CODE BEGIN Private defines */ 66 | 67 | #ifdef DEBUG 68 | #define DBG(...) printf(__VA_ARGS__) 69 | #else 70 | #define DBG(...) 71 | #endif 72 | 73 | /* USER CODE END Private defines */ 74 | 75 | #ifdef __cplusplus 76 | } 77 | #endif 78 | 79 | #endif /* __MAIN_H */ 80 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Core/Inc/stm32f4xx_it.h: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f4xx_it.h 5 | * @brief This file contains the headers of the interrupt handlers. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2025 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ 21 | #ifndef __STM32F4xx_IT_H 22 | #define __STM32F4xx_IT_H 23 | 24 | #ifdef __cplusplus 25 | extern "C" { 26 | #endif 27 | 28 | /* Private includes ----------------------------------------------------------*/ 29 | /* USER CODE BEGIN Includes */ 30 | 31 | /* USER CODE END Includes */ 32 | 33 | /* Exported types ------------------------------------------------------------*/ 34 | /* USER CODE BEGIN ET */ 35 | 36 | /* USER CODE END ET */ 37 | 38 | /* Exported constants --------------------------------------------------------*/ 39 | /* USER CODE BEGIN EC */ 40 | 41 | /* USER CODE END EC */ 42 | 43 | /* Exported macro ------------------------------------------------------------*/ 44 | /* USER CODE BEGIN EM */ 45 | 46 | /* USER CODE END EM */ 47 | 48 | /* Exported functions prototypes ---------------------------------------------*/ 49 | void NMI_Handler(void); 50 | void HardFault_Handler(void); 51 | void MemManage_Handler(void); 52 | void BusFault_Handler(void); 53 | void UsageFault_Handler(void); 54 | void SVC_Handler(void); 55 | void DebugMon_Handler(void); 56 | void PendSV_Handler(void); 57 | void SysTick_Handler(void); 58 | /* USER CODE BEGIN EFP */ 59 | 60 | /* USER CODE END EFP */ 61 | 62 | #ifdef __cplusplus 63 | } 64 | #endif 65 | 66 | #endif /* __STM32F4xx_IT_H */ 67 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Core/Src/stm32f4xx_it.c: -------------------------------------------------------------------------------- 1 | /* USER CODE BEGIN Header */ 2 | /** 3 | ****************************************************************************** 4 | * @file stm32f4xx_it.c 5 | * @brief Interrupt Service Routines. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2025 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | /* USER CODE END Header */ 19 | 20 | /* Includes ------------------------------------------------------------------*/ 21 | #include "main.h" 22 | #include "stm32f4xx_it.h" 23 | /* Private includes ----------------------------------------------------------*/ 24 | /* USER CODE BEGIN Includes */ 25 | /* USER CODE END Includes */ 26 | 27 | /* Private typedef -----------------------------------------------------------*/ 28 | /* USER CODE BEGIN TD */ 29 | 30 | /* USER CODE END TD */ 31 | 32 | /* Private define ------------------------------------------------------------*/ 33 | /* USER CODE BEGIN PD */ 34 | 35 | /* USER CODE END PD */ 36 | 37 | /* Private macro -------------------------------------------------------------*/ 38 | /* USER CODE BEGIN PM */ 39 | 40 | /* USER CODE END PM */ 41 | 42 | /* Private variables ---------------------------------------------------------*/ 43 | /* USER CODE BEGIN PV */ 44 | 45 | /* USER CODE END PV */ 46 | 47 | /* Private function prototypes -----------------------------------------------*/ 48 | /* USER CODE BEGIN PFP */ 49 | 50 | /* USER CODE END PFP */ 51 | 52 | /* Private user code ---------------------------------------------------------*/ 53 | /* USER CODE BEGIN 0 */ 54 | 55 | /* USER CODE END 0 */ 56 | 57 | /* External variables --------------------------------------------------------*/ 58 | 59 | /* USER CODE BEGIN EV */ 60 | 61 | /* USER CODE END EV */ 62 | 63 | /******************************************************************************/ 64 | /* Cortex-M4 Processor Interruption and Exception Handlers */ 65 | /******************************************************************************/ 66 | /** 67 | * @brief This function handles Non maskable interrupt. 68 | */ 69 | void NMI_Handler(void) 70 | { 71 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ 72 | 73 | /* USER CODE END NonMaskableInt_IRQn 0 */ 74 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ 75 | while (1) 76 | { 77 | } 78 | /* USER CODE END NonMaskableInt_IRQn 1 */ 79 | } 80 | 81 | /** 82 | * @brief This function handles Hard fault interrupt. 83 | */ 84 | void HardFault_Handler(void) 85 | { 86 | /* USER CODE BEGIN HardFault_IRQn 0 */ 87 | 88 | /* USER CODE END HardFault_IRQn 0 */ 89 | while (1) 90 | { 91 | /* USER CODE BEGIN W1_HardFault_IRQn 0 */ 92 | /* USER CODE END W1_HardFault_IRQn 0 */ 93 | } 94 | } 95 | 96 | /** 97 | * @brief This function handles Memory management fault. 98 | */ 99 | void MemManage_Handler(void) 100 | { 101 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ 102 | 103 | /* USER CODE END MemoryManagement_IRQn 0 */ 104 | while (1) 105 | { 106 | /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ 107 | /* USER CODE END W1_MemoryManagement_IRQn 0 */ 108 | } 109 | } 110 | 111 | /** 112 | * @brief This function handles Pre-fetch fault, memory access fault. 113 | */ 114 | void BusFault_Handler(void) 115 | { 116 | /* USER CODE BEGIN BusFault_IRQn 0 */ 117 | 118 | /* USER CODE END BusFault_IRQn 0 */ 119 | while (1) 120 | { 121 | /* USER CODE BEGIN W1_BusFault_IRQn 0 */ 122 | /* USER CODE END W1_BusFault_IRQn 0 */ 123 | } 124 | } 125 | 126 | /** 127 | * @brief This function handles Undefined instruction or illegal state. 128 | */ 129 | void UsageFault_Handler(void) 130 | { 131 | /* USER CODE BEGIN UsageFault_IRQn 0 */ 132 | 133 | /* USER CODE END UsageFault_IRQn 0 */ 134 | while (1) 135 | { 136 | /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ 137 | /* USER CODE END W1_UsageFault_IRQn 0 */ 138 | } 139 | } 140 | 141 | /** 142 | * @brief This function handles System service call via SWI instruction. 143 | */ 144 | void SVC_Handler(void) 145 | { 146 | /* USER CODE BEGIN SVCall_IRQn 0 */ 147 | 148 | /* USER CODE END SVCall_IRQn 0 */ 149 | /* USER CODE BEGIN SVCall_IRQn 1 */ 150 | 151 | /* USER CODE END SVCall_IRQn 1 */ 152 | } 153 | 154 | /** 155 | * @brief This function handles Debug monitor. 156 | */ 157 | void DebugMon_Handler(void) 158 | { 159 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ 160 | 161 | /* USER CODE END DebugMonitor_IRQn 0 */ 162 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ 163 | 164 | /* USER CODE END DebugMonitor_IRQn 1 */ 165 | } 166 | 167 | /** 168 | * @brief This function handles Pendable request for system service. 169 | */ 170 | void PendSV_Handler(void) 171 | { 172 | /* USER CODE BEGIN PendSV_IRQn 0 */ 173 | 174 | /* USER CODE END PendSV_IRQn 0 */ 175 | /* USER CODE BEGIN PendSV_IRQn 1 */ 176 | 177 | /* USER CODE END PendSV_IRQn 1 */ 178 | } 179 | 180 | /** 181 | * @brief This function handles System tick timer. 182 | */ 183 | void SysTick_Handler(void) 184 | { 185 | /* USER CODE BEGIN SysTick_IRQn 0 */ 186 | 187 | /* USER CODE END SysTick_IRQn 0 */ 188 | HAL_IncTick(); 189 | /* USER CODE BEGIN SysTick_IRQn 1 */ 190 | 191 | /* USER CODE END SysTick_IRQn 1 */ 192 | } 193 | 194 | /******************************************************************************/ 195 | /* STM32F4xx Peripheral Interrupt Handlers */ 196 | /* Add here the Interrupt Handlers for the used peripherals. */ 197 | /* For the available peripheral interrupt handler names, */ 198 | /* please refer to the startup file (startup_stm32f4xx.s). */ 199 | /******************************************************************************/ 200 | 201 | /* USER CODE BEGIN 1 */ 202 | 203 | /* USER CODE END 1 */ 204 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Core/Src/syscalls.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file syscalls.c 4 | * @author Auto-generated by STM32CubeIDE 5 | * @brief STM32CubeIDE Minimal System calls file 6 | * 7 | * For more information about which c-functions 8 | * need which of these lowlevel functions 9 | * please consult the Newlib libc-manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2020-2025 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include 31 | #include 32 | 33 | 34 | /* Variables */ 35 | extern int __io_putchar(int ch) __attribute__((weak)); 36 | extern int __io_getchar(void) __attribute__((weak)); 37 | 38 | 39 | char *__env[1] = { 0 }; 40 | char **environ = __env; 41 | 42 | 43 | /* Functions */ 44 | void initialise_monitor_handles() 45 | { 46 | } 47 | 48 | int _getpid(void) 49 | { 50 | return 1; 51 | } 52 | 53 | int _kill(int pid, int sig) 54 | { 55 | (void)pid; 56 | (void)sig; 57 | errno = EINVAL; 58 | return -1; 59 | } 60 | 61 | void _exit (int status) 62 | { 63 | _kill(status, -1); 64 | while (1) {} /* Make sure we hang here */ 65 | } 66 | 67 | __attribute__((weak)) int _read(int file, char *ptr, int len) 68 | { 69 | (void)file; 70 | int DataIdx; 71 | 72 | for (DataIdx = 0; DataIdx < len; DataIdx++) 73 | { 74 | *ptr++ = __io_getchar(); 75 | } 76 | 77 | return len; 78 | } 79 | 80 | __attribute__((weak)) int _write(int file, char *ptr, int len) 81 | { 82 | (void)file; 83 | int DataIdx; 84 | 85 | for (DataIdx = 0; DataIdx < len; DataIdx++) 86 | { 87 | __io_putchar(*ptr++); 88 | } 89 | return len; 90 | } 91 | 92 | int _close(int file) 93 | { 94 | (void)file; 95 | return -1; 96 | } 97 | 98 | 99 | int _fstat(int file, struct stat *st) 100 | { 101 | (void)file; 102 | st->st_mode = S_IFCHR; 103 | return 0; 104 | } 105 | 106 | int _isatty(int file) 107 | { 108 | (void)file; 109 | return 1; 110 | } 111 | 112 | int _lseek(int file, int ptr, int dir) 113 | { 114 | (void)file; 115 | (void)ptr; 116 | (void)dir; 117 | return 0; 118 | } 119 | 120 | int _open(char *path, int flags, ...) 121 | { 122 | (void)path; 123 | (void)flags; 124 | /* Pretend like we always fail */ 125 | return -1; 126 | } 127 | 128 | int _wait(int *status) 129 | { 130 | (void)status; 131 | errno = ECHILD; 132 | return -1; 133 | } 134 | 135 | int _unlink(char *name) 136 | { 137 | (void)name; 138 | errno = ENOENT; 139 | return -1; 140 | } 141 | 142 | int _times(struct tms *buf) 143 | { 144 | (void)buf; 145 | return -1; 146 | } 147 | 148 | int _stat(char *file, struct stat *st) 149 | { 150 | (void)file; 151 | st->st_mode = S_IFCHR; 152 | return 0; 153 | } 154 | 155 | int _link(char *old, char *new) 156 | { 157 | (void)old; 158 | (void)new; 159 | errno = EMLINK; 160 | return -1; 161 | } 162 | 163 | int _fork(void) 164 | { 165 | errno = EAGAIN; 166 | return -1; 167 | } 168 | 169 | int _execve(char *name, char **argv, char **env) 170 | { 171 | (void)name; 172 | (void)argv; 173 | (void)env; 174 | errno = ENOMEM; 175 | return -1; 176 | } 177 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Core/Src/sysmem.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file sysmem.c 4 | * @author Generated by STM32CubeIDE 5 | * @brief STM32CubeIDE System Memory calls file 6 | * 7 | * For more information about which C functions 8 | * need which of these lowlevel functions 9 | * please consult the newlib libc manual 10 | ****************************************************************************** 11 | * @attention 12 | * 13 | * Copyright (c) 2025 STMicroelectronics. 14 | * All rights reserved. 15 | * 16 | * This software is licensed under terms that can be found in the LICENSE file 17 | * in the root directory of this software component. 18 | * If no LICENSE file comes with this software, it is provided AS-IS. 19 | * 20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes */ 24 | #include 25 | #include 26 | 27 | /** 28 | * Pointer to the current high watermark of the heap usage 29 | */ 30 | static uint8_t *__sbrk_heap_end = NULL; 31 | 32 | /** 33 | * @brief _sbrk() allocates memory to the newlib heap and is used by malloc 34 | * and others from the C library 35 | * 36 | * @verbatim 37 | * ############################################################################ 38 | * # .data # .bss # newlib heap # MSP stack # 39 | * # # # # Reserved by _Min_Stack_Size # 40 | * ############################################################################ 41 | * ^-- RAM start ^-- _end _estack, RAM end --^ 42 | * @endverbatim 43 | * 44 | * This implementation starts allocating at the '_end' linker symbol 45 | * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack 46 | * The implementation considers '_estack' linker symbol to be RAM end 47 | * NOTE: If the MSP stack, at any point during execution, grows larger than the 48 | * reserved size, please increase the '_Min_Stack_Size'. 49 | * 50 | * @param incr Memory size 51 | * @return Pointer to allocated memory 52 | */ 53 | void *_sbrk(ptrdiff_t incr) 54 | { 55 | extern uint8_t _end; /* Symbol defined in the linker script */ 56 | extern uint8_t _estack; /* Symbol defined in the linker script */ 57 | extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ 58 | const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 59 | const uint8_t *max_heap = (uint8_t *)stack_limit; 60 | uint8_t *prev_heap_end; 61 | 62 | /* Initialize heap end at first call */ 63 | if (NULL == __sbrk_heap_end) 64 | { 65 | __sbrk_heap_end = &_end; 66 | } 67 | 68 | /* Protect heap from growing into the reserved MSP stack */ 69 | if (__sbrk_heap_end + incr > max_heap) 70 | { 71 | errno = ENOMEM; 72 | return (void *)-1; 73 | } 74 | 75 | prev_heap_end = __sbrk_heap_end; 76 | __sbrk_heap_end += incr; 77 | 78 | return (void *)prev_heap_end; 79 | } 80 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f4xx.h 4 | * @author MCD Application Team 5 | * @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /** @addtogroup CMSIS 20 | * @{ 21 | */ 22 | 23 | /** @addtogroup stm32f4xx_system 24 | * @{ 25 | */ 26 | 27 | /** 28 | * @brief Define to prevent recursive inclusion 29 | */ 30 | #ifndef __SYSTEM_STM32F4XX_H 31 | #define __SYSTEM_STM32F4XX_H 32 | 33 | #ifdef __cplusplus 34 | extern "C" { 35 | #endif 36 | 37 | /** @addtogroup STM32F4xx_System_Includes 38 | * @{ 39 | */ 40 | 41 | /** 42 | * @} 43 | */ 44 | 45 | 46 | /** @addtogroup STM32F4xx_System_Exported_types 47 | * @{ 48 | */ 49 | /* This variable is updated in three ways: 50 | 1) by calling CMSIS function SystemCoreClockUpdate() 51 | 2) by calling HAL API function HAL_RCC_GetSysClockFreq() 52 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 53 | Note: If you use this function to configure the system clock; then there 54 | is no need to call the 2 first functions listed above, since SystemCoreClock 55 | variable is updated automatically. 56 | */ 57 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 58 | 59 | extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */ 60 | extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */ 61 | 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @addtogroup STM32F4xx_System_Exported_Constants 67 | * @{ 68 | */ 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @addtogroup STM32F4xx_System_Exported_Macros 75 | * @{ 76 | */ 77 | 78 | /** 79 | * @} 80 | */ 81 | 82 | /** @addtogroup STM32F4xx_System_Exported_Functions 83 | * @{ 84 | */ 85 | 86 | extern void SystemInit(void); 87 | extern void SystemCoreClockUpdate(void); 88 | /** 89 | * @} 90 | */ 91 | 92 | #ifdef __cplusplus 93 | } 94 | #endif 95 | 96 | #endif /*__SYSTEM_STM32F4XX_H */ 97 | 98 | /** 99 | * @} 100 | */ 101 | 102 | /** 103 | * @} 104 | */ 105 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/CMSIS/Device/ST/STM32F4xx/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the Apache-2.0 license shall apply. 5 | You may obtain a copy of the Apache-2.0 at: 6 | https://opensource.org/licenses/Apache-2.0 7 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/CMSIS/Include/cmsis_version.h: -------------------------------------------------------------------------------- 1 | /**************************************************************************//** 2 | * @file cmsis_version.h 3 | * @brief CMSIS Core(M) Version definitions 4 | * @version V5.0.5 5 | * @date 02. February 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2009-2022 ARM Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef __CMSIS_VERSION_H 32 | #define __CMSIS_VERSION_H 33 | 34 | /* CMSIS Version definitions */ 35 | #define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ 36 | #define __CM_CMSIS_VERSION_SUB ( 6U) /*!< [15:0] CMSIS Core(M) sub version */ 37 | #define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ 38 | __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ 39 | #endif 40 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/CMSIS/Include/pac_armv81.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file pac_armv81.h 3 | * @brief CMSIS PAC key functions for Armv8.1-M PAC extension 4 | * @version V1.0.0 5 | * @date 23. March 2022 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2022 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef PAC_ARMV81_H 32 | #define PAC_ARMV81_H 33 | 34 | 35 | /* ################### PAC Key functions ########################### */ 36 | /** 37 | \ingroup CMSIS_Core_FunctionInterface 38 | \defgroup CMSIS_Core_PacKeyFunctions PAC Key functions 39 | \brief Functions that access the PAC keys. 40 | @{ 41 | */ 42 | 43 | #if (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) 44 | 45 | /** 46 | \brief read the PAC key used for privileged mode 47 | \details Reads the PAC key stored in the PAC_KEY_P registers. 48 | \param [out] pPacKey 128bit PAC key 49 | */ 50 | __STATIC_FORCEINLINE void __get_PAC_KEY_P (uint32_t* pPacKey) { 51 | __ASM volatile ( 52 | "mrs r1, pac_key_p_0\n" 53 | "str r1,[%0,#0]\n" 54 | "mrs r1, pac_key_p_1\n" 55 | "str r1,[%0,#4]\n" 56 | "mrs r1, pac_key_p_2\n" 57 | "str r1,[%0,#8]\n" 58 | "mrs r1, pac_key_p_3\n" 59 | "str r1,[%0,#12]\n" 60 | : : "r" (pPacKey) : "memory", "r1" 61 | ); 62 | } 63 | 64 | /** 65 | \brief write the PAC key used for privileged mode 66 | \details writes the given PAC key to the PAC_KEY_P registers. 67 | \param [in] pPacKey 128bit PAC key 68 | */ 69 | __STATIC_FORCEINLINE void __set_PAC_KEY_P (uint32_t* pPacKey) { 70 | __ASM volatile ( 71 | "ldr r1,[%0,#0]\n" 72 | "msr pac_key_p_0, r1\n" 73 | "ldr r1,[%0,#4]\n" 74 | "msr pac_key_p_1, r1\n" 75 | "ldr r1,[%0,#8]\n" 76 | "msr pac_key_p_2, r1\n" 77 | "ldr r1,[%0,#12]\n" 78 | "msr pac_key_p_3, r1\n" 79 | : : "r" (pPacKey) : "memory", "r1" 80 | ); 81 | } 82 | 83 | /** 84 | \brief read the PAC key used for unprivileged mode 85 | \details Reads the PAC key stored in the PAC_KEY_U registers. 86 | \param [out] pPacKey 128bit PAC key 87 | */ 88 | __STATIC_FORCEINLINE void __get_PAC_KEY_U (uint32_t* pPacKey) { 89 | __ASM volatile ( 90 | "mrs r1, pac_key_u_0\n" 91 | "str r1,[%0,#0]\n" 92 | "mrs r1, pac_key_u_1\n" 93 | "str r1,[%0,#4]\n" 94 | "mrs r1, pac_key_u_2\n" 95 | "str r1,[%0,#8]\n" 96 | "mrs r1, pac_key_u_3\n" 97 | "str r1,[%0,#12]\n" 98 | : : "r" (pPacKey) : "memory", "r1" 99 | ); 100 | } 101 | 102 | /** 103 | \brief write the PAC key used for unprivileged mode 104 | \details writes the given PAC key to the PAC_KEY_U registers. 105 | \param [in] pPacKey 128bit PAC key 106 | */ 107 | __STATIC_FORCEINLINE void __set_PAC_KEY_U (uint32_t* pPacKey) { 108 | __ASM volatile ( 109 | "ldr r1,[%0,#0]\n" 110 | "msr pac_key_u_0, r1\n" 111 | "ldr r1,[%0,#4]\n" 112 | "msr pac_key_u_1, r1\n" 113 | "ldr r1,[%0,#8]\n" 114 | "msr pac_key_u_2, r1\n" 115 | "ldr r1,[%0,#12]\n" 116 | "msr pac_key_u_3, r1\n" 117 | : : "r" (pPacKey) : "memory", "r1" 118 | ); 119 | } 120 | 121 | #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 122 | 123 | /** 124 | \brief read the PAC key used for privileged mode (non-secure) 125 | \details Reads the PAC key stored in the non-secure PAC_KEY_P registers when in secure mode. 126 | \param [out] pPacKey 128bit PAC key 127 | */ 128 | __STATIC_FORCEINLINE void __TZ_get_PAC_KEY_P_NS (uint32_t* pPacKey) { 129 | __ASM volatile ( 130 | "mrs r1, pac_key_p_0_ns\n" 131 | "str r1,[%0,#0]\n" 132 | "mrs r1, pac_key_p_1_ns\n" 133 | "str r1,[%0,#4]\n" 134 | "mrs r1, pac_key_p_2_ns\n" 135 | "str r1,[%0,#8]\n" 136 | "mrs r1, pac_key_p_3_ns\n" 137 | "str r1,[%0,#12]\n" 138 | : : "r" (pPacKey) : "memory", "r1" 139 | ); 140 | } 141 | 142 | /** 143 | \brief write the PAC key used for privileged mode (non-secure) 144 | \details writes the given PAC key to the non-secure PAC_KEY_P registers when in secure mode. 145 | \param [in] pPacKey 128bit PAC key 146 | */ 147 | __STATIC_FORCEINLINE void __TZ_set_PAC_KEY_P_NS (uint32_t* pPacKey) { 148 | __ASM volatile ( 149 | "ldr r1,[%0,#0]\n" 150 | "msr pac_key_p_0_ns, r1\n" 151 | "ldr r1,[%0,#4]\n" 152 | "msr pac_key_p_1_ns, r1\n" 153 | "ldr r1,[%0,#8]\n" 154 | "msr pac_key_p_2_ns, r1\n" 155 | "ldr r1,[%0,#12]\n" 156 | "msr pac_key_p_3_ns, r1\n" 157 | : : "r" (pPacKey) : "memory", "r1" 158 | ); 159 | } 160 | 161 | /** 162 | \brief read the PAC key used for unprivileged mode (non-secure) 163 | \details Reads the PAC key stored in the non-secure PAC_KEY_U registers when in secure mode. 164 | \param [out] pPacKey 128bit PAC key 165 | */ 166 | __STATIC_FORCEINLINE void __TZ_get_PAC_KEY_U_NS (uint32_t* pPacKey) { 167 | __ASM volatile ( 168 | "mrs r1, pac_key_u_0_ns\n" 169 | "str r1,[%0,#0]\n" 170 | "mrs r1, pac_key_u_1_ns\n" 171 | "str r1,[%0,#4]\n" 172 | "mrs r1, pac_key_u_2_ns\n" 173 | "str r1,[%0,#8]\n" 174 | "mrs r1, pac_key_u_3_ns\n" 175 | "str r1,[%0,#12]\n" 176 | : : "r" (pPacKey) : "memory", "r1" 177 | ); 178 | } 179 | 180 | /** 181 | \brief write the PAC key used for unprivileged mode (non-secure) 182 | \details writes the given PAC key to the non-secure PAC_KEY_U registers when in secure mode. 183 | \param [in] pPacKey 128bit PAC key 184 | */ 185 | __STATIC_FORCEINLINE void __TZ_set_PAC_KEY_U_NS (uint32_t* pPacKey) { 186 | __ASM volatile ( 187 | "ldr r1,[%0,#0]\n" 188 | "msr pac_key_u_0_ns, r1\n" 189 | "ldr r1,[%0,#4]\n" 190 | "msr pac_key_u_1_ns, r1\n" 191 | "ldr r1,[%0,#8]\n" 192 | "msr pac_key_u_2_ns, r1\n" 193 | "ldr r1,[%0,#12]\n" 194 | "msr pac_key_u_3_ns, r1\n" 195 | : : "r" (pPacKey) : "memory", "r1" 196 | ); 197 | } 198 | 199 | #endif /* (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) */ 200 | 201 | #endif /* (defined (__ARM_FEATURE_PAUTH) && (__ARM_FEATURE_PAUTH == 1)) */ 202 | 203 | /*@} end of CMSIS_Core_PacKeyFunctions */ 204 | 205 | 206 | #endif /* PAC_ARMV81_H */ 207 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/CMSIS/Include/tz_context.h: -------------------------------------------------------------------------------- 1 | /****************************************************************************** 2 | * @file tz_context.h 3 | * @brief Context Management for Armv8-M TrustZone 4 | * @version V1.0.1 5 | * @date 10. January 2018 6 | ******************************************************************************/ 7 | /* 8 | * Copyright (c) 2017-2018 Arm Limited. All rights reserved. 9 | * 10 | * SPDX-License-Identifier: Apache-2.0 11 | * 12 | * Licensed under the Apache License, Version 2.0 (the License); you may 13 | * not use this file except in compliance with the License. 14 | * You may obtain a copy of the License at 15 | * 16 | * www.apache.org/licenses/LICENSE-2.0 17 | * 18 | * Unless required by applicable law or agreed to in writing, software 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 | * See the License for the specific language governing permissions and 22 | * limitations under the License. 23 | */ 24 | 25 | #if defined ( __ICCARM__ ) 26 | #pragma system_include /* treat file as system include file for MISRA check */ 27 | #elif defined (__clang__) 28 | #pragma clang system_header /* treat file as system include file */ 29 | #endif 30 | 31 | #ifndef TZ_CONTEXT_H 32 | #define TZ_CONTEXT_H 33 | 34 | #include 35 | 36 | #ifndef TZ_MODULEID_T 37 | #define TZ_MODULEID_T 38 | /// \details Data type that identifies secure software modules called by a process. 39 | typedef uint32_t TZ_ModuleId_t; 40 | #endif 41 | 42 | /// \details TZ Memory ID identifies an allocated memory slot. 43 | typedef uint32_t TZ_MemoryId_t; 44 | 45 | /// Initialize secure context memory system 46 | /// \return execution status (1: success, 0: error) 47 | uint32_t TZ_InitContextSystem_S (void); 48 | 49 | /// Allocate context memory for calling secure software modules in TrustZone 50 | /// \param[in] module identifies software modules called from non-secure mode 51 | /// \return value != 0 id TrustZone memory slot identifier 52 | /// \return value 0 no memory available or internal error 53 | TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); 54 | 55 | /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S 56 | /// \param[in] id TrustZone memory slot identifier 57 | /// \return execution status (1: success, 0: error) 58 | uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); 59 | 60 | /// Load secure context (called on RTOS thread context switch) 61 | /// \param[in] id TrustZone memory slot identifier 62 | /// \return execution status (1: success, 0: error) 63 | uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); 64 | 65 | /// Store secure context (called on RTOS thread context switch) 66 | /// \param[in] id TrustZone memory slot identifier 67 | /// \return execution status (1: success, 0: error) 68 | uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); 69 | 70 | #endif // TZ_CONTEXT_H 71 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC HAL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F4xx_HAL_CRC_H 21 | #define STM32F4xx_HAL_CRC_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup CRC 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup CRC_Exported_Types CRC Exported Types 40 | * @{ 41 | */ 42 | 43 | /** 44 | * @brief CRC HAL State Structure definition 45 | */ 46 | typedef enum 47 | { 48 | HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */ 49 | HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */ 50 | HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */ 51 | HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */ 52 | HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */ 53 | } HAL_CRC_StateTypeDef; 54 | 55 | 56 | /** 57 | * @brief CRC Handle Structure definition 58 | */ 59 | typedef struct 60 | { 61 | CRC_TypeDef *Instance; /*!< Register base address */ 62 | 63 | HAL_LockTypeDef Lock; /*!< CRC Locking object */ 64 | 65 | __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ 66 | 67 | } CRC_HandleTypeDef; 68 | /** 69 | * @} 70 | */ 71 | 72 | /* Exported constants --------------------------------------------------------*/ 73 | /** @defgroup CRC_Exported_Constants CRC Exported Constants 74 | * @{ 75 | */ 76 | 77 | /** 78 | * @} 79 | */ 80 | 81 | /* Exported macros -----------------------------------------------------------*/ 82 | /** @defgroup CRC_Exported_Macros CRC Exported Macros 83 | * @{ 84 | */ 85 | 86 | /** @brief Reset CRC handle state. 87 | * @param __HANDLE__ CRC handle. 88 | * @retval None 89 | */ 90 | #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) 91 | 92 | /** 93 | * @brief Reset CRC Data Register. 94 | * @param __HANDLE__ CRC handle 95 | * @retval None 96 | */ 97 | #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) 98 | 99 | /** 100 | * @brief Store data in the Independent Data (ID) register. 101 | * @param __HANDLE__ CRC handle 102 | * @param __VALUE__ Value to be stored in the ID register 103 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 104 | * @retval None 105 | */ 106 | #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) 107 | 108 | /** 109 | * @brief Return the data stored in the Independent Data (ID) register. 110 | * @param __HANDLE__ CRC handle 111 | * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits 112 | * @retval Value of the ID register 113 | */ 114 | #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) 115 | /** 116 | * @} 117 | */ 118 | 119 | 120 | /* Private macros --------------------------------------------------------*/ 121 | /** @defgroup CRC_Private_Macros CRC Private Macros 122 | * @{ 123 | */ 124 | 125 | /** 126 | * @} 127 | */ 128 | 129 | /* Exported functions --------------------------------------------------------*/ 130 | /** @defgroup CRC_Exported_Functions CRC Exported Functions 131 | * @{ 132 | */ 133 | 134 | /* Initialization and de-initialization functions ****************************/ 135 | /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions 136 | * @{ 137 | */ 138 | HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); 139 | HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc); 140 | void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); 141 | void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); 142 | /** 143 | * @} 144 | */ 145 | 146 | /* Peripheral Control functions ***********************************************/ 147 | /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions 148 | * @{ 149 | */ 150 | uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 151 | uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); 152 | /** 153 | * @} 154 | */ 155 | 156 | /* Peripheral State and Error functions ***************************************/ 157 | /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions 158 | * @{ 159 | */ 160 | HAL_CRC_StateTypeDef HAL_CRC_GetState(const CRC_HandleTypeDef *hcrc); 161 | /** 162 | * @} 163 | */ 164 | 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | /** 174 | * @} 175 | */ 176 | 177 | #ifdef __cplusplus 178 | } 179 | #endif 180 | 181 | #endif /* STM32F4xx_HAL_CRC_H */ 182 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_dma_ex.h 4 | * @author MCD Application Team 5 | * @brief Header file of DMA HAL extension module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef __STM32F4xx_HAL_DMA_EX_H 21 | #define __STM32F4xx_HAL_DMA_EX_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f4xx_hal_def.h" 29 | 30 | /** @addtogroup STM32F4xx_HAL_Driver 31 | * @{ 32 | */ 33 | 34 | /** @addtogroup DMAEx 35 | * @{ 36 | */ 37 | 38 | /* Exported types ------------------------------------------------------------*/ 39 | /** @defgroup DMAEx_Exported_Types DMAEx Exported Types 40 | * @brief DMAEx Exported types 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @brief HAL DMA Memory definition 46 | */ 47 | typedef enum 48 | { 49 | MEMORY0 = 0x00U, /*!< Memory 0 */ 50 | MEMORY1 = 0x01U /*!< Memory 1 */ 51 | }HAL_DMA_MemoryTypeDef; 52 | 53 | /** 54 | * @} 55 | */ 56 | 57 | /* Exported functions --------------------------------------------------------*/ 58 | /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions 59 | * @brief DMAEx Exported functions 60 | * @{ 61 | */ 62 | 63 | /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions 64 | * @brief Extended features functions 65 | * @{ 66 | */ 67 | 68 | /* IO operation functions *******************************************************/ 69 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 70 | HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength); 71 | HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory); 72 | 73 | /** 74 | * @} 75 | */ 76 | /** 77 | * @} 78 | */ 79 | 80 | /* Private functions ---------------------------------------------------------*/ 81 | /** @defgroup DMAEx_Private_Functions DMAEx Private Functions 82 | * @brief DMAEx Private functions 83 | * @{ 84 | */ 85 | /** 86 | * @} 87 | */ 88 | 89 | /** 90 | * @} 91 | */ 92 | 93 | /** 94 | * @} 95 | */ 96 | 97 | #ifdef __cplusplus 98 | } 99 | #endif 100 | 101 | #endif /*__STM32F4xx_HAL_DMA_EX_H*/ 102 | 103 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.h 4 | * @author MCD Application Team 5 | * @brief Header file of FLASH RAMFUNC driver. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2017 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file in 13 | * the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | ****************************************************************************** 16 | */ 17 | 18 | /* Define to prevent recursive inclusion -------------------------------------*/ 19 | #ifndef __STM32F4xx_FLASH_RAMFUNC_H 20 | #define __STM32F4xx_FLASH_RAMFUNC_H 21 | 22 | #ifdef __cplusplus 23 | extern "C" { 24 | #endif 25 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ 26 | defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) 27 | 28 | /* Includes ------------------------------------------------------------------*/ 29 | #include "stm32f4xx_hal_def.h" 30 | 31 | /** @addtogroup STM32F4xx_HAL_Driver 32 | * @{ 33 | */ 34 | 35 | /** @addtogroup FLASH_RAMFUNC 36 | * @{ 37 | */ 38 | 39 | /* Exported types ------------------------------------------------------------*/ 40 | /* Exported macro ------------------------------------------------------------*/ 41 | /* Exported functions --------------------------------------------------------*/ 42 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions 43 | * @{ 44 | */ 45 | 46 | /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1 47 | * @{ 48 | */ 49 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void); 50 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void); 51 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void); 52 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void); 53 | /** 54 | * @} 55 | */ 56 | 57 | /** 58 | * @} 59 | */ 60 | 61 | /** 62 | * @} 63 | */ 64 | 65 | /** 66 | * @} 67 | */ 68 | 69 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 70 | #ifdef __cplusplus 71 | } 72 | #endif 73 | 74 | 75 | #endif /* __STM32F4xx_FLASH_RAMFUNC_H */ 76 | 77 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_crc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_ll_crc.h 4 | * @author MCD Application Team 5 | * @brief Header file of CRC LL module. 6 | ****************************************************************************** 7 | * @attention 8 | * 9 | * Copyright (c) 2016 STMicroelectronics. 10 | * All rights reserved. 11 | * 12 | * This software is licensed under terms that can be found in the LICENSE file 13 | * in the root directory of this software component. 14 | * If no LICENSE file comes with this software, it is provided AS-IS. 15 | * 16 | ****************************************************************************** 17 | */ 18 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ 20 | #ifndef STM32F4xx_LL_CRC_H 21 | #define STM32F4xx_LL_CRC_H 22 | 23 | #ifdef __cplusplus 24 | extern "C" { 25 | #endif 26 | 27 | /* Includes ------------------------------------------------------------------*/ 28 | #include "stm32f4xx.h" 29 | 30 | /** @addtogroup STM32F4xx_LL_Driver 31 | * @{ 32 | */ 33 | 34 | #if defined(CRC) 35 | 36 | /** @defgroup CRC_LL CRC 37 | * @{ 38 | */ 39 | 40 | /* Private types -------------------------------------------------------------*/ 41 | /* Private variables ---------------------------------------------------------*/ 42 | /* Private constants ---------------------------------------------------------*/ 43 | /* Private macros ------------------------------------------------------------*/ 44 | 45 | /* Exported types ------------------------------------------------------------*/ 46 | /* Exported constants --------------------------------------------------------*/ 47 | /** @defgroup CRC_LL_Exported_Constants CRC Exported Constants 48 | * @{ 49 | */ 50 | 51 | /** 52 | * @} 53 | */ 54 | 55 | /* Exported macro ------------------------------------------------------------*/ 56 | /** @defgroup CRC_LL_Exported_Macros CRC Exported Macros 57 | * @{ 58 | */ 59 | 60 | /** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @brief Write a value in CRC register 66 | * @param __INSTANCE__ CRC Instance 67 | * @param __REG__ Register to be written 68 | * @param __VALUE__ Value to be written in the register 69 | * @retval None 70 | */ 71 | #define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__) 72 | 73 | /** 74 | * @brief Read a value in CRC register 75 | * @param __INSTANCE__ CRC Instance 76 | * @param __REG__ Register to be read 77 | * @retval Register value 78 | */ 79 | #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 80 | /** 81 | * @} 82 | */ 83 | 84 | /** 85 | * @} 86 | */ 87 | 88 | 89 | /* Exported functions --------------------------------------------------------*/ 90 | /** @defgroup CRC_LL_Exported_Functions CRC Exported Functions 91 | * @{ 92 | */ 93 | 94 | /** @defgroup CRC_LL_EF_Configuration CRC Configuration functions 95 | * @{ 96 | */ 97 | 98 | /** 99 | * @brief Reset the CRC calculation unit. 100 | * @note If Programmable Initial CRC value feature 101 | * is available, also set the Data Register to the value stored in the 102 | * CRC_INIT register, otherwise, reset Data Register to its default value. 103 | * @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit 104 | * @param CRCx CRC Instance 105 | * @retval None 106 | */ 107 | __STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) 108 | { 109 | SET_BIT(CRCx->CR, CRC_CR_RESET); 110 | } 111 | 112 | /** 113 | * @} 114 | */ 115 | 116 | /** @defgroup CRC_LL_EF_Data_Management Data_Management 117 | * @{ 118 | */ 119 | 120 | /** 121 | * @brief Write given 32-bit data to the CRC calculator 122 | * @rmtoll DR DR LL_CRC_FeedData32 123 | * @param CRCx CRC Instance 124 | * @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF 125 | * @retval None 126 | */ 127 | __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) 128 | { 129 | WRITE_REG(CRCx->DR, InData); 130 | } 131 | 132 | /** 133 | * @brief Return current CRC calculation result. 32 bits value is returned. 134 | * @rmtoll DR DR LL_CRC_ReadData32 135 | * @param CRCx CRC Instance 136 | * @retval Current CRC calculation result as stored in CRC_DR register (32 bits). 137 | */ 138 | __STATIC_INLINE uint32_t LL_CRC_ReadData32(const CRC_TypeDef *CRCx) 139 | { 140 | return (uint32_t)(READ_REG(CRCx->DR)); 141 | } 142 | 143 | /** 144 | * @brief Return data stored in the Independent Data(IDR) register. 145 | * @note This register can be used as a temporary storage location for one byte. 146 | * @rmtoll IDR IDR LL_CRC_Read_IDR 147 | * @param CRCx CRC Instance 148 | * @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). 149 | */ 150 | __STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) 151 | { 152 | return (uint32_t)(READ_REG(CRCx->IDR)); 153 | } 154 | 155 | /** 156 | * @brief Store data in the Independent Data(IDR) register. 157 | * @note This register can be used as a temporary storage location for one byte. 158 | * @rmtoll IDR IDR LL_CRC_Write_IDR 159 | * @param CRCx CRC Instance 160 | * @param InData value to be stored in CRC_IDR register (8-bit) between Min_Data=0 and Max_Data=0xFF 161 | * @retval None 162 | */ 163 | __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) 164 | { 165 | *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; 166 | } 167 | /** 168 | * @} 169 | */ 170 | 171 | #if defined(USE_FULL_LL_DRIVER) 172 | /** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions 173 | * @{ 174 | */ 175 | 176 | ErrorStatus LL_CRC_DeInit(const CRC_TypeDef *CRCx); 177 | 178 | /** 179 | * @} 180 | */ 181 | #endif /* USE_FULL_LL_DRIVER */ 182 | 183 | /** 184 | * @} 185 | */ 186 | 187 | /** 188 | * @} 189 | */ 190 | 191 | #endif /* defined(CRC) */ 192 | 193 | /** 194 | * @} 195 | */ 196 | 197 | #ifdef __cplusplus 198 | } 199 | #endif 200 | 201 | #endif /* STM32F4xx_LL_CRC_H */ 202 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/STM32F4xx_HAL_Driver/LICENSE.txt: -------------------------------------------------------------------------------- 1 | This software component is provided to you as part of a software package and 2 | applicable license terms are in the Package_license file. If you received this 3 | software component outside of a package or without applicable license terms, 4 | the terms of the BSD-3-Clause license shall apply. 5 | You may obtain a copy of the BSD-3-Clause at: 6 | https://opensource.org/licenses/BSD-3-Clause 7 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f4xx_hal_flash_ramfunc.c 4 | * @author MCD Application Team 5 | * @brief FLASH RAMFUNC module driver. 6 | * This file provides a FLASH firmware functions which should be 7 | * executed from internal SRAM 8 | * + Stop/Start the flash interface while System Run 9 | * + Enable/Disable the flash sleep while System Run 10 | @verbatim 11 | ============================================================================== 12 | ##### APIs executed from Internal RAM ##### 13 | ============================================================================== 14 | [..] 15 | *** ARM Compiler *** 16 | -------------------- 17 | [..] RAM functions are defined using the toolchain options. 18 | Functions that are be executed in RAM should reside in a separate 19 | source module. Using the 'Options for File' dialog you can simply change 20 | the 'Code / Const' area of a module to a memory space in physical RAM. 21 | Available memory areas are declared in the 'Target' tab of the 22 | Options for Target' dialog. 23 | 24 | *** ICCARM Compiler *** 25 | ----------------------- 26 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". 27 | 28 | *** GNU Compiler *** 29 | -------------------- 30 | [..] RAM functions are defined using a specific toolchain attribute 31 | "__attribute__((section(".RamFunc")))". 32 | 33 | @endverbatim 34 | ****************************************************************************** 35 | * @attention 36 | * 37 | * Copyright (c) 2017 STMicroelectronics. 38 | * All rights reserved. 39 | * 40 | * This software is licensed under terms that can be found in the LICENSE file in 41 | * the root directory of this software component. 42 | * If no LICENSE file comes with this software, it is provided AS-IS. 43 | ****************************************************************************** 44 | */ 45 | 46 | /* Includes ------------------------------------------------------------------*/ 47 | #include "stm32f4xx_hal.h" 48 | 49 | /** @addtogroup STM32F4xx_HAL_Driver 50 | * @{ 51 | */ 52 | 53 | /** @defgroup FLASH_RAMFUNC FLASH RAMFUNC 54 | * @brief FLASH functions executed from RAM 55 | * @{ 56 | */ 57 | #ifdef HAL_FLASH_MODULE_ENABLED 58 | #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ 59 | defined(STM32F412Rx) || defined(STM32F412Cx) 60 | 61 | /* Private typedef -----------------------------------------------------------*/ 62 | /* Private define ------------------------------------------------------------*/ 63 | /* Private macro -------------------------------------------------------------*/ 64 | /* Private variables ---------------------------------------------------------*/ 65 | /* Private function prototypes -----------------------------------------------*/ 66 | /* Exported functions --------------------------------------------------------*/ 67 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAMFUNC Exported Functions 68 | * @{ 69 | */ 70 | 71 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions executed from internal RAM 72 | * @brief Peripheral Extended features functions 73 | * 74 | @verbatim 75 | 76 | =============================================================================== 77 | ##### ramfunc functions ##### 78 | =============================================================================== 79 | [..] 80 | This subsection provides a set of functions that should be executed from RAM 81 | transfers. 82 | 83 | @endverbatim 84 | * @{ 85 | */ 86 | 87 | /** 88 | * @brief Stop the flash interface while System Run 89 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 90 | * @note This mode couldn't be set while executing with the flash itself. 91 | * It should be done with specific routine executed from RAM. 92 | * @retval HAL status 93 | */ 94 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StopFlashInterfaceClk(void) 95 | { 96 | /* Enable Power ctrl clock */ 97 | __HAL_RCC_PWR_CLK_ENABLE(); 98 | /* Stop the flash interface while System Run */ 99 | SET_BIT(PWR->CR, PWR_CR_FISSR); 100 | 101 | return HAL_OK; 102 | } 103 | 104 | /** 105 | * @brief Start the flash interface while System Run 106 | * @note This mode is only available for STM32F411xx/STM32F446xx devices. 107 | * @note This mode couldn't be set while executing with the flash itself. 108 | * It should be done with specific routine executed from RAM. 109 | * @retval HAL status 110 | */ 111 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_StartFlashInterfaceClk(void) 112 | { 113 | /* Enable Power ctrl clock */ 114 | __HAL_RCC_PWR_CLK_ENABLE(); 115 | /* Start the flash interface while System Run */ 116 | CLEAR_BIT(PWR->CR, PWR_CR_FISSR); 117 | 118 | return HAL_OK; 119 | } 120 | 121 | /** 122 | * @brief Enable the flash sleep while System Run 123 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 124 | * @note This mode could n't be set while executing with the flash itself. 125 | * It should be done with specific routine executed from RAM. 126 | * @retval HAL status 127 | */ 128 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableFlashSleepMode(void) 129 | { 130 | /* Enable Power ctrl clock */ 131 | __HAL_RCC_PWR_CLK_ENABLE(); 132 | /* Enable the flash sleep while System Run */ 133 | SET_BIT(PWR->CR, PWR_CR_FMSSR); 134 | 135 | return HAL_OK; 136 | } 137 | 138 | /** 139 | * @brief Disable the flash sleep while System Run 140 | * @note This mode is only available for STM32F41xxx/STM32F446xx devices. 141 | * @note This mode couldn't be set while executing with the flash itself. 142 | * It should be done with specific routine executed from RAM. 143 | * @retval HAL status 144 | */ 145 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableFlashSleepMode(void) 146 | { 147 | /* Enable Power ctrl clock */ 148 | __HAL_RCC_PWR_CLK_ENABLE(); 149 | /* Disable the flash sleep while System Run */ 150 | CLEAR_BIT(PWR->CR, PWR_CR_FMSSR); 151 | 152 | return HAL_OK; 153 | } 154 | 155 | /** 156 | * @} 157 | */ 158 | 159 | /** 160 | * @} 161 | */ 162 | 163 | #endif /* STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx */ 164 | #endif /* HAL_FLASH_MODULE_ENABLED */ 165 | /** 166 | * @} 167 | */ 168 | 169 | /** 170 | * @} 171 | */ 172 | 173 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/STM32F405RGTX_FLASH.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | ** @file : LinkerScript.ld 5 | ** 6 | ** @author : Auto-generated by STM32CubeIDE 7 | ** 8 | ** @brief : Linker script for STM32F405RGTx Device from STM32F4 series 9 | ** 1024KBytes FLASH 10 | ** 64KBytes CCMRAM 11 | ** 128KBytes RAM 12 | ** 13 | ** Set heap size, stack size and stack location according 14 | ** to application requirements. 15 | ** 16 | ** Set memory bank area and size if external memory is used 17 | ** 18 | ** Target : STMicroelectronics STM32 19 | ** 20 | ** Distribution: The file is distributed as is, without any warranty 21 | ** of any kind. 22 | ** 23 | ****************************************************************************** 24 | ** @attention 25 | ** 26 | ** Copyright (c) 2025 STMicroelectronics. 27 | ** All rights reserved. 28 | ** 29 | ** This software is licensed under terms that can be found in the LICENSE file 30 | ** in the root directory of this software component. 31 | ** If no LICENSE file comes with this software, it is provided AS-IS. 32 | ** 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Entry Point */ 37 | ENTRY(Reset_Handler) 38 | 39 | /* Highest address of the user mode stack */ 40 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ 41 | 42 | _Min_Heap_Size = 0x200; /* required amount of heap */ 43 | _Min_Stack_Size = 0x400; /* required amount of stack */ 44 | 45 | /* Memories definition */ 46 | MEMORY 47 | { 48 | CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K 49 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K 50 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K 51 | } 52 | 53 | /* Sections */ 54 | SECTIONS 55 | { 56 | /* The startup code into "FLASH" Rom type memory */ 57 | .isr_vector : 58 | { 59 | . = ALIGN(4); 60 | KEEP(*(.isr_vector)) /* Startup code */ 61 | . = ALIGN(4); 62 | } >FLASH 63 | 64 | /* The program code and other data into "FLASH" Rom type memory */ 65 | .text : 66 | { 67 | . = ALIGN(4); 68 | *(.text) /* .text sections (code) */ 69 | *(.text*) /* .text* sections (code) */ 70 | *(.glue_7) /* glue arm to thumb code */ 71 | *(.glue_7t) /* glue thumb to arm code */ 72 | *(.eh_frame) 73 | 74 | KEEP (*(.init)) 75 | KEEP (*(.fini)) 76 | 77 | . = ALIGN(4); 78 | _etext = .; /* define a global symbols at end of code */ 79 | } >FLASH 80 | 81 | /* Constant data into "FLASH" Rom type memory */ 82 | .rodata : 83 | { 84 | . = ALIGN(4); 85 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 86 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 87 | . = ALIGN(4); 88 | } >FLASH 89 | 90 | .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 91 | { 92 | . = ALIGN(4); 93 | *(.ARM.extab* .gnu.linkonce.armextab.*) 94 | . = ALIGN(4); 95 | } >FLASH 96 | 97 | .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 98 | { 99 | . = ALIGN(4); 100 | __exidx_start = .; 101 | *(.ARM.exidx*) 102 | __exidx_end = .; 103 | . = ALIGN(4); 104 | } >FLASH 105 | 106 | .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 107 | { 108 | . = ALIGN(4); 109 | PROVIDE_HIDDEN (__preinit_array_start = .); 110 | KEEP (*(.preinit_array*)) 111 | PROVIDE_HIDDEN (__preinit_array_end = .); 112 | . = ALIGN(4); 113 | } >FLASH 114 | 115 | .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 116 | { 117 | . = ALIGN(4); 118 | PROVIDE_HIDDEN (__init_array_start = .); 119 | KEEP (*(SORT(.init_array.*))) 120 | KEEP (*(.init_array*)) 121 | PROVIDE_HIDDEN (__init_array_end = .); 122 | . = ALIGN(4); 123 | } >FLASH 124 | 125 | .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 126 | { 127 | . = ALIGN(4); 128 | PROVIDE_HIDDEN (__fini_array_start = .); 129 | KEEP (*(SORT(.fini_array.*))) 130 | KEEP (*(.fini_array*)) 131 | PROVIDE_HIDDEN (__fini_array_end = .); 132 | . = ALIGN(4); 133 | } >FLASH 134 | 135 | /* Used by the startup to initialize data */ 136 | _sidata = LOADADDR(.data); 137 | 138 | /* Initialized data sections into "RAM" Ram type memory */ 139 | .data : 140 | { 141 | . = ALIGN(4); 142 | _sdata = .; /* create a global symbol at data start */ 143 | *(.data) /* .data sections */ 144 | *(.data*) /* .data* sections */ 145 | *(.RamFunc) /* .RamFunc sections */ 146 | *(.RamFunc*) /* .RamFunc* sections */ 147 | 148 | . = ALIGN(4); 149 | _edata = .; /* define a global symbol at data end */ 150 | 151 | } >RAM AT> FLASH 152 | 153 | _siccmram = LOADADDR(.ccmram); 154 | 155 | /* CCM-RAM section 156 | * 157 | * IMPORTANT NOTE! 158 | * If initialized variables will be placed in this section, 159 | * the startup code needs to be modified to copy the init-values. 160 | */ 161 | .ccmram : 162 | { 163 | . = ALIGN(4); 164 | _sccmram = .; /* create a global symbol at ccmram start */ 165 | *(.ccmram) 166 | *(.ccmram*) 167 | 168 | . = ALIGN(4); 169 | _eccmram = .; /* create a global symbol at ccmram end */ 170 | } >CCMRAM AT> FLASH 171 | 172 | /* Uninitialized data section into "RAM" Ram type memory */ 173 | . = ALIGN(4); 174 | .bss : 175 | { 176 | /* This is used by the startup in order to initialize the .bss section */ 177 | _sbss = .; /* define a global symbol at bss start */ 178 | __bss_start__ = _sbss; 179 | *(.bss) 180 | *(.bss*) 181 | *(COMMON) 182 | 183 | . = ALIGN(4); 184 | _ebss = .; /* define a global symbol at bss end */ 185 | __bss_end__ = _ebss; 186 | } >RAM 187 | 188 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ 189 | ._user_heap_stack : 190 | { 191 | . = ALIGN(8); 192 | PROVIDE ( end = . ); 193 | PROVIDE ( _end = . ); 194 | . = . + _Min_Heap_Size; 195 | . = . + _Min_Stack_Size; 196 | . = ALIGN(8); 197 | } >RAM 198 | 199 | /* Remove information from the compiler libraries */ 200 | /DISCARD/ : 201 | { 202 | libc.a ( * ) 203 | libm.a ( * ) 204 | libgcc.a ( * ) 205 | } 206 | 207 | .ARM.attributes 0 : { *(.ARM.attributes) } 208 | } 209 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/STM32F405RGTX_RAM.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ****************************************************************************** 3 | ** 4 | ** @file : LinkerScript.ld (debug in RAM dedicated) 5 | ** 6 | ** @author : Auto-generated by STM32CubeIDE 7 | ** 8 | ** @brief : Linker script for STM32F405RGTx Device from STM32F4 series 9 | ** 1024KBytes FLASH 10 | ** 64KBytes CCMRAM 11 | ** 128KBytes RAM 12 | ** 13 | ** Set heap size, stack size and stack location according 14 | ** to application requirements. 15 | ** 16 | ** Set memory bank area and size if external memory is used 17 | ** 18 | ** Target : STMicroelectronics STM32 19 | ** 20 | ** Distribution: The file is distributed as is, without any warranty 21 | ** of any kind. 22 | ** 23 | ****************************************************************************** 24 | ** @attention 25 | ** 26 | ** Copyright (c) 2025 STMicroelectronics. 27 | ** All rights reserved. 28 | ** 29 | ** This software is licensed under terms that can be found in the LICENSE file 30 | ** in the root directory of this software component. 31 | ** If no LICENSE file comes with this software, it is provided AS-IS. 32 | ** 33 | ****************************************************************************** 34 | */ 35 | 36 | /* Entry Point */ 37 | ENTRY(Reset_Handler) 38 | 39 | /* Highest address of the user mode stack */ 40 | _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ 41 | 42 | _Min_Heap_Size = 0x200; /* required amount of heap */ 43 | _Min_Stack_Size = 0x400; /* required amount of stack */ 44 | 45 | /* Memories definition */ 46 | MEMORY 47 | { 48 | CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K 49 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K 50 | FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K 51 | } 52 | 53 | /* Sections */ 54 | SECTIONS 55 | { 56 | /* The startup code into "RAM" Ram type memory */ 57 | .isr_vector : 58 | { 59 | . = ALIGN(4); 60 | KEEP(*(.isr_vector)) /* Startup code */ 61 | . = ALIGN(4); 62 | } >RAM 63 | 64 | /* The program code and other data into "RAM" Ram type memory */ 65 | .text : 66 | { 67 | . = ALIGN(4); 68 | *(.text) /* .text sections (code) */ 69 | *(.text*) /* .text* sections (code) */ 70 | *(.glue_7) /* glue arm to thumb code */ 71 | *(.glue_7t) /* glue thumb to arm code */ 72 | *(.eh_frame) 73 | *(.RamFunc) /* .RamFunc sections */ 74 | *(.RamFunc*) /* .RamFunc* sections */ 75 | 76 | KEEP (*(.init)) 77 | KEEP (*(.fini)) 78 | 79 | . = ALIGN(4); 80 | _etext = .; /* define a global symbols at end of code */ 81 | } >RAM 82 | 83 | /* Constant data into "RAM" Ram type memory */ 84 | .rodata : 85 | { 86 | . = ALIGN(4); 87 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 88 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 89 | . = ALIGN(4); 90 | } >RAM 91 | 92 | .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 93 | { 94 | . = ALIGN(4); 95 | *(.ARM.extab* .gnu.linkonce.armextab.*) 96 | . = ALIGN(4); 97 | } >RAM 98 | 99 | .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 100 | { 101 | . = ALIGN(4); 102 | __exidx_start = .; 103 | *(.ARM.exidx*) 104 | __exidx_end = .; 105 | . = ALIGN(4); 106 | } >RAM 107 | 108 | .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 109 | { 110 | . = ALIGN(4); 111 | PROVIDE_HIDDEN (__preinit_array_start = .); 112 | KEEP (*(.preinit_array*)) 113 | PROVIDE_HIDDEN (__preinit_array_end = .); 114 | . = ALIGN(4); 115 | } >RAM 116 | 117 | .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 118 | { 119 | . = ALIGN(4); 120 | PROVIDE_HIDDEN (__init_array_start = .); 121 | KEEP (*(SORT(.init_array.*))) 122 | KEEP (*(.init_array*)) 123 | PROVIDE_HIDDEN (__init_array_end = .); 124 | . = ALIGN(4); 125 | } >RAM 126 | 127 | .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ 128 | { 129 | . = ALIGN(4); 130 | PROVIDE_HIDDEN (__fini_array_start = .); 131 | KEEP (*(SORT(.fini_array.*))) 132 | KEEP (*(.fini_array*)) 133 | PROVIDE_HIDDEN (__fini_array_end = .); 134 | . = ALIGN(4); 135 | } >RAM 136 | 137 | /* Used by the startup to initialize data */ 138 | _sidata = LOADADDR(.data); 139 | 140 | /* Initialized data sections into "RAM" Ram type memory */ 141 | .data : 142 | { 143 | . = ALIGN(4); 144 | _sdata = .; /* create a global symbol at data start */ 145 | *(.data) /* .data sections */ 146 | *(.data*) /* .data* sections */ 147 | 148 | . = ALIGN(4); 149 | _edata = .; /* define a global symbol at data end */ 150 | 151 | } >RAM 152 | 153 | _siccmram = LOADADDR(.ccmram); 154 | 155 | /* CCM-RAM section 156 | * 157 | * IMPORTANT NOTE! 158 | * If initialized variables will be placed in this section, 159 | * the startup code needs to be modified to copy the init-values. 160 | */ 161 | .ccmram : 162 | { 163 | . = ALIGN(4); 164 | _sccmram = .; /* create a global symbol at ccmram start */ 165 | *(.ccmram) 166 | *(.ccmram*) 167 | 168 | . = ALIGN(4); 169 | _eccmram = .; /* create a global symbol at ccmram end */ 170 | } >CCMRAM AT> RAM 171 | 172 | /* Uninitialized data section into "RAM" Ram type memory */ 173 | . = ALIGN(4); 174 | .bss : 175 | { 176 | /* This is used by the startup in order to initialize the .bss section */ 177 | _sbss = .; /* define a global symbol at bss start */ 178 | __bss_start__ = _sbss; 179 | *(.bss) 180 | *(.bss*) 181 | *(COMMON) 182 | 183 | . = ALIGN(4); 184 | _ebss = .; /* define a global symbol at bss end */ 185 | __bss_end__ = _ebss; 186 | } >RAM 187 | 188 | /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ 189 | ._user_heap_stack : 190 | { 191 | . = ALIGN(8); 192 | PROVIDE ( end = . ); 193 | PROVIDE ( _end = . ); 194 | . = . + _Min_Heap_Size; 195 | . = . + _Min_Stack_Size; 196 | . = ALIGN(8); 197 | } >RAM 198 | 199 | /* Remove information from the compiler libraries */ 200 | /DISCARD/ : 201 | { 202 | libc.a ( * ) 203 | libm.a ( * ) 204 | libgcc.a ( * ) 205 | } 206 | 207 | .ARM.attributes 0 : { *(.ARM.attributes) } 208 | } 209 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/stm32world_stm32f405.ioc: -------------------------------------------------------------------------------- 1 | #MicroXplorer Configuration settings - do not modify 2 | CAD.formats= 3 | CAD.pinconfig= 4 | CAD.provider= 5 | File.Version=6 6 | GPIO.groupedBy=Group By Peripherals 7 | KeepUserPlacement=false 8 | Mcu.CPN=STM32F405RGT6 9 | Mcu.Family=STM32F4 10 | Mcu.IP0=CRC 11 | Mcu.IP1=NVIC 12 | Mcu.IP2=RCC 13 | Mcu.IP3=SPI1 14 | Mcu.IP4=SYS 15 | Mcu.IP5=USART1 16 | Mcu.IPNb=6 17 | Mcu.Name=STM32F405RGTx 18 | Mcu.Package=LQFP64 19 | Mcu.Pin0=PC13-ANTI_TAMP 20 | Mcu.Pin1=PH0-OSC_IN 21 | Mcu.Pin10=PA14 22 | Mcu.Pin11=PB3 23 | Mcu.Pin12=VP_CRC_VS_CRC 24 | Mcu.Pin13=VP_SYS_VS_Systick 25 | Mcu.Pin2=PH1-OSC_OUT 26 | Mcu.Pin3=PA4 27 | Mcu.Pin4=PA5 28 | Mcu.Pin5=PA6 29 | Mcu.Pin6=PA7 30 | Mcu.Pin7=PA9 31 | Mcu.Pin8=PA10 32 | Mcu.Pin9=PA13 33 | Mcu.PinsNb=14 34 | Mcu.ThirdPartyNb=0 35 | Mcu.UserConstants= 36 | Mcu.UserName=STM32F405RGTx 37 | MxCube.Version=6.14.1 38 | MxDb.Version=DB.6.0.141 39 | NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 40 | NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 41 | NVIC.ForceEnableDMAVector=true 42 | NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 43 | NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 44 | NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 45 | NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 46 | NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 47 | NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 48 | NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false 49 | NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false 50 | PA10.Mode=Asynchronous 51 | PA10.Signal=USART1_RX 52 | PA13.Mode=Trace_Asynchronous_SW 53 | PA13.Signal=SYS_JTMS-SWDIO 54 | PA14.Mode=Trace_Asynchronous_SW 55 | PA14.Signal=SYS_JTCK-SWCLK 56 | PA4.GPIOParameters=GPIO_Label 57 | PA4.GPIO_Label=SPI1_CS 58 | PA4.Locked=true 59 | PA4.Signal=GPIO_Output 60 | PA5.Mode=Full_Duplex_Master 61 | PA5.Signal=SPI1_SCK 62 | PA6.Mode=Full_Duplex_Master 63 | PA6.Signal=SPI1_MISO 64 | PA7.Mode=Full_Duplex_Master 65 | PA7.Signal=SPI1_MOSI 66 | PA9.Mode=Asynchronous 67 | PA9.Signal=USART1_TX 68 | PB3.Mode=Trace_Asynchronous_SW 69 | PB3.Signal=SYS_JTDO-SWO 70 | PC13-ANTI_TAMP.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP 71 | PC13-ANTI_TAMP.GPIO_Label=LED 72 | PC13-ANTI_TAMP.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD 73 | PC13-ANTI_TAMP.GPIO_PuPd=GPIO_NOPULL 74 | PC13-ANTI_TAMP.Locked=true 75 | PC13-ANTI_TAMP.PinState=GPIO_PIN_SET 76 | PC13-ANTI_TAMP.Signal=GPIO_Output 77 | PH0-OSC_IN.Mode=HSE-External-Oscillator 78 | PH0-OSC_IN.Signal=RCC_OSC_IN 79 | PH1-OSC_OUT.Mode=HSE-External-Oscillator 80 | PH1-OSC_OUT.Signal=RCC_OSC_OUT 81 | PinOutPanel.RotationAngle=0 82 | ProjectManager.AskForMigrate=true 83 | ProjectManager.BackupPrevious=false 84 | ProjectManager.CompilerLinker=GCC 85 | ProjectManager.CompilerOptimize=6 86 | ProjectManager.ComputerToolchain=false 87 | ProjectManager.CoupleFile=false 88 | ProjectManager.CustomerFirmwarePackage= 89 | ProjectManager.DefaultFWLocation=true 90 | ProjectManager.DeletePrevious=true 91 | ProjectManager.DeviceId=STM32F405RGTx 92 | ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.28.2 93 | ProjectManager.FreePins=false 94 | ProjectManager.HalAssertFull=false 95 | ProjectManager.HeapSize=0x200 96 | ProjectManager.KeepUserCode=true 97 | ProjectManager.LastFirmware=true 98 | ProjectManager.LibraryCopy=1 99 | ProjectManager.MainLocation=Core/Src 100 | ProjectManager.NoMain=false 101 | ProjectManager.PreviousToolchain= 102 | ProjectManager.ProjectBuild=false 103 | ProjectManager.ProjectFileName=stm32world_stm32f405.ioc 104 | ProjectManager.ProjectName=stm32world_stm32f405 105 | ProjectManager.ProjectStructure= 106 | ProjectManager.RegisterCallBack= 107 | ProjectManager.StackSize=0x400 108 | ProjectManager.TargetToolchain=STM32CubeIDE 109 | ProjectManager.ToolChainLocation= 110 | ProjectManager.UAScriptAfterPath= 111 | ProjectManager.UAScriptBeforePath= 112 | ProjectManager.UnderRoot=true 113 | ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_SPI1_Init-SPI1-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_CRC_Init-CRC-false-HAL-true 114 | RCC.48MHZClocksFreq_Value=84000000 115 | RCC.AHBFreq_Value=168000000 116 | RCC.APB1CLKDivider=RCC_HCLK_DIV4 117 | RCC.APB1Freq_Value=42000000 118 | RCC.APB1TimFreq_Value=84000000 119 | RCC.APB2CLKDivider=RCC_HCLK_DIV2 120 | RCC.APB2Freq_Value=84000000 121 | RCC.APB2TimFreq_Value=168000000 122 | RCC.CortexFreq_Value=168000000 123 | RCC.EthernetFreq_Value=168000000 124 | RCC.FCLKCortexFreq_Value=168000000 125 | RCC.FamilyName=M 126 | RCC.HCLKFreq_Value=168000000 127 | RCC.HSE_VALUE=16000000 128 | RCC.HSI_VALUE=16000000 129 | RCC.I2SClocksFreq_Value=192000000 130 | RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLSourceVirtual,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S 131 | RCC.LSE_VALUE=32768 132 | RCC.LSI_VALUE=32000 133 | RCC.MCO2PinFreq_Value=168000000 134 | RCC.PLLCLKFreq_Value=168000000 135 | RCC.PLLM=8 136 | RCC.PLLN=168 137 | RCC.PLLQCLKFreq_Value=84000000 138 | RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE 139 | RCC.RTCFreq_Value=32000 140 | RCC.RTCHSEDivFreq_Value=8000000 141 | RCC.SYSCLKFreq_VALUE=168000000 142 | RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK 143 | RCC.VCOI2SOutputFreq_Value=384000000 144 | RCC.VCOInputFreq_Value=2000000 145 | RCC.VCOOutputFreq_Value=336000000 146 | RCC.VcooutputI2S=192000000 147 | SPI1.CalculateBaudRate=42.0 MBits/s 148 | SPI1.Direction=SPI_DIRECTION_2LINES 149 | SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate 150 | SPI1.Mode=SPI_MODE_MASTER 151 | SPI1.VirtualType=VM_MASTER 152 | USART1.BaudRate=2000000 153 | USART1.IPParameters=VirtualMode,BaudRate 154 | USART1.VirtualMode=VM_ASYNC 155 | VP_CRC_VS_CRC.Mode=CRC_Activate 156 | VP_CRC_VS_CRC.Signal=CRC_VS_CRC 157 | VP_SYS_VS_Systick.Mode=SysTick 158 | VP_SYS_VS_Systick.Signal=SYS_VS_Systick 159 | board=custom 160 | isbadioc=false 161 | -------------------------------------------------------------------------------- /examples/stm32world_stm32f405/w25qxx: -------------------------------------------------------------------------------- 1 | ../../src -------------------------------------------------------------------------------- /src/w25qxx.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file : w25qxx.h 4 | * @brief : Minimal W25Qxx Library Header 5 | ****************************************************************************** 6 | * @attention 7 | * 8 | * Copyright (c) 2022 - 2025 Lars Boegild Thomsen 9 | * All rights reserved. 10 | * 11 | * This software is licensed under terms that can be found in the LICENSE file 12 | * in the root directory of this software component. 13 | * If no LICENSE file comes with this software, it is provided AS-IS. 14 | * 15 | ****************************************************************************** 16 | */ 17 | 18 | #ifndef W25QXX_H_ 19 | #define W25QXX_H_ 20 | 21 | #ifdef DEBUGxxx 22 | #define W25_DBG(...) printf(__VA_ARGS__);\ 23 | printf("\n") 24 | #else 25 | #define W25_DBG(...) 26 | #endif 27 | 28 | #define W25QXX_VERSION "W25QXX ver. 0.01.00" 29 | 30 | #define W25QXX_MANUFACTURER_GIGADEVICE 0xC8 31 | #define W25QXX_MANUFACTURER_WINBOND 0xEF 32 | 33 | #define W25QXX_DUMMY_BYTE 0xA5 34 | #define W25QXX_GET_ID 0x9F 35 | #define W25QXX_READ_DATA 0x03 36 | #define W25QXX_WRITE_ENABLE 0x06 37 | #define W25QXX_PAGE_PROGRAM 0x02 38 | #define W25QXX_SECTOR_ERASE 0x20 39 | #define W25QXX_CHIP_ERASE 0xc7 40 | #define W25QXX_READ_REGISTER_1 0x05 41 | 42 | typedef struct { 43 | #ifdef W25QXX_QSPI 44 | QSPI_HandleTypeDef *qspiHandle; 45 | #else 46 | SPI_HandleTypeDef *spiHandle; 47 | GPIO_TypeDef *cs_port; 48 | uint16_t cs_pin; 49 | #endif 50 | uint8_t manufacturer_id; 51 | uint16_t device_id; 52 | uint32_t block_size; 53 | uint32_t block_count; 54 | uint32_t sector_size; 55 | uint32_t sectors_in_block; 56 | uint32_t page_size; 57 | uint32_t pages_in_sector; 58 | } W25QXX_HandleTypeDef; 59 | 60 | typedef enum { 61 | W25QXX_Ok, // 0 62 | W25QXX_Err, // 1 63 | W25QXX_Timeout // 2 64 | } W25QXX_result_t; 65 | 66 | #ifdef W25QXX_QSPI 67 | W25QXX_result_t w25qxx_init(W25QXX_HandleTypeDef *w25qxx, QSPI_HandleTypeDef *qhspi); 68 | #else 69 | W25QXX_result_t w25qxx_init(W25QXX_HandleTypeDef *w25qxx, SPI_HandleTypeDef *hspi, GPIO_TypeDef *cs_port, uint16_t cs_pin); 70 | #endif 71 | W25QXX_result_t w25qxx_read(W25QXX_HandleTypeDef *w25qxx, uint32_t address, uint8_t *buf, uint32_t len); 72 | W25QXX_result_t w25qxx_write(W25QXX_HandleTypeDef *w25qxx, uint32_t address, uint8_t *buf, uint32_t len); 73 | W25QXX_result_t w25qxx_erase(W25QXX_HandleTypeDef *w25qxx, uint32_t address, uint32_t len); 74 | W25QXX_result_t w25qxx_chip_erase(W25QXX_HandleTypeDef *w25qxx); 75 | 76 | #endif /* W25QXX_H_ */ 77 | 78 | /* 79 | * vim: ts=4 et nowrap 80 | */ 81 | --------------------------------------------------------------------------------