├── assets ├── prog.txt └── zip.json ├── bin ├── scripts │ ├── defaultVM.txt │ ├── defaultCPU.txt │ └── defaultHW.txt ├── lib │ ├── Hack.jar │ ├── Zip.jar │ ├── HackGUI.jar │ ├── Compilers.jar │ ├── AssemblerGUI.jar │ ├── Simulators.jar │ ├── SimulatorsGUI.jar │ └── TranslatorsGUI.jar ├── images │ ├── chip.gif │ ├── find.gif │ ├── hex.gif │ ├── ok.gif │ ├── ok2.gif │ ├── open.gif │ ├── save.gif │ ├── arrow2.gif │ ├── cancel.gif │ ├── clock2.gif │ ├── equal.gif │ ├── open2.gif │ ├── scroll.gif │ ├── keyboard.gif │ ├── opendoc.gif │ ├── redflag.gif │ ├── smallnew.gif │ ├── smallok.gif │ ├── smallplus.gif │ ├── vcrrewind.gif │ ├── vcrstop.gif │ ├── calculator2.gif │ ├── smallcancel.gif │ ├── smallequal.gif │ ├── smallminus.gif │ ├── vcrforward.gif │ └── vcrfastforward.gif ├── classes │ ├── TextComparer.class │ ├── CPUEmulatorMain.class │ ├── VMEmulatorMain.class │ ├── HackAssemblerMain.class │ └── HardwareSimulatorMain.class └── help │ ├── compiler.txt │ ├── asmAbout.html │ ├── cpuAbout.html │ ├── hwAbout.html │ ├── vmAbout.html │ ├── asmUsage.html │ ├── cpuUsage.html │ ├── hwUsage.html │ └── vmUsage.html ├── images ├── icon.png └── button.png ├── builtInChips ├── ALU.hdl ├── Or.class ├── PC.class ├── ALU.class ├── Add16.class ├── And.class ├── Bit.class ├── DFF.class ├── DMux.class ├── Inc16.class ├── Mux.class ├── Nand.class ├── Not.class ├── Not16.class ├── RAM.class ├── RAM4K.class ├── RAM64.class ├── RAM8.class ├── Xor.class ├── Or8Way.class ├── RAM16K.class ├── RAM512.class ├── ROM32K.class ├── Screen.class ├── ARegister.class ├── DMux4Way.class ├── DMux8Way.class ├── DRegister.class ├── FullAdder.class ├── HalfAdder.class ├── Keyboard.class ├── Mux4Way16.class ├── Mux8Way16.class ├── Register.class ├── RegisterWithGUI.class ├── Not.hdl ├── Nand.hdl ├── Xor.hdl ├── Or.hdl ├── And.hdl ├── Mux.hdl ├── Not16.hdl ├── Or8Way.hdl ├── Or16.hdl ├── And16.hdl ├── Mux16.hdl ├── Add16.hdl ├── DMux.hdl ├── DFF.hdl ├── Inc16.hdl ├── Bit.hdl ├── Register.hdl ├── HalfAdder.hdl ├── Mux4Way16.hdl ├── FullAdder.hdl ├── DMux4Way.hdl ├── Mux8Way16.hdl ├── DMux8Way.hdl ├── PC.hdl ├── ARegister.hdl ├── DRegister.hdl ├── Keyboard.hdl ├── RAM8.hdl ├── RAM64.hdl ├── RAM16K.hdl ├── RAM4K.hdl ├── RAM512.hdl ├── ROM32K.hdl └── Screen.hdl ├── .gitignore ├── .vscodeignore ├── tslint.json ├── snippets ├── convert.py └── snippets.json ├── tsconfig.json ├── .vscode ├── tasks.json └── launch.json ├── language-configuration.json ├── LICENSE ├── src ├── extension.ts └── commands.ts ├── CHANGELOG.md ├── syntaxes └── hdl.tmLanguage.json ├── README.md └── package.json /assets/prog.txt: -------------------------------------------------------------------------------- 1 | -------------------------------------------------------------------------------- /bin/scripts/defaultVM.txt: -------------------------------------------------------------------------------- 1 | repeat { 2 | vmstep; 3 | } -------------------------------------------------------------------------------- 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"tslint:recommended" 5 | ], 6 | "jsRules": {}, 7 | "rules": {}, 8 | "rulesDirectory": [] 9 | } -------------------------------------------------------------------------------- /snippets/convert.py: -------------------------------------------------------------------------------- 1 | "Sort json key" 2 | import json 3 | 4 | with open("snippets.json", 'r') as input_file: 5 | JSON_DATA = json.load(input_file) 6 | with open("snippets.json", "w") as output_file: 7 | output_file.write(json.dumps(JSON_DATA, indent=4, sort_keys=True)) 8 | -------------------------------------------------------------------------------- /bin/help/compiler.txt: -------------------------------------------------------------------------------- 1 | Jack Compiler, Version 2.5 2 | 3 | This program is part of www.nand2tetris.org 4 | and the book "The Elements of Computing Systems" 5 | by Nisan and Schocken, MIT Press. 6 | 7 | Software Architects: Yaron Ukrainitz and Yannai A. Gonczarowski 8 | 9 | Usage instruction and tips can be found in the relevant book chapters. 10 | -------------------------------------------------------------------------------- /builtInChips/Not.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Not.hdl 5 | 6 | /** 7 | * Not gate: out = not in 8 | */ 9 | 10 | CHIP Not { 11 | 12 | IN in; 13 | OUT out; 14 | 15 | BUILTIN Not; 16 | } -------------------------------------------------------------------------------- /tsconfig.json: -------------------------------------------------------------------------------- 1 | { 2 | "compilerOptions": { 3 | "module": "commonjs", 4 | "target": "es6", 5 | "outDir": "out", 6 | "lib": [ 7 | "es6" 8 | ], 9 | "sourceMap": true, 10 | "rootDir": "src" 11 | }, 12 | "exclude": [ 13 | "node_modules", 14 | ".vscode-test" 15 | ] 16 | } -------------------------------------------------------------------------------- /builtInChips/Nand.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Nand.hdl 5 | 6 | /** 7 | * Nand gate: out = a Nand b. 8 | */ 9 | 10 | CHIP Nand { 11 | 12 | IN a, b; 13 | OUT out; 14 | 15 | BUILTIN Nand; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/Xor.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Xor.hdl 5 | 6 | /** 7 | * Exclusive-or gate: out = !(a == b). 8 | */ 9 | 10 | CHIP Xor { 11 | 12 | IN a, b; 13 | OUT out; 14 | 15 | BUILTIN Xor; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/Or.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Or.hdl 5 | 6 | /** 7 | * Or gate: out = 1 if {a == 1 or b == 1}, 0 otherwise 8 | */ 9 | 10 | CHIP Or { 11 | 12 | IN a, b; 13 | OUT out; 14 | 15 | BUILTIN Or; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/And.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/And.hdl 5 | 6 | /** 7 | * And gate: out = 1 if {a == 1 and b == 1}, 0 otherwise 8 | */ 9 | 10 | CHIP And { 11 | 12 | IN a, b; 13 | OUT out; 14 | 15 | BUILTIN And; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/Mux.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Mux.hdl 5 | 6 | /** 7 | * Multiplexor. If sel == 1 then out = b else out = a. 8 | */ 9 | 10 | CHIP Mux { 11 | 12 | IN a, b, sel; 13 | OUT out; 14 | 15 | BUILTIN Mux; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/Not16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Not16.hdl 5 | 6 | /** 7 | * 16-bit Not gate: for i = 0..15: out[i] = not in[i] 8 | */ 9 | 10 | CHIP Not16 { 11 | 12 | IN in[16]; 13 | OUT out[16]; 14 | 15 | BUILTIN Not16; 16 | } -------------------------------------------------------------------------------- /builtInChips/Or8Way.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Or8Way.hdl 5 | 6 | /** 7 | * 8-way Or gate: out = in[0] or in[1] or ... or in[7]. 8 | */ 9 | 10 | CHIP Or8Way { 11 | 12 | IN in[8]; 13 | OUT out; 14 | 15 | BUILTIN Or8Way; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/Or16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Or16.hdl 5 | 6 | /** 7 | * 16-bit bitwise Or gate: for i = 0..15 out[i] = a[i] or b[i]. 8 | */ 9 | 10 | CHIP Or16 { 11 | 12 | IN a[16], b[16]; 13 | OUT out[16]; 14 | 15 | BUILTIN Or; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/And16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/And16.hdl 5 | 6 | /** 7 | * 16-bit-wise And gate: for i = 0..15: out[i] = a[i] and b[i] 8 | */ 9 | 10 | CHIP And16 { 11 | 12 | IN a[16], b[16]; 13 | OUT out[16]; 14 | 15 | BUILTIN And; 16 | } 17 | 18 | -------------------------------------------------------------------------------- /builtInChips/Mux16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Mux16.hdl 5 | 6 | /** 7 | * 16 bit multiplexor. If sel == 1 then out = b else out = a. 8 | */ 9 | 10 | CHIP Mux16 { 11 | 12 | IN a[16], b[16], sel; 13 | OUT out[16]; 14 | 15 | BUILTIN Mux; 16 | } 17 | -------------------------------------------------------------------------------- /builtInChips/Add16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Add16.hdl 5 | 6 | /* 7 | * Adds two 16-bit values. 8 | * The most significant carry bit is ignored. 9 | */ 10 | 11 | CHIP Add16 { 12 | 13 | IN a[16], b[16]; 14 | OUT out[16]; 15 | 16 | BUILTIN Add16; 17 | } 18 | 19 | -------------------------------------------------------------------------------- /builtInChips/DMux.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/DMux.hdl 5 | 6 | /** 7 | * Dmultiplexor. 8 | * {a,b} = {in,0} if sel == 0 9 | * {0,in} if sel == 1 10 | */ 11 | 12 | 13 | CHIP DMux { 14 | 15 | IN in, sel; 16 | OUT a, b; 17 | 18 | BUILTIN DMux; 19 | } 20 | 21 | -------------------------------------------------------------------------------- /builtInChips/DFF.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/DFF.hdl 5 | 6 | /** 7 | * Data Flip-flop: out(t) = in(t-1) 8 | * where t is the current time unit, or clock cycle. 9 | */ 10 | 11 | CHIP DFF { 12 | 13 | IN in; 14 | OUT out; 15 | 16 | BUILTIN DFF; 17 | CLOCKED in; 18 | } 19 | -------------------------------------------------------------------------------- /builtInChips/Inc16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Inc16.hdl 5 | 6 | /** 7 | * 16-bit incrementer. out = in + 1 (16-bit addition). 8 | * Overflow is neither detected nor handled. 9 | */ 10 | 11 | CHIP Inc16 { 12 | 13 | IN in[16]; 14 | OUT out[16]; 15 | 16 | BUILTIN Inc16; 17 | } 18 | 19 | -------------------------------------------------------------------------------- /builtInChips/Bit.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Bit.hdl 5 | 6 | /** 7 | * 1-bit register. 8 | * If load[t] == 1 then out[t+1] = in[t] 9 | * else out[t+1] = out[t] (no change) 10 | */ 11 | 12 | CHIP Bit { 13 | 14 | IN in, load; 15 | OUT out; 16 | 17 | BUILTIN Bit; 18 | CLOCKED in, load; 19 | } 20 | -------------------------------------------------------------------------------- /builtInChips/Register.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Register.hdl 5 | 6 | /** 7 | * 16-Bit register. 8 | * If load[t-1]=1 then out[t] = in[t-1] 9 | * else out does not change (out[t] = out[t-1]) 10 | */ 11 | 12 | CHIP Register { 13 | 14 | IN in[16], load; 15 | OUT out[16]; 16 | 17 | BUILTIN Register; 18 | CLOCKED in, load; 19 | } 20 | -------------------------------------------------------------------------------- /builtInChips/HalfAdder.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/HalfAdder.hdl 5 | 6 | /** 7 | * Half adder. Computes sum, the least significnat bit of a + b, 8 | * and carry, the most significnat bit of a + b. 9 | */ 10 | 11 | CHIP HalfAdder { 12 | 13 | IN a, b; 14 | OUT sum, // LSB of a + b 15 | carry; // MSB of a + b 16 | 17 | BUILTIN HalfAdder; 18 | } 19 | -------------------------------------------------------------------------------- /builtInChips/Mux4Way16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Mux4Way16.hdl 5 | 6 | /** 7 | * 4-way 16-bit multiplexor. 8 | * out = a if sel == 00 9 | * b if sel == 01 10 | * c if sel == 10 11 | * d if sel == 11 12 | */ 13 | 14 | 15 | CHIP Mux4Way16 { 16 | 17 | IN a[16], b[16], c[16], d[16], sel[2]; 18 | OUT out[16]; 19 | 20 | BUILTIN Mux4Way16; 21 | } 22 | -------------------------------------------------------------------------------- /builtInChips/FullAdder.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/FullAdder.hdl 5 | 6 | /** 7 | * Full adder. Computes sum, the least significant bit of 8 | * a + b + c, and carry, the most significant bit of a + b + c. 9 | */ 10 | 11 | CHIP FullAdder { 12 | 13 | IN a, b, c; 14 | OUT sum, // LSB of a + b + c 15 | carry; // MSB of a + b + c 16 | 17 | BUILTIN FullAdder; 18 | } 19 | 20 | -------------------------------------------------------------------------------- /.vscode/tasks.json: -------------------------------------------------------------------------------- 1 | // See https://go.microsoft.com/fwlink/?LinkId=733558 2 | // for the documentation about the tasks.json format 3 | { 4 | "version": "2.0.0", 5 | "tasks": [ 6 | { 7 | "type": "npm", 8 | "script": "watch", 9 | "problemMatcher": "$tsc-watch", 10 | "isBackground": true, 11 | "presentation": { 12 | "reveal": "never" 13 | }, 14 | "group": { 15 | "kind": "build", 16 | "isDefault": true 17 | } 18 | } 19 | ] 20 | } -------------------------------------------------------------------------------- /builtInChips/DMux4Way.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/DMux4Way.hdl 5 | 6 | /** 7 | * 4-way demultiplexor. 8 | * {a,b,c,d} = {in,0,0,0} if sel == 00 9 | * {0,in,0,0} if sel == 01 10 | * {0,0,in,0} if sel == 10 11 | * {0,0,0,in} if sel == 11 12 | */ 13 | 14 | 15 | CHIP DMux4Way { 16 | 17 | IN in, sel[2]; 18 | OUT a, b, c, d; 19 | 20 | BUILTIN DMux4Way; 21 | } 22 | 23 | -------------------------------------------------------------------------------- /builtInChips/Mux8Way16.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Mux8Way16.hdl 5 | 6 | /** 7 | * 8-way 16-bit multiplexor. 8 | * out = a if sel == 000 9 | * b if sel == 001 10 | * etc. 11 | * h if sel == 111 12 | */ 13 | 14 | 15 | CHIP Mux8Way16 { 16 | 17 | IN a[16], b[16], c[16], d[16], 18 | e[16], f[16], g[16], h[16], 19 | sel[3]; 20 | 21 | OUT out[16]; 22 | 23 | BUILTIN Mux8Way16; 24 | } -------------------------------------------------------------------------------- /.vscode/launch.json: -------------------------------------------------------------------------------- 1 | // A launch configuration that launches the extension inside a new window 2 | { 3 | "version": "0.1.0", 4 | "configurations": [ 5 | { 6 | "name": "Extension", 7 | "type": "extensionHost", 8 | "request": "launch", 9 | "runtimeExecutable": "${execPath}", 10 | "args": ["--extensionDevelopmentPath=${workspaceRoot}" ], 11 | "stopOnEntry": false, 12 | "sourceMaps": true, 13 | "outFiles": [ "${workspaceRoot}/out/**/*.js" ], 14 | "preLaunchTask": "npm: watch" 15 | } 16 | ] 17 | } -------------------------------------------------------------------------------- /builtInChips/DMux8Way.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/DMux8Way.hdl 5 | 6 | /** 7 | * 8-way demultiplexor. 8 | * {a,b,c,d,e,f,g,h} = {in,0,0,0,0,0,0,0} if sel == 000 9 | * {0,in,0,0,0,0,0,0} if sel == 001 10 | * etc. 11 | * {0,0,0,0,0,0,0,in} if sel == 111 12 | */ 13 | 14 | 15 | CHIP DMux8Way { 16 | 17 | IN in, sel[3]; 18 | OUT a, b, c, d, e, f, g, h; 19 | 20 | BUILTIN DMux8Way; 21 | } 22 | 23 | -------------------------------------------------------------------------------- /builtInChips/PC.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/PC.hdl 5 | 6 | /** 7 | * 16-bit counter with load and reset controls. 8 | * 9 | * If reset(t-1) then out(t) = 0 10 | * else if load(t-1) then out(t) = in(t-1) 11 | * else if inc(t-1) then out(t) = out(t-1) + 1 (integer addition) 12 | * else out(t) = out(t-1) 13 | */ 14 | 15 | CHIP PC { 16 | 17 | IN in[16], load, inc, reset; 18 | OUT out[16]; 19 | 20 | BUILTIN PC; 21 | CLOCKED in, load, inc, reset; 22 | } 23 | -------------------------------------------------------------------------------- /builtInChips/ARegister.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/ARegister.hdl 5 | 6 | /** 7 | * A 16-Bit register called "A Register". 8 | * If load[t-1]=1 then out[t] = in[t-1] 9 | * else out does not change (out[t] = out[t-1]) 10 | * 11 | * This built-in chip implementation has the side effect of 12 | * providing a GUI representation of a 16-bit register 13 | * called "A register" (typically used to store an address). 14 | */ 15 | 16 | CHIP ARegister { 17 | 18 | IN in[16], load; 19 | OUT out[16]; 20 | 21 | BUILTIN ARegister; 22 | CLOCKED in, load; 23 | } 24 | 25 | -------------------------------------------------------------------------------- /assets/zip.json: -------------------------------------------------------------------------------- 1 | { 2 | "01": { 3 | "extension": [ 4 | ".hdl" 5 | ] 6 | }, 7 | "02": { 8 | "extension": [ 9 | "hdl", 10 | "HDL" 11 | ] 12 | }, 13 | "03": { 14 | "extension": [ 15 | "hdl", 16 | "HDL" 17 | ] 18 | }, 19 | "04": { 20 | "extension": [ 21 | "asm", 22 | "ASM" 23 | ] 24 | }, 25 | "05": { 26 | "extension": [ 27 | "hdl", 28 | "HDL" 29 | ] 30 | }, 31 | "06": { 32 | "extension": [ 33 | "hack", 34 | "HACK" 35 | ], 36 | "extrafile": [ 37 | "prog.txt" 38 | ] 39 | } 40 | } -------------------------------------------------------------------------------- /builtInChips/DRegister.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of the materials accompanying the book 2 | // "The Elements of Computing Systems" by Nisan and Schocken, 3 | // MIT Press. Book site: www.idc.ac.il/tecs 4 | // File name: tools/builtIn/DRegister.hdl 5 | 6 | /** 7 | * A 16-Bit register called "D Register". 8 | * If load[t-1]=1 then out[t] = in[t-1] 9 | * else out does not change (out[t] = out[t-1]) 10 | * 11 | * This built-in chip implementation has the side effect of 12 | * providing a GUI representation of a 16-bit register 13 | * called "D register" (typically used to store data). 14 | */ 15 | 16 | CHIP DRegister { 17 | 18 | IN in[16], load; 19 | OUT out[16]; 20 | 21 | BUILTIN DRegister; 22 | CLOCKED in, load; 23 | } 24 | 25 | -------------------------------------------------------------------------------- /builtInChips/Keyboard.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Keyboard.hdl 5 | 6 | /** 7 | * The keyboard (memory map). 8 | * Outputs the code of the currently pressed key. 9 | * 10 | * The built-in chip implementation has two side effects supplied 11 | * by the simulator. First, the keyboard memory map is continuously 12 | * being refreshed from the physical keyboard unit. Second, it 13 | * displays a keyboard icon and data entry GUI. 14 | */ 15 | 16 | CHIP Keyboard { 17 | 18 | OUT out[16]; // The ASCII code of the pressed key, 19 | // or 0 if no key is currently pressed, 20 | // or one the special codes listed in Figure 5.5. 21 | 22 | BUILTIN Keyboard; 23 | } 24 | -------------------------------------------------------------------------------- /builtInChips/RAM8.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/RAM8.hdl 5 | 6 | /** 7 | * Memory of 8 registers, each 16-bit wide. 8 | * The chip facilitates read and write operations, as follows: 9 | * Read: out(t) = RAM8[address(t)](t) 10 | * Write: If load(t-1) then RAM8[address(t-1)](t) = in(t-1) 11 | * In words: the chip always outputs the value stored at the memory 12 | * location specified by address. If load == 1, the in value is loaded 13 | * into the memory location specified by address. This value becomes 14 | * available through the out output starting from the next time step. 15 | */ 16 | 17 | CHIP RAM8 { 18 | 19 | IN in[16], load, address[3]; 20 | OUT out[16]; 21 | 22 | BUILTIN RAM8; 23 | CLOCKED in, load; 24 | } 25 | -------------------------------------------------------------------------------- /builtInChips/RAM64.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/RAM64.hdl 5 | 6 | /** 7 | * Memory of 64 registers, each 16-bit wide. 8 | * The chip facilitates read and write operations, as follows: 9 | * Read: out(t) = RAM64[address(t)](t) 10 | * Write: If load(t-1) then RAM64[address(t-1)](t) = in(t-1) 11 | * In words: the chip always outputs the value stored at the memory 12 | * location specified by address. If load == 1, the in value is loaded 13 | * into the memory location specified by address. This value becomes 14 | * available through the out output starting from the next time step. 15 | */ 16 | 17 | CHIP RAM64 { 18 | 19 | IN in[16], load, address[6]; 20 | OUT out[16]; 21 | 22 | BUILTIN RAM64; 23 | CLOCKED in, load; 24 | } 25 | -------------------------------------------------------------------------------- /builtInChips/RAM16K.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/RAM16K.hdl 5 | 6 | /** 7 | * Memory of 16K registers, each 16-bit wide. 8 | * The chip facilitates read and write operations, as follows: 9 | * Read: out(t) = RAM16K[address(t)](t) 10 | * Write: If load(t-1) then RAM16K[address(t-1)](t) = in(t-1) 11 | * In words: the chip always outputs the value stored at the memory 12 | * location specified by address. If load=1, the in value is loaded 13 | * into the memory location specified by address. This value becomes 14 | * available through the out output starting from the next time step. 15 | */ 16 | 17 | CHIP RAM16K { 18 | 19 | IN in[16], load, address[14]; 20 | OUT out[16]; 21 | 22 | BUILTIN RAM16K; 23 | CLOCKED in, load; 24 | } 25 | -------------------------------------------------------------------------------- /builtInChips/RAM4K.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/RAM4K.hdl 5 | 6 | /** 7 | * Memory of 4K registers, each 16-bit wide. 8 | * The chip facilitates read and write operations, as follows: 9 | * Read: out(t) = RAM4K[address(t)](t) 10 | * Write: If load(t-1) then RAM4K[address(t-1)](t) = in(t-1) 11 | * In words: the chip always outputs the value stored at the memory 12 | * location specified by address. If load == 1, the in value is loaded 13 | * into the memory location specified by address. This value becomes 14 | * available through the out output starting from the next time step. 15 | */ 16 | 17 | CHIP RAM4K { 18 | 19 | IN in[16], load, address[12]; 20 | OUT out[16]; 21 | 22 | BUILTIN RAM4K; 23 | CLOCKED in, load; 24 | } 25 | -------------------------------------------------------------------------------- /builtInChips/RAM512.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/RAM512.hdl 5 | 6 | /** 7 | * Memory of 512 registers, each 16-bit wide. 8 | * The chip facilitates read and write operations, as follows: 9 | * Read: out(t) = RAM512[address(t)](t) 10 | * Write: If load(t-1) then RAM512[address(t-1)](t) = in(t-1) 11 | * In words: the chip always outputs the value stored at the memory 12 | * location specified by address. If load == 1, the in value is loaded 13 | * into the memory location specified by address. This value becomes 14 | * available through the out output starting from the next time step. 15 | */ 16 | 17 | CHIP RAM512 { 18 | 19 | IN in[16], load, address[9]; 20 | OUT out[16]; 21 | 22 | BUILTIN RAM512; 23 | CLOCKED in, load; 24 | } 25 | -------------------------------------------------------------------------------- /language-configuration.json: -------------------------------------------------------------------------------- 1 | { 2 | "comments": { 3 | // symbol used for single line comment. Remove this entry if your language does not support line comments 4 | "lineComment": "//", 5 | // symbols used for start and end a block comment. Remove this entry if your language does not support block comments 6 | "blockComment": [ "/*", "*/" ] 7 | }, 8 | // symbols used as brackets 9 | "brackets": [ 10 | ["{", "}"], 11 | ["[", "]"], 12 | ["(", ")"] 13 | ], 14 | // symbols that are auto closed when typing 15 | "autoClosingPairs": [ 16 | ["{", "}"], 17 | ["[", "]"], 18 | ["(", ")"], 19 | ["\"", "\""], 20 | ["'", "'"] 21 | ], 22 | // symbols that that can be used to surround a selection 23 | "surroundingPairs": [ 24 | ["{", "}"], 25 | ["[", "]"], 26 | ["(", ")"], 27 | ["\"", "\""], 28 | ["'", "'"] 29 | ] 30 | } -------------------------------------------------------------------------------- /LICENSE: -------------------------------------------------------------------------------- 1 | MIT License 2 | 3 | Copyright (c) 2017 leafvmaple 4 | 5 | Permission is hereby granted, free of charge, to any person obtaining a copy 6 | of this software and associated documentation files (the "Software"), to deal 7 | in the Software without restriction, including without limitation the rights 8 | to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 9 | copies of the Software, and to permit persons to whom the Software is 10 | furnished to do so, subject to the following conditions: 11 | 12 | The above copyright notice and this permission notice shall be included in all 13 | copies or substantial portions of the Software. 14 | 15 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 | AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 | SOFTWARE. 22 | -------------------------------------------------------------------------------- /builtInChips/ROM32K.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/ROM32K.hdl 5 | 6 | /** 7 | * Read-Only memory (ROM) of 16K registers, each 16-bit wide. 8 | * The chip is designed to facilitate data read, as follows: 9 | * out(t) = ROM32K[address(t)](t) 10 | * In words: the chip always outputs the value stored at the 11 | * memory location specified by address. 12 | * 13 | * The built-in chip implementation has a GUI side-effect, 14 | * showing an array-like component that displays the ROM's 15 | * contents. The ROM32K chip is supposed to be pre-loaded with 16 | * a machine language program. To that end, the built-in chip 17 | * implementation also knows how to handle the "ROM32K load Xxx" 18 | * script command, where Xxx is the name of a text file containing 19 | * a program written in the Hack machine language. When the 20 | * simulator encounters such a command in a test script, the code 21 | * found in the file is loaded into the simulated ROM32K unit. 22 | */ 23 | 24 | CHIP ROM32K { 25 | 26 | IN address[15]; 27 | OUT out[16]; 28 | 29 | BUILTIN ROM32K; 30 | } 31 | -------------------------------------------------------------------------------- /builtInChips/Screen.hdl: -------------------------------------------------------------------------------- 1 | // This file is part of www.nand2tetris.org 2 | // and the book "The Elements of Computing Systems" 3 | // by Nisan and Schocken, MIT Press. 4 | // File name: tools/builtIn/Screen.hdl 5 | 6 | /** 7 | * The Screen (memory map). 8 | * Functions exactly like a 16-bit 8K RAM: 9 | * 1. out(t)=Screen[address(t)](t) 10 | * 2. If load(t-1) then Screen[address(t-1)](t)=in(t-1) 11 | * 12 | * The built-in chip implementation has the side effect of continuously 13 | * refreshing a visual 256 by 512 black-and-white screen, simulated 14 | * by the simulator. Each row in the visual screen is represented 15 | * by 32 consecutive 16-bit words, starting at the top left corner 16 | * of the visual screen. Thus the pixel at row r from the top and 17 | * column c from the left (0<=r<=255, 0<=c<=511) reflects the c%16 18 | * bit (counting from LSB to MSB) of the word found in 19 | * Screen[r*32+c/16]. 20 | */ 21 | 22 | CHIP Screen { 23 | 24 | IN in[16], // what to write 25 | load, // write-enable bit 26 | address[13]; // where to read/write 27 | OUT out[16]; // Screen value at the given address 28 | 29 | BUILTIN Screen; 30 | CLOCKED in, load; 31 | } 32 | 33 | 34 | 35 | -------------------------------------------------------------------------------- /src/extension.ts: -------------------------------------------------------------------------------- 1 | "use strict"; 2 | import * as vscode from "vscode"; 3 | import { Commands } from "./commands"; 4 | 5 | const commands = new Commands(); 6 | 7 | export function activate(context: vscode.ExtensionContext) { 8 | const run = vscode.commands.registerCommand("nand2tetris.run", (fileUri: vscode.Uri) => { 9 | commands.executeCommand(fileUri); 10 | }); 11 | 12 | const hardware = vscode.commands.registerCommand("nand2tetris.hardware", (fileUri: vscode.Uri) => { 13 | commands.executeHarderwareCommand(); 14 | }); 15 | 16 | const assembler = vscode.commands.registerCommand("nand2tetris.assembler", (fileUri: vscode.Uri) => { 17 | commands.executeAssemblerCommand(); 18 | }); 19 | 20 | const cpu = vscode.commands.registerCommand("nand2tetris.cpu", (fileUri: vscode.Uri) => { 21 | commands.executeCPUCommand(); 22 | }); 23 | 24 | const stop = vscode.commands.registerCommand("nand2tetris.stop", () => { 25 | commands.stopCommand(); 26 | }); 27 | 28 | const zip = vscode.commands.registerCommand("nand2tetris.zip", () => { 29 | commands.zipCommand(); 30 | }); 31 | 32 | context.subscriptions.push(run); 33 | context.subscriptions.push(commands); 34 | } 35 | 36 | export function deactivate() { 37 | commands.stopCommand(); 38 | } 39 | -------------------------------------------------------------------------------- /CHANGELOG.md: -------------------------------------------------------------------------------- 1 | # Nand2Tetris Change Log 2 | 3 | ## [1.1.1] 2019-07-12 4 | 5 | * Support the parameter with bus 6 | 7 | ## [1.1.0] 2019-07-10 8 | 9 | * Auto add necessary files like `prog.txt` into `zip` when compress the source 10 | 11 | ## [1.0.0] 2019-07-08 12 | 13 | * Fixed the bug when `Compress` in WIN 14 | 15 | ## [0.4.0] 2019-07-02 16 | 17 | * Support `Compress` the Course Source to a `zip`. 18 | 19 | ## [0.3.1] 2019-07-02 20 | 21 | * Add `CPU Simulator` Command. 22 | 23 | ## [0.3.0] 2019-07-01 24 | 25 | * Support `Run Code` for `ASM` File. 26 | 27 | ## [0.2.8] 2019-06-25 28 | 29 | * Output error message when java in not installed. 30 | 31 | ## [0.2.7] 2017-12-27 32 | 33 | * Add CHIP Class snippets. 34 | 35 | * Change extension icon. 36 | 37 | ## [0.2.6] 2017-12-26 38 | 39 | * Modify the description of snippets. 40 | 41 | ## [0.2.5] 2017-12-26 42 | 43 | * Fixed the bug of syntaxes. 44 | 45 | ## [0.2.4] 2017-12-26 46 | 47 | * Fixed the bug of Run Code. 48 | 49 | * Support open `Hardware Simulator` in VSCode. 50 | 51 | ## [0.2.3] 2017-12-26 52 | 53 | * Fixed the highlight bug of chip inner. 54 | 55 | ## [0.2.2] 2017-12-20 56 | 57 | * Support Run Code in `OutputChannel`. 58 | 59 | ## [0.2.1] 2017-12-19 60 | 61 | * Add Language `configuration`. 62 | 63 | ## [0.2.0] 2017-12-19 64 | 65 | * Add `Snippets` for `HDL` Language. 66 | 67 | ## [0.1.1] 2017-12-18 68 | 69 | * Fixed the Run Code bug in windows. 70 | 71 | ## [0.1.0] 2017-12-18 72 | 73 | * Support `Run Code` for `HDL` Language. 74 | 75 | * Add Run Code Button to Content Titile. 76 | 77 | ## [0.0.2] 2017-12-17 78 | 79 | * Fixed `hightlight` bugs. 80 | 81 | ## [0.0.1] 2017-12-17 82 | 83 | * Create the `tmLanguage`. -------------------------------------------------------------------------------- /syntaxes/hdl.tmLanguage.json: -------------------------------------------------------------------------------- 1 | { 2 | "fileTypes": [ 3 | "hdl" 4 | ], 5 | "name": "HDL", 6 | "patterns": [ 7 | { 8 | "comment": "Block comment", 9 | "begin": "\\/\\*", 10 | "end": "\\*\\/", 11 | "name": "comment.block.hdl" 12 | }, 13 | { 14 | "comment": "Line comment", 15 | "begin": "\\/\\/", 16 | "end": "\\n", 17 | "name": "comment.line.hdl" 18 | }, 19 | { 20 | "comment": "keywords", 21 | "name": "keyword.hdl", 22 | "match": "IN|OUT|PARTS|BUILTIN" 23 | }, 24 | { 25 | "comment": "true, false", 26 | "name": "constant.language.hdl", 27 | "match": "true|false" 28 | }, 29 | { 30 | "comment": "bus index", 31 | "captures": { 32 | "1": { 33 | "name": "constant.numeric.hdl" 34 | } 35 | }, 36 | "match": "\\[([\\d]+)\\]" 37 | }, 38 | { 39 | "comment": ".. in bus slicing", 40 | "captures": { 41 | "1": { 42 | "name": "constant.numeric.hdl" 43 | } 44 | }, 45 | "match": "\\[(\\d+\\.{2}\\d+)\\]" 46 | }, 47 | { 48 | "comment": "chip name", 49 | "name": "storage.type.hdl", 50 | "match": "CHIP" 51 | }, 52 | { 53 | "comment": "inner chip", 54 | "captures": { 55 | "1": { 56 | "name": "entity.name.function.hdl" 57 | } 58 | }, 59 | "match": "([\\w\\d\\_]+)\\s*\\(" 60 | }, 61 | { 62 | "comment": "inner chip inputs and outputs", 63 | "captures": { 64 | "1": { 65 | "name": "variable.parameter.hdl" 66 | }, 67 | "2": { 68 | "name": "constant.numeric.hdl" 69 | } 70 | }, 71 | "match": "([\\w\\d\\_]+)\\s*(\\[.+\\])*=" 72 | } 73 | ], 74 | "scopeName": "source.hdl" 75 | } -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- 1 | # Nand2Tetris Language README 2 | 3 | The Visual Studio Code extenstion for Nand2Tetris Language support. 4 | 5 | ## Features 6 | 7 | 1. **Support the Language `HDL` snippets** 8 | 9 | 2. **Auto load the `.tst` script to check your `.hdl` program** 10 | 11 | 3. **Auto load the `.tst` script to check your `.asm` program** 12 | 13 | 4. **Quckly `compress` the course source to a `zip` that can easily commit** 14 | 15 | 5. **Auto add necessary files like `prog.txt` into `zip` when compress the source** 16 | 17 | ## Installation 18 | 19 | Install it from [VS Code Marketplace](https://marketplace.visualstudio.com/items/leafvmaple.nand2tetris) 20 | 21 | ## Run Code 22 | 23 | * **Install [Java Runtime Environment](https://www.java.com/en/download/manual.jsp)** 24 | 25 | * **Click the `Run Code` Button** 26 | 27 | ## Commands 28 | 29 | * **Nand2Tetris: Run Code** 30 | 31 | Run the HDL Code. 32 | 33 | * **Nand2Tetris: Open Hardware Simulator** 34 | 35 | Open the Hardware Simulator. 36 | 37 | * **Nand2Tetris: Open Assembler Simulator** 38 | 39 | Open the Assembler Simulator. 40 | 41 | * **Nand2Tetris: Open CPU Simulator** 42 | 43 | Open the CPU Simulator. 44 | 45 | * **Nand2Tetris: Stop Running** 46 | 47 | Stop Running Code. 48 | 49 | * **Nand2Tetris: Compress course source to a zip** 50 | 51 | Quckly Compress the course source. 52 | 53 | ## Release Notes 54 | 55 | ### Version 1.1.1 56 | 57 | * Support the parameter with bus 58 | 59 | ### Version 1.1.0 60 | 61 | * Auto add necessary files like `prog.txt` into `zip` when compress the source 62 | 63 | ### Version 1.0.0 64 | 65 | * Fixed the bug when `Compress` in WIN 66 | 67 | ### Version 0.4.0 68 | 69 | * Support `Compress` the Course Source to a `zip`. 70 | 71 | ### Version 0.3.1 72 | 73 | * Add `CPU Simulator` Command. 74 | 75 | ### Version 0.3.0 76 | 77 | * Support `Run Code` for `ASM` File. 78 | 79 | ### Version 0.2.8 80 | 81 | * Output error message when java in not installed. 82 | 83 | ### Version 0.2.7 84 | 85 | * Add CHIP Class snippets. 86 | 87 | * Change extension icon. 88 | 89 | ### Version 0.2.6 90 | 91 | * Modify the description of snippets. 92 | 93 | ### Version 0.2.5 94 | 95 | * Fixed the bug of syntaxes. 96 | 97 | ### Version 0.2.4 98 | 99 | * Fixed the bug of Run Code. 100 | 101 | * Support open `Hardware Simulator` in vscode. 102 | 103 | ### Version 0.2.3 104 | 105 | * Fixed the highlight bug of chip inner. 106 | 107 | ### Version 0.2.2 108 | 109 | * Support Run Code in `OutputChannel`. 110 | 111 | ### Version 0.2.1 112 | 113 | * Add Language `configuration`. 114 | 115 | ### Version 0.2.0 116 | 117 | * Add `Snippets` for `HDL` Language. 118 | 119 | ### Version 0.1.1 120 | 121 | * Fixed the Run Code bug in windows. 122 | 123 | ### Version 0.1.0 124 | 125 | * Support `Run Code` for `HDL` Language. 126 | 127 | * Add Run Code Button to Content Titile. 128 | 129 | ### Version 0.0.2 130 | 131 | * Fixed `hightlight` bugs. 132 | 133 | ### Version 0.0.1 134 | 135 | * Create the `tmLanguage`. 136 | -------------------------------------------------------------------------------- /bin/help/asmAbout.html: -------------------------------------------------------------------------------- 1 | 4 | 5 |
6 | 7 | 8 | 9 | 10 | 11 |Assembler, Version 2.5
71 | 72 |74 | 75 |
This program is
76 | part of www.nand2tetris.org
and
79 | the book "The Elements of Computing Systems"
by 82 | Nisan and Schocken, MIT Press.
83 | 84 |86 | 87 |
Software Architects: Yaron Ukrainitz and Yannai A. Gonczarowski
89 | 90 |91 | 92 |
CPU Emulator, Version 2.5
71 | 72 |74 | 75 |
This program is
76 | part of www.nand2tetris.org
and
79 | the book "The Elements of Computing Systems"
by 82 | Nisan and Schocken, MIT Press.
83 | 84 |86 | 87 |
Software Architects: Yaron Ukrainitz and Yannai A. Gonczarowski
89 | 90 |91 | 92 |
Hardware Simulator, Version 2.5
71 | 72 |74 | 75 |
This program is
76 | part of www.nand2tetris.org
and
79 | the book "The Elements of Computing Systems"
by 82 | Nisan and Schocken, MIT Press.
83 | 84 |86 | 87 |
Software Architects: Yaron Ukrainitz and Yannai A. Gonczarowski
89 | 90 |91 | 92 |
Virtual Machine Emulator, Version 2.5
84 | 85 |87 | 88 |
This program is
89 | part of www.nand2tetris.org
and
92 | the book "The Elements of Computing Systems"
by 95 | Nisan and Schocken, MIT Press.
96 | 97 |99 | 100 |
Software Architects: Yaron Ukrainitz and Yannai A. 102 | Gonczarowski
103 | 104 |105 | 106 |
Usage instruction and tips can be found in:
81 | 82 |84 | 85 |
The Assembler Tutorial
87 | 88 |90 | 91 |
Available in www.nand2tetris.org
93 | 94 |96 | 97 |
And in relevant book chapters from
99 | 100 |The Elements of Computing Systems,
by Noam Nisan and Shimon Schocken
105 | 106 |MIT Press
108 | 109 |110 | 111 |
Usage instruction and tips can be found in:
81 | 82 |84 | 85 |
The CPU Emulator Tutorial
87 | 88 |90 | 91 |
Available in www.nand2tetris.org
93 | 94 |96 | 97 |
And in relevant book chapters from
99 | 100 |The Elements of Computing Systems,
by Noam Nisan and Shimon Schocken
105 | 106 |MIT Press
108 | 109 |110 | 111 |
Usage instruction and tips can be found in:
81 | 82 |84 | 85 |
The Hardware Simulator Tutorial
87 | 88 |90 | 91 |
Available in www.nand2tetris.org
93 | 94 |96 | 97 |
And in relevant book chapters from
99 | 100 |The Elements of Computing Systems,
by Noam Nisan and Shimon Schocken
105 | 106 |MIT Press
108 | 109 |110 | 111 |
Usage instruction and tips can be found in:
81 | 82 |84 | 85 |
The VM Emulator Tutorial
87 | 88 |90 | 91 |
Available in www.nand2tetris.org
93 | 94 |96 | 97 |
And in relevant book chapters from
99 | 100 |The Elements of Computing Systems,
by Noam Nisan and Shimon Schocken
MIT Press
108 | 109 |110 | 111 |