├── Makefile ├── esc32_motor_db.xml ├── src ├── STM32F10X_MD.vec ├── STM32_Startup.s ├── adc.c ├── adc.h ├── binary.c ├── binary.h ├── buildnum.h ├── cli.c ├── cli.h ├── config.c ├── config.h ├── core_cm3.h ├── digital.c ├── digital.h ├── fet.c ├── fet.h ├── getbuildnum.c ├── getbuildnum.h ├── main.c ├── main.h ├── misc.c ├── misc.h ├── ow.c ├── ow.h ├── pwm.c ├── pwm.h ├── rcc.c ├── rcc.h ├── run.c ├── run.h ├── serial.c ├── serial.h ├── startup_stm32f10x_md_gcc.S ├── stm32f10x.h ├── stm32f10x_adc.c ├── stm32f10x_adc.h ├── stm32f10x_conf.h ├── stm32f10x_dbgmcu.c ├── stm32f10x_dbgmcu.h ├── stm32f10x_dma.c ├── stm32f10x_dma.h ├── stm32f10x_exti.c ├── stm32f10x_exti.h ├── stm32f10x_flash.c ├── stm32f10x_flash.h ├── stm32f10x_gpio.c ├── stm32f10x_gpio.h ├── stm32f10x_iwdg.c ├── stm32f10x_iwdg.h ├── stm32f10x_pwr.c ├── stm32f10x_pwr.h ├── stm32f10x_rcc.c ├── stm32f10x_rcc.h ├── stm32f10x_tim.c ├── stm32f10x_tim.h ├── stm32f10x_usart.c ├── stm32f10x_usart.h ├── syscalls.c ├── system_stm32f10x.c ├── system_stm32f10x.h ├── timer.c └── timer.h ├── stm32_flash.ld └── support ├── flash.bat └── stmloader ├── Makefile ├── loader.c ├── serial.c ├── serial.h ├── stmbootloader.c ├── stmbootloader.h ├── stmloader └── stmloader.dSYM └── Contents ├── Info.plist └── Resources └── DWARF └── stmloader /Makefile: -------------------------------------------------------------------------------- 1 | ############################################################################### 2 | # "THE BEER-WARE LICENSE" (Revision 42): 3 | # wrote this file. As long as you retain this notice you 4 | # can do whatever you want with this stuff. If we meet some day, and you think 5 | # this stuff is worth it, you can buy me a beer in return 6 | ############################################################################### 7 | # 8 | # Makefile for building the baseflight firmware. 9 | # 10 | # Invoke this with 'make help' to see the list of supported targets. 11 | # 12 | 13 | ############################################################################### 14 | # Things that the user might override on the commandline 15 | # 16 | 17 | # The target to build, must be one of NAZE, FY90Q OR OLIMEXINO 18 | TARGET ?= ESC32 19 | 20 | # Compile-time options 21 | OPTIONS ?= 22 | 23 | # Debugger optons, must be empty or GDB 24 | DEBUG ?= 25 | 26 | ############################################################################### 27 | # Things that need to be maintained as the source changes 28 | # 29 | 30 | VALID_TARGETS = ESC32 31 | 32 | # Working directories 33 | ROOT = $(dir $(lastword $(MAKEFILE_LIST))) 34 | SRC_DIR = $(ROOT)/src 35 | OBJECT_DIR = $(ROOT)/obj 36 | BIN_DIR = $(ROOT)/bin 37 | 38 | # Source files common to all targets 39 | ESC32_SRC = startup_stm32f10x_md_gcc.S adc.c binary.c cli.c config.c digital.c fet.c getbuildnum.c main.c misc.c ow.c pwm.c rcc.c run.c serial.c \ 40 | stm32f10x_adc.c stm32f10x_dbgmcu.c stm32f10x_dma.c stm32f10x_exti.c stm32f10x_flash.c stm32f10x_gpio.c stm32f10x_iwdg.c \ 41 | stm32f10x_pwr.c stm32f10x_rcc.c stm32f10x_tim.c stm32f10x_usart.c system_stm32f10x.c timer.c syscalls.c 42 | 43 | # Search path for baseflight sources 44 | VPATH := $(SRC_DIR) 45 | 46 | ############################################################################### 47 | # Things that might need changing to use different tools 48 | # 49 | 50 | # Tool names 51 | CC = arm-none-eabi-gcc 52 | OBJCOPY = arm-none-eabi-objcopy 53 | 54 | # 55 | # Tool options. 56 | # 57 | INCLUDE_DIRS = $(SRC_DIR) 58 | 59 | ARCH_FLAGS = -mthumb -mcpu=cortex-m3 60 | BASE_CFLAGS = $(ARCH_FLAGS) \ 61 | $(addprefix -D,$(OPTIONS)) \ 62 | $(addprefix -I,$(INCLUDE_DIRS)) \ 63 | -Wall \ 64 | -ffunction-sections \ 65 | -fdata-sections \ 66 | -DSTM32F10X_MD \ 67 | -DUSE_STDPERIPH_DRIVER \ 68 | -D$(TARGET) 69 | 70 | ASFLAGS = $(ARCH_FLAGS) \ 71 | -x assembler-with-cpp \ 72 | $(addprefix -I,$(INCLUDE_DIRS)) 73 | 74 | # XXX Map/crossref output? 75 | LD_SCRIPT = $(ROOT)/stm32_flash.ld 76 | LDFLAGS = -lm \ 77 | $(ARCH_FLAGS) \ 78 | -static \ 79 | -Wl,-gc-sections \ 80 | -T$(LD_SCRIPT) 81 | 82 | ############################################################################### 83 | # No user-serviceable parts below 84 | ############################################################################### 85 | 86 | # 87 | # Things we will build 88 | # 89 | ifeq ($(filter $(TARGET),$(VALID_TARGETS)),) 90 | $(error Target '$(TARGET)' is not valid, must be one of $(VALID_TARGETS)) 91 | endif 92 | 93 | ifeq ($(DEBUG),GDB) 94 | CFLAGS = $(BASE_CFLAGS) \ 95 | -ggdb \ 96 | -O0 97 | else 98 | CFLAGS = $(BASE_CFLAGS) \ 99 | -Os 100 | endif 101 | 102 | 103 | TARGET_HEX = $(BIN_DIR)/hyon_$(TARGET).hex 104 | TARGET_ELF = $(BIN_DIR)/hyon_$(TARGET).elf 105 | TARGET_OBJS = $(addsuffix .o,$(addprefix $(OBJECT_DIR)/$(TARGET)/,$(basename $($(TARGET)_SRC)))) 106 | 107 | # List of buildable ELF files and their object dependencies. 108 | # It would be nice to compute these lists, but that seems to be just beyond make. 109 | 110 | $(TARGET_HEX): $(TARGET_ELF) 111 | $(OBJCOPY) -O ihex $< $@ 112 | 113 | $(TARGET_ELF): $(TARGET_OBJS) 114 | $(CC) -o $@ $^ $(LDFLAGS) 115 | 116 | # Compile 117 | $(OBJECT_DIR)/$(TARGET)/%.o: %.c 118 | @mkdir -p $(dir $@) 119 | @echo %% $(notdir $<) 120 | @$(CC) -c -o $@ $(CFLAGS) $< 121 | 122 | # Assemble 123 | $(OBJECT_DIR)/$(TARGET)/%.o: %.s 124 | @mkdir -p $(dir $@) 125 | @echo %% $(notdir $<) 126 | @$(CC) -c -o $@ $(ASFLAGS) $< 127 | $(OBJECT_DIR)/$(TARGET)/%.o): %.S 128 | @mkdir -p $(dir $@) 129 | @echo %% $(notdir $<) 130 | @$(CC) -c -o $@ $(ASFLAGS) $< 131 | 132 | clean: 133 | rm -f $(TARGET_HEX) $(TARGET_ELF) $(TARGET_OBJS) 134 | 135 | help: 136 | @echo "" 137 | @echo "Makefile for the baseflight firmware" 138 | @echo "" 139 | @echo "Usage:" 140 | @echo " make [TARGET=] [OPTIONS=\"\"]" 141 | @echo "" 142 | @echo "Valid TARGET values are: $(VALID_TARGETS)" 143 | @echo "" 144 | -------------------------------------------------------------------------------- /esc32_motor_db.xml: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | 6 | 7 | 35.0 8 | +8.772974e-08 9 | +1.195871e-03 10 | -2.534735e-01 11 | +1.213829e-03 12 | +6.616300e-02 13 | -5.980994e-05 14 | +5.675677e-01 15 | 16 | 17 | 18 | 19 | 15.0 20 | 6500 21 | +7.23870e-08 22 | +1.40690e-03 23 | -3.05210e-01 24 | +1.54300e-03 25 | -1.42560e-02 26 | -9.82150e-05 27 | +1.49340e+00 28 | 29 | 30 | 31 | 32 | 33 | 34 | 10.0 35 | +1.019580e-07 36 | +2.137348e-03 37 | +3.114897e-01 38 | +1.840782e-03 39 | -7.671915e-02 40 | -5.943240e-05 41 | +1.566824e+00 42 | 43 | 44 | 10.0 45 | +1.460333e-07 46 | +2.027514e-03 47 | +4.384707e-01 48 | +1.895964e-03 49 | +2.488202e-01 50 | -7.540044e-05 51 | +8.006618e-01 52 | 53 | 54 | 55 | 56 | 6.0 57 | 12 58 | +2.136259e-08 59 | +7.304788e-04 60 | +2.173815e-01 61 | +7.996285e-04 62 | +8.779305e-02 63 | -4.019083e-05 64 | +8.509188e-01 65 | 66 | 67 | 68 | 69 | 70 | 71 | 20.0 72 | 5500 73 | +1.998525e-07 74 | +9.514660e-04 75 | -2.301245e-02 76 | +1.381919e-03 77 | +2.570513e-01 78 | -1.064467e-04 79 | +5.656897e-01 80 | 81 | 82 | 20.0 83 | 7500 84 | +1.028551e-07 85 | +9.977381e-04 86 | -8.272934e-01 87 | +1.385665e-03 88 | +1.335600e-01 89 | -9.868111e-05 90 | +1.173475e+00 91 | 92 | 93 | 20.0 94 | 8125 95 | +7.562404e-08 96 | +1.116254e-03 97 | -7.778534e-01 98 | +1.385586e-03 99 | +1.559464e-01 100 | -9.598113e-05 101 | +1.091966e+00 102 | 103 | 104 | 105 | 106 | 107 | 108 | 20000 109 | 200 110 | 100 111 | 17 112 | 10.0 113 | 5000 114 | +9.449307e-08 115 | +2.556443e-03 116 | +1.353720e-01 117 | +2.302556e-03 118 | -2.770898e-01 119 | +1.107677e-05 120 | +2.404868e+00 121 | 122 | 123 | 20000 124 | 200 125 | 100 126 | 17 127 | 15.0 128 | 4250 129 | +2.165036e-07 130 | +2.485475e-03 131 | +1.403958e-01 132 | +2.495625e-03 133 | -5.423037e-02 134 | -7.705004e-05 135 | +1.808430e+00 136 | 137 | 138 | 139 | 140 | 141 | 142 | 10.0 143 | 4200 144 | +1.663210e-07 145 | +3.019136e-03 146 | +4.023476e-01 147 | +2.972955e-03 148 | +3.942016e-01 149 | -2.607788e-04 150 | +1.195345e+00 151 | 152 | 153 | 154 | 155 | 156 | 157 | 10.0 158 | 6600 159 | +7.758036e-08 160 | +1.346518e-03 161 | +1.185998e-01 162 | +1.101180e-03 163 | +1.036849e-02 164 | -2.339198e-05 165 | +1.565325e+00 166 | 167 | 168 | 10.0 169 | 6600 170 | +6.602521e-08 171 | +1.307364e-03 172 | +1.083585e-01 173 | +1.118480e-03 174 | +2.000165e-02 175 | -1.675907e-05 176 | +1.547213e+00 177 | 178 | 179 | 180 | 181 | 20.0 182 | 7000 183 | +7.301604e-08 184 | +1.667140e-03 185 | +4.536045e-02 186 | +1.691868e-03 187 | -2.397337e-03 188 | +1.556321e-05 189 | +9.611021e-01 190 | 191 | 192 | 193 | 194 | 10.0 195 | 6200 196 | 100 197 | 14000 198 | 25 199 | +9.734515e-08 200 | +1.589849e-03 201 | +2.300860e-01 202 | +1.581854e-03 203 | +5.800640e-02 204 | -3.426343e-05 205 | +1.271708e+00 206 | 207 | 208 | 10.0 209 | 6100 210 | 100 211 | 14000 212 | 25 213 | +1.183632e-07 214 | +1.477731e-03 215 | +1.261536e-01 216 | +1.579525e-03 217 | +5.392267e-02 218 | -2.659491e-05 219 | +1.263762e+00 220 | 221 | 222 | 10.0 223 | 7950 224 | 100 225 | 14000 226 | 25 227 | +3.678492e-08 228 | +1.656601e-03 229 | +3.146093e-01 230 | +1.472405e-03 231 | +1.595022e-02 232 | +2.831727e-05 233 | +1.038860e+00 234 | 235 | 236 | 237 | 238 | 10 239 | 25.0 240 | 7500 241 | +8.498902e-08 242 | +1.126556e-03 243 | +2.040018e-01 244 | +1.129195e-03 245 | +3.933982e-02 246 | -5.343935e-06 247 | +6.620063e-01 248 | 249 | 250 | 251 | 252 | -------------------------------------------------------------------------------- /src/STM32F10X_MD.vec: -------------------------------------------------------------------------------- 1 | ISR_HANDLER WWDG_IRQHandler 2 | ISR_HANDLER PVD_IRQHandler 3 | ISR_HANDLER TAMPER_IRQHandler 4 | ISR_HANDLER RTC_IRQHandler 5 | ISR_HANDLER FLASH_IRQHandler 6 | ISR_HANDLER RCC_IRQHandler 7 | ISR_HANDLER EXTI0_IRQHandler 8 | ISR_HANDLER EXTI1_IRQHandler 9 | ISR_HANDLER EXTI2_IRQHandler 10 | ISR_HANDLER EXTI3_IRQHandler 11 | ISR_HANDLER EXTI4_IRQHandler 12 | ISR_HANDLER DMA1_Channel1_IRQHandler 13 | ISR_HANDLER DMA1_Channel2_IRQHandler 14 | ISR_HANDLER DMA1_Channel3_IRQHandler 15 | ISR_HANDLER DMA1_Channel4_IRQHandler 16 | ISR_HANDLER DMA1_Channel5_IRQHandler 17 | ISR_HANDLER DMA1_Channel6_IRQHandler 18 | ISR_HANDLER DMA1_Channel7_IRQHandler 19 | ISR_HANDLER ADC1_2_IRQHandler 20 | ISR_HANDLER USB_HP_CAN1_TX_IRQHandler 21 | ISR_HANDLER USB_LP_CAN1_RX0_IRQHandler 22 | ISR_HANDLER CAN1_RX1_IRQHandler 23 | ISR_HANDLER CAN1_SCE_IRQHandler 24 | ISR_HANDLER EXTI9_5_IRQHandler 25 | ISR_HANDLER TIM1_BRK_IRQHandler 26 | ISR_HANDLER TIM1_UP_IRQHandler 27 | ISR_HANDLER TIM1_TRG_COM_IRQHandler 28 | ISR_HANDLER TIM1_CC_IRQHandler 29 | ISR_HANDLER TIM2_IRQHandler 30 | ISR_HANDLER TIM3_IRQHandler 31 | ISR_HANDLER TIM4_IRQHandler 32 | ISR_HANDLER I2C1_EV_IRQHandler 33 | ISR_HANDLER I2C1_ER_IRQHandler 34 | ISR_HANDLER I2C2_EV_IRQHandler 35 | ISR_HANDLER I2C2_ER_IRQHandler 36 | ISR_HANDLER SPI1_IRQHandler 37 | ISR_HANDLER SPI2_IRQHandler 38 | ISR_HANDLER USART1_IRQHandler 39 | ISR_HANDLER USART2_IRQHandler 40 | ISR_HANDLER USART3_IRQHandler 41 | ISR_HANDLER EXTI15_10_IRQHandler 42 | ISR_HANDLER RTCAlarm_IRQHandler 43 | ISR_HANDLER USBWakeUp_IRQHandler -------------------------------------------------------------------------------- /src/STM32_Startup.s: -------------------------------------------------------------------------------- 1 | /***************************************************************************** 2 | * Copyright (c) 2007, 2009 Rowley Associates Limited. * 3 | * * 4 | * This file may be distributed under the terms of the License Agreement * 5 | * provided with this software. * 6 | * * 7 | * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE * 8 | * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. * 9 | *****************************************************************************/ 10 | 11 | /***************************************************************************** 12 | * Preprocessor Definitions 13 | * ------------------------ 14 | * 15 | * STARTUP_FROM_RESET 16 | * 17 | * If defined, the program will startup from power-on/reset. If not defined 18 | * the program will just loop endlessly from power-on/reset. 19 | * 20 | * This definition is not defined by default on this target because the 21 | * debugger is unable to reset this target and maintain control of it over the 22 | * JTAG interface. The advantage of doing this is that it allows the debugger 23 | * to reset the CPU and run programs from a known reset CPU state on each run. 24 | * It also acts as a safety net if you accidently download a program in FLASH 25 | * that crashes and prevents the debugger from taking control over JTAG 26 | * rendering the target unusable over JTAG. The obvious disadvantage of doing 27 | * this is that your application will not startup without the debugger. 28 | * 29 | * We advise that on this target you keep STARTUP_FROM_RESET undefined whilst 30 | * you are developing and only define STARTUP_FROM_RESET when development is 31 | * complete. 32 | * 33 | * __NO_SYSTEM_INIT 34 | * 35 | * If defined, the SystemInit() function will NOT be called. By default SystemInit() 36 | * is called after reset to enable the clocks and memories to be initialised 37 | * prior to any C startup initialisation. 38 | * 39 | * VECTORS_IN_RAM 40 | * 41 | * If defined then the exception vectors are copied from Flash to RAM 42 | * 43 | * __TARGET_LD 44 | * 45 | * Low density device interrupt vectors. 46 | * 47 | * __TARGET_MD 48 | * 49 | * Medium density device interrupt vectors 50 | * 51 | * __TARGET_HD 52 | * 53 | * High density device interrupt vectors 54 | * 55 | * __TARGET_XL 56 | * 57 | * XL density device interrupt vectors 58 | * 59 | * __TARGET_CL 60 | * 61 | * Connectivity Line device interrupt vectors. 62 | * 63 | * __TARGET_LD_VL 64 | * 65 | * Low density value line device interrupt vectors. 66 | * 67 | * __TARGET_MD_VL 68 | * 69 | * Medium density value line device interrupt vectors. 70 | * 71 | * __TARGET_HD_VL 72 | * 73 | * High density value line device interrupt vectors. 74 | * 75 | * __TARGET_MD_ULP 76 | * 77 | * Medium density low power device interrupt vectors. 78 | * 79 | * __TARGET_F2XX 80 | * 81 | * F2xx device interrupt vectors 82 | * 83 | * __TARGET_F4XX 84 | * 85 | * F4xx device interrupt vectors 86 | * 87 | * __TARGET_F30X 88 | * 89 | * F30x device interrupt vectors 90 | * 91 | * __TARGET_F37X 92 | * 93 | * F37x device interrupt vectors 94 | * 95 | * __TARGET_W108 96 | * 97 | * W108 device interrupt vectors 98 | * 99 | * __NO_FPU 100 | * 101 | * If defined do NOT turn on the FPU for F4xx parts 102 | * 103 | * __NO_RUNFAST_MODE 104 | * 105 | * If defined do NOT turn on flush-to-zero and default NaN modes 106 | * 107 | *****************************************************************************/ 108 | 109 | .macro ISR_HANDLER name= 110 | .section .vectors, "ax" 111 | .word \name 112 | .section .init, "ax" 113 | .thumb_func 114 | .weak \name 115 | \name: 116 | 1: b 1b /* endless loop */ 117 | .endm 118 | 119 | .macro ISR_RESERVED 120 | .section .vectors, "ax" 121 | .word 0 122 | .endm 123 | 124 | .syntax unified 125 | .global reset_handler 126 | 127 | .section .vectors, "ax" 128 | .code 16 129 | .global _vectors 130 | 131 | _vectors: 132 | .word __stack_end__ 133 | #ifdef STARTUP_FROM_RESET 134 | .word reset_handler 135 | #else 136 | .word reset_wait 137 | #endif /* STARTUP_FROM_RESET */ 138 | ISR_HANDLER NMI_Handler 139 | ISR_HANDLER HardFault_Handler 140 | ISR_HANDLER MemManage_Handler 141 | ISR_HANDLER BusFault_Handler 142 | ISR_HANDLER UsageFault_Handler 143 | ISR_RESERVED 144 | ISR_RESERVED 145 | ISR_RESERVED 146 | ISR_RESERVED 147 | ISR_HANDLER SVC_Handler 148 | ISR_HANDLER DebugMon_Handler 149 | ISR_RESERVED 150 | ISR_HANDLER PendSV_Handler 151 | ISR_HANDLER SysTick_Handler 152 | #if defined(__TARGET_LD) 153 | #include "STM32F10X_LD.vec" 154 | #elif defined(__TARGET_MD) 155 | #include "STM32F10X_MD.vec" 156 | #elif defined(__TARGET_HD) 157 | #include "STM32F10X_HD.vec" 158 | #elif defined(__TARGET_XL) 159 | #include "STM32F10X_XL.vec" 160 | #elif defined(__TARGET_CL) 161 | #include "STM32F10X_CL.vec" 162 | #elif defined(__TARGET_LD_VL) 163 | #include "STM32F10X_LD_VL.vec" 164 | #elif defined(__TARGET_MD_VL) 165 | #include "STM32F10X_MD_VL.vec" 166 | #elif defined(__TARGET_HD_VL) 167 | #include "STM32F10X_HD_VL.vec" 168 | #elif defined(__TARGET_MD_ULP) || defined(__TARGET_MDP_ULP) || defined(__TARGET_HD_ULP) 169 | #include "STM32L1XX.vec" 170 | #elif defined(__TARGET_F2XX) || defined(__TARGET_F4XX) || defined(__TARGET_F427X) 171 | #include "STM32F2XX.vec" 172 | #if defined(__TARGET_F4XX) 173 | ISR_HANDLER FPU_IRQHandler 174 | #elif defined(__TARGET_F427X) 175 | ISR_HANDLER FPU_IRQHandler 176 | ISR_HANDLER UART7_IRQHandler 177 | ISR_HANDLER UART8_IRQHandler 178 | ISR_HANDLER SPI4_IRQHandler 179 | ISR_HANDLER SPI5_IRQHandler 180 | ISR_HANDLER SPI6_IRQHandler 181 | #endif 182 | #elif defined(__TARGET_F0XX) 183 | #include "STM32F0XX.vec" 184 | #elif defined(__TARGET_F30X) 185 | #include "STM32F30X.vec" 186 | #elif defined(__TARGET_F37X) 187 | #include "STM32F37X.vec" 188 | #elif defined(__TARGET_W108) 189 | #include "STM32W108.vec" 190 | #else 191 | #error __TARGET_XX not defined 192 | #endif 193 | .section .vectors, "ax" 194 | _vectors_end: 195 | 196 | 197 | #ifdef VECTORS_IN_RAM 198 | .section .vectors_ram, "ax" 199 | _vectors_ram: 200 | .space _vectors_end-_vectors, 0 201 | #endif 202 | 203 | .section .init, "ax" 204 | .thumb_func 205 | 206 | reset_handler: 207 | 208 | #ifndef __NO_SYSTEM_INIT 209 | ldr r0, =__RAM_segment_end__ 210 | mov sp, r0 211 | bl SystemInit 212 | #endif 213 | 214 | #ifdef VECTORS_IN_RAM 215 | ldr r0, =__vectors_load_start__ 216 | ldr r1, =__vectors_load_end__ 217 | ldr r2, =_vectors_ram 218 | l0: 219 | cmp r0, r1 220 | beq l1 221 | ldr r3, [r0] 222 | str r3, [r2] 223 | adds r0, r0, #4 224 | adds r2, r2, #4 225 | b l0 226 | l1: 227 | #endif 228 | 229 | #if defined(__TARGET_F4XX) || defined(__TARGET_F30X) || defined(__TARGET_F37X) 230 | #ifndef __NO_FPU 231 | // Enable CP11 and CP10 with CPACR |= (0xf<<20) 232 | movw r0, 0xED88 233 | movt r0, 0xE000 234 | ldr r1, [r0] 235 | orrs r1, r1, #(0xf << 20) 236 | str r1, [r0] 237 | #ifndef __NO_RUNFAST_MODE 238 | nop 239 | nop 240 | nop 241 | vmrs r0, fpscr 242 | orrs r0, r0, #(0x3 << 24) // FZ and DN 243 | vmsr fpscr, r0 244 | // clear the CONTROL.FPCA bit 245 | mov r0, #0 246 | msr control, r0 247 | // FPDSCR similarly 248 | movw r1, 0xEF3C 249 | movt r1, 0xE000 250 | ldr r0, [r1] 251 | orrs r0, r0, #(0x3 << 24) // FZ and DN 252 | str r0, [r1] 253 | #endif 254 | #endif 255 | #endif 256 | 257 | #ifndef __TARGET_F0XX 258 | /* Configure vector table offset register */ 259 | ldr r0, =0xE000ED08 260 | #ifdef VECTORS_IN_RAM 261 | ldr r1, =_vectors_ram 262 | #else 263 | ldr r1, =_vectors 264 | #endif 265 | str r1, [r0] 266 | #endif 267 | 268 | b _start 269 | 270 | #ifndef __NO_SYSTEM_INIT 271 | .thumb_func 272 | .weak SystemInit 273 | SystemInit: 274 | bx lr 275 | #endif 276 | 277 | #ifndef STARTUP_FROM_RESET 278 | .thumb_func 279 | reset_wait: 280 | 1: b 1b /* endless loop */ 281 | #endif /* STARTUP_FROM_RESET */ 282 | -------------------------------------------------------------------------------- /src/adc.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _ADC_H 20 | #define _ADC_H 21 | 22 | #include "timer.h" 23 | #include "stm32f10x_adc.h" 24 | 25 | #define ADC_FAST_SAMPLE 26 | 27 | #ifdef ADC_FAST_SAMPLE 28 | #define ADC_SAMPLE_TIME ADC_SampleTime_7Cycles5 29 | #define ADC_DETECTION_TIME (uint16_t)((7.5+12.5)*4*TIMER_MULT/12) // 4 ADC groups w/7.5 clk sample @ 12Mhz ADC clock (in us) 30 | #else 31 | #define ADC_SAMPLE_TIME ADC_SampleTime_28Cycles5 32 | #define ADC_DETECTION_TIME (uint16_t)((28.5+12.5)*2*TIMER_MULT/12) // 2 ADC groups w/28.5 clk sample @ 12Mhz ADC clock (in us) 33 | #endif // ADC_FAST_SAMPLE 34 | 35 | #define ADC_CHANNELS 2 36 | #define ADC_CLOCK RCC_PCLK2_Div6 // 12Mhz 37 | 38 | #define ADC_REF_VOLTAGE 3.3f 39 | #define ADC_TO_VOLTAGE (ADC_REF_VOLTAGE / (1<<12)) // 12 bit ADC resolution 40 | 41 | #define ADC_AMPS_PRECISION 16 42 | #define ADC_SHUNT_GAIN 50.9f 43 | 44 | #define ADC_VOLTS_PRECISION 16 45 | #define ADC_VOLTS_SLOPE ((10.0f + 1.5f) / 1.5f) // Rtop = 10K, Rbot = 1.5K 46 | #define ADC_TO_VOLTS (ADC_TO_VOLTAGE * ADC_VOLTS_SLOPE / ((1<<(ADC_VOLTS_PRECISION))+1)) 47 | 48 | #define ADC_MIN_SHUNT 0.05 // milli Ohms 49 | #define ADC_MAX_SHUNT 1.0 // milli Ohms 50 | #define ADC_MIN_ADVANCE 0.1 // electrical degrees 51 | #define ADC_MAX_ADVANCE 30.0 // electrical degrees 52 | #define ADC_MIN_BLANKING_MICROS 0 // us 53 | #define ADC_MAX_BLANKING_MICROS 100 // us 54 | #define ADC_MIN_MIN_PERIOD 20 // us 55 | #define ADC_MAX_MIN_PERIOD 500 // us 56 | #define ADC_MIN_MAX_PERIOD 1000 // us 57 | #define ADC_MAX_MAX_PERIOD 20000 // us 58 | 59 | #define ADC_HIST_SIZE 64 60 | #ifdef ADC_FAST_SAMPLE 61 | #define ADC_MIN_COMP 30 62 | #else 63 | #define ADC_MIN_COMP 15 64 | #endif 65 | #define ADC_CROSSING_TIMEOUT (250000*TIMER_MULT) 66 | 67 | //#define ADC_COMMUTATION_ADVANCE (0) // 0 deg 68 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/16) // 3.75 deg 69 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/8) // 7.5 deg 70 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/4) // 15 deg 71 | //#define ADC_COMMUTATION_ADVANCE (crossingPeriod/2) // 30 deg 72 | #define ADC_COMMUTATION_ADVANCE (crossingPeriod/adcAdvance) // variable 73 | 74 | extern float adcToAmps; 75 | extern int16_t adcAdvance; 76 | extern int32_t adcblankingMicros; 77 | extern int32_t adcMaxPeriod; 78 | extern int32_t adcMinPeriod; 79 | extern int32_t adcAmpsOffset; 80 | extern volatile int32_t adcAvgAmps; 81 | extern volatile int32_t adcMaxAmps; 82 | extern volatile int32_t adcAvgVolts; 83 | extern int16_t histSize; 84 | extern uint32_t avgA, avgB, avgC; 85 | extern volatile uint32_t detectedCrossing; 86 | extern volatile uint32_t crossingPeriod; 87 | extern volatile int32_t adcCrossingPeriod; 88 | 89 | extern void adcInit(void); 90 | extern void adcSetConstants(void); 91 | extern void adcSetCrossingPeriod(int32_t crossPer); 92 | extern int32_t adcGetInstantCurrent(void); 93 | 94 | #endif 95 | -------------------------------------------------------------------------------- /src/binary.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "binary.h" 20 | #include "serial.h" 21 | #include "run.h" 22 | #include "fet.h" 23 | #include "adc.h" 24 | #include "config.h" 25 | 26 | binaryCommandStruct_t commandBuf; 27 | uint32_t binaryLoop; 28 | uint16_t sendAck, sendNack; 29 | uint32_t binaryTelemRate; 30 | uint8_t binaryTelemetryStop; 31 | uint8_t binaryTelemRows; 32 | uint8_t binaryTelemCols; 33 | uint8_t outChkA, outChkB; 34 | uint8_t inChkA, inChkB; 35 | uint8_t binaryParseState; 36 | uint8_t binaryTelemValues[BINARY_VALUE_NUM]; 37 | 38 | uint8_t binaryGetChar(uint8_t checkSum) { 39 | uint8_t c; 40 | 41 | c = serialRead(); 42 | 43 | if (checkSum) { 44 | inChkA += c; 45 | inChkB += inChkA; 46 | } 47 | 48 | return c; 49 | } 50 | 51 | void binarySendChar(int ch) { 52 | serialWrite(ch); 53 | outChkA += ch; 54 | outChkB += outChkA; 55 | } 56 | 57 | void binarySendFloat(float f) { 58 | uint8_t j; 59 | uint8_t *c = (uint8_t *)&f; 60 | 61 | for (j = 0; j < sizeof(float); j++) 62 | binarySendChar(*c++); 63 | } 64 | 65 | void binarySendShort(uint16_t i) { 66 | uint8_t j; 67 | uint8_t *c = (uint8_t *)&i; 68 | 69 | for (j = 0; j < sizeof(uint16_t); j++) 70 | binarySendChar(*c++); 71 | } 72 | 73 | void binaryProcessAck(void) { 74 | while (sendAck || sendNack) { 75 | serialPrint("AqC"); 76 | outChkA = outChkB = 0; 77 | 78 | // (N)ACK + checksum chars 79 | binarySendChar(1 + 2); 80 | 81 | if (sendAck) { 82 | binarySendChar(BINARY_COMMAND_ACK); 83 | binarySendShort(sendAck); 84 | sendAck = 0; 85 | } 86 | else { 87 | binarySendChar(BINARY_COMMAND_NACK); 88 | binarySendShort(sendNack); 89 | sendNack = 0; 90 | } 91 | 92 | serialWrite(outChkA); 93 | serialWrite(outChkB); 94 | } 95 | } 96 | 97 | void binaryTelemSend(void) { 98 | uint8_t *c; 99 | int i; 100 | 101 | serialWrite(outChkA); 102 | serialWrite(outChkB); 103 | 104 | // process any (N)Acks between telemetry packets 105 | binaryProcessAck(); 106 | 107 | if (!binaryTelemetryStop) { 108 | serialPrint("AqT"); 109 | 110 | outChkA = outChkB = 0; 111 | 112 | binarySendChar(binaryTelemRows); // rows 113 | binarySendChar(binaryTelemCols); // cols 114 | } 115 | else { 116 | binaryTelemRate = 0; 117 | binaryTelemetryStop = 0; 118 | } 119 | } 120 | 121 | // TODO: yet to be implemented: 122 | // BINARY_COMMAND_PWM, 123 | // BINARY_COMMAND_STATUS, 124 | // BINARY_COMMAND_VERSION 125 | 126 | void binaryAck(void) { 127 | sendAck = commandBuf.seqId; 128 | } 129 | 130 | void binaryNack(void) { 131 | sendNack = commandBuf.seqId; 132 | } 133 | 134 | void binaryCommandParse(void) { 135 | switch (commandBuf.command) { 136 | 137 | case BINARY_COMMAND_NOP: 138 | binaryAck(); 139 | break; 140 | 141 | case BINARY_COMMAND_ARM: 142 | if (state == ESC_STATE_DISARMED) { 143 | inputMode = ESC_INPUT_UART; 144 | runArm(); 145 | binaryAck(); 146 | } 147 | else { 148 | binaryNack(); 149 | } 150 | break; 151 | 152 | case BINARY_COMMAND_CLI: 153 | if (state > ESC_STATE_STOPPED) { 154 | binaryNack(); 155 | } 156 | else { 157 | binaryTelemRate = 0; 158 | commandMode = CLI_MODE; 159 | binaryAck(); 160 | } 161 | break; 162 | 163 | case BINARY_COMMAND_DISARM: 164 | runDisarm(REASON_BINARY); 165 | binaryAck(); 166 | break; 167 | 168 | case BINARY_COMMAND_START: 169 | if (state == ESC_STATE_DISARMED || state > ESC_STATE_STOPPED) { 170 | binaryNack(); 171 | } 172 | else { 173 | runStart(); 174 | binaryAck(); 175 | } 176 | break; 177 | 178 | case BINARY_COMMAND_STOP: 179 | runStop(); 180 | binaryAck(); 181 | break; 182 | 183 | case BINARY_COMMAND_DUTY: 184 | if (runDuty(commandBuf.params[0])) 185 | binaryAck(); 186 | else 187 | binaryNack(); 188 | break; 189 | 190 | case BINARY_COMMAND_RPM: 191 | if (p[FF1TERM] != 0.0f) { 192 | float rpm = commandBuf.params[0]; 193 | 194 | if (rpm < 100.0f) 195 | rpm = 100.0f; 196 | else if (rpm > 10000.0f) 197 | rpm = 10000.0f; 198 | 199 | if (runMode != CLOSED_LOOP_RPM) { 200 | runRpmPIDReset(); 201 | runMode = CLOSED_LOOP_RPM; 202 | } 203 | targetRpm = rpm; 204 | 205 | binaryAck(); 206 | } 207 | else { 208 | binaryNack(); 209 | } 210 | break; 211 | 212 | case BINARY_COMMAND_TELEM_RATE: 213 | { 214 | int32_t freq = (int32_t)commandBuf.params[0]; 215 | 216 | if (freq >= 1.0f) { 217 | if (freq > 1000) 218 | freq = 1000; 219 | 220 | binaryTelemRate = 1000 / freq; 221 | binaryTelemRows = (freq <= 100) ? 1 : (freq / 50); 222 | binaryTelemetryStop = 0; 223 | 224 | // set initial output values 225 | if (binaryTelemCols == 0) { 226 | binaryTelemValues[0] = BINARY_VALUE_RPM; 227 | binaryTelemCols = 1; 228 | } 229 | } 230 | else { 231 | binaryTelemetryStop = 1; 232 | } 233 | 234 | binaryAck(); 235 | } 236 | break; 237 | 238 | case BINARY_COMMAND_TELEM_VALUE: 239 | if (commandBuf.params[0] < BINARY_VALUE_NUM && commandBuf.params[1] < BINARY_VALUE_NUM) { 240 | int i; 241 | 242 | binaryTelemValues[(int)commandBuf.params[0]] = commandBuf.params[1]; 243 | 244 | binaryTelemCols = 0; 245 | for (i = 0; i < BINARY_VALUE_NUM; i++) { 246 | if (binaryTelemValues[i] != BINARY_VALUE_NONE) 247 | binaryTelemCols = i+1; 248 | else 249 | break; 250 | } 251 | 252 | binaryAck(); 253 | } 254 | else { 255 | binaryNack(); 256 | } 257 | break; 258 | 259 | case BINARY_COMMAND_SET: 260 | if (state <= ESC_STATE_STOPPED && configSetParamByID((int)commandBuf.params[0], commandBuf.params[1])) { 261 | binaryAck(); 262 | } 263 | else { 264 | binaryNack(); 265 | } 266 | break; 267 | 268 | case BINARY_COMMAND_CONFIG: 269 | switch ((int)commandBuf.params[0]) { 270 | case 0: 271 | configReadFlash(); 272 | binaryAck(); 273 | break; 274 | case 1: 275 | if (configWriteFlash()) 276 | binaryAck(); 277 | else 278 | binaryNack(); 279 | break; 280 | case 2: 281 | configLoadDefault(); 282 | binaryAck(); 283 | break; 284 | } 285 | break; 286 | 287 | default: 288 | break; 289 | } 290 | 291 | // only if telem is not running 292 | if (!binaryTelemRate) 293 | binaryProcessAck(); 294 | 295 | } 296 | 297 | void binaryCommandRead(void) { 298 | static uint8_t n, i; 299 | uint8_t c; 300 | 301 | while (serialAvailable()) { 302 | c = binaryGetChar(binaryParseState < BINARY_STATE_CHKA); 303 | 304 | switch (binaryParseState) { 305 | case BINARY_STATE_SYNC1: 306 | if (c == 'A') 307 | binaryParseState = BINARY_STATE_SYNC2; 308 | break; 309 | 310 | case BINARY_STATE_SYNC2: 311 | if (c == 'q') { 312 | inChkA = inChkB = 0; 313 | binaryParseState = BINARY_STATE_SIZE; 314 | } 315 | else { 316 | binaryParseState = BINARY_STATE_SYNC1; 317 | } 318 | break; 319 | 320 | case BINARY_STATE_SIZE: 321 | n = c; 322 | i = 0; 323 | binaryParseState = BINARY_STATE_PAYLOAD; 324 | break; 325 | 326 | case BINARY_STATE_PAYLOAD: 327 | ((uint8_t *)&commandBuf)[i] = c; 328 | i++; 329 | 330 | if (i == n) 331 | binaryParseState = BINARY_STATE_CHKA; 332 | break; 333 | 334 | case BINARY_STATE_CHKA: 335 | if (inChkA != c) 336 | binaryParseState = BINARY_STATE_SYNC1; 337 | else 338 | binaryParseState = BINARY_STATE_CHKB; 339 | break; 340 | 341 | case BINARY_STATE_CHKB: 342 | if (inChkB == c) 343 | binaryCommandParse(); 344 | 345 | default: 346 | binaryParseState = BINARY_STATE_SYNC1; 347 | break; 348 | } 349 | } 350 | } 351 | 352 | void binaryCheck(void) { 353 | static int32_t telemRowsCount; 354 | 355 | binaryCommandRead(); 356 | 357 | if (binaryTelemRate && !(binaryLoop % binaryTelemRate)) { 358 | int i; 359 | 360 | // send telemetry data 361 | for (i = 0; i < BINARY_VALUE_NUM; i++) { 362 | if (binaryTelemValues[i] != BINARY_VALUE_NONE) { 363 | switch (binaryTelemValues[i]) { 364 | case BINARY_VALUE_AMPS: 365 | binarySendFloat(avgAmps); 366 | break; 367 | 368 | case BINARY_VALUE_VOLTS_BAT: 369 | binarySendFloat(avgVolts); 370 | break; 371 | 372 | case BINARY_VALUE_VOLTS_MOTOR: 373 | binarySendFloat((float)fetActualDutyCycle/fetPeriod*avgVolts); 374 | break; 375 | 376 | case BINARY_VALUE_RPM: 377 | binarySendFloat(rpm); 378 | break; 379 | 380 | case BINARY_VALUE_DUTY: 381 | binarySendFloat((float)fetActualDutyCycle/fetPeriod); 382 | break; 383 | 384 | case BINARY_VALUE_COMM_PERIOD: 385 | binarySendFloat((float)(crossingPeriod/TIMER_MULT)); 386 | break; 387 | 388 | case BINARY_VALUE_BAD_DETECTS: 389 | binarySendFloat((float)fetTotalBadDetects); 390 | break; 391 | 392 | case BINARY_VALUE_ADC_WINDOW: 393 | binarySendFloat((float)histSize); 394 | break; 395 | 396 | case BINARY_VALUE_IDLE_PERCENT: 397 | binarySendFloat(idlePercent); 398 | break; 399 | 400 | case BINARY_VALUE_STATE: 401 | binarySendFloat((float)state); 402 | break; 403 | 404 | case BINARY_VALUE_AVGA: 405 | binarySendFloat((float)avgA); 406 | break; 407 | 408 | case BINARY_VALUE_AVGB: 409 | binarySendFloat((float)avgB); 410 | break; 411 | 412 | case BINARY_VALUE_AVGC: 413 | binarySendFloat((float)avgC); 414 | break; 415 | 416 | case BINARY_VALUE_AVGCOMP: 417 | binarySendFloat((float)(avgA+avgB+avgC)/3); 418 | break; 419 | 420 | case BINARY_VALUE_FETSTEP: 421 | binarySendFloat((float)fetStep); 422 | break; 423 | } 424 | } 425 | else { 426 | break; 427 | } 428 | } 429 | telemRowsCount++; 430 | 431 | if (telemRowsCount == binaryTelemRows) { 432 | binaryTelemSend(); 433 | telemRowsCount = 0; 434 | } 435 | } 436 | 437 | binaryLoop++; 438 | } -------------------------------------------------------------------------------- /src/binary.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _BINARY_H 20 | #define _BINARY_H 21 | 22 | #include "main.h" 23 | 24 | enum binaryParseStates { 25 | BINARY_STATE_SYNC1 = 0, 26 | BINARY_STATE_SYNC2, 27 | BINARY_STATE_SIZE, 28 | BINARY_STATE_PAYLOAD, 29 | BINARY_STATE_CHKA, 30 | BINARY_STATE_CHKB 31 | }; 32 | 33 | enum binaryCommands { 34 | BINARY_COMMAND_NOP = 0, 35 | BINARY_COMMAND_ARM, 36 | BINARY_COMMAND_CLI, 37 | BINARY_COMMAND_CONFIG, 38 | BINARY_COMMAND_DISARM, 39 | BINARY_COMMAND_DUTY, 40 | BINARY_COMMAND_PWM, 41 | BINARY_COMMAND_RPM, 42 | BINARY_COMMAND_SET, 43 | BINARY_COMMAND_START, 44 | BINARY_COMMAND_STATUS, 45 | BINARY_COMMAND_STOP, 46 | BINARY_COMMAND_TELEM_RATE, 47 | BINARY_COMMAND_VERSION, 48 | BINARY_COMMAND_TELEM_VALUE, 49 | BINARY_COMMAND_ACK = 250, 50 | BINARY_COMMAND_NACK 51 | }; 52 | 53 | enum binaryValues { 54 | BINARY_VALUE_NONE = 0, 55 | BINARY_VALUE_AMPS, 56 | BINARY_VALUE_VOLTS_BAT, 57 | BINARY_VALUE_VOLTS_MOTOR, 58 | BINARY_VALUE_RPM, 59 | BINARY_VALUE_DUTY, 60 | BINARY_VALUE_COMM_PERIOD, 61 | BINARY_VALUE_BAD_DETECTS, 62 | BINARY_VALUE_ADC_WINDOW, 63 | BINARY_VALUE_IDLE_PERCENT, 64 | BINARY_VALUE_STATE, 65 | BINARY_VALUE_AVGA, 66 | BINARY_VALUE_AVGB, 67 | BINARY_VALUE_AVGC, 68 | BINARY_VALUE_AVGCOMP, 69 | BINARY_VALUE_FETSTEP, 70 | BINARY_VALUE_NUM 71 | }; 72 | 73 | typedef struct { 74 | uint8_t command; 75 | uint16_t seqId; 76 | float params[2]; 77 | } __attribute__((packed)) binaryCommandStruct_t; 78 | 79 | extern void binaryCheck(void); 80 | extern void configRecalcConst(void); 81 | 82 | #endif -------------------------------------------------------------------------------- /src/buildnum.h: -------------------------------------------------------------------------------- 1 | #define BUILDNUMBER 5299 -------------------------------------------------------------------------------- /src/cli.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _CLI_H 20 | #define _CLI_H 21 | 22 | #define CLI_INTR 3 // interrupt 23 | #define CLI_BELL 7 // bell 24 | #define CLI_BS 127 // backspace 25 | 26 | typedef struct { 27 | char *name; 28 | char *params; 29 | void (*cmdFunc)(void *cmd, char *cmdLine); 30 | } cliCommand_t; 31 | 32 | extern char version[16]; 33 | 34 | extern void cliInit(void); 35 | extern void cliCheck(void); 36 | extern void cliFuncArm(void *cmd, char *cmdLine); 37 | extern void cliFuncBeep(void *cmd, char *cmdLine); 38 | extern void cliFuncBinary(void *cmd, char *cmdLine); 39 | extern void cliFuncBoot(void *cmd, char *cmdLine); 40 | extern void cliFuncConfig(void *cmd, char *cmdLine); 41 | extern void cliFuncDisarm(void *cmd, char *cmdLine); 42 | extern void cliFuncDuty(void *cmd, char *cmdLine); 43 | extern void cliFuncHelp(void *cmd, char *cmdLine); 44 | extern void cliFuncInput(void *cmd, char *cmdLine); 45 | extern void cliFuncMode(void *cmd, char *cmdLine); 46 | extern void cliFuncPwm(void *cmd, char *cmdLine); 47 | extern void cliFuncRpm(void *cmd, char *cmdLine); 48 | extern void cliFuncSet(void *cmd, char *cmdLine); 49 | extern void cliFuncStart(void *cmd, char *cmdLine); 50 | extern void cliFuncStatus(void *cmd, char *cmdLine); 51 | extern void cliFuncStop(void *cmd, char *cmdLine); 52 | extern void cliFuncTelemetry(void *cmd, char *cmdLine); 53 | extern void cliFuncVer(void *cmd, char *cmdLine); 54 | 55 | #endif 56 | -------------------------------------------------------------------------------- /src/config.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012, 2013 Bill Nesbitt 17 | */ 18 | 19 | #include "config.h" 20 | #include "fet.h" 21 | #include "pwm.h" 22 | #include "adc.h" 23 | #include "run.h" 24 | #include "serial.h" 25 | #include "stm32f10x_flash.h" 26 | #include "stm32f10x_rcc.h" 27 | #include 28 | #include 29 | 30 | float p[CONFIG_NUM_PARAMS]; 31 | 32 | const char *configParameterStrings[] = { 33 | "CONFIG_VERSION", 34 | "STARTUP_MODE", 35 | "BAUD_RATE", 36 | "PTERM", 37 | "ITERM", 38 | "FF1TERM", 39 | "FF2TERM", 40 | "CL1TERM", 41 | "CL2TERM", 42 | "CL3TERM", 43 | "CL4TERM", 44 | "CL5TERM", 45 | "SHUNT_RESISTANCE", 46 | "MIN_PERIOD", 47 | "MAX_PERIOD", 48 | "BLANKING_MICROS", 49 | "ADVANCE", 50 | "START_VOLTAGE", 51 | "GOOD_DETECTS_START", 52 | "BAD_DETECTS_DISARM", 53 | "MAX_CURRENT", 54 | "SWITCH_FREQ", 55 | "MOTOR_POLES", 56 | "PWM_MIN_PERIOD", 57 | "PWM_MAX_PERIOD", 58 | "PWM_MIN_VALUE", 59 | "PWM_LO_VALUE", 60 | "PWM_HI_VALUE", 61 | "PWM_MAX_VALUE", 62 | "PWM_MIN_START", 63 | "PWM_RPM_SCALE", 64 | "FET_BRAKING", 65 | "PNFAC", 66 | "INFAC", 67 | "THR1TERM", 68 | "THR2TERM", 69 | "START_ALIGN_TIME", 70 | "START_ALIGN_VOLTAGE", 71 | "START_STEPS_NUM", 72 | "START_STEPS_PERIOD", 73 | "START_STEPS_ACCEL", 74 | "PWM_LOWPASS", 75 | "RPM_MEAS_LP" 76 | }; 77 | 78 | const char *configFormatStrings[] = { 79 | "%f", // CONFIG_VERSION 80 | "%.0f", // STARTUP_MODE 81 | "%.0f baud", // BAUD_RATE 82 | "%.3f", // PTERM 83 | "%.5f", // ITERM 84 | "%+e", // FF1TERM 85 | "%+e", // FF2TERM 86 | "%+e", // CL1TERM 87 | "%+e", // CL2TERM 88 | "%+e", // CL3TERM 89 | "%+e", // CL4TERM 90 | "%+e", // CL5TERM 91 | "%.3f mohms", // SHUNT_RESISTANCE 92 | "%.0f us", // MIN_PERIOD 93 | "%.0f us", // MAX_PERIOD 94 | "%.0f us", // BLANKING_MICROS 95 | "%.2f Degs", // ADVANCE 96 | "%.2f Volts", // START_VOLTAGE 97 | "%.0f", // GOOD_DETECTS_START 98 | "%.0f", // BAD_DETECTS_DISARM 99 | "%.1f Amps", // MAX_CURRENT 100 | "%.1f KHz", // SWITCH_FREQ 101 | "%.0f", // MOTOR_POLES 102 | "%.0f us", // PWM_MIN_PERIOD 103 | "%.0f us", // PWM_MAX_PERIOD 104 | "%.0f us", // PWM_MIN_VALUE 105 | "%.0f us", // PWM_LO_VALUE 106 | "%.0f us", // PWM_HI_VALUE 107 | "%.0f us", // PWM_MAX_VALUE 108 | "%.0f us", // PWM_MIN_START 109 | "%.0f RPM", // PWM_RPM_SCALE 110 | "%.0f", // FET_BRAKING 111 | "%.2f", // PNFAC 112 | "%.2f", // INFAC 113 | "%+e", // THR1TERM 114 | "%+e", // THR2TERM 115 | "%.0f ms", // START_ALIGN_TIME 116 | "%.2f Volts", // START_ALIGN_VOLTAGE 117 | "%.0f", // START_STEPS_NUM 118 | "%.0f us", // START_STEPS_PERIOD 119 | "%.0f us", // START_STEPS_ACCEL 120 | "%2.2f", // PWM_LOWPASS 121 | "%.3f" // RPM_MEAS_LP 122 | }; 123 | 124 | void configInit(void) { 125 | float ver; 126 | 127 | configLoadDefault(); 128 | 129 | ver = *(float *)FLASH_WRITE_ADDR; 130 | 131 | if (isnan(ver)) 132 | configWriteFlash(); 133 | else if (ver >= p[CONFIG_VERSION]) 134 | configReadFlash(); 135 | else if (p[CONFIG_VERSION] > ver) 136 | configWriteFlash(); 137 | } 138 | 139 | // recalculate constants with bounds checking 140 | void configRecalcConst(void) { 141 | adcSetConstants(); 142 | fetSetConstants(); 143 | runSetConstants(); 144 | pwmSetConstants(); 145 | serialSetConstants(); 146 | } 147 | 148 | int configSetParamByID(int i, float value) { 149 | int ret = 0; 150 | 151 | if (i >= 0 && i < CONFIG_NUM_PARAMS) { 152 | p[i] = value; 153 | configRecalcConst(); 154 | 155 | ret = 1; 156 | } 157 | 158 | return ret; 159 | } 160 | 161 | int configSetParam(char *param, float value) { 162 | int ret = 0; 163 | int i; 164 | 165 | for (i = 0; i < CONFIG_NUM_PARAMS; i++) { 166 | if (!strncasecmp(configParameterStrings[i], param, strlen(configParameterStrings[i]))) { 167 | configSetParamByID(i, value); 168 | ret = 1; 169 | break; 170 | } 171 | } 172 | 173 | return ret; 174 | } 175 | 176 | int configGetId(char *param) { 177 | int i; 178 | 179 | for (i = 0; i < CONFIG_NUM_PARAMS; i++) 180 | if (!strncasecmp(configParameterStrings[i], param, strlen(configParameterStrings[i]))) 181 | return i; 182 | 183 | return -1; 184 | } 185 | 186 | float configGetParam(char *param) { 187 | int i; 188 | 189 | i = configGetId(param); 190 | 191 | if (i >= 0) 192 | return p[i]; 193 | else 194 | return NAN; 195 | } 196 | 197 | void configLoadDefault(void) { 198 | p[CONFIG_VERSION] = DEFAULT_CONFIG_VERSION; 199 | p[STARTUP_MODE] = DEFAULT_STARTUP_MODE; 200 | p[BAUD_RATE] = DEFAULT_BAUD_RATE; 201 | p[PTERM] = DEFAULT_PTERM; 202 | p[ITERM] = DEFAULT_ITERM; 203 | p[FF1TERM] = DEFAULT_FF1TERM; 204 | p[FF2TERM] = DEFAULT_FF2TERM; 205 | p[CL1TERM] = DEFAULT_CL1TERM; 206 | p[CL2TERM] = DEFAULT_CL2TERM; 207 | p[CL3TERM] = DEFAULT_CL3TERM; 208 | p[CL4TERM] = DEFAULT_CL4TERM; 209 | p[CL5TERM] = DEFAULT_CL5TERM; 210 | p[SHUNT_RESISTANCE] = DEFAULT_SHUNT_RESISTANCE; 211 | p[MIN_PERIOD] = DEFAULT_MIN_PERIOD; 212 | p[MAX_PERIOD] = DEFAULT_MAX_PERIOD; 213 | p[BLANKING_MICROS] = DEFAULT_BLANKING_MICROS; 214 | p[ADVANCE] = DEFAULT_ADVANCE; 215 | p[START_VOLTAGE] = DEFAULT_START_VOLTAGE; 216 | p[GOOD_DETECTS_START] = DEFAULT_GOOD_DETECTS_START; 217 | p[BAD_DETECTS_DISARM] = DEFAULT_BAD_DETECTS_DISARM; 218 | p[MAX_CURRENT] = DEFAULT_MAX_CURRENT; 219 | p[SWITCH_FREQ] = DEFAULT_SWITCH_FREQ; 220 | p[MOTOR_POLES] = DEFAULT_MOTOR_POLES; 221 | p[PWM_MIN_PERIOD] = DEFAULT_PWM_MIN_PERIOD; 222 | p[PWM_MAX_PERIOD] = DEFAULT_PWM_MAX_PERIOD; 223 | p[PWM_MIN_VALUE] = DEFAULT_PWM_MIN_VALUE; 224 | p[PWM_LO_VALUE] = DEFAULT_PWM_LO_VALUE; 225 | p[PWM_HI_VALUE] = DEFAULT_PWM_HI_VALUE; 226 | p[PWM_MAX_VALUE] = DEFAULT_PWM_MAX_VALUE; 227 | p[PWM_MIN_START] = DEFAULT_PWM_MIN_START; 228 | p[PWM_RPM_SCALE] = DEFAULT_PWM_RPM_SCALE; 229 | p[FET_BRAKING] = DEFAULT_FET_BRAKING; 230 | p[PNFAC] = DEFAULT_PNFAC; 231 | p[INFAC] = DEFAULT_INFAC; 232 | p[THR1TERM] = DEFAULT_THR1TERM; 233 | p[THR2TERM] = DEFAULT_THR2TERM; 234 | p[START_ALIGN_TIME] = DEFAULT_START_ALIGN_TIME; 235 | p[START_ALIGN_VOLTAGE] = DEFAULT_START_ALIGN_VOLTAGE; 236 | p[START_STEPS_NUM] = DEFAULT_START_STEPS_NUM; 237 | p[START_STEPS_PERIOD] = DEFAULT_START_STEPS_PERIOD; 238 | p[START_STEPS_ACCEL] = DEFAULT_START_STEPS_ACCEL; 239 | p[PWM_LOWPASS] = DEFAULT_PWM_LOWPASS; 240 | p[RPM_MEAS_LP] = DEFAULT_RPM_MEAS_LP; 241 | 242 | configRecalcConst(); 243 | } 244 | 245 | int configWriteFlash(void) { 246 | uint16_t prevReloadVal; 247 | FLASH_Status FLASHStatus; 248 | uint32_t address; 249 | int ret = 0; 250 | 251 | prevReloadVal = runIWDGInit(999); 252 | 253 | // Startup HSI clock 254 | RCC_HSICmd(ENABLE); 255 | while (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) != SET) 256 | runFeedIWDG(); 257 | 258 | FLASH_Unlock(); 259 | 260 | FLASH_ClearFlag(FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPRTERR); 261 | 262 | if ((FLASHStatus = FLASH_ErasePage(FLASH_WRITE_ADDR)) == FLASH_COMPLETE) { 263 | address = 0; 264 | while (FLASHStatus == FLASH_COMPLETE && address < sizeof(p)) { 265 | if ((FLASHStatus = FLASH_ProgramWord(FLASH_WRITE_ADDR + address, *(uint32_t *)((char *)p + address))) != FLASH_COMPLETE) 266 | break; 267 | 268 | address += 4; 269 | } 270 | 271 | ret = 1; 272 | } 273 | 274 | FLASH_Lock(); 275 | 276 | runFeedIWDG(); 277 | 278 | // Shutdown HSI clock 279 | RCC_HSICmd(DISABLE); 280 | while (RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == SET) 281 | ; 282 | 283 | runIWDGInit(prevReloadVal); 284 | 285 | return ret; 286 | } 287 | 288 | void configReadFlash(void) { 289 | memcpy(p, (char *)FLASH_WRITE_ADDR, sizeof(p)); 290 | 291 | configRecalcConst(); 292 | } 293 | -------------------------------------------------------------------------------- /src/config.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012, 2013 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _CONFIG_H 20 | #define _CONFIG_H 21 | 22 | #define DEFAULT_CONFIG_VERSION 1.486f 23 | #define DEFAULT_STARTUP_MODE 0.0f 24 | #define DEFAULT_BAUD_RATE 230400 25 | 26 | #define DEFAULT_PTERM 0.25f 27 | #define DEFAULT_PNFAC 10.0f 28 | #define DEFAULT_ITERM 0.0006f 29 | #define DEFAULT_INFAC 0.15f 30 | 31 | #define DEFAULT_FF1TERM 0.0f 32 | #define DEFAULT_FF2TERM 0.0f 33 | 34 | #define DEFAULT_CL1TERM 0.0f 35 | #define DEFAULT_CL2TERM 0.0f 36 | #define DEFAULT_CL3TERM 0.0f 37 | #define DEFAULT_CL4TERM 0.0f 38 | #define DEFAULT_CL5TERM 0.0f 39 | 40 | #define DEFAULT_THR1TERM 0.0f 41 | #define DEFAULT_THR2TERM 1.0f 42 | 43 | #define DEFAULT_SHUNT_RESISTANCE 0.5f // milli Ohms 44 | #define DEFAULT_MIN_PERIOD 50.0f // us 45 | #define DEFAULT_MAX_PERIOD 12000.0f // us 46 | #define DEFAULT_BLANKING_MICROS 30.0f // us 47 | #define DEFAULT_ADVANCE 10.0f // electrical degrees 48 | #define DEFAULT_START_VOLTAGE 1.1f // voltage used to start motor 49 | #define DEFAULT_START_ALIGN_TIME 600 // ms to align rotor in known position 50 | #define DEFAULT_START_ALIGN_VOLTAGE 0.9f // max voltage during align (around 0.8 * START_VOLTAGE) 51 | #define DEFAULT_START_STEPS_NUM 0.0f // steps without commutation 52 | #define DEFAULT_START_STEPS_PERIOD 16000 // us betweet steps 53 | #define DEFAULT_START_STEPS_ACCEL 0.0f // us each following step will be shorter (acceleration) 54 | #define DEFAULT_GOOD_DETECTS_START 75.0f // after which will go into RUNNING mode 55 | #define DEFAULT_BAD_DETECTS_DISARM 48.0f // after which will go into DISARMED mode 56 | #define DEFAULT_MAX_CURRENT 20.0f // amps 57 | #define DEFAULT_SWITCH_FREQ 20.0f // output PWM frequency in KHz 58 | #define DEFAULT_MOTOR_POLES 14.0f 59 | 60 | #define DEFAULT_PWM_MIN_PERIOD 2200 // minimum valid period 61 | #define DEFAULT_PWM_MAX_PERIOD 25000 // maximum valid period 62 | 63 | #define DEFAULT_PWM_MIN_VALUE 750 // minimum to consider pulse a valid signal 64 | #define DEFAULT_PWM_LO_VALUE 1000 // lowest running value 65 | #define DEFAULT_PWM_HI_VALUE 1950 // highest running value 66 | #define DEFAULT_PWM_MAX_VALUE 2250 // maximum to consider pulse a valid signal 67 | #define DEFAULT_PWM_MIN_START 1100 // minimum value required to start 68 | 69 | #define DEFAULT_PWM_LOWPASS 0.0f // lowpass on PWM input values (0 = none, 10 = heavy, no upper limit) 70 | #define DEFAULT_RPM_MEAS_LP 0.5f // lowpass measured RPM values for closed loop control (0 = none, 0.99 = max, >=1 not allowed) 71 | 72 | #define DEFAULT_PWM_RPM_SCALE 6500 // RPM equivalent of maximum PWM IN in CLOSED_LOOP mode 73 | 74 | #define DEFAULT_FET_BRAKING 0 75 | 76 | #define FLASH_PAGE_SIZE ((uint16_t)0x400) 77 | #define FLASH_WRITE_ADDR (0x08000000 + (uint32_t)FLASH_PAGE_SIZE * 63) // use the last KB for storage 78 | 79 | enum configParameters { 80 | CONFIG_VERSION = 0, 81 | STARTUP_MODE, 82 | BAUD_RATE, 83 | PTERM, 84 | ITERM, 85 | FF1TERM, 86 | FF2TERM, 87 | CL1TERM, 88 | CL2TERM, 89 | CL3TERM, 90 | CL4TERM, 91 | CL5TERM, 92 | SHUNT_RESISTANCE, 93 | MIN_PERIOD, 94 | MAX_PERIOD, 95 | BLANKING_MICROS, 96 | ADVANCE, 97 | START_VOLTAGE, 98 | GOOD_DETECTS_START, 99 | BAD_DETECTS_DISARM, 100 | MAX_CURRENT, 101 | SWITCH_FREQ, 102 | MOTOR_POLES, 103 | PWM_MIN_PERIOD, 104 | PWM_MAX_PERIOD, 105 | PWM_MIN_VALUE, 106 | PWM_LO_VALUE, 107 | PWM_HI_VALUE, 108 | PWM_MAX_VALUE, 109 | PWM_MIN_START, 110 | PWM_RPM_SCALE, 111 | FET_BRAKING, 112 | PNFAC, 113 | INFAC, 114 | THR1TERM, 115 | THR2TERM, 116 | START_ALIGN_TIME, 117 | START_ALIGN_VOLTAGE, 118 | START_STEPS_NUM, 119 | START_STEPS_PERIOD, 120 | START_STEPS_ACCEL, 121 | PWM_LOWPASS, 122 | RPM_MEAS_LP, 123 | CONFIG_NUM_PARAMS 124 | }; 125 | 126 | extern float p[CONFIG_NUM_PARAMS]; 127 | extern const char *configParameterStrings[]; 128 | extern const char *configFormatStrings[]; 129 | 130 | extern void configInit(void); 131 | extern int configSetParam(char *param, float value); 132 | extern int configSetParamByID(int i, float value); 133 | extern int configGetId(char *param); 134 | extern float configGetParam(char *param); 135 | extern void configLoadDefault(void); 136 | extern void configReadFlash(void); 137 | extern int configWriteFlash(void); 138 | 139 | #endif 140 | -------------------------------------------------------------------------------- /src/digital.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "digital.h" 20 | #include 21 | 22 | digitalPin *digitalInit(GPIO_TypeDef* port, const uint16_t pin) { 23 | digitalPin *p; 24 | uint16_t clock; 25 | GPIO_InitTypeDef GPIO_InitStructure; 26 | 27 | p = (digitalPin *)calloc(1, sizeof(digitalPin)); 28 | p->port = port; 29 | p->pin = pin; 30 | 31 | digitalLo(p); 32 | 33 | GPIO_InitStructure.GPIO_Pin = pin; 34 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 35 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; 36 | GPIO_Init(port, &GPIO_InitStructure); 37 | 38 | return p; 39 | } 40 | 41 | void digitalTogg(digitalPin *p) { 42 | if (digitalGet(p)) { 43 | digitalLo(p); 44 | } 45 | else { 46 | digitalHi(p); 47 | } 48 | } 49 | -------------------------------------------------------------------------------- /src/digital.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _DIGITAL_H 20 | #define _DIGITAL_H 21 | 22 | #include "stm32f10x_gpio.h" 23 | 24 | typedef struct { 25 | GPIO_TypeDef* port; 26 | uint16_t pin; 27 | } digitalPin; 28 | 29 | #define digitalHi(p) { p->port->BSRR = p->pin; } 30 | #define digitalLo(p) { p->port->BRR = p->pin; } 31 | #define digitalGet(p) ((p->port->ODR & p->pin) != 0) 32 | 33 | extern digitalPin *digitalInit(GPIO_TypeDef* port, const uint16_t pin); 34 | extern void digitalTogg(digitalPin *p); 35 | 36 | #endif 37 | -------------------------------------------------------------------------------- /src/fet.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012, 2013 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _FET_H 20 | #define _FET_H 21 | 22 | #include "stm32f10x_gpio.h" 23 | 24 | #define FET_A_L_PORT GPIOA 25 | #define FET_B_L_PORT GPIOB 26 | #define FET_C_L_PORT GPIOB 27 | #define FET_A_H_PORT GPIOB 28 | #define FET_B_H_PORT GPIOB 29 | #define FET_C_H_PORT GPIOB 30 | 31 | #define FET_A_L_PIN GPIO_Pin_7 32 | #define FET_B_L_PIN GPIO_Pin_0 33 | #define FET_C_L_PIN GPIO_Pin_1 34 | #define FET_A_H_PIN GPIO_Pin_6 35 | #define FET_B_H_PIN GPIO_Pin_7 36 | #define FET_C_H_PIN GPIO_Pin_8 37 | 38 | #define AL_ON FET_A_L_PIN 39 | #define BL_ON FET_B_L_PIN 40 | #define CL_ON FET_C_L_PIN 41 | #define AL_OFF (FET_A_L_PIN<<16) 42 | #define BL_OFF (FET_B_L_PIN<<16) 43 | #define CL_OFF (FET_C_L_PIN<<16) 44 | 45 | #define AH_ON FET_A_H_PIN 46 | #define BH_ON FET_B_H_PIN 47 | #define CH_ON FET_C_H_PIN 48 | #define AH_OFF (FET_A_H_PIN<<16) 49 | #define BH_OFF (FET_B_H_PIN<<16) 50 | #define CH_OFF (FET_C_H_PIN<<16) 51 | 52 | // bit band address turn switch on or off PWM output 53 | // HI side 54 | #define AH_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (27*4))) 55 | #define BH_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (31*4))) 56 | #define CH_BITBAND ((uint32_t *)(0x42000000 + (0x10C04*32) + (3*4))) 57 | // LO side 58 | #define AL_BITBAND ((uint32_t *)(0x42000000 + (0x10800*32) + (31*4))) 59 | #define BL_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (3*4))) 60 | #define CL_BITBAND ((uint32_t *)(0x42000000 + (0x10C00*32) + (7*4))) 61 | 62 | #define FET_MASTER_TIMER TIM3 63 | #define FET_MASTER_DBGMCU_STOP DBGMCU_TIM3_STOP 64 | 65 | #define FET_H_TIMER TIM4 66 | #define FET_H_TIMER_REMAP 67 | #define FET_H_TIMER_MASTER TIM_TS_ITR2 // TIM3 68 | #define FET_DBGMCU_STOP DBGMCU_TIM4_STOP 69 | #define FET_AHB_FREQ (SystemCoreClock/2) // 36Mhz 70 | 71 | // HI side timer channels 72 | #define FET_A_H_CHANNEL CCR1 73 | #define FET_B_H_CHANNEL CCR2 74 | #define FET_C_H_CHANNEL CCR3 75 | 76 | // LO side timer channels 77 | #define FET_A_L_CHANNEL CCR2 78 | #define FET_B_L_CHANNEL CCR3 79 | #define FET_C_L_CHANNEL CCR4 80 | 81 | #define FET_MIN_SWITCH_FREQ 4 // KHz 82 | #define FET_MAX_SWITCH_FREQ 64 // KHz 83 | #define FET_MIN_START_VOLTAGE 0.1 // % 84 | #define FET_MAX_START_VOLTAGE 3.0 // % 85 | #define FET_MIN_START_DETECTS 1 86 | #define FET_MAX_START_DETECTS 512 87 | #define FET_MIN_DISARM_DETECTS 1 88 | #define FET_MAX_DISARM_DETECTS 512 89 | #define FET_MIN_LIMIT_STEP 0.1 // % 90 | #define FET_MAX_LIMIT_STEP 100.0 // % 91 | 92 | #define FET_PANIC { \ 93 | *AH_BITBAND = 0; \ 94 | *BH_BITBAND = 0; \ 95 | *CH_BITBAND = 0; \ 96 | FET_A_L_PORT->BSRR = AL_OFF; \ 97 | FET_B_L_PORT->BSRR = BL_OFF; \ 98 | FET_C_L_PORT->BSRR = CL_OFF; \ 99 | } 100 | 101 | enum fetSelfTestResults { 102 | FET_TEST_NOT_RUN = 0, 103 | FET_TEST_PASSED, 104 | FET_TEST_A_LO_FAIL, 105 | FET_TEST_B_LO_FAIL, 106 | FET_TEST_C_LO_FAIL, 107 | FET_TEST_A_HI_FAIL, 108 | FET_TEST_B_HI_FAIL, 109 | FET_TEST_C_HI_FAIL 110 | }; 111 | 112 | extern int32_t fetSwitchFreq; 113 | extern int32_t fetStartDuty; 114 | extern int16_t fetStartDetects; 115 | extern int16_t fetDisarmDetects; 116 | 117 | extern volatile uint8_t fetStep; 118 | extern volatile uint8_t fetNextStep; 119 | extern volatile uint32_t fetBadDetects; 120 | extern volatile uint32_t fetGoodDetects; 121 | extern volatile uint32_t fetTotalBadDetects; 122 | extern int32_t fetActualDutyCycle; 123 | extern volatile int32_t fetDutyCycle; 124 | extern int32_t fetPeriod; 125 | extern volatile uint32_t fetCommutationMicros; 126 | extern int8_t fetBrakingEnabled; 127 | extern int8_t fetBraking; 128 | 129 | extern void fetInit(void); 130 | extern uint8_t fetSelfTest(void); 131 | extern void fetBeep(uint16_t freq, uint16_t duration); 132 | extern void fetCommutate(int unused); 133 | extern void fetSetStep(int n); 134 | extern void fetSetDutyCycle(int32_t dutyCycle); 135 | extern void motorStartSeqInit (void); 136 | extern void motorStartSeq (int period); 137 | extern void fetStartCommutation(uint8_t startStep); 138 | extern void fetSetConstants(void); 139 | extern void fetSetBraking(int8_t value); 140 | extern void _fetSetDutyCycle(int32_t dutyCycle); 141 | 142 | #endif 143 | -------------------------------------------------------------------------------- /src/getbuildnum.c: -------------------------------------------------------------------------------- 1 | #include "getbuildnum.h" 2 | #include "buildnum.h" 3 | 4 | unsigned getBuildNumber() { 5 | return BUILDNUMBER; 6 | } -------------------------------------------------------------------------------- /src/getbuildnum.h: -------------------------------------------------------------------------------- 1 | #ifndef GETBUILDNUM_H 2 | #define GETBUILDNUM_H 3 | 4 | extern unsigned getBuildNumber(); 5 | 6 | #endif -------------------------------------------------------------------------------- /src/main.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "main.h" 20 | #include "rcc.h" 21 | #include "config.h" 22 | #include "timer.h" 23 | #include "fet.h" 24 | #include "serial.h" 25 | #include "pwm.h" 26 | #include "adc.h" 27 | #include "run.h" 28 | #include "cli.h" 29 | #include "ow.h" 30 | 31 | digitalPin *errorLed, *statusLed; 32 | #ifdef ESC_DEBUG 33 | digitalPin *tp; 34 | #endif 35 | 36 | volatile uint32_t minCycles, idleCounter, totalCycles; 37 | volatile uint8_t state, inputMode; 38 | 39 | char buf[64]; 40 | 41 | void main(void) { 42 | rccInit(); 43 | timerInit(); 44 | configInit(); 45 | adcInit(); 46 | fetInit(); 47 | serialInit(); 48 | runInit(); 49 | cliInit(); 50 | owInit(); 51 | 52 | runDisarm(REASON_STARTUP); 53 | inputMode = ESC_INPUT_PWM; 54 | 55 | fetSetDutyCycle(0); 56 | fetBeep(200, 100); 57 | fetBeep(300, 100); 58 | fetBeep(400, 100); 59 | fetBeep(500, 100); 60 | fetBeep(400, 100); 61 | fetBeep(300, 100); 62 | fetBeep(200, 100); 63 | 64 | pwmInit(); 65 | 66 | statusLed = digitalInit(GPIO_STATUS_LED_PORT, GPIO_STATUS_LED_PIN); 67 | digitalHi(statusLed); 68 | errorLed = digitalInit(GPIO_ERROR_LED_PORT, GPIO_ERROR_LED_PIN); 69 | digitalHi(errorLed); 70 | #ifdef ESC_DEBUG 71 | tp = digitalInit(GPIO_TP_PORT, GPIO_TP_PIN); 72 | digitalLo(tp); 73 | #endif 74 | 75 | // self calibrating idle timer loop 76 | { 77 | volatile unsigned long cycles; 78 | volatile unsigned int *DWT_CYCCNT = (int *)0xE0001004; 79 | volatile unsigned int *DWT_CONTROL = (int *)0xE0001000; 80 | volatile unsigned int *SCB_DEMCR = (int *)0xE000EDFC; 81 | 82 | *SCB_DEMCR = *SCB_DEMCR | 0x01000000; 83 | *DWT_CONTROL = *DWT_CONTROL | 1; // enable the counter 84 | 85 | minCycles = 0xffff; 86 | while (1) { 87 | idleCounter++; 88 | 89 | NOPS_4; 90 | 91 | cycles = *DWT_CYCCNT; 92 | *DWT_CYCCNT = 0; // reset the counter 93 | 94 | // record shortest number of instructions for loop 95 | totalCycles += cycles; 96 | if (cycles < minCycles) 97 | minCycles = cycles; 98 | } 99 | } 100 | } 101 | 102 | #ifdef USE_FULL_ASSERT 103 | void assert_failed(uint8_t* file, uint32_t line) { 104 | /* User can add his own implementation to report the file name and line number, 105 | ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ 106 | 107 | while (1) { 108 | NOP; 109 | } 110 | } 111 | #endif 112 | 113 | void HardFault_Handler(void) { 114 | FET_PANIC; 115 | while (1) 116 | ; 117 | } 118 | 119 | void MemManage_Handler(void) { 120 | FET_PANIC; 121 | while (1) 122 | ; 123 | } 124 | 125 | void BusFault_Handler(void) { 126 | FET_PANIC; 127 | while (1) 128 | ; 129 | } 130 | 131 | void UsageFault_Handler(void) { 132 | FET_PANIC; 133 | while (1) 134 | ; 135 | } 136 | 137 | void reset_wait(void) { 138 | FET_PANIC; 139 | while (1) 140 | ; 141 | } 142 | 143 | 144 | -------------------------------------------------------------------------------- /src/main.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _MAIN_H 20 | #define _MAIN_H 21 | 22 | #define VERSION "1.4.2" 23 | 24 | #include "digital.h" 25 | 26 | #define ESC_DEBUG // uncomment to include debugging code 27 | 28 | #define GPIO_ERROR_LED_PORT GPIOB 29 | #define GPIO_ERROR_LED_PIN GPIO_Pin_4 30 | #define GPIO_STATUS_LED_PORT GPIOB 31 | #define GPIO_STATUS_LED_PIN GPIO_Pin_3 32 | #define GPIO_TP_PORT GPIOB 33 | #define GPIO_TP_PIN GPIO_Pin_15 34 | 35 | #define NOP {__asm volatile ("nop\n\t");} 36 | #define NOPS_4 {NOP; NOP; NOP; NOP;} 37 | 38 | enum escStates { 39 | ESC_STATE_DISARMED = 0, 40 | ESC_STATE_STOPPED, 41 | ESC_STATE_NOCOMM, 42 | ESC_STATE_STARTING, 43 | ESC_STATE_RUNNING 44 | }; 45 | 46 | enum escInputModes { 47 | ESC_INPUT_PWM = 0, 48 | ESC_INPUT_UART, 49 | ESC_INPUT_I2C, 50 | ESC_INPUT_CAN, 51 | ESC_INPUT_OW 52 | }; 53 | 54 | enum escDisarmReasons { 55 | REASON_STARTUP = 0, 56 | REASON_BAD_DETECTS, 57 | REASON_CROSSING_TIMEOUT, 58 | REASON_PWM_TIMEOUT, 59 | REASON_LOW_VOLTAGE, 60 | REASON_CLI, 61 | REASON_BINARY 62 | }; 63 | 64 | extern digitalPin *errorLed, *statusLed, *tp; 65 | extern volatile uint32_t minCycles, idleCounter, totalCycles; 66 | extern volatile uint8_t state, inputMode; 67 | 68 | extern void escRun(void); 69 | 70 | #endif 71 | -------------------------------------------------------------------------------- /src/misc.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the miscellaneous firmware functions (add-on 8 | * to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Includes ------------------------------------------------------------------*/ 24 | #include "misc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup MISC 31 | * @brief MISC driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup MISC_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup MISC_Private_Defines 44 | * @{ 45 | */ 46 | 47 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) 48 | /** 49 | * @} 50 | */ 51 | 52 | /** @defgroup MISC_Private_Macros 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** @defgroup MISC_Private_Variables 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup MISC_Private_FunctionPrototypes 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup MISC_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Configures the priority grouping: pre-emption priority and subpriority. 82 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length. 83 | * This parameter can be one of the following values: 84 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority 85 | * 4 bits for subpriority 86 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority 87 | * 3 bits for subpriority 88 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority 89 | * 2 bits for subpriority 90 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority 91 | * 1 bits for subpriority 92 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority 93 | * 0 bits for subpriority 94 | * @retval None 95 | */ 96 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) 97 | { 98 | /* Check the parameters */ 99 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); 100 | 101 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ 102 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; 103 | } 104 | 105 | /** 106 | * @brief Initializes the NVIC peripheral according to the specified 107 | * parameters in the NVIC_InitStruct. 108 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains 109 | * the configuration information for the specified NVIC peripheral. 110 | * @retval None 111 | */ 112 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) 113 | { 114 | uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; 115 | 116 | /* Check the parameters */ 117 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); 118 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); 119 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); 120 | 121 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) 122 | { 123 | /* Compute the Corresponding IRQ Priority --------------------------------*/ 124 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; 125 | tmppre = (0x4 - tmppriority); 126 | tmpsub = tmpsub >> tmppriority; 127 | 128 | tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; 129 | tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; 130 | tmppriority = tmppriority << 0x04; 131 | 132 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; 133 | 134 | /* Enable the Selected IRQ Channels --------------------------------------*/ 135 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = 136 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 137 | } 138 | else 139 | { 140 | /* Disable the Selected IRQ Channels -------------------------------------*/ 141 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = 142 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); 143 | } 144 | } 145 | 146 | /** 147 | * @brief Sets the vector table location and Offset. 148 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. 149 | * This parameter can be one of the following values: 150 | * @arg NVIC_VectTab_RAM 151 | * @arg NVIC_VectTab_FLASH 152 | * @param Offset: Vector Table base offset field. This value must be a multiple 153 | * of 0x200. 154 | * @retval None 155 | */ 156 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) 157 | { 158 | /* Check the parameters */ 159 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); 160 | assert_param(IS_NVIC_OFFSET(Offset)); 161 | 162 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); 163 | } 164 | 165 | /** 166 | * @brief Selects the condition for the system to enter low power mode. 167 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. 168 | * This parameter can be one of the following values: 169 | * @arg NVIC_LP_SEVONPEND 170 | * @arg NVIC_LP_SLEEPDEEP 171 | * @arg NVIC_LP_SLEEPONEXIT 172 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. 173 | * @retval None 174 | */ 175 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) 176 | { 177 | /* Check the parameters */ 178 | assert_param(IS_NVIC_LP(LowPowerMode)); 179 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 180 | 181 | if (NewState != DISABLE) 182 | { 183 | SCB->SCR |= LowPowerMode; 184 | } 185 | else 186 | { 187 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); 188 | } 189 | } 190 | 191 | /** 192 | * @brief Configures the SysTick clock source. 193 | * @param SysTick_CLKSource: specifies the SysTick clock source. 194 | * This parameter can be one of the following values: 195 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. 196 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. 197 | * @retval None 198 | */ 199 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) 200 | { 201 | /* Check the parameters */ 202 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); 203 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK) 204 | { 205 | SysTick->CTRL |= SysTick_CLKSource_HCLK; 206 | } 207 | else 208 | { 209 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; 210 | } 211 | } 212 | 213 | /** 214 | * @} 215 | */ 216 | 217 | /** 218 | * @} 219 | */ 220 | 221 | /** 222 | * @} 223 | */ 224 | 225 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 226 | -------------------------------------------------------------------------------- /src/misc.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file misc.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the miscellaneous 8 | * firmware library functions (add-on to CMSIS functions). 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __MISC_H 25 | #define __MISC_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup MISC 39 | * @{ 40 | */ 41 | 42 | /** @defgroup MISC_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief NVIC Init Structure definition 48 | */ 49 | 50 | typedef struct 51 | { 52 | uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. 53 | This parameter can be a value of @ref IRQn_Type 54 | (For the complete STM32 Devices IRQ Channels list, please 55 | refer to stm32f10x.h file) */ 56 | 57 | uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel 58 | specified in NVIC_IRQChannel. This parameter can be a value 59 | between 0 and 15 as described in the table @ref NVIC_Priority_Table */ 60 | 61 | uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified 62 | in NVIC_IRQChannel. This parameter can be a value 63 | between 0 and 15 as described in the table @ref NVIC_Priority_Table */ 64 | 65 | FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel 66 | will be enabled or disabled. 67 | This parameter can be set either to ENABLE or DISABLE */ 68 | } NVIC_InitTypeDef; 69 | 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup NVIC_Priority_Table 75 | * @{ 76 | */ 77 | 78 | /** 79 | @code 80 | The table below gives the allowed values of the pre-emption priority and subpriority according 81 | to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function 82 | ============================================================================================================================ 83 | NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description 84 | ============================================================================================================================ 85 | NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority 86 | | | | 4 bits for subpriority 87 | ---------------------------------------------------------------------------------------------------------------------------- 88 | NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority 89 | | | | 3 bits for subpriority 90 | ---------------------------------------------------------------------------------------------------------------------------- 91 | NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority 92 | | | | 2 bits for subpriority 93 | ---------------------------------------------------------------------------------------------------------------------------- 94 | NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority 95 | | | | 1 bits for subpriority 96 | ---------------------------------------------------------------------------------------------------------------------------- 97 | NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority 98 | | | | 0 bits for subpriority 99 | ============================================================================================================================ 100 | @endcode 101 | */ 102 | 103 | /** 104 | * @} 105 | */ 106 | 107 | /** @defgroup MISC_Exported_Constants 108 | * @{ 109 | */ 110 | 111 | /** @defgroup Vector_Table_Base 112 | * @{ 113 | */ 114 | 115 | #define NVIC_VectTab_RAM ((uint32_t)0x20000000) 116 | #define NVIC_VectTab_FLASH ((uint32_t)0x08000000) 117 | #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ 118 | ((VECTTAB) == NVIC_VectTab_FLASH)) 119 | /** 120 | * @} 121 | */ 122 | 123 | /** @defgroup System_Low_Power 124 | * @{ 125 | */ 126 | 127 | #define NVIC_LP_SEVONPEND ((uint8_t)0x10) 128 | #define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) 129 | #define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) 130 | #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 131 | ((LP) == NVIC_LP_SLEEPDEEP) || \ 132 | ((LP) == NVIC_LP_SLEEPONEXIT)) 133 | /** 134 | * @} 135 | */ 136 | 137 | /** @defgroup Preemption_Priority_Group 138 | * @{ 139 | */ 140 | 141 | #define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority 142 | 4 bits for subpriority */ 143 | #define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority 144 | 3 bits for subpriority */ 145 | #define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority 146 | 2 bits for subpriority */ 147 | #define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority 148 | 1 bits for subpriority */ 149 | #define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority 150 | 0 bits for subpriority */ 151 | 152 | #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ 153 | ((GROUP) == NVIC_PriorityGroup_1) || \ 154 | ((GROUP) == NVIC_PriorityGroup_2) || \ 155 | ((GROUP) == NVIC_PriorityGroup_3) || \ 156 | ((GROUP) == NVIC_PriorityGroup_4)) 157 | 158 | #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 159 | 160 | #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 161 | 162 | #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) 163 | 164 | /** 165 | * @} 166 | */ 167 | 168 | /** @defgroup SysTick_clock_source 169 | * @{ 170 | */ 171 | 172 | #define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) 173 | #define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) 174 | #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ 175 | ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | /** @defgroup MISC_Exported_Macros 185 | * @{ 186 | */ 187 | 188 | /** 189 | * @} 190 | */ 191 | 192 | /** @defgroup MISC_Exported_Functions 193 | * @{ 194 | */ 195 | 196 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); 197 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 198 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); 199 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); 200 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); 201 | 202 | #ifdef __cplusplus 203 | } 204 | #endif 205 | 206 | #endif /* __MISC_H */ 207 | 208 | /** 209 | * @} 210 | */ 211 | 212 | /** 213 | * @} 214 | */ 215 | 216 | /** 217 | * @} 218 | */ 219 | 220 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 221 | -------------------------------------------------------------------------------- /src/ow.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "ow.h" 20 | #include "main.h" 21 | #include "timer.h" 22 | #include "pwm.h" 23 | #include "run.h" 24 | #include "cli.h" 25 | #include 26 | 27 | uint8_t owROMCode[8]; 28 | uint8_t owBuf[16]; 29 | uint8_t *owBufPointer; 30 | uint8_t owState; 31 | uint8_t owLastCommand; 32 | uint8_t owByteValue; 33 | uint8_t owReadNum; 34 | uint8_t owWriteNum; 35 | uint8_t owBit; 36 | 37 | uint8_t owCRC(uint8_t inData, uint8_t seed) { 38 | uint8_t bitsLeft; 39 | uint8_t temp; 40 | 41 | for (bitsLeft = 8; bitsLeft > 0; bitsLeft--) { 42 | temp = ((seed ^ inData) & 0x01); 43 | if (temp == 0) { 44 | seed >>= 1; 45 | } 46 | else { 47 | seed ^= 0x18; 48 | seed >>= 1; 49 | seed |= 0x80; 50 | } 51 | inData >>= 1; 52 | } 53 | 54 | return seed; 55 | } 56 | 57 | void owInit(void) { 58 | int i; 59 | 60 | owROMCode[0] = 0xAA; 61 | for (i = 0; i < 6; i++) 62 | owROMCode[i+1] = *(((uint8_t *)(OW_UID_ADDRESS))+i); 63 | 64 | owROMCode[7] = 0x00; 65 | for (i = 0; i < 7; i++) 66 | owROMCode[7] = owCRC(owROMCode[i], owROMCode[7]); 67 | } 68 | 69 | void owPullLow(void) { 70 | pwmIsrAllOff(); 71 | PWM_OUTPUT; 72 | } 73 | 74 | void owRelease(void) { 75 | PWM_INPUT; 76 | pwmIsrRunOn(); 77 | } 78 | 79 | void owTimeout(int i) { 80 | timerSetAlarm3(i*TIMER_MULT, owTimeoutIsr, 0); 81 | } 82 | 83 | void owReset(void) { 84 | inputMode = ESC_INPUT_OW; 85 | owResetIsr(OW_RESET_STATE_0); 86 | } 87 | 88 | void owReadBytes(uint8_t num) { 89 | owTimeout(300); 90 | 91 | owReadNum = num; 92 | owByteValue = 0; 93 | owBit = 0; 94 | } 95 | 96 | void owWriteBytes(uint8_t num) { 97 | owTimeout(300); 98 | 99 | owByteValue = *owBufPointer; 100 | owWriteNum = num; 101 | owBit = 0; 102 | } 103 | 104 | // command parser 105 | void owReadComplete(void) { 106 | uint8_t *pointer; 107 | 108 | switch (owBuf[0]) { 109 | case OW_ROM_MATCH: 110 | if (owLastCommand != owBuf[0]) { 111 | owLastCommand = owBuf[0]; 112 | // read an additional 8 bytes 113 | owBufPointer = &owBuf[1]; 114 | owReadBytes(8); 115 | } 116 | else { 117 | owLastCommand = 0x00; 118 | // does the ROM code match ours? 119 | if (!memcmp(&owBuf[1], owROMCode, 8)) { 120 | // prepare to read next command 121 | owBufPointer = owBuf; 122 | owReadBytes(1); 123 | } 124 | else { 125 | // terminate transaction 126 | owTimeoutIsr(0); 127 | } 128 | } 129 | break; 130 | 131 | case OW_ROM_SKIP: 132 | // prepare to read next command 133 | owBufPointer = owBuf; 134 | owReadBytes(1); 135 | break; 136 | 137 | case OW_ROM_READ: 138 | // prepare to write out ROM CODE (8 bytes) 139 | owState = OW_WRITE; 140 | owBufPointer = owROMCode; 141 | owWriteBytes(8); 142 | break; 143 | 144 | case OW_VERSION: 145 | owState = OW_WRITE; 146 | owBufPointer = version; 147 | owWriteBytes(sizeof(version)); 148 | break; 149 | 150 | case OW_PARAM_READ: 151 | if (owLastCommand != owBuf[0]) { 152 | owLastCommand = owBuf[0]; 153 | // read an additional 1 bytes 154 | owBufPointer = &owBuf[1]; 155 | owReadBytes(1); 156 | } 157 | else { 158 | owLastCommand = 0x00; 159 | if (owBuf[1] < CONFIG_NUM_PARAMS) { 160 | // copy config value into send buffer 161 | pointer = (uint8_t *)&(p[owBuf[1]]); 162 | owBuf[2] = pointer[0]; 163 | owBuf[3] = pointer[1]; 164 | owBuf[4] = pointer[2]; 165 | owBuf[5] = pointer[3]; 166 | 167 | owState = OW_WRITE; 168 | owBufPointer = owBuf; 169 | owWriteBytes(6); 170 | } 171 | } 172 | break; 173 | 174 | case OW_PARAM_WRITE: 175 | if (owLastCommand != owBuf[0]) { 176 | owLastCommand = owBuf[0]; 177 | // read an additional 5 bytes 178 | owBufPointer = &owBuf[1]; 179 | owReadBytes(5); 180 | } 181 | else { 182 | owLastCommand = 0x00; 183 | if (owBuf[1] < CONFIG_NUM_PARAMS) { 184 | // set parameter 185 | configSetParamByID(owBuf[1], *(float *)(&owBuf[2])); 186 | 187 | // copy config value into send buffer 188 | pointer = (uint8_t *)&p[owBuf[1]]; 189 | owBuf[2] = pointer[0]; 190 | owBuf[3] = pointer[1]; 191 | owBuf[4] = pointer[2]; 192 | owBuf[5] = pointer[3]; 193 | 194 | owState = OW_WRITE; 195 | owBufPointer = owBuf; 196 | owWriteBytes(6); 197 | } 198 | } 199 | break; 200 | 201 | case OW_CONFIG_READ: 202 | configReadFlash(); 203 | 204 | // return command ack 205 | owState = OW_WRITE; 206 | owBufPointer = owBuf; 207 | owWriteBytes(1); 208 | break; 209 | 210 | // required 30ms to complete 211 | case OW_CONFIG_WRITE: 212 | configWriteFlash(); 213 | break; 214 | 215 | case OW_CONFIG_DEFAULT: 216 | configLoadDefault(); 217 | 218 | // return command ack 219 | owState = OW_WRITE; 220 | owBufPointer = owBuf; 221 | owWriteBytes(1); 222 | break; 223 | 224 | case OW_GET_MODE: 225 | owBuf[0] = OW_GET_MODE; 226 | owBuf[1] = runMode; 227 | 228 | owState = OW_WRITE; 229 | owBufPointer = owBuf; 230 | owWriteBytes(2); 231 | break; 232 | 233 | case OW_SET_MODE: 234 | if (owLastCommand != owBuf[0]) { 235 | owLastCommand = owBuf[0]; 236 | // read an additional 1 byte 237 | owBufPointer = &owBuf[1]; 238 | owReadBytes(1); 239 | } 240 | else { 241 | owLastCommand = 0x00; 242 | if (owBuf[1] >= 0 && owBuf[1] < NUM_RUN_MODES) { 243 | runMode = owBuf[1]; 244 | 245 | owState = OW_WRITE; 246 | owBufPointer = owBuf; 247 | owWriteBytes(2); 248 | } 249 | } 250 | ; 251 | break; 252 | } 253 | } 254 | 255 | void owWriteComplete(void) { 256 | // we're finished with the transaction 257 | owTimeoutIsr(0); 258 | } 259 | 260 | void owByteReceived(void) { 261 | *(owBufPointer++) = owByteValue; 262 | 263 | owTimeout(300); 264 | 265 | if (--owReadNum > 0) 266 | owReadBytes(owReadNum); 267 | else 268 | owReadComplete(); 269 | } 270 | 271 | void owByteSent(void) { 272 | owBufPointer++; 273 | 274 | owTimeout(300); 275 | 276 | if (--owWriteNum > 0) 277 | owWriteBytes(owWriteNum); 278 | else 279 | owWriteComplete(); 280 | } 281 | 282 | void owEdgeDetect(uint8_t edge) { 283 | if (edge == 0) { 284 | switch (owState) { 285 | case OW_READ: 286 | // read bit in 15us 287 | pwmIsrAllOff(); 288 | owRelease(); 289 | timerSetAlarm3(15*TIMER_MULT, owReadBitIsr, 0); 290 | break; 291 | 292 | case OW_WRITE: 293 | // write bit 294 | owRelease(); 295 | owWriteBitIsr(0); 296 | break; 297 | } 298 | } 299 | } 300 | 301 | void owResetIsr(int state) { 302 | switch (state) { 303 | case OW_RESET_STATE_0: 304 | // wait 15us 305 | timerSetAlarm3(15*TIMER_MULT, owResetIsr, OW_RESET_STATE_1); 306 | break; 307 | 308 | case OW_RESET_STATE_1: 309 | // signal presence for 70us 310 | owPullLow(); 311 | timerSetAlarm3(70*TIMER_MULT, owResetIsr, OW_RESET_STATE_2); 312 | break; 313 | 314 | case OW_RESET_STATE_2: 315 | // release bus and wait for byte 316 | owRelease(); 317 | 318 | // light status LED 319 | digitalLo(statusLed); 320 | 321 | // prepare to read a byte 322 | owState = OW_READ; 323 | owBufPointer = owBuf; 324 | owLastCommand = 0x00; 325 | owReadBytes(1); 326 | 327 | // 15ms timeout 328 | owTimeout(15000); 329 | break; 330 | } 331 | } 332 | 333 | void owReadBitIsr(int unused) { 334 | // sample bus 335 | owByteValue |= (PWM_SAMPLE_LEVEL< 7) 344 | owByteReceived(); 345 | } 346 | 347 | void owWriteBitIsr(int state) { 348 | // write bit 349 | if (state == 0) { 350 | // only 0 bits need action, 1 bits let the bus rise on its own 351 | if (!(owByteValue & (0x01< 7) 361 | owByteSent(); 362 | } 363 | } 364 | // release bus 365 | else { 366 | owRelease(); 367 | 368 | owTimeout(150); 369 | 370 | // finished with this byte 371 | if (owBit > 7) 372 | owByteSent(); 373 | } 374 | } 375 | 376 | void owTimeoutIsr(int unused) { 377 | timerCancelAlarm3(); 378 | // revert to listening for PWM & OW 379 | owRelease(); 380 | pwmIsrAllOn(); 381 | // turn off status LED 382 | digitalHi(statusLed); 383 | inputMode = ESC_INPUT_PWM; 384 | } -------------------------------------------------------------------------------- /src/ow.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _OW_H 20 | #define _OW_H 21 | 22 | #include "misc.h" 23 | 24 | #define OW_RESET_MIN 480 25 | #define OW_RESET_MAX 580 26 | 27 | #define OW_ROM_READ 0x33 28 | #define OW_ROM_MATCH 0x55 // not yet supported 29 | #define OW_ROM_SKIP 0xCC 30 | #define OW_VERSION 0x03 31 | #define OW_PARAM_READ 0x04 32 | #define OW_PARAM_WRITE 0x05 33 | #define OW_CONFIG_READ 0x06 34 | #define OW_CONFIG_WRITE 0x07 35 | #define OW_CONFIG_DEFAULT 0x08 36 | #define OW_SET_MODE 0x09 37 | #define OW_GET_MODE 0x0A 38 | 39 | #define OW_UID_ADDRESS 0x1FFFF7E8 40 | 41 | enum { 42 | OW_RESET_STATE_0, 43 | OW_RESET_STATE_1, 44 | OW_RESET_STATE_2, 45 | OW_READ, 46 | OW_WRITE 47 | }; 48 | 49 | extern uint8_t owROMCode[8]; 50 | extern uint8_t owBuf[16]; 51 | extern uint8_t *owBufPointer; 52 | extern uint8_t owState; 53 | extern uint8_t owLastCommand; 54 | extern uint8_t owByteValue; 55 | extern uint8_t owReadNum; 56 | extern uint8_t owWriteNum; 57 | extern uint8_t owBit; 58 | 59 | extern void owInit(void); 60 | extern void owReset(void); 61 | extern void owEdgeDetect(uint8_t edge); 62 | extern void owResetIsr(int state); 63 | extern void owReadBitIsr(int unused); 64 | extern void owWriteBitIsr(int state); 65 | extern void owTimeoutIsr(int unused); 66 | 67 | #endif -------------------------------------------------------------------------------- /src/pwm.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "pwm.h" 20 | #include "timer.h" 21 | #include "run.h" 22 | #include "main.h" 23 | #include "ow.h" 24 | #include "stm32f10x_gpio.h" 25 | #include "stm32f10x_tim.h" 26 | #include "misc.h" 27 | 28 | int16_t pwmMinPeriod; 29 | int16_t pwmMaxPeriod; 30 | int16_t pwmMinValue; 31 | int16_t pwmLoValue; 32 | int16_t pwmHiValue; 33 | int16_t pwmMaxValue; 34 | int16_t pwmMinStart; 35 | volatile uint32_t pwmValidMicros; 36 | 37 | inline void pwmIsrAllOff(void) { 38 | PWM_TIM->DIER &= (uint16_t)~(TIM_IT_CC1 | TIM_IT_CC2); 39 | } 40 | 41 | inline void pwmIsrAllOn(void) { 42 | PWM_TIM->CCR1; 43 | PWM_TIM->CCR2; 44 | PWM_TIM->DIER |= (TIM_IT_CC1 | TIM_IT_CC2); 45 | } 46 | 47 | inline void pwmIsrRunOn(void) { 48 | uint16_t dier = PWM_TIM->DIER; 49 | 50 | dier &= (uint16_t)~(TIM_IT_CC1 | TIM_IT_CC2); 51 | dier |= TIM_IT_CC2; 52 | 53 | PWM_TIM->CCR1; 54 | PWM_TIM->CCR2; 55 | PWM_TIM->DIER = dier; 56 | } 57 | 58 | void pwmInit(void) { 59 | GPIO_InitTypeDef GPIO_InitStructure; 60 | NVIC_InitTypeDef NVIC_InitStructure; 61 | TIM_ICInitTypeDef TIM_ICInitStructure; 62 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; 63 | 64 | pwmSetConstants(); 65 | 66 | // TIM1 channel 1 pin (PA.08) configuration 67 | GPIO_InitStructure.GPIO_Pin = PWM_PIN; 68 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; 69 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 70 | GPIO_Init(PWM_PORT, &GPIO_InitStructure); 71 | 72 | // Enable the TIM1 global Interrupt 73 | NVIC_InitStructure.NVIC_IRQChannel = PWM_IRQ; 74 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; 75 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; 76 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; 77 | NVIC_Init(&NVIC_InitStructure); 78 | 79 | TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); 80 | TIM_TimeBaseStructure.TIM_Prescaler = (PWM_CLK_DIVISOR-1); 81 | TIM_TimeBaseStructure.TIM_Period = 0xffff; 82 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 83 | TIM_TimeBaseInit(PWM_TIM, &TIM_TimeBaseStructure); 84 | 85 | TIM_ICInitStructure.TIM_Channel = PWM_CHANNEL; 86 | TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising; 87 | TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI; 88 | TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1; 89 | TIM_ICInitStructure.TIM_ICFilter = 0x0; 90 | TIM_PWMIConfig(PWM_TIM, &TIM_ICInitStructure); 91 | 92 | // Select the TIM Input Trigger: TI1FP1 93 | TIM_SelectInputTrigger(PWM_TIM, TIM_TS_TI1FP1); 94 | 95 | // Select the slave Mode: Reset Mode 96 | TIM_SelectSlaveMode(PWM_TIM, TIM_SlaveMode_Reset); 97 | 98 | // Enable the Master/Slave Mode 99 | TIM_SelectMasterSlaveMode(PWM_TIM, TIM_MasterSlaveMode_Enable); 100 | 101 | // TIM enable counter 102 | TIM_Cmd(PWM_TIM, ENABLE); 103 | 104 | pwmIsrAllOn(); 105 | } 106 | 107 | void PWM_IRQ_HANDLER(void) { 108 | uint16_t pwmValue; 109 | uint16_t periodValue; 110 | uint8_t edge; 111 | 112 | edge = !(PWM_TIM->SR & TIM_IT_CC2); 113 | 114 | periodValue = PWM_TIM->CCR1; 115 | pwmValue = PWM_TIM->CCR2; 116 | 117 | // is this an OW reset pulse? 118 | if (state == ESC_STATE_DISARMED && edge == 1 && (periodValue - pwmValue) > OW_RESET_MIN && (periodValue - pwmValue) < OW_RESET_MAX) { 119 | owReset(); 120 | } 121 | // look for good RC PWM input 122 | else if (inputMode == ESC_INPUT_PWM && periodValue >= pwmMinPeriod && periodValue <= pwmMaxPeriod && pwmValue >= pwmMinValue && pwmValue <= pwmMaxValue) { 123 | if (edge == 0) { 124 | pwmValidMicros = timerMicros; 125 | runNewInput(pwmValue); 126 | } 127 | } 128 | // otherwise if already in OW mode, pass control to OW 129 | else if (inputMode == ESC_INPUT_OW) { 130 | owEdgeDetect(edge); 131 | } 132 | } 133 | 134 | void pwmSetConstants(void) { 135 | float rpmScale = p[PWM_RPM_SCALE]; 136 | 137 | pwmMinPeriod = p[PWM_MIN_PERIOD] = (int)p[PWM_MIN_PERIOD]; 138 | pwmMaxPeriod = p[PWM_MAX_PERIOD] = (int)p[PWM_MAX_PERIOD]; 139 | pwmMinValue = p[PWM_MIN_VALUE] = (int)p[PWM_MIN_VALUE]; 140 | pwmLoValue = p[PWM_LO_VALUE] = (int)p[PWM_LO_VALUE]; 141 | pwmHiValue = p[PWM_HI_VALUE] = (int)p[PWM_HI_VALUE]; 142 | pwmMaxValue = p[PWM_MAX_VALUE] = (int)p[PWM_MAX_VALUE]; 143 | pwmMinStart = p[PWM_MIN_START] = (int)p[PWM_MIN_START]; 144 | 145 | if (rpmScale < PWM_RPM_SCALE_MIN) 146 | rpmScale = PWM_RPM_SCALE_MIN; 147 | else if (rpmScale > PWM_RPM_SCALE_MAX) 148 | rpmScale = PWM_RPM_SCALE_MAX; 149 | 150 | p[PWM_RPM_SCALE] = rpmScale; 151 | } -------------------------------------------------------------------------------- /src/pwm.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _PWM_H 20 | #define _PWM_H 21 | 22 | #include "config.h" 23 | #include "stm32f10x_tim.h" 24 | 25 | #define PWM_PORT GPIOA 26 | #define PWM_PIN GPIO_Pin_8 27 | 28 | #define PWM_OUTPUT {PWM_PORT->CRH = (PWM_PORT->CRH & ~0x0f) | 0x03;} 29 | #define PWM_INPUT {PWM_PORT->CRH = (PWM_PORT->CRH & ~0x0f) | 0x04;} 30 | #define PWM_SAMPLE_LEVEL ((PWM_PORT->IDR & (0x01<<8))>>8) 31 | 32 | #define PWM_TIM TIM1 33 | #define PWM_CHANNEL TIM_Channel_1 34 | #define PWM_IRQ TIM1_CC_IRQn 35 | #define PWM_IRQ_HANDLER TIM1_CC_IRQHandler 36 | #define PWM_CLK_DIVISOR 72 37 | 38 | #define PWM_TIMEOUT (200000*TIMER_MULT) // micros that the last received PWM signal is valid for (0.2 seconds) 39 | 40 | #define PWM_RPM_SCALE_MIN 1000.0f 41 | #define PWM_RPM_SCALE_MAX 20000.0f 42 | 43 | extern int16_t pwmMinPeriod; 44 | extern int16_t pwmMaxPeriod; 45 | extern int16_t pwmMinValue; 46 | extern int16_t pwmLoValue; 47 | extern int16_t pwmHiValue; 48 | extern int16_t pwmMaxValue; 49 | extern int16_t pwmMinStart; 50 | extern volatile uint32_t pwmValidMicros; 51 | extern volatile uint16_t pwmValue; 52 | 53 | extern void pwmInit(void); 54 | extern void pwmSetConstants(void); 55 | extern void pwmIsrAllOff(void); 56 | extern void pwmIsrAllOn(void); 57 | extern void pwmIsrRunOn(void); 58 | 59 | #endif 60 | -------------------------------------------------------------------------------- /src/rcc.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "rcc.h" 20 | #include "adc.h" 21 | #include "main.h" 22 | #include "digital.h" 23 | #include "stm32f10x_rcc.h" 24 | 25 | uint32_t rccReadBkpDr(void) { 26 | return *((uint16_t *)BKP_BASE + 0x04) | *((uint16_t *)BKP_BASE + 0x08)<<16; 27 | } 28 | 29 | void rccWriteBkpDr(uint32_t value) { 30 | RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); 31 | PWR->CR |= PWR_CR_DBP; 32 | 33 | *((uint16_t *)BKP_BASE + 0x04) = value & 0xffff; 34 | *((uint16_t *)BKP_BASE + 0x08) = (value & 0xffff0000)>>16; 35 | } 36 | 37 | void rccBootLoader(void) { 38 | // check for magic cookie 39 | if (rccReadBkpDr() == 0xDECEA5ED) { 40 | digitalPin *statusLed, *errorLed; 41 | 42 | rccWriteBkpDr(0); // reset flag 43 | 44 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE); 45 | GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); 46 | 47 | statusLed = digitalInit(GPIO_STATUS_LED_PORT, GPIO_STATUS_LED_PIN); 48 | digitalLo(statusLed); 49 | errorLed = digitalInit(GPIO_ERROR_LED_PORT, GPIO_ERROR_LED_PIN); 50 | digitalLo(errorLed); 51 | 52 | // jump to boot loader ROM 53 | __asm volatile ("LDR R0, =0x1FFFF000\n" 54 | "LDR SP,[R0, #0]\n" 55 | "LDR R0,[R0, #4]\n" 56 | "BX R0\n"); 57 | } 58 | } 59 | 60 | void rccReset(void) { 61 | // set magic cookie 62 | rccWriteBkpDr(0xDECEA5ED); 63 | 64 | // Generate system reset 65 | SCB->AIRCR = AIRCR_VECTKEY_MASK | (uint32_t)0x04; 66 | } 67 | 68 | void rccInit(void) { 69 | GPIO_InitTypeDef GPIO_InitStructure; 70 | 71 | rccBootLoader(); 72 | 73 | // turn on fault interrupts 74 | SCB->SHCSR |= (0x01<SHCSR |= (0x01<SHCSR |= (0x01<. 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _RCC_H 20 | #define _RCC_H 21 | 22 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) 23 | 24 | extern void rccInit(void); 25 | extern void rccReset(void); 26 | 27 | #endif 28 | -------------------------------------------------------------------------------- /src/run.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _RUN_H 20 | #define _RUN_H 21 | 22 | #include "misc.h" 23 | 24 | #define RUN_PERIOD 1000 // 1ms 25 | #define RUN_ARM_COUNT 20 // number of valid PWM signals seen before arming 26 | #define RUN_MIN_MAX_CURRENT 0.0 // Amps 27 | #define RUN_MAX_MAX_CURRENT 75.0 // Amps 28 | 29 | //#define RUN_ENABLE_IWDG 30 | #define RUN_LSI_FREQ 40000 // 40 KHz LSI for IWDG 31 | 32 | enum runCommandModes { 33 | CLI_MODE = 0, 34 | BINARY_MODE 35 | }; 36 | 37 | enum runModes { 38 | OPEN_LOOP = 0, 39 | CLOSED_LOOP_RPM, 40 | CLOSED_LOOP_THRUST, 41 | NUM_RUN_MODES 42 | }; 43 | 44 | extern uint32_t runMilis; 45 | extern float idlePercent; 46 | extern float avgAmps, maxAmps; 47 | extern float avgVolts; 48 | extern float rpm; 49 | extern float targetRpm; 50 | extern float runRPMFactor; 51 | extern uint8_t disarmReason; 52 | extern uint8_t commandMode; 53 | volatile extern uint8_t runMode; 54 | 55 | extern void runInit(void); 56 | extern void runNewInput(uint16_t setpoint); 57 | extern void runDisarm(int reason); 58 | extern void runArm(void); 59 | extern void runStart(void); 60 | extern void runStop(void); 61 | extern uint8_t runDuty(float duty); 62 | extern void runRpmPIDReset(void); 63 | extern void runSetConstants(void); 64 | extern uint16_t runIWDGInit(int ms); 65 | extern void runFeedIWDG(void); 66 | 67 | #endif 68 | -------------------------------------------------------------------------------- /src/serial.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "serial.h" 20 | #include "config.h" 21 | #include "stm32f10x_dma.h" 22 | #include "stm32f10x_conf.h" 23 | #include "misc.h" 24 | #include 25 | #include 26 | 27 | serialPort_t serialPort; 28 | 29 | void serialStartTxDMA() { 30 | serialPort_t *s = &serialPort; 31 | 32 | SERIAL_TX_DMA->CMAR = (uint32_t)&s->txBuf[s->txTail]; 33 | if (s->txHead > s->txTail) { 34 | SERIAL_TX_DMA->CNDTR = s->txHead - s->txTail; 35 | s->txTail = s->txHead; 36 | } 37 | else { 38 | SERIAL_TX_DMA->CNDTR = SERIAL_TX_BUFSIZE - s->txTail; 39 | s->txTail = 0; 40 | } 41 | 42 | DMA_Cmd(SERIAL_TX_DMA, ENABLE); 43 | } 44 | 45 | void serialWrite(int ch) { 46 | serialPort_t *s = &serialPort; 47 | 48 | s->txBuf[s->txHead] = ch; 49 | s->txHead = (s->txHead + 1) % SERIAL_TX_BUFSIZE; 50 | 51 | if (!(SERIAL_TX_DMA->CCR & 1)) 52 | serialStartTxDMA(); 53 | } 54 | 55 | unsigned char serialAvailable() { 56 | return (SERIAL_RX_DMA->CNDTR != serialPort.rxPos); 57 | } 58 | 59 | // only call after a affirmative return from serialAvailable() 60 | int serialRead() { 61 | serialPort_t *s = &serialPort; 62 | int ch; 63 | 64 | ch = s->rxBuf[SERIAL_RX_BUFSIZE - s->rxPos]; 65 | if (--s->rxPos == 0) 66 | s->rxPos = SERIAL_RX_BUFSIZE; 67 | 68 | return ch; 69 | } 70 | 71 | void serialPrint(const char *str) { 72 | while (*str) 73 | serialWrite(*(str++)); 74 | } 75 | 76 | void serialOpenPort(int baud) { 77 | USART_InitTypeDef USART_InitStructure; 78 | 79 | USART_InitStructure.USART_BaudRate = baud; 80 | USART_InitStructure.USART_WordLength = USART_WordLength_8b; 81 | USART_InitStructure.USART_StopBits = USART_StopBits_1; 82 | USART_InitStructure.USART_Parity = USART_Parity_No; 83 | USART_InitStructure.USART_HardwareFlowControl = SERIAL_FLOW_CONTROL; 84 | USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; 85 | USART_Init(SERIAL_UART, &USART_InitStructure); 86 | } 87 | 88 | void serialInit(void) { 89 | GPIO_InitTypeDef GPIO_InitStructure; 90 | DMA_InitTypeDef DMA_InitStructure; 91 | NVIC_InitTypeDef NVIC_InitStructure; 92 | serialPort_t *s = &serialPort; 93 | 94 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; 95 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; 96 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; 97 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; 98 | DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; 99 | DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; 100 | 101 | // alternate function push-pull 102 | GPIO_InitStructure.GPIO_Pin = SERIAL_UART_TX_PIN | SERIAL_UART_RTS_PIN; 103 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 104 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 105 | GPIO_Init(SERIAL_UART_PORT, &GPIO_InitStructure); 106 | 107 | // input floating w/ pull ups 108 | GPIO_InitStructure.GPIO_Pin = SERIAL_UART_RX_PIN | SERIAL_UART_CTS_PIN; 109 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; 110 | GPIO_Init(SERIAL_UART_PORT, &GPIO_InitStructure); 111 | 112 | // Enable the DMA1_Channel4 global Interrupt 113 | NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel4_IRQn; 114 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; 115 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; 116 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; 117 | NVIC_Init(&NVIC_InitStructure); 118 | 119 | s->rxHead = s->rxTail = 0; 120 | s->txHead = s->txTail = 0; 121 | 122 | serialOpenPort(p[BAUD_RATE]); 123 | 124 | // Configure DMA for rx 125 | DMA_DeInit(SERIAL_RX_DMA); 126 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SERIAL_UART + 0x04; 127 | DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->rxBuf; 128 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; 129 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; 130 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; 131 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; 132 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; 133 | DMA_InitStructure.DMA_BufferSize = SERIAL_RX_BUFSIZE; 134 | DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; 135 | DMA_Init(SERIAL_RX_DMA, &DMA_InitStructure); 136 | 137 | DMA_Cmd(SERIAL_RX_DMA, ENABLE); 138 | 139 | USART_DMACmd(SERIAL_UART, USART_DMAReq_Rx, ENABLE); 140 | s->rxPos = DMA_GetCurrDataCounter(SERIAL_RX_DMA); 141 | 142 | // Configure DMA for tx 143 | DMA_DeInit(SERIAL_TX_DMA); 144 | DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SERIAL_UART + 0x04; 145 | DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; 146 | DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; 147 | DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; 148 | DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; 149 | DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; 150 | DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; 151 | DMA_Init(SERIAL_TX_DMA, &DMA_InitStructure); 152 | DMA_ITConfig(SERIAL_TX_DMA, DMA_IT_TC, ENABLE); 153 | SERIAL_TX_DMA->CNDTR = 0; 154 | 155 | USART_DMACmd(SERIAL_UART, USART_DMAReq_Tx, ENABLE); 156 | 157 | USART_Cmd(SERIAL_UART, ENABLE); 158 | } 159 | 160 | // USART tx DMA IRQ 161 | void DMA1_Channel4_IRQHandler(void) { 162 | DMA_ClearITPendingBit(DMA1_IT_TC4); 163 | DMA_Cmd(SERIAL_TX_DMA, DISABLE); 164 | 165 | if (serialPort.txHead != serialPort.txTail) 166 | serialStartTxDMA(); 167 | } 168 | 169 | void serialSetConstants(void) { 170 | p[BAUD_RATE] = (int)p[BAUD_RATE]; 171 | 172 | if (p[BAUD_RATE] < SERIAL_MIN_BAUD) 173 | p[BAUD_RATE] = SERIAL_MIN_BAUD; 174 | else if (p[BAUD_RATE] > SERIAL_MAX_BAUD) 175 | p[BAUD_RATE] = SERIAL_MAX_BAUD; 176 | 177 | serialOpenPort(p[BAUD_RATE]); 178 | } 179 | -------------------------------------------------------------------------------- /src/serial.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _SERIAL_H 20 | #define _SERIAL_H 21 | 22 | #include "stm32f10x_usart.h" 23 | 24 | #define SERIAL_UART USART1 25 | //#define SERIAL_FLOW_CONTROL USART_HardwareFlowControl_RTS_CTS 26 | #define SERIAL_FLOW_CONTROL USART_HardwareFlowControl_None 27 | #define SERIAL_UART_PORT GPIOA 28 | #define SERIAL_UART_TX_PIN GPIO_Pin_9 29 | #define SERIAL_UART_RX_PIN GPIO_Pin_10 30 | #define SERIAL_UART_CTS_PIN GPIO_Pin_11 31 | #define SERIAL_UART_RTS_PIN GPIO_Pin_12 32 | #define SERIAL_TX_DMA DMA1_Channel4 33 | #define SERIAL_RX_DMA DMA1_Channel5 34 | 35 | #define SERIAL_MIN_BAUD 9600 36 | #define SERIAL_MAX_BAUD 921600 37 | 38 | #define SERIAL_TX_BUFSIZE 8192 39 | #define SERIAL_RX_BUFSIZE 256 40 | 41 | typedef struct { 42 | volatile unsigned char txBuf[SERIAL_TX_BUFSIZE]; 43 | unsigned int txHead, txTail; 44 | volatile unsigned char rxBuf[SERIAL_RX_BUFSIZE]; 45 | volatile unsigned int rxHead, rxTail; 46 | unsigned int rxPos; 47 | } serialPort_t; 48 | 49 | extern void serialInit(void); 50 | extern void serialWrite(int ch); 51 | extern void serialPrint(const char *str); 52 | extern unsigned char serialAvailable(); 53 | extern int serialRead(); 54 | extern void serialSetConstants(void); 55 | 56 | 57 | #endif 58 | -------------------------------------------------------------------------------- /src/stm32f10x.h: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/limhyon/esc32/17208906fe7566569935ced578112b4315102930/src/stm32f10x.h -------------------------------------------------------------------------------- /src/stm32f10x_conf.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 08-April-2011 7 | * @brief Library configuration file. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Define to prevent recursive inclusion -------------------------------------*/ 23 | #ifndef __STM32F10x_CONF_H 24 | #define __STM32F10x_CONF_H 25 | 26 | /* Includes ------------------------------------------------------------------*/ 27 | /* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ 28 | #include "stm32f10x_adc.h" 29 | //#include "stm32f10x_bkp.h" 30 | //#include "stm32f10x_can.h" 31 | //#include "stm32f10x_cec.h" 32 | //#include "stm32f10x_crc.h" 33 | //#include "stm32f10x_dac.h" 34 | #include "stm32f10x_dbgmcu.h" 35 | #include "stm32f10x_dma.h" 36 | #include "stm32f10x_exti.h" 37 | #include "stm32f10x_flash.h" 38 | //#include "stm32f10x_fsmc.h" 39 | #include "stm32f10x_gpio.h" 40 | //#include "stm32f10x_i2c.h" 41 | #include "stm32f10x_iwdg.h" 42 | #include "stm32f10x_pwr.h" 43 | #include "stm32f10x_rcc.h" 44 | //#include "stm32f10x_rtc.h" 45 | //#include "stm32f10x_sdio.h" 46 | //#include "stm32f10x_spi.h" 47 | #include "stm32f10x_tim.h" 48 | #include "stm32f10x_usart.h" 49 | //#include "stm32f10x_wwdg.h" 50 | #include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ 51 | 52 | /* Exported types ------------------------------------------------------------*/ 53 | /* Exported constants --------------------------------------------------------*/ 54 | /* Uncomment the line below to expanse the "assert_param" macro in the 55 | Standard Peripheral Library drivers code */ 56 | #define USE_FULL_ASSERT 1 57 | 58 | /* Exported macro ------------------------------------------------------------*/ 59 | #ifdef USE_FULL_ASSERT 60 | 61 | /** 62 | * @brief The assert_param macro is used for function's parameters check. 63 | * @param expr: If expr is false, it calls assert_failed function which reports 64 | * the name of the source file and the source line number of the call 65 | * that failed. If expr is true, it returns no value. 66 | * @retval None 67 | */ 68 | #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) 69 | /* Exported functions ------------------------------------------------------- */ 70 | void assert_failed(uint8_t* file, uint32_t line); 71 | #else 72 | #define assert_param(expr) ((void)0) 73 | #endif /* USE_FULL_ASSERT */ 74 | 75 | #endif /* __STM32F10x_CONF_H */ 76 | 77 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 78 | -------------------------------------------------------------------------------- /src/stm32f10x_dbgmcu.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the DBGMCU firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_dbgmcu.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup DBGMCU 30 | * @brief DBGMCU driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup DBGMCU_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup DBGMCU_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) 47 | /** 48 | * @} 49 | */ 50 | 51 | /** @defgroup DBGMCU_Private_Macros 52 | * @{ 53 | */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @defgroup DBGMCU_Private_Variables 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @defgroup DBGMCU_Private_FunctionPrototypes 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @defgroup DBGMCU_Private_Functions 76 | * @{ 77 | */ 78 | 79 | /** 80 | * @brief Returns the device revision identifier. 81 | * @param None 82 | * @retval Device revision identifier 83 | */ 84 | uint32_t DBGMCU_GetREVID(void) 85 | { 86 | return(DBGMCU->IDCODE >> 16); 87 | } 88 | 89 | /** 90 | * @brief Returns the device identifier. 91 | * @param None 92 | * @retval Device identifier 93 | */ 94 | uint32_t DBGMCU_GetDEVID(void) 95 | { 96 | return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); 97 | } 98 | 99 | /** 100 | * @brief Configures the specified peripheral and low power mode behavior 101 | * when the MCU under Debug mode. 102 | * @param DBGMCU_Periph: specifies the peripheral and low power mode. 103 | * This parameter can be any combination of the following values: 104 | * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode 105 | * @arg DBGMCU_STOP: Keep debugger connection during STOP mode 106 | * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode 107 | * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted 108 | * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted 109 | * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted 110 | * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted 111 | * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted 112 | * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted 113 | * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted 114 | * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted 115 | * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted 116 | * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted 117 | * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted 118 | * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted 119 | * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted 120 | * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted 121 | * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted 122 | * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted 123 | * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted 124 | * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted 125 | * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted 126 | * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted 127 | * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted 128 | * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted 129 | * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted 130 | * @param NewState: new state of the specified peripheral in Debug mode. 131 | * This parameter can be: ENABLE or DISABLE. 132 | * @retval None 133 | */ 134 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) 135 | { 136 | /* Check the parameters */ 137 | assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); 138 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 139 | 140 | if (NewState != DISABLE) 141 | { 142 | DBGMCU->CR |= DBGMCU_Periph; 143 | } 144 | else 145 | { 146 | DBGMCU->CR &= ~DBGMCU_Periph; 147 | } 148 | } 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** 155 | * @} 156 | */ 157 | 158 | /** 159 | * @} 160 | */ 161 | 162 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 163 | -------------------------------------------------------------------------------- /src/stm32f10x_dbgmcu.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_dbgmcu.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the DBGMCU 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_DBGMCU_H 25 | #define __STM32F10x_DBGMCU_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup DBGMCU 39 | * @{ 40 | */ 41 | 42 | /** @defgroup DBGMCU_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup DBGMCU_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | #define DBGMCU_SLEEP ((uint32_t)0x00000001) 55 | #define DBGMCU_STOP ((uint32_t)0x00000002) 56 | #define DBGMCU_STANDBY ((uint32_t)0x00000004) 57 | #define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) 58 | #define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) 59 | #define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) 60 | #define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) 61 | #define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) 62 | #define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) 63 | #define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) 64 | #define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) 65 | #define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) 66 | #define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) 67 | #define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) 68 | #define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) 69 | #define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) 70 | #define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) 71 | #define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) 72 | #define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) 73 | #define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) 74 | #define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) 75 | #define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) 76 | #define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) 77 | #define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) 78 | #define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) 79 | #define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) 80 | 81 | #define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup DBGMCU_Exported_Macros 87 | * @{ 88 | */ 89 | 90 | /** 91 | * @} 92 | */ 93 | 94 | /** @defgroup DBGMCU_Exported_Functions 95 | * @{ 96 | */ 97 | 98 | uint32_t DBGMCU_GetREVID(void); 99 | uint32_t DBGMCU_GetDEVID(void); 100 | void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); 101 | 102 | #ifdef __cplusplus 103 | } 104 | #endif 105 | 106 | #endif /* __STM32F10x_DBGMCU_H */ 107 | /** 108 | * @} 109 | */ 110 | 111 | /** 112 | * @} 113 | */ 114 | 115 | /** 116 | * @} 117 | */ 118 | 119 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 120 | -------------------------------------------------------------------------------- /src/stm32f10x_exti.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the EXTI firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_exti.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup EXTI 30 | * @brief EXTI driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup EXTI_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup EXTI_Private_Defines 43 | * @{ 44 | */ 45 | 46 | #define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ 47 | 48 | /** 49 | * @} 50 | */ 51 | 52 | /** @defgroup EXTI_Private_Macros 53 | * @{ 54 | */ 55 | 56 | /** 57 | * @} 58 | */ 59 | 60 | /** @defgroup EXTI_Private_Variables 61 | * @{ 62 | */ 63 | 64 | /** 65 | * @} 66 | */ 67 | 68 | /** @defgroup EXTI_Private_FunctionPrototypes 69 | * @{ 70 | */ 71 | 72 | /** 73 | * @} 74 | */ 75 | 76 | /** @defgroup EXTI_Private_Functions 77 | * @{ 78 | */ 79 | 80 | /** 81 | * @brief Deinitializes the EXTI peripheral registers to their default reset values. 82 | * @param None 83 | * @retval None 84 | */ 85 | void EXTI_DeInit(void) 86 | { 87 | EXTI->IMR = 0x00000000; 88 | EXTI->EMR = 0x00000000; 89 | EXTI->RTSR = 0x00000000; 90 | EXTI->FTSR = 0x00000000; 91 | EXTI->PR = 0x000FFFFF; 92 | } 93 | 94 | /** 95 | * @brief Initializes the EXTI peripheral according to the specified 96 | * parameters in the EXTI_InitStruct. 97 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure 98 | * that contains the configuration information for the EXTI peripheral. 99 | * @retval None 100 | */ 101 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) 102 | { 103 | uint32_t tmp = 0; 104 | 105 | /* Check the parameters */ 106 | assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); 107 | assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); 108 | assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); 109 | assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); 110 | 111 | tmp = (uint32_t)EXTI_BASE; 112 | 113 | if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) 114 | { 115 | /* Clear EXTI line configuration */ 116 | EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; 117 | EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; 118 | 119 | tmp += EXTI_InitStruct->EXTI_Mode; 120 | 121 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 122 | 123 | /* Clear Rising Falling edge configuration */ 124 | EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; 125 | EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; 126 | 127 | /* Select the trigger for the selected external interrupts */ 128 | if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) 129 | { 130 | /* Rising Falling edge */ 131 | EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; 132 | EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; 133 | } 134 | else 135 | { 136 | tmp = (uint32_t)EXTI_BASE; 137 | tmp += EXTI_InitStruct->EXTI_Trigger; 138 | 139 | *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; 140 | } 141 | } 142 | else 143 | { 144 | tmp += EXTI_InitStruct->EXTI_Mode; 145 | 146 | /* Disable the selected external lines */ 147 | *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; 148 | } 149 | } 150 | 151 | /** 152 | * @brief Fills each EXTI_InitStruct member with its reset value. 153 | * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will 154 | * be initialized. 155 | * @retval None 156 | */ 157 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) 158 | { 159 | EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; 160 | EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; 161 | EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; 162 | EXTI_InitStruct->EXTI_LineCmd = DISABLE; 163 | } 164 | 165 | /** 166 | * @brief Generates a Software interrupt. 167 | * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. 168 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 169 | * @retval None 170 | */ 171 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) 172 | { 173 | /* Check the parameters */ 174 | assert_param(IS_EXTI_LINE(EXTI_Line)); 175 | 176 | EXTI->SWIER |= EXTI_Line; 177 | } 178 | 179 | /** 180 | * @brief Checks whether the specified EXTI line flag is set or not. 181 | * @param EXTI_Line: specifies the EXTI line flag to check. 182 | * This parameter can be: 183 | * @arg EXTI_Linex: External interrupt line x where x(0..19) 184 | * @retval The new state of EXTI_Line (SET or RESET). 185 | */ 186 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) 187 | { 188 | FlagStatus bitstatus = RESET; 189 | /* Check the parameters */ 190 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 191 | 192 | if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) 193 | { 194 | bitstatus = SET; 195 | } 196 | else 197 | { 198 | bitstatus = RESET; 199 | } 200 | return bitstatus; 201 | } 202 | 203 | /** 204 | * @brief Clears the EXTI's line pending flags. 205 | * @param EXTI_Line: specifies the EXTI lines flags to clear. 206 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 207 | * @retval None 208 | */ 209 | void EXTI_ClearFlag(uint32_t EXTI_Line) 210 | { 211 | /* Check the parameters */ 212 | assert_param(IS_EXTI_LINE(EXTI_Line)); 213 | 214 | EXTI->PR = EXTI_Line; 215 | } 216 | 217 | /** 218 | * @brief Checks whether the specified EXTI line is asserted or not. 219 | * @param EXTI_Line: specifies the EXTI line to check. 220 | * This parameter can be: 221 | * @arg EXTI_Linex: External interrupt line x where x(0..19) 222 | * @retval The new state of EXTI_Line (SET or RESET). 223 | */ 224 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) 225 | { 226 | ITStatus bitstatus = RESET; 227 | uint32_t enablestatus = 0; 228 | /* Check the parameters */ 229 | assert_param(IS_GET_EXTI_LINE(EXTI_Line)); 230 | 231 | enablestatus = EXTI->IMR & EXTI_Line; 232 | if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) 233 | { 234 | bitstatus = SET; 235 | } 236 | else 237 | { 238 | bitstatus = RESET; 239 | } 240 | return bitstatus; 241 | } 242 | 243 | /** 244 | * @brief Clears the EXTI's line pending bits. 245 | * @param EXTI_Line: specifies the EXTI lines to clear. 246 | * This parameter can be any combination of EXTI_Linex where x can be (0..19). 247 | * @retval None 248 | */ 249 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line) 250 | { 251 | /* Check the parameters */ 252 | assert_param(IS_EXTI_LINE(EXTI_Line)); 253 | 254 | EXTI->PR = EXTI_Line; 255 | } 256 | 257 | /** 258 | * @} 259 | */ 260 | 261 | /** 262 | * @} 263 | */ 264 | 265 | /** 266 | * @} 267 | */ 268 | 269 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 270 | -------------------------------------------------------------------------------- /src/stm32f10x_exti.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_exti.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the EXTI firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_EXTI_H 25 | #define __STM32F10x_EXTI_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup EXTI 39 | * @{ 40 | */ 41 | 42 | /** @defgroup EXTI_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @brief EXTI mode enumeration 48 | */ 49 | 50 | typedef enum 51 | { 52 | EXTI_Mode_Interrupt = 0x00, 53 | EXTI_Mode_Event = 0x04 54 | }EXTIMode_TypeDef; 55 | 56 | #define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) 57 | 58 | /** 59 | * @brief EXTI Trigger enumeration 60 | */ 61 | 62 | typedef enum 63 | { 64 | EXTI_Trigger_Rising = 0x08, 65 | EXTI_Trigger_Falling = 0x0C, 66 | EXTI_Trigger_Rising_Falling = 0x10 67 | }EXTITrigger_TypeDef; 68 | 69 | #define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ 70 | ((TRIGGER) == EXTI_Trigger_Falling) || \ 71 | ((TRIGGER) == EXTI_Trigger_Rising_Falling)) 72 | /** 73 | * @brief EXTI Init Structure definition 74 | */ 75 | 76 | typedef struct 77 | { 78 | uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. 79 | This parameter can be any combination of @ref EXTI_Lines */ 80 | 81 | EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. 82 | This parameter can be a value of @ref EXTIMode_TypeDef */ 83 | 84 | EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. 85 | This parameter can be a value of @ref EXTIMode_TypeDef */ 86 | 87 | FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. 88 | This parameter can be set either to ENABLE or DISABLE */ 89 | }EXTI_InitTypeDef; 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup EXTI_Exported_Constants 96 | * @{ 97 | */ 98 | 99 | /** @defgroup EXTI_Lines 100 | * @{ 101 | */ 102 | 103 | #define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ 104 | #define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ 105 | #define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ 106 | #define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ 107 | #define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ 108 | #define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ 109 | #define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ 110 | #define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ 111 | #define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ 112 | #define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ 113 | #define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ 114 | #define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ 115 | #define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ 116 | #define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ 117 | #define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ 118 | #define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ 119 | #define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ 120 | #define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ 121 | #define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS 122 | Wakeup from suspend event */ 123 | #define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ 124 | 125 | #define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) 126 | #define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ 127 | ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ 128 | ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ 129 | ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ 130 | ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ 131 | ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ 132 | ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ 133 | ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ 134 | ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ 135 | ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) 136 | 137 | 138 | /** 139 | * @} 140 | */ 141 | 142 | /** 143 | * @} 144 | */ 145 | 146 | /** @defgroup EXTI_Exported_Macros 147 | * @{ 148 | */ 149 | 150 | /** 151 | * @} 152 | */ 153 | 154 | /** @defgroup EXTI_Exported_Functions 155 | * @{ 156 | */ 157 | 158 | void EXTI_DeInit(void); 159 | void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); 160 | void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); 161 | void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); 162 | FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); 163 | void EXTI_ClearFlag(uint32_t EXTI_Line); 164 | ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); 165 | void EXTI_ClearITPendingBit(uint32_t EXTI_Line); 166 | 167 | #ifdef __cplusplus 168 | } 169 | #endif 170 | 171 | #endif /* __STM32F10x_EXTI_H */ 172 | /** 173 | * @} 174 | */ 175 | 176 | /** 177 | * @} 178 | */ 179 | 180 | /** 181 | * @} 182 | */ 183 | 184 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 185 | -------------------------------------------------------------------------------- /src/stm32f10x_flash.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/limhyon/esc32/17208906fe7566569935ced578112b4315102930/src/stm32f10x_flash.c -------------------------------------------------------------------------------- /src/stm32f10x_iwdg.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the IWDG firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_iwdg.h" 24 | 25 | /** @addtogroup STM32F10x_StdPeriph_Driver 26 | * @{ 27 | */ 28 | 29 | /** @defgroup IWDG 30 | * @brief IWDG driver modules 31 | * @{ 32 | */ 33 | 34 | /** @defgroup IWDG_Private_TypesDefinitions 35 | * @{ 36 | */ 37 | 38 | /** 39 | * @} 40 | */ 41 | 42 | /** @defgroup IWDG_Private_Defines 43 | * @{ 44 | */ 45 | 46 | /* ---------------------- IWDG registers bit mask ----------------------------*/ 47 | 48 | /* KR register bit mask */ 49 | #define KR_KEY_Reload ((uint16_t)0xAAAA) 50 | #define KR_KEY_Enable ((uint16_t)0xCCCC) 51 | 52 | /** 53 | * @} 54 | */ 55 | 56 | /** @defgroup IWDG_Private_Macros 57 | * @{ 58 | */ 59 | 60 | /** 61 | * @} 62 | */ 63 | 64 | /** @defgroup IWDG_Private_Variables 65 | * @{ 66 | */ 67 | 68 | /** 69 | * @} 70 | */ 71 | 72 | /** @defgroup IWDG_Private_FunctionPrototypes 73 | * @{ 74 | */ 75 | 76 | /** 77 | * @} 78 | */ 79 | 80 | /** @defgroup IWDG_Private_Functions 81 | * @{ 82 | */ 83 | 84 | /** 85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. 86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. 87 | * This parameter can be one of the following values: 88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers 89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers 90 | * @retval None 91 | */ 92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) 93 | { 94 | /* Check the parameters */ 95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); 96 | IWDG->KR = IWDG_WriteAccess; 97 | } 98 | 99 | /** 100 | * @brief Sets IWDG Prescaler value. 101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value. 102 | * This parameter can be one of the following values: 103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 110 | * @retval None 111 | */ 112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) 113 | { 114 | /* Check the parameters */ 115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); 116 | IWDG->PR = IWDG_Prescaler; 117 | } 118 | 119 | /** 120 | * @brief Sets IWDG Reload value. 121 | * @param Reload: specifies the IWDG Reload value. 122 | * This parameter must be a number between 0 and 0x0FFF. 123 | * @retval None 124 | */ 125 | void IWDG_SetReload(uint16_t Reload) 126 | { 127 | /* Check the parameters */ 128 | assert_param(IS_IWDG_RELOAD(Reload)); 129 | IWDG->RLR = Reload; 130 | } 131 | 132 | /** 133 | * @brief Reloads IWDG counter with value defined in the reload register 134 | * (write access to IWDG_PR and IWDG_RLR registers disabled). 135 | * @param None 136 | * @retval None 137 | */ 138 | void IWDG_ReloadCounter(void) 139 | { 140 | IWDG->KR = KR_KEY_Reload; 141 | } 142 | 143 | /** 144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). 145 | * @param None 146 | * @retval None 147 | */ 148 | void IWDG_Enable(void) 149 | { 150 | IWDG->KR = KR_KEY_Enable; 151 | } 152 | 153 | /** 154 | * @brief Checks whether the specified IWDG flag is set or not. 155 | * @param IWDG_FLAG: specifies the flag to check. 156 | * This parameter can be one of the following values: 157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going 158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going 159 | * @retval The new state of IWDG_FLAG (SET or RESET). 160 | */ 161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) 162 | { 163 | FlagStatus bitstatus = RESET; 164 | /* Check the parameters */ 165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); 166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) 167 | { 168 | bitstatus = SET; 169 | } 170 | else 171 | { 172 | bitstatus = RESET; 173 | } 174 | /* Return the flag status */ 175 | return bitstatus; 176 | } 177 | 178 | /** 179 | * @} 180 | */ 181 | 182 | /** 183 | * @} 184 | */ 185 | 186 | /** 187 | * @} 188 | */ 189 | 190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 191 | -------------------------------------------------------------------------------- /src/stm32f10x_iwdg.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_iwdg.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the IWDG 8 | * firmware library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_IWDG_H 25 | #define __STM32F10x_IWDG_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup IWDG 39 | * @{ 40 | */ 41 | 42 | /** @defgroup IWDG_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup IWDG_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup IWDG_WriteAccess 55 | * @{ 56 | */ 57 | 58 | #define IWDG_WriteAccess_Enable ((uint16_t)0x5555) 59 | #define IWDG_WriteAccess_Disable ((uint16_t)0x0000) 60 | #define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ 61 | ((ACCESS) == IWDG_WriteAccess_Disable)) 62 | /** 63 | * @} 64 | */ 65 | 66 | /** @defgroup IWDG_prescaler 67 | * @{ 68 | */ 69 | 70 | #define IWDG_Prescaler_4 ((uint8_t)0x00) 71 | #define IWDG_Prescaler_8 ((uint8_t)0x01) 72 | #define IWDG_Prescaler_16 ((uint8_t)0x02) 73 | #define IWDG_Prescaler_32 ((uint8_t)0x03) 74 | #define IWDG_Prescaler_64 ((uint8_t)0x04) 75 | #define IWDG_Prescaler_128 ((uint8_t)0x05) 76 | #define IWDG_Prescaler_256 ((uint8_t)0x06) 77 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ 78 | ((PRESCALER) == IWDG_Prescaler_8) || \ 79 | ((PRESCALER) == IWDG_Prescaler_16) || \ 80 | ((PRESCALER) == IWDG_Prescaler_32) || \ 81 | ((PRESCALER) == IWDG_Prescaler_64) || \ 82 | ((PRESCALER) == IWDG_Prescaler_128)|| \ 83 | ((PRESCALER) == IWDG_Prescaler_256)) 84 | /** 85 | * @} 86 | */ 87 | 88 | /** @defgroup IWDG_Flag 89 | * @{ 90 | */ 91 | 92 | #define IWDG_FLAG_PVU ((uint16_t)0x0001) 93 | #define IWDG_FLAG_RVU ((uint16_t)0x0002) 94 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) 95 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) 96 | /** 97 | * @} 98 | */ 99 | 100 | /** 101 | * @} 102 | */ 103 | 104 | /** @defgroup IWDG_Exported_Macros 105 | * @{ 106 | */ 107 | 108 | /** 109 | * @} 110 | */ 111 | 112 | /** @defgroup IWDG_Exported_Functions 113 | * @{ 114 | */ 115 | 116 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); 117 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); 118 | void IWDG_SetReload(uint16_t Reload); 119 | void IWDG_ReloadCounter(void); 120 | void IWDG_Enable(void); 121 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); 122 | 123 | #ifdef __cplusplus 124 | } 125 | #endif 126 | 127 | #endif /* __STM32F10x_IWDG_H */ 128 | /** 129 | * @} 130 | */ 131 | 132 | /** 133 | * @} 134 | */ 135 | 136 | /** 137 | * @} 138 | */ 139 | 140 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 141 | -------------------------------------------------------------------------------- /src/stm32f10x_pwr.c: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_pwr.c 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file provides all the PWR firmware functions. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /* Includes ------------------------------------------------------------------*/ 23 | #include "stm32f10x_pwr.h" 24 | #include "stm32f10x_rcc.h" 25 | 26 | /** @addtogroup STM32F10x_StdPeriph_Driver 27 | * @{ 28 | */ 29 | 30 | /** @defgroup PWR 31 | * @brief PWR driver modules 32 | * @{ 33 | */ 34 | 35 | /** @defgroup PWR_Private_TypesDefinitions 36 | * @{ 37 | */ 38 | 39 | /** 40 | * @} 41 | */ 42 | 43 | /** @defgroup PWR_Private_Defines 44 | * @{ 45 | */ 46 | 47 | /* --------- PWR registers bit address in the alias region ---------- */ 48 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) 49 | 50 | /* --- CR Register ---*/ 51 | 52 | /* Alias word address of DBP bit */ 53 | #define CR_OFFSET (PWR_OFFSET + 0x00) 54 | #define DBP_BitNumber 0x08 55 | #define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) 56 | 57 | /* Alias word address of PVDE bit */ 58 | #define PVDE_BitNumber 0x04 59 | #define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) 60 | 61 | /* --- CSR Register ---*/ 62 | 63 | /* Alias word address of EWUP bit */ 64 | #define CSR_OFFSET (PWR_OFFSET + 0x04) 65 | #define EWUP_BitNumber 0x08 66 | #define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4)) 67 | 68 | /* ------------------ PWR registers bit mask ------------------------ */ 69 | 70 | /* CR register bit mask */ 71 | #define CR_DS_MASK ((uint32_t)0xFFFFFFFC) 72 | #define CR_PLS_MASK ((uint32_t)0xFFFFFF1F) 73 | 74 | 75 | /** 76 | * @} 77 | */ 78 | 79 | /** @defgroup PWR_Private_Macros 80 | * @{ 81 | */ 82 | 83 | /** 84 | * @} 85 | */ 86 | 87 | /** @defgroup PWR_Private_Variables 88 | * @{ 89 | */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** @defgroup PWR_Private_FunctionPrototypes 96 | * @{ 97 | */ 98 | 99 | /** 100 | * @} 101 | */ 102 | 103 | /** @defgroup PWR_Private_Functions 104 | * @{ 105 | */ 106 | 107 | /** 108 | * @brief Deinitializes the PWR peripheral registers to their default reset values. 109 | * @param None 110 | * @retval None 111 | */ 112 | void PWR_DeInit(void) 113 | { 114 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); 115 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); 116 | } 117 | 118 | /** 119 | * @brief Enables or disables access to the RTC and backup registers. 120 | * @param NewState: new state of the access to the RTC and backup registers. 121 | * This parameter can be: ENABLE or DISABLE. 122 | * @retval None 123 | */ 124 | void PWR_BackupAccessCmd(FunctionalState NewState) 125 | { 126 | /* Check the parameters */ 127 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 128 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; 129 | } 130 | 131 | /** 132 | * @brief Enables or disables the Power Voltage Detector(PVD). 133 | * @param NewState: new state of the PVD. 134 | * This parameter can be: ENABLE or DISABLE. 135 | * @retval None 136 | */ 137 | void PWR_PVDCmd(FunctionalState NewState) 138 | { 139 | /* Check the parameters */ 140 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 141 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; 142 | } 143 | 144 | /** 145 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). 146 | * @param PWR_PVDLevel: specifies the PVD detection level 147 | * This parameter can be one of the following values: 148 | * @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V 149 | * @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V 150 | * @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V 151 | * @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V 152 | * @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V 153 | * @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V 154 | * @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V 155 | * @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V 156 | * @retval None 157 | */ 158 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) 159 | { 160 | uint32_t tmpreg = 0; 161 | /* Check the parameters */ 162 | assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); 163 | tmpreg = PWR->CR; 164 | /* Clear PLS[7:5] bits */ 165 | tmpreg &= CR_PLS_MASK; 166 | /* Set PLS[7:5] bits according to PWR_PVDLevel value */ 167 | tmpreg |= PWR_PVDLevel; 168 | /* Store the new value */ 169 | PWR->CR = tmpreg; 170 | } 171 | 172 | /** 173 | * @brief Enables or disables the WakeUp Pin functionality. 174 | * @param NewState: new state of the WakeUp Pin functionality. 175 | * This parameter can be: ENABLE or DISABLE. 176 | * @retval None 177 | */ 178 | void PWR_WakeUpPinCmd(FunctionalState NewState) 179 | { 180 | /* Check the parameters */ 181 | assert_param(IS_FUNCTIONAL_STATE(NewState)); 182 | *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState; 183 | } 184 | 185 | /** 186 | * @brief Enters STOP mode. 187 | * @param PWR_Regulator: specifies the regulator state in STOP mode. 188 | * This parameter can be one of the following values: 189 | * @arg PWR_Regulator_ON: STOP mode with regulator ON 190 | * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode 191 | * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. 192 | * This parameter can be one of the following values: 193 | * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction 194 | * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction 195 | * @retval None 196 | */ 197 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) 198 | { 199 | uint32_t tmpreg = 0; 200 | /* Check the parameters */ 201 | assert_param(IS_PWR_REGULATOR(PWR_Regulator)); 202 | assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); 203 | 204 | /* Select the regulator state in STOP mode ---------------------------------*/ 205 | tmpreg = PWR->CR; 206 | /* Clear PDDS and LPDS bits */ 207 | tmpreg &= CR_DS_MASK; 208 | /* Set LPDS bit according to PWR_Regulator value */ 209 | tmpreg |= PWR_Regulator; 210 | /* Store the new value */ 211 | PWR->CR = tmpreg; 212 | /* Set SLEEPDEEP bit of Cortex System Control Register */ 213 | SCB->SCR |= SCB_SCR_SLEEPDEEP; 214 | 215 | /* Select STOP mode entry --------------------------------------------------*/ 216 | if(PWR_STOPEntry == PWR_STOPEntry_WFI) 217 | { 218 | /* Request Wait For Interrupt */ 219 | __WFI(); 220 | } 221 | else 222 | { 223 | /* Request Wait For Event */ 224 | __WFE(); 225 | } 226 | 227 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ 228 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); 229 | } 230 | 231 | /** 232 | * @brief Enters STANDBY mode. 233 | * @param None 234 | * @retval None 235 | */ 236 | void PWR_EnterSTANDBYMode(void) 237 | { 238 | /* Clear Wake-up flag */ 239 | PWR->CR |= PWR_CR_CWUF; 240 | /* Select STANDBY mode */ 241 | PWR->CR |= PWR_CR_PDDS; 242 | /* Set SLEEPDEEP bit of Cortex System Control Register */ 243 | SCB->SCR |= SCB_SCR_SLEEPDEEP; 244 | /* This option is used to ensure that store operations are completed */ 245 | #if defined ( __CC_ARM ) 246 | __force_stores(); 247 | #endif 248 | /* Request Wait For Interrupt */ 249 | __WFI(); 250 | } 251 | 252 | /** 253 | * @brief Checks whether the specified PWR flag is set or not. 254 | * @param PWR_FLAG: specifies the flag to check. 255 | * This parameter can be one of the following values: 256 | * @arg PWR_FLAG_WU: Wake Up flag 257 | * @arg PWR_FLAG_SB: StandBy flag 258 | * @arg PWR_FLAG_PVDO: PVD Output 259 | * @retval The new state of PWR_FLAG (SET or RESET). 260 | */ 261 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) 262 | { 263 | FlagStatus bitstatus = RESET; 264 | /* Check the parameters */ 265 | assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); 266 | 267 | if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) 268 | { 269 | bitstatus = SET; 270 | } 271 | else 272 | { 273 | bitstatus = RESET; 274 | } 275 | /* Return the flag status */ 276 | return bitstatus; 277 | } 278 | 279 | /** 280 | * @brief Clears the PWR's pending flags. 281 | * @param PWR_FLAG: specifies the flag to clear. 282 | * This parameter can be one of the following values: 283 | * @arg PWR_FLAG_WU: Wake Up flag 284 | * @arg PWR_FLAG_SB: StandBy flag 285 | * @retval None 286 | */ 287 | void PWR_ClearFlag(uint32_t PWR_FLAG) 288 | { 289 | /* Check the parameters */ 290 | assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); 291 | 292 | PWR->CR |= PWR_FLAG << 2; 293 | } 294 | 295 | /** 296 | * @} 297 | */ 298 | 299 | /** 300 | * @} 301 | */ 302 | 303 | /** 304 | * @} 305 | */ 306 | 307 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 308 | -------------------------------------------------------------------------------- /src/stm32f10x_pwr.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file stm32f10x_pwr.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief This file contains all the functions prototypes for the PWR firmware 8 | * library. 9 | ****************************************************************************** 10 | * @attention 11 | * 12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 18 | * 19 | *

© COPYRIGHT 2011 STMicroelectronics

20 | ****************************************************************************** 21 | */ 22 | 23 | /* Define to prevent recursive inclusion -------------------------------------*/ 24 | #ifndef __STM32F10x_PWR_H 25 | #define __STM32F10x_PWR_H 26 | 27 | #ifdef __cplusplus 28 | extern "C" { 29 | #endif 30 | 31 | /* Includes ------------------------------------------------------------------*/ 32 | #include "stm32f10x.h" 33 | 34 | /** @addtogroup STM32F10x_StdPeriph_Driver 35 | * @{ 36 | */ 37 | 38 | /** @addtogroup PWR 39 | * @{ 40 | */ 41 | 42 | /** @defgroup PWR_Exported_Types 43 | * @{ 44 | */ 45 | 46 | /** 47 | * @} 48 | */ 49 | 50 | /** @defgroup PWR_Exported_Constants 51 | * @{ 52 | */ 53 | 54 | /** @defgroup PVD_detection_level 55 | * @{ 56 | */ 57 | 58 | #define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) 59 | #define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) 60 | #define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) 61 | #define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) 62 | #define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) 63 | #define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) 64 | #define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) 65 | #define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) 66 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ 67 | ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ 68 | ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ 69 | ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) 70 | /** 71 | * @} 72 | */ 73 | 74 | /** @defgroup Regulator_state_is_STOP_mode 75 | * @{ 76 | */ 77 | 78 | #define PWR_Regulator_ON ((uint32_t)0x00000000) 79 | #define PWR_Regulator_LowPower ((uint32_t)0x00000001) 80 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ 81 | ((REGULATOR) == PWR_Regulator_LowPower)) 82 | /** 83 | * @} 84 | */ 85 | 86 | /** @defgroup STOP_mode_entry 87 | * @{ 88 | */ 89 | 90 | #define PWR_STOPEntry_WFI ((uint8_t)0x01) 91 | #define PWR_STOPEntry_WFE ((uint8_t)0x02) 92 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) 93 | 94 | /** 95 | * @} 96 | */ 97 | 98 | /** @defgroup PWR_Flag 99 | * @{ 100 | */ 101 | 102 | #define PWR_FLAG_WU ((uint32_t)0x00000001) 103 | #define PWR_FLAG_SB ((uint32_t)0x00000002) 104 | #define PWR_FLAG_PVDO ((uint32_t)0x00000004) 105 | #define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ 106 | ((FLAG) == PWR_FLAG_PVDO)) 107 | 108 | #define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) 109 | /** 110 | * @} 111 | */ 112 | 113 | /** 114 | * @} 115 | */ 116 | 117 | /** @defgroup PWR_Exported_Macros 118 | * @{ 119 | */ 120 | 121 | /** 122 | * @} 123 | */ 124 | 125 | /** @defgroup PWR_Exported_Functions 126 | * @{ 127 | */ 128 | 129 | void PWR_DeInit(void); 130 | void PWR_BackupAccessCmd(FunctionalState NewState); 131 | void PWR_PVDCmd(FunctionalState NewState); 132 | void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); 133 | void PWR_WakeUpPinCmd(FunctionalState NewState); 134 | void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); 135 | void PWR_EnterSTANDBYMode(void); 136 | FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); 137 | void PWR_ClearFlag(uint32_t PWR_FLAG); 138 | 139 | #ifdef __cplusplus 140 | } 141 | #endif 142 | 143 | #endif /* __STM32F10x_PWR_H */ 144 | /** 145 | * @} 146 | */ 147 | 148 | /** 149 | * @} 150 | */ 151 | 152 | /** 153 | * @} 154 | */ 155 | 156 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 157 | -------------------------------------------------------------------------------- /src/stm32f10x_usart.c: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/limhyon/esc32/17208906fe7566569935ced578112b4315102930/src/stm32f10x_usart.c -------------------------------------------------------------------------------- /src/syscalls.c: -------------------------------------------------------------------------------- 1 | /**************************************************************************** 2 | * Copyright (c) 2009 by Michael Fischer. All rights reserved. 3 | * 4 | * Redistribution and use in source and binary forms, with or without 5 | * modification, are permitted provided that the following conditions 6 | * are met: 7 | * 8 | * 1. Redistributions of source code must retain the above copyright 9 | * notice, this list of conditions and the following disclaimer. 10 | * 2. Redistributions in binary form must reproduce the above copyright 11 | * notice, this list of conditions and the following disclaimer in the 12 | * documentation and/or other materials provided with the distribution. 13 | * 3. Neither the name of the author nor the names of its contributors may 14 | * be used to endorse or promote products derived from this software 15 | * without specific prior written permission. 16 | * 17 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 20 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 | * THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 24 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 27 | * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 | * SUCH DAMAGE. 29 | * 30 | **************************************************************************** 31 | * History: 32 | * 33 | * 28.03.09 mifi First Version, based on the original syscall.c from 34 | * newlib version 1.17.0 35 | ****************************************************************************/ 36 | 37 | #include 38 | #include 39 | #include 40 | #include 41 | #include 42 | 43 | /***************************************************************************/ 44 | 45 | int _read_r (struct _reent *r, int file, char * ptr, int len) 46 | { 47 | r = r; 48 | file = file; 49 | ptr = ptr; 50 | len = len; 51 | 52 | errno = EINVAL; 53 | return -1; 54 | } 55 | 56 | /***************************************************************************/ 57 | 58 | int _lseek_r (struct _reent *r, int file, int ptr, int dir) 59 | { 60 | r = r; 61 | file = file; 62 | ptr = ptr; 63 | dir = dir; 64 | 65 | return 0; 66 | } 67 | 68 | /***************************************************************************/ 69 | 70 | int _write_r (struct _reent *r, int file, char * ptr, int len) 71 | { 72 | r = r; 73 | file = file; 74 | ptr = ptr; 75 | 76 | #if 0 77 | int index; 78 | 79 | /* For example, output string by UART */ 80 | for(index=0; index stack_ptr) 118 | { 119 | /* Some of the libstdc++-v3 tests rely upon detecting 120 | out of memory errors, so do not abort here. */ 121 | #if 0 122 | extern void abort (void); 123 | 124 | _write (1, "_sbrk: Heap and stack collision\n", 32); 125 | 126 | abort (); 127 | #else 128 | errno = ENOMEM; 129 | return (caddr_t) -1; 130 | #endif 131 | } 132 | 133 | heap_end += incr; 134 | 135 | return (caddr_t) prev_heap_end; 136 | } 137 | 138 | /***************************************************************************/ 139 | 140 | int _fstat_r (struct _reent *r, int file, struct stat * st) 141 | { 142 | r = r; 143 | file = file; 144 | 145 | memset (st, 0, sizeof (* st)); 146 | st->st_mode = S_IFCHR; 147 | return 0; 148 | } 149 | 150 | /***************************************************************************/ 151 | 152 | int _isatty_r(struct _reent *r, int fd) 153 | { 154 | r = r; 155 | fd = fd; 156 | 157 | return 1; 158 | } 159 | 160 | /*** EOF ***/ 161 | 162 | 163 | -------------------------------------------------------------------------------- /src/system_stm32f10x.h: -------------------------------------------------------------------------------- 1 | /** 2 | ****************************************************************************** 3 | * @file system_stm32f10x.h 4 | * @author MCD Application Team 5 | * @version V3.5.0 6 | * @date 11-March-2011 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. 8 | ****************************************************************************** 9 | * @attention 10 | * 11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE 13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY 14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING 15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE 16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 17 | * 18 | *

© COPYRIGHT 2011 STMicroelectronics

19 | ****************************************************************************** 20 | */ 21 | 22 | /** @addtogroup CMSIS 23 | * @{ 24 | */ 25 | 26 | /** @addtogroup stm32f10x_system 27 | * @{ 28 | */ 29 | 30 | /** 31 | * @brief Define to prevent recursive inclusion 32 | */ 33 | #ifndef __SYSTEM_STM32F10X_H 34 | #define __SYSTEM_STM32F10X_H 35 | 36 | #ifdef __cplusplus 37 | extern "C" { 38 | #endif 39 | 40 | /** @addtogroup STM32F10x_System_Includes 41 | * @{ 42 | */ 43 | 44 | /** 45 | * @} 46 | */ 47 | 48 | 49 | /** @addtogroup STM32F10x_System_Exported_types 50 | * @{ 51 | */ 52 | 53 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ 54 | 55 | /** 56 | * @} 57 | */ 58 | 59 | /** @addtogroup STM32F10x_System_Exported_Constants 60 | * @{ 61 | */ 62 | 63 | /** 64 | * @} 65 | */ 66 | 67 | /** @addtogroup STM32F10x_System_Exported_Macros 68 | * @{ 69 | */ 70 | 71 | /** 72 | * @} 73 | */ 74 | 75 | /** @addtogroup STM32F10x_System_Exported_Functions 76 | * @{ 77 | */ 78 | 79 | extern void SystemInit(void); 80 | extern void SystemCoreClockUpdate(void); 81 | /** 82 | * @} 83 | */ 84 | 85 | #ifdef __cplusplus 86 | } 87 | #endif 88 | 89 | #endif /*__SYSTEM_STM32F10X_H */ 90 | 91 | /** 92 | * @} 93 | */ 94 | 95 | /** 96 | * @} 97 | */ 98 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ 99 | -------------------------------------------------------------------------------- /src/timer.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #include "timer.h" 20 | #include "stm32f10x_tim.h" 21 | #include "misc.h" 22 | 23 | timerStruct_t timerData; 24 | volatile uint32_t timerMicros; 25 | 26 | // must be called at least once every 65536 ticks in order for this strategy to work 27 | // TODO - consider interrupt interference 28 | uint32_t timerGetMicros(void) { 29 | static uint16_t timerLast; 30 | static uint16_t hiBits; 31 | register uint16_t tmp; 32 | 33 | tmp = TIMER_TIM->CNT; 34 | 35 | if (tmp < timerLast) 36 | hiBits++; 37 | 38 | timerLast = tmp; 39 | 40 | timerMicros = (hiBits<<16 | tmp) & TIMER_MASK; 41 | 42 | return timerMicros; 43 | } 44 | 45 | void timerDelay(uint16_t us) { 46 | uint16_t cnt = TIMER_TIM->CNT; 47 | uint16_t targetTimerVal = cnt + us*TIMER_MULT; 48 | 49 | if (targetTimerVal < cnt) 50 | // wait till timer rolls over 51 | while (TIMER_TIM->CNT > targetTimerVal) 52 | ; 53 | 54 | while (TIMER_TIM->CNT < targetTimerVal) 55 | ; 56 | } 57 | 58 | void timerCancelAlarm1(void) { 59 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC1; 60 | TIM_ClearITPendingBit(TIMER_TIM, TIM_IT_CC1); 61 | } 62 | 63 | void timerCancelAlarm2(void) { 64 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC2; 65 | TIM_ClearITPendingBit(TIMER_TIM, TIM_IT_CC2); 66 | } 67 | 68 | void timerCancelAlarm3(void) { 69 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC3; 70 | TIM_ClearITPendingBit(TIMER_TIM, TIM_IT_CC3); 71 | } 72 | 73 | uint8_t timerAlarmActive3(void) { 74 | return (TIMER_TIM->DIER & TIM_IT_CC3); 75 | } 76 | 77 | // Create a timer 78 | void timerInit(void) { 79 | NVIC_InitTypeDef NVIC_InitStructure; 80 | TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; 81 | TIM_OCInitTypeDef TIM_OCInitStructure; 82 | 83 | // Enable the TIMER_TIM global Interrupt 84 | NVIC_InitStructure.NVIC_IRQChannel = TIMER_IRQ_CH; 85 | NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; 86 | NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; 87 | NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; 88 | NVIC_Init(&NVIC_InitStructure); 89 | 90 | // Time base configuration 91 | TIM_TimeBaseStructure.TIM_Prescaler = (72/TIMER_MULT) - 1; 92 | TIM_TimeBaseStructure.TIM_Period = 0xFFFF; 93 | TIM_TimeBaseStructure.TIM_ClockDivision = 0; 94 | TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; 95 | TIM_TimeBaseInit(TIMER_TIM, &TIM_TimeBaseStructure); 96 | 97 | timerCancelAlarm1(); 98 | timerCancelAlarm2(); 99 | timerCancelAlarm3(); 100 | 101 | // Output Compare for alarm 102 | TIM_OCStructInit(&TIM_OCInitStructure); 103 | TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Inactive; 104 | TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; 105 | TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; 106 | 107 | TIM_OC1Init(TIMER_TIM, &TIM_OCInitStructure); 108 | TIM_OC1PreloadConfig(TIMER_TIM, TIM_OCPreload_Disable); 109 | 110 | TIM_OC2Init(TIMER_TIM, &TIM_OCInitStructure); 111 | TIM_OC2PreloadConfig(TIMER_TIM, TIM_OCPreload_Disable); 112 | 113 | TIM_OC3Init(TIMER_TIM, &TIM_OCInitStructure); 114 | TIM_OC3PreloadConfig(TIMER_TIM, TIM_OCPreload_Disable); 115 | 116 | TIM_ARRPreloadConfig(TIMER_TIM, ENABLE); 117 | 118 | // go... 119 | TIM_Cmd(TIMER_TIM, ENABLE); 120 | } 121 | 122 | // TODO: worry about 32 bit rollover 123 | void timerSetAlarm1(int32_t ticks, timerCallback_t *callback, int parameter) { 124 | // do it now 125 | if (ticks <= TIMER_MULT) { 126 | // Disable the Interrupt 127 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC1; 128 | 129 | callback(parameter); 130 | } 131 | // otherwise, schedule it 132 | else { 133 | timerData.alarm1Callback = callback; 134 | timerData.alarm1Parameter = parameter; 135 | 136 | TIMER_TIM->CCR1 = TIMER_TIM->CNT + ticks; 137 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC1; 138 | 139 | TIMER_TIM->DIER |= TIM_IT_CC1; 140 | } 141 | } 142 | 143 | void timerSetAlarm2(int32_t ticks, timerCallback_t *callback, int parameter) { 144 | // do it now 145 | if (ticks <= TIMER_MULT) { 146 | // Disable the Interrupt 147 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC2; 148 | 149 | callback(parameter); 150 | } 151 | // otherwise, schedule it 152 | else { 153 | timerData.alarm2Callback = callback; 154 | timerData.alarm2Parameter = parameter; 155 | 156 | TIMER_TIM->CCR2 = TIMER_TIM->CNT + ticks; 157 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC2; 158 | TIMER_TIM->DIER |= TIM_IT_CC2; 159 | } 160 | } 161 | 162 | void timerSetAlarm3(int32_t ticks, timerCallback_t *callback, int parameter) { 163 | // do it now 164 | if (ticks <= TIMER_MULT) { 165 | // Disable the Interrupt 166 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC3; 167 | 168 | callback(parameter); 169 | } 170 | // otherwise, schedule it 171 | else { 172 | timerData.alarm3Callback = callback; 173 | timerData.alarm3Parameter = parameter; 174 | 175 | TIMER_TIM->CCR3 = TIMER_TIM->CNT + ticks; 176 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC3; 177 | TIMER_TIM->DIER |= TIM_IT_CC3; 178 | } 179 | } 180 | 181 | void TIMER_ISR(void) { 182 | if (TIM_GetITStatus(TIMER_TIM, TIM_IT_CC1) != RESET) { 183 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC1; 184 | 185 | // Disable the Interrupt 186 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC1; 187 | 188 | timerData.alarm1Callback(timerData.alarm1Parameter); 189 | } 190 | else if (TIM_GetITStatus(TIMER_TIM, TIM_IT_CC2) != RESET) { 191 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC2; 192 | 193 | // Disable the Interrupt 194 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC2; 195 | 196 | timerData.alarm2Callback(timerData.alarm2Parameter); 197 | } 198 | else if (TIM_GetITStatus(TIMER_TIM, TIM_IT_CC3) != RESET) { 199 | TIMER_TIM->SR = (uint16_t)~TIM_IT_CC3; 200 | 201 | // Disable the Interrupt 202 | TIMER_TIM->DIER &= (uint16_t)~TIM_IT_CC3; 203 | 204 | timerData.alarm3Callback(timerData.alarm3Parameter); 205 | } 206 | } 207 | -------------------------------------------------------------------------------- /src/timer.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad ESC32. 3 | 4 | AutoQuad ESC32 is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad ESC32 is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad ESC32. If not, see . 15 | 16 | Copyright © 2011, 2012 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _TIMER_H 20 | #define _TIMER_H 21 | 22 | #include "stm32f10x_tim.h" 23 | 24 | #define TIMER_TIM TIM2 25 | #define TIMER_IRQ_CH TIM2_IRQn 26 | #define TIMER_ISR TIM2_IRQHandler 27 | #define TIMER_MULT 2//4 // 0.5 us resolution 28 | #define TIMER_MASK 0xFFFFFFFF // for testing timer roll-over 29 | 30 | typedef void timerCallback_t(int); 31 | 32 | typedef struct { 33 | timerCallback_t *alarm1Callback; 34 | int alarm1Parameter; 35 | 36 | timerCallback_t *alarm2Callback; 37 | int alarm2Parameter; 38 | 39 | timerCallback_t *alarm3Callback; 40 | int alarm3Parameter; 41 | } timerStruct_t; 42 | 43 | extern volatile uint32_t timerMicros; 44 | 45 | extern void timerInit(void); 46 | extern void timerDelay(uint16_t us); 47 | extern void timerSetAlarm1(int32_t us, timerCallback_t *callback, int parameter); 48 | extern void timerSetAlarm2(int32_t us, timerCallback_t *callback, int parameter); 49 | extern void timerSetAlarm3(int32_t us, timerCallback_t *callback, int parameter); 50 | extern void timerCancelAlarm1(void); 51 | extern void timerCancelAlarm2(void); 52 | extern void timerCancelAlarm3(void); 53 | extern uint8_t timerAlarmActive3(void); 54 | extern uint32_t timerGetMicros(void); 55 | 56 | #endif 57 | -------------------------------------------------------------------------------- /stm32_flash.ld: -------------------------------------------------------------------------------- 1 | /* 2 | ***************************************************************************** 3 | ** 4 | ** File : stm32_flash.ld 5 | ** 6 | ** Abstract : Linker script for STM32F103C8 Device with 7 | ** 64KByte FLASH, 20KByte RAM 8 | ** 9 | ***************************************************************************** 10 | */ 11 | 12 | /* Entry Point */ 13 | ENTRY(Reset_Handler) 14 | 15 | /* Highest address of the user mode stack */ 16 | _estack = 0x20005000; /* end of 10K RAM */ 17 | 18 | /* Generate a link error if heap and stack don't fit into RAM */ 19 | _Min_Heap_Size = 0; /* required amount of heap */ 20 | _Min_Stack_Size = 0x400; /* required amount of stack */ 21 | 22 | /* Specify the memory areas */ 23 | MEMORY 24 | { 25 | FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 127K 26 | RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K 27 | MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K 28 | } 29 | 30 | /* Define output sections */ 31 | SECTIONS 32 | { 33 | /* The startup code goes first into FLASH */ 34 | .isr_vector : 35 | { 36 | . = ALIGN(4); 37 | KEEP(*(.isr_vector)) /* Startup code */ 38 | . = ALIGN(4); 39 | } >FLASH 40 | 41 | /* The program code and other data goes into FLASH */ 42 | .text : 43 | { 44 | . = ALIGN(4); 45 | *(.text) /* .text sections (code) */ 46 | *(.text*) /* .text* sections (code) */ 47 | *(.rodata) /* .rodata sections (constants, strings, etc.) */ 48 | *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 49 | *(.glue_7) /* glue arm to thumb code */ 50 | *(.glue_7t) /* glue thumb to arm code */ 51 | *(.eh_frame) 52 | 53 | KEEP (*(.init)) 54 | KEEP (*(.fini)) 55 | 56 | . = ALIGN(4); 57 | _etext = .; /* define a global symbols at end of code */ 58 | } >FLASH 59 | 60 | 61 | .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH 62 | .ARM : { 63 | __exidx_start = .; 64 | *(.ARM.exidx*) 65 | __exidx_end = .; 66 | } >FLASH 67 | 68 | .preinit_array : 69 | { 70 | PROVIDE_HIDDEN (__preinit_array_start = .); 71 | KEEP (*(.preinit_array*)) 72 | PROVIDE_HIDDEN (__preinit_array_end = .); 73 | } >FLASH 74 | .init_array : 75 | { 76 | PROVIDE_HIDDEN (__init_array_start = .); 77 | KEEP (*(SORT(.init_array.*))) 78 | KEEP (*(.init_array*)) 79 | PROVIDE_HIDDEN (__init_array_end = .); 80 | } >FLASH 81 | .fini_array : 82 | { 83 | PROVIDE_HIDDEN (__fini_array_start = .); 84 | KEEP (*(.fini_array*)) 85 | KEEP (*(SORT(.fini_array.*))) 86 | PROVIDE_HIDDEN (__fini_array_end = .); 87 | } >FLASH 88 | 89 | /* used by the startup to initialize data */ 90 | _sidata = .; 91 | 92 | /* Initialized data sections goes into RAM, load LMA copy after code */ 93 | .data : 94 | { 95 | . = ALIGN(4); 96 | _sdata = .; /* create a global symbol at data start */ 97 | *(.data) /* .data sections */ 98 | *(.data*) /* .data* sections */ 99 | 100 | . = ALIGN(4); 101 | _edata = .; /* define a global symbol at data end */ 102 | } >RAM AT> FLASH 103 | 104 | /* Uninitialized data section */ 105 | . = ALIGN(4); 106 | .bss : 107 | { 108 | /* This is used by the startup in order to initialize the .bss secion */ 109 | _sbss = .; /* define a global symbol at bss start */ 110 | __bss_start__ = _sbss; 111 | *(.bss) 112 | *(.bss*) 113 | *(COMMON) 114 | 115 | . = ALIGN(4); 116 | _ebss = .; /* define a global symbol at bss end */ 117 | __bss_end__ = _ebss; 118 | } >RAM 119 | 120 | /* User_heap_stack section, used to check that there is enough RAM left */ 121 | ._user_heap_stack : 122 | { 123 | . = ALIGN(4); 124 | PROVIDE ( end = . ); 125 | PROVIDE ( _end = . ); 126 | . = . + _Min_Heap_Size; 127 | . = . + _Min_Stack_Size; 128 | . = ALIGN(4); 129 | } >RAM 130 | 131 | /* MEMORY_bank1 section, code must be located here explicitly */ 132 | /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ 133 | .memory_b1_text : 134 | { 135 | *(.mb1text) /* .mb1text sections (code) */ 136 | *(.mb1text*) /* .mb1text* sections (code) */ 137 | *(.mb1rodata) /* read-only data (constants) */ 138 | *(.mb1rodata*) 139 | } >MEMORY_B1 140 | 141 | /* Remove information from the standard libraries */ 142 | /DISCARD/ : 143 | { 144 | libc.a ( * ) 145 | libm.a ( * ) 146 | libgcc.a ( * ) 147 | } 148 | 149 | .ARM.attributes 0 : { *(.ARM.attributes) } 150 | } 151 | -------------------------------------------------------------------------------- /support/flash.bat: -------------------------------------------------------------------------------- 1 | @@echo OFF 2 | 3 | :: User configuration 4 | 5 | :: set your port number. ie: for COM6 , port is 6 6 | set PORT=2 7 | :: location of stmflashloader.exe, this is default 8 | set FLASH_LOADER="C:\Program Files (x86)\STMicroelectronics\Software\Flash Loader Demonstrator\STMFlashLoader.exe" 9 | :: path to firmware 10 | set FIRMWARE="D:\baseflight.hex" 11 | 12 | :: ---------------------------------------------- 13 | 14 | mode COM%PORT% BAUD=115200 PARITY=N DATA=8 STOP=1 XON=OFF DTR=OFF RTS=OFF 15 | echo/|set /p ="R" > COM%PORT%: 16 | 17 | TIMEOUT /T 3 18 | 19 | cd %LOADER_PATH% 20 | 21 | %FLASH_LOADER% ^ 22 | -c --pn %PORT% --br 115200 --db 8 ^ 23 | -i STM32_Med-density_128K ^ 24 | -e --all ^ 25 | -d --fn %FIRMWARE% ^ 26 | -r --a 0x8000000 27 | -------------------------------------------------------------------------------- /support/stmloader/Makefile: -------------------------------------------------------------------------------- 1 | CC = $(CROSS_COMPILE)gcc 2 | AR = $(CROSS_COMPILE)ar 3 | export CC 4 | export AR 5 | 6 | all: 7 | $(CC) -g -o stmloader -I./ \ 8 | loader.c \ 9 | serial.c \ 10 | stmbootloader.c \ 11 | -Wall 12 | 13 | clean: 14 | rm -f stmloader; rm -rf stmloader.dSYM 15 | -------------------------------------------------------------------------------- /support/stmloader/loader.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad. 3 | 4 | AutoQuad is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad. If not, see . 15 | 16 | Copyright © 2011 Bill Nesbitt 17 | */ 18 | 19 | #include "serial.h" 20 | #include "stmbootloader.h" 21 | #include 22 | #include 23 | #include 24 | #include 25 | #include 26 | #include 27 | #include 28 | 29 | #define DEFAULT_PORT "/dev/ttyUSB0" 30 | #define DEFAULT_BAUD 115200 31 | #define FIRMWARE_FILENAME "STM32.hex" 32 | 33 | serialStruct_t *s; 34 | 35 | char port[256]; 36 | unsigned int baud; 37 | unsigned char overrideParity; 38 | unsigned char noSendR; 39 | char firmFile[256]; 40 | 41 | void loaderUsage(void) { 42 | fprintf(stderr, "usage: loader <-h> <-p device_file> <-b baud_rate> <-f firmware_file> <-o> <-n>\n"); 43 | } 44 | 45 | unsigned int loaderOptions(int argc, char **argv) { 46 | int ch; 47 | 48 | strncpy(port, DEFAULT_PORT, sizeof(port)); 49 | baud = DEFAULT_BAUD; 50 | overrideParity = 0; 51 | noSendR = 0; 52 | strncpy(firmFile, FIRMWARE_FILENAME, sizeof(firmFile)); 53 | 54 | /* options descriptor */ 55 | static struct option longopts[] = { 56 | { "help", required_argument, NULL, 'h' }, 57 | { "port", required_argument, NULL, 'p' }, 58 | { "baud", required_argument, NULL, 's' }, 59 | { "firm_file", required_argument, NULL, 'f' }, 60 | { "override_parity", no_argument, NULL, 'o' }, 61 | { "no_send_r", no_argument, NULL, 'n' }, 62 | { NULL, 0, NULL, 0 } 63 | }; 64 | 65 | while ((ch = getopt_long(argc, argv, "hp:b:f:o:n", longopts, NULL)) != -1) 66 | switch (ch) { 67 | case 'h': 68 | loaderUsage(); 69 | exit(0); 70 | break; 71 | case 'p': 72 | strncpy(port, optarg, sizeof(port)); 73 | break; 74 | case 'b': 75 | baud = atoi(optarg); 76 | break; 77 | case 'f': 78 | strncpy(firmFile, optarg, sizeof(firmFile)); 79 | break; 80 | case 'o': 81 | overrideParity = 1; 82 | break; 83 | case 'n': 84 | noSendR = 1; 85 | break; 86 | default: 87 | loaderUsage(); 88 | return 0; 89 | } 90 | argc -= optind; 91 | argv += optind; 92 | 93 | return 1; 94 | } 95 | 96 | int main(int argc, char **argv) { 97 | FILE *fw; 98 | 99 | // init 100 | if (!loaderOptions(argc, argv)) { 101 | fprintf(stderr, "Init failed, aborting\n"); 102 | return 1; 103 | } 104 | 105 | s = initSerial(port, baud, 0); 106 | if (!s) { 107 | fprintf(stderr, "Cannot open serial port '%s', aborting.\n", port); 108 | return 1; 109 | } 110 | 111 | fw = fopen(firmFile, "r"); 112 | if (!fw) { 113 | fprintf(stderr, "Cannot open firmware file '%s', aborting.\n", firmFile); 114 | return 1; 115 | } 116 | else { 117 | printf("Upgrading STM on port %s from %s...\n", port, firmFile); 118 | stmLoader(s, fw, overrideParity, noSendR); 119 | } 120 | 121 | return 0; 122 | } 123 | -------------------------------------------------------------------------------- /support/stmloader/serial.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad. 3 | 4 | AutoQuad is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad. If not, see . 15 | 16 | Copyright © 2011 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _GNU_SOURCE 20 | #define _GNU_SOURCE 21 | #endif 22 | 23 | #include "serial.h" 24 | #include 25 | #include 26 | #include 27 | #include 28 | #include 29 | #include 30 | #include 31 | 32 | serialStruct_t *initSerial(const char *port, unsigned int baud, char ctsRts) { 33 | serialStruct_t *s; 34 | struct termios options; 35 | unsigned int brate; 36 | 37 | s = (serialStruct_t *)calloc(1, sizeof(serialStruct_t)); 38 | 39 | s->fd = open(port, O_RDWR | O_NOCTTY | O_NDELAY); 40 | 41 | if (s->fd == -1) { 42 | free(s); 43 | return 0; 44 | } 45 | 46 | fcntl(s->fd, F_SETFL, 0); // clear all flags on descriptor, enable direct I/O 47 | 48 | // bzero(&options, sizeof(options)); 49 | // memset(&options, 0, sizeof(options)); 50 | tcgetattr(s->fd, &options); 51 | 52 | #ifdef B921600 53 | switch (baud) { 54 | case 9600: 55 | brate = B9600; 56 | break; 57 | case 19200: 58 | brate = B19200; 59 | break; 60 | case 38400: 61 | brate = B38400; 62 | break; 63 | case 57600: 64 | brate = B57600; 65 | break; 66 | case 115200: 67 | brate = B115200; 68 | break; 69 | case 230400: 70 | brate = B230400; 71 | break; 72 | case 460800: 73 | brate = B460800; 74 | break; 75 | case 921600: 76 | brate = B921600; 77 | break; 78 | default: 79 | brate = B115200; 80 | break; 81 | } 82 | options.c_cflag = brate; 83 | #else // APPLE 84 | cfsetispeed(&options, baud); 85 | cfsetospeed(&options, baud); 86 | #endif 87 | 88 | options.c_cflag |= CRTSCTS | CS8 | CLOCAL | CREAD; 89 | options.c_iflag = IGNPAR; 90 | options.c_iflag &= (~(IXON|IXOFF|IXANY)); // turn off software flow control 91 | options.c_oflag = 0; 92 | 93 | /* set input mode (non-canonical, no echo,...) */ 94 | options.c_lflag = 0; 95 | 96 | options.c_cc[VTIME] = 0; /* inter-character timer unused */ 97 | options.c_cc[VMIN] = 1; /* blocking read until 1 chars received */ 98 | 99 | #ifdef CCTS_OFLOW 100 | options.c_cflag |= CCTS_OFLOW; 101 | #endif 102 | 103 | if (!ctsRts) 104 | options.c_cflag &= ~(CRTSCTS); // turn off hardware flow control 105 | 106 | // set the new port options 107 | tcsetattr(s->fd, TCSANOW, &options); 108 | 109 | return s; 110 | } 111 | 112 | void serialFree(serialStruct_t *s) { 113 | if (s) { 114 | if (s->fd) 115 | close(s->fd); 116 | free (s); 117 | } 118 | } 119 | 120 | void serialNoParity(serialStruct_t *s) { 121 | struct termios options; 122 | 123 | tcgetattr(s->fd, &options); // read serial port options 124 | 125 | options.c_cflag &= ~(PARENB | CSTOPB); 126 | 127 | tcsetattr(s->fd, TCSANOW, &options); 128 | } 129 | 130 | void serialEvenParity(serialStruct_t *s) { 131 | struct termios options; 132 | 133 | tcgetattr(s->fd, &options); // read serial port options 134 | 135 | options.c_cflag |= (PARENB); 136 | options.c_cflag &= ~(PARODD | CSTOPB); 137 | 138 | tcsetattr(s->fd, TCSANOW, &options); 139 | } 140 | 141 | void serialWriteChar(serialStruct_t *s, unsigned char c) { 142 | char ret; 143 | 144 | ret = write(s->fd, &c, 1); 145 | } 146 | 147 | void serialWrite(serialStruct_t *s, const char *str, unsigned int len) { 148 | char ret; 149 | 150 | ret = write(s->fd, str, len); 151 | } 152 | 153 | unsigned char serialAvailable(serialStruct_t *s) { 154 | fd_set fdSet; 155 | struct timeval timeout; 156 | 157 | FD_ZERO(&fdSet); 158 | FD_SET(s->fd, &fdSet); 159 | memset((char *)&timeout, 0, sizeof(timeout)); 160 | 161 | if (select(s->fd+1, &fdSet, 0, 0, &timeout) == 1) 162 | return 1; 163 | else 164 | return 0; 165 | } 166 | 167 | void serialFlush(serialStruct_t *s) { 168 | while (serialAvailable(s)) 169 | serialRead(s); 170 | } 171 | 172 | unsigned char serialRead(serialStruct_t *s) { 173 | char ret; 174 | unsigned char c; 175 | 176 | ret = read(s->fd, &c, 1); 177 | 178 | return c; 179 | } 180 | -------------------------------------------------------------------------------- /support/stmloader/serial.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad. 3 | 4 | AutoQuad is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad. If not, see . 15 | 16 | Copyright © 2011 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _serial_h 20 | #define _serial_h 21 | 22 | #define INPUT_BUFFER_SIZE 1024 23 | 24 | typedef struct { 25 | int fd; 26 | } serialStruct_t; 27 | 28 | extern serialStruct_t *initSerial(const char *port, unsigned int baud, char ctsRts); 29 | extern void serialWrite(serialStruct_t *s, const char *str, unsigned int len); 30 | extern void serialWriteChar(serialStruct_t *s, unsigned char c); 31 | extern unsigned char serialAvailable(serialStruct_t *s); 32 | extern void serialFlush(serialStruct_t *s); 33 | extern unsigned char serialRead(serialStruct_t *s); 34 | extern void serialEvenParity(serialStruct_t *s); 35 | extern void serialNoParity(serialStruct_t *s); 36 | extern void serialFree(serialStruct_t *s); 37 | 38 | #endif 39 | -------------------------------------------------------------------------------- /support/stmloader/stmbootloader.c: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad. 3 | 4 | AutoQuad is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad. If not, see . 15 | 16 | Copyright © 2011 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _GNU_SOURCE 20 | #define _GNU_SOURCE 21 | #endif 22 | 23 | #include "serial.h" 24 | #include 25 | #include 26 | #include 27 | #include 28 | 29 | #define STM_RETRIES_SHORT 1000 30 | #define STM_RETRIES_LONG 50000 31 | 32 | unsigned char getResults[11]; 33 | 34 | unsigned char stmHexToChar(const char *hex) { 35 | char hex1, hex2; 36 | unsigned char nibble1, nibble2; 37 | 38 | // force data to upper case 39 | hex1 = toupper(hex[0]); 40 | hex2 = toupper(hex[1]); 41 | 42 | if (hex1 < 65) 43 | nibble1 = hex1 - 48; 44 | else 45 | nibble1 = hex1 - 55; 46 | 47 | if (hex2 < 65) 48 | nibble2 = hex2 - 48; 49 | else 50 | nibble2 = hex2 - 55; 51 | 52 | return (nibble1 << 4 | nibble2); 53 | } 54 | 55 | 56 | unsigned char stmWaitAck(serialStruct_t *s, int retries) { 57 | unsigned char c; 58 | unsigned int i; 59 | 60 | for (i = 0; i < retries; i++) { 61 | if (serialAvailable(s)) { 62 | c = serialRead(s); 63 | if (c == 0x79) { 64 | // putchar('+'); fflush(stdout); 65 | return 1; 66 | } 67 | if (c == 0x1f) { 68 | putchar('-'); fflush(stdout); 69 | return 0; 70 | } 71 | else { 72 | printf("?%x?", c); fflush(stdout); 73 | return 0; 74 | } 75 | } 76 | usleep(500); 77 | } 78 | 79 | return 0; 80 | } 81 | 82 | unsigned char stmWrite(serialStruct_t *s, const char *hex) { 83 | unsigned char c; 84 | unsigned char ck; 85 | unsigned char i; 86 | 87 | ck = 0; 88 | i = 0; 89 | while (*hex) { 90 | c = stmHexToChar(hex); 91 | serialWrite(s, (char *)&c, 1); 92 | ck ^= c; 93 | hex += 2; 94 | i++; 95 | } 96 | if (i == 1) 97 | ck = 0xff ^ c; 98 | 99 | // send checksum 100 | serialWrite(s, (char *)&ck, 1); 101 | 102 | return stmWaitAck(s, STM_RETRIES_LONG); 103 | } 104 | 105 | void stmWriteCommand(serialStruct_t *s, char *msb, char *lsb, char *len, char *data) { 106 | char startAddress[9]; 107 | char lenPlusData[128]; 108 | char c; 109 | 110 | strncpy(startAddress, msb, sizeof(startAddress)); 111 | strcat(startAddress, lsb); 112 | 113 | sprintf(lenPlusData, "%02x%s", stmHexToChar(len) - 1, data); 114 | 115 | write: 116 | // send WRITE MEMORY command 117 | do { 118 | c = getResults[5]; 119 | serialWrite(s, &c, 1); 120 | c = 0xff ^ c; 121 | serialWrite(s, &c, 1); 122 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 123 | 124 | // send address 125 | if (!stmWrite(s, startAddress)) { 126 | putchar('A'); 127 | goto write; 128 | } 129 | 130 | // send len + data 131 | if (!stmWrite(s, lenPlusData)) { 132 | putchar('D'); 133 | goto write; 134 | } 135 | 136 | putchar('='); fflush(stdout); 137 | } 138 | 139 | char *stmHexLoader(serialStruct_t *s, FILE *fp) { 140 | char hexByteCount[3], hexAddressLSB[5], hexRecordType[3], hexData[128]; 141 | char addressMSB[5]; 142 | static char addressJump[9]; 143 | 144 | // bzero(addressJump, sizeof(addressJump)); 145 | // bzero(addressMSB, sizeof(addressMSB)); 146 | memset(addressJump, 0, sizeof(addressJump)); 147 | memset(addressMSB, 0, sizeof(addressMSB)); 148 | 149 | while (fscanf(fp, ":%2s%4s%2s%s\n", hexByteCount, hexAddressLSB, hexRecordType, hexData) != EOF) { 150 | unsigned int byteCount, addressLSB, recordType; 151 | 152 | recordType = stmHexToChar(hexRecordType); 153 | hexData[stmHexToChar(hexByteCount) * 2] = 0; // terminate at CHKSUM 154 | 155 | // printf("Record Type: %d\n", recordType); 156 | switch (recordType) { 157 | case 0x00: 158 | stmWriteCommand(s, addressMSB, hexAddressLSB, hexByteCount, hexData); 159 | break; 160 | case 0x01: 161 | // EOF 162 | return addressJump; 163 | break; 164 | case 0x04: 165 | // MSB of destination 32 bit address 166 | strncpy(addressMSB, hexData, 4); 167 | break; 168 | case 0x05: 169 | // 32 bit address to run after load 170 | strncpy(addressJump, hexData, 8); 171 | break; 172 | } 173 | } 174 | 175 | return 0; 176 | } 177 | 178 | void stmLoader(serialStruct_t *s, FILE *fp, unsigned char overrideParity, unsigned char noSendR) { 179 | char c; 180 | unsigned char b1, b2, b3; 181 | unsigned char i, n; 182 | char *jumpAddress; 183 | 184 | // turn on parity generation 185 | if (!overrideParity) 186 | serialEvenParity(s); 187 | 188 | if(!noSendR) { 189 | top: 190 | printf("Sending R to place Baseflight in bootloader, press a key to continue"); 191 | serialFlush(s); 192 | c = 'R'; 193 | serialWrite(s, &c, 1); 194 | getchar(); 195 | printf("\n"); 196 | } 197 | 198 | serialFlush(s); 199 | 200 | printf("Poking the MCU to check whether bootloader is alive..."); 201 | 202 | // poke the MCU 203 | do { 204 | printf("p"); fflush(stdout); 205 | c = 0x7f; 206 | serialWrite(s, &c, 1); 207 | } while (!stmWaitAck(s, STM_RETRIES_SHORT)); 208 | printf("STM bootloader alive...\n"); 209 | 210 | // send GET command 211 | do { 212 | c = 0x00; 213 | serialWrite(s, &c, 1); 214 | c = 0xff; 215 | serialWrite(s, &c, 1); 216 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 217 | 218 | b1 = serialRead(s); // number of bytes 219 | b2 = serialRead(s); // bootloader version 220 | 221 | for (i = 0; i < b1; i++) 222 | getResults[i] = serialRead(s); 223 | 224 | stmWaitAck(s, STM_RETRIES_LONG); 225 | printf("Received commands.\n"); 226 | 227 | 228 | // send GET VERSION command 229 | do { 230 | c = getResults[1]; 231 | serialWrite(s, &c, 1); 232 | c = 0xff ^ c; 233 | serialWrite(s, &c, 1); 234 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 235 | b1 = serialRead(s); 236 | b2 = serialRead(s); 237 | b3 = serialRead(s); 238 | stmWaitAck(s, STM_RETRIES_LONG); 239 | printf("STM Bootloader version: %d.%d\n", (b1 & 0xf0) >> 4, (b1 & 0x0f)); 240 | 241 | // send GET ID command 242 | do { 243 | c = getResults[2]; 244 | serialWrite(s, &c, 1); 245 | c = 0xff ^ c; 246 | serialWrite(s, &c, 1); 247 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 248 | n = serialRead(s); 249 | printf("STM Device ID: 0x"); 250 | for (i = 0; i <= n; i++) { 251 | b1 = serialRead(s); 252 | printf("%02x", b1); 253 | } 254 | stmWaitAck(s, STM_RETRIES_LONG); 255 | printf("\n"); 256 | 257 | /* 258 | flash_size: 259 | // read Flash size 260 | c = getResults[3]; 261 | serialWrite(s, &c, 1); 262 | c = 0xff ^ c; 263 | serialWrite(s, &c, 1); 264 | 265 | // if read not allowed, unprotect (which also erases) 266 | if (!stmWaitAck(s, STM_RETRIES_LONG)) { 267 | // unprotect command 268 | do { 269 | c = getResults[10]; 270 | serialWrite(s, &c, 1); 271 | c = 0xff ^ c; 272 | serialWrite(s, &c, 1); 273 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 274 | 275 | // wait for results 276 | if (stmWaitAck(s, STM_RETRIES_LONG)) 277 | goto top; 278 | } 279 | 280 | // send address 281 | if (!stmWrite(s, "1FFFF7E0")) 282 | goto flash_size; 283 | 284 | // send # bytes (N-1 = 1) 285 | if (!stmWrite(s, "01")) 286 | goto flash_size; 287 | 288 | b1 = serialRead(s); 289 | b2 = serialRead(s); 290 | printf("STM Flash Size: %dKB\n", b2<<8 | b1); 291 | */ 292 | 293 | // erase flash 294 | erase_flash: 295 | printf("Global flash erase [command 0x%x]...", getResults[6]); fflush(stdout); 296 | do { 297 | c = getResults[6]; 298 | serialWrite(s, &c, 1); 299 | c = 0xff ^ c; 300 | serialWrite(s, &c, 1); 301 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 302 | 303 | // global erase 304 | if (getResults[6] == 0x44) { 305 | // mass erase 306 | if (!stmWrite(s, "FFFF")) 307 | goto erase_flash; 308 | } 309 | else { 310 | c = 0xff; 311 | serialWrite(s, &c, 1); 312 | c = 0x00; 313 | serialWrite(s, &c, 1); 314 | 315 | if (!stmWaitAck(s, STM_RETRIES_LONG)) 316 | goto erase_flash; 317 | } 318 | 319 | printf("Done.\n"); 320 | 321 | // upload hex file 322 | printf("Flashing device...\n"); 323 | jumpAddress = stmHexLoader(s, fp); 324 | if (jumpAddress) { 325 | printf("\nFlash complete, cycle power\n"); 326 | 327 | go: 328 | // send GO command 329 | do { 330 | c = getResults[4]; 331 | serialWrite(s, &c, 1); 332 | c = 0xff ^ c; 333 | serialWrite(s, &c, 1); 334 | } while (!stmWaitAck(s, STM_RETRIES_LONG)); 335 | 336 | // send address 337 | if (!stmWrite(s, jumpAddress)) 338 | goto go; 339 | } 340 | else { 341 | printf("\nFlash complete.\n"); 342 | } 343 | } 344 | -------------------------------------------------------------------------------- /support/stmloader/stmbootloader.h: -------------------------------------------------------------------------------- 1 | /* 2 | This file is part of AutoQuad. 3 | 4 | AutoQuad is free software: you can redistribute it and/or modify 5 | it under the terms of the GNU General Public License as published by 6 | the Free Software Foundation, either version 3 of the License, or 7 | (at your option) any later version. 8 | 9 | AutoQuad is distributed in the hope that it will be useful, 10 | but WITHOUT ANY WARRANTY; without even the implied warranty of 11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 | GNU General Public License for more details. 13 | You should have received a copy of the GNU General Public License 14 | along with AutoQuad. If not, see . 15 | 16 | Copyright © 2011 Bill Nesbitt 17 | */ 18 | 19 | #ifndef _stmbootloader_h 20 | #define _stmbootloader_h 21 | 22 | #include 23 | #include "serial.h" 24 | 25 | extern void stmLoader(serialStruct_t *s, FILE *fp, unsigned char overrideParity, unsigned char noSendR); 26 | 27 | #endif 28 | -------------------------------------------------------------------------------- /support/stmloader/stmloader: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/limhyon/esc32/17208906fe7566569935ced578112b4315102930/support/stmloader/stmloader -------------------------------------------------------------------------------- /support/stmloader/stmloader.dSYM/Contents/Info.plist: -------------------------------------------------------------------------------- 1 | 2 | 3 | 4 | 5 | CFBundleDevelopmentRegion 6 | English 7 | CFBundleIdentifier 8 | com.apple.xcode.dsym.stmloader 9 | CFBundleInfoDictionaryVersion 10 | 6.0 11 | CFBundlePackageType 12 | dSYM 13 | CFBundleSignature 14 | ???? 15 | CFBundleShortVersionString 16 | 1.0 17 | CFBundleVersion 18 | 1 19 | 20 | 21 | -------------------------------------------------------------------------------- /support/stmloader/stmloader.dSYM/Contents/Resources/DWARF/stmloader: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/limhyon/esc32/17208906fe7566569935ced578112b4315102930/support/stmloader/stmloader.dSYM/Contents/Resources/DWARF/stmloader --------------------------------------------------------------------------------