├── NOTES.txt ├── README.md ├── ipcore_ise13 ├── blk_mem_gen_ds512.pdf ├── blk_mem_gen_readme.txt ├── blk_mem_gen_v6_1.asy ├── blk_mem_gen_v6_1.gise ├── blk_mem_gen_v6_1.ngc ├── blk_mem_gen_v6_1.v ├── blk_mem_gen_v6_1.veo ├── blk_mem_gen_v6_1.vhd ├── blk_mem_gen_v6_1.vho ├── blk_mem_gen_v6_1.xco ├── blk_mem_gen_v6_1.xise ├── blk_mem_gen_v6_1_flist.txt ├── blk_mem_gen_v6_1_xmdf.tcl ├── coregen.cgc ├── coregen.cgp ├── coregen.log ├── ise_1kx24_dpram.asy ├── ise_1kx24_dpram.gise ├── ise_1kx24_dpram.ngc ├── ise_1kx24_dpram.v ├── ise_1kx24_dpram.veo ├── ise_1kx24_dpram.xco ├── ise_1kx24_dpram.xise ├── ise_1kx24_dpram_flist.txt ├── ise_1kx24_dpram_xmdf.tcl ├── ise_1kx32_dpram.asy ├── ise_1kx32_dpram.gise ├── ise_1kx32_dpram.ncf ├── ise_1kx32_dpram.ngc ├── ise_1kx32_dpram.v ├── ise_1kx32_dpram.veo ├── ise_1kx32_dpram.xco ├── ise_1kx32_dpram.xise ├── ise_1kx32_dpram_flist.txt ├── ise_1kx32_dpram_xmdf.tcl ├── ise_2kx17_dpram.asy ├── ise_2kx17_dpram.gise ├── ise_2kx17_dpram.ngc ├── ise_2kx17_dpram.v ├── ise_2kx17_dpram.veo ├── ise_2kx17_dpram.xco ├── ise_2kx17_dpram.xise ├── ise_2kx17_dpram_flist.txt ├── ise_2kx17_dpram_xmdf.tcl ├── ise_2kx5_dpram.asy ├── ise_2kx5_dpram.gise ├── ise_2kx5_dpram.ngc ├── ise_2kx5_dpram.v ├── ise_2kx5_dpram.veo ├── ise_2kx5_dpram.xco ├── ise_2kx5_dpram.xise ├── ise_2kx5_dpram_flist.txt ├── ise_2kx5_dpram_xmdf.tcl ├── ise_32x19_dpram.asy ├── ise_32x19_dpram.gise ├── ise_32x19_dpram.ncf ├── ise_32x19_dpram.ngc ├── ise_32x19_dpram.v ├── ise_32x19_dpram.veo ├── ise_32x19_dpram.xco ├── ise_32x19_dpram.xise ├── ise_32x19_dpram_flist.txt ├── ise_32x19_dpram_xmdf.tcl ├── ise_32x32_dpram.asy ├── ise_32x32_dpram.gise ├── ise_32x32_dpram.ngc ├── ise_32x32_dpram.v ├── ise_32x32_dpram.veo ├── ise_32x32_dpram.xco ├── ise_32x32_dpram.xise ├── ise_32x32_dpram_flist.txt └── ise_32x32_dpram_xmdf.tcl ├── ipcore_ise14.5 ├── blk_mem_gen_ds512.pdf ├── blk_mem_gen_readme.txt ├── blk_mem_gen_v6_1.asy ├── blk_mem_gen_v6_1.gise ├── blk_mem_gen_v6_1.ngc ├── blk_mem_gen_v6_1.v ├── blk_mem_gen_v6_1.veo ├── blk_mem_gen_v6_1.vhd ├── blk_mem_gen_v6_1.vho ├── blk_mem_gen_v6_1.xco ├── blk_mem_gen_v6_1.xise ├── blk_mem_gen_v6_1_flist.txt ├── blk_mem_gen_v6_1_xmdf.tcl ├── coregen.cgc ├── coregen.cgp ├── coregen.log ├── ise_1kx24_dpram.asy ├── ise_1kx24_dpram.gise ├── ise_1kx24_dpram.ngc ├── ise_1kx24_dpram.v ├── ise_1kx24_dpram.veo ├── ise_1kx24_dpram.xco ├── ise_1kx24_dpram.xise ├── ise_1kx24_dpram_flist.txt ├── ise_1kx24_dpram_xmdf.tcl ├── ise_1kx32_dpram.asy ├── ise_1kx32_dpram.gise ├── ise_1kx32_dpram.ncf ├── ise_1kx32_dpram.ngc ├── ise_1kx32_dpram.v ├── ise_1kx32_dpram.veo ├── ise_1kx32_dpram.xco ├── ise_1kx32_dpram.xise ├── ise_1kx32_dpram_flist.txt ├── ise_1kx32_dpram_xmdf.tcl ├── ise_2kx17_dpram.asy ├── ise_2kx17_dpram.gise ├── ise_2kx17_dpram.ngc ├── ise_2kx17_dpram.v ├── ise_2kx17_dpram.veo ├── ise_2kx17_dpram.xco ├── ise_2kx17_dpram.xise ├── ise_2kx17_dpram_flist.txt ├── ise_2kx17_dpram_xmdf.tcl ├── ise_2kx5_dpram.asy ├── ise_2kx5_dpram.gise ├── ise_2kx5_dpram.ngc ├── ise_2kx5_dpram.v ├── ise_2kx5_dpram.veo ├── ise_2kx5_dpram.xco ├── ise_2kx5_dpram.xise ├── ise_2kx5_dpram_flist.txt ├── ise_2kx5_dpram_xmdf.tcl ├── ise_32x19_dpram.asy ├── ise_32x19_dpram.gise ├── ise_32x19_dpram.ncf ├── ise_32x19_dpram.ngc ├── ise_32x19_dpram.v ├── ise_32x19_dpram.veo ├── ise_32x19_dpram.xco ├── ise_32x19_dpram.xise ├── ise_32x19_dpram_flist.txt ├── ise_32x19_dpram_xmdf.tcl ├── ise_32x32_dpram.asy ├── ise_32x32_dpram.gise ├── ise_32x32_dpram.ngc ├── ise_32x32_dpram.v ├── ise_32x32_dpram.veo ├── ise_32x32_dpram.xco ├── ise_32x32_dpram.xise ├── ise_32x32_dpram_flist.txt └── ise_32x32_dpram_xmdf.tcl ├── ipcore_ise8.2 ├── ise_1kx24_dpram.ngc ├── ise_1kx24_dpram.v ├── ise_1kx24_dpram.veo ├── ise_1kx24_dpram.xco ├── ise_1kx24_dpram_flist.txt ├── ise_1kx24_dpram_readme.txt ├── ise_1kx32_dpram.ngc ├── ise_1kx32_dpram.v ├── ise_1kx32_dpram.veo ├── ise_1kx32_dpram.xco ├── ise_1kx32_dpram_flist.txt ├── ise_1kx32_dpram_readme.txt ├── ise_2kx17_dpram.ngc ├── ise_2kx17_dpram.v ├── ise_2kx17_dpram.veo ├── ise_2kx17_dpram.xco ├── ise_2kx17_dpram_flist.txt ├── ise_2kx17_dpram_readme.txt ├── ise_2kx5_dpram.ngc ├── ise_2kx5_dpram.v ├── ise_2kx5_dpram.veo ├── ise_2kx5_dpram.xco ├── ise_2kx5_dpram_flist.txt ├── ise_2kx5_dpram_readme.txt ├── ise_32x19_dpram.ngc ├── ise_32x19_dpram.v ├── ise_32x19_dpram.veo ├── ise_32x19_dpram.xco ├── ise_32x19_dpram_flist.txt ├── ise_32x19_dpram_readme.txt ├── ise_32x32_dpram.cgp ├── ise_32x32_dpram.ngc ├── ise_32x32_dpram.v ├── ise_32x32_dpram.veo ├── ise_32x32_dpram.vho ├── ise_32x32_dpram.xco ├── ise_32x32_dpram_flist.txt └── ise_32x32_dpram_readme.txt ├── ise-lx45 ├── fuseRelaunch.cmd ├── ipcore_dir │ ├── _xmsgs │ │ ├── pn_parser.xmsgs │ │ └── xst.xmsgs │ ├── chipscope_icon.asy │ ├── chipscope_icon.constraints │ │ ├── chipscope_icon.ucf │ │ └── chipscope_icon.xdc │ ├── chipscope_icon.gise │ ├── chipscope_icon.ncf │ ├── chipscope_icon.ngc │ ├── chipscope_icon.ucf │ ├── chipscope_icon.v │ ├── chipscope_icon.veo │ ├── chipscope_icon.xco │ ├── chipscope_icon.xdc │ ├── chipscope_icon.xise │ ├── chipscope_icon_caddr.asy │ ├── chipscope_icon_caddr.constraints │ │ ├── chipscope_icon_caddr.ucf │ │ └── chipscope_icon_caddr.xdc │ ├── chipscope_icon_caddr.gise │ ├── chipscope_icon_caddr.ncf │ ├── chipscope_icon_caddr.ngc │ ├── chipscope_icon_caddr.ucf │ ├── chipscope_icon_caddr.v │ ├── chipscope_icon_caddr.veo │ ├── chipscope_icon_caddr.xco │ ├── chipscope_icon_caddr.xdc │ ├── chipscope_icon_caddr.xise │ ├── chipscope_icon_caddr_flist.txt │ ├── chipscope_icon_caddr_readme.txt │ ├── chipscope_icon_caddr_xmdf.tcl │ ├── chipscope_icon_flist.txt │ ├── chipscope_icon_mmc_bd.asy │ ├── chipscope_icon_mmc_bd.constraints │ │ ├── chipscope_icon_mmc_bd.ucf │ │ └── chipscope_icon_mmc_bd.xdc │ ├── chipscope_icon_mmc_bd.gise │ ├── chipscope_icon_mmc_bd.ncf │ ├── chipscope_icon_mmc_bd.ngc │ ├── chipscope_icon_mmc_bd.ucf │ ├── chipscope_icon_mmc_bd.v │ ├── chipscope_icon_mmc_bd.veo │ ├── chipscope_icon_mmc_bd.xco │ ├── chipscope_icon_mmc_bd.xdc │ ├── chipscope_icon_mmc_bd.xise │ ├── chipscope_icon_mmc_bd_flist.txt │ ├── chipscope_icon_mmc_bd_readme.txt │ ├── chipscope_icon_mmc_bd_xmdf.tcl │ ├── chipscope_icon_readme.txt │ ├── chipscope_icon_xmdf.tcl │ ├── chipscope_ila.asy │ ├── chipscope_ila.cdc │ ├── chipscope_ila.constraints │ │ ├── chipscope_ila.ucf │ │ └── chipscope_ila.xdc │ ├── chipscope_ila.gise │ ├── chipscope_ila.ncf │ ├── chipscope_ila.ngc │ ├── chipscope_ila.ucf │ ├── chipscope_ila.v │ ├── chipscope_ila.veo │ ├── chipscope_ila.xco │ ├── chipscope_ila.xdc │ ├── chipscope_ila.xise │ ├── chipscope_ila_caddr.asy │ ├── chipscope_ila_caddr.cdc │ ├── chipscope_ila_caddr.constraints │ │ ├── chipscope_ila_caddr.ucf │ │ └── chipscope_ila_caddr.xdc │ ├── chipscope_ila_caddr.gise │ ├── chipscope_ila_caddr.ncf │ ├── chipscope_ila_caddr.ngc │ ├── chipscope_ila_caddr.ucf │ ├── chipscope_ila_caddr.v │ ├── chipscope_ila_caddr.veo │ ├── chipscope_ila_caddr.xco │ ├── chipscope_ila_caddr.xdc │ ├── chipscope_ila_caddr.xise │ ├── chipscope_ila_caddr_flist.txt │ ├── chipscope_ila_caddr_readme.txt │ ├── chipscope_ila_caddr_xmdf.tcl │ ├── chipscope_ila_flist.txt │ ├── chipscope_ila_mmc_bd.asy │ ├── chipscope_ila_mmc_bd.cdc │ ├── chipscope_ila_mmc_bd.constraints │ │ ├── chipscope_ila_mmc_bd.ucf │ │ └── chipscope_ila_mmc_bd.xdc │ ├── chipscope_ila_mmc_bd.gise │ ├── chipscope_ila_mmc_bd.ncf │ ├── chipscope_ila_mmc_bd.ngc │ ├── chipscope_ila_mmc_bd.ucf │ ├── chipscope_ila_mmc_bd.v │ ├── chipscope_ila_mmc_bd.veo │ ├── chipscope_ila_mmc_bd.xco │ ├── chipscope_ila_mmc_bd.xdc │ ├── chipscope_ila_mmc_bd.xise │ ├── chipscope_ila_mmc_bd_flist.txt │ ├── chipscope_ila_mmc_bd_readme.txt │ ├── chipscope_ila_mmc_bd_xmdf.tcl │ ├── chipscope_ila_readme.txt │ ├── chipscope_ila_xmdf.tcl │ ├── clk_wiz_v3_6.asy │ ├── clk_wiz_v3_6.gise │ ├── clk_wiz_v3_6.ucf │ ├── clk_wiz_v3_6.v │ ├── clk_wiz_v3_6.veo │ ├── clk_wiz_v3_6.xco │ ├── clk_wiz_v3_6.xdc │ ├── clk_wiz_v3_6.xise │ ├── clk_wiz_v3_6 │ │ ├── clk_wiz_v3_6_readme.txt │ │ ├── doc │ │ │ ├── clk_wiz_v3_6_readme.txt │ │ │ ├── clk_wiz_v3_6_vinfo.html │ │ │ └── pg065_clk_wiz.pdf │ │ ├── example_design │ │ │ ├── clk_wiz_v3_6_exdes.ucf │ │ │ ├── clk_wiz_v3_6_exdes.v │ │ │ └── clk_wiz_v3_6_exdes.xdc │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── planAhead_rdn.bat │ │ │ ├── planAhead_rdn.sh │ │ │ ├── planAhead_rdn.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── clk_wiz_v3_6_tb.v │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.bat │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave.do │ │ │ └── wave.sv │ │ │ └── timing │ │ │ ├── clk_wiz_v3_6_tb.v │ │ │ ├── sdf_cmd_file │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ └── wave.do │ ├── clk_wiz_v3_6_flist.txt │ ├── clk_wiz_v3_6_xmdf.tcl │ ├── clocking.asy │ ├── clocking.gise │ ├── clocking.ucf │ ├── clocking.v │ ├── clocking.veo │ ├── clocking.xco │ ├── clocking.xdc │ ├── clocking.xise │ ├── clocking │ │ ├── clk_wiz_v3_6_readme.txt │ │ ├── doc │ │ │ ├── clk_wiz_v3_6_readme.txt │ │ │ ├── clk_wiz_v3_6_vinfo.html │ │ │ └── pg065_clk_wiz.pdf │ │ ├── example_design │ │ │ ├── clocking_exdes.ucf │ │ │ ├── clocking_exdes.v │ │ │ └── clocking_exdes.xdc │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── planAhead_rdn.bat │ │ │ ├── planAhead_rdn.sh │ │ │ ├── planAhead_rdn.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── clocking_tb.v │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.bat │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave.do │ │ │ └── wave.sv │ │ │ └── timing │ │ │ ├── clocking_tb.v │ │ │ ├── sdf_cmd_file │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ └── wave.do │ ├── clocking_flist.txt │ ├── clocking_xmdf.tcl │ ├── coregen.cgc │ ├── coregen.cgp │ ├── coregen.log │ ├── dcm90.asy │ ├── dcm90.gise │ ├── dcm90.ucf │ ├── dcm90.v │ ├── dcm90.veo │ ├── dcm90.xco │ ├── dcm90.xdc │ ├── dcm90.xise │ ├── dcm90 │ │ ├── clk_wiz_v3_6_readme.txt │ │ ├── doc │ │ │ ├── clk_wiz_v3_6_readme.txt │ │ │ ├── clk_wiz_v3_6_vinfo.html │ │ │ └── pg065_clk_wiz.pdf │ │ ├── example_design │ │ │ ├── dcm90_exdes.ucf │ │ │ ├── dcm90_exdes.v │ │ │ └── dcm90_exdes.xdc │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── planAhead_rdn.bat │ │ │ ├── planAhead_rdn.sh │ │ │ ├── planAhead_rdn.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── dcm90_tb.v │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.bat │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave.do │ │ │ └── wave.sv │ │ │ └── timing │ │ │ ├── dcm90_tb.v │ │ │ ├── sdf_cmd_file │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ └── wave.do │ ├── dcm90_flist.txt │ ├── dcm90_xmdf.tcl │ ├── ise_16kx49ram.asy │ ├── ise_16kx49ram.gise │ ├── ise_16kx49ram.ngc │ ├── ise_16kx49ram.v │ ├── ise_16kx49ram.veo │ ├── ise_16kx49ram.xco │ ├── ise_16kx49ram.xise │ ├── ise_16kx49ram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_16kx49ram_exdes.ucf │ │ │ ├── ise_16kx49ram_exdes.vhd │ │ │ ├── ise_16kx49ram_exdes.xdc │ │ │ └── ise_16kx49ram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_16kx49ram_synth.vhd │ │ │ ├── ise_16kx49ram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_16kx49ram_flist.txt │ ├── ise_16kx49ram_xmdf.tcl │ ├── ise_1kx24_dpram.asy │ ├── ise_1kx24_dpram.gise │ ├── ise_1kx24_dpram.ngc │ ├── ise_1kx24_dpram.v │ ├── ise_1kx24_dpram.veo │ ├── ise_1kx24_dpram.xco │ ├── ise_1kx24_dpram.xise │ ├── ise_1kx24_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_ds512.pdf │ │ │ ├── blk_mem_gen_v6_1_vinfo.html │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_1kx24_dpram_exdes.ucf │ │ │ ├── ise_1kx24_dpram_exdes.vhd │ │ │ ├── ise_1kx24_dpram_exdes.xdc │ │ │ └── ise_1kx24_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_1kx24_dpram_synth.vhd │ │ │ ├── ise_1kx24_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_1kx24_dpram_flist.txt │ ├── ise_1kx24_dpram_upgrade.txt │ ├── ise_1kx24_dpram_xmdf.tcl │ ├── ise_1kx32_dpram.asy │ ├── ise_1kx32_dpram.gise │ ├── ise_1kx32_dpram.ncf │ ├── ise_1kx32_dpram.ngc │ ├── ise_1kx32_dpram.v │ ├── ise_1kx32_dpram.veo │ ├── ise_1kx32_dpram.xco │ ├── ise_1kx32_dpram.xise │ ├── ise_1kx32_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_ds512.pdf │ │ │ ├── blk_mem_gen_v6_1_vinfo.html │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_1kx32_dpram_exdes.ucf │ │ │ ├── ise_1kx32_dpram_exdes.vhd │ │ │ ├── ise_1kx32_dpram_exdes.xdc │ │ │ └── ise_1kx32_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_1kx32_dpram_synth.vhd │ │ │ ├── ise_1kx32_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_1kx32_dpram_flist.txt │ ├── ise_1kx32_dpram_upgrade.txt │ ├── ise_1kx32_dpram_xmdf.tcl │ ├── ise_21kx32_dpram.asy │ ├── ise_21kx32_dpram.gise │ ├── ise_21kx32_dpram.ngc │ ├── ise_21kx32_dpram.v │ ├── ise_21kx32_dpram.veo │ ├── ise_21kx32_dpram.xco │ ├── ise_21kx32_dpram.xise │ ├── ise_21kx32_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_21kx32_dpram_exdes.ucf │ │ │ ├── ise_21kx32_dpram_exdes.vhd │ │ │ ├── ise_21kx32_dpram_exdes.xdc │ │ │ └── ise_21kx32_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_21kx32_dpram_synth.vhd │ │ │ ├── ise_21kx32_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_21kx32_dpram_flist.txt │ ├── ise_21kx32_dpram_xmdf.tcl │ ├── ise_2kx17_dpram.asy │ ├── ise_2kx17_dpram.gise │ ├── ise_2kx17_dpram.ngc │ ├── ise_2kx17_dpram.v │ ├── ise_2kx17_dpram.veo │ ├── ise_2kx17_dpram.xco │ ├── ise_2kx17_dpram.xise │ ├── ise_2kx17_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_ds512.pdf │ │ │ ├── blk_mem_gen_v6_1_vinfo.html │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_2kx17_dpram_exdes.ucf │ │ │ ├── ise_2kx17_dpram_exdes.vhd │ │ │ ├── ise_2kx17_dpram_exdes.xdc │ │ │ └── ise_2kx17_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_2kx17_dpram_synth.vhd │ │ │ ├── ise_2kx17_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_2kx17_dpram_flist.txt │ ├── ise_2kx17_dpram_upgrade.txt │ ├── ise_2kx17_dpram_xmdf.tcl │ ├── ise_2kx5_dpram.asy │ ├── ise_2kx5_dpram.gise │ ├── ise_2kx5_dpram.ngc │ ├── ise_2kx5_dpram.v │ ├── ise_2kx5_dpram.veo │ ├── ise_2kx5_dpram.xco │ ├── ise_2kx5_dpram.xise │ ├── ise_2kx5_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_ds512.pdf │ │ │ ├── blk_mem_gen_v6_1_vinfo.html │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_2kx5_dpram_exdes.ucf │ │ │ ├── ise_2kx5_dpram_exdes.vhd │ │ │ ├── ise_2kx5_dpram_exdes.xdc │ │ │ └── ise_2kx5_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_2kx5_dpram_synth.vhd │ │ │ ├── ise_2kx5_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_2kx5_dpram_flist.txt │ ├── ise_2kx5_dpram_upgrade.txt │ ├── ise_2kx5_dpram_xmdf.tcl │ ├── ise_32x19_dpram.asy │ ├── ise_32x19_dpram.gise │ ├── ise_32x19_dpram.ncf │ ├── ise_32x19_dpram.ngc │ ├── ise_32x19_dpram.v │ ├── ise_32x19_dpram.veo │ ├── ise_32x19_dpram.xco │ ├── ise_32x19_dpram.xise │ ├── ise_32x19_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_ds512.pdf │ │ │ ├── blk_mem_gen_v6_1_vinfo.html │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_32x19_dpram_exdes.ucf │ │ │ ├── ise_32x19_dpram_exdes.vhd │ │ │ ├── ise_32x19_dpram_exdes.xdc │ │ │ └── ise_32x19_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_32x19_dpram_synth.vhd │ │ │ ├── ise_32x19_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_32x19_dpram_flist.txt │ ├── ise_32x19_dpram_upgrade.txt │ ├── ise_32x19_dpram_xmdf.tcl │ ├── ise_32x32_dpram.asy │ ├── ise_32x32_dpram.gise │ ├── ise_32x32_dpram.ngc │ ├── ise_32x32_dpram.v │ ├── ise_32x32_dpram.veo │ ├── ise_32x32_dpram.xco │ ├── ise_32x32_dpram.xise │ ├── ise_32x32_dpram │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ ├── doc │ │ │ ├── blk_mem_gen_ds512.pdf │ │ │ ├── blk_mem_gen_v6_1_vinfo.html │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ └── pg058-blk-mem-gen.pdf │ │ ├── example_design │ │ │ ├── ise_32x32_dpram_exdes.ucf │ │ │ ├── ise_32x32_dpram_exdes.vhd │ │ │ ├── ise_32x32_dpram_exdes.xdc │ │ │ └── ise_32x32_dpram_prod.vhd │ │ ├── implement │ │ │ ├── implement.bat │ │ │ ├── implement.sh │ │ │ ├── planAhead_ise.bat │ │ │ ├── planAhead_ise.sh │ │ │ ├── planAhead_ise.tcl │ │ │ ├── xst.prj │ │ │ └── xst.scr │ │ └── simulation │ │ │ ├── addr_gen.vhd │ │ │ ├── bmg_stim_gen.vhd │ │ │ ├── bmg_tb_pkg.vhd │ │ │ ├── checker.vhd │ │ │ ├── data_gen.vhd │ │ │ ├── functional │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ │ │ ├── ise_32x32_dpram_synth.vhd │ │ │ ├── ise_32x32_dpram_tb.vhd │ │ │ ├── random.vhd │ │ │ └── timing │ │ │ ├── simcmds.tcl │ │ │ ├── simulate_isim.sh │ │ │ ├── simulate_mti.bat │ │ │ ├── simulate_mti.do │ │ │ ├── simulate_mti.sh │ │ │ ├── simulate_ncsim.sh │ │ │ ├── simulate_vcs.sh │ │ │ ├── ucli_commands.key │ │ │ ├── vcs_session.tcl │ │ │ ├── wave_mti.do │ │ │ └── wave_ncsim.sv │ ├── ise_32x32_dpram_flist.txt │ ├── ise_32x32_dpram_upgrade.txt │ ├── ise_32x32_dpram_xmdf.tcl │ ├── mig.prj │ ├── mig_32bit.gise │ ├── mig_32bit.veo │ ├── mig_32bit.xco │ ├── mig_32bit.xise │ ├── mig_32bit │ │ ├── docs │ │ │ ├── ug388.pdf │ │ │ └── ug416.pdf │ │ ├── example_design │ │ │ ├── datasheet.txt │ │ │ ├── mig.prj │ │ │ ├── par │ │ │ │ ├── create_ise.sh │ │ │ │ ├── example_top.ucf │ │ │ │ ├── icon_coregen.xco │ │ │ │ ├── ila_coregen.xco │ │ │ │ ├── ise_flow.sh │ │ │ │ ├── ise_run.txt │ │ │ │ ├── makeproj.sh │ │ │ │ ├── mem_interface_top.ut │ │ │ │ ├── readme.txt │ │ │ │ ├── rem_files.sh │ │ │ │ ├── set_ise_prop.tcl │ │ │ │ └── vio_coregen.xco │ │ │ ├── rtl │ │ │ │ ├── example_top.v │ │ │ │ ├── infrastructure.v │ │ │ │ ├── mcb_controller │ │ │ │ │ ├── iodrp_controller.v │ │ │ │ │ ├── iodrp_mcb_controller.v │ │ │ │ │ ├── mcb_raw_wrapper.v │ │ │ │ │ ├── mcb_soft_calibration.v │ │ │ │ │ ├── mcb_soft_calibration_top.v │ │ │ │ │ └── mcb_ui_top.v │ │ │ │ ├── memc_tb_top.v │ │ │ │ ├── memc_wrapper.v │ │ │ │ └── traffic_gen │ │ │ │ │ ├── afifo.v │ │ │ │ │ ├── cmd_gen.v │ │ │ │ │ ├── cmd_prbs_gen.v │ │ │ │ │ ├── data_prbs_gen.v │ │ │ │ │ ├── init_mem_pattern_ctr.v │ │ │ │ │ ├── mcb_flow_control.v │ │ │ │ │ ├── mcb_traffic_gen.v │ │ │ │ │ ├── rd_data_gen.v │ │ │ │ │ ├── read_data_path.v │ │ │ │ │ ├── read_posted_fifo.v │ │ │ │ │ ├── sp6_data_gen.v │ │ │ │ │ ├── tg_status.v │ │ │ │ │ ├── v6_data_gen.v │ │ │ │ │ ├── wr_data_gen.v │ │ │ │ │ └── write_data_path.v │ │ │ ├── sim │ │ │ │ └── functional │ │ │ │ │ ├── isim.sh │ │ │ │ │ ├── isim.tcl │ │ │ │ │ ├── lpddr_model_c3.v │ │ │ │ │ ├── lpddr_model_parameters_c3.vh │ │ │ │ │ ├── mig_32bit.prj │ │ │ │ │ ├── readme.txt │ │ │ │ │ ├── sim.do │ │ │ │ │ ├── sim_tb_top.v │ │ │ │ │ └── timing_sim.sh │ │ │ └── synth │ │ │ │ ├── example_top.lso │ │ │ │ ├── example_top.prj │ │ │ │ ├── mem_interface_top_synp.sdc │ │ │ │ └── script_synp.tcl │ │ └── user_design │ │ │ ├── datasheet.txt │ │ │ ├── mig.prj │ │ │ ├── par │ │ │ ├── create_ise.sh │ │ │ ├── icon_coregen.xco │ │ │ ├── ila_coregen.xco │ │ │ ├── ise_flow.sh │ │ │ ├── ise_run.txt │ │ │ ├── makeproj.sh │ │ │ ├── mem_interface_top.ut │ │ │ ├── mig_32bit.ucf │ │ │ ├── readme.txt │ │ │ ├── rem_files.sh │ │ │ ├── set_ise_prop.tcl │ │ │ └── vio_coregen.xco │ │ │ ├── rtl │ │ │ ├── infrastructure.v │ │ │ ├── mcb_controller │ │ │ │ ├── iodrp_controller.v │ │ │ │ ├── iodrp_mcb_controller.v │ │ │ │ ├── mcb_raw_wrapper.v │ │ │ │ ├── mcb_soft_calibration.v │ │ │ │ ├── mcb_soft_calibration_top.v │ │ │ │ └── mcb_ui_top.v │ │ │ ├── memc_wrapper.v │ │ │ └── mig_32bit.v │ │ │ ├── sim │ │ │ ├── afifo.v │ │ │ ├── cmd_gen.v │ │ │ ├── cmd_prbs_gen.v │ │ │ ├── data_prbs_gen.v │ │ │ ├── init_mem_pattern_ctr.v │ │ │ ├── isim.sh │ │ │ ├── isim.tcl │ │ │ ├── lpddr_model_c3.v │ │ │ ├── lpddr_model_parameters_c3.vh │ │ │ ├── mcb_flow_control.v │ │ │ ├── mcb_traffic_gen.v │ │ │ ├── memc_tb_top.v │ │ │ ├── mig_32bit.prj │ │ │ ├── rd_data_gen.v │ │ │ ├── read_data_path.v │ │ │ ├── read_posted_fifo.v │ │ │ ├── readme.txt │ │ │ ├── sim.do │ │ │ ├── sim_tb_top.v │ │ │ ├── sp6_data_gen.v │ │ │ ├── tg_status.v │ │ │ ├── v6_data_gen.v │ │ │ ├── wr_data_gen.v │ │ │ └── write_data_path.v │ │ │ └── synth │ │ │ ├── mem_interface_top_synp.sdc │ │ │ ├── mig_32bit.lso │ │ │ ├── mig_32bit.prj │ │ │ └── script_synp.tcl │ ├── mig_32bit_flist.txt │ ├── mig_32bit_readme.txt │ ├── mig_32bit_xmdf.tcl │ ├── summary.log │ └── tmp │ │ ├── _xmsgs │ │ ├── ngcbuild.xmsgs │ │ ├── pn_parser.xmsgs │ │ └── xst.xmsgs │ │ ├── blk_mem_gen_v6_1.lso │ │ ├── customization_gui.0.0986673548346.out │ │ ├── customization_gui.0.141656270782.out │ │ ├── customization_gui.0.225927224022.out │ │ ├── customization_gui.0.299981940677.out │ │ ├── customization_gui.0.813180887985.out │ │ ├── customization_gui.0.904004496943.out │ │ ├── ise_16kx49ram.lso │ │ ├── ise_1kx24_dpram.lso │ │ ├── ise_1kx32_dpram.lso │ │ ├── ise_21kx32_dpram.lso │ │ ├── ise_2kx17_dpram.lso │ │ ├── ise_2kx5_dpram.lso │ │ ├── ise_32x19_dpram.lso │ │ └── ise_32x32_dpram.lso ├── ise-lx45.gise ├── ise-lx45.xise ├── isim.cmd ├── preload.c ├── preload.so ├── run.sh ├── run_top_beh.prj ├── top.bit ├── top.prj ├── top_beh.prj └── vga_display.prj ├── lisp ├── Makefile ├── NOTES.txt ├── cadreg.lisp ├── cc.c ├── decode.c ├── diags.lisp ├── lcadmc.lisp ├── lcadrd.lisp ├── pkg-serial.lisp ├── sb-serial.lisp ├── serial.lisp ├── t.lisp └── test.lisp ├── niox ├── cli │ ├── Makefile │ ├── NOTES.txt │ ├── a.out │ ├── cli.c │ ├── diag.bin │ ├── diag.elf │ ├── diag.h │ ├── diag.ldscript │ ├── diag.objdump │ ├── font8x8_basic.h │ ├── kb_map.c │ ├── main.c │ ├── niox_dram0.hex │ ├── niox_dram1.hex │ ├── niox_dram2.hex │ ├── niox_dram3.hex │ ├── niox_irom.bin │ ├── niox_irom.hex │ ├── old │ │ ├── ac97.c │ │ ├── ac97.h │ │ ├── cis.h │ │ ├── cli.c │ │ ├── cpld.c │ │ ├── cs8900.h │ │ ├── cs89x0.c │ │ ├── cs89x0.h │ │ ├── diag.h │ │ ├── eeprom.c │ │ ├── eframe.h │ │ ├── gpio.c │ │ ├── ide.c │ │ ├── ide.h │ │ ├── lcd.c │ │ ├── lh7a400.h │ │ ├── main.c │ │ ├── pcmcia.c │ │ ├── printf.c │ │ ├── readline.c │ │ ├── serial-lh7a400.h │ │ ├── serial.c │ │ ├── strings.c │ │ ├── testing.c │ │ ├── tests.c │ │ ├── tftp.c │ │ ├── tftp.h │ │ ├── timer.c │ │ ├── touch.c │ │ ├── types.h │ │ └── util.c │ ├── printf.c │ ├── readline.c │ ├── serial.c │ ├── start.S │ ├── strings.c │ ├── support.c │ ├── tv.c │ ├── util.c │ └── xx ├── fillram │ ├── _xmsgs │ │ └── ngc2edif.xmsgs │ ├── fillbit.bmm │ ├── fillbit.sh │ ├── getram.sh │ ├── ngc2edif.log │ ├── niox_dram0.hex │ ├── niox_dram1.hex │ ├── niox_dram2.hex │ ├── niox_dram3.hex │ ├── niox_irom.hex │ ├── top_niox.bit │ ├── top_niox.edf │ └── top_niox.ngc ├── ise │ ├── fuseRelaunch.cmd │ ├── ipcore_dir │ │ ├── _xmsgs │ │ │ └── xst.xmsgs │ │ ├── coregen.cgc │ │ ├── coregen.cgp │ │ ├── coregen.log │ │ ├── ram_byte.asy │ │ ├── ram_byte.gise │ │ ├── ram_byte.ngc │ │ ├── ram_byte.v │ │ ├── ram_byte.veo │ │ ├── ram_byte.xco │ │ ├── ram_byte.xise │ │ ├── ram_byte │ │ │ ├── blk_mem_gen_v7_3_readme.txt │ │ │ ├── doc │ │ │ │ ├── blk_mem_gen_v7_3_vinfo.html │ │ │ │ └── pg058-blk-mem-gen.pdf │ │ │ ├── example_design │ │ │ │ ├── ram_byte_exdes.ucf │ │ │ │ ├── ram_byte_exdes.vhd │ │ │ │ ├── ram_byte_exdes.xdc │ │ │ │ └── ram_byte_prod.vhd │ │ │ ├── implement │ │ │ │ ├── implement.bat │ │ │ │ ├── implement.sh │ │ │ │ ├── planAhead_ise.bat │ │ │ │ ├── planAhead_ise.sh │ │ │ │ ├── planAhead_ise.tcl │ │ │ │ ├── xst.prj │ │ │ │ └── xst.scr │ │ │ └── simulation │ │ │ │ ├── addr_gen.vhd │ │ │ │ ├── bmg_stim_gen.vhd │ │ │ │ ├── bmg_tb_pkg.vhd │ │ │ │ ├── checker.vhd │ │ │ │ ├── data_gen.vhd │ │ │ │ ├── functional │ │ │ │ ├── simcmds.tcl │ │ │ │ ├── simulate_isim.sh │ │ │ │ ├── simulate_mti.bat │ │ │ │ ├── simulate_mti.do │ │ │ │ ├── simulate_mti.sh │ │ │ │ ├── simulate_ncsim.sh │ │ │ │ ├── simulate_vcs.sh │ │ │ │ ├── ucli_commands.key │ │ │ │ ├── vcs_session.tcl │ │ │ │ ├── wave_mti.do │ │ │ │ └── wave_ncsim.sv │ │ │ │ ├── ram_byte_synth.vhd │ │ │ │ ├── ram_byte_tb.vhd │ │ │ │ ├── random.vhd │ │ │ │ └── timing │ │ │ │ ├── simcmds.tcl │ │ │ │ ├── simulate_isim.sh │ │ │ │ ├── simulate_mti.bat │ │ │ │ ├── simulate_mti.do │ │ │ │ ├── simulate_mti.sh │ │ │ │ ├── simulate_ncsim.sh │ │ │ │ ├── simulate_vcs.sh │ │ │ │ ├── ucli_commands.key │ │ │ │ ├── vcs_session.tcl │ │ │ │ ├── wave_mti.do │ │ │ │ └── wave_ncsim.sv │ │ ├── ram_byte_flist.txt │ │ ├── ram_byte_xmdf.tcl │ │ ├── summary.log │ │ └── tmp │ │ │ ├── _xmsgs │ │ │ ├── pn_parser.xmsgs │ │ │ └── xst.xmsgs │ │ │ └── ram_byte.lso │ ├── isim.cmd │ ├── isim.sh │ ├── niox.gise │ ├── niox.xise │ ├── preload.so │ ├── run.sh │ ├── top_niox.prj │ ├── top_niox_tb_beh.prj │ └── xcd.sh ├── rtl │ ├── niox_cpu.v │ ├── niox_ram.v │ ├── niox_ram_byte_ise.v │ ├── niox_rom.v │ ├── niox_spy.v │ └── top_niox.v └── verif │ ├── defines.vh │ ├── isim.wcfg │ ├── mmc_model.v │ ├── niox_dram0.hex │ ├── niox_dram1.hex │ ├── niox_dram2.hex │ ├── niox_dram3.hex │ ├── niox_irom.hex │ ├── run-cver-top_niox_tb.sh │ ├── run.vc │ ├── sd_model.v │ ├── top_niox_tb.gtkw │ ├── top_niox_tb.v │ ├── vendor_defines.v │ ├── verilog.log │ ├── xilinx.v │ └── yy1 ├── pipistrello ├── hdmi │ ├── DRAM16XN.v │ ├── clocking.v │ ├── convert_30to15_fifo.v │ ├── dvid.v │ ├── dvid_output.v │ ├── encode.v │ ├── minicom.cap │ └── serdes_5_to_1.v ├── mig_32bit │ ├── docs │ │ ├── ug388.pdf │ │ └── ug416.pdf │ ├── example_design │ │ ├── datasheet.txt │ │ ├── mig.prj │ │ ├── par │ │ │ ├── create_ise.sh │ │ │ ├── example_top.ucf │ │ │ ├── icon_coregen.xco │ │ │ ├── ila_coregen.xco │ │ │ ├── ise_flow.sh │ │ │ ├── ise_run.txt │ │ │ ├── makeproj.sh │ │ │ ├── mem_interface_top.ut │ │ │ ├── readme.txt │ │ │ ├── rem_files.sh │ │ │ ├── set_ise_prop.tcl │ │ │ └── vio_coregen.xco │ │ ├── rtl │ │ │ ├── example_top.v │ │ │ ├── infrastructure.v │ │ │ ├── mcb_controller │ │ │ │ ├── iodrp_controller.v │ │ │ │ ├── iodrp_mcb_controller.v │ │ │ │ ├── mcb_raw_wrapper.v │ │ │ │ ├── mcb_soft_calibration.v │ │ │ │ ├── mcb_soft_calibration_top.v │ │ │ │ └── mcb_ui_top.v │ │ │ ├── memc_tb_top.v │ │ │ ├── memc_wrapper.v │ │ │ └── traffic_gen │ │ │ │ ├── afifo.v │ │ │ │ ├── cmd_gen.v │ │ │ │ ├── cmd_prbs_gen.v │ │ │ │ ├── data_prbs_gen.v │ │ │ │ ├── init_mem_pattern_ctr.v │ │ │ │ ├── mcb_flow_control.v │ │ │ │ ├── mcb_traffic_gen.v │ │ │ │ ├── rd_data_gen.v │ │ │ │ ├── read_data_path.v │ │ │ │ ├── read_posted_fifo.v │ │ │ │ ├── sp6_data_gen.v │ │ │ │ ├── tg_status.v │ │ │ │ ├── v6_data_gen.v │ │ │ │ ├── wr_data_gen.v │ │ │ │ └── write_data_path.v │ │ ├── sim │ │ │ └── functional │ │ │ │ ├── isim.sh │ │ │ │ ├── isim.tcl │ │ │ │ ├── lpddr_model_c3.v │ │ │ │ ├── lpddr_model_parameters_c3.vh │ │ │ │ ├── mig_32bit.prj │ │ │ │ ├── readme.txt │ │ │ │ ├── sim.do │ │ │ │ ├── sim_tb_top.v │ │ │ │ └── timing_sim.sh │ │ └── synth │ │ │ ├── example_top.lso │ │ │ ├── example_top.prj │ │ │ ├── mem_interface_top_synp.sdc │ │ │ └── script_synp.tcl │ └── user_design │ │ ├── datasheet.txt │ │ ├── mig.prj │ │ ├── par │ │ ├── create_ise.sh │ │ ├── icon_coregen.xco │ │ ├── ila_coregen.xco │ │ ├── ise_flow.sh │ │ ├── ise_run.txt │ │ ├── makeproj.sh │ │ ├── mem_interface_top.ut │ │ ├── mig_32bit.ucf │ │ ├── readme.txt │ │ ├── rem_files.sh │ │ ├── set_ise_prop.tcl │ │ └── vio_coregen.xco │ │ ├── rtl │ │ ├── infrastructure.v │ │ ├── mcb_controller │ │ │ ├── iodrp_controller.v │ │ │ ├── iodrp_mcb_controller.v │ │ │ ├── mcb_raw_wrapper.v │ │ │ ├── mcb_soft_calibration.v │ │ │ ├── mcb_soft_calibration_top.v │ │ │ └── mcb_ui_top.v │ │ ├── memc_wrapper.v │ │ └── mig_32bit.v │ │ ├── sim │ │ ├── afifo.v │ │ ├── cmd_gen.v │ │ ├── cmd_prbs_gen.v │ │ ├── data_prbs_gen.v │ │ ├── init_mem_pattern_ctr.v │ │ ├── isim.sh │ │ ├── isim.tcl │ │ ├── lpddr_model_c3.v │ │ ├── lpddr_model_parameters_c3.vh │ │ ├── mcb_flow_control.v │ │ ├── mcb_traffic_gen.v │ │ ├── memc_tb_top.v │ │ ├── mig_32bit.prj │ │ ├── rd_data_gen.v │ │ ├── read_data_path.v │ │ ├── read_posted_fifo.v │ │ ├── readme.txt │ │ ├── sim.do │ │ ├── sim_tb_top.v │ │ ├── sp6_data_gen.v │ │ ├── tg_status.v │ │ ├── v6_data_gen.v │ │ ├── wr_data_gen.v │ │ └── write_data_path.v │ │ └── synth │ │ ├── mem_interface_top_synp.sdc │ │ ├── mig_32bit.lso │ │ ├── mig_32bit.prj │ │ └── script_synp.tcl └── pipistrello_v2.01.ucf ├── pli ├── Makefile ├── busint │ ├── Makefile │ ├── pli_busint.c │ └── win32.bat ├── display │ ├── Makefile │ └── display.c ├── ide │ ├── Makefile │ ├── pli_ide.c │ └── win32.bat └── mmc │ ├── Makefile │ ├── part1_410.pdf │ ├── partA2_300.pdf │ ├── pli_mmc.c │ ├── pli_mmc.vpi │ └── win32.bat ├── prom ├── prom.dis.txt ├── promh.9 ├── promh.sym.9 └── trace1.txt ├── rtl ├── 74181.v ├── 74181.v.orig ├── 74182.v ├── NOTES.txt ├── SPY.txt ├── brg.v ├── bus.txt ├── busint.v ├── caddr.v ├── clk100_dcm.v ├── clk_dcm.v ├── clk_dcm.v.orig ├── cpu_test.v ├── cpu_test_cpu.v ├── cpu_test_data.v ├── cpu_test_disk.v ├── cpu_test_mcr.v ├── defines.vh ├── display.v ├── fast_ram_controller.v ├── fpga_clocks.v ├── ide.v ├── ide_block_dev.v ├── keyboard.v ├── lpddr.v ├── lx45_clocks.v ├── lx45_ram_controller.v ├── mapping.txt ├── memory.v ├── mmc.v ├── mmc_block_dev.v ├── mouse.v ├── part_16kx49ram.v ├── part_1kx24ram.v ├── part_1kx24ram_sync.v ├── part_1kx32ram.v ├── part_1kx32ram_a.v ├── part_1kx32ram_p.v ├── part_21kx32ram.v ├── part_2kx17ram.v ├── part_2kx5ram.v ├── part_32x19ram.v ├── part_32x32ram.v ├── pipe_ram_controller.v ├── prom.v ├── ps2.v ├── ps2_send.v ├── ps2_support.v ├── ram_controller.v ├── rom.v ├── scancode_convert.v ├── scancode_rom.v ├── sevensegdecode.v ├── slow_ram_controller.v ├── spy.v ├── support.v ├── top.v ├── top_lx45.v ├── top_tb.v ├── uart-old.v ├── uart.v ├── vga_display.v ├── xbus-disk-ide.v ├── xbus-disk.v ├── xbus-io.v ├── xbus-ram.v ├── xbus-spy.v ├── xbus-sram.v ├── xbus-tv.v └── xbus-unibus.v ├── s3 ├── _pace.ucf ├── blk_mem_gen_v1_1.ngc ├── s3board.lfp └── s3board.ucf ├── utils ├── asm │ ├── Makefile │ ├── asm.c │ ├── dis.c │ ├── input1 │ ├── input2 │ ├── input3 │ ├── input4 │ ├── input5 │ ├── input6 │ ├── input7 │ └── input8 ├── comp │ ├── Makefile │ ├── NOTES.txt │ ├── comp.c │ └── run.sh ├── diags │ ├── Makefile │ ├── NOTES.txt │ ├── a.out │ ├── basic1.m │ ├── disk_rw1.m │ ├── dispatch1.m │ ├── dispatch2.m │ ├── dispatch3.m │ ├── dram_rw1.m │ ├── dram_rw2.m │ ├── dram_rw_loop1.m │ ├── dram_rw_loop2.m │ ├── dram_rw_loop3.m │ ├── failure.m │ ├── loop1.m │ ├── m.c │ ├── success.m │ ├── vma.m │ ├── vram_rw1.m │ └── vram_rw2.m └── tv │ ├── Makefile │ ├── tv │ ├── tv.c │ └── vextract.c ├── verif ├── Makefile ├── NOTES.txt ├── bootrom.mem ├── caddr.sav ├── debug-spy-driver.v ├── debug-spy-serial.v ├── debug-support.v ├── debug-xbus-disk.v ├── debug-xbus-ram.v ├── debug-xbus-tv.v ├── debug_block_dev.v ├── debug_min_ram_controller.v ├── debug_ram_controller.v ├── debug_rom.v ├── diag.sh ├── ide_disk.v ├── isim.wcfg ├── iv.sh ├── ivt.sh ├── maketraces.sh ├── mmc_disk.v ├── patch-bootrom.mem ├── patch-rw-dram.mem ├── patch-rw-vram.mem ├── patch-test-shift.mem ├── ram_s3board.v ├── rc.sav ├── rompatch.v ├── rtl.v ├── run-cver-disk.sh ├── run-cver-mmc.sh ├── run-cver-spy-top.sh ├── run-cver-spy.sh ├── run-cver-top-cpu-test.sh ├── run-cver-top-lx45-test.sh ├── run-cver-top-lx45-xilinx.sh ├── run-cver.sh ├── run-disk-ide.sav ├── run-disk-mmc.sav ├── run-disk.v ├── run-file.sh ├── run-mmc.sav ├── run-mmc.v ├── run-rc.v ├── run-spy.gtkw ├── run-spy.v ├── run-support.v ├── run-top-lx45.sav ├── run-top-spy.v ├── run-verilator.v ├── run.do ├── run.sh ├── run.v ├── run_top.v ├── run_top_cpu_test.v ├── run_top_lx45_test.v ├── show.sh ├── test-keyboard.v ├── test-ps2_send.v ├── test-scancode_convert.v ├── test-verilator-ide.sav ├── test-verilator-mmc.sav ├── test_fast.v ├── trans.busint ├── trans.disk ├── trans.pipe2 ├── verilator.sh ├── wave.do ├── wave2.do ├── wave_ms.do ├── wrap_ide.v ├── wrap_mmc.v └── xilinx.v ├── verilator ├── block_dev.cpp ├── ide.cpp ├── mmc.cpp ├── ram.cpp ├── test.cpp └── vga.cpp └── vtest ├── clk_dcm.v ├── debounce.v ├── ram_controller.v ├── ram_s3board.v ├── run.sh ├── s3board.ucf ├── test_top.v ├── top.v └── vga_display.v /NOTES.txt: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/lisper/cpus-caddr/HEAD/NOTES.txt -------------------------------------------------------------------------------- /README.md: -------------------------------------------------------------------------------- https://raw.githubusercontent.com/lisper/cpus-caddr/HEAD/README.md -------------------------------------------------------------------------------- /ipcore_ise13/blk_mem_gen_ds512.pdf: -------------------------------------------------------------------------------- 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